60382 lines
3.9 MiB
60382 lines
3.9 MiB
; --------------------------------------------------------------------------------
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; @Title: RZA1H On-Chip Peripherals
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; @Props: Released
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; @Author: BUJ, EMK, ZAK
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; @Changelog: 2013-07-30
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; @Manufacturer: RENESAS - Renesas Technology, Corp.
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; @Doc: r01uh0403ej0060_rz_a1h.pdf
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; @Core: Cortex-A9
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; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perrza1h.per 14414 2022-03-01 16:26:32Z kwisniewski $
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config 16. 8.
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width 0xB
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tree "Core Registers (Cortex-A9MPCore)"
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width 0x8
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; --------------------------------------------------------------------------------
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; Identification registers
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; --------------------------------------------------------------------------------
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tree "ID Registers"
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rgroup.long c15:0x0++0x0
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line.long 0x0 "MIDR,Main ID Register"
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hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
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bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 16.--19. " ARCH , Architecture" "Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,ARMv7"
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textline " "
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hexmask.long.word 0x0 4.--15. 0x1 " PART ,Primary Part Number"
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bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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rgroup.long c15:0x100++0x0
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line.long 0x0 "CTR,Cache Type Register"
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bitfld.long 0x0 29.--31. " FORMAT ,Format" "Not ARMv7,Not ARMv7,Not ARMv7,Not ARMv7,ARMv7,Not ARMv7,Not ARMv7,Not ARMv7"
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bitfld.long 0x0 24.--27. " CWG ,Cache Writeback Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x0 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 16.--19. " DMINLINE ,D-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
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textline " "
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bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,ASID,Virtual,Physical"
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bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
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rgroup.long c15:0x200++0x0
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line.long 0x0 "TCMTR,Tighly-Coupled Memory Type Register"
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rgroup.long c15:0x300++0x0
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line.long 0x0 "TLBTR,TLB Type Register"
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hexmask.long.byte 0x0 16.--23. 0x1 " ILSIZE ,Specifies the number of instruction TLB lockable entries"
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hexmask.long.byte 0x0 8.--15. 0x1 " DLSIZE ,Specifies the number of unified or data TLB lockable entries"
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bitfld.long 0x0 1. " TLB_size ,TLB Size" "64,128"
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textline " "
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bitfld.long 0x0 0. " nU ,Unified or Separate TLBs" "Unified,Separate"
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rgroup.long c15:0x500++0x0
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line.long 0x0 "MPIDR,Multiprocessor Affinity Register"
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bitfld.long 0x00 30. " U ,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor"
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bitfld.long 0x00 8.--11. " ClusterID ,Value read in CLUSTERID configuration pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--1. " CPUID ,Value depends on the number of configured CPUs" "0,1,2,3"
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rgroup.long c15:0x0410++0x00
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line.long 0x00 "MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 28.--31. " ISB ,Innermost shareability bits" "Non-cacheable,Hardware coherency,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored"
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bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,Supported,?..."
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bitfld.long 0x00 20.--23. " ARS ,Auxiliary Registers Support" "Not supported,Control only,Fault status and Control,?..."
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textline " "
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bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,IMPLEMENTATION DEFINED,?..."
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bitfld.long 0x00 12.--15. " SLS ,Shareability levels Support" "One level,Two levels,?..."
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bitfld.long 0x00 8.--11. " OSS ,Outermost shareability Support" "Non-cacheable,Supported,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored"
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textline " "
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bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,IMPLEMENTATION DEFINED,PMSAv6,PMSAv7,?..."
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bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Not supported,IMPLEMENTATION DEFINED,VMSAv6,VMSAv7,?..."
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rgroup.long c15:0x0510++0x00
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line.long 0x00 "MMFR1,Memory Model Feature Register 1"
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bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Disabled,Required,Required,Required,Not required,?..."
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bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
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bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
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rgroup.long c15:0x0610++0x00
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line.long 0x00 "MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,Supported,?..."
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bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Not supported,Supported,?..."
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bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Not supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,Supported,Supported,?..."
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bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..."
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bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..."
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rgroup.long c15:0x0710++0x00
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line.long 0x00 "MMFR3,Memory Model Feature Register 3"
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bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not supported"
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bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Supported,?..."
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bitfld.long 0x00 12.--15. " MB ,Invalidate broadcast Support" "Reserved,Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Not supported,Supported,?..."
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bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Not supported,Supported,?..."
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bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Not supported,Supported,?..."
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rgroup.long c15:0x0020++0x00
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line.long 0x00 "ISAR0,Instruction Set Attribute Register 0"
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bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Not supported,Supported,?..."
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rgroup.long c15:0x0120++0x00
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line.long 0x00 "ISAR1,Instruction Set Attribute Register 1"
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bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 24.--27. " INTI ,Interwork Instructions Support" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Not supported,Supported,Supported,?..."
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bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Not supported,Supported,Supported,?..."
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bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Not supported,Supported,?..."
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rgroup.long c15:0x0220++0x00
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line.long 0x00 "ISAR2,Instruction Set Attribute Register 2"
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bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Not supported,Supported,Supported,?..."
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bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Not supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Not supported,Supported,Supported,?..."
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bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..."
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bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Not supported,Supported,?..."
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rgroup.long c15:0x0320++0x00
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line.long 0x00 "ISAR3,Instruction Set Attribute Register 3"
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bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Not supported,Supported,?..."
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rgroup.long c15:0x0420++0x00
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line.long 0x00 "ISAR4,Instruction Set Attribute Register 4"
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bitfld.long 0x00 28.--31. " SWP_frac ,SWAP_frac" "Not supported,Supported,?..."
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bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Not supported,Reserved,Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Not supported,Supported,?..."
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bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..."
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bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Not supported,Supported,Supported,?..."
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rgroup.long c15:0x0010++0x00
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line.long 0x00 "PFR0,Processor Feature Register 0"
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bitfld.long 0x00 12.--15. " State3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Not supported,Supported,?..."
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bitfld.long 0x00 8.--11. " State2 ,Java Extension Interface Support" "Not supported,Supported,Supported,?..."
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bitfld.long 0x00 4.--7. " State1 ,Thumb Encoding Supported by the Processor Type" "Not supported,Supported,Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 0.--3. " State0 ,ARM Instruction Set Support" "Not supported,Supported,?..."
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rgroup.long c15:0x0110++0x00
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line.long 0x00 "PFR1,Processor Feature Register 1"
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bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,Reserved,Supported,?..."
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bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Not supported,Supported,Supported,?..."
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bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Not supported,Supported,?..."
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rgroup.long c15:0x0210++0x00
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line.long 0x00 "DFR0,Debug Feature Register 0"
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bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,Supported,?..."
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bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Not supported,Reserved,Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,Reserved,Reserved,v6.1,v7,?..."
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bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Not supported,Reserved,v6,v6.1,v7,?..."
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tree.end
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width 0x8
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tree "System Control and Configuration"
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group.long c15:0x1++0x0
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line.long 0x0 "SCTLR,Control Register"
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bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
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bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled"
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bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 27. " NMFI ,Nonmaskable Fast Interrupt enable" "Disabled,Enabled"
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bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big"
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bitfld.long 0x0 14. " RR ,Replacement strategy for caches, BTAC, and micro TLBs" "Random,Round robin"
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textline " "
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bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
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bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
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bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled"
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bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
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bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled"
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group.long c15:0x101++0x0
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line.long 0x0 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 9. " PARON ,Parity On" "Disabled,Enabled"
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bitfld.long 0x00 8. " ALIOW ,Enable allocation in one cache way only" "Disabled,Enabled"
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bitfld.long 0x00 7. " EXCL ,Exclusive cache Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 6. " SMP ,Signals if the Cortex-A9 processor is taking part in coherency or not" "0,1"
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bitfld.long 0x00 3. " FOZ ,Full Of Zero mode Enable" "Disabled,Enabled"
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bitfld.long 0x00 2. " DP1 ,L1 Dside prefetch Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 1. " PH2 ,L2 prefetch hint Enable" "Disabled,Enabled"
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bitfld.long 0x00 0. " FW ,Cache and TLB maintenance broadcast" "Disabled,Enabled"
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group.long c15:0x201++0x0
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line.long 0x0 "CPACR,Coprocessor Access Control Register"
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bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes"
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bitfld.long 0x0 30. " D32DIS ,Disable use of D16-D31 of the VFP register file" "No,Yes"
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bitfld.long 0x0 22.--23. " CP11 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
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textline " "
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bitfld.long 0x0 20.--21. " CP10 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
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textline " "
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group.long c15:0x11++0x0
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line.long 0x0 "SCR,Secure Configuration Register"
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bitfld.long 0x00 6. " nET ,Not early termination" "Not early,Early"
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bitfld.long 0x00 5. " AW ,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed"
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bitfld.long 0x00 4. " FW ,FW-bit controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed"
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textline " "
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bitfld.long 0x00 3. " EA ,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor"
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bitfld.long 0x00 2. " FIQ ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor"
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bitfld.long 0x00 1. " IRQ ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor"
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textline " "
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bitfld.long 0x00 0. " NS ,Secure mode " "Secure,Non-secure"
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group.long c15:0x111++0x0
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line.long 0x0 "SDER,Secure Debug Enable Register"
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bitfld.long 0x00 1. " SUNIDEN ,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted"
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bitfld.long 0x00 0. " SUIDEN ,Invasive Secure User Debug Enable bit" "Denied,Permitted"
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group.long c15:0x0211++0x00
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line.long 0x00 "NSACR,Non-Secure Access Control Register"
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bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writable in Non-secure state" "Disabled,Enabled"
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bitfld.long 0x00 17. " TL ,Lockable Page Table Entries Allocation in Nonsecure World" "Denied,Permitted"
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bitfld.long 0x00 16. " PLE ,NS accesses to the Preload Engine resources control" "Secure,Non-secure"
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textline " "
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bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes"
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bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register" "No,Yes"
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bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Nonsecure World Access Permission" "Denied,Permitted"
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textline " "
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bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Nonsecure World Access Permission" "Denied,Permitted"
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group.long c15:0x0311++0x00
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line.long 0x00 "VCR,Virtualization Control Register"
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bitfld.long 0x00 8. " AMO ,Abort Mask Override" "0,1"
|
|
bitfld.long 0x00 7. " IMO ,IRQ Mask Override" "0,1"
|
|
bitfld.long 0x00 6. " IFO ,FIQ Mask Override" "0,1"
|
|
group.long c15:0xf++0x0
|
|
line.long 0x00 "PCR,Power Control Register"
|
|
bitfld.long 0x00 8.--10. " MCL ,Max Clock Latency" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EDCG ,Enable Dynamic Clock Gating" "Disabled,Enabled"
|
|
textline " "
|
|
group.long c15:0x000c++0x00
|
|
line.long 0x00 "VBAR,Secure or Nonsecure Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " VBA ,Base Address"
|
|
group.long c15:0x10c++0x00
|
|
line.long 0x0 "MVBAR,Monitor Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " MVBA , Monitor Vector Base Address"
|
|
rgroup.long c15:0x1C++0x0
|
|
line.long 0x0 "ISR,Interrupt status Register"
|
|
bitfld.long 0x0 8. " A ,Pending External Abort" "Not pending,Pending"
|
|
bitfld.long 0x0 7. " I ,Pending IRQ" "Not pending,Pending"
|
|
bitfld.long 0x0 6. " F ,Pending FIQ" "Not pending,Pending"
|
|
group.long c15:0x11c++0x0
|
|
line.long 0x00 "VIR,Virtualization Interrupt Register"
|
|
bitfld.long 0x00 8. " VA ,Virtual Abort" "0,1"
|
|
bitfld.long 0x00 7. " VI ,Virtual IRQ" "0,1"
|
|
bitfld.long 0x00 6. " VF ,Virtual FIQ" "0,1"
|
|
tree.end
|
|
width 0x0d
|
|
tree "Memory Management Unit"
|
|
group.long c15:0x1++0x0
|
|
line.long 0x0 "SCTLR,Control Register"
|
|
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 27. " NMFI ,DNonmaskable Fast Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big"
|
|
bitfld.long 0x0 14. " RR ,Replacement strategy for caches, BTAC, and micro TLBs" "Random,Round robin"
|
|
textline " "
|
|
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled"
|
|
textline " "
|
|
group.long c15:0x0002++0x00
|
|
line.long 0x00 "TTBR0,Translation Table Base Register 0"
|
|
hexmask.long 0x00 14.--31. 0x4000 " TTB0 ,Translation Table Base Address"
|
|
bitfld.long 0x00 0. 6. " IRGN[1:0] ,Indicates inner cacheability" "Noncacheable,Back/allocated,Through,Back/not allocated"
|
|
bitfld.long 0x00 5. " NOS ,Not Outer Shareable" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Back/allocated,Through,Back/not allocated"
|
|
bitfld.long 0x00 2. " IMP ,Implementation Defined" "0,1"
|
|
bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C ,Cacheable" "Non-cacheable,Cacheable"
|
|
group.long c15:0x0102++0x00
|
|
line.long 0x00 "TTBR1,Translation Table Base Register 1"
|
|
hexmask.long 0x00 14.--31. 0x4000 " TTB1 ,Translation Table Base Address"
|
|
bitfld.long 0x00 0. 6. " IRGN[1:0] ,Indicates inner cacheability" "Noncacheable,Back/allocated,Through,Back/not allocated"
|
|
bitfld.long 0x00 5. " NOS ,Not Outer Shareable" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Back/allocated,Through,Back/not allocated"
|
|
bitfld.long 0x00 2. " IMP ,Implementation Defined" "0,1"
|
|
bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C ,Cacheable" "Non-cacheable,Cacheable"
|
|
group.long c15:0x0202++0x00
|
|
line.long 0x00 "TTBCR,Translation Table Base Control Register"
|
|
bitfld.long 0x00 5. " PD1 ,Page Table Walk on a TLB Miss When Using Translation Table Base Register 1" "Enable,Disable"
|
|
bitfld.long 0x00 4. " PD0 ,Page Table Walk on a TLB Miss When Using Translation Table Base Register 0" "Enable,Disable"
|
|
bitfld.long 0x0 0.--2. " N ,Translation Table Base Register 0 page table boundary size" "Off,0x80000000,0x40000000,0x20000000,0x10000000,0x08000000,0x04000000,0x02000000"
|
|
textline " "
|
|
group.long c15:0x3--0x3
|
|
line.long 0x0 "DACR,Domain Access Control Register"
|
|
bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 11. " RW ,Access Caused an Abort Type" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
|
|
bitfld.long 0x00 0.--3. 10. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
|
|
group.long c15:0x0006++0x00
|
|
line.long 0x00 "DFAR,Data Fault Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " DFA ,Data Fault Address"
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. " SD ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 0.--3. 10. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
|
|
group.long c15:0x0206++0x00
|
|
line.long 0x00 "IFAR,Instruction Fault Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " IFA ,Instruction Fault Address"
|
|
group.long c15:0x0015++0x00
|
|
line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register"
|
|
hexmask.long 0x00 0.--31. 1. " DAFS ,Data Auxiliary Fault Status"
|
|
group.long c15:0x0115++0x00
|
|
line.long 0x00 "AIFSR,AuxiliaryInstruction Fault Status Register"
|
|
hexmask.long 0x00 0.--31. 1. " IAFS ,Instruction Auxiliary Fault Status"
|
|
textline " "
|
|
group.long c15:0xa++0x0
|
|
line.long 0x0 "TLBLR,TLB Lockdown Register"
|
|
bitfld.long 0x0 28.--29. " VICTIM ,Victim Value Increments after Each Tabel Walk" "0,1,2,3"
|
|
bitfld.long 0x0 0. " P ,Lockdown by Victim or Set Associative Region of TLB" "Associative,Lockdown"
|
|
group.long c15:0x0047++0x00
|
|
line.long 0x00 "PAR,PA Register"
|
|
hexmask.long 0x00 12.--31. 0x1000 " PA ,Physical Adress"
|
|
bitfld.long 0x00 10. " NOS ,Not Outer Shareable attribute" "Outer shareable,Not outer shareable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " NS ,Non-secure" "Not secured,Secured"
|
|
bitfld.long 0x00 7. " SH ,Shareable attribute" "Non-shareable,Shareable"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " Inner ,Signals region inner attributes" "Noncacheable,Strongly-ordered,Reserved,Device,Reserved,Write-back allocate,Write-through,Write-back"
|
|
bitfld.long 0x00 2.--3. " Outer ,Signals region outer attributes for normal memory type" "Noncacheable,Write-back allocate,Write-through,Write-back"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SS ,Supersection Enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " F ,Translation Successful" "Successful,No successful"
|
|
textline " "
|
|
group.long c15:0x002A++0x0
|
|
line.long 0x00 "PRRR,Primary Region Remap Register"
|
|
bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attribute 7" "Outer,Inner"
|
|
bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attribute 6" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attribute 5" "Outer,Inner"
|
|
bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attribute 4" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attribute 3" "Outer,Inner"
|
|
bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attribute 2" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attribute 1" "Outer,Inner"
|
|
bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attribute 0" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 19. " NS1 ,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped"
|
|
bitfld.long 0x00 18. " NS0 ,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DS1 ,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped"
|
|
bitfld.long 0x00 16. " DS0 ,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " TR7 ,{TEX[0] C B} = b111 Remap" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 12.--13. " TR6 ,{TEX[0] C B} = b110 Remap" "Strongly ordered,Device,Normal,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " TR5 ,{TEX[0] C B} = b101 Remap" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 8.--9. " TR4 ,{TEX[0] C B} = b100 Remap" "Strongly ordered,Device,Normal,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " TR3 ,{TEX[0] C B} = b011 Remap" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 4.--5. " TR2 ,{TEX[0] C B} = b010 Remap" "Strongly ordered,Device,Normal,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TR1 ,{TEX[0] C B} = b001 Remap" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 0.--1. " TR0 ,{TEX[0] C B} = b000 Remap" "Strongly ordered,Device,Normal,?..."
|
|
group.long c15:0x012A++0x0
|
|
line.long 0x00 "NMRR,Normal Memory Remap Register"
|
|
bitfld.long 0x00 30.--31. " OR7 ,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 28.--29. " OR6 ,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " OR5 ,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 24.--25. " OR4 ,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " OR3 ,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 20.--21. " OR2 ,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " OR1 ,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 16.--17. " OR0 ,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " IR7 ,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 12.--13. " IR6 ,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " IR5 ,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 8.--9. " IR4 ,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " IR3 ,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 4.--5. " IR2 ,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " IR1 ,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 0.--1. " IR0 ,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
group.long c15:0x400f++0x0
|
|
line.long 0x00 "CBAR,Configuration Base Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " CBA ,Configuration Base Address"
|
|
textline " "
|
|
rgroup.long c15:0x000d++0x00
|
|
line.long 0x00 "FCSEIDR,FCSE PID Register"
|
|
hexmask.long.byte 0x00 25.--31. 0x02 " PID ,Process for Fast Context Switch Identification and Specification"
|
|
group.long c15:0x10d++0x0
|
|
line.long 0x0 "CONTEXTIDR,Context ID Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. " PROCID ,Process ID"
|
|
hexmask.long.byte 0x0 0.--7. 1. " ASID ,Application Space ID"
|
|
group.long c15:0x020d++0x00
|
|
line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " TPIDRURW ,User Read/Write Thread ID"
|
|
group.long c15:0x030d++0x00
|
|
line.long 0x00 "TPIDRURO,User Read-only Thread ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " TPIDRURO ,User Read-only Thread ID"
|
|
group.long c15:0x040d++0x00
|
|
line.long 0x00 "TPIDRPRW,Privileged Only Thread ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " TPIDRPRW ,Privileged Only Thread ID"
|
|
tree.end
|
|
width 0xC
|
|
tree "Cache Control and Configuration"
|
|
rgroup.long c15:0x1100++0x0
|
|
line.long 0x0 "CLIDR,Cache Level ID Register"
|
|
bitfld.long 0x00 27.--29. " LOU ,Level of Unification" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
|
|
bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
|
|
textline " "
|
|
bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
|
|
bitfld.long 0x00 18.--20. " CType7 ,Cache type for levels 7" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. " CType6 ,Cache type for levels 6" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
bitfld.long 0x00 12.--14. " CType5 ,Cache type for levels 5" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " CType4 ,Cache type for levels 4" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
bitfld.long 0x00 6.--8. " CType3 ,Cache type for levels 3" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " CType2 ,Cache type for levels 2" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
bitfld.long 0x00 0.--2. " CType1 ,Cache type for levels 1" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
rgroup.long c15:0x1000++0x0
|
|
line.long 0x0 "CCSIDR,Current Cache Size ID Register"
|
|
bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported"
|
|
bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported"
|
|
bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported"
|
|
textline " "
|
|
hexmask.long.word 0x00 13.--27. 1. " SETS ,Number of Sets"
|
|
hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words"
|
|
group.long c15:0x2000++0x0
|
|
line.long 0x0 "CSSELR,Cache Size Selection Register"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Level" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
|
|
bitfld.long 0x00 0. " IND ,Instruction/Not Data" "Data,Instruction"
|
|
tree.end
|
|
width 12.
|
|
tree "System Performance Monitor"
|
|
group.long c15:0xC9++0x0
|
|
line.long 0x0 "PMCR,Performance Monitor Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code"
|
|
hexmask.long.byte 0x00 16.--23. 1. " IDCODE ,Identification code"
|
|
bitfld.long 0x00 11.--15. " N ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. " DP ,Disable CCNT when prohibited" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " X ,Export Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " D ,Clock Divider" "Every cycle,64th cycle"
|
|
bitfld.long 0x00 2. " C ,Clock Counter Reset" "No action,Reset"
|
|
bitfld.long 0x00 1. " P ,Performance Counter Reset" "No action,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " E ,Counters Enable" "Disabled,Enabled"
|
|
group.long c15:0x1C9++0x0
|
|
line.long 0x0 "PMCNTENSET,Count Enable Set Register"
|
|
bitfld.long 0x00 31. " C ,CCNT Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,PMN5 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,PMN5 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " P3 ,PMN3 Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2 ,PMN2 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,PMN1 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,PMN0 Enabled" "Disabled,Enabled"
|
|
group.long c15:0x2C9++0x0
|
|
line.long 0x0 "PMCNTENCLR,Count Enable Clear Register"
|
|
bitfld.long 0x00 31. " C ,CCNT Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,PMN5 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,PMN5 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " P3 ,PMN3 Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2 ,PMN2 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,PMN1 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,PMN0 Enabled" "Disabled,Enabled"
|
|
group.long c15:0x3C9++0x0
|
|
line.long 0x0 "PMOVSR,Overflow Flag Status Register"
|
|
eventfld.long 0x00 31. " C ,CCNT overflowed" "No overflow,Overflow"
|
|
eventfld.long 0x00 5. " P5 ,PMN5 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 4. " P4 ,PMN5 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 3. " P3 ,PMN3 overflow" "No overflow,Overflow"
|
|
textline " "
|
|
eventfld.long 0x00 2. " P2 ,PMN2 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 1. " P1 ,PMN1 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 0. " P0 ,PMN0 overflow" "No overflow,Overflow"
|
|
group.long c15:0x4C9++0x0
|
|
line.long 0x0 "PMSWINC,Software Increment Register"
|
|
eventfld.long 0x00 5. " P5 ,Increment PMN2" "No action,Increment"
|
|
eventfld.long 0x00 4. " P4 ,Increment PMN1" "No action,Increment"
|
|
eventfld.long 0x00 3. " P3 ,Increment PMN3" "No action,Increment"
|
|
eventfld.long 0x00 2. " P2 ,Increment PMN2" "No action,Increment"
|
|
textline " "
|
|
eventfld.long 0x00 1. " P1 ,Increment PMN1" "No action,Increment"
|
|
eventfld.long 0x00 0. " P0 ,Increment PMN0" "No action,Increment"
|
|
group.long c15:0x5C9++0x0
|
|
line.long 0x0 "PMSELR,Performance Counter Selection Register"
|
|
bitfld.long 0x00 0.--5. " SEL ,Selection value" "CNT0,CNT1,CNT2,CNT3,CNT4,CNT5,?..."
|
|
group.long c15:0xD9++0x0
|
|
line.long 0x00 "PMCCNTR,Cycle Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCNT ,Cycle Count"
|
|
group.long c15:0x01d9++0x00
|
|
line.long 0x00 "PMXEVTYPER,Event Type Select Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " EVCNT ,Event to count"
|
|
group.long c15:0x02d9++0x00
|
|
line.long 0x00 "PMXEVCNTR,Event Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " PMNX ,Event Count"
|
|
group.long c15:0xE9++0x0
|
|
line.long 0x0 "PMUSERENR,User Enable Register"
|
|
bitfld.long 0x00 0. " EN ,User Mode Enable" "Disabled,Enabled"
|
|
group.long c15:0x1E9++0x0
|
|
line.long 0x0 "PMINTENSET,Interrupt Enable Set Register"
|
|
bitfld.long 0x00 31. " C ,CCNT Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
group.long c15:0x2E9++0x0
|
|
line.long 0x0 "PMINTENCLR,Interrupt Enable Clear Register"
|
|
eventfld.long 0x00 31. " C ,CCNT Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 8.
|
|
tree "Preload Engine"
|
|
rgroup.long c15:0x000b++0x00
|
|
line.long 0x00 "PLEIDR,PLE ID Register"
|
|
bitfld.long 0x00 16.--20. " FIFOS ,PLE FIFO size" "Not present,Reserved,Reserved,Reserved,4,Reserved,Reserved,Reserved,8,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16,?..."
|
|
bitfld.long 0x00 0. " PEP ,Preload Engine presence" "Not present,Present"
|
|
rgroup.long c15:0x020b++0x00
|
|
line.long 0x00 "PLEASR,PLE Activity Status Register"
|
|
bitfld.long 0x00 0. " R ,PLE Channel running" "Not running,Running"
|
|
rgroup.long c15:0x040b++0x00
|
|
line.long 0x00 "PLEFSR,PLE FIFO Status Register"
|
|
bitfld.long 0x00 0.--4. " AE ,Number of available entries in the PLE FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long c15:0x001b++0x00
|
|
line.long 0x00 "PLEUAR,Preload Engine User Accessibility Register"
|
|
bitfld.long 0x00 0. " U ,User accessibility" "Not permited,Permited"
|
|
group.long c15:0x011b++0x00
|
|
line.long 0x00 "PLEPCR,Preload Engine Parameters Control Register"
|
|
hexmask.long.word 0x00 16.--29. 1. " BSM ,Block size mask"
|
|
hexmask.long.byte 0x00 8.--15. 1. " BNM ,Block number mask"
|
|
hexmask.long.byte 0x00 0.--7. 1. " WS ,PLE wait states"
|
|
tree.end
|
|
tree "NEON"
|
|
rgroup.long c15:0x000f++0x00
|
|
line.long 0x00 "NEON,NEON busy Register"
|
|
bitfld.long 0x00 0. " Busy ,NEON busy" "Not busy,Busy"
|
|
tree.end
|
|
width 0xb
|
|
width 9.
|
|
tree "Debug Registers"
|
|
tree "Jazelle Register"
|
|
group.long c14:0x7000++0x0
|
|
line.long 0x00 "JIDR,Jazelle ID Register"
|
|
bitfld.long 0x00 28.--31. " ARCH ,Architecture code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 20.--27. 1. " DESIGN ,Implementor code of the designer of the subarchitecture"
|
|
textline " "
|
|
hexmask.long.byte 0x00 12.--19. 1. " SAMAJ ,The subarchitecture code"
|
|
bitfld.long 0x00 8.--11. " SAMIN ,The subarchitecture minor code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TRTBFR ,Format of the Jazelle Configurable Opcode Translation Table Register" "0,1"
|
|
bitfld.long 0x00 0.--5. " TRTBSZ ,Size of the Jazelle Configurable Opcode Translation Table Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long c14:0x7001++0x0
|
|
line.long 0x00 "JOSCR,Jazelle OS Control Register"
|
|
bitfld.long 0x00 1. " CV ,Configuration Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 0. " CD ,Configuration Disabled" "No,Yes"
|
|
group.long c14:0x7002++0x0
|
|
line.long 0x00 "JMCR,Jazelle Main Configuration Register"
|
|
bitfld.long 0x00 31. " nAR ,Not Array Operations" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " FP ,Floating-point opcodes handler" "VM implementation,VFP instructions"
|
|
bitfld.long 0x00 29. " AP ,Array Pointer" "Handler,Pointer"
|
|
textline " "
|
|
bitfld.long 0x00 28. " OP ,Object Pointer" "Handler,Pointer"
|
|
bitfld.long 0x00 27. " IS ,Index Size" "8 bits,16 bits"
|
|
bitfld.long 0x00 26. " SP ,Static Pointer" "Handler,Pointer"
|
|
textline " "
|
|
bitfld.long 0x00 0. " JE ,Jazelle Enable" "Disabled,Enabled"
|
|
group.long c14:0x7003++0x0
|
|
line.long 0x00 "JPR,Jazelle Parameters Register"
|
|
bitfld.long 0x00 17.--21. " BSH ,Bounds SHift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 12.--16. " sADO ,Signed Array Descriptor Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--11. " ARO ,Array Reference Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " STO ,STatic Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " ODO ,Object Descriptor Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long c14:0x7004++0x0
|
|
line.long 0x00 "JCOTTRR,Jazelle Configurable Opcode Translation Table Register"
|
|
bitfld.long 0x00 10.--15. " OPCODE ,Bottom bits of the configurable opcode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--3. " OPERATION ,Code for the operation" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
tree.end
|
|
width 11.
|
|
tree "Processor Identifier Registers"
|
|
rgroup c14:0x340--0x340
|
|
line.long 0x00 "CPUID,Main ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
|
|
hexmask.long.byte 0x0 20.--23. 0x1 " SPECREV ,Variant number"
|
|
textline " "
|
|
hexmask.long.byte 0x0 16.--19. 0x1 " ARCH , Architecture"
|
|
hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number"
|
|
textline " "
|
|
hexmask.long.byte 0x0 0.--3. 0x1 " REV ,Layout Revision"
|
|
rgroup c14:0x341--0x341
|
|
line.long 0x00 "CACHETYPE,Cache Type Register"
|
|
bitfld.long 0x0 29.--31. " FORMAT ,Format" "Not ARMv7,Not ARMv7,Not ARMv7,Not ARMv7,ARMv7,Not ARMv7,Not ARMv7,Not ARMv7"
|
|
bitfld.long 0x0 24.--27. " CWG ,Cache Writeback Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x0 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. " DMinLine ,Words of Smallest Line Length in L1 or L2 Data Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " L1_Ipolicy ,VIPT Instruction Cache Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " IMinLine ,Words of Smallest Line Length in L1 or L2 Instruction Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..."
|
|
rgroup c14:0x343--0x343
|
|
line.long 0x00 "TLBTYPE,TLB Type Register"
|
|
hexmask.long.byte 0x0 16.--23. 0x1 " ILsize ,Specifies the number of instruction TLB lockable entries"
|
|
hexmask.long.byte 0x0 8.--15. 0x1 " DLsize ,Specifies the number of unified or data TLB lockable entries"
|
|
textline " "
|
|
bitfld.long 0x0 1. " TLB_size ,TLB Size" "64,128"
|
|
bitfld.long 0x0 0. " U ,Unified or separate instruction TLBs" "Unified,Separate"
|
|
rgroup c14:0x348--0x348
|
|
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 12.--15. " State3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " State2 ,Java Extension Interface Support" "Not supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " State1 ,Thumb Encoding Supported by the Processor Type" "Not supported,Supported,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " State0 ,ARM Instruction Set Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x349--0x349
|
|
line.long 0x00 "ID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Not supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x34a--0x34a
|
|
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Not supported,Reserved,Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,Reserved,Reserved,v6.1,v7,?..."
|
|
bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Not supported,Reserved,v6,v6.1,v7,?..."
|
|
rgroup c14:0x34c--0x34c
|
|
line.long 0x00 "ID_MMFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " ISB ,Innermost shareability bits" "Non-cacheable,Hardware coherency,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored"
|
|
bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " ARS ,Auxiliary Registers Support" "Not supported,Control only,Fault status and Control,?..."
|
|
bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,IMPLEMENTATION DEFINED,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SLS ,Shareability levels Support" "One level,Two levels,?..."
|
|
bitfld.long 0x00 8.--11. " OSS ,Outermost shareability Support" "Non-cacheable,Supported,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,IMPLEMENTATION DEFINED,PMSAv6,PMSAv7,?..."
|
|
bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Not supported,IMPLEMENTATION DEFINED,VMSAv6,VMSAv7,?..."
|
|
rgroup c14:0x34d--0x34d
|
|
line.long 0x00 "ID_MMFR1,Processor Feature Register 1"
|
|
bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Disabled,Required,Required,Required,Not required,?..."
|
|
bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
|
|
rgroup c14:0x34e--0x34e
|
|
line.long 0x00 "ID_MMFR2,Processor Feature Register 2"
|
|
bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x34f--0x34f
|
|
line.long 0x00 "ID_MMFR3,Processor Feature Register 3"
|
|
bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,?..."
|
|
bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MB ,Invalidate broadcast Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Reserved,Supported,?..."
|
|
rgroup c14:0x350--0x350
|
|
line.long 0x00 "ID_ISAR0,ISA Feature Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x351--0x351
|
|
line.long 0x00 "ID_ISAR1,ISA Feature Register 1"
|
|
bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " INTI ,Interwork Instructions Support" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Not supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x352--0x352
|
|
line.long 0x00 "ID_ISAR2,ISA Feature Register 2"
|
|
bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x353--0x353
|
|
line.long 0x00 "ID_ISAR3,ISA Feature Register 3"
|
|
bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x354--0x354
|
|
line.long 0x00 "ID_ISAR4,ISA Feature Register 4"
|
|
bitfld.long 0x00 28.--31. " SWP_frac ,SWAP_frac" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Not supported,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Not supported,Supported,Supported,?..."
|
|
tree.end
|
|
tree "Coresight Management Registers"
|
|
width 0xC
|
|
textline " "
|
|
group c14:0x3c0--0x3c0
|
|
line.long 0x0 "ITCTRL,Integration Mode Control Register"
|
|
bitfld.long 0x0 0. " IME ,Integration Mode Enable" "Disabled,Enabled"
|
|
group c14:0x3e8--0x3e8
|
|
line.long 0x0 "CLAIMSET,Claim Tag Set Register"
|
|
bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Set"
|
|
bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Set"
|
|
bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Set"
|
|
bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Set"
|
|
bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Set"
|
|
group c14:0x3e9--0x3e9
|
|
line.long 0x0 "CLAIMCLR,Claim Tag Clear Register"
|
|
bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Cleared"
|
|
bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Cleared"
|
|
bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Cleared"
|
|
bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Cleared"
|
|
bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Cleared"
|
|
wgroup c14:0x3ec--0x3ec
|
|
line.long 0x0 "LAR,Lock Access Register"
|
|
hexmask.long.long 0x0 0.--31. 1. " LACK ,Lock Access Control Key"
|
|
rgroup c14:0x3ed--0x3ed
|
|
line.long 0x0 "LSR,Lock Status Register"
|
|
bitfld.long 0x0 2. " 32ACND ,32-bit Access Needed" "Needed,Not needed"
|
|
bitfld.long 0x0 1. " WLCK ,Writes Lock" "Permitted,Ignored"
|
|
textline " "
|
|
bitfld.long 0x0 0. " LI ,Lock Implementation" "Lock ignored,Unlock required"
|
|
width 0xc
|
|
rgroup c14:0x3ee--0x3ee
|
|
line.long 0x0 "AUTHSTATUS,Authentication Status Register"
|
|
bitfld.long 0x0 7. " SNIDFI ,Secure Non-invasive Debug Features Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 6. " SNIDE ,Secure Non-invasive Debug Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " SIDFI ,Secure Invasive Debug Feauter Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 4. " SIDE ,Secure Invasive Debug Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " NSNIDFI ,Non-secure Non-invasive Debug Feature Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 2. " NSNIDE ,Non-secure Non-invasive Debug Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " NSIDFI ,Non-secure Invasive Debug Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 0. " NSIDE ,Non-secure Invasive Debug Enable" "Disabled,Enabled"
|
|
width 0xc
|
|
rgroup c14:0x3f2--0x3f2
|
|
line.long 0x0 "DEVID,Device Identifier"
|
|
bitfld.long 0x00 0.--3. " PCSAMPLE ,Level of Program Counter sampling support (DBGPCSR and DBGCIDSR)" "Not implemented,DBGPCSR,Both,?..."
|
|
rgroup c14:0x3f3--0x3f3
|
|
line.long 0x0 "DEVTYPE,Device Type"
|
|
hexmask.long.byte 0x0 4.--7. 1. " STPC ,Sub Type: Processor Core"
|
|
hexmask.long.byte 0x0 0.--3. 1. " MCDL ,Main Class: Debug Logic"
|
|
rgroup c14:0x3f8--0x3f8
|
|
line.long 0x0 "PID0,Peripherial ID0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PN ,Part Number [7:0]"
|
|
rgroup c14:0x3f9--0x3f9
|
|
line.long 0x0 "PID1,Peripherial ID1"
|
|
hexmask.long.byte 0x0 4.--7. 1. " JEP106 ,JEP106 Identity Code [3:0]"
|
|
hexmask.long.byte 0x0 0.--3. 1. " PN ,Part Number [11:8]"
|
|
rgroup c14:0x3fa--0x3fa
|
|
line.long 0x0 "PID2,Peripherial ID2"
|
|
hexmask.long.byte 0x0 4.--7. 1. " REV ,Revision"
|
|
bitfld.long 0x00 3. " JEPCD ,JEP 106 ID code" "Not used,Used"
|
|
textline " "
|
|
hexmask.long.byte 0x0 0.--2. 1. " JEP106 ,JEP106 Identity Code [6:4]"
|
|
rgroup c14:0x3fb--0x3fb
|
|
line.long 0x0 "PID3,Peripherial ID3"
|
|
hexmask.long.byte 0x0 4.--7. 1. " REVA ,RevAnd"
|
|
hexmask.long.byte 0x0 0.--3. 1. " CMOD ,Customer Modified"
|
|
rgroup c14:0x3f4--0x3f4
|
|
line.long 0x0 "PID4,Peripherial ID4"
|
|
bitfld.long 0x0 4.--7. " 4KBC ,Number of 4KB Blocks Occupied" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
bitfld.long 0x0 0.--3. " JEP106 ,JEP106 Continuation Code" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
rgroup c14:0x3fc--0x3fc
|
|
line.long 0x0 "COMPONENTID0,Component ID0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble"
|
|
rgroup c14:0x3fd--0x3fd
|
|
line.long 0x0 "COMPONENTID1,Component ID1"
|
|
hexmask.long.byte 0x0 4.--7. 1. " CCLASS ,Component Class (CoreSight Component)"
|
|
hexmask.long.byte 0x0 0.--3. 1. " PRBL ,Preamble"
|
|
rgroup c14:0x3fe--0x3fe
|
|
line.long 0x0 "COMPONENTID2,Component ID2"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble"
|
|
rgroup c14:0x3ff--0x3ff
|
|
line.long 0x0 "COMPONENTID3,Component ID3"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble"
|
|
tree.end
|
|
textline " "
|
|
width 0x7
|
|
rgroup c14:0x000--0x000
|
|
line.long 0x0 "DIDR,Debug ID Register"
|
|
bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 20.--23. " CTX_CMP ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " Version ,Debug Architecture Version" "Reserved,ARMv6,ARMv6.1,ARMv7,ARMv7 no ext.,?..."
|
|
textline " "
|
|
bitfld.long 0x0 15. " DEVID_IMP ,Debug Device ID Register DBGDEVID implemented" "Not implemented,Implemented"
|
|
bitfld.long 0x0 14. " NSUHD_IMP ,Secure User halting debug implemented" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x0 13. " PCSR_IMP ,Program Counter Sampling Register implemented" "Not implemented,Implemented"
|
|
bitfld.long 0x0 12. " SE_IMP ,Security Extensions implemented" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x0 4.--7. " Variant ,Implementation-defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 0.--3. " Revision ,Implementation-defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 0x7
|
|
group c14:0x22--0x22
|
|
line.long 0x0 "DSCR,Debug Status and Control Register"
|
|
bitfld.long 0x0 30. " DTRRXfull ,The DTRRX Full Flag" "Empty,Full"
|
|
bitfld.long 0x0 29. " DTRTXfull ,The DTRTX Full Flag" "Empty,Full"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DTRRXfull_l ,The DTRRX Full Flag 1" "Empty,Full"
|
|
bitfld.long 0x00 26. " DTRTXfull_l ,The DTRTX Full Flag 1" "Empty,Full"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PIPEADV ,Sticky Pipeline Advance" "No effect,Instruction retired"
|
|
bitfld.long 0x0 24. " INSTRCOMPL_L ,Latched Instruction Complete" "Executing,Not executing"
|
|
textline " "
|
|
bitfld.long 0x0 20.--21. " EXTDCCMODE ,External DCC access mode" "Non-blocking,Stall,Fast,?..."
|
|
bitfld.long 0x0 19. " ADADISCARD ,Asynchronous Data Aborts Discarded" "Not discarded,Discarded"
|
|
textline " "
|
|
bitfld.long 0x0 18. " NS ,Non-secure World Status" "Secured,Not secured"
|
|
bitfld.long 0x0 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disabled" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 16. " SPIDDIS ,Secure Privileged Invasive Debug Disabled" "No,Yes"
|
|
bitfld.long 0x0 15. " MDBGEN ,Monitor Debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 14. " HDEn ,Halting Debug-mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 12. " UDCCDIS ,User mode access to Comms Channel disable" "No,Yes"
|
|
bitfld.long 0x0 11. " IntDis ,Disable Interrupts" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 10. " DbgAck ,Force Debug Acknowledge" "Not forced,Forced"
|
|
bitfld.long 0x0 8. " UND_l ,Sticky Undefined Instruction" "No exception,Exception"
|
|
textline " "
|
|
bitfld.long 0x0 7. " ADABORT_l ,Sticky Asynchronous Data Abort" "Not aborted,Aborted"
|
|
bitfld.long 0x0 6. " SDABORT_l ,Sticky Synchronous Data Abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x0 2.--5. " MOE ,Method of Debug Entry" "Halt request,Breakpoint,Asynchronous Watchpoint,BKPT instruction,External debug,Vector catch,Reserved,Reserved,OS Unlock,Reserved,Synchronous Watchpoint,?..."
|
|
bitfld.long 0x0 1. " RESTARTED ,Core Restarted" "Debug not exited,Debug exited"
|
|
textline " "
|
|
bitfld.long 0x0 0. " HALTED ,Core Halted" "Normal state,Debug state"
|
|
width 0x7
|
|
if (((data.long(c14:0x00))&0x01000)==0x00000)
|
|
group c14:0x007--0x007
|
|
line.long 0x0 "VCR,Vector Catch Register"
|
|
bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " DABORT ,Vector Catch Enable Data Abort" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled"
|
|
else
|
|
group c14:0x007--0x007
|
|
line.long 0x0 "VCR,Vector Catch Register"
|
|
bitfld.long 0x0 31. " FIQN ,Vector Catch Enable FIQ (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " IRQN ,Vector Catch Enable IRQ (Non-secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 28. " DABORTN ,Vector Catch Enable Data Abort (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 27. " PABORTN ,Vector Catch Enable Prefetch abort (Non-secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 26. " SWIN ,Vector Catch Enable SWI (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. " UNDEFS ,Vector Catch Enable Undefined (Non-secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 15. " FIQS ,Vector Catch Enable FIQ (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " IRQS ,Vector Catch Enable IRQ (Secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 12. " DABORTS ,Vector Catch Enable Data Abort (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PABORTS ,Vector Catch Enable Prefetch abort (Secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " SMI ,Vector Catch Enable SMI (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " DABORT0 ,Vector Catch Enable Data Abort" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled"
|
|
endif
|
|
;rgroup c14:0x1++0x1
|
|
; line.long 0x0 "DRAR,Debug ROM Address Register"
|
|
; hexmask.long 0x0 12.--31. 0x1000 " DBROMPA ,Debug bus ROM physical address"
|
|
; bitfld.long 0x0 0.--1. " VB ,Valid bits" "Not valid,Reserved,Reserved,Valid"
|
|
; line.long 0x4 "DSAR,Debug Self Address Offset Register"
|
|
; hexmask.long 0x4 12.--31. 0x1000 " DBSAOV ,Debug bus self-address offset value"
|
|
; bitfld.long 0x4 0.--1. " VB ,Valid bits" "Not valid,Reserved,Reserved,Valid"
|
|
;hgroup c14:0x50++0x0
|
|
; hide.long 0x0 "DTR,Data Transfer Register"
|
|
; in
|
|
width 0x7
|
|
hgroup c14:0x020--0x020
|
|
hide.long 0x0 "DTRRX,Target -> Host Data Transfer Register"
|
|
in
|
|
group c14:0x023--0x023
|
|
line.long 0x0 "DTRTX,Host -> Target Data Transfer Register"
|
|
hexmask.long 0x00 0.--31. 1. " HTD ,Host -> target data"
|
|
wgroup c14:0x21++0x00
|
|
line.long 0x00 "ITR,Instruction Transfer Register"
|
|
hexmask.long 0x00 0.--31. 1. " Data ,ARM Instruction for the Processor in Debug State Execute"
|
|
wgroup c14:0x24++0x00
|
|
line.long 0x00 "DRCR,Debug Run Control Register"
|
|
bitfld.long 0x00 4. " CBIUR , Cancel Bus Interface Unit Requests" "Not canceled,Canceled"
|
|
bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions" "Not cleared,Cleared"
|
|
bitfld.long 0x00 1. " RR ,Restart Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HR ,Halt Request" "Not requested,Requested"
|
|
rgroup c14:0xc4++0x00
|
|
line.long 0x00 "PRCR,Device Power-Down and Reset Control Register"
|
|
bitfld.long 0x00 2. " HNDLR ,Hold non-debug logic reset" "No reset,Reset"
|
|
bitfld.long 0x00 1. " WRR ,Warm reset request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " NPD ,No Power-Down" "DBGNOPWRDWN low,DBGNOPWRDWN high"
|
|
hgroup c14:0xc5++0x00
|
|
hide.long 0x00 "PRSR,Device Power-Down and Reset Status Register"
|
|
in
|
|
tree.end
|
|
width 6.
|
|
tree "Breakpoint Registers"
|
|
group c14:0x40++0x00
|
|
line.long 0x00 "BVR0,Breakpoint Value Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " BV0 ,Breakpoint Value 0"
|
|
group c14:0x50++0x00
|
|
line.long 0x00 "BCR0,Breakpoint Control Register 0"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x41++0x00
|
|
line.long 0x00 "BVR1,Breakpoint Value Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " BV1 ,Breakpoint Value 1"
|
|
group c14:0x51++0x00
|
|
line.long 0x00 "BCR1,Breakpoint Control Register 1"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x42++0x00
|
|
line.long 0x00 "BVR2,Breakpoint Value Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " BV2 ,Breakpoint Value 2"
|
|
group c14:0x52++0x00
|
|
line.long 0x00 "BCR2,Breakpoint Control Register 2"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x43++0x00
|
|
line.long 0x00 "BVR3,Breakpoint Value Register 3"
|
|
hexmask.long 0x00 0.--31. 1. " BV3 ,Breakpoint Value 3"
|
|
group c14:0x53++0x00
|
|
line.long 0x00 "BCR3,Breakpoint Control Register 3"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x44++0x00
|
|
line.long 0x00 "BVR4,Breakpoint Value Register 4"
|
|
hexmask.long 0x00 0.--31. 1. " BV4 ,Breakpoint Value 4"
|
|
group c14:0x54++0x00
|
|
line.long 0x00 "BCR4,Breakpoint Control Register 4"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x45++0x00
|
|
line.long 0x00 "BVR5,Breakpoint Value Register 5"
|
|
hexmask.long 0x00 0.--31. 1. " BV5 ,Breakpoint Value 5"
|
|
group c14:0x55++0x00
|
|
line.long 0x00 "BCR5,Breakpoint Control Register 5"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 6.
|
|
tree "Watchpoint Control Registers"
|
|
group c14:0x60++0x00
|
|
line.long 0x00 "WVR0,Watchpoint Value Register 0"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA0 ,Watchpoint Address 0"
|
|
group c14:0x70--0x70
|
|
line.long 0x0 "WCR0,Watchpoint Control Register 0"
|
|
bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x61++0x00
|
|
line.long 0x00 "WVR1,Watchpoint Value Register 1"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA1 ,Watchpoint Address 1"
|
|
group c14:0x71--0x71
|
|
line.long 0x0 "WCR1,Watchpoint Control Register 1"
|
|
bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x62++0x00
|
|
line.long 0x00 "WVR2,Watchpoint Value Register 2"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA2 ,Watchpoint Address 2"
|
|
group c14:0x72--0x72
|
|
line.long 0x0 "WCR2,Watchpoint Control Register 2"
|
|
bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x63++0x00
|
|
line.long 0x00 "WVR3,Watchpoint Value Register 3"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA3 ,Watchpoint Address 3"
|
|
group c14:0x73--0x73
|
|
line.long 0x0 "WCR3,Watchpoint Control Register 3"
|
|
bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x006--0x006
|
|
line.long 0x0 "WFAR,Watchpoint Fault Address Register"
|
|
hexmask.long 0x00 1.--31. 0x02 " WFAR ,Address of the watchpointed instruction"
|
|
tree.end
|
|
width 0xb
|
|
width 9.
|
|
base ad:(d.l(c15:0x400f))
|
|
tree "Snoop Control Unit (SCU)"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SCUCR,SCU Control Register"
|
|
bitfld.long 0x00 6. " ICSE ,IC standby enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SCUSE ,SCU standby enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " FADTP0E ,Force all Device to port0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SCUSLE ,SCU Speculative linefills enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SCURPE ,SCU RAMs Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " AFE ,Address filtering enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SCUE ,SCU enable" "Disabled,Enabled"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "SCUCON,SCU Configuration Register"
|
|
bitfld.long 0x00 14.--15. " RAM3 ,Cortex-A9 CPU3 Tag RAM Size" "16KB,32KB,64KB,?..."
|
|
bitfld.long 0x00 12.--13. " RAM2 ,Cortex-A9 CPU2 Tag RAM Size" "16KB,32KB,64KB,?..."
|
|
bitfld.long 0x00 10.--11. " RAM1 ,Cortex-A9 CPU1 Tag RAM Size" "16KB,32KB,64KB,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " RAM0 ,Cortex-A9 CPU0 Tag RAM Size" "16KB,32KB,64KB,?..."
|
|
bitfld.long 0x00 7. " MOD3 ,CPU3 Mode" "AMP,SMP"
|
|
bitfld.long 0x00 6. " MOD2 ,CPU2 Mode" "AMP,SMP"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MOD1 ,CPU1 Mode" "AMP,SMP"
|
|
bitfld.long 0x00 4. " MOD0 ,CPU0 Mode" "AMP,SMP"
|
|
bitfld.long 0x00 0.--1. " NUM ,CPU Number" "CPU0,CPU0-CPU1,CPU0-CPU2,CPU0-CPU3"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SCUSTAT,SCU CPU Power Status Register"
|
|
bitfld.long 0x00 24.--25. " STAT3 ,CPU3 Status" "Normal,Reserved,Dormant,Powered-off"
|
|
bitfld.long 0x00 16.--17. " STAT2 ,CPU2 Status" "Normal,Reserved,Dormant,Powered-off"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " STAT1 ,CPU1 Status" "Normal,Reserved,Dormant,Powered-off"
|
|
bitfld.long 0x00 0.--1. " STAT0 ,CPU0 Status" "Normal,Reserved,Dormant,Powered-off"
|
|
wgroup.long 0x0c++0x03
|
|
line.long 0x00 "INV,SCU Invalidate All Register"
|
|
bitfld.long 0x00 12.--15. " WAY3 ,Cortex-A9 CPU3 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " WAY2 ,Cortex-A9 CPU2 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " WAY1 ,Cortex-A9 CPU1 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " WAY0 ,Cortex-A9 CPU0 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "FSAR,Filtering Start Address Register"
|
|
hexmask.long.word 0x00 20.--31. 0x10 " FSA ,Filtering start address"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "FEAR,Filtering End Address Register"
|
|
hexmask.long.word 0x00 20.--31. 0x10 " FEA ,Filtering end address"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "SAC,SCU Access Control Register"
|
|
bitfld.long 0x00 3. " CPU3 ,CPU3 Access the SAC" "No access,Access"
|
|
bitfld.long 0x00 2. " CPU2 ,CPU2 Access the SAC" "No access,Access"
|
|
bitfld.long 0x00 1. " CPU1 ,CPU1 Access the SAC" "No access,Access"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CPU0 ,CPU0 Access the SAC" "No access,Access"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "SSAC,SCU Secure Access Control Register"
|
|
bitfld.long 0x00 11. " GCPU3 ,Global timer for CPU3" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 10. " GCPU2 ,Global timer for CPU2" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 9. " GCPU1 ,Global timer for CPU1" "Secure only,Secure/Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 8. " GCPU0 ,Global timer for CPU0" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 7. " TCPU3 ,Private timer for CPU3 Access" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 6. " TCPU2 ,Private timer for CPU2 Access" "Secure only,Secure/Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TCPU1 ,Private timer for CPU1 Access" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 4. " TCPU0 ,Private timer for CPU0 Access" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 3. " CPU3 ,CPU3 Access the SAC" "No access,Access"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPU2 ,CPU2 Access the SAC" "No access,Access"
|
|
bitfld.long 0x00 1. " CPU1 ,CPU1 Access the SAC" "No access,Access"
|
|
bitfld.long 0x00 0. " CPU0 ,CPU0 Access the SAC" "No access,Access"
|
|
tree.end
|
|
width 0xb
|
|
width 8.
|
|
tree "Timer and Watchdog Blocks"
|
|
base ad:(d.l(c15:0x400f))+0x600
|
|
group.long 0x00++0xb "Timer"
|
|
line.long 0x00 "TLR,Timer Load Register"
|
|
line.long 0x04 "TCR,Timer Counter Register"
|
|
line.long 0x08 "TCONR,Timer Control Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " PRES ,Prescaler"
|
|
bitfld.long 0x08 2. " IRQEN ,IRQ Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " AREL ,Auto reload" "Single shot,Auto-reload"
|
|
bitfld.long 0x08 0. " TEN ,Global Timer Enable" "Disabled,Enabled"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "TISR,Timer Interrupt Status Register"
|
|
eventfld.long 0x00 0. " EFLAG ,Event Flag" "0,1"
|
|
group.long 0x20++0x13 "Watchdog"
|
|
line.long 0x00 "WLR,Watchdog Load Register"
|
|
line.long 0x04 "WCR,Watchdog Counter Register"
|
|
line.long 0x08 "WCONR,Watchdog Control Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " PRES ,Prescaler"
|
|
bitfld.long 0x08 3. " WDM ,WD Mode" "Timer,Watchdog"
|
|
bitfld.long 0x08 2. " ITEN ,IT Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " AREL ,Auto-Reload" "Single shot,Auto-reload"
|
|
textline " "
|
|
bitfld.long 0x08 0. " WEN ,Watchdog Enable" "Disabled,Enabled"
|
|
line.long 0x0c "WISR,Watchdog Interrupt Status Register"
|
|
eventfld.long 0x0C 0. " EFLAG ,Event Flag" "0,1"
|
|
line.long 0x10 "WRSR,Watchdog Reset Sent Register"
|
|
eventfld.long 0x10 0. " RFLAG ,Reset Flag" "No effect,Reset"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x00 "WDR,Watchdog Disable Register"
|
|
base ad:(d.l(c15:0x400f))+0x200
|
|
group.long 0x00++0xb "Global Timer"
|
|
line.long 0x00 "GTLCR,Lower 32-bit Timer Counter Register"
|
|
line.long 0x04 "GTUCR,Upper 32-bit Timer Counter Register"
|
|
line.long 0x08 "GTCONR,Timer Control Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " PRES ,Prescaler"
|
|
bitfld.long 0x08 3. " AINC ,Auto Increment" "Single shot,Auto increment"
|
|
bitfld.long 0x08 2. " IRQEN ,IRQ Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " COMPEN ,Comp Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " TEN ,Global Timer Enable" "Disabled,Enabled"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "GTSR,Timer Status Register"
|
|
eventfld.long 0x00 0. " EFLAG ,Event Flag" "0,1"
|
|
group.long 0x10++0xb
|
|
line.long 0x00 "GTLCOMR,Lower 32-bit Comparator Register"
|
|
line.long 0x04 "GTUCOMR,Upper 32-bit Comparator Register"
|
|
line.long 0x08 "GTINCR,Auto-increment Register for Comparator"
|
|
tree.end
|
|
width 11.
|
|
tree.open "Interrupt Controller (PL-390)"
|
|
width 17.
|
|
base AD:0xE8201000
|
|
tree "Distributor Interface"
|
|
if (((d.l(AD:0xE8201000+0x04))&0x400)==0x400)
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)"
|
|
bitfld.long 0x00 1. " ENABLEGRP1 ,Global Interrupt Enable Group 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENABLEGRP0 ,Global Interrupt Enable Group 1" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICD_CTLR,Distributor Control Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x400)==0x400)
|
|
rgroup.long 0x0004++0x03
|
|
line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 11.--15. " LSPI ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..."
|
|
bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020"
|
|
else
|
|
rgroup.long 0x0004++0x03
|
|
line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 10. " SECURITYEXTN ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..."
|
|
bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020"
|
|
endif
|
|
rgroup.long 0x0008++0x03
|
|
line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register"
|
|
bitfld.long 0x00 24.--31. " PRODID ,Indicates the product ID" "PL390,PL390,GIC400,GIC400,?..."
|
|
hexmask.long.word 0x00 12.--23. 1. " REV_NUM ,Returns the revision number of the GIC"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer"
|
|
sif CPU.FEATURE(hypervisor)||CPU.FEATURE(secure)
|
|
width 17.
|
|
tree "Group/Security Registers"
|
|
group.long 0x0080++0x03
|
|
line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0,Group 1"
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x0084++0x03
|
|
line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0084++0x03
|
|
hide.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x0088++0x03
|
|
line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0088++0x03
|
|
hide.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x008C++0x03
|
|
line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x008C++0x03
|
|
hide.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x0090++0x03
|
|
line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0090++0x03
|
|
hide.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x0094++0x03
|
|
line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0094++0x03
|
|
hide.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x0098++0x03
|
|
line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0098++0x03
|
|
hide.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x009C++0x03
|
|
line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x009C++0x03
|
|
hide.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x00A0++0x03
|
|
line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00A0++0x03
|
|
hide.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x00A4++0x03
|
|
line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00A4++0x03
|
|
hide.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x00A8++0x03
|
|
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00A8++0x03
|
|
hide.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x00AC++0x03
|
|
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00AC++0x03
|
|
hide.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x00B0++0x03
|
|
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00B0++0x03
|
|
hide.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x00B4++0x03
|
|
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00B4++0x03
|
|
hide.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x00B8++0x03
|
|
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00B8++0x03
|
|
hide.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x00BC++0x03
|
|
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00BC++0x03
|
|
hide.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x00C0++0x03
|
|
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00C0++0x03
|
|
hide.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x00C4++0x03
|
|
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00C4++0x03
|
|
hide.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x00C8++0x03
|
|
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00C8++0x03
|
|
hide.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x00CC++0x03
|
|
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00CC++0x03
|
|
hide.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x00D0++0x03
|
|
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00D0++0x03
|
|
hide.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x00D4++0x03
|
|
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00D4++0x03
|
|
hide.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x00D8++0x03
|
|
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00D8++0x03
|
|
hide.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x00DC++0x03
|
|
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00DC++0x03
|
|
hide.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x00E0++0x03
|
|
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0E0++0x03
|
|
hide.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x00E4++0x03
|
|
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00E4++0x03
|
|
hide.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x00E8++0x03
|
|
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00E8++0x03
|
|
hide.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x00EC++0x03
|
|
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Non-Secure access)"
|
|
bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00EC++0x03
|
|
hide.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x00F0++0x03
|
|
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0F0++0x03
|
|
hide.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x00F4++0x03
|
|
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00F4++0x03
|
|
hide.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x00F8++0x03
|
|
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00F8++0x03
|
|
hide.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)==0x1F)
|
|
group.long 0x00FC++0x03
|
|
line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Non-secure access)"
|
|
bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00FC++0x03
|
|
hide.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
endif
|
|
width 24.
|
|
tree "Set/Clear Enable Registers"
|
|
group.long 0x0100++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31 ,Set/Clear Enable Bit 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB30 ,Set/Clear Enable Bit 30" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB29 ,Set/Clear Enable Bit 29" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28 ,Set/Clear Enable Bit 28" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB27 ,Set/Clear Enable Bit 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB26 ,Set/Clear Enable Bit 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25 ,Set/Clear Enable Bit 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB24 ,Set/Clear Enable Bit 24" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB23 ,Set/Clear Enable Bit 23" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22 ,Set/Clear Enable Bit 22" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB21 ,Set/Clear Enable Bit 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB20 ,Set/Clear Enable Bit 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19 ,Set/Clear Enable Bit 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB18 ,Set/Clear Enable Bit 18" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB17 ,Set/Clear Enable Bit 17" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16 ,Set/Clear Enable Bit 16" "Disabled,Enabled"
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x0104++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63 ,Set/Clear Enable Bit 63" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB62 ,Set/Clear Enable Bit 62" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB61 ,Set/Clear Enable Bit 61" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60 ,Set/Clear Enable Bit 60" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB59 ,Set/Clear Enable Bit 59" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB58 ,Set/Clear Enable Bit 58" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57 ,Set/Clear Enable Bit 57" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB56 ,Set/Clear Enable Bit 56" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB55 ,Set/Clear Enable Bit 55" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54 ,Set/Clear Enable Bit 54" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB53 ,Set/Clear Enable Bit 53" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB52 ,Set/Clear Enable Bit 52" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51 ,Set/Clear Enable Bit 51" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB50 ,Set/Clear Enable Bit 50" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB49 ,Set/Clear Enable Bit 49" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48 ,Set/Clear Enable Bit 48" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB47 ,Set/Clear Enable Bit 47" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB46 ,Set/Clear Enable Bit 46" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45 ,Set/Clear Enable Bit 45" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB44 ,Set/Clear Enable Bit 44" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB43 ,Set/Clear Enable Bit 43" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42 ,Set/Clear Enable Bit 42" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB41 ,Set/Clear Enable Bit 41" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB40 ,Set/Clear Enable Bit 40" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39 ,Set/Clear Enable Bit 39" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB38 ,Set/Clear Enable Bit 38" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB37 ,Set/Clear Enable Bit 37" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36 ,Set/Clear Enable Bit 36" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB35 ,Set/Clear Enable Bit 35" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB34 ,Set/Clear Enable Bit 34" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33 ,Set/Clear Enable Bit 33" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB32 ,Set/Clear Enable Bit 32" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0104++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x0108++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95 ,Set/Clear Enable Bit 95" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB94 ,Set/Clear Enable Bit 94" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB93 ,Set/Clear Enable Bit 93" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92 ,Set/Clear Enable Bit 92" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB91 ,Set/Clear Enable Bit 91" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB90 ,Set/Clear Enable Bit 90" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89 ,Set/Clear Enable Bit 89" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB88 ,Set/Clear Enable Bit 88" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB87 ,Set/Clear Enable Bit 87" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86 ,Set/Clear Enable Bit 86" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB85 ,Set/Clear Enable Bit 85" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB84 ,Set/Clear Enable Bit 84" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83 ,Set/Clear Enable Bit 83" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB82 ,Set/Clear Enable Bit 82" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB81 ,Set/Clear Enable Bit 81" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80 ,Set/Clear Enable Bit 80" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB79 ,Set/Clear Enable Bit 79" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB78 ,Set/Clear Enable Bit 78" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77 ,Set/Clear Enable Bit 77" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB76 ,Set/Clear Enable Bit 76" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB75 ,Set/Clear Enable Bit 75" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74 ,Set/Clear Enable Bit 74" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB73 ,Set/Clear Enable Bit 73" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB72 ,Set/Clear Enable Bit 72" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71 ,Set/Clear Enable Bit 71" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB70 ,Set/Clear Enable Bit 70" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB69 ,Set/Clear Enable Bit 69" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68 ,Set/Clear Enable Bit 68" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB67 ,Set/Clear Enable Bit 67" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB66 ,Set/Clear Enable Bit 66" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65 ,Set/Clear Enable Bit 65" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB64 ,Set/Clear Enable Bit 64" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0108++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x010C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127 ,Set/Clear Enable Bit 127" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB126 ,Set/Clear Enable Bit 126" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB125 ,Set/Clear Enable Bit 125" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124 ,Set/Clear Enable Bit 124" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB123 ,Set/Clear Enable Bit 123" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB122 ,Set/Clear Enable Bit 122" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121 ,Set/Clear Enable Bit 121" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB120 ,Set/Clear Enable Bit 120" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB119 ,Set/Clear Enable Bit 119" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118 ,Set/Clear Enable Bit 118" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB117 ,Set/Clear Enable Bit 117" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB116 ,Set/Clear Enable Bit 116" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115 ,Set/Clear Enable Bit 115" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB114 ,Set/Clear Enable Bit 114" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB113 ,Set/Clear Enable Bit 113" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112 ,Set/Clear Enable Bit 112" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB111 ,Set/Clear Enable Bit 111" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB110 ,Set/Clear Enable Bit 110" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109 ,Set/Clear Enable Bit 109" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB108 ,Set/Clear Enable Bit 108" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB107 ,Set/Clear Enable Bit 107" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106 ,Set/Clear Enable Bit 106" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB105 ,Set/Clear Enable Bit 105" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB104 ,Set/Clear Enable Bit 104" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103 ,Set/Clear Enable Bit 103" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB102 ,Set/Clear Enable Bit 102" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB101 ,Set/Clear Enable Bit 101" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100 ,Set/Clear Enable Bit 100" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB99 ,Set/Clear Enable Bit 99" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB98 ,Set/Clear Enable Bit 98" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97 ,Set/Clear Enable Bit 97" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB96 ,Set/Clear Enable Bit 96" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x010C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x0110++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159 ,Set/Clear Enable Bit 159" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB158 ,Set/Clear Enable Bit 158" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB157 ,Set/Clear Enable Bit 157" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156 ,Set/Clear Enable Bit 156" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB155 ,Set/Clear Enable Bit 155" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB154 ,Set/Clear Enable Bit 154" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153 ,Set/Clear Enable Bit 153" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB152 ,Set/Clear Enable Bit 152" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB151 ,Set/Clear Enable Bit 151" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150 ,Set/Clear Enable Bit 150" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB149 ,Set/Clear Enable Bit 149" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB148 ,Set/Clear Enable Bit 148" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147 ,Set/Clear Enable Bit 147" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB146 ,Set/Clear Enable Bit 146" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB145 ,Set/Clear Enable Bit 145" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144 ,Set/Clear Enable Bit 144" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB143 ,Set/Clear Enable Bit 143" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB142 ,Set/Clear Enable Bit 142" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141 ,Set/Clear Enable Bit 141" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB140 ,Set/Clear Enable Bit 140" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB139 ,Set/Clear Enable Bit 139" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138 ,Set/Clear Enable Bit 138" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB137 ,Set/Clear Enable Bit 137" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB136 ,Set/Clear Enable Bit 136" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135 ,Set/Clear Enable Bit 135" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB134 ,Set/Clear Enable Bit 134" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB133 ,Set/Clear Enable Bit 133" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132 ,Set/Clear Enable Bit 132" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB131 ,Set/Clear Enable Bit 131" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB130 ,Set/Clear Enable Bit 130" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129 ,Set/Clear Enable Bit 129" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB128 ,Set/Clear Enable Bit 128" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0110++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x0114++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191 ,Set/Clear Enable Bit 191" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB190 ,Set/Clear Enable Bit 190" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB189 ,Set/Clear Enable Bit 189" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188 ,Set/Clear Enable Bit 188" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB187 ,Set/Clear Enable Bit 187" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB186 ,Set/Clear Enable Bit 186" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185 ,Set/Clear Enable Bit 185" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB184 ,Set/Clear Enable Bit 184" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB183 ,Set/Clear Enable Bit 183" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182 ,Set/Clear Enable Bit 182" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB181 ,Set/Clear Enable Bit 181" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB180 ,Set/Clear Enable Bit 180" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179 ,Set/Clear Enable Bit 179" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB178 ,Set/Clear Enable Bit 178" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB177 ,Set/Clear Enable Bit 177" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176 ,Set/Clear Enable Bit 176" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB175 ,Set/Clear Enable Bit 175" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB174 ,Set/Clear Enable Bit 174" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173 ,Set/Clear Enable Bit 173" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB172 ,Set/Clear Enable Bit 172" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB171 ,Set/Clear Enable Bit 171" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170 ,Set/Clear Enable Bit 170" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB169 ,Set/Clear Enable Bit 169" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB168 ,Set/Clear Enable Bit 168" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167 ,Set/Clear Enable Bit 167" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB166 ,Set/Clear Enable Bit 166" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB165 ,Set/Clear Enable Bit 165" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164 ,Set/Clear Enable Bit 164" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB163 ,Set/Clear Enable Bit 163" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB162 ,Set/Clear Enable Bit 162" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161 ,Set/Clear Enable Bit 161" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB160 ,Set/Clear Enable Bit 160" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0114++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x0118++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223 ,Set/Clear Enable Bit 223" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB222 ,Set/Clear Enable Bit 222" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB221 ,Set/Clear Enable Bit 221" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220 ,Set/Clear Enable Bit 220" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB219 ,Set/Clear Enable Bit 219" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB218 ,Set/Clear Enable Bit 218" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217 ,Set/Clear Enable Bit 217" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB216 ,Set/Clear Enable Bit 216" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB215 ,Set/Clear Enable Bit 215" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214 ,Set/Clear Enable Bit 214" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB213 ,Set/Clear Enable Bit 213" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB212 ,Set/Clear Enable Bit 212" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211 ,Set/Clear Enable Bit 211" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB210 ,Set/Clear Enable Bit 210" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB209 ,Set/Clear Enable Bit 209" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208 ,Set/Clear Enable Bit 208" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB207 ,Set/Clear Enable Bit 207" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB206 ,Set/Clear Enable Bit 206" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205 ,Set/Clear Enable Bit 205" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB204 ,Set/Clear Enable Bit 204" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB203 ,Set/Clear Enable Bit 203" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202 ,Set/Clear Enable Bit 202" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB201 ,Set/Clear Enable Bit 201" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB200 ,Set/Clear Enable Bit 200" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199 ,Set/Clear Enable Bit 199" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB198 ,Set/Clear Enable Bit 198" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB197 ,Set/Clear Enable Bit 197" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196 ,Set/Clear Enable Bit 196" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB195 ,Set/Clear Enable Bit 195" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB194 ,Set/Clear Enable Bit 194" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193 ,Set/Clear Enable Bit 193" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB192 ,Set/Clear Enable Bit 192" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0118++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x011C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255 ,Set/Clear Enable Bit 255" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB254 ,Set/Clear Enable Bit 254" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB253 ,Set/Clear Enable Bit 253" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252 ,Set/Clear Enable Bit 252" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB251 ,Set/Clear Enable Bit 251" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB250 ,Set/Clear Enable Bit 250" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249 ,Set/Clear Enable Bit 249" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB248 ,Set/Clear Enable Bit 248" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB247 ,Set/Clear Enable Bit 247" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246 ,Set/Clear Enable Bit 246" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB245 ,Set/Clear Enable Bit 245" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB244 ,Set/Clear Enable Bit 244" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243 ,Set/Clear Enable Bit 243" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB242 ,Set/Clear Enable Bit 242" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB241 ,Set/Clear Enable Bit 241" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240 ,Set/Clear Enable Bit 240" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB239 ,Set/Clear Enable Bit 239" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB238 ,Set/Clear Enable Bit 238" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237 ,Set/Clear Enable Bit 237" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB236 ,Set/Clear Enable Bit 236" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB235 ,Set/Clear Enable Bit 235" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234 ,Set/Clear Enable Bit 234" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB233 ,Set/Clear Enable Bit 233" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB232 ,Set/Clear Enable Bit 232" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231 ,Set/Clear Enable Bit 231" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB230 ,Set/Clear Enable Bit 230" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB229 ,Set/Clear Enable Bit 229" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228 ,Set/Clear Enable Bit 228" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB227 ,Set/Clear Enable Bit 227" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB226 ,Set/Clear Enable Bit 226" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225 ,Set/Clear Enable Bit 225" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB224 ,Set/Clear Enable Bit 224" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x011C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x0120++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287 ,Set/Clear Enable Bit 287" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB286 ,Set/Clear Enable Bit 286" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB285 ,Set/Clear Enable Bit 285" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284 ,Set/Clear Enable Bit 284" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB283 ,Set/Clear Enable Bit 283" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB282 ,Set/Clear Enable Bit 282" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281 ,Set/Clear Enable Bit 281" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB280 ,Set/Clear Enable Bit 280" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB279 ,Set/Clear Enable Bit 279" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278 ,Set/Clear Enable Bit 278" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB277 ,Set/Clear Enable Bit 277" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB276 ,Set/Clear Enable Bit 276" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275 ,Set/Clear Enable Bit 275" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB274 ,Set/Clear Enable Bit 274" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB273 ,Set/Clear Enable Bit 273" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272 ,Set/Clear Enable Bit 272" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB271 ,Set/Clear Enable Bit 271" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB270 ,Set/Clear Enable Bit 270" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269 ,Set/Clear Enable Bit 269" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB268 ,Set/Clear Enable Bit 268" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB267 ,Set/Clear Enable Bit 267" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266 ,Set/Clear Enable Bit 266" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB265 ,Set/Clear Enable Bit 265" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB264 ,Set/Clear Enable Bit 264" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263 ,Set/Clear Enable Bit 263" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB262 ,Set/Clear Enable Bit 262" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB261 ,Set/Clear Enable Bit 261" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260 ,Set/Clear Enable Bit 260" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB259 ,Set/Clear Enable Bit 259" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB258 ,Set/Clear Enable Bit 258" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257 ,Set/Clear Enable Bit 257" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB256 ,Set/Clear Enable Bit 256" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0120++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x0124++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319 ,Set/Clear Enable Bit 319" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB318 ,Set/Clear Enable Bit 318" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB317 ,Set/Clear Enable Bit 317" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316 ,Set/Clear Enable Bit 316" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB315 ,Set/Clear Enable Bit 315" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB314 ,Set/Clear Enable Bit 314" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313 ,Set/Clear Enable Bit 313" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB312 ,Set/Clear Enable Bit 312" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB311 ,Set/Clear Enable Bit 311" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310 ,Set/Clear Enable Bit 310" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB309 ,Set/Clear Enable Bit 309" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB308 ,Set/Clear Enable Bit 308" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307 ,Set/Clear Enable Bit 307" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB306 ,Set/Clear Enable Bit 306" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB305 ,Set/Clear Enable Bit 305" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304 ,Set/Clear Enable Bit 304" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB303 ,Set/Clear Enable Bit 303" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB302 ,Set/Clear Enable Bit 302" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301 ,Set/Clear Enable Bit 301" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB300 ,Set/Clear Enable Bit 300" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB299 ,Set/Clear Enable Bit 299" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298 ,Set/Clear Enable Bit 298" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB297 ,Set/Clear Enable Bit 297" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB296 ,Set/Clear Enable Bit 296" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295 ,Set/Clear Enable Bit 295" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB294 ,Set/Clear Enable Bit 294" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB293 ,Set/Clear Enable Bit 293" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292 ,Set/Clear Enable Bit 292" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB291 ,Set/Clear Enable Bit 291" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB290 ,Set/Clear Enable Bit 290" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289 ,Set/Clear Enable Bit 289" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB288 ,Set/Clear Enable Bit 288" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0124++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x0128++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351 ,Set/Clear Enable Bit 351" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB350 ,Set/Clear Enable Bit 350" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB349 ,Set/Clear Enable Bit 349" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348 ,Set/Clear Enable Bit 348" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB347 ,Set/Clear Enable Bit 347" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB346 ,Set/Clear Enable Bit 346" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345 ,Set/Clear Enable Bit 345" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB344 ,Set/Clear Enable Bit 344" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB343 ,Set/Clear Enable Bit 343" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342 ,Set/Clear Enable Bit 342" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB341 ,Set/Clear Enable Bit 341" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB340 ,Set/Clear Enable Bit 340" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339 ,Set/Clear Enable Bit 339" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB338 ,Set/Clear Enable Bit 338" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB337 ,Set/Clear Enable Bit 337" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336 ,Set/Clear Enable Bit 336" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB335 ,Set/Clear Enable Bit 335" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB334 ,Set/Clear Enable Bit 334" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333 ,Set/Clear Enable Bit 333" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB332 ,Set/Clear Enable Bit 332" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB331 ,Set/Clear Enable Bit 331" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330 ,Set/Clear Enable Bit 330" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB329 ,Set/Clear Enable Bit 329" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB328 ,Set/Clear Enable Bit 328" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327 ,Set/Clear Enable Bit 327" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB326 ,Set/Clear Enable Bit 326" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB325 ,Set/Clear Enable Bit 325" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324 ,Set/Clear Enable Bit 324" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB323 ,Set/Clear Enable Bit 323" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB322 ,Set/Clear Enable Bit 322" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321 ,Set/Clear Enable Bit 321" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB320 ,Set/Clear Enable Bit 320" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0128++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x012C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383 ,Set/Clear Enable Bit 383" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB382 ,Set/Clear Enable Bit 382" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB381 ,Set/Clear Enable Bit 381" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380 ,Set/Clear Enable Bit 380" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB379 ,Set/Clear Enable Bit 379" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB378 ,Set/Clear Enable Bit 378" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377 ,Set/Clear Enable Bit 377" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB376 ,Set/Clear Enable Bit 376" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB375 ,Set/Clear Enable Bit 375" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374 ,Set/Clear Enable Bit 374" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB373 ,Set/Clear Enable Bit 373" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB372 ,Set/Clear Enable Bit 372" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371 ,Set/Clear Enable Bit 371" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB370 ,Set/Clear Enable Bit 370" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB369 ,Set/Clear Enable Bit 369" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368 ,Set/Clear Enable Bit 368" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB367 ,Set/Clear Enable Bit 367" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB366 ,Set/Clear Enable Bit 366" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365 ,Set/Clear Enable Bit 365" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB364 ,Set/Clear Enable Bit 364" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB363 ,Set/Clear Enable Bit 363" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362 ,Set/Clear Enable Bit 362" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB361 ,Set/Clear Enable Bit 361" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB360 ,Set/Clear Enable Bit 360" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359 ,Set/Clear Enable Bit 359" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB358 ,Set/Clear Enable Bit 358" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB357 ,Set/Clear Enable Bit 357" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356 ,Set/Clear Enable Bit 356" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB355 ,Set/Clear Enable Bit 355" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB354 ,Set/Clear Enable Bit 354" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353 ,Set/Clear Enable Bit 353" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB352 ,Set/Clear Enable Bit 352" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x012C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x0130++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415 ,Set/Clear Enable Bit 415" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB414 ,Set/Clear Enable Bit 414" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB413 ,Set/Clear Enable Bit 413" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412 ,Set/Clear Enable Bit 412" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB411 ,Set/Clear Enable Bit 411" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB410 ,Set/Clear Enable Bit 410" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409 ,Set/Clear Enable Bit 409" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB408 ,Set/Clear Enable Bit 408" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB407 ,Set/Clear Enable Bit 407" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406 ,Set/Clear Enable Bit 406" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB405 ,Set/Clear Enable Bit 405" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB404 ,Set/Clear Enable Bit 404" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403 ,Set/Clear Enable Bit 403" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB402 ,Set/Clear Enable Bit 402" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB401 ,Set/Clear Enable Bit 401" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400 ,Set/Clear Enable Bit 400" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB399 ,Set/Clear Enable Bit 399" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB398 ,Set/Clear Enable Bit 398" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397 ,Set/Clear Enable Bit 397" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB396 ,Set/Clear Enable Bit 396" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB395 ,Set/Clear Enable Bit 395" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394 ,Set/Clear Enable Bit 394" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB393 ,Set/Clear Enable Bit 393" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB392 ,Set/Clear Enable Bit 392" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391 ,Set/Clear Enable Bit 391" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB390 ,Set/Clear Enable Bit 390" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB389 ,Set/Clear Enable Bit 389" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388 ,Set/Clear Enable Bit 388" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB387 ,Set/Clear Enable Bit 387" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB386 ,Set/Clear Enable Bit 386" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385 ,Set/Clear Enable Bit 385" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB384 ,Set/Clear Enable Bit 384" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0130++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x0134++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447 ,Set/Clear Enable Bit 447" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB446 ,Set/Clear Enable Bit 446" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB445 ,Set/Clear Enable Bit 445" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444 ,Set/Clear Enable Bit 444" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB443 ,Set/Clear Enable Bit 443" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB442 ,Set/Clear Enable Bit 442" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441 ,Set/Clear Enable Bit 441" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB440 ,Set/Clear Enable Bit 440" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB439 ,Set/Clear Enable Bit 439" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438 ,Set/Clear Enable Bit 438" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB437 ,Set/Clear Enable Bit 437" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB436 ,Set/Clear Enable Bit 436" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435 ,Set/Clear Enable Bit 435" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB434 ,Set/Clear Enable Bit 434" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB433 ,Set/Clear Enable Bit 433" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432 ,Set/Clear Enable Bit 432" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB431 ,Set/Clear Enable Bit 431" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB430 ,Set/Clear Enable Bit 430" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429 ,Set/Clear Enable Bit 429" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB428 ,Set/Clear Enable Bit 428" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB427 ,Set/Clear Enable Bit 427" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426 ,Set/Clear Enable Bit 426" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB425 ,Set/Clear Enable Bit 425" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB424 ,Set/Clear Enable Bit 424" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423 ,Set/Clear Enable Bit 423" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB422 ,Set/Clear Enable Bit 422" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB421 ,Set/Clear Enable Bit 421" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420 ,Set/Clear Enable Bit 420" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB419 ,Set/Clear Enable Bit 419" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB418 ,Set/Clear Enable Bit 418" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417 ,Set/Clear Enable Bit 417" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB416 ,Set/Clear Enable Bit 416" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0134++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x0138++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479 ,Set/Clear Enable Bit 479" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB478 ,Set/Clear Enable Bit 478" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB477 ,Set/Clear Enable Bit 477" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476 ,Set/Clear Enable Bit 476" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB475 ,Set/Clear Enable Bit 475" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB474 ,Set/Clear Enable Bit 474" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473 ,Set/Clear Enable Bit 473" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB472 ,Set/Clear Enable Bit 472" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB471 ,Set/Clear Enable Bit 471" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470 ,Set/Clear Enable Bit 470" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB469 ,Set/Clear Enable Bit 469" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB468 ,Set/Clear Enable Bit 468" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467 ,Set/Clear Enable Bit 467" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB466 ,Set/Clear Enable Bit 466" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB465 ,Set/Clear Enable Bit 465" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464 ,Set/Clear Enable Bit 464" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB463 ,Set/Clear Enable Bit 463" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB462 ,Set/Clear Enable Bit 462" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461 ,Set/Clear Enable Bit 461" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB460 ,Set/Clear Enable Bit 460" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB459 ,Set/Clear Enable Bit 459" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458 ,Set/Clear Enable Bit 458" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB457 ,Set/Clear Enable Bit 457" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB456 ,Set/Clear Enable Bit 456" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455 ,Set/Clear Enable Bit 455" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB454 ,Set/Clear Enable Bit 454" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB453 ,Set/Clear Enable Bit 453" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452 ,Set/Clear Enable Bit 452" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB451 ,Set/Clear Enable Bit 451" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB450 ,Set/Clear Enable Bit 450" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449 ,Set/Clear Enable Bit 449" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB448 ,Set/Clear Enable Bit 448" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0138++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x013C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511 ,Set/Clear Enable Bit 511" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB510 ,Set/Clear Enable Bit 510" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB509 ,Set/Clear Enable Bit 509" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508 ,Set/Clear Enable Bit 508" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB507 ,Set/Clear Enable Bit 507" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB506 ,Set/Clear Enable Bit 506" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505 ,Set/Clear Enable Bit 505" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB504 ,Set/Clear Enable Bit 504" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB503 ,Set/Clear Enable Bit 503" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502 ,Set/Clear Enable Bit 502" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB501 ,Set/Clear Enable Bit 501" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB500 ,Set/Clear Enable Bit 500" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499 ,Set/Clear Enable Bit 499" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB498 ,Set/Clear Enable Bit 498" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB497 ,Set/Clear Enable Bit 497" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496 ,Set/Clear Enable Bit 496" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB495 ,Set/Clear Enable Bit 495" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB494 ,Set/Clear Enable Bit 494" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493 ,Set/Clear Enable Bit 493" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB492 ,Set/Clear Enable Bit 492" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB491 ,Set/Clear Enable Bit 491" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490 ,Set/Clear Enable Bit 490" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB489 ,Set/Clear Enable Bit 489" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB488 ,Set/Clear Enable Bit 488" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487 ,Set/Clear Enable Bit 487" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB486 ,Set/Clear Enable Bit 486" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB485 ,Set/Clear Enable Bit 485" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484 ,Set/Clear Enable Bit 484" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB483 ,Set/Clear Enable Bit 483" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB482 ,Set/Clear Enable Bit 482" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481 ,Set/Clear Enable Bit 481" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB480 ,Set/Clear Enable Bit 480" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x013C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x0140++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543 ,Set/Clear Enable Bit 543" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB542 ,Set/Clear Enable Bit 542" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB541 ,Set/Clear Enable Bit 541" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540 ,Set/Clear Enable Bit 540" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB539 ,Set/Clear Enable Bit 539" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB538 ,Set/Clear Enable Bit 538" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537 ,Set/Clear Enable Bit 537" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB536 ,Set/Clear Enable Bit 536" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB535 ,Set/Clear Enable Bit 535" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534 ,Set/Clear Enable Bit 534" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB533 ,Set/Clear Enable Bit 533" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB532 ,Set/Clear Enable Bit 532" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531 ,Set/Clear Enable Bit 531" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB530 ,Set/Clear Enable Bit 530" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB529 ,Set/Clear Enable Bit 529" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528 ,Set/Clear Enable Bit 528" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB527 ,Set/Clear Enable Bit 527" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB526 ,Set/Clear Enable Bit 526" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525 ,Set/Clear Enable Bit 525" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB524 ,Set/Clear Enable Bit 524" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB523 ,Set/Clear Enable Bit 523" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522 ,Set/Clear Enable Bit 522" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB521 ,Set/Clear Enable Bit 521" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB520 ,Set/Clear Enable Bit 520" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519 ,Set/Clear Enable Bit 519" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB518 ,Set/Clear Enable Bit 518" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB517 ,Set/Clear Enable Bit 517" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516 ,Set/Clear Enable Bit 516" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB515 ,Set/Clear Enable Bit 515" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB514 ,Set/Clear Enable Bit 514" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513 ,Set/Clear Enable Bit 513" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB512 ,Set/Clear Enable Bit 512" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0140++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x0144++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575 ,Set/Clear Enable Bit 575" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB574 ,Set/Clear Enable Bit 574" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB573 ,Set/Clear Enable Bit 573" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572 ,Set/Clear Enable Bit 572" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB571 ,Set/Clear Enable Bit 571" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB570 ,Set/Clear Enable Bit 570" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569 ,Set/Clear Enable Bit 569" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB568 ,Set/Clear Enable Bit 568" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB567 ,Set/Clear Enable Bit 567" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566 ,Set/Clear Enable Bit 566" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB565 ,Set/Clear Enable Bit 565" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB564 ,Set/Clear Enable Bit 564" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563 ,Set/Clear Enable Bit 563" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB562 ,Set/Clear Enable Bit 562" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB561 ,Set/Clear Enable Bit 561" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560 ,Set/Clear Enable Bit 560" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB559 ,Set/Clear Enable Bit 559" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB558 ,Set/Clear Enable Bit 558" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557 ,Set/Clear Enable Bit 557" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB556 ,Set/Clear Enable Bit 556" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB555 ,Set/Clear Enable Bit 555" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554 ,Set/Clear Enable Bit 554" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB553 ,Set/Clear Enable Bit 553" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB552 ,Set/Clear Enable Bit 552" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551 ,Set/Clear Enable Bit 551" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB550 ,Set/Clear Enable Bit 550" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB549 ,Set/Clear Enable Bit 549" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548 ,Set/Clear Enable Bit 548" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB547 ,Set/Clear Enable Bit 547" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB546 ,Set/Clear Enable Bit 546" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545 ,Set/Clear Enable Bit 545" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB544 ,Set/Clear Enable Bit 544" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0144++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x0148++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607 ,Set/Clear Enable Bit 607" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB606 ,Set/Clear Enable Bit 606" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB605 ,Set/Clear Enable Bit 605" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604 ,Set/Clear Enable Bit 604" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB603 ,Set/Clear Enable Bit 603" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB602 ,Set/Clear Enable Bit 602" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601 ,Set/Clear Enable Bit 601" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB600 ,Set/Clear Enable Bit 600" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB599 ,Set/Clear Enable Bit 599" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598 ,Set/Clear Enable Bit 598" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB597 ,Set/Clear Enable Bit 597" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB596 ,Set/Clear Enable Bit 596" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595 ,Set/Clear Enable Bit 595" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB594 ,Set/Clear Enable Bit 594" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB593 ,Set/Clear Enable Bit 593" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592 ,Set/Clear Enable Bit 592" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB591 ,Set/Clear Enable Bit 591" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB590 ,Set/Clear Enable Bit 590" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589 ,Set/Clear Enable Bit 589" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB588 ,Set/Clear Enable Bit 588" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB587 ,Set/Clear Enable Bit 587" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586 ,Set/Clear Enable Bit 586" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB585 ,Set/Clear Enable Bit 585" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB584 ,Set/Clear Enable Bit 584" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583 ,Set/Clear Enable Bit 583" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB582 ,Set/Clear Enable Bit 582" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB581 ,Set/Clear Enable Bit 581" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580 ,Set/Clear Enable Bit 580" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB579 ,Set/Clear Enable Bit 579" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB578 ,Set/Clear Enable Bit 578" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577 ,Set/Clear Enable Bit 577" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB576 ,Set/Clear Enable Bit 576" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0148++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x014C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639 ,Set/Clear Enable Bit 639" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB638 ,Set/Clear Enable Bit 638" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB637 ,Set/Clear Enable Bit 637" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636 ,Set/Clear Enable Bit 636" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB635 ,Set/Clear Enable Bit 635" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB634 ,Set/Clear Enable Bit 634" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633 ,Set/Clear Enable Bit 633" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB632 ,Set/Clear Enable Bit 632" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB631 ,Set/Clear Enable Bit 631" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630 ,Set/Clear Enable Bit 630" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB629 ,Set/Clear Enable Bit 629" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB628 ,Set/Clear Enable Bit 628" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627 ,Set/Clear Enable Bit 627" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB626 ,Set/Clear Enable Bit 626" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB625 ,Set/Clear Enable Bit 625" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624 ,Set/Clear Enable Bit 624" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB623 ,Set/Clear Enable Bit 623" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB622 ,Set/Clear Enable Bit 622" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621 ,Set/Clear Enable Bit 621" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB620 ,Set/Clear Enable Bit 620" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB619 ,Set/Clear Enable Bit 619" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618 ,Set/Clear Enable Bit 618" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB617 ,Set/Clear Enable Bit 617" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB616 ,Set/Clear Enable Bit 616" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615 ,Set/Clear Enable Bit 615" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB614 ,Set/Clear Enable Bit 614" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB613 ,Set/Clear Enable Bit 613" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612 ,Set/Clear Enable Bit 612" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB611 ,Set/Clear Enable Bit 611" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB610 ,Set/Clear Enable Bit 610" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609 ,Set/Clear Enable Bit 609" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB608 ,Set/Clear Enable Bit 608" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x014C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x0150++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671 ,Set/Clear Enable Bit 671" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB670 ,Set/Clear Enable Bit 670" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB669 ,Set/Clear Enable Bit 669" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668 ,Set/Clear Enable Bit 668" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB667 ,Set/Clear Enable Bit 667" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB666 ,Set/Clear Enable Bit 666" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665 ,Set/Clear Enable Bit 665" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB664 ,Set/Clear Enable Bit 664" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB663 ,Set/Clear Enable Bit 663" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662 ,Set/Clear Enable Bit 662" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB661 ,Set/Clear Enable Bit 661" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB660 ,Set/Clear Enable Bit 660" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659 ,Set/Clear Enable Bit 659" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB658 ,Set/Clear Enable Bit 658" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB657 ,Set/Clear Enable Bit 657" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656 ,Set/Clear Enable Bit 656" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB655 ,Set/Clear Enable Bit 655" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB654 ,Set/Clear Enable Bit 654" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653 ,Set/Clear Enable Bit 653" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB652 ,Set/Clear Enable Bit 652" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB651 ,Set/Clear Enable Bit 651" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650 ,Set/Clear Enable Bit 650" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB649 ,Set/Clear Enable Bit 649" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB648 ,Set/Clear Enable Bit 648" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647 ,Set/Clear Enable Bit 647" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB646 ,Set/Clear Enable Bit 646" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB645 ,Set/Clear Enable Bit 645" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644 ,Set/Clear Enable Bit 644" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB643 ,Set/Clear Enable Bit 643" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB642 ,Set/Clear Enable Bit 642" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641 ,Set/Clear Enable Bit 641" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB640 ,Set/Clear Enable Bit 640" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0150++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x0154++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703 ,Set/Clear Enable Bit 703" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB702 ,Set/Clear Enable Bit 702" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB701 ,Set/Clear Enable Bit 701" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700 ,Set/Clear Enable Bit 700" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB699 ,Set/Clear Enable Bit 699" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB698 ,Set/Clear Enable Bit 698" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697 ,Set/Clear Enable Bit 697" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB696 ,Set/Clear Enable Bit 696" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB695 ,Set/Clear Enable Bit 695" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694 ,Set/Clear Enable Bit 694" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB693 ,Set/Clear Enable Bit 693" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB692 ,Set/Clear Enable Bit 692" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691 ,Set/Clear Enable Bit 691" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB690 ,Set/Clear Enable Bit 690" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB689 ,Set/Clear Enable Bit 689" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688 ,Set/Clear Enable Bit 688" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB687 ,Set/Clear Enable Bit 687" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB686 ,Set/Clear Enable Bit 686" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685 ,Set/Clear Enable Bit 685" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB684 ,Set/Clear Enable Bit 684" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB683 ,Set/Clear Enable Bit 683" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682 ,Set/Clear Enable Bit 682" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB681 ,Set/Clear Enable Bit 681" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB680 ,Set/Clear Enable Bit 680" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679 ,Set/Clear Enable Bit 679" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB678 ,Set/Clear Enable Bit 678" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB677 ,Set/Clear Enable Bit 677" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676 ,Set/Clear Enable Bit 676" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB675 ,Set/Clear Enable Bit 675" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB674 ,Set/Clear Enable Bit 674" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673 ,Set/Clear Enable Bit 673" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB672 ,Set/Clear Enable Bit 672" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0154++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x0158++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735 ,Set/Clear Enable Bit 735" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB734 ,Set/Clear Enable Bit 734" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB733 ,Set/Clear Enable Bit 733" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732 ,Set/Clear Enable Bit 732" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB731 ,Set/Clear Enable Bit 731" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB730 ,Set/Clear Enable Bit 730" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729 ,Set/Clear Enable Bit 729" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB728 ,Set/Clear Enable Bit 728" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB727 ,Set/Clear Enable Bit 727" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726 ,Set/Clear Enable Bit 726" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB725 ,Set/Clear Enable Bit 725" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB724 ,Set/Clear Enable Bit 724" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723 ,Set/Clear Enable Bit 723" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB722 ,Set/Clear Enable Bit 722" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB721 ,Set/Clear Enable Bit 721" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720 ,Set/Clear Enable Bit 720" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB719 ,Set/Clear Enable Bit 719" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB718 ,Set/Clear Enable Bit 718" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717 ,Set/Clear Enable Bit 717" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB716 ,Set/Clear Enable Bit 716" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB715 ,Set/Clear Enable Bit 715" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714 ,Set/Clear Enable Bit 714" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB713 ,Set/Clear Enable Bit 713" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB712 ,Set/Clear Enable Bit 712" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711 ,Set/Clear Enable Bit 711" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB710 ,Set/Clear Enable Bit 710" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB709 ,Set/Clear Enable Bit 709" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708 ,Set/Clear Enable Bit 708" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB707 ,Set/Clear Enable Bit 707" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB706 ,Set/Clear Enable Bit 706" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705 ,Set/Clear Enable Bit 705" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB704 ,Set/Clear Enable Bit 704" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0158++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x015C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767 ,Set/Clear Enable Bit 767" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB766 ,Set/Clear Enable Bit 766" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB765 ,Set/Clear Enable Bit 765" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764 ,Set/Clear Enable Bit 764" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB763 ,Set/Clear Enable Bit 763" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB762 ,Set/Clear Enable Bit 762" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761 ,Set/Clear Enable Bit 761" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB760 ,Set/Clear Enable Bit 760" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB759 ,Set/Clear Enable Bit 759" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758 ,Set/Clear Enable Bit 758" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB757 ,Set/Clear Enable Bit 757" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB756 ,Set/Clear Enable Bit 756" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755 ,Set/Clear Enable Bit 755" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB754 ,Set/Clear Enable Bit 754" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB753 ,Set/Clear Enable Bit 753" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752 ,Set/Clear Enable Bit 752" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB751 ,Set/Clear Enable Bit 751" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB750 ,Set/Clear Enable Bit 750" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749 ,Set/Clear Enable Bit 749" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB748 ,Set/Clear Enable Bit 748" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB747 ,Set/Clear Enable Bit 747" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746 ,Set/Clear Enable Bit 746" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB745 ,Set/Clear Enable Bit 745" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB744 ,Set/Clear Enable Bit 744" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743 ,Set/Clear Enable Bit 743" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB742 ,Set/Clear Enable Bit 742" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB741 ,Set/Clear Enable Bit 741" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740 ,Set/Clear Enable Bit 740" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB739 ,Set/Clear Enable Bit 739" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB738 ,Set/Clear Enable Bit 738" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737 ,Set/Clear Enable Bit 737" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB736 ,Set/Clear Enable Bit 736" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x015C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x0160++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799 ,Set/Clear Enable Bit 799" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB798 ,Set/Clear Enable Bit 798" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB797 ,Set/Clear Enable Bit 797" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796 ,Set/Clear Enable Bit 796" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB795 ,Set/Clear Enable Bit 795" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB794 ,Set/Clear Enable Bit 794" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793 ,Set/Clear Enable Bit 793" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB792 ,Set/Clear Enable Bit 792" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB791 ,Set/Clear Enable Bit 791" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790 ,Set/Clear Enable Bit 790" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB789 ,Set/Clear Enable Bit 789" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB788 ,Set/Clear Enable Bit 788" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787 ,Set/Clear Enable Bit 787" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB786 ,Set/Clear Enable Bit 786" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB785 ,Set/Clear Enable Bit 785" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784 ,Set/Clear Enable Bit 784" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB783 ,Set/Clear Enable Bit 783" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB782 ,Set/Clear Enable Bit 782" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781 ,Set/Clear Enable Bit 781" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB780 ,Set/Clear Enable Bit 780" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB779 ,Set/Clear Enable Bit 779" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778 ,Set/Clear Enable Bit 778" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB777 ,Set/Clear Enable Bit 777" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB776 ,Set/Clear Enable Bit 776" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775 ,Set/Clear Enable Bit 775" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB774 ,Set/Clear Enable Bit 774" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB773 ,Set/Clear Enable Bit 773" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772 ,Set/Clear Enable Bit 772" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB771 ,Set/Clear Enable Bit 771" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB770 ,Set/Clear Enable Bit 770" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769 ,Set/Clear Enable Bit 769" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB768 ,Set/Clear Enable Bit 768" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0160++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x0164++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831 ,Set/Clear Enable Bit 831" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB830 ,Set/Clear Enable Bit 830" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB829 ,Set/Clear Enable Bit 829" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828 ,Set/Clear Enable Bit 828" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB827 ,Set/Clear Enable Bit 827" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB826 ,Set/Clear Enable Bit 826" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825 ,Set/Clear Enable Bit 825" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB824 ,Set/Clear Enable Bit 824" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB823 ,Set/Clear Enable Bit 823" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822 ,Set/Clear Enable Bit 822" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB821 ,Set/Clear Enable Bit 821" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB820 ,Set/Clear Enable Bit 820" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819 ,Set/Clear Enable Bit 819" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB818 ,Set/Clear Enable Bit 818" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB817 ,Set/Clear Enable Bit 817" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816 ,Set/Clear Enable Bit 816" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB815 ,Set/Clear Enable Bit 815" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB814 ,Set/Clear Enable Bit 814" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813 ,Set/Clear Enable Bit 813" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB812 ,Set/Clear Enable Bit 812" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB811 ,Set/Clear Enable Bit 811" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810 ,Set/Clear Enable Bit 810" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB809 ,Set/Clear Enable Bit 809" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB808 ,Set/Clear Enable Bit 808" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807 ,Set/Clear Enable Bit 807" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB806 ,Set/Clear Enable Bit 806" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB805 ,Set/Clear Enable Bit 805" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804 ,Set/Clear Enable Bit 804" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB803 ,Set/Clear Enable Bit 803" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB802 ,Set/Clear Enable Bit 802" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801 ,Set/Clear Enable Bit 801" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB800 ,Set/Clear Enable Bit 800" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0164++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x0168++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863 ,Set/Clear Enable Bit 863" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB862 ,Set/Clear Enable Bit 862" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB861 ,Set/Clear Enable Bit 861" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860 ,Set/Clear Enable Bit 860" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB859 ,Set/Clear Enable Bit 859" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB858 ,Set/Clear Enable Bit 858" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857 ,Set/Clear Enable Bit 857" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB856 ,Set/Clear Enable Bit 856" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB855 ,Set/Clear Enable Bit 855" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854 ,Set/Clear Enable Bit 854" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB853 ,Set/Clear Enable Bit 853" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB852 ,Set/Clear Enable Bit 852" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851 ,Set/Clear Enable Bit 851" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB850 ,Set/Clear Enable Bit 850" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB849 ,Set/Clear Enable Bit 849" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848 ,Set/Clear Enable Bit 848" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB847 ,Set/Clear Enable Bit 847" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB846 ,Set/Clear Enable Bit 846" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845 ,Set/Clear Enable Bit 845" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB844 ,Set/Clear Enable Bit 844" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB843 ,Set/Clear Enable Bit 843" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842 ,Set/Clear Enable Bit 842" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB841 ,Set/Clear Enable Bit 841" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB840 ,Set/Clear Enable Bit 840" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839 ,Set/Clear Enable Bit 839" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB838 ,Set/Clear Enable Bit 838" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB837 ,Set/Clear Enable Bit 837" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836 ,Set/Clear Enable Bit 836" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB835 ,Set/Clear Enable Bit 835" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB834 ,Set/Clear Enable Bit 834" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833 ,Set/Clear Enable Bit 833" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB832 ,Set/Clear Enable Bit 832" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0168++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x016C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895 ,Set/Clear Enable Bit 895" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB894 ,Set/Clear Enable Bit 894" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB893 ,Set/Clear Enable Bit 893" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892 ,Set/Clear Enable Bit 892" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB891 ,Set/Clear Enable Bit 891" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB890 ,Set/Clear Enable Bit 890" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889 ,Set/Clear Enable Bit 889" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB888 ,Set/Clear Enable Bit 888" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB887 ,Set/Clear Enable Bit 887" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886 ,Set/Clear Enable Bit 886" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB885 ,Set/Clear Enable Bit 885" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB884 ,Set/Clear Enable Bit 884" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883 ,Set/Clear Enable Bit 883" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB882 ,Set/Clear Enable Bit 882" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB881 ,Set/Clear Enable Bit 881" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880 ,Set/Clear Enable Bit 880" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB879 ,Set/Clear Enable Bit 879" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB878 ,Set/Clear Enable Bit 878" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877 ,Set/Clear Enable Bit 877" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB876 ,Set/Clear Enable Bit 876" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB875 ,Set/Clear Enable Bit 875" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874 ,Set/Clear Enable Bit 874" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB873 ,Set/Clear Enable Bit 873" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB872 ,Set/Clear Enable Bit 872" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871 ,Set/Clear Enable Bit 871" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB870 ,Set/Clear Enable Bit 870" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB869 ,Set/Clear Enable Bit 869" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868 ,Set/Clear Enable Bit 868" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB867 ,Set/Clear Enable Bit 867" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB866 ,Set/Clear Enable Bit 866" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865 ,Set/Clear Enable Bit 865" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB864 ,Set/Clear Enable Bit 864" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x016C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x0170++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927 ,Set/Clear Enable Bit 927" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB926 ,Set/Clear Enable Bit 926" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB925 ,Set/Clear Enable Bit 925" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924 ,Set/Clear Enable Bit 924" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB923 ,Set/Clear Enable Bit 923" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB922 ,Set/Clear Enable Bit 922" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921 ,Set/Clear Enable Bit 921" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB920 ,Set/Clear Enable Bit 920" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB919 ,Set/Clear Enable Bit 919" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918 ,Set/Clear Enable Bit 918" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB917 ,Set/Clear Enable Bit 917" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB916 ,Set/Clear Enable Bit 916" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915 ,Set/Clear Enable Bit 915" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB914 ,Set/Clear Enable Bit 914" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB913 ,Set/Clear Enable Bit 913" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912 ,Set/Clear Enable Bit 912" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB911 ,Set/Clear Enable Bit 911" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB910 ,Set/Clear Enable Bit 910" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909 ,Set/Clear Enable Bit 909" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB908 ,Set/Clear Enable Bit 908" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB907 ,Set/Clear Enable Bit 907" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906 ,Set/Clear Enable Bit 906" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB905 ,Set/Clear Enable Bit 905" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB904 ,Set/Clear Enable Bit 904" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903 ,Set/Clear Enable Bit 903" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB902 ,Set/Clear Enable Bit 902" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB901 ,Set/Clear Enable Bit 901" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900 ,Set/Clear Enable Bit 900" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB899 ,Set/Clear Enable Bit 899" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB898 ,Set/Clear Enable Bit 898" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897 ,Set/Clear Enable Bit 897" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB896 ,Set/Clear Enable Bit 896" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0170++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x0174++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959 ,Set/Clear Enable Bit 959" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB958 ,Set/Clear Enable Bit 958" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB957 ,Set/Clear Enable Bit 957" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956 ,Set/Clear Enable Bit 956" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB955 ,Set/Clear Enable Bit 955" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB954 ,Set/Clear Enable Bit 954" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953 ,Set/Clear Enable Bit 953" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB952 ,Set/Clear Enable Bit 952" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB951 ,Set/Clear Enable Bit 951" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950 ,Set/Clear Enable Bit 950" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB949 ,Set/Clear Enable Bit 949" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB948 ,Set/Clear Enable Bit 948" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947 ,Set/Clear Enable Bit 947" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB946 ,Set/Clear Enable Bit 946" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB945 ,Set/Clear Enable Bit 945" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944 ,Set/Clear Enable Bit 944" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB943 ,Set/Clear Enable Bit 943" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB942 ,Set/Clear Enable Bit 942" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941 ,Set/Clear Enable Bit 941" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB940 ,Set/Clear Enable Bit 940" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB939 ,Set/Clear Enable Bit 939" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938 ,Set/Clear Enable Bit 938" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB937 ,Set/Clear Enable Bit 937" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB936 ,Set/Clear Enable Bit 936" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935 ,Set/Clear Enable Bit 935" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB934 ,Set/Clear Enable Bit 934" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB933 ,Set/Clear Enable Bit 933" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932 ,Set/Clear Enable Bit 932" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB931 ,Set/Clear Enable Bit 931" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB930 ,Set/Clear Enable Bit 930" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929 ,Set/Clear Enable Bit 929" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB928 ,Set/Clear Enable Bit 928" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0174++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x0178++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991 ,Set/Clear Enable Bit 991" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB990 ,Set/Clear Enable Bit 990" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB989 ,Set/Clear Enable Bit 989" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988 ,Set/Clear Enable Bit 988" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB987 ,Set/Clear Enable Bit 987" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB986 ,Set/Clear Enable Bit 986" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985 ,Set/Clear Enable Bit 985" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB984 ,Set/Clear Enable Bit 984" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB983 ,Set/Clear Enable Bit 983" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982 ,Set/Clear Enable Bit 982" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB981 ,Set/Clear Enable Bit 981" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB980 ,Set/Clear Enable Bit 980" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979 ,Set/Clear Enable Bit 979" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB978 ,Set/Clear Enable Bit 978" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB977 ,Set/Clear Enable Bit 977" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976 ,Set/Clear Enable Bit 976" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB975 ,Set/Clear Enable Bit 975" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB974 ,Set/Clear Enable Bit 974" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973 ,Set/Clear Enable Bit 973" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB972 ,Set/Clear Enable Bit 972" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB971 ,Set/Clear Enable Bit 971" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970 ,Set/Clear Enable Bit 970" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB969 ,Set/Clear Enable Bit 969" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB968 ,Set/Clear Enable Bit 968" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967 ,Set/Clear Enable Bit 967" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB966 ,Set/Clear Enable Bit 966" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB965 ,Set/Clear Enable Bit 965" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964 ,Set/Clear Enable Bit 964" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB963 ,Set/Clear Enable Bit 963" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB962 ,Set/Clear Enable Bit 962" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961 ,Set/Clear Enable Bit 961" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB960 ,Set/Clear Enable Bit 960" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0178++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)==0x1F)
|
|
group.long 0x017C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB1019 ,Set/Clear Enable Bit 1019" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB1018 ,Set/Clear Enable Bit 1018" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB1017 ,Set/Clear Enable Bit 1017" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB1016 ,Set/Clear Enable Bit 1016" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB1015 ,Set/Clear Enable Bit 1015" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB1014 ,Set/Clear Enable Bit 1014" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB1013 ,Set/Clear Enable Bit 1013" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB1012 ,Set/Clear Enable Bit 1012" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB1011 ,Set/Clear Enable Bit 1011" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB1010 ,Set/Clear Enable Bit 1010" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB1009 ,Set/Clear Enable Bit 1009" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB1008 ,Set/Clear Enable Bit 1008" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB1007 ,Set/Clear Enable Bit 1007" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB1006 ,Set/Clear Enable Bit 1006" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB1005 ,Set/Clear Enable Bit 1005" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB1004 ,Set/Clear Enable Bit 1004" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB1003 ,Set/Clear Enable Bit 1003" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB1002 ,Set/Clear Enable Bit 1002" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB1001 ,Set/Clear Enable Bit 1001" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB1000 ,Set/Clear Enable Bit 1000" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB999 ,Set/Clear Enable Bit 999" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB998 ,Set/Clear Enable Bit 998" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB997 ,Set/Clear Enable Bit 997" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB996 ,Set/Clear Enable Bit 996" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB995 ,Set/Clear Enable Bit 995" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB994 ,Set/Clear Enable Bit 994" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB993 ,Set/Clear Enable Bit 993" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB992 ,Set/Clear Enable Bit 992" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x017C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 22.
|
|
tree "Set/Clear Pending Registers"
|
|
group.long 0x0200++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31 ,Set/Clear Pending Bit 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND30 ,Set/Clear Pending Bit 30" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND29 ,Set/Clear Pending Bit 29" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28 ,Set/Clear Pending Bit 28" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND27 ,Set/Clear Pending Bit 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND26 ,Set/Clear Pending Bit 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25 ,Set/Clear Pending Bit 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND24 ,Set/Clear Pending Bit 24" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND23 ,Set/Clear Pending Bit 23" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22 ,Set/Clear Pending Bit 22" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND21 ,Set/Clear Pending Bit 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND20 ,Set/Clear Pending Bit 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19 ,Set/Clear Pending Bit 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND18 ,Set/Clear Pending Bit 18" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND17 ,Set/Clear Pending Bit 17" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16 ,Set/Clear Pending Bit 16" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND15 ,Set/Clear Pending Bit 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND14 ,Set/Clear Pending Bit 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13 ,Set/Clear Pending Bit 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND12 ,Set/Clear Pending Bit 12" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND11 ,Set/Clear Pending Bit 11" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10 ,Set/Clear Pending Bit 10" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND9 ,Set/Clear Pending Bit 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND8 ,Set/Clear Pending Bit 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7 ,Set/Clear Pending Bit 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND6 ,Set/Clear Pending Bit 6" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND5 ,Set/Clear Pending Bit 5" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4 ,Set/Clear Pending Bit 4" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND3 ,Set/Clear Pending Bit 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND2 ,Set/Clear Pending Bit 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1 ,Set/Clear Pending Bit 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND0 ,Set/Clear Pending Bit 0" "Disabled,Enabled"
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x0204++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63 ,Set/Clear Pending Bit 63" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND62 ,Set/Clear Pending Bit 62" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND61 ,Set/Clear Pending Bit 61" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60 ,Set/Clear Pending Bit 60" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND59 ,Set/Clear Pending Bit 59" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND58 ,Set/Clear Pending Bit 58" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57 ,Set/Clear Pending Bit 57" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND56 ,Set/Clear Pending Bit 56" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND55 ,Set/Clear Pending Bit 55" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54 ,Set/Clear Pending Bit 54" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND53 ,Set/Clear Pending Bit 53" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND52 ,Set/Clear Pending Bit 52" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51 ,Set/Clear Pending Bit 51" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND50 ,Set/Clear Pending Bit 50" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND49 ,Set/Clear Pending Bit 49" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48 ,Set/Clear Pending Bit 48" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND47 ,Set/Clear Pending Bit 47" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND46 ,Set/Clear Pending Bit 46" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45 ,Set/Clear Pending Bit 45" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND44 ,Set/Clear Pending Bit 44" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND43 ,Set/Clear Pending Bit 43" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42 ,Set/Clear Pending Bit 42" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND41 ,Set/Clear Pending Bit 41" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND40 ,Set/Clear Pending Bit 40" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39 ,Set/Clear Pending Bit 39" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND38 ,Set/Clear Pending Bit 38" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND37 ,Set/Clear Pending Bit 37" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36 ,Set/Clear Pending Bit 36" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND35 ,Set/Clear Pending Bit 35" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND34 ,Set/Clear Pending Bit 34" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33 ,Set/Clear Pending Bit 33" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND32 ,Set/Clear Pending Bit 32" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0204++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x0208++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95 ,Set/Clear Pending Bit 95" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND94 ,Set/Clear Pending Bit 94" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND93 ,Set/Clear Pending Bit 93" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92 ,Set/Clear Pending Bit 92" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND91 ,Set/Clear Pending Bit 91" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND90 ,Set/Clear Pending Bit 90" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89 ,Set/Clear Pending Bit 89" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND88 ,Set/Clear Pending Bit 88" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND87 ,Set/Clear Pending Bit 87" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86 ,Set/Clear Pending Bit 86" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND85 ,Set/Clear Pending Bit 85" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND84 ,Set/Clear Pending Bit 84" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83 ,Set/Clear Pending Bit 83" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND82 ,Set/Clear Pending Bit 82" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND81 ,Set/Clear Pending Bit 81" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80 ,Set/Clear Pending Bit 80" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND79 ,Set/Clear Pending Bit 79" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND78 ,Set/Clear Pending Bit 78" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77 ,Set/Clear Pending Bit 77" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND76 ,Set/Clear Pending Bit 76" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND75 ,Set/Clear Pending Bit 75" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74 ,Set/Clear Pending Bit 74" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND73 ,Set/Clear Pending Bit 73" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND72 ,Set/Clear Pending Bit 72" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71 ,Set/Clear Pending Bit 71" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND70 ,Set/Clear Pending Bit 70" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND69 ,Set/Clear Pending Bit 69" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68 ,Set/Clear Pending Bit 68" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND67 ,Set/Clear Pending Bit 67" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND66 ,Set/Clear Pending Bit 66" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65 ,Set/Clear Pending Bit 65" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND64 ,Set/Clear Pending Bit 64" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0208++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x020C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127 ,Set/Clear Pending Bit 127" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND126 ,Set/Clear Pending Bit 126" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND125 ,Set/Clear Pending Bit 125" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124 ,Set/Clear Pending Bit 124" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND123 ,Set/Clear Pending Bit 123" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND122 ,Set/Clear Pending Bit 122" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121 ,Set/Clear Pending Bit 121" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND120 ,Set/Clear Pending Bit 120" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND119 ,Set/Clear Pending Bit 119" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118 ,Set/Clear Pending Bit 118" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND117 ,Set/Clear Pending Bit 117" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND116 ,Set/Clear Pending Bit 116" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115 ,Set/Clear Pending Bit 115" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND114 ,Set/Clear Pending Bit 114" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND113 ,Set/Clear Pending Bit 113" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112 ,Set/Clear Pending Bit 112" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND111 ,Set/Clear Pending Bit 111" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND110 ,Set/Clear Pending Bit 110" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109 ,Set/Clear Pending Bit 109" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND108 ,Set/Clear Pending Bit 108" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND107 ,Set/Clear Pending Bit 107" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106 ,Set/Clear Pending Bit 106" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND105 ,Set/Clear Pending Bit 105" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND104 ,Set/Clear Pending Bit 104" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103 ,Set/Clear Pending Bit 103" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND102 ,Set/Clear Pending Bit 102" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND101 ,Set/Clear Pending Bit 101" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100 ,Set/Clear Pending Bit 100" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND99 ,Set/Clear Pending Bit 99" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND98 ,Set/Clear Pending Bit 98" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97 ,Set/Clear Pending Bit 97" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND96 ,Set/Clear Pending Bit 96" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x020C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x0210++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159 ,Set/Clear Pending Bit 159" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND158 ,Set/Clear Pending Bit 158" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND157 ,Set/Clear Pending Bit 157" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156 ,Set/Clear Pending Bit 156" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND155 ,Set/Clear Pending Bit 155" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND154 ,Set/Clear Pending Bit 154" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153 ,Set/Clear Pending Bit 153" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND152 ,Set/Clear Pending Bit 152" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND151 ,Set/Clear Pending Bit 151" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150 ,Set/Clear Pending Bit 150" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND149 ,Set/Clear Pending Bit 149" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND148 ,Set/Clear Pending Bit 148" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147 ,Set/Clear Pending Bit 147" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND146 ,Set/Clear Pending Bit 146" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND145 ,Set/Clear Pending Bit 145" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144 ,Set/Clear Pending Bit 144" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND143 ,Set/Clear Pending Bit 143" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND142 ,Set/Clear Pending Bit 142" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141 ,Set/Clear Pending Bit 141" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND140 ,Set/Clear Pending Bit 140" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND139 ,Set/Clear Pending Bit 139" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138 ,Set/Clear Pending Bit 138" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND137 ,Set/Clear Pending Bit 137" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND136 ,Set/Clear Pending Bit 136" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135 ,Set/Clear Pending Bit 135" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND134 ,Set/Clear Pending Bit 134" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND133 ,Set/Clear Pending Bit 133" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132 ,Set/Clear Pending Bit 132" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND131 ,Set/Clear Pending Bit 131" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND130 ,Set/Clear Pending Bit 130" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129 ,Set/Clear Pending Bit 129" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND128 ,Set/Clear Pending Bit 128" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0210++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x0214++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191 ,Set/Clear Pending Bit 191" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND190 ,Set/Clear Pending Bit 190" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND189 ,Set/Clear Pending Bit 189" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188 ,Set/Clear Pending Bit 188" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND187 ,Set/Clear Pending Bit 187" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND186 ,Set/Clear Pending Bit 186" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185 ,Set/Clear Pending Bit 185" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND184 ,Set/Clear Pending Bit 184" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND183 ,Set/Clear Pending Bit 183" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182 ,Set/Clear Pending Bit 182" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND181 ,Set/Clear Pending Bit 181" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND180 ,Set/Clear Pending Bit 180" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179 ,Set/Clear Pending Bit 179" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND178 ,Set/Clear Pending Bit 178" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND177 ,Set/Clear Pending Bit 177" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176 ,Set/Clear Pending Bit 176" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND175 ,Set/Clear Pending Bit 175" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND174 ,Set/Clear Pending Bit 174" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173 ,Set/Clear Pending Bit 173" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND172 ,Set/Clear Pending Bit 172" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND171 ,Set/Clear Pending Bit 171" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170 ,Set/Clear Pending Bit 170" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND169 ,Set/Clear Pending Bit 169" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND168 ,Set/Clear Pending Bit 168" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167 ,Set/Clear Pending Bit 167" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND166 ,Set/Clear Pending Bit 166" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND165 ,Set/Clear Pending Bit 165" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164 ,Set/Clear Pending Bit 164" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND163 ,Set/Clear Pending Bit 163" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND162 ,Set/Clear Pending Bit 162" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161 ,Set/Clear Pending Bit 161" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND160 ,Set/Clear Pending Bit 160" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0214++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x0218++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223 ,Set/Clear Pending Bit 223" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND222 ,Set/Clear Pending Bit 222" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND221 ,Set/Clear Pending Bit 221" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220 ,Set/Clear Pending Bit 220" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND219 ,Set/Clear Pending Bit 219" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND218 ,Set/Clear Pending Bit 218" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217 ,Set/Clear Pending Bit 217" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND216 ,Set/Clear Pending Bit 216" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND215 ,Set/Clear Pending Bit 215" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214 ,Set/Clear Pending Bit 214" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND213 ,Set/Clear Pending Bit 213" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND212 ,Set/Clear Pending Bit 212" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211 ,Set/Clear Pending Bit 211" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND210 ,Set/Clear Pending Bit 210" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND209 ,Set/Clear Pending Bit 209" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208 ,Set/Clear Pending Bit 208" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND207 ,Set/Clear Pending Bit 207" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND206 ,Set/Clear Pending Bit 206" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205 ,Set/Clear Pending Bit 205" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND204 ,Set/Clear Pending Bit 204" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND203 ,Set/Clear Pending Bit 203" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202 ,Set/Clear Pending Bit 202" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND201 ,Set/Clear Pending Bit 201" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND200 ,Set/Clear Pending Bit 200" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199 ,Set/Clear Pending Bit 199" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND198 ,Set/Clear Pending Bit 198" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND197 ,Set/Clear Pending Bit 197" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196 ,Set/Clear Pending Bit 196" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND195 ,Set/Clear Pending Bit 195" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND194 ,Set/Clear Pending Bit 194" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193 ,Set/Clear Pending Bit 193" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND192 ,Set/Clear Pending Bit 192" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0218++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x021C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255 ,Set/Clear Pending Bit 255" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND254 ,Set/Clear Pending Bit 254" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND253 ,Set/Clear Pending Bit 253" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252 ,Set/Clear Pending Bit 252" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND251 ,Set/Clear Pending Bit 251" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND250 ,Set/Clear Pending Bit 250" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249 ,Set/Clear Pending Bit 249" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND248 ,Set/Clear Pending Bit 248" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND247 ,Set/Clear Pending Bit 247" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246 ,Set/Clear Pending Bit 246" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND245 ,Set/Clear Pending Bit 245" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND244 ,Set/Clear Pending Bit 244" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243 ,Set/Clear Pending Bit 243" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND242 ,Set/Clear Pending Bit 242" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND241 ,Set/Clear Pending Bit 241" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240 ,Set/Clear Pending Bit 240" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND239 ,Set/Clear Pending Bit 239" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND238 ,Set/Clear Pending Bit 238" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237 ,Set/Clear Pending Bit 237" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND236 ,Set/Clear Pending Bit 236" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND235 ,Set/Clear Pending Bit 235" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234 ,Set/Clear Pending Bit 234" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND233 ,Set/Clear Pending Bit 233" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND232 ,Set/Clear Pending Bit 232" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231 ,Set/Clear Pending Bit 231" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND230 ,Set/Clear Pending Bit 230" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND229 ,Set/Clear Pending Bit 229" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228 ,Set/Clear Pending Bit 228" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND227 ,Set/Clear Pending Bit 227" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND226 ,Set/Clear Pending Bit 226" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225 ,Set/Clear Pending Bit 225" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND224 ,Set/Clear Pending Bit 224" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x021C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x0220++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287 ,Set/Clear Pending Bit 287" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND286 ,Set/Clear Pending Bit 286" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND285 ,Set/Clear Pending Bit 285" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284 ,Set/Clear Pending Bit 284" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND283 ,Set/Clear Pending Bit 283" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND282 ,Set/Clear Pending Bit 282" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281 ,Set/Clear Pending Bit 281" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND280 ,Set/Clear Pending Bit 280" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND279 ,Set/Clear Pending Bit 279" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278 ,Set/Clear Pending Bit 278" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND277 ,Set/Clear Pending Bit 277" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND276 ,Set/Clear Pending Bit 276" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275 ,Set/Clear Pending Bit 275" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND274 ,Set/Clear Pending Bit 274" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND273 ,Set/Clear Pending Bit 273" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272 ,Set/Clear Pending Bit 272" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND271 ,Set/Clear Pending Bit 271" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND270 ,Set/Clear Pending Bit 270" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269 ,Set/Clear Pending Bit 269" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND268 ,Set/Clear Pending Bit 268" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND267 ,Set/Clear Pending Bit 267" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266 ,Set/Clear Pending Bit 266" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND265 ,Set/Clear Pending Bit 265" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND264 ,Set/Clear Pending Bit 264" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263 ,Set/Clear Pending Bit 263" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND262 ,Set/Clear Pending Bit 262" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND261 ,Set/Clear Pending Bit 261" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260 ,Set/Clear Pending Bit 260" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND259 ,Set/Clear Pending Bit 259" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND258 ,Set/Clear Pending Bit 258" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257 ,Set/Clear Pending Bit 257" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND256 ,Set/Clear Pending Bit 256" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0220++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x0224++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319 ,Set/Clear Pending Bit 319" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND318 ,Set/Clear Pending Bit 318" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND317 ,Set/Clear Pending Bit 317" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316 ,Set/Clear Pending Bit 316" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND315 ,Set/Clear Pending Bit 315" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND314 ,Set/Clear Pending Bit 314" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313 ,Set/Clear Pending Bit 313" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND312 ,Set/Clear Pending Bit 312" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND311 ,Set/Clear Pending Bit 311" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310 ,Set/Clear Pending Bit 310" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND309 ,Set/Clear Pending Bit 309" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND308 ,Set/Clear Pending Bit 308" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307 ,Set/Clear Pending Bit 307" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND306 ,Set/Clear Pending Bit 306" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND305 ,Set/Clear Pending Bit 305" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304 ,Set/Clear Pending Bit 304" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND303 ,Set/Clear Pending Bit 303" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND302 ,Set/Clear Pending Bit 302" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301 ,Set/Clear Pending Bit 301" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND300 ,Set/Clear Pending Bit 300" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND299 ,Set/Clear Pending Bit 299" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298 ,Set/Clear Pending Bit 298" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND297 ,Set/Clear Pending Bit 297" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND296 ,Set/Clear Pending Bit 296" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295 ,Set/Clear Pending Bit 295" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND294 ,Set/Clear Pending Bit 294" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND293 ,Set/Clear Pending Bit 293" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292 ,Set/Clear Pending Bit 292" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND291 ,Set/Clear Pending Bit 291" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND290 ,Set/Clear Pending Bit 290" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289 ,Set/Clear Pending Bit 289" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND288 ,Set/Clear Pending Bit 288" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0224++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x0228++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351 ,Set/Clear Pending Bit 351" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND350 ,Set/Clear Pending Bit 350" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND349 ,Set/Clear Pending Bit 349" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348 ,Set/Clear Pending Bit 348" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND347 ,Set/Clear Pending Bit 347" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND346 ,Set/Clear Pending Bit 346" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345 ,Set/Clear Pending Bit 345" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND344 ,Set/Clear Pending Bit 344" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND343 ,Set/Clear Pending Bit 343" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342 ,Set/Clear Pending Bit 342" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND341 ,Set/Clear Pending Bit 341" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND340 ,Set/Clear Pending Bit 340" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339 ,Set/Clear Pending Bit 339" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND338 ,Set/Clear Pending Bit 338" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND337 ,Set/Clear Pending Bit 337" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336 ,Set/Clear Pending Bit 336" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND335 ,Set/Clear Pending Bit 335" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND334 ,Set/Clear Pending Bit 334" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333 ,Set/Clear Pending Bit 333" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND332 ,Set/Clear Pending Bit 332" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND331 ,Set/Clear Pending Bit 331" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330 ,Set/Clear Pending Bit 330" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND329 ,Set/Clear Pending Bit 329" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND328 ,Set/Clear Pending Bit 328" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327 ,Set/Clear Pending Bit 327" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND326 ,Set/Clear Pending Bit 326" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND325 ,Set/Clear Pending Bit 325" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324 ,Set/Clear Pending Bit 324" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND323 ,Set/Clear Pending Bit 323" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND322 ,Set/Clear Pending Bit 322" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321 ,Set/Clear Pending Bit 321" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND320 ,Set/Clear Pending Bit 320" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0228++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x022C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383 ,Set/Clear Pending Bit 383" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND382 ,Set/Clear Pending Bit 382" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND381 ,Set/Clear Pending Bit 381" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380 ,Set/Clear Pending Bit 380" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND379 ,Set/Clear Pending Bit 379" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND378 ,Set/Clear Pending Bit 378" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377 ,Set/Clear Pending Bit 377" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND376 ,Set/Clear Pending Bit 376" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND375 ,Set/Clear Pending Bit 375" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374 ,Set/Clear Pending Bit 374" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND373 ,Set/Clear Pending Bit 373" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND372 ,Set/Clear Pending Bit 372" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371 ,Set/Clear Pending Bit 371" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND370 ,Set/Clear Pending Bit 370" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND369 ,Set/Clear Pending Bit 369" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368 ,Set/Clear Pending Bit 368" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND367 ,Set/Clear Pending Bit 367" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND366 ,Set/Clear Pending Bit 366" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365 ,Set/Clear Pending Bit 365" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND364 ,Set/Clear Pending Bit 364" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND363 ,Set/Clear Pending Bit 363" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362 ,Set/Clear Pending Bit 362" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND361 ,Set/Clear Pending Bit 361" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND360 ,Set/Clear Pending Bit 360" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359 ,Set/Clear Pending Bit 359" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND358 ,Set/Clear Pending Bit 358" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND357 ,Set/Clear Pending Bit 357" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356 ,Set/Clear Pending Bit 356" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND355 ,Set/Clear Pending Bit 355" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND354 ,Set/Clear Pending Bit 354" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353 ,Set/Clear Pending Bit 353" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND352 ,Set/Clear Pending Bit 352" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x022C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x0230++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415 ,Set/Clear Pending Bit 415" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND414 ,Set/Clear Pending Bit 414" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND413 ,Set/Clear Pending Bit 413" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412 ,Set/Clear Pending Bit 412" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND411 ,Set/Clear Pending Bit 411" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND410 ,Set/Clear Pending Bit 410" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409 ,Set/Clear Pending Bit 409" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND408 ,Set/Clear Pending Bit 408" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND407 ,Set/Clear Pending Bit 407" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406 ,Set/Clear Pending Bit 406" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND405 ,Set/Clear Pending Bit 405" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND404 ,Set/Clear Pending Bit 404" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403 ,Set/Clear Pending Bit 403" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND402 ,Set/Clear Pending Bit 402" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND401 ,Set/Clear Pending Bit 401" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400 ,Set/Clear Pending Bit 400" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND399 ,Set/Clear Pending Bit 399" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND398 ,Set/Clear Pending Bit 398" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397 ,Set/Clear Pending Bit 397" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND396 ,Set/Clear Pending Bit 396" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND395 ,Set/Clear Pending Bit 395" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394 ,Set/Clear Pending Bit 394" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND393 ,Set/Clear Pending Bit 393" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND392 ,Set/Clear Pending Bit 392" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391 ,Set/Clear Pending Bit 391" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND390 ,Set/Clear Pending Bit 390" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND389 ,Set/Clear Pending Bit 389" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388 ,Set/Clear Pending Bit 388" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND387 ,Set/Clear Pending Bit 387" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND386 ,Set/Clear Pending Bit 386" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385 ,Set/Clear Pending Bit 385" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND384 ,Set/Clear Pending Bit 384" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0230++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x0234++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447 ,Set/Clear Pending Bit 447" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND446 ,Set/Clear Pending Bit 446" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND445 ,Set/Clear Pending Bit 445" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444 ,Set/Clear Pending Bit 444" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND443 ,Set/Clear Pending Bit 443" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND442 ,Set/Clear Pending Bit 442" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441 ,Set/Clear Pending Bit 441" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND440 ,Set/Clear Pending Bit 440" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND439 ,Set/Clear Pending Bit 439" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438 ,Set/Clear Pending Bit 438" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND437 ,Set/Clear Pending Bit 437" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND436 ,Set/Clear Pending Bit 436" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435 ,Set/Clear Pending Bit 435" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND434 ,Set/Clear Pending Bit 434" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND433 ,Set/Clear Pending Bit 433" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432 ,Set/Clear Pending Bit 432" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND431 ,Set/Clear Pending Bit 431" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND430 ,Set/Clear Pending Bit 430" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429 ,Set/Clear Pending Bit 429" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND428 ,Set/Clear Pending Bit 428" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND427 ,Set/Clear Pending Bit 427" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426 ,Set/Clear Pending Bit 426" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND425 ,Set/Clear Pending Bit 425" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND424 ,Set/Clear Pending Bit 424" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423 ,Set/Clear Pending Bit 423" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND422 ,Set/Clear Pending Bit 422" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND421 ,Set/Clear Pending Bit 421" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420 ,Set/Clear Pending Bit 420" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND419 ,Set/Clear Pending Bit 419" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND418 ,Set/Clear Pending Bit 418" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417 ,Set/Clear Pending Bit 417" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND416 ,Set/Clear Pending Bit 416" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0234++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x0238++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479 ,Set/Clear Pending Bit 479" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND478 ,Set/Clear Pending Bit 478" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND477 ,Set/Clear Pending Bit 477" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476 ,Set/Clear Pending Bit 476" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND475 ,Set/Clear Pending Bit 475" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND474 ,Set/Clear Pending Bit 474" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473 ,Set/Clear Pending Bit 473" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND472 ,Set/Clear Pending Bit 472" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND471 ,Set/Clear Pending Bit 471" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470 ,Set/Clear Pending Bit 470" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND469 ,Set/Clear Pending Bit 469" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND468 ,Set/Clear Pending Bit 468" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467 ,Set/Clear Pending Bit 467" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND466 ,Set/Clear Pending Bit 466" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND465 ,Set/Clear Pending Bit 465" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464 ,Set/Clear Pending Bit 464" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND463 ,Set/Clear Pending Bit 463" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND462 ,Set/Clear Pending Bit 462" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461 ,Set/Clear Pending Bit 461" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND460 ,Set/Clear Pending Bit 460" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND459 ,Set/Clear Pending Bit 459" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458 ,Set/Clear Pending Bit 458" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND457 ,Set/Clear Pending Bit 457" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND456 ,Set/Clear Pending Bit 456" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455 ,Set/Clear Pending Bit 455" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND454 ,Set/Clear Pending Bit 454" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND453 ,Set/Clear Pending Bit 453" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452 ,Set/Clear Pending Bit 452" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND451 ,Set/Clear Pending Bit 451" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND450 ,Set/Clear Pending Bit 450" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449 ,Set/Clear Pending Bit 449" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND448 ,Set/Clear Pending Bit 448" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0238++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x023C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511 ,Set/Clear Pending Bit 511" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND510 ,Set/Clear Pending Bit 510" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND509 ,Set/Clear Pending Bit 509" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508 ,Set/Clear Pending Bit 508" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND507 ,Set/Clear Pending Bit 507" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND506 ,Set/Clear Pending Bit 506" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505 ,Set/Clear Pending Bit 505" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND504 ,Set/Clear Pending Bit 504" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND503 ,Set/Clear Pending Bit 503" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502 ,Set/Clear Pending Bit 502" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND501 ,Set/Clear Pending Bit 501" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND500 ,Set/Clear Pending Bit 500" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499 ,Set/Clear Pending Bit 499" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND498 ,Set/Clear Pending Bit 498" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND497 ,Set/Clear Pending Bit 497" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496 ,Set/Clear Pending Bit 496" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND495 ,Set/Clear Pending Bit 495" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND494 ,Set/Clear Pending Bit 494" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493 ,Set/Clear Pending Bit 493" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND492 ,Set/Clear Pending Bit 492" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND491 ,Set/Clear Pending Bit 491" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490 ,Set/Clear Pending Bit 490" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND489 ,Set/Clear Pending Bit 489" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND488 ,Set/Clear Pending Bit 488" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487 ,Set/Clear Pending Bit 487" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND486 ,Set/Clear Pending Bit 486" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND485 ,Set/Clear Pending Bit 485" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484 ,Set/Clear Pending Bit 484" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND483 ,Set/Clear Pending Bit 483" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND482 ,Set/Clear Pending Bit 482" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481 ,Set/Clear Pending Bit 481" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND480 ,Set/Clear Pending Bit 480" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x023C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x0240++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543 ,Set/Clear Pending Bit 543" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND542 ,Set/Clear Pending Bit 542" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND541 ,Set/Clear Pending Bit 541" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540 ,Set/Clear Pending Bit 540" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND539 ,Set/Clear Pending Bit 539" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND538 ,Set/Clear Pending Bit 538" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537 ,Set/Clear Pending Bit 537" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND536 ,Set/Clear Pending Bit 536" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND535 ,Set/Clear Pending Bit 535" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534 ,Set/Clear Pending Bit 534" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND533 ,Set/Clear Pending Bit 533" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND532 ,Set/Clear Pending Bit 532" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531 ,Set/Clear Pending Bit 531" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND530 ,Set/Clear Pending Bit 530" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND529 ,Set/Clear Pending Bit 529" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528 ,Set/Clear Pending Bit 528" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND527 ,Set/Clear Pending Bit 527" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND526 ,Set/Clear Pending Bit 526" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525 ,Set/Clear Pending Bit 525" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND524 ,Set/Clear Pending Bit 524" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND523 ,Set/Clear Pending Bit 523" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522 ,Set/Clear Pending Bit 522" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND521 ,Set/Clear Pending Bit 521" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND520 ,Set/Clear Pending Bit 520" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519 ,Set/Clear Pending Bit 519" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND518 ,Set/Clear Pending Bit 518" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND517 ,Set/Clear Pending Bit 517" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516 ,Set/Clear Pending Bit 516" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND515 ,Set/Clear Pending Bit 515" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND514 ,Set/Clear Pending Bit 514" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513 ,Set/Clear Pending Bit 513" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND512 ,Set/Clear Pending Bit 512" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0240++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x0244++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575 ,Set/Clear Pending Bit 575" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND574 ,Set/Clear Pending Bit 574" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND573 ,Set/Clear Pending Bit 573" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572 ,Set/Clear Pending Bit 572" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND571 ,Set/Clear Pending Bit 571" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND570 ,Set/Clear Pending Bit 570" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569 ,Set/Clear Pending Bit 569" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND568 ,Set/Clear Pending Bit 568" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND567 ,Set/Clear Pending Bit 567" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566 ,Set/Clear Pending Bit 566" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND565 ,Set/Clear Pending Bit 565" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND564 ,Set/Clear Pending Bit 564" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563 ,Set/Clear Pending Bit 563" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND562 ,Set/Clear Pending Bit 562" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND561 ,Set/Clear Pending Bit 561" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560 ,Set/Clear Pending Bit 560" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND559 ,Set/Clear Pending Bit 559" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND558 ,Set/Clear Pending Bit 558" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557 ,Set/Clear Pending Bit 557" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND556 ,Set/Clear Pending Bit 556" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND555 ,Set/Clear Pending Bit 555" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554 ,Set/Clear Pending Bit 554" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND553 ,Set/Clear Pending Bit 553" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND552 ,Set/Clear Pending Bit 552" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551 ,Set/Clear Pending Bit 551" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND550 ,Set/Clear Pending Bit 550" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND549 ,Set/Clear Pending Bit 549" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548 ,Set/Clear Pending Bit 548" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND547 ,Set/Clear Pending Bit 547" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND546 ,Set/Clear Pending Bit 546" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545 ,Set/Clear Pending Bit 545" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND544 ,Set/Clear Pending Bit 544" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0244++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x0248++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607 ,Set/Clear Pending Bit 607" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND606 ,Set/Clear Pending Bit 606" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND605 ,Set/Clear Pending Bit 605" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604 ,Set/Clear Pending Bit 604" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND603 ,Set/Clear Pending Bit 603" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND602 ,Set/Clear Pending Bit 602" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601 ,Set/Clear Pending Bit 601" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND600 ,Set/Clear Pending Bit 600" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND599 ,Set/Clear Pending Bit 599" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598 ,Set/Clear Pending Bit 598" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND597 ,Set/Clear Pending Bit 597" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND596 ,Set/Clear Pending Bit 596" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595 ,Set/Clear Pending Bit 595" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND594 ,Set/Clear Pending Bit 594" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND593 ,Set/Clear Pending Bit 593" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592 ,Set/Clear Pending Bit 592" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND591 ,Set/Clear Pending Bit 591" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND590 ,Set/Clear Pending Bit 590" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589 ,Set/Clear Pending Bit 589" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND588 ,Set/Clear Pending Bit 588" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND587 ,Set/Clear Pending Bit 587" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586 ,Set/Clear Pending Bit 586" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND585 ,Set/Clear Pending Bit 585" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND584 ,Set/Clear Pending Bit 584" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583 ,Set/Clear Pending Bit 583" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND582 ,Set/Clear Pending Bit 582" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND581 ,Set/Clear Pending Bit 581" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580 ,Set/Clear Pending Bit 580" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND579 ,Set/Clear Pending Bit 579" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND578 ,Set/Clear Pending Bit 578" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577 ,Set/Clear Pending Bit 577" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND576 ,Set/Clear Pending Bit 576" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0248++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x024C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639 ,Set/Clear Pending Bit 639" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND638 ,Set/Clear Pending Bit 638" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND637 ,Set/Clear Pending Bit 637" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636 ,Set/Clear Pending Bit 636" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND635 ,Set/Clear Pending Bit 635" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND634 ,Set/Clear Pending Bit 634" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633 ,Set/Clear Pending Bit 633" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND632 ,Set/Clear Pending Bit 632" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND631 ,Set/Clear Pending Bit 631" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630 ,Set/Clear Pending Bit 630" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND629 ,Set/Clear Pending Bit 629" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND628 ,Set/Clear Pending Bit 628" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627 ,Set/Clear Pending Bit 627" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND626 ,Set/Clear Pending Bit 626" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND625 ,Set/Clear Pending Bit 625" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624 ,Set/Clear Pending Bit 624" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND623 ,Set/Clear Pending Bit 623" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND622 ,Set/Clear Pending Bit 622" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621 ,Set/Clear Pending Bit 621" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND620 ,Set/Clear Pending Bit 620" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND619 ,Set/Clear Pending Bit 619" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618 ,Set/Clear Pending Bit 618" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND617 ,Set/Clear Pending Bit 617" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND616 ,Set/Clear Pending Bit 616" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615 ,Set/Clear Pending Bit 615" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND614 ,Set/Clear Pending Bit 614" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND613 ,Set/Clear Pending Bit 613" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612 ,Set/Clear Pending Bit 612" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND611 ,Set/Clear Pending Bit 611" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND610 ,Set/Clear Pending Bit 610" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609 ,Set/Clear Pending Bit 609" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND608 ,Set/Clear Pending Bit 608" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x024C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x0250++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671 ,Set/Clear Pending Bit 671" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND670 ,Set/Clear Pending Bit 670" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND669 ,Set/Clear Pending Bit 669" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668 ,Set/Clear Pending Bit 668" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND667 ,Set/Clear Pending Bit 667" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND666 ,Set/Clear Pending Bit 666" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665 ,Set/Clear Pending Bit 665" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND664 ,Set/Clear Pending Bit 664" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND663 ,Set/Clear Pending Bit 663" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662 ,Set/Clear Pending Bit 662" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND661 ,Set/Clear Pending Bit 661" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND660 ,Set/Clear Pending Bit 660" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659 ,Set/Clear Pending Bit 659" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND658 ,Set/Clear Pending Bit 658" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND657 ,Set/Clear Pending Bit 657" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656 ,Set/Clear Pending Bit 656" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND655 ,Set/Clear Pending Bit 655" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND654 ,Set/Clear Pending Bit 654" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653 ,Set/Clear Pending Bit 653" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND652 ,Set/Clear Pending Bit 652" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND651 ,Set/Clear Pending Bit 651" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650 ,Set/Clear Pending Bit 650" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND649 ,Set/Clear Pending Bit 649" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND648 ,Set/Clear Pending Bit 648" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647 ,Set/Clear Pending Bit 647" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND646 ,Set/Clear Pending Bit 646" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND645 ,Set/Clear Pending Bit 645" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644 ,Set/Clear Pending Bit 644" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND643 ,Set/Clear Pending Bit 643" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND642 ,Set/Clear Pending Bit 642" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641 ,Set/Clear Pending Bit 641" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND640 ,Set/Clear Pending Bit 640" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0250++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x0254++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703 ,Set/Clear Pending Bit 703" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND702 ,Set/Clear Pending Bit 702" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND701 ,Set/Clear Pending Bit 701" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700 ,Set/Clear Pending Bit 700" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND699 ,Set/Clear Pending Bit 699" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND698 ,Set/Clear Pending Bit 698" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697 ,Set/Clear Pending Bit 697" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND696 ,Set/Clear Pending Bit 696" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND695 ,Set/Clear Pending Bit 695" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694 ,Set/Clear Pending Bit 694" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND693 ,Set/Clear Pending Bit 693" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND692 ,Set/Clear Pending Bit 692" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691 ,Set/Clear Pending Bit 691" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND690 ,Set/Clear Pending Bit 690" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND689 ,Set/Clear Pending Bit 689" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688 ,Set/Clear Pending Bit 688" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND687 ,Set/Clear Pending Bit 687" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND686 ,Set/Clear Pending Bit 686" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685 ,Set/Clear Pending Bit 685" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND684 ,Set/Clear Pending Bit 684" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND683 ,Set/Clear Pending Bit 683" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682 ,Set/Clear Pending Bit 682" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND681 ,Set/Clear Pending Bit 681" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND680 ,Set/Clear Pending Bit 680" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679 ,Set/Clear Pending Bit 679" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND678 ,Set/Clear Pending Bit 678" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND677 ,Set/Clear Pending Bit 677" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676 ,Set/Clear Pending Bit 676" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND675 ,Set/Clear Pending Bit 675" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND674 ,Set/Clear Pending Bit 674" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673 ,Set/Clear Pending Bit 673" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND672 ,Set/Clear Pending Bit 672" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0254++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x0258++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735 ,Set/Clear Pending Bit 735" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND734 ,Set/Clear Pending Bit 734" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND733 ,Set/Clear Pending Bit 733" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732 ,Set/Clear Pending Bit 732" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND731 ,Set/Clear Pending Bit 731" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND730 ,Set/Clear Pending Bit 730" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729 ,Set/Clear Pending Bit 729" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND728 ,Set/Clear Pending Bit 728" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND727 ,Set/Clear Pending Bit 727" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726 ,Set/Clear Pending Bit 726" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND725 ,Set/Clear Pending Bit 725" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND724 ,Set/Clear Pending Bit 724" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723 ,Set/Clear Pending Bit 723" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND722 ,Set/Clear Pending Bit 722" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND721 ,Set/Clear Pending Bit 721" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720 ,Set/Clear Pending Bit 720" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND719 ,Set/Clear Pending Bit 719" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND718 ,Set/Clear Pending Bit 718" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717 ,Set/Clear Pending Bit 717" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND716 ,Set/Clear Pending Bit 716" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND715 ,Set/Clear Pending Bit 715" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714 ,Set/Clear Pending Bit 714" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND713 ,Set/Clear Pending Bit 713" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND712 ,Set/Clear Pending Bit 712" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711 ,Set/Clear Pending Bit 711" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND710 ,Set/Clear Pending Bit 710" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND709 ,Set/Clear Pending Bit 709" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708 ,Set/Clear Pending Bit 708" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND707 ,Set/Clear Pending Bit 707" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND706 ,Set/Clear Pending Bit 706" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705 ,Set/Clear Pending Bit 705" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND704 ,Set/Clear Pending Bit 704" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0258++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x025C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767 ,Set/Clear Pending Bit 767" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND766 ,Set/Clear Pending Bit 766" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND765 ,Set/Clear Pending Bit 765" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764 ,Set/Clear Pending Bit 764" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND763 ,Set/Clear Pending Bit 763" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND762 ,Set/Clear Pending Bit 762" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761 ,Set/Clear Pending Bit 761" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND760 ,Set/Clear Pending Bit 760" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND759 ,Set/Clear Pending Bit 759" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758 ,Set/Clear Pending Bit 758" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND757 ,Set/Clear Pending Bit 757" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND756 ,Set/Clear Pending Bit 756" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755 ,Set/Clear Pending Bit 755" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND754 ,Set/Clear Pending Bit 754" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND753 ,Set/Clear Pending Bit 753" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752 ,Set/Clear Pending Bit 752" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND751 ,Set/Clear Pending Bit 751" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND750 ,Set/Clear Pending Bit 750" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749 ,Set/Clear Pending Bit 749" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND748 ,Set/Clear Pending Bit 748" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND747 ,Set/Clear Pending Bit 747" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746 ,Set/Clear Pending Bit 746" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND745 ,Set/Clear Pending Bit 745" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND744 ,Set/Clear Pending Bit 744" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743 ,Set/Clear Pending Bit 743" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND742 ,Set/Clear Pending Bit 742" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND741 ,Set/Clear Pending Bit 741" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740 ,Set/Clear Pending Bit 740" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND739 ,Set/Clear Pending Bit 739" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND738 ,Set/Clear Pending Bit 738" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737 ,Set/Clear Pending Bit 737" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND736 ,Set/Clear Pending Bit 736" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x025C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x0260++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799 ,Set/Clear Pending Bit 799" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND798 ,Set/Clear Pending Bit 798" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND797 ,Set/Clear Pending Bit 797" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796 ,Set/Clear Pending Bit 796" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND795 ,Set/Clear Pending Bit 795" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND794 ,Set/Clear Pending Bit 794" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793 ,Set/Clear Pending Bit 793" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND792 ,Set/Clear Pending Bit 792" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND791 ,Set/Clear Pending Bit 791" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790 ,Set/Clear Pending Bit 790" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND789 ,Set/Clear Pending Bit 789" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND788 ,Set/Clear Pending Bit 788" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787 ,Set/Clear Pending Bit 787" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND786 ,Set/Clear Pending Bit 786" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND785 ,Set/Clear Pending Bit 785" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784 ,Set/Clear Pending Bit 784" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND783 ,Set/Clear Pending Bit 783" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND782 ,Set/Clear Pending Bit 782" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781 ,Set/Clear Pending Bit 781" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND780 ,Set/Clear Pending Bit 780" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND779 ,Set/Clear Pending Bit 779" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778 ,Set/Clear Pending Bit 778" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND777 ,Set/Clear Pending Bit 777" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND776 ,Set/Clear Pending Bit 776" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775 ,Set/Clear Pending Bit 775" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND774 ,Set/Clear Pending Bit 774" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND773 ,Set/Clear Pending Bit 773" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772 ,Set/Clear Pending Bit 772" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND771 ,Set/Clear Pending Bit 771" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND770 ,Set/Clear Pending Bit 770" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769 ,Set/Clear Pending Bit 769" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND768 ,Set/Clear Pending Bit 768" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0260++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x0264++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831 ,Set/Clear Pending Bit 831" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND830 ,Set/Clear Pending Bit 830" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND829 ,Set/Clear Pending Bit 829" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828 ,Set/Clear Pending Bit 828" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND827 ,Set/Clear Pending Bit 827" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND826 ,Set/Clear Pending Bit 826" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825 ,Set/Clear Pending Bit 825" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND824 ,Set/Clear Pending Bit 824" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND823 ,Set/Clear Pending Bit 823" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822 ,Set/Clear Pending Bit 822" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND821 ,Set/Clear Pending Bit 821" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND820 ,Set/Clear Pending Bit 820" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819 ,Set/Clear Pending Bit 819" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND818 ,Set/Clear Pending Bit 818" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND817 ,Set/Clear Pending Bit 817" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816 ,Set/Clear Pending Bit 816" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND815 ,Set/Clear Pending Bit 815" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND814 ,Set/Clear Pending Bit 814" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813 ,Set/Clear Pending Bit 813" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND812 ,Set/Clear Pending Bit 812" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND811 ,Set/Clear Pending Bit 811" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810 ,Set/Clear Pending Bit 810" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND809 ,Set/Clear Pending Bit 809" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND808 ,Set/Clear Pending Bit 808" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807 ,Set/Clear Pending Bit 807" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND806 ,Set/Clear Pending Bit 806" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND805 ,Set/Clear Pending Bit 805" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804 ,Set/Clear Pending Bit 804" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND803 ,Set/Clear Pending Bit 803" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND802 ,Set/Clear Pending Bit 802" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801 ,Set/Clear Pending Bit 801" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND800 ,Set/Clear Pending Bit 800" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0264++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x0268++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863 ,Set/Clear Pending Bit 863" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND862 ,Set/Clear Pending Bit 862" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND861 ,Set/Clear Pending Bit 861" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860 ,Set/Clear Pending Bit 860" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND859 ,Set/Clear Pending Bit 859" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND858 ,Set/Clear Pending Bit 858" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857 ,Set/Clear Pending Bit 857" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND856 ,Set/Clear Pending Bit 856" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND855 ,Set/Clear Pending Bit 855" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854 ,Set/Clear Pending Bit 854" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND853 ,Set/Clear Pending Bit 853" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND852 ,Set/Clear Pending Bit 852" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851 ,Set/Clear Pending Bit 851" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND850 ,Set/Clear Pending Bit 850" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND849 ,Set/Clear Pending Bit 849" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848 ,Set/Clear Pending Bit 848" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND847 ,Set/Clear Pending Bit 847" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND846 ,Set/Clear Pending Bit 846" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845 ,Set/Clear Pending Bit 845" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND844 ,Set/Clear Pending Bit 844" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND843 ,Set/Clear Pending Bit 843" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842 ,Set/Clear Pending Bit 842" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND841 ,Set/Clear Pending Bit 841" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND840 ,Set/Clear Pending Bit 840" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839 ,Set/Clear Pending Bit 839" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND838 ,Set/Clear Pending Bit 838" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND837 ,Set/Clear Pending Bit 837" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836 ,Set/Clear Pending Bit 836" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND835 ,Set/Clear Pending Bit 835" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND834 ,Set/Clear Pending Bit 834" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833 ,Set/Clear Pending Bit 833" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND832 ,Set/Clear Pending Bit 832" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0268++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x026C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895 ,Set/Clear Pending Bit 895" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND894 ,Set/Clear Pending Bit 894" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND893 ,Set/Clear Pending Bit 893" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892 ,Set/Clear Pending Bit 892" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND891 ,Set/Clear Pending Bit 891" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND890 ,Set/Clear Pending Bit 890" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889 ,Set/Clear Pending Bit 889" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND888 ,Set/Clear Pending Bit 888" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND887 ,Set/Clear Pending Bit 887" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886 ,Set/Clear Pending Bit 886" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND885 ,Set/Clear Pending Bit 885" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND884 ,Set/Clear Pending Bit 884" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883 ,Set/Clear Pending Bit 883" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND882 ,Set/Clear Pending Bit 882" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND881 ,Set/Clear Pending Bit 881" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880 ,Set/Clear Pending Bit 880" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND879 ,Set/Clear Pending Bit 879" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND878 ,Set/Clear Pending Bit 878" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877 ,Set/Clear Pending Bit 877" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND876 ,Set/Clear Pending Bit 876" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND875 ,Set/Clear Pending Bit 875" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874 ,Set/Clear Pending Bit 874" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND873 ,Set/Clear Pending Bit 873" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND872 ,Set/Clear Pending Bit 872" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871 ,Set/Clear Pending Bit 871" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND870 ,Set/Clear Pending Bit 870" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND869 ,Set/Clear Pending Bit 869" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868 ,Set/Clear Pending Bit 868" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND867 ,Set/Clear Pending Bit 867" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND866 ,Set/Clear Pending Bit 866" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865 ,Set/Clear Pending Bit 865" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND864 ,Set/Clear Pending Bit 864" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x026C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x0270++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927 ,Set/Clear Pending Bit 927" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND926 ,Set/Clear Pending Bit 926" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND925 ,Set/Clear Pending Bit 925" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924 ,Set/Clear Pending Bit 924" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND923 ,Set/Clear Pending Bit 923" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND922 ,Set/Clear Pending Bit 922" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921 ,Set/Clear Pending Bit 921" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND920 ,Set/Clear Pending Bit 920" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND919 ,Set/Clear Pending Bit 919" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918 ,Set/Clear Pending Bit 918" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND917 ,Set/Clear Pending Bit 917" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND916 ,Set/Clear Pending Bit 916" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915 ,Set/Clear Pending Bit 915" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND914 ,Set/Clear Pending Bit 914" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND913 ,Set/Clear Pending Bit 913" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912 ,Set/Clear Pending Bit 912" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND911 ,Set/Clear Pending Bit 911" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND910 ,Set/Clear Pending Bit 910" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909 ,Set/Clear Pending Bit 909" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND908 ,Set/Clear Pending Bit 908" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND907 ,Set/Clear Pending Bit 907" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906 ,Set/Clear Pending Bit 906" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND905 ,Set/Clear Pending Bit 905" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND904 ,Set/Clear Pending Bit 904" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903 ,Set/Clear Pending Bit 903" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND902 ,Set/Clear Pending Bit 902" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND901 ,Set/Clear Pending Bit 901" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900 ,Set/Clear Pending Bit 900" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND899 ,Set/Clear Pending Bit 899" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND898 ,Set/Clear Pending Bit 898" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897 ,Set/Clear Pending Bit 897" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND896 ,Set/Clear Pending Bit 896" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0270++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x0274++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959 ,Set/Clear Pending Bit 959" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND958 ,Set/Clear Pending Bit 958" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND957 ,Set/Clear Pending Bit 957" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956 ,Set/Clear Pending Bit 956" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND955 ,Set/Clear Pending Bit 955" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND954 ,Set/Clear Pending Bit 954" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953 ,Set/Clear Pending Bit 953" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND952 ,Set/Clear Pending Bit 952" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND951 ,Set/Clear Pending Bit 951" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950 ,Set/Clear Pending Bit 950" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND949 ,Set/Clear Pending Bit 949" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND948 ,Set/Clear Pending Bit 948" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947 ,Set/Clear Pending Bit 947" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND946 ,Set/Clear Pending Bit 946" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND945 ,Set/Clear Pending Bit 945" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944 ,Set/Clear Pending Bit 944" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND943 ,Set/Clear Pending Bit 943" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND942 ,Set/Clear Pending Bit 942" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941 ,Set/Clear Pending Bit 941" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND940 ,Set/Clear Pending Bit 940" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND939 ,Set/Clear Pending Bit 939" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938 ,Set/Clear Pending Bit 938" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND937 ,Set/Clear Pending Bit 937" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND936 ,Set/Clear Pending Bit 936" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935 ,Set/Clear Pending Bit 935" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND934 ,Set/Clear Pending Bit 934" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND933 ,Set/Clear Pending Bit 933" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932 ,Set/Clear Pending Bit 932" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND931 ,Set/Clear Pending Bit 931" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND930 ,Set/Clear Pending Bit 930" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929 ,Set/Clear Pending Bit 929" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND928 ,Set/Clear Pending Bit 928" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0274++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x0278++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991 ,Set/Clear Pending Bit 991" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND990 ,Set/Clear Pending Bit 990" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND989 ,Set/Clear Pending Bit 989" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988 ,Set/Clear Pending Bit 988" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND987 ,Set/Clear Pending Bit 987" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND986 ,Set/Clear Pending Bit 986" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985 ,Set/Clear Pending Bit 985" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND984 ,Set/Clear Pending Bit 984" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND983 ,Set/Clear Pending Bit 983" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982 ,Set/Clear Pending Bit 982" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND981 ,Set/Clear Pending Bit 981" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND980 ,Set/Clear Pending Bit 980" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979 ,Set/Clear Pending Bit 979" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND978 ,Set/Clear Pending Bit 978" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND977 ,Set/Clear Pending Bit 977" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976 ,Set/Clear Pending Bit 976" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND975 ,Set/Clear Pending Bit 975" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND974 ,Set/Clear Pending Bit 974" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973 ,Set/Clear Pending Bit 973" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND972 ,Set/Clear Pending Bit 972" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND971 ,Set/Clear Pending Bit 971" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970 ,Set/Clear Pending Bit 970" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND969 ,Set/Clear Pending Bit 969" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND968 ,Set/Clear Pending Bit 968" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967 ,Set/Clear Pending Bit 967" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND966 ,Set/Clear Pending Bit 966" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND965 ,Set/Clear Pending Bit 965" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964 ,Set/Clear Pending Bit 964" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND963 ,Set/Clear Pending Bit 963" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND962 ,Set/Clear Pending Bit 962" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961 ,Set/Clear Pending Bit 961" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND960 ,Set/Clear Pending Bit 960" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0278++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)==0x1F)
|
|
group.long 0x027C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND1019 ,Set/Clear Pending Bit 1019" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND1018 ,Set/Clear Pending Bit 1018" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND1017 ,Set/Clear Pending Bit 1017" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND1016 ,Set/Clear Pending Bit 1016" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND1015 ,Set/Clear Pending Bit 1015" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND1014 ,Set/Clear Pending Bit 1014" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND1013 ,Set/Clear Pending Bit 1013" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND1012 ,Set/Clear Pending Bit 1012" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND1011 ,Set/Clear Pending Bit 1011" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND1010 ,Set/Clear Pending Bit 1010" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND1009 ,Set/Clear Pending Bit 1009" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND1008 ,Set/Clear Pending Bit 1008" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND1007 ,Set/Clear Pending Bit 1007" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND1006 ,Set/Clear Pending Bit 1006" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND1005 ,Set/Clear Pending Bit 1005" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND1004 ,Set/Clear Pending Bit 1004" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND1003 ,Set/Clear Pending Bit 1003" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND1002 ,Set/Clear Pending Bit 1002" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND1001 ,Set/Clear Pending Bit 1001" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND1000 ,Set/Clear Pending Bit 1000" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND999 ,Set/Clear Pending Bit 999" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND998 ,Set/Clear Pending Bit 998" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND997 ,Set/Clear Pending Bit 997" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND996 ,Set/Clear Pending Bit 996" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND995 ,Set/Clear Pending Bit 995" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND994 ,Set/Clear Pending Bit 994" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND993 ,Set/Clear Pending Bit 993" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND992 ,Set/Clear Pending Bit 992" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x027C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 24.
|
|
tree "Set/Clear Active Registers"
|
|
rgroup.long 0x0300++0x03
|
|
line.long 0x0 "GICD_ICDABR0,Active Status Register 0"
|
|
bitfld.long 0x00 31. " ASB31 ,Active Status Bit 31" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB30 ,Active Status Bit 30" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB29 ,Active Status Bit 29" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB28 ,Active Status Bit 28" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB27 ,Active Status Bit 27" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB26 ,Active Status Bit 26" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB25 ,Active Status Bit 25" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB24 ,Active Status Bit 24" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB23 ,Active Status Bit 23" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB22 ,Active Status Bit 22" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB21 ,Active Status Bit 21" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB20 ,Active Status Bit 20" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB19 ,Active Status Bit 19" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB18 ,Active Status Bit 18" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB17 ,Active Status Bit 17" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB16 ,Active Status Bit 16" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB15 ,Active Status Bit 15" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB14 ,Active Status Bit 14" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB13 ,Active Status Bit 13" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB12 ,Active Status Bit 12" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB11 ,Active Status Bit 11" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB10 ,Active Status Bit 10" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB9 ,Active Status Bit 9" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB8 ,Active Status Bit 8" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB7 ,Active Status Bit 7" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB6 ,Active Status Bit 6" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB5 ,Active Status Bit 5" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB4 ,Active Status Bit 4" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB3 ,Active Status Bit 3" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB2 ,Active Status Bit 2" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB1 ,Active Status Bit 1" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB0 ,Active Status Bit 0" "Not active,Active"
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x01)
|
|
rgroup.long 0x0304++0x03
|
|
line.long 0x0 "GICD_ICDABR1,Active Status Register 1"
|
|
bitfld.long 0x00 31. " ASB63 ,Active Status Bit 63" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB62 ,Active Status Bit 62" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB61 ,Active Status Bit 61" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB60 ,Active Status Bit 60" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB59 ,Active Status Bit 59" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB58 ,Active Status Bit 58" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB57 ,Active Status Bit 57" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB56 ,Active Status Bit 56" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB55 ,Active Status Bit 55" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB54 ,Active Status Bit 54" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB53 ,Active Status Bit 53" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB52 ,Active Status Bit 52" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB51 ,Active Status Bit 51" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB50 ,Active Status Bit 50" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB49 ,Active Status Bit 49" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB48 ,Active Status Bit 48" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB47 ,Active Status Bit 47" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB46 ,Active Status Bit 46" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB45 ,Active Status Bit 45" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB44 ,Active Status Bit 44" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB43 ,Active Status Bit 43" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB42 ,Active Status Bit 42" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB41 ,Active Status Bit 41" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB40 ,Active Status Bit 40" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB39 ,Active Status Bit 39" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB38 ,Active Status Bit 38" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB37 ,Active Status Bit 37" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB36 ,Active Status Bit 36" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB35 ,Active Status Bit 35" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB34 ,Active Status Bit 34" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB33 ,Active Status Bit 33" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB32 ,Active Status Bit 32" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0304++0x03
|
|
hide.long 0x0 "GICD_ICDABR1,Active Status Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x02)
|
|
rgroup.long 0x0308++0x03
|
|
line.long 0x0 "GICD_ICDABR2,Active Status Register 2"
|
|
bitfld.long 0x00 31. " ASB95 ,Active Status Bit 95" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB94 ,Active Status Bit 94" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB93 ,Active Status Bit 93" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB92 ,Active Status Bit 92" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB91 ,Active Status Bit 91" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB90 ,Active Status Bit 90" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB89 ,Active Status Bit 89" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB88 ,Active Status Bit 88" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB87 ,Active Status Bit 87" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB86 ,Active Status Bit 86" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB85 ,Active Status Bit 85" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB84 ,Active Status Bit 84" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB83 ,Active Status Bit 83" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB82 ,Active Status Bit 82" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB81 ,Active Status Bit 81" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB80 ,Active Status Bit 80" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB79 ,Active Status Bit 79" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB78 ,Active Status Bit 78" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB77 ,Active Status Bit 77" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB76 ,Active Status Bit 76" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB75 ,Active Status Bit 75" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB74 ,Active Status Bit 74" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB73 ,Active Status Bit 73" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB72 ,Active Status Bit 72" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB71 ,Active Status Bit 71" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB70 ,Active Status Bit 70" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB69 ,Active Status Bit 69" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB68 ,Active Status Bit 68" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB67 ,Active Status Bit 67" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB66 ,Active Status Bit 66" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB65 ,Active Status Bit 65" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB64 ,Active Status Bit 64" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0308++0x03
|
|
hide.long 0x0 "GICD_ICDABR2,Active Status Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x03)
|
|
rgroup.long 0x030C++0x03
|
|
line.long 0x0 "GICD_ICDABR3,Active Status Register 3"
|
|
bitfld.long 0x00 31. " ASB127 ,Active Status Bit 127" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB126 ,Active Status Bit 126" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB125 ,Active Status Bit 125" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB124 ,Active Status Bit 124" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB123 ,Active Status Bit 123" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB122 ,Active Status Bit 122" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB121 ,Active Status Bit 121" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB120 ,Active Status Bit 120" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB119 ,Active Status Bit 119" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB118 ,Active Status Bit 118" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB117 ,Active Status Bit 117" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB116 ,Active Status Bit 116" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB115 ,Active Status Bit 115" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB114 ,Active Status Bit 114" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB113 ,Active Status Bit 113" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB112 ,Active Status Bit 112" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB111 ,Active Status Bit 111" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB110 ,Active Status Bit 110" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB109 ,Active Status Bit 109" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB108 ,Active Status Bit 108" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB107 ,Active Status Bit 107" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB106 ,Active Status Bit 106" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB105 ,Active Status Bit 105" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB104 ,Active Status Bit 104" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB103 ,Active Status Bit 103" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB102 ,Active Status Bit 102" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB101 ,Active Status Bit 101" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB100 ,Active Status Bit 100" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB99 ,Active Status Bit 99" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB98 ,Active Status Bit 98" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB97 ,Active Status Bit 97" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB96 ,Active Status Bit 96" "Not active,Active"
|
|
else
|
|
hgroup.long 0x030C++0x03
|
|
hide.long 0x0 "GICD_ICDABR3,Active Status Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x04)
|
|
rgroup.long 0x0310++0x03
|
|
line.long 0x0 "GICD_ICDABR4,Active Status Register 4"
|
|
bitfld.long 0x00 31. " ASB159 ,Active Status Bit 159" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB158 ,Active Status Bit 158" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB157 ,Active Status Bit 157" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB156 ,Active Status Bit 156" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB155 ,Active Status Bit 155" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB154 ,Active Status Bit 154" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB153 ,Active Status Bit 153" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB152 ,Active Status Bit 152" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB151 ,Active Status Bit 151" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB150 ,Active Status Bit 150" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB149 ,Active Status Bit 149" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB148 ,Active Status Bit 148" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB147 ,Active Status Bit 147" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB146 ,Active Status Bit 146" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB145 ,Active Status Bit 145" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB144 ,Active Status Bit 144" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB143 ,Active Status Bit 143" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB142 ,Active Status Bit 142" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB141 ,Active Status Bit 141" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB140 ,Active Status Bit 140" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB139 ,Active Status Bit 139" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB138 ,Active Status Bit 138" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB137 ,Active Status Bit 137" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB136 ,Active Status Bit 136" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB135 ,Active Status Bit 135" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB134 ,Active Status Bit 134" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB133 ,Active Status Bit 133" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB132 ,Active Status Bit 132" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB131 ,Active Status Bit 131" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB130 ,Active Status Bit 130" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB129 ,Active Status Bit 129" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB128 ,Active Status Bit 128" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0310++0x03
|
|
hide.long 0x0 "GICD_ICDABR4,Active Status Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x05)
|
|
rgroup.long 0x0314++0x03
|
|
line.long 0x0 "GICD_ICDABR5,Active Status Register 5"
|
|
bitfld.long 0x00 31. " ASB191 ,Active Status Bit 191" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB190 ,Active Status Bit 190" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB189 ,Active Status Bit 189" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB188 ,Active Status Bit 188" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB187 ,Active Status Bit 187" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB186 ,Active Status Bit 186" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB185 ,Active Status Bit 185" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB184 ,Active Status Bit 184" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB183 ,Active Status Bit 183" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB182 ,Active Status Bit 182" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB181 ,Active Status Bit 181" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB180 ,Active Status Bit 180" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB179 ,Active Status Bit 179" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB178 ,Active Status Bit 178" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB177 ,Active Status Bit 177" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB176 ,Active Status Bit 176" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB175 ,Active Status Bit 175" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB174 ,Active Status Bit 174" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB173 ,Active Status Bit 173" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB172 ,Active Status Bit 172" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB171 ,Active Status Bit 171" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB170 ,Active Status Bit 170" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB169 ,Active Status Bit 169" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB168 ,Active Status Bit 168" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB167 ,Active Status Bit 167" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB166 ,Active Status Bit 166" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB165 ,Active Status Bit 165" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB164 ,Active Status Bit 164" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB163 ,Active Status Bit 163" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB162 ,Active Status Bit 162" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB161 ,Active Status Bit 161" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB160 ,Active Status Bit 160" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0314++0x03
|
|
hide.long 0x0 "GICD_ICDABR5,Active Status Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x06)
|
|
rgroup.long 0x0318++0x03
|
|
line.long 0x0 "GICD_ICDABR6,Active Status Register 6"
|
|
bitfld.long 0x00 31. " ASB223 ,Active Status Bit 223" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB222 ,Active Status Bit 222" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB221 ,Active Status Bit 221" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB220 ,Active Status Bit 220" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB219 ,Active Status Bit 219" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB218 ,Active Status Bit 218" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB217 ,Active Status Bit 217" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB216 ,Active Status Bit 216" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB215 ,Active Status Bit 215" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB214 ,Active Status Bit 214" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB213 ,Active Status Bit 213" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB212 ,Active Status Bit 212" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB211 ,Active Status Bit 211" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB210 ,Active Status Bit 210" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB209 ,Active Status Bit 209" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB208 ,Active Status Bit 208" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB207 ,Active Status Bit 207" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB206 ,Active Status Bit 206" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB205 ,Active Status Bit 205" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB204 ,Active Status Bit 204" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB203 ,Active Status Bit 203" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB202 ,Active Status Bit 202" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB201 ,Active Status Bit 201" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB200 ,Active Status Bit 200" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB199 ,Active Status Bit 199" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB198 ,Active Status Bit 198" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB197 ,Active Status Bit 197" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB196 ,Active Status Bit 196" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB195 ,Active Status Bit 195" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB194 ,Active Status Bit 194" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB193 ,Active Status Bit 193" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB192 ,Active Status Bit 192" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0318++0x03
|
|
hide.long 0x0 "GICD_ICDABR6,Active Status Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x07)
|
|
rgroup.long 0x031C++0x03
|
|
line.long 0x0 "GICD_ICDABR7,Active Status Register 7"
|
|
bitfld.long 0x00 31. " ASB255 ,Active Status Bit 255" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB254 ,Active Status Bit 254" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB253 ,Active Status Bit 253" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB252 ,Active Status Bit 252" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB251 ,Active Status Bit 251" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB250 ,Active Status Bit 250" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB249 ,Active Status Bit 249" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB248 ,Active Status Bit 248" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB247 ,Active Status Bit 247" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB246 ,Active Status Bit 246" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB245 ,Active Status Bit 245" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB244 ,Active Status Bit 244" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB243 ,Active Status Bit 243" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB242 ,Active Status Bit 242" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB241 ,Active Status Bit 241" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB240 ,Active Status Bit 240" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB239 ,Active Status Bit 239" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB238 ,Active Status Bit 238" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB237 ,Active Status Bit 237" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB236 ,Active Status Bit 236" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB235 ,Active Status Bit 235" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB234 ,Active Status Bit 234" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB233 ,Active Status Bit 233" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB232 ,Active Status Bit 232" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB231 ,Active Status Bit 231" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB230 ,Active Status Bit 230" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB229 ,Active Status Bit 229" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB228 ,Active Status Bit 228" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB227 ,Active Status Bit 227" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB226 ,Active Status Bit 226" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB225 ,Active Status Bit 225" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB224 ,Active Status Bit 224" "Not active,Active"
|
|
else
|
|
hgroup.long 0x031C++0x03
|
|
hide.long 0x0 "GICD_ICDABR7,Active Status Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x08)
|
|
rgroup.long 0x0320++0x03
|
|
line.long 0x0 "GICD_ICDABR8,Active Status Register 8"
|
|
bitfld.long 0x00 31. " ASB287 ,Active Status Bit 287" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB286 ,Active Status Bit 286" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB285 ,Active Status Bit 285" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB284 ,Active Status Bit 284" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB283 ,Active Status Bit 283" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB282 ,Active Status Bit 282" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB281 ,Active Status Bit 281" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB280 ,Active Status Bit 280" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB279 ,Active Status Bit 279" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB278 ,Active Status Bit 278" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB277 ,Active Status Bit 277" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB276 ,Active Status Bit 276" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB275 ,Active Status Bit 275" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB274 ,Active Status Bit 274" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB273 ,Active Status Bit 273" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB272 ,Active Status Bit 272" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB271 ,Active Status Bit 271" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB270 ,Active Status Bit 270" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB269 ,Active Status Bit 269" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB268 ,Active Status Bit 268" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB267 ,Active Status Bit 267" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB266 ,Active Status Bit 266" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB265 ,Active Status Bit 265" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB264 ,Active Status Bit 264" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB263 ,Active Status Bit 263" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB262 ,Active Status Bit 262" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB261 ,Active Status Bit 261" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB260 ,Active Status Bit 260" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB259 ,Active Status Bit 259" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB258 ,Active Status Bit 258" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB257 ,Active Status Bit 257" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB256 ,Active Status Bit 256" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0320++0x03
|
|
hide.long 0x0 "GICD_ICDABR8,Active Status Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x09)
|
|
rgroup.long 0x0324++0x03
|
|
line.long 0x0 "GICD_ICDABR9,Active Status Register 9"
|
|
bitfld.long 0x00 31. " ASB319 ,Active Status Bit 319" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB318 ,Active Status Bit 318" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB317 ,Active Status Bit 317" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB316 ,Active Status Bit 316" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB315 ,Active Status Bit 315" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB314 ,Active Status Bit 314" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB313 ,Active Status Bit 313" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB312 ,Active Status Bit 312" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB311 ,Active Status Bit 311" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB310 ,Active Status Bit 310" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB309 ,Active Status Bit 309" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB308 ,Active Status Bit 308" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB307 ,Active Status Bit 307" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB306 ,Active Status Bit 306" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB305 ,Active Status Bit 305" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB304 ,Active Status Bit 304" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB303 ,Active Status Bit 303" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB302 ,Active Status Bit 302" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB301 ,Active Status Bit 301" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB300 ,Active Status Bit 300" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB299 ,Active Status Bit 299" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB298 ,Active Status Bit 298" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB297 ,Active Status Bit 297" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB296 ,Active Status Bit 296" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB295 ,Active Status Bit 295" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB294 ,Active Status Bit 294" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB293 ,Active Status Bit 293" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB292 ,Active Status Bit 292" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB291 ,Active Status Bit 291" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB290 ,Active Status Bit 290" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB289 ,Active Status Bit 289" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB288 ,Active Status Bit 288" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0324++0x03
|
|
hide.long 0x0 "GICD_ICDABR9,Active Status Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0A)
|
|
rgroup.long 0x0328++0x03
|
|
line.long 0x0 "GICD_ICDABR10,Active Status Register 10"
|
|
bitfld.long 0x00 31. " ASB351 ,Active Status Bit 351" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB350 ,Active Status Bit 350" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB349 ,Active Status Bit 349" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB348 ,Active Status Bit 348" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB347 ,Active Status Bit 347" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB346 ,Active Status Bit 346" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB345 ,Active Status Bit 345" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB344 ,Active Status Bit 344" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB343 ,Active Status Bit 343" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB342 ,Active Status Bit 342" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB341 ,Active Status Bit 341" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB340 ,Active Status Bit 340" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB339 ,Active Status Bit 339" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB338 ,Active Status Bit 338" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB337 ,Active Status Bit 337" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB336 ,Active Status Bit 336" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB335 ,Active Status Bit 335" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB334 ,Active Status Bit 334" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB333 ,Active Status Bit 333" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB332 ,Active Status Bit 332" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB331 ,Active Status Bit 331" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB330 ,Active Status Bit 330" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB329 ,Active Status Bit 329" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB328 ,Active Status Bit 328" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB327 ,Active Status Bit 327" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB326 ,Active Status Bit 326" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB325 ,Active Status Bit 325" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB324 ,Active Status Bit 324" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB323 ,Active Status Bit 323" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB322 ,Active Status Bit 322" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB321 ,Active Status Bit 321" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB320 ,Active Status Bit 320" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0328++0x03
|
|
hide.long 0x0 "GICD_ICDABR10,Active Status Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0B)
|
|
rgroup.long 0x032C++0x03
|
|
line.long 0x0 "GICD_ICDABR11,Active Status Register 11"
|
|
bitfld.long 0x00 31. " ASB383 ,Active Status Bit 383" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB382 ,Active Status Bit 382" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB381 ,Active Status Bit 381" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB380 ,Active Status Bit 380" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB379 ,Active Status Bit 379" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB378 ,Active Status Bit 378" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB377 ,Active Status Bit 377" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB376 ,Active Status Bit 376" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB375 ,Active Status Bit 375" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB374 ,Active Status Bit 374" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB373 ,Active Status Bit 373" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB372 ,Active Status Bit 372" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB371 ,Active Status Bit 371" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB370 ,Active Status Bit 370" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB369 ,Active Status Bit 369" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB368 ,Active Status Bit 368" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB367 ,Active Status Bit 367" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB366 ,Active Status Bit 366" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB365 ,Active Status Bit 365" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB364 ,Active Status Bit 364" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB363 ,Active Status Bit 363" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB362 ,Active Status Bit 362" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB361 ,Active Status Bit 361" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB360 ,Active Status Bit 360" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB359 ,Active Status Bit 359" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB358 ,Active Status Bit 358" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB357 ,Active Status Bit 357" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB356 ,Active Status Bit 356" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB355 ,Active Status Bit 355" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB354 ,Active Status Bit 354" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB353 ,Active Status Bit 353" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB352 ,Active Status Bit 352" "Not active,Active"
|
|
else
|
|
hgroup.long 0x032C++0x03
|
|
hide.long 0x0 "GICD_ICDABR11,Active Status Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0C)
|
|
rgroup.long 0x0330++0x03
|
|
line.long 0x0 "GICD_ICDABR12,Active Status Register 12"
|
|
bitfld.long 0x00 31. " ASB415 ,Active Status Bit 415" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB414 ,Active Status Bit 414" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB413 ,Active Status Bit 413" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB412 ,Active Status Bit 412" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB411 ,Active Status Bit 411" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB410 ,Active Status Bit 410" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB409 ,Active Status Bit 409" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB408 ,Active Status Bit 408" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB407 ,Active Status Bit 407" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB406 ,Active Status Bit 406" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB405 ,Active Status Bit 405" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB404 ,Active Status Bit 404" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB403 ,Active Status Bit 403" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB402 ,Active Status Bit 402" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB401 ,Active Status Bit 401" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB400 ,Active Status Bit 400" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB399 ,Active Status Bit 399" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB398 ,Active Status Bit 398" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB397 ,Active Status Bit 397" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB396 ,Active Status Bit 396" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB395 ,Active Status Bit 395" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB394 ,Active Status Bit 394" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB393 ,Active Status Bit 393" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB392 ,Active Status Bit 392" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB391 ,Active Status Bit 391" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB390 ,Active Status Bit 390" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB389 ,Active Status Bit 389" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB388 ,Active Status Bit 388" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB387 ,Active Status Bit 387" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB386 ,Active Status Bit 386" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB385 ,Active Status Bit 385" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB384 ,Active Status Bit 384" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0330++0x03
|
|
hide.long 0x0 "GICD_ICDABR12,Active Status Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0D)
|
|
rgroup.long 0x0334++0x03
|
|
line.long 0x0 "GICD_ICDABR13,Active Status Register 13"
|
|
bitfld.long 0x00 31. " ASB447 ,Active Status Bit 447" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB446 ,Active Status Bit 446" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB445 ,Active Status Bit 445" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB444 ,Active Status Bit 444" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB443 ,Active Status Bit 443" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB442 ,Active Status Bit 442" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB441 ,Active Status Bit 441" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB440 ,Active Status Bit 440" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB439 ,Active Status Bit 439" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB438 ,Active Status Bit 438" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB437 ,Active Status Bit 437" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB436 ,Active Status Bit 436" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB435 ,Active Status Bit 435" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB434 ,Active Status Bit 434" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB433 ,Active Status Bit 433" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB432 ,Active Status Bit 432" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB431 ,Active Status Bit 431" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB430 ,Active Status Bit 430" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB429 ,Active Status Bit 429" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB428 ,Active Status Bit 428" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB427 ,Active Status Bit 427" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB426 ,Active Status Bit 426" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB425 ,Active Status Bit 425" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB424 ,Active Status Bit 424" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB423 ,Active Status Bit 423" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB422 ,Active Status Bit 422" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB421 ,Active Status Bit 421" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB420 ,Active Status Bit 420" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB419 ,Active Status Bit 419" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB418 ,Active Status Bit 418" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB417 ,Active Status Bit 417" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB416 ,Active Status Bit 416" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0334++0x03
|
|
hide.long 0x0 "GICD_ICDABR13,Active Status Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0E)
|
|
rgroup.long 0x0338++0x03
|
|
line.long 0x0 "GICD_ICDABR14,Active Status Register 14"
|
|
bitfld.long 0x00 31. " ASB479 ,Active Status Bit 479" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB478 ,Active Status Bit 478" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB477 ,Active Status Bit 477" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB476 ,Active Status Bit 476" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB475 ,Active Status Bit 475" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB474 ,Active Status Bit 474" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB473 ,Active Status Bit 473" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB472 ,Active Status Bit 472" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB471 ,Active Status Bit 471" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB470 ,Active Status Bit 470" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB469 ,Active Status Bit 469" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB468 ,Active Status Bit 468" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB467 ,Active Status Bit 467" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB466 ,Active Status Bit 466" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB465 ,Active Status Bit 465" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB464 ,Active Status Bit 464" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB463 ,Active Status Bit 463" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB462 ,Active Status Bit 462" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB461 ,Active Status Bit 461" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB460 ,Active Status Bit 460" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB459 ,Active Status Bit 459" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB458 ,Active Status Bit 458" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB457 ,Active Status Bit 457" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB456 ,Active Status Bit 456" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB455 ,Active Status Bit 455" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB454 ,Active Status Bit 454" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB453 ,Active Status Bit 453" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB452 ,Active Status Bit 452" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB451 ,Active Status Bit 451" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB450 ,Active Status Bit 450" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB449 ,Active Status Bit 449" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB448 ,Active Status Bit 448" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0338++0x03
|
|
hide.long 0x0 "GICD_ICDABR14,Active Status Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0F)
|
|
rgroup.long 0x033C++0x03
|
|
line.long 0x0 "GICD_ICDABR15,Active Status Register 15"
|
|
bitfld.long 0x00 31. " ASB511 ,Active Status Bit 511" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB510 ,Active Status Bit 510" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB509 ,Active Status Bit 509" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB508 ,Active Status Bit 508" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB507 ,Active Status Bit 507" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB506 ,Active Status Bit 506" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB505 ,Active Status Bit 505" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB504 ,Active Status Bit 504" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB503 ,Active Status Bit 503" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB502 ,Active Status Bit 502" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB501 ,Active Status Bit 501" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB500 ,Active Status Bit 500" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB499 ,Active Status Bit 499" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB498 ,Active Status Bit 498" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB497 ,Active Status Bit 497" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB496 ,Active Status Bit 496" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB495 ,Active Status Bit 495" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB494 ,Active Status Bit 494" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB493 ,Active Status Bit 493" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB492 ,Active Status Bit 492" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB491 ,Active Status Bit 491" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB490 ,Active Status Bit 490" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB489 ,Active Status Bit 489" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB488 ,Active Status Bit 488" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB487 ,Active Status Bit 487" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB486 ,Active Status Bit 486" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB485 ,Active Status Bit 485" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB484 ,Active Status Bit 484" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB483 ,Active Status Bit 483" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB482 ,Active Status Bit 482" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB481 ,Active Status Bit 481" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB480 ,Active Status Bit 480" "Not active,Active"
|
|
else
|
|
hgroup.long 0x033C++0x03
|
|
hide.long 0x0 "GICD_ICDABR15,Active Status Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x10)
|
|
rgroup.long 0x0340++0x03
|
|
line.long 0x0 "GICD_ICDABR16,Active Status Register 16"
|
|
bitfld.long 0x00 31. " ASB543 ,Active Status Bit 543" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB542 ,Active Status Bit 542" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB541 ,Active Status Bit 541" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB540 ,Active Status Bit 540" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB539 ,Active Status Bit 539" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB538 ,Active Status Bit 538" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB537 ,Active Status Bit 537" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB536 ,Active Status Bit 536" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB535 ,Active Status Bit 535" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB534 ,Active Status Bit 534" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB533 ,Active Status Bit 533" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB532 ,Active Status Bit 532" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB531 ,Active Status Bit 531" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB530 ,Active Status Bit 530" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB529 ,Active Status Bit 529" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB528 ,Active Status Bit 528" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB527 ,Active Status Bit 527" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB526 ,Active Status Bit 526" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB525 ,Active Status Bit 525" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB524 ,Active Status Bit 524" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB523 ,Active Status Bit 523" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB522 ,Active Status Bit 522" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB521 ,Active Status Bit 521" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB520 ,Active Status Bit 520" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB519 ,Active Status Bit 519" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB518 ,Active Status Bit 518" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB517 ,Active Status Bit 517" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB516 ,Active Status Bit 516" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB515 ,Active Status Bit 515" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB514 ,Active Status Bit 514" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB513 ,Active Status Bit 513" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB512 ,Active Status Bit 512" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0340++0x03
|
|
hide.long 0x0 "GICD_ICDABR16,Active Status Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x11)
|
|
rgroup.long 0x0344++0x03
|
|
line.long 0x0 "GICD_ICDABR17,Active Status Register 17"
|
|
bitfld.long 0x00 31. " ASB575 ,Active Status Bit 575" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB574 ,Active Status Bit 574" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB573 ,Active Status Bit 573" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB572 ,Active Status Bit 572" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB571 ,Active Status Bit 571" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB570 ,Active Status Bit 570" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB569 ,Active Status Bit 569" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB568 ,Active Status Bit 568" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB567 ,Active Status Bit 567" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB566 ,Active Status Bit 566" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB565 ,Active Status Bit 565" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB564 ,Active Status Bit 564" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB563 ,Active Status Bit 563" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB562 ,Active Status Bit 562" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB561 ,Active Status Bit 561" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB560 ,Active Status Bit 560" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB559 ,Active Status Bit 559" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB558 ,Active Status Bit 558" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB557 ,Active Status Bit 557" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB556 ,Active Status Bit 556" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB555 ,Active Status Bit 555" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB554 ,Active Status Bit 554" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB553 ,Active Status Bit 553" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB552 ,Active Status Bit 552" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB551 ,Active Status Bit 551" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB550 ,Active Status Bit 550" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB549 ,Active Status Bit 549" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB548 ,Active Status Bit 548" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB547 ,Active Status Bit 547" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB546 ,Active Status Bit 546" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB545 ,Active Status Bit 545" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB544 ,Active Status Bit 544" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0344++0x03
|
|
hide.long 0x0 "GICD_ICDABR17,Active Status Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x12)
|
|
rgroup.long 0x0348++0x03
|
|
line.long 0x0 "GICD_ICDABR18,Active Status Register 18"
|
|
bitfld.long 0x00 31. " ASB607 ,Active Status Bit 607" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB606 ,Active Status Bit 606" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB605 ,Active Status Bit 605" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB604 ,Active Status Bit 604" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB603 ,Active Status Bit 603" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB602 ,Active Status Bit 602" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB601 ,Active Status Bit 601" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB600 ,Active Status Bit 600" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB599 ,Active Status Bit 599" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB598 ,Active Status Bit 598" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB597 ,Active Status Bit 597" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB596 ,Active Status Bit 596" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB595 ,Active Status Bit 595" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB594 ,Active Status Bit 594" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB593 ,Active Status Bit 593" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB592 ,Active Status Bit 592" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB591 ,Active Status Bit 591" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB590 ,Active Status Bit 590" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB589 ,Active Status Bit 589" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB588 ,Active Status Bit 588" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB587 ,Active Status Bit 587" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB586 ,Active Status Bit 586" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB585 ,Active Status Bit 585" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB584 ,Active Status Bit 584" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB583 ,Active Status Bit 583" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB582 ,Active Status Bit 582" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB581 ,Active Status Bit 581" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB580 ,Active Status Bit 580" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB579 ,Active Status Bit 579" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB578 ,Active Status Bit 578" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB577 ,Active Status Bit 577" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB576 ,Active Status Bit 576" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0348++0x03
|
|
hide.long 0x0 "GICD_ICDABR18,Active Status Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x13)
|
|
rgroup.long 0x034C++0x03
|
|
line.long 0x0 "GICD_ICDABR19,Active Status Register 19"
|
|
bitfld.long 0x00 31. " ASB639 ,Active Status Bit 639" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB638 ,Active Status Bit 638" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB637 ,Active Status Bit 637" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB636 ,Active Status Bit 636" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB635 ,Active Status Bit 635" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB634 ,Active Status Bit 634" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB633 ,Active Status Bit 633" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB632 ,Active Status Bit 632" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB631 ,Active Status Bit 631" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB630 ,Active Status Bit 630" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB629 ,Active Status Bit 629" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB628 ,Active Status Bit 628" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB627 ,Active Status Bit 627" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB626 ,Active Status Bit 626" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB625 ,Active Status Bit 625" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB624 ,Active Status Bit 624" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB623 ,Active Status Bit 623" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB622 ,Active Status Bit 622" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB621 ,Active Status Bit 621" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB620 ,Active Status Bit 620" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB619 ,Active Status Bit 619" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB618 ,Active Status Bit 618" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB617 ,Active Status Bit 617" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB616 ,Active Status Bit 616" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB615 ,Active Status Bit 615" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB614 ,Active Status Bit 614" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB613 ,Active Status Bit 613" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB612 ,Active Status Bit 612" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB611 ,Active Status Bit 611" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB610 ,Active Status Bit 610" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB609 ,Active Status Bit 609" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB608 ,Active Status Bit 608" "Not active,Active"
|
|
else
|
|
hgroup.long 0x034C++0x03
|
|
hide.long 0x0 "GICD_ICDABR19,Active Status Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x14)
|
|
rgroup.long 0x0350++0x03
|
|
line.long 0x0 "GICD_ICDABR20,Active Status Register 20"
|
|
bitfld.long 0x00 31. " ASB671 ,Active Status Bit 671" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB670 ,Active Status Bit 670" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB669 ,Active Status Bit 669" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB668 ,Active Status Bit 668" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB667 ,Active Status Bit 667" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB666 ,Active Status Bit 666" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB665 ,Active Status Bit 665" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB664 ,Active Status Bit 664" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB663 ,Active Status Bit 663" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB662 ,Active Status Bit 662" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB661 ,Active Status Bit 661" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB660 ,Active Status Bit 660" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB659 ,Active Status Bit 659" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB658 ,Active Status Bit 658" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB657 ,Active Status Bit 657" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB656 ,Active Status Bit 656" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB655 ,Active Status Bit 655" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB654 ,Active Status Bit 654" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB653 ,Active Status Bit 653" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB652 ,Active Status Bit 652" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB651 ,Active Status Bit 651" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB650 ,Active Status Bit 650" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB649 ,Active Status Bit 649" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB648 ,Active Status Bit 648" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB647 ,Active Status Bit 647" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB646 ,Active Status Bit 646" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB645 ,Active Status Bit 645" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB644 ,Active Status Bit 644" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB643 ,Active Status Bit 643" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB642 ,Active Status Bit 642" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB641 ,Active Status Bit 641" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB640 ,Active Status Bit 640" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0350++0x03
|
|
hide.long 0x0 "GICD_ICDABR20,Active Status Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x15)
|
|
rgroup.long 0x0354++0x03
|
|
line.long 0x0 "GICD_ICDABR21,Active Status Register 21"
|
|
bitfld.long 0x00 31. " ASB703 ,Active Status Bit 703" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB702 ,Active Status Bit 702" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB701 ,Active Status Bit 701" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB700 ,Active Status Bit 700" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB699 ,Active Status Bit 699" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB698 ,Active Status Bit 698" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB697 ,Active Status Bit 697" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB696 ,Active Status Bit 696" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB695 ,Active Status Bit 695" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB694 ,Active Status Bit 694" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB693 ,Active Status Bit 693" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB692 ,Active Status Bit 692" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB691 ,Active Status Bit 691" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB690 ,Active Status Bit 690" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB689 ,Active Status Bit 689" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB688 ,Active Status Bit 688" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB687 ,Active Status Bit 687" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB686 ,Active Status Bit 686" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB685 ,Active Status Bit 685" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB684 ,Active Status Bit 684" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB683 ,Active Status Bit 683" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB682 ,Active Status Bit 682" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB681 ,Active Status Bit 681" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB680 ,Active Status Bit 680" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB679 ,Active Status Bit 679" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB678 ,Active Status Bit 678" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB677 ,Active Status Bit 677" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB676 ,Active Status Bit 676" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB675 ,Active Status Bit 675" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB674 ,Active Status Bit 674" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB673 ,Active Status Bit 673" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB672 ,Active Status Bit 672" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0354++0x03
|
|
hide.long 0x0 "GICD_ICDABR21,Active Status Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x16)
|
|
rgroup.long 0x0358++0x03
|
|
line.long 0x0 "GICD_ICDABR22,Active Status Register 22"
|
|
bitfld.long 0x00 31. " ASB735 ,Active Status Bit 735" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB734 ,Active Status Bit 734" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB733 ,Active Status Bit 733" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB732 ,Active Status Bit 732" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB731 ,Active Status Bit 731" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB730 ,Active Status Bit 730" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB729 ,Active Status Bit 729" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB728 ,Active Status Bit 728" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB727 ,Active Status Bit 727" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB726 ,Active Status Bit 726" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB725 ,Active Status Bit 725" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB724 ,Active Status Bit 724" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB723 ,Active Status Bit 723" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB722 ,Active Status Bit 722" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB721 ,Active Status Bit 721" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB720 ,Active Status Bit 720" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB719 ,Active Status Bit 719" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB718 ,Active Status Bit 718" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB717 ,Active Status Bit 717" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB716 ,Active Status Bit 716" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB715 ,Active Status Bit 715" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB714 ,Active Status Bit 714" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB713 ,Active Status Bit 713" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB712 ,Active Status Bit 712" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB711 ,Active Status Bit 711" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB710 ,Active Status Bit 710" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB709 ,Active Status Bit 709" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB708 ,Active Status Bit 708" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB707 ,Active Status Bit 707" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB706 ,Active Status Bit 706" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB705 ,Active Status Bit 705" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB704 ,Active Status Bit 704" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0358++0x03
|
|
hide.long 0x0 "GICD_ICDABR22,Active Status Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x17)
|
|
rgroup.long 0x035C++0x03
|
|
line.long 0x0 "GICD_ICDABR23,Active Status Register 23"
|
|
bitfld.long 0x00 31. " ASB767 ,Active Status Bit 767" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB766 ,Active Status Bit 766" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB765 ,Active Status Bit 765" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB764 ,Active Status Bit 764" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB763 ,Active Status Bit 763" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB762 ,Active Status Bit 762" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB761 ,Active Status Bit 761" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB760 ,Active Status Bit 760" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB759 ,Active Status Bit 759" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB758 ,Active Status Bit 758" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB757 ,Active Status Bit 757" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB756 ,Active Status Bit 756" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB755 ,Active Status Bit 755" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB754 ,Active Status Bit 754" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB753 ,Active Status Bit 753" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB752 ,Active Status Bit 752" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB751 ,Active Status Bit 751" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB750 ,Active Status Bit 750" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB749 ,Active Status Bit 749" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB748 ,Active Status Bit 748" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB747 ,Active Status Bit 747" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB746 ,Active Status Bit 746" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB745 ,Active Status Bit 745" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB744 ,Active Status Bit 744" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB743 ,Active Status Bit 743" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB742 ,Active Status Bit 742" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB741 ,Active Status Bit 741" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB740 ,Active Status Bit 740" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB739 ,Active Status Bit 739" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB738 ,Active Status Bit 738" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB737 ,Active Status Bit 737" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB736 ,Active Status Bit 736" "Not active,Active"
|
|
else
|
|
hgroup.long 0x035C++0x03
|
|
hide.long 0x0 "GICD_ICDABR23,Active Status Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x18)
|
|
rgroup.long 0x0360++0x03
|
|
line.long 0x0 "GICD_ICDABR24,Active Status Register 24"
|
|
bitfld.long 0x00 31. " ASB799 ,Active Status Bit 799" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB798 ,Active Status Bit 798" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB797 ,Active Status Bit 797" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB796 ,Active Status Bit 796" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB795 ,Active Status Bit 795" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB794 ,Active Status Bit 794" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB793 ,Active Status Bit 793" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB792 ,Active Status Bit 792" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB791 ,Active Status Bit 791" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB790 ,Active Status Bit 790" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB789 ,Active Status Bit 789" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB788 ,Active Status Bit 788" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB787 ,Active Status Bit 787" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB786 ,Active Status Bit 786" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB785 ,Active Status Bit 785" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB784 ,Active Status Bit 784" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB783 ,Active Status Bit 783" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB782 ,Active Status Bit 782" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB781 ,Active Status Bit 781" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB780 ,Active Status Bit 780" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB779 ,Active Status Bit 779" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB778 ,Active Status Bit 778" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB777 ,Active Status Bit 777" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB776 ,Active Status Bit 776" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB775 ,Active Status Bit 775" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB774 ,Active Status Bit 774" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB773 ,Active Status Bit 773" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB772 ,Active Status Bit 772" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB771 ,Active Status Bit 771" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB770 ,Active Status Bit 770" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB769 ,Active Status Bit 769" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB768 ,Active Status Bit 768" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0360++0x03
|
|
hide.long 0x0 "GICD_ICDABR24,Active Status Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x19)
|
|
rgroup.long 0x0364++0x03
|
|
line.long 0x0 "GICD_ICDABR25,Active Status Register 25"
|
|
bitfld.long 0x00 31. " ASB831 ,Active Status Bit 831" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB830 ,Active Status Bit 830" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB829 ,Active Status Bit 829" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB828 ,Active Status Bit 828" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB827 ,Active Status Bit 827" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB826 ,Active Status Bit 826" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB825 ,Active Status Bit 825" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB824 ,Active Status Bit 824" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB823 ,Active Status Bit 823" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB822 ,Active Status Bit 822" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB821 ,Active Status Bit 821" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB820 ,Active Status Bit 820" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB819 ,Active Status Bit 819" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB818 ,Active Status Bit 818" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB817 ,Active Status Bit 817" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB816 ,Active Status Bit 816" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB815 ,Active Status Bit 815" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB814 ,Active Status Bit 814" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB813 ,Active Status Bit 813" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB812 ,Active Status Bit 812" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB811 ,Active Status Bit 811" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB810 ,Active Status Bit 810" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB809 ,Active Status Bit 809" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB808 ,Active Status Bit 808" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB807 ,Active Status Bit 807" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB806 ,Active Status Bit 806" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB805 ,Active Status Bit 805" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB804 ,Active Status Bit 804" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB803 ,Active Status Bit 803" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB802 ,Active Status Bit 802" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB801 ,Active Status Bit 801" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB800 ,Active Status Bit 800" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0364++0x03
|
|
hide.long 0x0 "GICD_ICDABR25,Active Status Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1A)
|
|
rgroup.long 0x0368++0x03
|
|
line.long 0x0 "GICD_ICDABR26,Active Status Register 26"
|
|
bitfld.long 0x00 31. " ASB863 ,Active Status Bit 863" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB862 ,Active Status Bit 862" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB861 ,Active Status Bit 861" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB860 ,Active Status Bit 860" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB859 ,Active Status Bit 859" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB858 ,Active Status Bit 858" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB857 ,Active Status Bit 857" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB856 ,Active Status Bit 856" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB855 ,Active Status Bit 855" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB854 ,Active Status Bit 854" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB853 ,Active Status Bit 853" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB852 ,Active Status Bit 852" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB851 ,Active Status Bit 851" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB850 ,Active Status Bit 850" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB849 ,Active Status Bit 849" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB848 ,Active Status Bit 848" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB847 ,Active Status Bit 847" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB846 ,Active Status Bit 846" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB845 ,Active Status Bit 845" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB844 ,Active Status Bit 844" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB843 ,Active Status Bit 843" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB842 ,Active Status Bit 842" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB841 ,Active Status Bit 841" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB840 ,Active Status Bit 840" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB839 ,Active Status Bit 839" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB838 ,Active Status Bit 838" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB837 ,Active Status Bit 837" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB836 ,Active Status Bit 836" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB835 ,Active Status Bit 835" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB834 ,Active Status Bit 834" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB833 ,Active Status Bit 833" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB832 ,Active Status Bit 832" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0368++0x03
|
|
hide.long 0x0 "GICD_ICDABR26,Active Status Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1B)
|
|
rgroup.long 0x036C++0x03
|
|
line.long 0x0 "GICD_ICDABR27,Active Status Register 27"
|
|
bitfld.long 0x00 31. " ASB895 ,Active Status Bit 895" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB894 ,Active Status Bit 894" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB893 ,Active Status Bit 893" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB892 ,Active Status Bit 892" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB891 ,Active Status Bit 891" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB890 ,Active Status Bit 890" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB889 ,Active Status Bit 889" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB888 ,Active Status Bit 888" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB887 ,Active Status Bit 887" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB886 ,Active Status Bit 886" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB885 ,Active Status Bit 885" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB884 ,Active Status Bit 884" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB883 ,Active Status Bit 883" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB882 ,Active Status Bit 882" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB881 ,Active Status Bit 881" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB880 ,Active Status Bit 880" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB879 ,Active Status Bit 879" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB878 ,Active Status Bit 878" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB877 ,Active Status Bit 877" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB876 ,Active Status Bit 876" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB875 ,Active Status Bit 875" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB874 ,Active Status Bit 874" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB873 ,Active Status Bit 873" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB872 ,Active Status Bit 872" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB871 ,Active Status Bit 871" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB870 ,Active Status Bit 870" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB869 ,Active Status Bit 869" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB868 ,Active Status Bit 868" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB867 ,Active Status Bit 867" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB866 ,Active Status Bit 866" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB865 ,Active Status Bit 865" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB864 ,Active Status Bit 864" "Not active,Active"
|
|
else
|
|
hgroup.long 0x036C++0x03
|
|
hide.long 0x0 "GICD_ICDABR27,Active Status Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1C)
|
|
rgroup.long 0x0370++0x03
|
|
line.long 0x0 "GICD_ICDABR28,Active Status Register 28"
|
|
bitfld.long 0x00 31. " ASB927 ,Active Status Bit 927" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB926 ,Active Status Bit 926" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB925 ,Active Status Bit 925" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB924 ,Active Status Bit 924" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB923 ,Active Status Bit 923" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB922 ,Active Status Bit 922" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB921 ,Active Status Bit 921" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB920 ,Active Status Bit 920" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB919 ,Active Status Bit 919" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB918 ,Active Status Bit 918" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB917 ,Active Status Bit 917" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB916 ,Active Status Bit 916" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB915 ,Active Status Bit 915" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB914 ,Active Status Bit 914" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB913 ,Active Status Bit 913" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB912 ,Active Status Bit 912" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB911 ,Active Status Bit 911" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB910 ,Active Status Bit 910" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB909 ,Active Status Bit 909" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB908 ,Active Status Bit 908" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB907 ,Active Status Bit 907" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB906 ,Active Status Bit 906" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB905 ,Active Status Bit 905" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB904 ,Active Status Bit 904" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB903 ,Active Status Bit 903" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB902 ,Active Status Bit 902" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB901 ,Active Status Bit 901" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB900 ,Active Status Bit 900" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB899 ,Active Status Bit 899" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB898 ,Active Status Bit 898" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB897 ,Active Status Bit 897" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB896 ,Active Status Bit 896" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0370++0x03
|
|
hide.long 0x0 "GICD_ICDABR28,Active Status Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1D)
|
|
rgroup.long 0x0374++0x03
|
|
line.long 0x0 "GICD_ICDABR29,Active Status Register 29"
|
|
bitfld.long 0x00 31. " ASB959 ,Active Status Bit 959" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB958 ,Active Status Bit 958" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB957 ,Active Status Bit 957" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB956 ,Active Status Bit 956" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB955 ,Active Status Bit 955" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB954 ,Active Status Bit 954" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB953 ,Active Status Bit 953" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB952 ,Active Status Bit 952" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB951 ,Active Status Bit 951" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB950 ,Active Status Bit 950" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB949 ,Active Status Bit 949" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB948 ,Active Status Bit 948" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB947 ,Active Status Bit 947" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB946 ,Active Status Bit 946" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB945 ,Active Status Bit 945" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB944 ,Active Status Bit 944" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB943 ,Active Status Bit 943" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB942 ,Active Status Bit 942" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB941 ,Active Status Bit 941" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB940 ,Active Status Bit 940" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB939 ,Active Status Bit 939" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB938 ,Active Status Bit 938" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB937 ,Active Status Bit 937" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB936 ,Active Status Bit 936" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB935 ,Active Status Bit 935" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB934 ,Active Status Bit 934" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB933 ,Active Status Bit 933" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB932 ,Active Status Bit 932" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB931 ,Active Status Bit 931" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB930 ,Active Status Bit 930" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB929 ,Active Status Bit 929" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB928 ,Active Status Bit 928" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0374++0x03
|
|
hide.long 0x0 "GICD_ICDABR29,Active Status Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1E)
|
|
rgroup.long 0x0378++0x03
|
|
line.long 0x0 "GICD_ICDABR30,Active Status Register 30"
|
|
bitfld.long 0x00 31. " ASB991 ,Active Status Bit 991" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB990 ,Active Status Bit 990" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB989 ,Active Status Bit 989" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB988 ,Active Status Bit 988" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB987 ,Active Status Bit 987" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB986 ,Active Status Bit 986" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB985 ,Active Status Bit 985" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB984 ,Active Status Bit 984" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB983 ,Active Status Bit 983" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB982 ,Active Status Bit 982" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB981 ,Active Status Bit 981" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB980 ,Active Status Bit 980" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB979 ,Active Status Bit 979" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB978 ,Active Status Bit 978" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB977 ,Active Status Bit 977" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB976 ,Active Status Bit 976" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB975 ,Active Status Bit 975" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB974 ,Active Status Bit 974" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB973 ,Active Status Bit 973" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB972 ,Active Status Bit 972" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB971 ,Active Status Bit 971" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB970 ,Active Status Bit 970" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB969 ,Active Status Bit 969" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB968 ,Active Status Bit 968" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB967 ,Active Status Bit 967" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB966 ,Active Status Bit 966" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB965 ,Active Status Bit 965" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB964 ,Active Status Bit 964" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB963 ,Active Status Bit 963" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB962 ,Active Status Bit 962" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB961 ,Active Status Bit 961" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB960 ,Active Status Bit 960" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0378++0x03
|
|
hide.long 0x0 "GICD_ICDABR30,Active Status Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)==0x1F)
|
|
rgroup.long 0x037C++0x03
|
|
line.long 0x0 "GICD_ICDABR31,Active Status Register 31"
|
|
bitfld.long 0x00 27. " ASB1019 ,Active Status Bit 1019" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB1018 ,Active Status Bit 1018" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB1017 ,Active Status Bit 1017" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB1016 ,Active Status Bit 1016" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB1015 ,Active Status Bit 1015" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB1014 ,Active Status Bit 1014" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB1013 ,Active Status Bit 1013" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB1012 ,Active Status Bit 1012" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB1011 ,Active Status Bit 1011" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB1010 ,Active Status Bit 1010" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB1009 ,Active Status Bit 1009" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB1008 ,Active Status Bit 1008" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB1007 ,Active Status Bit 1007" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB1006 ,Active Status Bit 1006" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB1005 ,Active Status Bit 1005" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB1004 ,Active Status Bit 1004" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB1003 ,Active Status Bit 1003" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB1002 ,Active Status Bit 1002" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB1001 ,Active Status Bit 1001" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB1000 ,Active Status Bit 1000" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB999 ,Active Status Bit 999" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB998 ,Active Status Bit 998" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB997 ,Active Status Bit 997" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB996 ,Active Status Bit 996" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB995 ,Active Status Bit 995" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB994 ,Active Status Bit 994" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB993 ,Active Status Bit 993" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB992 ,Active Status Bit 992" "Not active,Active"
|
|
else
|
|
hgroup.long 0x037C++0x03
|
|
hide.long 0x0 "GICD_ICDABR31,Active Status Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 20.
|
|
tree "Priority Registers"
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID3 ,Interrupt ID3 Priority/Priority Byte Offset 3 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID2 ,Interrupt ID2 Priority/Priority Byte Offset 2 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1 ,Interrupt ID1 Priority/Priority Byte Offset 1 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID0 ,Interrupt ID0 Priority/Priority Byte Offset 0 "
|
|
group.long 0x404++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID7 ,Interrupt ID7 Priority/Priority Byte Offset 7 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID6 ,Interrupt ID6 Priority/Priority Byte Offset 6 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID5 ,Interrupt ID5 Priority/Priority Byte Offset 5 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID4 ,Interrupt ID4 Priority/Priority Byte Offset 4 "
|
|
group.long 0x408++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID11 ,Interrupt ID11 Priority/Priority Byte Offset 11 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID10 ,Interrupt ID10 Priority/Priority Byte Offset 10 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID9 ,Interrupt ID9 Priority/Priority Byte Offset 9 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID8 ,Interrupt ID8 Priority/Priority Byte Offset 8 "
|
|
group.long 0x40C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID15 ,Interrupt ID15 Priority/Priority Byte Offset 15 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID14 ,Interrupt ID14 Priority/Priority Byte Offset 14 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID13 ,Interrupt ID13 Priority/Priority Byte Offset 13 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID12 ,Interrupt ID12 Priority/Priority Byte Offset 12 "
|
|
group.long 0x410++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID19 ,Interrupt ID19 Priority/Priority Byte Offset 19 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID18 ,Interrupt ID18 Priority/Priority Byte Offset 18 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID17 ,Interrupt ID17 Priority/Priority Byte Offset 17 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID16 ,Interrupt ID16 Priority/Priority Byte Offset 16 "
|
|
group.long 0x414++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID23 ,Interrupt ID23 Priority/Priority Byte Offset 23 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID22 ,Interrupt ID22 Priority/Priority Byte Offset 22 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID21 ,Interrupt ID21 Priority/Priority Byte Offset 21 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID20 ,Interrupt ID20 Priority/Priority Byte Offset 20 "
|
|
group.long 0x418++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID27 ,Interrupt ID27 Priority/Priority Byte Offset 27 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID26 ,Interrupt ID26 Priority/Priority Byte Offset 26 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID25 ,Interrupt ID25 Priority/Priority Byte Offset 25 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID24 ,Interrupt ID24 Priority/Priority Byte Offset 24 "
|
|
group.long 0x41C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID31 ,Interrupt ID31 Priority/Priority Byte Offset 31 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID30 ,Interrupt ID30 Priority/Priority Byte Offset 30 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID29 ,Interrupt ID29 Priority/Priority Byte Offset 29 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID28 ,Interrupt ID28 Priority/Priority Byte Offset 28 "
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x420++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID35 ,Interrupt ID35 Priority/Priority Byte Offset 35 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID34 ,Interrupt ID34 Priority/Priority Byte Offset 34 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID33 ,Interrupt ID33 Priority/Priority Byte Offset 33 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID32 ,Interrupt ID32 Priority/Priority Byte Offset 32 "
|
|
group.long 0x424++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID39 ,Interrupt ID39 Priority/Priority Byte Offset 39 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID38 ,Interrupt ID38 Priority/Priority Byte Offset 38 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID37 ,Interrupt ID37 Priority/Priority Byte Offset 37 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID36 ,Interrupt ID36 Priority/Priority Byte Offset 36 "
|
|
group.long 0x428++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID43 ,Interrupt ID43 Priority/Priority Byte Offset 43 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID42 ,Interrupt ID42 Priority/Priority Byte Offset 42 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID41 ,Interrupt ID41 Priority/Priority Byte Offset 41 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID40 ,Interrupt ID40 Priority/Priority Byte Offset 40 "
|
|
group.long 0x42C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID47 ,Interrupt ID47 Priority/Priority Byte Offset 47 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID46 ,Interrupt ID46 Priority/Priority Byte Offset 46 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID45 ,Interrupt ID45 Priority/Priority Byte Offset 45 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID44 ,Interrupt ID44 Priority/Priority Byte Offset 44 "
|
|
group.long 0x430++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID51 ,Interrupt ID51 Priority/Priority Byte Offset 51 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID50 ,Interrupt ID50 Priority/Priority Byte Offset 50 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID49 ,Interrupt ID49 Priority/Priority Byte Offset 49 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID48 ,Interrupt ID48 Priority/Priority Byte Offset 48 "
|
|
group.long 0x434++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID55 ,Interrupt ID55 Priority/Priority Byte Offset 55 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID54 ,Interrupt ID54 Priority/Priority Byte Offset 54 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID53 ,Interrupt ID53 Priority/Priority Byte Offset 53 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID52 ,Interrupt ID52 Priority/Priority Byte Offset 52 "
|
|
group.long 0x438++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID59 ,Interrupt ID59 Priority/Priority Byte Offset 59 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID58 ,Interrupt ID58 Priority/Priority Byte Offset 58 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID57 ,Interrupt ID57 Priority/Priority Byte Offset 57 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID56 ,Interrupt ID56 Priority/Priority Byte Offset 56 "
|
|
group.long 0x43C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID63 ,Interrupt ID63 Priority/Priority Byte Offset 63 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID62 ,Interrupt ID62 Priority/Priority Byte Offset 62 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID61 ,Interrupt ID61 Priority/Priority Byte Offset 61 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID60 ,Interrupt ID60 Priority/Priority Byte Offset 60 "
|
|
else
|
|
hgroup.long 0x420++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
|
|
hgroup.long 0x424++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
|
|
hgroup.long 0x428++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
|
|
hgroup.long 0x42C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
|
|
hgroup.long 0x430++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
|
|
hgroup.long 0x434++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
|
|
hgroup.long 0x438++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
|
|
hgroup.long 0x43C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID67 ,Interrupt ID67 Priority/Priority Byte Offset 67 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID66 ,Interrupt ID66 Priority/Priority Byte Offset 66 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID65 ,Interrupt ID65 Priority/Priority Byte Offset 65 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID64 ,Interrupt ID64 Priority/Priority Byte Offset 64 "
|
|
group.long 0x444++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID71 ,Interrupt ID71 Priority/Priority Byte Offset 71 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID70 ,Interrupt ID70 Priority/Priority Byte Offset 70 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID69 ,Interrupt ID69 Priority/Priority Byte Offset 69 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID68 ,Interrupt ID68 Priority/Priority Byte Offset 68 "
|
|
group.long 0x448++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID75 ,Interrupt ID75 Priority/Priority Byte Offset 75 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID74 ,Interrupt ID74 Priority/Priority Byte Offset 74 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID73 ,Interrupt ID73 Priority/Priority Byte Offset 73 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID72 ,Interrupt ID72 Priority/Priority Byte Offset 72 "
|
|
group.long 0x44C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID79 ,Interrupt ID79 Priority/Priority Byte Offset 79 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID78 ,Interrupt ID78 Priority/Priority Byte Offset 78 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID77 ,Interrupt ID77 Priority/Priority Byte Offset 77 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID76 ,Interrupt ID76 Priority/Priority Byte Offset 76 "
|
|
group.long 0x450++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID83 ,Interrupt ID83 Priority/Priority Byte Offset 83 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID82 ,Interrupt ID82 Priority/Priority Byte Offset 82 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID81 ,Interrupt ID81 Priority/Priority Byte Offset 81 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID80 ,Interrupt ID80 Priority/Priority Byte Offset 80 "
|
|
group.long 0x454++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID87 ,Interrupt ID87 Priority/Priority Byte Offset 87 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID86 ,Interrupt ID86 Priority/Priority Byte Offset 86 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID85 ,Interrupt ID85 Priority/Priority Byte Offset 85 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID84 ,Interrupt ID84 Priority/Priority Byte Offset 84 "
|
|
group.long 0x458++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID91 ,Interrupt ID91 Priority/Priority Byte Offset 91 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID90 ,Interrupt ID90 Priority/Priority Byte Offset 90 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID89 ,Interrupt ID89 Priority/Priority Byte Offset 89 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID88 ,Interrupt ID88 Priority/Priority Byte Offset 88 "
|
|
group.long 0x45C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID95 ,Interrupt ID95 Priority/Priority Byte Offset 95 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID94 ,Interrupt ID94 Priority/Priority Byte Offset 94 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID93 ,Interrupt ID93 Priority/Priority Byte Offset 93 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID92 ,Interrupt ID92 Priority/Priority Byte Offset 92 "
|
|
else
|
|
hgroup.long 0x440++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
|
|
hgroup.long 0x444++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
|
|
hgroup.long 0x448++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
|
|
hgroup.long 0x44C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
|
|
hgroup.long 0x450++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
|
|
hgroup.long 0x454++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
|
|
hgroup.long 0x458++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
|
|
hgroup.long 0x45C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x460++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID99 ,Interrupt ID99 Priority/Priority Byte Offset 99 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID98 ,Interrupt ID98 Priority/Priority Byte Offset 98 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID97 ,Interrupt ID97 Priority/Priority Byte Offset 97 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID96 ,Interrupt ID96 Priority/Priority Byte Offset 96 "
|
|
group.long 0x464++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID103 ,Interrupt ID103 Priority/Priority Byte Offset 103 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID102 ,Interrupt ID102 Priority/Priority Byte Offset 102 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID101 ,Interrupt ID101 Priority/Priority Byte Offset 101 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID100 ,Interrupt ID100 Priority/Priority Byte Offset 100 "
|
|
group.long 0x468++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID107 ,Interrupt ID107 Priority/Priority Byte Offset 107 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID106 ,Interrupt ID106 Priority/Priority Byte Offset 106 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID105 ,Interrupt ID105 Priority/Priority Byte Offset 105 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID104 ,Interrupt ID104 Priority/Priority Byte Offset 104 "
|
|
group.long 0x46C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID111 ,Interrupt ID111 Priority/Priority Byte Offset 111 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID110 ,Interrupt ID110 Priority/Priority Byte Offset 110 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID109 ,Interrupt ID109 Priority/Priority Byte Offset 109 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID108 ,Interrupt ID108 Priority/Priority Byte Offset 108 "
|
|
group.long 0x470++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID115 ,Interrupt ID115 Priority/Priority Byte Offset 115 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID114 ,Interrupt ID114 Priority/Priority Byte Offset 114 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID113 ,Interrupt ID113 Priority/Priority Byte Offset 113 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID112 ,Interrupt ID112 Priority/Priority Byte Offset 112 "
|
|
group.long 0x474++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID119 ,Interrupt ID119 Priority/Priority Byte Offset 119 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID118 ,Interrupt ID118 Priority/Priority Byte Offset 118 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID117 ,Interrupt ID117 Priority/Priority Byte Offset 117 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID116 ,Interrupt ID116 Priority/Priority Byte Offset 116 "
|
|
group.long 0x478++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID123 ,Interrupt ID123 Priority/Priority Byte Offset 123 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID122 ,Interrupt ID122 Priority/Priority Byte Offset 122 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID121 ,Interrupt ID121 Priority/Priority Byte Offset 121 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID120 ,Interrupt ID120 Priority/Priority Byte Offset 120 "
|
|
group.long 0x47C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID127 ,Interrupt ID127 Priority/Priority Byte Offset 127 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID126 ,Interrupt ID126 Priority/Priority Byte Offset 126 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID125 ,Interrupt ID125 Priority/Priority Byte Offset 125 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID124 ,Interrupt ID124 Priority/Priority Byte Offset 124 "
|
|
else
|
|
hgroup.long 0x460++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
|
|
hgroup.long 0x464++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
|
|
hgroup.long 0x468++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
|
|
hgroup.long 0x46C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
|
|
hgroup.long 0x470++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
|
|
hgroup.long 0x474++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
|
|
hgroup.long 0x478++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
|
|
hgroup.long 0x47C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x480++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID131 ,Interrupt ID131 Priority/Priority Byte Offset 131 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID130 ,Interrupt ID130 Priority/Priority Byte Offset 130 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID129 ,Interrupt ID129 Priority/Priority Byte Offset 129 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID128 ,Interrupt ID128 Priority/Priority Byte Offset 128 "
|
|
group.long 0x484++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID135 ,Interrupt ID135 Priority/Priority Byte Offset 135 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID134 ,Interrupt ID134 Priority/Priority Byte Offset 134 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID133 ,Interrupt ID133 Priority/Priority Byte Offset 133 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID132 ,Interrupt ID132 Priority/Priority Byte Offset 132 "
|
|
group.long 0x488++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID139 ,Interrupt ID139 Priority/Priority Byte Offset 139 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID138 ,Interrupt ID138 Priority/Priority Byte Offset 138 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID137 ,Interrupt ID137 Priority/Priority Byte Offset 137 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID136 ,Interrupt ID136 Priority/Priority Byte Offset 136 "
|
|
group.long 0x48C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID143 ,Interrupt ID143 Priority/Priority Byte Offset 143 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID142 ,Interrupt ID142 Priority/Priority Byte Offset 142 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID141 ,Interrupt ID141 Priority/Priority Byte Offset 141 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID140 ,Interrupt ID140 Priority/Priority Byte Offset 140 "
|
|
group.long 0x490++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID147 ,Interrupt ID147 Priority/Priority Byte Offset 147 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID146 ,Interrupt ID146 Priority/Priority Byte Offset 146 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID145 ,Interrupt ID145 Priority/Priority Byte Offset 145 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID144 ,Interrupt ID144 Priority/Priority Byte Offset 144 "
|
|
group.long 0x494++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID151 ,Interrupt ID151 Priority/Priority Byte Offset 151 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID150 ,Interrupt ID150 Priority/Priority Byte Offset 150 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID149 ,Interrupt ID149 Priority/Priority Byte Offset 149 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID148 ,Interrupt ID148 Priority/Priority Byte Offset 148 "
|
|
group.long 0x498++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID155 ,Interrupt ID155 Priority/Priority Byte Offset 155 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID154 ,Interrupt ID154 Priority/Priority Byte Offset 154 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID153 ,Interrupt ID153 Priority/Priority Byte Offset 153 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID152 ,Interrupt ID152 Priority/Priority Byte Offset 152 "
|
|
group.long 0x49C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID159 ,Interrupt ID159 Priority/Priority Byte Offset 159 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID158 ,Interrupt ID158 Priority/Priority Byte Offset 158 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID157 ,Interrupt ID157 Priority/Priority Byte Offset 157 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID156 ,Interrupt ID156 Priority/Priority Byte Offset 156 "
|
|
else
|
|
hgroup.long 0x480++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
|
|
hgroup.long 0x484++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
|
|
hgroup.long 0x488++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
|
|
hgroup.long 0x48C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
|
|
hgroup.long 0x490++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
|
|
hgroup.long 0x494++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
|
|
hgroup.long 0x498++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
|
|
hgroup.long 0x49C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x4A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID163 ,Interrupt ID163 Priority/Priority Byte Offset 163 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID162 ,Interrupt ID162 Priority/Priority Byte Offset 162 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID161 ,Interrupt ID161 Priority/Priority Byte Offset 161 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID160 ,Interrupt ID160 Priority/Priority Byte Offset 160 "
|
|
group.long 0x4A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID167 ,Interrupt ID167 Priority/Priority Byte Offset 167 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID166 ,Interrupt ID166 Priority/Priority Byte Offset 166 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID165 ,Interrupt ID165 Priority/Priority Byte Offset 165 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID164 ,Interrupt ID164 Priority/Priority Byte Offset 164 "
|
|
group.long 0x4A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID171 ,Interrupt ID171 Priority/Priority Byte Offset 171 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID170 ,Interrupt ID170 Priority/Priority Byte Offset 170 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID169 ,Interrupt ID169 Priority/Priority Byte Offset 169 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID168 ,Interrupt ID168 Priority/Priority Byte Offset 168 "
|
|
group.long 0x4AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID175 ,Interrupt ID175 Priority/Priority Byte Offset 175 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID174 ,Interrupt ID174 Priority/Priority Byte Offset 174 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID173 ,Interrupt ID173 Priority/Priority Byte Offset 173 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID172 ,Interrupt ID172 Priority/Priority Byte Offset 172 "
|
|
group.long 0x4B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID179 ,Interrupt ID179 Priority/Priority Byte Offset 179 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID178 ,Interrupt ID178 Priority/Priority Byte Offset 178 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID177 ,Interrupt ID177 Priority/Priority Byte Offset 177 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID176 ,Interrupt ID176 Priority/Priority Byte Offset 176 "
|
|
group.long 0x4B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID183 ,Interrupt ID183 Priority/Priority Byte Offset 183 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID182 ,Interrupt ID182 Priority/Priority Byte Offset 182 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID181 ,Interrupt ID181 Priority/Priority Byte Offset 181 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID180 ,Interrupt ID180 Priority/Priority Byte Offset 180 "
|
|
group.long 0x4B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID187 ,Interrupt ID187 Priority/Priority Byte Offset 187 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID186 ,Interrupt ID186 Priority/Priority Byte Offset 186 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID185 ,Interrupt ID185 Priority/Priority Byte Offset 185 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID184 ,Interrupt ID184 Priority/Priority Byte Offset 184 "
|
|
group.long 0x4BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID191 ,Interrupt ID191 Priority/Priority Byte Offset 191 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID190 ,Interrupt ID190 Priority/Priority Byte Offset 190 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID189 ,Interrupt ID189 Priority/Priority Byte Offset 189 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID188 ,Interrupt ID188 Priority/Priority Byte Offset 188 "
|
|
else
|
|
hgroup.long 0x4A0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
|
|
hgroup.long 0x4A4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
|
|
hgroup.long 0x4A8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
|
|
hgroup.long 0x4AC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
|
|
hgroup.long 0x4B0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
|
|
hgroup.long 0x4B4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
|
|
hgroup.long 0x4B8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
|
|
hgroup.long 0x4BC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x4C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID195 ,Interrupt ID195 Priority/Priority Byte Offset 195 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID194 ,Interrupt ID194 Priority/Priority Byte Offset 194 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID193 ,Interrupt ID193 Priority/Priority Byte Offset 193 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID192 ,Interrupt ID192 Priority/Priority Byte Offset 192 "
|
|
group.long 0x4C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID199 ,Interrupt ID199 Priority/Priority Byte Offset 199 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID198 ,Interrupt ID198 Priority/Priority Byte Offset 198 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID197 ,Interrupt ID197 Priority/Priority Byte Offset 197 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID196 ,Interrupt ID196 Priority/Priority Byte Offset 196 "
|
|
group.long 0x4C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID203 ,Interrupt ID203 Priority/Priority Byte Offset 203 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID202 ,Interrupt ID202 Priority/Priority Byte Offset 202 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID201 ,Interrupt ID201 Priority/Priority Byte Offset 201 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID200 ,Interrupt ID200 Priority/Priority Byte Offset 200 "
|
|
group.long 0x4CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID207 ,Interrupt ID207 Priority/Priority Byte Offset 207 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID206 ,Interrupt ID206 Priority/Priority Byte Offset 206 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID205 ,Interrupt ID205 Priority/Priority Byte Offset 205 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID204 ,Interrupt ID204 Priority/Priority Byte Offset 204 "
|
|
group.long 0x4D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID211 ,Interrupt ID211 Priority/Priority Byte Offset 211 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID210 ,Interrupt ID210 Priority/Priority Byte Offset 210 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID209 ,Interrupt ID209 Priority/Priority Byte Offset 209 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID208 ,Interrupt ID208 Priority/Priority Byte Offset 208 "
|
|
group.long 0x4D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID215 ,Interrupt ID215 Priority/Priority Byte Offset 215 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID214 ,Interrupt ID214 Priority/Priority Byte Offset 214 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID213 ,Interrupt ID213 Priority/Priority Byte Offset 213 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID212 ,Interrupt ID212 Priority/Priority Byte Offset 212 "
|
|
group.long 0x4D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID219 ,Interrupt ID219 Priority/Priority Byte Offset 219 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID218 ,Interrupt ID218 Priority/Priority Byte Offset 218 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID217 ,Interrupt ID217 Priority/Priority Byte Offset 217 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID216 ,Interrupt ID216 Priority/Priority Byte Offset 216 "
|
|
group.long 0x4DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID223 ,Interrupt ID223 Priority/Priority Byte Offset 223 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID222 ,Interrupt ID222 Priority/Priority Byte Offset 222 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID221 ,Interrupt ID221 Priority/Priority Byte Offset 221 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID220 ,Interrupt ID220 Priority/Priority Byte Offset 220 "
|
|
else
|
|
hgroup.long 0x4C0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
|
|
hgroup.long 0x4C4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
|
|
hgroup.long 0x4C8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
|
|
hgroup.long 0x4CC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
|
|
hgroup.long 0x4D0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
|
|
hgroup.long 0x4D4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
|
|
hgroup.long 0x4D8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
|
|
hgroup.long 0x4DC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x4E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID227 ,Interrupt ID227 Priority/Priority Byte Offset 227 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID226 ,Interrupt ID226 Priority/Priority Byte Offset 226 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID225 ,Interrupt ID225 Priority/Priority Byte Offset 225 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID224 ,Interrupt ID224 Priority/Priority Byte Offset 224 "
|
|
group.long 0x4E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID231 ,Interrupt ID231 Priority/Priority Byte Offset 231 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID230 ,Interrupt ID230 Priority/Priority Byte Offset 230 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID229 ,Interrupt ID229 Priority/Priority Byte Offset 229 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID228 ,Interrupt ID228 Priority/Priority Byte Offset 228 "
|
|
group.long 0x4E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID235 ,Interrupt ID235 Priority/Priority Byte Offset 235 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID234 ,Interrupt ID234 Priority/Priority Byte Offset 234 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID233 ,Interrupt ID233 Priority/Priority Byte Offset 233 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID232 ,Interrupt ID232 Priority/Priority Byte Offset 232 "
|
|
group.long 0x4EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID239 ,Interrupt ID239 Priority/Priority Byte Offset 239 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID238 ,Interrupt ID238 Priority/Priority Byte Offset 238 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID237 ,Interrupt ID237 Priority/Priority Byte Offset 237 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID236 ,Interrupt ID236 Priority/Priority Byte Offset 236 "
|
|
group.long 0x4F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID243 ,Interrupt ID243 Priority/Priority Byte Offset 243 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID242 ,Interrupt ID242 Priority/Priority Byte Offset 242 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID241 ,Interrupt ID241 Priority/Priority Byte Offset 241 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID240 ,Interrupt ID240 Priority/Priority Byte Offset 240 "
|
|
group.long 0x4F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID247 ,Interrupt ID247 Priority/Priority Byte Offset 247 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID246 ,Interrupt ID246 Priority/Priority Byte Offset 246 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID245 ,Interrupt ID245 Priority/Priority Byte Offset 245 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID244 ,Interrupt ID244 Priority/Priority Byte Offset 244 "
|
|
group.long 0x4F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID251 ,Interrupt ID251 Priority/Priority Byte Offset 251 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID250 ,Interrupt ID250 Priority/Priority Byte Offset 250 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID249 ,Interrupt ID249 Priority/Priority Byte Offset 249 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID248 ,Interrupt ID248 Priority/Priority Byte Offset 248 "
|
|
group.long 0x4FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID255 ,Interrupt ID255 Priority/Priority Byte Offset 255 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID254 ,Interrupt ID254 Priority/Priority Byte Offset 254 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID253 ,Interrupt ID253 Priority/Priority Byte Offset 253 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID252 ,Interrupt ID252 Priority/Priority Byte Offset 252 "
|
|
else
|
|
hgroup.long 0x4E0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
|
|
hgroup.long 0x4E4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
|
|
hgroup.long 0x4E8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
|
|
hgroup.long 0x4EC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
|
|
hgroup.long 0x4F0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
|
|
hgroup.long 0x4F4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
|
|
hgroup.long 0x4F8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
|
|
hgroup.long 0x4FC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID259 ,Interrupt ID259 Priority/Priority Byte Offset 259 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID258 ,Interrupt ID258 Priority/Priority Byte Offset 258 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID257 ,Interrupt ID257 Priority/Priority Byte Offset 257 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID256 ,Interrupt ID256 Priority/Priority Byte Offset 256 "
|
|
group.long 0x504++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID263 ,Interrupt ID263 Priority/Priority Byte Offset 263 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID262 ,Interrupt ID262 Priority/Priority Byte Offset 262 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID261 ,Interrupt ID261 Priority/Priority Byte Offset 261 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID260 ,Interrupt ID260 Priority/Priority Byte Offset 260 "
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID267 ,Interrupt ID267 Priority/Priority Byte Offset 267 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID266 ,Interrupt ID266 Priority/Priority Byte Offset 266 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID265 ,Interrupt ID265 Priority/Priority Byte Offset 265 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID264 ,Interrupt ID264 Priority/Priority Byte Offset 264 "
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID271 ,Interrupt ID271 Priority/Priority Byte Offset 271 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID270 ,Interrupt ID270 Priority/Priority Byte Offset 270 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID269 ,Interrupt ID269 Priority/Priority Byte Offset 269 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID268 ,Interrupt ID268 Priority/Priority Byte Offset 268 "
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID275 ,Interrupt ID275 Priority/Priority Byte Offset 275 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID274 ,Interrupt ID274 Priority/Priority Byte Offset 274 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID273 ,Interrupt ID273 Priority/Priority Byte Offset 273 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID272 ,Interrupt ID272 Priority/Priority Byte Offset 272 "
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID279 ,Interrupt ID279 Priority/Priority Byte Offset 279 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID278 ,Interrupt ID278 Priority/Priority Byte Offset 278 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID277 ,Interrupt ID277 Priority/Priority Byte Offset 277 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID276 ,Interrupt ID276 Priority/Priority Byte Offset 276 "
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID283 ,Interrupt ID283 Priority/Priority Byte Offset 283 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID282 ,Interrupt ID282 Priority/Priority Byte Offset 282 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID281 ,Interrupt ID281 Priority/Priority Byte Offset 281 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID280 ,Interrupt ID280 Priority/Priority Byte Offset 280 "
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID287 ,Interrupt ID287 Priority/Priority Byte Offset 287 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID286 ,Interrupt ID286 Priority/Priority Byte Offset 286 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID285 ,Interrupt ID285 Priority/Priority Byte Offset 285 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID284 ,Interrupt ID284 Priority/Priority Byte Offset 284 "
|
|
else
|
|
hgroup.long 0x500++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
|
|
hgroup.long 0x504++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
|
|
hgroup.long 0x508++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
|
|
hgroup.long 0x50C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
|
|
hgroup.long 0x510++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
|
|
hgroup.long 0x514++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
|
|
hgroup.long 0x518++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
|
|
hgroup.long 0x51C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID291 ,Interrupt ID291 Priority/Priority Byte Offset 291 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID290 ,Interrupt ID290 Priority/Priority Byte Offset 290 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID289 ,Interrupt ID289 Priority/Priority Byte Offset 289 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID288 ,Interrupt ID288 Priority/Priority Byte Offset 288 "
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID295 ,Interrupt ID295 Priority/Priority Byte Offset 295 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID294 ,Interrupt ID294 Priority/Priority Byte Offset 294 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID293 ,Interrupt ID293 Priority/Priority Byte Offset 293 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID292 ,Interrupt ID292 Priority/Priority Byte Offset 292 "
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID299 ,Interrupt ID299 Priority/Priority Byte Offset 299 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID298 ,Interrupt ID298 Priority/Priority Byte Offset 298 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID297 ,Interrupt ID297 Priority/Priority Byte Offset 297 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID296 ,Interrupt ID296 Priority/Priority Byte Offset 296 "
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID303 ,Interrupt ID303 Priority/Priority Byte Offset 303 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID302 ,Interrupt ID302 Priority/Priority Byte Offset 302 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID301 ,Interrupt ID301 Priority/Priority Byte Offset 301 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID300 ,Interrupt ID300 Priority/Priority Byte Offset 300 "
|
|
group.long 0x530++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID307 ,Interrupt ID307 Priority/Priority Byte Offset 307 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID306 ,Interrupt ID306 Priority/Priority Byte Offset 306 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID305 ,Interrupt ID305 Priority/Priority Byte Offset 305 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID304 ,Interrupt ID304 Priority/Priority Byte Offset 304 "
|
|
group.long 0x534++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID311 ,Interrupt ID311 Priority/Priority Byte Offset 311 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID310 ,Interrupt ID310 Priority/Priority Byte Offset 310 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID309 ,Interrupt ID309 Priority/Priority Byte Offset 309 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID308 ,Interrupt ID308 Priority/Priority Byte Offset 308 "
|
|
group.long 0x538++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID315 ,Interrupt ID315 Priority/Priority Byte Offset 315 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID314 ,Interrupt ID314 Priority/Priority Byte Offset 314 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID313 ,Interrupt ID313 Priority/Priority Byte Offset 313 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID312 ,Interrupt ID312 Priority/Priority Byte Offset 312 "
|
|
group.long 0x53C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID319 ,Interrupt ID319 Priority/Priority Byte Offset 319 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID318 ,Interrupt ID318 Priority/Priority Byte Offset 318 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID317 ,Interrupt ID317 Priority/Priority Byte Offset 317 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID316 ,Interrupt ID316 Priority/Priority Byte Offset 316 "
|
|
else
|
|
hgroup.long 0x520++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
|
|
hgroup.long 0x524++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
|
|
hgroup.long 0x528++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
|
|
hgroup.long 0x52C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
|
|
hgroup.long 0x530++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
|
|
hgroup.long 0x534++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
|
|
hgroup.long 0x538++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
|
|
hgroup.long 0x53C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID323 ,Interrupt ID323 Priority/Priority Byte Offset 323 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID322 ,Interrupt ID322 Priority/Priority Byte Offset 322 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID321 ,Interrupt ID321 Priority/Priority Byte Offset 321 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID320 ,Interrupt ID320 Priority/Priority Byte Offset 320 "
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID327 ,Interrupt ID327 Priority/Priority Byte Offset 327 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID326 ,Interrupt ID326 Priority/Priority Byte Offset 326 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID325 ,Interrupt ID325 Priority/Priority Byte Offset 325 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID324 ,Interrupt ID324 Priority/Priority Byte Offset 324 "
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID331 ,Interrupt ID331 Priority/Priority Byte Offset 331 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID330 ,Interrupt ID330 Priority/Priority Byte Offset 330 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID329 ,Interrupt ID329 Priority/Priority Byte Offset 329 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID328 ,Interrupt ID328 Priority/Priority Byte Offset 328 "
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID335 ,Interrupt ID335 Priority/Priority Byte Offset 335 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID334 ,Interrupt ID334 Priority/Priority Byte Offset 334 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID333 ,Interrupt ID333 Priority/Priority Byte Offset 333 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID332 ,Interrupt ID332 Priority/Priority Byte Offset 332 "
|
|
group.long 0x550++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID339 ,Interrupt ID339 Priority/Priority Byte Offset 339 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID338 ,Interrupt ID338 Priority/Priority Byte Offset 338 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID337 ,Interrupt ID337 Priority/Priority Byte Offset 337 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID336 ,Interrupt ID336 Priority/Priority Byte Offset 336 "
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID343 ,Interrupt ID343 Priority/Priority Byte Offset 343 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID342 ,Interrupt ID342 Priority/Priority Byte Offset 342 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID341 ,Interrupt ID341 Priority/Priority Byte Offset 341 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID340 ,Interrupt ID340 Priority/Priority Byte Offset 340 "
|
|
group.long 0x558++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID347 ,Interrupt ID347 Priority/Priority Byte Offset 347 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID346 ,Interrupt ID346 Priority/Priority Byte Offset 346 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID345 ,Interrupt ID345 Priority/Priority Byte Offset 345 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID344 ,Interrupt ID344 Priority/Priority Byte Offset 344 "
|
|
group.long 0x55C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID351 ,Interrupt ID351 Priority/Priority Byte Offset 351 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID350 ,Interrupt ID350 Priority/Priority Byte Offset 350 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID349 ,Interrupt ID349 Priority/Priority Byte Offset 349 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID348 ,Interrupt ID348 Priority/Priority Byte Offset 348 "
|
|
else
|
|
hgroup.long 0x540++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
|
|
hgroup.long 0x544++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
|
|
hgroup.long 0x548++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
|
|
hgroup.long 0x54C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
|
|
hgroup.long 0x550++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
|
|
hgroup.long 0x554++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
|
|
hgroup.long 0x558++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
|
|
hgroup.long 0x55C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID355 ,Interrupt ID355 Priority/Priority Byte Offset 355 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID354 ,Interrupt ID354 Priority/Priority Byte Offset 354 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID353 ,Interrupt ID353 Priority/Priority Byte Offset 353 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID352 ,Interrupt ID352 Priority/Priority Byte Offset 352 "
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID359 ,Interrupt ID359 Priority/Priority Byte Offset 359 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID358 ,Interrupt ID358 Priority/Priority Byte Offset 358 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID357 ,Interrupt ID357 Priority/Priority Byte Offset 357 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID356 ,Interrupt ID356 Priority/Priority Byte Offset 356 "
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID363 ,Interrupt ID363 Priority/Priority Byte Offset 363 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID362 ,Interrupt ID362 Priority/Priority Byte Offset 362 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID361 ,Interrupt ID361 Priority/Priority Byte Offset 361 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID360 ,Interrupt ID360 Priority/Priority Byte Offset 360 "
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID367 ,Interrupt ID367 Priority/Priority Byte Offset 367 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID366 ,Interrupt ID366 Priority/Priority Byte Offset 366 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID365 ,Interrupt ID365 Priority/Priority Byte Offset 365 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID364 ,Interrupt ID364 Priority/Priority Byte Offset 364 "
|
|
group.long 0x570++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID371 ,Interrupt ID371 Priority/Priority Byte Offset 371 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID370 ,Interrupt ID370 Priority/Priority Byte Offset 370 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID369 ,Interrupt ID369 Priority/Priority Byte Offset 369 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID368 ,Interrupt ID368 Priority/Priority Byte Offset 368 "
|
|
group.long 0x574++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID375 ,Interrupt ID375 Priority/Priority Byte Offset 375 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID374 ,Interrupt ID374 Priority/Priority Byte Offset 374 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID373 ,Interrupt ID373 Priority/Priority Byte Offset 373 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID372 ,Interrupt ID372 Priority/Priority Byte Offset 372 "
|
|
group.long 0x578++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID379 ,Interrupt ID379 Priority/Priority Byte Offset 379 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID378 ,Interrupt ID378 Priority/Priority Byte Offset 378 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID377 ,Interrupt ID377 Priority/Priority Byte Offset 377 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID376 ,Interrupt ID376 Priority/Priority Byte Offset 376 "
|
|
group.long 0x57C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID383 ,Interrupt ID383 Priority/Priority Byte Offset 383 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID382 ,Interrupt ID382 Priority/Priority Byte Offset 382 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID381 ,Interrupt ID381 Priority/Priority Byte Offset 381 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID380 ,Interrupt ID380 Priority/Priority Byte Offset 380 "
|
|
else
|
|
hgroup.long 0x560++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
|
|
hgroup.long 0x564++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
|
|
hgroup.long 0x568++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
|
|
hgroup.long 0x56C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
|
|
hgroup.long 0x570++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
|
|
hgroup.long 0x574++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
|
|
hgroup.long 0x578++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
|
|
hgroup.long 0x57C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x580++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID387 ,Interrupt ID387 Priority/Priority Byte Offset 387 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID386 ,Interrupt ID386 Priority/Priority Byte Offset 386 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID385 ,Interrupt ID385 Priority/Priority Byte Offset 385 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID384 ,Interrupt ID384 Priority/Priority Byte Offset 384 "
|
|
group.long 0x584++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID391 ,Interrupt ID391 Priority/Priority Byte Offset 391 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID390 ,Interrupt ID390 Priority/Priority Byte Offset 390 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID389 ,Interrupt ID389 Priority/Priority Byte Offset 389 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID388 ,Interrupt ID388 Priority/Priority Byte Offset 388 "
|
|
group.long 0x588++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID395 ,Interrupt ID395 Priority/Priority Byte Offset 395 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID394 ,Interrupt ID394 Priority/Priority Byte Offset 394 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID393 ,Interrupt ID393 Priority/Priority Byte Offset 393 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID392 ,Interrupt ID392 Priority/Priority Byte Offset 392 "
|
|
group.long 0x58C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID399 ,Interrupt ID399 Priority/Priority Byte Offset 399 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID398 ,Interrupt ID398 Priority/Priority Byte Offset 398 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID397 ,Interrupt ID397 Priority/Priority Byte Offset 397 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID396 ,Interrupt ID396 Priority/Priority Byte Offset 396 "
|
|
group.long 0x590++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID403 ,Interrupt ID403 Priority/Priority Byte Offset 403 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID402 ,Interrupt ID402 Priority/Priority Byte Offset 402 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID401 ,Interrupt ID401 Priority/Priority Byte Offset 401 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID400 ,Interrupt ID400 Priority/Priority Byte Offset 400 "
|
|
group.long 0x594++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID407 ,Interrupt ID407 Priority/Priority Byte Offset 407 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID406 ,Interrupt ID406 Priority/Priority Byte Offset 406 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID405 ,Interrupt ID405 Priority/Priority Byte Offset 405 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID404 ,Interrupt ID404 Priority/Priority Byte Offset 404 "
|
|
group.long 0x598++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID411 ,Interrupt ID411 Priority/Priority Byte Offset 411 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID410 ,Interrupt ID410 Priority/Priority Byte Offset 410 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID409 ,Interrupt ID409 Priority/Priority Byte Offset 409 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID408 ,Interrupt ID408 Priority/Priority Byte Offset 408 "
|
|
group.long 0x59C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID415 ,Interrupt ID415 Priority/Priority Byte Offset 415 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID414 ,Interrupt ID414 Priority/Priority Byte Offset 414 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID413 ,Interrupt ID413 Priority/Priority Byte Offset 413 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID412 ,Interrupt ID412 Priority/Priority Byte Offset 412 "
|
|
else
|
|
hgroup.long 0x580++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
|
|
hgroup.long 0x584++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
|
|
hgroup.long 0x588++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
|
|
hgroup.long 0x58C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
|
|
hgroup.long 0x590++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
|
|
hgroup.long 0x594++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
|
|
hgroup.long 0x598++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
|
|
hgroup.long 0x59C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x5A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID419 ,Interrupt ID419 Priority/Priority Byte Offset 419 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID418 ,Interrupt ID418 Priority/Priority Byte Offset 418 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID417 ,Interrupt ID417 Priority/Priority Byte Offset 417 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID416 ,Interrupt ID416 Priority/Priority Byte Offset 416 "
|
|
group.long 0x5A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID423 ,Interrupt ID423 Priority/Priority Byte Offset 423 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID422 ,Interrupt ID422 Priority/Priority Byte Offset 422 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID421 ,Interrupt ID421 Priority/Priority Byte Offset 421 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID420 ,Interrupt ID420 Priority/Priority Byte Offset 420 "
|
|
group.long 0x5A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID427 ,Interrupt ID427 Priority/Priority Byte Offset 427 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID426 ,Interrupt ID426 Priority/Priority Byte Offset 426 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID425 ,Interrupt ID425 Priority/Priority Byte Offset 425 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID424 ,Interrupt ID424 Priority/Priority Byte Offset 424 "
|
|
group.long 0x5AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID431 ,Interrupt ID431 Priority/Priority Byte Offset 431 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID430 ,Interrupt ID430 Priority/Priority Byte Offset 430 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID429 ,Interrupt ID429 Priority/Priority Byte Offset 429 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID428 ,Interrupt ID428 Priority/Priority Byte Offset 428 "
|
|
group.long 0x5B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID435 ,Interrupt ID435 Priority/Priority Byte Offset 435 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID434 ,Interrupt ID434 Priority/Priority Byte Offset 434 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID433 ,Interrupt ID433 Priority/Priority Byte Offset 433 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID432 ,Interrupt ID432 Priority/Priority Byte Offset 432 "
|
|
group.long 0x5B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID439 ,Interrupt ID439 Priority/Priority Byte Offset 439 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID438 ,Interrupt ID438 Priority/Priority Byte Offset 438 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID437 ,Interrupt ID437 Priority/Priority Byte Offset 437 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID436 ,Interrupt ID436 Priority/Priority Byte Offset 436 "
|
|
group.long 0x5B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID443 ,Interrupt ID443 Priority/Priority Byte Offset 443 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID442 ,Interrupt ID442 Priority/Priority Byte Offset 442 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID441 ,Interrupt ID441 Priority/Priority Byte Offset 441 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID440 ,Interrupt ID440 Priority/Priority Byte Offset 440 "
|
|
group.long 0x5BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID447 ,Interrupt ID447 Priority/Priority Byte Offset 447 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID446 ,Interrupt ID446 Priority/Priority Byte Offset 446 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID445 ,Interrupt ID445 Priority/Priority Byte Offset 445 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID444 ,Interrupt ID444 Priority/Priority Byte Offset 444 "
|
|
else
|
|
hgroup.long 0x5A0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
|
|
hgroup.long 0x5A4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
|
|
hgroup.long 0x5A8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
|
|
hgroup.long 0x5AC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
|
|
hgroup.long 0x5B0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
|
|
hgroup.long 0x5B4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
|
|
hgroup.long 0x5B8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
|
|
hgroup.long 0x5BC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID451 ,Interrupt ID451 Priority/Priority Byte Offset 451 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID450 ,Interrupt ID450 Priority/Priority Byte Offset 450 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID449 ,Interrupt ID449 Priority/Priority Byte Offset 449 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID448 ,Interrupt ID448 Priority/Priority Byte Offset 448 "
|
|
group.long 0x5C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID455 ,Interrupt ID455 Priority/Priority Byte Offset 455 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID454 ,Interrupt ID454 Priority/Priority Byte Offset 454 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID453 ,Interrupt ID453 Priority/Priority Byte Offset 453 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID452 ,Interrupt ID452 Priority/Priority Byte Offset 452 "
|
|
group.long 0x5C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID459 ,Interrupt ID459 Priority/Priority Byte Offset 459 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID458 ,Interrupt ID458 Priority/Priority Byte Offset 458 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID457 ,Interrupt ID457 Priority/Priority Byte Offset 457 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID456 ,Interrupt ID456 Priority/Priority Byte Offset 456 "
|
|
group.long 0x5CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID463 ,Interrupt ID463 Priority/Priority Byte Offset 463 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID462 ,Interrupt ID462 Priority/Priority Byte Offset 462 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID461 ,Interrupt ID461 Priority/Priority Byte Offset 461 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID460 ,Interrupt ID460 Priority/Priority Byte Offset 460 "
|
|
group.long 0x5D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID467 ,Interrupt ID467 Priority/Priority Byte Offset 467 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID466 ,Interrupt ID466 Priority/Priority Byte Offset 466 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID465 ,Interrupt ID465 Priority/Priority Byte Offset 465 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID464 ,Interrupt ID464 Priority/Priority Byte Offset 464 "
|
|
group.long 0x5D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID471 ,Interrupt ID471 Priority/Priority Byte Offset 471 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID470 ,Interrupt ID470 Priority/Priority Byte Offset 470 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID469 ,Interrupt ID469 Priority/Priority Byte Offset 469 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID468 ,Interrupt ID468 Priority/Priority Byte Offset 468 "
|
|
group.long 0x5D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID475 ,Interrupt ID475 Priority/Priority Byte Offset 475 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID474 ,Interrupt ID474 Priority/Priority Byte Offset 474 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID473 ,Interrupt ID473 Priority/Priority Byte Offset 473 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID472 ,Interrupt ID472 Priority/Priority Byte Offset 472 "
|
|
group.long 0x5DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID479 ,Interrupt ID479 Priority/Priority Byte Offset 479 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID478 ,Interrupt ID478 Priority/Priority Byte Offset 478 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID477 ,Interrupt ID477 Priority/Priority Byte Offset 477 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID476 ,Interrupt ID476 Priority/Priority Byte Offset 476 "
|
|
else
|
|
hgroup.long 0x5C0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
|
|
hgroup.long 0x5C4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
|
|
hgroup.long 0x5C8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
|
|
hgroup.long 0x5CC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
|
|
hgroup.long 0x5D0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
|
|
hgroup.long 0x5D4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
|
|
hgroup.long 0x5D8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
|
|
hgroup.long 0x5DC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x5E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID483 ,Interrupt ID483 Priority/Priority Byte Offset 483 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID482 ,Interrupt ID482 Priority/Priority Byte Offset 482 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID481 ,Interrupt ID481 Priority/Priority Byte Offset 481 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID480 ,Interrupt ID480 Priority/Priority Byte Offset 480 "
|
|
group.long 0x5E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID487 ,Interrupt ID487 Priority/Priority Byte Offset 487 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID486 ,Interrupt ID486 Priority/Priority Byte Offset 486 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID485 ,Interrupt ID485 Priority/Priority Byte Offset 485 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID484 ,Interrupt ID484 Priority/Priority Byte Offset 484 "
|
|
group.long 0x5E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID491 ,Interrupt ID491 Priority/Priority Byte Offset 491 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID490 ,Interrupt ID490 Priority/Priority Byte Offset 490 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID489 ,Interrupt ID489 Priority/Priority Byte Offset 489 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID488 ,Interrupt ID488 Priority/Priority Byte Offset 488 "
|
|
group.long 0x5EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID495 ,Interrupt ID495 Priority/Priority Byte Offset 495 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID494 ,Interrupt ID494 Priority/Priority Byte Offset 494 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID493 ,Interrupt ID493 Priority/Priority Byte Offset 493 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID492 ,Interrupt ID492 Priority/Priority Byte Offset 492 "
|
|
group.long 0x5F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID499 ,Interrupt ID499 Priority/Priority Byte Offset 499 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID498 ,Interrupt ID498 Priority/Priority Byte Offset 498 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID497 ,Interrupt ID497 Priority/Priority Byte Offset 497 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID496 ,Interrupt ID496 Priority/Priority Byte Offset 496 "
|
|
group.long 0x5F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID503 ,Interrupt ID503 Priority/Priority Byte Offset 503 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID502 ,Interrupt ID502 Priority/Priority Byte Offset 502 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID501 ,Interrupt ID501 Priority/Priority Byte Offset 501 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID500 ,Interrupt ID500 Priority/Priority Byte Offset 500 "
|
|
group.long 0x5F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID507 ,Interrupt ID507 Priority/Priority Byte Offset 507 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID506 ,Interrupt ID506 Priority/Priority Byte Offset 506 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID505 ,Interrupt ID505 Priority/Priority Byte Offset 505 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID504 ,Interrupt ID504 Priority/Priority Byte Offset 504 "
|
|
group.long 0x5FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID511 ,Interrupt ID511 Priority/Priority Byte Offset 511 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID510 ,Interrupt ID510 Priority/Priority Byte Offset 510 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID509 ,Interrupt ID509 Priority/Priority Byte Offset 509 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID508 ,Interrupt ID508 Priority/Priority Byte Offset 508 "
|
|
else
|
|
hgroup.long 0x5E0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
|
|
hgroup.long 0x5E4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
|
|
hgroup.long 0x5E8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
|
|
hgroup.long 0x5EC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
|
|
hgroup.long 0x5F0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
|
|
hgroup.long 0x5F4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
|
|
hgroup.long 0x5F8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
|
|
hgroup.long 0x5FC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID515 ,Interrupt ID515 Priority/Priority Byte Offset 515 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID514 ,Interrupt ID514 Priority/Priority Byte Offset 514 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID513 ,Interrupt ID513 Priority/Priority Byte Offset 513 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID512 ,Interrupt ID512 Priority/Priority Byte Offset 512 "
|
|
group.long 0x604++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID519 ,Interrupt ID519 Priority/Priority Byte Offset 519 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID518 ,Interrupt ID518 Priority/Priority Byte Offset 518 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID517 ,Interrupt ID517 Priority/Priority Byte Offset 517 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID516 ,Interrupt ID516 Priority/Priority Byte Offset 516 "
|
|
group.long 0x608++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID523 ,Interrupt ID523 Priority/Priority Byte Offset 523 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID522 ,Interrupt ID522 Priority/Priority Byte Offset 522 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID521 ,Interrupt ID521 Priority/Priority Byte Offset 521 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID520 ,Interrupt ID520 Priority/Priority Byte Offset 520 "
|
|
group.long 0x60C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID527 ,Interrupt ID527 Priority/Priority Byte Offset 527 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID526 ,Interrupt ID526 Priority/Priority Byte Offset 526 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID525 ,Interrupt ID525 Priority/Priority Byte Offset 525 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID524 ,Interrupt ID524 Priority/Priority Byte Offset 524 "
|
|
group.long 0x610++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID531 ,Interrupt ID531 Priority/Priority Byte Offset 531 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID530 ,Interrupt ID530 Priority/Priority Byte Offset 530 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID529 ,Interrupt ID529 Priority/Priority Byte Offset 529 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID528 ,Interrupt ID528 Priority/Priority Byte Offset 528 "
|
|
group.long 0x614++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID535 ,Interrupt ID535 Priority/Priority Byte Offset 535 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID534 ,Interrupt ID534 Priority/Priority Byte Offset 534 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID533 ,Interrupt ID533 Priority/Priority Byte Offset 533 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID532 ,Interrupt ID532 Priority/Priority Byte Offset 532 "
|
|
group.long 0x618++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID539 ,Interrupt ID539 Priority/Priority Byte Offset 539 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID538 ,Interrupt ID538 Priority/Priority Byte Offset 538 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID537 ,Interrupt ID537 Priority/Priority Byte Offset 537 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID536 ,Interrupt ID536 Priority/Priority Byte Offset 536 "
|
|
group.long 0x61C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID543 ,Interrupt ID543 Priority/Priority Byte Offset 543 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID542 ,Interrupt ID542 Priority/Priority Byte Offset 542 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID541 ,Interrupt ID541 Priority/Priority Byte Offset 541 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID540 ,Interrupt ID540 Priority/Priority Byte Offset 540 "
|
|
else
|
|
hgroup.long 0x600++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
|
|
hgroup.long 0x604++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
|
|
hgroup.long 0x608++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
|
|
hgroup.long 0x60C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
|
|
hgroup.long 0x610++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
|
|
hgroup.long 0x614++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
|
|
hgroup.long 0x618++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
|
|
hgroup.long 0x61C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x620++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID547 ,Interrupt ID547 Priority/Priority Byte Offset 547 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID546 ,Interrupt ID546 Priority/Priority Byte Offset 546 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID545 ,Interrupt ID545 Priority/Priority Byte Offset 545 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID544 ,Interrupt ID544 Priority/Priority Byte Offset 544 "
|
|
group.long 0x624++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID551 ,Interrupt ID551 Priority/Priority Byte Offset 551 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID550 ,Interrupt ID550 Priority/Priority Byte Offset 550 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID549 ,Interrupt ID549 Priority/Priority Byte Offset 549 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID548 ,Interrupt ID548 Priority/Priority Byte Offset 548 "
|
|
group.long 0x628++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID555 ,Interrupt ID555 Priority/Priority Byte Offset 555 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID554 ,Interrupt ID554 Priority/Priority Byte Offset 554 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID553 ,Interrupt ID553 Priority/Priority Byte Offset 553 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID552 ,Interrupt ID552 Priority/Priority Byte Offset 552 "
|
|
group.long 0x62C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID559 ,Interrupt ID559 Priority/Priority Byte Offset 559 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID558 ,Interrupt ID558 Priority/Priority Byte Offset 558 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID557 ,Interrupt ID557 Priority/Priority Byte Offset 557 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID556 ,Interrupt ID556 Priority/Priority Byte Offset 556 "
|
|
group.long 0x630++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID563 ,Interrupt ID563 Priority/Priority Byte Offset 563 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID562 ,Interrupt ID562 Priority/Priority Byte Offset 562 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID561 ,Interrupt ID561 Priority/Priority Byte Offset 561 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID560 ,Interrupt ID560 Priority/Priority Byte Offset 560 "
|
|
group.long 0x634++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID567 ,Interrupt ID567 Priority/Priority Byte Offset 567 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID566 ,Interrupt ID566 Priority/Priority Byte Offset 566 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID565 ,Interrupt ID565 Priority/Priority Byte Offset 565 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID564 ,Interrupt ID564 Priority/Priority Byte Offset 564 "
|
|
group.long 0x638++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID571 ,Interrupt ID571 Priority/Priority Byte Offset 571 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID570 ,Interrupt ID570 Priority/Priority Byte Offset 570 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID569 ,Interrupt ID569 Priority/Priority Byte Offset 569 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID568 ,Interrupt ID568 Priority/Priority Byte Offset 568 "
|
|
group.long 0x63C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID575 ,Interrupt ID575 Priority/Priority Byte Offset 575 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID574 ,Interrupt ID574 Priority/Priority Byte Offset 574 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID573 ,Interrupt ID573 Priority/Priority Byte Offset 573 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID572 ,Interrupt ID572 Priority/Priority Byte Offset 572 "
|
|
else
|
|
hgroup.long 0x620++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
|
|
hgroup.long 0x624++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
|
|
hgroup.long 0x628++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
|
|
hgroup.long 0x62C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
|
|
hgroup.long 0x630++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
|
|
hgroup.long 0x634++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
|
|
hgroup.long 0x638++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
|
|
hgroup.long 0x63C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x640++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID579 ,Interrupt ID579 Priority/Priority Byte Offset 579 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID578 ,Interrupt ID578 Priority/Priority Byte Offset 578 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID577 ,Interrupt ID577 Priority/Priority Byte Offset 577 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID576 ,Interrupt ID576 Priority/Priority Byte Offset 576 "
|
|
group.long 0x644++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID583 ,Interrupt ID583 Priority/Priority Byte Offset 583 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID582 ,Interrupt ID582 Priority/Priority Byte Offset 582 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID581 ,Interrupt ID581 Priority/Priority Byte Offset 581 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID580 ,Interrupt ID580 Priority/Priority Byte Offset 580 "
|
|
group.long 0x648++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID587 ,Interrupt ID587 Priority/Priority Byte Offset 587 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID586 ,Interrupt ID586 Priority/Priority Byte Offset 586 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID585 ,Interrupt ID585 Priority/Priority Byte Offset 585 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID584 ,Interrupt ID584 Priority/Priority Byte Offset 584 "
|
|
group.long 0x64C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID591 ,Interrupt ID591 Priority/Priority Byte Offset 591 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID590 ,Interrupt ID590 Priority/Priority Byte Offset 590 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID589 ,Interrupt ID589 Priority/Priority Byte Offset 589 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID588 ,Interrupt ID588 Priority/Priority Byte Offset 588 "
|
|
group.long 0x650++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID595 ,Interrupt ID595 Priority/Priority Byte Offset 595 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID594 ,Interrupt ID594 Priority/Priority Byte Offset 594 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID593 ,Interrupt ID593 Priority/Priority Byte Offset 593 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID592 ,Interrupt ID592 Priority/Priority Byte Offset 592 "
|
|
group.long 0x654++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID599 ,Interrupt ID599 Priority/Priority Byte Offset 599 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID598 ,Interrupt ID598 Priority/Priority Byte Offset 598 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID597 ,Interrupt ID597 Priority/Priority Byte Offset 597 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID596 ,Interrupt ID596 Priority/Priority Byte Offset 596 "
|
|
group.long 0x658++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID603 ,Interrupt ID603 Priority/Priority Byte Offset 603 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID602 ,Interrupt ID602 Priority/Priority Byte Offset 602 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID601 ,Interrupt ID601 Priority/Priority Byte Offset 601 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID600 ,Interrupt ID600 Priority/Priority Byte Offset 600 "
|
|
group.long 0x65C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID607 ,Interrupt ID607 Priority/Priority Byte Offset 607 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID606 ,Interrupt ID606 Priority/Priority Byte Offset 606 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID605 ,Interrupt ID605 Priority/Priority Byte Offset 605 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID604 ,Interrupt ID604 Priority/Priority Byte Offset 604 "
|
|
else
|
|
hgroup.long 0x640++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
|
|
hgroup.long 0x644++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
|
|
hgroup.long 0x648++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
|
|
hgroup.long 0x64C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
|
|
hgroup.long 0x650++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
|
|
hgroup.long 0x654++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
|
|
hgroup.long 0x658++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
|
|
hgroup.long 0x65C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x660++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID611 ,Interrupt ID611 Priority/Priority Byte Offset 611 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID610 ,Interrupt ID610 Priority/Priority Byte Offset 610 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID609 ,Interrupt ID609 Priority/Priority Byte Offset 609 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID608 ,Interrupt ID608 Priority/Priority Byte Offset 608 "
|
|
group.long 0x664++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID615 ,Interrupt ID615 Priority/Priority Byte Offset 615 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID614 ,Interrupt ID614 Priority/Priority Byte Offset 614 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID613 ,Interrupt ID613 Priority/Priority Byte Offset 613 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID612 ,Interrupt ID612 Priority/Priority Byte Offset 612 "
|
|
group.long 0x668++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID619 ,Interrupt ID619 Priority/Priority Byte Offset 619 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID618 ,Interrupt ID618 Priority/Priority Byte Offset 618 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID617 ,Interrupt ID617 Priority/Priority Byte Offset 617 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID616 ,Interrupt ID616 Priority/Priority Byte Offset 616 "
|
|
group.long 0x66C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID623 ,Interrupt ID623 Priority/Priority Byte Offset 623 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID622 ,Interrupt ID622 Priority/Priority Byte Offset 622 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID621 ,Interrupt ID621 Priority/Priority Byte Offset 621 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID620 ,Interrupt ID620 Priority/Priority Byte Offset 620 "
|
|
group.long 0x670++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID627 ,Interrupt ID627 Priority/Priority Byte Offset 627 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID626 ,Interrupt ID626 Priority/Priority Byte Offset 626 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID625 ,Interrupt ID625 Priority/Priority Byte Offset 625 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID624 ,Interrupt ID624 Priority/Priority Byte Offset 624 "
|
|
group.long 0x674++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID631 ,Interrupt ID631 Priority/Priority Byte Offset 631 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID630 ,Interrupt ID630 Priority/Priority Byte Offset 630 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID629 ,Interrupt ID629 Priority/Priority Byte Offset 629 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID628 ,Interrupt ID628 Priority/Priority Byte Offset 628 "
|
|
group.long 0x678++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID635 ,Interrupt ID635 Priority/Priority Byte Offset 635 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID634 ,Interrupt ID634 Priority/Priority Byte Offset 634 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID633 ,Interrupt ID633 Priority/Priority Byte Offset 633 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID632 ,Interrupt ID632 Priority/Priority Byte Offset 632 "
|
|
group.long 0x67C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID639 ,Interrupt ID639 Priority/Priority Byte Offset 639 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID638 ,Interrupt ID638 Priority/Priority Byte Offset 638 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID637 ,Interrupt ID637 Priority/Priority Byte Offset 637 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID636 ,Interrupt ID636 Priority/Priority Byte Offset 636 "
|
|
else
|
|
hgroup.long 0x660++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
|
|
hgroup.long 0x664++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
|
|
hgroup.long 0x668++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
|
|
hgroup.long 0x66C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
|
|
hgroup.long 0x670++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
|
|
hgroup.long 0x674++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
|
|
hgroup.long 0x678++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
|
|
hgroup.long 0x67C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x680++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID643 ,Interrupt ID643 Priority/Priority Byte Offset 643 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID642 ,Interrupt ID642 Priority/Priority Byte Offset 642 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID641 ,Interrupt ID641 Priority/Priority Byte Offset 641 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID640 ,Interrupt ID640 Priority/Priority Byte Offset 640 "
|
|
group.long 0x684++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID647 ,Interrupt ID647 Priority/Priority Byte Offset 647 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID646 ,Interrupt ID646 Priority/Priority Byte Offset 646 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID645 ,Interrupt ID645 Priority/Priority Byte Offset 645 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID644 ,Interrupt ID644 Priority/Priority Byte Offset 644 "
|
|
group.long 0x688++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID651 ,Interrupt ID651 Priority/Priority Byte Offset 651 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID650 ,Interrupt ID650 Priority/Priority Byte Offset 650 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID649 ,Interrupt ID649 Priority/Priority Byte Offset 649 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID648 ,Interrupt ID648 Priority/Priority Byte Offset 648 "
|
|
group.long 0x68C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID655 ,Interrupt ID655 Priority/Priority Byte Offset 655 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID654 ,Interrupt ID654 Priority/Priority Byte Offset 654 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID653 ,Interrupt ID653 Priority/Priority Byte Offset 653 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID652 ,Interrupt ID652 Priority/Priority Byte Offset 652 "
|
|
group.long 0x690++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID659 ,Interrupt ID659 Priority/Priority Byte Offset 659 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID658 ,Interrupt ID658 Priority/Priority Byte Offset 658 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID657 ,Interrupt ID657 Priority/Priority Byte Offset 657 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID656 ,Interrupt ID656 Priority/Priority Byte Offset 656 "
|
|
group.long 0x694++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID663 ,Interrupt ID663 Priority/Priority Byte Offset 663 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID662 ,Interrupt ID662 Priority/Priority Byte Offset 662 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID661 ,Interrupt ID661 Priority/Priority Byte Offset 661 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID660 ,Interrupt ID660 Priority/Priority Byte Offset 660 "
|
|
group.long 0x698++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID667 ,Interrupt ID667 Priority/Priority Byte Offset 667 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID666 ,Interrupt ID666 Priority/Priority Byte Offset 666 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID665 ,Interrupt ID665 Priority/Priority Byte Offset 665 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID664 ,Interrupt ID664 Priority/Priority Byte Offset 664 "
|
|
group.long 0x69C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID671 ,Interrupt ID671 Priority/Priority Byte Offset 671 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID670 ,Interrupt ID670 Priority/Priority Byte Offset 670 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID669 ,Interrupt ID669 Priority/Priority Byte Offset 669 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID668 ,Interrupt ID668 Priority/Priority Byte Offset 668 "
|
|
else
|
|
hgroup.long 0x680++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
|
|
hgroup.long 0x684++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
|
|
hgroup.long 0x688++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
|
|
hgroup.long 0x68C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
|
|
hgroup.long 0x690++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
|
|
hgroup.long 0x694++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
|
|
hgroup.long 0x698++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
|
|
hgroup.long 0x69C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x6A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID675 ,Interrupt ID675 Priority/Priority Byte Offset 675 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID674 ,Interrupt ID674 Priority/Priority Byte Offset 674 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID673 ,Interrupt ID673 Priority/Priority Byte Offset 673 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID672 ,Interrupt ID672 Priority/Priority Byte Offset 672 "
|
|
group.long 0x6A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID679 ,Interrupt ID679 Priority/Priority Byte Offset 679 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID678 ,Interrupt ID678 Priority/Priority Byte Offset 678 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID677 ,Interrupt ID677 Priority/Priority Byte Offset 677 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID676 ,Interrupt ID676 Priority/Priority Byte Offset 676 "
|
|
group.long 0x6A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID683 ,Interrupt ID683 Priority/Priority Byte Offset 683 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID682 ,Interrupt ID682 Priority/Priority Byte Offset 682 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID681 ,Interrupt ID681 Priority/Priority Byte Offset 681 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID680 ,Interrupt ID680 Priority/Priority Byte Offset 680 "
|
|
group.long 0x6AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID687 ,Interrupt ID687 Priority/Priority Byte Offset 687 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID686 ,Interrupt ID686 Priority/Priority Byte Offset 686 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID685 ,Interrupt ID685 Priority/Priority Byte Offset 685 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID684 ,Interrupt ID684 Priority/Priority Byte Offset 684 "
|
|
group.long 0x6B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID691 ,Interrupt ID691 Priority/Priority Byte Offset 691 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID690 ,Interrupt ID690 Priority/Priority Byte Offset 690 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID689 ,Interrupt ID689 Priority/Priority Byte Offset 689 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID688 ,Interrupt ID688 Priority/Priority Byte Offset 688 "
|
|
group.long 0x6B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID695 ,Interrupt ID695 Priority/Priority Byte Offset 695 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID694 ,Interrupt ID694 Priority/Priority Byte Offset 694 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID693 ,Interrupt ID693 Priority/Priority Byte Offset 693 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID692 ,Interrupt ID692 Priority/Priority Byte Offset 692 "
|
|
group.long 0x6B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID699 ,Interrupt ID699 Priority/Priority Byte Offset 699 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID698 ,Interrupt ID698 Priority/Priority Byte Offset 698 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID697 ,Interrupt ID697 Priority/Priority Byte Offset 697 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID696 ,Interrupt ID696 Priority/Priority Byte Offset 696 "
|
|
group.long 0x6BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID703 ,Interrupt ID703 Priority/Priority Byte Offset 703 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID702 ,Interrupt ID702 Priority/Priority Byte Offset 702 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID701 ,Interrupt ID701 Priority/Priority Byte Offset 701 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID700 ,Interrupt ID700 Priority/Priority Byte Offset 700 "
|
|
else
|
|
hgroup.long 0x6A0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
|
|
hgroup.long 0x6A4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
|
|
hgroup.long 0x6A8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
|
|
hgroup.long 0x6AC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
|
|
hgroup.long 0x6B0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
|
|
hgroup.long 0x6B4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
|
|
hgroup.long 0x6B8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
|
|
hgroup.long 0x6BC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x6C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID707 ,Interrupt ID707 Priority/Priority Byte Offset 707 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID706 ,Interrupt ID706 Priority/Priority Byte Offset 706 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID705 ,Interrupt ID705 Priority/Priority Byte Offset 705 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID704 ,Interrupt ID704 Priority/Priority Byte Offset 704 "
|
|
group.long 0x6C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID711 ,Interrupt ID711 Priority/Priority Byte Offset 711 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID710 ,Interrupt ID710 Priority/Priority Byte Offset 710 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID709 ,Interrupt ID709 Priority/Priority Byte Offset 709 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID708 ,Interrupt ID708 Priority/Priority Byte Offset 708 "
|
|
group.long 0x6C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID715 ,Interrupt ID715 Priority/Priority Byte Offset 715 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID714 ,Interrupt ID714 Priority/Priority Byte Offset 714 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID713 ,Interrupt ID713 Priority/Priority Byte Offset 713 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID712 ,Interrupt ID712 Priority/Priority Byte Offset 712 "
|
|
group.long 0x6CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID719 ,Interrupt ID719 Priority/Priority Byte Offset 719 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID718 ,Interrupt ID718 Priority/Priority Byte Offset 718 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID717 ,Interrupt ID717 Priority/Priority Byte Offset 717 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID716 ,Interrupt ID716 Priority/Priority Byte Offset 716 "
|
|
group.long 0x6D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID723 ,Interrupt ID723 Priority/Priority Byte Offset 723 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID722 ,Interrupt ID722 Priority/Priority Byte Offset 722 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID721 ,Interrupt ID721 Priority/Priority Byte Offset 721 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID720 ,Interrupt ID720 Priority/Priority Byte Offset 720 "
|
|
group.long 0x6D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID727 ,Interrupt ID727 Priority/Priority Byte Offset 727 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID726 ,Interrupt ID726 Priority/Priority Byte Offset 726 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID725 ,Interrupt ID725 Priority/Priority Byte Offset 725 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID724 ,Interrupt ID724 Priority/Priority Byte Offset 724 "
|
|
group.long 0x6D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID731 ,Interrupt ID731 Priority/Priority Byte Offset 731 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID730 ,Interrupt ID730 Priority/Priority Byte Offset 730 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID729 ,Interrupt ID729 Priority/Priority Byte Offset 729 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID728 ,Interrupt ID728 Priority/Priority Byte Offset 728 "
|
|
group.long 0x6DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID735 ,Interrupt ID735 Priority/Priority Byte Offset 735 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID734 ,Interrupt ID734 Priority/Priority Byte Offset 734 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID733 ,Interrupt ID733 Priority/Priority Byte Offset 733 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID732 ,Interrupt ID732 Priority/Priority Byte Offset 732 "
|
|
else
|
|
hgroup.long 0x6C0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
|
|
hgroup.long 0x6C4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
|
|
hgroup.long 0x6C8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
|
|
hgroup.long 0x6CC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
|
|
hgroup.long 0x6D0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
|
|
hgroup.long 0x6D4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
|
|
hgroup.long 0x6D8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
|
|
hgroup.long 0x6DC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x6E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID739 ,Interrupt ID739 Priority/Priority Byte Offset 739 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID738 ,Interrupt ID738 Priority/Priority Byte Offset 738 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID737 ,Interrupt ID737 Priority/Priority Byte Offset 737 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID736 ,Interrupt ID736 Priority/Priority Byte Offset 736 "
|
|
group.long 0x6E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID743 ,Interrupt ID743 Priority/Priority Byte Offset 743 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID742 ,Interrupt ID742 Priority/Priority Byte Offset 742 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID741 ,Interrupt ID741 Priority/Priority Byte Offset 741 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID740 ,Interrupt ID740 Priority/Priority Byte Offset 740 "
|
|
group.long 0x6E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID747 ,Interrupt ID747 Priority/Priority Byte Offset 747 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID746 ,Interrupt ID746 Priority/Priority Byte Offset 746 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID745 ,Interrupt ID745 Priority/Priority Byte Offset 745 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID744 ,Interrupt ID744 Priority/Priority Byte Offset 744 "
|
|
group.long 0x6EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID751 ,Interrupt ID751 Priority/Priority Byte Offset 751 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID750 ,Interrupt ID750 Priority/Priority Byte Offset 750 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID749 ,Interrupt ID749 Priority/Priority Byte Offset 749 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID748 ,Interrupt ID748 Priority/Priority Byte Offset 748 "
|
|
group.long 0x6F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID755 ,Interrupt ID755 Priority/Priority Byte Offset 755 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID754 ,Interrupt ID754 Priority/Priority Byte Offset 754 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID753 ,Interrupt ID753 Priority/Priority Byte Offset 753 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID752 ,Interrupt ID752 Priority/Priority Byte Offset 752 "
|
|
group.long 0x6F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID759 ,Interrupt ID759 Priority/Priority Byte Offset 759 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID758 ,Interrupt ID758 Priority/Priority Byte Offset 758 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID757 ,Interrupt ID757 Priority/Priority Byte Offset 757 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID756 ,Interrupt ID756 Priority/Priority Byte Offset 756 "
|
|
group.long 0x6F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID763 ,Interrupt ID763 Priority/Priority Byte Offset 763 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID762 ,Interrupt ID762 Priority/Priority Byte Offset 762 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID761 ,Interrupt ID761 Priority/Priority Byte Offset 761 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID760 ,Interrupt ID760 Priority/Priority Byte Offset 760 "
|
|
group.long 0x6FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID767 ,Interrupt ID767 Priority/Priority Byte Offset 767 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID766 ,Interrupt ID766 Priority/Priority Byte Offset 766 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID765 ,Interrupt ID765 Priority/Priority Byte Offset 765 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID764 ,Interrupt ID764 Priority/Priority Byte Offset 764 "
|
|
else
|
|
hgroup.long 0x6E0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
|
|
hgroup.long 0x6E4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
|
|
hgroup.long 0x6E8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
|
|
hgroup.long 0x6EC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
|
|
hgroup.long 0x6F0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
|
|
hgroup.long 0x6F4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
|
|
hgroup.long 0x6F8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
|
|
hgroup.long 0x6FC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID771 ,Interrupt ID771 Priority/Priority Byte Offset 771 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID770 ,Interrupt ID770 Priority/Priority Byte Offset 770 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID769 ,Interrupt ID769 Priority/Priority Byte Offset 769 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID768 ,Interrupt ID768 Priority/Priority Byte Offset 768 "
|
|
group.long 0x704++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID775 ,Interrupt ID775 Priority/Priority Byte Offset 775 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID774 ,Interrupt ID774 Priority/Priority Byte Offset 774 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID773 ,Interrupt ID773 Priority/Priority Byte Offset 773 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID772 ,Interrupt ID772 Priority/Priority Byte Offset 772 "
|
|
group.long 0x708++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID779 ,Interrupt ID779 Priority/Priority Byte Offset 779 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID778 ,Interrupt ID778 Priority/Priority Byte Offset 778 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID777 ,Interrupt ID777 Priority/Priority Byte Offset 777 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID776 ,Interrupt ID776 Priority/Priority Byte Offset 776 "
|
|
group.long 0x70C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID783 ,Interrupt ID783 Priority/Priority Byte Offset 783 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID782 ,Interrupt ID782 Priority/Priority Byte Offset 782 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID781 ,Interrupt ID781 Priority/Priority Byte Offset 781 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID780 ,Interrupt ID780 Priority/Priority Byte Offset 780 "
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID787 ,Interrupt ID787 Priority/Priority Byte Offset 787 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID786 ,Interrupt ID786 Priority/Priority Byte Offset 786 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID785 ,Interrupt ID785 Priority/Priority Byte Offset 785 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID784 ,Interrupt ID784 Priority/Priority Byte Offset 784 "
|
|
group.long 0x714++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID791 ,Interrupt ID791 Priority/Priority Byte Offset 791 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID790 ,Interrupt ID790 Priority/Priority Byte Offset 790 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID789 ,Interrupt ID789 Priority/Priority Byte Offset 789 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID788 ,Interrupt ID788 Priority/Priority Byte Offset 788 "
|
|
group.long 0x718++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID795 ,Interrupt ID795 Priority/Priority Byte Offset 795 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID794 ,Interrupt ID794 Priority/Priority Byte Offset 794 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID793 ,Interrupt ID793 Priority/Priority Byte Offset 793 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID792 ,Interrupt ID792 Priority/Priority Byte Offset 792 "
|
|
group.long 0x71C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID799 ,Interrupt ID799 Priority/Priority Byte Offset 799 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID798 ,Interrupt ID798 Priority/Priority Byte Offset 798 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID797 ,Interrupt ID797 Priority/Priority Byte Offset 797 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID796 ,Interrupt ID796 Priority/Priority Byte Offset 796 "
|
|
else
|
|
hgroup.long 0x700++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
|
|
hgroup.long 0x704++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
|
|
hgroup.long 0x708++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
|
|
hgroup.long 0x70C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
|
|
hgroup.long 0x710++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
|
|
hgroup.long 0x714++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
|
|
hgroup.long 0x718++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
|
|
hgroup.long 0x71C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x720++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID803 ,Interrupt ID803 Priority/Priority Byte Offset 803 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID802 ,Interrupt ID802 Priority/Priority Byte Offset 802 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID801 ,Interrupt ID801 Priority/Priority Byte Offset 801 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID800 ,Interrupt ID800 Priority/Priority Byte Offset 800 "
|
|
group.long 0x724++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID807 ,Interrupt ID807 Priority/Priority Byte Offset 807 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID806 ,Interrupt ID806 Priority/Priority Byte Offset 806 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID805 ,Interrupt ID805 Priority/Priority Byte Offset 805 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID804 ,Interrupt ID804 Priority/Priority Byte Offset 804 "
|
|
group.long 0x728++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID811 ,Interrupt ID811 Priority/Priority Byte Offset 811 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID810 ,Interrupt ID810 Priority/Priority Byte Offset 810 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID809 ,Interrupt ID809 Priority/Priority Byte Offset 809 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID808 ,Interrupt ID808 Priority/Priority Byte Offset 808 "
|
|
group.long 0x72C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID815 ,Interrupt ID815 Priority/Priority Byte Offset 815 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID814 ,Interrupt ID814 Priority/Priority Byte Offset 814 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID813 ,Interrupt ID813 Priority/Priority Byte Offset 813 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID812 ,Interrupt ID812 Priority/Priority Byte Offset 812 "
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID819 ,Interrupt ID819 Priority/Priority Byte Offset 819 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID818 ,Interrupt ID818 Priority/Priority Byte Offset 818 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID817 ,Interrupt ID817 Priority/Priority Byte Offset 817 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID816 ,Interrupt ID816 Priority/Priority Byte Offset 816 "
|
|
group.long 0x734++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID823 ,Interrupt ID823 Priority/Priority Byte Offset 823 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID822 ,Interrupt ID822 Priority/Priority Byte Offset 822 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID821 ,Interrupt ID821 Priority/Priority Byte Offset 821 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID820 ,Interrupt ID820 Priority/Priority Byte Offset 820 "
|
|
group.long 0x738++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID827 ,Interrupt ID827 Priority/Priority Byte Offset 827 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID826 ,Interrupt ID826 Priority/Priority Byte Offset 826 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID825 ,Interrupt ID825 Priority/Priority Byte Offset 825 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID824 ,Interrupt ID824 Priority/Priority Byte Offset 824 "
|
|
group.long 0x73C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID831 ,Interrupt ID831 Priority/Priority Byte Offset 831 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID830 ,Interrupt ID830 Priority/Priority Byte Offset 830 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID829 ,Interrupt ID829 Priority/Priority Byte Offset 829 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID828 ,Interrupt ID828 Priority/Priority Byte Offset 828 "
|
|
else
|
|
hgroup.long 0x720++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
|
|
hgroup.long 0x724++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
|
|
hgroup.long 0x728++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
|
|
hgroup.long 0x72C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
|
|
hgroup.long 0x730++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
|
|
hgroup.long 0x734++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
|
|
hgroup.long 0x738++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
|
|
hgroup.long 0x73C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID835 ,Interrupt ID835 Priority/Priority Byte Offset 835 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID834 ,Interrupt ID834 Priority/Priority Byte Offset 834 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID833 ,Interrupt ID833 Priority/Priority Byte Offset 833 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID832 ,Interrupt ID832 Priority/Priority Byte Offset 832 "
|
|
group.long 0x744++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID839 ,Interrupt ID839 Priority/Priority Byte Offset 839 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID838 ,Interrupt ID838 Priority/Priority Byte Offset 838 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID837 ,Interrupt ID837 Priority/Priority Byte Offset 837 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID836 ,Interrupt ID836 Priority/Priority Byte Offset 836 "
|
|
group.long 0x748++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID843 ,Interrupt ID843 Priority/Priority Byte Offset 843 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID842 ,Interrupt ID842 Priority/Priority Byte Offset 842 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID841 ,Interrupt ID841 Priority/Priority Byte Offset 841 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID840 ,Interrupt ID840 Priority/Priority Byte Offset 840 "
|
|
group.long 0x74C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID847 ,Interrupt ID847 Priority/Priority Byte Offset 847 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID846 ,Interrupt ID846 Priority/Priority Byte Offset 846 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID845 ,Interrupt ID845 Priority/Priority Byte Offset 845 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID844 ,Interrupt ID844 Priority/Priority Byte Offset 844 "
|
|
group.long 0x750++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID851 ,Interrupt ID851 Priority/Priority Byte Offset 851 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID850 ,Interrupt ID850 Priority/Priority Byte Offset 850 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID849 ,Interrupt ID849 Priority/Priority Byte Offset 849 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID848 ,Interrupt ID848 Priority/Priority Byte Offset 848 "
|
|
group.long 0x754++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID855 ,Interrupt ID855 Priority/Priority Byte Offset 855 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID854 ,Interrupt ID854 Priority/Priority Byte Offset 854 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID853 ,Interrupt ID853 Priority/Priority Byte Offset 853 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID852 ,Interrupt ID852 Priority/Priority Byte Offset 852 "
|
|
group.long 0x758++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID859 ,Interrupt ID859 Priority/Priority Byte Offset 859 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID858 ,Interrupt ID858 Priority/Priority Byte Offset 858 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID857 ,Interrupt ID857 Priority/Priority Byte Offset 857 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID856 ,Interrupt ID856 Priority/Priority Byte Offset 856 "
|
|
group.long 0x75C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID863 ,Interrupt ID863 Priority/Priority Byte Offset 863 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID862 ,Interrupt ID862 Priority/Priority Byte Offset 862 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID861 ,Interrupt ID861 Priority/Priority Byte Offset 861 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID860 ,Interrupt ID860 Priority/Priority Byte Offset 860 "
|
|
else
|
|
hgroup.long 0x740++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
|
|
hgroup.long 0x744++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
|
|
hgroup.long 0x748++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
|
|
hgroup.long 0x74C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
|
|
hgroup.long 0x750++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
|
|
hgroup.long 0x754++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
|
|
hgroup.long 0x758++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
|
|
hgroup.long 0x75C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x760++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID867 ,Interrupt ID867 Priority/Priority Byte Offset 867 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID866 ,Interrupt ID866 Priority/Priority Byte Offset 866 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID865 ,Interrupt ID865 Priority/Priority Byte Offset 865 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID864 ,Interrupt ID864 Priority/Priority Byte Offset 864 "
|
|
group.long 0x764++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID871 ,Interrupt ID871 Priority/Priority Byte Offset 871 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID870 ,Interrupt ID870 Priority/Priority Byte Offset 870 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID869 ,Interrupt ID869 Priority/Priority Byte Offset 869 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID868 ,Interrupt ID868 Priority/Priority Byte Offset 868 "
|
|
group.long 0x768++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID875 ,Interrupt ID875 Priority/Priority Byte Offset 875 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID874 ,Interrupt ID874 Priority/Priority Byte Offset 874 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID873 ,Interrupt ID873 Priority/Priority Byte Offset 873 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID872 ,Interrupt ID872 Priority/Priority Byte Offset 872 "
|
|
group.long 0x76C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID879 ,Interrupt ID879 Priority/Priority Byte Offset 879 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID878 ,Interrupt ID878 Priority/Priority Byte Offset 878 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID877 ,Interrupt ID877 Priority/Priority Byte Offset 877 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID876 ,Interrupt ID876 Priority/Priority Byte Offset 876 "
|
|
group.long 0x770++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID883 ,Interrupt ID883 Priority/Priority Byte Offset 883 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID882 ,Interrupt ID882 Priority/Priority Byte Offset 882 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID881 ,Interrupt ID881 Priority/Priority Byte Offset 881 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID880 ,Interrupt ID880 Priority/Priority Byte Offset 880 "
|
|
group.long 0x774++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID887 ,Interrupt ID887 Priority/Priority Byte Offset 887 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID886 ,Interrupt ID886 Priority/Priority Byte Offset 886 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID885 ,Interrupt ID885 Priority/Priority Byte Offset 885 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID884 ,Interrupt ID884 Priority/Priority Byte Offset 884 "
|
|
group.long 0x778++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID891 ,Interrupt ID891 Priority/Priority Byte Offset 891 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID890 ,Interrupt ID890 Priority/Priority Byte Offset 890 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID889 ,Interrupt ID889 Priority/Priority Byte Offset 889 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID888 ,Interrupt ID888 Priority/Priority Byte Offset 888 "
|
|
group.long 0x77C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID895 ,Interrupt ID895 Priority/Priority Byte Offset 895 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID894 ,Interrupt ID894 Priority/Priority Byte Offset 894 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID893 ,Interrupt ID893 Priority/Priority Byte Offset 893 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID892 ,Interrupt ID892 Priority/Priority Byte Offset 892 "
|
|
else
|
|
hgroup.long 0x760++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
|
|
hgroup.long 0x764++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
|
|
hgroup.long 0x768++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
|
|
hgroup.long 0x76C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
|
|
hgroup.long 0x770++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
|
|
hgroup.long 0x774++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
|
|
hgroup.long 0x778++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
|
|
hgroup.long 0x77C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x780++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID899 ,Interrupt ID899 Priority/Priority Byte Offset 899 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID898 ,Interrupt ID898 Priority/Priority Byte Offset 898 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID897 ,Interrupt ID897 Priority/Priority Byte Offset 897 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID896 ,Interrupt ID896 Priority/Priority Byte Offset 896 "
|
|
group.long 0x784++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID903 ,Interrupt ID903 Priority/Priority Byte Offset 903 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID902 ,Interrupt ID902 Priority/Priority Byte Offset 902 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID901 ,Interrupt ID901 Priority/Priority Byte Offset 901 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID900 ,Interrupt ID900 Priority/Priority Byte Offset 900 "
|
|
group.long 0x788++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID907 ,Interrupt ID907 Priority/Priority Byte Offset 907 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID906 ,Interrupt ID906 Priority/Priority Byte Offset 906 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID905 ,Interrupt ID905 Priority/Priority Byte Offset 905 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID904 ,Interrupt ID904 Priority/Priority Byte Offset 904 "
|
|
group.long 0x78C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID911 ,Interrupt ID911 Priority/Priority Byte Offset 911 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID910 ,Interrupt ID910 Priority/Priority Byte Offset 910 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID909 ,Interrupt ID909 Priority/Priority Byte Offset 909 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID908 ,Interrupt ID908 Priority/Priority Byte Offset 908 "
|
|
group.long 0x790++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID915 ,Interrupt ID915 Priority/Priority Byte Offset 915 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID914 ,Interrupt ID914 Priority/Priority Byte Offset 914 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID913 ,Interrupt ID913 Priority/Priority Byte Offset 913 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID912 ,Interrupt ID912 Priority/Priority Byte Offset 912 "
|
|
group.long 0x794++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID919 ,Interrupt ID919 Priority/Priority Byte Offset 919 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID918 ,Interrupt ID918 Priority/Priority Byte Offset 918 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID917 ,Interrupt ID917 Priority/Priority Byte Offset 917 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID916 ,Interrupt ID916 Priority/Priority Byte Offset 916 "
|
|
group.long 0x798++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID923 ,Interrupt ID923 Priority/Priority Byte Offset 923 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID922 ,Interrupt ID922 Priority/Priority Byte Offset 922 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID921 ,Interrupt ID921 Priority/Priority Byte Offset 921 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID920 ,Interrupt ID920 Priority/Priority Byte Offset 920 "
|
|
group.long 0x79C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID927 ,Interrupt ID927 Priority/Priority Byte Offset 927 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID926 ,Interrupt ID926 Priority/Priority Byte Offset 926 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID925 ,Interrupt ID925 Priority/Priority Byte Offset 925 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID924 ,Interrupt ID924 Priority/Priority Byte Offset 924 "
|
|
else
|
|
hgroup.long 0x780++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
|
|
hgroup.long 0x784++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
|
|
hgroup.long 0x788++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
|
|
hgroup.long 0x78C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
|
|
hgroup.long 0x790++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
|
|
hgroup.long 0x794++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
|
|
hgroup.long 0x798++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
|
|
hgroup.long 0x79C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x7A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID931 ,Interrupt ID931 Priority/Priority Byte Offset 931 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID930 ,Interrupt ID930 Priority/Priority Byte Offset 930 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID929 ,Interrupt ID929 Priority/Priority Byte Offset 929 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID928 ,Interrupt ID928 Priority/Priority Byte Offset 928 "
|
|
group.long 0x7A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID935 ,Interrupt ID935 Priority/Priority Byte Offset 935 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID934 ,Interrupt ID934 Priority/Priority Byte Offset 934 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID933 ,Interrupt ID933 Priority/Priority Byte Offset 933 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID932 ,Interrupt ID932 Priority/Priority Byte Offset 932 "
|
|
group.long 0x7A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID939 ,Interrupt ID939 Priority/Priority Byte Offset 939 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID938 ,Interrupt ID938 Priority/Priority Byte Offset 938 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID937 ,Interrupt ID937 Priority/Priority Byte Offset 937 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID936 ,Interrupt ID936 Priority/Priority Byte Offset 936 "
|
|
group.long 0x7AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID943 ,Interrupt ID943 Priority/Priority Byte Offset 943 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID942 ,Interrupt ID942 Priority/Priority Byte Offset 942 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID941 ,Interrupt ID941 Priority/Priority Byte Offset 941 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID940 ,Interrupt ID940 Priority/Priority Byte Offset 940 "
|
|
group.long 0x7B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID947 ,Interrupt ID947 Priority/Priority Byte Offset 947 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID946 ,Interrupt ID946 Priority/Priority Byte Offset 946 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID945 ,Interrupt ID945 Priority/Priority Byte Offset 945 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID944 ,Interrupt ID944 Priority/Priority Byte Offset 944 "
|
|
group.long 0x7B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID951 ,Interrupt ID951 Priority/Priority Byte Offset 951 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID950 ,Interrupt ID950 Priority/Priority Byte Offset 950 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID949 ,Interrupt ID949 Priority/Priority Byte Offset 949 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID948 ,Interrupt ID948 Priority/Priority Byte Offset 948 "
|
|
group.long 0x7B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID955 ,Interrupt ID955 Priority/Priority Byte Offset 955 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID954 ,Interrupt ID954 Priority/Priority Byte Offset 954 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID953 ,Interrupt ID953 Priority/Priority Byte Offset 953 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID952 ,Interrupt ID952 Priority/Priority Byte Offset 952 "
|
|
group.long 0x7BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID959 ,Interrupt ID959 Priority/Priority Byte Offset 959 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID958 ,Interrupt ID958 Priority/Priority Byte Offset 958 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID957 ,Interrupt ID957 Priority/Priority Byte Offset 957 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID956 ,Interrupt ID956 Priority/Priority Byte Offset 956 "
|
|
else
|
|
hgroup.long 0x7A0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
|
|
hgroup.long 0x7A4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
|
|
hgroup.long 0x7A8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
|
|
hgroup.long 0x7AC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
|
|
hgroup.long 0x7B0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
|
|
hgroup.long 0x7B4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
|
|
hgroup.long 0x7B8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
|
|
hgroup.long 0x7BC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x7C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID963 ,Interrupt ID963 Priority/Priority Byte Offset 963 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID962 ,Interrupt ID962 Priority/Priority Byte Offset 962 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID961 ,Interrupt ID961 Priority/Priority Byte Offset 961 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID960 ,Interrupt ID960 Priority/Priority Byte Offset 960 "
|
|
group.long 0x7C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID967 ,Interrupt ID967 Priority/Priority Byte Offset 967 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID966 ,Interrupt ID966 Priority/Priority Byte Offset 966 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID965 ,Interrupt ID965 Priority/Priority Byte Offset 965 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID964 ,Interrupt ID964 Priority/Priority Byte Offset 964 "
|
|
group.long 0x7C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID971 ,Interrupt ID971 Priority/Priority Byte Offset 971 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID970 ,Interrupt ID970 Priority/Priority Byte Offset 970 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID969 ,Interrupt ID969 Priority/Priority Byte Offset 969 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID968 ,Interrupt ID968 Priority/Priority Byte Offset 968 "
|
|
group.long 0x7CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID975 ,Interrupt ID975 Priority/Priority Byte Offset 975 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID974 ,Interrupt ID974 Priority/Priority Byte Offset 974 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID973 ,Interrupt ID973 Priority/Priority Byte Offset 973 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID972 ,Interrupt ID972 Priority/Priority Byte Offset 972 "
|
|
group.long 0x7D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID979 ,Interrupt ID979 Priority/Priority Byte Offset 979 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID978 ,Interrupt ID978 Priority/Priority Byte Offset 978 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID977 ,Interrupt ID977 Priority/Priority Byte Offset 977 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID976 ,Interrupt ID976 Priority/Priority Byte Offset 976 "
|
|
group.long 0x7D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID983 ,Interrupt ID983 Priority/Priority Byte Offset 983 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID982 ,Interrupt ID982 Priority/Priority Byte Offset 982 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID981 ,Interrupt ID981 Priority/Priority Byte Offset 981 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID980 ,Interrupt ID980 Priority/Priority Byte Offset 980 "
|
|
group.long 0x7D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID987 ,Interrupt ID987 Priority/Priority Byte Offset 987 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID986 ,Interrupt ID986 Priority/Priority Byte Offset 986 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID985 ,Interrupt ID985 Priority/Priority Byte Offset 985 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID984 ,Interrupt ID984 Priority/Priority Byte Offset 984 "
|
|
group.long 0x7DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID991 ,Interrupt ID991 Priority/Priority Byte Offset 991 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID990 ,Interrupt ID990 Priority/Priority Byte Offset 990 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID989 ,Interrupt ID989 Priority/Priority Byte Offset 989 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID988 ,Interrupt ID988 Priority/Priority Byte Offset 988 "
|
|
else
|
|
hgroup.long 0x7C0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
|
|
hgroup.long 0x7C4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
|
|
hgroup.long 0x7C8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
|
|
hgroup.long 0x7CC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
|
|
hgroup.long 0x7D0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
|
|
hgroup.long 0x7D4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
|
|
hgroup.long 0x7D8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
|
|
hgroup.long 0x7DC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1F)
|
|
group.long 0x7E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID995 ,Interrupt ID995 Priority/Priority Byte Offset 995 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID994 ,Interrupt ID994 Priority/Priority Byte Offset 994 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID993 ,Interrupt ID993 Priority/Priority Byte Offset 993 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID992 ,Interrupt ID992 Priority/Priority Byte Offset 992 "
|
|
group.long 0x7E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID999 ,Interrupt ID999 Priority/Priority Byte Offset 999 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID998 ,Interrupt ID998 Priority/Priority Byte Offset 998 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID997 ,Interrupt ID997 Priority/Priority Byte Offset 997 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID996 ,Interrupt ID996 Priority/Priority Byte Offset 996 "
|
|
group.long 0x7E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1003 ,Interrupt ID1003 Priority/Priority Byte Offset 1003"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1002 ,Interrupt ID1002 Priority/Priority Byte Offset 1002"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1001 ,Interrupt ID1001 Priority/Priority Byte Offset 1001"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1000 ,Interrupt ID1000 Priority/Priority Byte Offset 1000"
|
|
group.long 0x7EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1007 ,Interrupt ID1007 Priority/Priority Byte Offset 1007"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1006 ,Interrupt ID1006 Priority/Priority Byte Offset 1006"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1005 ,Interrupt ID1005 Priority/Priority Byte Offset 1005"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1004 ,Interrupt ID1004 Priority/Priority Byte Offset 1004"
|
|
group.long 0x7F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1011 ,Interrupt ID1011 Priority/Priority Byte Offset 1011"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1010 ,Interrupt ID1010 Priority/Priority Byte Offset 1010"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1009 ,Interrupt ID1009 Priority/Priority Byte Offset 1009"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1008 ,Interrupt ID1008 Priority/Priority Byte Offset 1008"
|
|
group.long 0x7F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1015 ,Interrupt ID1015 Priority/Priority Byte Offset 1015"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1014 ,Interrupt ID1014 Priority/Priority Byte Offset 1014"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1013 ,Interrupt ID1013 Priority/Priority Byte Offset 1013"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1012 ,Interrupt ID1012 Priority/Priority Byte Offset 1012"
|
|
group.long 0x7F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1019 ,Interrupt ID1019 Priority/Priority Byte Offset 1019"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1018 ,Interrupt ID1018 Priority/Priority Byte Offset 1018"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1017 ,Interrupt ID1017 Priority/Priority Byte Offset 1017"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1016 ,Interrupt ID1016 Priority/Priority Byte Offset 1016"
|
|
else
|
|
hgroup.long 0x7E0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248"
|
|
hgroup.long 0x7E4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249"
|
|
hgroup.long 0x7E8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250"
|
|
hgroup.long 0x7EC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251"
|
|
hgroup.long 0x7F0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252"
|
|
hgroup.long 0x7F4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253"
|
|
hgroup.long 0x7F8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254"
|
|
endif
|
|
tree.end
|
|
width 19.
|
|
tree "Processor Targets Registers"
|
|
if (((d.l(AD:0xE8201000+0x04))&0x000000E0)>0x1)
|
|
rgroup.long 0x800++0x03
|
|
line.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0 "
|
|
rgroup.long 0x804++0x03
|
|
line.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO7 ,CPU Targets Byte Offset 7 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO6 ,CPU Targets Byte Offset 6 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO5 ,CPU Targets Byte Offset 5 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO4 ,CPU Targets Byte Offset 4 "
|
|
rgroup.long 0x808++0x03
|
|
line.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO11 ,CPU Targets Byte Offset 11 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO10 ,CPU Targets Byte Offset 10 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO9 ,CPU Targets Byte Offset 9 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO8 ,CPU Targets Byte Offset 8 "
|
|
rgroup.long 0x80C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO15 ,CPU Targets Byte Offset 15 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO14 ,CPU Targets Byte Offset 14 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO13 ,CPU Targets Byte Offset 13 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO12 ,CPU Targets Byte Offset 12 "
|
|
rgroup.long 0x810++0x03
|
|
line.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO19 ,CPU Targets Byte Offset 19 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO18 ,CPU Targets Byte Offset 18 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO17 ,CPU Targets Byte Offset 17 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO16 ,CPU Targets Byte Offset 16 "
|
|
rgroup.long 0x814++0x03
|
|
line.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO23 ,CPU Targets Byte Offset 23 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO22 ,CPU Targets Byte Offset 22 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO21 ,CPU Targets Byte Offset 21 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO20 ,CPU Targets Byte Offset 20 "
|
|
rgroup.long 0x818++0x03
|
|
line.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO27 ,CPU Targets Byte Offset 27 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO26 ,CPU Targets Byte Offset 26 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO25 ,CPU Targets Byte Offset 25 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO24 ,CPU Targets Byte Offset 24 "
|
|
rgroup.long 0x81C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO31 ,CPU Targets Byte Offset 31 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO30 ,CPU Targets Byte Offset 30 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO29 ,CPU Targets Byte Offset 29 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO28 ,CPU Targets Byte Offset 28 "
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x820++0x03
|
|
line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35 ,CPU Targets Byte Offset 35 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO34 ,CPU Targets Byte Offset 34 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO33 ,CPU Targets Byte Offset 33 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO32 ,CPU Targets Byte Offset 32 "
|
|
group.long 0x824++0x03
|
|
line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39 ,CPU Targets Byte Offset 39 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO38 ,CPU Targets Byte Offset 38 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO37 ,CPU Targets Byte Offset 37 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO36 ,CPU Targets Byte Offset 36 "
|
|
group.long 0x828++0x03
|
|
line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43 ,CPU Targets Byte Offset 43 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO42 ,CPU Targets Byte Offset 42 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO41 ,CPU Targets Byte Offset 41 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO40 ,CPU Targets Byte Offset 40 "
|
|
group.long 0x82C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47 ,CPU Targets Byte Offset 47 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO46 ,CPU Targets Byte Offset 46 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO45 ,CPU Targets Byte Offset 45 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO44 ,CPU Targets Byte Offset 44 "
|
|
group.long 0x830++0x03
|
|
line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51 ,CPU Targets Byte Offset 51 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO50 ,CPU Targets Byte Offset 50 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO49 ,CPU Targets Byte Offset 49 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO48 ,CPU Targets Byte Offset 48 "
|
|
group.long 0x834++0x03
|
|
line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55 ,CPU Targets Byte Offset 55 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO54 ,CPU Targets Byte Offset 54 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO53 ,CPU Targets Byte Offset 53 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO52 ,CPU Targets Byte Offset 52 "
|
|
group.long 0x838++0x03
|
|
line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59 ,CPU Targets Byte Offset 59 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO58 ,CPU Targets Byte Offset 58 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO57 ,CPU Targets Byte Offset 57 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO56 ,CPU Targets Byte Offset 56 "
|
|
group.long 0x83C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63 ,CPU Targets Byte Offset 63 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO62 ,CPU Targets Byte Offset 62 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO61 ,CPU Targets Byte Offset 61 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO60 ,CPU Targets Byte Offset 60 "
|
|
else
|
|
hgroup.long 0x820++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
|
|
hgroup.long 0x824++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
|
|
hgroup.long 0x828++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
|
|
hgroup.long 0x82C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
|
|
hgroup.long 0x830++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
|
|
hgroup.long 0x834++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
|
|
hgroup.long 0x838++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
|
|
hgroup.long 0x83C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x840++0x03
|
|
line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67 ,CPU Targets Byte Offset 67 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO66 ,CPU Targets Byte Offset 66 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO65 ,CPU Targets Byte Offset 65 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO64 ,CPU Targets Byte Offset 64 "
|
|
group.long 0x844++0x03
|
|
line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71 ,CPU Targets Byte Offset 71 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO70 ,CPU Targets Byte Offset 70 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO69 ,CPU Targets Byte Offset 69 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO68 ,CPU Targets Byte Offset 68 "
|
|
group.long 0x848++0x03
|
|
line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75 ,CPU Targets Byte Offset 75 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO74 ,CPU Targets Byte Offset 74 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO73 ,CPU Targets Byte Offset 73 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO72 ,CPU Targets Byte Offset 72 "
|
|
group.long 0x84C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79 ,CPU Targets Byte Offset 79 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO78 ,CPU Targets Byte Offset 78 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO77 ,CPU Targets Byte Offset 77 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO76 ,CPU Targets Byte Offset 76 "
|
|
group.long 0x850++0x03
|
|
line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83 ,CPU Targets Byte Offset 83 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO82 ,CPU Targets Byte Offset 82 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO81 ,CPU Targets Byte Offset 81 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO80 ,CPU Targets Byte Offset 80 "
|
|
group.long 0x854++0x03
|
|
line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87 ,CPU Targets Byte Offset 87 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO86 ,CPU Targets Byte Offset 86 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO85 ,CPU Targets Byte Offset 85 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO84 ,CPU Targets Byte Offset 84 "
|
|
group.long 0x858++0x03
|
|
line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91 ,CPU Targets Byte Offset 91 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO90 ,CPU Targets Byte Offset 90 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO89 ,CPU Targets Byte Offset 89 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO88 ,CPU Targets Byte Offset 88 "
|
|
group.long 0x85C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95 ,CPU Targets Byte Offset 95 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO94 ,CPU Targets Byte Offset 94 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO93 ,CPU Targets Byte Offset 93 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO92 ,CPU Targets Byte Offset 92 "
|
|
else
|
|
hgroup.long 0x840++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
|
|
hgroup.long 0x844++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
|
|
hgroup.long 0x848++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
|
|
hgroup.long 0x84C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
|
|
hgroup.long 0x850++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
|
|
hgroup.long 0x854++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
|
|
hgroup.long 0x858++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
|
|
hgroup.long 0x85C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x860++0x03
|
|
line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99 ,CPU Targets Byte Offset 99 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO98 ,CPU Targets Byte Offset 98 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO97 ,CPU Targets Byte Offset 97 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO96 ,CPU Targets Byte Offset 96 "
|
|
group.long 0x864++0x03
|
|
line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103 ,CPU Targets Byte Offset 103 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO102 ,CPU Targets Byte Offset 102 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO101 ,CPU Targets Byte Offset 101 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO100 ,CPU Targets Byte Offset 100 "
|
|
group.long 0x868++0x03
|
|
line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107 ,CPU Targets Byte Offset 107 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO106 ,CPU Targets Byte Offset 106 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO105 ,CPU Targets Byte Offset 105 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO104 ,CPU Targets Byte Offset 104 "
|
|
group.long 0x86C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111 ,CPU Targets Byte Offset 111 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO110 ,CPU Targets Byte Offset 110 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO109 ,CPU Targets Byte Offset 109 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO108 ,CPU Targets Byte Offset 108 "
|
|
group.long 0x870++0x03
|
|
line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115 ,CPU Targets Byte Offset 115 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO114 ,CPU Targets Byte Offset 114 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO113 ,CPU Targets Byte Offset 113 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO112 ,CPU Targets Byte Offset 112 "
|
|
group.long 0x874++0x03
|
|
line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119 ,CPU Targets Byte Offset 119 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO118 ,CPU Targets Byte Offset 118 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO117 ,CPU Targets Byte Offset 117 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO116 ,CPU Targets Byte Offset 116 "
|
|
group.long 0x878++0x03
|
|
line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123 ,CPU Targets Byte Offset 123 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO122 ,CPU Targets Byte Offset 122 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO121 ,CPU Targets Byte Offset 121 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO120 ,CPU Targets Byte Offset 120 "
|
|
group.long 0x87C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127 ,CPU Targets Byte Offset 127 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO126 ,CPU Targets Byte Offset 126 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO125 ,CPU Targets Byte Offset 125 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO124 ,CPU Targets Byte Offset 124 "
|
|
else
|
|
hgroup.long 0x860++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
|
|
hgroup.long 0x864++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
|
|
hgroup.long 0x868++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
|
|
hgroup.long 0x86C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
|
|
hgroup.long 0x870++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
|
|
hgroup.long 0x874++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
|
|
hgroup.long 0x878++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
|
|
hgroup.long 0x87C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131 ,CPU Targets Byte Offset 131 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO130 ,CPU Targets Byte Offset 130 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO129 ,CPU Targets Byte Offset 129 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO128 ,CPU Targets Byte Offset 128 "
|
|
group.long 0x884++0x03
|
|
line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135 ,CPU Targets Byte Offset 135 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO134 ,CPU Targets Byte Offset 134 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO133 ,CPU Targets Byte Offset 133 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO132 ,CPU Targets Byte Offset 132 "
|
|
group.long 0x888++0x03
|
|
line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139 ,CPU Targets Byte Offset 139 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO138 ,CPU Targets Byte Offset 138 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO137 ,CPU Targets Byte Offset 137 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO136 ,CPU Targets Byte Offset 136 "
|
|
group.long 0x88C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143 ,CPU Targets Byte Offset 143 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO142 ,CPU Targets Byte Offset 142 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO141 ,CPU Targets Byte Offset 141 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO140 ,CPU Targets Byte Offset 140 "
|
|
group.long 0x890++0x03
|
|
line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147 ,CPU Targets Byte Offset 147 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO146 ,CPU Targets Byte Offset 146 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO145 ,CPU Targets Byte Offset 145 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO144 ,CPU Targets Byte Offset 144 "
|
|
group.long 0x894++0x03
|
|
line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151 ,CPU Targets Byte Offset 151 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO150 ,CPU Targets Byte Offset 150 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO149 ,CPU Targets Byte Offset 149 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO148 ,CPU Targets Byte Offset 148 "
|
|
group.long 0x898++0x03
|
|
line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155 ,CPU Targets Byte Offset 155 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO154 ,CPU Targets Byte Offset 154 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO153 ,CPU Targets Byte Offset 153 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO152 ,CPU Targets Byte Offset 152 "
|
|
group.long 0x89C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159 ,CPU Targets Byte Offset 159 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO158 ,CPU Targets Byte Offset 158 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO157 ,CPU Targets Byte Offset 157 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO156 ,CPU Targets Byte Offset 156 "
|
|
else
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
|
|
hgroup.long 0x884++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
|
|
hgroup.long 0x888++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
|
|
hgroup.long 0x88C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
|
|
hgroup.long 0x890++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
|
|
hgroup.long 0x894++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
|
|
hgroup.long 0x898++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
|
|
hgroup.long 0x89C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x8A0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163 ,CPU Targets Byte Offset 163 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO162 ,CPU Targets Byte Offset 162 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO161 ,CPU Targets Byte Offset 161 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO160 ,CPU Targets Byte Offset 160 "
|
|
group.long 0x8A4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167 ,CPU Targets Byte Offset 167 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO166 ,CPU Targets Byte Offset 166 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO165 ,CPU Targets Byte Offset 165 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO164 ,CPU Targets Byte Offset 164 "
|
|
group.long 0x8A8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171 ,CPU Targets Byte Offset 171 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO170 ,CPU Targets Byte Offset 170 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO169 ,CPU Targets Byte Offset 169 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO168 ,CPU Targets Byte Offset 168 "
|
|
group.long 0x8AC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175 ,CPU Targets Byte Offset 175 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO174 ,CPU Targets Byte Offset 174 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO173 ,CPU Targets Byte Offset 173 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO172 ,CPU Targets Byte Offset 172 "
|
|
group.long 0x8B0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179 ,CPU Targets Byte Offset 179 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO178 ,CPU Targets Byte Offset 178 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO177 ,CPU Targets Byte Offset 177 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO176 ,CPU Targets Byte Offset 176 "
|
|
group.long 0x8B4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183 ,CPU Targets Byte Offset 183 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO182 ,CPU Targets Byte Offset 182 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO181 ,CPU Targets Byte Offset 181 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO180 ,CPU Targets Byte Offset 180 "
|
|
group.long 0x8B8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187 ,CPU Targets Byte Offset 187 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO186 ,CPU Targets Byte Offset 186 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO185 ,CPU Targets Byte Offset 185 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO184 ,CPU Targets Byte Offset 184 "
|
|
group.long 0x8BC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191 ,CPU Targets Byte Offset 191 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO190 ,CPU Targets Byte Offset 190 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO189 ,CPU Targets Byte Offset 189 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO188 ,CPU Targets Byte Offset 188 "
|
|
else
|
|
hgroup.long 0x8A0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
|
|
hgroup.long 0x8A4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
|
|
hgroup.long 0x8A8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
|
|
hgroup.long 0x8AC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
|
|
hgroup.long 0x8B0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
|
|
hgroup.long 0x8B4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
|
|
hgroup.long 0x8B8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
|
|
hgroup.long 0x8BC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x8C0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195 ,CPU Targets Byte Offset 195 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO194 ,CPU Targets Byte Offset 194 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO193 ,CPU Targets Byte Offset 193 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO192 ,CPU Targets Byte Offset 192 "
|
|
group.long 0x8C4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199 ,CPU Targets Byte Offset 199 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO198 ,CPU Targets Byte Offset 198 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO197 ,CPU Targets Byte Offset 197 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO196 ,CPU Targets Byte Offset 196 "
|
|
group.long 0x8C8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203 ,CPU Targets Byte Offset 203 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO202 ,CPU Targets Byte Offset 202 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO201 ,CPU Targets Byte Offset 201 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO200 ,CPU Targets Byte Offset 200 "
|
|
group.long 0x8CC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207 ,CPU Targets Byte Offset 207 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO206 ,CPU Targets Byte Offset 206 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO205 ,CPU Targets Byte Offset 205 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO204 ,CPU Targets Byte Offset 204 "
|
|
group.long 0x8D0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211 ,CPU Targets Byte Offset 211 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO210 ,CPU Targets Byte Offset 210 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO209 ,CPU Targets Byte Offset 209 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO208 ,CPU Targets Byte Offset 208 "
|
|
group.long 0x8D4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215 ,CPU Targets Byte Offset 215 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO214 ,CPU Targets Byte Offset 214 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO213 ,CPU Targets Byte Offset 213 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO212 ,CPU Targets Byte Offset 212 "
|
|
group.long 0x8D8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219 ,CPU Targets Byte Offset 219 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO218 ,CPU Targets Byte Offset 218 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO217 ,CPU Targets Byte Offset 217 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO216 ,CPU Targets Byte Offset 216 "
|
|
group.long 0x8DC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223 ,CPU Targets Byte Offset 223 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO222 ,CPU Targets Byte Offset 222 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO221 ,CPU Targets Byte Offset 221 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO220 ,CPU Targets Byte Offset 220 "
|
|
else
|
|
hgroup.long 0x8C0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
|
|
hgroup.long 0x8C4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
|
|
hgroup.long 0x8C8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
|
|
hgroup.long 0x8CC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
|
|
hgroup.long 0x8D0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
|
|
hgroup.long 0x8D4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
|
|
hgroup.long 0x8D8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
|
|
hgroup.long 0x8DC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x8E0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227 ,CPU Targets Byte Offset 227 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO226 ,CPU Targets Byte Offset 226 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO225 ,CPU Targets Byte Offset 225 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO224 ,CPU Targets Byte Offset 224 "
|
|
group.long 0x8E4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231 ,CPU Targets Byte Offset 231 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO230 ,CPU Targets Byte Offset 230 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO229 ,CPU Targets Byte Offset 229 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO228 ,CPU Targets Byte Offset 228 "
|
|
group.long 0x8E8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235 ,CPU Targets Byte Offset 235 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO234 ,CPU Targets Byte Offset 234 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO233 ,CPU Targets Byte Offset 233 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO232 ,CPU Targets Byte Offset 232 "
|
|
group.long 0x8EC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239 ,CPU Targets Byte Offset 239 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO238 ,CPU Targets Byte Offset 238 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO237 ,CPU Targets Byte Offset 237 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO236 ,CPU Targets Byte Offset 236 "
|
|
group.long 0x8F0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243 ,CPU Targets Byte Offset 243 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO242 ,CPU Targets Byte Offset 242 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO241 ,CPU Targets Byte Offset 241 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO240 ,CPU Targets Byte Offset 240 "
|
|
group.long 0x8F4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247 ,CPU Targets Byte Offset 247 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO246 ,CPU Targets Byte Offset 246 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO245 ,CPU Targets Byte Offset 245 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO244 ,CPU Targets Byte Offset 244 "
|
|
group.long 0x8F8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251 ,CPU Targets Byte Offset 251 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO250 ,CPU Targets Byte Offset 250 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO249 ,CPU Targets Byte Offset 249 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO248 ,CPU Targets Byte Offset 248 "
|
|
group.long 0x8FC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255 ,CPU Targets Byte Offset 255 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO254 ,CPU Targets Byte Offset 254 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO253 ,CPU Targets Byte Offset 253 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO252 ,CPU Targets Byte Offset 252 "
|
|
else
|
|
hgroup.long 0x8E0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
|
|
hgroup.long 0x8E4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
|
|
hgroup.long 0x8E8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
|
|
hgroup.long 0x8EC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
|
|
hgroup.long 0x8F0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
|
|
hgroup.long 0x8F4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
|
|
hgroup.long 0x8F8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
|
|
hgroup.long 0x8FC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x900++0x03
|
|
line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259 ,CPU Targets Byte Offset 259 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO258 ,CPU Targets Byte Offset 258 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO257 ,CPU Targets Byte Offset 257 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO256 ,CPU Targets Byte Offset 256 "
|
|
group.long 0x904++0x03
|
|
line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263 ,CPU Targets Byte Offset 263 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO262 ,CPU Targets Byte Offset 262 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO261 ,CPU Targets Byte Offset 261 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO260 ,CPU Targets Byte Offset 260 "
|
|
group.long 0x908++0x03
|
|
line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267 ,CPU Targets Byte Offset 267 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO266 ,CPU Targets Byte Offset 266 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO265 ,CPU Targets Byte Offset 265 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO264 ,CPU Targets Byte Offset 264 "
|
|
group.long 0x90C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271 ,CPU Targets Byte Offset 271 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO270 ,CPU Targets Byte Offset 270 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO269 ,CPU Targets Byte Offset 269 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO268 ,CPU Targets Byte Offset 268 "
|
|
group.long 0x910++0x03
|
|
line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275 ,CPU Targets Byte Offset 275 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO274 ,CPU Targets Byte Offset 274 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO273 ,CPU Targets Byte Offset 273 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO272 ,CPU Targets Byte Offset 272 "
|
|
group.long 0x914++0x03
|
|
line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279 ,CPU Targets Byte Offset 279 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO278 ,CPU Targets Byte Offset 278 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO277 ,CPU Targets Byte Offset 277 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO276 ,CPU Targets Byte Offset 276 "
|
|
group.long 0x918++0x03
|
|
line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283 ,CPU Targets Byte Offset 283 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO282 ,CPU Targets Byte Offset 282 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO281 ,CPU Targets Byte Offset 281 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO280 ,CPU Targets Byte Offset 280 "
|
|
group.long 0x91C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287 ,CPU Targets Byte Offset 287 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO286 ,CPU Targets Byte Offset 286 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO285 ,CPU Targets Byte Offset 285 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO284 ,CPU Targets Byte Offset 284 "
|
|
else
|
|
hgroup.long 0x900++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
|
|
hgroup.long 0x904++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
|
|
hgroup.long 0x908++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
|
|
hgroup.long 0x90C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
|
|
hgroup.long 0x910++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
|
|
hgroup.long 0x914++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
|
|
hgroup.long 0x918++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
|
|
hgroup.long 0x91C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x920++0x03
|
|
line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291 ,CPU Targets Byte Offset 291 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO290 ,CPU Targets Byte Offset 290 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO289 ,CPU Targets Byte Offset 289 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO288 ,CPU Targets Byte Offset 288 "
|
|
group.long 0x924++0x03
|
|
line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295 ,CPU Targets Byte Offset 295 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO294 ,CPU Targets Byte Offset 294 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO293 ,CPU Targets Byte Offset 293 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO292 ,CPU Targets Byte Offset 292 "
|
|
group.long 0x928++0x03
|
|
line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299 ,CPU Targets Byte Offset 299 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO298 ,CPU Targets Byte Offset 298 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO297 ,CPU Targets Byte Offset 297 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO296 ,CPU Targets Byte Offset 296 "
|
|
group.long 0x92C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303 ,CPU Targets Byte Offset 303 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO302 ,CPU Targets Byte Offset 302 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO301 ,CPU Targets Byte Offset 301 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO300 ,CPU Targets Byte Offset 300 "
|
|
group.long 0x930++0x03
|
|
line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307 ,CPU Targets Byte Offset 307 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO306 ,CPU Targets Byte Offset 306 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO305 ,CPU Targets Byte Offset 305 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO304 ,CPU Targets Byte Offset 304 "
|
|
group.long 0x934++0x03
|
|
line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311 ,CPU Targets Byte Offset 311 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO310 ,CPU Targets Byte Offset 310 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO309 ,CPU Targets Byte Offset 309 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO308 ,CPU Targets Byte Offset 308 "
|
|
group.long 0x938++0x03
|
|
line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315 ,CPU Targets Byte Offset 315 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO314 ,CPU Targets Byte Offset 314 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO313 ,CPU Targets Byte Offset 313 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO312 ,CPU Targets Byte Offset 312 "
|
|
group.long 0x93C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319 ,CPU Targets Byte Offset 319 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO318 ,CPU Targets Byte Offset 318 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO317 ,CPU Targets Byte Offset 317 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO316 ,CPU Targets Byte Offset 316 "
|
|
else
|
|
hgroup.long 0x920++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
|
|
hgroup.long 0x924++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
|
|
hgroup.long 0x928++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
|
|
hgroup.long 0x92C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
|
|
hgroup.long 0x930++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
|
|
hgroup.long 0x934++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
|
|
hgroup.long 0x938++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
|
|
hgroup.long 0x93C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x940++0x03
|
|
line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323 ,CPU Targets Byte Offset 323 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO322 ,CPU Targets Byte Offset 322 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO321 ,CPU Targets Byte Offset 321 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO320 ,CPU Targets Byte Offset 320 "
|
|
group.long 0x944++0x03
|
|
line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327 ,CPU Targets Byte Offset 327 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO326 ,CPU Targets Byte Offset 326 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO325 ,CPU Targets Byte Offset 325 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO324 ,CPU Targets Byte Offset 324 "
|
|
group.long 0x948++0x03
|
|
line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331 ,CPU Targets Byte Offset 331 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO330 ,CPU Targets Byte Offset 330 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO329 ,CPU Targets Byte Offset 329 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO328 ,CPU Targets Byte Offset 328 "
|
|
group.long 0x94C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335 ,CPU Targets Byte Offset 335 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO334 ,CPU Targets Byte Offset 334 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO333 ,CPU Targets Byte Offset 333 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO332 ,CPU Targets Byte Offset 332 "
|
|
group.long 0x950++0x03
|
|
line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339 ,CPU Targets Byte Offset 339 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO338 ,CPU Targets Byte Offset 338 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO337 ,CPU Targets Byte Offset 337 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO336 ,CPU Targets Byte Offset 336 "
|
|
group.long 0x954++0x03
|
|
line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343 ,CPU Targets Byte Offset 343 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO342 ,CPU Targets Byte Offset 342 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO341 ,CPU Targets Byte Offset 341 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO340 ,CPU Targets Byte Offset 340 "
|
|
group.long 0x958++0x03
|
|
line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347 ,CPU Targets Byte Offset 347 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO346 ,CPU Targets Byte Offset 346 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO345 ,CPU Targets Byte Offset 345 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO344 ,CPU Targets Byte Offset 344 "
|
|
group.long 0x95C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351 ,CPU Targets Byte Offset 351 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO350 ,CPU Targets Byte Offset 350 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO349 ,CPU Targets Byte Offset 349 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO348 ,CPU Targets Byte Offset 348 "
|
|
else
|
|
hgroup.long 0x940++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
|
|
hgroup.long 0x944++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
|
|
hgroup.long 0x948++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
|
|
hgroup.long 0x94C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
|
|
hgroup.long 0x950++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
|
|
hgroup.long 0x954++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
|
|
hgroup.long 0x958++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
|
|
hgroup.long 0x95C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x960++0x03
|
|
line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355 ,CPU Targets Byte Offset 355 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO354 ,CPU Targets Byte Offset 354 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO353 ,CPU Targets Byte Offset 353 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO352 ,CPU Targets Byte Offset 352 "
|
|
group.long 0x964++0x03
|
|
line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359 ,CPU Targets Byte Offset 359 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO358 ,CPU Targets Byte Offset 358 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO357 ,CPU Targets Byte Offset 357 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO356 ,CPU Targets Byte Offset 356 "
|
|
group.long 0x968++0x03
|
|
line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363 ,CPU Targets Byte Offset 363 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO362 ,CPU Targets Byte Offset 362 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO361 ,CPU Targets Byte Offset 361 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO360 ,CPU Targets Byte Offset 360 "
|
|
group.long 0x96C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367 ,CPU Targets Byte Offset 367 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO366 ,CPU Targets Byte Offset 366 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO365 ,CPU Targets Byte Offset 365 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO364 ,CPU Targets Byte Offset 364 "
|
|
group.long 0x970++0x03
|
|
line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371 ,CPU Targets Byte Offset 371 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO370 ,CPU Targets Byte Offset 370 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO369 ,CPU Targets Byte Offset 369 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO368 ,CPU Targets Byte Offset 368 "
|
|
group.long 0x974++0x03
|
|
line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375 ,CPU Targets Byte Offset 375 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO374 ,CPU Targets Byte Offset 374 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO373 ,CPU Targets Byte Offset 373 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO372 ,CPU Targets Byte Offset 372 "
|
|
group.long 0x978++0x03
|
|
line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379 ,CPU Targets Byte Offset 379 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO378 ,CPU Targets Byte Offset 378 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO377 ,CPU Targets Byte Offset 377 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO376 ,CPU Targets Byte Offset 376 "
|
|
group.long 0x97C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383 ,CPU Targets Byte Offset 383 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO382 ,CPU Targets Byte Offset 382 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO381 ,CPU Targets Byte Offset 381 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO380 ,CPU Targets Byte Offset 380 "
|
|
else
|
|
hgroup.long 0x960++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
|
|
hgroup.long 0x964++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
|
|
hgroup.long 0x968++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
|
|
hgroup.long 0x96C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
|
|
hgroup.long 0x970++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
|
|
hgroup.long 0x974++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
|
|
hgroup.long 0x978++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
|
|
hgroup.long 0x97C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x980++0x03
|
|
line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387 ,CPU Targets Byte Offset 387 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO386 ,CPU Targets Byte Offset 386 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO385 ,CPU Targets Byte Offset 385 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO384 ,CPU Targets Byte Offset 384 "
|
|
group.long 0x984++0x03
|
|
line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391 ,CPU Targets Byte Offset 391 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO390 ,CPU Targets Byte Offset 390 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO389 ,CPU Targets Byte Offset 389 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO388 ,CPU Targets Byte Offset 388 "
|
|
group.long 0x988++0x03
|
|
line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395 ,CPU Targets Byte Offset 395 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO394 ,CPU Targets Byte Offset 394 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO393 ,CPU Targets Byte Offset 393 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO392 ,CPU Targets Byte Offset 392 "
|
|
group.long 0x98C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399 ,CPU Targets Byte Offset 399 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO398 ,CPU Targets Byte Offset 398 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO397 ,CPU Targets Byte Offset 397 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO396 ,CPU Targets Byte Offset 396 "
|
|
group.long 0x990++0x03
|
|
line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403 ,CPU Targets Byte Offset 403 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO402 ,CPU Targets Byte Offset 402 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO401 ,CPU Targets Byte Offset 401 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO400 ,CPU Targets Byte Offset 400 "
|
|
group.long 0x994++0x03
|
|
line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407 ,CPU Targets Byte Offset 407 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO406 ,CPU Targets Byte Offset 406 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO405 ,CPU Targets Byte Offset 405 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO404 ,CPU Targets Byte Offset 404 "
|
|
group.long 0x998++0x03
|
|
line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411 ,CPU Targets Byte Offset 411 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO410 ,CPU Targets Byte Offset 410 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO409 ,CPU Targets Byte Offset 409 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO408 ,CPU Targets Byte Offset 408 "
|
|
group.long 0x99C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415 ,CPU Targets Byte Offset 415 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO414 ,CPU Targets Byte Offset 414 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO413 ,CPU Targets Byte Offset 413 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO412 ,CPU Targets Byte Offset 412 "
|
|
else
|
|
hgroup.long 0x980++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
|
|
hgroup.long 0x984++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
|
|
hgroup.long 0x988++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
|
|
hgroup.long 0x98C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
|
|
hgroup.long 0x990++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
|
|
hgroup.long 0x994++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
|
|
hgroup.long 0x998++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
|
|
hgroup.long 0x99C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x9A0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419 ,CPU Targets Byte Offset 419 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO418 ,CPU Targets Byte Offset 418 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO417 ,CPU Targets Byte Offset 417 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO416 ,CPU Targets Byte Offset 416 "
|
|
group.long 0x9A4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423 ,CPU Targets Byte Offset 423 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO422 ,CPU Targets Byte Offset 422 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO421 ,CPU Targets Byte Offset 421 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO420 ,CPU Targets Byte Offset 420 "
|
|
group.long 0x9A8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427 ,CPU Targets Byte Offset 427 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO426 ,CPU Targets Byte Offset 426 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO425 ,CPU Targets Byte Offset 425 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO424 ,CPU Targets Byte Offset 424 "
|
|
group.long 0x9AC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431 ,CPU Targets Byte Offset 431 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO430 ,CPU Targets Byte Offset 430 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO429 ,CPU Targets Byte Offset 429 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO428 ,CPU Targets Byte Offset 428 "
|
|
group.long 0x9B0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435 ,CPU Targets Byte Offset 435 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO434 ,CPU Targets Byte Offset 434 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO433 ,CPU Targets Byte Offset 433 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO432 ,CPU Targets Byte Offset 432 "
|
|
group.long 0x9B4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439 ,CPU Targets Byte Offset 439 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO438 ,CPU Targets Byte Offset 438 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO437 ,CPU Targets Byte Offset 437 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO436 ,CPU Targets Byte Offset 436 "
|
|
group.long 0x9B8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443 ,CPU Targets Byte Offset 443 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO442 ,CPU Targets Byte Offset 442 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO441 ,CPU Targets Byte Offset 441 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO440 ,CPU Targets Byte Offset 440 "
|
|
group.long 0x9BC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447 ,CPU Targets Byte Offset 447 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO446 ,CPU Targets Byte Offset 446 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO445 ,CPU Targets Byte Offset 445 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO444 ,CPU Targets Byte Offset 444 "
|
|
else
|
|
hgroup.long 0x9A0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
|
|
hgroup.long 0x9A4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
|
|
hgroup.long 0x9A8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
|
|
hgroup.long 0x9AC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
|
|
hgroup.long 0x9B0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
|
|
hgroup.long 0x9B4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
|
|
hgroup.long 0x9B8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
|
|
hgroup.long 0x9BC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x9C0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451 ,CPU Targets Byte Offset 451 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO450 ,CPU Targets Byte Offset 450 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO449 ,CPU Targets Byte Offset 449 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO448 ,CPU Targets Byte Offset 448 "
|
|
group.long 0x9C4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455 ,CPU Targets Byte Offset 455 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO454 ,CPU Targets Byte Offset 454 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO453 ,CPU Targets Byte Offset 453 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO452 ,CPU Targets Byte Offset 452 "
|
|
group.long 0x9C8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459 ,CPU Targets Byte Offset 459 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO458 ,CPU Targets Byte Offset 458 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO457 ,CPU Targets Byte Offset 457 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO456 ,CPU Targets Byte Offset 456 "
|
|
group.long 0x9CC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463 ,CPU Targets Byte Offset 463 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO462 ,CPU Targets Byte Offset 462 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO461 ,CPU Targets Byte Offset 461 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO460 ,CPU Targets Byte Offset 460 "
|
|
group.long 0x9D0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467 ,CPU Targets Byte Offset 467 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO466 ,CPU Targets Byte Offset 466 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO465 ,CPU Targets Byte Offset 465 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO464 ,CPU Targets Byte Offset 464 "
|
|
group.long 0x9D4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471 ,CPU Targets Byte Offset 471 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO470 ,CPU Targets Byte Offset 470 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO469 ,CPU Targets Byte Offset 469 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO468 ,CPU Targets Byte Offset 468 "
|
|
group.long 0x9D8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475 ,CPU Targets Byte Offset 475 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO474 ,CPU Targets Byte Offset 474 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO473 ,CPU Targets Byte Offset 473 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO472 ,CPU Targets Byte Offset 472 "
|
|
group.long 0x9DC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479 ,CPU Targets Byte Offset 479 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO478 ,CPU Targets Byte Offset 478 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO477 ,CPU Targets Byte Offset 477 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO476 ,CPU Targets Byte Offset 476 "
|
|
else
|
|
hgroup.long 0x9C0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
|
|
hgroup.long 0x9C4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
|
|
hgroup.long 0x9C8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
|
|
hgroup.long 0x9CC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
|
|
hgroup.long 0x9D0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
|
|
hgroup.long 0x9D4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
|
|
hgroup.long 0x9D8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
|
|
hgroup.long 0x9DC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x9E0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483 ,CPU Targets Byte Offset 483 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO482 ,CPU Targets Byte Offset 482 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO481 ,CPU Targets Byte Offset 481 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO480 ,CPU Targets Byte Offset 480 "
|
|
group.long 0x9E4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487 ,CPU Targets Byte Offset 487 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO486 ,CPU Targets Byte Offset 486 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO485 ,CPU Targets Byte Offset 485 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO484 ,CPU Targets Byte Offset 484 "
|
|
group.long 0x9E8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491 ,CPU Targets Byte Offset 491 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO490 ,CPU Targets Byte Offset 490 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO489 ,CPU Targets Byte Offset 489 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO488 ,CPU Targets Byte Offset 488 "
|
|
group.long 0x9EC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495 ,CPU Targets Byte Offset 495 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO494 ,CPU Targets Byte Offset 494 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO493 ,CPU Targets Byte Offset 493 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO492 ,CPU Targets Byte Offset 492 "
|
|
group.long 0x9F0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499 ,CPU Targets Byte Offset 499 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO498 ,CPU Targets Byte Offset 498 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO497 ,CPU Targets Byte Offset 497 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO496 ,CPU Targets Byte Offset 496 "
|
|
group.long 0x9F4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503 ,CPU Targets Byte Offset 503 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO502 ,CPU Targets Byte Offset 502 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO501 ,CPU Targets Byte Offset 501 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO500 ,CPU Targets Byte Offset 500 "
|
|
group.long 0x9F8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507 ,CPU Targets Byte Offset 507 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO506 ,CPU Targets Byte Offset 506 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO505 ,CPU Targets Byte Offset 505 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO504 ,CPU Targets Byte Offset 504 "
|
|
group.long 0x9FC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511 ,CPU Targets Byte Offset 511 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO510 ,CPU Targets Byte Offset 510 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO509 ,CPU Targets Byte Offset 509 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO508 ,CPU Targets Byte Offset 508 "
|
|
else
|
|
hgroup.long 0x9E0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
|
|
hgroup.long 0x9E4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
|
|
hgroup.long 0x9E8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
|
|
hgroup.long 0x9EC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
|
|
hgroup.long 0x9F0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
|
|
hgroup.long 0x9F4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
|
|
hgroup.long 0x9F8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
|
|
hgroup.long 0x9FC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0xA00++0x03
|
|
line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515 ,CPU Targets Byte Offset 515 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO514 ,CPU Targets Byte Offset 514 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO513 ,CPU Targets Byte Offset 513 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO512 ,CPU Targets Byte Offset 512 "
|
|
group.long 0xA04++0x03
|
|
line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519 ,CPU Targets Byte Offset 519 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO518 ,CPU Targets Byte Offset 518 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO517 ,CPU Targets Byte Offset 517 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO516 ,CPU Targets Byte Offset 516 "
|
|
group.long 0xA08++0x03
|
|
line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523 ,CPU Targets Byte Offset 523 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO522 ,CPU Targets Byte Offset 522 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO521 ,CPU Targets Byte Offset 521 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO520 ,CPU Targets Byte Offset 520 "
|
|
group.long 0xA0C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527 ,CPU Targets Byte Offset 527 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO526 ,CPU Targets Byte Offset 526 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO525 ,CPU Targets Byte Offset 525 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO524 ,CPU Targets Byte Offset 524 "
|
|
group.long 0xA10++0x03
|
|
line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531 ,CPU Targets Byte Offset 531 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO530 ,CPU Targets Byte Offset 530 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO529 ,CPU Targets Byte Offset 529 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO528 ,CPU Targets Byte Offset 528 "
|
|
group.long 0xA14++0x03
|
|
line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535 ,CPU Targets Byte Offset 535 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO534 ,CPU Targets Byte Offset 534 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO533 ,CPU Targets Byte Offset 533 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO532 ,CPU Targets Byte Offset 532 "
|
|
group.long 0xA18++0x03
|
|
line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539 ,CPU Targets Byte Offset 539 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO538 ,CPU Targets Byte Offset 538 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO537 ,CPU Targets Byte Offset 537 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO536 ,CPU Targets Byte Offset 536 "
|
|
group.long 0xA1C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543 ,CPU Targets Byte Offset 543 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO542 ,CPU Targets Byte Offset 542 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO541 ,CPU Targets Byte Offset 541 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO540 ,CPU Targets Byte Offset 540 "
|
|
else
|
|
hgroup.long 0xA00++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
|
|
hgroup.long 0xA04++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
|
|
hgroup.long 0xA08++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
|
|
hgroup.long 0xA0C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
|
|
hgroup.long 0xA10++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
|
|
hgroup.long 0xA14++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
|
|
hgroup.long 0xA18++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
|
|
hgroup.long 0xA1C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0xA20++0x03
|
|
line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547 ,CPU Targets Byte Offset 547 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO546 ,CPU Targets Byte Offset 546 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO545 ,CPU Targets Byte Offset 545 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO544 ,CPU Targets Byte Offset 544 "
|
|
group.long 0xA24++0x03
|
|
line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551 ,CPU Targets Byte Offset 551 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO550 ,CPU Targets Byte Offset 550 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO549 ,CPU Targets Byte Offset 549 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO548 ,CPU Targets Byte Offset 548 "
|
|
group.long 0xA28++0x03
|
|
line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555 ,CPU Targets Byte Offset 555 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO554 ,CPU Targets Byte Offset 554 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO553 ,CPU Targets Byte Offset 553 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO552 ,CPU Targets Byte Offset 552 "
|
|
group.long 0xA2C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559 ,CPU Targets Byte Offset 559 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO558 ,CPU Targets Byte Offset 558 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO557 ,CPU Targets Byte Offset 557 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO556 ,CPU Targets Byte Offset 556 "
|
|
group.long 0xA30++0x03
|
|
line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563 ,CPU Targets Byte Offset 563 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO562 ,CPU Targets Byte Offset 562 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO561 ,CPU Targets Byte Offset 561 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO560 ,CPU Targets Byte Offset 560 "
|
|
group.long 0xA34++0x03
|
|
line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567 ,CPU Targets Byte Offset 567 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO566 ,CPU Targets Byte Offset 566 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO565 ,CPU Targets Byte Offset 565 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO564 ,CPU Targets Byte Offset 564 "
|
|
group.long 0xA38++0x03
|
|
line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571 ,CPU Targets Byte Offset 571 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO570 ,CPU Targets Byte Offset 570 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO569 ,CPU Targets Byte Offset 569 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO568 ,CPU Targets Byte Offset 568 "
|
|
group.long 0xA3C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575 ,CPU Targets Byte Offset 575 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO574 ,CPU Targets Byte Offset 574 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO573 ,CPU Targets Byte Offset 573 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO572 ,CPU Targets Byte Offset 572 "
|
|
else
|
|
hgroup.long 0xA20++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
|
|
hgroup.long 0xA24++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
|
|
hgroup.long 0xA28++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
|
|
hgroup.long 0xA2C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
|
|
hgroup.long 0xA30++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
|
|
hgroup.long 0xA34++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
|
|
hgroup.long 0xA38++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
|
|
hgroup.long 0xA3C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0xA40++0x03
|
|
line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579 ,CPU Targets Byte Offset 579 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO578 ,CPU Targets Byte Offset 578 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO577 ,CPU Targets Byte Offset 577 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO576 ,CPU Targets Byte Offset 576 "
|
|
group.long 0xA44++0x03
|
|
line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583 ,CPU Targets Byte Offset 583 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO582 ,CPU Targets Byte Offset 582 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO581 ,CPU Targets Byte Offset 581 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO580 ,CPU Targets Byte Offset 580 "
|
|
group.long 0xA48++0x03
|
|
line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587 ,CPU Targets Byte Offset 587 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO586 ,CPU Targets Byte Offset 586 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO585 ,CPU Targets Byte Offset 585 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO584 ,CPU Targets Byte Offset 584 "
|
|
group.long 0xA4C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591 ,CPU Targets Byte Offset 591 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO590 ,CPU Targets Byte Offset 590 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO589 ,CPU Targets Byte Offset 589 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO588 ,CPU Targets Byte Offset 588 "
|
|
group.long 0xA50++0x03
|
|
line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595 ,CPU Targets Byte Offset 595 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO594 ,CPU Targets Byte Offset 594 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO593 ,CPU Targets Byte Offset 593 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO592 ,CPU Targets Byte Offset 592 "
|
|
group.long 0xA54++0x03
|
|
line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599 ,CPU Targets Byte Offset 599 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO598 ,CPU Targets Byte Offset 598 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO597 ,CPU Targets Byte Offset 597 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO596 ,CPU Targets Byte Offset 596 "
|
|
group.long 0xA58++0x03
|
|
line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603 ,CPU Targets Byte Offset 603 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO602 ,CPU Targets Byte Offset 602 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO601 ,CPU Targets Byte Offset 601 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO600 ,CPU Targets Byte Offset 600 "
|
|
group.long 0xA5C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607 ,CPU Targets Byte Offset 607 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO606 ,CPU Targets Byte Offset 606 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO605 ,CPU Targets Byte Offset 605 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO604 ,CPU Targets Byte Offset 604 "
|
|
else
|
|
hgroup.long 0xA40++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
|
|
hgroup.long 0xA44++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
|
|
hgroup.long 0xA48++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
|
|
hgroup.long 0xA4C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
|
|
hgroup.long 0xA50++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
|
|
hgroup.long 0xA54++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
|
|
hgroup.long 0xA58++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
|
|
hgroup.long 0xA5C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0xA60++0x03
|
|
line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611 ,CPU Targets Byte Offset 611 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO610 ,CPU Targets Byte Offset 610 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO609 ,CPU Targets Byte Offset 609 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO608 ,CPU Targets Byte Offset 608 "
|
|
group.long 0xA64++0x03
|
|
line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615 ,CPU Targets Byte Offset 615 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO614 ,CPU Targets Byte Offset 614 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO613 ,CPU Targets Byte Offset 613 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO612 ,CPU Targets Byte Offset 612 "
|
|
group.long 0xA68++0x03
|
|
line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619 ,CPU Targets Byte Offset 619 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO618 ,CPU Targets Byte Offset 618 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO617 ,CPU Targets Byte Offset 617 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO616 ,CPU Targets Byte Offset 616 "
|
|
group.long 0xA6C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623 ,CPU Targets Byte Offset 623 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO622 ,CPU Targets Byte Offset 622 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO621 ,CPU Targets Byte Offset 621 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO620 ,CPU Targets Byte Offset 620 "
|
|
group.long 0xA70++0x03
|
|
line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627 ,CPU Targets Byte Offset 627 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO626 ,CPU Targets Byte Offset 626 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO625 ,CPU Targets Byte Offset 625 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO624 ,CPU Targets Byte Offset 624 "
|
|
group.long 0xA74++0x03
|
|
line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631 ,CPU Targets Byte Offset 631 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO630 ,CPU Targets Byte Offset 630 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO629 ,CPU Targets Byte Offset 629 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO628 ,CPU Targets Byte Offset 628 "
|
|
group.long 0xA78++0x03
|
|
line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635 ,CPU Targets Byte Offset 635 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO634 ,CPU Targets Byte Offset 634 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO633 ,CPU Targets Byte Offset 633 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO632 ,CPU Targets Byte Offset 632 "
|
|
group.long 0xA7C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639 ,CPU Targets Byte Offset 639 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO638 ,CPU Targets Byte Offset 638 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO637 ,CPU Targets Byte Offset 637 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO636 ,CPU Targets Byte Offset 636 "
|
|
else
|
|
hgroup.long 0xA60++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
|
|
hgroup.long 0xA64++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
|
|
hgroup.long 0xA68++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
|
|
hgroup.long 0xA6C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
|
|
hgroup.long 0xA70++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
|
|
hgroup.long 0xA74++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
|
|
hgroup.long 0xA78++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
|
|
hgroup.long 0xA7C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0xA80++0x03
|
|
line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643 ,CPU Targets Byte Offset 643 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO642 ,CPU Targets Byte Offset 642 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO641 ,CPU Targets Byte Offset 641 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO640 ,CPU Targets Byte Offset 640 "
|
|
group.long 0xA84++0x03
|
|
line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647 ,CPU Targets Byte Offset 647 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO646 ,CPU Targets Byte Offset 646 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO645 ,CPU Targets Byte Offset 645 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO644 ,CPU Targets Byte Offset 644 "
|
|
group.long 0xA88++0x03
|
|
line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651 ,CPU Targets Byte Offset 651 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO650 ,CPU Targets Byte Offset 650 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO649 ,CPU Targets Byte Offset 649 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO648 ,CPU Targets Byte Offset 648 "
|
|
group.long 0xA8C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655 ,CPU Targets Byte Offset 655 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO654 ,CPU Targets Byte Offset 654 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO653 ,CPU Targets Byte Offset 653 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO652 ,CPU Targets Byte Offset 652 "
|
|
group.long 0xA90++0x03
|
|
line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659 ,CPU Targets Byte Offset 659 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO658 ,CPU Targets Byte Offset 658 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO657 ,CPU Targets Byte Offset 657 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO656 ,CPU Targets Byte Offset 656 "
|
|
group.long 0xA94++0x03
|
|
line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663 ,CPU Targets Byte Offset 663 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO662 ,CPU Targets Byte Offset 662 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO661 ,CPU Targets Byte Offset 661 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO660 ,CPU Targets Byte Offset 660 "
|
|
group.long 0xA98++0x03
|
|
line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667 ,CPU Targets Byte Offset 667 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO666 ,CPU Targets Byte Offset 666 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO665 ,CPU Targets Byte Offset 665 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO664 ,CPU Targets Byte Offset 664 "
|
|
group.long 0xA9C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671 ,CPU Targets Byte Offset 671 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO670 ,CPU Targets Byte Offset 670 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO669 ,CPU Targets Byte Offset 669 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO668 ,CPU Targets Byte Offset 668 "
|
|
else
|
|
hgroup.long 0xA80++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
|
|
hgroup.long 0xA84++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
|
|
hgroup.long 0xA88++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
|
|
hgroup.long 0xA8C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
|
|
hgroup.long 0xA90++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
|
|
hgroup.long 0xA94++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
|
|
hgroup.long 0xA98++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
|
|
hgroup.long 0xA9C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0xAA0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675 ,CPU Targets Byte Offset 675 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO674 ,CPU Targets Byte Offset 674 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO673 ,CPU Targets Byte Offset 673 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO672 ,CPU Targets Byte Offset 672 "
|
|
group.long 0xAA4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679 ,CPU Targets Byte Offset 679 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO678 ,CPU Targets Byte Offset 678 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO677 ,CPU Targets Byte Offset 677 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO676 ,CPU Targets Byte Offset 676 "
|
|
group.long 0xAA8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683 ,CPU Targets Byte Offset 683 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO682 ,CPU Targets Byte Offset 682 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO681 ,CPU Targets Byte Offset 681 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO680 ,CPU Targets Byte Offset 680 "
|
|
group.long 0xAAC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687 ,CPU Targets Byte Offset 687 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO686 ,CPU Targets Byte Offset 686 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO685 ,CPU Targets Byte Offset 685 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO684 ,CPU Targets Byte Offset 684 "
|
|
group.long 0xAB0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691 ,CPU Targets Byte Offset 691 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO690 ,CPU Targets Byte Offset 690 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO689 ,CPU Targets Byte Offset 689 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO688 ,CPU Targets Byte Offset 688 "
|
|
group.long 0xAB4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695 ,CPU Targets Byte Offset 695 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO694 ,CPU Targets Byte Offset 694 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO693 ,CPU Targets Byte Offset 693 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO692 ,CPU Targets Byte Offset 692 "
|
|
group.long 0xAB8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699 ,CPU Targets Byte Offset 699 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO698 ,CPU Targets Byte Offset 698 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO697 ,CPU Targets Byte Offset 697 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO696 ,CPU Targets Byte Offset 696 "
|
|
group.long 0xABC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703 ,CPU Targets Byte Offset 703 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO702 ,CPU Targets Byte Offset 702 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO701 ,CPU Targets Byte Offset 701 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO700 ,CPU Targets Byte Offset 700 "
|
|
else
|
|
hgroup.long 0xAA0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
|
|
hgroup.long 0xAA4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
|
|
hgroup.long 0xAA8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
|
|
hgroup.long 0xAAC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
|
|
hgroup.long 0xAB0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
|
|
hgroup.long 0xAB4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
|
|
hgroup.long 0xAB8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
|
|
hgroup.long 0xABC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0xAC0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707 ,CPU Targets Byte Offset 707 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO706 ,CPU Targets Byte Offset 706 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO705 ,CPU Targets Byte Offset 705 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO704 ,CPU Targets Byte Offset 704 "
|
|
group.long 0xAC4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711 ,CPU Targets Byte Offset 711 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO710 ,CPU Targets Byte Offset 710 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO709 ,CPU Targets Byte Offset 709 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO708 ,CPU Targets Byte Offset 708 "
|
|
group.long 0xAC8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715 ,CPU Targets Byte Offset 715 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO714 ,CPU Targets Byte Offset 714 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO713 ,CPU Targets Byte Offset 713 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO712 ,CPU Targets Byte Offset 712 "
|
|
group.long 0xACC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719 ,CPU Targets Byte Offset 719 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO718 ,CPU Targets Byte Offset 718 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO717 ,CPU Targets Byte Offset 717 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO716 ,CPU Targets Byte Offset 716 "
|
|
group.long 0xAD0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723 ,CPU Targets Byte Offset 723 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO722 ,CPU Targets Byte Offset 722 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO721 ,CPU Targets Byte Offset 721 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO720 ,CPU Targets Byte Offset 720 "
|
|
group.long 0xAD4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727 ,CPU Targets Byte Offset 727 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO726 ,CPU Targets Byte Offset 726 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO725 ,CPU Targets Byte Offset 725 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO724 ,CPU Targets Byte Offset 724 "
|
|
group.long 0xAD8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731 ,CPU Targets Byte Offset 731 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO730 ,CPU Targets Byte Offset 730 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO729 ,CPU Targets Byte Offset 729 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO728 ,CPU Targets Byte Offset 728 "
|
|
group.long 0xADC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735 ,CPU Targets Byte Offset 735 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO734 ,CPU Targets Byte Offset 734 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO733 ,CPU Targets Byte Offset 733 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO732 ,CPU Targets Byte Offset 732 "
|
|
else
|
|
hgroup.long 0xAC0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
|
|
hgroup.long 0xAC4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
|
|
hgroup.long 0xAC8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
|
|
hgroup.long 0xACC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
|
|
hgroup.long 0xAD0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
|
|
hgroup.long 0xAD4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
|
|
hgroup.long 0xAD8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
|
|
hgroup.long 0xADC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0xAE0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739 ,CPU Targets Byte Offset 739 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO738 ,CPU Targets Byte Offset 738 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO737 ,CPU Targets Byte Offset 737 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO736 ,CPU Targets Byte Offset 736 "
|
|
group.long 0xAE4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743 ,CPU Targets Byte Offset 743 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO742 ,CPU Targets Byte Offset 742 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO741 ,CPU Targets Byte Offset 741 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO740 ,CPU Targets Byte Offset 740 "
|
|
group.long 0xAE8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747 ,CPU Targets Byte Offset 747 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO746 ,CPU Targets Byte Offset 746 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO745 ,CPU Targets Byte Offset 745 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO744 ,CPU Targets Byte Offset 744 "
|
|
group.long 0xAEC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751 ,CPU Targets Byte Offset 751 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO750 ,CPU Targets Byte Offset 750 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO749 ,CPU Targets Byte Offset 749 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO748 ,CPU Targets Byte Offset 748 "
|
|
group.long 0xAF0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755 ,CPU Targets Byte Offset 755 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO754 ,CPU Targets Byte Offset 754 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO753 ,CPU Targets Byte Offset 753 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO752 ,CPU Targets Byte Offset 752 "
|
|
group.long 0xAF4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759 ,CPU Targets Byte Offset 759 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO758 ,CPU Targets Byte Offset 758 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO757 ,CPU Targets Byte Offset 757 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO756 ,CPU Targets Byte Offset 756 "
|
|
group.long 0xAF8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763 ,CPU Targets Byte Offset 763 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO762 ,CPU Targets Byte Offset 762 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO761 ,CPU Targets Byte Offset 761 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO760 ,CPU Targets Byte Offset 760 "
|
|
group.long 0xAFC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767 ,CPU Targets Byte Offset 767 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO766 ,CPU Targets Byte Offset 766 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO765 ,CPU Targets Byte Offset 765 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO764 ,CPU Targets Byte Offset 764 "
|
|
else
|
|
hgroup.long 0xAE0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
|
|
hgroup.long 0xAE4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
|
|
hgroup.long 0xAE8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
|
|
hgroup.long 0xAEC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
|
|
hgroup.long 0xAF0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
|
|
hgroup.long 0xAF4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
|
|
hgroup.long 0xAF8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
|
|
hgroup.long 0xAFC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0xB00++0x03
|
|
line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771 ,CPU Targets Byte Offset 771 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO770 ,CPU Targets Byte Offset 770 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO769 ,CPU Targets Byte Offset 769 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO768 ,CPU Targets Byte Offset 768 "
|
|
group.long 0xB04++0x03
|
|
line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775 ,CPU Targets Byte Offset 775 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO774 ,CPU Targets Byte Offset 774 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO773 ,CPU Targets Byte Offset 773 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO772 ,CPU Targets Byte Offset 772 "
|
|
group.long 0xB08++0x03
|
|
line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779 ,CPU Targets Byte Offset 779 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO778 ,CPU Targets Byte Offset 778 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO777 ,CPU Targets Byte Offset 777 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO776 ,CPU Targets Byte Offset 776 "
|
|
group.long 0xB0C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783 ,CPU Targets Byte Offset 783 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO782 ,CPU Targets Byte Offset 782 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO781 ,CPU Targets Byte Offset 781 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO780 ,CPU Targets Byte Offset 780 "
|
|
group.long 0xB10++0x03
|
|
line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787 ,CPU Targets Byte Offset 787 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO786 ,CPU Targets Byte Offset 786 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO785 ,CPU Targets Byte Offset 785 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO784 ,CPU Targets Byte Offset 784 "
|
|
group.long 0xB14++0x03
|
|
line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791 ,CPU Targets Byte Offset 791 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO790 ,CPU Targets Byte Offset 790 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO789 ,CPU Targets Byte Offset 789 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO788 ,CPU Targets Byte Offset 788 "
|
|
group.long 0xB18++0x03
|
|
line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795 ,CPU Targets Byte Offset 795 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO794 ,CPU Targets Byte Offset 794 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO793 ,CPU Targets Byte Offset 793 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO792 ,CPU Targets Byte Offset 792 "
|
|
group.long 0xB1C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799 ,CPU Targets Byte Offset 799 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO798 ,CPU Targets Byte Offset 798 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO797 ,CPU Targets Byte Offset 797 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO796 ,CPU Targets Byte Offset 796 "
|
|
else
|
|
hgroup.long 0xB00++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
|
|
hgroup.long 0xB04++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
|
|
hgroup.long 0xB08++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
|
|
hgroup.long 0xB0C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
|
|
hgroup.long 0xB10++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
|
|
hgroup.long 0xB14++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
|
|
hgroup.long 0xB18++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
|
|
hgroup.long 0xB1C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0xB20++0x03
|
|
line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803 ,CPU Targets Byte Offset 803 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO802 ,CPU Targets Byte Offset 802 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO801 ,CPU Targets Byte Offset 801 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO800 ,CPU Targets Byte Offset 800 "
|
|
group.long 0xB24++0x03
|
|
line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807 ,CPU Targets Byte Offset 807 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO806 ,CPU Targets Byte Offset 806 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO805 ,CPU Targets Byte Offset 805 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO804 ,CPU Targets Byte Offset 804 "
|
|
group.long 0xB28++0x03
|
|
line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811 ,CPU Targets Byte Offset 811 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO810 ,CPU Targets Byte Offset 810 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO809 ,CPU Targets Byte Offset 809 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO808 ,CPU Targets Byte Offset 808 "
|
|
group.long 0xB2C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815 ,CPU Targets Byte Offset 815 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO814 ,CPU Targets Byte Offset 814 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO813 ,CPU Targets Byte Offset 813 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO812 ,CPU Targets Byte Offset 812 "
|
|
group.long 0xB30++0x03
|
|
line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819 ,CPU Targets Byte Offset 819 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO818 ,CPU Targets Byte Offset 818 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO817 ,CPU Targets Byte Offset 817 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO816 ,CPU Targets Byte Offset 816 "
|
|
group.long 0xB34++0x03
|
|
line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823 ,CPU Targets Byte Offset 823 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO822 ,CPU Targets Byte Offset 822 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO821 ,CPU Targets Byte Offset 821 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO820 ,CPU Targets Byte Offset 820 "
|
|
group.long 0xB38++0x03
|
|
line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827 ,CPU Targets Byte Offset 827 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO826 ,CPU Targets Byte Offset 826 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO825 ,CPU Targets Byte Offset 825 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO824 ,CPU Targets Byte Offset 824 "
|
|
group.long 0xB3C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831 ,CPU Targets Byte Offset 831 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO830 ,CPU Targets Byte Offset 830 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO829 ,CPU Targets Byte Offset 829 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO828 ,CPU Targets Byte Offset 828 "
|
|
else
|
|
hgroup.long 0xB20++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
|
|
hgroup.long 0xB24++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
|
|
hgroup.long 0xB28++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
|
|
hgroup.long 0xB2C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
|
|
hgroup.long 0xB30++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
|
|
hgroup.long 0xB34++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
|
|
hgroup.long 0xB38++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
|
|
hgroup.long 0xB3C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0xB40++0x03
|
|
line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835 ,CPU Targets Byte Offset 835 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO834 ,CPU Targets Byte Offset 834 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO833 ,CPU Targets Byte Offset 833 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO832 ,CPU Targets Byte Offset 832 "
|
|
group.long 0xB44++0x03
|
|
line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839 ,CPU Targets Byte Offset 839 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO838 ,CPU Targets Byte Offset 838 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO837 ,CPU Targets Byte Offset 837 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO836 ,CPU Targets Byte Offset 836 "
|
|
group.long 0xB48++0x03
|
|
line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843 ,CPU Targets Byte Offset 843 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO842 ,CPU Targets Byte Offset 842 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO841 ,CPU Targets Byte Offset 841 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO840 ,CPU Targets Byte Offset 840 "
|
|
group.long 0xB4C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847 ,CPU Targets Byte Offset 847 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO846 ,CPU Targets Byte Offset 846 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO845 ,CPU Targets Byte Offset 845 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO844 ,CPU Targets Byte Offset 844 "
|
|
group.long 0xB50++0x03
|
|
line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851 ,CPU Targets Byte Offset 851 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO850 ,CPU Targets Byte Offset 850 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO849 ,CPU Targets Byte Offset 849 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO848 ,CPU Targets Byte Offset 848 "
|
|
group.long 0xB54++0x03
|
|
line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855 ,CPU Targets Byte Offset 855 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO854 ,CPU Targets Byte Offset 854 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO853 ,CPU Targets Byte Offset 853 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO852 ,CPU Targets Byte Offset 852 "
|
|
group.long 0xB58++0x03
|
|
line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859 ,CPU Targets Byte Offset 859 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO858 ,CPU Targets Byte Offset 858 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO857 ,CPU Targets Byte Offset 857 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO856 ,CPU Targets Byte Offset 856 "
|
|
group.long 0xB5C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863 ,CPU Targets Byte Offset 863 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO862 ,CPU Targets Byte Offset 862 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO861 ,CPU Targets Byte Offset 861 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO860 ,CPU Targets Byte Offset 860 "
|
|
else
|
|
hgroup.long 0xB40++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
|
|
hgroup.long 0xB44++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
|
|
hgroup.long 0xB48++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
|
|
hgroup.long 0xB4C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
|
|
hgroup.long 0xB50++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
|
|
hgroup.long 0xB54++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
|
|
hgroup.long 0xB58++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
|
|
hgroup.long 0xB5C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0xB60++0x03
|
|
line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867 ,CPU Targets Byte Offset 867 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO866 ,CPU Targets Byte Offset 866 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO865 ,CPU Targets Byte Offset 865 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO864 ,CPU Targets Byte Offset 864 "
|
|
group.long 0xB64++0x03
|
|
line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871 ,CPU Targets Byte Offset 871 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO870 ,CPU Targets Byte Offset 870 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO869 ,CPU Targets Byte Offset 869 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO868 ,CPU Targets Byte Offset 868 "
|
|
group.long 0xB68++0x03
|
|
line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875 ,CPU Targets Byte Offset 875 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO874 ,CPU Targets Byte Offset 874 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO873 ,CPU Targets Byte Offset 873 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO872 ,CPU Targets Byte Offset 872 "
|
|
group.long 0xB6C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879 ,CPU Targets Byte Offset 879 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO878 ,CPU Targets Byte Offset 878 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO877 ,CPU Targets Byte Offset 877 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO876 ,CPU Targets Byte Offset 876 "
|
|
group.long 0xB70++0x03
|
|
line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883 ,CPU Targets Byte Offset 883 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO882 ,CPU Targets Byte Offset 882 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO881 ,CPU Targets Byte Offset 881 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO880 ,CPU Targets Byte Offset 880 "
|
|
group.long 0xB74++0x03
|
|
line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887 ,CPU Targets Byte Offset 887 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO886 ,CPU Targets Byte Offset 886 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO885 ,CPU Targets Byte Offset 885 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO884 ,CPU Targets Byte Offset 884 "
|
|
group.long 0xB78++0x03
|
|
line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891 ,CPU Targets Byte Offset 891 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO890 ,CPU Targets Byte Offset 890 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO889 ,CPU Targets Byte Offset 889 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO888 ,CPU Targets Byte Offset 888 "
|
|
group.long 0xB7C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895 ,CPU Targets Byte Offset 895 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO894 ,CPU Targets Byte Offset 894 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO893 ,CPU Targets Byte Offset 893 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO892 ,CPU Targets Byte Offset 892 "
|
|
else
|
|
hgroup.long 0xB60++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
|
|
hgroup.long 0xB64++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
|
|
hgroup.long 0xB68++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
|
|
hgroup.long 0xB6C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
|
|
hgroup.long 0xB70++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
|
|
hgroup.long 0xB74++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
|
|
hgroup.long 0xB78++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
|
|
hgroup.long 0xB7C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0xB80++0x03
|
|
line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899 ,CPU Targets Byte Offset 899 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO898 ,CPU Targets Byte Offset 898 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO897 ,CPU Targets Byte Offset 897 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO896 ,CPU Targets Byte Offset 896 "
|
|
group.long 0xB84++0x03
|
|
line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903 ,CPU Targets Byte Offset 903 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO902 ,CPU Targets Byte Offset 902 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO901 ,CPU Targets Byte Offset 901 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO900 ,CPU Targets Byte Offset 900 "
|
|
group.long 0xB88++0x03
|
|
line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907 ,CPU Targets Byte Offset 907 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO906 ,CPU Targets Byte Offset 906 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO905 ,CPU Targets Byte Offset 905 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO904 ,CPU Targets Byte Offset 904 "
|
|
group.long 0xB8C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911 ,CPU Targets Byte Offset 911 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO910 ,CPU Targets Byte Offset 910 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO909 ,CPU Targets Byte Offset 909 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO908 ,CPU Targets Byte Offset 908 "
|
|
group.long 0xB90++0x03
|
|
line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915 ,CPU Targets Byte Offset 915 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO914 ,CPU Targets Byte Offset 914 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO913 ,CPU Targets Byte Offset 913 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO912 ,CPU Targets Byte Offset 912 "
|
|
group.long 0xB94++0x03
|
|
line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919 ,CPU Targets Byte Offset 919 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO918 ,CPU Targets Byte Offset 918 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO917 ,CPU Targets Byte Offset 917 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO916 ,CPU Targets Byte Offset 916 "
|
|
group.long 0xB98++0x03
|
|
line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923 ,CPU Targets Byte Offset 923 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO922 ,CPU Targets Byte Offset 922 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO921 ,CPU Targets Byte Offset 921 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO920 ,CPU Targets Byte Offset 920 "
|
|
group.long 0xB9C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927 ,CPU Targets Byte Offset 927 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO926 ,CPU Targets Byte Offset 926 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO925 ,CPU Targets Byte Offset 925 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO924 ,CPU Targets Byte Offset 924 "
|
|
else
|
|
hgroup.long 0xB80++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
|
|
hgroup.long 0xB84++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
|
|
hgroup.long 0xB88++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
|
|
hgroup.long 0xB8C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
|
|
hgroup.long 0xB90++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
|
|
hgroup.long 0xB94++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
|
|
hgroup.long 0xB98++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
|
|
hgroup.long 0xB9C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0xBA0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931 ,CPU Targets Byte Offset 931 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO930 ,CPU Targets Byte Offset 930 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO929 ,CPU Targets Byte Offset 929 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO928 ,CPU Targets Byte Offset 928 "
|
|
group.long 0xBA4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935 ,CPU Targets Byte Offset 935 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO934 ,CPU Targets Byte Offset 934 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO933 ,CPU Targets Byte Offset 933 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO932 ,CPU Targets Byte Offset 932 "
|
|
group.long 0xBA8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939 ,CPU Targets Byte Offset 939 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO938 ,CPU Targets Byte Offset 938 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO937 ,CPU Targets Byte Offset 937 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO936 ,CPU Targets Byte Offset 936 "
|
|
group.long 0xBAC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943 ,CPU Targets Byte Offset 943 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO942 ,CPU Targets Byte Offset 942 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO941 ,CPU Targets Byte Offset 941 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO940 ,CPU Targets Byte Offset 940 "
|
|
group.long 0xBB0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947 ,CPU Targets Byte Offset 947 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO946 ,CPU Targets Byte Offset 946 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO945 ,CPU Targets Byte Offset 945 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO944 ,CPU Targets Byte Offset 944 "
|
|
group.long 0xBB4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951 ,CPU Targets Byte Offset 951 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO950 ,CPU Targets Byte Offset 950 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO949 ,CPU Targets Byte Offset 949 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO948 ,CPU Targets Byte Offset 948 "
|
|
group.long 0xBB8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955 ,CPU Targets Byte Offset 955 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO954 ,CPU Targets Byte Offset 954 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO953 ,CPU Targets Byte Offset 953 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO952 ,CPU Targets Byte Offset 952 "
|
|
group.long 0xBBC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959 ,CPU Targets Byte Offset 959 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO958 ,CPU Targets Byte Offset 958 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO957 ,CPU Targets Byte Offset 957 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO956 ,CPU Targets Byte Offset 956 "
|
|
else
|
|
hgroup.long 0xBA0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
|
|
hgroup.long 0xBA4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
|
|
hgroup.long 0xBA8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
|
|
hgroup.long 0xBAC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
|
|
hgroup.long 0xBB0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
|
|
hgroup.long 0xBB4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
|
|
hgroup.long 0xBB8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
|
|
hgroup.long 0xBBC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0xBC0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963 ,CPU Targets Byte Offset 963 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO962 ,CPU Targets Byte Offset 962 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO961 ,CPU Targets Byte Offset 961 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO960 ,CPU Targets Byte Offset 960 "
|
|
group.long 0xBC4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967 ,CPU Targets Byte Offset 967 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO966 ,CPU Targets Byte Offset 966 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO965 ,CPU Targets Byte Offset 965 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO964 ,CPU Targets Byte Offset 964 "
|
|
group.long 0xBC8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971 ,CPU Targets Byte Offset 971 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO970 ,CPU Targets Byte Offset 970 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO969 ,CPU Targets Byte Offset 969 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO968 ,CPU Targets Byte Offset 968 "
|
|
group.long 0xBCC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975 ,CPU Targets Byte Offset 975 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO974 ,CPU Targets Byte Offset 974 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO973 ,CPU Targets Byte Offset 973 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO972 ,CPU Targets Byte Offset 972 "
|
|
group.long 0xBD0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979 ,CPU Targets Byte Offset 979 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO978 ,CPU Targets Byte Offset 978 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO977 ,CPU Targets Byte Offset 977 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO976 ,CPU Targets Byte Offset 976 "
|
|
group.long 0xBD4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983 ,CPU Targets Byte Offset 983 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO982 ,CPU Targets Byte Offset 982 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO981 ,CPU Targets Byte Offset 981 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO980 ,CPU Targets Byte Offset 980 "
|
|
group.long 0xBD8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987 ,CPU Targets Byte Offset 987 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO986 ,CPU Targets Byte Offset 986 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO985 ,CPU Targets Byte Offset 985 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO984 ,CPU Targets Byte Offset 984 "
|
|
group.long 0xBDC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991 ,CPU Targets Byte Offset 991 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO990 ,CPU Targets Byte Offset 990 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO989 ,CPU Targets Byte Offset 989 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO988 ,CPU Targets Byte Offset 988 "
|
|
else
|
|
hgroup.long 0xBC0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
|
|
hgroup.long 0xBC4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
|
|
hgroup.long 0xBC8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
|
|
hgroup.long 0xBCC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
|
|
hgroup.long 0xBD0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
|
|
hgroup.long 0xBD4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
|
|
hgroup.long 0xBD8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
|
|
hgroup.long 0xBDC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1F)
|
|
group.long 0xBE0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO995 ,CPU Targets Byte Offset 995 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO994 ,CPU Targets Byte Offset 994 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO993 ,CPU Targets Byte Offset 993 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO992 ,CPU Targets Byte Offset 992 "
|
|
group.long 0xBE4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO999 ,CPU Targets Byte Offset 999 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO998 ,CPU Targets Byte Offset 998 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO997 ,CPU Targets Byte Offset 997 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO996 ,CPU Targets Byte Offset 996 "
|
|
group.long 0xBE8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1003 ,CPU Targets Byte Offset 1003"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1002 ,CPU Targets Byte Offset 1002"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1001 ,CPU Targets Byte Offset 1001"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1000 ,CPU Targets Byte Offset 1000"
|
|
group.long 0xBEC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1007 ,CPU Targets Byte Offset 1007"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1006 ,CPU Targets Byte Offset 1006"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1005 ,CPU Targets Byte Offset 1005"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1004 ,CPU Targets Byte Offset 1004"
|
|
group.long 0xBF0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1011 ,CPU Targets Byte Offset 1011"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1010 ,CPU Targets Byte Offset 1010"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1009 ,CPU Targets Byte Offset 1009"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1008 ,CPU Targets Byte Offset 1008"
|
|
group.long 0xBF4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1015 ,CPU Targets Byte Offset 1015"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1014 ,CPU Targets Byte Offset 1014"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1013 ,CPU Targets Byte Offset 1013"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1012 ,CPU Targets Byte Offset 1012"
|
|
group.long 0xBF8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1019 ,CPU Targets Byte Offset 1019"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1018 ,CPU Targets Byte Offset 1018"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1017 ,CPU Targets Byte Offset 1017"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1016 ,CPU Targets Byte Offset 1016"
|
|
else
|
|
hgroup.long 0xBE0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248"
|
|
hgroup.long 0xBE4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249"
|
|
hgroup.long 0xBE8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250"
|
|
hgroup.long 0xBEC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251"
|
|
hgroup.long 0xBF0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252"
|
|
hgroup.long 0xBF4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253"
|
|
hgroup.long 0xBF8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254"
|
|
endif
|
|
else
|
|
hgroup.long 0x800++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR0 ,Interrupt Processor Targets Register 0 "
|
|
hgroup.long 0x804++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR1 ,Interrupt Processor Targets Register 1 "
|
|
hgroup.long 0x808++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR2 ,Interrupt Processor Targets Register 2 "
|
|
hgroup.long 0x80C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR3 ,Interrupt Processor Targets Register 3 "
|
|
hgroup.long 0x810++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR4 ,Interrupt Processor Targets Register 4 "
|
|
hgroup.long 0x814++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR5 ,Interrupt Processor Targets Register 5 "
|
|
hgroup.long 0x818++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR6 ,Interrupt Processor Targets Register 6 "
|
|
hgroup.long 0x81C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR7 ,Interrupt Processor Targets Register 7 "
|
|
hgroup.long 0x820++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR8 ,Interrupt Processor Targets Register 8 "
|
|
hgroup.long 0x824++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR9 ,Interrupt Processor Targets Register 9 "
|
|
hgroup.long 0x828++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 "
|
|
hgroup.long 0x82C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 "
|
|
hgroup.long 0x830++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 "
|
|
hgroup.long 0x834++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 "
|
|
hgroup.long 0x838++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 "
|
|
hgroup.long 0x83C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 "
|
|
hgroup.long 0x840++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 "
|
|
hgroup.long 0x844++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 "
|
|
hgroup.long 0x848++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 "
|
|
hgroup.long 0x84C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 "
|
|
hgroup.long 0x850++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 "
|
|
hgroup.long 0x854++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 "
|
|
hgroup.long 0x858++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 "
|
|
hgroup.long 0x85C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 "
|
|
hgroup.long 0x860++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 "
|
|
hgroup.long 0x864++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 "
|
|
hgroup.long 0x868++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 "
|
|
hgroup.long 0x86C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 "
|
|
hgroup.long 0x870++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 "
|
|
hgroup.long 0x874++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 "
|
|
hgroup.long 0x878++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 "
|
|
hgroup.long 0x87C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 "
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 "
|
|
hgroup.long 0x884++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 "
|
|
hgroup.long 0x888++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 "
|
|
hgroup.long 0x88C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 "
|
|
hgroup.long 0x890++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 "
|
|
hgroup.long 0x894++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 "
|
|
hgroup.long 0x898++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 "
|
|
hgroup.long 0x89C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 "
|
|
hgroup.long 0x8A0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 "
|
|
hgroup.long 0x8A4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 "
|
|
hgroup.long 0x8A8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 "
|
|
hgroup.long 0x8AC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 "
|
|
hgroup.long 0x8B0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 "
|
|
hgroup.long 0x8B4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 "
|
|
hgroup.long 0x8B8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 "
|
|
hgroup.long 0x8BC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 "
|
|
hgroup.long 0x8C0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 "
|
|
hgroup.long 0x8C4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 "
|
|
hgroup.long 0x8C8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 "
|
|
hgroup.long 0x8CC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 "
|
|
hgroup.long 0x8D0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 "
|
|
hgroup.long 0x8D4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 "
|
|
hgroup.long 0x8D8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 "
|
|
hgroup.long 0x8DC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 "
|
|
hgroup.long 0x8E0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 "
|
|
hgroup.long 0x8E4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 "
|
|
hgroup.long 0x8E8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 "
|
|
hgroup.long 0x8EC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 "
|
|
hgroup.long 0x8F0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 "
|
|
hgroup.long 0x8F4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 "
|
|
hgroup.long 0x8F8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 "
|
|
hgroup.long 0x8FC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 "
|
|
hgroup.long 0x900++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 "
|
|
hgroup.long 0x904++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 "
|
|
hgroup.long 0x908++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 "
|
|
hgroup.long 0x90C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 "
|
|
hgroup.long 0x910++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 "
|
|
hgroup.long 0x914++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 "
|
|
hgroup.long 0x918++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 "
|
|
hgroup.long 0x91C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 "
|
|
hgroup.long 0x920++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 "
|
|
hgroup.long 0x924++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 "
|
|
hgroup.long 0x928++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 "
|
|
hgroup.long 0x92C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 "
|
|
hgroup.long 0x930++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 "
|
|
hgroup.long 0x934++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 "
|
|
hgroup.long 0x938++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 "
|
|
hgroup.long 0x93C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 "
|
|
hgroup.long 0x940++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 "
|
|
hgroup.long 0x944++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 "
|
|
hgroup.long 0x948++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 "
|
|
hgroup.long 0x94C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 "
|
|
hgroup.long 0x950++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 "
|
|
hgroup.long 0x954++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 "
|
|
hgroup.long 0x958++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 "
|
|
hgroup.long 0x95C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 "
|
|
hgroup.long 0x960++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 "
|
|
hgroup.long 0x964++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 "
|
|
hgroup.long 0x968++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 "
|
|
hgroup.long 0x96C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 "
|
|
hgroup.long 0x970++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 "
|
|
hgroup.long 0x974++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 "
|
|
hgroup.long 0x978++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 "
|
|
hgroup.long 0x97C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 "
|
|
hgroup.long 0x980++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 "
|
|
hgroup.long 0x984++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 "
|
|
hgroup.long 0x988++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 "
|
|
hgroup.long 0x98C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 "
|
|
hgroup.long 0x990++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
|
|
hgroup.long 0x994++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
|
|
hgroup.long 0x998++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
|
|
hgroup.long 0x99C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
|
|
hgroup.long 0x9A0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
|
|
hgroup.long 0x9A4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
|
|
hgroup.long 0x9A8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
|
|
hgroup.long 0x9AC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
|
|
hgroup.long 0x9B0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
|
|
hgroup.long 0x9B4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
|
|
hgroup.long 0x9B8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
|
|
hgroup.long 0x9BC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
|
|
hgroup.long 0x9C0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
|
|
hgroup.long 0x9C4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
|
|
hgroup.long 0x9C8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
|
|
hgroup.long 0x9CC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
|
|
hgroup.long 0x9D0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
|
|
hgroup.long 0x9D4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
|
|
hgroup.long 0x9D8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
|
|
hgroup.long 0x9DC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
|
|
hgroup.long 0x9E0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
|
|
hgroup.long 0x9E4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
|
|
hgroup.long 0x9E8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
|
|
hgroup.long 0x9EC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
|
|
hgroup.long 0x9F0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
|
|
hgroup.long 0x9F4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
|
|
hgroup.long 0x9F8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
|
|
hgroup.long 0x9FC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
|
|
hgroup.long 0xA00++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
|
|
hgroup.long 0xA04++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
|
|
hgroup.long 0xA08++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
|
|
hgroup.long 0xA0C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
|
|
hgroup.long 0xA10++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
|
|
hgroup.long 0xA14++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
|
|
hgroup.long 0xA18++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
|
|
hgroup.long 0xA1C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
|
|
hgroup.long 0xA20++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
|
|
hgroup.long 0xA24++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
|
|
hgroup.long 0xA28++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
|
|
hgroup.long 0xA2C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
|
|
hgroup.long 0xA30++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
|
|
hgroup.long 0xA34++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
|
|
hgroup.long 0xA38++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
|
|
hgroup.long 0xA3C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
|
|
hgroup.long 0xA40++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
|
|
hgroup.long 0xA44++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
|
|
hgroup.long 0xA48++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
|
|
hgroup.long 0xA4C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
|
|
hgroup.long 0xA50++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
|
|
hgroup.long 0xA54++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
|
|
hgroup.long 0xA58++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
|
|
hgroup.long 0xA5C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
|
|
hgroup.long 0xA60++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
|
|
hgroup.long 0xA64++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
|
|
hgroup.long 0xA68++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
|
|
hgroup.long 0xA6C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
|
|
hgroup.long 0xA70++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
|
|
hgroup.long 0xA74++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
|
|
hgroup.long 0xA78++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
|
|
hgroup.long 0xA7C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
|
|
hgroup.long 0xA80++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
|
|
hgroup.long 0xA84++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
|
|
hgroup.long 0xA88++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
|
|
hgroup.long 0xA8C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
|
|
hgroup.long 0xA90++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
|
|
hgroup.long 0xA94++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
|
|
hgroup.long 0xA98++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
|
|
hgroup.long 0xA9C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
|
|
hgroup.long 0xAA0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
|
|
hgroup.long 0xAA4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
|
|
hgroup.long 0xAA8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
|
|
hgroup.long 0xAAC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
|
|
hgroup.long 0xAB0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
|
|
hgroup.long 0xAB4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
|
|
hgroup.long 0xAB8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
|
|
hgroup.long 0xABC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
|
|
hgroup.long 0xAC0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
|
|
hgroup.long 0xAC4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
|
|
hgroup.long 0xAC8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
|
|
hgroup.long 0xACC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
|
|
hgroup.long 0xAD0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
|
|
hgroup.long 0xAD4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
|
|
hgroup.long 0xAD8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
|
|
hgroup.long 0xADC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
|
|
hgroup.long 0xAE0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
|
|
hgroup.long 0xAE4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
|
|
hgroup.long 0xAE8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
|
|
hgroup.long 0xAEC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
|
|
hgroup.long 0xAF0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
|
|
hgroup.long 0xAF4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
|
|
hgroup.long 0xAF8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
|
|
hgroup.long 0xAFC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
|
|
hgroup.long 0xB00++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
|
|
hgroup.long 0xB04++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
|
|
hgroup.long 0xB08++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
|
|
hgroup.long 0xB0C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
|
|
hgroup.long 0xB10++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
|
|
hgroup.long 0xB14++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
|
|
hgroup.long 0xB18++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
|
|
hgroup.long 0xB1C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
|
|
hgroup.long 0xB20++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
|
|
hgroup.long 0xB24++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
|
|
hgroup.long 0xB28++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
|
|
hgroup.long 0xB2C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
|
|
hgroup.long 0xB30++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
|
|
hgroup.long 0xB34++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
|
|
hgroup.long 0xB38++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
|
|
hgroup.long 0xB3C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
|
|
hgroup.long 0xB40++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
|
|
hgroup.long 0xB44++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
|
|
hgroup.long 0xB48++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
|
|
hgroup.long 0xB4C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
|
|
hgroup.long 0xB50++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
|
|
hgroup.long 0xB54++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
|
|
hgroup.long 0xB58++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
|
|
hgroup.long 0xB5C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
|
|
hgroup.long 0xB60++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
|
|
hgroup.long 0xB64++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
|
|
hgroup.long 0xB68++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
|
|
hgroup.long 0xB6C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
|
|
hgroup.long 0xB70++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
|
|
hgroup.long 0xB74++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
|
|
hgroup.long 0xB78++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
|
|
hgroup.long 0xB7C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
|
|
hgroup.long 0xB80++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
|
|
hgroup.long 0xB84++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
|
|
hgroup.long 0xB88++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
|
|
hgroup.long 0xB8C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
|
|
hgroup.long 0xB90++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
|
|
hgroup.long 0xB94++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
|
|
hgroup.long 0xB98++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
|
|
hgroup.long 0xB9C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
|
|
hgroup.long 0xBA0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
|
|
hgroup.long 0xBA4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
|
|
hgroup.long 0xBA8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
|
|
hgroup.long 0xBAC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
|
|
hgroup.long 0xBB0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
|
|
hgroup.long 0xBB4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
|
|
hgroup.long 0xBB8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
|
|
hgroup.long 0xBBC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
|
|
hgroup.long 0xBC0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
|
|
hgroup.long 0xBC4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
|
|
hgroup.long 0xBC8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
|
|
hgroup.long 0xBCC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
|
|
hgroup.long 0xBD0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
|
|
hgroup.long 0xBD4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
|
|
hgroup.long 0xBD8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
|
|
hgroup.long 0xBDC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
|
|
hgroup.long 0xBE0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248"
|
|
hgroup.long 0xBE4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249"
|
|
hgroup.long 0xBE8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250"
|
|
hgroup.long 0xBEC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251"
|
|
hgroup.long 0xBF0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252"
|
|
hgroup.long 0xBF4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253"
|
|
hgroup.long 0xBF8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254"
|
|
endif
|
|
tree.end
|
|
width 14.
|
|
tree "Configuration Registers"
|
|
hgroup.long 0xC00++0x03
|
|
hide.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register"
|
|
textline " "
|
|
rgroup.long 0xC04++0x03
|
|
line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1)
|
|
group.long 0xC08++0x03
|
|
line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC0C++0x03
|
|
line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC08++0x03
|
|
hide.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
|
|
hgroup.long 0xC0C++0x03
|
|
hide.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x2)
|
|
group.long 0xC10++0x03
|
|
line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC14++0x03
|
|
line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC10++0x03
|
|
hide.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
|
|
hgroup.long 0xC14++0x03
|
|
hide.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x3)
|
|
group.long 0xC18++0x03
|
|
line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC1C++0x03
|
|
line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC18++0x03
|
|
hide.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
|
|
hgroup.long 0xC1C++0x03
|
|
hide.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x4)
|
|
group.long 0xC20++0x03
|
|
line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC24++0x03
|
|
line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC20++0x03
|
|
hide.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
|
|
hgroup.long 0xC24++0x03
|
|
hide.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x5)
|
|
group.long 0xC28++0x03
|
|
line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC2C++0x03
|
|
line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC28++0x03
|
|
hide.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
|
|
hgroup.long 0xC2C++0x03
|
|
hide.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x6)
|
|
group.long 0xC30++0x03
|
|
line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC34++0x03
|
|
line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC30++0x03
|
|
hide.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
|
|
hgroup.long 0xC34++0x03
|
|
hide.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x7)
|
|
group.long 0xC38++0x03
|
|
line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC3C++0x03
|
|
line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC38++0x03
|
|
hide.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
|
|
hgroup.long 0xC3C++0x03
|
|
hide.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x8)
|
|
group.long 0xC40++0x03
|
|
line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC44++0x03
|
|
line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC40++0x03
|
|
hide.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
|
|
hgroup.long 0xC44++0x03
|
|
hide.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x9)
|
|
group.long 0xC48++0x03
|
|
line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC4C++0x03
|
|
line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC48++0x03
|
|
hide.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
|
|
hgroup.long 0xC4C++0x03
|
|
hide.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0xA)
|
|
group.long 0xC50++0x03
|
|
line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC54++0x03
|
|
line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC50++0x03
|
|
hide.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
|
|
hgroup.long 0xC54++0x03
|
|
hide.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0xB)
|
|
group.long 0xC58++0x03
|
|
line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC5C++0x03
|
|
line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC58++0x03
|
|
hide.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
|
|
hgroup.long 0xC5C++0x03
|
|
hide.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0xC)
|
|
group.long 0xC60++0x03
|
|
line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC64++0x03
|
|
line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC60++0x03
|
|
hide.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
|
|
hgroup.long 0xC64++0x03
|
|
hide.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0xD)
|
|
group.long 0xC68++0x03
|
|
line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC6C++0x03
|
|
line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC68++0x03
|
|
hide.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
|
|
hgroup.long 0xC6C++0x03
|
|
hide.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0xE)
|
|
group.long 0xC70++0x03
|
|
line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC74++0x03
|
|
line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC70++0x03
|
|
hide.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
|
|
hgroup.long 0xC74++0x03
|
|
hide.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0xF)
|
|
group.long 0xC78++0x03
|
|
line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC7C++0x03
|
|
line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC78++0x03
|
|
hide.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
|
|
hgroup.long 0xC7C++0x03
|
|
hide.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0xC80++0x03
|
|
line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC84++0x03
|
|
line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC80++0x03
|
|
hide.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
|
|
hgroup.long 0xC84++0x03
|
|
hide.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0xC88++0x03
|
|
line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC8C++0x03
|
|
line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC88++0x03
|
|
hide.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
|
|
hgroup.long 0xC8C++0x03
|
|
hide.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0xC90++0x03
|
|
line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC94++0x03
|
|
line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC90++0x03
|
|
hide.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
|
|
hgroup.long 0xC94++0x03
|
|
hide.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0xC98++0x03
|
|
line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC9C++0x03
|
|
line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC98++0x03
|
|
hide.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
|
|
hgroup.long 0xC9C++0x03
|
|
hide.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0xCA0++0x03
|
|
line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCA4++0x03
|
|
line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCA0++0x03
|
|
hide.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
|
|
hgroup.long 0xCA4++0x03
|
|
hide.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0xCA8++0x03
|
|
line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCAC++0x03
|
|
line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCA8++0x03
|
|
hide.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
|
|
hgroup.long 0xCAC++0x03
|
|
hide.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0xCB0++0x03
|
|
line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCB4++0x03
|
|
line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCB0++0x03
|
|
hide.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
|
|
hgroup.long 0xCB4++0x03
|
|
hide.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0xCB8++0x03
|
|
line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCBC++0x03
|
|
line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCB8++0x03
|
|
hide.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
|
|
hgroup.long 0xCBC++0x03
|
|
hide.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0xCC0++0x03
|
|
line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCC4++0x03
|
|
line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCC0++0x03
|
|
hide.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
|
|
hgroup.long 0xCC4++0x03
|
|
hide.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0xCC8++0x03
|
|
line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCCC++0x03
|
|
line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCC8++0x03
|
|
hide.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
|
|
hgroup.long 0xCCC++0x03
|
|
hide.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0xCD0++0x03
|
|
line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCD4++0x03
|
|
line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCD0++0x03
|
|
hide.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
|
|
hgroup.long 0xCD4++0x03
|
|
hide.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0xCD8++0x03
|
|
line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCDC++0x03
|
|
line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCD8++0x03
|
|
hide.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
|
|
hgroup.long 0xCDC++0x03
|
|
hide.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0xCE0++0x03
|
|
line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCE4++0x03
|
|
line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCE0++0x03
|
|
hide.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
|
|
hgroup.long 0xCE4++0x03
|
|
hide.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0xCE8++0x03
|
|
line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCEC++0x03
|
|
line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCE8++0x03
|
|
hide.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
|
|
hgroup.long 0xCEC++0x03
|
|
hide.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0xCF0++0x03
|
|
line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCF4++0x03
|
|
line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCF0++0x03
|
|
hide.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
|
|
hgroup.long 0xCF4++0x03
|
|
hide.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1F)
|
|
group.long 0xCF8++0x03
|
|
line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCFC++0x03
|
|
line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCF8++0x03
|
|
hide.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62"
|
|
hgroup.long 0xCFC++0x03
|
|
hide.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63"
|
|
endif
|
|
tree.end
|
|
width 12.
|
|
tree "Peripheral Interrupt Status Registers"
|
|
rgroup.long 0x0D00++0x03
|
|
line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register"
|
|
bitfld.long 0x00 15. " PPI_C[15] ,Returns the status of the ppi_c[15] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 14. " PPI_C[14] ,Returns the status of the ppi_c[14] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 13. " PPI_C[13] ,Returns the status of the ppi_c[13] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 12. " PPI_C[12] ,Returns the status of the ppi_c[12] inputs on the Distributor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PPI_C[11] ,Returns the status of the ppi_c[11] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 10. " PPI_C[10] ,Returns the status of the ppi_c[10] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 9. " PPI_C[9] ,Returns the status of the ppi_c[9] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 8. " PPI_C[8] ,Returns the status of the ppi_c[8] inputs on the Distributor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PPI_C[7] ,Returns the status of the ppi_c[7] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 6. " PPI_C[6] ,Returns the status of the ppi_c[6] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 5. " PPI_C[5] ,Returns the status of the ppi_c[5] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 4. " PPI_C[4] ,Returns the status of the ppi_c[4] inputs on the Distributor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PPI_C[3] ,Returns the status of the ppi_c[3] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 2. " PPI_C[2] ,Returns the status of the ppi_c[2] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 1. " PPI_C[1] ,Returns the status of the ppi_c[1] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 0. " PPI_C[0] ,Returns the status of the ppi_c[0] inputs on the Distributor" "Low,High"
|
|
textline " "
|
|
width 22.
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x01)
|
|
rgroup.long 0x0D04++0x03
|
|
line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0"
|
|
bitfld.long 0x00 31. " IRQS31 ,IRQS Status Bit 31" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS30 ,IRQS Status Bit 30" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS29 ,IRQS Status Bit 29" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS28 ,IRQS Status Bit 28" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS27 ,IRQS Status Bit 27" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS26 ,IRQS Status Bit 26" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS25 ,IRQS Status Bit 25" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS24 ,IRQS Status Bit 24" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS23 ,IRQS Status Bit 23" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS22 ,IRQS Status Bit 22" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS21 ,IRQS Status Bit 21" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS20 ,IRQS Status Bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS19 ,IRQS Status Bit 19" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS18 ,IRQS Status Bit 18" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS17 ,IRQS Status Bit 17" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS16 ,IRQS Status Bit 16" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS15 ,IRQS Status Bit 15" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS14 ,IRQS Status Bit 14" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS13 ,IRQS Status Bit 13" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS12 ,IRQS Status Bit 12" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS11 ,IRQS Status Bit 11" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS10 ,IRQS Status Bit 10" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS9 ,IRQS Status Bit 9" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS8 ,IRQS Status Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS7 ,IRQS Status Bit 7" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS6 ,IRQS Status Bit 6" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS5 ,IRQS Status Bit 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS4 ,IRQS Status Bit 4" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS3 ,IRQS Status Bit 3" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS2 ,IRQS Status Bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS1 ,IRQS Status Bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS0 ,IRQS Status Bit 0" "Low,High"
|
|
else
|
|
hgroup.long 0x0D04++0x03
|
|
hide.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x02)
|
|
rgroup.long 0x0D08++0x03
|
|
line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1"
|
|
bitfld.long 0x00 31. " IRQS63 ,IRQS Status Bit 63" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS62 ,IRQS Status Bit 62" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS61 ,IRQS Status Bit 61" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS60 ,IRQS Status Bit 60" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS59 ,IRQS Status Bit 59" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS58 ,IRQS Status Bit 58" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS57 ,IRQS Status Bit 57" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS56 ,IRQS Status Bit 56" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS55 ,IRQS Status Bit 55" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS54 ,IRQS Status Bit 54" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS53 ,IRQS Status Bit 53" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS52 ,IRQS Status Bit 52" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS51 ,IRQS Status Bit 51" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS50 ,IRQS Status Bit 50" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS49 ,IRQS Status Bit 49" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS48 ,IRQS Status Bit 48" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS47 ,IRQS Status Bit 47" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS46 ,IRQS Status Bit 46" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS45 ,IRQS Status Bit 45" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS44 ,IRQS Status Bit 44" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS43 ,IRQS Status Bit 43" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS42 ,IRQS Status Bit 42" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS41 ,IRQS Status Bit 41" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS40 ,IRQS Status Bit 40" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS39 ,IRQS Status Bit 39" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS38 ,IRQS Status Bit 38" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS37 ,IRQS Status Bit 37" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS36 ,IRQS Status Bit 36" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS35 ,IRQS Status Bit 35" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS34 ,IRQS Status Bit 34" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS33 ,IRQS Status Bit 33" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS32 ,IRQS Status Bit 32" "Low,High"
|
|
else
|
|
hgroup.long 0x0D08++0x03
|
|
hide.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x03)
|
|
rgroup.long 0x0D0C++0x03
|
|
line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2"
|
|
bitfld.long 0x00 31. " IRQS95 ,IRQS Status Bit 95" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS94 ,IRQS Status Bit 94" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS93 ,IRQS Status Bit 93" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS92 ,IRQS Status Bit 92" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS91 ,IRQS Status Bit 91" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS90 ,IRQS Status Bit 90" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS89 ,IRQS Status Bit 89" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS88 ,IRQS Status Bit 88" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS87 ,IRQS Status Bit 87" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS86 ,IRQS Status Bit 86" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS85 ,IRQS Status Bit 85" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS84 ,IRQS Status Bit 84" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS83 ,IRQS Status Bit 83" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS82 ,IRQS Status Bit 82" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS81 ,IRQS Status Bit 81" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS80 ,IRQS Status Bit 80" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS79 ,IRQS Status Bit 79" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS78 ,IRQS Status Bit 78" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS77 ,IRQS Status Bit 77" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS76 ,IRQS Status Bit 76" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS75 ,IRQS Status Bit 75" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS74 ,IRQS Status Bit 74" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS73 ,IRQS Status Bit 73" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS72 ,IRQS Status Bit 72" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS71 ,IRQS Status Bit 71" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS70 ,IRQS Status Bit 70" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS69 ,IRQS Status Bit 69" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS68 ,IRQS Status Bit 68" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS67 ,IRQS Status Bit 67" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS66 ,IRQS Status Bit 66" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS65 ,IRQS Status Bit 65" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS64 ,IRQS Status Bit 64" "Low,High"
|
|
else
|
|
hgroup.long 0x0D0C++0x03
|
|
hide.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x04)
|
|
rgroup.long 0x0D10++0x03
|
|
line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3"
|
|
bitfld.long 0x00 31. " IRQS127 ,IRQS Status Bit 127" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS126 ,IRQS Status Bit 126" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS125 ,IRQS Status Bit 125" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS124 ,IRQS Status Bit 124" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS123 ,IRQS Status Bit 123" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS122 ,IRQS Status Bit 122" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS121 ,IRQS Status Bit 121" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS120 ,IRQS Status Bit 120" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS119 ,IRQS Status Bit 119" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS118 ,IRQS Status Bit 118" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS117 ,IRQS Status Bit 117" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS116 ,IRQS Status Bit 116" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS115 ,IRQS Status Bit 115" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS114 ,IRQS Status Bit 114" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS113 ,IRQS Status Bit 113" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS112 ,IRQS Status Bit 112" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS111 ,IRQS Status Bit 111" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS110 ,IRQS Status Bit 110" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS109 ,IRQS Status Bit 109" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS108 ,IRQS Status Bit 108" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS107 ,IRQS Status Bit 107" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS106 ,IRQS Status Bit 106" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS105 ,IRQS Status Bit 105" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS104 ,IRQS Status Bit 104" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS103 ,IRQS Status Bit 103" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS102 ,IRQS Status Bit 102" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS101 ,IRQS Status Bit 101" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS100 ,IRQS Status Bit 100" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS99 ,IRQS Status Bit 99" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS98 ,IRQS Status Bit 98" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS97 ,IRQS Status Bit 97" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS96 ,IRQS Status Bit 96" "Low,High"
|
|
else
|
|
hgroup.long 0x0D10++0x03
|
|
hide.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x05)
|
|
rgroup.long 0x0D14++0x03
|
|
line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4"
|
|
bitfld.long 0x00 31. " IRQS159 ,IRQS Status Bit 159" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS158 ,IRQS Status Bit 158" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS157 ,IRQS Status Bit 157" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS156 ,IRQS Status Bit 156" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS155 ,IRQS Status Bit 155" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS154 ,IRQS Status Bit 154" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS153 ,IRQS Status Bit 153" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS152 ,IRQS Status Bit 152" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS151 ,IRQS Status Bit 151" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS150 ,IRQS Status Bit 150" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS149 ,IRQS Status Bit 149" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS148 ,IRQS Status Bit 148" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS147 ,IRQS Status Bit 147" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS146 ,IRQS Status Bit 146" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS145 ,IRQS Status Bit 145" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS144 ,IRQS Status Bit 144" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS143 ,IRQS Status Bit 143" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS142 ,IRQS Status Bit 142" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS141 ,IRQS Status Bit 141" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS140 ,IRQS Status Bit 140" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS139 ,IRQS Status Bit 139" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS138 ,IRQS Status Bit 138" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS137 ,IRQS Status Bit 137" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS136 ,IRQS Status Bit 136" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS135 ,IRQS Status Bit 135" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS134 ,IRQS Status Bit 134" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS133 ,IRQS Status Bit 133" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS132 ,IRQS Status Bit 132" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS131 ,IRQS Status Bit 131" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS130 ,IRQS Status Bit 130" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS129 ,IRQS Status Bit 129" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS128 ,IRQS Status Bit 128" "Low,High"
|
|
else
|
|
hgroup.long 0x0D14++0x03
|
|
hide.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x06)
|
|
rgroup.long 0x0D18++0x03
|
|
line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5"
|
|
bitfld.long 0x00 31. " IRQS191 ,IRQS Status Bit 191" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS190 ,IRQS Status Bit 190" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS189 ,IRQS Status Bit 189" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS188 ,IRQS Status Bit 188" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS187 ,IRQS Status Bit 187" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS186 ,IRQS Status Bit 186" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS185 ,IRQS Status Bit 185" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS184 ,IRQS Status Bit 184" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS183 ,IRQS Status Bit 183" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS182 ,IRQS Status Bit 182" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS181 ,IRQS Status Bit 181" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS180 ,IRQS Status Bit 180" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS179 ,IRQS Status Bit 179" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS178 ,IRQS Status Bit 178" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS177 ,IRQS Status Bit 177" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS176 ,IRQS Status Bit 176" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS175 ,IRQS Status Bit 175" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS174 ,IRQS Status Bit 174" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS173 ,IRQS Status Bit 173" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS172 ,IRQS Status Bit 172" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS171 ,IRQS Status Bit 171" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS170 ,IRQS Status Bit 170" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS169 ,IRQS Status Bit 169" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS168 ,IRQS Status Bit 168" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS167 ,IRQS Status Bit 167" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS166 ,IRQS Status Bit 166" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS165 ,IRQS Status Bit 165" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS164 ,IRQS Status Bit 164" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS163 ,IRQS Status Bit 163" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS162 ,IRQS Status Bit 162" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS161 ,IRQS Status Bit 161" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS160 ,IRQS Status Bit 160" "Low,High"
|
|
else
|
|
hgroup.long 0x0D18++0x03
|
|
hide.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x07)
|
|
rgroup.long 0x0D1C++0x03
|
|
line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6"
|
|
bitfld.long 0x00 31. " IRQS223 ,IRQS Status Bit 223" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS222 ,IRQS Status Bit 222" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS221 ,IRQS Status Bit 221" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS220 ,IRQS Status Bit 220" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS219 ,IRQS Status Bit 219" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS218 ,IRQS Status Bit 218" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS217 ,IRQS Status Bit 217" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS216 ,IRQS Status Bit 216" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS215 ,IRQS Status Bit 215" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS214 ,IRQS Status Bit 214" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS213 ,IRQS Status Bit 213" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS212 ,IRQS Status Bit 212" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS211 ,IRQS Status Bit 211" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS210 ,IRQS Status Bit 210" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS209 ,IRQS Status Bit 209" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS208 ,IRQS Status Bit 208" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS207 ,IRQS Status Bit 207" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS206 ,IRQS Status Bit 206" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS205 ,IRQS Status Bit 205" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS204 ,IRQS Status Bit 204" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS203 ,IRQS Status Bit 203" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS202 ,IRQS Status Bit 202" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS201 ,IRQS Status Bit 201" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS200 ,IRQS Status Bit 200" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS199 ,IRQS Status Bit 199" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS198 ,IRQS Status Bit 198" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS197 ,IRQS Status Bit 197" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS196 ,IRQS Status Bit 196" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS195 ,IRQS Status Bit 195" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS194 ,IRQS Status Bit 194" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS193 ,IRQS Status Bit 193" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS192 ,IRQS Status Bit 192" "Low,High"
|
|
else
|
|
hgroup.long 0x0D1C++0x03
|
|
hide.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x08)
|
|
rgroup.long 0x0D20++0x03
|
|
line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7"
|
|
bitfld.long 0x00 31. " IRQS255 ,IRQS Status Bit 255" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS254 ,IRQS Status Bit 254" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS253 ,IRQS Status Bit 253" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS252 ,IRQS Status Bit 252" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS251 ,IRQS Status Bit 251" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS250 ,IRQS Status Bit 250" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS249 ,IRQS Status Bit 249" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS248 ,IRQS Status Bit 248" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS247 ,IRQS Status Bit 247" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS246 ,IRQS Status Bit 246" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS245 ,IRQS Status Bit 245" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS244 ,IRQS Status Bit 244" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS243 ,IRQS Status Bit 243" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS242 ,IRQS Status Bit 242" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS241 ,IRQS Status Bit 241" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS240 ,IRQS Status Bit 240" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS239 ,IRQS Status Bit 239" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS238 ,IRQS Status Bit 238" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS237 ,IRQS Status Bit 237" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS236 ,IRQS Status Bit 236" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS235 ,IRQS Status Bit 235" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS234 ,IRQS Status Bit 234" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS233 ,IRQS Status Bit 233" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS232 ,IRQS Status Bit 232" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS231 ,IRQS Status Bit 231" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS230 ,IRQS Status Bit 230" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS229 ,IRQS Status Bit 229" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS228 ,IRQS Status Bit 228" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS227 ,IRQS Status Bit 227" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS226 ,IRQS Status Bit 226" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS225 ,IRQS Status Bit 225" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS224 ,IRQS Status Bit 224" "Low,High"
|
|
else
|
|
hgroup.long 0x0D20++0x03
|
|
hide.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x09)
|
|
rgroup.long 0x0D24++0x03
|
|
line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8"
|
|
bitfld.long 0x00 31. " IRQS287 ,IRQS Status Bit 287" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS286 ,IRQS Status Bit 286" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS285 ,IRQS Status Bit 285" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS284 ,IRQS Status Bit 284" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS283 ,IRQS Status Bit 283" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS282 ,IRQS Status Bit 282" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS281 ,IRQS Status Bit 281" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS280 ,IRQS Status Bit 280" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS279 ,IRQS Status Bit 279" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS278 ,IRQS Status Bit 278" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS277 ,IRQS Status Bit 277" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS276 ,IRQS Status Bit 276" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS275 ,IRQS Status Bit 275" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS274 ,IRQS Status Bit 274" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS273 ,IRQS Status Bit 273" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS272 ,IRQS Status Bit 272" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS271 ,IRQS Status Bit 271" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS270 ,IRQS Status Bit 270" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS269 ,IRQS Status Bit 269" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS268 ,IRQS Status Bit 268" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS267 ,IRQS Status Bit 267" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS266 ,IRQS Status Bit 266" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS265 ,IRQS Status Bit 265" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS264 ,IRQS Status Bit 264" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS263 ,IRQS Status Bit 263" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS262 ,IRQS Status Bit 262" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS261 ,IRQS Status Bit 261" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS260 ,IRQS Status Bit 260" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS259 ,IRQS Status Bit 259" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS258 ,IRQS Status Bit 258" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS257 ,IRQS Status Bit 257" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS256 ,IRQS Status Bit 256" "Low,High"
|
|
else
|
|
hgroup.long 0x0D24++0x03
|
|
hide.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0A)
|
|
rgroup.long 0x0D28++0x03
|
|
line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9"
|
|
bitfld.long 0x00 31. " IRQS319 ,IRQS Status Bit 319" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS318 ,IRQS Status Bit 318" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS317 ,IRQS Status Bit 317" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS316 ,IRQS Status Bit 316" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS315 ,IRQS Status Bit 315" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS314 ,IRQS Status Bit 314" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS313 ,IRQS Status Bit 313" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS312 ,IRQS Status Bit 312" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS311 ,IRQS Status Bit 311" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS310 ,IRQS Status Bit 310" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS309 ,IRQS Status Bit 309" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS308 ,IRQS Status Bit 308" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS307 ,IRQS Status Bit 307" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS306 ,IRQS Status Bit 306" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS305 ,IRQS Status Bit 305" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS304 ,IRQS Status Bit 304" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS303 ,IRQS Status Bit 303" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS302 ,IRQS Status Bit 302" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS301 ,IRQS Status Bit 301" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS300 ,IRQS Status Bit 300" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS299 ,IRQS Status Bit 299" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS298 ,IRQS Status Bit 298" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS297 ,IRQS Status Bit 297" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS296 ,IRQS Status Bit 296" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS295 ,IRQS Status Bit 295" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS294 ,IRQS Status Bit 294" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS293 ,IRQS Status Bit 293" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS292 ,IRQS Status Bit 292" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS291 ,IRQS Status Bit 291" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS290 ,IRQS Status Bit 290" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS289 ,IRQS Status Bit 289" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS288 ,IRQS Status Bit 288" "Low,High"
|
|
else
|
|
hgroup.long 0x0D28++0x03
|
|
hide.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0B)
|
|
rgroup.long 0x0D2C++0x03
|
|
line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10"
|
|
bitfld.long 0x00 31. " IRQS351 ,IRQS Status Bit 351" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS350 ,IRQS Status Bit 350" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS349 ,IRQS Status Bit 349" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS348 ,IRQS Status Bit 348" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS347 ,IRQS Status Bit 347" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS346 ,IRQS Status Bit 346" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS345 ,IRQS Status Bit 345" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS344 ,IRQS Status Bit 344" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS343 ,IRQS Status Bit 343" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS342 ,IRQS Status Bit 342" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS341 ,IRQS Status Bit 341" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS340 ,IRQS Status Bit 340" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS339 ,IRQS Status Bit 339" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS338 ,IRQS Status Bit 338" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS337 ,IRQS Status Bit 337" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS336 ,IRQS Status Bit 336" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS335 ,IRQS Status Bit 335" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS334 ,IRQS Status Bit 334" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS333 ,IRQS Status Bit 333" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS332 ,IRQS Status Bit 332" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS331 ,IRQS Status Bit 331" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS330 ,IRQS Status Bit 330" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS329 ,IRQS Status Bit 329" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS328 ,IRQS Status Bit 328" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS327 ,IRQS Status Bit 327" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS326 ,IRQS Status Bit 326" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS325 ,IRQS Status Bit 325" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS324 ,IRQS Status Bit 324" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS323 ,IRQS Status Bit 323" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS322 ,IRQS Status Bit 322" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS321 ,IRQS Status Bit 321" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS320 ,IRQS Status Bit 320" "Low,High"
|
|
else
|
|
hgroup.long 0x0D2C++0x03
|
|
hide.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0C)
|
|
rgroup.long 0x0D30++0x03
|
|
line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11"
|
|
bitfld.long 0x00 31. " IRQS383 ,IRQS Status Bit 383" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS382 ,IRQS Status Bit 382" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS381 ,IRQS Status Bit 381" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS380 ,IRQS Status Bit 380" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS379 ,IRQS Status Bit 379" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS378 ,IRQS Status Bit 378" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS377 ,IRQS Status Bit 377" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS376 ,IRQS Status Bit 376" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS375 ,IRQS Status Bit 375" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS374 ,IRQS Status Bit 374" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS373 ,IRQS Status Bit 373" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS372 ,IRQS Status Bit 372" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS371 ,IRQS Status Bit 371" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS370 ,IRQS Status Bit 370" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS369 ,IRQS Status Bit 369" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS368 ,IRQS Status Bit 368" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS367 ,IRQS Status Bit 367" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS366 ,IRQS Status Bit 366" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS365 ,IRQS Status Bit 365" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS364 ,IRQS Status Bit 364" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS363 ,IRQS Status Bit 363" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS362 ,IRQS Status Bit 362" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS361 ,IRQS Status Bit 361" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS360 ,IRQS Status Bit 360" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS359 ,IRQS Status Bit 359" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS358 ,IRQS Status Bit 358" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS357 ,IRQS Status Bit 357" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS356 ,IRQS Status Bit 356" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS355 ,IRQS Status Bit 355" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS354 ,IRQS Status Bit 354" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS353 ,IRQS Status Bit 353" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS352 ,IRQS Status Bit 352" "Low,High"
|
|
else
|
|
hgroup.long 0x0D30++0x03
|
|
hide.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0D)
|
|
rgroup.long 0x0D34++0x03
|
|
line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12"
|
|
bitfld.long 0x00 31. " IRQS415 ,IRQS Status Bit 415" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS414 ,IRQS Status Bit 414" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS413 ,IRQS Status Bit 413" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS412 ,IRQS Status Bit 412" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS411 ,IRQS Status Bit 411" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS410 ,IRQS Status Bit 410" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS409 ,IRQS Status Bit 409" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS408 ,IRQS Status Bit 408" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS407 ,IRQS Status Bit 407" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS406 ,IRQS Status Bit 406" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS405 ,IRQS Status Bit 405" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS404 ,IRQS Status Bit 404" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS403 ,IRQS Status Bit 403" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS402 ,IRQS Status Bit 402" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS401 ,IRQS Status Bit 401" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS400 ,IRQS Status Bit 400" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS399 ,IRQS Status Bit 399" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS398 ,IRQS Status Bit 398" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS397 ,IRQS Status Bit 397" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS396 ,IRQS Status Bit 396" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS395 ,IRQS Status Bit 395" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS394 ,IRQS Status Bit 394" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS393 ,IRQS Status Bit 393" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS392 ,IRQS Status Bit 392" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS391 ,IRQS Status Bit 391" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS390 ,IRQS Status Bit 390" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS389 ,IRQS Status Bit 389" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS388 ,IRQS Status Bit 388" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS387 ,IRQS Status Bit 387" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS386 ,IRQS Status Bit 386" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS385 ,IRQS Status Bit 385" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS384 ,IRQS Status Bit 384" "Low,High"
|
|
else
|
|
hgroup.long 0x0D34++0x03
|
|
hide.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0E)
|
|
rgroup.long 0x0D38++0x03
|
|
line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13"
|
|
bitfld.long 0x00 31. " IRQS447 ,IRQS Status Bit 447" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS446 ,IRQS Status Bit 446" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS445 ,IRQS Status Bit 445" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS444 ,IRQS Status Bit 444" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS443 ,IRQS Status Bit 443" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS442 ,IRQS Status Bit 442" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS441 ,IRQS Status Bit 441" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS440 ,IRQS Status Bit 440" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS439 ,IRQS Status Bit 439" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS438 ,IRQS Status Bit 438" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS437 ,IRQS Status Bit 437" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS436 ,IRQS Status Bit 436" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS435 ,IRQS Status Bit 435" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS434 ,IRQS Status Bit 434" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS433 ,IRQS Status Bit 433" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS432 ,IRQS Status Bit 432" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS431 ,IRQS Status Bit 431" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS430 ,IRQS Status Bit 430" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS429 ,IRQS Status Bit 429" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS428 ,IRQS Status Bit 428" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS427 ,IRQS Status Bit 427" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS426 ,IRQS Status Bit 426" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS425 ,IRQS Status Bit 425" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS424 ,IRQS Status Bit 424" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS423 ,IRQS Status Bit 423" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS422 ,IRQS Status Bit 422" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS421 ,IRQS Status Bit 421" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS420 ,IRQS Status Bit 420" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS419 ,IRQS Status Bit 419" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS418 ,IRQS Status Bit 418" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS417 ,IRQS Status Bit 417" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS416 ,IRQS Status Bit 416" "Low,High"
|
|
else
|
|
hgroup.long 0x0D38++0x03
|
|
hide.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x0F)
|
|
rgroup.long 0x0D3C++0x03
|
|
line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14"
|
|
bitfld.long 0x00 31. " IRQS479 ,IRQS Status Bit 479" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS478 ,IRQS Status Bit 478" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS477 ,IRQS Status Bit 477" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS476 ,IRQS Status Bit 476" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS475 ,IRQS Status Bit 475" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS474 ,IRQS Status Bit 474" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS473 ,IRQS Status Bit 473" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS472 ,IRQS Status Bit 472" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS471 ,IRQS Status Bit 471" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS470 ,IRQS Status Bit 470" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS469 ,IRQS Status Bit 469" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS468 ,IRQS Status Bit 468" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS467 ,IRQS Status Bit 467" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS466 ,IRQS Status Bit 466" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS465 ,IRQS Status Bit 465" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS464 ,IRQS Status Bit 464" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS463 ,IRQS Status Bit 463" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS462 ,IRQS Status Bit 462" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS461 ,IRQS Status Bit 461" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS460 ,IRQS Status Bit 460" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS459 ,IRQS Status Bit 459" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS458 ,IRQS Status Bit 458" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS457 ,IRQS Status Bit 457" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS456 ,IRQS Status Bit 456" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS455 ,IRQS Status Bit 455" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS454 ,IRQS Status Bit 454" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS453 ,IRQS Status Bit 453" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS452 ,IRQS Status Bit 452" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS451 ,IRQS Status Bit 451" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS450 ,IRQS Status Bit 450" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS449 ,IRQS Status Bit 449" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS448 ,IRQS Status Bit 448" "Low,High"
|
|
else
|
|
hgroup.long 0x0D3C++0x03
|
|
hide.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x10)
|
|
rgroup.long 0x0D40++0x03
|
|
line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15"
|
|
bitfld.long 0x00 31. " IRQS511 ,IRQS Status Bit 511" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS510 ,IRQS Status Bit 510" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS509 ,IRQS Status Bit 509" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS508 ,IRQS Status Bit 508" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS507 ,IRQS Status Bit 507" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS506 ,IRQS Status Bit 506" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS505 ,IRQS Status Bit 505" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS504 ,IRQS Status Bit 504" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS503 ,IRQS Status Bit 503" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS502 ,IRQS Status Bit 502" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS501 ,IRQS Status Bit 501" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS500 ,IRQS Status Bit 500" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS499 ,IRQS Status Bit 499" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS498 ,IRQS Status Bit 498" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS497 ,IRQS Status Bit 497" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS496 ,IRQS Status Bit 496" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS495 ,IRQS Status Bit 495" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS494 ,IRQS Status Bit 494" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS493 ,IRQS Status Bit 493" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS492 ,IRQS Status Bit 492" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS491 ,IRQS Status Bit 491" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS490 ,IRQS Status Bit 490" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS489 ,IRQS Status Bit 489" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS488 ,IRQS Status Bit 488" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS487 ,IRQS Status Bit 487" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS486 ,IRQS Status Bit 486" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS485 ,IRQS Status Bit 485" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS484 ,IRQS Status Bit 484" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS483 ,IRQS Status Bit 483" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS482 ,IRQS Status Bit 482" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS481 ,IRQS Status Bit 481" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS480 ,IRQS Status Bit 480" "Low,High"
|
|
else
|
|
hgroup.long 0x0D40++0x03
|
|
hide.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x11)
|
|
rgroup.long 0x0D44++0x03
|
|
line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16"
|
|
bitfld.long 0x00 31. " IRQS543 ,IRQS Status Bit 543" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS542 ,IRQS Status Bit 542" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS541 ,IRQS Status Bit 541" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS540 ,IRQS Status Bit 540" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS539 ,IRQS Status Bit 539" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS538 ,IRQS Status Bit 538" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS537 ,IRQS Status Bit 537" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS536 ,IRQS Status Bit 536" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS535 ,IRQS Status Bit 535" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS534 ,IRQS Status Bit 534" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS533 ,IRQS Status Bit 533" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS532 ,IRQS Status Bit 532" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS531 ,IRQS Status Bit 531" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS530 ,IRQS Status Bit 530" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS529 ,IRQS Status Bit 529" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS528 ,IRQS Status Bit 528" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS527 ,IRQS Status Bit 527" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS526 ,IRQS Status Bit 526" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS525 ,IRQS Status Bit 525" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS524 ,IRQS Status Bit 524" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS523 ,IRQS Status Bit 523" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS522 ,IRQS Status Bit 522" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS521 ,IRQS Status Bit 521" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS520 ,IRQS Status Bit 520" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS519 ,IRQS Status Bit 519" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS518 ,IRQS Status Bit 518" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS517 ,IRQS Status Bit 517" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS516 ,IRQS Status Bit 516" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS515 ,IRQS Status Bit 515" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS514 ,IRQS Status Bit 514" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS513 ,IRQS Status Bit 513" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS512 ,IRQS Status Bit 512" "Low,High"
|
|
else
|
|
hgroup.long 0x0D44++0x03
|
|
hide.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x12)
|
|
rgroup.long 0x0D48++0x03
|
|
line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17"
|
|
bitfld.long 0x00 31. " IRQS575 ,IRQS Status Bit 575" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS574 ,IRQS Status Bit 574" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS573 ,IRQS Status Bit 573" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS572 ,IRQS Status Bit 572" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS571 ,IRQS Status Bit 571" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS570 ,IRQS Status Bit 570" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS569 ,IRQS Status Bit 569" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS568 ,IRQS Status Bit 568" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS567 ,IRQS Status Bit 567" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS566 ,IRQS Status Bit 566" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS565 ,IRQS Status Bit 565" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS564 ,IRQS Status Bit 564" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS563 ,IRQS Status Bit 563" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS562 ,IRQS Status Bit 562" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS561 ,IRQS Status Bit 561" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS560 ,IRQS Status Bit 560" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS559 ,IRQS Status Bit 559" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS558 ,IRQS Status Bit 558" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS557 ,IRQS Status Bit 557" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS556 ,IRQS Status Bit 556" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS555 ,IRQS Status Bit 555" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS554 ,IRQS Status Bit 554" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS553 ,IRQS Status Bit 553" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS552 ,IRQS Status Bit 552" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS551 ,IRQS Status Bit 551" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS550 ,IRQS Status Bit 550" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS549 ,IRQS Status Bit 549" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS548 ,IRQS Status Bit 548" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS547 ,IRQS Status Bit 547" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS546 ,IRQS Status Bit 546" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS545 ,IRQS Status Bit 545" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS544 ,IRQS Status Bit 544" "Low,High"
|
|
else
|
|
hgroup.long 0x0D48++0x03
|
|
hide.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x13)
|
|
rgroup.long 0x0D4C++0x03
|
|
line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18"
|
|
bitfld.long 0x00 31. " IRQS607 ,IRQS Status Bit 607" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS606 ,IRQS Status Bit 606" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS605 ,IRQS Status Bit 605" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS604 ,IRQS Status Bit 604" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS603 ,IRQS Status Bit 603" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS602 ,IRQS Status Bit 602" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS601 ,IRQS Status Bit 601" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS600 ,IRQS Status Bit 600" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS599 ,IRQS Status Bit 599" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS598 ,IRQS Status Bit 598" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS597 ,IRQS Status Bit 597" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS596 ,IRQS Status Bit 596" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS595 ,IRQS Status Bit 595" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS594 ,IRQS Status Bit 594" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS593 ,IRQS Status Bit 593" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS592 ,IRQS Status Bit 592" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS591 ,IRQS Status Bit 591" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS590 ,IRQS Status Bit 590" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS589 ,IRQS Status Bit 589" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS588 ,IRQS Status Bit 588" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS587 ,IRQS Status Bit 587" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS586 ,IRQS Status Bit 586" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS585 ,IRQS Status Bit 585" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS584 ,IRQS Status Bit 584" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS583 ,IRQS Status Bit 583" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS582 ,IRQS Status Bit 582" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS581 ,IRQS Status Bit 581" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS580 ,IRQS Status Bit 580" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS579 ,IRQS Status Bit 579" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS578 ,IRQS Status Bit 578" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS577 ,IRQS Status Bit 577" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS576 ,IRQS Status Bit 576" "Low,High"
|
|
else
|
|
hgroup.long 0x0D4C++0x03
|
|
hide.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x14)
|
|
rgroup.long 0x0D50++0x03
|
|
line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19"
|
|
bitfld.long 0x00 31. " IRQS639 ,IRQS Status Bit 639" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS638 ,IRQS Status Bit 638" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS637 ,IRQS Status Bit 637" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS636 ,IRQS Status Bit 636" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS635 ,IRQS Status Bit 635" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS634 ,IRQS Status Bit 634" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS633 ,IRQS Status Bit 633" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS632 ,IRQS Status Bit 632" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS631 ,IRQS Status Bit 631" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS630 ,IRQS Status Bit 630" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS629 ,IRQS Status Bit 629" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS628 ,IRQS Status Bit 628" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS627 ,IRQS Status Bit 627" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS626 ,IRQS Status Bit 626" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS625 ,IRQS Status Bit 625" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS624 ,IRQS Status Bit 624" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS623 ,IRQS Status Bit 623" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS622 ,IRQS Status Bit 622" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS621 ,IRQS Status Bit 621" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS620 ,IRQS Status Bit 620" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS619 ,IRQS Status Bit 619" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS618 ,IRQS Status Bit 618" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS617 ,IRQS Status Bit 617" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS616 ,IRQS Status Bit 616" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS615 ,IRQS Status Bit 615" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS614 ,IRQS Status Bit 614" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS613 ,IRQS Status Bit 613" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS612 ,IRQS Status Bit 612" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS611 ,IRQS Status Bit 611" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS610 ,IRQS Status Bit 610" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS609 ,IRQS Status Bit 609" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS608 ,IRQS Status Bit 608" "Low,High"
|
|
else
|
|
hgroup.long 0x0D50++0x03
|
|
hide.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x15)
|
|
rgroup.long 0x0D54++0x03
|
|
line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20"
|
|
bitfld.long 0x00 31. " IRQS671 ,IRQS Status Bit 671" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS670 ,IRQS Status Bit 670" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS669 ,IRQS Status Bit 669" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS668 ,IRQS Status Bit 668" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS667 ,IRQS Status Bit 667" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS666 ,IRQS Status Bit 666" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS665 ,IRQS Status Bit 665" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS664 ,IRQS Status Bit 664" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS663 ,IRQS Status Bit 663" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS662 ,IRQS Status Bit 662" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS661 ,IRQS Status Bit 661" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS660 ,IRQS Status Bit 660" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS659 ,IRQS Status Bit 659" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS658 ,IRQS Status Bit 658" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS657 ,IRQS Status Bit 657" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS656 ,IRQS Status Bit 656" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS655 ,IRQS Status Bit 655" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS654 ,IRQS Status Bit 654" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS653 ,IRQS Status Bit 653" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS652 ,IRQS Status Bit 652" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS651 ,IRQS Status Bit 651" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS650 ,IRQS Status Bit 650" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS649 ,IRQS Status Bit 649" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS648 ,IRQS Status Bit 648" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS647 ,IRQS Status Bit 647" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS646 ,IRQS Status Bit 646" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS645 ,IRQS Status Bit 645" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS644 ,IRQS Status Bit 644" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS643 ,IRQS Status Bit 643" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS642 ,IRQS Status Bit 642" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS641 ,IRQS Status Bit 641" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS640 ,IRQS Status Bit 640" "Low,High"
|
|
else
|
|
hgroup.long 0x0D54++0x03
|
|
hide.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x16)
|
|
rgroup.long 0x0D58++0x03
|
|
line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21"
|
|
bitfld.long 0x00 31. " IRQS703 ,IRQS Status Bit 703" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS702 ,IRQS Status Bit 702" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS701 ,IRQS Status Bit 701" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS700 ,IRQS Status Bit 700" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS699 ,IRQS Status Bit 699" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS698 ,IRQS Status Bit 698" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS697 ,IRQS Status Bit 697" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS696 ,IRQS Status Bit 696" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS695 ,IRQS Status Bit 695" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS694 ,IRQS Status Bit 694" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS693 ,IRQS Status Bit 693" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS692 ,IRQS Status Bit 692" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS691 ,IRQS Status Bit 691" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS690 ,IRQS Status Bit 690" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS689 ,IRQS Status Bit 689" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS688 ,IRQS Status Bit 688" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS687 ,IRQS Status Bit 687" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS686 ,IRQS Status Bit 686" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS685 ,IRQS Status Bit 685" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS684 ,IRQS Status Bit 684" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS683 ,IRQS Status Bit 683" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS682 ,IRQS Status Bit 682" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS681 ,IRQS Status Bit 681" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS680 ,IRQS Status Bit 680" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS679 ,IRQS Status Bit 679" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS678 ,IRQS Status Bit 678" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS677 ,IRQS Status Bit 677" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS676 ,IRQS Status Bit 676" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS675 ,IRQS Status Bit 675" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS674 ,IRQS Status Bit 674" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS673 ,IRQS Status Bit 673" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS672 ,IRQS Status Bit 672" "Low,High"
|
|
else
|
|
hgroup.long 0x0D58++0x03
|
|
hide.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x17)
|
|
rgroup.long 0x0D5C++0x03
|
|
line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22"
|
|
bitfld.long 0x00 31. " IRQS735 ,IRQS Status Bit 735" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS734 ,IRQS Status Bit 734" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS733 ,IRQS Status Bit 733" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS732 ,IRQS Status Bit 732" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS731 ,IRQS Status Bit 731" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS730 ,IRQS Status Bit 730" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS729 ,IRQS Status Bit 729" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS728 ,IRQS Status Bit 728" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS727 ,IRQS Status Bit 727" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS726 ,IRQS Status Bit 726" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS725 ,IRQS Status Bit 725" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS724 ,IRQS Status Bit 724" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS723 ,IRQS Status Bit 723" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS722 ,IRQS Status Bit 722" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS721 ,IRQS Status Bit 721" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS720 ,IRQS Status Bit 720" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS719 ,IRQS Status Bit 719" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS718 ,IRQS Status Bit 718" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS717 ,IRQS Status Bit 717" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS716 ,IRQS Status Bit 716" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS715 ,IRQS Status Bit 715" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS714 ,IRQS Status Bit 714" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS713 ,IRQS Status Bit 713" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS712 ,IRQS Status Bit 712" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS711 ,IRQS Status Bit 711" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS710 ,IRQS Status Bit 710" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS709 ,IRQS Status Bit 709" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS708 ,IRQS Status Bit 708" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS707 ,IRQS Status Bit 707" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS706 ,IRQS Status Bit 706" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS705 ,IRQS Status Bit 705" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS704 ,IRQS Status Bit 704" "Low,High"
|
|
else
|
|
hgroup.long 0x0D5C++0x03
|
|
hide.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x18)
|
|
rgroup.long 0x060++0x03
|
|
line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23"
|
|
bitfld.long 0x00 31. " IRQS767 ,IRQS Status Bit 767" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS766 ,IRQS Status Bit 766" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS765 ,IRQS Status Bit 765" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS764 ,IRQS Status Bit 764" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS763 ,IRQS Status Bit 763" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS762 ,IRQS Status Bit 762" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS761 ,IRQS Status Bit 761" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS760 ,IRQS Status Bit 760" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS759 ,IRQS Status Bit 759" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS758 ,IRQS Status Bit 758" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS757 ,IRQS Status Bit 757" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS756 ,IRQS Status Bit 756" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS755 ,IRQS Status Bit 755" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS754 ,IRQS Status Bit 754" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS753 ,IRQS Status Bit 753" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS752 ,IRQS Status Bit 752" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS751 ,IRQS Status Bit 751" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS750 ,IRQS Status Bit 750" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS749 ,IRQS Status Bit 749" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS748 ,IRQS Status Bit 748" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS747 ,IRQS Status Bit 747" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS746 ,IRQS Status Bit 746" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS745 ,IRQS Status Bit 745" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS744 ,IRQS Status Bit 744" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS743 ,IRQS Status Bit 743" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS742 ,IRQS Status Bit 742" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS741 ,IRQS Status Bit 741" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS740 ,IRQS Status Bit 740" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS739 ,IRQS Status Bit 739" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS738 ,IRQS Status Bit 738" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS737 ,IRQS Status Bit 737" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS736 ,IRQS Status Bit 736" "Low,High"
|
|
else
|
|
hgroup.long 0x0D60++0x03
|
|
hide.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x19)
|
|
rgroup.long 0x0D64++0x03
|
|
line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24"
|
|
bitfld.long 0x00 31. " IRQS799 ,IRQS Status Bit 799" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS798 ,IRQS Status Bit 798" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS797 ,IRQS Status Bit 797" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS796 ,IRQS Status Bit 796" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS795 ,IRQS Status Bit 795" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS794 ,IRQS Status Bit 794" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS793 ,IRQS Status Bit 793" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS792 ,IRQS Status Bit 792" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS791 ,IRQS Status Bit 791" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS790 ,IRQS Status Bit 790" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS789 ,IRQS Status Bit 789" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS788 ,IRQS Status Bit 788" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS787 ,IRQS Status Bit 787" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS786 ,IRQS Status Bit 786" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS785 ,IRQS Status Bit 785" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS784 ,IRQS Status Bit 784" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS783 ,IRQS Status Bit 783" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS782 ,IRQS Status Bit 782" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS781 ,IRQS Status Bit 781" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS780 ,IRQS Status Bit 780" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS779 ,IRQS Status Bit 779" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS778 ,IRQS Status Bit 778" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS777 ,IRQS Status Bit 777" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS776 ,IRQS Status Bit 776" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS775 ,IRQS Status Bit 775" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS774 ,IRQS Status Bit 774" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS773 ,IRQS Status Bit 773" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS772 ,IRQS Status Bit 772" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS771 ,IRQS Status Bit 771" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS770 ,IRQS Status Bit 770" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS769 ,IRQS Status Bit 769" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS768 ,IRQS Status Bit 768" "Low,High"
|
|
else
|
|
hgroup.long 0x0D64++0x03
|
|
hide.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1A)
|
|
rgroup.long 0x0D68++0x03
|
|
line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25"
|
|
bitfld.long 0x00 31. " IRQS831 ,IRQS Status Bit 831" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS830 ,IRQS Status Bit 830" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS829 ,IRQS Status Bit 829" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS828 ,IRQS Status Bit 828" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS827 ,IRQS Status Bit 827" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS826 ,IRQS Status Bit 826" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS825 ,IRQS Status Bit 825" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS824 ,IRQS Status Bit 824" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS823 ,IRQS Status Bit 823" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS822 ,IRQS Status Bit 822" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS821 ,IRQS Status Bit 821" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS820 ,IRQS Status Bit 820" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS819 ,IRQS Status Bit 819" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS818 ,IRQS Status Bit 818" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS817 ,IRQS Status Bit 817" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS816 ,IRQS Status Bit 816" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS815 ,IRQS Status Bit 815" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS814 ,IRQS Status Bit 814" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS813 ,IRQS Status Bit 813" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS812 ,IRQS Status Bit 812" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS811 ,IRQS Status Bit 811" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS810 ,IRQS Status Bit 810" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS809 ,IRQS Status Bit 809" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS808 ,IRQS Status Bit 808" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS807 ,IRQS Status Bit 807" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS806 ,IRQS Status Bit 806" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS805 ,IRQS Status Bit 805" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS804 ,IRQS Status Bit 804" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS803 ,IRQS Status Bit 803" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS802 ,IRQS Status Bit 802" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS801 ,IRQS Status Bit 801" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS800 ,IRQS Status Bit 800" "Low,High"
|
|
else
|
|
hgroup.long 0x0D68++0x03
|
|
hide.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1B)
|
|
rgroup.long 0x0D6C++0x03
|
|
line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26"
|
|
bitfld.long 0x00 31. " IRQS863 ,IRQS Status Bit 863" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS862 ,IRQS Status Bit 862" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS861 ,IRQS Status Bit 861" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS860 ,IRQS Status Bit 860" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS859 ,IRQS Status Bit 859" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS858 ,IRQS Status Bit 858" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS857 ,IRQS Status Bit 857" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS856 ,IRQS Status Bit 856" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS855 ,IRQS Status Bit 855" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS854 ,IRQS Status Bit 854" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS853 ,IRQS Status Bit 853" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS852 ,IRQS Status Bit 852" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS851 ,IRQS Status Bit 851" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS850 ,IRQS Status Bit 850" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS849 ,IRQS Status Bit 849" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS848 ,IRQS Status Bit 848" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS847 ,IRQS Status Bit 847" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS846 ,IRQS Status Bit 846" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS845 ,IRQS Status Bit 845" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS844 ,IRQS Status Bit 844" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS843 ,IRQS Status Bit 843" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS842 ,IRQS Status Bit 842" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS841 ,IRQS Status Bit 841" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS840 ,IRQS Status Bit 840" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS839 ,IRQS Status Bit 839" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS838 ,IRQS Status Bit 838" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS837 ,IRQS Status Bit 837" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS836 ,IRQS Status Bit 836" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS835 ,IRQS Status Bit 835" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS834 ,IRQS Status Bit 834" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS833 ,IRQS Status Bit 833" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS832 ,IRQS Status Bit 832" "Low,High"
|
|
else
|
|
hgroup.long 0x0D6C++0x03
|
|
hide.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1C)
|
|
rgroup.long 0x0D70++0x03
|
|
line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27"
|
|
bitfld.long 0x00 31. " IRQS895 ,IRQS Status Bit 895" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS894 ,IRQS Status Bit 894" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS893 ,IRQS Status Bit 893" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS892 ,IRQS Status Bit 892" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS891 ,IRQS Status Bit 891" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS890 ,IRQS Status Bit 890" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS889 ,IRQS Status Bit 889" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS888 ,IRQS Status Bit 888" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS887 ,IRQS Status Bit 887" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS886 ,IRQS Status Bit 886" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS885 ,IRQS Status Bit 885" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS884 ,IRQS Status Bit 884" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS883 ,IRQS Status Bit 883" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS882 ,IRQS Status Bit 882" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS881 ,IRQS Status Bit 881" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS880 ,IRQS Status Bit 880" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS879 ,IRQS Status Bit 879" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS878 ,IRQS Status Bit 878" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS877 ,IRQS Status Bit 877" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS876 ,IRQS Status Bit 876" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS875 ,IRQS Status Bit 875" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS874 ,IRQS Status Bit 874" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS873 ,IRQS Status Bit 873" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS872 ,IRQS Status Bit 872" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS871 ,IRQS Status Bit 871" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS870 ,IRQS Status Bit 870" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS869 ,IRQS Status Bit 869" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS868 ,IRQS Status Bit 868" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS867 ,IRQS Status Bit 867" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS866 ,IRQS Status Bit 866" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS865 ,IRQS Status Bit 865" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS864 ,IRQS Status Bit 864" "Low,High"
|
|
else
|
|
hgroup.long 0x0D70++0x03
|
|
hide.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1D)
|
|
rgroup.long 0x0D74++0x03
|
|
line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28"
|
|
bitfld.long 0x00 31. " IRQS927 ,IRQS Status Bit 927" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS926 ,IRQS Status Bit 926" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS925 ,IRQS Status Bit 925" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS924 ,IRQS Status Bit 924" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS923 ,IRQS Status Bit 923" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS922 ,IRQS Status Bit 922" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS921 ,IRQS Status Bit 921" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS920 ,IRQS Status Bit 920" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS919 ,IRQS Status Bit 919" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS918 ,IRQS Status Bit 918" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS917 ,IRQS Status Bit 917" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS916 ,IRQS Status Bit 916" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS915 ,IRQS Status Bit 915" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS914 ,IRQS Status Bit 914" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS913 ,IRQS Status Bit 913" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS912 ,IRQS Status Bit 912" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS911 ,IRQS Status Bit 911" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS910 ,IRQS Status Bit 910" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS909 ,IRQS Status Bit 909" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS908 ,IRQS Status Bit 908" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS907 ,IRQS Status Bit 907" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS906 ,IRQS Status Bit 906" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS905 ,IRQS Status Bit 905" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS904 ,IRQS Status Bit 904" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS903 ,IRQS Status Bit 903" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS902 ,IRQS Status Bit 902" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS901 ,IRQS Status Bit 901" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS900 ,IRQS Status Bit 900" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS899 ,IRQS Status Bit 899" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS898 ,IRQS Status Bit 898" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS897 ,IRQS Status Bit 897" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS896 ,IRQS Status Bit 896" "Low,High"
|
|
else
|
|
hgroup.long 0x0D74++0x03
|
|
hide.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1E)
|
|
rgroup.long 0x0D78++0x03
|
|
line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29"
|
|
bitfld.long 0x00 31. " IRQS959 ,IRQS Status Bit 959" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS958 ,IRQS Status Bit 958" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS957 ,IRQS Status Bit 957" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS956 ,IRQS Status Bit 956" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS955 ,IRQS Status Bit 955" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS954 ,IRQS Status Bit 954" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS953 ,IRQS Status Bit 953" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS952 ,IRQS Status Bit 952" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS951 ,IRQS Status Bit 951" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS950 ,IRQS Status Bit 950" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS949 ,IRQS Status Bit 949" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS948 ,IRQS Status Bit 948" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS947 ,IRQS Status Bit 947" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS946 ,IRQS Status Bit 946" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS945 ,IRQS Status Bit 945" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS944 ,IRQS Status Bit 944" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS943 ,IRQS Status Bit 943" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS942 ,IRQS Status Bit 942" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS941 ,IRQS Status Bit 941" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS940 ,IRQS Status Bit 940" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS939 ,IRQS Status Bit 939" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS938 ,IRQS Status Bit 938" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS937 ,IRQS Status Bit 937" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS936 ,IRQS Status Bit 936" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS935 ,IRQS Status Bit 935" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS934 ,IRQS Status Bit 934" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS933 ,IRQS Status Bit 933" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS932 ,IRQS Status Bit 932" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS931 ,IRQS Status Bit 931" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS930 ,IRQS Status Bit 930" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS929 ,IRQS Status Bit 929" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS928 ,IRQS Status Bit 928" "Low,High"
|
|
else
|
|
hgroup.long 0x0D78++0x03
|
|
hide.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0xE8201000+0x04))&0x0000001F)>=0x1F)
|
|
rgroup.long 0x0D7C++0x03
|
|
line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30"
|
|
bitfld.long 0x00 27. " IRQS987 ,IRQS Status Bit 987" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS986 ,IRQS Status Bit 986" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS985 ,IRQS Status Bit 985" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS984 ,IRQS Status Bit 984" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS983 ,IRQS Status Bit 983" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS982 ,IRQS Status Bit 982" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS981 ,IRQS Status Bit 981" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS980 ,IRQS Status Bit 980" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS979 ,IRQS Status Bit 979" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS978 ,IRQS Status Bit 978" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS977 ,IRQS Status Bit 977" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS976 ,IRQS Status Bit 976" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS975 ,IRQS Status Bit 975" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS974 ,IRQS Status Bit 974" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS973 ,IRQS Status Bit 973" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS972 ,IRQS Status Bit 972" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS971 ,IRQS Status Bit 971" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS970 ,IRQS Status Bit 970" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS969 ,IRQS Status Bit 969" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS968 ,IRQS Status Bit 968" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS967 ,IRQS Status Bit 967" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS966 ,IRQS Status Bit 966" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS965 ,IRQS Status Bit 965" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS964 ,IRQS Status Bit 964" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS963 ,IRQS Status Bit 963" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS962 ,IRQS Status Bit 962" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS961 ,IRQS Status Bit 961" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS960 ,IRQS Status Bit 960" "Low,High"
|
|
else
|
|
hgroup.long 0x0D7C++0x03
|
|
hide.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 25.
|
|
tree "Software Generated Interrupt"
|
|
if (((d.l(AD:0xE8201000+0x04))&0x400)==0x400)
|
|
wgroup.long 0x0F00++0x03
|
|
line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
|
|
bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..."
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List"
|
|
textline " "
|
|
bitfld.long 0x00 15. " NSATT ,NSATT" "Secure,Non-secure"
|
|
bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
wgroup.long 0x0F00++0x03
|
|
line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
|
|
bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..."
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
tree.end
|
|
width 12.
|
|
tree "Peripheral/Component ID Registers"
|
|
rgroup.byte 0x0FE0++0x00
|
|
line.byte 0x00 "GICD_PIDR0,Peripheral ID0 Register"
|
|
hexmask.byte 0x00 0.--7. 1. " PART_NUMBER_0 ,Returns 0x90"
|
|
rgroup.byte 0x0FE4++0x00
|
|
line.byte 0x00 "GICD_PIDR1,Peripheral ID1 Register"
|
|
bitfld.byte 0x00 4.--7. " JEP106_ID_3_0 ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " PART_NUMBER_1 ,Returns 0x3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0x0FE8++0x00
|
|
line.byte 0x00 "GICD_PIDR2,Peripheral ID2 Register"
|
|
bitfld.byte 0x00 4.--7. " ARCHITECTURE ,Identifies the architecture version of the GIC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 3. " JEDEC_USED ,This indicates that the GIC uses a manufacturers identity code that was allocated by JEDEC according to JEP106" "Low,High"
|
|
bitfld.byte 0x00 0.--2. " JEP106_ID_CODE ,JEP106 identity code field" "0,1,2,3,4,5,6,7"
|
|
rgroup.byte 0x0FEC++0x00
|
|
line.byte 0x00 "GICD_PIDR3,Peripheral ID3 Register"
|
|
bitfld.byte 0x00 4.--7. " REVAND ,The top-level RTL provides four AND gates that are tied-off to provide an output value of 0x0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " MOD_NUMBER ,The customer can update this field if they modify the RTL of the GIC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0x0FD0++0x00
|
|
line.byte 0x00 "GICD_PIDR4,Peripheral ID4 Register"
|
|
bitfld.byte 0x00 4.--7. " 4KB_COUNT ,The number of 4KB address blocks you require to access the registers expressed in powers of 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " JEP106_C_CODE ,The JEP106 continuation code value represents how many 0x7F continuation characters occur in the manufacturers identity code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0x0FD4++0x00
|
|
line.byte 0x00 "GICD_PIDR5,Peripheral ID5 Register"
|
|
bitfld.byte 0x00 5.--7. " PPI_NUMBER_0 ,The LSBs of the number of PPIs that the GIC provides" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--4. " SGI_NUMBER ,The number of SGIs that the GIC provides" "None,INTID0,INTID[1:0],INTID[2:0],INTID[3:0],INTID[4:0],INTID[5:0],INTID[6:0],INTID[7:0],INTID[8:0],INTID[9:0],INTID[10:0],INTID[11:0],INTID[12:0],INTID[13:0],INTID[14:0],INTID[15:0],?..."
|
|
rgroup.byte 0x0FD8++0x00
|
|
line.byte 0x00 "GICD_PIDR6,Peripheral ID6 Register"
|
|
bitfld.byte 0x00 2.--7. " SPI_NUMBER_0 ,The LSBs of the number of SPIs that the GIC provides" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.byte 0x00 0.--1. " PPI_NUMBER_1 ,The MSBs of the number of PPIs that the GIC provides" "0,1,2,3"
|
|
rgroup.byte 0x0FDC++0x00
|
|
line.byte 0x00 "GICD_PIDR7,Peripheral ID7 Register"
|
|
bitfld.byte 0x00 7. " TZ ,Identifies the number of security states that the GIC supports" "S,NS&S"
|
|
bitfld.byte 0x00 4.--6. " PRIORITY ,The number of priority levels that the GIC provides" "16,32,64,128,256,?..."
|
|
bitfld.byte 0x00 0.--3. " SPI_NUMBER_1 ,The MSBs of the number of SPIs that the GIC provides" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0x0FC0++0x00
|
|
line.byte 0x00 "GICD_PIDR8,Peripheral ID8 Register"
|
|
bitfld.byte 0x00 7. " IDENTIFIER ,Identifies the AMBA interface that this register belongs to" "Distributor,CPU Interface"
|
|
bitfld.byte 0x00 5.--6. " IF_TYPE ,Identifies the AMBA protocol that the GIC supports" "AXI,AHB-Lite,?..."
|
|
bitfld.byte 0x00 2.--4. " CPU_IF ,Identifies the number of CPU Interfaces that the GIC contains" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " FIQ_LEGACY ,Identifies if the GIC provides a legacy FIQ input signal for each CPU Interface" "Not supported,Supported"
|
|
bitfld.byte 0x00 0. " IRQ_LEGACY ,Identifies if the GIC provides a legacy IRQ input signal for each CPU Interface" "Not supported,Supported"
|
|
tree.end
|
|
tree.end
|
|
base AD:0xE8202000
|
|
width 17.
|
|
tree "CPU Interface"
|
|
if (((d.l(AD:0xE8201000+0x04))&0x400)==0x0)
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
else
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Non-secure access)"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
group.long 0x0004++0x03
|
|
line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface"
|
|
if (((d.l(AD:0xE8201000+0x04))&0x400)==0x400)
|
|
group.long 0x0008++0x03
|
|
line.long 0x00 "GICC_BPR,Binary Point Register (Non-secure access)"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
else
|
|
group.long 0x0008++0x03
|
|
line.long 0x00 "GICC_BPR,Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
endif
|
|
hgroup.long 0x000C++0x03
|
|
hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register"
|
|
in
|
|
wgroup.long 0x0010++0x03
|
|
line.long 0x00 "GICC_EOIR,End Of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access"
|
|
rgroup.long 0x0014++0x03
|
|
line.long 0x00 "GICC_RPR,Running Priority Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the CPU interface"
|
|
rgroup.long 0x0018++0x03
|
|
line.long 0x00 "GICC_HPIR,Highest Priority Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt"
|
|
if (((d.l(AD:0xE8201000+0x04))&0x400)==0x400)
|
|
group.long 0x001C++0x03
|
|
line.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
else
|
|
hgroup.long 0x001C++0x03
|
|
hide.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
|
|
endif
|
|
rgroup.long 0x00FC++0x03
|
|
line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register"
|
|
hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID"
|
|
bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv1,GICv2,GICv2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "LSI Internal Bus"
|
|
base ad:0xFCFE1A00
|
|
width 13.
|
|
group.long 0x00++0x3F
|
|
line.long 0x00 "PMPR,Remap Register"
|
|
bitfld.long 0x00 1. " AXI128 ,AXI128 Address Remapping" "Enabled,Disabled"
|
|
line.long 0x04 "AXIBUSCTL0,AXI Bus Control Register 0"
|
|
bitfld.long 0x04 24.--27. " JCUARCACHE ,ARCACHE[3:0] Signals for JPEG Codec Unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " JCUAWCACHE ,AWCACHE[3:0] Signals for JPEG Codec Unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--11. " ETHARCACHE ,ARCACHE[3:0] Signals for Ethernet Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " ETHAWCACHE ,AWCACHE[3:0] Signals for Ethernet Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "AXIBUSCTL1,AXI Bus Control Register 1"
|
|
bitfld.long 0x08 24.--27. " IMR20ARCACHE ,ARCACHE[3:0] Signals for Image Renderer (IMR-LS2) Channel 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 16.--19. " IMR20AWCACHE ,AWCACHE[3:0] Signals for Image Renderer (IMR-LS2) Channel 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 8.--11. " IMR21ARCACHE ,ARCACHE[3:0] Signals for Image Renderer (IMR-LS2) Channel 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x08 0.--3. " IMR21AWCACHE ,AWCACHE[3:0] Signals for Image Renderer (IMR-LS2) Channel 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "AXIBUSCTL2,AXI Bus Control Register 2"
|
|
bitfld.long 0x0C 24.--27. " IMRDARCACHE ,ARCACHE[3:0] Signals for Image Renderer for Display (IMR-LSD)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 16.--19. " IMRDAWCACHE ,AWCACHE[3:0] Signals for Image Renderer for Display (IMR-LSD)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 0.--3. " CEUAWCACHE ,AWCACHE[3:0] Signals for Capture Engine Unit 2S" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "AXIBUSCTL3,AXI Bus Control Register 3"
|
|
bitfld.long 0x10 24.--27. " RGP640ARCACHE ,ARCACHE[3:0] Signals for OpenVG-Compliant Renesas Graphics Processor AXI640 Bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 8.--11. " RGP641ARCACHE ,ARCACHE[3:0] Signals for OpenVG-Compliant Renesas Graphics Processor AXI641 Bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 0.--3. " RGP641AWCACHE ,AWCACHE[3:0] Signals for OpenVG-Compliant Renesas Graphics Processor AXI641 Bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x14 "AXIBUSCTL4,AXI Bus Control Register 4"
|
|
bitfld.long 0x14 24.--27. " RGP642ARCACHE ,ARCACHE[3:0] Signals for OpenVG-Compliant Renesas Graphics Processor AXI642 Bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x14 16.--19. " RGP642AWCACHE ,AWCACHE[3:0] Signals for OpenVG-Compliant Renesas Graphics Processor AXI642 Bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x14 8.--11. " RGP1280ARCACHE ,ARCACHE[3:0] Signals for OpenVG-Compliant Renesas Graphics Processor AXI1280 Bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x18 "AXIBUSCTL5,AXI Bus Control Register 5"
|
|
bitfld.long 0x18 24.--27. " RGP1281ARCACHE ,ARCACHE[3:0] Signals for OpenVG-Compliant Renesas Graphics Processor AXI1281 Bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x18 16.--19. " RGP1281AWCACHE ,AWCACHE[3:0] Signals for OpenVG-Compliant Renesas Graphics Processor AXI1281 Bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x18 1. " MLBAXCACHE[1] ,AWCACHE[3:0] and ARCACHE[3:0] Signals for Media Local Bus Bit 1" "0,1"
|
|
textline " "
|
|
bitfld.long 0x18 0. " MLBAXCACHE[0] ,AWCACHE[3:0] and ARCACHE[3:0] Signals for Media Local Bus Bit 0" "0,1"
|
|
line.long 0x1C "AXIBUSCTL6,AXI Bus Control Register 6"
|
|
bitfld.long 0x1C 24.--27. " VDC501ARCACHE ,ARCACHE[3:0] Signals for Video Display Controller 5 Channel 0 IV3-BUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x1C 16.--19. " VDC501AWCACHE ,AWCACHE[3:0] Signals for Video Display Controller 5 Channel 0 IV1-BUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x1C 8.--11. " VDC502ARCACHE ,ARCACHE[3:0] Signals for Video Display Controller 5 Channel 0 IV5-BUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x20 "AXIBUSCTL7,AXI Bus Control Register 7"
|
|
bitfld.long 0x20 24.--27. " VDC503ARCACHE ,ARCACHE[3:0] Signals for Video Display Controller 5 Channel 0 IV4-BUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x20 16.--19. " VDC503AWCACHE ,AWCACHE[3:0] Signals for Video Display Controller 5 Channel 0 IV2-BUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x20 8.--11. " VDC504ARCACHE ,ARCACHE[3:0] Signals for Video Display Controller 5 Channel 0 IV6-BUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x24 "AXIBUSCTL8,AXI Bus Control Register 8"
|
|
bitfld.long 0x24 24.--27. " VDC505ARCACHE ,ARCACHE[3:0] Signals for Video Display Controller 5 Channel 0 IV8-BUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x24 16.--19. " VDC505AWCACHE ,AWCACHE[3:0] Signals for Video Display Controller 5 Channel 0 IV7-BUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x24 8.--11. " VDC511ARCACHE ,ARCACHE[3:0] Signals for Video Display Controller 5 Channel 1 IV3-BUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x24 0.--3. " VDC511AWCACHE ,AWCACHE[3:0] Signals for Video Display Controller 5 Channel 1 IV1-BUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x28 "AXIBUSCTL9,AXI Bus Control Register 9"
|
|
bitfld.long 0x28 24.--27. " VDC512ARCACHE ,ARCACHE[3:0] Signals for Video Display Controller 5 Channel 1 IV5-BUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x28 8.--11. " VDC513ARCACHE ,ARCACHE[3:0] Signals for Video Display Controller 5 Channel 1 IV4-BUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x28 0.--3. " VDC513AWCACHE ,AWCACHE[3:0] Signals for Video Display Controller 5 Channel 1 IV2-BUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x2C "AXIBUSCTL10,AXI Bus Control Register 10"
|
|
bitfld.long 0x2C 24.--27. " VDC514ARCACHE ,ARCACHE[3:0] Signals for Video Display Controller 5 Channel 1 IV6-BUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x2C 8.--11. " VDC515ARCACHE ,ARCACHE[3:0] Signals for Video Display Controller 5 Channel 1 IV8-BUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x2C 0.--3. " VDC515AWCACHE ,AWCACHE[3:0] Signals for Video Display Controller 5 Channel 1 IV7-BUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x30 "AXIRERRCTL0,AXI Bus Response Error Interrupt Control Register 0"
|
|
bitfld.long 0x30 28. " JCURERREN ,Response Error Interrupt Enable for JPEG Codec Unit" "Disabled,Enabled"
|
|
bitfld.long 0x30 24. " ETHRERREN ,Response Error Interrupt Enable for Ethernet Controller" "Disabled,Enabled"
|
|
bitfld.long 0x30 20. " IMR20RERREN ,Response Error Interrupt Enable for Image Renderer (IMR-LS2) Channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 16. " IMR21RERREN ,Response Error Interrupt Enable for Image Renderer (IMR-LS2) Channel 1" "Disabled,Enabled"
|
|
bitfld.long 0x30 12. " IMRDRERREN ,Response Error Interrupt Enable for Image Renderer for Display (IMR-LSD)" "Disabled,Enabled"
|
|
bitfld.long 0x30 8. " CEURERREN ,Response Error Interrupt Enable for Capture Engine Unit 2S" "Disabled,Enabled"
|
|
line.long 0x34 "AXIRERRCTL1,AXI Bus Response Error Interrupt Control Register 1"
|
|
bitfld.long 0x34 28. " RGP640RERREN ,Response Error Interrupt Enable for OpenVG-Compliant Renesas Graphics Processor AXI640 Bus" "Disabled,Enabled"
|
|
bitfld.long 0x34 24. " RGP641RERREN ,Response Error Interrupt Enable for OpenVG-Compliant Renesas Graphics Processor AXI641 Bus" "Disabled,Enabled"
|
|
bitfld.long 0x34 20. " RGP642RERREN ,Response Error Interrupt Enable for OpenVG-Compliant Renesas Graphics Processor AXI642 Bus" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 16. " RGP1280RERREN ,Response Error Interrupt Enable for OpenVG-Compliant Renesas Graphics Processor AXI1280 Bus" "Disabled,Enabled"
|
|
bitfld.long 0x34 12. " RGP1281RERREN ,Response Error Interrupt Enable for OpenVG-Compliant Renesas Graphics Processor AXI1281 Bus" "Disabled,Enabled"
|
|
line.long 0x38 "AXIRERRCTL2,AXI Bus Response Error Interrupt Control Register 2"
|
|
bitfld.long 0x38 28. " VDC501RERREN ,Response Error Interrupt Enable for Video Display Controller 5 Channel 0 IV1/3-BUS" "Disabled,Enabled"
|
|
bitfld.long 0x38 24. " VDC502RERREN ,Response Error Interrupt Enable for Video Display Controller 5 Channel 0 IV5-BUS" "Disabled,Enabled"
|
|
bitfld.long 0x38 20. " VDC503RERREN ,Response Error Interrupt Enable for Video Display Controller 5 Channel 0 IV2/4-BUS" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 16. " VDC504RERREN ,Response Error Interrupt Enable for Video Display Controller 5 Channel 0 IV6-BUS" "Disabled,Enabled"
|
|
bitfld.long 0x38 12. " VDC505RERREN ,Response Error Interrupt Enable for Video Display Controller 5 Channel 0 IV7/8-BUS" "Disabled,Enabled"
|
|
line.long 0x3C "AXIRERRCTL3,AXI Bus Response Error Interrupt Control Register 3"
|
|
bitfld.long 0x3C 28. " VDC511RERREN ,Response Error Interrupt Enable for Video Display Controller 5 Channel 1 IV1/3-BUS" "Disabled,Enabled"
|
|
bitfld.long 0x3C 24. " VDC512RERREN ,Response Error Interrupt Enable for Video Display Controller 5 Channel 1 IV5-BUS" "Disabled,Enabled"
|
|
bitfld.long 0x3C 20. " VDC513RERREN ,Response Error Interrupt Enable for Video Display Controller 5 Channel 1 IV2/4-BUS" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 16. " VDC514RERREN ,Response Error Interrupt Enable for Video Display Controller 5 Channel 1 IV6-BUS" "Disabled,Enabled"
|
|
bitfld.long 0x3C 12. " VDC515RERREN ,Response Error Interrupt Enable for Video Display Controller 5 Channel 1 IV7/8-BUS" "Disabled,Enabled"
|
|
rgroup.long 0x40++0xF
|
|
line.long 0x00 "AXIRERRST0,AXI Bus Response Error Status Register 0"
|
|
bitfld.long 0x00 30.--31. " JCURRESP ,RRESP[1:0] Signals for JPEG Codec Unit" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x00 28.--29. " JCUBRESP ,BRESP[1:0] Signals for JPEG Codec Unit" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x00 26.--27. " ETHRRESP ,RRESP[1:0] Signals for Ethernet Controller" "OKAY,,SLVERR,DECERR"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " ETHBRESP ,BRESP[1:0] Signals for Ethernet Controller" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x00 22.--23. " IMR20RRESP ,RRESP[1:0] Signals for Image Renderer (IMR-LS2) Channel 0" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x00 20.--21. " IMR20BRESP ,BRESP[1:0] Signals for Image Renderer (IMR-LS2) Channel 0" "OKAY,,SLVERR,DECERR"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " IMR21RRESP ,RRESP[1:0] Signals for Image Renderer (IMR-LS2) Channel 1" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x00 16.--17. " IMR21BRESP ,BRESP[1:0] Signals for Image Renderer (IMR-LS2) Channel 1" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x00 14.--15. " IMRDRRESP ,RRESP[1:0] Signals for Image Renderer for Display (IMR-LSD)" "OKAY,,SLVERR,DECERR"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " IMRDBRESP ,BRESP[1:0] Signals for Image Renderer for Display (IMR-LSD)" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x00 8.--9. " CEUBRESP ,BRESP[1:0] Signals for Capture Engine Unit 2S" "OKAY,,SLVERR,DECERR"
|
|
line.long 0x04 "AXIRERRST1,AXI Bus Response Error Status Register 1"
|
|
bitfld.long 0x04 30.--31. " RGP640RRESP ,RRESP[1:0] Signals for OpenVG-Compliant Renesas Graphics Processor AXI640 Bus" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x04 26.--27. " RGP641RRESP ,RRESP[1:0] Signals for OpenVG-Compliant Renesas Graphics Processor AXI641 Bus" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x04 24.--25. " RGP641BRESP ,BRESP[1:0] Signals for OpenVG-Compliant Renesas Graphics Processor AXI641 Bus" "OKAY,,SLVERR,DECERR"
|
|
textline " "
|
|
bitfld.long 0x04 22.--23. " RGP642RRESP ,RRESP[1:0] Signals for OpenVG-Compliant Renesas Graphics Processor AXI642 Bus" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x04 20.--21. " RGP642BRESP ,BRESP[1:0] Signals for OpenVG-Compliant Renesas Graphics Processor AXI642 Bus" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x04 18.--19. " RGP1280RRESP ,RRESP[1:0] Signals for OpenVG-Compliant Renesas Graphics Processor AXI1280 Bus" "OKAY,,SLVERR,DECERR"
|
|
textline " "
|
|
bitfld.long 0x04 14.--15. " RGP1281RRESP ,RRESP[1:0] Signals for OpenVG-Compliant Renesas Graphics Processor AXI1281 Bus" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x04 12.--13. " RGP1281BRESP ,BRESP[1:0] Signals for OpenVG-Compliant Renesas Graphics Processor AXI1281 Bus" "OKAY,,SLVERR,DECERR"
|
|
line.long 0x08 "AXIRERRST2,AXI Bus Response Error Status Register 2"
|
|
bitfld.long 0x08 30.--31. " VDC501RRESP ,RRESP[1:0] Signals for Video Display Controller 5 Channel 0 IV3-BUS" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x08 28.--29. " VDC501BRESP ,BRESP[1:0] Signals for Video Display Controller 5 Channel 0 IV1-BUS" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x08 26.--27. " VDC502RRESP ,RRESP[1:0] Signals for Video Display Controller 5 Channel 0 IV5-BUS" "OKAY,,SLVERR,DECERR"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " VDC503RRESP ,RRESP[1:0] Signals for Video Display Controller 5 Channel 0 IV4-BUS" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x08 20.--21. " VDC503BRESP ,BRESP[1:0] Signals for Video Display Controller 5 Channel 0 IV2-BUS" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x08 18.--19. " VDC504RRESP ,RRESP[1:0] Signals for Video Display Controller 5 Channel 0 IV6-BUS" "OKAY,,SLVERR,DECERR"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " VDC505RRESP ,RRESP[1:0] Signals for Video Display Controller 5 Channel 0 IV8-BUS" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x08 12.--13. " VDC505BRESP ,BRESP[1:0] Signals for Video Display Controller 5 Channel 0 IV7-BUS" "OKAY,,SLVERR,DECERR"
|
|
line.long 0x0C "AXIRERRST3,AXI Bus Response Error Status Register 3"
|
|
bitfld.long 0x0C 30.--31. " VDC511RRESP ,RRESP[1:0] Signals for Video Display Controller 5 Channel 1 IV3-BUS" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x0C 28.--29. " VDC511BRESP ,BRESP[1:0] Signals for Video Display Controller 5 Channel 1 IV1-BUS" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x0C 26.--27. " VDC512RRESP ,RRESP[1:0] Signals for Video Display Controller 5 Channel 1 IV5-BUS" "OKAY,,SLVERR,DECERR"
|
|
textline " "
|
|
bitfld.long 0x0C 22.--23. " VDC513RRESP ,RRESP[1:0] Signals for Video Display Controller 5 Channel 1 IV4-BUS" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x0C 20.--21. " VDC513BRESP ,BRESP[1:0] Signals for Video Display Controller 5 Channel 1 IV2-BUS" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x0C 18.--19. " VDC514RRESP ,RRESP[1:0] Signals for Video Display Controller 5 Channel 1 IV6-BUS" "OKAY,,SLVERR,DECERR"
|
|
textline " "
|
|
bitfld.long 0x0C 14.--15. " VDC515RRESP ,RRESP[1:0] Signals for Video Display Controller 5 Channel 1 IV8-BUS" "OKAY,,SLVERR,DECERR"
|
|
bitfld.long 0x0C 12.--13. " VDC515BRESP ,BRESP[1:0] Signals for Video Display Controller 5 Channel 1 IV7-BUS" "OKAY,,SLVERR,DECERR"
|
|
group.long 0x50++0xF
|
|
line.long 0x00 "AXIRERRCLR0,AXI Bus Response Error Clear Register 0"
|
|
bitfld.long 0x00 30. " JCURRESPCLR ,JCURRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x00 28. " JCUBRESPCLR ,JCUBRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " ETHRRESPCLR ,ETHRRESP[1:0] Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ETHBRESPCLR ,ETHBRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " IMR20RRESPCLR ,IMR20RRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " IMR20BRESPCLR ,IMR20BRESP[1:0] Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " IMR21RRESPCLR ,IMR21RRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " IMR21BRESPCLR ,IMR21BRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x00 14. " IMRDRRESPCLR ,IMRDRRESP[1:0] Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 12. " IMRDBRESPCLR ,IMRDBRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " CEUBRESPCLR ,CEUBRESP[1:0] Clear" "No effect,Clear"
|
|
line.long 0x04 "AXIRERRCLR1,AXI Bus Response Error Clear Register 1"
|
|
bitfld.long 0x04 30. " RGP640RRESPCLR ,RGP640RRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x04 26. " RGP641RRESPCLR ,RGP641RRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x04 24. " RGP641BRESPCLR ,RGP641BRESP[1:0] Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 22. " RGP642RRESPCLR ,RGP642RRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x04 20. " RGP642BRESPCLR ,RGP642BRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x04 18. " RGP1280RRESPCLR ,RGP1280RRESP[1:0] Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 14. " RGP1281RRESPCLR ,RGP1281RRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x04 12. " RGP1281BRESPCLR ,RGP1281BRESP[1:0] Clear" "No effect,Clear"
|
|
line.long 0x08 "AXIRERRCLR2,AXI Bus Response Error Clear Register 2"
|
|
bitfld.long 0x08 30. " VDC501RRESPCLR ,VDC501RRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x08 28. " VDC501BRESPCLR ,VDC501BRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x08 26. " VDC502RRESPCLR ,VDC502RRESP[1:0] Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x08 22. " VDC503RRESPCLR ,VDC503RRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x08 20. " VDC503BRESPCLR ,VDC503BRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x08 18. " VDC504RRESPCLR ,VDC504RRESP[1:0] Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x08 14. " VDC505RRESPCLR ,VDC505RRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x08 12. " VDC505BRESPCLR ,VDC505BRESP[1:0] Clear" "No effect,Clear"
|
|
line.long 0x0C "AXIRERRCLR3,AXI Bus Response Error Clear Register 3"
|
|
bitfld.long 0x0C 30. " VDC511RRESPCLR ,VDC511RRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x0C 28. " VDC511BRESPCLR ,VDC511BRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x0C 26. " VDC512RRESPCLR ,VDC512RRESP[1:0] Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " VDC513RRESPCLR ,VDC513RRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x0C 20. " VDC513BRESPCLR ,VDC513BRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x0C 18. " VDC514RRESPCLR ,VDC514RRESP[1:0] Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 14. " VDC515RRESPCLR ,VDC515RRESP[1:0] Clear" "No effect,Clear"
|
|
bitfld.long 0x0C 12. " VDC515BRESPCLR ,VDC515BRESP[1:0] Clear" "No effect,Clear"
|
|
width 0xB
|
|
tree.end
|
|
tree "CPG (Clock Pulse Generator)"
|
|
base ad:0xFCFE0000
|
|
width 8.
|
|
if (((per.w(ad:0xFCFE0000+0x10))&0x4000)==0x4000)
|
|
// THIS[CKOEN2] == 1 (Low-level output)
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "FRQCR,Frequency Control Register"
|
|
bitfld.word 0x00 14. " CKOEN2 ,Clock Output Enable 2" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--13. " CKOEN ,Clock Output Enable" "Disabled,L-Level OUT,L/H-level OUT,Off"
|
|
bitfld.word 0x00 8.--9. " IFC ,CPU Clock Frequency Division Ratio" "1/1 time,2/3 time,,1/3 time"
|
|
else
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "FRQCR,Frequency Control Register"
|
|
bitfld.word 0x00 14. " CKOEN2 ,Clock Output Enable 2" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--13. " CKOEN ,Clock Output Enable" "Disabled,L-Level OUT,Output,Off"
|
|
bitfld.word 0x00 8.--9. " IFC ,CPU Clock Frequency Division Ratio" "1/1 time,2/3 time,,1/3 time"
|
|
endif
|
|
sif (cpu()!="R7S721021")
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "FRQCR2,Frequency Control Register 2"
|
|
bitfld.word 0x00 0.--1. " GFC ,Image Processing Clock Frequency Division Ratio" ",2/3 time,,1/3 time"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "Interrupt Controller"
|
|
base ad:0xFCFEF800
|
|
width 12.
|
|
group.word 0x00++0x5
|
|
line.word 0x00 "ICR0,Interrupt Control Register 0"
|
|
rbitfld.word 0x00 15. " NMIL ,NMI Input Level" "Low,High"
|
|
bitfld.word 0x00 8. " NMIE ,NMI Edge Select" "Falling,Rising"
|
|
bitfld.word 0x00 1. " NMIF ,NMI Interrupt Request" "Not occurred,Occurred"
|
|
line.word 0x02 "ICR1,Interrupt Control Register 1"
|
|
bitfld.word 0x02 14.--15. " IRQ7S ,IRQ7 Sense Select" "Low-level,Falling edge,Rising edge,Both edges"
|
|
bitfld.word 0x02 12.--13. " IRQ6S ,IRQ6 Sense Select" "Low-level,Falling edge,Rising edge,Both edges"
|
|
bitfld.word 0x02 10.--11. " IRQ5S ,IRQ5 Sense Select" "Low-level,Falling edge,Rising edge,Both edges"
|
|
textline " "
|
|
bitfld.word 0x02 8.--9. " IRQ4S ,IRQ4 Sense Select" "Low-level,Falling edge,Rising edge,Both edges"
|
|
bitfld.word 0x02 6.--7. " IRQ3S ,IRQ3 Sense Select" "Low-level,Falling edge,Rising edge,Both edges"
|
|
bitfld.word 0x02 4.--5. " IRQ2S ,IRQ2 Sense Select" "Low-level,Falling edge,Rising edge,Both edges"
|
|
textline " "
|
|
bitfld.word 0x02 2.--3. " IRQ1S ,IRQ1 Sense Select" "Low-level,Falling edge,Rising edge,Both edges"
|
|
bitfld.word 0x02 0.--1. " IRQ0S ,IRQ0 Sense Select" "Low-level,Falling edge,Rising edge,Both edges"
|
|
line.word 0x04 "IRQRR,IRQ Interrupt Request Register"
|
|
bitfld.word 0x04 7. " IRQ7F ,IRQ7 Interrupt Request" "Not occurred,Occurred"
|
|
bitfld.word 0x04 6. " IRQ6F ,IRQ6 Interrupt Request" "Not occurred,Occurred"
|
|
bitfld.word 0x04 5. " IRQ5F ,IRQ5 Interrupt Request" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x04 4. " IRQ4F ,IRQ4 Interrupt Request" "Not occurred,Occurred"
|
|
bitfld.word 0x04 3. " IRQ3F ,IRQ3 Interrupt Request" "Not occurred,Occurred"
|
|
bitfld.word 0x04 2. " IRQ2F ,IRQ2 Interrupt Request" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x04 1. " IRQ1F ,IRQ1 Interrupt Request" "Not occurred,Occurred"
|
|
bitfld.word 0x04 0. " IRQ0F ,IRQ0 Interrupt Request" "Not occurred,Occurred"
|
|
base ad:0xE8201000
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "ICDDCR,Distributor control register"
|
|
rgroup.long 0x04++0x7
|
|
line.long 0x00 "ICDICTR,Interrupt controller type register"
|
|
line.long 0x04 "ICDIIDR,Distributor implementer identification register"
|
|
textline " "
|
|
tree "Interrupt Security Registers"
|
|
group.long 0x80++0x4B
|
|
line.long 0x00 "ICDISR0,Interrupt Security Register 0"
|
|
bitfld.long 0x00 19. " ICDISR0[19] ,CTIIRQ0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x00 18. " ICDISR0[18] ,COMMTX0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x00 17. " ICDISR0[17] ,COMMRX0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ICDISR0[16] ,PMUIRQ0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x00 15. " ICDISR0[15] ,GIC software interrupts secure status 15" "Non-secure,Secure"
|
|
bitfld.long 0x00 14. " ICDISR0[14] ,GIC software interrupts secure status 14" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICDISR0[13] ,GIC software interrupts secure status 13" "Non-secure,Secure"
|
|
bitfld.long 0x00 12. " ICDISR0[12] ,GIC software interrupts secure status 12" "Non-secure,Secure"
|
|
bitfld.long 0x00 11. " ICDISR0[11] ,GIC software interrupts secure status 11" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ICDISR0[10] ,GIC software interrupts secure status 10" "Non-secure,Secure"
|
|
bitfld.long 0x00 9. " ICDISR0[9] ,GIC software interrupts secure status 9" "Non-secure,Secure"
|
|
bitfld.long 0x00 8. " ICDISR0[8] ,GIC software interrupts secure status 8" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICDISR0[7] ,GIC software interrupts secure status 7" "Non-secure,Secure"
|
|
bitfld.long 0x00 6. " ICDISR0[6] ,GIC software interrupts secure status 6" "Non-secure,Secure"
|
|
bitfld.long 0x00 5. " ICDISR0[5] ,GIC software interrupts secure status 5" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ICDISR0[4] ,GIC software interrupts secure status 4" "Non-secure,Secure"
|
|
bitfld.long 0x00 3. " ICDISR0[3] ,GIC software interrupts secure status 3" "Non-secure,Secure"
|
|
bitfld.long 0x00 2. " ICDISR0[2] ,GIC software interrupts secure status 2" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICDISR0[1] ,GIC software interrupts secure status 1" "Non-secure,Secure"
|
|
bitfld.long 0x00 0. " ICDISR0[0] ,GIC software interrupts secure status 0" "Non-secure,Secure"
|
|
line.long 0x04 "ICDISR1,Interrupt Security Register 1"
|
|
bitfld.long 0x04 25. " ICDISR1[25] ,DMAERR secure status" "Non-secure,Secure"
|
|
bitfld.long 0x04 24. " ICDISR1[24] ,DMAINT15 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x04 23. " ICDISR1[23] ,DMAINT14 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x04 22. " ICDISR1[22] ,DMAINT13 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x04 21. " ICDISR1[21] ,DMAINT12 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x04 20. " ICDISR1[20] ,DMAINT11 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ICDISR1[19] ,DMAINT10 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x04 18. " ICDISR1[18] ,DMAINT9 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x04 17. " ICDISR1[17] ,DMAINT8 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x04 16. " ICDISR1[16] ,DMAINT7 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x04 15. " ICDISR1[15] ,DMAINT6 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x04 14. " ICDISR1[14] ,DMAINT5 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ICDISR1[13] ,DMAINT4 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x04 12. " ICDISR1[12] ,DMAINT3 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x04 11. " ICDISR1[11] ,DMAINT2 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x04 10. " ICDISR1[10] ,DMAINT1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x04 9. " ICDISR1[9] ,DMAINT0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x04 8. " ICDISR1[8] ,PL310ERR secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ICDISR1[7] ,IRQ7 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x04 6. " ICDISR1[6] ,IRQ6 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x04 5. " ICDISR1[5] ,IRQ5 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x04 4. " ICDISR1[4] ,IRQ4 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x04 3. " ICDISR1[3] ,IRQ3 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x04 2. " ICDISR1[2] ,IRQ2 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ICDISR1[1] ,IRQ1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x04 0. " ICDISR1[0] ,IRQ0 secure status" "Non-secure,Secure"
|
|
line.long 0x08 "ICDISR2,Interrupt Security Register 2"
|
|
bitfld.long 0x08 31. " ICDISR2[31] ,OIR_VFIELD0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x08 30. " ICDISR2[30] ,OIR_VSYNCERR0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x08 29. " ICDISR2[29] ,OIR_LO_VSYNC0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x08 28. " ICDISR2[28] ,OIR_VI_VSYNC0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x08 27. " ICDISR2[27] ,S1_WLINE0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x08 26. " ICDISR2[26] ,IV4_VBUFERR0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ICDISR2[25] ,IV2_VBUFERR0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x08 24. " ICDISR2[24] ,S1_VFIELD0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x08 23. " ICDISR2[23] ,S1_VSYNCERR0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x08 22. " ICDISR2[22] ,S1_LO_VSYNC0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x08 21. " ICDISR2[21] ,S1_VI_VSYNC0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x08 20. " ICDISR2[20] ,S0_WLINE0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ICDISR2[19] ,IV6_VBUFERR0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x08 18. " ICDISR2[18] ,IV5_VBUFERR0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x08 17. " ICDISR2[17] ,IV3_VBUFERR0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x08 16. " ICDISR2[16] ,IV1_VBUFERR0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x08 15. " ICDISR2[15] ,S0_VFIELD0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x08 14. " ICDISR2[14] ,GR3_VLINE0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ICDISR2[13] ,S0_VSYNCERR0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x08 12. " ICDISR2[12] ,S0_LO_VSYNC0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x08 11. " ICDISR2[11] ,S0_VI_VSYNC0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x08 10. " ICDISR2[10] ,USBI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x08 9. " ICDISR2[9] ,USBI0 secure status" "Non-secure,Secure"
|
|
line.long 0x0C "ICDISR3,Interrupt Security Register 3"
|
|
bitfld.long 0x0C 31. " ICDISR3[31] ,JDTI secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 30. " ICDISR3[30] ,JEDI secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 29. " ICDISR3[29] ,IMR2I1 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " ICDISR3[28] ,IMR2I0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 27. " ICDISR3[27] ,IMRDI secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 26. " ICDISR3[26] ,OIR_WLINE1 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " ICDISR3[25] ,IV8_VBUFERR1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 24. " ICDISR3[24] ,IV7_VBUFERR1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 23. " ICDISR3[23] ,OIR_VFIELD1 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " ICDISR3[22] ,OIR_VLINE1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 21. " ICDISR3[21] ,OIR_LO_VSYNC1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 20. " ICDISR3[20] ,OIR_VI_VSYNC1 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " ICDISR3[19] ,S1_WLINE1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 18. " ICDISR3[18] ,IV4_VBUFERR1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 17. " ICDISR3[17] ,IV2_VBUFERR1 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " ICDISR3[16] ,S1_VFIELD1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 15. " ICDISR3[15] ,S1_VSYNCERR1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 14. " ICDISR3[14] ,S1_LO_VSYNC1 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " ICDISR3[13] ,S1_VI_VSYNC1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 12. " ICDISR3[12] ,S0_WLINE1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 11. " ICDISR3[11] ,IV6_VBUFERR1 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " ICDISR3[10] ,IV5_VBUFERR1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 9. " ICDISR3[9] ,IV3_VBUFERR1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 8. " ICDISR3[8] ,IV1_VBUFERR1 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " ICDISR3[7] ,S0_VFIELD1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 6. " ICDISR3[6] ,GR3_VLINE1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 5. " ICDISR3[5] ,S0_VSYNCERR1 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " ICDISR3[4] ,S0_LO_VSYNC1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 3. " ICDISR3[3] ,S0_VI_VSYNC1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 2. " ICDISR3[2] ,OIR_WLINE0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " ICDISR3[1] ,IV8_VBUFERR0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x0C 0. " ICDISR3[0] ,IV7_VBUFERR0 secure status" "Non-secure,Secure"
|
|
line.long 0x10 "ICDISR4,Interrupt Security Register 4"
|
|
bitfld.long 0x10 31. " ICDISR4[31] ,TGI4A secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 30. " ICDISR4[30] ,TGI3V secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 29. " ICDISR4[29] ,TGI3D secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x10 28. " ICDISR4[28] ,TGI3C secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 27. " ICDISR4[27] ,TGI3B secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 26. " ICDISR4[26] ,TGI3A secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ICDISR4[25] ,TGI2U secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 24. " ICDISR4[24] ,TGI2V secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 23. " ICDISR4[23] ,TGI2B secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x10 22. " ICDISR4[22] ,TGI2A secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 21. " ICDISR4[21] ,TGI1U secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 20. " ICDISR4[20] ,TGI1V secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ICDISR4[19] ,TGI1B secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 18. " ICDISR4[18] ,TGI1A secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 17. " ICDISR4[17] ,TGI0F secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x10 16. " ICDISR4[16] ,TGI0E secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 15. " ICDISR4[15] ,TGI0V secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 14. " ICDISR4[14] ,TGI0D secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ICDISR4[13] ,TGI0C secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 12. " ICDISR4[12] ,TGI0B secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 11. " ICDISR4[11] ,TGI0A secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x10 10. " ICDISR4[10] ,ITI secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 9. " ICDISR4[9] ,WTOUT secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 8. " ICDISR4[8] ,CMI secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ICDISR4[7] ,OSTM1TINT secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 6. " ICDISR4[6] ,OSTM0TINT secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 5. " ICDISR4[5] ,INT3 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x10 4. " ICDISR4[4] ,INT2 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 3. " ICDISR4[3] ,INT1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 2. " ICDISR4[2] ,INT0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ICDISR4[1] ,CMP1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x10 0. " ICDISR4[0] ,CMP0 secure status" "Non-secure,Secure"
|
|
line.long 0x14 "ICDISR5,Interrupt Security Register 5"
|
|
bitfld.long 0x14 31. " ICDISR5[31] ,INTIICTI0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 30. " ICDISR5[30] ,INTIICRI0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 29. " ICDISR5[29] ,INTIICTEI0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x14 28. " ICDISR5[28] ,SPDIFI secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 27. " ICDISR5[27] ,SSITXI5 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 26. " ICDISR5[26] ,SSIRXI5 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ICDISR5[25] ,SSII5 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 24. " ICDISR5[24] ,SSIRTI4 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 23. " ICDISR5[23] ,SSII4 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x14 22. " ICDISR5[22] ,SSITXI3 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 21. " ICDISR5[21] ,SSIRXI3 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 20. " ICDISR5[20] ,SSII3 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ICDISR5[19] ,SSIRTI2 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 18. " ICDISR5[18] ,SSII2 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 17. " ICDISR5[17] ,SSITXI1 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x14 16. " ICDISR5[16] ,SSIRXI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 15. " ICDISR5[15] ,SSII1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 14. " ICDISR5[14] ,SSITXI0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ICDISR5[13] ,SSIRXI0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 12. " ICDISR5[12] ,SSII0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 11. " ICDISR5[11] ,LMTI secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x14 10. " ICDISR5[10] ,ADI secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 9. " ICDISR5[9] ,SGDEI3 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 8. " ICDISR5[8] ,SGDEI2 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ICDISR5[7] ,SGDEI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 6. " ICDISR5[6] ,SGDEI0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 5. " ICDISR5[5] ,CMI2 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x14 4. " ICDISR5[4] ,CMI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 3. " ICDISR5[3] ,TGI4V secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 2. " ICDISR5[2] ,TGI4D secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ICDISR5[1] ,TGI4C secure status" "Non-secure,Secure"
|
|
bitfld.long 0x14 0. " ICDISR5[0] ,TGI4B secure status" "Non-secure,Secure"
|
|
line.long 0x18 "ICDISR6,Interrupt Security Register 6"
|
|
bitfld.long 0x18 31. " ICDISR6[31] ,RXI0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 30. " ICDISR6[30] ,ERI0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 29. " ICDISR6[29] ,BRI0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x18 28. " ICDISR6[28] ,INTIICTMOI3 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 27. " ICDISR6[27] ,INTIICALI3 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 26. " ICDISR6[26] ,INTIICNAKI3 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ICDISR6[25] ,INTIICSTI3 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 24. " ICDISR6[24] ,INTIICSPI3 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 23. " ICDISR6[23] ,INTIICTI3 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x18 22. " ICDISR6[22] ,INTIICRI3 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 21. " ICDISR6[21] ,INTIICTEI3 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 20. " ICDISR6[20] ,INTIICTMOI2 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ICDISR6[19] ,INTIICALI2 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 18. " ICDISR6[18] ,INTIICNAKI2 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 17. " ICDISR6[17] ,INTIICSTI2 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x18 16. " ICDISR6[16] ,INTIICSPI2 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 15. " ICDISR6[15] ,INTIICTI2 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 14. " ICDISR6[14] ,INTIICRI2 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ICDISR6[13] ,INTIICTEI2 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 12. " ICDISR6[12] ,INTIICTMOI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 11. " ICDISR6[11] ,INTIICALI1 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x18 10. " ICDISR6[10] ,INTIICNAKI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 9. " ICDISR6[9] ,INTIICSTI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 8. " ICDISR6[8] ,INTIICSPI1 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ICDISR6[7] ,INTIICTI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 6. " ICDISR6[6] ,INTIICRI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 5. " ICDISR6[5] ,INTIICTEI1 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x18 4. " ICDISR6[4] ,INTIICTMOI0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 3. " ICDISR6[3] ,INTIICALI0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 2. " ICDISR6[2] ,INTIICNAKI0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ICDISR6[1] ,INTIICSTI0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x18 0. " ICDISR6[0] ,INTIICSPI0 secure status" "Non-secure,Secure"
|
|
line.long 0x1C "ICDISR7,Interrupt Security Register 7"
|
|
bitfld.long 0x1C 31. " ICDISR7[31] ,INTRCAN0REC secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 30. " ICDISR7[30] ,INTRCANGRECC secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 29. " ICDISR7[29] ,INTRCANGERR secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x1C 28. " ICDISR7[28] ,TXI7 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 27. " ICDISR7[27] ,RXI7 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 26. " ICDISR7[26] ,ERI7 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x1C 25. " ICDISR7[25] ,BRI7 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 24. " ICDISR7[24] ,TXI6 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 23. " ICDISR7[23] ,RXI6 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x1C 22. " ICDISR7[22] ,ERI6 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 21. " ICDISR7[21] ,BRI6 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 20. " ICDISR7[20] ,TXI5 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x1C 19. " ICDISR7[19] ,RXI5 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 18. " ICDISR7[18] ,ERI5 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 17. " ICDISR7[17] ,BRI5 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x1C 16. " ICDISR7[16] ,TXI4 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 15. " ICDISR7[15] ,RXI4 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 14. " ICDISR7[14] ,ERI4 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x1C 13. " ICDISR7[13] ,BRI4 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 12. " ICDISR7[12] ,TXI3 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 11. " ICDISR7[11] ,RXI3 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x1C 10. " ICDISR7[10] ,ERI3 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 9. " ICDISR7[9] ,BRI3 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 8. " ICDISR7[8] ,TXI2 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " ICDISR7[7] ,RXI2 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 6. " ICDISR7[6] ,ERI2 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 5. " ICDISR7[5] ,BRI2 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x1C 4. " ICDISR7[4] ,TXI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 3. " ICDISR7[3] ,RXI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 2. " ICDISR7[2] ,ERI1 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x1C 1. " ICDISR7[1] ,BRI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x1C 0. " ICDISR7[0] ,TXI0 secure status" "Non-secure,Secure"
|
|
line.long 0x20 "ICDISR8,Interrupt Security Register 8"
|
|
bitfld.long 0x20 31. " ICDISR8[31] ,IEBBTSTA secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 30. " ICDISR8[30] ,IEBBTERR secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 29. " ICDISR8[29] ,IEBBTD secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x20 28. " ICDISR8[28] ,SPTI4 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 27. " ICDISR8[27] ,SPRI4 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 26. " ICDISR8[26] ,SPEI4 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x20 25. " ICDISR8[25] ,SPTI3 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 24. " ICDISR8[24] ,SPRI3 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 23. " ICDISR8[23] ,SPEI3 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x20 22. " ICDISR8[22] ,SPTI2 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 21. " ICDISR8[21] ,SPRI2 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 20. " ICDISR8[20] ,SPEI2 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x20 19. " ICDISR8[19] ,SPTI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 18. " ICDISR8[18] ,SPRI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 17. " ICDISR8[17] ,SPEI1 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x20 16. " ICDISR8[16] ,SPTI0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 15. " ICDISR8[15] ,SPRI0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 14. " ICDISR8[14] ,SPEI0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x20 13. " ICDISR8[13] ,INTRCAN4TRX secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 12. " ICDISR8[12] ,INTRCAN4ERR secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 11. " ICDISR8[11] ,INTRCAN4REC secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x20 10. " ICDISR8[10] ,INTRCAN3TRX secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 9. " ICDISR8[9] ,INTRCAN3ERR secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 8. " ICDISR8[8] ,INTRCAN3REC secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x20 7. " ICDISR8[7] ,INTRCAN2TRX secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 6. " ICDISR8[6] ,INTRCAN2ERR secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 5. " ICDISR8[5] ,INTRCAN2REC secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x20 4. " ICDISR8[4] ,INTRCAN1TRX secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 3. " ICDISR8[3] ,INTRCAN1ERR secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 2. " ICDISR8[2] ,INTRCAN1REC secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x20 1. " ICDISR8[1] ,INTRCAN0TRX secure status" "Non-secure,Secure"
|
|
bitfld.long 0x20 0. " ICDISR8[0] ,INTRCAN0ERR secure status" "Non-secure,Secure"
|
|
line.long 0x24 "ICDISR9,Interrupt Security Register 9"
|
|
bitfld.long 0x24 31. " ICDISR9[31] ,SCUFUI2 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 30. " ICDISR9[30] ,SCUFUI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 29. " ICDISR9[29] ,SCUFUI0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x24 28. " ICDISR9[28] ,SCUFDI3 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 27. " ICDISR9[27] ,SCUFDI2 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 26. " ICDISR9[26] ,SCUFDI1 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x24 25. " ICDISR9[25] ,SCUFDI0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 24. " ICDISR9[24] ,SCUAI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 23. " ICDISR9[23] ,SCUAI0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x24 22. " ICDISR9[22] ,CUP secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 21. " ICDISR9[21] ,PRD secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 20. " ICDISR9[20] ,ARM secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x24 19. " ICDISR9[19] ,SDHI1_1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 18. " ICDISR9[18] ,SDHI1_0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 17. " ICDISR9[17] ,SDHI1_3 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x24 16. " ICDISR9[16] ,SDHI0_1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 15. " ICDISR9[15] ,SDHI0_0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 14. " ICDISR9[14] ,SDHI0_3 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x24 13. " ICDISR9[13] ,MMC2 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 12. " ICDISR9[12] ,MMC1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 11. " ICDISR9[11] ,MMC0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x24 10. " ICDISR9[10] ,FLTREQ1I secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 9. " ICDISR9[9] ,FLTREQ0I secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 8. " ICDISR9[8] ,FLTENDI secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x24 7. " ICDISR9[7] ,STERB/BTOERB secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 6. " ICDISR9[6] ,IREADY secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 5. " ICDISR9[5] ,IBUF secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x24 4. " ICDISR9[4] ,ISEC secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 3. " ICDISR9[3] ,ITARG secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 2. " ICDISR9[2] ,IERR secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x24 1. " ICDISR9[1] ,ISY secure status" "Non-secure,Secure"
|
|
bitfld.long 0x24 0. " ICDISR9[0] ,IEBBTV secure status" "Non-secure,Secure"
|
|
line.long 0x28 "ICDISR10,Interrupt Security Register 10"
|
|
bitfld.long 0x28 31. " ICDISR10[31] ,ERI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x28 30. " ICDISR10[30] ,TEI0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x28 29. " ICDISR10[29] ,TXI0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x28 28. " ICDISR10[28] ,RXI0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x28 27. " ICDISR10[27] ,ERI0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x28 18. " ICDISR10[18] ,LINI1_INT_M secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x28 17. " ICDISR10[17] ,LINI1_INT_S secure status" "Non-secure,Secure"
|
|
bitfld.long 0x28 16. " ICDISR10[16] ,LINI1_INT_R secure status" "Non-secure,Secure"
|
|
bitfld.long 0x28 15. " ICDISR10[15] ,LINI1_INT_T secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x28 14. " ICDISR10[14] ,LINI0_INT_M secure status" "Non-secure,Secure"
|
|
bitfld.long 0x28 13. " ICDISR10[13] ,LINI0_INT_S secure status" "Non-secure,Secure"
|
|
bitfld.long 0x28 12. " ICDISR10[12] ,LINI0_INT_R secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x28 11. " ICDISR10[11] ,LINI0_INT_T secure status" "Non-secure,Secure"
|
|
bitfld.long 0x28 8. " ICDISR10[8] ,DRC1 Channel 1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x28 7. " ICDISR10[7] ,DRC1 Channel 0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x28 6. " ICDISR10[6] ,MLB_SINT secure status" "Non-secure,Secure"
|
|
bitfld.long 0x28 5. " ICDISR10[5] ,MLB_CINT secure status" "Non-secure,Secure"
|
|
bitfld.long 0x28 4. " ICDISR10[4] ,SCUDVI3 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x28 3. " ICDISR10[3] ,SCUDVI2 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x28 2. " ICDISR10[2] ,SCUDVI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x28 1. " ICDISR10[1] ,SCUDVI0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x28 0. " ICDISR10[0] ,SCUFUI3 secure status" "Non-secure,Secure"
|
|
line.long 0x2C "ICDISR11,Interrupt Security Register 11"
|
|
bitfld.long 0x2C 31. " ICDISR11[31] ,X2HPERI1_ERRINT secure status" "Non-secure,Secure"
|
|
bitfld.long 0x2C 30. " ICDISR11[30] ,H2XIC1_ERRINT secure status" "Non-secure,Secure"
|
|
bitfld.long 0x2C 29. " ICDISR11[29] ,H2XMLB_ERRINT secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x2C 12. " ICDISR11[12] ,CEUI secure status" "Non-secure,Secure"
|
|
bitfld.long 0x2C 7. " ICDISR11[7] ,ETHERI secure status" "Non-secure,Secure"
|
|
bitfld.long 0x2C 6. " ICDISR11[6] ,AVBI_MAC secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x2C 5. " ICDISR11[5] ,AVBI_MANAGE secure status" "Non-secure,Secure"
|
|
bitfld.long 0x2C 4. " ICDISR11[4] ,AVBI_ERROR secure status" "Non-secure,Secure"
|
|
bitfld.long 0x2C 3. " ICDISR11[3] ,AVBI_DATA secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x2C 2. " ICDISR11[2] ,TEI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x2C 1. " ICDISR11[1] ,TXI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x2C 0. " ICDISR11[0] ,RXI1 secure status" "Non-secure,Secure"
|
|
line.long 0x30 "ICDISR12,Interrupt Security Register 12"
|
|
bitfld.long 0x30 14. " ICDISR12[14] ,PFVEI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x30 13. " ICDISR12[13] ,OFFI1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x30 12. " ICDISR12[12] ,IFEI1 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x30 11. " ICDISR12[11] ,PFVEI0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x30 10. " ICDISR12[10] ,OFFI0 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x30 9. " ICDISR12[9] ,IFEI0 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x30 8. " ICDISR12[8] ,PRRI secure status" "Non-secure,Secure"
|
|
bitfld.long 0x30 7. " ICDISR12[7] ,X2HSPI2_ERRINT secure status" "Non-secure,Secure"
|
|
bitfld.long 0x30 6. " ICDISR12[6] ,X2HSPI1_ERRINT secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x30 5. " ICDISR12[5] ,X2HBSC_ERRINT secure status" "Non-secure,Secure"
|
|
bitfld.long 0x30 4. " ICDISR12[4] ,X2HDBGR_ERRINT secure status" "Non-secure,Secure"
|
|
bitfld.long 0x30 3. " ICDISR12[3] ,X2HPERI67_ERRINT secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x30 2. " ICDISR12[2] ,X2HPERI5_ERRINT secure status" "Non-secure,Secure"
|
|
bitfld.long 0x30 1. " ICDISR12[1] ,X2HPERI34_ERRINT secure status" "Non-secure,Secure"
|
|
bitfld.long 0x30 0. " ICDISR12[0] ,X2HPERI2_ERRINT secure status" "Non-secure,Secure"
|
|
line.long 0x34 "ICDISR13,Interrupt Security Register 13"
|
|
bitfld.long 0x34 31. " ICDISR13[31] ,TINT31 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 30. " ICDISR13[30] ,TINT30 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 29. " ICDISR13[29] ,TINT29 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x34 28. " ICDISR13[28] ,TINT28 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 27. " ICDISR13[27] ,TINT27 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 26. " ICDISR13[26] ,TINT26 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x34 25. " ICDISR13[25] ,TINT25 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 24. " ICDISR13[24] ,TINT24 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 23. " ICDISR13[23] ,TINT23 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x34 22. " ICDISR13[22] ,TINT22 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 21. " ICDISR13[21] ,TINT21 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 20. " ICDISR13[20] ,TINT20 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x34 19. " ICDISR13[19] ,TINT19 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 18. " ICDISR13[18] ,TINT18 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 17. " ICDISR13[17] ,TINT17 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x34 16. " ICDISR13[16] ,TINT16 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 15. " ICDISR13[15] ,TINT15 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 14. " ICDISR13[14] ,TINT14 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x34 13. " ICDISR13[13] ,TINT13 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 12. " ICDISR13[12] ,TINT12 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 11. " ICDISR13[11] ,TINT11 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x34 10. " ICDISR13[10] ,TINT10 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 9. " ICDISR13[9] ,TINT9 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 8. " ICDISR13[8] ,TINT8 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x34 7. " ICDISR13[7] ,TINT7 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 6. " ICDISR13[6] ,TINT6 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 5. " ICDISR13[5] ,TINT5 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x34 4. " ICDISR13[4] ,TINT4 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 3. " ICDISR13[3] ,TINT3 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 2. " ICDISR13[2] ,TINT2 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x34 1. " ICDISR13[1] ,TINT1 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x34 0. " ICDISR13[0] ,TINT0 secure status" "Non-secure,Secure"
|
|
line.long 0x38 "ICDISR14,Interrupt Security Register 14"
|
|
bitfld.long 0x38 31. " ICDISR14[31] ,TINT63 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 30. " ICDISR14[30] ,TINT62 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 29. " ICDISR14[29] ,TINT61 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x38 28. " ICDISR14[28] ,TINT60 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 27. " ICDISR14[27] ,TINT59 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 26. " ICDISR14[26] ,TINT58 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x38 25. " ICDISR14[25] ,TINT57 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 24. " ICDISR14[24] ,TINT56 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 23. " ICDISR14[23] ,TINT55 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x38 22. " ICDISR14[22] ,TINT54 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 21. " ICDISR14[21] ,TINT53 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 20. " ICDISR14[20] ,TINT52 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x38 19. " ICDISR14[19] ,TINT51 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 18. " ICDISR14[18] ,TINT50 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 17. " ICDISR14[17] ,TINT49 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x38 16. " ICDISR14[16] ,TINT48 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 15. " ICDISR14[15] ,TINT47 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 14. " ICDISR14[14] ,TINT46 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x38 13. " ICDISR14[13] ,TINT45 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 12. " ICDISR14[12] ,TINT44 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 11. " ICDISR14[11] ,TINT43 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x38 10. " ICDISR14[10] ,TINT42 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 9. " ICDISR14[9] ,TINT41 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 8. " ICDISR14[8] ,TINT40 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x38 7. " ICDISR14[7] ,TINT39 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 6. " ICDISR14[6] ,TINT38 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 5. " ICDISR14[5] ,TINT37 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x38 4. " ICDISR14[4] ,TINT36 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 3. " ICDISR14[3] ,TINT35 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 2. " ICDISR14[2] ,TINT34 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x38 1. " ICDISR14[1] ,TINT33 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x38 0. " ICDISR14[0] ,TINT32 secure status" "Non-secure,Secure"
|
|
line.long 0x3C "ICDISR15,Interrupt Security Register 15"
|
|
bitfld.long 0x3C 31. " ICDISR15[31] ,TINT95 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 30. " ICDISR15[30] ,TINT94 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 29. " ICDISR15[29] ,TINT93 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x3C 28. " ICDISR15[28] ,TINT92 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 27. " ICDISR15[27] ,TINT91 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 26. " ICDISR15[26] ,TINT90 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x3C 25. " ICDISR15[25] ,TINT89 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 24. " ICDISR15[24] ,TINT88 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 23. " ICDISR15[23] ,TINT87 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x3C 22. " ICDISR15[22] ,TINT86 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 21. " ICDISR15[21] ,TINT85 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 20. " ICDISR15[20] ,TINT84 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x3C 19. " ICDISR15[19] ,TINT83 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 18. " ICDISR15[18] ,TINT82 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 17. " ICDISR15[17] ,TINT81 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x3C 16. " ICDISR15[16] ,TINT80 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 15. " ICDISR15[15] ,TINT79 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 14. " ICDISR15[14] ,TINT78 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x3C 13. " ICDISR15[13] ,TINT77 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 12. " ICDISR15[12] ,TINT76 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 11. " ICDISR15[11] ,TINT75 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x3C 10. " ICDISR15[10] ,TINT74 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 9. " ICDISR15[9] ,TINT73 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 8. " ICDISR15[8] ,TINT72 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x3C 7. " ICDISR15[7] ,TINT71 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 6. " ICDISR15[6] ,TINT70 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 5. " ICDISR15[5] ,TINT69 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x3C 4. " ICDISR15[4] ,TINT68 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 3. " ICDISR15[3] ,TINT67 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 2. " ICDISR15[2] ,TINT66 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x3C 1. " ICDISR15[1] ,TINT65 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x3C 0. " ICDISR15[0] ,TINT64 secure status" "Non-secure,Secure"
|
|
line.long 0x40 "ICDISR16,Interrupt Security Register 16"
|
|
bitfld.long 0x40 31. " ICDISR16[31] ,TINT127 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 30. " ICDISR16[30] ,TINT126 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 29. " ICDISR16[29] ,TINT125 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x40 28. " ICDISR16[28] ,TINT124 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 27. " ICDISR16[27] ,TINT123 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 26. " ICDISR16[26] ,TINT122 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x40 25. " ICDISR16[25] ,TINT121 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 24. " ICDISR16[24] ,TINT120 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 23. " ICDISR16[23] ,TINT119 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x40 22. " ICDISR16[22] ,TINT118 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 21. " ICDISR16[21] ,TINT117 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 20. " ICDISR16[20] ,TINT116 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x40 19. " ICDISR16[19] ,TINT115 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 18. " ICDISR16[18] ,TINT114 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 17. " ICDISR16[17] ,TINT113 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x40 16. " ICDISR16[16] ,TINT112 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 15. " ICDISR16[15] ,TINT111 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 14. " ICDISR16[14] ,TINT110 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x40 13. " ICDISR16[13] ,TINT109 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 12. " ICDISR16[12] ,TINT108 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 11. " ICDISR16[11] ,TINT107 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x40 10. " ICDISR16[10] ,TINT106 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 9. " ICDISR16[9] ,TINT105 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 8. " ICDISR16[8] ,TINT104 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x40 7. " ICDISR16[7] ,TINT103 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 6. " ICDISR16[6] ,TINT102 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 5. " ICDISR16[5] ,TINT101 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x40 4. " ICDISR16[4] ,TINT100 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 3. " ICDISR16[3] ,TINT99 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 2. " ICDISR16[2] ,TINT98 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x40 1. " ICDISR16[1] ,TINT97 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x40 0. " ICDISR16[0] ,TINT96 secure status" "Non-secure,Secure"
|
|
line.long 0x44 "ICDISR17,Interrupt Security Register 17"
|
|
bitfld.long 0x44 31. " ICDISR17[31] ,TINT159 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 30. " ICDISR17[30] ,TINT158 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 29. " ICDISR17[29] ,TINT157 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x44 28. " ICDISR17[28] ,TINT156 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 27. " ICDISR17[27] ,TINT155 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 26. " ICDISR17[26] ,TINT154 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x44 25. " ICDISR17[25] ,TINT153 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 24. " ICDISR17[24] ,TINT152 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 23. " ICDISR17[23] ,TINT151 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x44 22. " ICDISR17[22] ,TINT150 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 21. " ICDISR17[21] ,TINT149 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 20. " ICDISR17[20] ,TINT148 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x44 19. " ICDISR17[19] ,TINT147 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 18. " ICDISR17[18] ,TINT146 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 17. " ICDISR17[17] ,TINT145 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x44 16. " ICDISR17[16] ,TINT144 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 15. " ICDISR17[15] ,TINT143 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 14. " ICDISR17[14] ,TINT142 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x44 13. " ICDISR17[13] ,TINT141 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 12. " ICDISR17[12] ,TINT140 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 11. " ICDISR17[11] ,TINT139 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x44 10. " ICDISR17[10] ,TINT138 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 9. " ICDISR17[9] ,TINT137 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 8. " ICDISR17[8] ,TINT136 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x44 7. " ICDISR17[7] ,TINT135 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 6. " ICDISR17[6] ,TINT134 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 5. " ICDISR17[5] ,TINT133 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x44 4. " ICDISR17[4] ,TINT132 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 3. " ICDISR17[3] ,TINT131 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 2. " ICDISR17[2] ,TINT130 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x44 1. " ICDISR17[1] ,TINT129 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x44 0. " ICDISR17[0] ,TINT128 secure status" "Non-secure,Secure"
|
|
line.long 0x48 "ICDISR18,Interrupt Security Register 18"
|
|
bitfld.long 0x48 10. " ICDISR18[10] ,TINT170 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x48 9. " ICDISR18[9] ,TINT169 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x48 8. " ICDISR18[8] ,TINT168 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x48 7. " ICDISR18[7] ,TINT167 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x48 6. " ICDISR18[6] ,TINT166 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x48 5. " ICDISR18[5] ,TINT165 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x48 4. " ICDISR18[4] ,TINT164 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x48 3. " ICDISR18[3] ,TINT163 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x48 2. " ICDISR18[2] ,TINT162 secure status" "Non-secure,Secure"
|
|
textline " "
|
|
bitfld.long 0x48 1. " ICDISR18[1] ,TINT161 secure status" "Non-secure,Secure"
|
|
bitfld.long 0x48 0. " ICDISR18[0] ,TINT160 secure status" "Non-secure,Secure"
|
|
tree.end
|
|
tree "Interrupt Set-enable Registers"
|
|
group.long 0x100++0x4B
|
|
line.long 0x00 "ICDISER0,Interrupt Set-enable Register 0"
|
|
bitfld.long 0x00 19. " ICDISER0[19] ,CTIIRQ0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " ICDISER0[18] ,COMMTX0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " ICDISER0[17] ,COMMRX0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ICDISER0[16] ,PMUIRQ0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " ICDISER0[15] ,GIC software interrupts set-enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " ICDISER0[14] ,GIC software interrupts set-enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICDISER0[13] ,GIC software interrupts set-enable 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " ICDISER0[12] ,GIC software interrupts set-enable 12" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " ICDISER0[11] ,GIC software interrupts set-enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ICDISER0[10] ,GIC software interrupts set-enable 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ICDISER0[9] ,GIC software interrupts set-enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ICDISER0[8] ,GIC software interrupts set-enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICDISER0[7] ,GIC software interrupts set-enable 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " ICDISER0[6] ,GIC software interrupts set-enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ICDISER0[5] ,GIC software interrupts set-enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ICDISER0[4] ,GIC software interrupts set-enable 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ICDISER0[3] ,GIC software interrupts set-enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ICDISER0[2] ,GIC software interrupts set-enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICDISER0[1] ,GIC software interrupts set-enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ICDISER0[0] ,GIC software interrupts set-enable 0" "Disabled,Enabled"
|
|
line.long 0x04 "ICDISER1,Interrupt Set-enable Register 1"
|
|
bitfld.long 0x04 25. " ICDISER1[25] ,DMAERR set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " ICDISER1[24] ,DMAINT15 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " ICDISER1[23] ,DMAINT14 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " ICDISER1[22] ,DMAINT13 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " ICDISER1[21] ,DMAINT12 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " ICDISER1[20] ,DMAINT11 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ICDISER1[19] ,DMAINT10 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " ICDISER1[18] ,DMAINT9 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " ICDISER1[17] ,DMAINT8 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " ICDISER1[16] ,DMAINT7 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " ICDISER1[15] ,DMAINT6 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " ICDISER1[14] ,DMAINT5 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ICDISER1[13] ,DMAINT4 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " ICDISER1[12] ,DMAINT3 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " ICDISER1[11] ,DMAINT2 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " ICDISER1[10] ,DMAINT1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " ICDISER1[9] ,DMAINT0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " ICDISER1[8] ,PL310ERR set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ICDISER1[7] ,IRQ7 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " ICDISER1[6] ,IRQ6 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " ICDISER1[5] ,IRQ5 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " ICDISER1[4] ,IRQ4 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " ICDISER1[3] ,IRQ3 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " ICDISER1[2] ,IRQ2 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ICDISER1[1] ,IRQ1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " ICDISER1[0] ,IRQ0 set-enable" "Disabled,Enabled"
|
|
line.long 0x08 "ICDISER2,Interrupt Set-enable Register 2"
|
|
bitfld.long 0x08 31. " ICDISER2[31] ,OIR_VFIELD0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " ICDISER2[30] ,OIR_VSYNCERR0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " ICDISER2[29] ,OIR_LO_VSYNC0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " ICDISER2[28] ,OIR_VI_VSYNC0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " ICDISER2[27] ,S1_WLINE0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " ICDISER2[26] ,IV4_VBUFERR0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ICDISER2[25] ,IV2_VBUFERR0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " ICDISER2[24] ,S1_VFIELD0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " ICDISER2[23] ,S1_VSYNCERR0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " ICDISER2[22] ,S1_LO_VSYNC0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " ICDISER2[21] ,S1_VI_VSYNC0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " ICDISER2[20] ,S0_WLINE0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ICDISER2[19] ,IV6_VBUFERR0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " ICDISER2[18] ,IV5_VBUFERR0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " ICDISER2[17] ,IV3_VBUFERR0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " ICDISER2[16] ,IV1_VBUFERR0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " ICDISER2[15] ,S0_VFIELD0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " ICDISER2[14] ,GR3_VLINE0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ICDISER2[13] ,S0_VSYNCERR0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " ICDISER2[12] ,S0_LO_VSYNC0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " ICDISER2[11] ,S0_VI_VSYNC0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " ICDISER2[10] ,USBI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " ICDISER2[9] ,USBI0 set-enable" "Disabled,Enabled"
|
|
line.long 0x0C "ICDISER3,Interrupt Set-enable Register 3"
|
|
bitfld.long 0x0C 31. " ICDISER3[31] ,JDTI set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 30. " ICDISER3[30] ,JEDI set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 29. " ICDISER3[29] ,IMR2I1 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " ICDISER3[28] ,IMR2I0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 27. " ICDISER3[27] ,IMRDI set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 26. " ICDISER3[26] ,OIR_WLINE1 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " ICDISER3[25] ,IV8_VBUFERR1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 24. " ICDISER3[24] ,IV7_VBUFERR1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 23. " ICDISER3[23] ,OIR_VFIELD1 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " ICDISER3[22] ,OIR_VLINE1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 21. " ICDISER3[21] ,OIR_LO_VSYNC1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 20. " ICDISER3[20] ,OIR_VI_VSYNC1 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " ICDISER3[19] ,S1_WLINE1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 18. " ICDISER3[18] ,IV4_VBUFERR1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 17. " ICDISER3[17] ,IV2_VBUFERR1 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " ICDISER3[16] ,S1_VFIELD1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 15. " ICDISER3[15] ,S1_VSYNCERR1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14. " ICDISER3[14] ,S1_LO_VSYNC1 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " ICDISER3[13] ,S1_VI_VSYNC1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 12. " ICDISER3[12] ,S0_WLINE1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 11. " ICDISER3[11] ,IV6_VBUFERR1 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " ICDISER3[10] ,IV5_VBUFERR1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 9. " ICDISER3[9] ,IV3_VBUFERR1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " ICDISER3[8] ,IV1_VBUFERR1 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " ICDISER3[7] ,S0_VFIELD1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 6. " ICDISER3[6] ,GR3_VLINE1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 5. " ICDISER3[5] ,S0_VSYNCERR1 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " ICDISER3[4] ,S0_LO_VSYNC1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " ICDISER3[3] ,S0_VI_VSYNC1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " ICDISER3[2] ,OIR_WLINE0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " ICDISER3[1] ,IV8_VBUFERR0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " ICDISER3[0] ,IV7_VBUFERR0 set-enable" "Disabled,Enabled"
|
|
line.long 0x10 "ICDISER4,Interrupt Set-enable Register 4"
|
|
bitfld.long 0x10 31. " ICDISER4[31] ,TGI4A set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 30. " ICDISER4[30] ,TGI3V set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " ICDISER4[29] ,TGI3D set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 28. " ICDISER4[28] ,TGI3C set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 27. " ICDISER4[27] ,TGI3B set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 26. " ICDISER4[26] ,TGI3A set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ICDISER4[25] ,TGI2U set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 24. " ICDISER4[24] ,TGI2V set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 23. " ICDISER4[23] ,TGI2B set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 22. " ICDISER4[22] ,TGI2A set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 21. " ICDISER4[21] ,TGI1U set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 20. " ICDISER4[20] ,TGI1V set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ICDISER4[19] ,TGI1B set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 18. " ICDISER4[18] ,TGI1A set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 17. " ICDISER4[17] ,TGI0F set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 16. " ICDISER4[16] ,TGI0E set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " ICDISER4[15] ,TGI0V set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 14. " ICDISER4[14] ,TGI0D set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ICDISER4[13] ,TGI0C set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 12. " ICDISER4[12] ,TGI0B set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 11. " ICDISER4[11] ,TGI0A set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 10. " ICDISER4[10] ,ITI set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 9. " ICDISER4[9] ,WTOUT set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " ICDISER4[8] ,CMI set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ICDISER4[7] ,OSTM1TINT set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " ICDISER4[6] ,OSTM0TINT set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 5. " ICDISER4[5] ,INT3 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " ICDISER4[4] ,INT2 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " ICDISER4[3] ,INT1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " ICDISER4[2] ,INT0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ICDISER4[1] ,CMP1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " ICDISER4[0] ,CMP0 set-enable" "Disabled,Enabled"
|
|
line.long 0x14 "ICDISER5,Interrupt Set-enable Register 5"
|
|
bitfld.long 0x14 31. " ICDISER5[31] ,INTIICTI0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 30. " ICDISER5[30] ,INTIICRI0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 29. " ICDISER5[29] ,INTIICTEI0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 28. " ICDISER5[28] ,SPDIFI set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 27. " ICDISER5[27] ,SSITXI5 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 26. " ICDISER5[26] ,SSIRXI5 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ICDISER5[25] ,SSII5 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 24. " ICDISER5[24] ,SSIRTI4 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 23. " ICDISER5[23] ,SSII4 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 22. " ICDISER5[22] ,SSITXI3 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 21. " ICDISER5[21] ,SSIRXI3 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 20. " ICDISER5[20] ,SSII3 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ICDISER5[19] ,SSIRTI2 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 18. " ICDISER5[18] ,SSII2 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 17. " ICDISER5[17] ,SSITXI1 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 16. " ICDISER5[16] ,SSIRXI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 15. " ICDISER5[15] ,SSII1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 14. " ICDISER5[14] ,SSITXI0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ICDISER5[13] ,SSIRXI0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 12. " ICDISER5[12] ,SSII0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 11. " ICDISER5[11] ,LMTI set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 10. " ICDISER5[10] ,ADI set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 9. " ICDISER5[9] ,SGDEI3 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 8. " ICDISER5[8] ,SGDEI2 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ICDISER5[7] ,SGDEI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 6. " ICDISER5[6] ,SGDEI0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 5. " ICDISER5[5] ,CMI2 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 4. " ICDISER5[4] ,CMI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 3. " ICDISER5[3] ,TGI4V set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " ICDISER5[2] ,TGI4D set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ICDISER5[1] ,TGI4C set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 0. " ICDISER5[0] ,TGI4B set-enable" "Disabled,Enabled"
|
|
line.long 0x18 "ICDISER6,Interrupt Set-enable Register 6"
|
|
bitfld.long 0x18 31. " ICDISER6[31] ,RXI0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 30. " ICDISER6[30] ,ERI0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 29. " ICDISER6[29] ,BRI0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 28. " ICDISER6[28] ,INTIICTMOI3 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 27. " ICDISER6[27] ,INTIICALI3 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 26. " ICDISER6[26] ,INTIICNAKI3 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ICDISER6[25] ,INTIICSTI3 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 24. " ICDISER6[24] ,INTIICSPI3 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 23. " ICDISER6[23] ,INTIICTI3 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 22. " ICDISER6[22] ,INTIICRI3 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 21. " ICDISER6[21] ,INTIICTEI3 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 20. " ICDISER6[20] ,INTIICTMOI2 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ICDISER6[19] ,INTIICALI2 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 18. " ICDISER6[18] ,INTIICNAKI2 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 17. " ICDISER6[17] ,INTIICSTI2 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 16. " ICDISER6[16] ,INTIICSPI2 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 15. " ICDISER6[15] ,INTIICTI2 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 14. " ICDISER6[14] ,INTIICRI2 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ICDISER6[13] ,INTIICTEI2 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 12. " ICDISER6[12] ,INTIICTMOI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 11. " ICDISER6[11] ,INTIICALI1 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 10. " ICDISER6[10] ,INTIICNAKI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 9. " ICDISER6[9] ,INTIICSTI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 8. " ICDISER6[8] ,INTIICSPI1 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ICDISER6[7] ,INTIICTI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 6. " ICDISER6[6] ,INTIICRI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 5. " ICDISER6[5] ,INTIICTEI1 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 4. " ICDISER6[4] ,INTIICTMOI0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 3. " ICDISER6[3] ,INTIICALI0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " ICDISER6[2] ,INTIICNAKI0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ICDISER6[1] ,INTIICSTI0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 0. " ICDISER6[0] ,INTIICSPI0 set-enable" "Disabled,Enabled"
|
|
line.long 0x1C "ICDISER7,Interrupt Set-enable Register 7"
|
|
bitfld.long 0x1C 31. " ICDISER7[31] ,INTRCAN0REC set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 30. " ICDISER7[30] ,INTRCANGRECC set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 29. " ICDISER7[29] ,INTRCANGERR set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 28. " ICDISER7[28] ,TXI7 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 27. " ICDISER7[27] ,RXI7 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 26. " ICDISER7[26] ,ERI7 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 25. " ICDISER7[25] ,BRI7 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 24. " ICDISER7[24] ,TXI6 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 23. " ICDISER7[23] ,RXI6 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 22. " ICDISER7[22] ,ERI6 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 21. " ICDISER7[21] ,BRI6 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 20. " ICDISER7[20] ,TXI5 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 19. " ICDISER7[19] ,RXI5 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 18. " ICDISER7[18] ,ERI5 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 17. " ICDISER7[17] ,BRI5 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 16. " ICDISER7[16] ,TXI4 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 15. " ICDISER7[15] ,RXI4 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 14. " ICDISER7[14] ,ERI4 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 13. " ICDISER7[13] ,BRI4 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 12. " ICDISER7[12] ,TXI3 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 11. " ICDISER7[11] ,RXI3 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 10. " ICDISER7[10] ,ERI3 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 9. " ICDISER7[9] ,BRI3 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 8. " ICDISER7[8] ,TXI2 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " ICDISER7[7] ,RXI2 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 6. " ICDISER7[6] ,ERI2 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 5. " ICDISER7[5] ,BRI2 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 4. " ICDISER7[4] ,TXI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 3. " ICDISER7[3] ,RXI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 2. " ICDISER7[2] ,ERI1 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 1. " ICDISER7[1] ,BRI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 0. " ICDISER7[0] ,TXI0 set-enable" "Disabled,Enabled"
|
|
line.long 0x20 "ICDISER8,Interrupt Set-enable Register 8"
|
|
bitfld.long 0x20 31. " ICDISER8[31] ,IEBBTSTA set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 30. " ICDISER8[30] ,IEBBTERR set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 29. " ICDISER8[29] ,IEBBTD set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 28. " ICDISER8[28] ,SPTI4 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 27. " ICDISER8[27] ,SPRI4 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 26. " ICDISER8[26] ,SPEI4 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 25. " ICDISER8[25] ,SPTI3 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 24. " ICDISER8[24] ,SPRI3 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 23. " ICDISER8[23] ,SPEI3 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 22. " ICDISER8[22] ,SPTI2 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 21. " ICDISER8[21] ,SPRI2 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 20. " ICDISER8[20] ,SPEI2 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 19. " ICDISER8[19] ,SPTI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 18. " ICDISER8[18] ,SPRI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 17. " ICDISER8[17] ,SPEI1 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 16. " ICDISER8[16] ,SPTI0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 15. " ICDISER8[15] ,SPRI0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 14. " ICDISER8[14] ,SPEI0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 13. " ICDISER8[13] ,INTRCAN4TRX set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 12. " ICDISER8[12] ,INTRCAN4ERR set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 11. " ICDISER8[11] ,INTRCAN4REC set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 10. " ICDISER8[10] ,INTRCAN3TRX set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 9. " ICDISER8[9] ,INTRCAN3ERR set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 8. " ICDISER8[8] ,INTRCAN3REC set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 7. " ICDISER8[7] ,INTRCAN2TRX set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 6. " ICDISER8[6] ,INTRCAN2ERR set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 5. " ICDISER8[5] ,INTRCAN2REC set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 4. " ICDISER8[4] ,INTRCAN1TRX set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 3. " ICDISER8[3] ,INTRCAN1ERR set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 2. " ICDISER8[2] ,INTRCAN1REC set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 1. " ICDISER8[1] ,INTRCAN0TRX set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 0. " ICDISER8[0] ,INTRCAN0ERR set-enable" "Disabled,Enabled"
|
|
line.long 0x24 "ICDISER9,Interrupt Set-enable Register 9"
|
|
bitfld.long 0x24 31. " ICDISER9[31] ,SCUFUI2 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 30. " ICDISER9[30] ,SCUFUI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 29. " ICDISER9[29] ,SCUFUI0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 28. " ICDISER9[28] ,SCUFDI3 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 27. " ICDISER9[27] ,SCUFDI2 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 26. " ICDISER9[26] ,SCUFDI1 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 25. " ICDISER9[25] ,SCUFDI0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 24. " ICDISER9[24] ,SCUAI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 23. " ICDISER9[23] ,SCUAI0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 22. " ICDISER9[22] ,CUP set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 21. " ICDISER9[21] ,PRD set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 20. " ICDISER9[20] ,ARM set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 19. " ICDISER9[19] ,SDHI1_1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 18. " ICDISER9[18] ,SDHI1_0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 17. " ICDISER9[17] ,SDHI1_3 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 16. " ICDISER9[16] ,SDHI0_1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 15. " ICDISER9[15] ,SDHI0_0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 14. " ICDISER9[14] ,SDHI0_3 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 13. " ICDISER9[13] ,MMC2 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 12. " ICDISER9[12] ,MMC1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 11. " ICDISER9[11] ,MMC0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 10. " ICDISER9[10] ,FLTREQ1I set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 9. " ICDISER9[9] ,FLTREQ0I set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 8. " ICDISER9[8] ,FLTENDI set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 7. " ICDISER9[7] ,STERB/BTOERB set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 6. " ICDISER9[6] ,IREADY set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 5. " ICDISER9[5] ,IBUF set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 4. " ICDISER9[4] ,ISEC set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 3. " ICDISER9[3] ,ITARG set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 2. " ICDISER9[2] ,IERR set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 1. " ICDISER9[1] ,ISY set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 0. " ICDISER9[0] ,IEBBTV set-enable" "Disabled,Enabled"
|
|
line.long 0x28 "ICDISER10,Interrupt Set-enable Register 10"
|
|
bitfld.long 0x28 31. " ICDISER10[31] ,ERI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 30. " ICDISER10[30] ,TEI0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 29. " ICDISER10[29] ,TXI0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 28. " ICDISER10[28] ,RXI0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 27. " ICDISER10[27] ,ERI0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 18. " ICDISER10[18] ,LINI1_INT_M set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 17. " ICDISER10[17] ,LINI1_INT_S set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 16. " ICDISER10[16] ,LINI1_INT_R set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 15. " ICDISER10[15] ,LINI1_INT_T set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 14. " ICDISER10[14] ,LINI0_INT_M set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 13. " ICDISER10[13] ,LINI0_INT_S set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 12. " ICDISER10[12] ,LINI0_INT_R set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 11. " ICDISER10[11] ,LINI0_INT_T set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 8. " ICDISER10[8] ,DRC1 Channel 1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 7. " ICDISER10[7] ,DRC1 Channel 0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 6. " ICDISER10[6] ,MLB_SINT set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 5. " ICDISER10[5] ,MLB_CINT set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 4. " ICDISER10[4] ,SCUDVI3 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 3. " ICDISER10[3] ,SCUDVI2 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 2. " ICDISER10[2] ,SCUDVI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 1. " ICDISER10[1] ,SCUDVI0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 0. " ICDISER10[0] ,SCUFUI3 set-enable" "Disabled,Enabled"
|
|
line.long 0x2C "ICDISER11,Interrupt Set-enable Register 11"
|
|
bitfld.long 0x2C 31. " ICDISER11[31] ,X2HPERI1_ERRINT set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 30. " ICDISER11[30] ,H2XIC1_ERRINT set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 29. " ICDISER11[29] ,H2XMLB_ERRINT set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 12. " ICDISER11[12] ,CEUI set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 7. " ICDISER11[7] ,ETHERI set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 6. " ICDISER11[6] ,AVBI_MAC set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 5. " ICDISER11[5] ,AVBI_MANAGE set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 4. " ICDISER11[4] ,AVBI_ERROR set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 3. " ICDISER11[3] ,AVBI_DATA set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 2. " ICDISER11[2] ,TEI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 1. " ICDISER11[1] ,TXI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 0. " ICDISER11[0] ,RXI1 set-enable" "Disabled,Enabled"
|
|
line.long 0x30 "ICDISER12,Interrupt Set-enable Register 12"
|
|
bitfld.long 0x30 14. " ICDISER12[14] ,PFVEI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 13. " ICDISER12[13] ,OFFI1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 12. " ICDISER12[12] ,IFEI1 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 11. " ICDISER12[11] ,PFVEI0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 10. " ICDISER12[10] ,OFFI0 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 9. " ICDISER12[9] ,IFEI0 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 8. " ICDISER12[8] ,PRRI set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 7. " ICDISER12[7] ,X2HSPI2_ERRINT set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 6. " ICDISER12[6] ,X2HSPI1_ERRINT set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 5. " ICDISER12[5] ,X2HBSC_ERRINT set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 4. " ICDISER12[4] ,X2HDBGR_ERRINT set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 3. " ICDISER12[3] ,X2HPERI67_ERRINT set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 2. " ICDISER12[2] ,X2HPERI5_ERRINT set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 1. " ICDISER12[1] ,X2HPERI34_ERRINT set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 0. " ICDISER12[0] ,X2HPERI2_ERRINT set-enable" "Disabled,Enabled"
|
|
line.long 0x34 "ICDISER13,Interrupt Set-enable Register 13"
|
|
bitfld.long 0x34 31. " ICDISER13[31] ,TINT31 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 30. " ICDISER13[30] ,TINT30 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 29. " ICDISER13[29] ,TINT29 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 28. " ICDISER13[28] ,TINT28 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 27. " ICDISER13[27] ,TINT27 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 26. " ICDISER13[26] ,TINT26 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 25. " ICDISER13[25] ,TINT25 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 24. " ICDISER13[24] ,TINT24 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 23. " ICDISER13[23] ,TINT23 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 22. " ICDISER13[22] ,TINT22 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 21. " ICDISER13[21] ,TINT21 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 20. " ICDISER13[20] ,TINT20 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 19. " ICDISER13[19] ,TINT19 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 18. " ICDISER13[18] ,TINT18 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 17. " ICDISER13[17] ,TINT17 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 16. " ICDISER13[16] ,TINT16 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 15. " ICDISER13[15] ,TINT15 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 14. " ICDISER13[14] ,TINT14 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 13. " ICDISER13[13] ,TINT13 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 12. " ICDISER13[12] ,TINT12 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 11. " ICDISER13[11] ,TINT11 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 10. " ICDISER13[10] ,TINT10 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 9. " ICDISER13[9] ,TINT9 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 8. " ICDISER13[8] ,TINT8 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 7. " ICDISER13[7] ,TINT7 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 6. " ICDISER13[6] ,TINT6 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 5. " ICDISER13[5] ,TINT5 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 4. " ICDISER13[4] ,TINT4 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 3. " ICDISER13[3] ,TINT3 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 2. " ICDISER13[2] ,TINT2 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 1. " ICDISER13[1] ,TINT1 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 0. " ICDISER13[0] ,TINT0 set-enable" "Disabled,Enabled"
|
|
line.long 0x38 "ICDISER14,Interrupt Set-enable Register 14"
|
|
bitfld.long 0x38 31. " ICDISER14[31] ,TINT63 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 30. " ICDISER14[30] ,TINT62 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 29. " ICDISER14[29] ,TINT61 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 28. " ICDISER14[28] ,TINT60 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 27. " ICDISER14[27] ,TINT59 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 26. " ICDISER14[26] ,TINT58 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 25. " ICDISER14[25] ,TINT57 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 24. " ICDISER14[24] ,TINT56 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 23. " ICDISER14[23] ,TINT55 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 22. " ICDISER14[22] ,TINT54 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 21. " ICDISER14[21] ,TINT53 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 20. " ICDISER14[20] ,TINT52 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 19. " ICDISER14[19] ,TINT51 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 18. " ICDISER14[18] ,TINT50 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 17. " ICDISER14[17] ,TINT49 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 16. " ICDISER14[16] ,TINT48 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 15. " ICDISER14[15] ,TINT47 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 14. " ICDISER14[14] ,TINT46 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 13. " ICDISER14[13] ,TINT45 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 12. " ICDISER14[12] ,TINT44 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 11. " ICDISER14[11] ,TINT43 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 10. " ICDISER14[10] ,TINT42 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 9. " ICDISER14[9] ,TINT41 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 8. " ICDISER14[8] ,TINT40 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 7. " ICDISER14[7] ,TINT39 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 6. " ICDISER14[6] ,TINT38 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 5. " ICDISER14[5] ,TINT37 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 4. " ICDISER14[4] ,TINT36 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 3. " ICDISER14[3] ,TINT35 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 2. " ICDISER14[2] ,TINT34 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 1. " ICDISER14[1] ,TINT33 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 0. " ICDISER14[0] ,TINT32 set-enable" "Disabled,Enabled"
|
|
line.long 0x3C "ICDISER15,Interrupt Set-enable Register 15"
|
|
bitfld.long 0x3C 31. " ICDISER15[31] ,TINT95 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 30. " ICDISER15[30] ,TINT94 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 29. " ICDISER15[29] ,TINT93 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 28. " ICDISER15[28] ,TINT92 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 27. " ICDISER15[27] ,TINT91 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 26. " ICDISER15[26] ,TINT90 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 25. " ICDISER15[25] ,TINT89 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 24. " ICDISER15[24] ,TINT88 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 23. " ICDISER15[23] ,TINT87 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 22. " ICDISER15[22] ,TINT86 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 21. " ICDISER15[21] ,TINT85 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 20. " ICDISER15[20] ,TINT84 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 19. " ICDISER15[19] ,TINT83 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 18. " ICDISER15[18] ,TINT82 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 17. " ICDISER15[17] ,TINT81 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 16. " ICDISER15[16] ,TINT80 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 15. " ICDISER15[15] ,TINT79 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 14. " ICDISER15[14] ,TINT78 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 13. " ICDISER15[13] ,TINT77 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 12. " ICDISER15[12] ,TINT76 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 11. " ICDISER15[11] ,TINT75 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 10. " ICDISER15[10] ,TINT74 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 9. " ICDISER15[9] ,TINT73 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 8. " ICDISER15[8] ,TINT72 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 7. " ICDISER15[7] ,TINT71 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 6. " ICDISER15[6] ,TINT70 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 5. " ICDISER15[5] ,TINT69 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 4. " ICDISER15[4] ,TINT68 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 3. " ICDISER15[3] ,TINT67 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 2. " ICDISER15[2] ,TINT66 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 1. " ICDISER15[1] ,TINT65 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 0. " ICDISER15[0] ,TINT64 set-enable" "Disabled,Enabled"
|
|
line.long 0x40 "ICDISER16,Interrupt Set-enable Register 16"
|
|
bitfld.long 0x40 31. " ICDISER16[31] ,TINT127 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 30. " ICDISER16[30] ,TINT126 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 29. " ICDISER16[29] ,TINT125 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x40 28. " ICDISER16[28] ,TINT124 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 27. " ICDISER16[27] ,TINT123 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 26. " ICDISER16[26] ,TINT122 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x40 25. " ICDISER16[25] ,TINT121 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 24. " ICDISER16[24] ,TINT120 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 23. " ICDISER16[23] ,TINT119 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x40 22. " ICDISER16[22] ,TINT118 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 21. " ICDISER16[21] ,TINT117 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 20. " ICDISER16[20] ,TINT116 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x40 19. " ICDISER16[19] ,TINT115 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 18. " ICDISER16[18] ,TINT114 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 17. " ICDISER16[17] ,TINT113 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x40 16. " ICDISER16[16] ,TINT112 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 15. " ICDISER16[15] ,TINT111 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 14. " ICDISER16[14] ,TINT110 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x40 13. " ICDISER16[13] ,TINT109 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 12. " ICDISER16[12] ,TINT108 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 11. " ICDISER16[11] ,TINT107 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x40 10. " ICDISER16[10] ,TINT106 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 9. " ICDISER16[9] ,TINT105 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 8. " ICDISER16[8] ,TINT104 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x40 7. " ICDISER16[7] ,TINT103 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 6. " ICDISER16[6] ,TINT102 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 5. " ICDISER16[5] ,TINT101 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x40 4. " ICDISER16[4] ,TINT100 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 3. " ICDISER16[3] ,TINT99 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 2. " ICDISER16[2] ,TINT98 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x40 1. " ICDISER16[1] ,TINT97 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 0. " ICDISER16[0] ,TINT96 set-enable" "Disabled,Enabled"
|
|
line.long 0x44 "ICDISER17,Interrupt Set-enable Register 17"
|
|
bitfld.long 0x44 31. " ICDISER17[31] ,TINT159 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 30. " ICDISER17[30] ,TINT158 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 29. " ICDISER17[29] ,TINT157 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x44 28. " ICDISER17[28] ,TINT156 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 27. " ICDISER17[27] ,TINT155 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 26. " ICDISER17[26] ,TINT154 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x44 25. " ICDISER17[25] ,TINT153 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 24. " ICDISER17[24] ,TINT152 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 23. " ICDISER17[23] ,TINT151 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x44 22. " ICDISER17[22] ,TINT150 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 21. " ICDISER17[21] ,TINT149 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 20. " ICDISER17[20] ,TINT148 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x44 19. " ICDISER17[19] ,TINT147 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 18. " ICDISER17[18] ,TINT146 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 17. " ICDISER17[17] ,TINT145 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x44 16. " ICDISER17[16] ,TINT144 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 15. " ICDISER17[15] ,TINT143 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 14. " ICDISER17[14] ,TINT142 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x44 13. " ICDISER17[13] ,TINT141 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 12. " ICDISER17[12] ,TINT140 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 11. " ICDISER17[11] ,TINT139 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x44 10. " ICDISER17[10] ,TINT138 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 9. " ICDISER17[9] ,TINT137 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 8. " ICDISER17[8] ,TINT136 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x44 7. " ICDISER17[7] ,TINT135 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 6. " ICDISER17[6] ,TINT134 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 5. " ICDISER17[5] ,TINT133 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x44 4. " ICDISER17[4] ,TINT132 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 3. " ICDISER17[3] ,TINT131 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 2. " ICDISER17[2] ,TINT130 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x44 1. " ICDISER17[1] ,TINT129 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 0. " ICDISER17[0] ,TINT128 set-enable" "Disabled,Enabled"
|
|
line.long 0x48 "ICDISER18,Interrupt Set-enable Register 18"
|
|
bitfld.long 0x48 10. " ICDISER18[10] ,TINT170 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x48 9. " ICDISER18[9] ,TINT169 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x48 8. " ICDISER18[8] ,TINT168 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x48 7. " ICDISER18[7] ,TINT167 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x48 6. " ICDISER18[6] ,TINT166 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x48 5. " ICDISER18[5] ,TINT165 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x48 4. " ICDISER18[4] ,TINT164 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x48 3. " ICDISER18[3] ,TINT163 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x48 2. " ICDISER18[2] ,TINT162 set-enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x48 1. " ICDISER18[1] ,TINT161 set-enable" "Disabled,Enabled"
|
|
bitfld.long 0x48 0. " ICDISER18[0] ,TINT160 set-enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Interrupt Clear-enable Registers"
|
|
group.long 0x180++0x4B
|
|
line.long 0x00 "ICDICER0,Interrupt Clear-enable Register 0"
|
|
bitfld.long 0x00 19. " ICDICER0[19] ,CTIIRQ0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x00 18. " ICDICER0[18] ,COMMTX0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x00 17. " ICDICER0[17] ,COMMRX0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ICDICER0[16] ,PMUIRQ0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x00 15. " ICDICER0[15] ,GIC software interrupts clear-enable 15" "Not cleared,Cleared"
|
|
bitfld.long 0x00 14. " ICDICER0[14] ,GIC software interrupts clear-enable 14" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICDICER0[13] ,GIC software interrupts clear-enable 13" "Not cleared,Cleared"
|
|
bitfld.long 0x00 12. " ICDICER0[12] ,GIC software interrupts clear-enable 12" "Not cleared,Cleared"
|
|
bitfld.long 0x00 11. " ICDICER0[11] ,GIC software interrupts clear-enable 11" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ICDICER0[10] ,GIC software interrupts clear-enable 10" "Not cleared,Cleared"
|
|
bitfld.long 0x00 9. " ICDICER0[9] ,GIC software interrupts clear-enable 9" "Not cleared,Cleared"
|
|
bitfld.long 0x00 8. " ICDICER0[8] ,GIC software interrupts clear-enable 8" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICDICER0[7] ,GIC software interrupts clear-enable 7" "Not cleared,Cleared"
|
|
bitfld.long 0x00 6. " ICDICER0[6] ,GIC software interrupts clear-enable 6" "Not cleared,Cleared"
|
|
bitfld.long 0x00 5. " ICDICER0[5] ,GIC software interrupts clear-enable 5" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ICDICER0[4] ,GIC software interrupts clear-enable 4" "Not cleared,Cleared"
|
|
bitfld.long 0x00 3. " ICDICER0[3] ,GIC software interrupts clear-enable 3" "Not cleared,Cleared"
|
|
bitfld.long 0x00 2. " ICDICER0[2] ,GIC software interrupts clear-enable 2" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICDICER0[1] ,GIC software interrupts clear-enable 1" "Not cleared,Cleared"
|
|
bitfld.long 0x00 0. " ICDICER0[0] ,GIC software interrupts clear-enable 0" "Not cleared,Cleared"
|
|
line.long 0x04 "ICDICER1,Interrupt Clear-enable Register 1"
|
|
bitfld.long 0x04 25. " ICDICER1[25] ,DMAERR clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x04 24. " ICDICER1[24] ,DMAINT15 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x04 23. " ICDICER1[23] ,DMAINT14 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 22. " ICDICER1[22] ,DMAINT13 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x04 21. " ICDICER1[21] ,DMAINT12 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x04 20. " ICDICER1[20] ,DMAINT11 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ICDICER1[19] ,DMAINT10 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x04 18. " ICDICER1[18] ,DMAINT9 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x04 17. " ICDICER1[17] ,DMAINT8 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 16. " ICDICER1[16] ,DMAINT7 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x04 15. " ICDICER1[15] ,DMAINT6 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x04 14. " ICDICER1[14] ,DMAINT5 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ICDICER1[13] ,DMAINT4 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x04 12. " ICDICER1[12] ,DMAINT3 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x04 11. " ICDICER1[11] ,DMAINT2 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 10. " ICDICER1[10] ,DMAINT1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x04 9. " ICDICER1[9] ,DMAINT0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x04 8. " ICDICER1[8] ,PL310ERR clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ICDICER1[7] ,IRQ7 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x04 6. " ICDICER1[6] ,IRQ6 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x04 5. " ICDICER1[5] ,IRQ5 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 4. " ICDICER1[4] ,IRQ4 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x04 3. " ICDICER1[3] ,IRQ3 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x04 2. " ICDICER1[2] ,IRQ2 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ICDICER1[1] ,IRQ1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x04 0. " ICDICER1[0] ,IRQ0 clear-enable" "Not cleared,Cleared"
|
|
line.long 0x08 "ICDICER2,Interrupt Clear-enable Register 2"
|
|
bitfld.long 0x08 31. " ICDICER2[31] ,OIR_VFIELD0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x08 30. " ICDICER2[30] ,OIR_VSYNCERR0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x08 29. " ICDICER2[29] ,OIR_LO_VSYNC0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 28. " ICDICER2[28] ,OIR_VI_VSYNC0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x08 27. " ICDICER2[27] ,S1_WLINE0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x08 26. " ICDICER2[26] ,IV4_VBUFERR0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ICDICER2[25] ,IV2_VBUFERR0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x08 24. " ICDICER2[24] ,S1_VFIELD0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x08 23. " ICDICER2[23] ,S1_VSYNCERR0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 22. " ICDICER2[22] ,S1_LO_VSYNC0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x08 21. " ICDICER2[21] ,S1_VI_VSYNC0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x08 20. " ICDICER2[20] ,S0_WLINE0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ICDICER2[19] ,IV6_VBUFERR0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x08 18. " ICDICER2[18] ,IV5_VBUFERR0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x08 17. " ICDICER2[17] ,IV3_VBUFERR0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 16. " ICDICER2[16] ,IV1_VBUFERR0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x08 15. " ICDICER2[15] ,S0_VFIELD0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x08 14. " ICDICER2[14] ,GR3_VLINE0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ICDICER2[13] ,S0_VSYNCERR0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x08 12. " ICDICER2[12] ,S0_LO_VSYNC0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x08 11. " ICDICER2[11] ,S0_VI_VSYNC0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 10. " ICDICER2[10] ,USBI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x08 9. " ICDICER2[9] ,USBI0 clear-enable" "Not cleared,Cleared"
|
|
line.long 0x0C "ICDICER3,Interrupt Clear-enable Register 3"
|
|
bitfld.long 0x0C 31. " ICDICER3[31] ,JDTI clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 30. " ICDICER3[30] ,JEDI clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 29. " ICDICER3[29] ,IMR2I1 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " ICDICER3[28] ,IMR2I0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 27. " ICDICER3[27] ,IMRDI clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 26. " ICDICER3[26] ,OIR_WLINE1 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " ICDICER3[25] ,IV8_VBUFERR1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 24. " ICDICER3[24] ,IV7_VBUFERR1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 23. " ICDICER3[23] ,OIR_VFIELD1 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " ICDICER3[22] ,OIR_VLINE1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 21. " ICDICER3[21] ,OIR_LO_VSYNC1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 20. " ICDICER3[20] ,OIR_VI_VSYNC1 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " ICDICER3[19] ,S1_WLINE1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 18. " ICDICER3[18] ,IV4_VBUFERR1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 17. " ICDICER3[17] ,IV2_VBUFERR1 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " ICDICER3[16] ,S1_VFIELD1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 15. " ICDICER3[15] ,S1_VSYNCERR1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 14. " ICDICER3[14] ,S1_LO_VSYNC1 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " ICDICER3[13] ,S1_VI_VSYNC1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 12. " ICDICER3[12] ,S0_WLINE1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 11. " ICDICER3[11] ,IV6_VBUFERR1 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " ICDICER3[10] ,IV5_VBUFERR1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 9. " ICDICER3[9] ,IV3_VBUFERR1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 8. " ICDICER3[8] ,IV1_VBUFERR1 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " ICDICER3[7] ,S0_VFIELD1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 6. " ICDICER3[6] ,GR3_VLINE1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 5. " ICDICER3[5] ,S0_VSYNCERR1 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " ICDICER3[4] ,S0_LO_VSYNC1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 3. " ICDICER3[3] ,S0_VI_VSYNC1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 2. " ICDICER3[2] ,OIR_WLINE0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " ICDICER3[1] ,IV8_VBUFERR0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 0. " ICDICER3[0] ,IV7_VBUFERR0 clear-enable" "Not cleared,Cleared"
|
|
line.long 0x10 "ICDICER4,Interrupt Clear-enable Register 4"
|
|
bitfld.long 0x10 31. " ICDICER4[31] ,TGI4A clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 30. " ICDICER4[30] ,TGI3V clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 29. " ICDICER4[29] ,TGI3D clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 28. " ICDICER4[28] ,TGI3C clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 27. " ICDICER4[27] ,TGI3B clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 26. " ICDICER4[26] ,TGI3A clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ICDICER4[25] ,TGI2U clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 24. " ICDICER4[24] ,TGI2V clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 23. " ICDICER4[23] ,TGI2B clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 22. " ICDICER4[22] ,TGI2A clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 21. " ICDICER4[21] ,TGI1U clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 20. " ICDICER4[20] ,TGI1V clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ICDICER4[19] ,TGI1B clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 18. " ICDICER4[18] ,TGI1A clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 17. " ICDICER4[17] ,TGI0F clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 16. " ICDICER4[16] ,TGI0E clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 15. " ICDICER4[15] ,TGI0V clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 14. " ICDICER4[14] ,TGI0D clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ICDICER4[13] ,TGI0C clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 12. " ICDICER4[12] ,TGI0B clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 11. " ICDICER4[11] ,TGI0A clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 10. " ICDICER4[10] ,ITI clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 9. " ICDICER4[9] ,WTOUT clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 8. " ICDICER4[8] ,CMI clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ICDICER4[7] ,OSTM1TINT clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 6. " ICDICER4[6] ,OSTM0TINT clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 5. " ICDICER4[5] ,INT3 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 4. " ICDICER4[4] ,INT2 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 3. " ICDICER4[3] ,INT1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 2. " ICDICER4[2] ,INT0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ICDICER4[1] ,CMP1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x10 0. " ICDICER4[0] ,CMP0 clear-enable" "Not cleared,Cleared"
|
|
line.long 0x14 "ICDICER5,Interrupt Clear-enable Register 5"
|
|
bitfld.long 0x14 31. " ICDICER5[31] ,INTIICTI0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 30. " ICDICER5[30] ,INTIICRI0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 29. " ICDICER5[29] ,INTIICTEI0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 28. " ICDICER5[28] ,SPDIFI clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 27. " ICDICER5[27] ,SSITXI5 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 26. " ICDICER5[26] ,SSIRXI5 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ICDICER5[25] ,SSII5 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 24. " ICDICER5[24] ,SSIRTI4 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 23. " ICDICER5[23] ,SSII4 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 22. " ICDICER5[22] ,SSITXI3 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 21. " ICDICER5[21] ,SSIRXI3 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 20. " ICDICER5[20] ,SSII3 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ICDICER5[19] ,SSIRTI2 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 18. " ICDICER5[18] ,SSII2 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 17. " ICDICER5[17] ,SSITXI1 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 16. " ICDICER5[16] ,SSIRXI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 15. " ICDICER5[15] ,SSII1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 14. " ICDICER5[14] ,SSITXI0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ICDICER5[13] ,SSIRXI0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 12. " ICDICER5[12] ,SSII0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 11. " ICDICER5[11] ,LMTI clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 10. " ICDICER5[10] ,ADI clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 9. " ICDICER5[9] ,SGDEI3 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 8. " ICDICER5[8] ,SGDEI2 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ICDICER5[7] ,SGDEI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 6. " ICDICER5[6] ,SGDEI0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 5. " ICDICER5[5] ,CMI2 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 4. " ICDICER5[4] ,CMI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 3. " ICDICER5[3] ,TGI4V clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 2. " ICDICER5[2] ,TGI4D clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ICDICER5[1] ,TGI4C clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x14 0. " ICDICER5[0] ,TGI4B clear-enable" "Not cleared,Cleared"
|
|
line.long 0x18 "ICDICER6,Interrupt Clear-enable Register 6"
|
|
bitfld.long 0x18 31. " ICDICER6[31] ,RXI0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 30. " ICDICER6[30] ,ERI0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 29. " ICDICER6[29] ,BRI0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 28. " ICDICER6[28] ,INTIICTMOI3 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 27. " ICDICER6[27] ,INTIICALI3 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 26. " ICDICER6[26] ,INTIICNAKI3 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ICDICER6[25] ,INTIICSTI3 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 24. " ICDICER6[24] ,INTIICSPI3 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 23. " ICDICER6[23] ,INTIICTI3 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 22. " ICDICER6[22] ,INTIICRI3 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 21. " ICDICER6[21] ,INTIICTEI3 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 20. " ICDICER6[20] ,INTIICTMOI2 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ICDICER6[19] ,INTIICALI2 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 18. " ICDICER6[18] ,INTIICNAKI2 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 17. " ICDICER6[17] ,INTIICSTI2 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 16. " ICDICER6[16] ,INTIICSPI2 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 15. " ICDICER6[15] ,INTIICTI2 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 14. " ICDICER6[14] ,INTIICRI2 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ICDICER6[13] ,INTIICTEI2 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 12. " ICDICER6[12] ,INTIICTMOI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 11. " ICDICER6[11] ,INTIICALI1 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 10. " ICDICER6[10] ,INTIICNAKI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 9. " ICDICER6[9] ,INTIICSTI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 8. " ICDICER6[8] ,INTIICSPI1 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ICDICER6[7] ,INTIICTI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 6. " ICDICER6[6] ,INTIICRI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 5. " ICDICER6[5] ,INTIICTEI1 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 4. " ICDICER6[4] ,INTIICTMOI0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 3. " ICDICER6[3] ,INTIICALI0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 2. " ICDICER6[2] ,INTIICNAKI0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ICDICER6[1] ,INTIICSTI0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x18 0. " ICDICER6[0] ,INTIICSPI0 clear-enable" "Not cleared,Cleared"
|
|
line.long 0x1C "ICDICER7,Interrupt Clear-enable Register 7"
|
|
bitfld.long 0x1C 31. " ICDICER7[31] ,INTRCAN0REC clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 30. " ICDICER7[30] ,INTRCANGRECC clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 29. " ICDICER7[29] ,INTRCANGERR clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 28. " ICDICER7[28] ,TXI7 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 27. " ICDICER7[27] ,RXI7 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 26. " ICDICER7[26] ,ERI7 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 25. " ICDICER7[25] ,BRI7 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 24. " ICDICER7[24] ,TXI6 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 23. " ICDICER7[23] ,RXI6 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 22. " ICDICER7[22] ,ERI6 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 21. " ICDICER7[21] ,BRI6 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 20. " ICDICER7[20] ,TXI5 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 19. " ICDICER7[19] ,RXI5 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 18. " ICDICER7[18] ,ERI5 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 17. " ICDICER7[17] ,BRI5 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 16. " ICDICER7[16] ,TXI4 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 15. " ICDICER7[15] ,RXI4 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 14. " ICDICER7[14] ,ERI4 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 13. " ICDICER7[13] ,BRI4 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 12. " ICDICER7[12] ,TXI3 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 11. " ICDICER7[11] ,RXI3 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 10. " ICDICER7[10] ,ERI3 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 9. " ICDICER7[9] ,BRI3 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 8. " ICDICER7[8] ,TXI2 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " ICDICER7[7] ,RXI2 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 6. " ICDICER7[6] ,ERI2 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 5. " ICDICER7[5] ,BRI2 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 4. " ICDICER7[4] ,TXI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 3. " ICDICER7[3] ,RXI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 2. " ICDICER7[2] ,ERI1 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 1. " ICDICER7[1] ,BRI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 0. " ICDICER7[0] ,TXI0 clear-enable" "Not cleared,Cleared"
|
|
line.long 0x20 "ICDICER8,Interrupt Clear-enable Register 8"
|
|
bitfld.long 0x20 31. " ICDICER8[31] ,IEBBTSTA clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 30. " ICDICER8[30] ,IEBBTERR clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 29. " ICDICER8[29] ,IEBBTD clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 28. " ICDICER8[28] ,SPTI4 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 27. " ICDICER8[27] ,SPRI4 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 26. " ICDICER8[26] ,SPEI4 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 25. " ICDICER8[25] ,SPTI3 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 24. " ICDICER8[24] ,SPRI3 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 23. " ICDICER8[23] ,SPEI3 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 22. " ICDICER8[22] ,SPTI2 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 21. " ICDICER8[21] ,SPRI2 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 20. " ICDICER8[20] ,SPEI2 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 19. " ICDICER8[19] ,SPTI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 18. " ICDICER8[18] ,SPRI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 17. " ICDICER8[17] ,SPEI1 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 16. " ICDICER8[16] ,SPTI0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 15. " ICDICER8[15] ,SPRI0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 14. " ICDICER8[14] ,SPEI0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 13. " ICDICER8[13] ,INTRCAN4TRX clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 12. " ICDICER8[12] ,INTRCAN4ERR clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 11. " ICDICER8[11] ,INTRCAN4REC clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 10. " ICDICER8[10] ,INTRCAN3TRX clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 9. " ICDICER8[9] ,INTRCAN3ERR clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 8. " ICDICER8[8] ,INTRCAN3REC clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 7. " ICDICER8[7] ,INTRCAN2TRX clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 6. " ICDICER8[6] ,INTRCAN2ERR clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 5. " ICDICER8[5] ,INTRCAN2REC clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 4. " ICDICER8[4] ,INTRCAN1TRX clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 3. " ICDICER8[3] ,INTRCAN1ERR clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 2. " ICDICER8[2] ,INTRCAN1REC clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 1. " ICDICER8[1] ,INTRCAN0TRX clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x20 0. " ICDICER8[0] ,INTRCAN0ERR clear-enable" "Not cleared,Cleared"
|
|
line.long 0x24 "ICDICER9,Interrupt Clear-enable Register 9"
|
|
bitfld.long 0x24 31. " ICDICER9[31] ,SCUFUI2 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 30. " ICDICER9[30] ,SCUFUI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 29. " ICDICER9[29] ,SCUFUI0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 28. " ICDICER9[28] ,SCUFDI3 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 27. " ICDICER9[27] ,SCUFDI2 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 26. " ICDICER9[26] ,SCUFDI1 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 25. " ICDICER9[25] ,SCUFDI0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 24. " ICDICER9[24] ,SCUAI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 23. " ICDICER9[23] ,SCUAI0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 22. " ICDICER9[22] ,CUP clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 21. " ICDICER9[21] ,PRD clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 20. " ICDICER9[20] ,ARM clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 19. " ICDICER9[19] ,SDHI1_1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 18. " ICDICER9[18] ,SDHI1_0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 17. " ICDICER9[17] ,SDHI1_3 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 16. " ICDICER9[16] ,SDHI0_1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 15. " ICDICER9[15] ,SDHI0_0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 14. " ICDICER9[14] ,SDHI0_3 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 13. " ICDICER9[13] ,MMC2 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 12. " ICDICER9[12] ,MMC1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 11. " ICDICER9[11] ,MMC0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 10. " ICDICER9[10] ,FLTREQ1I clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 9. " ICDICER9[9] ,FLTREQ0I clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 8. " ICDICER9[8] ,FLTENDI clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 7. " ICDICER9[7] ,STERB/BTOERB clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 6. " ICDICER9[6] ,IREADY clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 5. " ICDICER9[5] ,IBUF clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 4. " ICDICER9[4] ,ISEC clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 3. " ICDICER9[3] ,ITARG clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 2. " ICDICER9[2] ,IERR clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 1. " ICDICER9[1] ,ISY clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x24 0. " ICDICER9[0] ,IEBBTV clear-enable" "Not cleared,Cleared"
|
|
line.long 0x28 "ICDICER10,Interrupt Clear-enable Register 10"
|
|
bitfld.long 0x28 31. " ICDICER10[31] ,ERI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x28 30. " ICDICER10[30] ,TEI0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x28 29. " ICDICER10[29] ,TXI0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x28 28. " ICDICER10[28] ,RXI0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x28 27. " ICDICER10[27] ,ERI0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x28 18. " ICDICER10[18] ,LINI1_INT_M clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x28 17. " ICDICER10[17] ,LINI1_INT_S clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x28 16. " ICDICER10[16] ,LINI1_INT_R clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x28 15. " ICDICER10[15] ,LINI1_INT_T clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x28 14. " ICDICER10[14] ,LINI0_INT_M clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x28 13. " ICDICER10[13] ,LINI0_INT_S clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x28 12. " ICDICER10[12] ,LINI0_INT_R clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x28 11. " ICDICER10[11] ,LINI0_INT_T clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x28 8. " ICDICER10[8] ,DRC1 Channel 1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x28 7. " ICDICER10[7] ,DRC1 Channel 0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x28 6. " ICDICER10[6] ,MLB_SINT clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x28 5. " ICDICER10[5] ,MLB_CINT clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x28 4. " ICDICER10[4] ,SCUDVI3 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x28 3. " ICDICER10[3] ,SCUDVI2 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x28 2. " ICDICER10[2] ,SCUDVI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x28 1. " ICDICER10[1] ,SCUDVI0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x28 0. " ICDICER10[0] ,SCUFUI3 clear-enable" "Not cleared,Cleared"
|
|
line.long 0x2C "ICDICER11,Interrupt Clear-enable Register 11"
|
|
bitfld.long 0x2C 31. " ICDICER11[31] ,X2HPERI1_ERRINT clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x2C 30. " ICDICER11[30] ,H2XIC1_ERRINT clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x2C 29. " ICDICER11[29] ,H2XMLB_ERRINT clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x2C 12. " ICDICER11[12] ,CEUI clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x2C 7. " ICDICER11[7] ,ETHERI clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x2C 6. " ICDICER11[6] ,AVBI_MAC clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x2C 5. " ICDICER11[5] ,AVBI_MANAGE clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x2C 4. " ICDICER11[4] ,AVBI_ERROR clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x2C 3. " ICDICER11[3] ,AVBI_DATA clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x2C 2. " ICDICER11[2] ,TEI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x2C 1. " ICDICER11[1] ,TXI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x2C 0. " ICDICER11[0] ,RXI1 clear-enable" "Not cleared,Cleared"
|
|
line.long 0x30 "ICDICER12,Interrupt Clear-enable Register 12"
|
|
bitfld.long 0x30 14. " ICDICER12[14] ,PFVEI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x30 13. " ICDICER12[13] ,OFFI1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x30 12. " ICDICER12[12] ,IFEI1 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x30 11. " ICDICER12[11] ,PFVEI0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x30 10. " ICDICER12[10] ,OFFI0 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x30 9. " ICDICER12[9] ,IFEI0 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x30 8. " ICDICER12[8] ,PRRI clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x30 7. " ICDICER12[7] ,X2HSPI2_ERRINT clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x30 6. " ICDICER12[6] ,X2HSPI1_ERRINT clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x30 5. " ICDICER12[5] ,X2HBSC_ERRINT clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x30 4. " ICDICER12[4] ,X2HDBGR_ERRINT clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x30 3. " ICDICER12[3] ,X2HPERI67_ERRINT clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x30 2. " ICDICER12[2] ,X2HPERI5_ERRINT clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x30 1. " ICDICER12[1] ,X2HPERI34_ERRINT clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x30 0. " ICDICER12[0] ,X2HPERI2_ERRINT clear-enable" "Not cleared,Cleared"
|
|
line.long 0x34 "ICDICER13,Interrupt Clear-enable Register 13"
|
|
bitfld.long 0x34 31. " ICDICER13[31] ,TINT31 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 30. " ICDICER13[30] ,TINT30 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 29. " ICDICER13[29] ,TINT29 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 28. " ICDICER13[28] ,TINT28 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 27. " ICDICER13[27] ,TINT27 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 26. " ICDICER13[26] ,TINT26 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 25. " ICDICER13[25] ,TINT25 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 24. " ICDICER13[24] ,TINT24 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 23. " ICDICER13[23] ,TINT23 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 22. " ICDICER13[22] ,TINT22 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 21. " ICDICER13[21] ,TINT21 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 20. " ICDICER13[20] ,TINT20 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 19. " ICDICER13[19] ,TINT19 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 18. " ICDICER13[18] ,TINT18 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 17. " ICDICER13[17] ,TINT17 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 16. " ICDICER13[16] ,TINT16 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 15. " ICDICER13[15] ,TINT15 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 14. " ICDICER13[14] ,TINT14 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 13. " ICDICER13[13] ,TINT13 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 12. " ICDICER13[12] ,TINT12 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 11. " ICDICER13[11] ,TINT11 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 10. " ICDICER13[10] ,TINT10 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 9. " ICDICER13[9] ,TINT9 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 8. " ICDICER13[8] ,TINT8 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 7. " ICDICER13[7] ,TINT7 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 6. " ICDICER13[6] ,TINT6 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 5. " ICDICER13[5] ,TINT5 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 4. " ICDICER13[4] ,TINT4 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 3. " ICDICER13[3] ,TINT3 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 2. " ICDICER13[2] ,TINT2 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 1. " ICDICER13[1] ,TINT1 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x34 0. " ICDICER13[0] ,TINT0 clear-enable" "Not cleared,Cleared"
|
|
line.long 0x38 "ICDICER14,Interrupt Clear-enable Register 14"
|
|
bitfld.long 0x38 31. " ICDICER14[31] ,TINT63 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 30. " ICDICER14[30] ,TINT62 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 29. " ICDICER14[29] ,TINT61 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 28. " ICDICER14[28] ,TINT60 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 27. " ICDICER14[27] ,TINT59 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 26. " ICDICER14[26] ,TINT58 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 25. " ICDICER14[25] ,TINT57 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 24. " ICDICER14[24] ,TINT56 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 23. " ICDICER14[23] ,TINT55 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 22. " ICDICER14[22] ,TINT54 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 21. " ICDICER14[21] ,TINT53 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 20. " ICDICER14[20] ,TINT52 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 19. " ICDICER14[19] ,TINT51 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 18. " ICDICER14[18] ,TINT50 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 17. " ICDICER14[17] ,TINT49 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 16. " ICDICER14[16] ,TINT48 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 15. " ICDICER14[15] ,TINT47 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 14. " ICDICER14[14] ,TINT46 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 13. " ICDICER14[13] ,TINT45 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 12. " ICDICER14[12] ,TINT44 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 11. " ICDICER14[11] ,TINT43 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 10. " ICDICER14[10] ,TINT42 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 9. " ICDICER14[9] ,TINT41 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 8. " ICDICER14[8] ,TINT40 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 7. " ICDICER14[7] ,TINT39 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 6. " ICDICER14[6] ,TINT38 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 5. " ICDICER14[5] ,TINT37 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 4. " ICDICER14[4] ,TINT36 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 3. " ICDICER14[3] ,TINT35 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 2. " ICDICER14[2] ,TINT34 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 1. " ICDICER14[1] ,TINT33 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x38 0. " ICDICER14[0] ,TINT32 clear-enable" "Not cleared,Cleared"
|
|
line.long 0x3C "ICDICER15,Interrupt Clear-enable Register 15"
|
|
bitfld.long 0x3C 31. " ICDICER15[31] ,TINT95 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 30. " ICDICER15[30] ,TINT94 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 29. " ICDICER15[29] ,TINT93 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 28. " ICDICER15[28] ,TINT92 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 27. " ICDICER15[27] ,TINT91 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 26. " ICDICER15[26] ,TINT90 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 25. " ICDICER15[25] ,TINT89 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 24. " ICDICER15[24] ,TINT88 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 23. " ICDICER15[23] ,TINT87 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 22. " ICDICER15[22] ,TINT86 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 21. " ICDICER15[21] ,TINT85 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 20. " ICDICER15[20] ,TINT84 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 19. " ICDICER15[19] ,TINT83 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 18. " ICDICER15[18] ,TINT82 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 17. " ICDICER15[17] ,TINT81 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 16. " ICDICER15[16] ,TINT80 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 15. " ICDICER15[15] ,TINT79 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 14. " ICDICER15[14] ,TINT78 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 13. " ICDICER15[13] ,TINT77 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 12. " ICDICER15[12] ,TINT76 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 11. " ICDICER15[11] ,TINT75 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 10. " ICDICER15[10] ,TINT74 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 9. " ICDICER15[9] ,TINT73 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 8. " ICDICER15[8] ,TINT72 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 7. " ICDICER15[7] ,TINT71 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 6. " ICDICER15[6] ,TINT70 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 5. " ICDICER15[5] ,TINT69 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 4. " ICDICER15[4] ,TINT68 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 3. " ICDICER15[3] ,TINT67 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 2. " ICDICER15[2] ,TINT66 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 1. " ICDICER15[1] ,TINT65 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 0. " ICDICER15[0] ,TINT64 clear-enable" "Not cleared,Cleared"
|
|
line.long 0x40 "ICDICER16,Interrupt Clear-enable Register 16"
|
|
bitfld.long 0x40 31. " ICDICER16[31] ,TINT127 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 30. " ICDICER16[30] ,TINT126 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 29. " ICDICER16[29] ,TINT125 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 28. " ICDICER16[28] ,TINT124 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 27. " ICDICER16[27] ,TINT123 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 26. " ICDICER16[26] ,TINT122 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 25. " ICDICER16[25] ,TINT121 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 24. " ICDICER16[24] ,TINT120 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 23. " ICDICER16[23] ,TINT119 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 22. " ICDICER16[22] ,TINT118 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 21. " ICDICER16[21] ,TINT117 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 20. " ICDICER16[20] ,TINT116 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 19. " ICDICER16[19] ,TINT115 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 18. " ICDICER16[18] ,TINT114 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 17. " ICDICER16[17] ,TINT113 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 16. " ICDICER16[16] ,TINT112 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 15. " ICDICER16[15] ,TINT111 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 14. " ICDICER16[14] ,TINT110 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 13. " ICDICER16[13] ,TINT109 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 12. " ICDICER16[12] ,TINT108 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 11. " ICDICER16[11] ,TINT107 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 10. " ICDICER16[10] ,TINT106 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 9. " ICDICER16[9] ,TINT105 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 8. " ICDICER16[8] ,TINT104 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 7. " ICDICER16[7] ,TINT103 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 6. " ICDICER16[6] ,TINT102 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 5. " ICDICER16[5] ,TINT101 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 4. " ICDICER16[4] ,TINT100 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 3. " ICDICER16[3] ,TINT99 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 2. " ICDICER16[2] ,TINT98 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 1. " ICDICER16[1] ,TINT97 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x40 0. " ICDICER16[0] ,TINT96 clear-enable" "Not cleared,Cleared"
|
|
line.long 0x44 "ICDICER17,Interrupt Clear-enable Register 17"
|
|
bitfld.long 0x44 31. " ICDICER17[31] ,TINT159 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 30. " ICDICER17[30] ,TINT158 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 29. " ICDICER17[29] ,TINT157 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 28. " ICDICER17[28] ,TINT156 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 27. " ICDICER17[27] ,TINT155 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 26. " ICDICER17[26] ,TINT154 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 25. " ICDICER17[25] ,TINT153 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 24. " ICDICER17[24] ,TINT152 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 23. " ICDICER17[23] ,TINT151 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 22. " ICDICER17[22] ,TINT150 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 21. " ICDICER17[21] ,TINT149 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 20. " ICDICER17[20] ,TINT148 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 19. " ICDICER17[19] ,TINT147 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 18. " ICDICER17[18] ,TINT146 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 17. " ICDICER17[17] ,TINT145 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 16. " ICDICER17[16] ,TINT144 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 15. " ICDICER17[15] ,TINT143 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 14. " ICDICER17[14] ,TINT142 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 13. " ICDICER17[13] ,TINT141 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 12. " ICDICER17[12] ,TINT140 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 11. " ICDICER17[11] ,TINT139 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 10. " ICDICER17[10] ,TINT138 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 9. " ICDICER17[9] ,TINT137 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 8. " ICDICER17[8] ,TINT136 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 7. " ICDICER17[7] ,TINT135 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 6. " ICDICER17[6] ,TINT134 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 5. " ICDICER17[5] ,TINT133 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 4. " ICDICER17[4] ,TINT132 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 3. " ICDICER17[3] ,TINT131 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 2. " ICDICER17[2] ,TINT130 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 1. " ICDICER17[1] ,TINT129 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x44 0. " ICDICER17[0] ,TINT128 clear-enable" "Not cleared,Cleared"
|
|
line.long 0x48 "ICDICER18,Interrupt Clear-enable Register 18"
|
|
bitfld.long 0x48 10. " ICDICER18[10] ,TINT170 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x48 9. " ICDICER18[9] ,TINT169 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x48 8. " ICDICER18[8] ,TINT168 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x48 7. " ICDICER18[7] ,TINT167 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x48 6. " ICDICER18[6] ,TINT166 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x48 5. " ICDICER18[5] ,TINT165 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x48 4. " ICDICER18[4] ,TINT164 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x48 3. " ICDICER18[3] ,TINT163 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x48 2. " ICDICER18[2] ,TINT162 clear-enable" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x48 1. " ICDICER18[1] ,TINT161 clear-enable" "Not cleared,Cleared"
|
|
bitfld.long 0x48 0. " ICDICER18[0] ,TINT160 clear-enable" "Not cleared,Cleared"
|
|
tree.end
|
|
tree "Interrupt Set-pending Registers"
|
|
group.long 0x200++0x4B
|
|
line.long 0x00 "ICDISPR0,Interrupt Set-pending Register 0"
|
|
bitfld.long 0x00 19. " ICDISPR0[19] ,CTIIRQ0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " ICDISPR0[18] ,COMMTX0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " ICDISPR0[17] ,COMMRX0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ICDISPR0[16] ,PMUIRQ0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " ICDISPR0[15] ,GIC software interrupts set-pending 15" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " ICDISPR0[14] ,GIC software interrupts set-pending 14" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICDISPR0[13] ,GIC software interrupts set-pending 13" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " ICDISPR0[12] ,GIC software interrupts set-pending 12" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " ICDISPR0[11] ,GIC software interrupts set-pending 11" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ICDISPR0[10] ,GIC software interrupts set-pending 10" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " ICDISPR0[9] ,GIC software interrupts set-pending 9" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " ICDISPR0[8] ,GIC software interrupts set-pending 8" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICDISPR0[7] ,GIC software interrupts set-pending 7" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " ICDISPR0[6] ,GIC software interrupts set-pending 6" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " ICDISPR0[5] ,GIC software interrupts set-pending 5" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ICDISPR0[4] ,GIC software interrupts set-pending 4" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " ICDISPR0[3] ,GIC software interrupts set-pending 3" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " ICDISPR0[2] ,GIC software interrupts set-pending 2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICDISPR0[1] ,GIC software interrupts set-pending 1" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " ICDISPR0[0] ,GIC software interrupts set-pending 0" "Not pending,Pending"
|
|
line.long 0x04 "ICDISPR1,Interrupt Set-pending Register 1"
|
|
bitfld.long 0x04 25. " ICDISPR1[25] ,DMAERR set-pending" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " ICDISPR1[24] ,DMAINT15 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x04 23. " ICDISPR1[23] ,DMAINT14 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 22. " ICDISPR1[22] ,DMAINT13 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x04 21. " ICDISPR1[21] ,DMAINT12 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x04 20. " ICDISPR1[20] ,DMAINT11 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ICDISPR1[19] ,DMAINT10 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x04 18. " ICDISPR1[18] ,DMAINT9 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x04 17. " ICDISPR1[17] ,DMAINT8 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 16. " ICDISPR1[16] ,DMAINT7 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x04 15. " ICDISPR1[15] ,DMAINT6 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x04 14. " ICDISPR1[14] ,DMAINT5 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ICDISPR1[13] ,DMAINT4 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x04 12. " ICDISPR1[12] ,DMAINT3 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x04 11. " ICDISPR1[11] ,DMAINT2 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 10. " ICDISPR1[10] ,DMAINT1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x04 9. " ICDISPR1[9] ,DMAINT0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x04 8. " ICDISPR1[8] ,PL310ERR set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ICDISPR1[7] ,IRQ7 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x04 6. " ICDISPR1[6] ,IRQ6 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x04 5. " ICDISPR1[5] ,IRQ5 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 4. " ICDISPR1[4] ,IRQ4 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x04 3. " ICDISPR1[3] ,IRQ3 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x04 2. " ICDISPR1[2] ,IRQ2 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ICDISPR1[1] ,IRQ1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x04 0. " ICDISPR1[0] ,IRQ0 set-pending" "Not pending,Pending"
|
|
line.long 0x08 "ICDISPR2,Interrupt Set-pending Register 2"
|
|
bitfld.long 0x08 31. " ICDISPR2[31] ,OIR_VFIELD0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x08 30. " ICDISPR2[30] ,OIR_VSYNCERR0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x08 29. " ICDISPR2[29] ,OIR_LO_VSYNC0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 28. " ICDISPR2[28] ,OIR_VI_VSYNC0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x08 27. " ICDISPR2[27] ,S1_WLINE0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x08 26. " ICDISPR2[26] ,IV4_VBUFERR0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ICDISPR2[25] ,IV2_VBUFERR0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x08 24. " ICDISPR2[24] ,S1_VFIELD0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x08 23. " ICDISPR2[23] ,S1_VSYNCERR0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 22. " ICDISPR2[22] ,S1_LO_VSYNC0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x08 21. " ICDISPR2[21] ,S1_VI_VSYNC0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x08 20. " ICDISPR2[20] ,S0_WLINE0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ICDISPR2[19] ,IV6_VBUFERR0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x08 18. " ICDISPR2[18] ,IV5_VBUFERR0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x08 17. " ICDISPR2[17] ,IV3_VBUFERR0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 16. " ICDISPR2[16] ,IV1_VBUFERR0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x08 15. " ICDISPR2[15] ,S0_VFIELD0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x08 14. " ICDISPR2[14] ,GR3_VLINE0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ICDISPR2[13] ,S0_VSYNCERR0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x08 12. " ICDISPR2[12] ,S0_LO_VSYNC0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x08 11. " ICDISPR2[11] ,S0_VI_VSYNC0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 10. " ICDISPR2[10] ,USBI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x08 9. " ICDISPR2[9] ,USBI0 set-pending" "Not pending,Pending"
|
|
line.long 0x0C "ICDISPR3,Interrupt Set-pending Register 3"
|
|
bitfld.long 0x0C 31. " ICDISPR3[31] ,JDTI set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 30. " ICDISPR3[30] ,JEDI set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 29. " ICDISPR3[29] ,IMR2I1 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " ICDISPR3[28] ,IMR2I0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 27. " ICDISPR3[27] ,IMRDI set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 26. " ICDISPR3[26] ,OIR_WLINE1 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " ICDISPR3[25] ,IV8_VBUFERR1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 24. " ICDISPR3[24] ,IV7_VBUFERR1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 23. " ICDISPR3[23] ,OIR_VFIELD1 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " ICDISPR3[22] ,OIR_VLINE1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 21. " ICDISPR3[21] ,OIR_LO_VSYNC1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 20. " ICDISPR3[20] ,OIR_VI_VSYNC1 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " ICDISPR3[19] ,S1_WLINE1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 18. " ICDISPR3[18] ,IV4_VBUFERR1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 17. " ICDISPR3[17] ,IV2_VBUFERR1 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " ICDISPR3[16] ,S1_VFIELD1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 15. " ICDISPR3[15] ,S1_VSYNCERR1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 14. " ICDISPR3[14] ,S1_LO_VSYNC1 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " ICDISPR3[13] ,S1_VI_VSYNC1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 12. " ICDISPR3[12] ,S0_WLINE1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 11. " ICDISPR3[11] ,IV6_VBUFERR1 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " ICDISPR3[10] ,IV5_VBUFERR1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 9. " ICDISPR3[9] ,IV3_VBUFERR1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 8. " ICDISPR3[8] ,IV1_VBUFERR1 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " ICDISPR3[7] ,S0_VFIELD1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 6. " ICDISPR3[6] ,GR3_VLINE1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 5. " ICDISPR3[5] ,S0_VSYNCERR1 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " ICDISPR3[4] ,S0_LO_VSYNC1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 3. " ICDISPR3[3] ,S0_VI_VSYNC1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 2. " ICDISPR3[2] ,OIR_WLINE0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " ICDISPR3[1] ,IV8_VBUFERR0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x0C 0. " ICDISPR3[0] ,IV7_VBUFERR0 set-pending" "Not pending,Pending"
|
|
line.long 0x10 "ICDISPR4,Interrupt Set-pending Register 4"
|
|
bitfld.long 0x10 31. " ICDISPR4[31] ,TGI4A set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 30. " ICDISPR4[30] ,TGI3V set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 29. " ICDISPR4[29] ,TGI3D set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 28. " ICDISPR4[28] ,TGI3C set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 27. " ICDISPR4[27] ,TGI3B set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 26. " ICDISPR4[26] ,TGI3A set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ICDISPR4[25] ,TGI2U set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 24. " ICDISPR4[24] ,TGI2V set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 23. " ICDISPR4[23] ,TGI2B set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 22. " ICDISPR4[22] ,TGI2A set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 21. " ICDISPR4[21] ,TGI1U set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 20. " ICDISPR4[20] ,TGI1V set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ICDISPR4[19] ,TGI1B set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 18. " ICDISPR4[18] ,TGI1A set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 17. " ICDISPR4[17] ,TGI0F set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 16. " ICDISPR4[16] ,TGI0E set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 15. " ICDISPR4[15] ,TGI0V set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 14. " ICDISPR4[14] ,TGI0D set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ICDISPR4[13] ,TGI0C set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 12. " ICDISPR4[12] ,TGI0B set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 11. " ICDISPR4[11] ,TGI0A set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 10. " ICDISPR4[10] ,ITI set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 9. " ICDISPR4[9] ,WTOUT set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 8. " ICDISPR4[8] ,CMI set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ICDISPR4[7] ,OSTM1TINT set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 6. " ICDISPR4[6] ,OSTM0TINT set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 5. " ICDISPR4[5] ,INT3 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 4. " ICDISPR4[4] ,INT2 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 3. " ICDISPR4[3] ,INT1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 2. " ICDISPR4[2] ,INT0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ICDISPR4[1] ,CMP1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x10 0. " ICDISPR4[0] ,CMP0 set-pending" "Not pending,Pending"
|
|
line.long 0x14 "ICDISPR5,Interrupt Set-pending Register 5"
|
|
bitfld.long 0x14 31. " ICDISPR5[31] ,INTIICTI0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 30. " ICDISPR5[30] ,INTIICRI0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 29. " ICDISPR5[29] ,INTIICTEI0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x14 28. " ICDISPR5[28] ,SPDIFI set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 27. " ICDISPR5[27] ,SSITXI5 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 26. " ICDISPR5[26] ,SSIRXI5 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ICDISPR5[25] ,SSII5 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 24. " ICDISPR5[24] ,SSIRTI4 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 23. " ICDISPR5[23] ,SSII4 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x14 22. " ICDISPR5[22] ,SSITXI3 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 21. " ICDISPR5[21] ,SSIRXI3 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 20. " ICDISPR5[20] ,SSII3 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ICDISPR5[19] ,SSIRTI2 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 18. " ICDISPR5[18] ,SSII2 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 17. " ICDISPR5[17] ,SSITXI1 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x14 16. " ICDISPR5[16] ,SSIRXI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 15. " ICDISPR5[15] ,SSII1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 14. " ICDISPR5[14] ,SSITXI0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ICDISPR5[13] ,SSIRXI0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 12. " ICDISPR5[12] ,SSII0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 11. " ICDISPR5[11] ,LMTI set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x14 10. " ICDISPR5[10] ,ADI set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 9. " ICDISPR5[9] ,SGDEI3 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 8. " ICDISPR5[8] ,SGDEI2 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ICDISPR5[7] ,SGDEI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 6. " ICDISPR5[6] ,SGDEI0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 5. " ICDISPR5[5] ,CMI2 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x14 4. " ICDISPR5[4] ,CMI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 3. " ICDISPR5[3] ,TGI4V set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 2. " ICDISPR5[2] ,TGI4D set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ICDISPR5[1] ,TGI4C set-pending" "Not pending,Pending"
|
|
bitfld.long 0x14 0. " ICDISPR5[0] ,TGI4B set-pending" "Not pending,Pending"
|
|
line.long 0x18 "ICDISPR6,Interrupt Set-pending Register 6"
|
|
bitfld.long 0x18 31. " ICDISPR6[31] ,RXI0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 30. " ICDISPR6[30] ,ERI0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 29. " ICDISPR6[29] ,BRI0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x18 28. " ICDISPR6[28] ,INTIICTMOI3 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 27. " ICDISPR6[27] ,INTIICALI3 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 26. " ICDISPR6[26] ,INTIICNAKI3 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ICDISPR6[25] ,INTIICSTI3 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 24. " ICDISPR6[24] ,INTIICSPI3 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 23. " ICDISPR6[23] ,INTIICTI3 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x18 22. " ICDISPR6[22] ,INTIICRI3 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 21. " ICDISPR6[21] ,INTIICTEI3 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 20. " ICDISPR6[20] ,INTIICTMOI2 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ICDISPR6[19] ,INTIICALI2 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 18. " ICDISPR6[18] ,INTIICNAKI2 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 17. " ICDISPR6[17] ,INTIICSTI2 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x18 16. " ICDISPR6[16] ,INTIICSPI2 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 15. " ICDISPR6[15] ,INTIICTI2 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 14. " ICDISPR6[14] ,INTIICRI2 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ICDISPR6[13] ,INTIICTEI2 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 12. " ICDISPR6[12] ,INTIICTMOI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 11. " ICDISPR6[11] ,INTIICALI1 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x18 10. " ICDISPR6[10] ,INTIICNAKI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 9. " ICDISPR6[9] ,INTIICSTI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 8. " ICDISPR6[8] ,INTIICSPI1 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ICDISPR6[7] ,INTIICTI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 6. " ICDISPR6[6] ,INTIICRI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 5. " ICDISPR6[5] ,INTIICTEI1 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x18 4. " ICDISPR6[4] ,INTIICTMOI0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 3. " ICDISPR6[3] ,INTIICALI0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 2. " ICDISPR6[2] ,INTIICNAKI0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ICDISPR6[1] ,INTIICSTI0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x18 0. " ICDISPR6[0] ,INTIICSPI0 set-pending" "Not pending,Pending"
|
|
line.long 0x1C "ICDISPR7,Interrupt Set-pending Register 7"
|
|
bitfld.long 0x1C 31. " ICDISPR7[31] ,INTRCAN0REC set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 30. " ICDISPR7[30] ,INTRCANGRECC set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 29. " ICDISPR7[29] ,INTRCANGERR set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x1C 28. " ICDISPR7[28] ,TXI7 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 27. " ICDISPR7[27] ,RXI7 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 26. " ICDISPR7[26] ,ERI7 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x1C 25. " ICDISPR7[25] ,BRI7 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 24. " ICDISPR7[24] ,TXI6 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 23. " ICDISPR7[23] ,RXI6 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x1C 22. " ICDISPR7[22] ,ERI6 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 21. " ICDISPR7[21] ,BRI6 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 20. " ICDISPR7[20] ,TXI5 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x1C 19. " ICDISPR7[19] ,RXI5 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 18. " ICDISPR7[18] ,ERI5 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 17. " ICDISPR7[17] ,BRI5 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x1C 16. " ICDISPR7[16] ,TXI4 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 15. " ICDISPR7[15] ,RXI4 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 14. " ICDISPR7[14] ,ERI4 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x1C 13. " ICDISPR7[13] ,BRI4 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 12. " ICDISPR7[12] ,TXI3 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 11. " ICDISPR7[11] ,RXI3 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x1C 10. " ICDISPR7[10] ,ERI3 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 9. " ICDISPR7[9] ,BRI3 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 8. " ICDISPR7[8] ,TXI2 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " ICDISPR7[7] ,RXI2 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 6. " ICDISPR7[6] ,ERI2 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 5. " ICDISPR7[5] ,BRI2 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x1C 4. " ICDISPR7[4] ,TXI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 3. " ICDISPR7[3] ,RXI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 2. " ICDISPR7[2] ,ERI1 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x1C 1. " ICDISPR7[1] ,BRI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x1C 0. " ICDISPR7[0] ,TXI0 set-pending" "Not pending,Pending"
|
|
line.long 0x20 "ICDISPR8,Interrupt Set-pending Register 8"
|
|
bitfld.long 0x20 31. " ICDISPR8[31] ,IEBBTSTA set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 30. " ICDISPR8[30] ,IEBBTERR set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 29. " ICDISPR8[29] ,IEBBTD set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x20 28. " ICDISPR8[28] ,SPTI4 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 27. " ICDISPR8[27] ,SPRI4 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 26. " ICDISPR8[26] ,SPEI4 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x20 25. " ICDISPR8[25] ,SPTI3 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 24. " ICDISPR8[24] ,SPRI3 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 23. " ICDISPR8[23] ,SPEI3 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x20 22. " ICDISPR8[22] ,SPTI2 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 21. " ICDISPR8[21] ,SPRI2 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 20. " ICDISPR8[20] ,SPEI2 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x20 19. " ICDISPR8[19] ,SPTI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 18. " ICDISPR8[18] ,SPRI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 17. " ICDISPR8[17] ,SPEI1 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x20 16. " ICDISPR8[16] ,SPTI0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 15. " ICDISPR8[15] ,SPRI0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 14. " ICDISPR8[14] ,SPEI0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x20 13. " ICDISPR8[13] ,INTRCAN4TRX set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 12. " ICDISPR8[12] ,INTRCAN4ERR set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 11. " ICDISPR8[11] ,INTRCAN4REC set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x20 10. " ICDISPR8[10] ,INTRCAN3TRX set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 9. " ICDISPR8[9] ,INTRCAN3ERR set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 8. " ICDISPR8[8] ,INTRCAN3REC set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x20 7. " ICDISPR8[7] ,INTRCAN2TRX set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 6. " ICDISPR8[6] ,INTRCAN2ERR set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 5. " ICDISPR8[5] ,INTRCAN2REC set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x20 4. " ICDISPR8[4] ,INTRCAN1TRX set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 3. " ICDISPR8[3] ,INTRCAN1ERR set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 2. " ICDISPR8[2] ,INTRCAN1REC set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x20 1. " ICDISPR8[1] ,INTRCAN0TRX set-pending" "Not pending,Pending"
|
|
bitfld.long 0x20 0. " ICDISPR8[0] ,INTRCAN0ERR set-pending" "Not pending,Pending"
|
|
line.long 0x24 "ICDISPR9,Interrupt Set-pending Register 9"
|
|
bitfld.long 0x24 31. " ICDISPR9[31] ,SCUFUI2 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 30. " ICDISPR9[30] ,SCUFUI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 29. " ICDISPR9[29] ,SCUFUI0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x24 28. " ICDISPR9[28] ,SCUFDI3 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 27. " ICDISPR9[27] ,SCUFDI2 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 26. " ICDISPR9[26] ,SCUFDI1 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x24 25. " ICDISPR9[25] ,SCUFDI0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 24. " ICDISPR9[24] ,SCUAI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 23. " ICDISPR9[23] ,SCUAI0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x24 22. " ICDISPR9[22] ,CUP set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 21. " ICDISPR9[21] ,PRD set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 20. " ICDISPR9[20] ,ARM set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x24 19. " ICDISPR9[19] ,SDHI1_1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 18. " ICDISPR9[18] ,SDHI1_0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 17. " ICDISPR9[17] ,SDHI1_3 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x24 16. " ICDISPR9[16] ,SDHI0_1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 15. " ICDISPR9[15] ,SDHI0_0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 14. " ICDISPR9[14] ,SDHI0_3 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x24 13. " ICDISPR9[13] ,MMC2 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 12. " ICDISPR9[12] ,MMC1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 11. " ICDISPR9[11] ,MMC0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x24 10. " ICDISPR9[10] ,FLTREQ1I set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 9. " ICDISPR9[9] ,FLTREQ0I set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 8. " ICDISPR9[8] ,FLTENDI set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x24 7. " ICDISPR9[7] ,STERB/BTOERB set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 6. " ICDISPR9[6] ,IREADY set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 5. " ICDISPR9[5] ,IBUF set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x24 4. " ICDISPR9[4] ,ISEC set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 3. " ICDISPR9[3] ,ITARG set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 2. " ICDISPR9[2] ,IERR set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x24 1. " ICDISPR9[1] ,ISY set-pending" "Not pending,Pending"
|
|
bitfld.long 0x24 0. " ICDISPR9[0] ,IEBBTV set-pending" "Not pending,Pending"
|
|
line.long 0x28 "ICDISPR10,Interrupt Set-pending Register 10"
|
|
bitfld.long 0x28 31. " ICDISPR10[31] ,ERI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x28 30. " ICDISPR10[30] ,TEI0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x28 29. " ICDISPR10[29] ,TXI0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x28 28. " ICDISPR10[28] ,RXI0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x28 27. " ICDISPR10[27] ,ERI0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x28 18. " ICDISPR10[18] ,LINI1_INT_M set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x28 17. " ICDISPR10[17] ,LINI1_INT_S set-pending" "Not pending,Pending"
|
|
bitfld.long 0x28 16. " ICDISPR10[16] ,LINI1_INT_R set-pending" "Not pending,Pending"
|
|
bitfld.long 0x28 15. " ICDISPR10[15] ,LINI1_INT_T set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x28 14. " ICDISPR10[14] ,LINI0_INT_M set-pending" "Not pending,Pending"
|
|
bitfld.long 0x28 13. " ICDISPR10[13] ,LINI0_INT_S set-pending" "Not pending,Pending"
|
|
bitfld.long 0x28 12. " ICDISPR10[12] ,LINI0_INT_R set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x28 11. " ICDISPR10[11] ,LINI0_INT_T set-pending" "Not pending,Pending"
|
|
bitfld.long 0x28 8. " ICDISPR10[8] ,DRC1 Channel 1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x28 7. " ICDISPR10[7] ,DRC1 Channel 0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x28 6. " ICDISPR10[6] ,MLB_SINT set-pending" "Not pending,Pending"
|
|
bitfld.long 0x28 5. " ICDISPR10[5] ,MLB_CINT set-pending" "Not pending,Pending"
|
|
bitfld.long 0x28 4. " ICDISPR10[4] ,SCUDVI3 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x28 3. " ICDISPR10[3] ,SCUDVI2 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x28 2. " ICDISPR10[2] ,SCUDVI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x28 1. " ICDISPR10[1] ,SCUDVI0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x28 0. " ICDISPR10[0] ,SCUFUI3 set-pending" "Not pending,Pending"
|
|
line.long 0x2C "ICDISPR11,Interrupt Set-pending Register 11"
|
|
bitfld.long 0x2C 31. " ICDISPR11[31] ,X2HPERI1_ERRINT set-pending" "Not pending,Pending"
|
|
bitfld.long 0x2C 30. " ICDISPR11[30] ,H2XIC1_ERRINT set-pending" "Not pending,Pending"
|
|
bitfld.long 0x2C 29. " ICDISPR11[29] ,H2XMLB_ERRINT set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x2C 12. " ICDISPR11[12] ,CEUI set-pending" "Not pending,Pending"
|
|
bitfld.long 0x2C 7. " ICDISPR11[7] ,ETHERI set-pending" "Not pending,Pending"
|
|
bitfld.long 0x2C 6. " ICDISPR11[6] ,AVBI_MAC set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x2C 5. " ICDISPR11[5] ,AVBI_MANAGE set-pending" "Not pending,Pending"
|
|
bitfld.long 0x2C 4. " ICDISPR11[4] ,AVBI_ERROR set-pending" "Not pending,Pending"
|
|
bitfld.long 0x2C 3. " ICDISPR11[3] ,AVBI_DATA set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x2C 2. " ICDISPR11[2] ,TEI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x2C 1. " ICDISPR11[1] ,TXI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x2C 0. " ICDISPR11[0] ,RXI1 set-pending" "Not pending,Pending"
|
|
line.long 0x30 "ICDISPR12,Interrupt Set-pending Register 12"
|
|
bitfld.long 0x30 14. " ICDISPR12[14] ,PFVEI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x30 13. " ICDISPR12[13] ,OFFI1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x30 12. " ICDISPR12[12] ,IFEI1 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x30 11. " ICDISPR12[11] ,PFVEI0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x30 10. " ICDISPR12[10] ,OFFI0 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x30 9. " ICDISPR12[9] ,IFEI0 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x30 8. " ICDISPR12[8] ,PRRI set-pending" "Not pending,Pending"
|
|
bitfld.long 0x30 7. " ICDISPR12[7] ,X2HSPI2_ERRINT set-pending" "Not pending,Pending"
|
|
bitfld.long 0x30 6. " ICDISPR12[6] ,X2HSPI1_ERRINT set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x30 5. " ICDISPR12[5] ,X2HBSC_ERRINT set-pending" "Not pending,Pending"
|
|
bitfld.long 0x30 4. " ICDISPR12[4] ,X2HDBGR_ERRINT set-pending" "Not pending,Pending"
|
|
bitfld.long 0x30 3. " ICDISPR12[3] ,X2HPERI67_ERRINT set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x30 2. " ICDISPR12[2] ,X2HPERI5_ERRINT set-pending" "Not pending,Pending"
|
|
bitfld.long 0x30 1. " ICDISPR12[1] ,X2HPERI34_ERRINT set-pending" "Not pending,Pending"
|
|
bitfld.long 0x30 0. " ICDISPR12[0] ,X2HPERI2_ERRINT set-pending" "Not pending,Pending"
|
|
line.long 0x34 "ICDISPR13,Interrupt Set-pending Register 13"
|
|
bitfld.long 0x34 31. " ICDISPR13[31] ,TINT31 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 30. " ICDISPR13[30] ,TINT30 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 29. " ICDISPR13[29] ,TINT29 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x34 28. " ICDISPR13[28] ,TINT28 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 27. " ICDISPR13[27] ,TINT27 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 26. " ICDISPR13[26] ,TINT26 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x34 25. " ICDISPR13[25] ,TINT25 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 24. " ICDISPR13[24] ,TINT24 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 23. " ICDISPR13[23] ,TINT23 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x34 22. " ICDISPR13[22] ,TINT22 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 21. " ICDISPR13[21] ,TINT21 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 20. " ICDISPR13[20] ,TINT20 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x34 19. " ICDISPR13[19] ,TINT19 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 18. " ICDISPR13[18] ,TINT18 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 17. " ICDISPR13[17] ,TINT17 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x34 16. " ICDISPR13[16] ,TINT16 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 15. " ICDISPR13[15] ,TINT15 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 14. " ICDISPR13[14] ,TINT14 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x34 13. " ICDISPR13[13] ,TINT13 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 12. " ICDISPR13[12] ,TINT12 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 11. " ICDISPR13[11] ,TINT11 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x34 10. " ICDISPR13[10] ,TINT10 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 9. " ICDISPR13[9] ,TINT9 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 8. " ICDISPR13[8] ,TINT8 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x34 7. " ICDISPR13[7] ,TINT7 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 6. " ICDISPR13[6] ,TINT6 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 5. " ICDISPR13[5] ,TINT5 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x34 4. " ICDISPR13[4] ,TINT4 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 3. " ICDISPR13[3] ,TINT3 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 2. " ICDISPR13[2] ,TINT2 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x34 1. " ICDISPR13[1] ,TINT1 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x34 0. " ICDISPR13[0] ,TINT0 set-pending" "Not pending,Pending"
|
|
line.long 0x38 "ICDISPR14,Interrupt Set-pending Register 14"
|
|
bitfld.long 0x38 31. " ICDISPR14[31] ,TINT63 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 30. " ICDISPR14[30] ,TINT62 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 29. " ICDISPR14[29] ,TINT61 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x38 28. " ICDISPR14[28] ,TINT60 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 27. " ICDISPR14[27] ,TINT59 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 26. " ICDISPR14[26] ,TINT58 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x38 25. " ICDISPR14[25] ,TINT57 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 24. " ICDISPR14[24] ,TINT56 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 23. " ICDISPR14[23] ,TINT55 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x38 22. " ICDISPR14[22] ,TINT54 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 21. " ICDISPR14[21] ,TINT53 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 20. " ICDISPR14[20] ,TINT52 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x38 19. " ICDISPR14[19] ,TINT51 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 18. " ICDISPR14[18] ,TINT50 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 17. " ICDISPR14[17] ,TINT49 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x38 16. " ICDISPR14[16] ,TINT48 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 15. " ICDISPR14[15] ,TINT47 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 14. " ICDISPR14[14] ,TINT46 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x38 13. " ICDISPR14[13] ,TINT45 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 12. " ICDISPR14[12] ,TINT44 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 11. " ICDISPR14[11] ,TINT43 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x38 10. " ICDISPR14[10] ,TINT42 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 9. " ICDISPR14[9] ,TINT41 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 8. " ICDISPR14[8] ,TINT40 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x38 7. " ICDISPR14[7] ,TINT39 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 6. " ICDISPR14[6] ,TINT38 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 5. " ICDISPR14[5] ,TINT37 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x38 4. " ICDISPR14[4] ,TINT36 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 3. " ICDISPR14[3] ,TINT35 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 2. " ICDISPR14[2] ,TINT34 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x38 1. " ICDISPR14[1] ,TINT33 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x38 0. " ICDISPR14[0] ,TINT32 set-pending" "Not pending,Pending"
|
|
line.long 0x3C "ICDISPR15,Interrupt Set-pending Register 15"
|
|
bitfld.long 0x3C 31. " ICDISPR15[31] ,TINT95 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 30. " ICDISPR15[30] ,TINT94 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 29. " ICDISPR15[29] ,TINT93 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x3C 28. " ICDISPR15[28] ,TINT92 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 27. " ICDISPR15[27] ,TINT91 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 26. " ICDISPR15[26] ,TINT90 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x3C 25. " ICDISPR15[25] ,TINT89 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 24. " ICDISPR15[24] ,TINT88 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 23. " ICDISPR15[23] ,TINT87 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x3C 22. " ICDISPR15[22] ,TINT86 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 21. " ICDISPR15[21] ,TINT85 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 20. " ICDISPR15[20] ,TINT84 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x3C 19. " ICDISPR15[19] ,TINT83 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 18. " ICDISPR15[18] ,TINT82 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 17. " ICDISPR15[17] ,TINT81 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x3C 16. " ICDISPR15[16] ,TINT80 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 15. " ICDISPR15[15] ,TINT79 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 14. " ICDISPR15[14] ,TINT78 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x3C 13. " ICDISPR15[13] ,TINT77 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 12. " ICDISPR15[12] ,TINT76 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 11. " ICDISPR15[11] ,TINT75 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x3C 10. " ICDISPR15[10] ,TINT74 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 9. " ICDISPR15[9] ,TINT73 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 8. " ICDISPR15[8] ,TINT72 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x3C 7. " ICDISPR15[7] ,TINT71 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 6. " ICDISPR15[6] ,TINT70 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 5. " ICDISPR15[5] ,TINT69 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x3C 4. " ICDISPR15[4] ,TINT68 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 3. " ICDISPR15[3] ,TINT67 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 2. " ICDISPR15[2] ,TINT66 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x3C 1. " ICDISPR15[1] ,TINT65 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x3C 0. " ICDISPR15[0] ,TINT64 set-pending" "Not pending,Pending"
|
|
line.long 0x40 "ICDISPR16,Interrupt Set-pending Register 16"
|
|
bitfld.long 0x40 31. " ICDISPR16[31] ,TINT127 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 30. " ICDISPR16[30] ,TINT126 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 29. " ICDISPR16[29] ,TINT125 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x40 28. " ICDISPR16[28] ,TINT124 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 27. " ICDISPR16[27] ,TINT123 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 26. " ICDISPR16[26] ,TINT122 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x40 25. " ICDISPR16[25] ,TINT121 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 24. " ICDISPR16[24] ,TINT120 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 23. " ICDISPR16[23] ,TINT119 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x40 22. " ICDISPR16[22] ,TINT118 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 21. " ICDISPR16[21] ,TINT117 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 20. " ICDISPR16[20] ,TINT116 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x40 19. " ICDISPR16[19] ,TINT115 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 18. " ICDISPR16[18] ,TINT114 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 17. " ICDISPR16[17] ,TINT113 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x40 16. " ICDISPR16[16] ,TINT112 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 15. " ICDISPR16[15] ,TINT111 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 14. " ICDISPR16[14] ,TINT110 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x40 13. " ICDISPR16[13] ,TINT109 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 12. " ICDISPR16[12] ,TINT108 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 11. " ICDISPR16[11] ,TINT107 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x40 10. " ICDISPR16[10] ,TINT106 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 9. " ICDISPR16[9] ,TINT105 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 8. " ICDISPR16[8] ,TINT104 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x40 7. " ICDISPR16[7] ,TINT103 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 6. " ICDISPR16[6] ,TINT102 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 5. " ICDISPR16[5] ,TINT101 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x40 4. " ICDISPR16[4] ,TINT100 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 3. " ICDISPR16[3] ,TINT99 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 2. " ICDISPR16[2] ,TINT98 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x40 1. " ICDISPR16[1] ,TINT97 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x40 0. " ICDISPR16[0] ,TINT96 set-pending" "Not pending,Pending"
|
|
line.long 0x44 "ICDISPR17,Interrupt Set-pending Register 17"
|
|
bitfld.long 0x44 31. " ICDISPR17[31] ,TINT159 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 30. " ICDISPR17[30] ,TINT158 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 29. " ICDISPR17[29] ,TINT157 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x44 28. " ICDISPR17[28] ,TINT156 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 27. " ICDISPR17[27] ,TINT155 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 26. " ICDISPR17[26] ,TINT154 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x44 25. " ICDISPR17[25] ,TINT153 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 24. " ICDISPR17[24] ,TINT152 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 23. " ICDISPR17[23] ,TINT151 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x44 22. " ICDISPR17[22] ,TINT150 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 21. " ICDISPR17[21] ,TINT149 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 20. " ICDISPR17[20] ,TINT148 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x44 19. " ICDISPR17[19] ,TINT147 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 18. " ICDISPR17[18] ,TINT146 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 17. " ICDISPR17[17] ,TINT145 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x44 16. " ICDISPR17[16] ,TINT144 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 15. " ICDISPR17[15] ,TINT143 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 14. " ICDISPR17[14] ,TINT142 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x44 13. " ICDISPR17[13] ,TINT141 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 12. " ICDISPR17[12] ,TINT140 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 11. " ICDISPR17[11] ,TINT139 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x44 10. " ICDISPR17[10] ,TINT138 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 9. " ICDISPR17[9] ,TINT137 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 8. " ICDISPR17[8] ,TINT136 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x44 7. " ICDISPR17[7] ,TINT135 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 6. " ICDISPR17[6] ,TINT134 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 5. " ICDISPR17[5] ,TINT133 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x44 4. " ICDISPR17[4] ,TINT132 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 3. " ICDISPR17[3] ,TINT131 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 2. " ICDISPR17[2] ,TINT130 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x44 1. " ICDISPR17[1] ,TINT129 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x44 0. " ICDISPR17[0] ,TINT128 set-pending" "Not pending,Pending"
|
|
line.long 0x48 "ICDISPR18,Interrupt Set-pending Register 18"
|
|
bitfld.long 0x48 10. " ICDISPR18[10] ,TINT170 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x48 9. " ICDISPR18[9] ,TINT169 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x48 8. " ICDISPR18[8] ,TINT168 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x48 7. " ICDISPR18[7] ,TINT167 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x48 6. " ICDISPR18[6] ,TINT166 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x48 5. " ICDISPR18[5] ,TINT165 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x48 4. " ICDISPR18[4] ,TINT164 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x48 3. " ICDISPR18[3] ,TINT163 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x48 2. " ICDISPR18[2] ,TINT162 set-pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x48 1. " ICDISPR18[1] ,TINT161 set-pending" "Not pending,Pending"
|
|
bitfld.long 0x48 0. " ICDISPR18[0] ,TINT160 set-pending" "Not pending,Pending"
|
|
tree.end
|
|
tree "Interrupt Clear-pending Registers"
|
|
group.long 0x280++0x4B
|
|
line.long 0x00 "ICDICPR0,Interrupt Clear-pending Register 0"
|
|
bitfld.long 0x00 19. " ICDICPR0[19] ,CTIIRQ0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x00 18. " ICDICPR0[18] ,COMMTX0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x00 17. " ICDICPR0[17] ,COMMRX0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ICDICPR0[16] ,PMUIRQ0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x00 15. " ICDICPR0[15] ,GIC software interrupts clear-pending 15" "Not cleared,Cleared"
|
|
bitfld.long 0x00 14. " ICDICPR0[14] ,GIC software interrupts clear-pending 14" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICDICPR0[13] ,GIC software interrupts clear-pending 13" "Not cleared,Cleared"
|
|
bitfld.long 0x00 12. " ICDICPR0[12] ,GIC software interrupts clear-pending 12" "Not cleared,Cleared"
|
|
bitfld.long 0x00 11. " ICDICPR0[11] ,GIC software interrupts clear-pending 11" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ICDICPR0[10] ,GIC software interrupts clear-pending 10" "Not cleared,Cleared"
|
|
bitfld.long 0x00 9. " ICDICPR0[9] ,GIC software interrupts clear-pending 9" "Not cleared,Cleared"
|
|
bitfld.long 0x00 8. " ICDICPR0[8] ,GIC software interrupts clear-pending 8" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICDICPR0[7] ,GIC software interrupts clear-pending 7" "Not cleared,Cleared"
|
|
bitfld.long 0x00 6. " ICDICPR0[6] ,GIC software interrupts clear-pending 6" "Not cleared,Cleared"
|
|
bitfld.long 0x00 5. " ICDICPR0[5] ,GIC software interrupts clear-pending 5" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ICDICPR0[4] ,GIC software interrupts clear-pending 4" "Not cleared,Cleared"
|
|
bitfld.long 0x00 3. " ICDICPR0[3] ,GIC software interrupts clear-pending 3" "Not cleared,Cleared"
|
|
bitfld.long 0x00 2. " ICDICPR0[2] ,GIC software interrupts clear-pending 2" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICDICPR0[1] ,GIC software interrupts clear-pending 1" "Not cleared,Cleared"
|
|
bitfld.long 0x00 0. " ICDICPR0[0] ,GIC software interrupts clear-pending 0" "Not cleared,Cleared"
|
|
line.long 0x04 "ICDICPR1,Interrupt Clear-pending Register 1"
|
|
bitfld.long 0x04 25. " ICDICPR1[25] ,DMAERR clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x04 24. " ICDICPR1[24] ,DMAINT15 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x04 23. " ICDICPR1[23] ,DMAINT14 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 22. " ICDICPR1[22] ,DMAINT13 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x04 21. " ICDICPR1[21] ,DMAINT12 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x04 20. " ICDICPR1[20] ,DMAINT11 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ICDICPR1[19] ,DMAINT10 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x04 18. " ICDICPR1[18] ,DMAINT9 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x04 17. " ICDICPR1[17] ,DMAINT8 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 16. " ICDICPR1[16] ,DMAINT7 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x04 15. " ICDICPR1[15] ,DMAINT6 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x04 14. " ICDICPR1[14] ,DMAINT5 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ICDICPR1[13] ,DMAINT4 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x04 12. " ICDICPR1[12] ,DMAINT3 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x04 11. " ICDICPR1[11] ,DMAINT2 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 10. " ICDICPR1[10] ,DMAINT1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x04 9. " ICDICPR1[9] ,DMAINT0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x04 8. " ICDICPR1[8] ,PL310ERR clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ICDICPR1[7] ,IRQ7 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x04 6. " ICDICPR1[6] ,IRQ6 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x04 5. " ICDICPR1[5] ,IRQ5 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 4. " ICDICPR1[4] ,IRQ4 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x04 3. " ICDICPR1[3] ,IRQ3 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x04 2. " ICDICPR1[2] ,IRQ2 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ICDICPR1[1] ,IRQ1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x04 0. " ICDICPR1[0] ,IRQ0 clear-pending" "Not cleared,Cleared"
|
|
line.long 0x08 "ICDICPR2,Interrupt Clear-pending Register 2"
|
|
bitfld.long 0x08 31. " ICDICPR2[31] ,OIR_VFIELD0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x08 30. " ICDICPR2[30] ,OIR_VSYNCERR0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x08 29. " ICDICPR2[29] ,OIR_LO_VSYNC0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 28. " ICDICPR2[28] ,OIR_VI_VSYNC0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x08 27. " ICDICPR2[27] ,S1_WLINE0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x08 26. " ICDICPR2[26] ,IV4_VBUFERR0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ICDICPR2[25] ,IV2_VBUFERR0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x08 24. " ICDICPR2[24] ,S1_VFIELD0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x08 23. " ICDICPR2[23] ,S1_VSYNCERR0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 22. " ICDICPR2[22] ,S1_LO_VSYNC0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x08 21. " ICDICPR2[21] ,S1_VI_VSYNC0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x08 20. " ICDICPR2[20] ,S0_WLINE0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ICDICPR2[19] ,IV6_VBUFERR0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x08 18. " ICDICPR2[18] ,IV5_VBUFERR0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x08 17. " ICDICPR2[17] ,IV3_VBUFERR0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 16. " ICDICPR2[16] ,IV1_VBUFERR0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x08 15. " ICDICPR2[15] ,S0_VFIELD0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x08 14. " ICDICPR2[14] ,GR3_VLINE0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ICDICPR2[13] ,S0_VSYNCERR0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x08 12. " ICDICPR2[12] ,S0_LO_VSYNC0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x08 11. " ICDICPR2[11] ,S0_VI_VSYNC0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 10. " ICDICPR2[10] ,USBI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x08 9. " ICDICPR2[9] ,USBI0 clear-pending" "Not cleared,Cleared"
|
|
line.long 0x0C "ICDICPR3,Interrupt Clear-pending Register 3"
|
|
bitfld.long 0x0C 31. " ICDICPR3[31] ,JDTI clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 30. " ICDICPR3[30] ,JEDI clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 29. " ICDICPR3[29] ,IMR2I1 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " ICDICPR3[28] ,IMR2I0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 27. " ICDICPR3[27] ,IMRDI clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 26. " ICDICPR3[26] ,OIR_WLINE1 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " ICDICPR3[25] ,IV8_VBUFERR1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 24. " ICDICPR3[24] ,IV7_VBUFERR1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 23. " ICDICPR3[23] ,OIR_VFIELD1 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " ICDICPR3[22] ,OIR_VLINE1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 21. " ICDICPR3[21] ,OIR_LO_VSYNC1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 20. " ICDICPR3[20] ,OIR_VI_VSYNC1 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " ICDICPR3[19] ,S1_WLINE1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 18. " ICDICPR3[18] ,IV4_VBUFERR1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 17. " ICDICPR3[17] ,IV2_VBUFERR1 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " ICDICPR3[16] ,S1_VFIELD1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 15. " ICDICPR3[15] ,S1_VSYNCERR1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 14. " ICDICPR3[14] ,S1_LO_VSYNC1 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " ICDICPR3[13] ,S1_VI_VSYNC1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 12. " ICDICPR3[12] ,S0_WLINE1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 11. " ICDICPR3[11] ,IV6_VBUFERR1 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " ICDICPR3[10] ,IV5_VBUFERR1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 9. " ICDICPR3[9] ,IV3_VBUFERR1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 8. " ICDICPR3[8] ,IV1_VBUFERR1 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " ICDICPR3[7] ,S0_VFIELD1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 6. " ICDICPR3[6] ,GR3_VLINE1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 5. " ICDICPR3[5] ,S0_VSYNCERR1 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " ICDICPR3[4] ,S0_LO_VSYNC1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 3. " ICDICPR3[3] ,S0_VI_VSYNC1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 2. " ICDICPR3[2] ,OIR_WLINE0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " ICDICPR3[1] ,IV8_VBUFERR0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x0C 0. " ICDICPR3[0] ,IV7_VBUFERR0 clear-pending" "Not cleared,Cleared"
|
|
line.long 0x10 "ICDICPR4,Interrupt Clear-pending Register 4"
|
|
bitfld.long 0x10 31. " ICDICPR4[31] ,TGI4A clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 30. " ICDICPR4[30] ,TGI3V clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 29. " ICDICPR4[29] ,TGI3D clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 28. " ICDICPR4[28] ,TGI3C clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 27. " ICDICPR4[27] ,TGI3B clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 26. " ICDICPR4[26] ,TGI3A clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ICDICPR4[25] ,TGI2U clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 24. " ICDICPR4[24] ,TGI2V clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 23. " ICDICPR4[23] ,TGI2B clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 22. " ICDICPR4[22] ,TGI2A clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 21. " ICDICPR4[21] ,TGI1U clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 20. " ICDICPR4[20] ,TGI1V clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ICDICPR4[19] ,TGI1B clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 18. " ICDICPR4[18] ,TGI1A clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 17. " ICDICPR4[17] ,TGI0F clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 16. " ICDICPR4[16] ,TGI0E clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 15. " ICDICPR4[15] ,TGI0V clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 14. " ICDICPR4[14] ,TGI0D clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ICDICPR4[13] ,TGI0C clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 12. " ICDICPR4[12] ,TGI0B clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 11. " ICDICPR4[11] ,TGI0A clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 10. " ICDICPR4[10] ,ITI clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 9. " ICDICPR4[9] ,WTOUT clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 8. " ICDICPR4[8] ,CMI clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ICDICPR4[7] ,OSTM1TINT clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 6. " ICDICPR4[6] ,OSTM0TINT clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 5. " ICDICPR4[5] ,INT3 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 4. " ICDICPR4[4] ,INT2 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 3. " ICDICPR4[3] ,INT1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 2. " ICDICPR4[2] ,INT0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ICDICPR4[1] ,CMP1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x10 0. " ICDICPR4[0] ,CMP0 clear-pending" "Not cleared,Cleared"
|
|
line.long 0x14 "ICDICPR5,Interrupt Clear-pending Register 5"
|
|
bitfld.long 0x14 31. " ICDICPR5[31] ,INTIICTI0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 30. " ICDICPR5[30] ,INTIICRI0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 29. " ICDICPR5[29] ,INTIICTEI0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 28. " ICDICPR5[28] ,SPDIFI clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 27. " ICDICPR5[27] ,SSITXI5 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 26. " ICDICPR5[26] ,SSIRXI5 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ICDICPR5[25] ,SSII5 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 24. " ICDICPR5[24] ,SSIRTI4 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 23. " ICDICPR5[23] ,SSII4 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 22. " ICDICPR5[22] ,SSITXI3 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 21. " ICDICPR5[21] ,SSIRXI3 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 20. " ICDICPR5[20] ,SSII3 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ICDICPR5[19] ,SSIRTI2 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 18. " ICDICPR5[18] ,SSII2 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 17. " ICDICPR5[17] ,SSITXI1 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 16. " ICDICPR5[16] ,SSIRXI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 15. " ICDICPR5[15] ,SSII1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 14. " ICDICPR5[14] ,SSITXI0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ICDICPR5[13] ,SSIRXI0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 12. " ICDICPR5[12] ,SSII0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 11. " ICDICPR5[11] ,LMTI clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 10. " ICDICPR5[10] ,ADI clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 9. " ICDICPR5[9] ,SGDEI3 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 8. " ICDICPR5[8] ,SGDEI2 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ICDICPR5[7] ,SGDEI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 6. " ICDICPR5[6] ,SGDEI0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 5. " ICDICPR5[5] ,CMI2 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 4. " ICDICPR5[4] ,CMI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 3. " ICDICPR5[3] ,TGI4V clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 2. " ICDICPR5[2] ,TGI4D clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ICDICPR5[1] ,TGI4C clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x14 0. " ICDICPR5[0] ,TGI4B clear-pending" "Not cleared,Cleared"
|
|
line.long 0x18 "ICDICPR6,Interrupt Clear-pending Register 6"
|
|
bitfld.long 0x18 31. " ICDICPR6[31] ,RXI0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 30. " ICDICPR6[30] ,ERI0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 29. " ICDICPR6[29] ,BRI0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 28. " ICDICPR6[28] ,INTIICTMOI3 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 27. " ICDICPR6[27] ,INTIICALI3 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 26. " ICDICPR6[26] ,INTIICNAKI3 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ICDICPR6[25] ,INTIICSTI3 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 24. " ICDICPR6[24] ,INTIICSPI3 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 23. " ICDICPR6[23] ,INTIICTI3 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 22. " ICDICPR6[22] ,INTIICRI3 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 21. " ICDICPR6[21] ,INTIICTEI3 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 20. " ICDICPR6[20] ,INTIICTMOI2 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ICDICPR6[19] ,INTIICALI2 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 18. " ICDICPR6[18] ,INTIICNAKI2 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 17. " ICDICPR6[17] ,INTIICSTI2 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 16. " ICDICPR6[16] ,INTIICSPI2 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 15. " ICDICPR6[15] ,INTIICTI2 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 14. " ICDICPR6[14] ,INTIICRI2 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ICDICPR6[13] ,INTIICTEI2 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 12. " ICDICPR6[12] ,INTIICTMOI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 11. " ICDICPR6[11] ,INTIICALI1 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 10. " ICDICPR6[10] ,INTIICNAKI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 9. " ICDICPR6[9] ,INTIICSTI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 8. " ICDICPR6[8] ,INTIICSPI1 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ICDICPR6[7] ,INTIICTI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 6. " ICDICPR6[6] ,INTIICRI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 5. " ICDICPR6[5] ,INTIICTEI1 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 4. " ICDICPR6[4] ,INTIICTMOI0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 3. " ICDICPR6[3] ,INTIICALI0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 2. " ICDICPR6[2] ,INTIICNAKI0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ICDICPR6[1] ,INTIICSTI0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x18 0. " ICDICPR6[0] ,INTIICSPI0 clear-pending" "Not cleared,Cleared"
|
|
line.long 0x1C "ICDICPR7,Interrupt Clear-pending Register 7"
|
|
bitfld.long 0x1C 31. " ICDICPR7[31] ,INTRCAN0REC clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 30. " ICDICPR7[30] ,INTRCANGRECC clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 29. " ICDICPR7[29] ,INTRCANGERR clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 28. " ICDICPR7[28] ,TXI7 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 27. " ICDICPR7[27] ,RXI7 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 26. " ICDICPR7[26] ,ERI7 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 25. " ICDICPR7[25] ,BRI7 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 24. " ICDICPR7[24] ,TXI6 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 23. " ICDICPR7[23] ,RXI6 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 22. " ICDICPR7[22] ,ERI6 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 21. " ICDICPR7[21] ,BRI6 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 20. " ICDICPR7[20] ,TXI5 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 19. " ICDICPR7[19] ,RXI5 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 18. " ICDICPR7[18] ,ERI5 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 17. " ICDICPR7[17] ,BRI5 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 16. " ICDICPR7[16] ,TXI4 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 15. " ICDICPR7[15] ,RXI4 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 14. " ICDICPR7[14] ,ERI4 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 13. " ICDICPR7[13] ,BRI4 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 12. " ICDICPR7[12] ,TXI3 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 11. " ICDICPR7[11] ,RXI3 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 10. " ICDICPR7[10] ,ERI3 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 9. " ICDICPR7[9] ,BRI3 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 8. " ICDICPR7[8] ,TXI2 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " ICDICPR7[7] ,RXI2 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 6. " ICDICPR7[6] ,ERI2 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 5. " ICDICPR7[5] ,BRI2 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 4. " ICDICPR7[4] ,TXI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 3. " ICDICPR7[3] ,RXI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 2. " ICDICPR7[2] ,ERI1 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x1C 1. " ICDICPR7[1] ,BRI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x1C 0. " ICDICPR7[0] ,TXI0 clear-pending" "Not cleared,Cleared"
|
|
line.long 0x20 "ICDICPR8,Interrupt Clear-pending Register 8"
|
|
bitfld.long 0x20 31. " ICDICPR8[31] ,IEBBTSTA clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 30. " ICDICPR8[30] ,IEBBTERR clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 29. " ICDICPR8[29] ,IEBBTD clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 28. " ICDICPR8[28] ,SPTI4 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 27. " ICDICPR8[27] ,SPRI4 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 26. " ICDICPR8[26] ,SPEI4 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 25. " ICDICPR8[25] ,SPTI3 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 24. " ICDICPR8[24] ,SPRI3 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 23. " ICDICPR8[23] ,SPEI3 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 22. " ICDICPR8[22] ,SPTI2 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 21. " ICDICPR8[21] ,SPRI2 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 20. " ICDICPR8[20] ,SPEI2 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 19. " ICDICPR8[19] ,SPTI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 18. " ICDICPR8[18] ,SPRI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 17. " ICDICPR8[17] ,SPEI1 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 16. " ICDICPR8[16] ,SPTI0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 15. " ICDICPR8[15] ,SPRI0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 14. " ICDICPR8[14] ,SPEI0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 13. " ICDICPR8[13] ,INTRCAN4TRX clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 12. " ICDICPR8[12] ,INTRCAN4ERR clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 11. " ICDICPR8[11] ,INTRCAN4REC clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 10. " ICDICPR8[10] ,INTRCAN3TRX clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 9. " ICDICPR8[9] ,INTRCAN3ERR clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 8. " ICDICPR8[8] ,INTRCAN3REC clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 7. " ICDICPR8[7] ,INTRCAN2TRX clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 6. " ICDICPR8[6] ,INTRCAN2ERR clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 5. " ICDICPR8[5] ,INTRCAN2REC clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 4. " ICDICPR8[4] ,INTRCAN1TRX clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 3. " ICDICPR8[3] ,INTRCAN1ERR clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 2. " ICDICPR8[2] ,INTRCAN1REC clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x20 1. " ICDICPR8[1] ,INTRCAN0TRX clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x20 0. " ICDICPR8[0] ,INTRCAN0ERR clear-pending" "Not cleared,Cleared"
|
|
line.long 0x24 "ICDICPR9,Interrupt Clear-pending Register 9"
|
|
bitfld.long 0x24 31. " ICDICPR9[31] ,SCUFUI2 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 30. " ICDICPR9[30] ,SCUFUI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 29. " ICDICPR9[29] ,SCUFUI0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 28. " ICDICPR9[28] ,SCUFDI3 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 27. " ICDICPR9[27] ,SCUFDI2 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 26. " ICDICPR9[26] ,SCUFDI1 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 25. " ICDICPR9[25] ,SCUFDI0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 24. " ICDICPR9[24] ,SCUAI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 23. " ICDICPR9[23] ,SCUAI0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 22. " ICDICPR9[22] ,CUP clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 21. " ICDICPR9[21] ,PRD clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 20. " ICDICPR9[20] ,ARM clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 19. " ICDICPR9[19] ,SDHI1_1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 18. " ICDICPR9[18] ,SDHI1_0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 17. " ICDICPR9[17] ,SDHI1_3 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 16. " ICDICPR9[16] ,SDHI0_1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 15. " ICDICPR9[15] ,SDHI0_0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 14. " ICDICPR9[14] ,SDHI0_3 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 13. " ICDICPR9[13] ,MMC2 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 12. " ICDICPR9[12] ,MMC1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 11. " ICDICPR9[11] ,MMC0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 10. " ICDICPR9[10] ,FLTREQ1I clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 9. " ICDICPR9[9] ,FLTREQ0I clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 8. " ICDICPR9[8] ,FLTENDI clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 7. " ICDICPR9[7] ,STERB/BTOERB clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 6. " ICDICPR9[6] ,IREADY clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 5. " ICDICPR9[5] ,IBUF clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 4. " ICDICPR9[4] ,ISEC clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 3. " ICDICPR9[3] ,ITARG clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 2. " ICDICPR9[2] ,IERR clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x24 1. " ICDICPR9[1] ,ISY clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x24 0. " ICDICPR9[0] ,IEBBTV clear-pending" "Not cleared,Cleared"
|
|
line.long 0x28 "ICDICPR10,Interrupt Clear-pending Register 10"
|
|
bitfld.long 0x28 31. " ICDICPR10[31] ,ERI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x28 30. " ICDICPR10[30] ,TEI0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x28 29. " ICDICPR10[29] ,TXI0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x28 28. " ICDICPR10[28] ,RXI0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x28 27. " ICDICPR10[27] ,ERI0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x28 18. " ICDICPR10[18] ,LINI1_INT_M clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x28 17. " ICDICPR10[17] ,LINI1_INT_S clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x28 16. " ICDICPR10[16] ,LINI1_INT_R clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x28 15. " ICDICPR10[15] ,LINI1_INT_T clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x28 14. " ICDICPR10[14] ,LINI0_INT_M clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x28 13. " ICDICPR10[13] ,LINI0_INT_S clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x28 12. " ICDICPR10[12] ,LINI0_INT_R clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x28 11. " ICDICPR10[11] ,LINI0_INT_T clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x28 8. " ICDICPR10[8] ,DRC1 Channel 1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x28 7. " ICDICPR10[7] ,DRC1 Channel 0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x28 6. " ICDICPR10[6] ,MLB_SINT clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x28 5. " ICDICPR10[5] ,MLB_CINT clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x28 4. " ICDICPR10[4] ,SCUDVI3 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x28 3. " ICDICPR10[3] ,SCUDVI2 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x28 2. " ICDICPR10[2] ,SCUDVI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x28 1. " ICDICPR10[1] ,SCUDVI0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x28 0. " ICDICPR10[0] ,SCUFUI3 clear-pending" "Not cleared,Cleared"
|
|
line.long 0x2C "ICDICPR11,Interrupt Clear-pending Register 11"
|
|
bitfld.long 0x2C 31. " ICDICPR11[31] ,X2HPERI1_ERRINT clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x2C 30. " ICDICPR11[30] ,H2XIC1_ERRINT clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x2C 29. " ICDICPR11[29] ,H2XMLB_ERRINT clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x2C 12. " ICDICPR11[12] ,CEUI clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x2C 7. " ICDICPR11[7] ,ETHERI clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x2C 6. " ICDICPR11[6] ,AVBI_MAC clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x2C 5. " ICDICPR11[5] ,AVBI_MANAGE clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x2C 4. " ICDICPR11[4] ,AVBI_ERROR clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x2C 3. " ICDICPR11[3] ,AVBI_DATA clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x2C 2. " ICDICPR11[2] ,TEI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x2C 1. " ICDICPR11[1] ,TXI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x2C 0. " ICDICPR11[0] ,RXI1 clear-pending" "Not cleared,Cleared"
|
|
line.long 0x30 "ICDICPR12,Interrupt Clear-pending Register 12"
|
|
bitfld.long 0x30 14. " ICDICPR12[14] ,PFVEI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x30 13. " ICDICPR12[13] ,OFFI1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x30 12. " ICDICPR12[12] ,IFEI1 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x30 11. " ICDICPR12[11] ,PFVEI0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x30 10. " ICDICPR12[10] ,OFFI0 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x30 9. " ICDICPR12[9] ,IFEI0 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x30 8. " ICDICPR12[8] ,PRRI clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x30 7. " ICDICPR12[7] ,X2HSPI2_ERRINT clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x30 6. " ICDICPR12[6] ,X2HSPI1_ERRINT clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x30 5. " ICDICPR12[5] ,X2HBSC_ERRINT clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x30 4. " ICDICPR12[4] ,X2HDBGR_ERRINT clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x30 3. " ICDICPR12[3] ,X2HPERI67_ERRINT clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x30 2. " ICDICPR12[2] ,X2HPERI5_ERRINT clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x30 1. " ICDICPR12[1] ,X2HPERI34_ERRINT clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x30 0. " ICDICPR12[0] ,X2HPERI2_ERRINT clear-pending" "Not cleared,Cleared"
|
|
line.long 0x34 "ICDICPR13,Interrupt Clear-pending Register 13"
|
|
bitfld.long 0x34 31. " ICDICPR13[31] ,TINT31 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 30. " ICDICPR13[30] ,TINT30 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 29. " ICDICPR13[29] ,TINT29 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 28. " ICDICPR13[28] ,TINT28 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 27. " ICDICPR13[27] ,TINT27 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 26. " ICDICPR13[26] ,TINT26 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 25. " ICDICPR13[25] ,TINT25 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 24. " ICDICPR13[24] ,TINT24 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 23. " ICDICPR13[23] ,TINT23 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 22. " ICDICPR13[22] ,TINT22 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 21. " ICDICPR13[21] ,TINT21 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 20. " ICDICPR13[20] ,TINT20 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 19. " ICDICPR13[19] ,TINT19 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 18. " ICDICPR13[18] ,TINT18 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 17. " ICDICPR13[17] ,TINT17 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 16. " ICDICPR13[16] ,TINT16 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 15. " ICDICPR13[15] ,TINT15 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 14. " ICDICPR13[14] ,TINT14 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 13. " ICDICPR13[13] ,TINT13 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 12. " ICDICPR13[12] ,TINT12 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 11. " ICDICPR13[11] ,TINT11 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 10. " ICDICPR13[10] ,TINT10 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 9. " ICDICPR13[9] ,TINT9 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 8. " ICDICPR13[8] ,TINT8 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 7. " ICDICPR13[7] ,TINT7 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 6. " ICDICPR13[6] ,TINT6 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 5. " ICDICPR13[5] ,TINT5 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 4. " ICDICPR13[4] ,TINT4 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 3. " ICDICPR13[3] ,TINT3 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 2. " ICDICPR13[2] ,TINT2 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x34 1. " ICDICPR13[1] ,TINT1 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x34 0. " ICDICPR13[0] ,TINT0 clear-pending" "Not cleared,Cleared"
|
|
line.long 0x38 "ICDICPR14,Interrupt Clear-pending Register 14"
|
|
bitfld.long 0x38 31. " ICDICPR14[31] ,TINT63 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 30. " ICDICPR14[30] ,TINT62 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 29. " ICDICPR14[29] ,TINT61 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 28. " ICDICPR14[28] ,TINT60 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 27. " ICDICPR14[27] ,TINT59 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 26. " ICDICPR14[26] ,TINT58 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 25. " ICDICPR14[25] ,TINT57 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 24. " ICDICPR14[24] ,TINT56 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 23. " ICDICPR14[23] ,TINT55 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 22. " ICDICPR14[22] ,TINT54 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 21. " ICDICPR14[21] ,TINT53 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 20. " ICDICPR14[20] ,TINT52 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 19. " ICDICPR14[19] ,TINT51 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 18. " ICDICPR14[18] ,TINT50 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 17. " ICDICPR14[17] ,TINT49 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 16. " ICDICPR14[16] ,TINT48 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 15. " ICDICPR14[15] ,TINT47 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 14. " ICDICPR14[14] ,TINT46 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 13. " ICDICPR14[13] ,TINT45 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 12. " ICDICPR14[12] ,TINT44 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 11. " ICDICPR14[11] ,TINT43 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 10. " ICDICPR14[10] ,TINT42 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 9. " ICDICPR14[9] ,TINT41 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 8. " ICDICPR14[8] ,TINT40 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 7. " ICDICPR14[7] ,TINT39 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 6. " ICDICPR14[6] ,TINT38 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 5. " ICDICPR14[5] ,TINT37 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 4. " ICDICPR14[4] ,TINT36 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 3. " ICDICPR14[3] ,TINT35 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 2. " ICDICPR14[2] ,TINT34 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x38 1. " ICDICPR14[1] ,TINT33 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x38 0. " ICDICPR14[0] ,TINT32 clear-pending" "Not cleared,Cleared"
|
|
line.long 0x3C "ICDICPR15,Interrupt Clear-pending Register 15"
|
|
bitfld.long 0x3C 31. " ICDICPR15[31] ,TINT95 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 30. " ICDICPR15[30] ,TINT94 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 29. " ICDICPR15[29] ,TINT93 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 28. " ICDICPR15[28] ,TINT92 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 27. " ICDICPR15[27] ,TINT91 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 26. " ICDICPR15[26] ,TINT90 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 25. " ICDICPR15[25] ,TINT89 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 24. " ICDICPR15[24] ,TINT88 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 23. " ICDICPR15[23] ,TINT87 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 22. " ICDICPR15[22] ,TINT86 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 21. " ICDICPR15[21] ,TINT85 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 20. " ICDICPR15[20] ,TINT84 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 19. " ICDICPR15[19] ,TINT83 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 18. " ICDICPR15[18] ,TINT82 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 17. " ICDICPR15[17] ,TINT81 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 16. " ICDICPR15[16] ,TINT80 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 15. " ICDICPR15[15] ,TINT79 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 14. " ICDICPR15[14] ,TINT78 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 13. " ICDICPR15[13] ,TINT77 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 12. " ICDICPR15[12] ,TINT76 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 11. " ICDICPR15[11] ,TINT75 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 10. " ICDICPR15[10] ,TINT74 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 9. " ICDICPR15[9] ,TINT73 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 8. " ICDICPR15[8] ,TINT72 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 7. " ICDICPR15[7] ,TINT71 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 6. " ICDICPR15[6] ,TINT70 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 5. " ICDICPR15[5] ,TINT69 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 4. " ICDICPR15[4] ,TINT68 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 3. " ICDICPR15[3] ,TINT67 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 2. " ICDICPR15[2] ,TINT66 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x3C 1. " ICDICPR15[1] ,TINT65 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x3C 0. " ICDICPR15[0] ,TINT64 clear-pending" "Not cleared,Cleared"
|
|
line.long 0x40 "ICDICPR16,Interrupt Clear-pending Register 16"
|
|
bitfld.long 0x40 31. " ICDICPR16[31] ,TINT127 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 30. " ICDICPR16[30] ,TINT126 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 29. " ICDICPR16[29] ,TINT125 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 28. " ICDICPR16[28] ,TINT124 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 27. " ICDICPR16[27] ,TINT123 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 26. " ICDICPR16[26] ,TINT122 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 25. " ICDICPR16[25] ,TINT121 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 24. " ICDICPR16[24] ,TINT120 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 23. " ICDICPR16[23] ,TINT119 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 22. " ICDICPR16[22] ,TINT118 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 21. " ICDICPR16[21] ,TINT117 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 20. " ICDICPR16[20] ,TINT116 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 19. " ICDICPR16[19] ,TINT115 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 18. " ICDICPR16[18] ,TINT114 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 17. " ICDICPR16[17] ,TINT113 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 16. " ICDICPR16[16] ,TINT112 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 15. " ICDICPR16[15] ,TINT111 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 14. " ICDICPR16[14] ,TINT110 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 13. " ICDICPR16[13] ,TINT109 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 12. " ICDICPR16[12] ,TINT108 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 11. " ICDICPR16[11] ,TINT107 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 10. " ICDICPR16[10] ,TINT106 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 9. " ICDICPR16[9] ,TINT105 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 8. " ICDICPR16[8] ,TINT104 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 7. " ICDICPR16[7] ,TINT103 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 6. " ICDICPR16[6] ,TINT102 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 5. " ICDICPR16[5] ,TINT101 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 4. " ICDICPR16[4] ,TINT100 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 3. " ICDICPR16[3] ,TINT99 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 2. " ICDICPR16[2] ,TINT98 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x40 1. " ICDICPR16[1] ,TINT97 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x40 0. " ICDICPR16[0] ,TINT96 clear-pending" "Not cleared,Cleared"
|
|
line.long 0x44 "ICDICPR17,Interrupt Clear-pending Register 17"
|
|
bitfld.long 0x44 31. " ICDICPR17[31] ,TINT159 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 30. " ICDICPR17[30] ,TINT158 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 29. " ICDICPR17[29] ,TINT157 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 28. " ICDICPR17[28] ,TINT156 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 27. " ICDICPR17[27] ,TINT155 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 26. " ICDICPR17[26] ,TINT154 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 25. " ICDICPR17[25] ,TINT153 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 24. " ICDICPR17[24] ,TINT152 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 23. " ICDICPR17[23] ,TINT151 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 22. " ICDICPR17[22] ,TINT150 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 21. " ICDICPR17[21] ,TINT149 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 20. " ICDICPR17[20] ,TINT148 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 19. " ICDICPR17[19] ,TINT147 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 18. " ICDICPR17[18] ,TINT146 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 17. " ICDICPR17[17] ,TINT145 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 16. " ICDICPR17[16] ,TINT144 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 15. " ICDICPR17[15] ,TINT143 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 14. " ICDICPR17[14] ,TINT142 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 13. " ICDICPR17[13] ,TINT141 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 12. " ICDICPR17[12] ,TINT140 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 11. " ICDICPR17[11] ,TINT139 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 10. " ICDICPR17[10] ,TINT138 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 9. " ICDICPR17[9] ,TINT137 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 8. " ICDICPR17[8] ,TINT136 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 7. " ICDICPR17[7] ,TINT135 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 6. " ICDICPR17[6] ,TINT134 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 5. " ICDICPR17[5] ,TINT133 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 4. " ICDICPR17[4] ,TINT132 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 3. " ICDICPR17[3] ,TINT131 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 2. " ICDICPR17[2] ,TINT130 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x44 1. " ICDICPR17[1] ,TINT129 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x44 0. " ICDICPR17[0] ,TINT128 clear-pending" "Not cleared,Cleared"
|
|
line.long 0x48 "ICDICPR18,Interrupt Clear-pending Register 18"
|
|
bitfld.long 0x48 10. " ICDICPR18[10] ,TINT170 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x48 9. " ICDICPR18[9] ,TINT169 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x48 8. " ICDICPR18[8] ,TINT168 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x48 7. " ICDICPR18[7] ,TINT167 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x48 6. " ICDICPR18[6] ,TINT166 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x48 5. " ICDICPR18[5] ,TINT165 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x48 4. " ICDICPR18[4] ,TINT164 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x48 3. " ICDICPR18[3] ,TINT163 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x48 2. " ICDICPR18[2] ,TINT162 clear-pending" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x48 1. " ICDICPR18[1] ,TINT161 clear-pending" "Not cleared,Cleared"
|
|
bitfld.long 0x48 0. " ICDICPR18[0] ,TINT160 clear-pending" "Not cleared,Cleared"
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
group.long 0x300++0x4B
|
|
line.long 0x00 "ICDABR0,Interrupt Active bit Register 0"
|
|
bitfld.long 0x00 19. " ICDABR0[19] ,CTIIRQ0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x00 18. " ICDABR0[18] ,COMMTX0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x00 17. " ICDABR0[17] ,COMMRX0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ICDABR0[16] ,PMUIRQ0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x00 15. " ICDABR0[15] ,GIC software interrupts active bit status 15" "Not activated,Activated"
|
|
bitfld.long 0x00 14. " ICDABR0[14] ,GIC software interrupts active bit status 14" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICDABR0[13] ,GIC software interrupts active bit status 13" "Not activated,Activated"
|
|
bitfld.long 0x00 12. " ICDABR0[12] ,GIC software interrupts active bit status 12" "Not activated,Activated"
|
|
bitfld.long 0x00 11. " ICDABR0[11] ,GIC software interrupts active bit status 11" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ICDABR0[10] ,GIC software interrupts active bit status 10" "Not activated,Activated"
|
|
bitfld.long 0x00 9. " ICDABR0[9] ,GIC software interrupts active bit status 9" "Not activated,Activated"
|
|
bitfld.long 0x00 8. " ICDABR0[8] ,GIC software interrupts active bit status 8" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICDABR0[7] ,GIC software interrupts active bit status 7" "Not activated,Activated"
|
|
bitfld.long 0x00 6. " ICDABR0[6] ,GIC software interrupts active bit status 6" "Not activated,Activated"
|
|
bitfld.long 0x00 5. " ICDABR0[5] ,GIC software interrupts active bit status 5" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ICDABR0[4] ,GIC software interrupts active bit status 4" "Not activated,Activated"
|
|
bitfld.long 0x00 3. " ICDABR0[3] ,GIC software interrupts active bit status 3" "Not activated,Activated"
|
|
bitfld.long 0x00 2. " ICDABR0[2] ,GIC software interrupts active bit status 2" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICDABR0[1] ,GIC software interrupts active bit status 1" "Not activated,Activated"
|
|
bitfld.long 0x00 0. " ICDABR0[0] ,GIC software interrupts active bit status 0" "Not activated,Activated"
|
|
line.long 0x04 "ICDABR1,Interrupt Active bit Register 1"
|
|
bitfld.long 0x04 25. " ICDABR1[25] ,DMAERR active bit status" "Not activated,Activated"
|
|
bitfld.long 0x04 24. " ICDABR1[24] ,DMAINT15 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x04 23. " ICDABR1[23] ,DMAINT14 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x04 22. " ICDABR1[22] ,DMAINT13 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x04 21. " ICDABR1[21] ,DMAINT12 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x04 20. " ICDABR1[20] ,DMAINT11 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ICDABR1[19] ,DMAINT10 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x04 18. " ICDABR1[18] ,DMAINT9 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x04 17. " ICDABR1[17] ,DMAINT8 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x04 16. " ICDABR1[16] ,DMAINT7 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x04 15. " ICDABR1[15] ,DMAINT6 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x04 14. " ICDABR1[14] ,DMAINT5 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ICDABR1[13] ,DMAINT4 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x04 12. " ICDABR1[12] ,DMAINT3 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x04 11. " ICDABR1[11] ,DMAINT2 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x04 10. " ICDABR1[10] ,DMAINT1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x04 9. " ICDABR1[9] ,DMAINT0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x04 8. " ICDABR1[8] ,PL310ERR active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ICDABR1[7] ,IRQ7 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x04 6. " ICDABR1[6] ,IRQ6 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x04 5. " ICDABR1[5] ,IRQ5 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x04 4. " ICDABR1[4] ,IRQ4 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x04 3. " ICDABR1[3] ,IRQ3 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x04 2. " ICDABR1[2] ,IRQ2 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ICDABR1[1] ,IRQ1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x04 0. " ICDABR1[0] ,IRQ0 active bit status" "Not activated,Activated"
|
|
line.long 0x08 "ICDABR2,Interrupt Active bit Register 2"
|
|
bitfld.long 0x08 31. " ICDABR2[31] ,OIR_VFIELD0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x08 30. " ICDABR2[30] ,OIR_VSYNCERR0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x08 29. " ICDABR2[29] ,OIR_LO_VSYNC0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x08 28. " ICDABR2[28] ,OIR_VI_VSYNC0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x08 27. " ICDABR2[27] ,S1_WLINE0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x08 26. " ICDABR2[26] ,IV4_VBUFERR0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ICDABR2[25] ,IV2_VBUFERR0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x08 24. " ICDABR2[24] ,S1_VFIELD0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x08 23. " ICDABR2[23] ,S1_VSYNCERR0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x08 22. " ICDABR2[22] ,S1_LO_VSYNC0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x08 21. " ICDABR2[21] ,S1_VI_VSYNC0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x08 20. " ICDABR2[20] ,S0_WLINE0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ICDABR2[19] ,IV6_VBUFERR0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x08 18. " ICDABR2[18] ,IV5_VBUFERR0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x08 17. " ICDABR2[17] ,IV3_VBUFERR0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x08 16. " ICDABR2[16] ,IV1_VBUFERR0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x08 15. " ICDABR2[15] ,S0_VFIELD0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x08 14. " ICDABR2[14] ,GR3_VLINE0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ICDABR2[13] ,S0_VSYNCERR0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x08 12. " ICDABR2[12] ,S0_LO_VSYNC0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x08 11. " ICDABR2[11] ,S0_VI_VSYNC0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x08 10. " ICDABR2[10] ,USBI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x08 9. " ICDABR2[9] ,USBI0 active bit status" "Not activated,Activated"
|
|
line.long 0x0C "ICDABR3,Interrupt Active bit Register 3"
|
|
bitfld.long 0x0C 31. " ICDABR3[31] ,JDTI active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 30. " ICDABR3[30] ,JEDI active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 29. " ICDABR3[29] ,IMR2I1 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " ICDABR3[28] ,IMR2I0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 27. " ICDABR3[27] ,IMRDI active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 26. " ICDABR3[26] ,OIR_WLINE1 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " ICDABR3[25] ,IV8_VBUFERR1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 24. " ICDABR3[24] ,IV7_VBUFERR1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 23. " ICDABR3[23] ,OIR_VFIELD1 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " ICDABR3[22] ,OIR_VLINE1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 21. " ICDABR3[21] ,OIR_LO_VSYNC1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 20. " ICDABR3[20] ,OIR_VI_VSYNC1 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " ICDABR3[19] ,S1_WLINE1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 18. " ICDABR3[18] ,IV4_VBUFERR1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 17. " ICDABR3[17] ,IV2_VBUFERR1 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " ICDABR3[16] ,S1_VFIELD1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 15. " ICDABR3[15] ,S1_VSYNCERR1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 14. " ICDABR3[14] ,S1_LO_VSYNC1 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " ICDABR3[13] ,S1_VI_VSYNC1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 12. " ICDABR3[12] ,S0_WLINE1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 11. " ICDABR3[11] ,IV6_VBUFERR1 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " ICDABR3[10] ,IV5_VBUFERR1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 9. " ICDABR3[9] ,IV3_VBUFERR1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 8. " ICDABR3[8] ,IV1_VBUFERR1 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " ICDABR3[7] ,S0_VFIELD1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 6. " ICDABR3[6] ,GR3_VLINE1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 5. " ICDABR3[5] ,S0_VSYNCERR1 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " ICDABR3[4] ,S0_LO_VSYNC1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 3. " ICDABR3[3] ,S0_VI_VSYNC1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 2. " ICDABR3[2] ,OIR_WLINE0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " ICDABR3[1] ,IV8_VBUFERR0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x0C 0. " ICDABR3[0] ,IV7_VBUFERR0 active bit status" "Not activated,Activated"
|
|
line.long 0x10 "ICDABR4,Interrupt Active bit Register 4"
|
|
bitfld.long 0x10 31. " ICDABR4[31] ,TGI4A active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 30. " ICDABR4[30] ,TGI3V active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 29. " ICDABR4[29] ,TGI3D active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x10 28. " ICDABR4[28] ,TGI3C active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 27. " ICDABR4[27] ,TGI3B active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 26. " ICDABR4[26] ,TGI3A active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ICDABR4[25] ,TGI2U active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 24. " ICDABR4[24] ,TGI2V active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 23. " ICDABR4[23] ,TGI2B active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x10 22. " ICDABR4[22] ,TGI2A active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 21. " ICDABR4[21] ,TGI1U active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 20. " ICDABR4[20] ,TGI1V active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ICDABR4[19] ,TGI1B active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 18. " ICDABR4[18] ,TGI1A active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 17. " ICDABR4[17] ,TGI0F active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x10 16. " ICDABR4[16] ,TGI0E active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 15. " ICDABR4[15] ,TGI0V active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 14. " ICDABR4[14] ,TGI0D active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ICDABR4[13] ,TGI0C active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 12. " ICDABR4[12] ,TGI0B active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 11. " ICDABR4[11] ,TGI0A active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x10 10. " ICDABR4[10] ,ITI active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 9. " ICDABR4[9] ,WTOUT active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 8. " ICDABR4[8] ,CMI active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ICDABR4[7] ,OSTM1TINT active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 6. " ICDABR4[6] ,OSTM0TINT active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 5. " ICDABR4[5] ,INT3 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x10 4. " ICDABR4[4] ,INT2 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 3. " ICDABR4[3] ,INT1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 2. " ICDABR4[2] ,INT0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ICDABR4[1] ,CMP1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x10 0. " ICDABR4[0] ,CMP0 active bit status" "Not activated,Activated"
|
|
line.long 0x14 "ICDABR5,Interrupt Active bit Register 5"
|
|
bitfld.long 0x14 31. " ICDABR5[31] ,INTIICTI0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 30. " ICDABR5[30] ,INTIICRI0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 29. " ICDABR5[29] ,INTIICTEI0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x14 28. " ICDABR5[28] ,SPDIFI active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 27. " ICDABR5[27] ,SSITXI5 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 26. " ICDABR5[26] ,SSIRXI5 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ICDABR5[25] ,SSII5 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 24. " ICDABR5[24] ,SSIRTI4 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 23. " ICDABR5[23] ,SSII4 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x14 22. " ICDABR5[22] ,SSITXI3 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 21. " ICDABR5[21] ,SSIRXI3 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 20. " ICDABR5[20] ,SSII3 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ICDABR5[19] ,SSIRTI2 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 18. " ICDABR5[18] ,SSII2 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 17. " ICDABR5[17] ,SSITXI1 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x14 16. " ICDABR5[16] ,SSIRXI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 15. " ICDABR5[15] ,SSII1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 14. " ICDABR5[14] ,SSITXI0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ICDABR5[13] ,SSIRXI0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 12. " ICDABR5[12] ,SSII0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 11. " ICDABR5[11] ,LMTI active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x14 10. " ICDABR5[10] ,ADI active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 9. " ICDABR5[9] ,SGDEI3 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 8. " ICDABR5[8] ,SGDEI2 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ICDABR5[7] ,SGDEI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 6. " ICDABR5[6] ,SGDEI0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 5. " ICDABR5[5] ,CMI2 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x14 4. " ICDABR5[4] ,CMI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 3. " ICDABR5[3] ,TGI4V active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 2. " ICDABR5[2] ,TGI4D active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ICDABR5[1] ,TGI4C active bit status" "Not activated,Activated"
|
|
bitfld.long 0x14 0. " ICDABR5[0] ,TGI4B active bit status" "Not activated,Activated"
|
|
line.long 0x18 "ICDABR6,Interrupt Active bit Register 6"
|
|
bitfld.long 0x18 31. " ICDABR6[31] ,RXI0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 30. " ICDABR6[30] ,ERI0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 29. " ICDABR6[29] ,BRI0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x18 28. " ICDABR6[28] ,INTIICTMOI3 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 27. " ICDABR6[27] ,INTIICALI3 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 26. " ICDABR6[26] ,INTIICNAKI3 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ICDABR6[25] ,INTIICSTI3 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 24. " ICDABR6[24] ,INTIICSPI3 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 23. " ICDABR6[23] ,INTIICTI3 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x18 22. " ICDABR6[22] ,INTIICRI3 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 21. " ICDABR6[21] ,INTIICTEI3 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 20. " ICDABR6[20] ,INTIICTMOI2 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ICDABR6[19] ,INTIICALI2 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 18. " ICDABR6[18] ,INTIICNAKI2 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 17. " ICDABR6[17] ,INTIICSTI2 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x18 16. " ICDABR6[16] ,INTIICSPI2 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 15. " ICDABR6[15] ,INTIICTI2 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 14. " ICDABR6[14] ,INTIICRI2 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ICDABR6[13] ,INTIICTEI2 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 12. " ICDABR6[12] ,INTIICTMOI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 11. " ICDABR6[11] ,INTIICALI1 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x18 10. " ICDABR6[10] ,INTIICNAKI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 9. " ICDABR6[9] ,INTIICSTI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 8. " ICDABR6[8] ,INTIICSPI1 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ICDABR6[7] ,INTIICTI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 6. " ICDABR6[6] ,INTIICRI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 5. " ICDABR6[5] ,INTIICTEI1 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x18 4. " ICDABR6[4] ,INTIICTMOI0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 3. " ICDABR6[3] ,INTIICALI0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 2. " ICDABR6[2] ,INTIICNAKI0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ICDABR6[1] ,INTIICSTI0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x18 0. " ICDABR6[0] ,INTIICSPI0 active bit status" "Not activated,Activated"
|
|
line.long 0x1C "ICDABR7,Interrupt Active bit Register 7"
|
|
bitfld.long 0x1C 31. " ICDABR7[31] ,INTRCAN0REC active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 30. " ICDABR7[30] ,INTRCANGRECC active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 29. " ICDABR7[29] ,INTRCANGERR active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x1C 28. " ICDABR7[28] ,TXI7 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 27. " ICDABR7[27] ,RXI7 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 26. " ICDABR7[26] ,ERI7 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x1C 25. " ICDABR7[25] ,BRI7 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 24. " ICDABR7[24] ,TXI6 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 23. " ICDABR7[23] ,RXI6 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x1C 22. " ICDABR7[22] ,ERI6 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 21. " ICDABR7[21] ,BRI6 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 20. " ICDABR7[20] ,TXI5 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x1C 19. " ICDABR7[19] ,RXI5 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 18. " ICDABR7[18] ,ERI5 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 17. " ICDABR7[17] ,BRI5 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x1C 16. " ICDABR7[16] ,TXI4 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 15. " ICDABR7[15] ,RXI4 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 14. " ICDABR7[14] ,ERI4 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x1C 13. " ICDABR7[13] ,BRI4 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 12. " ICDABR7[12] ,TXI3 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 11. " ICDABR7[11] ,RXI3 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x1C 10. " ICDABR7[10] ,ERI3 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 9. " ICDABR7[9] ,BRI3 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 8. " ICDABR7[8] ,TXI2 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " ICDABR7[7] ,RXI2 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 6. " ICDABR7[6] ,ERI2 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 5. " ICDABR7[5] ,BRI2 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x1C 4. " ICDABR7[4] ,TXI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 3. " ICDABR7[3] ,RXI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 2. " ICDABR7[2] ,ERI1 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x1C 1. " ICDABR7[1] ,BRI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x1C 0. " ICDABR7[0] ,TXI0 active bit status" "Not activated,Activated"
|
|
line.long 0x20 "ICDABR8,Interrupt Active bit Register 8"
|
|
bitfld.long 0x20 31. " ICDABR8[31] ,IEBBTSTA active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 30. " ICDABR8[30] ,IEBBTERR active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 29. " ICDABR8[29] ,IEBBTD active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x20 28. " ICDABR8[28] ,SPTI4 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 27. " ICDABR8[27] ,SPRI4 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 26. " ICDABR8[26] ,SPEI4 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x20 25. " ICDABR8[25] ,SPTI3 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 24. " ICDABR8[24] ,SPRI3 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 23. " ICDABR8[23] ,SPEI3 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x20 22. " ICDABR8[22] ,SPTI2 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 21. " ICDABR8[21] ,SPRI2 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 20. " ICDABR8[20] ,SPEI2 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x20 19. " ICDABR8[19] ,SPTI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 18. " ICDABR8[18] ,SPRI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 17. " ICDABR8[17] ,SPEI1 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x20 16. " ICDABR8[16] ,SPTI0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 15. " ICDABR8[15] ,SPRI0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 14. " ICDABR8[14] ,SPEI0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x20 13. " ICDABR8[13] ,INTRCAN4TRX active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 12. " ICDABR8[12] ,INTRCAN4ERR active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 11. " ICDABR8[11] ,INTRCAN4REC active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x20 10. " ICDABR8[10] ,INTRCAN3TRX active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 9. " ICDABR8[9] ,INTRCAN3ERR active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 8. " ICDABR8[8] ,INTRCAN3REC active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x20 7. " ICDABR8[7] ,INTRCAN2TRX active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 6. " ICDABR8[6] ,INTRCAN2ERR active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 5. " ICDABR8[5] ,INTRCAN2REC active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x20 4. " ICDABR8[4] ,INTRCAN1TRX active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 3. " ICDABR8[3] ,INTRCAN1ERR active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 2. " ICDABR8[2] ,INTRCAN1REC active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x20 1. " ICDABR8[1] ,INTRCAN0TRX active bit status" "Not activated,Activated"
|
|
bitfld.long 0x20 0. " ICDABR8[0] ,INTRCAN0ERR active bit status" "Not activated,Activated"
|
|
line.long 0x24 "ICDABR9,Interrupt Active bit Register 9"
|
|
bitfld.long 0x24 31. " ICDABR9[31] ,SCUFUI2 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 30. " ICDABR9[30] ,SCUFUI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 29. " ICDABR9[29] ,SCUFUI0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x24 28. " ICDABR9[28] ,SCUFDI3 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 27. " ICDABR9[27] ,SCUFDI2 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 26. " ICDABR9[26] ,SCUFDI1 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x24 25. " ICDABR9[25] ,SCUFDI0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 24. " ICDABR9[24] ,SCUAI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 23. " ICDABR9[23] ,SCUAI0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x24 22. " ICDABR9[22] ,CUP active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 21. " ICDABR9[21] ,PRD active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 20. " ICDABR9[20] ,ARM active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x24 19. " ICDABR9[19] ,SDHI1_1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 18. " ICDABR9[18] ,SDHI1_0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 17. " ICDABR9[17] ,SDHI1_3 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x24 16. " ICDABR9[16] ,SDHI0_1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 15. " ICDABR9[15] ,SDHI0_0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 14. " ICDABR9[14] ,SDHI0_3 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x24 13. " ICDABR9[13] ,MMC2 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 12. " ICDABR9[12] ,MMC1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 11. " ICDABR9[11] ,MMC0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x24 10. " ICDABR9[10] ,FLTREQ1I active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 9. " ICDABR9[9] ,FLTREQ0I active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 8. " ICDABR9[8] ,FLTENDI active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x24 7. " ICDABR9[7] ,STERB/BTOERB active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 6. " ICDABR9[6] ,IREADY active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 5. " ICDABR9[5] ,IBUF active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x24 4. " ICDABR9[4] ,ISEC active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 3. " ICDABR9[3] ,ITARG active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 2. " ICDABR9[2] ,IERR active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x24 1. " ICDABR9[1] ,ISY active bit status" "Not activated,Activated"
|
|
bitfld.long 0x24 0. " ICDABR9[0] ,IEBBTV active bit status" "Not activated,Activated"
|
|
line.long 0x28 "ICDABR10,Interrupt Active bit Register 10"
|
|
bitfld.long 0x28 31. " ICDABR10[31] ,ERI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x28 30. " ICDABR10[30] ,TEI0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x28 29. " ICDABR10[29] ,TXI0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x28 28. " ICDABR10[28] ,RXI0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x28 27. " ICDABR10[27] ,ERI0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x28 18. " ICDABR10[18] ,LINI1_INT_M active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x28 17. " ICDABR10[17] ,LINI1_INT_S active bit status" "Not activated,Activated"
|
|
bitfld.long 0x28 16. " ICDABR10[16] ,LINI1_INT_R active bit status" "Not activated,Activated"
|
|
bitfld.long 0x28 15. " ICDABR10[15] ,LINI1_INT_T active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x28 14. " ICDABR10[14] ,LINI0_INT_M active bit status" "Not activated,Activated"
|
|
bitfld.long 0x28 13. " ICDABR10[13] ,LINI0_INT_S active bit status" "Not activated,Activated"
|
|
bitfld.long 0x28 12. " ICDABR10[12] ,LINI0_INT_R active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x28 11. " ICDABR10[11] ,LINI0_INT_T active bit status" "Not activated,Activated"
|
|
bitfld.long 0x28 8. " ICDABR10[8] ,DRC1 Channel 1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x28 7. " ICDABR10[7] ,DRC1 Channel 0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x28 6. " ICDABR10[6] ,MLB_SINT active bit status" "Not activated,Activated"
|
|
bitfld.long 0x28 5. " ICDABR10[5] ,MLB_CINT active bit status" "Not activated,Activated"
|
|
bitfld.long 0x28 4. " ICDABR10[4] ,SCUDVI3 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x28 3. " ICDABR10[3] ,SCUDVI2 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x28 2. " ICDABR10[2] ,SCUDVI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x28 1. " ICDABR10[1] ,SCUDVI0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x28 0. " ICDABR10[0] ,SCUFUI3 active bit status" "Not activated,Activated"
|
|
line.long 0x2C "ICDABR11,Interrupt Active bit Register 11"
|
|
bitfld.long 0x2C 31. " ICDABR11[31] ,X2HPERI1_ERRINT active bit status" "Not activated,Activated"
|
|
bitfld.long 0x2C 30. " ICDABR11[30] ,H2XIC1_ERRINT active bit status" "Not activated,Activated"
|
|
bitfld.long 0x2C 29. " ICDABR11[29] ,H2XMLB_ERRINT active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x2C 12. " ICDABR11[12] ,CEUI active bit status" "Not activated,Activated"
|
|
bitfld.long 0x2C 7. " ICDABR11[7] ,ETHERI active bit status" "Not activated,Activated"
|
|
bitfld.long 0x2C 6. " ICDABR11[6] ,AVBI_MAC active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x2C 5. " ICDABR11[5] ,AVBI_MANAGE active bit status" "Not activated,Activated"
|
|
bitfld.long 0x2C 4. " ICDABR11[4] ,AVBI_ERROR active bit status" "Not activated,Activated"
|
|
bitfld.long 0x2C 3. " ICDABR11[3] ,AVBI_DATA active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x2C 2. " ICDABR11[2] ,TEI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x2C 1. " ICDABR11[1] ,TXI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x2C 0. " ICDABR11[0] ,RXI1 active bit status" "Not activated,Activated"
|
|
line.long 0x30 "ICDABR12,Interrupt Active bit Register 12"
|
|
bitfld.long 0x30 14. " ICDABR12[14] ,PFVEI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x30 13. " ICDABR12[13] ,OFFI1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x30 12. " ICDABR12[12] ,IFEI1 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x30 11. " ICDABR12[11] ,PFVEI0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x30 10. " ICDABR12[10] ,OFFI0 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x30 9. " ICDABR12[9] ,IFEI0 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x30 8. " ICDABR12[8] ,PRRI active bit status" "Not activated,Activated"
|
|
bitfld.long 0x30 7. " ICDABR12[7] ,X2HSPI2_ERRINT active bit status" "Not activated,Activated"
|
|
bitfld.long 0x30 6. " ICDABR12[6] ,X2HSPI1_ERRINT active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x30 5. " ICDABR12[5] ,X2HBSC_ERRINT active bit status" "Not activated,Activated"
|
|
bitfld.long 0x30 4. " ICDABR12[4] ,X2HDBGR_ERRINT active bit status" "Not activated,Activated"
|
|
bitfld.long 0x30 3. " ICDABR12[3] ,X2HPERI67_ERRINT active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x30 2. " ICDABR12[2] ,X2HPERI5_ERRINT active bit status" "Not activated,Activated"
|
|
bitfld.long 0x30 1. " ICDABR12[1] ,X2HPERI34_ERRINT active bit status" "Not activated,Activated"
|
|
bitfld.long 0x30 0. " ICDABR12[0] ,X2HPERI2_ERRINT active bit status" "Not activated,Activated"
|
|
line.long 0x34 "ICDABR13,Interrupt Active bit Register 13"
|
|
bitfld.long 0x34 31. " ICDABR13[31] ,TINT31 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 30. " ICDABR13[30] ,TINT30 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 29. " ICDABR13[29] ,TINT29 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x34 28. " ICDABR13[28] ,TINT28 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 27. " ICDABR13[27] ,TINT27 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 26. " ICDABR13[26] ,TINT26 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x34 25. " ICDABR13[25] ,TINT25 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 24. " ICDABR13[24] ,TINT24 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 23. " ICDABR13[23] ,TINT23 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x34 22. " ICDABR13[22] ,TINT22 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 21. " ICDABR13[21] ,TINT21 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 20. " ICDABR13[20] ,TINT20 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x34 19. " ICDABR13[19] ,TINT19 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 18. " ICDABR13[18] ,TINT18 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 17. " ICDABR13[17] ,TINT17 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x34 16. " ICDABR13[16] ,TINT16 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 15. " ICDABR13[15] ,TINT15 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 14. " ICDABR13[14] ,TINT14 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x34 13. " ICDABR13[13] ,TINT13 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 12. " ICDABR13[12] ,TINT12 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 11. " ICDABR13[11] ,TINT11 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x34 10. " ICDABR13[10] ,TINT10 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 9. " ICDABR13[9] ,TINT9 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 8. " ICDABR13[8] ,TINT8 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x34 7. " ICDABR13[7] ,TINT7 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 6. " ICDABR13[6] ,TINT6 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 5. " ICDABR13[5] ,TINT5 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x34 4. " ICDABR13[4] ,TINT4 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 3. " ICDABR13[3] ,TINT3 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 2. " ICDABR13[2] ,TINT2 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x34 1. " ICDABR13[1] ,TINT1 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x34 0. " ICDABR13[0] ,TINT0 active bit status" "Not activated,Activated"
|
|
line.long 0x38 "ICDABR14,Interrupt Active bit Register 14"
|
|
bitfld.long 0x38 31. " ICDABR14[31] ,TINT63 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 30. " ICDABR14[30] ,TINT62 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 29. " ICDABR14[29] ,TINT61 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x38 28. " ICDABR14[28] ,TINT60 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 27. " ICDABR14[27] ,TINT59 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 26. " ICDABR14[26] ,TINT58 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x38 25. " ICDABR14[25] ,TINT57 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 24. " ICDABR14[24] ,TINT56 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 23. " ICDABR14[23] ,TINT55 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x38 22. " ICDABR14[22] ,TINT54 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 21. " ICDABR14[21] ,TINT53 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 20. " ICDABR14[20] ,TINT52 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x38 19. " ICDABR14[19] ,TINT51 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 18. " ICDABR14[18] ,TINT50 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 17. " ICDABR14[17] ,TINT49 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x38 16. " ICDABR14[16] ,TINT48 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 15. " ICDABR14[15] ,TINT47 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 14. " ICDABR14[14] ,TINT46 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x38 13. " ICDABR14[13] ,TINT45 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 12. " ICDABR14[12] ,TINT44 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 11. " ICDABR14[11] ,TINT43 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x38 10. " ICDABR14[10] ,TINT42 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 9. " ICDABR14[9] ,TINT41 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 8. " ICDABR14[8] ,TINT40 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x38 7. " ICDABR14[7] ,TINT39 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 6. " ICDABR14[6] ,TINT38 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 5. " ICDABR14[5] ,TINT37 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x38 4. " ICDABR14[4] ,TINT36 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 3. " ICDABR14[3] ,TINT35 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 2. " ICDABR14[2] ,TINT34 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x38 1. " ICDABR14[1] ,TINT33 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x38 0. " ICDABR14[0] ,TINT32 active bit status" "Not activated,Activated"
|
|
line.long 0x3C "ICDABR15,Interrupt Active bit Register 15"
|
|
bitfld.long 0x3C 31. " ICDABR15[31] ,TINT95 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 30. " ICDABR15[30] ,TINT94 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 29. " ICDABR15[29] ,TINT93 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x3C 28. " ICDABR15[28] ,TINT92 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 27. " ICDABR15[27] ,TINT91 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 26. " ICDABR15[26] ,TINT90 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x3C 25. " ICDABR15[25] ,TINT89 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 24. " ICDABR15[24] ,TINT88 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 23. " ICDABR15[23] ,TINT87 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x3C 22. " ICDABR15[22] ,TINT86 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 21. " ICDABR15[21] ,TINT85 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 20. " ICDABR15[20] ,TINT84 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x3C 19. " ICDABR15[19] ,TINT83 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 18. " ICDABR15[18] ,TINT82 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 17. " ICDABR15[17] ,TINT81 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x3C 16. " ICDABR15[16] ,TINT80 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 15. " ICDABR15[15] ,TINT79 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 14. " ICDABR15[14] ,TINT78 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x3C 13. " ICDABR15[13] ,TINT77 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 12. " ICDABR15[12] ,TINT76 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 11. " ICDABR15[11] ,TINT75 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x3C 10. " ICDABR15[10] ,TINT74 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 9. " ICDABR15[9] ,TINT73 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 8. " ICDABR15[8] ,TINT72 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x3C 7. " ICDABR15[7] ,TINT71 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 6. " ICDABR15[6] ,TINT70 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 5. " ICDABR15[5] ,TINT69 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x3C 4. " ICDABR15[4] ,TINT68 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 3. " ICDABR15[3] ,TINT67 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 2. " ICDABR15[2] ,TINT66 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x3C 1. " ICDABR15[1] ,TINT65 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x3C 0. " ICDABR15[0] ,TINT64 active bit status" "Not activated,Activated"
|
|
line.long 0x40 "ICDABR16,Interrupt Active bit Register 16"
|
|
bitfld.long 0x40 31. " ICDABR16[31] ,TINT127 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 30. " ICDABR16[30] ,TINT126 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 29. " ICDABR16[29] ,TINT125 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x40 28. " ICDABR16[28] ,TINT124 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 27. " ICDABR16[27] ,TINT123 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 26. " ICDABR16[26] ,TINT122 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x40 25. " ICDABR16[25] ,TINT121 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 24. " ICDABR16[24] ,TINT120 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 23. " ICDABR16[23] ,TINT119 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x40 22. " ICDABR16[22] ,TINT118 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 21. " ICDABR16[21] ,TINT117 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 20. " ICDABR16[20] ,TINT116 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x40 19. " ICDABR16[19] ,TINT115 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 18. " ICDABR16[18] ,TINT114 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 17. " ICDABR16[17] ,TINT113 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x40 16. " ICDABR16[16] ,TINT112 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 15. " ICDABR16[15] ,TINT111 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 14. " ICDABR16[14] ,TINT110 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x40 13. " ICDABR16[13] ,TINT109 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 12. " ICDABR16[12] ,TINT108 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 11. " ICDABR16[11] ,TINT107 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x40 10. " ICDABR16[10] ,TINT106 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 9. " ICDABR16[9] ,TINT105 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 8. " ICDABR16[8] ,TINT104 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x40 7. " ICDABR16[7] ,TINT103 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 6. " ICDABR16[6] ,TINT102 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 5. " ICDABR16[5] ,TINT101 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x40 4. " ICDABR16[4] ,TINT100 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 3. " ICDABR16[3] ,TINT99 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 2. " ICDABR16[2] ,TINT98 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x40 1. " ICDABR16[1] ,TINT97 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x40 0. " ICDABR16[0] ,TINT96 active bit status" "Not activated,Activated"
|
|
line.long 0x44 "ICDABR17,Interrupt Active bit Register 17"
|
|
bitfld.long 0x44 31. " ICDABR17[31] ,TINT159 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 30. " ICDABR17[30] ,TINT158 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 29. " ICDABR17[29] ,TINT157 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x44 28. " ICDABR17[28] ,TINT156 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 27. " ICDABR17[27] ,TINT155 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 26. " ICDABR17[26] ,TINT154 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x44 25. " ICDABR17[25] ,TINT153 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 24. " ICDABR17[24] ,TINT152 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 23. " ICDABR17[23] ,TINT151 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x44 22. " ICDABR17[22] ,TINT150 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 21. " ICDABR17[21] ,TINT149 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 20. " ICDABR17[20] ,TINT148 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x44 19. " ICDABR17[19] ,TINT147 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 18. " ICDABR17[18] ,TINT146 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 17. " ICDABR17[17] ,TINT145 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x44 16. " ICDABR17[16] ,TINT144 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 15. " ICDABR17[15] ,TINT143 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 14. " ICDABR17[14] ,TINT142 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x44 13. " ICDABR17[13] ,TINT141 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 12. " ICDABR17[12] ,TINT140 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 11. " ICDABR17[11] ,TINT139 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x44 10. " ICDABR17[10] ,TINT138 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 9. " ICDABR17[9] ,TINT137 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 8. " ICDABR17[8] ,TINT136 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x44 7. " ICDABR17[7] ,TINT135 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 6. " ICDABR17[6] ,TINT134 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 5. " ICDABR17[5] ,TINT133 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x44 4. " ICDABR17[4] ,TINT132 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 3. " ICDABR17[3] ,TINT131 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 2. " ICDABR17[2] ,TINT130 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x44 1. " ICDABR17[1] ,TINT129 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x44 0. " ICDABR17[0] ,TINT128 active bit status" "Not activated,Activated"
|
|
line.long 0x48 "ICDABR18,Interrupt Active bit Register 18"
|
|
bitfld.long 0x48 10. " ICDABR18[10] ,TINT170 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x48 9. " ICDABR18[9] ,TINT169 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x48 8. " ICDABR18[8] ,TINT168 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x48 7. " ICDABR18[7] ,TINT167 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x48 6. " ICDABR18[6] ,TINT166 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x48 5. " ICDABR18[5] ,TINT165 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x48 4. " ICDABR18[4] ,TINT164 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x48 3. " ICDABR18[3] ,TINT163 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x48 2. " ICDABR18[2] ,TINT162 active bit status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x48 1. " ICDABR18[1] ,TINT161 active bit status" "Not activated,Activated"
|
|
bitfld.long 0x48 0. " ICDABR18[0] ,TINT160 active bit status" "Not activated,Activated"
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
group.long 0x400++0x13
|
|
line.long 0x00 "ICDIPR0,Interrupt Priority Register 0 (GIC Software Interrupt 0)"
|
|
line.long 0x04 "ICDIPR1,Interrupt Priority Register 1 (GIC Software Interrupt 1)"
|
|
line.long 0x08 "ICDIPR2,Interrupt Priority Register 2 (GIC Software Interrupt 2)"
|
|
line.long 0x0C "ICDIPR3,Interrupt Priority Register 3 (GIC Software Interrupt 3)"
|
|
line.long 0x10 "ICDIPR4,Interrupt Priority Register 4"
|
|
hexmask.long.byte 0x10 24.--31. 1. " ICDIPR3[31:24] ,CTIIRQ0 priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " ICDIPR3[23:16] ,COMMTX0 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x10 8.--15. 1. " ICDIPR3[15:8] ,COMMRX0 priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " ICDIPR3[7:0] ,PMUIRQ0 priority"
|
|
group.long 0x420++0x1B
|
|
line.long 0x00 "ICDIPR8,Interrupt Priority Register 8"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ICDIPR8[31:24] ,IRQ3 priority"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ICDIPR8[23:16] ,IRQ2 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ICDIPR8[15:8] ,IRQ1 priority"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ICDIPR8[7:0] ,IRQ0 priority"
|
|
line.long 0x04 "ICDIPR9,Interrupt Priority Register 9"
|
|
hexmask.long.byte 0x04 24.--31. 1. " ICDIPR9[31:24] ,IRQ7 priority"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ICDIPR9[23:16] ,IRQ6 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " ICDIPR9[15:8] ,IRQ5 priority"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ICDIPR9[7:0] ,IRQ4 priority"
|
|
line.long 0x08 "ICDIPR10,Interrupt Priority Register 10"
|
|
hexmask.long.byte 0x08 24.--31. 1. " ICDIPR10[31:24] ,DMAINT2 priority"
|
|
hexmask.long.byte 0x08 16.--23. 1. " ICDIPR10[23:16] ,DMAINT1 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " ICDIPR10[15:8] ,DMAINT0 priority"
|
|
hexmask.long.byte 0x08 0.--7. 1. " ICDIPR10[7:0] ,PL310ERR priority"
|
|
line.long 0x0C "ICDIPR11,Interrupt Priority Register 11"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " ICDIPR11[31:24] ,DMAINT6 priority"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " ICDIPR11[23:16] ,DMAINT5 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " ICDIPR11[15:8] ,DMAINT4 priority"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " ICDIPR11[7:0] ,DMAINT3 priority"
|
|
line.long 0x10 "ICDIPR12,Interrupt Priority Register 12"
|
|
hexmask.long.byte 0x10 24.--31. 1. " ICDIPR12[31:24] ,DMAINT10 priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " ICDIPR12[23:16] ,DMAINT9 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x10 8.--15. 1. " ICDIPR12[15:8] ,DMAINT8 priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " ICDIPR12[7:0] ,DMAINT7 priority"
|
|
line.long 0x14 "ICDIPR13,Interrupt Priority Register 13"
|
|
hexmask.long.byte 0x14 24.--31. 1. " ICDIPR13[31:24] ,DMAINT14 priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " ICDIPR13[23:16] ,DMAINT13 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x14 8.--15. 1. " ICDIPR13[15:8] ,DMAINT12 priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " ICDIPR13[7:0] ,DMAINT11 priority"
|
|
line.long 0x18 "ICDIPR14,Interrupt Priority Register 14"
|
|
hexmask.long.byte 0x18 8.--15. 1. " ICDIPR14[15:8] ,DMAERR priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " ICDIPR14[7:0] ,DMAINT15 priority"
|
|
group.long 0x448++0x16B
|
|
line.long 0x00 "ICDIPR18,Interrupt Priority Register 18"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ICDIPR18[31:24] ,S0_VI_VSYNC0 priority"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ICDIPR18[23:16] ,USBI1 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ICDIPR18[15:8] ,USBI0 priority"
|
|
line.long 0x04 "ICDIPR19,Interrupt Priority Register 19"
|
|
hexmask.long.byte 0x04 24.--31. 1. " ICDIPR19[31:24] ,S0_VFIELD0 priority"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ICDIPR19[23:16] ,GR3_VLINE0 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " ICDIPR19[15:8] ,S0_VSYNCERR0 priority"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ICDIPR19[7:0] ,S0_LO_VSYNC0 priority"
|
|
line.long 0x08 "ICDIPR20,Interrupt Priority Register 20"
|
|
hexmask.long.byte 0x08 24.--31. 1. " ICDIPR20[31:24] ,IV6_VBUFERR0 priority"
|
|
hexmask.long.byte 0x08 16.--23. 1. " ICDIPR20[23:16] ,IV5_VBUFERR0 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " ICDIPR20[15:8] ,IV3_VBUFERR0 priority"
|
|
hexmask.long.byte 0x08 0.--7. 1. " ICDIPR20[7:0] ,IV1_VBUFERR0 priority"
|
|
line.long 0x0C "ICDIPR21,Interrupt Priority Register 21"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " ICDIPR21[31:24] ,S1_VSYNCERR0 priority"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " ICDIPR21[23:16] ,S1_LO_VSYNC0 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " ICDIPR21[15:8] ,S1_VI_VSYNC0 priority"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " ICDIPR21[7:0] ,S0_WLINE0 priority"
|
|
line.long 0x10 "ICDIPR22,Interrupt Priority Register 22"
|
|
hexmask.long.byte 0x10 24.--31. 1. " ICDIPR22[31:24] ,S1_WLINE0 priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " ICDIPR22[23:16] ,IV4_VBUFERR0 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x10 8.--15. 1. " ICDIPR22[15:8] ,IV2_VBUFERR0 priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " ICDIPR22[7:0] ,S1_VFIELD0 priority"
|
|
line.long 0x14 "ICDIPR23,Interrupt Priority Register 23"
|
|
hexmask.long.byte 0x14 24.--31. 1. " ICDIPR23[31:24] ,OIR_VFIELD0 priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " ICDIPR23[23:16] ,OIR_VSYNCERR0 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x14 8.--15. 1. " ICDIPR23[15:8] ,OIR_LO_VSYNC0 priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " ICDIPR23[7:0] ,OIR_VI_VSYNC0 priority"
|
|
line.long 0x18 "ICDIPR24,Interrupt Priority Register 24"
|
|
hexmask.long.byte 0x18 24.--31. 1. " ICDIPR24[31:24] ,S0_VI_VSYNC1 priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " ICDIPR24[23:16] ,OIR_WLINE0 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x18 8.--15. 1. " ICDIPR24[15:8] ,IV8_VBUFERR0 priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " ICDIPR24[7:0] ,IV7_VBUFERR0 priority"
|
|
line.long 0x1C "ICDIPR25,Interrupt Priority Register 25"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " ICDIPR25[31:24] ,S0_VFIELD1 priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " ICDIPR25[23:16] ,GR3_VLINE1 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x1C 8.--15. 1. " ICDIPR25[15:8] ,S0_VSYNCERR1 priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " ICDIPR25[7:0] ,S0_LO_VSYNC1 priority"
|
|
line.long 0x20 "ICDIPR26,Interrupt Priority Register 26"
|
|
hexmask.long.byte 0x20 24.--31. 1. " ICDIPR26[31:24] ,IV6_VBUFERR1 priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " ICDIPR26[23:16] ,IV5_VBUFERR1 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x20 8.--15. 1. " ICDIPR26[15:8] ,IV3_VBUFERR1 priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " ICDIPR26[7:0] ,IV1_VBUFERR1 priority"
|
|
line.long 0x24 "ICDIPR27,Interrupt Priority Register 27"
|
|
hexmask.long.byte 0x24 24.--31. 1. " ICDIPR27[31:24] ,S1_VSYNCERR1 priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " ICDIPR27[23:16] ,S1_LO_VSYNC1 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x24 8.--15. 1. " ICDIPR27[15:8] ,S1_VI_VSYNC1 priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " ICDIPR27[7:0] ,S0_WLINE1 priority"
|
|
line.long 0x28 "ICDIPR28,Interrupt Priority Register 28"
|
|
hexmask.long.byte 0x28 24.--31. 1. " ICDIPR28[31:24] ,S1_WLINE1 priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " ICDIPR28[23:16] ,IV4_VBUFERR1 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x28 8.--15. 1. " ICDIPR28[15:8] ,IV2_VBUFERR1 priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " ICDIPR28[7:0] ,S1_VFIELD1 priority"
|
|
line.long 0x2C "ICDIPR29,Interrupt Priority Register 29"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " ICDIPR29[31:24] ,OIR_VFIELD1 priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " ICDIPR29[23:16] ,OIR_VLINE1 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x2C 8.--15. 1. " ICDIPR29[15:8] ,OIR_LO_VSYNC1 priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " ICDIPR29[7:0] ,OIR_VI_VSYNC1 priority"
|
|
line.long 0x30 "ICDIPR30,Interrupt Priority Register 30"
|
|
hexmask.long.byte 0x30 24.--31. 1. " ICDIPR30[31:24] ,IMRDI priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " ICDIPR30[23:16] ,OIR_WLINE1 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x30 8.--15. 1. " ICDIPR30[15:8] ,IV8_VBUFERR1 priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " ICDIPR30[7:0] ,IV7_VBUFERR1 priority"
|
|
line.long 0x34 "ICDIPR31,Interrupt Priority Register 31"
|
|
hexmask.long.byte 0x34 24.--31. 1. " ICDIPR31[31:24] ,JDTI priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " ICDIPR31[23:16] ,JEDI priority"
|
|
textline " "
|
|
hexmask.long.byte 0x34 8.--15. 1. " ICDIPR31[15:8] ,IMR2I1 priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " ICDIPR31[7:0] ,IMR2I0 priority"
|
|
line.long 0x38 "ICDIPR32,Interrupt Priority Register 32"
|
|
hexmask.long.byte 0x38 24.--31. 1. " ICDIPR32[31:24] ,INT1 priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " ICDIPR32[23:16] ,INT0 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x38 8.--15. 1. " ICDIPR32[15:8] ,CMP1 priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " ICDIPR32[7:0] ,CMP0 priority"
|
|
line.long 0x3C "ICDIPR33,Interrupt Priority Register 33"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " ICDIPR33[31:24] ,OSTM1TINT priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " ICDIPR33[23:16] ,OSTM0TINT priority"
|
|
textline " "
|
|
hexmask.long.byte 0x3C 8.--15. 1. " ICDIPR33[15:8] ,INT3 priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " ICDIPR33[7:0] ,INT2 priority"
|
|
line.long 0x40 "ICDIPR34,Interrupt Priority Register 34"
|
|
hexmask.long.byte 0x40 24.--31. 1. " ICDIPR34[31:24] ,TGI0A priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " ICDIPR34[23:16] ,ITI priority"
|
|
textline " "
|
|
hexmask.long.byte 0x40 8.--15. 1. " ICDIPR34[15:8] ,WTOUT priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " ICDIPR34[7:0] ,CMI priority"
|
|
line.long 0x44 "ICDIPR35,Interrupt Priority Register 35"
|
|
hexmask.long.byte 0x44 24.--31. 1. " ICDIPR35[31:24] ,TGI0V priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " ICDIPR35[23:16] ,TGI0D priority"
|
|
textline " "
|
|
hexmask.long.byte 0x44 8.--15. 1. " ICDIPR35[15:8] ,TGI0C priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " ICDIPR35[7:0] ,TGI0B priority"
|
|
line.long 0x48 "ICDIPR36,Interrupt Priority Register 36"
|
|
hexmask.long.byte 0x48 24.--31. 1. " ICDIPR36[31:24] ,TGI1B priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " ICDIPR36[23:16] ,TGI1A priority"
|
|
textline " "
|
|
hexmask.long.byte 0x48 8.--15. 1. " ICDIPR36[15:8] ,TGI0F priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " ICDIPR36[7:0] ,TGI0E priority"
|
|
line.long 0x4C "ICDIPR37,Interrupt Priority Register 37"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " ICDIPR37[31:24] ,TGI2B priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " ICDIPR37[23:16] ,TGI2A priority"
|
|
textline " "
|
|
hexmask.long.byte 0x4C 8.--15. 1. " ICDIPR37[15:8] ,TGI1U priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " ICDIPR37[7:0] ,TGI1V priority"
|
|
line.long 0x50 "ICDIPR38,Interrupt Priority Register 38"
|
|
hexmask.long.byte 0x50 24.--31. 1. " ICDIPR38[31:24] ,TGI3B priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " ICDIPR38[23:16] ,TGI3A priority"
|
|
textline " "
|
|
hexmask.long.byte 0x50 8.--15. 1. " ICDIPR38[15:8] ,TGI2U priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " ICDIPR38[7:0] ,TGI2V priority"
|
|
line.long 0x54 "ICDIPR39,Interrupt Priority Register 39"
|
|
hexmask.long.byte 0x54 24.--31. 1. " ICDIPR39[31:24] ,TGI4A priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " ICDIPR39[23:16] ,TGI3V priority"
|
|
textline " "
|
|
hexmask.long.byte 0x54 8.--15. 1. " ICDIPR39[15:8] ,TGI3D priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " ICDIPR39[7:0] ,TGI3C priority"
|
|
line.long 0x58 "ICDIPR40,Interrupt Priority Register 40"
|
|
hexmask.long.byte 0x58 24.--31. 1. " ICDIPR40[31:24] ,TGI4V priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " ICDIPR40[23:16] ,TGI4D priority"
|
|
textline " "
|
|
hexmask.long.byte 0x58 8.--15. 1. " ICDIPR40[15:8] ,TGI4C priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " ICDIPR40[7:0] ,TGI4B priority"
|
|
line.long 0x5C "ICDIPR41,Interrupt Priority Register 41"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " ICDIPR41[31:24] ,SGDEI1 priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " ICDIPR41[23:16] ,SGDEI0 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x5C 8.--15. 1. " ICDIPR41[15:8] ,CMI2 priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " ICDIPR41[7:0] ,CMI1 priority"
|
|
line.long 0x60 "ICDIPR42,Interrupt Priority Register 42"
|
|
hexmask.long.byte 0x60 24.--31. 1. " ICDIPR42[31:24] ,LMTI priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " ICDIPR42[23:16] ,ADI priority"
|
|
textline " "
|
|
hexmask.long.byte 0x60 8.--15. 1. " ICDIPR42[15:8] ,SGDEI3 priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " ICDIPR42[7:0] ,SGDEI2 priority"
|
|
line.long 0x64 "ICDIPR43,Interrupt Priority Register 43"
|
|
hexmask.long.byte 0x64 24.--31. 1. " ICDIPR43[31:24] ,SSII1 priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " ICDIPR43[23:16] ,SSITXI0 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x64 8.--15. 1. " ICDIPR43[15:8] ,SSIRXI0 priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " ICDIPR43[7:0] ,SSII0 priority"
|
|
line.long 0x68 "ICDIPR44,Interrupt Priority Register 44"
|
|
hexmask.long.byte 0x68 24.--31. 1. " ICDIPR44[31:24] ,SSIRTI2 priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " ICDIPR44[23:16] ,SSII2 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x68 8.--15. 1. " ICDIPR44[15:8] ,SSITXI1 priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " ICDIPR44[7:0] ,SSIRXI1 priority"
|
|
line.long 0x6C "ICDIPR45,Interrupt Priority Register 45"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " ICDIPR45[31:24] ,SSII4 priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " ICDIPR45[23:16] ,SSITXI3 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x6C 8.--15. 1. " ICDIPR45[15:8] ,SSIRXI3 priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " ICDIPR45[7:0] ,SSII3 priority"
|
|
line.long 0x70 "ICDIPR46,Interrupt Priority Register 46"
|
|
hexmask.long.byte 0x70 24.--31. 1. " ICDIPR46[31:24] ,SSITXI5 priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " ICDIPR46[23:16] ,SSIRXI5 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x70 8.--15. 1. " ICDIPR46[15:8] ,SSII5 priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " ICDIPR46[7:0] ,SSIRTI4 priority"
|
|
line.long 0x74 "ICDIPR47,Interrupt Priority Register 47"
|
|
hexmask.long.byte 0x74 24.--31. 1. " ICDIPR47[31:24] ,INTIICTI0 priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " ICDIPR47[23:16] ,INTIICRI0 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x74 8.--15. 1. " ICDIPR47[15:8] ,INTIICTEI0 priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " ICDIPR47[7:0] ,SPDIFI priority"
|
|
line.long 0x78 "ICDIPR48,Interrupt Priority Register 48"
|
|
hexmask.long.byte 0x78 24.--31. 1. " ICDIPR48[31:24] ,INTIICALI0 priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " ICDIPR48[23:16] ,INTIICNAKI0 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x78 8.--15. 1. " ICDIPR48[15:8] ,INTIICSTI0 priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " ICDIPR48[7:0] ,INTIICSPI0 priority"
|
|
line.long 0x7C "ICDIPR49,Interrupt Priority Register 49"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " ICDIPR49[31:24] ,INTIICTI1 priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " ICDIPR49[23:16] ,INTIICRI1 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x7C 8.--15. 1. " ICDIPR49[15:8] ,INTIICTEI1 priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " ICDIPR49[7:0] ,INTIICTMOI0 priority"
|
|
line.long 0x80 "ICDIPR50,Interrupt Priority Register 50"
|
|
hexmask.long.byte 0x80 24.--31. 1. " ICDIPR50[31:24] ,INTIICALI1 priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " ICDIPR50[23:16] ,INTIICNAKI1 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x80 8.--15. 1. " ICDIPR50[15:8] ,INTIICSTI1 priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " ICDIPR50[7:0] ,INTIICSPI1 priority"
|
|
line.long 0x84 "ICDIPR51,Interrupt Priority Register 51"
|
|
hexmask.long.byte 0x84 24.--31. 1. " ICDIPR51[31:24] ,INTIICTI2 priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " ICDIPR51[23:16] ,INTIICRI2 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x84 8.--15. 1. " ICDIPR51[15:8] ,INTIICTEI2 priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " ICDIPR51[7:0] ,INTIICTMOI1 priority"
|
|
line.long 0x88 "ICDIPR52,Interrupt Priority Register 52"
|
|
hexmask.long.byte 0x88 24.--31. 1. " ICDIPR52[31:24] ,INTIICALI2 priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " ICDIPR52[23:16] ,INTIICNAKI2 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x88 8.--15. 1. " ICDIPR52[15:8] ,INTIICSTI2 priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " ICDIPR52[7:0] ,INTIICSPI2 priority"
|
|
line.long 0x8C "ICDIPR53,Interrupt Priority Register 53"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " ICDIPR53[31:24] ,INTIICTI3 priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " ICDIPR53[23:16] ,INTIICRI3 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x8C 8.--15. 1. " ICDIPR53[15:8] ,INTIICTEI3 priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " ICDIPR53[7:0] ,INTIICTMOI2 priority"
|
|
line.long 0x90 "ICDIPR54,Interrupt Priority Register 54"
|
|
hexmask.long.byte 0x90 24.--31. 1. " ICDIPR54[31:24] ,INTIICALI3 priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " ICDIPR54[23:16] ,INTIICNAKI3 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x90 8.--15. 1. " ICDIPR54[15:8] ,INTIICSTI3 priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " ICDIPR54[7:0] ,INTIICSPI3 priority"
|
|
line.long 0x94 "ICDIPR55,Interrupt Priority Register 55"
|
|
hexmask.long.byte 0x94 24.--31. 1. " ICDIPR55[31:24] ,RXI0 priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " ICDIPR55[23:16] ,ERI0 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x94 8.--15. 1. " ICDIPR55[15:8] ,BRI0 priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " ICDIPR55[7:0] ,INTIICTMOI3 priority"
|
|
line.long 0x98 "ICDIPR56,Interrupt Priority Register 56"
|
|
hexmask.long.byte 0x98 24.--31. 1. " ICDIPR56[31:24] ,RXI1 priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " ICDIPR56[23:16] ,ERI1 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x98 8.--15. 1. " ICDIPR56[15:8] ,BRI1 priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " ICDIPR56[7:0] ,TXI0 priority"
|
|
line.long 0x9C "ICDIPR57,Interrupt Priority Register 57"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " ICDIPR57[31:24] ,RXI2 priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " ICDIPR57[23:16] ,ERI2 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x9C 8.--15. 1. " ICDIPR57[15:8] ,BRI2 priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " ICDIPR57[7:0] ,TXI1 priority"
|
|
line.long 0xA0 "ICDIPR58,Interrupt Priority Register 58"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " ICDIPR58[31:24] ,RXI3 priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " ICDIPR58[23:16] ,ERI3 priority"
|
|
textline " "
|
|
hexmask.long.byte 0xA0 8.--15. 1. " ICDIPR58[15:8] ,BRI3 priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " ICDIPR58[7:0] ,TXI2 priority"
|
|
line.long 0xA4 "ICDIPR59,Interrupt Priority Register 59"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " ICDIPR59[31:24] ,RXI4 priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " ICDIPR59[23:16] ,ERI4 priority"
|
|
textline " "
|
|
hexmask.long.byte 0xA4 8.--15. 1. " ICDIPR59[15:8] ,BRI4 priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " ICDIPR59[7:0] ,TXI3 priority"
|
|
line.long 0xA8 "ICDIPR60,Interrupt Priority Register 60"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " ICDIPR60[31:24] ,RXI5 priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " ICDIPR60[23:16] ,ERI5 priority"
|
|
textline " "
|
|
hexmask.long.byte 0xA8 8.--15. 1. " ICDIPR60[15:8] ,BRI5 priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " ICDIPR60[7:0] ,TXI4 priority"
|
|
line.long 0xAC "ICDIPR61,Interrupt Priority Register 61"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " ICDIPR61[31:24] ,RXI6 priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " ICDIPR61[23:16] ,ERI6 priority"
|
|
textline " "
|
|
hexmask.long.byte 0xAC 8.--15. 1. " ICDIPR61[15:8] ,BRI6 priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " ICDIPR61[7:0] ,TXI5 priority"
|
|
line.long 0xB0 "ICDIPR62,Interrupt Priority Register 62"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " ICDIPR62[31:24] ,RXI7 priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " ICDIPR62[23:16] ,ERI7 priority"
|
|
textline " "
|
|
hexmask.long.byte 0xB0 8.--15. 1. " ICDIPR62[15:8] ,BRI7 priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " ICDIPR62[7:0] ,TXI6 priority"
|
|
line.long 0xB4 "ICDIPR63,Interrupt Priority Register 63"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " ICDIPR63[31:24] ,INTRCAN0REC priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " ICDIPR63[23:16] ,INTRCANGRECC priority"
|
|
textline " "
|
|
hexmask.long.byte 0xB4 8.--15. 1. " ICDIPR63[15:8] ,INTRCANGERR priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " ICDIPR63[7:0] ,TXI7 priority"
|
|
line.long 0xB8 "ICDIPR64,Interrupt Priority Register 64"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " ICDIPR64[31:24] ,INTRCAN1ERR priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " ICDIPR64[23:16] ,INTRCAN1REC priority"
|
|
textline " "
|
|
hexmask.long.byte 0xB8 8.--15. 1. " ICDIPR64[15:8] ,INTRCAN0TRX priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " ICDIPR64[7:0] ,INTRCAN0ERR priority"
|
|
line.long 0xBC "ICDIPR65,Interrupt Priority Register 65"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " ICDIPR65[31:24] ,INTRCAN2TRX priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " ICDIPR65[23:16] ,INTRCAN2ERR priority"
|
|
textline " "
|
|
hexmask.long.byte 0xBC 8.--15. 1. " ICDIPR65[15:8] ,INTRCAN2REC priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " ICDIPR65[7:0] ,INTRCAN1TRX priority"
|
|
line.long 0xC0 "ICDIPR66,Interrupt Priority Register 66"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " ICDIPR66[31:24] ,INTRCAN4REC priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " ICDIPR66[23:16] ,INTRCAN3TRX priority"
|
|
textline " "
|
|
hexmask.long.byte 0xC0 8.--15. 1. " ICDIPR66[15:8] ,INTRCAN3ERR priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " ICDIPR66[7:0] ,INTRCAN3REC priority"
|
|
line.long 0xC4 "ICDIPR67,Interrupt Priority Register 67"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " ICDIPR67[31:24] ,SPRI0 priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " ICDIPR67[23:16] ,SPEI0 priority"
|
|
textline " "
|
|
hexmask.long.byte 0xC4 8.--15. 1. " ICDIPR67[15:8] ,INTRCAN4TRX priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " ICDIPR67[7:0] ,INTRCAN4ERR priority"
|
|
line.long 0xC8 "ICDIPR67,Interrupt Priority Register 68"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " ICDIPR68[31:24] ,SPTI1 priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " ICDIPR68[23:16] ,SPRI1 priority"
|
|
textline " "
|
|
hexmask.long.byte 0xC8 8.--15. 1. " ICDIPR68[15:8] ,SPEI1 priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " ICDIPR68[7:0] ,SPTI0 priority"
|
|
line.long 0xCC "ICDIPR69,Interrupt Priority Register 69"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " ICDIPR69[31:24] ,SPEI3 priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " ICDIPR69[23:16] ,SPTI2 priority"
|
|
textline " "
|
|
hexmask.long.byte 0xCC 8.--15. 1. " ICDIPR69[15:8] ,SPRI2 priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " ICDIPR69[7:0] ,SPEI2 priority"
|
|
line.long 0xD0 "ICDIPR70,Interrupt Priority Register 70"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " ICDIPR70[31:24] ,SPRI4 priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " ICDIPR70[23:16] ,SPEI4 priority"
|
|
textline " "
|
|
hexmask.long.byte 0xD0 8.--15. 1. " ICDIPR70[15:8] ,SPTI3 priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " ICDIPR70[7:0] ,SPRI3 priority"
|
|
line.long 0xD4 "ICDIPR71,Interrupt Priority Register 71"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " ICDIPR71[31:24] ,IEBBTSTA priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " ICDIPR71[23:16] ,IEBBTERR priority"
|
|
textline " "
|
|
hexmask.long.byte 0xD4 8.--15. 1. " ICDIPR71[15:8] ,IEBBTD priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " ICDIPR71[7:0] ,SPTI4 priority"
|
|
line.long 0xD8 "ICDIPR72,Interrupt Priority Register 72"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " ICDIPR72[31:24] ,ITARG priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " ICDIPR72[23:16] ,IERR priority"
|
|
textline " "
|
|
hexmask.long.byte 0xD8 8.--15. 1. " ICDIPR72[15:8] ,ISY priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " ICDIPR72[7:0] ,IEBBTV priority"
|
|
line.long 0xDC "ICDIPR73,Interrupt Priority Register 73"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " ICDIPR73[31:24] ,STERB/BTOERB priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " ICDIPR73[23:16] ,IREADY priority"
|
|
textline " "
|
|
hexmask.long.byte 0xDC 8.--15. 1. " ICDIPR73[15:8] ,IBUF priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " ICDIPR73[7:0] ,ISEC priority"
|
|
line.long 0xE0 "ICDIPR74,Interrupt Priority Register 74"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " ICDIPR74[31:24] ,MMC0 priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " ICDIPR74[23:16] ,FLTREQ1I priority"
|
|
textline " "
|
|
hexmask.long.byte 0xE0 8.--15. 1. " ICDIPR74[15:8] ,FLTREQ0I priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " ICDIPR74[7:0] ,FLTENDI priority"
|
|
line.long 0xE4 "ICDIPR75,Interrupt Priority Register 75"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " ICDIPR75[31:24] ,SDHI0_0 priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " ICDIPR75[23:16] ,SDHI0_3 priority"
|
|
textline " "
|
|
hexmask.long.byte 0xE4 8.--15. 1. " ICDIPR75[15:8] ,MMC2 priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " ICDIPR75[7:0] ,MMC1 priority"
|
|
line.long 0xE8 "ICDIPR76,Interrupt Priority Register 76"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " ICDIPR76[31:24] ,SDHI1_1 priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " ICDIPR76[23:16] ,SDHI1_0 priority"
|
|
textline " "
|
|
hexmask.long.byte 0xE8 8.--15. 1. " ICDIPR76[15:8] ,SDHI1_3 priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " ICDIPR76[7:0] ,SDHI0_1 priority"
|
|
line.long 0xEC "ICDIPR77,Interrupt Priority Register 77"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " ICDIPR77[31:24] ,SCUAI0 priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " ICDIPR77[23:16] ,CUP priority"
|
|
textline " "
|
|
hexmask.long.byte 0xEC 8.--15. 1. " ICDIPR77[15:8] ,PRD priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " ICDIPR77[7:0] ,ARM priority"
|
|
line.long 0xF0 "ICDIPR78,Interrupt Priority Register 78"
|
|
hexmask.long.byte 0xF0 24.--31. 1. " ICDIPR78[31:24] ,SCUFDI2 priority"
|
|
hexmask.long.byte 0xF0 16.--23. 1. " ICDIPR78[23:16] ,SCUFDI1 priority"
|
|
textline " "
|
|
hexmask.long.byte 0xF0 8.--15. 1. " ICDIPR78[15:8] ,SCUFDI0 priority"
|
|
hexmask.long.byte 0xF0 0.--7. 1. " ICDIPR78[7:0] ,SCUAI1 priority"
|
|
line.long 0xF4 "ICDIPR79,Interrupt Priority Register 79"
|
|
hexmask.long.byte 0xF4 24.--31. 1. " ICDIPR79[31:24] ,SCUFUI2 priority"
|
|
hexmask.long.byte 0xF4 16.--23. 1. " ICDIPR79[23:16] ,SCUFUI1 priority"
|
|
textline " "
|
|
hexmask.long.byte 0xF4 8.--15. 1. " ICDIPR79[15:8] ,SCUFUI0 priority"
|
|
hexmask.long.byte 0xF4 0.--7. 1. " ICDIPR79[7:0] ,SCUFDI3 priority"
|
|
line.long 0xF8 "ICDIPR80,Interrupt Priority Register 80"
|
|
hexmask.long.byte 0xF8 24.--31. 1. " ICDIPR80[31:24] ,SCUDVI2 priority"
|
|
hexmask.long.byte 0xF8 16.--23. 1. " ICDIPR80[23:16] ,SCUDVI1 priority"
|
|
textline " "
|
|
hexmask.long.byte 0xF8 8.--15. 1. " ICDIPR80[15:8] ,SCUDVI0 priority"
|
|
hexmask.long.byte 0xF8 0.--7. 1. " ICDIPR80[7:0] ,SCUFUI3 priority"
|
|
line.long 0xFC "ICDIPR81,Interrupt Priority Register 81"
|
|
hexmask.long.byte 0xFC 24.--31. 1. " ICDIPR81[31:24] ,DRC1 Channel 0 priority"
|
|
hexmask.long.byte 0xFC 16.--23. 1. " ICDIPR81[23:16] ,MLB_SINT priority"
|
|
textline " "
|
|
hexmask.long.byte 0xFC 8.--15. 1. " ICDIPR81[15:8] ,MLB_CINT priority"
|
|
hexmask.long.byte 0xFC 0.--7. 1. " ICDIPR81[7:0] ,SCUDVI3 priority"
|
|
line.long 0x100 "ICDIPR82,Interrupt Priority Register 82"
|
|
hexmask.long.byte 0x100 24.--31. 1. " ICDIPR82[31:24] ,LINI0_INT_T priority"
|
|
hexmask.long.byte 0x100 0.--7. 1. " ICDIPR82[7:0] ,DRC1 Channel 1 priority"
|
|
line.long 0x104 "ICDIPR83,Interrupt Priority Register 83"
|
|
hexmask.long.byte 0x104 24.--31. 1. " ICDIPR83[31:24] ,LINI1_INT_T priority"
|
|
hexmask.long.byte 0x104 16.--23. 1. " ICDIPR83[23:16] ,LINI0_INT_M priority"
|
|
textline " "
|
|
hexmask.long.byte 0x104 8.--15. 1. " ICDIPR83[15:8] ,LINI0_INT_S priority"
|
|
hexmask.long.byte 0x104 0.--7. 1. " ICDIPR83[7:0] ,LINI0_INT_R priority"
|
|
line.long 0x108 "ICDIPR84,Interrupt Priority Register 84"
|
|
hexmask.long.byte 0x108 16.--23. 1. " ICDIPR84[23:16] ,LINI1_INT_M priority"
|
|
hexmask.long.byte 0x108 8.--15. 1. " ICDIPR84[15:8] ,LINI1_INT_S priority"
|
|
textline " "
|
|
hexmask.long.byte 0x108 0.--7. 1. " ICDIPR84[7:0] ,LINI1_INT_R priority"
|
|
group.long 0x558++0xF
|
|
line.long 0x00 "ICDIPR86,Interrupt Priority Register 86"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ICDIPR86[31:24] ,ERI0 priority"
|
|
line.long 0x04 "ICDIPR87,Interrupt Priority Register 87"
|
|
hexmask.long.byte 0x04 24.--31. 1. " ICDIPR87[31:24] ,ERI1 priority"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ICDIPR87[23:16] ,TEI0 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " ICDIPR87[15:8] ,TXI0 priority"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ICDIPR87[7:0] ,RXI0 priority"
|
|
line.long 0x08 "ICDIPR88,Interrupt Priority Register 88"
|
|
hexmask.long.byte 0x08 24.--31. 1. " ICDIPR88[31:24] ,AVBI_DATA priority"
|
|
hexmask.long.byte 0x08 16.--23. 1. " ICDIPR88[23:16] ,TEI1 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " ICDIPR88[15:8] ,TXI1 priority"
|
|
hexmask.long.byte 0x08 0.--7. 1. " ICDIPR88[7:0] ,RXI1 priority"
|
|
line.long 0x0C "ICDIPR89,Interrupt Priority Register 89"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " ICDIPR89[31:24] ,ETHERI priority"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " ICDIPR89[23:16] ,AVBI_MAC priority"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " ICDIPR89[15:8] ,AVBI_MANAGE priority"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " ICDIPR89[7:0] ,AVBI_ERROR priority"
|
|
group.long 0x56C++0x3
|
|
line.long 0x00 "ICDIPR91,Interrupt Priority Register 91"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ICDIPR91[7:0] ,CEUI priority"
|
|
group.long 0x57C++0x13
|
|
line.long 0x00 "ICDIPR95,Interrupt Priority Register 95"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ICDIPR95[31:24] ,X2HPERI1_ERRINT priority"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ICDIPR95[23:16] ,H2XIC1_ERRINT priority"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ICDIPR95[15:8] ,H2XMLB_ERRINT priority"
|
|
line.long 0x04 "ICDIPR96,Interrupt Priority Register 96"
|
|
hexmask.long.byte 0x04 24.--31. 1. " ICDIPR96[31:24] ,X2HPERI67_ERRINT priority"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ICDIPR96[23:16] ,X2HPERI5_ERRINT priority"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " ICDIPR96[15:8] ,X2HPERI34_ERRINT priority"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ICDIPR96[7:0] ,X2HPERI2_ERRINT priority"
|
|
line.long 0x08 "ICDIPR97,Interrupt Priority Register 97"
|
|
hexmask.long.byte 0x08 24.--31. 1. " ICDIPR97[31:24] ,X2HSPI2_ERRINT priority"
|
|
hexmask.long.byte 0x08 16.--23. 1. " ICDIPR97[23:16] ,X2HSPI1_ERRINT priority"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " ICDIPR97[15:8] ,X2HBSC_ERRINT priority"
|
|
hexmask.long.byte 0x08 0.--7. 1. " ICDIPR97[7:0] ,X2HDBGR_ERRINT priority"
|
|
line.long 0x0C "ICDIPR98,Interrupt Priority Register 98"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " ICDIPR98[31:24] ,PFVEI0 priority"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " ICDIPR98[23:16] ,OFFI0 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " ICDIPR98[15:8] ,IFEI0 priority"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " ICDIPR98[7:0] ,PRRI priority"
|
|
line.long 0x10 "ICDIPR99,Interrupt Priority Register 99"
|
|
hexmask.long.byte 0x10 16.--23. 1. " ICDIPR99[23:16] ,PFVEI1 priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " ICDIPR99[15:8] ,OFFI1 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--7. 1. " ICDIPR99[7:0] ,IFEI1 priority"
|
|
group.long 0x5A0++0x10B
|
|
line.long 0x00 "ICDIPR104,Interrupt Priority Register 104"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ICDIPR104[31:24] ,TINT3 priority"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ICDIPR104[23:16] ,TINT2 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ICDIPR104[15:8] ,TINT1 priority"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ICDIPR104[7:0] ,TINT0 priority"
|
|
line.long 0x04 "ICDIPR105,Interrupt Priority Register 105"
|
|
hexmask.long.byte 0x04 24.--31. 1. " ICDIPR105[31:24] ,TINT7 priority"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ICDIPR105[23:16] ,TINT6 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " ICDIPR105[15:8] ,TINT5 priority"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ICDIPR105[7:0] ,TINT4 priority"
|
|
line.long 0x08 "ICDIPR106,Interrupt Priority Register 106"
|
|
hexmask.long.byte 0x08 24.--31. 1. " ICDIPR106[31:24] ,TINT11 priority"
|
|
hexmask.long.byte 0x08 16.--23. 1. " ICDIPR106[23:16] ,TINT10 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " ICDIPR106[15:8] ,TINT9 priority"
|
|
hexmask.long.byte 0x08 0.--7. 1. " ICDIPR106[7:0] ,TINT8 priority"
|
|
line.long 0x0C "ICDIPR107,Interrupt Priority Register 107"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " ICDIPR107[31:24] ,TINT15 priority"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " ICDIPR107[23:16] ,TINT14 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " ICDIPR107[15:8] ,TINT13 priority"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " ICDIPR107[7:0] ,TINT12 priority"
|
|
line.long 0x10 "ICDIPR108,Interrupt Priority Register 108"
|
|
hexmask.long.byte 0x10 24.--31. 1. " ICDIPR108[31:24] ,TINT19 priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " ICDIPR108[23:16] ,TINT18 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x10 8.--15. 1. " ICDIPR108[15:8] ,TINT17 priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " ICDIPR108[7:0] ,TINT16 priority"
|
|
line.long 0x14 "ICDIPR109,Interrupt Priority Register 109"
|
|
hexmask.long.byte 0x14 24.--31. 1. " ICDIPR109[31:24] ,TINT23 priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " ICDIPR109[23:16] ,TINT22 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x14 8.--15. 1. " ICDIPR109[15:8] ,TINT21 priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " ICDIPR109[7:0] ,TINT20 priority"
|
|
line.long 0x18 "ICDIPR110,Interrupt Priority Register 110"
|
|
hexmask.long.byte 0x18 24.--31. 1. " ICDIPR110[31:24] ,TINT27 priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " ICDIPR110[23:16] ,TINT26 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x18 8.--15. 1. " ICDIPR110[15:8] ,TINT25 priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " ICDIPR110[7:0] ,TINT24 priority"
|
|
line.long 0x1C "ICDIPR111,Interrupt Priority Register 111"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " ICDIPR111[31:24] ,TINT31 priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " ICDIPR111[23:16] ,TINT30 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x1C 8.--15. 1. " ICDIPR111[15:8] ,TINT29 priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " ICDIPR111[7:0] ,TINT28 priority"
|
|
line.long 0x20 "ICDIPR112,Interrupt Priority Register 112"
|
|
hexmask.long.byte 0x20 24.--31. 1. " ICDIPR112[31:24] ,TINT35 priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " ICDIPR112[23:16] ,TINT34 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x20 8.--15. 1. " ICDIPR112[15:8] ,TINT33 priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " ICDIPR112[7:0] ,TINT32 priority"
|
|
line.long 0x24 "ICDIPR113,Interrupt Priority Register 113"
|
|
hexmask.long.byte 0x24 24.--31. 1. " ICDIPR113[31:24] ,TINT39 priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " ICDIPR113[23:16] ,TINT38 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x24 8.--15. 1. " ICDIPR113[15:8] ,TINT37 priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " ICDIPR113[7:0] ,TINT36 priority"
|
|
line.long 0x28 "ICDIPR114,Interrupt Priority Register 114"
|
|
hexmask.long.byte 0x28 24.--31. 1. " ICDIPR114[31:24] ,TINT43 priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " ICDIPR114[23:16] ,TINT42 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x28 8.--15. 1. " ICDIPR114[15:8] ,TINT41 priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " ICDIPR114[7:0] ,TINT40 priority"
|
|
line.long 0x2C "ICDIPR115,Interrupt Priority Register 115"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " ICDIPR115[31:24] ,TINT47 priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " ICDIPR115[23:16] ,TINT46 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x2C 8.--15. 1. " ICDIPR115[15:8] ,TINT45 priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " ICDIPR115[7:0] ,TINT44 priority"
|
|
line.long 0x30 "ICDIPR116,Interrupt Priority Register 116"
|
|
hexmask.long.byte 0x30 24.--31. 1. " ICDIPR116[31:24] ,TINT51 priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " ICDIPR116[23:16] ,TINT50 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x30 8.--15. 1. " ICDIPR116[15:8] ,TINT49 priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " ICDIPR116[7:0] ,TINT48 priority"
|
|
line.long 0x34 "ICDIPR117,Interrupt Priority Register 117"
|
|
hexmask.long.byte 0x34 24.--31. 1. " ICDIPR117[31:24] ,TINT55 priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " ICDIPR117[23:16] ,TINT54 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x34 8.--15. 1. " ICDIPR117[15:8] ,TINT53 priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " ICDIPR117[7:0] ,TINT52 priority"
|
|
line.long 0x38 "ICDIPR118,Interrupt Priority Register 118"
|
|
hexmask.long.byte 0x38 24.--31. 1. " ICDIPR118[31:24] ,TINT59 priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " ICDIPR118[23:16] ,TINT58 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x38 8.--15. 1. " ICDIPR118[15:8] ,TINT57 priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " ICDIPR118[7:0] ,TINT56 priority"
|
|
line.long 0x3C "ICDIPR119,Interrupt Priority Register 119"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " ICDIPR119[31:24] ,TINT63 priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " ICDIPR119[23:16] ,TINT62 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x3C 8.--15. 1. " ICDIPR119[15:8] ,TINT61 priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " ICDIPR119[7:0] ,TINT60 priority"
|
|
line.long 0x40 "ICDIPR120,Interrupt Priority Register 120"
|
|
hexmask.long.byte 0x40 24.--31. 1. " ICDIPR120[31:24] ,TINT67 priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " ICDIPR120[23:16] ,TINT66 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x40 8.--15. 1. " ICDIPR120[15:8] ,TINT65 priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " ICDIPR120[7:0] ,TINT64 priority"
|
|
line.long 0x44 "ICDIPR121,Interrupt Priority Register 121"
|
|
hexmask.long.byte 0x44 24.--31. 1. " ICDIPR121[31:24] ,TINT71 priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " ICDIPR121[23:16] ,TINT70 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x44 8.--15. 1. " ICDIPR121[15:8] ,TINT69 priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " ICDIPR121[7:0] ,TINT68 priority"
|
|
line.long 0x48 "ICDIPR122,Interrupt Priority Register 122"
|
|
hexmask.long.byte 0x48 24.--31. 1. " ICDIPR122[31:24] ,TINT75 priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " ICDIPR122[23:16] ,TINT74 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x48 8.--15. 1. " ICDIPR122[15:8] ,TINT73 priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " ICDIPR122[7:0] ,TINT72 priority"
|
|
line.long 0x4C "ICDIPR123,Interrupt Priority Register 123"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " ICDIPR123[31:24] ,TINT79 priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " ICDIPR123[23:16] ,TINT78 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x4C 8.--15. 1. " ICDIPR123[15:8] ,TINT77 priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " ICDIPR123[7:0] ,TINT76 priority"
|
|
line.long 0x50 "ICDIPR124,Interrupt Priority Register 124"
|
|
hexmask.long.byte 0x50 24.--31. 1. " ICDIPR124[31:24] ,TINT83 priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " ICDIPR124[23:16] ,TINT82 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x50 8.--15. 1. " ICDIPR124[15:8] ,TINT81 priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " ICDIPR124[7:0] ,TINT80 priority"
|
|
line.long 0x54 "ICDIPR125,Interrupt Priority Register 125"
|
|
hexmask.long.byte 0x54 24.--31. 1. " ICDIPR125[31:24] ,TINT87 priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " ICDIPR125[23:16] ,TINT86 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x54 8.--15. 1. " ICDIPR125[15:8] ,TINT85 priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " ICDIPR125[7:0] ,TINT84 priority"
|
|
line.long 0x58 "ICDIPR126,Interrupt Priority Register 126"
|
|
hexmask.long.byte 0x58 24.--31. 1. " ICDIPR126[31:24] ,TINT91 priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " ICDIPR126[23:16] ,TINT90 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x58 8.--15. 1. " ICDIPR126[15:8] ,TINT89 priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " ICDIPR126[7:0] ,TINT88 priority"
|
|
line.long 0x5C "ICDIPR127,Interrupt Priority Register 127"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " ICDIPR127[31:24] ,TINT95 priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " ICDIPR127[23:16] ,TINT94 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x5C 8.--15. 1. " ICDIPR127[15:8] ,TINT93 priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " ICDIPR127[7:0] ,TINT92 priority"
|
|
line.long 0x60 "ICDIPR128,Interrupt Priority Register 128"
|
|
hexmask.long.byte 0x60 24.--31. 1. " ICDIPR128[31:24] ,TINT99 priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " ICDIPR128[23:16] ,TINT98 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x60 8.--15. 1. " ICDIPR128[15:8] ,TINT97 priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " ICDIPR128[7:0] ,TINT96 priority"
|
|
line.long 0x64 "ICDIPR129,Interrupt Priority Register 129"
|
|
hexmask.long.byte 0x64 24.--31. 1. " ICDIPR129[31:24] ,TINT103 priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " ICDIPR129[23:16] ,TINT102 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x64 8.--15. 1. " ICDIPR129[15:8] ,TINT101 priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " ICDIPR129[7:0] ,TINT100 priority"
|
|
line.long 0x68 "ICDIPR130,Interrupt Priority Register 130"
|
|
hexmask.long.byte 0x68 24.--31. 1. " ICDIPR130[31:24] ,TINT107 priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " ICDIPR130[23:16] ,TINT106 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x68 8.--15. 1. " ICDIPR130[15:8] ,TINT105 priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " ICDIPR130[7:0] ,TINT104 priority"
|
|
line.long 0x6C "ICDIPR131,Interrupt Priority Register 131"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " ICDIPR131[31:24] ,TINT111 priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " ICDIPR131[23:16] ,TINT110 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x6C 8.--15. 1. " ICDIPR131[15:8] ,TINT109 priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " ICDIPR131[7:0] ,TINT108 priority"
|
|
line.long 0x70 "ICDIPR132,Interrupt Priority Register 132"
|
|
hexmask.long.byte 0x70 24.--31. 1. " ICDIPR132[31:24] ,TINT115 priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " ICDIPR132[23:16] ,TINT114 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x70 8.--15. 1. " ICDIPR132[15:8] ,TINT113 priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " ICDIPR132[7:0] ,TINT112 priority"
|
|
line.long 0x74 "ICDIPR133,Interrupt Priority Register 133"
|
|
hexmask.long.byte 0x74 24.--31. 1. " ICDIPR133[31:24] ,TINT119 priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " ICDIPR133[23:16] ,TINT118 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x74 8.--15. 1. " ICDIPR133[15:8] ,TINT117 priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " ICDIPR133[7:0] ,TINT116 priority"
|
|
line.long 0x78 "ICDIPR134,Interrupt Priority Register 134"
|
|
hexmask.long.byte 0x78 24.--31. 1. " ICDIPR134[31:24] ,TINT123 priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " ICDIPR134[23:16] ,TINT122 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x78 8.--15. 1. " ICDIPR134[15:8] ,TINT121 priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " ICDIPR134[7:0] ,TINT120 priority"
|
|
line.long 0x7C "ICDIPR135,Interrupt Priority Register 135"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " ICDIPR135[31:24] ,TINT127 priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " ICDIPR135[23:16] ,TINT126 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x7C 8.--15. 1. " ICDIPR135[15:8] ,TINT125 priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " ICDIPR135[7:0] ,TINT124 priority"
|
|
line.long 0x80 "ICDIPR136,Interrupt Priority Register 136"
|
|
hexmask.long.byte 0x80 24.--31. 1. " ICDIPR136[31:24] ,TINT131 priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " ICDIPR136[23:16] ,TINT130 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x80 8.--15. 1. " ICDIPR136[15:8] ,TINT129 priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " ICDIPR136[7:0] ,TINT128 priority"
|
|
line.long 0x84 "ICDIPR137,Interrupt Priority Register 137"
|
|
hexmask.long.byte 0x84 24.--31. 1. " ICDIPR137[31:24] ,TINT135 priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " ICDIPR137[23:16] ,TINT134 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x84 8.--15. 1. " ICDIPR137[15:8] ,TINT133 priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " ICDIPR137[7:0] ,TINT132 priority"
|
|
line.long 0x88 "ICDIPR138,Interrupt Priority Register 138"
|
|
hexmask.long.byte 0x88 24.--31. 1. " ICDIPR138[31:24] ,TINT139 priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " ICDIPR138[23:16] ,TINT138 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x88 8.--15. 1. " ICDIPR138[15:8] ,TINT137 priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " ICDIPR138[7:0] ,TINT136 priority"
|
|
line.long 0x8C "ICDIPR139,Interrupt Priority Register 139"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " ICDIPR139[31:24] ,TINT143 priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " ICDIPR139[23:16] ,TINT142 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x8C 8.--15. 1. " ICDIPR139[15:8] ,TINT141 priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " ICDIPR139[7:0] ,TINT140 priority"
|
|
line.long 0x90 "ICDIPR140,Interrupt Priority Register 140"
|
|
hexmask.long.byte 0x90 24.--31. 1. " ICDIPR140[31:24] ,TINT147 priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " ICDIPR140[23:16] ,TINT146 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x90 8.--15. 1. " ICDIPR140[15:8] ,TINT145 priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " ICDIPR140[7:0] ,TINT144 priority"
|
|
line.long 0x94 "ICDIPR141,Interrupt Priority Register 141"
|
|
hexmask.long.byte 0x94 24.--31. 1. " ICDIPR141[31:24] ,TINT151 priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " ICDIPR141[23:16] ,TINT150 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x94 8.--15. 1. " ICDIPR141[15:8] ,TINT149 priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " ICDIPR141[7:0] ,TINT148 priority"
|
|
line.long 0x98 "ICDIPR142,Interrupt Priority Register 142"
|
|
hexmask.long.byte 0x98 24.--31. 1. " ICDIPR142[31:24] ,TINT155 priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " ICDIPR142[23:16] ,TINT154 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x98 8.--15. 1. " ICDIPR142[15:8] ,TINT153 priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " ICDIPR142[7:0] ,TINT152 priority"
|
|
line.long 0x9C "ICDIPR143,Interrupt Priority Register 143"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " ICDIPR143[31:24] ,TINT159 priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " ICDIPR143[23:16] ,TINT158 priority"
|
|
textline " "
|
|
hexmask.long.byte 0x9C 8.--15. 1. " ICDIPR143[15:8] ,TINT157 priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " ICDIPR143[7:0] ,TINT156 priority"
|
|
line.long 0xA0 "ICDIPR144,Interrupt Priority Register 144"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " ICDIPR144[31:24] ,TINT163 priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " ICDIPR144[23:16] ,TINT162 priority"
|
|
textline " "
|
|
hexmask.long.byte 0xA0 8.--15. 1. " ICDIPR144[15:8] ,TINT161 priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " ICDIPR144[7:0] ,TINT160 priority"
|
|
line.long 0xA4 "ICDIPR145,Interrupt Priority Register 145"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " ICDIPR145[31:24] ,TINT167 priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " ICDIPR145[23:16] ,TINT166 priority"
|
|
textline " "
|
|
hexmask.long.byte 0xA4 8.--15. 1. " ICDIPR145[15:8] ,TINT165 priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " ICDIPR145[7:0] ,TINT164 priority"
|
|
line.long 0xA8 "ICDIPR146,Interrupt Priority Register 146"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " ICDIPR146[23:16] ,TINT170 priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " ICDIPR146[15:8] ,TINT169 priority"
|
|
textline " "
|
|
hexmask.long.byte 0xA8 0.--7. 1. " ICDIPR146[7:0] ,TINT168 priority"
|
|
tree.end
|
|
tree "Interrupt Processor Target Registers"
|
|
group.long 0x800++0x13
|
|
line.long 0x00 "ICDIPTR0,Interrupt Processor Target 0 (GIC Software Interrupt 0)"
|
|
line.long 0x04 "ICDIPTR1,Interrupt Processor Target 1 (GIC Software Interrupt 1)"
|
|
line.long 0x08 "ICDIPTR2,Interrupt Processor Target 2 (GIC Software Interrupt 2)"
|
|
line.long 0x0C "ICDIPTR3,Interrupt Processor Target 3 (GIC Software Interrupt 3)"
|
|
line.long 0x10 "ICDIPTR4,Interrupt Processor Target 4"
|
|
hexmask.long.byte 0x10 24.--31. 1. " ICDIPTR3[31:24] ,CTIIRQ0 processor target"
|
|
hexmask.long.byte 0x10 16.--23. 1. " ICDIPTR3[23:16] ,COMMTX0 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x10 8.--15. 1. " ICDIPTR3[15:8] ,COMMRX0 processor target"
|
|
hexmask.long.byte 0x10 0.--7. 1. " ICDIPTR3[7:0] ,PMUIRQ0 processor target"
|
|
group.long 0x820++0x1B
|
|
line.long 0x00 "ICDIPTR8,Interrupt Processor Target 8"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ICDIPTR8[31:24] ,IRQ3 processor target"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ICDIPTR8[23:16] ,IRQ2 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ICDIPTR8[15:8] ,IRQ1 processor target"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ICDIPTR8[7:0] ,IRQ0 processor target"
|
|
line.long 0x04 "ICDIPTR9,Interrupt Processor Target 9"
|
|
hexmask.long.byte 0x04 24.--31. 1. " ICDIPTR9[31:24] ,IRQ7 processor target"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ICDIPTR9[23:16] ,IRQ6 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " ICDIPTR9[15:8] ,IRQ5 processor target"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ICDIPTR9[7:0] ,IRQ4 processor target"
|
|
line.long 0x08 "ICDIPTR10,Interrupt Processor Target 10"
|
|
hexmask.long.byte 0x08 24.--31. 1. " ICDIPTR10[31:24] ,DMAINT2 processor target"
|
|
hexmask.long.byte 0x08 16.--23. 1. " ICDIPTR10[23:16] ,DMAINT1 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " ICDIPTR10[15:8] ,DMAINT0 processor target"
|
|
hexmask.long.byte 0x08 0.--7. 1. " ICDIPTR10[7:0] ,PL310ERR processor target"
|
|
line.long 0x0C "ICDIPTR11,Interrupt Processor Target 11"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " ICDIPTR11[31:24] ,DMAINT6 processor target"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " ICDIPTR11[23:16] ,DMAINT5 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " ICDIPTR11[15:8] ,DMAINT4 processor target"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " ICDIPTR11[7:0] ,DMAINT3 processor target"
|
|
line.long 0x10 "ICDIPTR12,Interrupt Processor Target 12"
|
|
hexmask.long.byte 0x10 24.--31. 1. " ICDIPTR12[31:24] ,DMAINT10 processor target"
|
|
hexmask.long.byte 0x10 16.--23. 1. " ICDIPTR12[23:16] ,DMAINT9 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x10 8.--15. 1. " ICDIPTR12[15:8] ,DMAINT8 processor target"
|
|
hexmask.long.byte 0x10 0.--7. 1. " ICDIPTR12[7:0] ,DMAINT7 processor target"
|
|
line.long 0x14 "ICDIPTR13,Interrupt Processor Target 13"
|
|
hexmask.long.byte 0x14 24.--31. 1. " ICDIPTR13[31:24] ,DMAINT14 processor target"
|
|
hexmask.long.byte 0x14 16.--23. 1. " ICDIPTR13[23:16] ,DMAINT13 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x14 8.--15. 1. " ICDIPTR13[15:8] ,DMAINT12 processor target"
|
|
hexmask.long.byte 0x14 0.--7. 1. " ICDIPTR13[7:0] ,DMAINT11 processor target"
|
|
line.long 0x18 "ICDIPTR14,Interrupt Processor Target 14"
|
|
hexmask.long.byte 0x18 8.--15. 1. " ICDIPTR14[15:8] ,DMAERR processor target"
|
|
hexmask.long.byte 0x18 0.--7. 1. " ICDIPTR14[7:0] ,DMAINT15 processor target"
|
|
group.long 0x848++0x16B
|
|
line.long 0x00 "ICDIPTR18,Interrupt Processor Target 18"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ICDIPTR18[31:24] ,S0_VI_VSYNC0 processor target"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ICDIPTR18[23:16] ,USBI1 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ICDIPTR18[15:8] ,USBI0 processor target"
|
|
line.long 0x04 "ICDIPTR19,Interrupt Processor Target 19"
|
|
hexmask.long.byte 0x04 24.--31. 1. " ICDIPTR19[31:24] ,S0_VFIELD0 processor target"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ICDIPTR19[23:16] ,GR3_VLINE0 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " ICDIPTR19[15:8] ,S0_VSYNCERR0 processor target"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ICDIPTR19[7:0] ,S0_LO_VSYNC0 processor target"
|
|
line.long 0x08 "ICDIPTR20,Interrupt Processor Target 20"
|
|
hexmask.long.byte 0x08 24.--31. 1. " ICDIPTR20[31:24] ,IV6_VBUFERR0 processor target"
|
|
hexmask.long.byte 0x08 16.--23. 1. " ICDIPTR20[23:16] ,IV5_VBUFERR0 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " ICDIPTR20[15:8] ,IV3_VBUFERR0 processor target"
|
|
hexmask.long.byte 0x08 0.--7. 1. " ICDIPTR20[7:0] ,IV1_VBUFERR0 processor target"
|
|
line.long 0x0C "ICDIPTR21,Interrupt Processor Target 21"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " ICDIPTR21[31:24] ,S1_VSYNCERR0 processor target"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " ICDIPTR21[23:16] ,S1_LO_VSYNC0 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " ICDIPTR21[15:8] ,S1_VI_VSYNC0 processor target"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " ICDIPTR21[7:0] ,S0_WLINE0 processor target"
|
|
line.long 0x10 "ICDIPTR22,Interrupt Processor Target 22"
|
|
hexmask.long.byte 0x10 24.--31. 1. " ICDIPTR22[31:24] ,S1_WLINE0 processor target"
|
|
hexmask.long.byte 0x10 16.--23. 1. " ICDIPTR22[23:16] ,IV4_VBUFERR0 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x10 8.--15. 1. " ICDIPTR22[15:8] ,IV2_VBUFERR0 processor target"
|
|
hexmask.long.byte 0x10 0.--7. 1. " ICDIPTR22[7:0] ,S1_VFIELD0 processor target"
|
|
line.long 0x14 "ICDIPTR23,Interrupt Processor Target 23"
|
|
hexmask.long.byte 0x14 24.--31. 1. " ICDIPTR23[31:24] ,OIR_VFIELD0 processor target"
|
|
hexmask.long.byte 0x14 16.--23. 1. " ICDIPTR23[23:16] ,OIR_VSYNCERR0 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x14 8.--15. 1. " ICDIPTR23[15:8] ,OIR_LO_VSYNC0 processor target"
|
|
hexmask.long.byte 0x14 0.--7. 1. " ICDIPTR23[7:0] ,OIR_VI_VSYNC0 processor target"
|
|
line.long 0x18 "ICDIPTR24,Interrupt Processor Target 24"
|
|
hexmask.long.byte 0x18 24.--31. 1. " ICDIPTR24[31:24] ,S0_VI_VSYNC1 processor target"
|
|
hexmask.long.byte 0x18 16.--23. 1. " ICDIPTR24[23:16] ,OIR_WLINE0 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x18 8.--15. 1. " ICDIPTR24[15:8] ,IV8_VBUFERR0 processor target"
|
|
hexmask.long.byte 0x18 0.--7. 1. " ICDIPTR24[7:0] ,IV7_VBUFERR0 processor target"
|
|
line.long 0x1C "ICDIPTR25,Interrupt Processor Target 25"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " ICDIPTR25[31:24] ,S0_VFIELD1 processor target"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " ICDIPTR25[23:16] ,GR3_VLINE1 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x1C 8.--15. 1. " ICDIPTR25[15:8] ,S0_VSYNCERR1 processor target"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " ICDIPTR25[7:0] ,S0_LO_VSYNC1 processor target"
|
|
line.long 0x20 "ICDIPTR26,Interrupt Processor Target 26"
|
|
hexmask.long.byte 0x20 24.--31. 1. " ICDIPTR26[31:24] ,IV6_VBUFERR1 processor target"
|
|
hexmask.long.byte 0x20 16.--23. 1. " ICDIPTR26[23:16] ,IV5_VBUFERR1 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x20 8.--15. 1. " ICDIPTR26[15:8] ,IV3_VBUFERR1 processor target"
|
|
hexmask.long.byte 0x20 0.--7. 1. " ICDIPTR26[7:0] ,IV1_VBUFERR1 processor target"
|
|
line.long 0x24 "ICDIPTR27,Interrupt Processor Target 27"
|
|
hexmask.long.byte 0x24 24.--31. 1. " ICDIPTR27[31:24] ,S1_VSYNCERR1 processor target"
|
|
hexmask.long.byte 0x24 16.--23. 1. " ICDIPTR27[23:16] ,S1_LO_VSYNC1 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x24 8.--15. 1. " ICDIPTR27[15:8] ,S1_VI_VSYNC1 processor target"
|
|
hexmask.long.byte 0x24 0.--7. 1. " ICDIPTR27[7:0] ,S0_WLINE1 processor target"
|
|
line.long 0x28 "ICDIPTR28,Interrupt Processor Target 28"
|
|
hexmask.long.byte 0x28 24.--31. 1. " ICDIPTR28[31:24] ,S1_WLINE1 processor target"
|
|
hexmask.long.byte 0x28 16.--23. 1. " ICDIPTR28[23:16] ,IV4_VBUFERR1 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x28 8.--15. 1. " ICDIPTR28[15:8] ,IV2_VBUFERR1 processor target"
|
|
hexmask.long.byte 0x28 0.--7. 1. " ICDIPTR28[7:0] ,S1_VFIELD1 processor target"
|
|
line.long 0x2C "ICDIPTR29,Interrupt Processor Target 29"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " ICDIPTR29[31:24] ,OIR_VFIELD1 processor target"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " ICDIPTR29[23:16] ,OIR_VLINE1 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x2C 8.--15. 1. " ICDIPTR29[15:8] ,OIR_LO_VSYNC1 processor target"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " ICDIPTR29[7:0] ,OIR_VI_VSYNC1 processor target"
|
|
line.long 0x30 "ICDIPTR30,Interrupt Processor Target 30"
|
|
hexmask.long.byte 0x30 24.--31. 1. " ICDIPTR30[31:24] ,IMRDI processor target"
|
|
hexmask.long.byte 0x30 16.--23. 1. " ICDIPTR30[23:16] ,OIR_WLINE1 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x30 8.--15. 1. " ICDIPTR30[15:8] ,IV8_VBUFERR1 processor target"
|
|
hexmask.long.byte 0x30 0.--7. 1. " ICDIPTR30[7:0] ,IV7_VBUFERR1 processor target"
|
|
line.long 0x34 "ICDIPTR31,Interrupt Processor Target 31"
|
|
hexmask.long.byte 0x34 24.--31. 1. " ICDIPTR31[31:24] ,JDTI processor target"
|
|
hexmask.long.byte 0x34 16.--23. 1. " ICDIPTR31[23:16] ,JEDI processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x34 8.--15. 1. " ICDIPTR31[15:8] ,IMR2I1 processor target"
|
|
hexmask.long.byte 0x34 0.--7. 1. " ICDIPTR31[7:0] ,IMR2I0 processor target"
|
|
line.long 0x38 "ICDIPTR32,Interrupt Processor Target 32"
|
|
hexmask.long.byte 0x38 24.--31. 1. " ICDIPTR32[31:24] ,INT1 processor target"
|
|
hexmask.long.byte 0x38 16.--23. 1. " ICDIPTR32[23:16] ,INT0 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x38 8.--15. 1. " ICDIPTR32[15:8] ,CMP1 processor target"
|
|
hexmask.long.byte 0x38 0.--7. 1. " ICDIPTR32[7:0] ,CMP0 processor target"
|
|
line.long 0x3C "ICDIPTR33,Interrupt Processor Target 33"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " ICDIPTR33[31:24] ,OSTM1TINT processor target"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " ICDIPTR33[23:16] ,OSTM0TINT processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x3C 8.--15. 1. " ICDIPTR33[15:8] ,INT3 processor target"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " ICDIPTR33[7:0] ,INT2 processor target"
|
|
line.long 0x40 "ICDIPTR34,Interrupt Processor Target 34"
|
|
hexmask.long.byte 0x40 24.--31. 1. " ICDIPTR34[31:24] ,TGI0A processor target"
|
|
hexmask.long.byte 0x40 16.--23. 1. " ICDIPTR34[23:16] ,ITI processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x40 8.--15. 1. " ICDIPTR34[15:8] ,WTOUT processor target"
|
|
hexmask.long.byte 0x40 0.--7. 1. " ICDIPTR34[7:0] ,CMI processor target"
|
|
line.long 0x44 "ICDIPTR35,Interrupt Processor Target 35"
|
|
hexmask.long.byte 0x44 24.--31. 1. " ICDIPTR35[31:24] ,TGI0V processor target"
|
|
hexmask.long.byte 0x44 16.--23. 1. " ICDIPTR35[23:16] ,TGI0D processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x44 8.--15. 1. " ICDIPTR35[15:8] ,TGI0C processor target"
|
|
hexmask.long.byte 0x44 0.--7. 1. " ICDIPTR35[7:0] ,TGI0B processor target"
|
|
line.long 0x48 "ICDIPTR36,Interrupt Processor Target 36"
|
|
hexmask.long.byte 0x48 24.--31. 1. " ICDIPTR36[31:24] ,TGI1B processor target"
|
|
hexmask.long.byte 0x48 16.--23. 1. " ICDIPTR36[23:16] ,TGI1A processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x48 8.--15. 1. " ICDIPTR36[15:8] ,TGI0F processor target"
|
|
hexmask.long.byte 0x48 0.--7. 1. " ICDIPTR36[7:0] ,TGI0E processor target"
|
|
line.long 0x4C "ICDIPTR37,Interrupt Processor Target 37"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " ICDIPTR37[31:24] ,TGI2B processor target"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " ICDIPTR37[23:16] ,TGI2A processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x4C 8.--15. 1. " ICDIPTR37[15:8] ,TGI1U processor target"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " ICDIPTR37[7:0] ,TGI1V processor target"
|
|
line.long 0x50 "ICDIPTR38,Interrupt Processor Target 38"
|
|
hexmask.long.byte 0x50 24.--31. 1. " ICDIPTR38[31:24] ,TGI3B processor target"
|
|
hexmask.long.byte 0x50 16.--23. 1. " ICDIPTR38[23:16] ,TGI3A processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x50 8.--15. 1. " ICDIPTR38[15:8] ,TGI2U processor target"
|
|
hexmask.long.byte 0x50 0.--7. 1. " ICDIPTR38[7:0] ,TGI2V processor target"
|
|
line.long 0x54 "ICDIPTR39,Interrupt Processor Target 39"
|
|
hexmask.long.byte 0x54 24.--31. 1. " ICDIPTR39[31:24] ,TGI4A processor target"
|
|
hexmask.long.byte 0x54 16.--23. 1. " ICDIPTR39[23:16] ,TGI3V processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x54 8.--15. 1. " ICDIPTR39[15:8] ,TGI3D processor target"
|
|
hexmask.long.byte 0x54 0.--7. 1. " ICDIPTR39[7:0] ,TGI3C processor target"
|
|
line.long 0x58 "ICDIPTR40,Interrupt Processor Target 40"
|
|
hexmask.long.byte 0x58 24.--31. 1. " ICDIPTR40[31:24] ,TGI4V processor target"
|
|
hexmask.long.byte 0x58 16.--23. 1. " ICDIPTR40[23:16] ,TGI4D processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x58 8.--15. 1. " ICDIPTR40[15:8] ,TGI4C processor target"
|
|
hexmask.long.byte 0x58 0.--7. 1. " ICDIPTR40[7:0] ,TGI4B processor target"
|
|
line.long 0x5C "ICDIPTR41,Interrupt Processor Target 41"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " ICDIPTR41[31:24] ,SGDEI1 processor target"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " ICDIPTR41[23:16] ,SGDEI0 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x5C 8.--15. 1. " ICDIPTR41[15:8] ,CMI2 processor target"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " ICDIPTR41[7:0] ,CMI1 processor target"
|
|
line.long 0x60 "ICDIPTR42,Interrupt Processor Target 42"
|
|
hexmask.long.byte 0x60 24.--31. 1. " ICDIPTR42[31:24] ,LMTI processor target"
|
|
hexmask.long.byte 0x60 16.--23. 1. " ICDIPTR42[23:16] ,ADI processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x60 8.--15. 1. " ICDIPTR42[15:8] ,SGDEI3 processor target"
|
|
hexmask.long.byte 0x60 0.--7. 1. " ICDIPTR42[7:0] ,SGDEI2 processor target"
|
|
line.long 0x64 "ICDIPTR43,Interrupt Processor Target 43"
|
|
hexmask.long.byte 0x64 24.--31. 1. " ICDIPTR43[31:24] ,SSII1 processor target"
|
|
hexmask.long.byte 0x64 16.--23. 1. " ICDIPTR43[23:16] ,SSITXI0 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x64 8.--15. 1. " ICDIPTR43[15:8] ,SSIRXI0 processor target"
|
|
hexmask.long.byte 0x64 0.--7. 1. " ICDIPTR43[7:0] ,SSII0 processor target"
|
|
line.long 0x68 "ICDIPTR44,Interrupt Processor Target 44"
|
|
hexmask.long.byte 0x68 24.--31. 1. " ICDIPTR44[31:24] ,SSIRTI2 processor target"
|
|
hexmask.long.byte 0x68 16.--23. 1. " ICDIPTR44[23:16] ,SSII2 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x68 8.--15. 1. " ICDIPTR44[15:8] ,SSITXI1 processor target"
|
|
hexmask.long.byte 0x68 0.--7. 1. " ICDIPTR44[7:0] ,SSIRXI1 processor target"
|
|
line.long 0x6C "ICDIPTR45,Interrupt Processor Target 45"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " ICDIPTR45[31:24] ,SSII4 processor target"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " ICDIPTR45[23:16] ,SSITXI3 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x6C 8.--15. 1. " ICDIPTR45[15:8] ,SSIRXI3 processor target"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " ICDIPTR45[7:0] ,SSII3 processor target"
|
|
line.long 0x70 "ICDIPTR46,Interrupt Processor Target 46"
|
|
hexmask.long.byte 0x70 24.--31. 1. " ICDIPTR46[31:24] ,SSITXI5 processor target"
|
|
hexmask.long.byte 0x70 16.--23. 1. " ICDIPTR46[23:16] ,SSIRXI5 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x70 8.--15. 1. " ICDIPTR46[15:8] ,SSII5 processor target"
|
|
hexmask.long.byte 0x70 0.--7. 1. " ICDIPTR46[7:0] ,SSIRTI4 processor target"
|
|
line.long 0x74 "ICDIPTR47,Interrupt Processor Target 47"
|
|
hexmask.long.byte 0x74 24.--31. 1. " ICDIPTR47[31:24] ,INTIICTI0 processor target"
|
|
hexmask.long.byte 0x74 16.--23. 1. " ICDIPTR47[23:16] ,INTIICRI0 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x74 8.--15. 1. " ICDIPTR47[15:8] ,INTIICTEI0 processor target"
|
|
hexmask.long.byte 0x74 0.--7. 1. " ICDIPTR47[7:0] ,SPDIFI processor target"
|
|
line.long 0x78 "ICDIPTR48,Interrupt Processor Target 48"
|
|
hexmask.long.byte 0x78 24.--31. 1. " ICDIPTR48[31:24] ,INTIICALI0 processor target"
|
|
hexmask.long.byte 0x78 16.--23. 1. " ICDIPTR48[23:16] ,INTIICNAKI0 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x78 8.--15. 1. " ICDIPTR48[15:8] ,INTIICSTI0 processor target"
|
|
hexmask.long.byte 0x78 0.--7. 1. " ICDIPTR48[7:0] ,INTIICSPI0 processor target"
|
|
line.long 0x7C "ICDIPTR49,Interrupt Processor Target 49"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " ICDIPTR49[31:24] ,INTIICTI1 processor target"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " ICDIPTR49[23:16] ,INTIICRI1 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x7C 8.--15. 1. " ICDIPTR49[15:8] ,INTIICTEI1 processor target"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " ICDIPTR49[7:0] ,INTIICTMOI0 processor target"
|
|
line.long 0x80 "ICDIPTR50,Interrupt Processor Target 50"
|
|
hexmask.long.byte 0x80 24.--31. 1. " ICDIPTR50[31:24] ,INTIICALI1 processor target"
|
|
hexmask.long.byte 0x80 16.--23. 1. " ICDIPTR50[23:16] ,INTIICNAKI1 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x80 8.--15. 1. " ICDIPTR50[15:8] ,INTIICSTI1 processor target"
|
|
hexmask.long.byte 0x80 0.--7. 1. " ICDIPTR50[7:0] ,INTIICSPI1 processor target"
|
|
line.long 0x84 "ICDIPTR51,Interrupt Processor Target 51"
|
|
hexmask.long.byte 0x84 24.--31. 1. " ICDIPTR51[31:24] ,INTIICTI2 processor target"
|
|
hexmask.long.byte 0x84 16.--23. 1. " ICDIPTR51[23:16] ,INTIICRI2 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x84 8.--15. 1. " ICDIPTR51[15:8] ,INTIICTEI2 processor target"
|
|
hexmask.long.byte 0x84 0.--7. 1. " ICDIPTR51[7:0] ,INTIICTMOI1 processor target"
|
|
line.long 0x88 "ICDIPTR52,Interrupt Processor Target 52"
|
|
hexmask.long.byte 0x88 24.--31. 1. " ICDIPTR52[31:24] ,INTIICALI2 processor target"
|
|
hexmask.long.byte 0x88 16.--23. 1. " ICDIPTR52[23:16] ,INTIICNAKI2 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x88 8.--15. 1. " ICDIPTR52[15:8] ,INTIICSTI2 processor target"
|
|
hexmask.long.byte 0x88 0.--7. 1. " ICDIPTR52[7:0] ,INTIICSPI2 processor target"
|
|
line.long 0x8C "ICDIPTR53,Interrupt Processor Target 53"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " ICDIPTR53[31:24] ,INTIICTI3 processor target"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " ICDIPTR53[23:16] ,INTIICRI3 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x8C 8.--15. 1. " ICDIPTR53[15:8] ,INTIICTEI3 processor target"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " ICDIPTR53[7:0] ,INTIICTMOI2 processor target"
|
|
line.long 0x90 "ICDIPTR54,Interrupt Processor Target 54"
|
|
hexmask.long.byte 0x90 24.--31. 1. " ICDIPTR54[31:24] ,INTIICALI3 processor target"
|
|
hexmask.long.byte 0x90 16.--23. 1. " ICDIPTR54[23:16] ,INTIICNAKI3 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x90 8.--15. 1. " ICDIPTR54[15:8] ,INTIICSTI3 processor target"
|
|
hexmask.long.byte 0x90 0.--7. 1. " ICDIPTR54[7:0] ,INTIICSPI3 processor target"
|
|
line.long 0x94 "ICDIPTR55,Interrupt Processor Target 55"
|
|
hexmask.long.byte 0x94 24.--31. 1. " ICDIPTR55[31:24] ,RXI0 processor target"
|
|
hexmask.long.byte 0x94 16.--23. 1. " ICDIPTR55[23:16] ,ERI0 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x94 8.--15. 1. " ICDIPTR55[15:8] ,BRI0 processor target"
|
|
hexmask.long.byte 0x94 0.--7. 1. " ICDIPTR55[7:0] ,INTIICTMOI3 processor target"
|
|
line.long 0x98 "ICDIPTR56,Interrupt Processor Target 56"
|
|
hexmask.long.byte 0x98 24.--31. 1. " ICDIPTR56[31:24] ,RXI1 processor target"
|
|
hexmask.long.byte 0x98 16.--23. 1. " ICDIPTR56[23:16] ,ERI1 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x98 8.--15. 1. " ICDIPTR56[15:8] ,BRI1 processor target"
|
|
hexmask.long.byte 0x98 0.--7. 1. " ICDIPTR56[7:0] ,TXI0 processor target"
|
|
line.long 0x9C "ICDIPTR57,Interrupt Processor Target 57"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " ICDIPTR57[31:24] ,RXI2 processor target"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " ICDIPTR57[23:16] ,ERI2 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x9C 8.--15. 1. " ICDIPTR57[15:8] ,BRI2 processor target"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " ICDIPTR57[7:0] ,TXI1 processor target"
|
|
line.long 0xA0 "ICDIPTR58,Interrupt Processor Target 58"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " ICDIPTR58[31:24] ,RXI3 processor target"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " ICDIPTR58[23:16] ,ERI3 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xA0 8.--15. 1. " ICDIPTR58[15:8] ,BRI3 processor target"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " ICDIPTR58[7:0] ,TXI2 processor target"
|
|
line.long 0xA4 "ICDIPTR59,Interrupt Processor Target 59"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " ICDIPTR59[31:24] ,RXI4 processor target"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " ICDIPTR59[23:16] ,ERI4 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xA4 8.--15. 1. " ICDIPTR59[15:8] ,BRI4 processor target"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " ICDIPTR59[7:0] ,TXI3 processor target"
|
|
line.long 0xA8 "ICDIPTR60,Interrupt Processor Target 60"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " ICDIPTR60[31:24] ,RXI5 processor target"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " ICDIPTR60[23:16] ,ERI5 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xA8 8.--15. 1. " ICDIPTR60[15:8] ,BRI5 processor target"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " ICDIPTR60[7:0] ,TXI4 processor target"
|
|
line.long 0xAC "ICDIPTR61,Interrupt Processor Target 61"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " ICDIPTR61[31:24] ,RXI6 processor target"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " ICDIPTR61[23:16] ,ERI6 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xAC 8.--15. 1. " ICDIPTR61[15:8] ,BRI6 processor target"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " ICDIPTR61[7:0] ,TXI5 processor target"
|
|
line.long 0xB0 "ICDIPTR62,Interrupt Processor Target 62"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " ICDIPTR62[31:24] ,RXI7 processor target"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " ICDIPTR62[23:16] ,ERI7 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xB0 8.--15. 1. " ICDIPTR62[15:8] ,BRI7 processor target"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " ICDIPTR62[7:0] ,TXI6 processor target"
|
|
line.long 0xB4 "ICDIPTR63,Interrupt Processor Target 63"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " ICDIPTR63[31:24] ,INTRCAN0REC processor target"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " ICDIPTR63[23:16] ,INTRCANGRECC processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xB4 8.--15. 1. " ICDIPTR63[15:8] ,INTRCANGERR processor target"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " ICDIPTR63[7:0] ,TXI7 processor target"
|
|
line.long 0xB8 "ICDIPTR64,Interrupt Processor Target 64"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " ICDIPTR64[31:24] ,INTRCAN1ERR processor target"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " ICDIPTR64[23:16] ,INTRCAN1REC processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xB8 8.--15. 1. " ICDIPTR64[15:8] ,INTRCAN0TRX processor target"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " ICDIPTR64[7:0] ,INTRCAN0ERR processor target"
|
|
line.long 0xBC "ICDIPTR65,Interrupt Processor Target 65"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " ICDIPTR65[31:24] ,INTRCAN2TRX processor target"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " ICDIPTR65[23:16] ,INTRCAN2ERR processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xBC 8.--15. 1. " ICDIPTR65[15:8] ,INTRCAN2REC processor target"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " ICDIPTR65[7:0] ,INTRCAN1TRX processor target"
|
|
line.long 0xC0 "ICDIPTR66,Interrupt Processor Target 66"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " ICDIPTR66[31:24] ,INTRCAN4REC processor target"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " ICDIPTR66[23:16] ,INTRCAN3TRX processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xC0 8.--15. 1. " ICDIPTR66[15:8] ,INTRCAN3ERR processor target"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " ICDIPTR66[7:0] ,INTRCAN3REC processor target"
|
|
line.long 0xC4 "ICDIPTR67,Interrupt Processor Target 67"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " ICDIPTR67[31:24] ,SPRI0 processor target"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " ICDIPTR67[23:16] ,SPEI0 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xC4 8.--15. 1. " ICDIPTR67[15:8] ,INTRCAN4TRX processor target"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " ICDIPTR67[7:0] ,INTRCAN4ERR processor target"
|
|
line.long 0xC8 "ICDIPTR67,Interrupt Processor Target 68"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " ICDIPTR68[31:24] ,SPTI1 processor target"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " ICDIPTR68[23:16] ,SPRI1 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xC8 8.--15. 1. " ICDIPTR68[15:8] ,SPEI1 processor target"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " ICDIPTR68[7:0] ,SPTI0 processor target"
|
|
line.long 0xCC "ICDIPTR69,Interrupt Processor Target 69"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " ICDIPTR69[31:24] ,SPEI3 processor target"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " ICDIPTR69[23:16] ,SPTI2 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xCC 8.--15. 1. " ICDIPTR69[15:8] ,SPRI2 processor target"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " ICDIPTR69[7:0] ,SPEI2 processor target"
|
|
line.long 0xD0 "ICDIPTR70,Interrupt Processor Target 70"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " ICDIPTR70[31:24] ,SPRI4 processor target"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " ICDIPTR70[23:16] ,SPEI4 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xD0 8.--15. 1. " ICDIPTR70[15:8] ,SPTI3 processor target"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " ICDIPTR70[7:0] ,SPRI3 processor target"
|
|
line.long 0xD4 "ICDIPTR71,Interrupt Processor Target 71"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " ICDIPTR71[31:24] ,IEBBTSTA processor target"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " ICDIPTR71[23:16] ,IEBBTERR processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xD4 8.--15. 1. " ICDIPTR71[15:8] ,IEBBTD processor target"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " ICDIPTR71[7:0] ,SPTI4 processor target"
|
|
line.long 0xD8 "ICDIPTR72,Interrupt Processor Target 72"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " ICDIPTR72[31:24] ,ITARG processor target"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " ICDIPTR72[23:16] ,IERR processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xD8 8.--15. 1. " ICDIPTR72[15:8] ,ISY processor target"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " ICDIPTR72[7:0] ,IEBBTV processor target"
|
|
line.long 0xDC "ICDIPTR73,Interrupt Processor Target 73"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " ICDIPTR73[31:24] ,STERB/BTOERB processor target"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " ICDIPTR73[23:16] ,IREADY processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xDC 8.--15. 1. " ICDIPTR73[15:8] ,IBUF processor target"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " ICDIPTR73[7:0] ,ISEC processor target"
|
|
line.long 0xE0 "ICDIPTR74,Interrupt Processor Target 74"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " ICDIPTR74[31:24] ,MMC0 processor target"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " ICDIPTR74[23:16] ,FLTREQ1I processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xE0 8.--15. 1. " ICDIPTR74[15:8] ,FLTREQ0I processor target"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " ICDIPTR74[7:0] ,FLTENDI processor target"
|
|
line.long 0xE4 "ICDIPTR75,Interrupt Processor Target 75"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " ICDIPTR75[31:24] ,SDHI0_0 processor target"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " ICDIPTR75[23:16] ,SDHI0_3 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xE4 8.--15. 1. " ICDIPTR75[15:8] ,MMC2 processor target"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " ICDIPTR75[7:0] ,MMC1 processor target"
|
|
line.long 0xE8 "ICDIPTR76,Interrupt Processor Target 76"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " ICDIPTR76[31:24] ,SDHI1_1 processor target"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " ICDIPTR76[23:16] ,SDHI1_0 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xE8 8.--15. 1. " ICDIPTR76[15:8] ,SDHI1_3 processor target"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " ICDIPTR76[7:0] ,SDHI0_1 processor target"
|
|
line.long 0xEC "ICDIPTR77,Interrupt Processor Target 77"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " ICDIPTR77[31:24] ,SCUAI0 processor target"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " ICDIPTR77[23:16] ,CUP processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xEC 8.--15. 1. " ICDIPTR77[15:8] ,PRD processor target"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " ICDIPTR77[7:0] ,ARM processor target"
|
|
line.long 0xF0 "ICDIPTR78,Interrupt Processor Target 78"
|
|
hexmask.long.byte 0xF0 24.--31. 1. " ICDIPTR78[31:24] ,SCUFDI2 processor target"
|
|
hexmask.long.byte 0xF0 16.--23. 1. " ICDIPTR78[23:16] ,SCUFDI1 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xF0 8.--15. 1. " ICDIPTR78[15:8] ,SCUFDI0 processor target"
|
|
hexmask.long.byte 0xF0 0.--7. 1. " ICDIPTR78[7:0] ,SCUAI1 processor target"
|
|
line.long 0xF4 "ICDIPTR79,Interrupt Processor Target 79"
|
|
hexmask.long.byte 0xF4 24.--31. 1. " ICDIPTR79[31:24] ,SCUFUI2 processor target"
|
|
hexmask.long.byte 0xF4 16.--23. 1. " ICDIPTR79[23:16] ,SCUFUI1 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xF4 8.--15. 1. " ICDIPTR79[15:8] ,SCUFUI0 processor target"
|
|
hexmask.long.byte 0xF4 0.--7. 1. " ICDIPTR79[7:0] ,SCUFDI3 processor target"
|
|
line.long 0xF8 "ICDIPTR80,Interrupt Processor Target 80"
|
|
hexmask.long.byte 0xF8 24.--31. 1. " ICDIPTR80[31:24] ,SCUDVI2 processor target"
|
|
hexmask.long.byte 0xF8 16.--23. 1. " ICDIPTR80[23:16] ,SCUDVI1 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xF8 8.--15. 1. " ICDIPTR80[15:8] ,SCUDVI0 processor target"
|
|
hexmask.long.byte 0xF8 0.--7. 1. " ICDIPTR80[7:0] ,SCUFUI3 processor target"
|
|
line.long 0xFC "ICDIPTR81,Interrupt Processor Target 81"
|
|
hexmask.long.byte 0xFC 24.--31. 1. " ICDIPTR81[31:24] ,DRC1 Channel 0 processor target"
|
|
hexmask.long.byte 0xFC 16.--23. 1. " ICDIPTR81[23:16] ,MLB_SINT processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xFC 8.--15. 1. " ICDIPTR81[15:8] ,MLB_CINT processor target"
|
|
hexmask.long.byte 0xFC 0.--7. 1. " ICDIPTR81[7:0] ,SCUDVI3 processor target"
|
|
line.long 0x100 "ICDIPTR82,Interrupt Processor Target 82"
|
|
hexmask.long.byte 0x100 24.--31. 1. " ICDIPTR82[31:24] ,LINI0_INT_T processor target"
|
|
hexmask.long.byte 0x100 0.--7. 1. " ICDIPTR82[7:0] ,DRC1 Channel 1 processor target"
|
|
line.long 0x104 "ICDIPTR83,Interrupt Processor Target 83"
|
|
hexmask.long.byte 0x104 24.--31. 1. " ICDIPTR83[31:24] ,LINI1_INT_T processor target"
|
|
hexmask.long.byte 0x104 16.--23. 1. " ICDIPTR83[23:16] ,LINI0_INT_M processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x104 8.--15. 1. " ICDIPTR83[15:8] ,LINI0_INT_S processor target"
|
|
hexmask.long.byte 0x104 0.--7. 1. " ICDIPTR83[7:0] ,LINI0_INT_R processor target"
|
|
line.long 0x108 "ICDIPTR84,Interrupt Processor Target 84"
|
|
hexmask.long.byte 0x108 16.--23. 1. " ICDIPTR84[23:16] ,LINI1_INT_M processor target"
|
|
hexmask.long.byte 0x108 8.--15. 1. " ICDIPTR84[15:8] ,LINI1_INT_S processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x108 0.--7. 1. " ICDIPTR84[7:0] ,LINI1_INT_R processor target"
|
|
group.long 0x958++0xF
|
|
line.long 0x00 "ICDIPTR86,Interrupt Processor Target 86"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ICDIPTR86[31:24] ,ERI0 processor target"
|
|
line.long 0x04 "ICDIPTR87,Interrupt Processor Target 87"
|
|
hexmask.long.byte 0x04 24.--31. 1. " ICDIPTR87[31:24] ,ERI1 processor target"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ICDIPTR87[23:16] ,TEI0 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " ICDIPTR87[15:8] ,TXI0 processor target"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ICDIPTR87[7:0] ,RXI0 processor target"
|
|
line.long 0x08 "ICDIPTR88,Interrupt Processor Target 88"
|
|
hexmask.long.byte 0x08 24.--31. 1. " ICDIPTR88[31:24] ,AVBI_DATA processor target"
|
|
hexmask.long.byte 0x08 16.--23. 1. " ICDIPTR88[23:16] ,TEI1 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " ICDIPTR88[15:8] ,TXI1 processor target"
|
|
hexmask.long.byte 0x08 0.--7. 1. " ICDIPTR88[7:0] ,RXI1 processor target"
|
|
line.long 0x0C "ICDIPTR89,Interrupt Processor Target 89"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " ICDIPTR89[31:24] ,ETHERI processor target"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " ICDIPTR89[23:16] ,AVBI_MAC processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " ICDIPTR89[15:8] ,AVBI_MANAGE processor target"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " ICDIPTR89[7:0] ,AVBI_ERROR processor target"
|
|
group.long 0x96C++0x3
|
|
line.long 0x00 "ICDIPTR91,Interrupt Processor Target 91"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ICDIPTR91[7:0] ,CEUI processor target"
|
|
group.long 0x97C++0x13
|
|
line.long 0x00 "ICDIPTR95,Interrupt Processor Target 95"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ICDIPTR95[31:24] ,X2HPERI1_ERRINT processor target"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ICDIPTR95[23:16] ,H2XIC1_ERRINT processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ICDIPTR95[15:8] ,H2XMLB_ERRINT processor target"
|
|
line.long 0x04 "ICDIPTR96,Interrupt Processor Target 96"
|
|
hexmask.long.byte 0x04 24.--31. 1. " ICDIPTR96[31:24] ,X2HPERI67_ERRINT processor target"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ICDIPTR96[23:16] ,X2HPERI5_ERRINT processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " ICDIPTR96[15:8] ,X2HPERI34_ERRINT processor target"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ICDIPTR96[7:0] ,X2HPERI2_ERRINT processor target"
|
|
line.long 0x08 "ICDIPTR97,Interrupt Processor Target 97"
|
|
hexmask.long.byte 0x08 24.--31. 1. " ICDIPTR97[31:24] ,X2HSPI2_ERRINT processor target"
|
|
hexmask.long.byte 0x08 16.--23. 1. " ICDIPTR97[23:16] ,X2HSPI1_ERRINT processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " ICDIPTR97[15:8] ,X2HBSC_ERRINT processor target"
|
|
hexmask.long.byte 0x08 0.--7. 1. " ICDIPTR97[7:0] ,X2HDBGR_ERRINT processor target"
|
|
line.long 0x0C "ICDIPTR98,Interrupt Processor Target 98"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " ICDIPTR98[31:24] ,PFVEI0 processor target"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " ICDIPTR98[23:16] ,OFFI0 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " ICDIPTR98[15:8] ,IFEI0 processor target"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " ICDIPTR98[7:0] ,PRRI processor target"
|
|
line.long 0x10 "ICDIPTR99,Interrupt Processor Target 99"
|
|
hexmask.long.byte 0x10 16.--23. 1. " ICDIPTR99[23:16] ,PFVEI1 processor target"
|
|
hexmask.long.byte 0x10 8.--15. 1. " ICDIPTR99[15:8] ,OFFI1 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--7. 1. " ICDIPTR99[7:0] ,IFEI1 processor target"
|
|
group.long 0x9A0++0x10B
|
|
line.long 0x00 "ICDIPTR104,Interrupt Processor Target 104"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ICDIPTR104[31:24] ,TINT3 processor target"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ICDIPTR104[23:16] ,TINT2 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ICDIPTR104[15:8] ,TINT1 processor target"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ICDIPTR104[7:0] ,TINT0 processor target"
|
|
line.long 0x04 "ICDIPTR105,Interrupt Processor Target 105"
|
|
hexmask.long.byte 0x04 24.--31. 1. " ICDIPTR105[31:24] ,TINT7 processor target"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ICDIPTR105[23:16] ,TINT6 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " ICDIPTR105[15:8] ,TINT5 processor target"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ICDIPTR105[7:0] ,TINT4 processor target"
|
|
line.long 0x08 "ICDIPTR106,Interrupt Processor Target 106"
|
|
hexmask.long.byte 0x08 24.--31. 1. " ICDIPTR106[31:24] ,TINT11 processor target"
|
|
hexmask.long.byte 0x08 16.--23. 1. " ICDIPTR106[23:16] ,TINT10 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " ICDIPTR106[15:8] ,TINT9 processor target"
|
|
hexmask.long.byte 0x08 0.--7. 1. " ICDIPTR106[7:0] ,TINT8 processor target"
|
|
line.long 0x0C "ICDIPTR107,Interrupt Processor Target 107"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " ICDIPTR107[31:24] ,TINT15 processor target"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " ICDIPTR107[23:16] ,TINT14 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " ICDIPTR107[15:8] ,TINT13 processor target"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " ICDIPTR107[7:0] ,TINT12 processor target"
|
|
line.long 0x10 "ICDIPTR108,Interrupt Processor Target 108"
|
|
hexmask.long.byte 0x10 24.--31. 1. " ICDIPTR108[31:24] ,TINT19 processor target"
|
|
hexmask.long.byte 0x10 16.--23. 1. " ICDIPTR108[23:16] ,TINT18 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x10 8.--15. 1. " ICDIPTR108[15:8] ,TINT17 processor target"
|
|
hexmask.long.byte 0x10 0.--7. 1. " ICDIPTR108[7:0] ,TINT16 processor target"
|
|
line.long 0x14 "ICDIPTR109,Interrupt Processor Target 109"
|
|
hexmask.long.byte 0x14 24.--31. 1. " ICDIPTR109[31:24] ,TINT23 processor target"
|
|
hexmask.long.byte 0x14 16.--23. 1. " ICDIPTR109[23:16] ,TINT22 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x14 8.--15. 1. " ICDIPTR109[15:8] ,TINT21 processor target"
|
|
hexmask.long.byte 0x14 0.--7. 1. " ICDIPTR109[7:0] ,TINT20 processor target"
|
|
line.long 0x18 "ICDIPTR110,Interrupt Processor Target 110"
|
|
hexmask.long.byte 0x18 24.--31. 1. " ICDIPTR110[31:24] ,TINT27 processor target"
|
|
hexmask.long.byte 0x18 16.--23. 1. " ICDIPTR110[23:16] ,TINT26 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x18 8.--15. 1. " ICDIPTR110[15:8] ,TINT25 processor target"
|
|
hexmask.long.byte 0x18 0.--7. 1. " ICDIPTR110[7:0] ,TINT24 processor target"
|
|
line.long 0x1C "ICDIPTR111,Interrupt Processor Target 111"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " ICDIPTR111[31:24] ,TINT31 processor target"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " ICDIPTR111[23:16] ,TINT30 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x1C 8.--15. 1. " ICDIPTR111[15:8] ,TINT29 processor target"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " ICDIPTR111[7:0] ,TINT28 processor target"
|
|
line.long 0x20 "ICDIPTR112,Interrupt Processor Target 112"
|
|
hexmask.long.byte 0x20 24.--31. 1. " ICDIPTR112[31:24] ,TINT35 processor target"
|
|
hexmask.long.byte 0x20 16.--23. 1. " ICDIPTR112[23:16] ,TINT34 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x20 8.--15. 1. " ICDIPTR112[15:8] ,TINT33 processor target"
|
|
hexmask.long.byte 0x20 0.--7. 1. " ICDIPTR112[7:0] ,TINT32 processor target"
|
|
line.long 0x24 "ICDIPTR113,Interrupt Processor Target 113"
|
|
hexmask.long.byte 0x24 24.--31. 1. " ICDIPTR113[31:24] ,TINT39 processor target"
|
|
hexmask.long.byte 0x24 16.--23. 1. " ICDIPTR113[23:16] ,TINT38 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x24 8.--15. 1. " ICDIPTR113[15:8] ,TINT37 processor target"
|
|
hexmask.long.byte 0x24 0.--7. 1. " ICDIPTR113[7:0] ,TINT36 processor target"
|
|
line.long 0x28 "ICDIPTR114,Interrupt Processor Target 114"
|
|
hexmask.long.byte 0x28 24.--31. 1. " ICDIPTR114[31:24] ,TINT43 processor target"
|
|
hexmask.long.byte 0x28 16.--23. 1. " ICDIPTR114[23:16] ,TINT42 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x28 8.--15. 1. " ICDIPTR114[15:8] ,TINT41 processor target"
|
|
hexmask.long.byte 0x28 0.--7. 1. " ICDIPTR114[7:0] ,TINT40 processor target"
|
|
line.long 0x2C "ICDIPTR115,Interrupt Processor Target 115"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " ICDIPTR115[31:24] ,TINT47 processor target"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " ICDIPTR115[23:16] ,TINT46 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x2C 8.--15. 1. " ICDIPTR115[15:8] ,TINT45 processor target"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " ICDIPTR115[7:0] ,TINT44 processor target"
|
|
line.long 0x30 "ICDIPTR116,Interrupt Processor Target 116"
|
|
hexmask.long.byte 0x30 24.--31. 1. " ICDIPTR116[31:24] ,TINT51 processor target"
|
|
hexmask.long.byte 0x30 16.--23. 1. " ICDIPTR116[23:16] ,TINT50 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x30 8.--15. 1. " ICDIPTR116[15:8] ,TINT49 processor target"
|
|
hexmask.long.byte 0x30 0.--7. 1. " ICDIPTR116[7:0] ,TINT48 processor target"
|
|
line.long 0x34 "ICDIPTR117,Interrupt Processor Target 117"
|
|
hexmask.long.byte 0x34 24.--31. 1. " ICDIPTR117[31:24] ,TINT55 processor target"
|
|
hexmask.long.byte 0x34 16.--23. 1. " ICDIPTR117[23:16] ,TINT54 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x34 8.--15. 1. " ICDIPTR117[15:8] ,TINT53 processor target"
|
|
hexmask.long.byte 0x34 0.--7. 1. " ICDIPTR117[7:0] ,TINT52 processor target"
|
|
line.long 0x38 "ICDIPTR118,Interrupt Processor Target 118"
|
|
hexmask.long.byte 0x38 24.--31. 1. " ICDIPTR118[31:24] ,TINT59 processor target"
|
|
hexmask.long.byte 0x38 16.--23. 1. " ICDIPTR118[23:16] ,TINT58 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x38 8.--15. 1. " ICDIPTR118[15:8] ,TINT57 processor target"
|
|
hexmask.long.byte 0x38 0.--7. 1. " ICDIPTR118[7:0] ,TINT56 processor target"
|
|
line.long 0x3C "ICDIPTR119,Interrupt Processor Target 119"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " ICDIPTR119[31:24] ,TINT63 processor target"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " ICDIPTR119[23:16] ,TINT62 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x3C 8.--15. 1. " ICDIPTR119[15:8] ,TINT61 processor target"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " ICDIPTR119[7:0] ,TINT60 processor target"
|
|
line.long 0x40 "ICDIPTR120,Interrupt Processor Target 120"
|
|
hexmask.long.byte 0x40 24.--31. 1. " ICDIPTR120[31:24] ,TINT67 processor target"
|
|
hexmask.long.byte 0x40 16.--23. 1. " ICDIPTR120[23:16] ,TINT66 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x40 8.--15. 1. " ICDIPTR120[15:8] ,TINT65 processor target"
|
|
hexmask.long.byte 0x40 0.--7. 1. " ICDIPTR120[7:0] ,TINT64 processor target"
|
|
line.long 0x44 "ICDIPTR121,Interrupt Processor Target 121"
|
|
hexmask.long.byte 0x44 24.--31. 1. " ICDIPTR121[31:24] ,TINT71 processor target"
|
|
hexmask.long.byte 0x44 16.--23. 1. " ICDIPTR121[23:16] ,TINT70 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x44 8.--15. 1. " ICDIPTR121[15:8] ,TINT69 processor target"
|
|
hexmask.long.byte 0x44 0.--7. 1. " ICDIPTR121[7:0] ,TINT68 processor target"
|
|
line.long 0x48 "ICDIPTR122,Interrupt Processor Target 122"
|
|
hexmask.long.byte 0x48 24.--31. 1. " ICDIPTR122[31:24] ,TINT75 processor target"
|
|
hexmask.long.byte 0x48 16.--23. 1. " ICDIPTR122[23:16] ,TINT74 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x48 8.--15. 1. " ICDIPTR122[15:8] ,TINT73 processor target"
|
|
hexmask.long.byte 0x48 0.--7. 1. " ICDIPTR122[7:0] ,TINT72 processor target"
|
|
line.long 0x4C "ICDIPTR123,Interrupt Processor Target 123"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " ICDIPTR123[31:24] ,TINT79 processor target"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " ICDIPTR123[23:16] ,TINT78 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x4C 8.--15. 1. " ICDIPTR123[15:8] ,TINT77 processor target"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " ICDIPTR123[7:0] ,TINT76 processor target"
|
|
line.long 0x50 "ICDIPTR124,Interrupt Processor Target 124"
|
|
hexmask.long.byte 0x50 24.--31. 1. " ICDIPTR124[31:24] ,TINT83 processor target"
|
|
hexmask.long.byte 0x50 16.--23. 1. " ICDIPTR124[23:16] ,TINT82 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x50 8.--15. 1. " ICDIPTR124[15:8] ,TINT81 processor target"
|
|
hexmask.long.byte 0x50 0.--7. 1. " ICDIPTR124[7:0] ,TINT80 processor target"
|
|
line.long 0x54 "ICDIPTR125,Interrupt Processor Target 125"
|
|
hexmask.long.byte 0x54 24.--31. 1. " ICDIPTR125[31:24] ,TINT87 processor target"
|
|
hexmask.long.byte 0x54 16.--23. 1. " ICDIPTR125[23:16] ,TINT86 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x54 8.--15. 1. " ICDIPTR125[15:8] ,TINT85 processor target"
|
|
hexmask.long.byte 0x54 0.--7. 1. " ICDIPTR125[7:0] ,TINT84 processor target"
|
|
line.long 0x58 "ICDIPTR126,Interrupt Processor Target 126"
|
|
hexmask.long.byte 0x58 24.--31. 1. " ICDIPTR126[31:24] ,TINT91 processor target"
|
|
hexmask.long.byte 0x58 16.--23. 1. " ICDIPTR126[23:16] ,TINT90 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x58 8.--15. 1. " ICDIPTR126[15:8] ,TINT89 processor target"
|
|
hexmask.long.byte 0x58 0.--7. 1. " ICDIPTR126[7:0] ,TINT88 processor target"
|
|
line.long 0x5C "ICDIPTR127,Interrupt Processor Target 127"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " ICDIPTR127[31:24] ,TINT95 processor target"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " ICDIPTR127[23:16] ,TINT94 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x5C 8.--15. 1. " ICDIPTR127[15:8] ,TINT93 processor target"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " ICDIPTR127[7:0] ,TINT92 processor target"
|
|
line.long 0x60 "ICDIPTR128,Interrupt Processor Target 128"
|
|
hexmask.long.byte 0x60 24.--31. 1. " ICDIPTR128[31:24] ,TINT99 processor target"
|
|
hexmask.long.byte 0x60 16.--23. 1. " ICDIPTR128[23:16] ,TINT98 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x60 8.--15. 1. " ICDIPTR128[15:8] ,TINT97 processor target"
|
|
hexmask.long.byte 0x60 0.--7. 1. " ICDIPTR128[7:0] ,TINT96 processor target"
|
|
line.long 0x64 "ICDIPTR129,Interrupt Processor Target 129"
|
|
hexmask.long.byte 0x64 24.--31. 1. " ICDIPTR129[31:24] ,TINT103 processor target"
|
|
hexmask.long.byte 0x64 16.--23. 1. " ICDIPTR129[23:16] ,TINT102 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x64 8.--15. 1. " ICDIPTR129[15:8] ,TINT101 processor target"
|
|
hexmask.long.byte 0x64 0.--7. 1. " ICDIPTR129[7:0] ,TINT100 processor target"
|
|
line.long 0x68 "ICDIPTR130,Interrupt Processor Target 130"
|
|
hexmask.long.byte 0x68 24.--31. 1. " ICDIPTR130[31:24] ,TINT107 processor target"
|
|
hexmask.long.byte 0x68 16.--23. 1. " ICDIPTR130[23:16] ,TINT106 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x68 8.--15. 1. " ICDIPTR130[15:8] ,TINT105 processor target"
|
|
hexmask.long.byte 0x68 0.--7. 1. " ICDIPTR130[7:0] ,TINT104 processor target"
|
|
line.long 0x6C "ICDIPTR131,Interrupt Processor Target 131"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " ICDIPTR131[31:24] ,TINT111 processor target"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " ICDIPTR131[23:16] ,TINT110 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x6C 8.--15. 1. " ICDIPTR131[15:8] ,TINT109 processor target"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " ICDIPTR131[7:0] ,TINT108 processor target"
|
|
line.long 0x70 "ICDIPTR132,Interrupt Processor Target 132"
|
|
hexmask.long.byte 0x70 24.--31. 1. " ICDIPTR132[31:24] ,TINT115 processor target"
|
|
hexmask.long.byte 0x70 16.--23. 1. " ICDIPTR132[23:16] ,TINT114 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x70 8.--15. 1. " ICDIPTR132[15:8] ,TINT113 processor target"
|
|
hexmask.long.byte 0x70 0.--7. 1. " ICDIPTR132[7:0] ,TINT112 processor target"
|
|
line.long 0x74 "ICDIPTR133,Interrupt Processor Target 133"
|
|
hexmask.long.byte 0x74 24.--31. 1. " ICDIPTR133[31:24] ,TINT119 processor target"
|
|
hexmask.long.byte 0x74 16.--23. 1. " ICDIPTR133[23:16] ,TINT118 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x74 8.--15. 1. " ICDIPTR133[15:8] ,TINT117 processor target"
|
|
hexmask.long.byte 0x74 0.--7. 1. " ICDIPTR133[7:0] ,TINT116 processor target"
|
|
line.long 0x78 "ICDIPTR134,Interrupt Processor Target 134"
|
|
hexmask.long.byte 0x78 24.--31. 1. " ICDIPTR134[31:24] ,TINT123 processor target"
|
|
hexmask.long.byte 0x78 16.--23. 1. " ICDIPTR134[23:16] ,TINT122 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x78 8.--15. 1. " ICDIPTR134[15:8] ,TINT121 processor target"
|
|
hexmask.long.byte 0x78 0.--7. 1. " ICDIPTR134[7:0] ,TINT120 processor target"
|
|
line.long 0x7C "ICDIPTR135,Interrupt Processor Target 135"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " ICDIPTR135[31:24] ,TINT127 processor target"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " ICDIPTR135[23:16] ,TINT126 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x7C 8.--15. 1. " ICDIPTR135[15:8] ,TINT125 processor target"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " ICDIPTR135[7:0] ,TINT124 processor target"
|
|
line.long 0x80 "ICDIPTR136,Interrupt Processor Target 136"
|
|
hexmask.long.byte 0x80 24.--31. 1. " ICDIPTR136[31:24] ,TINT131 processor target"
|
|
hexmask.long.byte 0x80 16.--23. 1. " ICDIPTR136[23:16] ,TINT130 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x80 8.--15. 1. " ICDIPTR136[15:8] ,TINT129 processor target"
|
|
hexmask.long.byte 0x80 0.--7. 1. " ICDIPTR136[7:0] ,TINT128 processor target"
|
|
line.long 0x84 "ICDIPTR137,Interrupt Processor Target 137"
|
|
hexmask.long.byte 0x84 24.--31. 1. " ICDIPTR137[31:24] ,TINT135 processor target"
|
|
hexmask.long.byte 0x84 16.--23. 1. " ICDIPTR137[23:16] ,TINT134 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x84 8.--15. 1. " ICDIPTR137[15:8] ,TINT133 processor target"
|
|
hexmask.long.byte 0x84 0.--7. 1. " ICDIPTR137[7:0] ,TINT132 processor target"
|
|
line.long 0x88 "ICDIPTR138,Interrupt Processor Target 138"
|
|
hexmask.long.byte 0x88 24.--31. 1. " ICDIPTR138[31:24] ,TINT139 processor target"
|
|
hexmask.long.byte 0x88 16.--23. 1. " ICDIPTR138[23:16] ,TINT138 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x88 8.--15. 1. " ICDIPTR138[15:8] ,TINT137 processor target"
|
|
hexmask.long.byte 0x88 0.--7. 1. " ICDIPTR138[7:0] ,TINT136 processor target"
|
|
line.long 0x8C "ICDIPTR139,Interrupt Processor Target 139"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " ICDIPTR139[31:24] ,TINT143 processor target"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " ICDIPTR139[23:16] ,TINT142 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x8C 8.--15. 1. " ICDIPTR139[15:8] ,TINT141 processor target"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " ICDIPTR139[7:0] ,TINT140 processor target"
|
|
line.long 0x90 "ICDIPTR140,Interrupt Processor Target 140"
|
|
hexmask.long.byte 0x90 24.--31. 1. " ICDIPTR140[31:24] ,TINT147 processor target"
|
|
hexmask.long.byte 0x90 16.--23. 1. " ICDIPTR140[23:16] ,TINT146 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x90 8.--15. 1. " ICDIPTR140[15:8] ,TINT145 processor target"
|
|
hexmask.long.byte 0x90 0.--7. 1. " ICDIPTR140[7:0] ,TINT144 processor target"
|
|
line.long 0x94 "ICDIPTR141,Interrupt Processor Target 141"
|
|
hexmask.long.byte 0x94 24.--31. 1. " ICDIPTR141[31:24] ,TINT151 processor target"
|
|
hexmask.long.byte 0x94 16.--23. 1. " ICDIPTR141[23:16] ,TINT150 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x94 8.--15. 1. " ICDIPTR141[15:8] ,TINT149 processor target"
|
|
hexmask.long.byte 0x94 0.--7. 1. " ICDIPTR141[7:0] ,TINT148 processor target"
|
|
line.long 0x98 "ICDIPTR142,Interrupt Processor Target 142"
|
|
hexmask.long.byte 0x98 24.--31. 1. " ICDIPTR142[31:24] ,TINT155 processor target"
|
|
hexmask.long.byte 0x98 16.--23. 1. " ICDIPTR142[23:16] ,TINT154 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x98 8.--15. 1. " ICDIPTR142[15:8] ,TINT153 processor target"
|
|
hexmask.long.byte 0x98 0.--7. 1. " ICDIPTR142[7:0] ,TINT152 processor target"
|
|
line.long 0x9C "ICDIPTR143,Interrupt Processor Target 143"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " ICDIPTR143[31:24] ,TINT159 processor target"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " ICDIPTR143[23:16] ,TINT158 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0x9C 8.--15. 1. " ICDIPTR143[15:8] ,TINT157 processor target"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " ICDIPTR143[7:0] ,TINT156 processor target"
|
|
line.long 0xA0 "ICDIPTR144,Interrupt Processor Target 144"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " ICDIPTR144[31:24] ,TINT163 processor target"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " ICDIPTR144[23:16] ,TINT162 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xA0 8.--15. 1. " ICDIPTR144[15:8] ,TINT161 processor target"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " ICDIPTR144[7:0] ,TINT160 processor target"
|
|
line.long 0xA4 "ICDIPTR145,Interrupt Processor Target 145"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " ICDIPTR145[31:24] ,TINT167 processor target"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " ICDIPTR145[23:16] ,TINT166 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xA4 8.--15. 1. " ICDIPTR145[15:8] ,TINT165 processor target"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " ICDIPTR145[7:0] ,TINT164 processor target"
|
|
line.long 0xA8 "ICDIPTR146,Interrupt Processor Target 146"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " ICDIPTR146[23:16] ,TINT170 processor target"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " ICDIPTR146[15:8] ,TINT169 processor target"
|
|
textline " "
|
|
hexmask.long.byte 0xA8 0.--7. 1. " ICDIPTR146[7:0] ,TINT168 processor target"
|
|
tree.end
|
|
tree "Interrupt Configuration Registers"
|
|
rgroup.long 0xC00++0x3
|
|
line.long 0x00 "ICDICFR0,Interrupt Configuration Register 0"
|
|
group.long 0xC04++0x5F
|
|
line.long 0x00 "ICDICFR1,Interrupt Configuration Register 1"
|
|
bitfld.long 0x00 6.--7. " ICDICFR1[7:6] ,CTIIRQ0 configuration" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. " ICDICFR1[5:4] ,COMMTX0 configuration" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. " ICDICFR1[3:2] ,COMMRX0 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " ICDICFR1[1:0] ,PMUIRQ0 configuration" "0,1,2,3"
|
|
line.long 0x04 "ICDICFR3,Interrupt Configuration Register 2"
|
|
bitfld.long 0x04 30.--31. " ICDICFR2[31:30] ,DMAINT6 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 28.--29. " ICDICFR2[29:28] ,DMAINT5 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 26.--27. " ICDICFR2[27:26] ,DMAINT4 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x04 24.--25. " ICDICFR2[25:24] ,DMAINT3 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 22.--23. " ICDICFR2[23:22] ,DMAINT2 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 20.--21. " ICDICFR2[21:20] ,DMAINT1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " ICDICFR2[19:18] ,DMAINT0 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 16.--17. " ICDICFR2[17:16] ,PL310ERR configuration" "0,1,2,3"
|
|
bitfld.long 0x04 14.--15. " ICDICFR2[15:14] ,IRQ7 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " ICDICFR2[13:12] ,IRQ6 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 10.--11. " ICDICFR2[11:10] ,IRQ5 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 8.--9. " ICDICFR2[9:8] ,IRQ4 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " ICDICFR2[7:6] ,IRQ3 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 4.--5. " ICDICFR2[5:4] ,IRQ2 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 2.--3. " ICDICFR2[3:2] ,IRQ1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " ICDICFR2[1:0] ,IRQ0 configuration" "0,1,2,3"
|
|
line.long 0x08 "ICDICFR3,Interrupt Configuration Register 3"
|
|
bitfld.long 0x08 18.--19. " ICDICFR3[19:18] ,DMAERR configuration" "0,1,2,3"
|
|
bitfld.long 0x08 16.--17. " ICDICFR3[17:16] ,DMAINT15 configuration" "0,1,2,3"
|
|
bitfld.long 0x08 14.--15. " ICDICFR3[15:14] ,DMAINT14 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x08 12.--13. " ICDICFR3[13:12] ,DMAINT13 configuration" "0,1,2,3"
|
|
bitfld.long 0x08 10.--11. " ICDICFR3[11:10] ,DMAINT12 configuration" "0,1,2,3"
|
|
bitfld.long 0x08 8.--9. " ICDICFR3[9:8] ,DMAINT11 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " ICDICFR3[7:6] ,DMAINT10 configuration" "0,1,2,3"
|
|
bitfld.long 0x08 4.--5. " ICDICFR3[5:4] ,DMAINT9 configuration" "0,1,2,3"
|
|
bitfld.long 0x08 2.--3. " ICDICFR3[3:2] ,DMAINT8 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x08 0.--1. " ICDICFR3[1:0] ,DMAINT7 configuration" "0,1,2,3"
|
|
line.long 0x0C "ICDICFR4,Interrupt Configuration Register 4"
|
|
bitfld.long 0x0C 30.--31. " ICDICFR4[31:30] ,S0_VFIELD0 configuration" "0,1,2,3"
|
|
bitfld.long 0x0C 28.--29. " ICDICFR4[29:28] ,GR3_VLINE0 configuration" "0,1,2,3"
|
|
bitfld.long 0x0C 26.--27. " ICDICFR4[27:26] ,S0_VSYNCERR0 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x0C 24.--25. " ICDICFR4[25:24] ,S0_LO_VSYNC0 configuration" "0,1,2,3"
|
|
bitfld.long 0x0C 22.--23. " ICDICFR4[23:22] ,S0_VI_VSYNC0 configuration" "0,1,2,3"
|
|
line.long 0x10 "ICDICFR5,Interrupt Configuration Register 5"
|
|
bitfld.long 0x10 30.--31. " ICDICFR5[31:30] ,OIR_VFIELD0 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 28.--29. " ICDICFR5[29:28] ,OIR_VSYNCERR0 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 26.--27. " ICDICFR5[27:26] ,OIR_LO_VSYNC0 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x10 24.--25. " ICDICFR5[25:24] ,OIR_VI_VSYNC0 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 22.--23. " ICDICFR5[23:22] ,S1_WLINE0 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 20.--21. " ICDICFR5[21:20] ,IV4_VBUFERR0 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x10 18.--19. " ICDICFR5[19:18] ,IV2_VBUFERR0 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 16.--17. " ICDICFR5[17:16] ,S1_VFIELD0 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 14.--15. " ICDICFR5[15:14] ,S1_VSYNCERR0 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x10 12.--13. " ICDICFR5[13:12] ,S1_LO_VSYNC0 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 10.--11. " ICDICFR5[11:10] ,S1_VI_VSYNC0 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 8.--9. " ICDICFR5[9:8] ,S0_WLINE0 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " ICDICFR5[7:6] ,IV6_VBUFERR0 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 4.--5. " ICDICFR5[5:4] ,IV5_VBUFERR0 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 2.--3. " ICDICFR5[3:2] ,IV3_VBUFERR0 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x10 0.--1. " ICDICFR5[1:0] ,IV1_VBUFERR0 configuration" "0,1,2,3"
|
|
line.long 0x14 "ICDICFR6,Interrupt Configuration Register 6"
|
|
bitfld.long 0x14 30.--31. " ICDICFR6[31:30] ,S1_VSYNCERR1 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 28.--29. " ICDICFR6[29:28] ,S1_LO_VSYNC1 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 26.--27. " ICDICFR6[27:26] ,S1_VI_VSYNC1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x14 24.--25. " ICDICFR6[25:24] ,S0_WLINE1 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 22.--23. " ICDICFR6[23:22] ,IV6_VBUFERR1 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 20.--21. " ICDICFR6[21:20] ,IV5_VBUFERR1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x14 18.--19. " ICDICFR6[19:18] ,IV3_VBUFERR1 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 16.--17. " ICDICFR6[17:16] ,IV1_VBUFERR1 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 14.--15. " ICDICFR6[15:14] ,S0_VFIELD1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x14 12.--13. " ICDICFR6[13:12] ,GR3_VLINE1 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 10.--11. " ICDICFR6[11:10] ,S0_VSYNCERR1 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 8.--9. " ICDICFR6[9:8] ,S0_LO_VSYNC1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x14 6.--7. " ICDICFR6[7:6] ,S0_VI_VSYNC1 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 4.--5. " ICDICFR6[5:4] ,OIR_WLINE0 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 2.--3. " ICDICFR6[3:2] ,IV8_VBUFERR0 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x14 0.--1. " ICDICFR6[1:0] ,IV7_VBUFERR0 configuration" "0,1,2,3"
|
|
line.long 0x18 "ICDICFR7,Interrupt Configuration Register 7"
|
|
bitfld.long 0x18 30.--31. " ICDICFR7[31:30] ,JDTI configuration" "0,1,2,3"
|
|
bitfld.long 0x18 28.--29. " ICDICFR7[29:28] ,JEDI configuration" "0,1,2,3"
|
|
bitfld.long 0x18 26.--27. " ICDICFR7[27:26] ,IMR2I1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x18 24.--25. " ICDICFR7[25:24] ,IMR2I0 configuration" "0,1,2,3"
|
|
bitfld.long 0x18 22.--23. " ICDICFR7[23:22] ,IMRDI configuration" "0,1,2,3"
|
|
bitfld.long 0x18 20.--21. " ICDICFR7[21:20] ,OIR_WLINE1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x18 18.--19. " ICDICFR7[19:18] ,IV8_VBUFERR1 configuration" "0,1,2,3"
|
|
bitfld.long 0x18 16.--17. " ICDICFR7[17:16] ,IV7_VBUFERR1 configuration" "0,1,2,3"
|
|
bitfld.long 0x18 14.--15. " ICDICFR7[15:14] ,OIR_VFIELD1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x18 12.--13. " ICDICFR7[13:12] ,OIR_VLINE1 configuration" "0,1,2,3"
|
|
bitfld.long 0x18 10.--11. " ICDICFR7[11:10] ,OIR_LO_VSYNC1 configuration" "0,1,2,3"
|
|
bitfld.long 0x18 8.--9. " ICDICFR7[9:8] ,OIR_VI_VSYNC1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x18 6.--7. " ICDICFR7[7:6] ,S1_WLINE1 configuration" "0,1,2,3"
|
|
bitfld.long 0x18 4.--5. " ICDICFR7[5:4] ,IV4_VBUFERR1 configuration" "0,1,2,3"
|
|
bitfld.long 0x18 2.--3. " ICDICFR7[3:2] ,IV2_VBUFERR1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x18 0.--1. " ICDICFR7[1:0] ,S1_VFIELD1 configuration" "0,1,2,3"
|
|
line.long 0x1C "ICDICFR8,Interrupt Configuration Register 8"
|
|
bitfld.long 0x1C 30.--31. " ICDICFR8[31:30] ,TGI0V configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 28.--29. " ICDICFR8[29:28] ,TGI0D configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 26.--27. " ICDICFR8[27:26] ,TGI0C configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x1C 24.--25. " ICDICFR8[25:24] ,TGI0B configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 22.--23. " ICDICFR8[23:22] ,TGI0A configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 20.--21. " ICDICFR8[21:20] ,ITI configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x1C 18.--19. " ICDICFR8[19:18] ,WTOUT configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 16.--17. " ICDICFR8[17:16] ,CMI configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 14.--15. " ICDICFR8[15:14] ,OSTM1TINT configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x1C 12.--13. " ICDICFR8[13:12] ,OSTM0TINT configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 10.--11. " ICDICFR8[11:10] ,INT3 configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 8.--9. " ICDICFR8[9:8] ,INT2 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x1C 6.--7. " ICDICFR8[7:6] ,INT1 configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 4.--5. " ICDICFR8[5:4] ,INT0 configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 2.--3. " ICDICFR8[3:2] ,CMP1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x1C 0.--1. " ICDICFR8[1:0] ,CMP0 configuration" "0,1,2,3"
|
|
line.long 0x20 "ICDICFR9,Interrupt Configuration Register 9"
|
|
bitfld.long 0x20 30.--31. " ICDICFR9[31:30] ,TGI4A configuration" "0,1,2,3"
|
|
bitfld.long 0x20 28.--29. " ICDICFR9[29:28] ,TGI3V configuration" "0,1,2,3"
|
|
bitfld.long 0x20 26.--27. " ICDICFR9[27:26] ,TGI3D configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x20 24.--25. " ICDICFR9[25:24] ,TGI3C configuration" "0,1,2,3"
|
|
bitfld.long 0x20 22.--23. " ICDICFR9[23:22] ,TGI3B configuration" "0,1,2,3"
|
|
bitfld.long 0x20 20.--21. " ICDICFR9[21:20] ,TGI3A configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x20 18.--19. " ICDICFR9[19:18] ,TGI2U configuration" "0,1,2,3"
|
|
bitfld.long 0x20 16.--17. " ICDICFR9[17:16] ,TGI2V configuration" "0,1,2,3"
|
|
bitfld.long 0x20 14.--15. " ICDICFR9[15:14] ,TGI2B configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x20 12.--13. " ICDICFR9[13:12] ,TGI2A configuration" "0,1,2,3"
|
|
bitfld.long 0x20 10.--11. " ICDICFR9[11:10] ,TGI1U configuration" "0,1,2,3"
|
|
bitfld.long 0x20 8.--9. " ICDICFR9[9:8] ,TGI1V configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x20 6.--7. " ICDICFR9[7:6] ,TGI1B configuration" "0,1,2,3"
|
|
bitfld.long 0x20 4.--5. " ICDICFR9[5:4] ,TGI1A configuration" "0,1,2,3"
|
|
bitfld.long 0x20 2.--3. " ICDICFR9[3:2] ,TGI0F configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x20 0.--1. " ICDICFR9[1:0] ,TGI0E configuration" "0,1,2,3"
|
|
line.long 0x24 "ICDICFR10,Interrupt Configuration Register 10"
|
|
bitfld.long 0x24 30.--31. " ICDICFR10[31:30] ,SSII1 configuration" "0,1,2,3"
|
|
bitfld.long 0x24 28.--29. " ICDICFR10[29:28] ,SSITXI0 configuration" "0,1,2,3"
|
|
bitfld.long 0x24 26.--27. " ICDICFR10[27:26] ,SSIRXI0 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x24 24.--25. " ICDICFR10[25:24] ,SSII0 configuration" "0,1,2,3"
|
|
bitfld.long 0x24 22.--23. " ICDICFR10[23:22] ,LMTI configuration" "0,1,2,3"
|
|
bitfld.long 0x24 20.--21. " ICDICFR10[21:20] ,ADI configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x24 18.--19. " ICDICFR10[19:18] ,SGDEI3 configuration" "0,1,2,3"
|
|
bitfld.long 0x24 16.--17. " ICDICFR10[17:16] ,SGDEI2 configuration" "0,1,2,3"
|
|
bitfld.long 0x24 14.--15. " ICDICFR10[15:14] ,SGDEI1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x24 12.--13. " ICDICFR10[13:12] ,SGDEI0 configuration" "0,1,2,3"
|
|
bitfld.long 0x24 10.--11. " ICDICFR10[11:10] ,CMI2 configuration" "0,1,2,3"
|
|
bitfld.long 0x24 8.--9. " ICDICFR10[9:8] ,CMI1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x24 6.--7. " ICDICFR10[7:6] ,TGI4V configuration" "0,1,2,3"
|
|
bitfld.long 0x24 4.--5. " ICDICFR10[5:4] ,TGI4D configuration" "0,1,2,3"
|
|
bitfld.long 0x24 2.--3. " ICDICFR10[3:2] ,TGI4C configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x24 0.--1. " ICDICFR10[1:0] ,TGI4B configuration" "0,1,2,3"
|
|
line.long 0x28 "ICDICFR11,Interrupt Configuration Register 11"
|
|
bitfld.long 0x28 30.--31. " ICDICFR11[31:30] ,INTIICTI0 configuration" "0,1,2,3"
|
|
bitfld.long 0x28 28.--29. " ICDICFR11[29:28] ,INTIICRI0 configuration" "0,1,2,3"
|
|
bitfld.long 0x28 26.--27. " ICDICFR11[27:26] ,INTIICTEI0 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x28 24.--25. " ICDICFR11[25:24] ,SPDIFI configuration" "0,1,2,3"
|
|
bitfld.long 0x28 22.--23. " ICDICFR11[23:22] ,SSITXI5 configuration" "0,1,2,3"
|
|
bitfld.long 0x28 20.--21. " ICDICFR11[21:20] ,SSIRXI5 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x28 18.--19. " ICDICFR11[19:18] ,SSII5 configuration" "0,1,2,3"
|
|
bitfld.long 0x28 16.--17. " ICDICFR11[17:16] ,SSIRTI4 configuration" "0,1,2,3"
|
|
bitfld.long 0x28 14.--15. " ICDICFR11[15:14] ,SSII4 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x28 12.--13. " ICDICFR11[13:12] ,SSITXI3 configuration" "0,1,2,3"
|
|
bitfld.long 0x28 10.--11. " ICDICFR11[11:10] ,SSIRXI3 configuration" "0,1,2,3"
|
|
bitfld.long 0x28 8.--9. " ICDICFR11[9:8] ,SSII3 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x28 6.--7. " ICDICFR11[7:6] ,SSIRTI2 configuration" "0,1,2,3"
|
|
bitfld.long 0x28 4.--5. " ICDICFR11[5:4] ,SSII2 configuration" "0,1,2,3"
|
|
bitfld.long 0x28 2.--3. " ICDICFR11[3:2] ,SSITXI1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x28 0.--1. " ICDICFR11[1:0] ,SSIRXI1 configuration" "0,1,2,3"
|
|
line.long 0x2C "ICDICFR12,Interrupt Configuration Register 12"
|
|
bitfld.long 0x2C 30.--31. " ICDICFR12[31:30] ,INTIICTI2 configuration" "0,1,2,3"
|
|
bitfld.long 0x2C 28.--29. " ICDICFR12[29:28] ,INTIICRI2 configuration" "0,1,2,3"
|
|
bitfld.long 0x2C 26.--27. " ICDICFR12[27:26] ,INTIICTEI2 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x2C 24.--25. " ICDICFR12[25:24] ,INTIICTMOI1 configuration" "0,1,2,3"
|
|
bitfld.long 0x2C 22.--23. " ICDICFR12[23:22] ,INTIICALI1 configuration" "0,1,2,3"
|
|
bitfld.long 0x2C 20.--21. " ICDICFR12[21:20] ,INTIICNAKI1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x2C 18.--19. " ICDICFR12[19:18] ,INTIICSTI1 configuration" "0,1,2,3"
|
|
bitfld.long 0x2C 16.--17. " ICDICFR12[17:16] ,INTIICSPI1 configuration" "0,1,2,3"
|
|
bitfld.long 0x2C 14.--15. " ICDICFR12[15:14] ,INTIICTI1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x2C 12.--13. " ICDICFR12[13:12] ,INTIICRI1 configuration" "0,1,2,3"
|
|
bitfld.long 0x2C 10.--11. " ICDICFR12[11:10] ,INTIICTEI1 configuration" "0,1,2,3"
|
|
bitfld.long 0x2C 8.--9. " ICDICFR12[9:8] ,INTIICTMOI0 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x2C 6.--7. " ICDICFR12[7:6] ,INTIICALI0 configuration" "0,1,2,3"
|
|
bitfld.long 0x2C 4.--5. " ICDICFR12[5:4] ,INTIICNAKI0 configuration" "0,1,2,3"
|
|
bitfld.long 0x2C 2.--3. " ICDICFR12[3:2] ,INTIICSTI0 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x2C 0.--1. " ICDICFR12[1:0] ,INTIICSPI0 configuration" "0,1,2,3"
|
|
line.long 0x30 "ICDICFR13,Interrupt Configuration Register 13"
|
|
bitfld.long 0x30 30.--31. " ICDICFR13[31:30] ,RXI0 configuration" "0,1,2,3"
|
|
bitfld.long 0x30 28.--29. " ICDICFR13[29:28] ,ERI0 configuration" "0,1,2,3"
|
|
bitfld.long 0x30 26.--27. " ICDICFR13[27:26] ,BRI0 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x30 24.--25. " ICDICFR13[25:24] ,INTIICTMOI3 configuration" "0,1,2,3"
|
|
bitfld.long 0x30 22.--23. " ICDICFR13[23:22] ,INTIICALI3 configuration" "0,1,2,3"
|
|
bitfld.long 0x30 20.--21. " ICDICFR13[21:20] ,INTIICNAKI3 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x30 18.--19. " ICDICFR13[19:18] ,INTIICSTI3 configuration" "0,1,2,3"
|
|
bitfld.long 0x30 16.--17. " ICDICFR13[17:16] ,INTIICSPI3 configuration" "0,1,2,3"
|
|
bitfld.long 0x30 14.--15. " ICDICFR13[15:14] ,INTIICTI3 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x30 12.--13. " ICDICFR13[13:12] ,INTIICRI3 configuration" "0,1,2,3"
|
|
bitfld.long 0x30 10.--11. " ICDICFR13[11:10] ,INTIICTEI3 configuration" "0,1,2,3"
|
|
bitfld.long 0x30 8.--9. " ICDICFR13[9:8] ,INTIICTMOI2 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x30 6.--7. " ICDICFR13[7:6] ,INTIICALI2 configuration" "0,1,2,3"
|
|
bitfld.long 0x30 4.--5. " ICDICFR13[5:4] ,INTIICNAKI2 configuration" "0,1,2,3"
|
|
bitfld.long 0x30 2.--3. " ICDICFR13[3:2] ,INTIICSTI2 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x30 0.--1. " ICDICFR13[1:0] ,INTIICSPI2 configuration" "0,1,2,3"
|
|
line.long 0x34 "ICDICFR14,Interrupt Configuration Register 14"
|
|
bitfld.long 0x34 30.--31. " ICDICFR14[31:30] ,RXI4 configuration" "0,1,2,3"
|
|
bitfld.long 0x34 28.--29. " ICDICFR14[29:28] ,ERI4 configuration" "0,1,2,3"
|
|
bitfld.long 0x34 26.--27. " ICDICFR14[27:26] ,BRI4 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x34 24.--25. " ICDICFR14[25:24] ,TXI3 configuration" "0,1,2,3"
|
|
bitfld.long 0x34 22.--23. " ICDICFR14[23:22] ,RXI3 configuration" "0,1,2,3"
|
|
bitfld.long 0x34 20.--21. " ICDICFR14[21:20] ,ERI3 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x34 18.--19. " ICDICFR14[19:18] ,BRI3 configuration" "0,1,2,3"
|
|
bitfld.long 0x34 16.--17. " ICDICFR14[17:16] ,TXI2 configuration" "0,1,2,3"
|
|
bitfld.long 0x34 14.--15. " ICDICFR14[15:14] ,RXI2 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x34 12.--13. " ICDICFR14[13:12] ,ERI2 configuration" "0,1,2,3"
|
|
bitfld.long 0x34 10.--11. " ICDICFR14[11:10] ,BRI2 configuration" "0,1,2,3"
|
|
bitfld.long 0x34 8.--9. " ICDICFR14[9:8] ,TXI1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x34 6.--7. " ICDICFR14[7:6] ,RXI1 configuration" "0,1,2,3"
|
|
bitfld.long 0x34 4.--5. " ICDICFR14[5:4] ,ERI1 configuration" "0,1,2,3"
|
|
bitfld.long 0x34 2.--3. " ICDICFR14[3:2] ,BRI1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x34 0.--1. " ICDICFR14[1:0] ,TXI0 configuration" "0,1,2,3"
|
|
line.long 0x38 "ICDICFR15,Interrupt Configuration Register 15"
|
|
bitfld.long 0x38 30.--31. " ICDICFR15[31:30] ,INTRCAN0REC configuration" "0,1,2,3"
|
|
bitfld.long 0x38 28.--29. " ICDICFR15[29:28] ,INTRCANGRECC configuration" "0,1,2,3"
|
|
bitfld.long 0x38 26.--27. " ICDICFR15[27:26] ,INTRCANGERR configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x38 24.--25. " ICDICFR15[25:24] ,TXI7 configuration" "0,1,2,3"
|
|
bitfld.long 0x38 22.--23. " ICDICFR15[23:22] ,RXI7 configuration" "0,1,2,3"
|
|
bitfld.long 0x38 20.--21. " ICDICFR15[21:20] ,ERI7 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x38 18.--19. " ICDICFR15[19:18] ,BRI7 configuration" "0,1,2,3"
|
|
bitfld.long 0x38 16.--17. " ICDICFR15[17:16] ,TXI6 configuration" "0,1,2,3"
|
|
bitfld.long 0x38 14.--15. " ICDICFR15[15:14] ,RXI6 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x38 12.--13. " ICDICFR15[13:12] ,ERI6 configuration" "0,1,2,3"
|
|
bitfld.long 0x38 10.--11. " ICDICFR15[11:10] ,BRI6 configuration" "0,1,2,3"
|
|
bitfld.long 0x38 8.--9. " ICDICFR15[9:8] ,TXI5 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x38 6.--7. " ICDICFR15[7:6] ,RXI5 configuration" "0,1,2,3"
|
|
bitfld.long 0x38 4.--5. " ICDICFR15[5:4] ,ERI5 configuration" "0,1,2,3"
|
|
bitfld.long 0x38 2.--3. " ICDICFR15[3:2] ,BRI5 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x38 0.--1. " ICDICFR15[1:0] ,TXI4 configuration" "0,1,2,3"
|
|
line.long 0x3C "ICDICFR16,Interrupt Configuration Register 16"
|
|
bitfld.long 0x3C 30.--31. " ICDICFR16[31:30] ,SPRI0 configuration" "0,1,2,3"
|
|
bitfld.long 0x3C 28.--29. " ICDICFR16[29:28] ,SPEI0 configuration" "0,1,2,3"
|
|
bitfld.long 0x3C 26.--27. " ICDICFR16[27:26] ,INTRCAN4TRX configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x3C 24.--25. " ICDICFR16[25:24] ,INTRCAN4ERR configuration" "0,1,2,3"
|
|
bitfld.long 0x3C 22.--23. " ICDICFR16[23:22] ,INTRCAN4REC configuration" "0,1,2,3"
|
|
bitfld.long 0x3C 20.--21. " ICDICFR16[21:20] ,INTRCAN3TRX configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x3C 18.--19. " ICDICFR16[19:18] ,INTRCAN3ERR configuration" "0,1,2,3"
|
|
bitfld.long 0x3C 16.--17. " ICDICFR16[17:16] ,INTRCAN3REC configuration" "0,1,2,3"
|
|
bitfld.long 0x3C 14.--15. " ICDICFR16[15:14] ,INTRCAN2TRX configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x3C 12.--13. " ICDICFR16[13:12] ,INTRCAN2ERR configuration" "0,1,2,3"
|
|
bitfld.long 0x3C 10.--11. " ICDICFR16[11:10] ,INTRCAN2REC configuration" "0,1,2,3"
|
|
bitfld.long 0x3C 8.--9. " ICDICFR16[9:8] ,INTRCAN1TRX configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x3C 6.--7. " ICDICFR16[7:6] ,INTRCAN1ERR configuration" "0,1,2,3"
|
|
bitfld.long 0x3C 4.--5. " ICDICFR16[5:4] ,INTRCAN1REC configuration" "0,1,2,3"
|
|
bitfld.long 0x3C 2.--3. " ICDICFR16[3:2] ,INTRCAN0TRX configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x3C 0.--1. " ICDICFR16[1:0] ,INTRCAN0ERR configuration" "0,1,2,3"
|
|
line.long 0x40 "ICDICFR17,Interrupt Configuration Register 17"
|
|
bitfld.long 0x40 30.--31. " ICDICFR17[31:30] ,IEBBTSTA configuration" "0,1,2,3"
|
|
bitfld.long 0x40 28.--29. " ICDICFR17[29:28] ,IEBBTERR configuration" "0,1,2,3"
|
|
bitfld.long 0x40 26.--27. " ICDICFR17[27:26] ,IEBBTD configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x40 24.--25. " ICDICFR17[25:24] ,SPTI4 configuration" "0,1,2,3"
|
|
bitfld.long 0x40 22.--23. " ICDICFR17[23:22] ,SPRI4 configuration" "0,1,2,3"
|
|
bitfld.long 0x40 20.--21. " ICDICFR17[21:20] ,SPEI4 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x40 18.--19. " ICDICFR17[19:18] ,SPTI3 configuration" "0,1,2,3"
|
|
bitfld.long 0x40 16.--17. " ICDICFR17[17:16] ,SPRI3 configuration" "0,1,2,3"
|
|
bitfld.long 0x40 14.--15. " ICDICFR17[15:14] ,SPEI3 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x40 12.--13. " ICDICFR17[13:12] ,SPTI2 configuration" "0,1,2,3"
|
|
bitfld.long 0x40 10.--11. " ICDICFR17[11:10] ,SPRI2 configuration" "0,1,2,3"
|
|
bitfld.long 0x40 8.--9. " ICDICFR17[9:8] ,SPEI2 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x40 6.--7. " ICDICFR17[7:6] ,SPTI1 configuration" "0,1,2,3"
|
|
bitfld.long 0x40 4.--5. " ICDICFR17[5:4] ,SPRI1 configuration" "0,1,2,3"
|
|
bitfld.long 0x40 2.--3. " ICDICFR17[3:2] ,SPEI1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x40 0.--1. " ICDICFR17[1:0] ,SPTI0 configuration" "0,1,2,3"
|
|
line.long 0x44 "ICDICFR18,Interrupt Configuration Register 18"
|
|
bitfld.long 0x44 30.--31. " ICDICFR18[31:30] ,SDHI0_3 configuration" "0,1,2,3"
|
|
bitfld.long 0x44 28.--29. " ICDICFR18[29:28] ,SDHI0_3 configuration" "0,1,2,3"
|
|
bitfld.long 0x44 26.--27. " ICDICFR18[27:26] ,MMC2 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x44 24.--25. " ICDICFR18[25:24] ,MMC1 configuration" "0,1,2,3"
|
|
bitfld.long 0x44 22.--23. " ICDICFR18[23:22] ,MMC0 configuration" "0,1,2,3"
|
|
bitfld.long 0x44 20.--21. " ICDICFR18[21:20] ,FLTREQ1I configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x44 18.--19. " ICDICFR18[19:18] ,FLTREQ0I configuration" "0,1,2,3"
|
|
bitfld.long 0x44 16.--17. " ICDICFR18[17:16] ,FLTENDI configuration" "0,1,2,3"
|
|
bitfld.long 0x44 14.--15. " ICDICFR18[15:14] ,STERB/BTOERB configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x44 12.--13. " ICDICFR18[13:12] ,IREADY configuration" "0,1,2,3"
|
|
bitfld.long 0x44 10.--11. " ICDICFR18[11:10] ,IBUF configuration" "0,1,2,3"
|
|
bitfld.long 0x44 8.--9. " ICDICFR18[9:8] ,ISEC configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x44 6.--7. " ICDICFR18[7:6] ,ITARG configuration" "0,1,2,3"
|
|
bitfld.long 0x44 4.--5. " ICDICFR18[5:4] ,IERR configuration" "0,1,2,3"
|
|
bitfld.long 0x44 2.--3. " ICDICFR18[3:2] ,ISY configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x44 0.--1. " ICDICFR18[1:0] ,IEBBTV configuration" "0,1,2,3"
|
|
line.long 0x48 "ICDICFR19,Interrupt Configuration Register 19"
|
|
bitfld.long 0x48 30.--31. " ICDICFR19[31:30] ,SCUFUI2 configuration" "0,1,2,3"
|
|
bitfld.long 0x48 28.--29. " ICDICFR19[29:28] ,SCUFUI1 configuration" "0,1,2,3"
|
|
bitfld.long 0x48 26.--27. " ICDICFR19[27:26] ,SCUFUI0 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x48 24.--25. " ICDICFR19[25:24] ,SCUFDI3 configuration" "0,1,2,3"
|
|
bitfld.long 0x48 22.--23. " ICDICFR19[23:22] ,SCUFDI2 configuration" "0,1,2,3"
|
|
bitfld.long 0x48 20.--21. " ICDICFR19[21:20] ,SCUFDI1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x48 18.--19. " ICDICFR19[19:18] ,SCUFDI0 configuration" "0,1,2,3"
|
|
bitfld.long 0x48 16.--17. " ICDICFR19[17:16] ,SCUAI1 configuration" "0,1,2,3"
|
|
bitfld.long 0x48 14.--15. " ICDICFR19[15:14] ,SCUAI0 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x48 12.--13. " ICDICFR19[13:12] ,CUP configuration" "0,1,2,3"
|
|
bitfld.long 0x48 10.--11. " ICDICFR19[11:10] ,PRD configuration" "0,1,2,3"
|
|
bitfld.long 0x48 8.--9. " ICDICFR19[9:8] ,ARM configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x48 6.--7. " ICDICFR19[7:6] ,SDHI1_1 configuration" "0,1,2,3"
|
|
bitfld.long 0x48 4.--5. " ICDICFR19[5:4] ,SDHI1_0 configuration" "0,1,2,3"
|
|
bitfld.long 0x48 2.--3. " ICDICFR19[3:2] ,SDHI1_3 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x48 0.--1. " ICDICFR19[1:0] ,SDHI0_1 configuration" "0,1,2,3"
|
|
line.long 0x4C "ICDICFR20,Interrupt Configuration Register 20"
|
|
bitfld.long 0x4C 30.--31. " ICDICFR20[31:30] ,LINI1_INT_T configuration" "0,1,2,3"
|
|
bitfld.long 0x4C 28.--29. " ICDICFR20[29:28] ,LINI0_INT_M configuration" "0,1,2,3"
|
|
bitfld.long 0x4C 26.--27. " ICDICFR20[27:26] ,LINI0_INT_S configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x4C 24.--25. " ICDICFR20[25:24] ,LINI0_INT_R configuration" "0,1,2,3"
|
|
bitfld.long 0x4C 22.--23. " ICDICFR20[23:22] ,LINI0_INT_T configuration" "0,1,2,3"
|
|
bitfld.long 0x4C 16.--17. " ICDICFR20[17:16] ,DRC1 Channel 1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x4C 14.--15. " ICDICFR20[15:14] ,DRC1 Channel 0 configuration" "0,1,2,3"
|
|
bitfld.long 0x4C 12.--13. " ICDICFR20[13:12] ,MLB_SINT configuration" "0,1,2,3"
|
|
bitfld.long 0x4C 10.--11. " ICDICFR20[11:10] ,MLB_CINT configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x4C 8.--9. " ICDICFR20[9:8] ,SCUDVI3 configuration" "0,1,2,3"
|
|
bitfld.long 0x4C 6.--7. " ICDICFR20[7:6] ,SCUDVI2 configuration" "0,1,2,3"
|
|
bitfld.long 0x4C 4.--5. " ICDICFR20[5:4] ,SCUDVI1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x4C 2.--3. " ICDICFR20[3:2] ,SCUDVI0 configuration" "0,1,2,3"
|
|
bitfld.long 0x4C 0.--1. " ICDICFR20[1:0] ,SCUFUI3 configuration" "0,1,2,3"
|
|
line.long 0x50 "ICDICFR21,Interrupt Configuration Register 21"
|
|
bitfld.long 0x50 30.--31. " ICDICFR21[31:30] ,ERI1 configuration" "0,1,2,3"
|
|
bitfld.long 0x50 28.--29. " ICDICFR21[29:28] ,TEI0 configuration" "0,1,2,3"
|
|
bitfld.long 0x50 26.--27. " ICDICFR21[27:26] ,TXI0 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x50 24.--25. " ICDICFR21[25:24] ,RXI0 configuration" "0,1,2,3"
|
|
bitfld.long 0x50 22.--23. " ICDICFR21[23:22] ,ERI0 configuration" "0,1,2,3"
|
|
bitfld.long 0x50 6.--7. " ICDICFR21[7:6] , configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x50 4.--5. " ICDICFR21[5:4] ,LINI1_INT_M configuration" "0,1,2,3"
|
|
bitfld.long 0x50 2.--3. " ICDICFR21[3:2] ,LINI1_INT_S configuration" "0,1,2,3"
|
|
bitfld.long 0x50 0.--1. " ICDICFR21[1:0] ,LINI1_INT_R configuration" "0,1,2,3"
|
|
line.long 0x54 "ICDICFR22,Interrupt Configuration Register 22"
|
|
bitfld.long 0x54 24.--25. " ICDICFR22[25:24] ,CEUI configuration" "0,1,2,3"
|
|
bitfld.long 0x54 12.--13. " ICDICFR22[13:12] ,AVBI_MAC configuration" "0,1,2,3"
|
|
bitfld.long 0x54 10.--11. " ICDICFR22[11:10] ,AVBI_MANAGE configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x54 8.--9. " ICDICFR22[9:8] ,AVBI_ERROR configuration" "0,1,2,3"
|
|
bitfld.long 0x54 6.--7. " ICDICFR22[7:6] ,AVBI_DATA configuration" "0,1,2,3"
|
|
bitfld.long 0x54 4.--5. " ICDICFR22[5:4] ,TEI1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x54 2.--3. " ICDICFR22[3:2] ,TXI1 configuration" "0,1,2,3"
|
|
bitfld.long 0x54 0.--1. " ICDICFR22[1:0] ,RXI1 configuration" "0,1,2,3"
|
|
line.long 0x58 "ICDICFR23,Interrupt Configuration Register 23"
|
|
bitfld.long 0x58 30.--31. " ICDICFR23[31:30] ,X2HPERI1_ERRINT configuration" "0,1,2,3"
|
|
bitfld.long 0x58 28.--29. " ICDICFR23[29:28] ,H2XIC1_ERRINT configuration" "0,1,2,3"
|
|
bitfld.long 0x58 26.--27. " ICDICFR23[27:26] ,H2XMLB_ERRINT configuration" "0,1,2,3"
|
|
line.long 0x5C "ICDICFR24,Interrupt Configuration Register 24"
|
|
bitfld.long 0x5C 28.--29. " ICDICFR24[29:28] ,PFVEI1 configuration" "0,1,2,3"
|
|
bitfld.long 0x5C 26.--27. " ICDICFR24[27:26] ,OFFI1 configuration" "0,1,2,3"
|
|
bitfld.long 0x5C 24.--25. " ICDICFR24[25:24] ,IFEI1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x5C 22.--23. " ICDICFR24[23:22] ,PFVEI0 configuration" "0,1,2,3"
|
|
bitfld.long 0x5C 20.--21. " ICDICFR24[21:20] ,OFFI0 configuration" "0,1,2,3"
|
|
bitfld.long 0x5C 18.--19. " ICDICFR24[19:18] ,IFEI0 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x5C 16.--17. " ICDICFR24[17:16] ,PRRI configuration" "0,1,2,3"
|
|
bitfld.long 0x5C 14.--15. " ICDICFR24[15:14] ,X2HSPI2_ERRINT configuration" "0,1,2,3"
|
|
bitfld.long 0x5C 12.--13. " ICDICFR24[13:12] ,X2HSPI1_ERRINT configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x5C 10.--11. " ICDICFR24[11:10] ,X2HBSC_ERRINT configuration" "0,1,2,3"
|
|
bitfld.long 0x5C 8.--9. " ICDICFR24[9:8] ,X2HDBGR_ERRINT configuration" "0,1,2,3"
|
|
bitfld.long 0x5C 6.--7. " ICDICFR24[7:6] ,X2HPERI67_ERRINT configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x5C 4.--5. " ICDICFR24[5:4] ,X2HPERI5_ERRINT configuration" "0,1,2,3"
|
|
bitfld.long 0x5C 2.--3. " ICDICFR24[3:2] ,X2HPERI34_ERRINT configuration" "0,1,2,3"
|
|
bitfld.long 0x5C 0.--1. " ICDICFR24[1:0] ,X2HPERI2_ERRINT configuration" "0,1,2,3"
|
|
group.long 0xC68++0x2B
|
|
line.long 0x00 "ICDICFR26,Interrupt Configuration Register 26"
|
|
bitfld.long 0x00 30.--31. " ICDICFR26[31:30] ,TINT15 configuration" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. " ICDICFR26[29:28] ,TINT14 configuration" "0,1,2,3"
|
|
bitfld.long 0x00 26.--27. " ICDICFR26[27:26] ,TINT13 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " ICDICFR26[25:24] ,TINT12 configuration" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. " ICDICFR26[23:22] ,TINT11 configuration" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. " ICDICFR26[21:20] ,TINT10 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " ICDICFR26[19:18] ,TINT9 configuration" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. " ICDICFR26[17:16] ,TINT8 configuration" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. " ICDICFR26[15:14] ,TINT7 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " ICDICFR26[13:12] ,TINT6 configuration" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. " ICDICFR26[11:10] ,TINT5 configuration" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. " ICDICFR26[9:8] ,TINT4 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " ICDICFR26[7:6] ,TINT3 configuration" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. " ICDICFR26[5:4] ,TINT2 configuration" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. " ICDICFR26[3:2] ,TINT1 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " ICDICFR26[1:0] ,TINT0 configuration" "0,1,2,3"
|
|
line.long 0x04 "ICDICFR27,Interrupt Configuration Register 27"
|
|
bitfld.long 0x04 30.--31. " ICDICFR27[31:30] ,TINT31 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 28.--29. " ICDICFR27[29:28] ,TINT30 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 26.--27. " ICDICFR27[27:26] ,TINT29 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x04 24.--25. " ICDICFR27[25:24] ,TINT28 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 22.--23. " ICDICFR27[23:22] ,TINT27 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 20.--21. " ICDICFR27[21:20] ,TINT26 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " ICDICFR27[19:18] ,TINT25 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 16.--17. " ICDICFR27[17:16] ,TINT24 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 14.--15. " ICDICFR27[15:14] ,TINT23 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " ICDICFR27[13:12] ,TINT22 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 10.--11. " ICDICFR27[11:10] ,TINT21 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 8.--9. " ICDICFR27[9:8] ,TINT20 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " ICDICFR27[7:6] ,TINT19 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 4.--5. " ICDICFR27[5:4] ,TINT18 configuration" "0,1,2,3"
|
|
bitfld.long 0x04 2.--3. " ICDICFR27[3:2] ,TINT17 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " ICDICFR27[1:0] ,TINT16 configuration" "0,1,2,3"
|
|
line.long 0x08 "ICDICFR28,Interrupt Configuration Register 28"
|
|
bitfld.long 0x08 30.--31. " ICDICFR28[31:30] ,TINT47 configuration" "0,1,2,3"
|
|
bitfld.long 0x08 28.--29. " ICDICFR28[29:28] ,TINT46 configuration" "0,1,2,3"
|
|
bitfld.long 0x08 26.--27. " ICDICFR28[27:26] ,TINT45 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x08 24.--25. " ICDICFR28[25:24] ,TINT44 configuration" "0,1,2,3"
|
|
bitfld.long 0x08 22.--23. " ICDICFR28[23:22] ,TINT43 configuration" "0,1,2,3"
|
|
bitfld.long 0x08 20.--21. " ICDICFR28[21:20] ,TINT42 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x08 18.--19. " ICDICFR28[19:18] ,TINT41 configuration" "0,1,2,3"
|
|
bitfld.long 0x08 16.--17. " ICDICFR28[17:16] ,TINT40 configuration" "0,1,2,3"
|
|
bitfld.long 0x08 14.--15. " ICDICFR28[15:14] ,TINT39 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x08 12.--13. " ICDICFR28[13:12] ,TINT38 configuration" "0,1,2,3"
|
|
bitfld.long 0x08 10.--11. " ICDICFR28[11:10] ,TINT37 configuration" "0,1,2,3"
|
|
bitfld.long 0x08 8.--9. " ICDICFR28[9:8] ,TINT36 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " ICDICFR28[7:6] ,TINT35 configuration" "0,1,2,3"
|
|
bitfld.long 0x08 4.--5. " ICDICFR28[5:4] ,TINT34 configuration" "0,1,2,3"
|
|
bitfld.long 0x08 2.--3. " ICDICFR28[3:2] ,TINT33 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x08 0.--1. " ICDICFR28[1:0] ,TINT32 configuration" "0,1,2,3"
|
|
line.long 0x0C "ICDICFR29,Interrupt Configuration Register 29"
|
|
bitfld.long 0x0C 30.--31. " ICDICFR29[31:30] ,TINT63 configuration" "0,1,2,3"
|
|
bitfld.long 0x0C 28.--29. " ICDICFR29[29:28] ,TINT62 configuration" "0,1,2,3"
|
|
bitfld.long 0x0C 26.--27. " ICDICFR29[27:26] ,TINT61 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x0C 24.--25. " ICDICFR29[25:24] ,TINT60 configuration" "0,1,2,3"
|
|
bitfld.long 0x0C 22.--23. " ICDICFR29[23:22] ,TINT59 configuration" "0,1,2,3"
|
|
bitfld.long 0x0C 20.--21. " ICDICFR29[21:20] ,TINT58 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x0C 18.--19. " ICDICFR29[19:18] ,TINT57 configuration" "0,1,2,3"
|
|
bitfld.long 0x0C 16.--17. " ICDICFR29[17:16] ,TINT56 configuration" "0,1,2,3"
|
|
bitfld.long 0x0C 14.--15. " ICDICFR29[15:14] ,TINT55 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x0C 12.--13. " ICDICFR29[13:12] ,TINT54 configuration" "0,1,2,3"
|
|
bitfld.long 0x0C 10.--11. " ICDICFR29[11:10] ,TINT53 configuration" "0,1,2,3"
|
|
bitfld.long 0x0C 8.--9. " ICDICFR29[9:8] ,TINT52 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x0C 6.--7. " ICDICFR29[7:6] ,TINT51 configuration" "0,1,2,3"
|
|
bitfld.long 0x0C 4.--5. " ICDICFR29[5:4] ,TINT50 configuration" "0,1,2,3"
|
|
bitfld.long 0x0C 2.--3. " ICDICFR29[3:2] ,TINT49 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x0C 0.--1. " ICDICFR29[1:0] ,TINT48 configuration" "0,1,2,3"
|
|
line.long 0x10 "ICDICFR30,Interrupt Configuration Register 30"
|
|
bitfld.long 0x10 30.--31. " ICDICFR30[31:30] ,TINT79 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 28.--29. " ICDICFR30[29:28] ,TINT78 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 26.--27. " ICDICFR30[27:26] ,TINT77 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x10 24.--25. " ICDICFR30[25:24] ,TINT76 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 22.--23. " ICDICFR30[23:22] ,TINT75 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 20.--21. " ICDICFR30[21:20] ,TINT74 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x10 18.--19. " ICDICFR30[19:18] ,TINT73 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 16.--17. " ICDICFR30[17:16] ,TINT72 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 14.--15. " ICDICFR30[15:14] ,TINT71 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x10 12.--13. " ICDICFR30[13:12] ,TINT70 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 10.--11. " ICDICFR30[11:10] ,TINT69 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 8.--9. " ICDICFR30[9:8] ,TINT68 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " ICDICFR30[7:6] ,TINT67 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 4.--5. " ICDICFR30[5:4] ,TINT66 configuration" "0,1,2,3"
|
|
bitfld.long 0x10 2.--3. " ICDICFR30[3:2] ,TINT65 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x10 0.--1. " ICDICFR30[1:0] ,TINT64 configuration" "0,1,2,3"
|
|
line.long 0x14 "ICDICFR31,Interrupt Configuration Register 31"
|
|
bitfld.long 0x14 30.--31. " ICDICFR31[31:30] ,TINT95 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 28.--29. " ICDICFR31[29:28] ,TINT94 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 26.--27. " ICDICFR31[27:26] ,TINT93 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x14 24.--25. " ICDICFR31[25:24] ,TINT92 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 22.--23. " ICDICFR31[23:22] ,TINT91 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 20.--21. " ICDICFR31[21:20] ,TINT90 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x14 18.--19. " ICDICFR31[19:18] ,TINT89 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 16.--17. " ICDICFR31[17:16] ,TINT88 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 14.--15. " ICDICFR31[15:14] ,TINT87 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x14 12.--13. " ICDICFR31[13:12] ,TINT86 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 10.--11. " ICDICFR31[11:10] ,TINT85 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 8.--9. " ICDICFR31[9:8] ,TINT84 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x14 6.--7. " ICDICFR31[7:6] ,TINT83 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 4.--5. " ICDICFR31[5:4] ,TINT82 configuration" "0,1,2,3"
|
|
bitfld.long 0x14 2.--3. " ICDICFR31[3:2] ,TINT81 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x14 0.--1. " ICDICFR31[1:0] ,TINT80 configuration" "0,1,2,3"
|
|
line.long 0x18 "ICDICFR32,Interrupt Configuration Register 32"
|
|
bitfld.long 0x18 30.--31. " ICDICFR32[31:30] ,TINT111 configuration" "0,1,2,3"
|
|
bitfld.long 0x18 28.--29. " ICDICFR32[29:28] ,TINT110 configuration" "0,1,2,3"
|
|
bitfld.long 0x18 26.--27. " ICDICFR32[27:26] ,TINT109 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x18 24.--25. " ICDICFR32[25:24] ,TINT108 configuration" "0,1,2,3"
|
|
bitfld.long 0x18 22.--23. " ICDICFR32[23:22] ,TINT107 configuration" "0,1,2,3"
|
|
bitfld.long 0x18 20.--21. " ICDICFR32[21:20] ,TINT106 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x18 18.--19. " ICDICFR32[19:18] ,TINT105 configuration" "0,1,2,3"
|
|
bitfld.long 0x18 16.--17. " ICDICFR32[17:16] ,TINT104 configuration" "0,1,2,3"
|
|
bitfld.long 0x18 14.--15. " ICDICFR32[15:14] ,TINT103 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x18 12.--13. " ICDICFR32[13:12] ,TINT102 configuration" "0,1,2,3"
|
|
bitfld.long 0x18 10.--11. " ICDICFR32[11:10] ,TINT101 configuration" "0,1,2,3"
|
|
bitfld.long 0x18 8.--9. " ICDICFR32[9:8] ,TINT100 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x18 6.--7. " ICDICFR32[7:6] ,TINT99 configuration" "0,1,2,3"
|
|
bitfld.long 0x18 4.--5. " ICDICFR32[5:4] ,TINT98 configuration" "0,1,2,3"
|
|
bitfld.long 0x18 2.--3. " ICDICFR32[3:2] ,TINT97 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x18 0.--1. " ICDICFR32[1:0] ,TINT96 configuration" "0,1,2,3"
|
|
line.long 0x1C "ICDICFR33,Interrupt Configuration Register 33"
|
|
bitfld.long 0x1C 30.--31. " ICDICFR33[31:30] ,TINT127 configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 28.--29. " ICDICFR33[29:28] ,TINT126 configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 26.--27. " ICDICFR33[27:26] ,TINT125 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x1C 24.--25. " ICDICFR33[25:24] ,TINT124 configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 22.--23. " ICDICFR33[23:22] ,TINT123 configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 20.--21. " ICDICFR33[21:20] ,TINT122 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x1C 18.--19. " ICDICFR33[19:18] ,TINT121 configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 16.--17. " ICDICFR33[17:16] ,TINT120 configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 14.--15. " ICDICFR33[15:14] ,TINT119 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x1C 12.--13. " ICDICFR33[13:12] ,TINT118 configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 10.--11. " ICDICFR33[11:10] ,TINT117 configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 8.--9. " ICDICFR33[9:8] ,TINT116 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x1C 6.--7. " ICDICFR33[7:6] ,TINT115 configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 4.--5. " ICDICFR33[5:4] ,TINT114 configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 2.--3. " ICDICFR33[3:2] ,TINT113 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x1C 0.--1. " ICDICFR33[1:0] ,TINT112 configuration" "0,1,2,3"
|
|
line.long 0x20 "ICDICFR34,Interrupt Configuration Register 34"
|
|
bitfld.long 0x20 30.--31. " ICDICFR34[31:30] ,TINT143 configuration" "0,1,2,3"
|
|
bitfld.long 0x20 28.--29. " ICDICFR34[29:28] ,TINT142 configuration" "0,1,2,3"
|
|
bitfld.long 0x20 26.--27. " ICDICFR34[27:26] ,TINT141 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x20 24.--25. " ICDICFR34[25:24] ,TINT140 configuration" "0,1,2,3"
|
|
bitfld.long 0x20 22.--23. " ICDICFR34[23:22] ,TINT139 configuration" "0,1,2,3"
|
|
bitfld.long 0x20 20.--21. " ICDICFR34[21:20] ,TINT138 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x20 18.--19. " ICDICFR34[19:18] ,TINT137 configuration" "0,1,2,3"
|
|
bitfld.long 0x20 16.--17. " ICDICFR34[17:16] ,TINT136 configuration" "0,1,2,3"
|
|
bitfld.long 0x20 14.--15. " ICDICFR34[15:14] ,TINT135 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x20 12.--13. " ICDICFR34[13:12] ,TINT134 configuration" "0,1,2,3"
|
|
bitfld.long 0x20 10.--11. " ICDICFR34[11:10] ,TINT133 configuration" "0,1,2,3"
|
|
bitfld.long 0x20 8.--9. " ICDICFR34[9:8] ,TINT132 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x20 6.--7. " ICDICFR34[7:6] ,TINT131 configuration" "0,1,2,3"
|
|
bitfld.long 0x20 4.--5. " ICDICFR34[5:4] ,TINT130 configuration" "0,1,2,3"
|
|
bitfld.long 0x20 2.--3. " ICDICFR34[3:2] ,TINT129 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x20 0.--1. " ICDICFR34[1:0] ,TINT128 configuration" "0,1,2,3"
|
|
line.long 0x24 "ICDICFR35,Interrupt Configuration Register 35"
|
|
bitfld.long 0x24 30.--31. " ICDICFR35[31:30] ,TINT159 configuration" "0,1,2,3"
|
|
bitfld.long 0x24 28.--29. " ICDICFR35[29:28] ,TINT158 configuration" "0,1,2,3"
|
|
bitfld.long 0x24 26.--27. " ICDICFR35[27:26] ,TINT157 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x24 24.--25. " ICDICFR35[25:24] ,TINT156 configuration" "0,1,2,3"
|
|
bitfld.long 0x24 22.--23. " ICDICFR35[23:22] ,TINT155 configuration" "0,1,2,3"
|
|
bitfld.long 0x24 20.--21. " ICDICFR35[21:20] ,TINT154 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x24 18.--19. " ICDICFR35[19:18] ,TINT153 configuration" "0,1,2,3"
|
|
bitfld.long 0x24 16.--17. " ICDICFR35[17:16] ,TINT152 configuration" "0,1,2,3"
|
|
bitfld.long 0x24 14.--15. " ICDICFR35[15:14] ,TINT151 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x24 12.--13. " ICDICFR35[13:12] ,TINT150 configuration" "0,1,2,3"
|
|
bitfld.long 0x24 10.--11. " ICDICFR35[11:10] ,TINT149 configuration" "0,1,2,3"
|
|
bitfld.long 0x24 8.--9. " ICDICFR35[9:8] ,TINT148 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x24 6.--7. " ICDICFR35[7:6] ,TINT147 configuration" "0,1,2,3"
|
|
bitfld.long 0x24 4.--5. " ICDICFR35[5:4] ,TINT146 configuration" "0,1,2,3"
|
|
bitfld.long 0x24 2.--3. " ICDICFR35[3:2] ,TINT145 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x24 0.--1. " ICDICFR35[1:0] ,TINT144 configuration" "0,1,2,3"
|
|
line.long 0x28 "ICDICFR36,Interrupt Configuration Register 36"
|
|
bitfld.long 0x28 20.--21. " ICDICFR36[21:20] ,TINT170 configuration" "0,1,2,3"
|
|
bitfld.long 0x28 18.--19. " ICDICFR36[19:18] ,TINT169 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x28 16.--17. " ICDICFR36[17:16] ,TINT168 configuration" "0,1,2,3"
|
|
bitfld.long 0x28 14.--15. " ICDICFR36[15:14] ,TINT167 configuration" "0,1,2,3"
|
|
bitfld.long 0x28 12.--13. " ICDICFR36[13:12] ,TINT166 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x28 10.--11. " ICDICFR36[11:10] ,TINT165 configuration" "0,1,2,3"
|
|
bitfld.long 0x28 8.--9. " ICDICFR36[9:8] ,TINT164 configuration" "0,1,2,3"
|
|
bitfld.long 0x28 6.--7. " ICDICFR36[7:6] ,TINT163 configuration" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x28 4.--5. " ICDICFR36[5:4] ,TINT162 configuration" "0,1,2,3"
|
|
bitfld.long 0x28 2.--3. " ICDICFR36[3:2] ,TINT161 configuration" "0,1,2,3"
|
|
bitfld.long 0x28 0.--1. " ICDICFR36[1:0] ,TINT160 configuration" "0,1,2,3"
|
|
tree.end
|
|
tree "PPI/SPI Status Registers"
|
|
width 14.
|
|
rgroup.long 0xD00++0x3
|
|
line.long 0x00 "PPI_STATUS,PPI Status Register"
|
|
rgroup.long 0xD04++0x43
|
|
line.long 0x0 "SPI_STATUS0,SPI Status Register 0"
|
|
line.long 0x4 "SPI_STATUS1,SPI Status Register 1"
|
|
line.long 0x8 "SPI_STATUS2,SPI Status Register 2"
|
|
line.long 0xC "SPI_STATUS3,SPI Status Register 3"
|
|
line.long 0x10 "SPI_STATUS4,SPI Status Register 4"
|
|
line.long 0x14 "SPI_STATUS5,SPI Status Register 5"
|
|
line.long 0x18 "SPI_STATUS6,SPI Status Register 6"
|
|
line.long 0x1C "SPI_STATUS7,SPI Status Register 7"
|
|
line.long 0x20 "SPI_STATUS8,SPI Status Register 8"
|
|
line.long 0x24 "SPI_STATUS9,SPI Status Register 9"
|
|
line.long 0x28 "SPI_STATUS10,SPI Status Register 10"
|
|
line.long 0x2C "SPI_STATUS11,SPI Status Register 11"
|
|
line.long 0x30 "SPI_STATUS12,SPI Status Register 12"
|
|
line.long 0x34 "SPI_STATUS13,SPI Status Register 13"
|
|
line.long 0x38 "SPI_STATUS14,SPI Status Register 14"
|
|
line.long 0x3C "SPI_STATUS15,SPI Status Register 15"
|
|
line.long 0x40 "SPI_STATUS16,SPI Status Register 16"
|
|
tree.end
|
|
textline " "
|
|
width 9.
|
|
wgroup.long 0xF00++0x3
|
|
line.long 0x00 "ICDSGIR,Software generation interrupt register"
|
|
group.long 0x1000++0xB
|
|
line.long 0x00 "ICCICR,CPU interface control register"
|
|
line.long 0x04 "ICCPMR,Interrupt priority mask register"
|
|
line.long 0x08 "ICCBPR,Binary point register"
|
|
rgroup.long 0x100C++0x3
|
|
line.long 0x00 "ICCIAR,Interrupt acknowledge register"
|
|
wgroup.long 0x1010++0x3
|
|
line.long 0x00 "ICCEOIR,End-of-interrupt register"
|
|
rgroup.long 0x1014++0x7
|
|
line.long 0x00 "ICCRPR,Running priority register"
|
|
line.long 0x04 "ICCHPIR,Highest pending interrupt register"
|
|
group.long 0x101C++0x3
|
|
line.long 0x00 "ICCABPR,Aliased binary point register"
|
|
rgroup.long 0x10FC++0x3
|
|
line.long 0x00 "ICCIIDR,CPU interface implementer identification register"
|
|
width 0xB
|
|
tree.end
|
|
tree "Bus State Controller"
|
|
base ad:0x3FFFC000
|
|
width 9.
|
|
sif !cpuis("R7S9100??-CM3")&&!cpuis("R7S9100??-CR4")&&!cpuis("R7S9100??")&&!cpuis("R7S91011?-C??")
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CMNCR,Common Control Register"
|
|
bitfld.long 0x00 28. " TL0 ,Transfer end level" "Low,High"
|
|
bitfld.long 0x00 24. " AL0 ,Specifies the DACK0 (acknowledge)signal output is high active or low active" "Low,High"
|
|
bitfld.long 0x00 9.--10. " DPRTY ,DMA burst transfer priority" "Refresh,Refresh,No refresh,?..."
|
|
newline
|
|
bitfld.long 0x00 1. " HIZMEM ,High-Z memory control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " HIZCNT ,High-Z control" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x4++0x17
|
|
line.long 0x00 "CS0BCR,CS0 Space Bus Control Register"
|
|
bitfld.long 0x00 28.--30. " IWW ,Idle cycles between write-read cycles and write-write cycles" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 25.--27. " IWRWD ,Idle cycles for another space read-write" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 22.--24. " IWRWS ,Idle cycles for read-write in the same space" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
newline
|
|
bitfld.long 0x00 19.--21. " IWRRD ,Idle cycles for read-read in another space" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 16.--18. " IWRRS ,Idle cycles for read-read in the same space" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 12.--14. " TYPE ,Specify the type of memory connected to a space" "Normal space,Burst ROM (Asynch),MPX-I/O,SRAM,SDRAM,,,Burst ROM (Synch)"
|
|
newline
|
|
bitfld.long 0x00 9.--10. " BSZ ,Data bus width specification" ",8-bit,16-bit,32-bit"
|
|
group.long 0x8++0x17
|
|
line.long 0x00 "CS1BCR,CS1 Space Bus Control Register"
|
|
bitfld.long 0x00 28.--30. " IWW ,Idle cycles between write-read cycles and write-write cycles" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 25.--27. " IWRWD ,Idle cycles for another space read-write" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 22.--24. " IWRWS ,Idle cycles for read-write in the same space" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
newline
|
|
bitfld.long 0x00 19.--21. " IWRRD ,Idle cycles for read-read in another space" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 16.--18. " IWRRS ,Idle cycles for read-read in the same space" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 12.--14. " TYPE ,Specify the type of memory connected to a space" "Normal space,Burst ROM (Asynch),MPX-I/O,SRAM,SDRAM,,,Burst ROM (Synch)"
|
|
newline
|
|
bitfld.long 0x00 9.--10. " BSZ ,Data bus width specification" ",8-bit,16-bit,32-bit"
|
|
group.long 0xC++0x17
|
|
line.long 0x00 "CS2BCR,CS2 Space Bus Control Register"
|
|
bitfld.long 0x00 28.--30. " IWW ,Idle cycles between write-read cycles and write-write cycles" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 25.--27. " IWRWD ,Idle cycles for another space read-write" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 22.--24. " IWRWS ,Idle cycles for read-write in the same space" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
newline
|
|
bitfld.long 0x00 19.--21. " IWRRD ,Idle cycles for read-read in another space" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 16.--18. " IWRRS ,Idle cycles for read-read in the same space" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 12.--14. " TYPE ,Specify the type of memory connected to a space" "Normal space,Burst ROM (Asynch),MPX-I/O,SRAM,SDRAM,,,Burst ROM (Synch)"
|
|
newline
|
|
bitfld.long 0x00 9.--10. " BSZ ,Data bus width specification" ",8-bit,16-bit,32-bit"
|
|
group.long 0x10++0x17
|
|
line.long 0x00 "CS3BCR,CS3 Space Bus Control Register"
|
|
bitfld.long 0x00 28.--30. " IWW ,Idle cycles between write-read cycles and write-write cycles" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 25.--27. " IWRWD ,Idle cycles for another space read-write" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 22.--24. " IWRWS ,Idle cycles for read-write in the same space" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
newline
|
|
bitfld.long 0x00 19.--21. " IWRRD ,Idle cycles for read-read in another space" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 16.--18. " IWRRS ,Idle cycles for read-read in the same space" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 12.--14. " TYPE ,Specify the type of memory connected to a space" "Normal space,Burst ROM (Asynch),MPX-I/O,SRAM,SDRAM,,,Burst ROM (Synch)"
|
|
newline
|
|
bitfld.long 0x00 9.--10. " BSZ ,Data bus width specification" ",8-bit,16-bit,32-bit"
|
|
group.long 0x14++0x17
|
|
line.long 0x00 "CS4BCR,CS4 Space Bus Control Register"
|
|
bitfld.long 0x00 28.--30. " IWW ,Idle cycles between write-read cycles and write-write cycles" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 25.--27. " IWRWD ,Idle cycles for another space read-write" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 22.--24. " IWRWS ,Idle cycles for read-write in the same space" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
newline
|
|
bitfld.long 0x00 19.--21. " IWRRD ,Idle cycles for read-read in another space" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 16.--18. " IWRRS ,Idle cycles for read-read in the same space" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 12.--14. " TYPE ,Specify the type of memory connected to a space" "Normal space,Burst ROM (Asynch),MPX-I/O,SRAM,SDRAM,,,Burst ROM (Synch)"
|
|
newline
|
|
bitfld.long 0x00 9.--10. " BSZ ,Data bus width specification" ",8-bit,16-bit,32-bit"
|
|
group.long 0x18++0x17
|
|
line.long 0x00 "CS5BCR,CS5 Space Bus Control Register"
|
|
bitfld.long 0x00 28.--30. " IWW ,Idle cycles between write-read cycles and write-write cycles" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 25.--27. " IWRWD ,Idle cycles for another space read-write" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 22.--24. " IWRWS ,Idle cycles for read-write in the same space" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
newline
|
|
bitfld.long 0x00 19.--21. " IWRRD ,Idle cycles for read-read in another space" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 16.--18. " IWRRS ,Idle cycles for read-read in the same space" "No cycle,1 cycle,2 cycles,4 cycles,6 cycles,8 cycles,10 cycles,12 cycles"
|
|
bitfld.long 0x00 12.--14. " TYPE ,Specify the type of memory connected to a space" "Normal space,Burst ROM (Asynch),MPX-I/O,SRAM,SDRAM,,,Burst ROM (Synch)"
|
|
newline
|
|
bitfld.long 0x00 9.--10. " BSZ ,Data bus width specification" ",8-bit,16-bit,32-bit"
|
|
if (((per.l(ad:0x3FFFC000+0x04))&0x7000)==(0x0000||0x3000||0x2000))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CS0WCR,CS0 Space Wait Control Register"
|
|
sif !cpuis("R7S910*")
|
|
bitfld.long 0x00 20. " BAS ,SRAM with byte selection byte access select" "RW timing/RW cycle,RW cycle/RW timing"
|
|
newline
|
|
else
|
|
bitfld.long 0x00 21. " PULLDOWN_21 ,Pulldown 21" "0,1"
|
|
bitfld.long 0x00 20. " BAS ,SRAM with byte selection byte access select" "RW timing/RW cycle,RW cycle/RW timing"
|
|
bitfld.long 0x00 17. " PULLDOWN_17 ,Pulldown 17" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. " PULLDOWN_16 ,Pulldown 16" "0,1"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 11.--12. " SW ,Number of delay cycles from address, CS0 Assertion to RD, WEn Assertion" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
bitfld.long 0x00 7.--10. " WR ,Number of access wait cycles" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,8 cycles,10 cycles,12 cycles,14 cycles,18 cycles,24 cycles,?..."
|
|
newline
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
bitfld.long 0x00 0.--1. " HW ,Delay cycles from RD, WEn negation to address, CS0 negation" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
elif (((per.l(ad:0x3FFFC000+0x04))&0x7000)==0x1000)
|
|
if (((per.l(ad:0x3FFFC000+0x04))&0x600)==0x200)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CS0WCR,CS0 Space Wait Control Register"
|
|
bitfld.long 0x00 20.--21. " BST ,Burst count specification" "16 burst x 1,4 burst x 4,?..."
|
|
bitfld.long 0x00 16.--17. " BW ,Number of burst wait cycles" "No cycle,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 7.--10. " W ,Number of access wait cycles" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,8 cycles,10 cycles,12 cycles,14 cycles,18 cycles,24 cycles,?..."
|
|
newline
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
elif (((per.l(ad:0x3FFFC000+0x04))&0x600)==0x400)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CS0WCR,CS0 Space Wait Control Register"
|
|
bitfld.long 0x00 20.--21. " BST ,Burst count specification" "8 burst x 1,2 burst x 4,4-4|2-4-2 burst,?..."
|
|
bitfld.long 0x00 16.--17. " BW ,Number of burst wait cycles" "No cycle,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 7.--10. " W ,Number of access wait cycles" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,8 cycles,10 cycles,12 cycles,14 cycles,18 cycles,24 cycles,?..."
|
|
newline
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
elif (((per.l(ad:0x3FFFC000+0x04))&0x600)==0x600)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CS0WCR,CS0 Space Wait Control Register"
|
|
bitfld.long 0x00 20.--21. " BST ,Burst count specification" "4 burst x 1,4 burst x 1,4 burst x 1,4 burst x 1"
|
|
bitfld.long 0x00 16.--17. " BW ,Number of burst wait cycles" "No cycle,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 7.--10. " W ,Number of access wait cycles" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,8 cycles,10 cycles,12 cycles,14 cycles,18 cycles,24 cycles,?..."
|
|
newline
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CS0WCR,CS0 Space Wait Control Register"
|
|
bitfld.long 0x00 16.--17. " BW ,Number of burst wait cycles" "No cycle,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 7.--10. " W ,Number of access wait cycles" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,8 cycles,10 cycles,12 cycles,14 cycles,18 cycles,24 cycles,?..."
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
endif
|
|
elif (((per.l(ad:0x3FFFC000+0x04))&0x7000)==0x7000)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CS0WCR,CS0 Space Wait Control Register"
|
|
bitfld.long 0x00 16.--17. " BW ,Number of burst wait cycles" "No cycle,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 7.--10. " W ,Number of access wait cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
endif
|
|
if (((per.l(ad:0x3FFFC000+0x08))&0x7000)==(0x0000||0x3000||0x2000))
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CS1WCR,CS1 Space Wait Control Register"
|
|
bitfld.long 0x00 20. " BAS ,SRAM with byte selection byte access select" "RW timing/RW cycle,RW cycle/RW timing"
|
|
bitfld.long 0x00 16.--18. " WW ,Number of write access wait cycles" "Same as WR,No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles"
|
|
bitfld.long 0x00 11.--12. " SW ,Number of delay cycles from address, CS0 Assertion to RD, WEn Assertion" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
newline
|
|
bitfld.long 0x00 7.--10. " WR ,Number of access wait cycles" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,8 cycles,10 cycles,12 cycles,14 cycles,18 cycles,24 cycles,?..."
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
bitfld.long 0x00 0.--1. " HW ,Delay cycles from RD, WEn negation to address, CS1 negation" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
endif
|
|
sif !cpuis("R7S910*")
|
|
if (((per.l(ad:0x3FFFC000+0x0C))&0x7000)==(0x0000||0x3000||0x2000))
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CS2WCR,CS2 Space Wait Control Register"
|
|
bitfld.long 0x00 20. " BAS ,SRAM with byte selection byte access select" "RW timing/RW cycle,RW cycle/RW timing"
|
|
bitfld.long 0x00 7.--10. " WR ,Number of access wait cycles" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,8 cycles,10 cycles,12 cycles,14 cycles,18 cycles,24 cycles,?..."
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
elif (((per.l(ad:0x3FFFC000+0x0C))&0x7000)==0x5000)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CS2WCR,CS2 Space Wait Control Register"
|
|
bitfld.long 0x00 7.--8. " A2CL ,CAS latency for area 2" "1 cycle,2 cycles,3 cycles,4 cycles"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x3FFFC000+0x0C))&0x7000)==(0x0000||0x3000||0x2000))
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CS2WCR,CS2 Space Wait Control Register"
|
|
bitfld.long 0x00 20. " BAS ,SRAM with byte selection byte access select" "RW timing/RW cycle,RW cycle/RW timing"
|
|
bitfld.long 0x00 7.--10. " WR ,Number of access wait cycles" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,8 cycles,10 cycles,12 cycles,14 cycles,18 cycles,24 cycles,?..."
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
elif (((per.l(ad:0x3FFFC000+0x0C))&0x7000)==0x4000)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CS2WCR,CS2 Space Wait Control Register"
|
|
bitfld.long 0x00 7.--8. " A2CL ,CAS latency for area 2" "1 cycle,2 cycles,3 cycles,4 cycles"
|
|
endif
|
|
endif
|
|
sif !cpuis("R7S910*")
|
|
if (((per.l(ad:0x3FFFC000+0x10))&0x7000)==(0x0000||0x3000||0x2000))
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CS3WCR,CS2 Space Wait Control Register"
|
|
bitfld.long 0x00 20. " BAS ,SRAM with byte selection byte access select" "RW timing/RW cycle,RW cycle/RW timing"
|
|
bitfld.long 0x00 7.--10. " WR ,Number of access wait cycles" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,8 cycles,10 cycles,12 cycles,14 cycles,18 cycles,24 cycles,?..."
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
elif (((per.l(ad:0x3FFFC000+0x10))&0x7000)==0x5000)
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CS3WCR,CS2 Space Wait Control Register"
|
|
bitfld.long 0x00 13.--14. " WTRP ,Number of auto-precharge completion wait cycles" "No cycle,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 10.--11. " WTRCD ,Number of wait cycles between ACTV command and READ(A)/WRIT(A) command" "No cycle,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 7.--8. " A3CL ,CAS latency for area 3" "1 cycle,2 cycles,3 cycles,4 cycles"
|
|
newline
|
|
bitfld.long 0x00 3.--4. " TRWL ,Number of auto-precharge startup wait cycles" "No cycle,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 0.--1. " WTRC ,Number of idle cycles from REF command/self-refresh release to ACTV/REF/MRS command" "2 cycles,3 cycles,5 cycles,8 cycles"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x3FFFC000+0x10))&0x7000)==(0x0000||0x3000||0x2000))
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CS3WCR,CS2 Space Wait Control Register"
|
|
bitfld.long 0x00 20. " BAS ,SRAM with byte selection byte access select" "RW timing/RW cycle,RW cycle/RW timing"
|
|
bitfld.long 0x00 7.--10. " WR ,Number of access wait cycles" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,8 cycles,10 cycles,12 cycles,14 cycles,18 cycles,24 cycles,?..."
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
elif (((per.l(ad:0x3FFFC000+0x10))&0x7000)==0x4000)
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CS3WCR,CS2 Space Wait Control Register"
|
|
bitfld.long 0x00 13.--14. " WTRP ,Number of auto-precharge completion wait cycles" "No cycle,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 10.--11. " WTRCD ,Number of wait cycles between ACTV command and READ(A)/WRIT(A) command" "No cycle,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 7.--8. " A3CL ,CAS latency for area 3" "1 cycle,2 cycles,3 cycles,4 cycles"
|
|
newline
|
|
bitfld.long 0x00 3.--4. " TRWL ,Number of auto-precharge startup wait cycles" "No cycle,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 0.--1. " WTRC ,Number of idle cycles from REF command/self-refresh release to ACTV/REF/MRS command" "2 cycles,3 cycles,5 cycles,8 cycles"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x3FFFC000+0x14))&0x7000)==(0x0000||0x3000||0x2000))
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CS4WCR,CS4 Space Wait Control Register"
|
|
bitfld.long 0x00 20. " BAS ,SRAM with byte selection byte access select" "RW timing/RW cycle,RW cycle/RW timing"
|
|
bitfld.long 0x00 16.--18. " WW ,Number of write access wait cycles" "Same as WR,No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles"
|
|
bitfld.long 0x00 11.--12. " SW ,Number of delay cycles from address, CS0 assertion to RD, WEn assertion" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
newline
|
|
bitfld.long 0x00 7.--10. " WR ,Number of access wait cycles" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,8 cycles,10 cycles,12 cycles,14 cycles,18 cycles,24 cycles,?..."
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
bitfld.long 0x00 0.--1. " HW ,Delay cycles from RD, WEn negation to address, CS4 negation" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
elif (((per.l(ad:0x3FFFC000+0x14))&0x7000)==0x1000)
|
|
if (((per.l(ad:0x3FFFC000+0x14))&0x600)==0x200)
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CS4WCR,CS4 Space Wait Control Register"
|
|
bitfld.long 0x00 20.--21. " BST ,Burst count specification" "16 burst x 1,4 burst x 4,?..."
|
|
bitfld.long 0x00 16.--17. " BW ,Number of burst wait cycles" "No cycle,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 11.--12. " SW ,Number of delay cycles from address, CS0 Assertion to RD, WEn Assertion" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
newline
|
|
bitfld.long 0x00 7.--10. " W ,Number of access wait cycles" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,8 cycles,10 cycles,12 cycles,14 cycles,18 cycles,24 cycles,?..."
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
bitfld.long 0x00 0.--1. " HW ,Delay cycles from RD, WEn negation to address, CS4 negation" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
elif (((per.l(ad:0x3FFFC000+0x14))&0x600)==0x400)
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CS4WCR,CS4 Space Wait Control Register"
|
|
bitfld.long 0x00 20.--21. " BST ,Burst count specification" "8 burst x 1,2 burst x 4,4-4|2-4-2 burst,?..."
|
|
bitfld.long 0x00 16.--17. " BW ,Number of burst wait cycles" "No cycle,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 11.--12. " SW ,Number of delay cycles from address, CS0 assertion to RD, WEn assertion" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
newline
|
|
bitfld.long 0x00 7.--10. " W ,Number of access wait cycles" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,8 cycles,10 cycles,12 cycles,14 cycles,18 cycles,24 cycles,?..."
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
bitfld.long 0x00 0.--1. " HW ,Delay cycles from RD, WEn negation to address, CS4 negation" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
elif (((per.l(ad:0x3FFFC000+0x14))&0x600)==0x600)
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CS4WCR,CS4 Space Wait Control Register"
|
|
bitfld.long 0x00 20.--21. " BST ,Burst count specification" "4 burst x 1,4 burst x 1,4 burst x 1,4 burst x 1"
|
|
bitfld.long 0x00 16.--17. " BW ,Number of burst wait cycles" "No cycle,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 11.--12. " SW ,Number of delay cycles from address, CS0 assertion to RD, WEn assertion" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
newline
|
|
bitfld.long 0x00 7.--10. " W ,Number of access wait cycles" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,8 cycles,10 cycles,12 cycles,14 cycles,18 cycles,24 cycles,?..."
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
bitfld.long 0x00 0.--1. " HW ,Delay cycles from RD, WEn negation to address, CS4 negation" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
else
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CS4WCR,CS4 Space Wait Control Register"
|
|
bitfld.long 0x00 16.--17. " BW ,Number of burst wait cycles" "No cycle,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 11.--12. " SW ,Number of delay cycles from address, CS0 assertion to RD, WEn assertion" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
bitfld.long 0x00 7.--10. " W ,Number of access wait cycles" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,8 cycles,10 cycles,12 cycles,14 cycles,18 cycles,24 cycles,?..."
|
|
newline
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
bitfld.long 0x00 0.--1. " HW ,Delay cycles from RD, WEn negation to address, CS4 negation" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x3FFFC000+0x18))&0x7000)==0x0000)
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CS5WCR,CS5 Space Wait Control Register"
|
|
bitfld.long 0x00 16.--18. " WW ,Number of write access wait cycles" "Same as WR,No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles"
|
|
bitfld.long 0x00 11.--12. " SW ,Number of delay cycles from address, CS5 assertion to RD, WE assertion" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
bitfld.long 0x00 7.--10. " WR ,Number of read access wait cycles" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,8 cycles,10 cycles,12 cycles,14 cycles,18 cycles,24 cycles,?..."
|
|
newline
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
bitfld.long 0x00 0.--1. " HW ,Delay cycles from RD, WEn negation to address, CS5 negation" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
elif (((per.l(ad:0x3FFFC000+0x18))&0x7000)==0x3000)
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CS5WCR,CS5 Space Wait Control Register"
|
|
bitfld.long 0x00 20. " BAS ,SRAM with byte selection byte access select" "RW timing/RW cycle,RW cycle/RW timing"
|
|
bitfld.long 0x00 16.--18. " WW ,Number of write access wait cycles" "Same as WR,No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles"
|
|
bitfld.long 0x00 11.--12. " SW ,Number of delay cycles from address, CS5 assertion to RD, WE assertion" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
newline
|
|
bitfld.long 0x00 7.--10. " WR ,Number of read access wait cycles" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,8 cycles,10 cycles,12 cycles,14 cycles,18 cycles,24 cycles,?..."
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
bitfld.long 0x00 0.--1. " HW ,Delay cycles from RD, WEn negation to address, CS5 negation" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
elif (((per.l(ad:0x3FFFC000+0x18))&0x7000)==0x2000)
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CS5WCR,CS5 Space Wait Control Register"
|
|
bitfld.long 0x00 21. " SZSEL ,MPX-I/O interface bus width specification" "A14,A21"
|
|
bitfld.long 0x00 20. " MPXW ,MPX-I/O interface address wait" "No wait,Wait"
|
|
bitfld.long 0x00 16.--18. " WW ,Number of write access wait cycles" "Same as WR,No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles"
|
|
newline
|
|
bitfld.long 0x00 11.--12. " SW ,Number of delay cycles from address, CS5 assertion to RD, WE assertion" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
bitfld.long 0x00 7.--10. " WR ,Number of read access wait cycles" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,8 cycles,10 cycles,12 cycles,14 cycles,18 cycles,24 cycles,?..."
|
|
bitfld.long 0x00 6. " WM ,External wait mask specification" "Valid,Not valid"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " HW ,Delay cycles from RD, WEn negation to address, CS5 negation" "0.5 cycles,1.5 cycles,2.5 cycles,3.5 cycles"
|
|
endif
|
|
group.long 0x4C++0x0F
|
|
line.long 0x00 "SDCR,SDRAM Control Register"
|
|
bitfld.long 0x00 19.--20. " A2ROW ,number of bits of row address for area 2" "11 bits,12 bits,13 bits,?..."
|
|
bitfld.long 0x00 16.--17. " A2COL ,Number of bits of column address for area 2" "8 bits,9 bits,10 bits,?..."
|
|
bitfld.long 0x00 13. " DEEP ,Deep power-down mode" "Self-refresh,Deep power-down"
|
|
newline
|
|
bitfld.long 0x00 11. " RFSH ,Refresh control" "No refresh,Refresh"
|
|
bitfld.long 0x00 10. " RMODE ,Refresh control" "Auto-refresh,Self-refresh"
|
|
bitfld.long 0x00 9. " PDOWN ,Power-down mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. " BACTV ,Bank active mode" "Auto-precharge,Bank active"
|
|
bitfld.long 0x00 3.--4. " A3ROW ,Number of bits of row address for area 3" "11 bits,12 bits,13 bits,?..."
|
|
bitfld.long 0x00 0.--1. " A3COL ,Number of bits of column address for area 3" "8 bits,9 bits,10 bits,?..."
|
|
line.long 0x04 "RTCSR,Refresh Timer Control/Status Register"
|
|
bitfld.long 0x04 7. " CMF ,Compare match flag" "Low,High"
|
|
bitfld.long 0x04 6. " CMIE ,Compare match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3.--5. " CKS ,Clock select" "Stopped,/4,/16,/64,/256,/1024,/2048,/4096"
|
|
newline
|
|
bitfld.long 0x04 0.--2. " RRC ,Refresh count" "1 time,2 times,4 times,6 times,8 times,?..."
|
|
line.long 0x08 "RTCNT,Refresh Timer Counter"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CNT ,8-bit counter"
|
|
line.long 0x0C "RTCOR,Refresh Time Constant Register"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " CNT ,8-bit counter"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TOSCOR0,Timeout Cycle Constant Register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. " B16REG ,16-bit register"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "TOSCOR1,Timeout Cycle Constant Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " B16REG ,16-bit register"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "TOSCOR2,Timeout Cycle Constant Register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. " B16REG ,16-bit register"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "TOSCOR3,Timeout Cycle Constant Register 3"
|
|
hexmask.long.word 0x00 0.--15. 1. " B16REG ,16-bit register"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "TOSCOR4,Timeout Cycle Constant Register 4"
|
|
hexmask.long.word 0x00 0.--15. 1. " B16REG ,16-bit register"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "TOSCOR5,Timeout Cycle Constant Register 5"
|
|
hexmask.long.word 0x00 0.--15. 1. " B16REG ,16-bit register"
|
|
group.long 0x80++0x07
|
|
line.long 0x00 "TOSTR,Timeout Status Register"
|
|
bitfld.long 0x00 5. " CS5TOSTF ,CS5 space timeout status Flag" "Low,High"
|
|
bitfld.long 0x00 4. " CS4TOSTF ,CS4 space timeout status flag" "Low,High"
|
|
bitfld.long 0x00 3. " CS3TOSTF ,CS3 space timeout status flag" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 2. " CS2TOSTF ,CS2 space timeout status flag" "Low,High"
|
|
bitfld.long 0x00 1. " CS1TOSTF ,CS1 space timeout status flag" "Low,High"
|
|
bitfld.long 0x00 0. " CS0TOSTF ,CS0 space timeout status flag" "Low,High"
|
|
line.long 0x04 "TOENR,Timeout Enable Register"
|
|
bitfld.long 0x04 5. " CS5TOEN ,CS5 space timeout detection enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " CS4TOEN ,CS4 space timeout detection enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " CS3TOEN ,CS3 space timeout detection enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 2. " CS2TOEN ,CS2 space timeout detection enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " CS1TOEN ,CS1 space timeout detection enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CS0TOEN ,CS0 space timeout detection enable" "Disabled,Enabled"
|
|
sif cpuis("R7S9100*")||cpuis("R7S9101*")
|
|
group.long 0xC0C++0x03
|
|
line.long 0x00 "CKIOSET,CKIO Control Register"
|
|
bitfld.long 0x00 0.--3. " CKIOSET ,CKIO set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.byte 0xCFC++0x03
|
|
line.byte 0x00 "CKIOKEY,CKIOSET Protection Register"
|
|
hexmask.byte 0x00 0.--7. 1. " CKIOKEY ,CKIOSET protection register value"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "Direct Address Controller"
|
|
tree "Channel 0"
|
|
base ad:0xE8200000
|
|
width 10.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "N0SA_0,Next0 Source Address Register 0"
|
|
line.long 0x04 "N0DA_0,Next0 Destination Address Register 0"
|
|
line.long 0x08 "N0TB_0,Next0 Transaction Byte Register 0"
|
|
group.long 0x0C++0xB
|
|
line.long 0x00 "N1SA_0,Next1 Source Address Register 0"
|
|
line.long 0x04 "N1DA_0,Next1 Destination Address Register 0"
|
|
line.long 0x08 "N1TB_0,Next1 Transaction Byte Register 0"
|
|
rgroup.long 0x18++0xB
|
|
line.long 0x00 "CRSA_0,Current Source Address Register 0"
|
|
line.long 0x04 "CRDA_0,Current Destination Address Register 0"
|
|
line.long 0x08 "CRTB_0,Current Transaction Byte Register 0"
|
|
if (((per.l(ad:0xE8200000+0x24))&0x10)==0x10)
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_0,Channel Status Register 0"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Error"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Error"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_0,Channel Status Register 0"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "CHCTRL_0,Channel Control Register 0"
|
|
bitfld.long 0x00 17. " CLRINTMSK ,DMA transfer end interrupt mask clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " SETINTMSK ,DMA transfer end interrupt mask set" "No effect,Masked"
|
|
bitfld.long 0x00 9. " CLRSUS ,Clear Suspend" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SETSUS ,Set Suspend" "No effect,Suspended"
|
|
bitfld.long 0x00 6. " CLRTC ,Clear TC bit" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLREND ,Clear End bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLRRQ ,Clear Request bit" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " SWRST ,Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " STG ,Software Trigger" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLREN ,Clear Enable" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " SETEN ,Set Enable" "No effect,Enabled"
|
|
line.long 0x04 "CHCFG_0,Channel Configuration Register 0"
|
|
bitfld.long 0x04 31. " DMS ,DMA Mode Select" "Register,Link"
|
|
bitfld.long 0x04 30. " REN ,Register Set Enable" "Not continued,Continued"
|
|
bitfld.long 0x04 29. " RSW ,Register Select Switch" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RSEL ,Register Set Select" "Next0,Next1"
|
|
bitfld.long 0x04 27. " SBE ,Sweep Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " DEM ,DMA Transfer End Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TM ,Transfer Mode" "Single,Block"
|
|
bitfld.long 0x04 21. " DAD ,Destination address counting direction" "Increment,Fixed"
|
|
bitfld.long 0x04 20. " SAD ,Source address counting direction" "Increment,Fixed"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " DDS ,Destination Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 12.--15. " SDS ,Source Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 8.--10. " AM ,ACK Mode" "Initial value,Level,Bus cycle,Bus cycle,No output,No output,No output,No output"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LVL ,Level" "Edge,Level"
|
|
bitfld.long 0x04 5. " HIEN ,High Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " LOEN ,Low Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " REQD ,Request Direction" "Source,Destination"
|
|
bitfld.long 0x04 0.--2. " SEL ,DMAC channel set" "CH0/CH8,CH1/CH9,CH2/CH10,CH3/CH11,CH4/CH12,CH5/CH13,CH6/CH14,CH7/CH15"
|
|
line.long 0x08 "CHITVL_0,Channel Interval Register 0"
|
|
hexmask.long.word 0x08 0.--15. 1. " ITVL ,Channel transfer interval"
|
|
line.long 0x0C "CHEXT_0,Channel Extension Register 0"
|
|
bitfld.long 0x0C 12.--15. " DCA ,Destination CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 4.--7. " SCA ,Source CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "NXLA_0,Next Link Address Register 0"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x00 "CRLA_0,Current Link Address Register 0"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0xE8200040
|
|
width 10.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "N0SA_1,Next0 Source Address Register 1"
|
|
line.long 0x04 "N0DA_1,Next0 Destination Address Register 1"
|
|
line.long 0x08 "N0TB_1,Next0 Transaction Byte Register 1"
|
|
group.long 0x0C++0xB
|
|
line.long 0x00 "N1SA_1,Next1 Source Address Register 1"
|
|
line.long 0x04 "N1DA_1,Next1 Destination Address Register 1"
|
|
line.long 0x08 "N1TB_1,Next1 Transaction Byte Register 1"
|
|
rgroup.long 0x18++0xB
|
|
line.long 0x00 "CRSA_1,Current Source Address Register 1"
|
|
line.long 0x04 "CRDA_1,Current Destination Address Register 1"
|
|
line.long 0x08 "CRTB_1,Current Transaction Byte Register 1"
|
|
if (((per.l(ad:0xE8200040+0x24))&0x10)==0x10)
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_1,Channel Status Register 1"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Error"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Error"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_1,Channel Status Register 1"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "CHCTRL_1,Channel Control Register 1"
|
|
bitfld.long 0x00 17. " CLRINTMSK ,DMA transfer end interrupt mask clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " SETINTMSK ,DMA transfer end interrupt mask set" "No effect,Masked"
|
|
bitfld.long 0x00 9. " CLRSUS ,Clear Suspend" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SETSUS ,Set Suspend" "No effect,Suspended"
|
|
bitfld.long 0x00 6. " CLRTC ,Clear TC bit" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLREND ,Clear End bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLRRQ ,Clear Request bit" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " SWRST ,Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " STG ,Software Trigger" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLREN ,Clear Enable" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " SETEN ,Set Enable" "No effect,Enabled"
|
|
line.long 0x04 "CHCFG_1,Channel Configuration Register 1"
|
|
bitfld.long 0x04 31. " DMS ,DMA Mode Select" "Register,Link"
|
|
bitfld.long 0x04 30. " REN ,Register Set Enable" "Not continued,Continued"
|
|
bitfld.long 0x04 29. " RSW ,Register Select Switch" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RSEL ,Register Set Select" "Next0,Next1"
|
|
bitfld.long 0x04 27. " SBE ,Sweep Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " DEM ,DMA Transfer End Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TM ,Transfer Mode" "Single,Block"
|
|
bitfld.long 0x04 21. " DAD ,Destination address counting direction" "Increment,Fixed"
|
|
bitfld.long 0x04 20. " SAD ,Source address counting direction" "Increment,Fixed"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " DDS ,Destination Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 12.--15. " SDS ,Source Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 8.--10. " AM ,ACK Mode" "Initial value,Level,Bus cycle,Bus cycle,No output,No output,No output,No output"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LVL ,Level" "Edge,Level"
|
|
bitfld.long 0x04 5. " HIEN ,High Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " LOEN ,Low Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " REQD ,Request Direction" "Source,Destination"
|
|
bitfld.long 0x04 0.--2. " SEL ,DMAC channel set" "CH0/CH8,CH1/CH9,CH2/CH10,CH3/CH11,CH4/CH12,CH5/CH13,CH6/CH14,CH7/CH15"
|
|
line.long 0x08 "CHITVL_1,Channel Interval Register 1"
|
|
hexmask.long.word 0x08 0.--15. 1. " ITVL ,Channel transfer interval"
|
|
line.long 0x0C "CHEXT_1,Channel Extension Register 1"
|
|
bitfld.long 0x0C 12.--15. " DCA ,Destination CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 4.--7. " SCA ,Source CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "NXLA_1,Next Link Address Register 1"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x00 "CRLA_1,Current Link Address Register 1"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 2"
|
|
base ad:0xE8200080
|
|
width 10.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "N0SA_2,Next0 Source Address Register 2"
|
|
line.long 0x04 "N0DA_2,Next0 Destination Address Register 2"
|
|
line.long 0x08 "N0TB_2,Next0 Transaction Byte Register 2"
|
|
group.long 0x0C++0xB
|
|
line.long 0x00 "N1SA_2,Next1 Source Address Register 2"
|
|
line.long 0x04 "N1DA_2,Next1 Destination Address Register 2"
|
|
line.long 0x08 "N1TB_2,Next1 Transaction Byte Register 2"
|
|
rgroup.long 0x18++0xB
|
|
line.long 0x00 "CRSA_2,Current Source Address Register 2"
|
|
line.long 0x04 "CRDA_2,Current Destination Address Register 2"
|
|
line.long 0x08 "CRTB_2,Current Transaction Byte Register 2"
|
|
if (((per.l(ad:0xE8200080+0x24))&0x10)==0x10)
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_2,Channel Status Register 2"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Error"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Error"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_2,Channel Status Register 2"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "CHCTRL_2,Channel Control Register 2"
|
|
bitfld.long 0x00 17. " CLRINTMSK ,DMA transfer end interrupt mask clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " SETINTMSK ,DMA transfer end interrupt mask set" "No effect,Masked"
|
|
bitfld.long 0x00 9. " CLRSUS ,Clear Suspend" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SETSUS ,Set Suspend" "No effect,Suspended"
|
|
bitfld.long 0x00 6. " CLRTC ,Clear TC bit" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLREND ,Clear End bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLRRQ ,Clear Request bit" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " SWRST ,Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " STG ,Software Trigger" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLREN ,Clear Enable" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " SETEN ,Set Enable" "No effect,Enabled"
|
|
line.long 0x04 "CHCFG_2,Channel Configuration Register 2"
|
|
bitfld.long 0x04 31. " DMS ,DMA Mode Select" "Register,Link"
|
|
bitfld.long 0x04 30. " REN ,Register Set Enable" "Not continued,Continued"
|
|
bitfld.long 0x04 29. " RSW ,Register Select Switch" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RSEL ,Register Set Select" "Next0,Next1"
|
|
bitfld.long 0x04 27. " SBE ,Sweep Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " DEM ,DMA Transfer End Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TM ,Transfer Mode" "Single,Block"
|
|
bitfld.long 0x04 21. " DAD ,Destination address counting direction" "Increment,Fixed"
|
|
bitfld.long 0x04 20. " SAD ,Source address counting direction" "Increment,Fixed"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " DDS ,Destination Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 12.--15. " SDS ,Source Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 8.--10. " AM ,ACK Mode" "Initial value,Level,Bus cycle,Bus cycle,No output,No output,No output,No output"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LVL ,Level" "Edge,Level"
|
|
bitfld.long 0x04 5. " HIEN ,High Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " LOEN ,Low Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " REQD ,Request Direction" "Source,Destination"
|
|
bitfld.long 0x04 0.--2. " SEL ,DMAC channel set" "CH0/CH8,CH1/CH9,CH2/CH10,CH3/CH11,CH4/CH12,CH5/CH13,CH6/CH14,CH7/CH15"
|
|
line.long 0x08 "CHITVL_2,Channel Interval Register 2"
|
|
hexmask.long.word 0x08 0.--15. 1. " ITVL ,Channel transfer interval"
|
|
line.long 0x0C "CHEXT_2,Channel Extension Register 2"
|
|
bitfld.long 0x0C 12.--15. " DCA ,Destination CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 4.--7. " SCA ,Source CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "NXLA_2,Next Link Address Register 2"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x00 "CRLA_2,Current Link Address Register 2"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 3"
|
|
base ad:0xE82000C0
|
|
width 10.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "N0SA_3,Next0 Source Address Register 3"
|
|
line.long 0x04 "N0DA_3,Next0 Destination Address Register 3"
|
|
line.long 0x08 "N0TB_3,Next0 Transaction Byte Register 3"
|
|
group.long 0x0C++0xB
|
|
line.long 0x00 "N1SA_3,Next1 Source Address Register 3"
|
|
line.long 0x04 "N1DA_3,Next1 Destination Address Register 3"
|
|
line.long 0x08 "N1TB_3,Next1 Transaction Byte Register 3"
|
|
rgroup.long 0x18++0xB
|
|
line.long 0x00 "CRSA_3,Current Source Address Register 3"
|
|
line.long 0x04 "CRDA_3,Current Destination Address Register 3"
|
|
line.long 0x08 "CRTB_3,Current Transaction Byte Register 3"
|
|
if (((per.l(ad:0xE82000C0+0x24))&0x10)==0x10)
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_3,Channel Status Register 3"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Error"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Error"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_3,Channel Status Register 3"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "CHCTRL_3,Channel Control Register 3"
|
|
bitfld.long 0x00 17. " CLRINTMSK ,DMA transfer end interrupt mask clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " SETINTMSK ,DMA transfer end interrupt mask set" "No effect,Masked"
|
|
bitfld.long 0x00 9. " CLRSUS ,Clear Suspend" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SETSUS ,Set Suspend" "No effect,Suspended"
|
|
bitfld.long 0x00 6. " CLRTC ,Clear TC bit" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLREND ,Clear End bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLRRQ ,Clear Request bit" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " SWRST ,Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " STG ,Software Trigger" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLREN ,Clear Enable" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " SETEN ,Set Enable" "No effect,Enabled"
|
|
line.long 0x04 "CHCFG_3,Channel Configuration Register 3"
|
|
bitfld.long 0x04 31. " DMS ,DMA Mode Select" "Register,Link"
|
|
bitfld.long 0x04 30. " REN ,Register Set Enable" "Not continued,Continued"
|
|
bitfld.long 0x04 29. " RSW ,Register Select Switch" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RSEL ,Register Set Select" "Next0,Next1"
|
|
bitfld.long 0x04 27. " SBE ,Sweep Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " DEM ,DMA Transfer End Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TM ,Transfer Mode" "Single,Block"
|
|
bitfld.long 0x04 21. " DAD ,Destination address counting direction" "Increment,Fixed"
|
|
bitfld.long 0x04 20. " SAD ,Source address counting direction" "Increment,Fixed"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " DDS ,Destination Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 12.--15. " SDS ,Source Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 8.--10. " AM ,ACK Mode" "Initial value,Level,Bus cycle,Bus cycle,No output,No output,No output,No output"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LVL ,Level" "Edge,Level"
|
|
bitfld.long 0x04 5. " HIEN ,High Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " LOEN ,Low Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " REQD ,Request Direction" "Source,Destination"
|
|
bitfld.long 0x04 0.--2. " SEL ,DMAC channel set" "CH0/CH8,CH1/CH9,CH2/CH10,CH3/CH11,CH4/CH12,CH5/CH13,CH6/CH14,CH7/CH15"
|
|
line.long 0x08 "CHITVL_3,Channel Interval Register 3"
|
|
hexmask.long.word 0x08 0.--15. 1. " ITVL ,Channel transfer interval"
|
|
line.long 0x0C "CHEXT_3,Channel Extension Register 3"
|
|
bitfld.long 0x0C 12.--15. " DCA ,Destination CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 4.--7. " SCA ,Source CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "NXLA_3,Next Link Address Register 3"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x00 "CRLA_3,Current Link Address Register 3"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 4"
|
|
base ad:0xE8200100
|
|
width 10.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "N0SA_4,Next0 Source Address Register 4"
|
|
line.long 0x04 "N0DA_4,Next0 Destination Address Register 4"
|
|
line.long 0x08 "N0TB_4,Next0 Transaction Byte Register 4"
|
|
group.long 0x0C++0xB
|
|
line.long 0x00 "N1SA_4,Next1 Source Address Register 4"
|
|
line.long 0x04 "N1DA_4,Next1 Destination Address Register 4"
|
|
line.long 0x08 "N1TB_4,Next1 Transaction Byte Register 4"
|
|
rgroup.long 0x18++0xB
|
|
line.long 0x00 "CRSA_4,Current Source Address Register 4"
|
|
line.long 0x04 "CRDA_4,Current Destination Address Register 4"
|
|
line.long 0x08 "CRTB_4,Current Transaction Byte Register 4"
|
|
if (((per.l(ad:0xE8200100+0x24))&0x10)==0x10)
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_4,Channel Status Register 4"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Error"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Error"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_4,Channel Status Register 4"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "CHCTRL_4,Channel Control Register 4"
|
|
bitfld.long 0x00 17. " CLRINTMSK ,DMA transfer end interrupt mask clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " SETINTMSK ,DMA transfer end interrupt mask set" "No effect,Masked"
|
|
bitfld.long 0x00 9. " CLRSUS ,Clear Suspend" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SETSUS ,Set Suspend" "No effect,Suspended"
|
|
bitfld.long 0x00 6. " CLRTC ,Clear TC bit" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLREND ,Clear End bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLRRQ ,Clear Request bit" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " SWRST ,Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " STG ,Software Trigger" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLREN ,Clear Enable" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " SETEN ,Set Enable" "No effect,Enabled"
|
|
line.long 0x04 "CHCFG_4,Channel Configuration Register 4"
|
|
bitfld.long 0x04 31. " DMS ,DMA Mode Select" "Register,Link"
|
|
bitfld.long 0x04 30. " REN ,Register Set Enable" "Not continued,Continued"
|
|
bitfld.long 0x04 29. " RSW ,Register Select Switch" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RSEL ,Register Set Select" "Next0,Next1"
|
|
bitfld.long 0x04 27. " SBE ,Sweep Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " DEM ,DMA Transfer End Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TM ,Transfer Mode" "Single,Block"
|
|
bitfld.long 0x04 21. " DAD ,Destination address counting direction" "Increment,Fixed"
|
|
bitfld.long 0x04 20. " SAD ,Source address counting direction" "Increment,Fixed"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " DDS ,Destination Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 12.--15. " SDS ,Source Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 8.--10. " AM ,ACK Mode" "Initial value,Level,Bus cycle,Bus cycle,No output,No output,No output,No output"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LVL ,Level" "Edge,Level"
|
|
bitfld.long 0x04 5. " HIEN ,High Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " LOEN ,Low Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " REQD ,Request Direction" "Source,Destination"
|
|
bitfld.long 0x04 0.--2. " SEL ,DMAC channel set" "CH0/CH8,CH1/CH9,CH2/CH10,CH3/CH11,CH4/CH12,CH5/CH13,CH6/CH14,CH7/CH15"
|
|
line.long 0x08 "CHITVL_4,Channel Interval Register 4"
|
|
hexmask.long.word 0x08 0.--15. 1. " ITVL ,Channel transfer interval"
|
|
line.long 0x0C "CHEXT_4,Channel Extension Register 4"
|
|
bitfld.long 0x0C 12.--15. " DCA ,Destination CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 4.--7. " SCA ,Source CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "NXLA_4,Next Link Address Register 4"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x00 "CRLA_4,Current Link Address Register 4"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 5"
|
|
base ad:0xE8200140
|
|
width 10.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "N0SA_5,Next0 Source Address Register 5"
|
|
line.long 0x04 "N0DA_5,Next0 Destination Address Register 5"
|
|
line.long 0x08 "N0TB_5,Next0 Transaction Byte Register 5"
|
|
group.long 0x0C++0xB
|
|
line.long 0x00 "N1SA_5,Next1 Source Address Register 5"
|
|
line.long 0x04 "N1DA_5,Next1 Destination Address Register 5"
|
|
line.long 0x08 "N1TB_5,Next1 Transaction Byte Register 5"
|
|
rgroup.long 0x18++0xB
|
|
line.long 0x00 "CRSA_5,Current Source Address Register 5"
|
|
line.long 0x04 "CRDA_5,Current Destination Address Register 5"
|
|
line.long 0x08 "CRTB_5,Current Transaction Byte Register 5"
|
|
if (((per.l(ad:0xE8200140+0x24))&0x10)==0x10)
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_5,Channel Status Register 5"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Error"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Error"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_5,Channel Status Register 5"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "CHCTRL_5,Channel Control Register 5"
|
|
bitfld.long 0x00 17. " CLRINTMSK ,DMA transfer end interrupt mask clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " SETINTMSK ,DMA transfer end interrupt mask set" "No effect,Masked"
|
|
bitfld.long 0x00 9. " CLRSUS ,Clear Suspend" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SETSUS ,Set Suspend" "No effect,Suspended"
|
|
bitfld.long 0x00 6. " CLRTC ,Clear TC bit" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLREND ,Clear End bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLRRQ ,Clear Request bit" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " SWRST ,Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " STG ,Software Trigger" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLREN ,Clear Enable" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " SETEN ,Set Enable" "No effect,Enabled"
|
|
line.long 0x04 "CHCFG_5,Channel Configuration Register 5"
|
|
bitfld.long 0x04 31. " DMS ,DMA Mode Select" "Register,Link"
|
|
bitfld.long 0x04 30. " REN ,Register Set Enable" "Not continued,Continued"
|
|
bitfld.long 0x04 29. " RSW ,Register Select Switch" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RSEL ,Register Set Select" "Next0,Next1"
|
|
bitfld.long 0x04 27. " SBE ,Sweep Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " DEM ,DMA Transfer End Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TM ,Transfer Mode" "Single,Block"
|
|
bitfld.long 0x04 21. " DAD ,Destination address counting direction" "Increment,Fixed"
|
|
bitfld.long 0x04 20. " SAD ,Source address counting direction" "Increment,Fixed"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " DDS ,Destination Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 12.--15. " SDS ,Source Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 8.--10. " AM ,ACK Mode" "Initial value,Level,Bus cycle,Bus cycle,No output,No output,No output,No output"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LVL ,Level" "Edge,Level"
|
|
bitfld.long 0x04 5. " HIEN ,High Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " LOEN ,Low Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " REQD ,Request Direction" "Source,Destination"
|
|
bitfld.long 0x04 0.--2. " SEL ,DMAC channel set" "CH0/CH8,CH1/CH9,CH2/CH10,CH3/CH11,CH4/CH12,CH5/CH13,CH6/CH14,CH7/CH15"
|
|
line.long 0x08 "CHITVL_5,Channel Interval Register 5"
|
|
hexmask.long.word 0x08 0.--15. 1. " ITVL ,Channel transfer interval"
|
|
line.long 0x0C "CHEXT_5,Channel Extension Register 5"
|
|
bitfld.long 0x0C 12.--15. " DCA ,Destination CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 4.--7. " SCA ,Source CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "NXLA_5,Next Link Address Register 5"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x00 "CRLA_5,Current Link Address Register 5"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 6"
|
|
base ad:0xE8200180
|
|
width 10.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "N0SA_6,Next0 Source Address Register 6"
|
|
line.long 0x04 "N0DA_6,Next0 Destination Address Register 6"
|
|
line.long 0x08 "N0TB_6,Next0 Transaction Byte Register 6"
|
|
group.long 0x0C++0xB
|
|
line.long 0x00 "N1SA_6,Next1 Source Address Register 6"
|
|
line.long 0x04 "N1DA_6,Next1 Destination Address Register 6"
|
|
line.long 0x08 "N1TB_6,Next1 Transaction Byte Register 6"
|
|
rgroup.long 0x18++0xB
|
|
line.long 0x00 "CRSA_6,Current Source Address Register 6"
|
|
line.long 0x04 "CRDA_6,Current Destination Address Register 6"
|
|
line.long 0x08 "CRTB_6,Current Transaction Byte Register 6"
|
|
if (((per.l(ad:0xE8200180+0x24))&0x10)==0x10)
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_6,Channel Status Register 6"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Error"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Error"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_6,Channel Status Register 6"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "CHCTRL_6,Channel Control Register 6"
|
|
bitfld.long 0x00 17. " CLRINTMSK ,DMA transfer end interrupt mask clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " SETINTMSK ,DMA transfer end interrupt mask set" "No effect,Masked"
|
|
bitfld.long 0x00 9. " CLRSUS ,Clear Suspend" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SETSUS ,Set Suspend" "No effect,Suspended"
|
|
bitfld.long 0x00 6. " CLRTC ,Clear TC bit" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLREND ,Clear End bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLRRQ ,Clear Request bit" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " SWRST ,Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " STG ,Software Trigger" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLREN ,Clear Enable" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " SETEN ,Set Enable" "No effect,Enabled"
|
|
line.long 0x04 "CHCFG_6,Channel Configuration Register 6"
|
|
bitfld.long 0x04 31. " DMS ,DMA Mode Select" "Register,Link"
|
|
bitfld.long 0x04 30. " REN ,Register Set Enable" "Not continued,Continued"
|
|
bitfld.long 0x04 29. " RSW ,Register Select Switch" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RSEL ,Register Set Select" "Next0,Next1"
|
|
bitfld.long 0x04 27. " SBE ,Sweep Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " DEM ,DMA Transfer End Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TM ,Transfer Mode" "Single,Block"
|
|
bitfld.long 0x04 21. " DAD ,Destination address counting direction" "Increment,Fixed"
|
|
bitfld.long 0x04 20. " SAD ,Source address counting direction" "Increment,Fixed"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " DDS ,Destination Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 12.--15. " SDS ,Source Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 8.--10. " AM ,ACK Mode" "Initial value,Level,Bus cycle,Bus cycle,No output,No output,No output,No output"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LVL ,Level" "Edge,Level"
|
|
bitfld.long 0x04 5. " HIEN ,High Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " LOEN ,Low Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " REQD ,Request Direction" "Source,Destination"
|
|
bitfld.long 0x04 0.--2. " SEL ,DMAC channel set" "CH0/CH8,CH1/CH9,CH2/CH10,CH3/CH11,CH4/CH12,CH5/CH13,CH6/CH14,CH7/CH15"
|
|
line.long 0x08 "CHITVL_6,Channel Interval Register 6"
|
|
hexmask.long.word 0x08 0.--15. 1. " ITVL ,Channel transfer interval"
|
|
line.long 0x0C "CHEXT_6,Channel Extension Register 6"
|
|
bitfld.long 0x0C 12.--15. " DCA ,Destination CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 4.--7. " SCA ,Source CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "NXLA_6,Next Link Address Register 6"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x00 "CRLA_6,Current Link Address Register 6"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 7"
|
|
base ad:0xE82001C0
|
|
width 10.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "N0SA_7,Next0 Source Address Register 7"
|
|
line.long 0x04 "N0DA_7,Next0 Destination Address Register 7"
|
|
line.long 0x08 "N0TB_7,Next0 Transaction Byte Register 7"
|
|
group.long 0x0C++0xB
|
|
line.long 0x00 "N1SA_7,Next1 Source Address Register 7"
|
|
line.long 0x04 "N1DA_7,Next1 Destination Address Register 7"
|
|
line.long 0x08 "N1TB_7,Next1 Transaction Byte Register 7"
|
|
rgroup.long 0x18++0xB
|
|
line.long 0x00 "CRSA_7,Current Source Address Register 7"
|
|
line.long 0x04 "CRDA_7,Current Destination Address Register 7"
|
|
line.long 0x08 "CRTB_7,Current Transaction Byte Register 7"
|
|
if (((per.l(ad:0xE82001C0+0x24))&0x10)==0x10)
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_7,Channel Status Register 7"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Error"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Error"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_7,Channel Status Register 7"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "CHCTRL_7,Channel Control Register 7"
|
|
bitfld.long 0x00 17. " CLRINTMSK ,DMA transfer end interrupt mask clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " SETINTMSK ,DMA transfer end interrupt mask set" "No effect,Masked"
|
|
bitfld.long 0x00 9. " CLRSUS ,Clear Suspend" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SETSUS ,Set Suspend" "No effect,Suspended"
|
|
bitfld.long 0x00 6. " CLRTC ,Clear TC bit" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLREND ,Clear End bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLRRQ ,Clear Request bit" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " SWRST ,Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " STG ,Software Trigger" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLREN ,Clear Enable" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " SETEN ,Set Enable" "No effect,Enabled"
|
|
line.long 0x04 "CHCFG_7,Channel Configuration Register 7"
|
|
bitfld.long 0x04 31. " DMS ,DMA Mode Select" "Register,Link"
|
|
bitfld.long 0x04 30. " REN ,Register Set Enable" "Not continued,Continued"
|
|
bitfld.long 0x04 29. " RSW ,Register Select Switch" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RSEL ,Register Set Select" "Next0,Next1"
|
|
bitfld.long 0x04 27. " SBE ,Sweep Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " DEM ,DMA Transfer End Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TM ,Transfer Mode" "Single,Block"
|
|
bitfld.long 0x04 21. " DAD ,Destination address counting direction" "Increment,Fixed"
|
|
bitfld.long 0x04 20. " SAD ,Source address counting direction" "Increment,Fixed"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " DDS ,Destination Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 12.--15. " SDS ,Source Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 8.--10. " AM ,ACK Mode" "Initial value,Level,Bus cycle,Bus cycle,No output,No output,No output,No output"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LVL ,Level" "Edge,Level"
|
|
bitfld.long 0x04 5. " HIEN ,High Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " LOEN ,Low Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " REQD ,Request Direction" "Source,Destination"
|
|
bitfld.long 0x04 0.--2. " SEL ,DMAC channel set" "CH0/CH8,CH1/CH9,CH2/CH10,CH3/CH11,CH4/CH12,CH5/CH13,CH6/CH14,CH7/CH15"
|
|
line.long 0x08 "CHITVL_7,Channel Interval Register 7"
|
|
hexmask.long.word 0x08 0.--15. 1. " ITVL ,Channel transfer interval"
|
|
line.long 0x0C "CHEXT_7,Channel Extension Register 7"
|
|
bitfld.long 0x0C 12.--15. " DCA ,Destination CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 4.--7. " SCA ,Source CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "NXLA_7,Next Link Address Register 7"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x00 "CRLA_7,Current Link Address Register 7"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 8"
|
|
base ad:0xE8200400
|
|
width 10.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "N0SA_8,Next0 Source Address Register 8"
|
|
line.long 0x04 "N0DA_8,Next0 Destination Address Register 8"
|
|
line.long 0x08 "N0TB_8,Next0 Transaction Byte Register 8"
|
|
group.long 0x0C++0xB
|
|
line.long 0x00 "N1SA_8,Next1 Source Address Register 8"
|
|
line.long 0x04 "N1DA_8,Next1 Destination Address Register 8"
|
|
line.long 0x08 "N1TB_8,Next1 Transaction Byte Register 8"
|
|
rgroup.long 0x18++0xB
|
|
line.long 0x00 "CRSA_8,Current Source Address Register 8"
|
|
line.long 0x04 "CRDA_8,Current Destination Address Register 8"
|
|
line.long 0x08 "CRTB_8,Current Transaction Byte Register 8"
|
|
if (((per.l(ad:0xE8200400+0x24))&0x10)==0x10)
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_8,Channel Status Register 8"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Error"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Error"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_8,Channel Status Register 8"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "CHCTRL_8,Channel Control Register 8"
|
|
bitfld.long 0x00 17. " CLRINTMSK ,DMA transfer end interrupt mask clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " SETINTMSK ,DMA transfer end interrupt mask set" "No effect,Masked"
|
|
bitfld.long 0x00 9. " CLRSUS ,Clear Suspend" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SETSUS ,Set Suspend" "No effect,Suspended"
|
|
bitfld.long 0x00 6. " CLRTC ,Clear TC bit" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLREND ,Clear End bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLRRQ ,Clear Request bit" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " SWRST ,Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " STG ,Software Trigger" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLREN ,Clear Enable" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " SETEN ,Set Enable" "No effect,Enabled"
|
|
line.long 0x04 "CHCFG_8,Channel Configuration Register 8"
|
|
bitfld.long 0x04 31. " DMS ,DMA Mode Select" "Register,Link"
|
|
bitfld.long 0x04 30. " REN ,Register Set Enable" "Not continued,Continued"
|
|
bitfld.long 0x04 29. " RSW ,Register Select Switch" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RSEL ,Register Set Select" "Next0,Next1"
|
|
bitfld.long 0x04 27. " SBE ,Sweep Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " DEM ,DMA Transfer End Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TM ,Transfer Mode" "Single,Block"
|
|
bitfld.long 0x04 21. " DAD ,Destination address counting direction" "Increment,Fixed"
|
|
bitfld.long 0x04 20. " SAD ,Source address counting direction" "Increment,Fixed"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " DDS ,Destination Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 12.--15. " SDS ,Source Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 8.--10. " AM ,ACK Mode" "Initial value,Level,Bus cycle,Bus cycle,No output,No output,No output,No output"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LVL ,Level" "Edge,Level"
|
|
bitfld.long 0x04 5. " HIEN ,High Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " LOEN ,Low Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " REQD ,Request Direction" "Source,Destination"
|
|
bitfld.long 0x04 0.--2. " SEL ,DMAC channel set" "CH0/CH8,CH1/CH9,CH2/CH10,CH3/CH11,CH4/CH12,CH5/CH13,CH6/CH14,CH7/CH15"
|
|
line.long 0x08 "CHITVL_8,Channel Interval Register 8"
|
|
hexmask.long.word 0x08 0.--15. 1. " ITVL ,Channel transfer interval"
|
|
line.long 0x0C "CHEXT_8,Channel Extension Register 8"
|
|
bitfld.long 0x0C 12.--15. " DCA ,Destination CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 4.--7. " SCA ,Source CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "NXLA_8,Next Link Address Register 8"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x00 "CRLA_8,Current Link Address Register 8"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 9"
|
|
base ad:0xE8200440
|
|
width 10.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "N0SA_9,Next0 Source Address Register 9"
|
|
line.long 0x04 "N0DA_9,Next0 Destination Address Register 9"
|
|
line.long 0x08 "N0TB_9,Next0 Transaction Byte Register 9"
|
|
group.long 0x0C++0xB
|
|
line.long 0x00 "N1SA_9,Next1 Source Address Register 9"
|
|
line.long 0x04 "N1DA_9,Next1 Destination Address Register 9"
|
|
line.long 0x08 "N1TB_9,Next1 Transaction Byte Register 9"
|
|
rgroup.long 0x18++0xB
|
|
line.long 0x00 "CRSA_9,Current Source Address Register 9"
|
|
line.long 0x04 "CRDA_9,Current Destination Address Register 9"
|
|
line.long 0x08 "CRTB_9,Current Transaction Byte Register 9"
|
|
if (((per.l(ad:0xE8200440+0x24))&0x10)==0x10)
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_9,Channel Status Register 9"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Error"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Error"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_9,Channel Status Register 9"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "CHCTRL_9,Channel Control Register 9"
|
|
bitfld.long 0x00 17. " CLRINTMSK ,DMA transfer end interrupt mask clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " SETINTMSK ,DMA transfer end interrupt mask set" "No effect,Masked"
|
|
bitfld.long 0x00 9. " CLRSUS ,Clear Suspend" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SETSUS ,Set Suspend" "No effect,Suspended"
|
|
bitfld.long 0x00 6. " CLRTC ,Clear TC bit" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLREND ,Clear End bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLRRQ ,Clear Request bit" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " SWRST ,Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " STG ,Software Trigger" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLREN ,Clear Enable" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " SETEN ,Set Enable" "No effect,Enabled"
|
|
line.long 0x04 "CHCFG_9,Channel Configuration Register 9"
|
|
bitfld.long 0x04 31. " DMS ,DMA Mode Select" "Register,Link"
|
|
bitfld.long 0x04 30. " REN ,Register Set Enable" "Not continued,Continued"
|
|
bitfld.long 0x04 29. " RSW ,Register Select Switch" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RSEL ,Register Set Select" "Next0,Next1"
|
|
bitfld.long 0x04 27. " SBE ,Sweep Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " DEM ,DMA Transfer End Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TM ,Transfer Mode" "Single,Block"
|
|
bitfld.long 0x04 21. " DAD ,Destination address counting direction" "Increment,Fixed"
|
|
bitfld.long 0x04 20. " SAD ,Source address counting direction" "Increment,Fixed"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " DDS ,Destination Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 12.--15. " SDS ,Source Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 8.--10. " AM ,ACK Mode" "Initial value,Level,Bus cycle,Bus cycle,No output,No output,No output,No output"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LVL ,Level" "Edge,Level"
|
|
bitfld.long 0x04 5. " HIEN ,High Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " LOEN ,Low Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " REQD ,Request Direction" "Source,Destination"
|
|
bitfld.long 0x04 0.--2. " SEL ,DMAC channel set" "CH0/CH8,CH1/CH9,CH2/CH10,CH3/CH11,CH4/CH12,CH5/CH13,CH6/CH14,CH7/CH15"
|
|
line.long 0x08 "CHITVL_9,Channel Interval Register 9"
|
|
hexmask.long.word 0x08 0.--15. 1. " ITVL ,Channel transfer interval"
|
|
line.long 0x0C "CHEXT_9,Channel Extension Register 9"
|
|
bitfld.long 0x0C 12.--15. " DCA ,Destination CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 4.--7. " SCA ,Source CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "NXLA_9,Next Link Address Register 9"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x00 "CRLA_9,Current Link Address Register 9"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 10"
|
|
base ad:0xE8200480
|
|
width 10.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "N0SA_10,Next0 Source Address Register 10"
|
|
line.long 0x04 "N0DA_10,Next0 Destination Address Register 10"
|
|
line.long 0x08 "N0TB_10,Next0 Transaction Byte Register 10"
|
|
group.long 0x0C++0xB
|
|
line.long 0x00 "N1SA_10,Next1 Source Address Register 10"
|
|
line.long 0x04 "N1DA_10,Next1 Destination Address Register 10"
|
|
line.long 0x08 "N1TB_10,Next1 Transaction Byte Register 10"
|
|
rgroup.long 0x18++0xB
|
|
line.long 0x00 "CRSA_10,Current Source Address Register 10"
|
|
line.long 0x04 "CRDA_10,Current Destination Address Register 10"
|
|
line.long 0x08 "CRTB_10,Current Transaction Byte Register 10"
|
|
if (((per.l(ad:0xE8200480+0x24))&0x10)==0x10)
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_10,Channel Status Register 10"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Error"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Error"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_10,Channel Status Register 10"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "CHCTRL_10,Channel Control Register 10"
|
|
bitfld.long 0x00 17. " CLRINTMSK ,DMA transfer end interrupt mask clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " SETINTMSK ,DMA transfer end interrupt mask set" "No effect,Masked"
|
|
bitfld.long 0x00 9. " CLRSUS ,Clear Suspend" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SETSUS ,Set Suspend" "No effect,Suspended"
|
|
bitfld.long 0x00 6. " CLRTC ,Clear TC bit" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLREND ,Clear End bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLRRQ ,Clear Request bit" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " SWRST ,Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " STG ,Software Trigger" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLREN ,Clear Enable" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " SETEN ,Set Enable" "No effect,Enabled"
|
|
line.long 0x04 "CHCFG_10,Channel Configuration Register 10"
|
|
bitfld.long 0x04 31. " DMS ,DMA Mode Select" "Register,Link"
|
|
bitfld.long 0x04 30. " REN ,Register Set Enable" "Not continued,Continued"
|
|
bitfld.long 0x04 29. " RSW ,Register Select Switch" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RSEL ,Register Set Select" "Next0,Next1"
|
|
bitfld.long 0x04 27. " SBE ,Sweep Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " DEM ,DMA Transfer End Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TM ,Transfer Mode" "Single,Block"
|
|
bitfld.long 0x04 21. " DAD ,Destination address counting direction" "Increment,Fixed"
|
|
bitfld.long 0x04 20. " SAD ,Source address counting direction" "Increment,Fixed"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " DDS ,Destination Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 12.--15. " SDS ,Source Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 8.--10. " AM ,ACK Mode" "Initial value,Level,Bus cycle,Bus cycle,No output,No output,No output,No output"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LVL ,Level" "Edge,Level"
|
|
bitfld.long 0x04 5. " HIEN ,High Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " LOEN ,Low Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " REQD ,Request Direction" "Source,Destination"
|
|
bitfld.long 0x04 0.--2. " SEL ,DMAC channel set" "CH0/CH8,CH1/CH9,CH2/CH10,CH3/CH11,CH4/CH12,CH5/CH13,CH6/CH14,CH7/CH15"
|
|
line.long 0x08 "CHITVL_10,Channel Interval Register 10"
|
|
hexmask.long.word 0x08 0.--15. 1. " ITVL ,Channel transfer interval"
|
|
line.long 0x0C "CHEXT_10,Channel Extension Register 10"
|
|
bitfld.long 0x0C 12.--15. " DCA ,Destination CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 4.--7. " SCA ,Source CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "NXLA_10,Next Link Address Register 10"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x00 "CRLA_10,Current Link Address Register 10"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 11"
|
|
base ad:0xE82004C0
|
|
width 10.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "N0SA_11,Next0 Source Address Register 11"
|
|
line.long 0x04 "N0DA_11,Next0 Destination Address Register 11"
|
|
line.long 0x08 "N0TB_11,Next0 Transaction Byte Register 11"
|
|
group.long 0x0C++0xB
|
|
line.long 0x00 "N1SA_11,Next1 Source Address Register 11"
|
|
line.long 0x04 "N1DA_11,Next1 Destination Address Register 11"
|
|
line.long 0x08 "N1TB_11,Next1 Transaction Byte Register 11"
|
|
rgroup.long 0x18++0xB
|
|
line.long 0x00 "CRSA_11,Current Source Address Register 11"
|
|
line.long 0x04 "CRDA_11,Current Destination Address Register 11"
|
|
line.long 0x08 "CRTB_11,Current Transaction Byte Register 11"
|
|
if (((per.l(ad:0xE82004C0+0x24))&0x10)==0x10)
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_11,Channel Status Register 11"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Error"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Error"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_11,Channel Status Register 11"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "CHCTRL_11,Channel Control Register 11"
|
|
bitfld.long 0x00 17. " CLRINTMSK ,DMA transfer end interrupt mask clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " SETINTMSK ,DMA transfer end interrupt mask set" "No effect,Masked"
|
|
bitfld.long 0x00 9. " CLRSUS ,Clear Suspend" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SETSUS ,Set Suspend" "No effect,Suspended"
|
|
bitfld.long 0x00 6. " CLRTC ,Clear TC bit" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLREND ,Clear End bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLRRQ ,Clear Request bit" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " SWRST ,Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " STG ,Software Trigger" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLREN ,Clear Enable" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " SETEN ,Set Enable" "No effect,Enabled"
|
|
line.long 0x04 "CHCFG_11,Channel Configuration Register 11"
|
|
bitfld.long 0x04 31. " DMS ,DMA Mode Select" "Register,Link"
|
|
bitfld.long 0x04 30. " REN ,Register Set Enable" "Not continued,Continued"
|
|
bitfld.long 0x04 29. " RSW ,Register Select Switch" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RSEL ,Register Set Select" "Next0,Next1"
|
|
bitfld.long 0x04 27. " SBE ,Sweep Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " DEM ,DMA Transfer End Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TM ,Transfer Mode" "Single,Block"
|
|
bitfld.long 0x04 21. " DAD ,Destination address counting direction" "Increment,Fixed"
|
|
bitfld.long 0x04 20. " SAD ,Source address counting direction" "Increment,Fixed"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " DDS ,Destination Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 12.--15. " SDS ,Source Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 8.--10. " AM ,ACK Mode" "Initial value,Level,Bus cycle,Bus cycle,No output,No output,No output,No output"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LVL ,Level" "Edge,Level"
|
|
bitfld.long 0x04 5. " HIEN ,High Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " LOEN ,Low Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " REQD ,Request Direction" "Source,Destination"
|
|
bitfld.long 0x04 0.--2. " SEL ,DMAC channel set" "CH0/CH8,CH1/CH9,CH2/CH10,CH3/CH11,CH4/CH12,CH5/CH13,CH6/CH14,CH7/CH15"
|
|
line.long 0x08 "CHITVL_11,Channel Interval Register 11"
|
|
hexmask.long.word 0x08 0.--15. 1. " ITVL ,Channel transfer interval"
|
|
line.long 0x0C "CHEXT_11,Channel Extension Register 11"
|
|
bitfld.long 0x0C 12.--15. " DCA ,Destination CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 4.--7. " SCA ,Source CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "NXLA_11,Next Link Address Register 11"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x00 "CRLA_11,Current Link Address Register 11"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 12"
|
|
base ad:0xE8200500
|
|
width 10.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "N0SA_12,Next0 Source Address Register 12"
|
|
line.long 0x04 "N0DA_12,Next0 Destination Address Register 12"
|
|
line.long 0x08 "N0TB_12,Next0 Transaction Byte Register 12"
|
|
group.long 0x0C++0xB
|
|
line.long 0x00 "N1SA_12,Next1 Source Address Register 12"
|
|
line.long 0x04 "N1DA_12,Next1 Destination Address Register 12"
|
|
line.long 0x08 "N1TB_12,Next1 Transaction Byte Register 12"
|
|
rgroup.long 0x18++0xB
|
|
line.long 0x00 "CRSA_12,Current Source Address Register 12"
|
|
line.long 0x04 "CRDA_12,Current Destination Address Register 12"
|
|
line.long 0x08 "CRTB_12,Current Transaction Byte Register 12"
|
|
if (((per.l(ad:0xE8200500+0x24))&0x10)==0x10)
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_12,Channel Status Register 12"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Error"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Error"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_12,Channel Status Register 12"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "CHCTRL_12,Channel Control Register 12"
|
|
bitfld.long 0x00 17. " CLRINTMSK ,DMA transfer end interrupt mask clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " SETINTMSK ,DMA transfer end interrupt mask set" "No effect,Masked"
|
|
bitfld.long 0x00 9. " CLRSUS ,Clear Suspend" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SETSUS ,Set Suspend" "No effect,Suspended"
|
|
bitfld.long 0x00 6. " CLRTC ,Clear TC bit" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLREND ,Clear End bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLRRQ ,Clear Request bit" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " SWRST ,Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " STG ,Software Trigger" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLREN ,Clear Enable" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " SETEN ,Set Enable" "No effect,Enabled"
|
|
line.long 0x04 "CHCFG_12,Channel Configuration Register 12"
|
|
bitfld.long 0x04 31. " DMS ,DMA Mode Select" "Register,Link"
|
|
bitfld.long 0x04 30. " REN ,Register Set Enable" "Not continued,Continued"
|
|
bitfld.long 0x04 29. " RSW ,Register Select Switch" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RSEL ,Register Set Select" "Next0,Next1"
|
|
bitfld.long 0x04 27. " SBE ,Sweep Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " DEM ,DMA Transfer End Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TM ,Transfer Mode" "Single,Block"
|
|
bitfld.long 0x04 21. " DAD ,Destination address counting direction" "Increment,Fixed"
|
|
bitfld.long 0x04 20. " SAD ,Source address counting direction" "Increment,Fixed"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " DDS ,Destination Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 12.--15. " SDS ,Source Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 8.--10. " AM ,ACK Mode" "Initial value,Level,Bus cycle,Bus cycle,No output,No output,No output,No output"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LVL ,Level" "Edge,Level"
|
|
bitfld.long 0x04 5. " HIEN ,High Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " LOEN ,Low Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " REQD ,Request Direction" "Source,Destination"
|
|
bitfld.long 0x04 0.--2. " SEL ,DMAC channel set" "CH0/CH8,CH1/CH9,CH2/CH10,CH3/CH11,CH4/CH12,CH5/CH13,CH6/CH14,CH7/CH15"
|
|
line.long 0x08 "CHITVL_12,Channel Interval Register 12"
|
|
hexmask.long.word 0x08 0.--15. 1. " ITVL ,Channel transfer interval"
|
|
line.long 0x0C "CHEXT_12,Channel Extension Register 12"
|
|
bitfld.long 0x0C 12.--15. " DCA ,Destination CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 4.--7. " SCA ,Source CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "NXLA_12,Next Link Address Register 12"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x00 "CRLA_12,Current Link Address Register 12"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 13"
|
|
base ad:0xE8200540
|
|
width 10.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "N0SA_13,Next0 Source Address Register 13"
|
|
line.long 0x04 "N0DA_13,Next0 Destination Address Register 13"
|
|
line.long 0x08 "N0TB_13,Next0 Transaction Byte Register 13"
|
|
group.long 0x0C++0xB
|
|
line.long 0x00 "N1SA_13,Next1 Source Address Register 13"
|
|
line.long 0x04 "N1DA_13,Next1 Destination Address Register 13"
|
|
line.long 0x08 "N1TB_13,Next1 Transaction Byte Register 13"
|
|
rgroup.long 0x18++0xB
|
|
line.long 0x00 "CRSA_13,Current Source Address Register 13"
|
|
line.long 0x04 "CRDA_13,Current Destination Address Register 13"
|
|
line.long 0x08 "CRTB_13,Current Transaction Byte Register 13"
|
|
if (((per.l(ad:0xE8200540+0x24))&0x10)==0x10)
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_13,Channel Status Register 13"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Error"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Error"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_13,Channel Status Register 13"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "CHCTRL_13,Channel Control Register 13"
|
|
bitfld.long 0x00 17. " CLRINTMSK ,DMA transfer end interrupt mask clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " SETINTMSK ,DMA transfer end interrupt mask set" "No effect,Masked"
|
|
bitfld.long 0x00 9. " CLRSUS ,Clear Suspend" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SETSUS ,Set Suspend" "No effect,Suspended"
|
|
bitfld.long 0x00 6. " CLRTC ,Clear TC bit" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLREND ,Clear End bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLRRQ ,Clear Request bit" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " SWRST ,Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " STG ,Software Trigger" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLREN ,Clear Enable" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " SETEN ,Set Enable" "No effect,Enabled"
|
|
line.long 0x04 "CHCFG_13,Channel Configuration Register 13"
|
|
bitfld.long 0x04 31. " DMS ,DMA Mode Select" "Register,Link"
|
|
bitfld.long 0x04 30. " REN ,Register Set Enable" "Not continued,Continued"
|
|
bitfld.long 0x04 29. " RSW ,Register Select Switch" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RSEL ,Register Set Select" "Next0,Next1"
|
|
bitfld.long 0x04 27. " SBE ,Sweep Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " DEM ,DMA Transfer End Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TM ,Transfer Mode" "Single,Block"
|
|
bitfld.long 0x04 21. " DAD ,Destination address counting direction" "Increment,Fixed"
|
|
bitfld.long 0x04 20. " SAD ,Source address counting direction" "Increment,Fixed"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " DDS ,Destination Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 12.--15. " SDS ,Source Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 8.--10. " AM ,ACK Mode" "Initial value,Level,Bus cycle,Bus cycle,No output,No output,No output,No output"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LVL ,Level" "Edge,Level"
|
|
bitfld.long 0x04 5. " HIEN ,High Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " LOEN ,Low Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " REQD ,Request Direction" "Source,Destination"
|
|
bitfld.long 0x04 0.--2. " SEL ,DMAC channel set" "CH0/CH8,CH1/CH9,CH2/CH10,CH3/CH11,CH4/CH12,CH5/CH13,CH6/CH14,CH7/CH15"
|
|
line.long 0x08 "CHITVL_13,Channel Interval Register 13"
|
|
hexmask.long.word 0x08 0.--15. 1. " ITVL ,Channel transfer interval"
|
|
line.long 0x0C "CHEXT_13,Channel Extension Register 13"
|
|
bitfld.long 0x0C 12.--15. " DCA ,Destination CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 4.--7. " SCA ,Source CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "NXLA_13,Next Link Address Register 13"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x00 "CRLA_13,Current Link Address Register 13"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 14"
|
|
base ad:0xE8200580
|
|
width 10.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "N0SA_14,Next0 Source Address Register 14"
|
|
line.long 0x04 "N0DA_14,Next0 Destination Address Register 14"
|
|
line.long 0x08 "N0TB_14,Next0 Transaction Byte Register 14"
|
|
group.long 0x0C++0xB
|
|
line.long 0x00 "N1SA_14,Next1 Source Address Register 14"
|
|
line.long 0x04 "N1DA_14,Next1 Destination Address Register 14"
|
|
line.long 0x08 "N1TB_14,Next1 Transaction Byte Register 14"
|
|
rgroup.long 0x18++0xB
|
|
line.long 0x00 "CRSA_14,Current Source Address Register 14"
|
|
line.long 0x04 "CRDA_14,Current Destination Address Register 14"
|
|
line.long 0x08 "CRTB_14,Current Transaction Byte Register 14"
|
|
if (((per.l(ad:0xE8200580+0x24))&0x10)==0x10)
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_14,Channel Status Register 14"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Error"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Error"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_14,Channel Status Register 14"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "CHCTRL_14,Channel Control Register 14"
|
|
bitfld.long 0x00 17. " CLRINTMSK ,DMA transfer end interrupt mask clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " SETINTMSK ,DMA transfer end interrupt mask set" "No effect,Masked"
|
|
bitfld.long 0x00 9. " CLRSUS ,Clear Suspend" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SETSUS ,Set Suspend" "No effect,Suspended"
|
|
bitfld.long 0x00 6. " CLRTC ,Clear TC bit" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLREND ,Clear End bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLRRQ ,Clear Request bit" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " SWRST ,Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " STG ,Software Trigger" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLREN ,Clear Enable" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " SETEN ,Set Enable" "No effect,Enabled"
|
|
line.long 0x04 "CHCFG_14,Channel Configuration Register 14"
|
|
bitfld.long 0x04 31. " DMS ,DMA Mode Select" "Register,Link"
|
|
bitfld.long 0x04 30. " REN ,Register Set Enable" "Not continued,Continued"
|
|
bitfld.long 0x04 29. " RSW ,Register Select Switch" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RSEL ,Register Set Select" "Next0,Next1"
|
|
bitfld.long 0x04 27. " SBE ,Sweep Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " DEM ,DMA Transfer End Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TM ,Transfer Mode" "Single,Block"
|
|
bitfld.long 0x04 21. " DAD ,Destination address counting direction" "Increment,Fixed"
|
|
bitfld.long 0x04 20. " SAD ,Source address counting direction" "Increment,Fixed"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " DDS ,Destination Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 12.--15. " SDS ,Source Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 8.--10. " AM ,ACK Mode" "Initial value,Level,Bus cycle,Bus cycle,No output,No output,No output,No output"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LVL ,Level" "Edge,Level"
|
|
bitfld.long 0x04 5. " HIEN ,High Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " LOEN ,Low Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " REQD ,Request Direction" "Source,Destination"
|
|
bitfld.long 0x04 0.--2. " SEL ,DMAC channel set" "CH0/CH8,CH1/CH9,CH2/CH10,CH3/CH11,CH4/CH12,CH5/CH13,CH6/CH14,CH7/CH15"
|
|
line.long 0x08 "CHITVL_14,Channel Interval Register 14"
|
|
hexmask.long.word 0x08 0.--15. 1. " ITVL ,Channel transfer interval"
|
|
line.long 0x0C "CHEXT_14,Channel Extension Register 14"
|
|
bitfld.long 0x0C 12.--15. " DCA ,Destination CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 4.--7. " SCA ,Source CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "NXLA_14,Next Link Address Register 14"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x00 "CRLA_14,Current Link Address Register 14"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 15"
|
|
base ad:0xE82005C0
|
|
width 10.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "N0SA_15,Next0 Source Address Register 15"
|
|
line.long 0x04 "N0DA_15,Next0 Destination Address Register 15"
|
|
line.long 0x08 "N0TB_15,Next0 Transaction Byte Register 15"
|
|
group.long 0x0C++0xB
|
|
line.long 0x00 "N1SA_15,Next1 Source Address Register 15"
|
|
line.long 0x04 "N1DA_15,Next1 Destination Address Register 15"
|
|
line.long 0x08 "N1TB_15,Next1 Transaction Byte Register 15"
|
|
rgroup.long 0x18++0xB
|
|
line.long 0x00 "CRSA_15,Current Source Address Register 15"
|
|
line.long 0x04 "CRDA_15,Current Destination Address Register 15"
|
|
line.long 0x08 "CRTB_15,Current Transaction Byte Register 15"
|
|
if (((per.l(ad:0xE82005C0+0x24))&0x10)==0x10)
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_15,Channel Status Register 15"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Error"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Error"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHSTAT_15,Channel Status Register 15"
|
|
bitfld.long 0x00 16. " INTMSK ,DMA transfer end interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " MODE ,DMA Mode" "Register,Link"
|
|
bitfld.long 0x00 10. " DER ,Descriptor Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DW ,Descriptor WriteBack" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DL ,Descriptor Load" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " SR ,Selected Register Set" "Next0,Next1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Terminal Count" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " END ,DMAEND Interrupted" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " ER ,Error bit" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SUS ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 2. " TACT ,Transaction Active" "Not activated,Activated"
|
|
bitfld.long 0x00 1. " RQST ,Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x28++0x13
|
|
line.long 0x00 "CHCTRL_15,Channel Control Register 15"
|
|
bitfld.long 0x00 17. " CLRINTMSK ,DMA transfer end interrupt mask clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " SETINTMSK ,DMA transfer end interrupt mask set" "No effect,Masked"
|
|
bitfld.long 0x00 9. " CLRSUS ,Clear Suspend" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SETSUS ,Set Suspend" "No effect,Suspended"
|
|
bitfld.long 0x00 6. " CLRTC ,Clear TC bit" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLREND ,Clear End bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLRRQ ,Clear Request bit" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " SWRST ,Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " STG ,Software Trigger" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLREN ,Clear Enable" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " SETEN ,Set Enable" "No effect,Enabled"
|
|
line.long 0x04 "CHCFG_15,Channel Configuration Register 15"
|
|
bitfld.long 0x04 31. " DMS ,DMA Mode Select" "Register,Link"
|
|
bitfld.long 0x04 30. " REN ,Register Set Enable" "Not continued,Continued"
|
|
bitfld.long 0x04 29. " RSW ,Register Select Switch" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RSEL ,Register Set Select" "Next0,Next1"
|
|
bitfld.long 0x04 27. " SBE ,Sweep Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " DEM ,DMA Transfer End Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TM ,Transfer Mode" "Single,Block"
|
|
bitfld.long 0x04 21. " DAD ,Destination address counting direction" "Increment,Fixed"
|
|
bitfld.long 0x04 20. " SAD ,Source address counting direction" "Increment,Fixed"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " DDS ,Destination Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 12.--15. " SDS ,Source Data Size" "8 bits,16 bits,32 bits,64 bits,128 bits,256 bits,512 bits,1024 bits,,,,,,,,"
|
|
bitfld.long 0x04 8.--10. " AM ,ACK Mode" "Initial value,Level,Bus cycle,Bus cycle,No output,No output,No output,No output"
|
|
textline " "
|
|
bitfld.long 0x04 6. " LVL ,Level" "Edge,Level"
|
|
bitfld.long 0x04 5. " HIEN ,High Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " LOEN ,Low Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " REQD ,Request Direction" "Source,Destination"
|
|
bitfld.long 0x04 0.--2. " SEL ,DMAC channel set" "CH0/CH8,CH1/CH9,CH2/CH10,CH3/CH11,CH4/CH12,CH5/CH13,CH6/CH14,CH7/CH15"
|
|
line.long 0x08 "CHITVL_15,Channel Interval Register 15"
|
|
hexmask.long.word 0x08 0.--15. 1. " ITVL ,Channel transfer interval"
|
|
line.long 0x0C "CHEXT_15,Channel Extension Register 15"
|
|
bitfld.long 0x0C 12.--15. " DCA ,Destination CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 4.--7. " SCA ,Source CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "NXLA_15,Next Link Address Register 15"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x00 "CRLA_15,Current Link Address Register 15"
|
|
width 0xB
|
|
tree.end
|
|
tree "Common Registers"
|
|
base ad:0xE8200000
|
|
width 15.
|
|
tree "Channels from 0 to 7"
|
|
group.long 0x300++0x3
|
|
line.long 0x00 "DCTRL_0_7,DMA Control Register for Channels 0-7"
|
|
bitfld.long 0x00 28.--31. " LWCA ,Link WriteBack CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " LDCA ,Link Descriptor CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " LVINT ,Level Output Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PR ,Priority Control Mode" "Fixed,Round robin"
|
|
rgroup.long 0x310++0x13
|
|
line.long 0x00 "DSTAT_EN_0_7,DMA Status EN Register for Channels 0-7"
|
|
bitfld.long 0x00 7. " EN7 ,EN bit status of channel 7" "Low,High"
|
|
bitfld.long 0x00 6. " EN6 ,EN bit status of channel 6" "Low,High"
|
|
bitfld.long 0x00 5. " EN5 ,EN bit status of channel 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EN4 ,EN bit status of channel 4" "Low,High"
|
|
bitfld.long 0x00 3. " EN3 ,EN bit status of channel 3" "Low,High"
|
|
bitfld.long 0x00 2. " EN2 ,EN bit status of channel 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EN1 ,EN bit status of channel 1" "Low,High"
|
|
bitfld.long 0x00 0. " EN0 ,EN bit status of channel 0" "Low,High"
|
|
line.long 0x04 "DSTAT_ER_0_7,DMA Status ER Register for Channels 0-7"
|
|
bitfld.long 0x04 7. " ER7 ,ER bit status of channel 7" "Low,High"
|
|
bitfld.long 0x04 6. " ER6 ,ER bit status of channel 6" "Low,High"
|
|
bitfld.long 0x04 5. " ER5 ,ER bit status of channel 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 4. " ER4 ,ER bit status of channel 4" "Low,High"
|
|
bitfld.long 0x04 3. " ER3 ,ER bit status of channel 3" "Low,High"
|
|
bitfld.long 0x04 2. " ER2 ,ER bit status of channel 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ER1 ,ER bit status of channel 1" "Low,High"
|
|
bitfld.long 0x04 0. " ER0 ,ER bit status of channel 0" "Low,High"
|
|
line.long 0x08 "DSTAT_END_0_7,DMA Status END Register for Channels 0-7"
|
|
bitfld.long 0x08 7. " END7 ,END bit status of channel 7" "Low,High"
|
|
bitfld.long 0x08 6. " END6 ,END bit status of channel 6" "Low,High"
|
|
bitfld.long 0x08 5. " END5 ,END bit status of channel 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4. " END4 ,END bit status of channel 4" "Low,High"
|
|
bitfld.long 0x08 3. " END3 ,END bit status of channel 3" "Low,High"
|
|
bitfld.long 0x08 2. " END2 ,END bit status of channel 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 1. " END1 ,END bit status of channel 1" "Low,High"
|
|
bitfld.long 0x08 0. " END0 ,END bit status of channel 0" "Low,High"
|
|
line.long 0x0C "DSTAT_TC_0_7,DMA Status TC Register for Channels 0-7"
|
|
bitfld.long 0x0C 7. " TC7 ,TC bit status of channel 7" "Low,High"
|
|
bitfld.long 0x0C 6. " TC6 ,TC bit status of channel 6" "Low,High"
|
|
bitfld.long 0x0C 5. " TC5 ,TC bit status of channel 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " TC4 ,TC bit status of channel 4" "Low,High"
|
|
bitfld.long 0x0C 3. " TC3 ,TC bit status of channel 3" "Low,High"
|
|
bitfld.long 0x0C 2. " TC2 ,TC bit status of channel 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " TC1 ,TC bit status of channel 1" "Low,High"
|
|
bitfld.long 0x0C 0. " TC0 ,TC bit status of channel 0" "Low,High"
|
|
line.long 0x10 "DSTAT_SUS_0_7,DMA Status SUS Register for Channels 0-7"
|
|
bitfld.long 0x10 7. " SUS7 ,SUS bit status of channel 7" "Low,High"
|
|
bitfld.long 0x10 6. " SUS6 ,SUS bit status of channel 6" "Low,High"
|
|
bitfld.long 0x10 5. " SUS5 ,SUS bit status of channel 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x10 4. " SUS4 ,SUS bit status of channel 4" "Low,High"
|
|
bitfld.long 0x10 3. " SUS3 ,SUS bit status of channel 3" "Low,High"
|
|
bitfld.long 0x10 2. " SUS2 ,SUS bit status of channel 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SUS1 ,SUS bit status of channel 1" "Low,High"
|
|
bitfld.long 0x10 0. " SUS0 ,SUS bit status of channel 0" "Low,High"
|
|
tree.end
|
|
tree "Channels from 8 to 15"
|
|
group.long 0x700++0x3
|
|
line.long 0x00 "DCTRL_8_15,DMA Control Register for Channels 8-15"
|
|
bitfld.long 0x00 28.--31. " LWCA ,Link WriteBack CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " LDCA ,Link Descriptor CACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " LVINT ,Level Output Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PR ,Priority Control Mode" "Fixed,Round robin"
|
|
rgroup.long 0x710++0x13
|
|
line.long 0x00 "DSTAT_EN_8_15,DMA Status EN Register for Channels 8-15"
|
|
bitfld.long 0x00 7. " EN15 ,EN bit status of channel 15" "Low,High"
|
|
bitfld.long 0x00 6. " EN14 ,EN bit status of channel 14" "Low,High"
|
|
bitfld.long 0x00 5. " EN13 ,EN bit status of channel 13" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EN12 ,EN bit status of channel 12" "Low,High"
|
|
bitfld.long 0x00 3. " EN11 ,EN bit status of channel 11" "Low,High"
|
|
bitfld.long 0x00 2. " EN10 ,EN bit status of channel 10" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EN9 ,EN bit status of channel 9" "Low,High"
|
|
bitfld.long 0x00 0. " EN8 ,EN bit status of channel 8" "Low,High"
|
|
line.long 0x04 "DSTAT_ER_8_15,DMA Status ER Register for Channels 8-15"
|
|
bitfld.long 0x04 7. " ER15 ,ER bit status of channel 15" "Low,High"
|
|
bitfld.long 0x04 6. " ER14 ,ER bit status of channel 14" "Low,High"
|
|
bitfld.long 0x04 5. " ER13 ,ER bit status of channel 13" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 4. " ER12 ,ER bit status of channel 12" "Low,High"
|
|
bitfld.long 0x04 3. " ER11 ,ER bit status of channel 11" "Low,High"
|
|
bitfld.long 0x04 2. " ER10 ,ER bit status of channel 10" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ER9 ,ER bit status of channel 9" "Low,High"
|
|
bitfld.long 0x04 0. " ER8 ,ER bit status of channel 8" "Low,High"
|
|
line.long 0x08 "DSTAT_END_8_15,DMA Status END Register for Channels 8-15"
|
|
bitfld.long 0x08 7. " END15 ,END bit status of channel 15" "Low,High"
|
|
bitfld.long 0x08 6. " END14 ,END bit status of channel 14" "Low,High"
|
|
bitfld.long 0x08 5. " END13 ,END bit status of channel 13" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 4. " END12 ,END bit status of channel 12" "Low,High"
|
|
bitfld.long 0x08 3. " END11 ,END bit status of channel 11" "Low,High"
|
|
bitfld.long 0x08 2. " END10 ,END bit status of channel 10" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 1. " END9 ,END bit status of channel 9" "Low,High"
|
|
bitfld.long 0x08 0. " END8 ,END bit status of channel 8 " "Low,High"
|
|
line.long 0x0C "DSTAT_TC_8_15,DMA Status TC Register for Channels 8-15"
|
|
bitfld.long 0x0C 7. " TC15 ,TC bit status of channel 15" "Low,High"
|
|
bitfld.long 0x0C 6. " TC14 ,TC bit status of channel 14" "Low,High"
|
|
bitfld.long 0x0C 5. " TC13 ,TC bit status of channel 13" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " TC12 ,TC bit status of channel 12" "Low,High"
|
|
bitfld.long 0x0C 3. " TC11 ,TC bit status of channel 11" "Low,High"
|
|
bitfld.long 0x0C 2. " TC10 ,TC bit status of channel 10" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " TC9 ,TC bit status of channel 9" "Low,High"
|
|
bitfld.long 0x0C 0. " TC8 ,TC bit status of channel 8" "Low,High"
|
|
line.long 0x10 "DSTAT_SUS_8_15,DMA Status SUS Register for Channels 8-15"
|
|
bitfld.long 0x10 7. " SUS15 ,SUS bit status of channel 15" "Low,High"
|
|
bitfld.long 0x10 6. " SUS14 ,SUS bit status of channel 14" "Low,High"
|
|
bitfld.long 0x10 5. " SUS13 ,SUS bit status of channel 13" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x10 4. " SUS12 ,SUS bit status of channel 12" "Low,High"
|
|
bitfld.long 0x10 3. " SUS11 ,SUS bit status of channel 11" "Low,High"
|
|
bitfld.long 0x10 2. " SUS10 ,SUS bit status of channel 10" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SUS9 ,SUS bit status of channel 9" "Low,High"
|
|
bitfld.long 0x10 0. " SUS8 ,SUS bit status of channel 8" "Low,High"
|
|
tree.end
|
|
width 8.
|
|
tree "DMA Extension Resource Selectors"
|
|
base ad:0xFCFE1000
|
|
group.long 0x00++0x1F
|
|
line.long 0x0 "DMARS0 ,DMA Extension Resource Selector 0 "
|
|
hexmask.long.byte 0x0 18.--24. 1. " CH1_MID ,Channel 1 MID"
|
|
bitfld.long 0x0 16.--17. " CH1_RID ,Channel 1 RID" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x0 2.--8. 1. " CH0_MID ,Channel 0 MID"
|
|
bitfld.long 0x0 0.--1. " CH0_RID ,Channel 0 RID" "0,1,2,3"
|
|
line.long 0x4 "DMARS1 ,DMA Extension Resource Selector 1 "
|
|
hexmask.long.byte 0x4 18.--24. 1. " CH3_MID ,Channel 3 MID"
|
|
bitfld.long 0x4 16.--17. " CH3_RID ,Channel 3 RID" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x4 2.--8. 1. " CH2_MID ,Channel 2 MID"
|
|
bitfld.long 0x4 0.--1. " CH2_RID ,Channel 2 RID" "0,1,2,3"
|
|
line.long 0x8 "DMARS2 ,DMA Extension Resource Selector 2 "
|
|
hexmask.long.byte 0x8 18.--24. 1. " CH5_MID ,Channel 5 MID"
|
|
bitfld.long 0x8 16.--17. " CH5_RID ,Channel 5 RID" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x8 2.--8. 1. " CH4_MID ,Channel 4 MID"
|
|
bitfld.long 0x8 0.--1. " CH4_RID ,Channel 4 RID" "0,1,2,3"
|
|
line.long 0xC "DMARS3 ,DMA Extension Resource Selector 3 "
|
|
hexmask.long.byte 0xC 18.--24. 1. " CH7_MID ,Channel 7 MID"
|
|
bitfld.long 0xC 16.--17. " CH7_RID ,Channel 7 RID" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0xC 2.--8. 1. " CH6_MID ,Channel 6 MID"
|
|
bitfld.long 0xC 0.--1. " CH6_RID ,Channel 6 RID" "0,1,2,3"
|
|
line.long 0x10 "DMARS4 ,DMA Extension Resource Selector 4 "
|
|
hexmask.long.byte 0x10 18.--24. 1. " CH9_MID ,Channel 9 MID"
|
|
bitfld.long 0x10 16.--17. " CH9_RID ,Channel 9 RID" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x10 2.--8. 1. " CH8_MID ,Channel 8 MID"
|
|
bitfld.long 0x10 0.--1. " CH8_RID ,Channel 8 RID" "0,1,2,3"
|
|
line.long 0x14 "DMARS5 ,DMA Extension Resource Selector 5 "
|
|
hexmask.long.byte 0x14 18.--24. 1. " CH11_MID ,Channel 11 MID"
|
|
bitfld.long 0x14 16.--17. " CH11_RID ,Channel 11 RID" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x14 2.--8. 1. " CH10_MID ,Channel 10 MID"
|
|
bitfld.long 0x14 0.--1. " CH10_RID ,Channel 10 RID" "0,1,2,3"
|
|
line.long 0x18 "DMARS6 ,DMA Extension Resource Selector 6 "
|
|
hexmask.long.byte 0x18 18.--24. 1. " CH13_MID ,Channel 13 MID"
|
|
bitfld.long 0x18 16.--17. " CH13_RID ,Channel 13 RID" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x18 2.--8. 1. " CH12_MID ,Channel 12 MID"
|
|
bitfld.long 0x18 0.--1. " CH12_RID ,Channel 12 RID" "0,1,2,3"
|
|
line.long 0x1C "DMARS7 ,DMA Extension Resource Selector 7 "
|
|
hexmask.long.byte 0x1C 18.--24. 1. " CH15_MID ,Channel 15 MID"
|
|
bitfld.long 0x1C 16.--17. " CH15_RID ,Channel 15 RID" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.byte 0x1C 2.--8. 1. " CH14_MID ,Channel 14 MID"
|
|
bitfld.long 0x1C 0.--1. " CH14_RID ,Channel 14 RID" "0,1,2,3"
|
|
tree.end
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree.open "Multi-Function Timer Pulse Unit 2"
|
|
tree "Channel 0"
|
|
base ad:0xFCFF0300
|
|
width 7.
|
|
group.byte 0x00++0x4
|
|
line.byte 0x00 "TCR,Timer Control Register"
|
|
bitfld.byte 0x00 5.--7. " CCLR ,Counter Clear" "Disabled,TGRA,TGRB,Counter clearing,Disabled,TGRC,TGRD,Counter clearing"
|
|
bitfld.byte 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both"
|
|
bitfld.byte 0x00 0.--2. " TPSC ,Time Prescaler" "P0f/1,P0f/4,P0f/16,P0f/64,TCLKA,TCLKB,TCLKC,TCLKD"
|
|
line.byte 0x01 "TMDR,Timer Mode Register"
|
|
bitfld.byte 0x01 6. " BFE ,Buffer Operation E" "Disabled,Enabled"
|
|
bitfld.byte 0x01 5. " BFB ,Buffer Operation B" "Disabled,Enabled"
|
|
bitfld.byte 0x01 4. " BFA ,Buffer Operation A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x01 0.--3. " MD ,Modes" "Normal,,PWM Mode 1,PWM Mode 2,,,,,,,,,,,,"
|
|
line.byte 0x02 "TIORH,Timer I/O Control Register H"
|
|
bitfld.byte 0x02 4.--7. " IOB ,I/O Control B" "Retained,0,1,Toggle,Retained,0,1,Toggle,Rising,Falling,Both,Both,Channel 1/count clock,Channel 1/count clock,Channel 1/count clock,Channel 1/count clock"
|
|
bitfld.byte 0x02 0.--3. " IOA ,I/O Control A" "Retained,0,1,Toggle,Retained,0,1,Toggle,Rising,Falling,Both,Both,Channel 1/count clock,Channel 1/count clock,Channel 1/count clock,Channel 1/count clock"
|
|
line.byte 0x03 "TIORL,Timer I/O Control Register L"
|
|
bitfld.byte 0x03 4.--7. " IOD ,I/O Control D" "Retained,0,1,Toggle,Retained,0,1,Toggle,Rising,Falling,Both,Both,Channel 1/count clock,Channel 1/count clock,Channel 1/count clock,Channel 1/count clock"
|
|
bitfld.byte 0x03 0.--3. " IOC ,I/O Control C" "Retained,0,1,Toggle,Retained,0,1,Toggle,Rising,Falling,Both,Both,Channel 1/count clock,Channel 1/count clock,Channel 1/count clock,Channel 1/count clock"
|
|
line.byte 0x04 "TIER,Timer Interrupt Enable Register"
|
|
bitfld.byte 0x04 7. " TTGE ,A/D Converter Start Request Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x04 6. " TTGE2 ,A/D Converter Start Request Enable 2" "Disabled,Enabled"
|
|
bitfld.byte 0x04 5. " TCIEU ,Underflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x04 4. " TCIEV ,Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x04 3. " TGIED ,TGR Interrupt Enable D" "Disabled,Enabled"
|
|
bitfld.byte 0x04 2. " TGIEC ,TGR Interrupt Enable C" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x04 1. " TGIEB ,TGR Interrupt Enable B" "Disabled,Enabled"
|
|
bitfld.byte 0x04 0. " TGIEA ,TGR Interrupt Enable A" "Disabled,Enabled"
|
|
group.byte 0x24++0x0
|
|
line.byte 0x00 "TIER2,Timer Interrupt Enable Register 2"
|
|
bitfld.byte 0x00 7. " TTGE2 ,A/D Converter Start Request Enable 2" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TGIEF ,TGR Interrupt Enable F" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " TGIEE ,TGR Interrupt Enable E" "Disabled,Enabled"
|
|
group.byte 0x05++0x0
|
|
line.byte 0x00 "TSR,Timer Status Register"
|
|
rbitfld.byte 0x00 7. " TCFD ,Count Direction Flag" "Down,Up"
|
|
bitfld.byte 0x00 5. " TCFU ,Underflow Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " TGFD ,Input Capture/Output Compare Flag D" "Low,High"
|
|
bitfld.byte 0x00 2. " TGFC ,Input Capture/Output Compare Flag C" "Low,High"
|
|
bitfld.byte 0x00 1. " TGFB ,Input Capture/Output Compare Flag B" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " TGFA ,Input Capture/Output Compare Flag A" "Low,High"
|
|
group.byte 0x25++0x0
|
|
line.byte 0x00 "TSR2,Timer Status Register 2"
|
|
bitfld.byte 0x00 1. " TGFF ,Compare Match Flag F" "Low,High"
|
|
bitfld.byte 0x00 0. " TGFE ,Compare Match Flag E" "Low,High"
|
|
group.byte 0x26++0x0
|
|
line.byte 0x00 "TBTM,Timer Buffer Operation Transfer Mode Register"
|
|
bitfld.byte 0x00 2. " TTSE ,Timing Select E" "Compare match occurred,TCNT_0 cleared"
|
|
bitfld.byte 0x00 1. " TTSB ,Timing Select B" "Compare match occurred,TCNT cleared"
|
|
bitfld.byte 0x00 0. " TTSA ,Timing Select A" "Compare match occurred,TCNT cleared"
|
|
group.word 0x06++0x1
|
|
line.word 0x00 "TCNT,Timer Counter"
|
|
group.word 0x08++0x7
|
|
line.word 0x00 "TGRA,Timer General Register A"
|
|
line.word 0x02 "TGRB,Timer General Register B"
|
|
line.word 0x04 "TGRC,Timer General Register C"
|
|
line.word 0x06 "TGRD,Timer General Register D"
|
|
group.word 0x20++0x3
|
|
line.word 0x00 "TGRE,Timer General Register E"
|
|
line.word 0x02 "TGRF,Timer General Register F"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0xFCFF0380
|
|
width 7.
|
|
group.byte 0x00++0x2
|
|
line.byte 0x00 "TCR,Timer Control Register"
|
|
bitfld.byte 0x00 5.--6. " CCLR ,Counter Clear" "Disabled,TGRA,TGRB,Counter clearing"
|
|
bitfld.byte 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both"
|
|
bitfld.byte 0x00 0.--2. " TPSC ,Time Prescaler" "P0f/1,P0f/4,P0f/16,P0f/64,TCLKA,TCLKB,P0f/256,TCNT_2"
|
|
line.byte 0x01 "TMDR,Timer Mode Register"
|
|
bitfld.byte 0x01 6. " BFE ,Buffer Operation E" "Disabled,Enabled"
|
|
bitfld.byte 0x01 5. " BFB ,Buffer Operation B" "Disabled,Enabled"
|
|
bitfld.byte 0x01 4. " BFA ,Buffer Operation A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x01 0.--3. " MD ,Modes" "Normal,,PWM Mode 1,PWM Mode 2,Phase counting 1,Phase counting 2,Phase counting 3,Phase counting 4,,,,,,,,"
|
|
line.byte 0x02 "TIOR,Timer I/O Control Register"
|
|
bitfld.byte 0x02 4.--7. " IOB ,I/O Control B" "Retained,0,1,Toggle,Retained,0,1,Toggle,Rising,Falling,Both,Both,TGRC_0,TGRC_0,TGRC_0,TGRC_0"
|
|
bitfld.byte 0x02 0.--3. " IOA ,I/O Control A" "Retained,0,1,Toggle,Retained,0,1,Toggle,Rising,Falling,Both,Both,Channel 0/TGRA_0,Channel 0/TGRA_0,Channel 0/TGRA_0,Channel 0/TGRA_0"
|
|
group.byte 0x04++0x1
|
|
line.byte 0x00 "TIER,Timer Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " TTGE ,A/D Converter Start Request Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " TTGE2 ,A/D Converter Start Request Enable 2" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " TCIEU ,Underflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " TCIEV ,Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " TGIED ,TGR Interrupt Enable D" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " TGIEC ,TGR Interrupt Enable C" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " TGIEB ,TGR Interrupt Enable B" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " TGIEA ,TGR Interrupt Enable A" "Disabled,Enabled"
|
|
line.byte 0x01 "TSR,Timer Status Register"
|
|
rbitfld.byte 0x01 7. " TCFD ,Count Direction Flag" "Down,Up"
|
|
bitfld.byte 0x01 5. " TCFU ,Underflow Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 4. " TCFV ,Overflow Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x01 3. " TGFD ,Input Capture/Output Compare Flag D" "Low,High"
|
|
bitfld.byte 0x01 2. " TGFC ,Input Capture/Output Compare Flag C" "Low,High"
|
|
bitfld.byte 0x01 1. " TGFB ,Input Capture/Output Compare Flag B" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x01 0. " TGFA ,Input Capture/Output Compare Flag A" "Low,High"
|
|
group.byte 0x10++0x0
|
|
line.byte 0x00 "TICCR,Timer Input Capture Control Register"
|
|
bitfld.byte 0x00 3. " I2BE ,Input Capture Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " I2AE ,Input Capture Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " I1BE ,Input Capture Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " I1AE ,Input Capture Enable" "Disabled,Enabled"
|
|
group.word 0x06++0x1
|
|
line.word 0x00 "TCNT,Timer Counter"
|
|
group.word 0x08++0x3
|
|
line.word 0x00 "TGRA,Timer General Register A"
|
|
line.word 0x02 "TGRB,Timer General Register B"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 2"
|
|
base ad:0xFCFF0000
|
|
width 6.
|
|
group.byte 0x00++0x2
|
|
line.byte 0x00 "TCR,Timer Control Register"
|
|
bitfld.byte 0x00 5.--6. " CCLR ,Counter Clear" "Disabled,TGRA,TGRB,Counter clearing"
|
|
bitfld.byte 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both"
|
|
bitfld.byte 0x00 0.--2. " TPSC ,Time Prescaler" "P0f/1,P0f/4,P0f/16,P0f/64,TCLKA,TCLKB,TCLKC,P0f/1024"
|
|
line.byte 0x01 "TMDR,Timer Mode Register"
|
|
bitfld.byte 0x01 6. " BFE ,Buffer Operation E" "Disabled,Enabled"
|
|
bitfld.byte 0x01 5. " BFB ,Buffer Operation B" "Disabled,Enabled"
|
|
bitfld.byte 0x01 4. " BFA ,Buffer Operation A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x01 0.--3. " MD ,Modes" "Normal,,PWM Mode 1,PWM Mode 2,Phase counting 1,Phase counting 2,Phase counting 3,Phase counting 4,,,,,,,,"
|
|
line.byte 0x02 "TIOR,Timer I/O Control Register"
|
|
bitfld.byte 0x02 4.--7. " IOB ,I/O Control B" "Retained,0,1,Toggle,Retained,0,1,Toggle,Rising,Falling,Both,Both,Rising,Falling,Both,Both"
|
|
bitfld.byte 0x02 0.--3. " IOA ,I/O Control A" "Retained,0,1,Toggle,Retained,0,1,Toggle,Rising,Falling,Both,Both,Rising,Falling,Both,Both"
|
|
group.byte 0x04++0x1
|
|
line.byte 0x00 "TIER,Timer Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " TTGE ,A/D Converter Start Request Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " TTGE2 ,A/D Converter Start Request Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " TCIEU ,Underflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " TCIEV ,Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " TGIED ,TGR Interrupt Enable D" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " TGIEC ,TGR Interrupt Enable C" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " TGIEB ,TGR Interrupt Enable B" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " TGIEA ,TGR Interrupt Enable A" "Disabled,Enabled"
|
|
line.byte 0x01 "TSR,Timer Status Register"
|
|
rbitfld.byte 0x01 7. " TCFD ,Count Direction Flag" "Down,Up"
|
|
bitfld.byte 0x01 5. " TCFU ,Underflow Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 4. " TCFV ,Overflow Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x01 3. " TGFD ,Input Capture/Output Compare Flag D" "Low,High"
|
|
bitfld.byte 0x01 2. " TGFC ,Input Capture/Output Compare Flag C" "Low,High"
|
|
bitfld.byte 0x01 1. " TGFB ,Input Capture/Output Compare Flag B" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x01 0. " TGFA ,Input Capture/Output Compare Flag A" "Low,High"
|
|
group.word 0x06++0x1
|
|
line.word 0x00 "TCNT,Timer Counter"
|
|
group.word 0x08++0x3
|
|
line.word 0x00 "TGRA,Timer General Register A"
|
|
line.word 0x02 "TGRB,Timer General Register B"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 3"
|
|
base ad:0xFCFF0200
|
|
width 7.
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "TCR,Timer Control Register"
|
|
bitfld.byte 0x00 5.--7. " CCLR ,Counter Clear" "Disabled,TGRA,TGRB,Counter clearing,Disabled,TGRC,TGRD,Counter clearing"
|
|
bitfld.byte 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both"
|
|
bitfld.byte 0x00 0.--2. " TPSC ,Time Prescaler" "P0f/1,P0f/4,P0f/16,P0f/64,P0f/256,P0f/1024,TCLKA,TCLKB"
|
|
group.byte 0x02++0x0
|
|
line.byte 0x00 "TMDR,Timer Mode Register"
|
|
bitfld.byte 0x00 6. " BFE ,Buffer Operation E" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " BFB ,Buffer Operation B" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " BFA ,Buffer Operation A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " MD ,Modes" "Normal,,PWM Mode 1,,,,,,Reset synchronous PWM,,,,,Complementary PWM 1 (crest),Complementary PWM 2 (trough),Complementary PWM (crest/trough)"
|
|
group.byte 0x04++0x1
|
|
line.byte 0x00 "TIORH,Timer I/O Control Register H"
|
|
bitfld.byte 0x00 4.--7. " IOB ,I/O Control B" "Retained,0,1,Toggle,Retained,0,1,Toggle,Rising,Falling,Both,Both,Rising,Falling,Both,Both"
|
|
bitfld.byte 0x00 0.--3. " IOA ,I/O Control A" "Retained,0,1,Toggle,Retained,0,1,Toggle,Rising,Falling,Both,Both,Rising,Falling,Both,Both"
|
|
line.byte 0x01 "TIORL,Timer I/O Control Register L"
|
|
bitfld.byte 0x01 4.--7. " IOD ,I/O Control D" "Retained,0,1,Toggle,Retained,0,1,Toggle,Rising,Falling,Both,Both,Rising,Falling,Both,Both"
|
|
bitfld.byte 0x01 0.--3. " IOC ,I/O Control C" "Retained,0,1,Toggle,Retained,0,1,Toggle,Rising,Falling,Both,Both,Rising,Falling,Both,Both"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "TIER,Timer Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " TTGE ,A/D Converter Start Request Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " TTGE2 ,A/D Converter Start Request Enable 2" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " TCIEU ,Underflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " TCIEV ,Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " TGIED ,TGR Interrupt Enable D" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " TGIEC ,TGR Interrupt Enable C" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " TGIEB ,TGR Interrupt Enable B" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " TGIEA ,TGR Interrupt Enable A" "Disabled,Enabled"
|
|
group.byte 0x2C++0x0
|
|
line.byte 0x00 "TSR,Timer Status Register"
|
|
rbitfld.byte 0x00 7. " TCFD ,Count Direction Flag" "Down,Up"
|
|
bitfld.byte 0x00 5. " TCFU ,Underflow Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " TGFD ,Input Capture/Output Compare Flag D" "Low,High"
|
|
bitfld.byte 0x00 2. " TGFC ,Input Capture/Output Compare Flag C" "Low,High"
|
|
bitfld.byte 0x00 1. " TGFB ,Input Capture/Output Compare Flag B" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " TGFA ,Input Capture/Output Compare Flag A" "Low,High"
|
|
group.byte 0x38++0x0
|
|
line.byte 0x00 "TBTM,Timer Buffer Operation Transfer Mode Register"
|
|
bitfld.byte 0x00 2. " TTSE ,Timing Select E" "Compare match occurred,TCNT_0 cleared"
|
|
bitfld.byte 0x00 1. " TTSB ,Timing Select B" "Compare match occurred,TCNT cleared"
|
|
bitfld.byte 0x00 0. " TTSA ,Timing Select A" "Compare match occurred,TCNT cleared"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "TCNT,Timer Counter"
|
|
group.word 0x18++0x3
|
|
line.word 0x00 "TGRA,Timer General Register A"
|
|
line.word 0x02 "TGRB,Timer General Register B"
|
|
group.word 0x24++0x3
|
|
line.word 0x00 "TGRC,Timer General Register C"
|
|
line.word 0x02 "TGRD,Timer General Register D"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 4"
|
|
base ad:0xFCFF0200
|
|
width 10.
|
|
group.byte 0x01++0x0
|
|
line.byte 0x00 "TCR,Timer Control Register"
|
|
bitfld.byte 0x00 5.--7. " CCLR ,Counter Clear" "Disabled,TGRA,TGRB,Counter clearing,Disabled,TGRC,TGRD,Counter clearing"
|
|
bitfld.byte 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both"
|
|
bitfld.byte 0x00 0.--2. " TPSC ,Time Prescaler" "P0f/1,P0f/4,P0f/16,P0f/64,P0f/256,P0f/1024,TCLKA,TCLKB"
|
|
group.byte 0x03++0x0
|
|
line.byte 0x00 "TMDR,Timer Mode Register"
|
|
bitfld.byte 0x00 6. " BFE ,Buffer Operation E" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " BFB ,Buffer Operation B" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " BFA ,Buffer Operation A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " MD ,Modes" "Normal,,PWM Mode 1,,,,,,,,,,,Complementary PWM 1 (crest),Complementary PWM 2 (trough),Complementary PWM (crest/trough)"
|
|
group.byte 0x06++0x1
|
|
line.byte 0x00 "TIORH,Timer I/O Control Register H"
|
|
bitfld.byte 0x00 4.--7. " IOB ,I/O Control B" "Retained,0,1,Toggle,Retained,0,1,Toggle,Rising,Falling,Both,Both,Rising,Falling,Both,Both"
|
|
bitfld.byte 0x00 0.--3. " IOA ,I/O Control A" "Retained,0,1,Toggle,Retained,0,1,Toggle,Rising,Falling,Both,Both,Rising,Falling,Both,Both"
|
|
line.byte 0x01 "TIORL,Timer I/O Control Register L"
|
|
bitfld.byte 0x01 4.--7. " IOD ,I/O Control D" "Retained,0,1,Toggle,Retained,0,1,Toggle,Rising,Falling,Both,Both,Rising,Falling,Both,Both"
|
|
bitfld.byte 0x01 0.--3. " IOC ,I/O Control C" "Retained,0,1,Toggle,Retained,0,1,Toggle,Rising,Falling,Both,Both,Rising,Falling,Both,Both"
|
|
group.byte 0x09++0x0
|
|
line.byte 0x00 "TIER,Timer Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " TTGE ,A/D Converter Start Request Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " TTGE2 ,A/D Converter Start Request Enable 2" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " TCIEU ,Underflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " TCIEV ,Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " TGIED ,TGR Interrupt Enable D" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " TGIEC ,TGR Interrupt Enable C" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " TGIEB ,TGR Interrupt Enable B" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " TGIEA ,TGR Interrupt Enable A" "Disabled,Enabled"
|
|
group.byte 0x2D++0x0
|
|
line.byte 0x00 "TSR,Timer Status Register"
|
|
rbitfld.byte 0x00 7. " TCFD ,Count Direction Flag" "Down,Up"
|
|
bitfld.byte 0x00 5. " TCFU ,Underflow Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " TGFD ,Input Capture/Output Compare Flag D" "Low,High"
|
|
bitfld.byte 0x00 2. " TGFC ,Input Capture/Output Compare Flag C" "Low,High"
|
|
bitfld.byte 0x00 1. " TGFB ,Input Capture/Output Compare Flag B" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " TGFA ,Input Capture/Output Compare Flag A" "Low,High"
|
|
group.byte 0x39++0x0
|
|
line.byte 0x00 "TBTM,Timer Buffer Operation Transfer Mode Register"
|
|
bitfld.byte 0x00 2. " TTSE ,Timing Select E" "Compare match occurred,TCNT_0 cleared"
|
|
bitfld.byte 0x00 1. " TTSB ,Timing Select B" "Compare match occurred,TCNT cleared"
|
|
bitfld.byte 0x00 0. " TTSA ,Timing Select A" "Compare match occurred,TCNT cleared"
|
|
group.word 0x40++0x1
|
|
line.word 0x00 "TADCR,Timer A/D Converter Start Request Control Register"
|
|
bitfld.word 0x00 14.--15. " BF ,TADCOBRA_4/TADCOBRB_4 Transfer Timing Select" "Disabled,Crest,Trough,Crest and trough"
|
|
bitfld.word 0x00 7. " UT4AE ,Up-Count TRG4AN Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " DT4AE ,Down-Count TRG4AN Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " UT4BE ,Up-Count TRG4BN Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " DT4BE ,Down-Count TRG4BN Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " ITA3AE ,TGIA_3 Interrupt Skipping Link Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ITA4VE ,TCIV_4 Interrupt Skipping Link EnableSelect whether to link A/D converter start requests (TRG4AN) with TCIV_4 interrupt skipping operation" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " ITB3AE ,TGIA_3 Interrupt Skipping Link Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " ITB4VE ,TCIV_4 Interrupt Skipping Link Enable" "Disabled,Enabled"
|
|
group.word 0x44++0x7
|
|
line.word 0x00 "TADCORA,Timer A/D Converter Start Request Cycle Set Register A"
|
|
line.word 0x02 "TADCORB,Timer A/D Converter Start Request Cycle Set Register B"
|
|
line.word 0x04 "TADCOBRA,Timer A/D Converter Start Request Cycle Set Buffer Register A"
|
|
line.word 0x06 "TADCOBRB,Timer A/D Converter Start Request Cycle Set Buffer Register B"
|
|
group.word 0x12++0x1
|
|
line.word 0x00 "TCNT,Timer Counter"
|
|
group.word 0x1C++0x3
|
|
line.word 0x00 "TGRA,Timer General Register A"
|
|
line.word 0x02 "TGRB,Timer General Register B"
|
|
group.word 0x28++0x3
|
|
line.word 0x00 "TGRC,Timer General Register C"
|
|
line.word 0x02 "TGRD,Timer General Register D"
|
|
width 0xB
|
|
tree.end
|
|
tree "Common Registers"
|
|
base ad:0xFCFF0200
|
|
width 7.
|
|
tree "All channels"
|
|
group.byte 0x80++0x1
|
|
line.byte 0x00 "TSTR,Timer Start Register"
|
|
bitfld.byte 0x00 7. " CST4 ,Counter Start 4" "Not started,Started"
|
|
bitfld.byte 0x00 6. " CST3 ,Counter Start 3" "Not started,Started"
|
|
bitfld.byte 0x00 2. " CST2 ,Counter Start 2" "Not started,Started"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " CST1 ,Counter Start 1" "Not started,Started"
|
|
bitfld.byte 0x00 0. " CST0 ,Counter Start 0" "Not started,Started"
|
|
line.byte 0x01 "TSYR,Timer Synchronous Register"
|
|
bitfld.byte 0x01 7. " SYNC4 ,Timer Synchronous operation 4" "Disabled,Enabled"
|
|
bitfld.byte 0x01 6. " SYNC3 ,Timer Synchronous operation 3" "Disabled,Enabled"
|
|
bitfld.byte 0x01 2. " SYNC2 ,Timer Synchronous operation 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x01 1. " SYNC1 ,Timer Synchronous operation 1" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0. " SYNC0 ,Timer Synchronous operation 0" "Disabled,Enabled"
|
|
group.byte 0x84++0x0
|
|
line.byte 0x00 "TRWER,Timer Read/Write Enable Register"
|
|
bitfld.byte 0x00 0. " RWE ,Read/Write Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Channels 3 and 4"
|
|
group.byte 0x0A++0x0
|
|
line.byte 0x00 "TOER,Timer Output Master Enable Register"
|
|
bitfld.byte 0x00 5. " OE4D ,Master Enable TIOC4D" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " OE4C ,Master Enable TIOC4C" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " OE3D ,Master Enable TIOC3D" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " OE4B ,Master Enable TIOC4B" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " OE4A ,Master Enable TIOC4A" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " OE3B ,Master Enable TIOC3B" "Disabled,Enabled"
|
|
group.byte 0x0E++0x0
|
|
line.byte 0x00 "TOCR1,Timer Output Control Register 1"
|
|
bitfld.byte 0x00 6. " PSYE ,PWM Synchronous Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " TOCL ,TOC Register Write Protection" "Enabled,Disabled"
|
|
bitfld.byte 0x00 2. " TOCS ,TOC Select" "TOCR1,TOCR2"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " OLSN ,Output Level Select N" "Low,High"
|
|
bitfld.byte 0x00 0. " OLSP ,Output Level Select P" "Low,High"
|
|
if (((per.b(ad:0xFCFF0200+0x0E))&0x2)==0x2)
|
|
group.byte 0x0F++0x0
|
|
line.byte 0x00 "TOCR2,Timer Output Control Register 2"
|
|
bitfld.byte 0x00 6.--7. " BF ,TOLBR Buffer Transfer Timing Select" "Disabled,Crest/When cleared,Trough/-,Crest and trough/-"
|
|
bitfld.byte 0x00 5. " OLS3N ,Output Level Select 3N" "Low,High"
|
|
bitfld.byte 0x00 4. " OLS3P ,Output Level Select 3P" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " OLS2N ,Output Level Select 2N" "Low,High"
|
|
bitfld.byte 0x00 2. " OLS2P ,Output Level Select 2P" "Low,High"
|
|
bitfld.byte 0x00 1. " OLS1N ,Output Level Select 1N" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " OLS1P ,Output Level Select 1P" "Low,High"
|
|
else
|
|
group.byte 0x0F++0x0
|
|
line.byte 0x00 "TOCR2,Timer Output Control Register 2"
|
|
bitfld.byte 0x00 6.--7. " BF ,TOLBR Buffer Transfer Timing Select" "Disabled,Crest/When cleared,Trough/-,Crest and trough/-"
|
|
endif
|
|
group.byte 0x36++0x0
|
|
line.byte 0x00 "TOLBR,Timer Output Level Buffer Register"
|
|
bitfld.byte 0x00 5. " OLS3N ,Buffer value for OLS3N" "0,1"
|
|
bitfld.byte 0x00 4. " OLS3P ,Buffer value for OLS3P" "0,1"
|
|
bitfld.byte 0x00 3. " OLS2N ,Buffer value for OLS2N" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " OLS2P ,Buffer value for OLS2P" "0,1"
|
|
bitfld.byte 0x00 1. " OLS1N ,Buffer value for OLS1N" "0,1"
|
|
bitfld.byte 0x00 0. " OLS1P ,Buffer value for OLS1P" "0,1"
|
|
group.byte 0x0D++0x0
|
|
line.byte 0x00 "TGCR,Timer Gate Control Register"
|
|
bitfld.byte 0x00 6. " BDC ,Brushless DC Motor" "Ordinary,Effective functions"
|
|
bitfld.byte 0x00 5. " N ,Negative Phase Output (N) Control" "Level,Reset synch./Compl. PWM"
|
|
bitfld.byte 0x00 4. " P ,Positive Phase Output (P) Control" "Level,Reset synch./Compl. PWM"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " FB ,External Feedback Signal Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " WF ,Output Phase Switch 2" "0,1"
|
|
bitfld.byte 0x00 1. " VF ,Output Phase Switch 1" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " UF ,Output Phase Switch 0" "0,1"
|
|
rgroup.word 0x20++0x1
|
|
line.word 0x00 "TCNTS,Timer Subcounter"
|
|
group.word 0x16++0x1
|
|
line.word 0x00 "TDDR,Timer Dead Time Data Register"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "TCDR,Timer Cycle Data Register"
|
|
group.word 0x22++0x1
|
|
line.word 0x00 "TCBR,Timer Cycle Buffer Register"
|
|
group.byte 0x30++0x2
|
|
line.byte 0x00 "TITCR,Timer Interrupt Skipping Set Register"
|
|
bitfld.byte 0x00 7. " T3AEN ,T3AEN" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4.--6. " 3ACOR ,TGIA_3 interrupt skipping count" "Not skipped,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 3. " T4VEN ,T4VEN" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " 4VCOR ,TCIV_4 interrupt skipping count" "Not skipped,1,2,3,4,5,6,7"
|
|
line.byte 0x01 "TITCNT,Timer Interrupt Skipping Counter"
|
|
bitfld.byte 0x01 4.--6. " 3ACNT ,TGIA_3 Interrupt Counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x01 0.--2. " 4VCNT ,TCIV_4 Interrupt Counter" "0,1,2,3,4,5,6,7"
|
|
line.byte 0x02 "TBTER,Timer Buffer Transfer Set Register"
|
|
bitfld.byte 0x02 0.--1. " BTE ,Buffer transfer enable" "Enabled,Disabled,Linked,"
|
|
group.byte 0x34++0x0
|
|
line.byte 0x00 "TDER,Timer Dead Time Enable Register"
|
|
bitfld.byte 0x00 0. " TDER ,Dead Time Enable" "Disabled,Enabled"
|
|
group.byte 0x60++0x0
|
|
line.byte 0x00 "TWCR,Timer Waveform Control Register"
|
|
bitfld.byte 0x00 7. " CCE ,Compare Match Clear Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " WRE ,Initial Output Suppression Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree.open "OSTM (OS Timer)"
|
|
tree "OSTM 0"
|
|
base ad:0xFCFEC000
|
|
width 10.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "OSTM0CMP,OSTM 0 Compare Register"
|
|
rgroup.long 0x04++0x3
|
|
line.long 0x00 "OSTM0CNT,OSTM 0 Counter Register"
|
|
rgroup.byte 0x10++0x0
|
|
line.byte 0x00 "OSTM0TE,OSTM 0 Count Enable Status Register"
|
|
bitfld.byte 0x00 0. " OSTM0TE ,Counter enable" "Disabled,Enabled"
|
|
wgroup.byte 0x14++0x0
|
|
line.byte 0x00 "OSTM0TS,OSTM 0 Count Start Trigger Register"
|
|
bitfld.byte 0x00 0. " OSTM0TS ,Counter start" "No effect,Start"
|
|
wgroup.byte 0x18++0x0
|
|
line.byte 0x00 "OSTM0TT,OSTM 0 Count Stop Trigger Register"
|
|
bitfld.byte 0x00 0. " OSTM0TT ,Counter stop" "No effect,Stop"
|
|
group.byte 0x20++0x0
|
|
line.byte 0x00 "OSTM0CTL,OSTM Control Register"
|
|
bitfld.byte 0x00 1. " OSTM0MD1 ,Counter operating mode" "Interval timer,Free-running comparison"
|
|
bitfld.byte 0x00 0. " OSTM0MD0 ,OSTM0TINT interrupt enable" "Disabled,Enabled"
|
|
width 0xB
|
|
tree.end
|
|
tree "OSTM 1"
|
|
base ad:0xFCFEC400
|
|
width 10.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "OSTM1CMP,OSTM 1 Compare Register"
|
|
rgroup.long 0x04++0x3
|
|
line.long 0x00 "OSTM1CNT,OSTM 1 Counter Register"
|
|
rgroup.byte 0x10++0x0
|
|
line.byte 0x00 "OSTM1TE,OSTM 1 Count Enable Status Register"
|
|
bitfld.byte 0x00 0. " OSTM1TE ,Counter enable" "Disabled,Enabled"
|
|
wgroup.byte 0x14++0x0
|
|
line.byte 0x00 "OSTM1TS,OSTM 1 Count Start Trigger Register"
|
|
bitfld.byte 0x00 0. " OSTM1TS ,Counter start" "No effect,Start"
|
|
wgroup.byte 0x18++0x0
|
|
line.byte 0x00 "OSTM1TT,OSTM 1 Count Stop Trigger Register"
|
|
bitfld.byte 0x00 0. " OSTM1TT ,Counter stop" "No effect,Stop"
|
|
group.byte 0x20++0x0
|
|
line.byte 0x00 "OSTM1CTL,OSTM Control Register"
|
|
bitfld.byte 0x00 1. " OSTM1MD1 ,Counter operating mode" "Interval timer,Free-running comparison"
|
|
bitfld.byte 0x00 0. " OSTM1MD0 ,OSTM1TINT interrupt enable" "Disabled,Enabled"
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree "Watchdog Timer"
|
|
base ad:0xFCFE0000
|
|
width 7.
|
|
group.byte 0x02++0x0
|
|
line.byte 0x00 "WTCNT,Watchdog Timer Counter"
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "WTCSR,Watchdog Timer Control/Status Register"
|
|
bitfld.byte 0x00 7. " IOVF ,Interval Timer Overflow" "No overflow,Overflow"
|
|
bitfld.byte 0x00 6. " WT/IT ,Timer Mode Select" "Interval,Watchdog"
|
|
bitfld.byte 0x00 5. " TME ,Timer Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " CKS ,Clock Select" "P0f,P0f/64,P0f/128,P0f/256,P0f/512,P0f/1024,P0f/4096,P0f/16384"
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "WRCSR,Watchdog Reset Control/Status Register"
|
|
bitfld.byte 0x00 7. " WOVF ,Watchdog Timer Overflow" "No overflow,Overflow"
|
|
bitfld.byte 0x00 6. " RSTE ,Reset Enable" "Disabled,Enabled"
|
|
width 0xB
|
|
tree.end
|
|
tree "Realtime Clock"
|
|
base ad:0xFCFF1000
|
|
width 0x09
|
|
rgroup.byte 0x00++0x0
|
|
line.byte 0x00 "R64CNT,64-Hz Counter"
|
|
bitfld.byte 0x00 6. " 1_Hz ,State of the divider circuit 1 Hz" "0,1"
|
|
bitfld.byte 0x00 5. " 2_Hz ,State of the divider circuit 2 Hz" "0,1"
|
|
bitfld.byte 0x00 4. " 4_Hz ,State of the divider circuit 4 Hz" "0,1"
|
|
bitfld.byte 0x00 3. " 8_Hz ,State of the divider circuit 8 Hz" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " 16_Hz ,State of the divider circuit 16 Hz" "0,1"
|
|
bitfld.byte 0x00 1. " 32_Hz ,State of the divider circuit 32 Hz" "0,1"
|
|
bitfld.byte 0x00 0. " 64_Hz ,State of the divider circuit 64 Hz" "0,1"
|
|
group.byte 0x02++0x0
|
|
line.byte 0x00 "RSECCNT,Second Counter"
|
|
bitfld.byte 0x00 4.--6. " SECONDS ,Counting ten's position of seconds" "0,1,2,3,4,5,-,-"
|
|
bitfld.byte 0x00 0.--3. ",Counting one's position of seconds" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "RMINCNT,Minute Counter"
|
|
bitfld.byte 0x00 4.--6. " MINUTES ,Counting ten's position of minutes" "0,1,2,3,4,5,-,-"
|
|
bitfld.byte 0x00 0.--3. ",Counting one's position of minutes" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
if (((per.b(ad:0xFCFF1000+0x06))&0x30)<0x20)
|
|
group.byte 0x06++0x0
|
|
line.byte 0x00 "RHRCNT,Hour Counter"
|
|
bitfld.byte 0x00 4.--5. " HOURS ,Counting ten's position of hours" "0,1,2,-"
|
|
bitfld.byte 0x00 0.--3. ",Counting one's position of hours" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
elif (((per.b(ad:0xFCFF1000+0x06))&0x30)==0x20)
|
|
group.byte 0x06++0x0
|
|
line.byte 0x00 "RHRCNT,Hour Counter"
|
|
bitfld.byte 0x00 4.--5. " HOURS ,Counting ten's position of hours" "0,1,2,-"
|
|
bitfld.byte 0x00 0.--3. ",Counting one's position of hours" "0,1,2,3,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
else
|
|
group.byte 0x06++0x0
|
|
line.byte 0x00 "RHRCNT,Hour Counter"
|
|
bitfld.byte 0x00 4.--5. " HOURS ,Counting ten's position of hours" "0,1,2,-"
|
|
bitfld.byte 0x00 0.--3. ",Counting one's position of hours" "-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
endif
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "RWKCNT,Day of Week Counter"
|
|
bitfld.byte 0x00 0.--2. " WEEKDAY ,Day-of-week counting" "Sunday,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,-"
|
|
if (((per.b(ad:0xFCFF1000+0x0A))&0x30)<0x30)
|
|
group.byte 0x0A++0x0
|
|
line.byte 0x00 "RDAYCNT,Date Counter"
|
|
bitfld.byte 0x00 4.--5. " DAYS ,Counting ten's position of dates" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. ",Counting one's position of dates" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
else
|
|
// THIS[DAYS] == [30 : 31]
|
|
group.byte 0x0A++0x0
|
|
line.byte 0x00 "RDAYCNT,Date Counter"
|
|
bitfld.byte 0x00 4.--5. " DAYS ,Counting ten's position of dates" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. ",Counting one's position of dates" "0,1,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
endif
|
|
if (((per.b(ad:0xFCFF1000+0x0C))&0x10)<0x10)
|
|
group.byte 0x0C++0x0
|
|
line.byte 0x0 "RMONCNT,Month Counter"
|
|
bitfld.byte 0x0 4. " MONTHS ,Counting ten's position of months" "0,1"
|
|
bitfld.byte 0x0 0.--3. ",Counting one's position of months" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
else
|
|
group.byte 0x0C++0x0
|
|
line.byte 0x00 "RMONCNT,Month Counter"
|
|
bitfld.byte 0x00 4. " MONTHS ,Counting ten's position of months" "0,1"
|
|
bitfld.byte 0x00 0.--3. ",Counting one's position of months" "0,1,2,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
endif
|
|
group.word 0x0E++0x1
|
|
line.word 0x00 "RYRCNT,Year Counter"
|
|
bitfld.word 0x00 12.--15. " YEARS ,Counting thousand's position of years" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x00 8.--11. ",Counting hundred's position of years" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x00 4.--7. ",Counting ten's position of years" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x00 0.--3. ",Counting one's position of years" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
group.byte 0x10++0x0
|
|
line.byte 0x00 "RSECAR,Second Alarm Register"
|
|
bitfld.byte 0x00 7. " ENB ,Comparison with the RSECCNT value" "Not performed,Performed"
|
|
bitfld.byte 0x00 4.--6. " SECONDS ,Counting ten's position of seconds" "0,1,2,3,4,5,-,-"
|
|
bitfld.byte 0x00 0.--3. ",Counting one's position of seconds" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
group.byte 0x12++0x0
|
|
line.byte 0x00 "RMINAR,Minute Alarm Register"
|
|
bitfld.byte 0x00 7. " ENB ,Comparison with the RMINCNT value" "Not performed,Performed"
|
|
bitfld.byte 0x00 4.--6. " MINUTES ,Counting ten's position of minutes" "0,1,2,3,4,5,-,-"
|
|
bitfld.byte 0x00 0.--3. ",Counting one's position of minutes" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
if (((per.b(ad:0xFCFF1000+0x14))&0x30)<0x20)
|
|
group.byte 0x14++0x0
|
|
line.byte 0x00 "RHRAR,Hour Alarm Register"
|
|
bitfld.byte 0x00 7. " ENB ,Comparison with the RHRCNT value" "Not performed,Performed"
|
|
bitfld.byte 0x00 4.--5. " HOURS ,Counting ten's position of hours" "0,1,2,-"
|
|
bitfld.byte 0x00 0.--3. ",Counting one's position of hours" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
elif (((per.b(ad:0xFCFF1000+0x14))&0x30)==0x20)
|
|
group.byte 0x14++0x0
|
|
line.byte 0x00 "RHRAR,Hour Alarm Register"
|
|
bitfld.byte 0x00 7. " ENB ,Comparison with the RHRCNT value" "Not performed,Performed"
|
|
bitfld.byte 0x00 4.--5. " HOURS ,Counting ten's position of hours" "0,1,2,-"
|
|
bitfld.byte 0x00 0.--3. ",Counting one's position of hours" "0,1,2,3,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
else
|
|
group.byte 0x14++0x0
|
|
line.byte 0x00 "RHRAR,Hour Alarm Register"
|
|
bitfld.byte 0x00 7. " ENB ,Comparison with the RHRCNT value" "Not performed,Performed"
|
|
bitfld.byte 0x00 4.--5. " HOURS ,Counting ten's position of hours" "0,1,2,-"
|
|
bitfld.byte 0x00 0.--3. ",Counting one's position of hours" "-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
endif
|
|
group.byte 0x16++0x0
|
|
line.byte 0x00 "RWKAR,Day of Week Alarm Register"
|
|
bitfld.byte 0x00 7. " ENB ,Comparison with the RWKCNT value" "Not performed,Performed"
|
|
bitfld.byte 0x00 0.--2. " WEEKDAY ,Day-of-week counting" "Sunday,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,-"
|
|
if (((per.b(ad:0xFCFF1000+0x18))&0x30)<0x30)
|
|
group.byte 0x18++0x0
|
|
line.byte 0x00 "RDAYAR,Date Alarm Register"
|
|
bitfld.byte 0x00 7. " ENB ,Comparison with the RDAYCNT value" "Not performed,Performed"
|
|
bitfld.byte 0x00 4.--5. " DAYS ,Counting ten's position of dates" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. ",Counting one's position of dates" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
else
|
|
group.byte 0x18++0x0
|
|
line.byte 0x00 "RDAYAR,Date Alarm Register"
|
|
bitfld.byte 0x00 7. " ENB ,Comparison with the RDAYCNT value" "Not performed,Performed"
|
|
bitfld.byte 0x00 4.--5. " DAYS ,Counting ten's position of dates" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. ",Counting one's position of dates" "0,1,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
endif
|
|
if (((per.b(ad:0xFCFF1000+0x1a))&0x10)<0x10)
|
|
group.byte 0x1A++0x0
|
|
line.byte 0x00 "RMONAR,Month Alarm Register"
|
|
bitfld.byte 0x00 7. " ENB ,Comparison with the RMONCNT value" "Not performed,Performed"
|
|
bitfld.byte 0x00 4. " MONTHS ,Counting ten's position of months" "0,1"
|
|
bitfld.byte 0x00 0.--3. ",Counting one's position of months" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
else
|
|
group.byte 0x1A++0x0
|
|
line.byte 0x00 "RMONAR,Month Alarm Register"
|
|
bitfld.byte 0x00 7. " ENB ,Comparison with the RMONCNT value" "Not performed,Performed"
|
|
bitfld.byte 0x00 4. " MONTHS ,Counting ten's position of months" "0,1"
|
|
bitfld.byte 0x00 0.--3. ",Counting one's position of months" "0,1,2,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
endif
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "RYRAR,Year Alarm Register"
|
|
bitfld.word 0x00 12.--15. " YEARS ,Counting thousand's position of years" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x00 8.--11. ",Counting hundred's position of years" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x00 4.--7. ",Counting ten's position of years" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x00 0.--3. ",Counting one's position of years" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
group.byte 0x1C++0x0
|
|
line.byte 0x00 "RCR1,RTC Control Register 1"
|
|
bitfld.byte 0x00 7. " CF ,Carry Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " CIE ,Carry Interrupt Enable Flag" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " AIE ,Alarm Interrupt Enable Flag" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " AF ,Alarm Flag" "Not occurred,Occurred"
|
|
group.byte 0x1E++0x0
|
|
line.byte 0x00 "RCR2,RTC Control Register 2"
|
|
bitfld.byte 0x00 7. " PEF ,Periodic Interrupt Flag" "Not generated,Generated"
|
|
bitfld.byte 0x00 4.--6. " PES ,Interrupt Enable Flags" "No interrupt,,1/64,1/16,1/4,1/2,1,2"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " RTCEN ,RTC_X1 and RTC_X3 Clock Control" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " ADJ ,30-Second Adjustment" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " RESET ,Divider circuit reset" "No reset,Reset"
|
|
bitfld.byte 0x00 0. " START ,Halts and restarts the counter" "Halted,Running"
|
|
group.byte 0x24++0x0
|
|
line.byte 0x00 "RCR3,RTC Control Register 3"
|
|
bitfld.byte 0x00 7. " ENB ,Comparison of the year alarm/counter" "Not performed,Performed"
|
|
group.byte 0x26++0x0
|
|
line.byte 0x00 "RCR5,Control Register 5"
|
|
bitfld.byte 0x00 0.--1. " RCKSEL ,Operation clock select" "RTC_X1,EXTAL,RTC_X3,"
|
|
group.long 0x2A++0x3
|
|
line.long 0x00 "RFRH/L,Frequency Register H/L"
|
|
bitfld.long 0x00 31. " SEL64 ,64-Hz Divider Select" "Dividable,Not dividable"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. " RFC ,Frequency comparison value"
|
|
width 0xB
|
|
tree.end
|
|
tree.open "Serial Communication Interface with FIFO"
|
|
tree "Channel 0"
|
|
base ad:0xE8007000
|
|
width 9.
|
|
hgroup.byte 0x14++0x00
|
|
hide.byte 0x00 "SCFRDR0,Receive FIFO Data Register 0"
|
|
in
|
|
wgroup.byte 0x0C++0x00
|
|
line.byte 0x00 "SCFTDR0,Transmit FIFO Data Register 0"
|
|
if (((per.w(ad:0xE8007000))&0xa0)==0x20)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR0,Serial Mode Register 0"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd"
|
|
textline " "
|
|
bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits"
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
elif (((per.w(ad:0xE8007000))&0xa0)==0x00)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR0,Serial Mode Register 0"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
else
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR0,Serial Mode Register 0"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
endif
|
|
if (((per.w(ad:0xE8007000))&0x80)==0x80)
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SCSCR0,Serial Control Register 0"
|
|
sif (cpu()!="RZA1H"&&cpu()!="R7S721021")
|
|
bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="RZA1H"||cpu()=="R7S721021")
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization output,Internal clk/SCK synchronization output,External clk/SCK synchronization input,"
|
|
else
|
|
bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization clk,Internal clk/SCK synchronization clk,External clk/SCK synchronization clk,?..."
|
|
endif
|
|
else
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SCSCR0,Serial Control Register 0"
|
|
sif (cpu()!="RZA1H"&&cpu()!="R7S721021")
|
|
bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="RZA1H")
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Baud rate generator/SCK input,External clk/SCK input,"
|
|
else
|
|
bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Internal clk/SCK output,External clk/SCK input,"
|
|
endif
|
|
endif
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "SCFSR0,Serial Status Register 0"
|
|
rbitfld.word 0x00 12.--15. " PER[3:0] ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.word 0x00 8.--11. " FER[3:0] ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ER ,Receive error" "No error,Error"
|
|
bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty"
|
|
bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected"
|
|
textline " "
|
|
rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error"
|
|
rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full"
|
|
bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "SCBRR0,Bit Rate Register 0"
|
|
if (((per.w(ad:0xE8007000))&0x80)==0x80)
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "SCFCR0,FIFO Control Register 0"
|
|
bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14"
|
|
bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger" "1,2,8,14"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)"
|
|
bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled"
|
|
else
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "SCFCR0,FIFO Control Register 0"
|
|
bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14"
|
|
bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger " "1,4,8,14"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)"
|
|
bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word 0x1C++0x01
|
|
line.word 0x00 "SCFDR0,FIFO Data Count Register 0"
|
|
bitfld.word 0x00 8.--12. " T[4:0] ,Number of non-transmitted data in SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--4. " R[4:0] ,Number of received data in SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "SCSPTR0,Serial Port Register 0"
|
|
bitfld.word 0x00 7. " RTSIO ,Serial port - RTS# pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 6. " RTSDT ,Serial port - RTS# pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 5. " CTSIO ,Serial port - CTS# pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 4. " CTSDT ,Serial port - CTS# pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SCKIO ,Serial port - clock pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 2. " SCKDT ,Serial port - clock pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Not output,Output"
|
|
bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "SCLSR0,Line Status Register 0"
|
|
sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021"))
|
|
bitfld.word 0x00 2. " TO ,Timeout" "No error,Error"
|
|
endif
|
|
textline " "
|
|
bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error"
|
|
sif (cpu()=="RZA1H")
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR0,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
endif
|
|
sif (cpu()=="R7S721021")
|
|
if (((per.w(ad:0xE8007000))&0x80)==0x0)
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR0,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed"
|
|
bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
else
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR0,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed"
|
|
rbitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
endif
|
|
endif
|
|
sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&!cpuis("R8A77980*")&&!cpuis("R8A77970*")&&!(cpuis("R8A77951")||cpuis("R8A77951-*"))&&!cpuis("R8A77995*")&&!cpuis("R8A77990*"))
|
|
group.word 0x30++0x01 "BRG 0"
|
|
line.word 0x00 "DL0,Frequency Division Register 0"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "CKS0,Clock Select Register 0"
|
|
bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK"
|
|
sif (cpu()=="R8A77440")||cpuis("R8A77951")||cpuis("R8A77951-*")||(cpu()=="R8A77930")||(cpu()=="R8A77970")||(cpu()=="R8A77420")
|
|
bitfld.word 0x00 14. " XIN ,Selects the baud rate generator source for the external clock between SCIF_CLK and ZS" "SCIF_CLK,ZS"
|
|
else
|
|
bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0xE8007800
|
|
width 9.
|
|
hgroup.byte 0x14++0x00
|
|
hide.byte 0x00 "SCFRDR1,Receive FIFO Data Register 1"
|
|
in
|
|
wgroup.byte 0x0C++0x00
|
|
line.byte 0x00 "SCFTDR1,Transmit FIFO Data Register 1"
|
|
if (((per.w(ad:0xE8007800))&0xa0)==0x20)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR1,Serial Mode Register 1"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd"
|
|
textline " "
|
|
bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits"
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
elif (((per.w(ad:0xE8007800))&0xa0)==0x00)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR1,Serial Mode Register 1"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
else
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR1,Serial Mode Register 1"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
endif
|
|
if (((per.w(ad:0xE8007800))&0x80)==0x80)
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SCSCR1,Serial Control Register 1"
|
|
sif (cpu()!="RZA1H"&&cpu()!="R7S721021")
|
|
bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="RZA1H"||cpu()=="R7S721021")
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization output,Internal clk/SCK synchronization output,External clk/SCK synchronization input,"
|
|
else
|
|
bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization clk,Internal clk/SCK synchronization clk,External clk/SCK synchronization clk,?..."
|
|
endif
|
|
else
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SCSCR1,Serial Control Register 1"
|
|
sif (cpu()!="RZA1H"&&cpu()!="R7S721021")
|
|
bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="RZA1H")
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Baud rate generator/SCK input,External clk/SCK input,"
|
|
else
|
|
bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Internal clk/SCK output,External clk/SCK input,"
|
|
endif
|
|
endif
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "SCFSR1,Serial Status Register 1"
|
|
rbitfld.word 0x00 12.--15. " PER[3:0] ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.word 0x00 8.--11. " FER[3:0] ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ER ,Receive error" "No error,Error"
|
|
bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty"
|
|
bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected"
|
|
textline " "
|
|
rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error"
|
|
rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full"
|
|
bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "SCBRR1,Bit Rate Register 1"
|
|
if (((per.w(ad:0xE8007800))&0x80)==0x80)
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "SCFCR1,FIFO Control Register 1"
|
|
bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14"
|
|
bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger" "1,2,8,14"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)"
|
|
bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled"
|
|
else
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "SCFCR1,FIFO Control Register 1"
|
|
bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14"
|
|
bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger " "1,4,8,14"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)"
|
|
bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word 0x1C++0x01
|
|
line.word 0x00 "SCFDR1,FIFO Data Count Register 1"
|
|
bitfld.word 0x00 8.--12. " T[4:0] ,Number of non-transmitted data in SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--4. " R[4:0] ,Number of received data in SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "SCSPTR1,Serial Port Register 1"
|
|
bitfld.word 0x00 7. " RTSIO ,Serial port - RTS# pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 6. " RTSDT ,Serial port - RTS# pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 5. " CTSIO ,Serial port - CTS# pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 4. " CTSDT ,Serial port - CTS# pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SCKIO ,Serial port - clock pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 2. " SCKDT ,Serial port - clock pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Not output,Output"
|
|
bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "SCLSR1,Line Status Register 1"
|
|
sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021"))
|
|
bitfld.word 0x00 2. " TO ,Timeout" "No error,Error"
|
|
endif
|
|
textline " "
|
|
bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error"
|
|
sif (cpu()=="RZA1H")
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR1,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
endif
|
|
sif (cpu()=="R7S721021")
|
|
if (((per.w(ad:0xE8007800))&0x80)==0x0)
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR1,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed"
|
|
bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
else
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR1,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed"
|
|
rbitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
endif
|
|
endif
|
|
sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&!cpuis("R8A77980*")&&!cpuis("R8A77970*")&&!(cpuis("R8A77951")||cpuis("R8A77951-*"))&&!cpuis("R8A77995*")&&!cpuis("R8A77990*"))
|
|
group.word 0x30++0x01 "BRG 1"
|
|
line.word 0x00 "DL1,Frequency Division Register 1"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "CKS1,Clock Select Register 1"
|
|
bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK"
|
|
sif (cpu()=="R8A77440")||cpuis("R8A77951")||cpuis("R8A77951-*")||(cpu()=="R8A77930")||(cpu()=="R8A77970")||(cpu()=="R8A77420")
|
|
bitfld.word 0x00 14. " XIN ,Selects the baud rate generator source for the external clock between SCIF_CLK and ZS" "SCIF_CLK,ZS"
|
|
else
|
|
bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Channel 2"
|
|
base ad:0xE8008000
|
|
width 9.
|
|
hgroup.byte 0x14++0x00
|
|
hide.byte 0x00 "SCFRDR2,Receive FIFO Data Register 2"
|
|
in
|
|
wgroup.byte 0x0C++0x00
|
|
line.byte 0x00 "SCFTDR2,Transmit FIFO Data Register 2"
|
|
if (((per.w(ad:0xE8008000))&0xa0)==0x20)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR2,Serial Mode Register 2"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd"
|
|
textline " "
|
|
bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits"
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
elif (((per.w(ad:0xE8008000))&0xa0)==0x00)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR2,Serial Mode Register 2"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
else
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR2,Serial Mode Register 2"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
endif
|
|
if (((per.w(ad:0xE8008000))&0x80)==0x80)
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SCSCR2,Serial Control Register 2"
|
|
sif (cpu()!="RZA1H"&&cpu()!="R7S721021")
|
|
bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="RZA1H"||cpu()=="R7S721021")
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization output,Internal clk/SCK synchronization output,External clk/SCK synchronization input,"
|
|
else
|
|
bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization clk,Internal clk/SCK synchronization clk,External clk/SCK synchronization clk,?..."
|
|
endif
|
|
else
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SCSCR2,Serial Control Register 2"
|
|
sif (cpu()!="RZA1H"&&cpu()!="R7S721021")
|
|
bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="RZA1H")
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Baud rate generator/SCK input,External clk/SCK input,"
|
|
else
|
|
bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Internal clk/SCK output,External clk/SCK input,"
|
|
endif
|
|
endif
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "SCFSR2,Serial Status Register 2"
|
|
rbitfld.word 0x00 12.--15. " PER[3:0] ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.word 0x00 8.--11. " FER[3:0] ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ER ,Receive error" "No error,Error"
|
|
bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty"
|
|
bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected"
|
|
textline " "
|
|
rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error"
|
|
rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full"
|
|
bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "SCBRR2,Bit Rate Register 2"
|
|
if (((per.w(ad:0xE8008000))&0x80)==0x80)
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "SCFCR2,FIFO Control Register 2"
|
|
bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14"
|
|
bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger" "1,2,8,14"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)"
|
|
bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled"
|
|
else
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "SCFCR2,FIFO Control Register 2"
|
|
bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14"
|
|
bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger " "1,4,8,14"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)"
|
|
bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word 0x1C++0x01
|
|
line.word 0x00 "SCFDR2,FIFO Data Count Register 2"
|
|
bitfld.word 0x00 8.--12. " T[4:0] ,Number of non-transmitted data in SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--4. " R[4:0] ,Number of received data in SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "SCSPTR2,Serial Port Register 2"
|
|
bitfld.word 0x00 7. " RTSIO ,Serial port - RTS# pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 6. " RTSDT ,Serial port - RTS# pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 5. " CTSIO ,Serial port - CTS# pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 4. " CTSDT ,Serial port - CTS# pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SCKIO ,Serial port - clock pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 2. " SCKDT ,Serial port - clock pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Not output,Output"
|
|
bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "SCLSR2,Line Status Register 2"
|
|
sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021"))
|
|
bitfld.word 0x00 2. " TO ,Timeout" "No error,Error"
|
|
endif
|
|
textline " "
|
|
bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error"
|
|
sif (cpu()=="RZA1H")
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR2,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
endif
|
|
sif (cpu()=="R7S721021")
|
|
if (((per.w(ad:0xE8008000))&0x80)==0x0)
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR2,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed"
|
|
bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
else
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR2,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed"
|
|
rbitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
endif
|
|
endif
|
|
sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&!cpuis("R8A77980*")&&!cpuis("R8A77970*")&&!(cpuis("R8A77951")||cpuis("R8A77951-*"))&&!cpuis("R8A77995*")&&!cpuis("R8A77990*"))
|
|
group.word 0x30++0x01 "BRG 2"
|
|
line.word 0x00 "DL2,Frequency Division Register 2"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "CKS2,Clock Select Register 2"
|
|
bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK"
|
|
sif (cpu()=="R8A77440")||cpuis("R8A77951")||cpuis("R8A77951-*")||(cpu()=="R8A77930")||(cpu()=="R8A77970")||(cpu()=="R8A77420")
|
|
bitfld.word 0x00 14. " XIN ,Selects the baud rate generator source for the external clock between SCIF_CLK and ZS" "SCIF_CLK,ZS"
|
|
else
|
|
bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Channel 3"
|
|
base ad:0xE8008800
|
|
width 9.
|
|
hgroup.byte 0x14++0x00
|
|
hide.byte 0x00 "SCFRDR3,Receive FIFO Data Register 3"
|
|
in
|
|
wgroup.byte 0x0C++0x00
|
|
line.byte 0x00 "SCFTDR3,Transmit FIFO Data Register 3"
|
|
if (((per.w(ad:0xE8008800))&0xa0)==0x20)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR3,Serial Mode Register 3"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd"
|
|
textline " "
|
|
bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits"
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
elif (((per.w(ad:0xE8008800))&0xa0)==0x00)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR3,Serial Mode Register 3"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
else
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR3,Serial Mode Register 3"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
endif
|
|
if (((per.w(ad:0xE8008800))&0x80)==0x80)
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SCSCR3,Serial Control Register 3"
|
|
sif (cpu()!="RZA1H"&&cpu()!="R7S721021")
|
|
bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="RZA1H"||cpu()=="R7S721021")
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization output,Internal clk/SCK synchronization output,External clk/SCK synchronization input,"
|
|
else
|
|
bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization clk,Internal clk/SCK synchronization clk,External clk/SCK synchronization clk,?..."
|
|
endif
|
|
else
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SCSCR3,Serial Control Register 3"
|
|
sif (cpu()!="RZA1H"&&cpu()!="R7S721021")
|
|
bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="RZA1H")
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Baud rate generator/SCK input,External clk/SCK input,"
|
|
else
|
|
bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Internal clk/SCK output,External clk/SCK input,"
|
|
endif
|
|
endif
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "SCFSR3,Serial Status Register 3"
|
|
rbitfld.word 0x00 12.--15. " PER[3:0] ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.word 0x00 8.--11. " FER[3:0] ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ER ,Receive error" "No error,Error"
|
|
bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty"
|
|
bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected"
|
|
textline " "
|
|
rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error"
|
|
rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full"
|
|
bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "SCBRR3,Bit Rate Register 3"
|
|
if (((per.w(ad:0xE8008800))&0x80)==0x80)
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "SCFCR3,FIFO Control Register 3"
|
|
bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14"
|
|
bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger" "1,2,8,14"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)"
|
|
bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled"
|
|
else
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "SCFCR3,FIFO Control Register 3"
|
|
bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14"
|
|
bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger " "1,4,8,14"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)"
|
|
bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word 0x1C++0x01
|
|
line.word 0x00 "SCFDR3,FIFO Data Count Register 3"
|
|
bitfld.word 0x00 8.--12. " T[4:0] ,Number of non-transmitted data in SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--4. " R[4:0] ,Number of received data in SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "SCSPTR3,Serial Port Register 3"
|
|
bitfld.word 0x00 7. " RTSIO ,Serial port - RTS# pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 6. " RTSDT ,Serial port - RTS# pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 5. " CTSIO ,Serial port - CTS# pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 4. " CTSDT ,Serial port - CTS# pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SCKIO ,Serial port - clock pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 2. " SCKDT ,Serial port - clock pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Not output,Output"
|
|
bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "SCLSR3,Line Status Register 3"
|
|
sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021"))
|
|
bitfld.word 0x00 2. " TO ,Timeout" "No error,Error"
|
|
endif
|
|
textline " "
|
|
bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error"
|
|
sif (cpu()=="RZA1H")
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR3,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
endif
|
|
sif (cpu()=="R7S721021")
|
|
if (((per.w(ad:0xE8008800))&0x80)==0x0)
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR3,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed"
|
|
bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
else
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR3,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed"
|
|
rbitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
endif
|
|
endif
|
|
sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&!cpuis("R8A77980*")&&!cpuis("R8A77970*")&&!(cpuis("R8A77951")||cpuis("R8A77951-*"))&&!cpuis("R8A77995*")&&!cpuis("R8A77990*"))
|
|
group.word 0x30++0x01 "BRG 3"
|
|
line.word 0x00 "DL3,Frequency Division Register 3"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "CKS3,Clock Select Register 3"
|
|
bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK"
|
|
sif (cpu()=="R8A77440")||cpuis("R8A77951")||cpuis("R8A77951-*")||(cpu()=="R8A77930")||(cpu()=="R8A77970")||(cpu()=="R8A77420")
|
|
bitfld.word 0x00 14. " XIN ,Selects the baud rate generator source for the external clock between SCIF_CLK and ZS" "SCIF_CLK,ZS"
|
|
else
|
|
bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Channel 4"
|
|
base ad:0xE8009000
|
|
width 9.
|
|
hgroup.byte 0x14++0x00
|
|
hide.byte 0x00 "SCFRDR4,Receive FIFO Data Register 4"
|
|
in
|
|
wgroup.byte 0x0C++0x00
|
|
line.byte 0x00 "SCFTDR4,Transmit FIFO Data Register 4"
|
|
if (((per.w(ad:0xE8009000))&0xa0)==0x20)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR4,Serial Mode Register 4"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd"
|
|
textline " "
|
|
bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits"
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
elif (((per.w(ad:0xE8009000))&0xa0)==0x00)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR4,Serial Mode Register 4"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
else
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR4,Serial Mode Register 4"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
endif
|
|
if (((per.w(ad:0xE8009000))&0x80)==0x80)
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SCSCR4,Serial Control Register 4"
|
|
sif (cpu()!="RZA1H"&&cpu()!="R7S721021")
|
|
bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="RZA1H"||cpu()=="R7S721021")
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization output,Internal clk/SCK synchronization output,External clk/SCK synchronization input,"
|
|
else
|
|
bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization clk,Internal clk/SCK synchronization clk,External clk/SCK synchronization clk,?..."
|
|
endif
|
|
else
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SCSCR4,Serial Control Register 4"
|
|
sif (cpu()!="RZA1H"&&cpu()!="R7S721021")
|
|
bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="RZA1H")
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Baud rate generator/SCK input,External clk/SCK input,"
|
|
else
|
|
bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Internal clk/SCK output,External clk/SCK input,"
|
|
endif
|
|
endif
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "SCFSR4,Serial Status Register 4"
|
|
rbitfld.word 0x00 12.--15. " PER[3:0] ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.word 0x00 8.--11. " FER[3:0] ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ER ,Receive error" "No error,Error"
|
|
bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty"
|
|
bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected"
|
|
textline " "
|
|
rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error"
|
|
rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full"
|
|
bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "SCBRR4,Bit Rate Register 4"
|
|
if (((per.w(ad:0xE8009000))&0x80)==0x80)
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "SCFCR4,FIFO Control Register 4"
|
|
bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14"
|
|
bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger" "1,2,8,14"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)"
|
|
bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled"
|
|
else
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "SCFCR4,FIFO Control Register 4"
|
|
bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14"
|
|
bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger " "1,4,8,14"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)"
|
|
bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word 0x1C++0x01
|
|
line.word 0x00 "SCFDR4,FIFO Data Count Register 4"
|
|
bitfld.word 0x00 8.--12. " T[4:0] ,Number of non-transmitted data in SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--4. " R[4:0] ,Number of received data in SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "SCSPTR4,Serial Port Register 4"
|
|
bitfld.word 0x00 7. " RTSIO ,Serial port - RTS# pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 6. " RTSDT ,Serial port - RTS# pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 5. " CTSIO ,Serial port - CTS# pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 4. " CTSDT ,Serial port - CTS# pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SCKIO ,Serial port - clock pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 2. " SCKDT ,Serial port - clock pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Not output,Output"
|
|
bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "SCLSR4,Line Status Register 4"
|
|
sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021"))
|
|
bitfld.word 0x00 2. " TO ,Timeout" "No error,Error"
|
|
endif
|
|
textline " "
|
|
bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error"
|
|
sif (cpu()=="RZA1H")
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR4,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
endif
|
|
sif (cpu()=="R7S721021")
|
|
if (((per.w(ad:0xE8009000))&0x80)==0x0)
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR4,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed"
|
|
bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
else
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR4,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed"
|
|
rbitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
endif
|
|
endif
|
|
sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&!cpuis("R8A77980*")&&!cpuis("R8A77970*")&&!(cpuis("R8A77951")||cpuis("R8A77951-*"))&&!cpuis("R8A77995*")&&!cpuis("R8A77990*"))
|
|
group.word 0x30++0x01 "BRG 4"
|
|
line.word 0x00 "DL4,Frequency Division Register 4"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "CKS4,Clock Select Register 4"
|
|
bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK"
|
|
sif (cpu()=="R8A77440")||cpuis("R8A77951")||cpuis("R8A77951-*")||(cpu()=="R8A77930")||(cpu()=="R8A77970")||(cpu()=="R8A77420")
|
|
bitfld.word 0x00 14. " XIN ,Selects the baud rate generator source for the external clock between SCIF_CLK and ZS" "SCIF_CLK,ZS"
|
|
else
|
|
bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Channel 5"
|
|
base ad:0xE8009800
|
|
width 9.
|
|
hgroup.byte 0x14++0x00
|
|
hide.byte 0x00 "SCFRDR5,Receive FIFO Data Register 5"
|
|
in
|
|
wgroup.byte 0x0C++0x00
|
|
line.byte 0x00 "SCFTDR5,Transmit FIFO Data Register 5"
|
|
if (((per.w(ad:0xE8009800))&0xa0)==0x20)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR5,Serial Mode Register 5"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd"
|
|
textline " "
|
|
bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits"
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
elif (((per.w(ad:0xE8009800))&0xa0)==0x00)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR5,Serial Mode Register 5"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
else
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR5,Serial Mode Register 5"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
endif
|
|
if (((per.w(ad:0xE8009800))&0x80)==0x80)
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SCSCR5,Serial Control Register 5"
|
|
sif (cpu()!="RZA1H"&&cpu()!="R7S721021")
|
|
bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="RZA1H"||cpu()=="R7S721021")
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization output,Internal clk/SCK synchronization output,External clk/SCK synchronization input,"
|
|
else
|
|
bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization clk,Internal clk/SCK synchronization clk,External clk/SCK synchronization clk,?..."
|
|
endif
|
|
else
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SCSCR5,Serial Control Register 5"
|
|
sif (cpu()!="RZA1H"&&cpu()!="R7S721021")
|
|
bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="RZA1H")
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Baud rate generator/SCK input,External clk/SCK input,"
|
|
else
|
|
bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Internal clk/SCK output,External clk/SCK input,"
|
|
endif
|
|
endif
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "SCFSR5,Serial Status Register 5"
|
|
rbitfld.word 0x00 12.--15. " PER[3:0] ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.word 0x00 8.--11. " FER[3:0] ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ER ,Receive error" "No error,Error"
|
|
bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty"
|
|
bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected"
|
|
textline " "
|
|
rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error"
|
|
rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full"
|
|
bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "SCBRR5,Bit Rate Register 5"
|
|
if (((per.w(ad:0xE8009800))&0x80)==0x80)
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "SCFCR5,FIFO Control Register 5"
|
|
bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14"
|
|
bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger" "1,2,8,14"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)"
|
|
bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled"
|
|
else
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "SCFCR5,FIFO Control Register 5"
|
|
bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14"
|
|
bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger " "1,4,8,14"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)"
|
|
bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word 0x1C++0x01
|
|
line.word 0x00 "SCFDR5,FIFO Data Count Register 5"
|
|
bitfld.word 0x00 8.--12. " T[4:0] ,Number of non-transmitted data in SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--4. " R[4:0] ,Number of received data in SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "SCSPTR5,Serial Port Register 5"
|
|
bitfld.word 0x00 7. " RTSIO ,Serial port - RTS# pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 6. " RTSDT ,Serial port - RTS# pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 5. " CTSIO ,Serial port - CTS# pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 4. " CTSDT ,Serial port - CTS# pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SCKIO ,Serial port - clock pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 2. " SCKDT ,Serial port - clock pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Not output,Output"
|
|
bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "SCLSR5,Line Status Register 5"
|
|
sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021"))
|
|
bitfld.word 0x00 2. " TO ,Timeout" "No error,Error"
|
|
endif
|
|
textline " "
|
|
bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error"
|
|
sif (cpu()=="RZA1H")
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR5,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
endif
|
|
sif (cpu()=="R7S721021")
|
|
if (((per.w(ad:0xE8009800))&0x80)==0x0)
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR5,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed"
|
|
bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
else
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR5,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed"
|
|
rbitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
endif
|
|
endif
|
|
sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&!cpuis("R8A77980*")&&!cpuis("R8A77970*")&&!(cpuis("R8A77951")||cpuis("R8A77951-*"))&&!cpuis("R8A77995*")&&!cpuis("R8A77990*"))
|
|
group.word 0x30++0x01 "BRG 5"
|
|
line.word 0x00 "DL5,Frequency Division Register 5"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "CKS5,Clock Select Register 5"
|
|
bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK"
|
|
sif (cpu()=="R8A77440")||cpuis("R8A77951")||cpuis("R8A77951-*")||(cpu()=="R8A77930")||(cpu()=="R8A77970")||(cpu()=="R8A77420")
|
|
bitfld.word 0x00 14. " XIN ,Selects the baud rate generator source for the external clock between SCIF_CLK and ZS" "SCIF_CLK,ZS"
|
|
else
|
|
bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Channel 6"
|
|
base ad:0xE800A000
|
|
width 9.
|
|
hgroup.byte 0x14++0x00
|
|
hide.byte 0x00 "SCFRDR6,Receive FIFO Data Register 6"
|
|
in
|
|
wgroup.byte 0x0C++0x00
|
|
line.byte 0x00 "SCFTDR6,Transmit FIFO Data Register 6"
|
|
if (((per.w(ad:0xE800A000))&0xa0)==0x20)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR6,Serial Mode Register 6"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd"
|
|
textline " "
|
|
bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits"
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
elif (((per.w(ad:0xE800A000))&0xa0)==0x00)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR6,Serial Mode Register 6"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
else
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR6,Serial Mode Register 6"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
endif
|
|
if (((per.w(ad:0xE800A000))&0x80)==0x80)
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SCSCR6,Serial Control Register 6"
|
|
sif (cpu()!="RZA1H"&&cpu()!="R7S721021")
|
|
bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="RZA1H"||cpu()=="R7S721021")
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization output,Internal clk/SCK synchronization output,External clk/SCK synchronization input,"
|
|
else
|
|
bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization clk,Internal clk/SCK synchronization clk,External clk/SCK synchronization clk,?..."
|
|
endif
|
|
else
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SCSCR6,Serial Control Register 6"
|
|
sif (cpu()!="RZA1H"&&cpu()!="R7S721021")
|
|
bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="RZA1H")
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Baud rate generator/SCK input,External clk/SCK input,"
|
|
else
|
|
bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Internal clk/SCK output,External clk/SCK input,"
|
|
endif
|
|
endif
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "SCFSR6,Serial Status Register 6"
|
|
rbitfld.word 0x00 12.--15. " PER[3:0] ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.word 0x00 8.--11. " FER[3:0] ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ER ,Receive error" "No error,Error"
|
|
bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty"
|
|
bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected"
|
|
textline " "
|
|
rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error"
|
|
rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full"
|
|
bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "SCBRR6,Bit Rate Register 6"
|
|
if (((per.w(ad:0xE800A000))&0x80)==0x80)
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "SCFCR6,FIFO Control Register 6"
|
|
bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14"
|
|
bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger" "1,2,8,14"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)"
|
|
bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled"
|
|
else
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "SCFCR6,FIFO Control Register 6"
|
|
bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14"
|
|
bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger " "1,4,8,14"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)"
|
|
bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word 0x1C++0x01
|
|
line.word 0x00 "SCFDR6,FIFO Data Count Register 6"
|
|
bitfld.word 0x00 8.--12. " T[4:0] ,Number of non-transmitted data in SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--4. " R[4:0] ,Number of received data in SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "SCSPTR6,Serial Port Register 6"
|
|
bitfld.word 0x00 7. " RTSIO ,Serial port - RTS# pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 6. " RTSDT ,Serial port - RTS# pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 5. " CTSIO ,Serial port - CTS# pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 4. " CTSDT ,Serial port - CTS# pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SCKIO ,Serial port - clock pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 2. " SCKDT ,Serial port - clock pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Not output,Output"
|
|
bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "SCLSR6,Line Status Register 6"
|
|
sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021"))
|
|
bitfld.word 0x00 2. " TO ,Timeout" "No error,Error"
|
|
endif
|
|
textline " "
|
|
bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error"
|
|
sif (cpu()=="RZA1H")
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR6,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
endif
|
|
sif (cpu()=="R7S721021")
|
|
if (((per.w(ad:0xE800A000))&0x80)==0x0)
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR6,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed"
|
|
bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
else
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR6,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed"
|
|
rbitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
endif
|
|
endif
|
|
sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&!cpuis("R8A77980*")&&!cpuis("R8A77970*")&&!(cpuis("R8A77951")||cpuis("R8A77951-*"))&&!cpuis("R8A77995*")&&!cpuis("R8A77990*"))
|
|
group.word 0x30++0x01 "BRG 6"
|
|
line.word 0x00 "DL6,Frequency Division Register 6"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "CKS6,Clock Select Register 6"
|
|
bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK"
|
|
sif (cpu()=="R8A77440")||cpuis("R8A77951")||cpuis("R8A77951-*")||(cpu()=="R8A77930")||(cpu()=="R8A77970")||(cpu()=="R8A77420")
|
|
bitfld.word 0x00 14. " XIN ,Selects the baud rate generator source for the external clock between SCIF_CLK and ZS" "SCIF_CLK,ZS"
|
|
else
|
|
bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Channel 7"
|
|
base ad:0xE800A800
|
|
width 9.
|
|
hgroup.byte 0x14++0x00
|
|
hide.byte 0x00 "SCFRDR7,Receive FIFO Data Register 7"
|
|
in
|
|
wgroup.byte 0x0C++0x00
|
|
line.byte 0x00 "SCFTDR7,Transmit FIFO Data Register 7"
|
|
if (((per.w(ad:0xE800A800))&0xa0)==0x20)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR7,Serial Mode Register 7"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd"
|
|
textline " "
|
|
bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits"
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
elif (((per.w(ad:0xE800A800))&0xa0)==0x00)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR7,Serial Mode Register 7"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
else
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCSMR7,Serial Mode Register 7"
|
|
bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits"
|
|
textline " "
|
|
bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock"
|
|
endif
|
|
if (((per.w(ad:0xE800A800))&0x80)==0x80)
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SCSCR7,Serial Control Register 7"
|
|
sif (cpu()!="RZA1H"&&cpu()!="R7S721021")
|
|
bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="RZA1H"||cpu()=="R7S721021")
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization output,Internal clk/SCK synchronization output,External clk/SCK synchronization input,"
|
|
else
|
|
bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization clk,Internal clk/SCK synchronization clk,External clk/SCK synchronization clk,?..."
|
|
endif
|
|
else
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SCSCR7,Serial Control Register 7"
|
|
sif (cpu()!="RZA1H"&&cpu()!="R7S721021")
|
|
bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="RZA1H")
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Baud rate generator/SCK input,External clk/SCK input,"
|
|
else
|
|
bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Internal clk/SCK output,External clk/SCK input,"
|
|
endif
|
|
endif
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "SCFSR7,Serial Status Register 7"
|
|
rbitfld.word 0x00 12.--15. " PER[3:0] ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.word 0x00 8.--11. " FER[3:0] ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ER ,Receive error" "No error,Error"
|
|
bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty"
|
|
bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected"
|
|
textline " "
|
|
rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error"
|
|
rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full"
|
|
bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "SCBRR7,Bit Rate Register 7"
|
|
if (((per.w(ad:0xE800A800))&0x80)==0x80)
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "SCFCR7,FIFO Control Register 7"
|
|
bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14"
|
|
bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger" "1,2,8,14"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)"
|
|
bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled"
|
|
else
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "SCFCR7,FIFO Control Register 7"
|
|
bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14"
|
|
bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger " "1,4,8,14"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)"
|
|
bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled"
|
|
endif
|
|
rgroup.word 0x1C++0x01
|
|
line.word 0x00 "SCFDR7,FIFO Data Count Register 7"
|
|
bitfld.word 0x00 8.--12. " T[4:0] ,Number of non-transmitted data in SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--4. " R[4:0] ,Number of received data in SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "SCSPTR7,Serial Port Register 7"
|
|
bitfld.word 0x00 7. " RTSIO ,Serial port - RTS# pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 6. " RTSDT ,Serial port - RTS# pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 5. " CTSIO ,Serial port - CTS# pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 4. " CTSDT ,Serial port - CTS# pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SCKIO ,Serial port - clock pin input/output" "Not output,Output"
|
|
bitfld.word 0x00 2. " SCKDT ,Serial port - clock pin data" "Low level,High level"
|
|
textline " "
|
|
bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Not output,Output"
|
|
bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "SCLSR7,Line Status Register 7"
|
|
sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021"))
|
|
bitfld.word 0x00 2. " TO ,Timeout" "No error,Error"
|
|
endif
|
|
textline " "
|
|
bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error"
|
|
sif (cpu()=="RZA1H")
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR7,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
endif
|
|
sif (cpu()=="R7S721021")
|
|
if (((per.w(ad:0xE800A800))&0x80)==0x0)
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR7,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed"
|
|
bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
else
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCEMR7,Serial Extension Mode Register"
|
|
bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed"
|
|
rbitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times"
|
|
endif
|
|
endif
|
|
sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&!cpuis("R8A77980*")&&!cpuis("R8A77970*")&&!(cpuis("R8A77951")||cpuis("R8A77951-*"))&&!cpuis("R8A77995*")&&!cpuis("R8A77990*"))
|
|
group.word 0x30++0x01 "BRG 7"
|
|
line.word 0x00 "DL7,Frequency Division Register 7"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "CKS7,Clock Select Register 7"
|
|
bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK"
|
|
sif (cpu()=="R8A77440")||cpuis("R8A77951")||cpuis("R8A77951-*")||(cpu()=="R8A77930")||(cpu()=="R8A77970")||(cpu()=="R8A77420")
|
|
bitfld.word 0x00 14. " XIN ,Selects the baud rate generator source for the external clock between SCIF_CLK and ZS" "SCIF_CLK,ZS"
|
|
else
|
|
bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "SCI (Serial Communications Interface)"
|
|
tree "Channel 0"
|
|
base ad:0xE800B000
|
|
width 7.
|
|
hgroup.byte 0x05++0x0
|
|
hide.byte 0x00 "RDR0,Receive Data Register 0"
|
|
in
|
|
hgroup.byte 0x03++0x0
|
|
hide.byte 0x00 "TDR0,Transmit Data Register 0"
|
|
in
|
|
if ((((per.b(ad:0xE800B000+0x06))&0x1)==0x0)&&(((per.b(ad:0xE800B000))&0xA0)==0xA0))
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "SMR0,Serial Mode Register 0"
|
|
bitfld.byte 0x00 7. " CM ,Communications Mode" "Asynchronous,Synchronous"
|
|
bitfld.byte 0x00 6. " CHR ,Character Length" "8 bits,7 bits"
|
|
bitfld.byte 0x00 5. " PE ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " PM ,Parity Mode" "Even,Odd"
|
|
bitfld.byte 0x00 0.--1. " CKS ,Clock Select" "P1/1 clk,P1/4 clk,P1/16 clk,P1/64 clk"
|
|
elif ((((per.b(ad:0xE800B000+0x06))&0x1)==0x0)&&(((per.b(ad:0xE800B000))&0xA0)==0x80))
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "SMR0,Serial Mode Register 0"
|
|
bitfld.byte 0x00 7. " CM ,Communications Mode" "Asynchronous,Synchronous"
|
|
bitfld.byte 0x00 6. " CHR ,Character Length" "8 bits,7 bits"
|
|
bitfld.byte 0x00 5. " PE ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " CKS ,Clock Select" "P1/1 clk,P1/4 clk,P1/16 clk,P1/64 clk"
|
|
elif ((((per.b(ad:0xE800B000+0x06))&0x1)==0x0)&&(((per.b(ad:0xE800B000))&0xA0)==0x20))
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "SMR0,Serial Mode Register 0"
|
|
bitfld.byte 0x00 7. " CM ,Communications Mode" "Asynchronous,Synchronous"
|
|
bitfld.byte 0x00 6. " CHR ,Character Length" "8 bits,7 bits"
|
|
bitfld.byte 0x00 5. " PE ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " PM ,Parity Mode" "Even,Odd"
|
|
bitfld.byte 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits"
|
|
bitfld.byte 0x00 2. " MP ,Multi-Processor Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " CKS ,Clock Select" "P1/1 clk,P1/4 clk,P1/16 clk,P1/64 clk"
|
|
elif ((((per.b(ad:0xE800B000+0x06))&0x1)==0x0)&&(((per.b(ad:0xE800B000))&0xA0)==0x00))
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "SMR0,Serial Mode Register 0"
|
|
bitfld.byte 0x00 7. " CM ,Communications Mode" "Asynchronous,Synchronous"
|
|
bitfld.byte 0x00 6. " CHR ,Character Length" "8 bits,7 bits"
|
|
bitfld.byte 0x00 5. " PE ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits"
|
|
bitfld.byte 0x00 2. " MP ,Multi-Processor Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--1. " CKS ,Clock Select" "P1/1 clk,P1/4 clk,P1/16 clk,P1/64 clk"
|
|
elif ((((per.b(ad:0xE800B000+0x06))&0x1)==0x1)&&(((per.b(ad:0xE800B000))&0x20)==0x20))
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "SMR0,Serial Mode Register 0"
|
|
bitfld.byte 0x00 7. " GM ,GSM Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " BLK ,Block Transfer Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " PE ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " PM ,Parity Mode" "Even,Odd"
|
|
bitfld.byte 0x00 2.--3. " BCP ,Base Clock Pulse" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--1. " CKS ,Clock Select" "P1/1 clk,P1/4 clk,P1/16 clk,P1/64 clk"
|
|
elif ((((per.b(ad:0xE800B000+0x06))&0x1)==0x1)&&(((per.b(ad:0xE800B000))&0x20)==0x00))
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "SMR0,Serial Mode Register 0"
|
|
bitfld.byte 0x00 7. " GM ,GSM Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " BLK ,Block Transfer Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " PE ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2.--3. " BCP ,Base Clock Pulse" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--1. " CKS ,Clock Select" "P1/1 clk,P1/4 clk,P1/16 clk,P1/64 clk"
|
|
endif
|
|
if ((((per.b(ad:0xE800B000+0x06))&0x1)==0x0)&&(((per.b(ad:0xE800B000))&0x84)==(0x84||0x80)))
|
|
group.byte 0x02++0x0
|
|
line.byte 0x00 "SCR0,Serial Control Register 0"
|
|
bitfld.byte 0x00 7. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " TE ,Transmit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " RE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--1. " CKE ,Clock Enable" "Internal clk,Internal clk,External clk/SCK output,External clk/SCK input"
|
|
elif ((((per.b(ad:0xE800B000+0x06))&0x1)==0x0)&&(((per.b(ad:0xE800B000))&0x04)==0x04))
|
|
group.byte 0x02++0x0
|
|
line.byte 0x00 "SCR0,Serial Control Register 0"
|
|
bitfld.byte 0x00 7. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " TE ,Transmit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " RE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " MPIE ,Multi-Processor Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " CKE ,Clock Enable" "Baud rate gen./SCK IO,Baud rate gen./SCK clk,External clk,External clk"
|
|
elif ((((per.b(ad:0xE800B000+0x06))&0x1)==0x0)&&(((per.b(ad:0xE800B000))&0x04)==0x00))
|
|
group.byte 0x02++0x0
|
|
line.byte 0x00 "SCR0,Serial Control Register 0"
|
|
bitfld.byte 0x00 7. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " TE ,Transmit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " RE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--1. " CKE ,Clock Enable" "Baud rate gen./SCK IO,Baud rate gen./SCK clk,External clk,External clk"
|
|
elif ((((per.b(ad:0xE800B000+0x06))&0x1)==0x1)&&(((per.b(ad:0xE800B000))&0x80)==0x80))
|
|
group.byte 0x02++0x0
|
|
line.byte 0x00 "SCR0,Serial Control Register 0"
|
|
bitfld.byte 0x00 7. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " TE ,Transmit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " RE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--1. " CKE ,Clock Enable" "Low,Clk output,High,Clk output"
|
|
elif ((((per.b(ad:0xE800B000+0x06))&0x1)==0x1)&&(((per.b(ad:0xE800B000))&0x80)==0x00))
|
|
group.byte 0x02++0x0
|
|
line.byte 0x00 "SCR0,Serial Control Register 0"
|
|
bitfld.byte 0x00 7. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " TE ,Transmit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " RE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--1. " CKE ,Clock Enable" "Disabled,Enabled,,"
|
|
endif
|
|
if (((per.b(ad:0xE800B000+0x06))&0x0)==0x0)
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "SSR0,Serial Status Register 0"
|
|
bitfld.byte 0x00 5. " ORER ,Overrun Error Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " FER ,Framing Error Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 3. " PER ,Parity Error Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.byte 0x00 2. " TEND ,Transmit End Flag" "Low,High"
|
|
rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID"
|
|
bitfld.byte 0x00 0. " MPBT ,Multi-Processor Bit Transfer" "Data,ID"
|
|
else
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "SSR0,Serial Status Register 0"
|
|
bitfld.byte 0x00 5. " ORER ,Overrun Error Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " ERS ,Error Signal Status Flag" "Not respondend,Respondend"
|
|
bitfld.byte 0x00 3. " PER ,Parity Error Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.byte 0x00 2. " TEND ,Transmit End Flag" "Low,High"
|
|
endif
|
|
group.byte 0x06++0x0
|
|
line.byte 0x00 "SCMR0,Smart Card Mode Register 0"
|
|
bitfld.byte 0x00 7. " BCP2 ,Base Clock Pulse 2" "0,1"
|
|
bitfld.byte 0x00 3. " SDIR ,Transmitted/Received Data Transfer Direction" "LSB,MSB"
|
|
bitfld.byte 0x00 2. " SINV ,Transmitted/Received Data Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " SMIF ,Smart Card Interface Mode Select" "Serial communications,Smart card"
|
|
group.byte 0x01++0x0
|
|
line.byte 0x00 "BRR0,Bit Rate Register 0"
|
|
if ((((per.b(ad:0xE800B000))&0x80)==0x00)&&(((per.b(ad:0xE800B000+0x06))&0x1)==0x0))
|
|
group.byte 0x07++0x1
|
|
line.byte 0x00 "SEMR0,Serial Extended Mode Register 0"
|
|
bitfld.byte 0x00 5. " NFEN ,Digital Noise Filter Function Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " ABCS ,Asynchronous Mode Base Clock Select" "16 cycles x 1 bit,8 cycles x 1 bit"
|
|
line.byte 0x01 "SNFR,Noise Filter Setting Register"
|
|
bitfld.byte 0x01 0.--2. " NFCS ,Noise Filter Clock Select" "Clk/1,,,,,,,"
|
|
endif
|
|
group.byte 0x0D++0x0
|
|
line.byte 0x00 "SECR0,Extended Function Control Register 0"
|
|
bitfld.byte 0x00 1. " CTSE ,CTS Enable" "Disabled,Enabled"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0xE800B800
|
|
width 7.
|
|
hgroup.byte 0x05++0x0
|
|
hide.byte 0x00 "RDR1,Receive Data Register 1"
|
|
in
|
|
hgroup.byte 0x03++0x0
|
|
hide.byte 0x00 "TDR1,Transmit Data Register 1"
|
|
in
|
|
if ((((per.b(ad:0xE800B800+0x06))&0x1)==0x0)&&(((per.b(ad:0xE800B800))&0xA0)==0xA0))
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "SMR1,Serial Mode Register 1"
|
|
bitfld.byte 0x00 7. " CM ,Communications Mode" "Asynchronous,Synchronous"
|
|
bitfld.byte 0x00 6. " CHR ,Character Length" "8 bits,7 bits"
|
|
bitfld.byte 0x00 5. " PE ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " PM ,Parity Mode" "Even,Odd"
|
|
bitfld.byte 0x00 0.--1. " CKS ,Clock Select" "P1/1 clk,P1/4 clk,P1/16 clk,P1/64 clk"
|
|
elif ((((per.b(ad:0xE800B800+0x06))&0x1)==0x0)&&(((per.b(ad:0xE800B800))&0xA0)==0x80))
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "SMR1,Serial Mode Register 1"
|
|
bitfld.byte 0x00 7. " CM ,Communications Mode" "Asynchronous,Synchronous"
|
|
bitfld.byte 0x00 6. " CHR ,Character Length" "8 bits,7 bits"
|
|
bitfld.byte 0x00 5. " PE ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " CKS ,Clock Select" "P1/1 clk,P1/4 clk,P1/16 clk,P1/64 clk"
|
|
elif ((((per.b(ad:0xE800B800+0x06))&0x1)==0x0)&&(((per.b(ad:0xE800B800))&0xA0)==0x20))
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "SMR1,Serial Mode Register 1"
|
|
bitfld.byte 0x00 7. " CM ,Communications Mode" "Asynchronous,Synchronous"
|
|
bitfld.byte 0x00 6. " CHR ,Character Length" "8 bits,7 bits"
|
|
bitfld.byte 0x00 5. " PE ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " PM ,Parity Mode" "Even,Odd"
|
|
bitfld.byte 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits"
|
|
bitfld.byte 0x00 2. " MP ,Multi-Processor Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " CKS ,Clock Select" "P1/1 clk,P1/4 clk,P1/16 clk,P1/64 clk"
|
|
elif ((((per.b(ad:0xE800B800+0x06))&0x1)==0x0)&&(((per.b(ad:0xE800B800))&0xA0)==0x00))
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "SMR1,Serial Mode Register 1"
|
|
bitfld.byte 0x00 7. " CM ,Communications Mode" "Asynchronous,Synchronous"
|
|
bitfld.byte 0x00 6. " CHR ,Character Length" "8 bits,7 bits"
|
|
bitfld.byte 0x00 5. " PE ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits"
|
|
bitfld.byte 0x00 2. " MP ,Multi-Processor Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--1. " CKS ,Clock Select" "P1/1 clk,P1/4 clk,P1/16 clk,P1/64 clk"
|
|
elif ((((per.b(ad:0xE800B800+0x06))&0x1)==0x1)&&(((per.b(ad:0xE800B800))&0x20)==0x20))
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "SMR1,Serial Mode Register 1"
|
|
bitfld.byte 0x00 7. " GM ,GSM Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " BLK ,Block Transfer Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " PE ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " PM ,Parity Mode" "Even,Odd"
|
|
bitfld.byte 0x00 2.--3. " BCP ,Base Clock Pulse" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--1. " CKS ,Clock Select" "P1/1 clk,P1/4 clk,P1/16 clk,P1/64 clk"
|
|
elif ((((per.b(ad:0xE800B800+0x06))&0x1)==0x1)&&(((per.b(ad:0xE800B800))&0x20)==0x00))
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "SMR1,Serial Mode Register 1"
|
|
bitfld.byte 0x00 7. " GM ,GSM Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " BLK ,Block Transfer Mode" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " PE ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2.--3. " BCP ,Base Clock Pulse" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--1. " CKS ,Clock Select" "P1/1 clk,P1/4 clk,P1/16 clk,P1/64 clk"
|
|
endif
|
|
if ((((per.b(ad:0xE800B800+0x06))&0x1)==0x0)&&(((per.b(ad:0xE800B800))&0x84)==(0x84||0x80)))
|
|
group.byte 0x02++0x0
|
|
line.byte 0x00 "SCR1,Serial Control Register 1"
|
|
bitfld.byte 0x00 7. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " TE ,Transmit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " RE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--1. " CKE ,Clock Enable" "Internal clk,Internal clk,External clk/SCK output,External clk/SCK input"
|
|
elif ((((per.b(ad:0xE800B800+0x06))&0x1)==0x0)&&(((per.b(ad:0xE800B800))&0x04)==0x04))
|
|
group.byte 0x02++0x0
|
|
line.byte 0x00 "SCR1,Serial Control Register 1"
|
|
bitfld.byte 0x00 7. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " TE ,Transmit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " RE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " MPIE ,Multi-Processor Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " CKE ,Clock Enable" "Baud rate gen./SCK IO,Baud rate gen./SCK clk,External clk,External clk"
|
|
elif ((((per.b(ad:0xE800B800+0x06))&0x1)==0x0)&&(((per.b(ad:0xE800B800))&0x04)==0x00))
|
|
group.byte 0x02++0x0
|
|
line.byte 0x00 "SCR1,Serial Control Register 1"
|
|
bitfld.byte 0x00 7. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " TE ,Transmit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " RE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--1. " CKE ,Clock Enable" "Baud rate gen./SCK IO,Baud rate gen./SCK clk,External clk,External clk"
|
|
elif ((((per.b(ad:0xE800B800+0x06))&0x1)==0x1)&&(((per.b(ad:0xE800B800))&0x80)==0x80))
|
|
group.byte 0x02++0x0
|
|
line.byte 0x00 "SCR1,Serial Control Register 1"
|
|
bitfld.byte 0x00 7. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " TE ,Transmit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " RE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--1. " CKE ,Clock Enable" "Low,Clk output,High,Clk output"
|
|
elif ((((per.b(ad:0xE800B800+0x06))&0x1)==0x1)&&(((per.b(ad:0xE800B800))&0x80)==0x00))
|
|
group.byte 0x02++0x0
|
|
line.byte 0x00 "SCR1,Serial Control Register 1"
|
|
bitfld.byte 0x00 7. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " TE ,Transmit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " RE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--1. " CKE ,Clock Enable" "Disabled,Enabled,,"
|
|
endif
|
|
if (((per.b(ad:0xE800B800+0x06))&0x0)==0x0)
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "SSR1,Serial Status Register 1"
|
|
bitfld.byte 0x00 5. " ORER ,Overrun Error Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " FER ,Framing Error Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 3. " PER ,Parity Error Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.byte 0x00 2. " TEND ,Transmit End Flag" "Low,High"
|
|
rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID"
|
|
bitfld.byte 0x00 0. " MPBT ,Multi-Processor Bit Transfer" "Data,ID"
|
|
else
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "SSR1,Serial Status Register 1"
|
|
bitfld.byte 0x00 5. " ORER ,Overrun Error Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " ERS ,Error Signal Status Flag" "Not respondend,Respondend"
|
|
bitfld.byte 0x00 3. " PER ,Parity Error Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.byte 0x00 2. " TEND ,Transmit End Flag" "Low,High"
|
|
endif
|
|
group.byte 0x06++0x0
|
|
line.byte 0x00 "SCMR1,Smart Card Mode Register 1"
|
|
bitfld.byte 0x00 7. " BCP2 ,Base Clock Pulse 2" "0,1"
|
|
bitfld.byte 0x00 3. " SDIR ,Transmitted/Received Data Transfer Direction" "LSB,MSB"
|
|
bitfld.byte 0x00 2. " SINV ,Transmitted/Received Data Invert" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " SMIF ,Smart Card Interface Mode Select" "Serial communications,Smart card"
|
|
group.byte 0x01++0x0
|
|
line.byte 0x00 "BRR1,Bit Rate Register 1"
|
|
if ((((per.b(ad:0xE800B800))&0x80)==0x00)&&(((per.b(ad:0xE800B800+0x06))&0x1)==0x0))
|
|
group.byte 0x07++0x1
|
|
line.byte 0x00 "SEMR1,Serial Extended Mode Register 1"
|
|
bitfld.byte 0x00 5. " NFEN ,Digital Noise Filter Function Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " ABCS ,Asynchronous Mode Base Clock Select" "16 cycles x 1 bit,8 cycles x 1 bit"
|
|
line.byte 0x01 "SNFR,Noise Filter Setting Register"
|
|
bitfld.byte 0x01 0.--2. " NFCS ,Noise Filter Clock Select" "Clk/1,,,,,,,"
|
|
endif
|
|
group.byte 0x0D++0x0
|
|
line.byte 0x00 "SECR1,Extended Function Control Register 1"
|
|
bitfld.byte 0x00 1. " CTSE ,CTS Enable" "Disabled,Enabled"
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree.open "Renesas Serial Peripheral Interface"
|
|
tree "Channel 0"
|
|
base ad:0xE800C800
|
|
width 9.
|
|
group.byte 0x00++0x2
|
|
line.byte 0x00 "SPCR_0,Control Register"
|
|
bitfld.byte 0x00 7. " SPRIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " SPE ,SPI Function Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " SPTIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " SPEIE ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " MSTR ,Master/Slave Mode Select" "Slave,Master"
|
|
bitfld.byte 0x00 2. " MODFEN ,Mode Fault Error Detection Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "SSLP_0,Slave Select Polarity Register"
|
|
bitfld.byte 0x01 0. " SSLP ,SSL Signal Polarity Setting" "Low,High"
|
|
line.byte 0x02 "SPPCR_0,Pin Control Register"
|
|
bitfld.byte 0x02 5. " MOIFE ,Master-Mode Output Idle Value Fixing Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 4. " MOIFV ,Master-Mode Output Idle Fixed Value" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x02 0. " SPLP ,Loopback Mode" "Disabled,Enabled"
|
|
if (((per.b(ad:0xE800C800))&0x8)==0x0)
|
|
// SPCR[MSTR] == 0 (Slave Mode)
|
|
rgroup.byte 0x03++0x0
|
|
line.byte 0x00 "SPSR_0,Status Register"
|
|
bitfld.byte 0x00 7. " SPRF ,Receive Buffer Full Flag" "Not full,Full"
|
|
bitfld.byte 0x00 6. " TEND ,Transmit End Flag" "Not ended,Ended"
|
|
bitfld.byte 0x00 5. " SPTEF ,Transmit Buffer Empty Flag" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " MODF ,Mode Fault Error Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 0. " OVRF ,Overrun Error Flag" "Not occurred,Occurred"
|
|
else
|
|
rgroup.byte 0x03++0x0
|
|
line.byte 0x00 "SPSR_0,Status Register"
|
|
bitfld.byte 0x00 7. " SPRFF ,Receive Buffer Full Flag" "Not full,Full"
|
|
bitfld.byte 0x00 6. " TEND ,Transmit End Flag" "Not ended,Ended"
|
|
bitfld.byte 0x00 5. " SPTEF ,Transmit Buffer Empty Flag" "Not empty,Empty"
|
|
endif
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SPDR_0,Data Register"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "SPSCR_0,Sequence Control Register"
|
|
bitfld.byte 0x00 0.--1. " SPSLN ,Sequence Control Specification" "0->0->...,0->1->0->...,0->1->2->0->...,0->1->2->3->0->..."
|
|
rgroup.byte 0x09++0x0
|
|
line.byte 0x00 "SPSSR_0,Sequence Status Register"
|
|
bitfld.byte 0x00 0.--1. " SPCP ,Sequence Status" "SPCMD0,SPCMD1,SPCMD2,SPCMD3"
|
|
group.byte 0x0A++0x4
|
|
line.byte 0x00 "SPBR_0,Bit Rate Register"
|
|
line.byte 0x01 "SPDCR_0,Data Control Register"
|
|
bitfld.byte 0x01 7. " TXDMY ,Dummy Data Transmission Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 5.--6. " SPLW ,Access Width Specification" ",Bytes,Words,Longwords"
|
|
line.byte 0x02 "SPCKD_0,Clock Delay Register"
|
|
bitfld.byte 0x02 0.--2. " SCKDL ,RSPCK Delay Setting" "1 RSPCK,2 RSPCK,3 RSPCK,4 RSPCK,5 RSPCK,6 RSPCK,7 RSPCK,8 RSPCK"
|
|
line.byte 0x03 "SSLND_0,Slave Select Negation Delay Register"
|
|
bitfld.byte 0x03 0.--2. " SLNDL ,SSL Negation Delay Setting" "1 RSPCK,2 RSPCK,3 RSPCK,4 RSPCK,5 RSPCK,6 RSPCK,7 RSPCK,8 RSPCK"
|
|
line.byte 0x04 "SPND_0,Next-Access Delay Register"
|
|
bitfld.byte 0x04 0.--2. " SPNDL ,Next-Access Delay Setting" "1 RSPCK + 2P1,2 RSPCK + 2P1,3 RSPCK + 2P1,4 RSPCK + 2P1,5 RSPCK + 2P1,6 RSPCK + 2P1,7 RSPCK + 2P1,8 RSPCK + 2P1"
|
|
group.word 0x10++0x7
|
|
line.word 0x0 "SPCMD0_0,Command Register 0"
|
|
bitfld.word 0x0 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x0 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x0 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x0 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x0 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
line.word 0x2 "SPCMD1_0,Command Register 1"
|
|
bitfld.word 0x2 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x2 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x2 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x2 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x2 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x2 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x2 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x2 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x2 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
line.word 0x4 "SPCMD2_0,Command Register 2"
|
|
bitfld.word 0x4 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x4 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x4 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x4 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x4 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x4 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x4 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x4 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x4 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
line.word 0x6 "SPCMD3_0,Command Register 3"
|
|
bitfld.word 0x6 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x6 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x6 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x6 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x6 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x6 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x6 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x6 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x6 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
group.byte 0x20++0x0
|
|
line.byte 0x00 "SPBFCR_0,Buffer Control Register"
|
|
bitfld.byte 0x00 7. " TXRST ,Transmit Buffer Data Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 6. " RXRST ,Receive Buffer Data Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 4.--5. " TXTRG ,Transmit Buffer Data Triggering Number" "7 bytes,6 bytes,4 bytes,0 byte"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " RXTRG ,Receive Buffer Data Triggering Number" "1 byte,2 bytes,4 bytes,8 bytes,16 bytes,24 bytes,32 bytes,5 bytes"
|
|
rgroup.word 0x22++0x1
|
|
line.word 0x00 "SPBFDR_0,Buffer Data Count Register"
|
|
bitfld.word 0x00 8.--11. " T ,Transmit Data Byte Counter" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Full"
|
|
bitfld.word 0x00 0.--5. " R ,Receive Data Byte Counter" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,Full,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0xE800D000
|
|
width 9.
|
|
group.byte 0x00++0x2
|
|
line.byte 0x00 "SPCR_1,Control Register"
|
|
bitfld.byte 0x00 7. " SPRIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " SPE ,SPI Function Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " SPTIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " SPEIE ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " MSTR ,Master/Slave Mode Select" "Slave,Master"
|
|
bitfld.byte 0x00 2. " MODFEN ,Mode Fault Error Detection Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "SSLP_1,Slave Select Polarity Register"
|
|
bitfld.byte 0x01 0. " SSLP ,SSL Signal Polarity Setting" "Low,High"
|
|
line.byte 0x02 "SPPCR_1,Pin Control Register"
|
|
bitfld.byte 0x02 5. " MOIFE ,Master-Mode Output Idle Value Fixing Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 4. " MOIFV ,Master-Mode Output Idle Fixed Value" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x02 0. " SPLP ,Loopback Mode" "Disabled,Enabled"
|
|
if (((per.b(ad:0xE800D000))&0x8)==0x0)
|
|
// SPCR[MSTR] == 0 (Slave Mode)
|
|
rgroup.byte 0x03++0x0
|
|
line.byte 0x00 "SPSR_1,Status Register"
|
|
bitfld.byte 0x00 7. " SPRF ,Receive Buffer Full Flag" "Not full,Full"
|
|
bitfld.byte 0x00 6. " TEND ,Transmit End Flag" "Not ended,Ended"
|
|
bitfld.byte 0x00 5. " SPTEF ,Transmit Buffer Empty Flag" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " MODF ,Mode Fault Error Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 0. " OVRF ,Overrun Error Flag" "Not occurred,Occurred"
|
|
else
|
|
rgroup.byte 0x03++0x0
|
|
line.byte 0x00 "SPSR_1,Status Register"
|
|
bitfld.byte 0x00 7. " SPRFF ,Receive Buffer Full Flag" "Not full,Full"
|
|
bitfld.byte 0x00 6. " TEND ,Transmit End Flag" "Not ended,Ended"
|
|
bitfld.byte 0x00 5. " SPTEF ,Transmit Buffer Empty Flag" "Not empty,Empty"
|
|
endif
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SPDR_1,Data Register"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "SPSCR_1,Sequence Control Register"
|
|
bitfld.byte 0x00 0.--1. " SPSLN ,Sequence Control Specification" "0->0->...,0->1->0->...,0->1->2->0->...,0->1->2->3->0->..."
|
|
rgroup.byte 0x09++0x0
|
|
line.byte 0x00 "SPSSR_1,Sequence Status Register"
|
|
bitfld.byte 0x00 0.--1. " SPCP ,Sequence Status" "SPCMD0,SPCMD1,SPCMD2,SPCMD3"
|
|
group.byte 0x0A++0x4
|
|
line.byte 0x00 "SPBR_1,Bit Rate Register"
|
|
line.byte 0x01 "SPDCR_1,Data Control Register"
|
|
bitfld.byte 0x01 7. " TXDMY ,Dummy Data Transmission Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 5.--6. " SPLW ,Access Width Specification" ",Bytes,Words,Longwords"
|
|
line.byte 0x02 "SPCKD_1,Clock Delay Register"
|
|
bitfld.byte 0x02 0.--2. " SCKDL ,RSPCK Delay Setting" "1 RSPCK,2 RSPCK,3 RSPCK,4 RSPCK,5 RSPCK,6 RSPCK,7 RSPCK,8 RSPCK"
|
|
line.byte 0x03 "SSLND_1,Slave Select Negation Delay Register"
|
|
bitfld.byte 0x03 0.--2. " SLNDL ,SSL Negation Delay Setting" "1 RSPCK,2 RSPCK,3 RSPCK,4 RSPCK,5 RSPCK,6 RSPCK,7 RSPCK,8 RSPCK"
|
|
line.byte 0x04 "SPND_1,Next-Access Delay Register"
|
|
bitfld.byte 0x04 0.--2. " SPNDL ,Next-Access Delay Setting" "1 RSPCK + 2P1,2 RSPCK + 2P1,3 RSPCK + 2P1,4 RSPCK + 2P1,5 RSPCK + 2P1,6 RSPCK + 2P1,7 RSPCK + 2P1,8 RSPCK + 2P1"
|
|
group.word 0x10++0x7
|
|
line.word 0x0 "SPCMD0_1,Command Register 0"
|
|
bitfld.word 0x0 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x0 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x0 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x0 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x0 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
line.word 0x2 "SPCMD1_1,Command Register 1"
|
|
bitfld.word 0x2 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x2 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x2 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x2 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x2 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x2 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x2 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x2 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x2 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
line.word 0x4 "SPCMD2_1,Command Register 2"
|
|
bitfld.word 0x4 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x4 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x4 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x4 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x4 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x4 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x4 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x4 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x4 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
line.word 0x6 "SPCMD3_1,Command Register 3"
|
|
bitfld.word 0x6 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x6 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x6 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x6 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x6 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x6 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x6 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x6 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x6 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
group.byte 0x20++0x0
|
|
line.byte 0x00 "SPBFCR_1,Buffer Control Register"
|
|
bitfld.byte 0x00 7. " TXRST ,Transmit Buffer Data Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 6. " RXRST ,Receive Buffer Data Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 4.--5. " TXTRG ,Transmit Buffer Data Triggering Number" "7 bytes,6 bytes,4 bytes,0 byte"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " RXTRG ,Receive Buffer Data Triggering Number" "1 byte,2 bytes,4 bytes,8 bytes,16 bytes,24 bytes,32 bytes,5 bytes"
|
|
rgroup.word 0x22++0x1
|
|
line.word 0x00 "SPBFDR_1,Buffer Data Count Register"
|
|
bitfld.word 0x00 8.--11. " T ,Transmit Data Byte Counter" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Full"
|
|
bitfld.word 0x00 0.--5. " R ,Receive Data Byte Counter" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,Full,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 2"
|
|
base ad:0xE800D800
|
|
width 9.
|
|
group.byte 0x00++0x2
|
|
line.byte 0x00 "SPCR_2,Control Register"
|
|
bitfld.byte 0x00 7. " SPRIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " SPE ,SPI Function Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " SPTIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " SPEIE ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " MSTR ,Master/Slave Mode Select" "Slave,Master"
|
|
bitfld.byte 0x00 2. " MODFEN ,Mode Fault Error Detection Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "SSLP_2,Slave Select Polarity Register"
|
|
bitfld.byte 0x01 0. " SSLP ,SSL Signal Polarity Setting" "Low,High"
|
|
line.byte 0x02 "SPPCR_2,Pin Control Register"
|
|
bitfld.byte 0x02 5. " MOIFE ,Master-Mode Output Idle Value Fixing Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 4. " MOIFV ,Master-Mode Output Idle Fixed Value" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x02 0. " SPLP ,Loopback Mode" "Disabled,Enabled"
|
|
if (((per.b(ad:0xE800D800))&0x8)==0x0)
|
|
// SPCR[MSTR] == 0 (Slave Mode)
|
|
rgroup.byte 0x03++0x0
|
|
line.byte 0x00 "SPSR_2,Status Register"
|
|
bitfld.byte 0x00 7. " SPRF ,Receive Buffer Full Flag" "Not full,Full"
|
|
bitfld.byte 0x00 6. " TEND ,Transmit End Flag" "Not ended,Ended"
|
|
bitfld.byte 0x00 5. " SPTEF ,Transmit Buffer Empty Flag" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " MODF ,Mode Fault Error Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 0. " OVRF ,Overrun Error Flag" "Not occurred,Occurred"
|
|
else
|
|
rgroup.byte 0x03++0x0
|
|
line.byte 0x00 "SPSR_2,Status Register"
|
|
bitfld.byte 0x00 7. " SPRFF ,Receive Buffer Full Flag" "Not full,Full"
|
|
bitfld.byte 0x00 6. " TEND ,Transmit End Flag" "Not ended,Ended"
|
|
bitfld.byte 0x00 5. " SPTEF ,Transmit Buffer Empty Flag" "Not empty,Empty"
|
|
endif
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SPDR_2,Data Register"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "SPSCR_2,Sequence Control Register"
|
|
bitfld.byte 0x00 0.--1. " SPSLN ,Sequence Control Specification" "0->0->...,0->1->0->...,0->1->2->0->...,0->1->2->3->0->..."
|
|
rgroup.byte 0x09++0x0
|
|
line.byte 0x00 "SPSSR_2,Sequence Status Register"
|
|
bitfld.byte 0x00 0.--1. " SPCP ,Sequence Status" "SPCMD0,SPCMD1,SPCMD2,SPCMD3"
|
|
group.byte 0x0A++0x4
|
|
line.byte 0x00 "SPBR_2,Bit Rate Register"
|
|
line.byte 0x01 "SPDCR_2,Data Control Register"
|
|
bitfld.byte 0x01 7. " TXDMY ,Dummy Data Transmission Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 5.--6. " SPLW ,Access Width Specification" ",Bytes,Words,Longwords"
|
|
line.byte 0x02 "SPCKD_2,Clock Delay Register"
|
|
bitfld.byte 0x02 0.--2. " SCKDL ,RSPCK Delay Setting" "1 RSPCK,2 RSPCK,3 RSPCK,4 RSPCK,5 RSPCK,6 RSPCK,7 RSPCK,8 RSPCK"
|
|
line.byte 0x03 "SSLND_2,Slave Select Negation Delay Register"
|
|
bitfld.byte 0x03 0.--2. " SLNDL ,SSL Negation Delay Setting" "1 RSPCK,2 RSPCK,3 RSPCK,4 RSPCK,5 RSPCK,6 RSPCK,7 RSPCK,8 RSPCK"
|
|
line.byte 0x04 "SPND_2,Next-Access Delay Register"
|
|
bitfld.byte 0x04 0.--2. " SPNDL ,Next-Access Delay Setting" "1 RSPCK + 2P1,2 RSPCK + 2P1,3 RSPCK + 2P1,4 RSPCK + 2P1,5 RSPCK + 2P1,6 RSPCK + 2P1,7 RSPCK + 2P1,8 RSPCK + 2P1"
|
|
group.word 0x10++0x7
|
|
line.word 0x0 "SPCMD0_2,Command Register 0"
|
|
bitfld.word 0x0 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x0 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x0 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x0 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x0 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
line.word 0x2 "SPCMD1_2,Command Register 1"
|
|
bitfld.word 0x2 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x2 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x2 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x2 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x2 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x2 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x2 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x2 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x2 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
line.word 0x4 "SPCMD2_2,Command Register 2"
|
|
bitfld.word 0x4 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x4 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x4 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x4 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x4 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x4 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x4 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x4 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x4 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
line.word 0x6 "SPCMD3_2,Command Register 3"
|
|
bitfld.word 0x6 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x6 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x6 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x6 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x6 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x6 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x6 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x6 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x6 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
group.byte 0x20++0x0
|
|
line.byte 0x00 "SPBFCR_2,Buffer Control Register"
|
|
bitfld.byte 0x00 7. " TXRST ,Transmit Buffer Data Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 6. " RXRST ,Receive Buffer Data Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 4.--5. " TXTRG ,Transmit Buffer Data Triggering Number" "7 bytes,6 bytes,4 bytes,0 byte"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " RXTRG ,Receive Buffer Data Triggering Number" "1 byte,2 bytes,4 bytes,8 bytes,16 bytes,24 bytes,32 bytes,5 bytes"
|
|
rgroup.word 0x22++0x1
|
|
line.word 0x00 "SPBFDR_2,Buffer Data Count Register"
|
|
bitfld.word 0x00 8.--11. " T ,Transmit Data Byte Counter" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Full"
|
|
bitfld.word 0x00 0.--5. " R ,Receive Data Byte Counter" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,Full,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 3"
|
|
base ad:0xE800E000
|
|
width 9.
|
|
group.byte 0x00++0x2
|
|
line.byte 0x00 "SPCR_3,Control Register"
|
|
bitfld.byte 0x00 7. " SPRIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " SPE ,SPI Function Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " SPTIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " SPEIE ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " MSTR ,Master/Slave Mode Select" "Slave,Master"
|
|
bitfld.byte 0x00 2. " MODFEN ,Mode Fault Error Detection Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "SSLP_3,Slave Select Polarity Register"
|
|
bitfld.byte 0x01 0. " SSLP ,SSL Signal Polarity Setting" "Low,High"
|
|
line.byte 0x02 "SPPCR_3,Pin Control Register"
|
|
bitfld.byte 0x02 5. " MOIFE ,Master-Mode Output Idle Value Fixing Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 4. " MOIFV ,Master-Mode Output Idle Fixed Value" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x02 0. " SPLP ,Loopback Mode" "Disabled,Enabled"
|
|
if (((per.b(ad:0xE800E000))&0x8)==0x0)
|
|
// SPCR[MSTR] == 0 (Slave Mode)
|
|
rgroup.byte 0x03++0x0
|
|
line.byte 0x00 "SPSR_3,Status Register"
|
|
bitfld.byte 0x00 7. " SPRF ,Receive Buffer Full Flag" "Not full,Full"
|
|
bitfld.byte 0x00 6. " TEND ,Transmit End Flag" "Not ended,Ended"
|
|
bitfld.byte 0x00 5. " SPTEF ,Transmit Buffer Empty Flag" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " MODF ,Mode Fault Error Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 0. " OVRF ,Overrun Error Flag" "Not occurred,Occurred"
|
|
else
|
|
rgroup.byte 0x03++0x0
|
|
line.byte 0x00 "SPSR_3,Status Register"
|
|
bitfld.byte 0x00 7. " SPRFF ,Receive Buffer Full Flag" "Not full,Full"
|
|
bitfld.byte 0x00 6. " TEND ,Transmit End Flag" "Not ended,Ended"
|
|
bitfld.byte 0x00 5. " SPTEF ,Transmit Buffer Empty Flag" "Not empty,Empty"
|
|
endif
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SPDR_3,Data Register"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "SPSCR_3,Sequence Control Register"
|
|
bitfld.byte 0x00 0.--1. " SPSLN ,Sequence Control Specification" "0->0->...,0->1->0->...,0->1->2->0->...,0->1->2->3->0->..."
|
|
rgroup.byte 0x09++0x0
|
|
line.byte 0x00 "SPSSR_3,Sequence Status Register"
|
|
bitfld.byte 0x00 0.--1. " SPCP ,Sequence Status" "SPCMD0,SPCMD1,SPCMD2,SPCMD3"
|
|
group.byte 0x0A++0x4
|
|
line.byte 0x00 "SPBR_3,Bit Rate Register"
|
|
line.byte 0x01 "SPDCR_3,Data Control Register"
|
|
bitfld.byte 0x01 7. " TXDMY ,Dummy Data Transmission Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 5.--6. " SPLW ,Access Width Specification" ",Bytes,Words,Longwords"
|
|
line.byte 0x02 "SPCKD_3,Clock Delay Register"
|
|
bitfld.byte 0x02 0.--2. " SCKDL ,RSPCK Delay Setting" "1 RSPCK,2 RSPCK,3 RSPCK,4 RSPCK,5 RSPCK,6 RSPCK,7 RSPCK,8 RSPCK"
|
|
line.byte 0x03 "SSLND_3,Slave Select Negation Delay Register"
|
|
bitfld.byte 0x03 0.--2. " SLNDL ,SSL Negation Delay Setting" "1 RSPCK,2 RSPCK,3 RSPCK,4 RSPCK,5 RSPCK,6 RSPCK,7 RSPCK,8 RSPCK"
|
|
line.byte 0x04 "SPND_3,Next-Access Delay Register"
|
|
bitfld.byte 0x04 0.--2. " SPNDL ,Next-Access Delay Setting" "1 RSPCK + 2P1,2 RSPCK + 2P1,3 RSPCK + 2P1,4 RSPCK + 2P1,5 RSPCK + 2P1,6 RSPCK + 2P1,7 RSPCK + 2P1,8 RSPCK + 2P1"
|
|
group.word 0x10++0x7
|
|
line.word 0x0 "SPCMD0_3,Command Register 0"
|
|
bitfld.word 0x0 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x0 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x0 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x0 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x0 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
line.word 0x2 "SPCMD1_3,Command Register 1"
|
|
bitfld.word 0x2 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x2 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x2 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x2 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x2 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x2 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x2 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x2 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x2 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
line.word 0x4 "SPCMD2_3,Command Register 2"
|
|
bitfld.word 0x4 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x4 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x4 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x4 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x4 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x4 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x4 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x4 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x4 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
line.word 0x6 "SPCMD3_3,Command Register 3"
|
|
bitfld.word 0x6 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x6 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x6 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x6 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x6 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x6 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x6 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x6 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x6 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
group.byte 0x20++0x0
|
|
line.byte 0x00 "SPBFCR_3,Buffer Control Register"
|
|
bitfld.byte 0x00 7. " TXRST ,Transmit Buffer Data Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 6. " RXRST ,Receive Buffer Data Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 4.--5. " TXTRG ,Transmit Buffer Data Triggering Number" "7 bytes,6 bytes,4 bytes,0 byte"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " RXTRG ,Receive Buffer Data Triggering Number" "1 byte,2 bytes,4 bytes,8 bytes,16 bytes,24 bytes,32 bytes,5 bytes"
|
|
rgroup.word 0x22++0x1
|
|
line.word 0x00 "SPBFDR_3,Buffer Data Count Register"
|
|
bitfld.word 0x00 8.--11. " T ,Transmit Data Byte Counter" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Full"
|
|
bitfld.word 0x00 0.--5. " R ,Receive Data Byte Counter" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,Full,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 4"
|
|
base ad:0xE800E800
|
|
width 9.
|
|
group.byte 0x00++0x2
|
|
line.byte 0x00 "SPCR_4,Control Register"
|
|
bitfld.byte 0x00 7. " SPRIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " SPE ,SPI Function Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " SPTIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " SPEIE ,Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " MSTR ,Master/Slave Mode Select" "Slave,Master"
|
|
bitfld.byte 0x00 2. " MODFEN ,Mode Fault Error Detection Enable" "Disabled,Enabled"
|
|
line.byte 0x01 "SSLP_4,Slave Select Polarity Register"
|
|
bitfld.byte 0x01 0. " SSLP ,SSL Signal Polarity Setting" "Low,High"
|
|
line.byte 0x02 "SPPCR_4,Pin Control Register"
|
|
bitfld.byte 0x02 5. " MOIFE ,Master-Mode Output Idle Value Fixing Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 4. " MOIFV ,Master-Mode Output Idle Fixed Value" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x02 0. " SPLP ,Loopback Mode" "Disabled,Enabled"
|
|
if (((per.b(ad:0xE800E800))&0x8)==0x0)
|
|
// SPCR[MSTR] == 0 (Slave Mode)
|
|
rgroup.byte 0x03++0x0
|
|
line.byte 0x00 "SPSR_4,Status Register"
|
|
bitfld.byte 0x00 7. " SPRF ,Receive Buffer Full Flag" "Not full,Full"
|
|
bitfld.byte 0x00 6. " TEND ,Transmit End Flag" "Not ended,Ended"
|
|
bitfld.byte 0x00 5. " SPTEF ,Transmit Buffer Empty Flag" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " MODF ,Mode Fault Error Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 0. " OVRF ,Overrun Error Flag" "Not occurred,Occurred"
|
|
else
|
|
rgroup.byte 0x03++0x0
|
|
line.byte 0x00 "SPSR_4,Status Register"
|
|
bitfld.byte 0x00 7. " SPRFF ,Receive Buffer Full Flag" "Not full,Full"
|
|
bitfld.byte 0x00 6. " TEND ,Transmit End Flag" "Not ended,Ended"
|
|
bitfld.byte 0x00 5. " SPTEF ,Transmit Buffer Empty Flag" "Not empty,Empty"
|
|
endif
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SPDR_4,Data Register"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "SPSCR_4,Sequence Control Register"
|
|
bitfld.byte 0x00 0.--1. " SPSLN ,Sequence Control Specification" "0->0->...,0->1->0->...,0->1->2->0->...,0->1->2->3->0->..."
|
|
rgroup.byte 0x09++0x0
|
|
line.byte 0x00 "SPSSR_4,Sequence Status Register"
|
|
bitfld.byte 0x00 0.--1. " SPCP ,Sequence Status" "SPCMD0,SPCMD1,SPCMD2,SPCMD3"
|
|
group.byte 0x0A++0x4
|
|
line.byte 0x00 "SPBR_4,Bit Rate Register"
|
|
line.byte 0x01 "SPDCR_4,Data Control Register"
|
|
bitfld.byte 0x01 7. " TXDMY ,Dummy Data Transmission Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 5.--6. " SPLW ,Access Width Specification" ",Bytes,Words,Longwords"
|
|
line.byte 0x02 "SPCKD_4,Clock Delay Register"
|
|
bitfld.byte 0x02 0.--2. " SCKDL ,RSPCK Delay Setting" "1 RSPCK,2 RSPCK,3 RSPCK,4 RSPCK,5 RSPCK,6 RSPCK,7 RSPCK,8 RSPCK"
|
|
line.byte 0x03 "SSLND_4,Slave Select Negation Delay Register"
|
|
bitfld.byte 0x03 0.--2. " SLNDL ,SSL Negation Delay Setting" "1 RSPCK,2 RSPCK,3 RSPCK,4 RSPCK,5 RSPCK,6 RSPCK,7 RSPCK,8 RSPCK"
|
|
line.byte 0x04 "SPND_4,Next-Access Delay Register"
|
|
bitfld.byte 0x04 0.--2. " SPNDL ,Next-Access Delay Setting" "1 RSPCK + 2P1,2 RSPCK + 2P1,3 RSPCK + 2P1,4 RSPCK + 2P1,5 RSPCK + 2P1,6 RSPCK + 2P1,7 RSPCK + 2P1,8 RSPCK + 2P1"
|
|
group.word 0x10++0x7
|
|
line.word 0x0 "SPCMD0_4,Command Register 0"
|
|
bitfld.word 0x0 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x0 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x0 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x0 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x0 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
line.word 0x2 "SPCMD1_4,Command Register 1"
|
|
bitfld.word 0x2 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x2 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x2 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x2 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x2 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x2 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x2 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x2 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x2 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
line.word 0x4 "SPCMD2_4,Command Register 2"
|
|
bitfld.word 0x4 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x4 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x4 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x4 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x4 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x4 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x4 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x4 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x4 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
line.word 0x6 "SPCMD3_4,Command Register 3"
|
|
bitfld.word 0x6 15. " SCKDEN ,Clock Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x6 14. " SLNDEN ,SSL Negation Delay Setting Enable" "Disabled,Enabled"
|
|
bitfld.word 0x6 13. " SPNDEN ,Next-Access Delay Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x6 12. " LSBF ,LSB First" "MSB,LSB"
|
|
bitfld.word 0x6 8.--11. " SPB ,Transfer Data Length Setting" "-,,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,,,,,,,,16 bits"
|
|
bitfld.word 0x6 7. " SSLKP ,SSL Signal Level Keeping" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x6 2.--3. " BRDV ,Bit Rate Frequency Division Setting" "Base,/2,/4,/8"
|
|
bitfld.word 0x6 1. " CPOL ,SPCLK Polarity Setting" "Positive,Negative"
|
|
bitfld.word 0x6 0. " CPHA ,SPCLK Phase Setting" "Sampling on odd/Variation on even,Variation on odd/Sampling on even"
|
|
group.byte 0x20++0x0
|
|
line.byte 0x00 "SPBFCR_4,Buffer Control Register"
|
|
bitfld.byte 0x00 7. " TXRST ,Transmit Buffer Data Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 6. " RXRST ,Receive Buffer Data Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 4.--5. " TXTRG ,Transmit Buffer Data Triggering Number" "7 bytes,6 bytes,4 bytes,0 byte"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " RXTRG ,Receive Buffer Data Triggering Number" "1 byte,2 bytes,4 bytes,8 bytes,16 bytes,24 bytes,32 bytes,5 bytes"
|
|
rgroup.word 0x22++0x1
|
|
line.word 0x00 "SPBFDR_4,Buffer Data Count Register"
|
|
bitfld.word 0x00 8.--11. " T ,Transmit Data Byte Counter" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Full"
|
|
bitfld.word 0x00 0.--5. " R ,Receive Data Byte Counter" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,Full,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree.open "SPI Multi I/O Bus Controller"
|
|
tree "Channel 0"
|
|
base ad:0x3FEFA000
|
|
width 10.
|
|
group.long 0x00++0x13
|
|
line.long 0x00 "CMNCR0,Common Control Register 0"
|
|
bitfld.long 0x00 31. " MD ,Operating mode switch" "Ext. addr. space read,SPI operating"
|
|
bitfld.long 0x00 24. " SFDE ,Data swap setting for serial flash memory" "Not swapped,Swapped"
|
|
sif cpuis("R7S91*")
|
|
bitfld.long 0x00 22.--23. " MOIIO3 ,SPBIO3 fixed value for SPBSSL idle" "0,1,Last bit value,HI-Z"
|
|
newline
|
|
bitfld.long 0x00 20.--21. " MOIIO2 ,SPBIO2 fixed value for SPBSSL idle" "0,1,Last bit value,HI-Z"
|
|
bitfld.long 0x00 18.--19. " MOIIO1 ,SPBIO1 fixed value for SPBSSL idle" "0,1,Last bit value,HI-Z"
|
|
bitfld.long 0x00 16.--17. " MOIIO0 ,SPBIO0 fixed value for SPBSSL idle" "0,1,Last bit value,HI-Z"
|
|
newline
|
|
bitfld.long 0x00 14.--15. " IO3FV ,SPBIO3 fixed value for 1-bit/2-bit size" "0,1,Last bit value,HI-Z"
|
|
bitfld.long 0x00 12.--13. " IO2FV ,SPBIO2 fixed value for 1-bit/2-bit size" "0,1,Last bit value,HI-Z"
|
|
bitfld.long 0x00 8.--9. " IO0FV ,SPBIO0 fixed value for 1-bit size input" "0,1,Last bit value,HI-Z"
|
|
else
|
|
bitfld.long 0x00 22.--23. " MOIIO3 ,SPBSSL output idle value fix SPBIO30 and SPBIO31" "0,1,Last bit value,HI-Z"
|
|
newline
|
|
bitfld.long 0x00 20.--21. " MOIIO2 ,SPBSSL output idle value fix SPBIO20 and SPBIO21" "0,1,Last bit value,HI-Z"
|
|
bitfld.long 0x00 18.--19. " MOIIO1 ,SPBSSL output idle value fix SPBIO10 and SPBIO11" "0,1,Last bit value,HI-Z"
|
|
bitfld.long 0x00 16.--17. " MOIIO0 ,SPBSSL output idle value fix SPBIO00 and SPBIO01" "0,1,Last bit value,HI-Z"
|
|
newline
|
|
bitfld.long 0x00 14.--15. " IO3FV ,SPBIO30 and SPBIO31 fixed value for 1-bit/2-bit size" "0,1,Last bit value,HI-Z"
|
|
bitfld.long 0x00 12.--13. " IO2FV ,SPBIO20 and SPBIO21 fixed value for 1-bit/2-bit size" "0,1,Last bit value,HI-Z"
|
|
bitfld.long 0x00 8.--9. " IO0FV ,SPBIO00 and SPBIO01 fixed value for 1-bit size input" "0,1,Last bit value,HI-Z"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 6. " CPHAT ,Output shift" "Even,Odd"
|
|
bitfld.long 0x00 5. " CPHAR ,Input latch" "Odd,Even"
|
|
bitfld.long 0x00 4. " SSLP ,SPBSSL signal polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 3. " CPOL ,SPBSSL negation period SPBCLK output direction" "0,1"
|
|
sif cpuis("R7S91*")
|
|
bitfld.long 0x00 0.--1. " BSZ ,Data bus size" "1 memory,?..."
|
|
else
|
|
bitfld.long 0x00 0.--1. " BSZ ,Data bus size" "1 memory,2 memories,?..."
|
|
endif
|
|
line.long 0x04 "SSLDR0,SSL Delay Register 0"
|
|
bitfld.long 0x04 16.--18. " SPNDL ,Next access delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
bitfld.long 0x04 8.--10. " SLNDL ,SPBSSL negation delay" "1.5 cycles,2.5 cycles,3.5 cycles,4.5 cycles,5.5 cycles,6.5 cycles,7.5 cycles,8.5 cycles"
|
|
bitfld.long 0x04 0.--2. " SCKDL ,Clock delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
line.long 0x08 "SPBCR0,Bit Rate Register 0"
|
|
hexmask.long.byte 0x08 8.--15. 1. " SPBR ,Bit rate"
|
|
bitfld.long 0x08 0.--1. " BRDV ,Bit rate frequency division" "/1,/2,/4,/8"
|
|
line.long 0x0C "DRCR0,Data Read Control Register 0"
|
|
bitfld.long 0x0C 24. " SSLN ,SPBSSL negation" "No negation,Negation"
|
|
bitfld.long 0x0C 16.--19. " RBURST ,Read data burst length" "1 unit,2 units,3 units,4 units,5 units,6 units,7 units,8 units,9 units,10 units,11 units,12 units,13 units,14 units,15 units,16 units"
|
|
bitfld.long 0x0C 9. " RCF ,Read cache flush" "No flush,Flush"
|
|
newline
|
|
bitfld.long 0x0C 8. " RBE ,Read burst" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " SSLE ,SPBSSL negation" "After transfer,Address not continuous"
|
|
line.long 0x10 "DRCMR0,Data Read Command Setting Register 0"
|
|
hexmask.long.byte 0x10 16.--23. 1. " CMD ,Command"
|
|
hexmask.long.byte 0x10 0.--7. 1. " OCMD ,Optional command"
|
|
if (((per.l(ad:0x3FEFA000+0x1C))&0x800)==0x800)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "DREAR0,Data Read Extended Address Setting Register 0"
|
|
hexmask.long.byte 0x00 16.--23. 1. " EAV ,32-Bit extended upper address fixed value"
|
|
bitfld.long 0x00 0.--2. " EAC ,32-Bit extended external address valid range" "Bits [24:0] enabled,Bits [25:0] enabled,?..."
|
|
else
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "DREAR0,Data Read Extended Address Setting Register 0"
|
|
endif
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "DROPR0,Data Read Option Setting Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " OPD3 ,Option data 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPD2 ,Option data 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " OPD1 ,Option data 1"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPD0 ,Option data 0"
|
|
sif cpuis("R7S91*")
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DRENR0,Data Read Enable Setting Register 0"
|
|
bitfld.long 0x00 30.--31. " CDB ,Command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 28.--29. " OCDB ,Optional command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 24.--25. " ADB ,Address bit size" "1 bit,2 bits,4 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. " OPDB ,Option data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 16.--17. " DRDB ,Data read bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 15. " DME ,Dummy cycle enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. " CDE ,Command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " OCDE ,Optional command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " ADE ,Address enable" "Disabled,,,,,,,Address[23:0],,,,,,,,Address[31:0]"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " OPDE ,Option data enable" "Disabled,,,,,,,,OPD3,,,,OPD3/OPD2,,OPD3/OPD2/OPD1,OPD3/OPD2/OPD1/OPD0"
|
|
else
|
|
if (((per.l(ad:0x3FEFA000))&0x03)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DRENR0,Data Read Enable Setting Register 0"
|
|
bitfld.long 0x00 30.--31. " CDB ,Command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 28.--29. " OCDB ,Optional command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 24.--25. " ADB ,Address bit size" "1 bit,2 bits,4 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. " OPDB ,Option data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 16.--17. " DRDB ,Data read bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 15. " DME ,Dummy cycle enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. " CDE ,Command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " OCDE ,Optional command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " ADE ,Address enable" "Disabled,,,,,,,Address[23:0],,,,,,,,Address[31:0]"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " OPDE ,Option data enable" "Disabled,,,,,,,,OPD3,,,,OPD3/OPD2,,OPD3/OPD2/OPD1,OPD3/OPD2/OPD1/OPD0"
|
|
elif (((per.l(ad:0x3FEFA000))&0x03)==0x01)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DRENR0,Data Read Enable Setting Register 0"
|
|
bitfld.long 0x00 30.--31. " CDB ,Command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 28.--29. " OCDB ,Optional command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 24.--25. " ADB ,Address bit size" "1 bit,2 bits,4 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. " OPDB ,Option data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 16.--17. " DRDB ,Data read bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 15. " DME ,Dummy cycle enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. " CDE ,Command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " OCDE ,Optional command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " ADE ,Address enable" "Disabled,,,,,,,Address[24:1],,,,,,,,Address[32:1]"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " OPDE ,Option data enable" "Disabled,,,,,,,,OPD3,,,,OPD3/OPD2,,OPD3/OPD2/OPD1,OPD3/OPD2/OPD1/OPD0"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DRENR0,Data Read Enable Setting Register 0"
|
|
bitfld.long 0x00 30.--31. " CDB ,Command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 28.--29. " OCDB ,Optional command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 24.--25. " ADB ,Address bit size" "1 bit,2 bits,4 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. " OPDB ,Option data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 16.--17. " DRDB ,Data read bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 15. " DME ,Dummy cycle enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. " CDE ,Command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " OCDE ,Optional command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--7. " OPDE ,Option data enable" "Disabled,,,,,,,,OPD3,,,,OPD3/OPD2,,OPD3/OPD2/OPD1,OPD3/OPD2/OPD1/OPD0"
|
|
endif
|
|
endif
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "SMCR0,SPI Mode Control Register 0"
|
|
bitfld.long 0x00 8. " SSLKP ,SPBSSL signal level" "Negated,Maintained"
|
|
bitfld.long 0x00 2. " SPIRE ,Data read enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SPIWE ,Data write enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " SPIE ,SPI data transfer enable" "Disabled,Enabled"
|
|
line.long 0x04 "SMCMR0,SPI Mode Command Setting Register 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CMD ,Command"
|
|
hexmask.long.byte 0x04 0.--7. 1. " OCMD ,Optional command"
|
|
if (((per.l(ad:0x3FEFA000+0x30))&0x800)==0x800)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "SMADR0,SPI Mode Address Setting Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ADR[31:24] ,Address"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " ADR[23:0] ,Address"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "SMADR0,SPI Mode Address Setting Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " ADR[23:0] ,Address 0"
|
|
endif
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "SMOPR0,SPI Mode Option Setting Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " OPD3 ,Option data 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPD2 ,Option data 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " OPD1 ,Option data 1"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPD0 ,Option data 0"
|
|
sif cpuis("R7S91*")
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SMENR0,SPI Mode Enable Setting Register 0"
|
|
bitfld.long 0x00 30.--31. " CDB ,Command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 28.--29. " OCDB ,Optional command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 24.--25. " ADB ,Address bit size" "1 bit,2 bits,4 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. " OPDB ,Option data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 16.--17. " SPIDB ,Transfer data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 15. " DME ,Dummy cycle enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. " CDE ,Command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " OCDE ,Optional command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " ADE ,Address enable" "Disabled,,,,ADR[23:16],,ADR[23:8],ADR[23:0],,,,,,,,ADR[31:0]"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " OPDE ,Option data enable" "Disabled,,,,,,,,OPD3,,,,OPD3/OPD2,,OPD3/OPD2/OPD1,OPD3/OPD2/OPD1/OPD0"
|
|
bitfld.long 0x00 0.--3. " SPIDE ,Transfer data enable" "Not transferred,,,,,,,,8 bits,,,,16 bits,,,32 bits"
|
|
else
|
|
if (((per.l(ad:0x3FEFA000))&0x03)==0x00)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SMENR0,SPI Mode Enable Setting Register 0"
|
|
bitfld.long 0x00 30.--31. " CDB ,Command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 28.--29. " OCDB ,Optional command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 24.--25. " ADB ,Address bit size" "1 bit,2 bits,4 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. " OPDB ,Option data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 16.--17. " SPIDB ,Transfer data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 15. " DME ,Dummy cycle enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. " CDE ,Command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " OCDE ,Optional command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " ADE ,Address enable" "Disabled,,,,ADR[23:16],,ADR[23:8],ADR[23:0],,,,,,,,ADR[31:0]"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " OPDE ,Option data enable" "Disabled,,,,,,,,OPD3,,,,OPD3/OPD2,,OPD3/OPD2/OPD1,OPD3/OPD2/OPD1/OPD0"
|
|
bitfld.long 0x00 0.--3. " SPIDE ,Transfer data enable" "Not transferred,,,,,,,,8 bits,,,,16 bits,,,32 bits"
|
|
elif (((per.l(ad:0x3FEFA000))&0x03)==0x01)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SMENR0,SPI Mode Enable Setting Register 0"
|
|
bitfld.long 0x00 30.--31. " CDB ,Command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 28.--29. " OCDB ,Optional command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 24.--25. " ADB ,Address bit size" "1 bit,2 bits,4 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. " OPDB ,Option data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 16.--17. " SPIDB ,Transfer data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 15. " DME ,Dummy cycle enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. " CDE ,Command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " OCDE ,Optional command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " ADE ,Address enable" "Disabled,,,,ADR[23:16],,ADR[23:8],ADR[23:0],,,,,,,,ADR[31:0]"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " OPDE ,Option data enable" "Disabled,,,,,,,,OPD3,,,,OPD3/OPD2,,OPD3/OPD2/OPD1,OPD3/OPD2/OPD1/OPD0"
|
|
bitfld.long 0x00 0.--3. " SPIDE ,Transfer data enable" "Not transferred,,,,,,,,16 bits,,,,32 bits,,,64 bits"
|
|
else
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SMENR0,SPI Mode Enable Setting Register 0"
|
|
bitfld.long 0x00 30.--31. " CDB ,Command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 28.--29. " OCDB ,Optional command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 24.--25. " ADB ,Address bit size" "1 bit,2 bits,4 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. " OPDB ,Option data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 16.--17. " SPIDB ,Transfer data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 15. " DME ,Dummy cycle enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. " CDE ,Command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " OCDE ,Optional command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " ADE ,Address enable" "Disabled,,,,ADR[23:16],,ADR[23:8],ADR[23:0],,,,,,,,ADR[31:0]"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " OPDE ,Option data enable" "Disabled,,,,,,,,OPD3,,,,OPD3/OPD2,,OPD3/OPD2/OPD1,OPD3/OPD2/OPD1/OPD0"
|
|
endif
|
|
endif
|
|
sif cpuis("R7S721021")
|
|
if ((((per.l(ad:0x3FEFA000))&0x3)==0x1)||(((per.l(ad:0x3FEFA000))&0x3)==0x0))
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "SMRDR0_0,SPI Mode Read Data Register 0"
|
|
else
|
|
hgroup.long 0x38++0x03
|
|
hide.long 0x00 "SMRDR0_0,SPI Mode Read Data Register 0"
|
|
endif
|
|
else
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "SMRDR0_0,SPI Mode Read Data Register 0"
|
|
endif
|
|
sif !cpuis("R7S91*")
|
|
if (((per.l(ad:0x3FEFA000))&0x3)==0x1)
|
|
rgroup.long 0x3C++0x03
|
|
line.long 0x00 "SMRDR1_0,SPI Mode Read Data Register 1"
|
|
else
|
|
hgroup.long 0x3C++0x03
|
|
hide.long 0x00 "SMRDR1_0,SPI Mode Read Data Register 1"
|
|
endif
|
|
endif
|
|
sif cpuis("R7S721021")
|
|
if ((((per.l(ad:0x3FEFA000))&0x3)==0x1)||(((per.l(ad:0x3FEFA000))&0x3)==0x0))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "SMWDR0_0,SPI Mode Write Data Register 0"
|
|
else
|
|
hgroup.long 0x40++0x03
|
|
hide.long 0x00 "SMWDR0_0,SPI Mode Write Data Register 0"
|
|
endif
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "SMWDR0_0,SPI Mode Write Data Register 0"
|
|
endif
|
|
sif !cpuis("R7S91*")
|
|
if (((per.l(ad:0x3FEFA000))&0x3)==0x1)
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "SMWDR1_0,SPI Mode Write Data Register 1"
|
|
else
|
|
hgroup.long 0x44++0x03
|
|
hide.long 0x00 "SMWDR1_0,SPI Mode Write Data Register 1"
|
|
endif
|
|
endif
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "CMNSR0,Common Status Register"
|
|
sif cpuis("R7S91*")
|
|
bitfld.long 0x00 1. " SSLF ,SPBSSL pin monitor" "Not active,Active"
|
|
bitfld.long 0x00 0. " TEND ,Transfer end flag" "Not ended,Ended"
|
|
else
|
|
bitfld.long 0x00 1. " SSLF ,SPBSSL pin monitor" "Negated,Asserted"
|
|
bitfld.long 0x00 0. " TEND ,Transfer end flag" "Not ended,Ended"
|
|
endif
|
|
sif cpuis("R7S721021")||cpuis("R7S91*")
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "DRDMCR0,Data Read Dummy Cycle Setting Register"
|
|
bitfld.long 0x00 16.--17. " DMDB ,Dummy cycle bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 0.--2. " DMCYC ,Number of dummy cycles" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "SMDMCR0,SPI Mode Dummy Cycle Setting Register"
|
|
bitfld.long 0x00 16.--17. " DMDB ,Dummy cycle bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 0.--2. " DMCYC ,Number of dummy cycles" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
else
|
|
group.long 0x58++0x0F
|
|
line.long 0x00 "DRDMCR0,Data Read Dummy Cycle Setting Register"
|
|
bitfld.long 0x00 16.--17. " DMDB ,Dummy cycle bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 0.--2. " DMCYC ,Number of dummy cycles" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
line.long 0x04 "DRDRENR0,Data Read DDR Enable Register"
|
|
bitfld.long 0x04 8. " ADDRE ,Address DDR enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " OPDRE ,Option data DDR enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " DRDRE ,Data read DDR enable" "Disabled,Enabled"
|
|
line.long 0x08 "SMDMCR0,SPI Mode Dummy Cycle Setting Register"
|
|
bitfld.long 0x08 16.--17. " DMDB ,Dummy cycle bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x08 0.--2. " DMCYC ,Number of dummy cycles" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
line.long 0x0C "SMDRENR0,SPI Mode DDR Enable Register"
|
|
bitfld.long 0x0C 8. " ADDRE ,Address DDR enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 4. " OPDRE ,Option data DDR enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " DRDRE ,Data read DDR enable" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0x3FEFB000
|
|
width 10.
|
|
group.long 0x00++0x13
|
|
line.long 0x00 "CMNCR1,Common Control Register 1"
|
|
bitfld.long 0x00 31. " MD ,Operating mode switch" "Ext. addr. space read,SPI operating"
|
|
bitfld.long 0x00 24. " SFDE ,Data swap setting for serial flash memory" "Not swapped,Swapped"
|
|
sif cpuis("R7S91*")
|
|
bitfld.long 0x00 22.--23. " MOIIO3 ,SPBIO3 fixed value for SPBSSL idle" "0,1,Last bit value,HI-Z"
|
|
newline
|
|
bitfld.long 0x00 20.--21. " MOIIO2 ,SPBIO2 fixed value for SPBSSL idle" "0,1,Last bit value,HI-Z"
|
|
bitfld.long 0x00 18.--19. " MOIIO1 ,SPBIO1 fixed value for SPBSSL idle" "0,1,Last bit value,HI-Z"
|
|
bitfld.long 0x00 16.--17. " MOIIO0 ,SPBIO0 fixed value for SPBSSL idle" "0,1,Last bit value,HI-Z"
|
|
newline
|
|
bitfld.long 0x00 14.--15. " IO3FV ,SPBIO3 fixed value for 1-bit/2-bit size" "0,1,Last bit value,HI-Z"
|
|
bitfld.long 0x00 12.--13. " IO2FV ,SPBIO2 fixed value for 1-bit/2-bit size" "0,1,Last bit value,HI-Z"
|
|
bitfld.long 0x00 8.--9. " IO0FV ,SPBIO0 fixed value for 1-bit size input" "0,1,Last bit value,HI-Z"
|
|
else
|
|
bitfld.long 0x00 22.--23. " MOIIO3 ,SPBSSL output idle value fix SPBIO30 and SPBIO31" "0,1,Last bit value,HI-Z"
|
|
newline
|
|
bitfld.long 0x00 20.--21. " MOIIO2 ,SPBSSL output idle value fix SPBIO20 and SPBIO21" "0,1,Last bit value,HI-Z"
|
|
bitfld.long 0x00 18.--19. " MOIIO1 ,SPBSSL output idle value fix SPBIO10 and SPBIO11" "0,1,Last bit value,HI-Z"
|
|
bitfld.long 0x00 16.--17. " MOIIO0 ,SPBSSL output idle value fix SPBIO00 and SPBIO01" "0,1,Last bit value,HI-Z"
|
|
newline
|
|
bitfld.long 0x00 14.--15. " IO3FV ,SPBIO30 and SPBIO31 fixed value for 1-bit/2-bit size" "0,1,Last bit value,HI-Z"
|
|
bitfld.long 0x00 12.--13. " IO2FV ,SPBIO20 and SPBIO21 fixed value for 1-bit/2-bit size" "0,1,Last bit value,HI-Z"
|
|
bitfld.long 0x00 8.--9. " IO0FV ,SPBIO00 and SPBIO01 fixed value for 1-bit size input" "0,1,Last bit value,HI-Z"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 6. " CPHAT ,Output shift" "Even,Odd"
|
|
bitfld.long 0x00 5. " CPHAR ,Input latch" "Odd,Even"
|
|
bitfld.long 0x00 4. " SSLP ,SPBSSL signal polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 3. " CPOL ,SPBSSL negation period SPBCLK output direction" "0,1"
|
|
sif cpuis("R7S91*")
|
|
bitfld.long 0x00 0.--1. " BSZ ,Data bus size" "1 memory,?..."
|
|
else
|
|
bitfld.long 0x00 0.--1. " BSZ ,Data bus size" "1 memory,2 memories,?..."
|
|
endif
|
|
line.long 0x04 "SSLDR1,SSL Delay Register 1"
|
|
bitfld.long 0x04 16.--18. " SPNDL ,Next access delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
bitfld.long 0x04 8.--10. " SLNDL ,SPBSSL negation delay" "1.5 cycles,2.5 cycles,3.5 cycles,4.5 cycles,5.5 cycles,6.5 cycles,7.5 cycles,8.5 cycles"
|
|
bitfld.long 0x04 0.--2. " SCKDL ,Clock delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
line.long 0x08 "SPBCR1,Bit Rate Register 1"
|
|
hexmask.long.byte 0x08 8.--15. 1. " SPBR ,Bit rate"
|
|
bitfld.long 0x08 0.--1. " BRDV ,Bit rate frequency division" "/1,/2,/4,/8"
|
|
line.long 0x0C "DRCR1,Data Read Control Register 1"
|
|
bitfld.long 0x0C 24. " SSLN ,SPBSSL negation" "No negation,Negation"
|
|
bitfld.long 0x0C 16.--19. " RBURST ,Read data burst length" "1 unit,2 units,3 units,4 units,5 units,6 units,7 units,8 units,9 units,10 units,11 units,12 units,13 units,14 units,15 units,16 units"
|
|
bitfld.long 0x0C 9. " RCF ,Read cache flush" "No flush,Flush"
|
|
newline
|
|
bitfld.long 0x0C 8. " RBE ,Read burst" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " SSLE ,SPBSSL negation" "After transfer,Address not continuous"
|
|
line.long 0x10 "DRCMR1,Data Read Command Setting Register 1"
|
|
hexmask.long.byte 0x10 16.--23. 1. " CMD ,Command"
|
|
hexmask.long.byte 0x10 0.--7. 1. " OCMD ,Optional command"
|
|
if (((per.l(ad:0x3FEFB000+0x1C))&0x800)==0x800)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "DREAR1,Data Read Extended Address Setting Register 1"
|
|
hexmask.long.byte 0x00 16.--23. 1. " EAV ,32-Bit extended upper address fixed value"
|
|
bitfld.long 0x00 0.--2. " EAC ,32-Bit extended external address valid range" "Bits [24:0] enabled,Bits [25:0] enabled,?..."
|
|
else
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "DREAR1,Data Read Extended Address Setting Register 1"
|
|
endif
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "DROPR1,Data Read Option Setting Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " OPD3 ,Option data 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPD2 ,Option data 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " OPD1 ,Option data 1"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPD0 ,Option data 0"
|
|
sif cpuis("R7S91*")
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DRENR1,Data Read Enable Setting Register 1"
|
|
bitfld.long 0x00 30.--31. " CDB ,Command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 28.--29. " OCDB ,Optional command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 24.--25. " ADB ,Address bit size" "1 bit,2 bits,4 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. " OPDB ,Option data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 16.--17. " DRDB ,Data read bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 15. " DME ,Dummy cycle enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. " CDE ,Command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " OCDE ,Optional command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " ADE ,Address enable" "Disabled,,,,,,,Address[23:0],,,,,,,,Address[31:0]"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " OPDE ,Option data enable" "Disabled,,,,,,,,OPD3,,,,OPD3/OPD2,,OPD3/OPD2/OPD1,OPD3/OPD2/OPD1/OPD0"
|
|
else
|
|
if (((per.l(ad:0x3FEFB000))&0x03)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DRENR1,Data Read Enable Setting Register 1"
|
|
bitfld.long 0x00 30.--31. " CDB ,Command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 28.--29. " OCDB ,Optional command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 24.--25. " ADB ,Address bit size" "1 bit,2 bits,4 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. " OPDB ,Option data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 16.--17. " DRDB ,Data read bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 15. " DME ,Dummy cycle enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. " CDE ,Command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " OCDE ,Optional command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " ADE ,Address enable" "Disabled,,,,,,,Address[23:0],,,,,,,,Address[31:0]"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " OPDE ,Option data enable" "Disabled,,,,,,,,OPD3,,,,OPD3/OPD2,,OPD3/OPD2/OPD1,OPD3/OPD2/OPD1/OPD0"
|
|
elif (((per.l(ad:0x3FEFB000))&0x03)==0x01)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DRENR1,Data Read Enable Setting Register 1"
|
|
bitfld.long 0x00 30.--31. " CDB ,Command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 28.--29. " OCDB ,Optional command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 24.--25. " ADB ,Address bit size" "1 bit,2 bits,4 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. " OPDB ,Option data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 16.--17. " DRDB ,Data read bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 15. " DME ,Dummy cycle enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. " CDE ,Command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " OCDE ,Optional command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " ADE ,Address enable" "Disabled,,,,,,,Address[24:1],,,,,,,,Address[32:1]"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " OPDE ,Option data enable" "Disabled,,,,,,,,OPD3,,,,OPD3/OPD2,,OPD3/OPD2/OPD1,OPD3/OPD2/OPD1/OPD0"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DRENR1,Data Read Enable Setting Register 1"
|
|
bitfld.long 0x00 30.--31. " CDB ,Command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 28.--29. " OCDB ,Optional command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 24.--25. " ADB ,Address bit size" "1 bit,2 bits,4 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. " OPDB ,Option data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 16.--17. " DRDB ,Data read bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 15. " DME ,Dummy cycle enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. " CDE ,Command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " OCDE ,Optional command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--7. " OPDE ,Option data enable" "Disabled,,,,,,,,OPD3,,,,OPD3/OPD2,,OPD3/OPD2/OPD1,OPD3/OPD2/OPD1/OPD0"
|
|
endif
|
|
endif
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "SMCR1,SPI Mode Control Register 1"
|
|
bitfld.long 0x00 8. " SSLKP ,SPBSSL signal level" "Negated,Maintained"
|
|
bitfld.long 0x00 2. " SPIRE ,Data read enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SPIWE ,Data write enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " SPIE ,SPI data transfer enable" "Disabled,Enabled"
|
|
line.long 0x04 "SMCMR1,SPI Mode Command Setting Register 1"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CMD ,Command"
|
|
hexmask.long.byte 0x04 0.--7. 1. " OCMD ,Optional command"
|
|
if (((per.l(ad:0x3FEFB000+0x30))&0x800)==0x800)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "SMADR1,SPI Mode Address Setting Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ADR[31:24] ,Address"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " ADR[23:0] ,Address"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "SMADR1,SPI Mode Address Setting Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " ADR[23:0] ,Address 1"
|
|
endif
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "SMOPR1,SPI Mode Option Setting Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " OPD3 ,Option data 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPD2 ,Option data 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " OPD1 ,Option data 1"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPD0 ,Option data 0"
|
|
sif cpuis("R7S91*")
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SMENR1,SPI Mode Enable Setting Register 1"
|
|
bitfld.long 0x00 30.--31. " CDB ,Command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 28.--29. " OCDB ,Optional command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 24.--25. " ADB ,Address bit size" "1 bit,2 bits,4 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. " OPDB ,Option data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 16.--17. " SPIDB ,Transfer data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 15. " DME ,Dummy cycle enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. " CDE ,Command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " OCDE ,Optional command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " ADE ,Address enable" "Disabled,,,,ADR[23:16],,ADR[23:8],ADR[23:0],,,,,,,,ADR[31:0]"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " OPDE ,Option data enable" "Disabled,,,,,,,,OPD3,,,,OPD3/OPD2,,OPD3/OPD2/OPD1,OPD3/OPD2/OPD1/OPD0"
|
|
bitfld.long 0x00 0.--3. " SPIDE ,Transfer data enable" "Not transferred,,,,,,,,8 bits,,,,16 bits,,,32 bits"
|
|
else
|
|
if (((per.l(ad:0x3FEFB000))&0x03)==0x00)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SMENR1,SPI Mode Enable Setting Register 1"
|
|
bitfld.long 0x00 30.--31. " CDB ,Command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 28.--29. " OCDB ,Optional command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 24.--25. " ADB ,Address bit size" "1 bit,2 bits,4 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. " OPDB ,Option data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 16.--17. " SPIDB ,Transfer data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 15. " DME ,Dummy cycle enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. " CDE ,Command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " OCDE ,Optional command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " ADE ,Address enable" "Disabled,,,,ADR[23:16],,ADR[23:8],ADR[23:0],,,,,,,,ADR[31:0]"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " OPDE ,Option data enable" "Disabled,,,,,,,,OPD3,,,,OPD3/OPD2,,OPD3/OPD2/OPD1,OPD3/OPD2/OPD1/OPD0"
|
|
bitfld.long 0x00 0.--3. " SPIDE ,Transfer data enable" "Not transferred,,,,,,,,8 bits,,,,16 bits,,,32 bits"
|
|
elif (((per.l(ad:0x3FEFB000))&0x03)==0x01)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SMENR1,SPI Mode Enable Setting Register 1"
|
|
bitfld.long 0x00 30.--31. " CDB ,Command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 28.--29. " OCDB ,Optional command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 24.--25. " ADB ,Address bit size" "1 bit,2 bits,4 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. " OPDB ,Option data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 16.--17. " SPIDB ,Transfer data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 15. " DME ,Dummy cycle enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. " CDE ,Command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " OCDE ,Optional command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " ADE ,Address enable" "Disabled,,,,ADR[23:16],,ADR[23:8],ADR[23:0],,,,,,,,ADR[31:0]"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " OPDE ,Option data enable" "Disabled,,,,,,,,OPD3,,,,OPD3/OPD2,,OPD3/OPD2/OPD1,OPD3/OPD2/OPD1/OPD0"
|
|
bitfld.long 0x00 0.--3. " SPIDE ,Transfer data enable" "Not transferred,,,,,,,,16 bits,,,,32 bits,,,64 bits"
|
|
else
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SMENR1,SPI Mode Enable Setting Register 1"
|
|
bitfld.long 0x00 30.--31. " CDB ,Command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 28.--29. " OCDB ,Optional command bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 24.--25. " ADB ,Address bit size" "1 bit,2 bits,4 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. " OPDB ,Option data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 16.--17. " SPIDB ,Transfer data bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 15. " DME ,Dummy cycle enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. " CDE ,Command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " OCDE ,Optional command enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " ADE ,Address enable" "Disabled,,,,ADR[23:16],,ADR[23:8],ADR[23:0],,,,,,,,ADR[31:0]"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " OPDE ,Option data enable" "Disabled,,,,,,,,OPD3,,,,OPD3/OPD2,,OPD3/OPD2/OPD1,OPD3/OPD2/OPD1/OPD0"
|
|
endif
|
|
endif
|
|
sif cpuis("R7S721021")
|
|
if ((((per.l(ad:0x3FEFB000))&0x3)==0x1)||(((per.l(ad:0x3FEFB000))&0x3)==0x0))
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "SMRDR0_1,SPI Mode Read Data Register 0"
|
|
else
|
|
hgroup.long 0x38++0x03
|
|
hide.long 0x00 "SMRDR0_1,SPI Mode Read Data Register 0"
|
|
endif
|
|
else
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "SMRDR0_1,SPI Mode Read Data Register 0"
|
|
endif
|
|
sif !cpuis("R7S91*")
|
|
if (((per.l(ad:0x3FEFB000))&0x3)==0x1)
|
|
rgroup.long 0x3C++0x03
|
|
line.long 0x00 "SMRDR1_1,SPI Mode Read Data Register 1"
|
|
else
|
|
hgroup.long 0x3C++0x03
|
|
hide.long 0x00 "SMRDR1_1,SPI Mode Read Data Register 1"
|
|
endif
|
|
endif
|
|
sif cpuis("R7S721021")
|
|
if ((((per.l(ad:0x3FEFB000))&0x3)==0x1)||(((per.l(ad:0x3FEFB000))&0x3)==0x0))
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "SMWDR0_1,SPI Mode Write Data Register 0"
|
|
else
|
|
hgroup.long 0x40++0x03
|
|
hide.long 0x00 "SMWDR0_1,SPI Mode Write Data Register 0"
|
|
endif
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "SMWDR0_1,SPI Mode Write Data Register 0"
|
|
endif
|
|
sif !cpuis("R7S91*")
|
|
if (((per.l(ad:0x3FEFB000))&0x3)==0x1)
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "SMWDR1_1,SPI Mode Write Data Register 1"
|
|
else
|
|
hgroup.long 0x44++0x03
|
|
hide.long 0x00 "SMWDR1_1,SPI Mode Write Data Register 1"
|
|
endif
|
|
endif
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "CMNSR1,Common Status Register"
|
|
sif cpuis("R7S91*")
|
|
bitfld.long 0x00 1. " SSLF ,SPBSSL pin monitor" "Not active,Active"
|
|
bitfld.long 0x00 0. " TEND ,Transfer end flag" "Not ended,Ended"
|
|
else
|
|
bitfld.long 0x00 1. " SSLF ,SPBSSL pin monitor" "Negated,Asserted"
|
|
bitfld.long 0x00 0. " TEND ,Transfer end flag" "Not ended,Ended"
|
|
endif
|
|
sif cpuis("R7S721021")||cpuis("R7S91*")
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "DRDMCR1,Data Read Dummy Cycle Setting Register"
|
|
bitfld.long 0x00 16.--17. " DMDB ,Dummy cycle bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 0.--2. " DMCYC ,Number of dummy cycles" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "SMDMCR1,SPI Mode Dummy Cycle Setting Register"
|
|
bitfld.long 0x00 16.--17. " DMDB ,Dummy cycle bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 0.--2. " DMCYC ,Number of dummy cycles" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
else
|
|
group.long 0x58++0x0F
|
|
line.long 0x00 "DRDMCR1,Data Read Dummy Cycle Setting Register"
|
|
bitfld.long 0x00 16.--17. " DMDB ,Dummy cycle bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x00 0.--2. " DMCYC ,Number of dummy cycles" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
line.long 0x04 "DRDRENR1,Data Read DDR Enable Register"
|
|
bitfld.long 0x04 8. " ADDRE ,Address DDR enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " OPDRE ,Option data DDR enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " DRDRE ,Data read DDR enable" "Disabled,Enabled"
|
|
line.long 0x08 "SMDMCR1,SPI Mode Dummy Cycle Setting Register"
|
|
bitfld.long 0x08 16.--17. " DMDB ,Dummy cycle bit size" "1 bit,2 bits,4 bits,?..."
|
|
bitfld.long 0x08 0.--2. " DMCYC ,Number of dummy cycles" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
line.long 0x0C "SMDRENR1,SPI Mode DDR Enable Register"
|
|
bitfld.long 0x0C 8. " ADDRE ,Address DDR enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 4. " OPDRE ,Option data DDR enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " DRDRE ,Data read DDR enable" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "RIIC (I2C Bus Interface)"
|
|
tree "RIIC 0"
|
|
base ad:0xFCFEE000
|
|
width 11.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "RIIC0CR1,I2C0 Bus Control Register 1"
|
|
bitfld.long 0x00 7. " ICE ,I2C Bus Interface Internal Reset" "No reset,Reset"
|
|
bitfld.long 0x00 6. " IICRST ,I2C Bus Interface Internal Reset" "Not reset,Reset"
|
|
bitfld.long 0x00 5. " CLO ,Extra SCL Clock Cycle Output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SOWP ,SCLO/SDAO Write Protect" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SCLO ,SDA Output Control" "Low,High"
|
|
bitfld.long 0x00 2. " SDAO ,SDA Output Control" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " SCLI ,SCL Bus Input Monitor" "Low,High"
|
|
rbitfld.long 0x00 0. " SDAI ,SDA Bus Input Monitor" "Low,High"
|
|
line.long 0x04 "RIIC0CR2,I2C0 Bus Control Register 2"
|
|
rbitfld.long 0x04 7. " BBSY ,Bus Busy Detection Flag" "Released,Occupied"
|
|
rbitfld.long 0x04 6. " MST ,Master/Slave Mode" "Slave,Master"
|
|
rbitfld.long 0x04 5. " TRS ,Transmit/Receive Mode" "Receive,Transmit"
|
|
textline " "
|
|
bitfld.long 0x04 3. " SP ,Stop Condition Issuance Request" "Not requested,Requested"
|
|
bitfld.long 0x04 2. " RS ,Restart Condition Issuance Request" "Not requested,Requested"
|
|
bitfld.long 0x04 1. " ST ,Start Condition Issuance Request" "Not requested,Requested"
|
|
line.long 0x08 "RIIC0MR1,I2C0 Bus Mode Register 1"
|
|
bitfld.long 0x08 4.--6. " CKS ,Internal Reference Clock Selection" "P0/1,P0/2,P0/4,P0/8,P0/16,P0/32,P0/64,P0/128"
|
|
bitfld.long 0x08 3. " BCWP ,BC Write Protect" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--2. " BC ,Bit Counter" "9 bits,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits"
|
|
if (((per.l(ad:0xFCFEE000+0x0C))&0x80)==0x80)
|
|
// THIS[DLCS] == 1 (IIC/2)
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "RIIC0MR2,I2C0 Bus Mode Register 2"
|
|
bitfld.long 0x00 7. " DLCS ,SDA Output Delay Clock Source Selection" "IIC,IIC/2"
|
|
bitfld.long 0x00 4.--6. " SDDL ,SDA Output Delay Counter" "No delay,1 or 2 cycles,3 or 4 cycles,5 or 6 cycles,7 or 8 cycles,,,"
|
|
bitfld.long 0x00 2. " TMOH ,Timeout H Count Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TMOL ,Timeout L Count Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TMOS ,Timeout Detection Time Selection" "Long,Short"
|
|
else
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "RIIC0MR2,I2C0 Bus Mode Register 2"
|
|
bitfld.long 0x00 7. " DLCS ,SDA Output Delay Clock Source Selection" "IIC,IIC/2"
|
|
bitfld.long 0x00 4.--6. " SDDL ,SDA Output Delay Counter" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles"
|
|
bitfld.long 0x00 2. " TMOH ,Timeout H Count Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TMOL ,Timeout L Count Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TMOS ,Timeout Detection Time Selection" "Long,Short"
|
|
endif
|
|
group.long 0x10++0x17
|
|
line.long 0x00 "RIIC0MR3,I2C0 Bus Mode Register 3"
|
|
bitfld.long 0x00 7. " SMBE ,SMBus Pin Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " WAIT ,WAIT" "No wait,Wait"
|
|
bitfld.long 0x00 5. " RDRFS ,RDRF Flag Set Timing Selection" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ACKWP ,ACKBT Write Protect" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ACKBT ,Transmit Acknowledge" "Low,High"
|
|
rbitfld.long 0x00 2. " ACKBR ,Receive Acknowledge" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " NF ,Noise Filter Stage Selection" "Single-stage,2-stage,3-stage,4-stage"
|
|
line.long 0x04 "RIIC0FER,I2C0 Bus Function Enable Register"
|
|
bitfld.long 0x04 6. " SCLE ,SCL Synchronous Circuit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " NFE ,Digital Noise Filter Circuit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " NACKE ,NACK Reception Transfer Suspension Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " SALE ,Slave Arbitration-Lost Detection Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " NALE ,NACK Transmission Arbitration-Lost Detection Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " MALE ,Master Arbitration-Lost Detection Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " TMOE ,Timeout Function Enable" "Disabled,Enabled"
|
|
line.long 0x08 "RIIC0SER,I2C0 Bus Status Enable Register"
|
|
bitfld.long 0x08 7. " HOAE ,Host Address Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " DIDE ,Device-ID Address Detection Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " GCE ,General Call Address Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 2. " SAR2 ,Slave Address Register 2 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " SAR1 ,Slave Address Register 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " SAR0 ,Slave Address Register 0 Enable" "Disabled,Enabled"
|
|
line.long 0x0C "RIIC0IER,I2C0 Bus Interrupt Enable Register"
|
|
bitfld.long 0x0C 7. " TIE ,Transmit Data Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 6. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 5. " RIE ,Receive Data Full Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " NAKIE ,NACK Reception Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " SPIE ,Stop Condition Detection Interrupt Enable (SPI)" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " STIE ,Start Condition Detection Interrupt Enable (STI)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " ALIE ,Arbitration-Lost Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " TMOIE ,Timeout Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x10 "RIIC0SR1,I2C0 Bus Status Register 1"
|
|
bitfld.long 0x10 7. " RIIC0HOA ,Host Address Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x10 5. " RIIC0DID ,Device-ID Address Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x10 3. " RIIC0GCA ,General Call Address Detection Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x10 2. " RIIC0AAS2 ,Slave Address 2 Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x10 1. " RIIC0AAS1 ,Slave Address 1 Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x10 0. " RIIC0AAS0 ,Slave Address 0 Detection Flag" "Not detected,Detected"
|
|
line.long 0x14 "RIIC0SR2,I2C0 Bus Status Register 2"
|
|
rbitfld.long 0x14 7. " RIIC0TDRE ,Transmit Data Empty Flag" "Not empty,Empty"
|
|
bitfld.long 0x14 6. " RIIC0TEND ,Transmit End Flag" "Not ended,Ended"
|
|
bitfld.long 0x14 5. " RIIC0RDRF ,Receive Data Full Flag" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x14 4. " RIIC0NACKF ,NACK Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x14 3. " RIIC0STOP ,Stop Condition Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x14 2. " RIIC0START ,Start Condition Detection Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x14 1. " RIIC0AL ,Arbitration-Lost Flag" "Not lost,Lost"
|
|
bitfld.long 0x14 0. " RIIC0TMOF ,Timeout Detection Flag" "Not detected,Detected"
|
|
if (((per.l(ad:0xFCFEE000+0x28))&0x8000)==0x8000)
|
|
group.long 0x28++0xB
|
|
line.long 0x00 "RIIC0SAR0,I2C0 Slave Address Register 0"
|
|
bitfld.long 0x00 15. " FS0 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.word 0x00 1.--9. 0x80 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
bitfld.long 0x00 0. " SVA0 ,10-Bit Address LSB" "0,1"
|
|
else
|
|
group.long 0x28++0xB
|
|
line.long 0x00 "RIIC0SAR0,I2C0 Slave Address Register 0"
|
|
bitfld.long 0x00 15. " FS0 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
endif
|
|
if (((per.l(ad:0xFCFEE000+0x2C))&0x8000)==0x8000)
|
|
group.long 0x2C++0xB
|
|
line.long 0x00 "RIIC0SAR1,I2C0 Slave Address Register 1"
|
|
bitfld.long 0x00 15. " FS1 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.word 0x00 1.--9. 0x80 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
bitfld.long 0x00 0. " SVA0 ,10-Bit Address LSB" "0,1"
|
|
else
|
|
group.long 0x2C++0xB
|
|
line.long 0x00 "RIIC0SAR1,I2C0 Slave Address Register 1"
|
|
bitfld.long 0x00 15. " FS1 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
endif
|
|
if (((per.l(ad:0xFCFEE000+0x30))&0x8000)==0x8000)
|
|
group.long 0x30++0xB
|
|
line.long 0x00 "RIIC0SAR2,I2C0 Slave Address Register 2"
|
|
bitfld.long 0x00 15. " FS2 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.word 0x00 1.--9. 0x80 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
bitfld.long 0x00 0. " SVA0 ,10-Bit Address LSB" "0,1"
|
|
else
|
|
group.long 0x30++0xB
|
|
line.long 0x00 "RIIC0SAR2,I2C0 Slave Address Register 2"
|
|
bitfld.long 0x00 15. " FS2 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
endif
|
|
group.long 0x34++0xF
|
|
line.long 0x00 "RIIC0BRL,I2C0 Bus Bit Rate Low-Level Register"
|
|
bitfld.long 0x00 0.--4. " BRL ,Bit Rate Low-Level Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "RIIC0BRH,I2C0 Bus Bit Rate High-Level Register"
|
|
bitfld.long 0x04 0.--4. " BRH ,Bit Rate High-Level Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "RIIC0DRT,I2C0 Bus Transmit Data Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DRT ,Transmit Data"
|
|
line.long 0x0C "RIIC0DRR,I2C0 Bus Receive Data Register"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " DRR ,Receive Data"
|
|
width 0xB
|
|
tree.end
|
|
tree "RIIC 1"
|
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base ad:0xFCFEE400
|
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width 11.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "RIIC1CR1,I2C1 Bus Control Register 1"
|
|
bitfld.long 0x00 7. " ICE ,I2C Bus Interface Internal Reset" "No reset,Reset"
|
|
bitfld.long 0x00 6. " IICRST ,I2C Bus Interface Internal Reset" "Not reset,Reset"
|
|
bitfld.long 0x00 5. " CLO ,Extra SCL Clock Cycle Output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SOWP ,SCLO/SDAO Write Protect" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SCLO ,SDA Output Control" "Low,High"
|
|
bitfld.long 0x00 2. " SDAO ,SDA Output Control" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " SCLI ,SCL Bus Input Monitor" "Low,High"
|
|
rbitfld.long 0x00 0. " SDAI ,SDA Bus Input Monitor" "Low,High"
|
|
line.long 0x04 "RIIC1CR2,I2C1 Bus Control Register 2"
|
|
rbitfld.long 0x04 7. " BBSY ,Bus Busy Detection Flag" "Released,Occupied"
|
|
rbitfld.long 0x04 6. " MST ,Master/Slave Mode" "Slave,Master"
|
|
rbitfld.long 0x04 5. " TRS ,Transmit/Receive Mode" "Receive,Transmit"
|
|
textline " "
|
|
bitfld.long 0x04 3. " SP ,Stop Condition Issuance Request" "Not requested,Requested"
|
|
bitfld.long 0x04 2. " RS ,Restart Condition Issuance Request" "Not requested,Requested"
|
|
bitfld.long 0x04 1. " ST ,Start Condition Issuance Request" "Not requested,Requested"
|
|
line.long 0x08 "RIIC1MR1,I2C1 Bus Mode Register 1"
|
|
bitfld.long 0x08 4.--6. " CKS ,Internal Reference Clock Selection" "P0/1,P0/2,P0/4,P0/8,P0/16,P0/32,P0/64,P0/128"
|
|
bitfld.long 0x08 3. " BCWP ,BC Write Protect" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--2. " BC ,Bit Counter" "9 bits,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits"
|
|
if (((per.l(ad:0xFCFEE400+0x0C))&0x80)==0x80)
|
|
// THIS[DLCS] == 1 (IIC/2)
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "RIIC1MR2,I2C1 Bus Mode Register 2"
|
|
bitfld.long 0x00 7. " DLCS ,SDA Output Delay Clock Source Selection" "IIC,IIC/2"
|
|
bitfld.long 0x00 4.--6. " SDDL ,SDA Output Delay Counter" "No delay,1 or 2 cycles,3 or 4 cycles,5 or 6 cycles,7 or 8 cycles,,,"
|
|
bitfld.long 0x00 2. " TMOH ,Timeout H Count Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TMOL ,Timeout L Count Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TMOS ,Timeout Detection Time Selection" "Long,Short"
|
|
else
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "RIIC1MR2,I2C1 Bus Mode Register 2"
|
|
bitfld.long 0x00 7. " DLCS ,SDA Output Delay Clock Source Selection" "IIC,IIC/2"
|
|
bitfld.long 0x00 4.--6. " SDDL ,SDA Output Delay Counter" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles"
|
|
bitfld.long 0x00 2. " TMOH ,Timeout H Count Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TMOL ,Timeout L Count Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TMOS ,Timeout Detection Time Selection" "Long,Short"
|
|
endif
|
|
group.long 0x10++0x17
|
|
line.long 0x00 "RIIC1MR3,I2C1 Bus Mode Register 3"
|
|
bitfld.long 0x00 7. " SMBE ,SMBus Pin Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " WAIT ,WAIT" "No wait,Wait"
|
|
bitfld.long 0x00 5. " RDRFS ,RDRF Flag Set Timing Selection" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ACKWP ,ACKBT Write Protect" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ACKBT ,Transmit Acknowledge" "Low,High"
|
|
rbitfld.long 0x00 2. " ACKBR ,Receive Acknowledge" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " NF ,Noise Filter Stage Selection" "Single-stage,2-stage,3-stage,4-stage"
|
|
line.long 0x04 "RIIC1FER,I2C1 Bus Function Enable Register"
|
|
bitfld.long 0x04 6. " SCLE ,SCL Synchronous Circuit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " NFE ,Digital Noise Filter Circuit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " NACKE ,NACK Reception Transfer Suspension Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " SALE ,Slave Arbitration-Lost Detection Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " NALE ,NACK Transmission Arbitration-Lost Detection Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " MALE ,Master Arbitration-Lost Detection Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " TMOE ,Timeout Function Enable" "Disabled,Enabled"
|
|
line.long 0x08 "RIIC1SER,I2C1 Bus Status Enable Register"
|
|
bitfld.long 0x08 7. " HOAE ,Host Address Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " DIDE ,Device-ID Address Detection Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " GCE ,General Call Address Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 2. " SAR2 ,Slave Address Register 2 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " SAR1 ,Slave Address Register 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " SAR0 ,Slave Address Register 0 Enable" "Disabled,Enabled"
|
|
line.long 0x0C "RIIC1IER,I2C1 Bus Interrupt Enable Register"
|
|
bitfld.long 0x0C 7. " TIE ,Transmit Data Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 6. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 5. " RIE ,Receive Data Full Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " NAKIE ,NACK Reception Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " SPIE ,Stop Condition Detection Interrupt Enable (SPI)" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " STIE ,Start Condition Detection Interrupt Enable (STI)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " ALIE ,Arbitration-Lost Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " TMOIE ,Timeout Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x10 "RIIC1SR1,I2C1 Bus Status Register 1"
|
|
bitfld.long 0x10 7. " RIIC1HOA ,Host Address Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x10 5. " RIIC1DID ,Device-ID Address Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x10 3. " RIIC1GCA ,General Call Address Detection Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x10 2. " RIIC1AAS2 ,Slave Address 2 Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x10 1. " RIIC1AAS1 ,Slave Address 1 Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x10 0. " RIIC1AAS0 ,Slave Address 0 Detection Flag" "Not detected,Detected"
|
|
line.long 0x14 "RIIC1SR2,I2C1 Bus Status Register 2"
|
|
rbitfld.long 0x14 7. " RIIC1TDRE ,Transmit Data Empty Flag" "Not empty,Empty"
|
|
bitfld.long 0x14 6. " RIIC1TEND ,Transmit End Flag" "Not ended,Ended"
|
|
bitfld.long 0x14 5. " RIIC1RDRF ,Receive Data Full Flag" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x14 4. " RIIC1NACKF ,NACK Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x14 3. " RIIC1STOP ,Stop Condition Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x14 2. " RIIC1START ,Start Condition Detection Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x14 1. " RIIC1AL ,Arbitration-Lost Flag" "Not lost,Lost"
|
|
bitfld.long 0x14 0. " RIIC1TMOF ,Timeout Detection Flag" "Not detected,Detected"
|
|
if (((per.l(ad:0xFCFEE400+0x28))&0x8000)==0x8000)
|
|
group.long 0x28++0xB
|
|
line.long 0x00 "RIIC1SAR0,I2C1 Slave Address Register 0"
|
|
bitfld.long 0x00 15. " FS0 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.word 0x00 1.--9. 0x80 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
bitfld.long 0x00 0. " SVA0 ,10-Bit Address LSB" "0,1"
|
|
else
|
|
group.long 0x28++0xB
|
|
line.long 0x00 "RIIC1SAR0,I2C1 Slave Address Register 0"
|
|
bitfld.long 0x00 15. " FS0 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
endif
|
|
if (((per.l(ad:0xFCFEE400+0x2C))&0x8000)==0x8000)
|
|
group.long 0x2C++0xB
|
|
line.long 0x00 "RIIC1SAR1,I2C1 Slave Address Register 1"
|
|
bitfld.long 0x00 15. " FS1 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.word 0x00 1.--9. 0x80 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
bitfld.long 0x00 0. " SVA0 ,10-Bit Address LSB" "0,1"
|
|
else
|
|
group.long 0x2C++0xB
|
|
line.long 0x00 "RIIC1SAR1,I2C1 Slave Address Register 1"
|
|
bitfld.long 0x00 15. " FS1 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
endif
|
|
if (((per.l(ad:0xFCFEE400+0x30))&0x8000)==0x8000)
|
|
group.long 0x30++0xB
|
|
line.long 0x00 "RIIC1SAR2,I2C1 Slave Address Register 2"
|
|
bitfld.long 0x00 15. " FS2 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.word 0x00 1.--9. 0x80 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
bitfld.long 0x00 0. " SVA0 ,10-Bit Address LSB" "0,1"
|
|
else
|
|
group.long 0x30++0xB
|
|
line.long 0x00 "RIIC1SAR2,I2C1 Slave Address Register 2"
|
|
bitfld.long 0x00 15. " FS2 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
endif
|
|
group.long 0x34++0xF
|
|
line.long 0x00 "RIIC1BRL,I2C1 Bus Bit Rate Low-Level Register"
|
|
bitfld.long 0x00 0.--4. " BRL ,Bit Rate Low-Level Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "RIIC1BRH,I2C1 Bus Bit Rate High-Level Register"
|
|
bitfld.long 0x04 0.--4. " BRH ,Bit Rate High-Level Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "RIIC1DRT,I2C1 Bus Transmit Data Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DRT ,Transmit Data"
|
|
line.long 0x0C "RIIC1DRR,I2C1 Bus Receive Data Register"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " DRR ,Receive Data"
|
|
width 0xB
|
|
tree.end
|
|
tree "RIIC 2"
|
|
base ad:0xFCFEE800
|
|
width 11.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "RIIC2CR1,I2C2 Bus Control Register 1"
|
|
bitfld.long 0x00 7. " ICE ,I2C Bus Interface Internal Reset" "No reset,Reset"
|
|
bitfld.long 0x00 6. " IICRST ,I2C Bus Interface Internal Reset" "Not reset,Reset"
|
|
bitfld.long 0x00 5. " CLO ,Extra SCL Clock Cycle Output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SOWP ,SCLO/SDAO Write Protect" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SCLO ,SDA Output Control" "Low,High"
|
|
bitfld.long 0x00 2. " SDAO ,SDA Output Control" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " SCLI ,SCL Bus Input Monitor" "Low,High"
|
|
rbitfld.long 0x00 0. " SDAI ,SDA Bus Input Monitor" "Low,High"
|
|
line.long 0x04 "RIIC2CR2,I2C2 Bus Control Register 2"
|
|
rbitfld.long 0x04 7. " BBSY ,Bus Busy Detection Flag" "Released,Occupied"
|
|
rbitfld.long 0x04 6. " MST ,Master/Slave Mode" "Slave,Master"
|
|
rbitfld.long 0x04 5. " TRS ,Transmit/Receive Mode" "Receive,Transmit"
|
|
textline " "
|
|
bitfld.long 0x04 3. " SP ,Stop Condition Issuance Request" "Not requested,Requested"
|
|
bitfld.long 0x04 2. " RS ,Restart Condition Issuance Request" "Not requested,Requested"
|
|
bitfld.long 0x04 1. " ST ,Start Condition Issuance Request" "Not requested,Requested"
|
|
line.long 0x08 "RIIC2MR1,I2C2 Bus Mode Register 1"
|
|
bitfld.long 0x08 4.--6. " CKS ,Internal Reference Clock Selection" "P0/1,P0/2,P0/4,P0/8,P0/16,P0/32,P0/64,P0/128"
|
|
bitfld.long 0x08 3. " BCWP ,BC Write Protect" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--2. " BC ,Bit Counter" "9 bits,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits"
|
|
if (((per.l(ad:0xFCFEE800+0x0C))&0x80)==0x80)
|
|
// THIS[DLCS] == 1 (IIC/2)
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "RIIC2MR2,I2C2 Bus Mode Register 2"
|
|
bitfld.long 0x00 7. " DLCS ,SDA Output Delay Clock Source Selection" "IIC,IIC/2"
|
|
bitfld.long 0x00 4.--6. " SDDL ,SDA Output Delay Counter" "No delay,1 or 2 cycles,3 or 4 cycles,5 or 6 cycles,7 or 8 cycles,,,"
|
|
bitfld.long 0x00 2. " TMOH ,Timeout H Count Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TMOL ,Timeout L Count Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TMOS ,Timeout Detection Time Selection" "Long,Short"
|
|
else
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "RIIC2MR2,I2C2 Bus Mode Register 2"
|
|
bitfld.long 0x00 7. " DLCS ,SDA Output Delay Clock Source Selection" "IIC,IIC/2"
|
|
bitfld.long 0x00 4.--6. " SDDL ,SDA Output Delay Counter" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles"
|
|
bitfld.long 0x00 2. " TMOH ,Timeout H Count Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TMOL ,Timeout L Count Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TMOS ,Timeout Detection Time Selection" "Long,Short"
|
|
endif
|
|
group.long 0x10++0x17
|
|
line.long 0x00 "RIIC2MR3,I2C2 Bus Mode Register 3"
|
|
bitfld.long 0x00 7. " SMBE ,SMBus Pin Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " WAIT ,WAIT" "No wait,Wait"
|
|
bitfld.long 0x00 5. " RDRFS ,RDRF Flag Set Timing Selection" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ACKWP ,ACKBT Write Protect" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ACKBT ,Transmit Acknowledge" "Low,High"
|
|
rbitfld.long 0x00 2. " ACKBR ,Receive Acknowledge" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " NF ,Noise Filter Stage Selection" "Single-stage,2-stage,3-stage,4-stage"
|
|
line.long 0x04 "RIIC2FER,I2C2 Bus Function Enable Register"
|
|
bitfld.long 0x04 6. " SCLE ,SCL Synchronous Circuit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " NFE ,Digital Noise Filter Circuit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " NACKE ,NACK Reception Transfer Suspension Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " SALE ,Slave Arbitration-Lost Detection Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " NALE ,NACK Transmission Arbitration-Lost Detection Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " MALE ,Master Arbitration-Lost Detection Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " TMOE ,Timeout Function Enable" "Disabled,Enabled"
|
|
line.long 0x08 "RIIC2SER,I2C2 Bus Status Enable Register"
|
|
bitfld.long 0x08 7. " HOAE ,Host Address Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " DIDE ,Device-ID Address Detection Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " GCE ,General Call Address Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 2. " SAR2 ,Slave Address Register 2 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " SAR1 ,Slave Address Register 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " SAR0 ,Slave Address Register 0 Enable" "Disabled,Enabled"
|
|
line.long 0x0C "RIIC2IER,I2C2 Bus Interrupt Enable Register"
|
|
bitfld.long 0x0C 7. " TIE ,Transmit Data Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 6. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 5. " RIE ,Receive Data Full Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " NAKIE ,NACK Reception Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " SPIE ,Stop Condition Detection Interrupt Enable (SPI)" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " STIE ,Start Condition Detection Interrupt Enable (STI)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " ALIE ,Arbitration-Lost Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " TMOIE ,Timeout Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x10 "RIIC2SR1,I2C2 Bus Status Register 1"
|
|
bitfld.long 0x10 7. " RIIC2HOA ,Host Address Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x10 5. " RIIC2DID ,Device-ID Address Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x10 3. " RIIC2GCA ,General Call Address Detection Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x10 2. " RIIC2AAS2 ,Slave Address 2 Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x10 1. " RIIC2AAS1 ,Slave Address 1 Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x10 0. " RIIC2AAS0 ,Slave Address 0 Detection Flag" "Not detected,Detected"
|
|
line.long 0x14 "RIIC2SR2,I2C2 Bus Status Register 2"
|
|
rbitfld.long 0x14 7. " RIIC2TDRE ,Transmit Data Empty Flag" "Not empty,Empty"
|
|
bitfld.long 0x14 6. " RIIC2TEND ,Transmit End Flag" "Not ended,Ended"
|
|
bitfld.long 0x14 5. " RIIC2RDRF ,Receive Data Full Flag" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x14 4. " RIIC2NACKF ,NACK Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x14 3. " RIIC2STOP ,Stop Condition Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x14 2. " RIIC2START ,Start Condition Detection Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x14 1. " RIIC2AL ,Arbitration-Lost Flag" "Not lost,Lost"
|
|
bitfld.long 0x14 0. " RIIC2TMOF ,Timeout Detection Flag" "Not detected,Detected"
|
|
if (((per.l(ad:0xFCFEE800+0x28))&0x8000)==0x8000)
|
|
group.long 0x28++0xB
|
|
line.long 0x00 "RIIC2SAR0,I2C2 Slave Address Register 0"
|
|
bitfld.long 0x00 15. " FS0 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.word 0x00 1.--9. 0x80 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
bitfld.long 0x00 0. " SVA0 ,10-Bit Address LSB" "0,1"
|
|
else
|
|
group.long 0x28++0xB
|
|
line.long 0x00 "RIIC2SAR0,I2C2 Slave Address Register 0"
|
|
bitfld.long 0x00 15. " FS0 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
endif
|
|
if (((per.l(ad:0xFCFEE800+0x2C))&0x8000)==0x8000)
|
|
group.long 0x2C++0xB
|
|
line.long 0x00 "RIIC2SAR1,I2C2 Slave Address Register 1"
|
|
bitfld.long 0x00 15. " FS1 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.word 0x00 1.--9. 0x80 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
bitfld.long 0x00 0. " SVA0 ,10-Bit Address LSB" "0,1"
|
|
else
|
|
group.long 0x2C++0xB
|
|
line.long 0x00 "RIIC2SAR1,I2C2 Slave Address Register 1"
|
|
bitfld.long 0x00 15. " FS1 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
endif
|
|
if (((per.l(ad:0xFCFEE800+0x30))&0x8000)==0x8000)
|
|
group.long 0x30++0xB
|
|
line.long 0x00 "RIIC2SAR2,I2C2 Slave Address Register 2"
|
|
bitfld.long 0x00 15. " FS2 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.word 0x00 1.--9. 0x80 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
bitfld.long 0x00 0. " SVA0 ,10-Bit Address LSB" "0,1"
|
|
else
|
|
group.long 0x30++0xB
|
|
line.long 0x00 "RIIC2SAR2,I2C2 Slave Address Register 2"
|
|
bitfld.long 0x00 15. " FS2 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
endif
|
|
group.long 0x34++0xF
|
|
line.long 0x00 "RIIC2BRL,I2C2 Bus Bit Rate Low-Level Register"
|
|
bitfld.long 0x00 0.--4. " BRL ,Bit Rate Low-Level Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "RIIC2BRH,I2C2 Bus Bit Rate High-Level Register"
|
|
bitfld.long 0x04 0.--4. " BRH ,Bit Rate High-Level Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "RIIC2DRT,I2C2 Bus Transmit Data Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DRT ,Transmit Data"
|
|
line.long 0x0C "RIIC2DRR,I2C2 Bus Receive Data Register"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " DRR ,Receive Data"
|
|
width 0xB
|
|
tree.end
|
|
tree "RIIC 3"
|
|
base ad:0xFCFEEC00
|
|
width 11.
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "RIIC3CR1,I2C3 Bus Control Register 1"
|
|
bitfld.long 0x00 7. " ICE ,I2C Bus Interface Internal Reset" "No reset,Reset"
|
|
bitfld.long 0x00 6. " IICRST ,I2C Bus Interface Internal Reset" "Not reset,Reset"
|
|
bitfld.long 0x00 5. " CLO ,Extra SCL Clock Cycle Output" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SOWP ,SCLO/SDAO Write Protect" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SCLO ,SDA Output Control" "Low,High"
|
|
bitfld.long 0x00 2. " SDAO ,SDA Output Control" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " SCLI ,SCL Bus Input Monitor" "Low,High"
|
|
rbitfld.long 0x00 0. " SDAI ,SDA Bus Input Monitor" "Low,High"
|
|
line.long 0x04 "RIIC3CR2,I2C3 Bus Control Register 2"
|
|
rbitfld.long 0x04 7. " BBSY ,Bus Busy Detection Flag" "Released,Occupied"
|
|
rbitfld.long 0x04 6. " MST ,Master/Slave Mode" "Slave,Master"
|
|
rbitfld.long 0x04 5. " TRS ,Transmit/Receive Mode" "Receive,Transmit"
|
|
textline " "
|
|
bitfld.long 0x04 3. " SP ,Stop Condition Issuance Request" "Not requested,Requested"
|
|
bitfld.long 0x04 2. " RS ,Restart Condition Issuance Request" "Not requested,Requested"
|
|
bitfld.long 0x04 1. " ST ,Start Condition Issuance Request" "Not requested,Requested"
|
|
line.long 0x08 "RIIC3MR1,I2C3 Bus Mode Register 1"
|
|
bitfld.long 0x08 4.--6. " CKS ,Internal Reference Clock Selection" "P0/1,P0/2,P0/4,P0/8,P0/16,P0/32,P0/64,P0/128"
|
|
bitfld.long 0x08 3. " BCWP ,BC Write Protect" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--2. " BC ,Bit Counter" "9 bits,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits"
|
|
if (((per.l(ad:0xFCFEEC00+0x0C))&0x80)==0x80)
|
|
// THIS[DLCS] == 1 (IIC/2)
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "RIIC3MR2,I2C3 Bus Mode Register 2"
|
|
bitfld.long 0x00 7. " DLCS ,SDA Output Delay Clock Source Selection" "IIC,IIC/2"
|
|
bitfld.long 0x00 4.--6. " SDDL ,SDA Output Delay Counter" "No delay,1 or 2 cycles,3 or 4 cycles,5 or 6 cycles,7 or 8 cycles,,,"
|
|
bitfld.long 0x00 2. " TMOH ,Timeout H Count Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TMOL ,Timeout L Count Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TMOS ,Timeout Detection Time Selection" "Long,Short"
|
|
else
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "RIIC3MR2,I2C3 Bus Mode Register 2"
|
|
bitfld.long 0x00 7. " DLCS ,SDA Output Delay Clock Source Selection" "IIC,IIC/2"
|
|
bitfld.long 0x00 4.--6. " SDDL ,SDA Output Delay Counter" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles"
|
|
bitfld.long 0x00 2. " TMOH ,Timeout H Count Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TMOL ,Timeout L Count Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TMOS ,Timeout Detection Time Selection" "Long,Short"
|
|
endif
|
|
group.long 0x10++0x17
|
|
line.long 0x00 "RIIC3MR3,I2C3 Bus Mode Register 3"
|
|
bitfld.long 0x00 7. " SMBE ,SMBus Pin Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " WAIT ,WAIT" "No wait,Wait"
|
|
bitfld.long 0x00 5. " RDRFS ,RDRF Flag Set Timing Selection" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ACKWP ,ACKBT Write Protect" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ACKBT ,Transmit Acknowledge" "Low,High"
|
|
rbitfld.long 0x00 2. " ACKBR ,Receive Acknowledge" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " NF ,Noise Filter Stage Selection" "Single-stage,2-stage,3-stage,4-stage"
|
|
line.long 0x04 "RIIC3FER,I2C3 Bus Function Enable Register"
|
|
bitfld.long 0x04 6. " SCLE ,SCL Synchronous Circuit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " NFE ,Digital Noise Filter Circuit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " NACKE ,NACK Reception Transfer Suspension Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " SALE ,Slave Arbitration-Lost Detection Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " NALE ,NACK Transmission Arbitration-Lost Detection Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " MALE ,Master Arbitration-Lost Detection Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " TMOE ,Timeout Function Enable" "Disabled,Enabled"
|
|
line.long 0x08 "RIIC3SER,I2C3 Bus Status Enable Register"
|
|
bitfld.long 0x08 7. " HOAE ,Host Address Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " DIDE ,Device-ID Address Detection Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " GCE ,General Call Address Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 2. " SAR2 ,Slave Address Register 2 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " SAR1 ,Slave Address Register 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " SAR0 ,Slave Address Register 0 Enable" "Disabled,Enabled"
|
|
line.long 0x0C "RIIC3IER,I2C3 Bus Interrupt Enable Register"
|
|
bitfld.long 0x0C 7. " TIE ,Transmit Data Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 6. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 5. " RIE ,Receive Data Full Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " NAKIE ,NACK Reception Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " SPIE ,Stop Condition Detection Interrupt Enable (SPI)" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " STIE ,Start Condition Detection Interrupt Enable (STI)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " ALIE ,Arbitration-Lost Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " TMOIE ,Timeout Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x10 "RIIC3SR1,I2C3 Bus Status Register 1"
|
|
bitfld.long 0x10 7. " RIIC3HOA ,Host Address Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x10 5. " RIIC3DID ,Device-ID Address Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x10 3. " RIIC3GCA ,General Call Address Detection Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x10 2. " RIIC3AAS2 ,Slave Address 2 Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x10 1. " RIIC3AAS1 ,Slave Address 1 Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x10 0. " RIIC3AAS0 ,Slave Address 0 Detection Flag" "Not detected,Detected"
|
|
line.long 0x14 "RIIC3SR2,I2C3 Bus Status Register 2"
|
|
rbitfld.long 0x14 7. " RIIC3TDRE ,Transmit Data Empty Flag" "Not empty,Empty"
|
|
bitfld.long 0x14 6. " RIIC3TEND ,Transmit End Flag" "Not ended,Ended"
|
|
bitfld.long 0x14 5. " RIIC3RDRF ,Receive Data Full Flag" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x14 4. " RIIC3NACKF ,NACK Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x14 3. " RIIC3STOP ,Stop Condition Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x14 2. " RIIC3START ,Start Condition Detection Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x14 1. " RIIC3AL ,Arbitration-Lost Flag" "Not lost,Lost"
|
|
bitfld.long 0x14 0. " RIIC3TMOF ,Timeout Detection Flag" "Not detected,Detected"
|
|
if (((per.l(ad:0xFCFEEC00+0x28))&0x8000)==0x8000)
|
|
group.long 0x28++0xB
|
|
line.long 0x00 "RIIC3SAR0,I2C3 Slave Address Register 0"
|
|
bitfld.long 0x00 15. " FS0 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.word 0x00 1.--9. 0x80 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
bitfld.long 0x00 0. " SVA0 ,10-Bit Address LSB" "0,1"
|
|
else
|
|
group.long 0x28++0xB
|
|
line.long 0x00 "RIIC3SAR0,I2C3 Slave Address Register 0"
|
|
bitfld.long 0x00 15. " FS0 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
endif
|
|
if (((per.l(ad:0xFCFEEC00+0x2C))&0x8000)==0x8000)
|
|
group.long 0x2C++0xB
|
|
line.long 0x00 "RIIC3SAR1,I2C3 Slave Address Register 1"
|
|
bitfld.long 0x00 15. " FS1 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.word 0x00 1.--9. 0x80 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
bitfld.long 0x00 0. " SVA0 ,10-Bit Address LSB" "0,1"
|
|
else
|
|
group.long 0x2C++0xB
|
|
line.long 0x00 "RIIC3SAR1,I2C3 Slave Address Register 1"
|
|
bitfld.long 0x00 15. " FS1 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
endif
|
|
if (((per.l(ad:0xFCFEEC00+0x30))&0x8000)==0x8000)
|
|
group.long 0x30++0xB
|
|
line.long 0x00 "RIIC3SAR2,I2C3 Slave Address Register 2"
|
|
bitfld.long 0x00 15. " FS2 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.word 0x00 1.--9. 0x80 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
bitfld.long 0x00 0. " SVA0 ,10-Bit Address LSB" "0,1"
|
|
else
|
|
group.long 0x30++0xB
|
|
line.long 0x00 "RIIC3SAR2,I2C3 Slave Address Register 2"
|
|
bitfld.long 0x00 15. " FS2 ,7-Bit/10-Bit Address Format Selection" "7-bit,10-bit"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " SVA ,7-Bit Address/10-Bit Address Lower Bits"
|
|
endif
|
|
group.long 0x34++0xF
|
|
line.long 0x00 "RIIC3BRL,I2C3 Bus Bit Rate Low-Level Register"
|
|
bitfld.long 0x00 0.--4. " BRL ,Bit Rate Low-Level Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "RIIC3BRH,I2C3 Bus Bit Rate High-Level Register"
|
|
bitfld.long 0x04 0.--4. " BRH ,Bit Rate High-Level Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "RIIC3DRT,I2C3 Bus Transmit Data Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DRT ,Transmit Data"
|
|
line.long 0x0C "RIIC3DRR,I2C3 Bus Receive Data Register"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " DRR ,Receive Data"
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree.open "Serial Sound Interface"
|
|
tree "Channel 0"
|
|
base ad:0xE820B000
|
|
width 9.
|
|
if ((((per.l(ad:0xE820B000+0x20))&0x1)==0x1)&&(((per.l(ad:0xE820B000))&0x380000)==(0x000000||0x080000)))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" ",4 word,6 words,8 words"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "High/Low,"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "->Upper bits,->Lower bits"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820B000+0x20))&0x1)==0x1)&&(((per.l(ad:0xE820B000))&0x380000)>0x080000)&&(((per.l(ad:0xE820B000))&0x380000)<0x300000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" ",4 word,6 words,8 words"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "High/Low,"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "Left-aligned,Right-aligned"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820B000+0x20))&0x1)==0x1)&&(((per.l(ad:0xE820B000))&0x380000)>0x280000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" ",4 word,6 words,8 words"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "High/Low,"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820B000+0x20))&0x1)==0x0)&&(((per.l(ad:0xE820B000))&0x380000)==(0x000000||0x080000)))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" "1 channel,2 channels,3 channels,4 channels"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "Low/High,High/Low"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "->Upper bits,->Lower bits"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820B000+0x20))&0x1)==0x0)&&(((per.l(ad:0xE820B000))&0x380000)>0x080000)&&(((per.l(ad:0xE820B000))&0x380000)<0x300000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" "1 channel,2 channels,3 channels,4 channels"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "Low/High,High/Low"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "Left-aligned,Right-aligned"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820B000+0x20))&0x1)==0x0)&&(((per.l(ad:0xE820B000))&0x380000)>0x280000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" "1 channel,2 channels,3 channels,4 channels"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "Low/High,High/Low"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
endif
|
|
if ((((per.l(ad:0xE820B000+0x20))&0x1)==0x1)||(((per.l(ad:0xE820B000+0x20))&0x100)==0x100))
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SSISR,Status Register"
|
|
bitfld.long 0x00 29. " TUIRQ ,Transmit Underflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 28. " TOIRQ ,Transmit Overflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 27. " RUIRQ ,Receive Underflow Error Interrupt Status Flag" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " ROIRQ ,Receive Overflow Error Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 0. " IDST ,Idle Mode Status Flag" "Low,High"
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SSISR,Status Register"
|
|
bitfld.long 0x00 29. " TUIRQ ,Transmit Underflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 28. " TOIRQ ,Transmit Overflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 27. " RUIRQ ,Receive Underflow Error Interrupt Status Flag" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " ROIRQ ,Receive Overflow Error Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 5.--6. " TCHNO ,Transmit Channel Number" "0,1,2,3"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " TSWNO ,Transmit Serial Word Number" "0,1"
|
|
rbitfld.long 0x00 2.--3. " RCHNO ,Receive Channel Number" "0,1,2,3"
|
|
rbitfld.long 0x00 1. " RSWNO ,Receive Serial Word Number" "0,1"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " IDST ,Idle Mode Status Flag" "Low,High"
|
|
endif
|
|
group.long 0x10++0x7
|
|
line.long 0x00 "SSIFCR,FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " TTRG ,Transmit Data Trigger Number" "7,6,4,2"
|
|
bitfld.long 0x00 4.--5. " RTRG ,Receive Data Trigger Number" "1,2,4,6"
|
|
bitfld.long 0x00 3. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TFRST ,Transmit FIFO Data Register Reset" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RFRST ,Receive FIFO Data Register Reset" "Disabled,Enabled"
|
|
line.long 0x04 "SSIFSR,FIFO Status Register"
|
|
rbitfld.long 0x04 24.--27. " TDC ,Number of Data Bytes Stored in SSIFTDR" "No data,,,,,,,,32 bytes,,,,,,,"
|
|
bitfld.long 0x04 16. " TDE ,Transmit Data Empty" "Not empty,Empty"
|
|
rbitfld.long 0x04 8.--11. " RDC ,Number of Data Bytes Stored in SSIFRDR" "No data,,,,,,,,32 bytes,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RDF ,Receive Data Full" "Not full,Full"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x00 "SSIFTDR,Transmit FIFO Data Register"
|
|
hgroup.long 0x1C++0x3
|
|
hide.long 0x00 "SSIFRDR,Receive FIFO Data Register"
|
|
in
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SSITDMR,TDM Mode Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 17. " RXDMUTE ,Receive Direct Data Mute Setting" "Without change,0 data"
|
|
endif
|
|
bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TDM ,TDM Mode" "Disabled,Enabled"
|
|
sif !cpuis("R7S7210*")
|
|
group.long 0x24++0x0B
|
|
line.long 0x00 "SSIFCCR,FC Control Register"
|
|
bitfld.long 0x00 16. " FIEN ,Frequency Change Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FCEN ,Frequency Change Detection Enable" "Disabled,Enabled"
|
|
line.long 0x04 "SSIFCMR,FC Mode Register"
|
|
hexmask.long.word 0x04 16.--29. 1. " MAXV ,Maximum Value"
|
|
hexmask.long.word 0x04 0.--13. 1. " MINV ,Minimum Value"
|
|
line.long 0x08 "SSIFCSR,FC Status Register"
|
|
bitfld.long 0x08 24. " FCIRQ ,Frequency Change Detection Error Interrupt Status" "Not changed,Changed"
|
|
hexmask.long.word 0x08 0.--13. 1. " VALUE ,VALUE"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0xE820B800
|
|
width 9.
|
|
if ((((per.l(ad:0xE820B800+0x20))&0x1)==0x1)&&(((per.l(ad:0xE820B800))&0x380000)==(0x000000||0x080000)))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" ",4 word,6 words,8 words"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "High/Low,"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "->Upper bits,->Lower bits"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820B800+0x20))&0x1)==0x1)&&(((per.l(ad:0xE820B800))&0x380000)>0x080000)&&(((per.l(ad:0xE820B800))&0x380000)<0x300000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" ",4 word,6 words,8 words"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "High/Low,"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "Left-aligned,Right-aligned"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820B800+0x20))&0x1)==0x1)&&(((per.l(ad:0xE820B800))&0x380000)>0x280000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" ",4 word,6 words,8 words"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "High/Low,"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820B800+0x20))&0x1)==0x0)&&(((per.l(ad:0xE820B800))&0x380000)==(0x000000||0x080000)))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" "1 channel,2 channels,3 channels,4 channels"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "Low/High,High/Low"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "->Upper bits,->Lower bits"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820B800+0x20))&0x1)==0x0)&&(((per.l(ad:0xE820B800))&0x380000)>0x080000)&&(((per.l(ad:0xE820B800))&0x380000)<0x300000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" "1 channel,2 channels,3 channels,4 channels"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "Low/High,High/Low"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "Left-aligned,Right-aligned"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820B800+0x20))&0x1)==0x0)&&(((per.l(ad:0xE820B800))&0x380000)>0x280000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" "1 channel,2 channels,3 channels,4 channels"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "Low/High,High/Low"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
endif
|
|
if ((((per.l(ad:0xE820B800+0x20))&0x1)==0x1)||(((per.l(ad:0xE820B800+0x20))&0x100)==0x100))
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SSISR,Status Register"
|
|
bitfld.long 0x00 29. " TUIRQ ,Transmit Underflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 28. " TOIRQ ,Transmit Overflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 27. " RUIRQ ,Receive Underflow Error Interrupt Status Flag" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " ROIRQ ,Receive Overflow Error Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 0. " IDST ,Idle Mode Status Flag" "Low,High"
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SSISR,Status Register"
|
|
bitfld.long 0x00 29. " TUIRQ ,Transmit Underflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 28. " TOIRQ ,Transmit Overflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 27. " RUIRQ ,Receive Underflow Error Interrupt Status Flag" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " ROIRQ ,Receive Overflow Error Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 5.--6. " TCHNO ,Transmit Channel Number" "0,1,2,3"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " TSWNO ,Transmit Serial Word Number" "0,1"
|
|
rbitfld.long 0x00 2.--3. " RCHNO ,Receive Channel Number" "0,1,2,3"
|
|
rbitfld.long 0x00 1. " RSWNO ,Receive Serial Word Number" "0,1"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " IDST ,Idle Mode Status Flag" "Low,High"
|
|
endif
|
|
group.long 0x10++0x7
|
|
line.long 0x00 "SSIFCR,FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " TTRG ,Transmit Data Trigger Number" "7,6,4,2"
|
|
bitfld.long 0x00 4.--5. " RTRG ,Receive Data Trigger Number" "1,2,4,6"
|
|
bitfld.long 0x00 3. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TFRST ,Transmit FIFO Data Register Reset" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RFRST ,Receive FIFO Data Register Reset" "Disabled,Enabled"
|
|
line.long 0x04 "SSIFSR,FIFO Status Register"
|
|
rbitfld.long 0x04 24.--27. " TDC ,Number of Data Bytes Stored in SSIFTDR" "No data,,,,,,,,32 bytes,,,,,,,"
|
|
bitfld.long 0x04 16. " TDE ,Transmit Data Empty" "Not empty,Empty"
|
|
rbitfld.long 0x04 8.--11. " RDC ,Number of Data Bytes Stored in SSIFRDR" "No data,,,,,,,,32 bytes,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RDF ,Receive Data Full" "Not full,Full"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x00 "SSIFTDR,Transmit FIFO Data Register"
|
|
hgroup.long 0x1C++0x3
|
|
hide.long 0x00 "SSIFRDR,Receive FIFO Data Register"
|
|
in
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SSITDMR,TDM Mode Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 17. " RXDMUTE ,Receive Direct Data Mute Setting" "Without change,0 data"
|
|
endif
|
|
bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TDM ,TDM Mode" "Disabled,Enabled"
|
|
sif !cpuis("R7S7210*")
|
|
group.long 0x24++0x0B
|
|
line.long 0x00 "SSIFCCR,FC Control Register"
|
|
bitfld.long 0x00 16. " FIEN ,Frequency Change Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FCEN ,Frequency Change Detection Enable" "Disabled,Enabled"
|
|
line.long 0x04 "SSIFCMR,FC Mode Register"
|
|
hexmask.long.word 0x04 16.--29. 1. " MAXV ,Maximum Value"
|
|
hexmask.long.word 0x04 0.--13. 1. " MINV ,Minimum Value"
|
|
line.long 0x08 "SSIFCSR,FC Status Register"
|
|
bitfld.long 0x08 24. " FCIRQ ,Frequency Change Detection Error Interrupt Status" "Not changed,Changed"
|
|
hexmask.long.word 0x08 0.--13. 1. " VALUE ,VALUE"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 2"
|
|
base ad:0xE820C000
|
|
width 9.
|
|
if ((((per.l(ad:0xE820C000+0x20))&0x1)==0x1)&&(((per.l(ad:0xE820C000))&0x380000)==(0x000000||0x080000)))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" ",4 word,6 words,8 words"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "High/Low,"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "->Upper bits,->Lower bits"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820C000+0x20))&0x1)==0x1)&&(((per.l(ad:0xE820C000))&0x380000)>0x080000)&&(((per.l(ad:0xE820C000))&0x380000)<0x300000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" ",4 word,6 words,8 words"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "High/Low,"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "Left-aligned,Right-aligned"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820C000+0x20))&0x1)==0x1)&&(((per.l(ad:0xE820C000))&0x380000)>0x280000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" ",4 word,6 words,8 words"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "High/Low,"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820C000+0x20))&0x1)==0x0)&&(((per.l(ad:0xE820C000))&0x380000)==(0x000000||0x080000)))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" "1 channel,2 channels,3 channels,4 channels"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "Low/High,High/Low"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "->Upper bits,->Lower bits"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820C000+0x20))&0x1)==0x0)&&(((per.l(ad:0xE820C000))&0x380000)>0x080000)&&(((per.l(ad:0xE820C000))&0x380000)<0x300000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" "1 channel,2 channels,3 channels,4 channels"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "Low/High,High/Low"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "Left-aligned,Right-aligned"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820C000+0x20))&0x1)==0x0)&&(((per.l(ad:0xE820C000))&0x380000)>0x280000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" "1 channel,2 channels,3 channels,4 channels"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "Low/High,High/Low"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
endif
|
|
if ((((per.l(ad:0xE820C000+0x20))&0x1)==0x1)||(((per.l(ad:0xE820C000+0x20))&0x100)==0x100))
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SSISR,Status Register"
|
|
bitfld.long 0x00 29. " TUIRQ ,Transmit Underflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 28. " TOIRQ ,Transmit Overflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 27. " RUIRQ ,Receive Underflow Error Interrupt Status Flag" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " ROIRQ ,Receive Overflow Error Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 0. " IDST ,Idle Mode Status Flag" "Low,High"
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SSISR,Status Register"
|
|
bitfld.long 0x00 29. " TUIRQ ,Transmit Underflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 28. " TOIRQ ,Transmit Overflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 27. " RUIRQ ,Receive Underflow Error Interrupt Status Flag" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " ROIRQ ,Receive Overflow Error Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 5.--6. " TCHNO ,Transmit Channel Number" "0,1,2,3"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " TSWNO ,Transmit Serial Word Number" "0,1"
|
|
rbitfld.long 0x00 2.--3. " RCHNO ,Receive Channel Number" "0,1,2,3"
|
|
rbitfld.long 0x00 1. " RSWNO ,Receive Serial Word Number" "0,1"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " IDST ,Idle Mode Status Flag" "Low,High"
|
|
endif
|
|
group.long 0x10++0x7
|
|
line.long 0x00 "SSIFCR,FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " TTRG ,Transmit Data Trigger Number" "7,6,4,2"
|
|
bitfld.long 0x00 4.--5. " RTRG ,Receive Data Trigger Number" "1,2,4,6"
|
|
bitfld.long 0x00 3. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TFRST ,Transmit FIFO Data Register Reset" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RFRST ,Receive FIFO Data Register Reset" "Disabled,Enabled"
|
|
line.long 0x04 "SSIFSR,FIFO Status Register"
|
|
rbitfld.long 0x04 24.--27. " TDC ,Number of Data Bytes Stored in SSIFTDR" "No data,,,,,,,,32 bytes,,,,,,,"
|
|
bitfld.long 0x04 16. " TDE ,Transmit Data Empty" "Not empty,Empty"
|
|
rbitfld.long 0x04 8.--11. " RDC ,Number of Data Bytes Stored in SSIFRDR" "No data,,,,,,,,32 bytes,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RDF ,Receive Data Full" "Not full,Full"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x00 "SSIFTDR,Transmit FIFO Data Register"
|
|
hgroup.long 0x1C++0x3
|
|
hide.long 0x00 "SSIFRDR,Receive FIFO Data Register"
|
|
in
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SSITDMR,TDM Mode Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 17. " RXDMUTE ,Receive Direct Data Mute Setting" "Without change,0 data"
|
|
endif
|
|
bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TDM ,TDM Mode" "Disabled,Enabled"
|
|
sif !cpuis("R7S7210*")
|
|
group.long 0x24++0x0B
|
|
line.long 0x00 "SSIFCCR,FC Control Register"
|
|
bitfld.long 0x00 16. " FIEN ,Frequency Change Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FCEN ,Frequency Change Detection Enable" "Disabled,Enabled"
|
|
line.long 0x04 "SSIFCMR,FC Mode Register"
|
|
hexmask.long.word 0x04 16.--29. 1. " MAXV ,Maximum Value"
|
|
hexmask.long.word 0x04 0.--13. 1. " MINV ,Minimum Value"
|
|
line.long 0x08 "SSIFCSR,FC Status Register"
|
|
bitfld.long 0x08 24. " FCIRQ ,Frequency Change Detection Error Interrupt Status" "Not changed,Changed"
|
|
hexmask.long.word 0x08 0.--13. 1. " VALUE ,VALUE"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 3"
|
|
base ad:0xE820C800
|
|
width 9.
|
|
if ((((per.l(ad:0xE820C800+0x20))&0x1)==0x1)&&(((per.l(ad:0xE820C800))&0x380000)==(0x000000||0x080000)))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" ",4 word,6 words,8 words"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "High/Low,"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "->Upper bits,->Lower bits"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820C800+0x20))&0x1)==0x1)&&(((per.l(ad:0xE820C800))&0x380000)>0x080000)&&(((per.l(ad:0xE820C800))&0x380000)<0x300000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" ",4 word,6 words,8 words"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "High/Low,"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "Left-aligned,Right-aligned"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820C800+0x20))&0x1)==0x1)&&(((per.l(ad:0xE820C800))&0x380000)>0x280000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" ",4 word,6 words,8 words"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "High/Low,"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820C800+0x20))&0x1)==0x0)&&(((per.l(ad:0xE820C800))&0x380000)==(0x000000||0x080000)))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" "1 channel,2 channels,3 channels,4 channels"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "Low/High,High/Low"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "->Upper bits,->Lower bits"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820C800+0x20))&0x1)==0x0)&&(((per.l(ad:0xE820C800))&0x380000)>0x080000)&&(((per.l(ad:0xE820C800))&0x380000)<0x300000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" "1 channel,2 channels,3 channels,4 channels"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "Low/High,High/Low"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "Left-aligned,Right-aligned"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820C800+0x20))&0x1)==0x0)&&(((per.l(ad:0xE820C800))&0x380000)>0x280000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" "1 channel,2 channels,3 channels,4 channels"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "Low/High,High/Low"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
endif
|
|
if ((((per.l(ad:0xE820C800+0x20))&0x1)==0x1)||(((per.l(ad:0xE820C800+0x20))&0x100)==0x100))
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SSISR,Status Register"
|
|
bitfld.long 0x00 29. " TUIRQ ,Transmit Underflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 28. " TOIRQ ,Transmit Overflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 27. " RUIRQ ,Receive Underflow Error Interrupt Status Flag" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " ROIRQ ,Receive Overflow Error Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 0. " IDST ,Idle Mode Status Flag" "Low,High"
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SSISR,Status Register"
|
|
bitfld.long 0x00 29. " TUIRQ ,Transmit Underflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 28. " TOIRQ ,Transmit Overflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 27. " RUIRQ ,Receive Underflow Error Interrupt Status Flag" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " ROIRQ ,Receive Overflow Error Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 5.--6. " TCHNO ,Transmit Channel Number" "0,1,2,3"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " TSWNO ,Transmit Serial Word Number" "0,1"
|
|
rbitfld.long 0x00 2.--3. " RCHNO ,Receive Channel Number" "0,1,2,3"
|
|
rbitfld.long 0x00 1. " RSWNO ,Receive Serial Word Number" "0,1"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " IDST ,Idle Mode Status Flag" "Low,High"
|
|
endif
|
|
group.long 0x10++0x7
|
|
line.long 0x00 "SSIFCR,FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " TTRG ,Transmit Data Trigger Number" "7,6,4,2"
|
|
bitfld.long 0x00 4.--5. " RTRG ,Receive Data Trigger Number" "1,2,4,6"
|
|
bitfld.long 0x00 3. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TFRST ,Transmit FIFO Data Register Reset" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RFRST ,Receive FIFO Data Register Reset" "Disabled,Enabled"
|
|
line.long 0x04 "SSIFSR,FIFO Status Register"
|
|
rbitfld.long 0x04 24.--27. " TDC ,Number of Data Bytes Stored in SSIFTDR" "No data,,,,,,,,32 bytes,,,,,,,"
|
|
bitfld.long 0x04 16. " TDE ,Transmit Data Empty" "Not empty,Empty"
|
|
rbitfld.long 0x04 8.--11. " RDC ,Number of Data Bytes Stored in SSIFRDR" "No data,,,,,,,,32 bytes,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RDF ,Receive Data Full" "Not full,Full"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x00 "SSIFTDR,Transmit FIFO Data Register"
|
|
hgroup.long 0x1C++0x3
|
|
hide.long 0x00 "SSIFRDR,Receive FIFO Data Register"
|
|
in
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SSITDMR,TDM Mode Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 17. " RXDMUTE ,Receive Direct Data Mute Setting" "Without change,0 data"
|
|
endif
|
|
bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TDM ,TDM Mode" "Disabled,Enabled"
|
|
sif !cpuis("R7S7210*")
|
|
group.long 0x24++0x0B
|
|
line.long 0x00 "SSIFCCR,FC Control Register"
|
|
bitfld.long 0x00 16. " FIEN ,Frequency Change Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FCEN ,Frequency Change Detection Enable" "Disabled,Enabled"
|
|
line.long 0x04 "SSIFCMR,FC Mode Register"
|
|
hexmask.long.word 0x04 16.--29. 1. " MAXV ,Maximum Value"
|
|
hexmask.long.word 0x04 0.--13. 1. " MINV ,Minimum Value"
|
|
line.long 0x08 "SSIFCSR,FC Status Register"
|
|
bitfld.long 0x08 24. " FCIRQ ,Frequency Change Detection Error Interrupt Status" "Not changed,Changed"
|
|
hexmask.long.word 0x08 0.--13. 1. " VALUE ,VALUE"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 4"
|
|
base ad:0xE820D000
|
|
width 9.
|
|
if ((((per.l(ad:0xE820D000+0x20))&0x1)==0x1)&&(((per.l(ad:0xE820D000))&0x380000)==(0x000000||0x080000)))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" ",4 word,6 words,8 words"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "High/Low,"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "->Upper bits,->Lower bits"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820D000+0x20))&0x1)==0x1)&&(((per.l(ad:0xE820D000))&0x380000)>0x080000)&&(((per.l(ad:0xE820D000))&0x380000)<0x300000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" ",4 word,6 words,8 words"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "High/Low,"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "Left-aligned,Right-aligned"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820D000+0x20))&0x1)==0x1)&&(((per.l(ad:0xE820D000))&0x380000)>0x280000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" ",4 word,6 words,8 words"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "High/Low,"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820D000+0x20))&0x1)==0x0)&&(((per.l(ad:0xE820D000))&0x380000)==(0x000000||0x080000)))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" "1 channel,2 channels,3 channels,4 channels"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "Low/High,High/Low"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "->Upper bits,->Lower bits"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820D000+0x20))&0x1)==0x0)&&(((per.l(ad:0xE820D000))&0x380000)>0x080000)&&(((per.l(ad:0xE820D000))&0x380000)<0x300000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" "1 channel,2 channels,3 channels,4 channels"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "Low/High,High/Low"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "Left-aligned,Right-aligned"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820D000+0x20))&0x1)==0x0)&&(((per.l(ad:0xE820D000))&0x380000)>0x280000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" "1 channel,2 channels,3 channels,4 channels"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "Low/High,High/Low"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
endif
|
|
if ((((per.l(ad:0xE820D000+0x20))&0x1)==0x1)||(((per.l(ad:0xE820D000+0x20))&0x100)==0x100))
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SSISR,Status Register"
|
|
bitfld.long 0x00 29. " TUIRQ ,Transmit Underflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 28. " TOIRQ ,Transmit Overflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 27. " RUIRQ ,Receive Underflow Error Interrupt Status Flag" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " ROIRQ ,Receive Overflow Error Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 0. " IDST ,Idle Mode Status Flag" "Low,High"
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SSISR,Status Register"
|
|
bitfld.long 0x00 29. " TUIRQ ,Transmit Underflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 28. " TOIRQ ,Transmit Overflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 27. " RUIRQ ,Receive Underflow Error Interrupt Status Flag" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " ROIRQ ,Receive Overflow Error Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 5.--6. " TCHNO ,Transmit Channel Number" "0,1,2,3"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " TSWNO ,Transmit Serial Word Number" "0,1"
|
|
rbitfld.long 0x00 2.--3. " RCHNO ,Receive Channel Number" "0,1,2,3"
|
|
rbitfld.long 0x00 1. " RSWNO ,Receive Serial Word Number" "0,1"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " IDST ,Idle Mode Status Flag" "Low,High"
|
|
endif
|
|
group.long 0x10++0x7
|
|
line.long 0x00 "SSIFCR,FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " TTRG ,Transmit Data Trigger Number" "7,6,4,2"
|
|
bitfld.long 0x00 4.--5. " RTRG ,Receive Data Trigger Number" "1,2,4,6"
|
|
bitfld.long 0x00 3. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TFRST ,Transmit FIFO Data Register Reset" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RFRST ,Receive FIFO Data Register Reset" "Disabled,Enabled"
|
|
line.long 0x04 "SSIFSR,FIFO Status Register"
|
|
rbitfld.long 0x04 24.--27. " TDC ,Number of Data Bytes Stored in SSIFTDR" "No data,,,,,,,,32 bytes,,,,,,,"
|
|
bitfld.long 0x04 16. " TDE ,Transmit Data Empty" "Not empty,Empty"
|
|
rbitfld.long 0x04 8.--11. " RDC ,Number of Data Bytes Stored in SSIFRDR" "No data,,,,,,,,32 bytes,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RDF ,Receive Data Full" "Not full,Full"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x00 "SSIFTDR,Transmit FIFO Data Register"
|
|
hgroup.long 0x1C++0x3
|
|
hide.long 0x00 "SSIFRDR,Receive FIFO Data Register"
|
|
in
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SSITDMR,TDM Mode Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 17. " RXDMUTE ,Receive Direct Data Mute Setting" "Without change,0 data"
|
|
endif
|
|
bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TDM ,TDM Mode" "Disabled,Enabled"
|
|
sif !cpuis("R7S7210*")
|
|
group.long 0x24++0x0B
|
|
line.long 0x00 "SSIFCCR,FC Control Register"
|
|
bitfld.long 0x00 16. " FIEN ,Frequency Change Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FCEN ,Frequency Change Detection Enable" "Disabled,Enabled"
|
|
line.long 0x04 "SSIFCMR,FC Mode Register"
|
|
hexmask.long.word 0x04 16.--29. 1. " MAXV ,Maximum Value"
|
|
hexmask.long.word 0x04 0.--13. 1. " MINV ,Minimum Value"
|
|
line.long 0x08 "SSIFCSR,FC Status Register"
|
|
bitfld.long 0x08 24. " FCIRQ ,Frequency Change Detection Error Interrupt Status" "Not changed,Changed"
|
|
hexmask.long.word 0x08 0.--13. 1. " VALUE ,VALUE"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 5"
|
|
base ad:0xE820D800
|
|
width 9.
|
|
if ((((per.l(ad:0xE820D800+0x20))&0x1)==0x1)&&(((per.l(ad:0xE820D800))&0x380000)==(0x000000||0x080000)))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" ",4 word,6 words,8 words"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "High/Low,"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "->Upper bits,->Lower bits"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820D800+0x20))&0x1)==0x1)&&(((per.l(ad:0xE820D800))&0x380000)>0x080000)&&(((per.l(ad:0xE820D800))&0x380000)<0x300000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" ",4 word,6 words,8 words"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "High/Low,"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "Left-aligned,Right-aligned"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820D800+0x20))&0x1)==0x1)&&(((per.l(ad:0xE820D800))&0x380000)>0x280000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" ",4 word,6 words,8 words"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "High/Low,"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820D800+0x20))&0x1)==0x0)&&(((per.l(ad:0xE820D800))&0x380000)==(0x000000||0x080000)))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" "1 channel,2 channels,3 channels,4 channels"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "Low/High,High/Low"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "->Upper bits,->Lower bits"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820D800+0x20))&0x1)==0x0)&&(((per.l(ad:0xE820D800))&0x380000)>0x080000)&&(((per.l(ad:0xE820D800))&0x380000)<0x300000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" "1 channel,2 channels,3 channels,4 channels"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "Low/High,High/Low"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PDTA ,Parallel Data Alignment" "Left-aligned,Right-aligned"
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
elif ((((per.l(ad:0xE820D800+0x20))&0x1)==0x0)&&(((per.l(ad:0xE820D800))&0x380000)>0x280000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SSICR,Control Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 30. " CKS ,Oversampling Clock Select" "AUDIO_X1,AUDIO_CLK"
|
|
endif
|
|
bitfld.long 0x00 29. " TUIEN ,Transmit Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TOIEN ,Transmit Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RUIEN ,Receive Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ROIEN ,Receive Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " CHNL ,Channels" "1 channel,2 channels,3 channels,4 channels"
|
|
bitfld.long 0x00 19.--21. " DWL ,Data Word Length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,"
|
|
bitfld.long 0x00 16.--18. " SWL ,System Word Length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 14. " SWSD ,Serial WS Direction" "Input/Slave,Output/Master"
|
|
bitfld.long 0x00 13. " SCKP ,Serial Bit Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWSP ,Serial WS Polarity" "Low/High,High/Low"
|
|
bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High"
|
|
bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data/padding bits,Padding bits/serial data"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DEL ,Serial Data Delay" "1 cycle,No delay"
|
|
bitfld.long 0x00 4.--7. " CKDV ,Serial Oversampling Clock Division Ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,,,"
|
|
bitfld.long 0x00 3. " MUEN ,Mute Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TEN ,Transmit Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REN ,Receive Enable" "Disabled,Enabled"
|
|
endif
|
|
if ((((per.l(ad:0xE820D800+0x20))&0x1)==0x1)||(((per.l(ad:0xE820D800+0x20))&0x100)==0x100))
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SSISR,Status Register"
|
|
bitfld.long 0x00 29. " TUIRQ ,Transmit Underflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 28. " TOIRQ ,Transmit Overflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 27. " RUIRQ ,Receive Underflow Error Interrupt Status Flag" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " ROIRQ ,Receive Overflow Error Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 0. " IDST ,Idle Mode Status Flag" "Low,High"
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "SSISR,Status Register"
|
|
bitfld.long 0x00 29. " TUIRQ ,Transmit Underflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 28. " TOIRQ ,Transmit Overflow Error Interrupt Status Flag" "Low,High"
|
|
bitfld.long 0x00 27. " RUIRQ ,Receive Underflow Error Interrupt Status Flag" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " ROIRQ ,Receive Overflow Error Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Low,High"
|
|
rbitfld.long 0x00 5.--6. " TCHNO ,Transmit Channel Number" "0,1,2,3"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " TSWNO ,Transmit Serial Word Number" "0,1"
|
|
rbitfld.long 0x00 2.--3. " RCHNO ,Receive Channel Number" "0,1,2,3"
|
|
rbitfld.long 0x00 1. " RSWNO ,Receive Serial Word Number" "0,1"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " IDST ,Idle Mode Status Flag" "Low,High"
|
|
endif
|
|
group.long 0x10++0x7
|
|
line.long 0x00 "SSIFCR,FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " TTRG ,Transmit Data Trigger Number" "7,6,4,2"
|
|
bitfld.long 0x00 4.--5. " RTRG ,Receive Data Trigger Number" "1,2,4,6"
|
|
bitfld.long 0x00 3. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TFRST ,Transmit FIFO Data Register Reset" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RFRST ,Receive FIFO Data Register Reset" "Disabled,Enabled"
|
|
line.long 0x04 "SSIFSR,FIFO Status Register"
|
|
rbitfld.long 0x04 24.--27. " TDC ,Number of Data Bytes Stored in SSIFTDR" "No data,,,,,,,,32 bytes,,,,,,,"
|
|
bitfld.long 0x04 16. " TDE ,Transmit Data Empty" "Not empty,Empty"
|
|
rbitfld.long 0x04 8.--11. " RDC ,Number of Data Bytes Stored in SSIFRDR" "No data,,,,,,,,32 bytes,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RDF ,Receive Data Full" "Not full,Full"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x00 "SSIFTDR,Transmit FIFO Data Register"
|
|
hgroup.long 0x1C++0x3
|
|
hide.long 0x00 "SSIFRDR,Receive FIFO Data Register"
|
|
in
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SSITDMR,TDM Mode Register"
|
|
sif !cpuis("R7S7210*")
|
|
bitfld.long 0x00 17. " RXDMUTE ,Receive Direct Data Mute Setting" "Without change,0 data"
|
|
endif
|
|
bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TDM ,TDM Mode" "Disabled,Enabled"
|
|
sif !cpuis("R7S7210*")
|
|
group.long 0x24++0x0B
|
|
line.long 0x00 "SSIFCCR,FC Control Register"
|
|
bitfld.long 0x00 16. " FIEN ,Frequency Change Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FCEN ,Frequency Change Detection Enable" "Disabled,Enabled"
|
|
line.long 0x04 "SSIFCMR,FC Mode Register"
|
|
hexmask.long.word 0x04 16.--29. 1. " MAXV ,Maximum Value"
|
|
hexmask.long.word 0x04 0.--13. 1. " MINV ,Minimum Value"
|
|
line.long 0x08 "SSIFCSR,FC Status Register"
|
|
bitfld.long 0x08 24. " FCIRQ ,Frequency Change Detection Error Interrupt Status" "Not changed,Changed"
|
|
hexmask.long.word 0x08 0.--13. 1. " VALUE ,VALUE"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree "RS-CAN (CAN Interface)"
|
|
base ad:0xE803A000
|
|
width 14.
|
|
tree "Channel 0 Registers"
|
|
group.long 0x0++0x07
|
|
line.long 0x00 "RSCAN0C0CFG,Channel 0 Configuration Register"
|
|
bitfld.long 0x00 24.--25. " SJW ,Resynchronization jump width control" "1 Tq,2 Tq,3 Tq,4 Tq"
|
|
bitfld.long 0x00 20.--22. " TSEG2 ,Time segment 2 control" ",2 Tq,3 Tq,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq"
|
|
bitfld.long 0x00 16.--19. " TSEG1 ,Time segment 1 control" ",,,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq,9 Tq,10 Tq,11 Tq,12 Tq,13 Tq,14 Tq,15 Tq,16 Tq"
|
|
hexmask.long.word 0x00 0.--9. 1. " BRP ,Prescaler division ratio set"
|
|
line.long 0x04 "RSCAN0C0CTR,Channel 0 Control Register"
|
|
bitfld.long 0x04 25.--26. " CTMS ,Communication test mode select" "Standard test,Listen-only,Self-test 0,Self-test 1"
|
|
bitfld.long 0x04 24. " CTME ,Communication test mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " ERRD ,Error display mode select" "Only first,All"
|
|
bitfld.long 0x04 21.--22. " BOM ,Bus off recovery mode select" "ISO11898-1 compliant,Bus-off entry,Bus-off end,Program request"
|
|
newline
|
|
bitfld.long 0x04 16. " TAIE ,Transmit abort interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " ALIE ,Arbitration lost interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " BLIE ,Bus lock interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " OLIE ,Overload frame transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 12. " BORIE ,Bus off recovery interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " BOEIE ,Bus off entry interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " EPIE ,Error passive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " EWIE ,Error warning interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 8. " BEIE ,Bus error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " RTBO ,Forcible return from bus-off" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " CSLPR ,Channel stop mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--1. " CHMDC ,Mode select" "Communication,Reset,Halt,?..."
|
|
rgroup.long (0x0+0x08)++0x03
|
|
line.long 0x00 "RSCAN0C0STS,Channel 0 Status Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TEC ,Transmit error counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " REC ,Receive error counter"
|
|
bitfld.long 0x00 7. " COMSTS ,Communication status flag" "Not ready,Ready"
|
|
bitfld.long 0x00 6. " RECSTS ,Receive status flag" "Idle,Reception"
|
|
newline
|
|
bitfld.long 0x00 5. " TRMSTS ,Transmit status flag" "Idle/Reception,Off"
|
|
bitfld.long 0x00 4. " BOSTS ,Bus off status flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " EPSTS ,Error passive status flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " CSLPSTS ,Channel stop status flag" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x00 1. " CHLTSTS ,Channel halt status flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " CRSTSTS ,Channel reset status flag" "Not occurred,Occurred"
|
|
group.long (0x0+0x0C)++0x03
|
|
line.long 0x00 "RSCAN0C0ERFL,Channel 0 Error Flag Register"
|
|
hexmask.long.word 0x00 16.--30. 1. " CRCREG ,CRC calculation data"
|
|
bitfld.long 0x00 14. " ADERR ,ACK delimiter error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 13. " B0ERR ,Dominant bit error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 12. " B1ERR ,Recessive bit error flag" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 11. " CERR ,CRC error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 10. " AERR ,ACK error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 9. " FERR ,Form error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 8. " SERR ,Stuff error flag" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 7. " ALF ,Arbitration-lost flag" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " BLF ,Dominant lock flag" "Not detected,Detected"
|
|
bitfld.long 0x00 5. " OVLF ,Overload flag" "Not detected,Detected"
|
|
bitfld.long 0x00 4. " BORF ,Bus off recovery flag" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 3. " BOEF ,Bus off entry flag" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " EPF ,Error passive flag" "Not detected,Detected"
|
|
bitfld.long 0x00 1. " EWF ,Error warning flag" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " BEF ,Protocol error flag" "Not detected,Detected"
|
|
tree.end
|
|
tree "Channel 1 Registers"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "RSCAN0C1CFG,Channel 1 Configuration Register"
|
|
bitfld.long 0x00 24.--25. " SJW ,Resynchronization jump width control" "1 Tq,2 Tq,3 Tq,4 Tq"
|
|
bitfld.long 0x00 20.--22. " TSEG2 ,Time segment 2 control" ",2 Tq,3 Tq,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq"
|
|
bitfld.long 0x00 16.--19. " TSEG1 ,Time segment 1 control" ",,,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq,9 Tq,10 Tq,11 Tq,12 Tq,13 Tq,14 Tq,15 Tq,16 Tq"
|
|
hexmask.long.word 0x00 0.--9. 1. " BRP ,Prescaler division ratio set"
|
|
line.long 0x04 "RSCAN0C1CTR,Channel 1 Control Register"
|
|
bitfld.long 0x04 25.--26. " CTMS ,Communication test mode select" "Standard test,Listen-only,Self-test 0,Self-test 1"
|
|
bitfld.long 0x04 24. " CTME ,Communication test mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " ERRD ,Error display mode select" "Only first,All"
|
|
bitfld.long 0x04 21.--22. " BOM ,Bus off recovery mode select" "ISO11898-1 compliant,Bus-off entry,Bus-off end,Program request"
|
|
newline
|
|
bitfld.long 0x04 16. " TAIE ,Transmit abort interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " ALIE ,Arbitration lost interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " BLIE ,Bus lock interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " OLIE ,Overload frame transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 12. " BORIE ,Bus off recovery interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " BOEIE ,Bus off entry interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " EPIE ,Error passive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " EWIE ,Error warning interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 8. " BEIE ,Bus error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " RTBO ,Forcible return from bus-off" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " CSLPR ,Channel stop mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--1. " CHMDC ,Mode select" "Communication,Reset,Halt,?..."
|
|
rgroup.long (0x10+0x08)++0x03
|
|
line.long 0x00 "RSCAN0C1STS,Channel 1 Status Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TEC ,Transmit error counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " REC ,Receive error counter"
|
|
bitfld.long 0x00 7. " COMSTS ,Communication status flag" "Not ready,Ready"
|
|
bitfld.long 0x00 6. " RECSTS ,Receive status flag" "Idle,Reception"
|
|
newline
|
|
bitfld.long 0x00 5. " TRMSTS ,Transmit status flag" "Idle/Reception,Off"
|
|
bitfld.long 0x00 4. " BOSTS ,Bus off status flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " EPSTS ,Error passive status flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " CSLPSTS ,Channel stop status flag" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x00 1. " CHLTSTS ,Channel halt status flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " CRSTSTS ,Channel reset status flag" "Not occurred,Occurred"
|
|
group.long (0x10+0x0C)++0x03
|
|
line.long 0x00 "RSCAN0C1ERFL,Channel 1 Error Flag Register"
|
|
hexmask.long.word 0x00 16.--30. 1. " CRCREG ,CRC calculation data"
|
|
bitfld.long 0x00 14. " ADERR ,ACK delimiter error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 13. " B0ERR ,Dominant bit error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 12. " B1ERR ,Recessive bit error flag" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 11. " CERR ,CRC error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 10. " AERR ,ACK error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 9. " FERR ,Form error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 8. " SERR ,Stuff error flag" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 7. " ALF ,Arbitration-lost flag" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " BLF ,Dominant lock flag" "Not detected,Detected"
|
|
bitfld.long 0x00 5. " OVLF ,Overload flag" "Not detected,Detected"
|
|
bitfld.long 0x00 4. " BORF ,Bus off recovery flag" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 3. " BOEF ,Bus off entry flag" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " EPF ,Error passive flag" "Not detected,Detected"
|
|
bitfld.long 0x00 1. " EWF ,Error warning flag" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " BEF ,Protocol error flag" "Not detected,Detected"
|
|
tree.end
|
|
tree "Channel 2 Registers"
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "RSCAN0C2CFG,Channel 2 Configuration Register"
|
|
bitfld.long 0x00 24.--25. " SJW ,Resynchronization jump width control" "1 Tq,2 Tq,3 Tq,4 Tq"
|
|
bitfld.long 0x00 20.--22. " TSEG2 ,Time segment 2 control" ",2 Tq,3 Tq,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq"
|
|
bitfld.long 0x00 16.--19. " TSEG1 ,Time segment 1 control" ",,,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq,9 Tq,10 Tq,11 Tq,12 Tq,13 Tq,14 Tq,15 Tq,16 Tq"
|
|
hexmask.long.word 0x00 0.--9. 1. " BRP ,Prescaler division ratio set"
|
|
line.long 0x04 "RSCAN0C2CTR,Channel 2 Control Register"
|
|
bitfld.long 0x04 25.--26. " CTMS ,Communication test mode select" "Standard test,Listen-only,Self-test 0,Self-test 1"
|
|
bitfld.long 0x04 24. " CTME ,Communication test mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " ERRD ,Error display mode select" "Only first,All"
|
|
bitfld.long 0x04 21.--22. " BOM ,Bus off recovery mode select" "ISO11898-1 compliant,Bus-off entry,Bus-off end,Program request"
|
|
newline
|
|
bitfld.long 0x04 16. " TAIE ,Transmit abort interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " ALIE ,Arbitration lost interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " BLIE ,Bus lock interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " OLIE ,Overload frame transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 12. " BORIE ,Bus off recovery interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " BOEIE ,Bus off entry interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " EPIE ,Error passive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " EWIE ,Error warning interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 8. " BEIE ,Bus error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " RTBO ,Forcible return from bus-off" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " CSLPR ,Channel stop mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--1. " CHMDC ,Mode select" "Communication,Reset,Halt,?..."
|
|
rgroup.long (0x20+0x08)++0x03
|
|
line.long 0x00 "RSCAN0C2STS,Channel 2 Status Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TEC ,Transmit error counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " REC ,Receive error counter"
|
|
bitfld.long 0x00 7. " COMSTS ,Communication status flag" "Not ready,Ready"
|
|
bitfld.long 0x00 6. " RECSTS ,Receive status flag" "Idle,Reception"
|
|
newline
|
|
bitfld.long 0x00 5. " TRMSTS ,Transmit status flag" "Idle/Reception,Off"
|
|
bitfld.long 0x00 4. " BOSTS ,Bus off status flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " EPSTS ,Error passive status flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " CSLPSTS ,Channel stop status flag" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x00 1. " CHLTSTS ,Channel halt status flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " CRSTSTS ,Channel reset status flag" "Not occurred,Occurred"
|
|
group.long (0x20+0x0C)++0x03
|
|
line.long 0x00 "RSCAN0C2ERFL,Channel 2 Error Flag Register"
|
|
hexmask.long.word 0x00 16.--30. 1. " CRCREG ,CRC calculation data"
|
|
bitfld.long 0x00 14. " ADERR ,ACK delimiter error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 13. " B0ERR ,Dominant bit error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 12. " B1ERR ,Recessive bit error flag" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 11. " CERR ,CRC error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 10. " AERR ,ACK error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 9. " FERR ,Form error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 8. " SERR ,Stuff error flag" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 7. " ALF ,Arbitration-lost flag" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " BLF ,Dominant lock flag" "Not detected,Detected"
|
|
bitfld.long 0x00 5. " OVLF ,Overload flag" "Not detected,Detected"
|
|
bitfld.long 0x00 4. " BORF ,Bus off recovery flag" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 3. " BOEF ,Bus off entry flag" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " EPF ,Error passive flag" "Not detected,Detected"
|
|
bitfld.long 0x00 1. " EWF ,Error warning flag" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " BEF ,Protocol error flag" "Not detected,Detected"
|
|
tree.end
|
|
tree "Channel 3 Registers"
|
|
group.long 0x30++0x07
|
|
line.long 0x00 "RSCAN0C3CFG,Channel 3 Configuration Register"
|
|
bitfld.long 0x00 24.--25. " SJW ,Resynchronization jump width control" "1 Tq,2 Tq,3 Tq,4 Tq"
|
|
bitfld.long 0x00 20.--22. " TSEG2 ,Time segment 2 control" ",2 Tq,3 Tq,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq"
|
|
bitfld.long 0x00 16.--19. " TSEG1 ,Time segment 1 control" ",,,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq,9 Tq,10 Tq,11 Tq,12 Tq,13 Tq,14 Tq,15 Tq,16 Tq"
|
|
hexmask.long.word 0x00 0.--9. 1. " BRP ,Prescaler division ratio set"
|
|
line.long 0x04 "RSCAN0C3CTR,Channel 3 Control Register"
|
|
bitfld.long 0x04 25.--26. " CTMS ,Communication test mode select" "Standard test,Listen-only,Self-test 0,Self-test 1"
|
|
bitfld.long 0x04 24. " CTME ,Communication test mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " ERRD ,Error display mode select" "Only first,All"
|
|
bitfld.long 0x04 21.--22. " BOM ,Bus off recovery mode select" "ISO11898-1 compliant,Bus-off entry,Bus-off end,Program request"
|
|
newline
|
|
bitfld.long 0x04 16. " TAIE ,Transmit abort interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " ALIE ,Arbitration lost interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " BLIE ,Bus lock interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " OLIE ,Overload frame transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 12. " BORIE ,Bus off recovery interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " BOEIE ,Bus off entry interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " EPIE ,Error passive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " EWIE ,Error warning interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 8. " BEIE ,Bus error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " RTBO ,Forcible return from bus-off" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " CSLPR ,Channel stop mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--1. " CHMDC ,Mode select" "Communication,Reset,Halt,?..."
|
|
rgroup.long (0x30+0x08)++0x03
|
|
line.long 0x00 "RSCAN0C3STS,Channel 3 Status Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TEC ,Transmit error counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " REC ,Receive error counter"
|
|
bitfld.long 0x00 7. " COMSTS ,Communication status flag" "Not ready,Ready"
|
|
bitfld.long 0x00 6. " RECSTS ,Receive status flag" "Idle,Reception"
|
|
newline
|
|
bitfld.long 0x00 5. " TRMSTS ,Transmit status flag" "Idle/Reception,Off"
|
|
bitfld.long 0x00 4. " BOSTS ,Bus off status flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " EPSTS ,Error passive status flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " CSLPSTS ,Channel stop status flag" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x00 1. " CHLTSTS ,Channel halt status flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " CRSTSTS ,Channel reset status flag" "Not occurred,Occurred"
|
|
group.long (0x30+0x0C)++0x03
|
|
line.long 0x00 "RSCAN0C3ERFL,Channel 3 Error Flag Register"
|
|
hexmask.long.word 0x00 16.--30. 1. " CRCREG ,CRC calculation data"
|
|
bitfld.long 0x00 14. " ADERR ,ACK delimiter error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 13. " B0ERR ,Dominant bit error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 12. " B1ERR ,Recessive bit error flag" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 11. " CERR ,CRC error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 10. " AERR ,ACK error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 9. " FERR ,Form error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 8. " SERR ,Stuff error flag" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 7. " ALF ,Arbitration-lost flag" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " BLF ,Dominant lock flag" "Not detected,Detected"
|
|
bitfld.long 0x00 5. " OVLF ,Overload flag" "Not detected,Detected"
|
|
bitfld.long 0x00 4. " BORF ,Bus off recovery flag" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 3. " BOEF ,Bus off entry flag" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " EPF ,Error passive flag" "Not detected,Detected"
|
|
bitfld.long 0x00 1. " EWF ,Error warning flag" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " BEF ,Protocol error flag" "Not detected,Detected"
|
|
tree.end
|
|
tree "Channel 4 Registers"
|
|
group.long 0x40++0x07
|
|
line.long 0x00 "RSCAN0C4CFG,Channel 4 Configuration Register"
|
|
bitfld.long 0x00 24.--25. " SJW ,Resynchronization jump width control" "1 Tq,2 Tq,3 Tq,4 Tq"
|
|
bitfld.long 0x00 20.--22. " TSEG2 ,Time segment 2 control" ",2 Tq,3 Tq,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq"
|
|
bitfld.long 0x00 16.--19. " TSEG1 ,Time segment 1 control" ",,,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq,9 Tq,10 Tq,11 Tq,12 Tq,13 Tq,14 Tq,15 Tq,16 Tq"
|
|
hexmask.long.word 0x00 0.--9. 1. " BRP ,Prescaler division ratio set"
|
|
line.long 0x04 "RSCAN0C4CTR,Channel 4 Control Register"
|
|
bitfld.long 0x04 25.--26. " CTMS ,Communication test mode select" "Standard test,Listen-only,Self-test 0,Self-test 1"
|
|
bitfld.long 0x04 24. " CTME ,Communication test mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " ERRD ,Error display mode select" "Only first,All"
|
|
bitfld.long 0x04 21.--22. " BOM ,Bus off recovery mode select" "ISO11898-1 compliant,Bus-off entry,Bus-off end,Program request"
|
|
newline
|
|
bitfld.long 0x04 16. " TAIE ,Transmit abort interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " ALIE ,Arbitration lost interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " BLIE ,Bus lock interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " OLIE ,Overload frame transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 12. " BORIE ,Bus off recovery interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " BOEIE ,Bus off entry interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " EPIE ,Error passive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " EWIE ,Error warning interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 8. " BEIE ,Bus error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " RTBO ,Forcible return from bus-off" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " CSLPR ,Channel stop mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--1. " CHMDC ,Mode select" "Communication,Reset,Halt,?..."
|
|
rgroup.long (0x40+0x08)++0x03
|
|
line.long 0x00 "RSCAN0C4STS,Channel 4 Status Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TEC ,Transmit error counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " REC ,Receive error counter"
|
|
bitfld.long 0x00 7. " COMSTS ,Communication status flag" "Not ready,Ready"
|
|
bitfld.long 0x00 6. " RECSTS ,Receive status flag" "Idle,Reception"
|
|
newline
|
|
bitfld.long 0x00 5. " TRMSTS ,Transmit status flag" "Idle/Reception,Off"
|
|
bitfld.long 0x00 4. " BOSTS ,Bus off status flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " EPSTS ,Error passive status flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " CSLPSTS ,Channel stop status flag" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x00 1. " CHLTSTS ,Channel halt status flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " CRSTSTS ,Channel reset status flag" "Not occurred,Occurred"
|
|
group.long (0x40+0x0C)++0x03
|
|
line.long 0x00 "RSCAN0C4ERFL,Channel 4 Error Flag Register"
|
|
hexmask.long.word 0x00 16.--30. 1. " CRCREG ,CRC calculation data"
|
|
bitfld.long 0x00 14. " ADERR ,ACK delimiter error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 13. " B0ERR ,Dominant bit error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 12. " B1ERR ,Recessive bit error flag" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 11. " CERR ,CRC error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 10. " AERR ,ACK error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 9. " FERR ,Form error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 8. " SERR ,Stuff error flag" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 7. " ALF ,Arbitration-lost flag" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " BLF ,Dominant lock flag" "Not detected,Detected"
|
|
bitfld.long 0x00 5. " OVLF ,Overload flag" "Not detected,Detected"
|
|
bitfld.long 0x00 4. " BORF ,Bus off recovery flag" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 3. " BOEF ,Bus off entry flag" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " EPF ,Error passive flag" "Not detected,Detected"
|
|
bitfld.long 0x00 1. " EWF ,Error warning flag" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " BEF ,Protocol error flag" "Not detected,Detected"
|
|
tree.end
|
|
width 17.
|
|
tree "Global Registers"
|
|
group.long 0x84++0x07
|
|
line.long 0x00 "RSCAN0GCFG,Global Configuration Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " ITRCP ,Interval timer prescaler set"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x00 13.--15. " TSBTCS ,Timestamp clock source select" "Channel 0 BTC,Channel 1 BTC,Channel 2 BTC,Channel 3 BTC,Channel 4 BTC,?..."
|
|
bitfld.long 0x00 12. " TSSS ,Timestamp source select" "PCLK/2,Bit time clock"
|
|
else
|
|
bitfld.long 0x00 13.--15. " TSBTCS ,Timestamp clock source select" "Channel 0 BTC,Channel 1 BTC,?..."
|
|
bitfld.long 0x00 12. " TSSS ,Timestamp source select" "PCLKD/2,Bit time clock"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 8.--11. " TSP ,Timestamp clock source division" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x00 4. " DCS ,CAN clock source select" "CLKC,CLK_XINCAN"
|
|
else
|
|
bitfld.long 0x00 4. " DCS ,CAN clock source select" "CANCLKA,CANCLKB"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 3. " MME ,Mirror function enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " DRE ,DLC replacement enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DCE ,DLC check enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TPRI ,Transmit priority select" "ID,Transmit buffer"
|
|
line.long 0x04 "RSCAN0GCTR,Global Control Register"
|
|
bitfld.long 0x04 16. " TSRST ,Timestamp counter reset" "No reset,Reset"
|
|
bitfld.long 0x04 10. " THLEIE ,Transmit history buffer overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " MEIE ,FIFO message lost interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 8. " DEIE ,DLC error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " GSLPR ,Global stop mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--1. " GMDC ,Global mode select" "Operating,Reset,Test,?..."
|
|
rgroup.long 0x8C++0x03
|
|
line.long 0x00 "RSCAN0GSTS,Global Status Register"
|
|
bitfld.long 0x00 3. " GRAMINIT ,CAN RAM initialization status flag" "Completed,Not completed"
|
|
bitfld.long 0x00 2. " GSLPSTS ,Global stop status flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " GHLTSTS ,Global test status flag" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x00 0. " GRSTSTS ,Global reset status flag" "Not occurred,Occurred"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "RSCAN0GERFL,Global Error Flag Register"
|
|
rbitfld.long 0x00 2. " THLES ,Transmit history buffer overflow status flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 1. " MES ,FIFO message lost status flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " DEF ,DLC error flag" "Not occurred,Occurred"
|
|
rgroup.long 0x460++0x03
|
|
line.long 0x00 "RSCAN0GTINTSTS0,Global TX Interrupt Status Register 0"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x00 28. " THIF3 ,Channel 3 transmit history interrupt status flag" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " CFTIF3 ,Channel 3 transmit/receive FIFO transmit/gateway mode interrupt status flag" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " TQIF3 ,Channel 3 transmit queue interrupt status flag" "Not requested,Requested"
|
|
bitfld.long 0x00 25. " TAIF3 ,Channel 3 transmit buffer abort interrupt status flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 24. " TSIF3 ,Channel 3 transmit buffer transmit complete interrupt status flag" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " THIF2 ,Channel 2 transmit history interrupt status flag" "Not requested,Requested"
|
|
bitfld.long 0x00 19. " CFTIF2 ,Channel 2 transmit/receive FIFO transmit/gateway mode interrupt status flag" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " TQIF2 ,Channel 2 transmit queue interrupt status flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 17. " TAIF2 ,Channel 2 transmit buffer abort interrupt status flag" "Not requested,Requested"
|
|
bitfld.long 0x00 16. " TSIF2 ,Channel 2 transmit buffer transmit complete interrupt status flag" "Not requested,Requested"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 12. " THIF1 ,Channel 1 transmit history interrupt status flag" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " CFTIF1 ,Channel 1 transmit/receive FIFO transmit/gateway mode interrupt status flag" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " TQIF1 ,Channel 1 transmit queue interrupt status flag" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " TAIF1 ,Channel 1 transmit buffer abort interrupt status flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 8. " TSIF1 ,Channel 1 transmit buffer transmit complete interrupt status flag" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " THIF0 ,Channel 0 transmit history interrupt status flag" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CFTIF0 ,Channel 0 transmit/receive FIFO transmit/gateway mode interrupt status flag" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " TQIF0 ,Channel 0 transmit queue interrupt status flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 1. " TAIF0 ,Channel 0 transmit buffer abort interrupt status flag" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " TSIF0 ,Channel 0 transmit buffer transmit complete interrupt status flag" "Not requested,Requested"
|
|
sif !cpuis("R7S91*")
|
|
rgroup.long 0x464++0x03
|
|
line.long 0x00 "RSCAN0GTINTSTS1,Global TX Interrupt Status Register 1"
|
|
bitfld.long 0x00 4. " THIF4 ,Channel 4 transmit history interrupt status flag" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CFTIF4 ,Channel 4 transmit/receive FIFO transmit/gateway mode interrupt status flag" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " TQIF4 ,Channel 4 transmit queue interrupt status flag" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " TAIF4 ,Channel 4 transmit buffer abort interrupt status flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 0. " TSIF4 ,Channel 4 transmit buffer transmit complete interrupt status flag" "Not requested,Requested"
|
|
endif
|
|
rgroup.long 0x94++0x03
|
|
line.long 0x00 "RSCAN0GTSC,Global Timestamp Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TS ,Timestamp value"
|
|
tree.end
|
|
width 16.
|
|
tree "Receive Registers"
|
|
group.long 0x98++0x07
|
|
line.long 0x00 "RSCAN0GAFLECTR,Receive Rule Entry Control Register"
|
|
bitfld.long 0x00 8. " AFLDAE ,Receive rule table write enable" "Disabled,Enabled"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x00 0.--4. " AFLPN ,Receive rule table page number configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,?..."
|
|
else
|
|
bitfld.long 0x00 0.--4. " AFLPN ,Receive rule table page number configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
endif
|
|
line.long 0x04 "RSCAN0GAFLCFG0,Receive Rule Configuration Register 0"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RNC0 ,Number of rules for channel 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RNC1 ,Number of rules for channel 1"
|
|
sif !cpuis("R7S91*")
|
|
hexmask.long.byte 0x04 8.--15. 1. " RNC2 ,Number of rules for channel 2"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RNC3 ,Number of rules for channel 3"
|
|
endif
|
|
sif !cpuis("R7S91*")
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "RSCAN0GAFLCFG1,Receive Rule Configuration Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RNC4 ,Number of rules for channel 4"
|
|
endif
|
|
if (((per.l(ad:0xE803A000+0x500))&0x80000000)==0x80000000)
|
|
group.long 0x500++0x07
|
|
line.long 0x00 "RSCAN0GAFLID0,Receive Rule ID Register 0"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM0,Receive Rule Mask Register 0"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[28:0] ,ID mask[28:0]" "0,1"
|
|
bitfld.long 0x04 27. ",ID mask 27" "0,1"
|
|
bitfld.long 0x04 26. ",ID mask 26" "0,1"
|
|
bitfld.long 0x04 25. ",ID mask 25" "0,1"
|
|
bitfld.long 0x04 24. ",ID mask 24" "0,1"
|
|
bitfld.long 0x04 23. ",ID mask 23" "0,1"
|
|
bitfld.long 0x04 22. ",ID mask 22" "0,1"
|
|
bitfld.long 0x04 21. ",ID mask 21" "0,1"
|
|
bitfld.long 0x04 20. ",ID mask 20" "0,1"
|
|
bitfld.long 0x04 19. ",ID mask 19" "0,1"
|
|
bitfld.long 0x04 18. ",ID mask 18" "0,1"
|
|
bitfld.long 0x04 17. ",ID mask 17" "0,1"
|
|
bitfld.long 0x04 16. ",ID mask 16" "0,1"
|
|
bitfld.long 0x04 15. ",ID mask 15" "0,1"
|
|
bitfld.long 0x04 14. ",ID mask 14" "0,1"
|
|
bitfld.long 0x04 13. ",ID mask 13" "0,1"
|
|
bitfld.long 0x04 12. ",ID mask 12" "0,1"
|
|
bitfld.long 0x04 11. ",ID mask 11" "0,1"
|
|
bitfld.long 0x04 10. ",ID mask 10" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
else
|
|
group.long 0x500++0x07
|
|
line.long 0x00 "RSCAN0GAFLID0,Receive Rule ID Register 0"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM0,Receive Rule Mask Register 0"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[10:0] ,ID mask[10:0]" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
endif
|
|
group.long (0x500+0x08)++0x07
|
|
line.long 0x00 "RSCAN0GAFLP00,Receive Rule Pointer 0 Register 0"
|
|
bitfld.long 0x00 28.--31. " GAFLDLC ,Receive rule DLC" "Disabled,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " GAFLPTR ,Receive rule label"
|
|
bitfld.long 0x00 15. " GAFLRMV ,Receive buffer enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. " GAFLRMDP ,Receive buffer number select"
|
|
line.long 0x04 "RSCAN0GAFLP10,Receive Rule Pointer 1 Register 0"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x04 22. " GAFLFDP22 ,FIFO buffer 22 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP21 ,FIFO buffer 21 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP20 ,FIFO buffer 20 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP19 ,FIFO buffer 19 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP18 ,FIFO buffer 18 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP17 ,FIFO buffer 17 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP16 ,FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP15 ,FIFO buffer 15 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP14 ,FIFO buffer 14 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP13 ,FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP12 ,FIFO buffer 12 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP11 ,FIFO buffer 11 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP10 ,FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP9 ,FIFO buffer 9 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP8 ,FIFO buffer 8 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDP7 ,FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDP6 ,FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDP5 ,FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDP4 ,FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDP3 ,FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDP2 ,FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDP1 ,FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDP0 ,FIFO buffer 0 select" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x04 25. " GAFLFDP17 ,Reception FIFO buffer 17 select" "Not selected,Selected"
|
|
bitfld.long 0x04 24. " GAFLFDP16 ,Reception FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 23. " GAFLFDP15 ,Reception FIFO buffer 15 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 22. " GAFLFDP14 ,Reception FIFO buffer 14 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP13 ,Reception FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP12 ,Reception FIFO buffer 12 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP11 ,Reception FIFO buffer 11 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP10 ,Reception FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP9 ,Reception FIFO buffer 9 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP8 ,Reception FIFO buffer 8 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP7 ,Reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP6 ,Reception FIFO buffer 6 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP5 ,Reception FIFO buffer 5 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP4 ,Reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP3 ,Reception FIFO buffer 3 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP2 ,Reception FIFO buffer 2 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP1 ,Reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP0 ,Reception FIFO buffer 0 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDPR7 ,Transmission/reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDPR6 ,Transmission/reception FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDPR5 ,Transmission/reception FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDPR4 ,Transmission/reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDPR3 ,Transmission/reception FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDPR2 ,Transmission/reception FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDPR1 ,Transmission/reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDPR0 ,Transmission/reception FIFO buffer 0 select" "Not selected,Selected"
|
|
endif
|
|
if (((per.l(ad:0xE803A000+0x510))&0x80000000)==0x80000000)
|
|
group.long 0x510++0x07
|
|
line.long 0x00 "RSCAN0GAFLID1,Receive Rule ID Register 1"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM1,Receive Rule Mask Register 1"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[28:0] ,ID mask[28:0]" "0,1"
|
|
bitfld.long 0x04 27. ",ID mask 27" "0,1"
|
|
bitfld.long 0x04 26. ",ID mask 26" "0,1"
|
|
bitfld.long 0x04 25. ",ID mask 25" "0,1"
|
|
bitfld.long 0x04 24. ",ID mask 24" "0,1"
|
|
bitfld.long 0x04 23. ",ID mask 23" "0,1"
|
|
bitfld.long 0x04 22. ",ID mask 22" "0,1"
|
|
bitfld.long 0x04 21. ",ID mask 21" "0,1"
|
|
bitfld.long 0x04 20. ",ID mask 20" "0,1"
|
|
bitfld.long 0x04 19. ",ID mask 19" "0,1"
|
|
bitfld.long 0x04 18. ",ID mask 18" "0,1"
|
|
bitfld.long 0x04 17. ",ID mask 17" "0,1"
|
|
bitfld.long 0x04 16. ",ID mask 16" "0,1"
|
|
bitfld.long 0x04 15. ",ID mask 15" "0,1"
|
|
bitfld.long 0x04 14. ",ID mask 14" "0,1"
|
|
bitfld.long 0x04 13. ",ID mask 13" "0,1"
|
|
bitfld.long 0x04 12. ",ID mask 12" "0,1"
|
|
bitfld.long 0x04 11. ",ID mask 11" "0,1"
|
|
bitfld.long 0x04 10. ",ID mask 10" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
else
|
|
group.long 0x510++0x07
|
|
line.long 0x00 "RSCAN0GAFLID1,Receive Rule ID Register 1"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM1,Receive Rule Mask Register 1"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[10:0] ,ID mask[10:0]" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
endif
|
|
group.long (0x510+0x08)++0x07
|
|
line.long 0x00 "RSCAN0GAFLP01,Receive Rule Pointer 0 Register 1"
|
|
bitfld.long 0x00 28.--31. " GAFLDLC ,Receive rule DLC" "Disabled,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " GAFLPTR ,Receive rule label"
|
|
bitfld.long 0x00 15. " GAFLRMV ,Receive buffer enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. " GAFLRMDP ,Receive buffer number select"
|
|
line.long 0x04 "RSCAN0GAFLP11,Receive Rule Pointer 1 Register 1"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x04 22. " GAFLFDP22 ,FIFO buffer 22 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP21 ,FIFO buffer 21 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP20 ,FIFO buffer 20 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP19 ,FIFO buffer 19 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP18 ,FIFO buffer 18 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP17 ,FIFO buffer 17 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP16 ,FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP15 ,FIFO buffer 15 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP14 ,FIFO buffer 14 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP13 ,FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP12 ,FIFO buffer 12 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP11 ,FIFO buffer 11 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP10 ,FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP9 ,FIFO buffer 9 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP8 ,FIFO buffer 8 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDP7 ,FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDP6 ,FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDP5 ,FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDP4 ,FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDP3 ,FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDP2 ,FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDP1 ,FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDP0 ,FIFO buffer 0 select" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x04 25. " GAFLFDP17 ,Reception FIFO buffer 17 select" "Not selected,Selected"
|
|
bitfld.long 0x04 24. " GAFLFDP16 ,Reception FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 23. " GAFLFDP15 ,Reception FIFO buffer 15 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 22. " GAFLFDP14 ,Reception FIFO buffer 14 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP13 ,Reception FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP12 ,Reception FIFO buffer 12 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP11 ,Reception FIFO buffer 11 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP10 ,Reception FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP9 ,Reception FIFO buffer 9 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP8 ,Reception FIFO buffer 8 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP7 ,Reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP6 ,Reception FIFO buffer 6 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP5 ,Reception FIFO buffer 5 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP4 ,Reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP3 ,Reception FIFO buffer 3 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP2 ,Reception FIFO buffer 2 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP1 ,Reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP0 ,Reception FIFO buffer 0 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDPR7 ,Transmission/reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDPR6 ,Transmission/reception FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDPR5 ,Transmission/reception FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDPR4 ,Transmission/reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDPR3 ,Transmission/reception FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDPR2 ,Transmission/reception FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDPR1 ,Transmission/reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDPR0 ,Transmission/reception FIFO buffer 0 select" "Not selected,Selected"
|
|
endif
|
|
if (((per.l(ad:0xE803A000+0x520))&0x80000000)==0x80000000)
|
|
group.long 0x520++0x07
|
|
line.long 0x00 "RSCAN0GAFLID2,Receive Rule ID Register 2"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM2,Receive Rule Mask Register 2"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[28:0] ,ID mask[28:0]" "0,1"
|
|
bitfld.long 0x04 27. ",ID mask 27" "0,1"
|
|
bitfld.long 0x04 26. ",ID mask 26" "0,1"
|
|
bitfld.long 0x04 25. ",ID mask 25" "0,1"
|
|
bitfld.long 0x04 24. ",ID mask 24" "0,1"
|
|
bitfld.long 0x04 23. ",ID mask 23" "0,1"
|
|
bitfld.long 0x04 22. ",ID mask 22" "0,1"
|
|
bitfld.long 0x04 21. ",ID mask 21" "0,1"
|
|
bitfld.long 0x04 20. ",ID mask 20" "0,1"
|
|
bitfld.long 0x04 19. ",ID mask 19" "0,1"
|
|
bitfld.long 0x04 18. ",ID mask 18" "0,1"
|
|
bitfld.long 0x04 17. ",ID mask 17" "0,1"
|
|
bitfld.long 0x04 16. ",ID mask 16" "0,1"
|
|
bitfld.long 0x04 15. ",ID mask 15" "0,1"
|
|
bitfld.long 0x04 14. ",ID mask 14" "0,1"
|
|
bitfld.long 0x04 13. ",ID mask 13" "0,1"
|
|
bitfld.long 0x04 12. ",ID mask 12" "0,1"
|
|
bitfld.long 0x04 11. ",ID mask 11" "0,1"
|
|
bitfld.long 0x04 10. ",ID mask 10" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
else
|
|
group.long 0x520++0x07
|
|
line.long 0x00 "RSCAN0GAFLID2,Receive Rule ID Register 2"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM2,Receive Rule Mask Register 2"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[10:0] ,ID mask[10:0]" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
endif
|
|
group.long (0x520+0x08)++0x07
|
|
line.long 0x00 "RSCAN0GAFLP02,Receive Rule Pointer 0 Register 2"
|
|
bitfld.long 0x00 28.--31. " GAFLDLC ,Receive rule DLC" "Disabled,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " GAFLPTR ,Receive rule label"
|
|
bitfld.long 0x00 15. " GAFLRMV ,Receive buffer enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. " GAFLRMDP ,Receive buffer number select"
|
|
line.long 0x04 "RSCAN0GAFLP12,Receive Rule Pointer 1 Register 2"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x04 22. " GAFLFDP22 ,FIFO buffer 22 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP21 ,FIFO buffer 21 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP20 ,FIFO buffer 20 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP19 ,FIFO buffer 19 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP18 ,FIFO buffer 18 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP17 ,FIFO buffer 17 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP16 ,FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP15 ,FIFO buffer 15 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP14 ,FIFO buffer 14 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP13 ,FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP12 ,FIFO buffer 12 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP11 ,FIFO buffer 11 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP10 ,FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP9 ,FIFO buffer 9 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP8 ,FIFO buffer 8 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDP7 ,FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDP6 ,FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDP5 ,FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDP4 ,FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDP3 ,FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDP2 ,FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDP1 ,FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDP0 ,FIFO buffer 0 select" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x04 25. " GAFLFDP17 ,Reception FIFO buffer 17 select" "Not selected,Selected"
|
|
bitfld.long 0x04 24. " GAFLFDP16 ,Reception FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 23. " GAFLFDP15 ,Reception FIFO buffer 15 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 22. " GAFLFDP14 ,Reception FIFO buffer 14 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP13 ,Reception FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP12 ,Reception FIFO buffer 12 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP11 ,Reception FIFO buffer 11 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP10 ,Reception FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP9 ,Reception FIFO buffer 9 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP8 ,Reception FIFO buffer 8 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP7 ,Reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP6 ,Reception FIFO buffer 6 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP5 ,Reception FIFO buffer 5 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP4 ,Reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP3 ,Reception FIFO buffer 3 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP2 ,Reception FIFO buffer 2 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP1 ,Reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP0 ,Reception FIFO buffer 0 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDPR7 ,Transmission/reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDPR6 ,Transmission/reception FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDPR5 ,Transmission/reception FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDPR4 ,Transmission/reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDPR3 ,Transmission/reception FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDPR2 ,Transmission/reception FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDPR1 ,Transmission/reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDPR0 ,Transmission/reception FIFO buffer 0 select" "Not selected,Selected"
|
|
endif
|
|
if (((per.l(ad:0xE803A000+0x530))&0x80000000)==0x80000000)
|
|
group.long 0x530++0x07
|
|
line.long 0x00 "RSCAN0GAFLID3,Receive Rule ID Register 3"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM3,Receive Rule Mask Register 3"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[28:0] ,ID mask[28:0]" "0,1"
|
|
bitfld.long 0x04 27. ",ID mask 27" "0,1"
|
|
bitfld.long 0x04 26. ",ID mask 26" "0,1"
|
|
bitfld.long 0x04 25. ",ID mask 25" "0,1"
|
|
bitfld.long 0x04 24. ",ID mask 24" "0,1"
|
|
bitfld.long 0x04 23. ",ID mask 23" "0,1"
|
|
bitfld.long 0x04 22. ",ID mask 22" "0,1"
|
|
bitfld.long 0x04 21. ",ID mask 21" "0,1"
|
|
bitfld.long 0x04 20. ",ID mask 20" "0,1"
|
|
bitfld.long 0x04 19. ",ID mask 19" "0,1"
|
|
bitfld.long 0x04 18. ",ID mask 18" "0,1"
|
|
bitfld.long 0x04 17. ",ID mask 17" "0,1"
|
|
bitfld.long 0x04 16. ",ID mask 16" "0,1"
|
|
bitfld.long 0x04 15. ",ID mask 15" "0,1"
|
|
bitfld.long 0x04 14. ",ID mask 14" "0,1"
|
|
bitfld.long 0x04 13. ",ID mask 13" "0,1"
|
|
bitfld.long 0x04 12. ",ID mask 12" "0,1"
|
|
bitfld.long 0x04 11. ",ID mask 11" "0,1"
|
|
bitfld.long 0x04 10. ",ID mask 10" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
else
|
|
group.long 0x530++0x07
|
|
line.long 0x00 "RSCAN0GAFLID3,Receive Rule ID Register 3"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM3,Receive Rule Mask Register 3"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[10:0] ,ID mask[10:0]" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
endif
|
|
group.long (0x530+0x08)++0x07
|
|
line.long 0x00 "RSCAN0GAFLP03,Receive Rule Pointer 0 Register 3"
|
|
bitfld.long 0x00 28.--31. " GAFLDLC ,Receive rule DLC" "Disabled,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " GAFLPTR ,Receive rule label"
|
|
bitfld.long 0x00 15. " GAFLRMV ,Receive buffer enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. " GAFLRMDP ,Receive buffer number select"
|
|
line.long 0x04 "RSCAN0GAFLP13,Receive Rule Pointer 1 Register 3"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x04 22. " GAFLFDP22 ,FIFO buffer 22 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP21 ,FIFO buffer 21 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP20 ,FIFO buffer 20 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP19 ,FIFO buffer 19 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP18 ,FIFO buffer 18 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP17 ,FIFO buffer 17 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP16 ,FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP15 ,FIFO buffer 15 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP14 ,FIFO buffer 14 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP13 ,FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP12 ,FIFO buffer 12 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP11 ,FIFO buffer 11 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP10 ,FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP9 ,FIFO buffer 9 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP8 ,FIFO buffer 8 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDP7 ,FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDP6 ,FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDP5 ,FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDP4 ,FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDP3 ,FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDP2 ,FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDP1 ,FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDP0 ,FIFO buffer 0 select" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x04 25. " GAFLFDP17 ,Reception FIFO buffer 17 select" "Not selected,Selected"
|
|
bitfld.long 0x04 24. " GAFLFDP16 ,Reception FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 23. " GAFLFDP15 ,Reception FIFO buffer 15 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 22. " GAFLFDP14 ,Reception FIFO buffer 14 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP13 ,Reception FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP12 ,Reception FIFO buffer 12 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP11 ,Reception FIFO buffer 11 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP10 ,Reception FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP9 ,Reception FIFO buffer 9 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP8 ,Reception FIFO buffer 8 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP7 ,Reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP6 ,Reception FIFO buffer 6 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP5 ,Reception FIFO buffer 5 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP4 ,Reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP3 ,Reception FIFO buffer 3 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP2 ,Reception FIFO buffer 2 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP1 ,Reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP0 ,Reception FIFO buffer 0 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDPR7 ,Transmission/reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDPR6 ,Transmission/reception FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDPR5 ,Transmission/reception FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDPR4 ,Transmission/reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDPR3 ,Transmission/reception FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDPR2 ,Transmission/reception FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDPR1 ,Transmission/reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDPR0 ,Transmission/reception FIFO buffer 0 select" "Not selected,Selected"
|
|
endif
|
|
if (((per.l(ad:0xE803A000+0x540))&0x80000000)==0x80000000)
|
|
group.long 0x540++0x07
|
|
line.long 0x00 "RSCAN0GAFLID4,Receive Rule ID Register 4"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM4,Receive Rule Mask Register 4"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[28:0] ,ID mask[28:0]" "0,1"
|
|
bitfld.long 0x04 27. ",ID mask 27" "0,1"
|
|
bitfld.long 0x04 26. ",ID mask 26" "0,1"
|
|
bitfld.long 0x04 25. ",ID mask 25" "0,1"
|
|
bitfld.long 0x04 24. ",ID mask 24" "0,1"
|
|
bitfld.long 0x04 23. ",ID mask 23" "0,1"
|
|
bitfld.long 0x04 22. ",ID mask 22" "0,1"
|
|
bitfld.long 0x04 21. ",ID mask 21" "0,1"
|
|
bitfld.long 0x04 20. ",ID mask 20" "0,1"
|
|
bitfld.long 0x04 19. ",ID mask 19" "0,1"
|
|
bitfld.long 0x04 18. ",ID mask 18" "0,1"
|
|
bitfld.long 0x04 17. ",ID mask 17" "0,1"
|
|
bitfld.long 0x04 16. ",ID mask 16" "0,1"
|
|
bitfld.long 0x04 15. ",ID mask 15" "0,1"
|
|
bitfld.long 0x04 14. ",ID mask 14" "0,1"
|
|
bitfld.long 0x04 13. ",ID mask 13" "0,1"
|
|
bitfld.long 0x04 12. ",ID mask 12" "0,1"
|
|
bitfld.long 0x04 11. ",ID mask 11" "0,1"
|
|
bitfld.long 0x04 10. ",ID mask 10" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
else
|
|
group.long 0x540++0x07
|
|
line.long 0x00 "RSCAN0GAFLID4,Receive Rule ID Register 4"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM4,Receive Rule Mask Register 4"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[10:0] ,ID mask[10:0]" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
endif
|
|
group.long (0x540+0x08)++0x07
|
|
line.long 0x00 "RSCAN0GAFLP04,Receive Rule Pointer 0 Register 4"
|
|
bitfld.long 0x00 28.--31. " GAFLDLC ,Receive rule DLC" "Disabled,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " GAFLPTR ,Receive rule label"
|
|
bitfld.long 0x00 15. " GAFLRMV ,Receive buffer enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. " GAFLRMDP ,Receive buffer number select"
|
|
line.long 0x04 "RSCAN0GAFLP14,Receive Rule Pointer 1 Register 4"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x04 22. " GAFLFDP22 ,FIFO buffer 22 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP21 ,FIFO buffer 21 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP20 ,FIFO buffer 20 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP19 ,FIFO buffer 19 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP18 ,FIFO buffer 18 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP17 ,FIFO buffer 17 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP16 ,FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP15 ,FIFO buffer 15 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP14 ,FIFO buffer 14 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP13 ,FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP12 ,FIFO buffer 12 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP11 ,FIFO buffer 11 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP10 ,FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP9 ,FIFO buffer 9 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP8 ,FIFO buffer 8 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDP7 ,FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDP6 ,FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDP5 ,FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDP4 ,FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDP3 ,FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDP2 ,FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDP1 ,FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDP0 ,FIFO buffer 0 select" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x04 25. " GAFLFDP17 ,Reception FIFO buffer 17 select" "Not selected,Selected"
|
|
bitfld.long 0x04 24. " GAFLFDP16 ,Reception FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 23. " GAFLFDP15 ,Reception FIFO buffer 15 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 22. " GAFLFDP14 ,Reception FIFO buffer 14 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP13 ,Reception FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP12 ,Reception FIFO buffer 12 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP11 ,Reception FIFO buffer 11 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP10 ,Reception FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP9 ,Reception FIFO buffer 9 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP8 ,Reception FIFO buffer 8 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP7 ,Reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP6 ,Reception FIFO buffer 6 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP5 ,Reception FIFO buffer 5 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP4 ,Reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP3 ,Reception FIFO buffer 3 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP2 ,Reception FIFO buffer 2 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP1 ,Reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP0 ,Reception FIFO buffer 0 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDPR7 ,Transmission/reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDPR6 ,Transmission/reception FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDPR5 ,Transmission/reception FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDPR4 ,Transmission/reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDPR3 ,Transmission/reception FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDPR2 ,Transmission/reception FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDPR1 ,Transmission/reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDPR0 ,Transmission/reception FIFO buffer 0 select" "Not selected,Selected"
|
|
endif
|
|
if (((per.l(ad:0xE803A000+0x550))&0x80000000)==0x80000000)
|
|
group.long 0x550++0x07
|
|
line.long 0x00 "RSCAN0GAFLID5,Receive Rule ID Register 5"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM5,Receive Rule Mask Register 5"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[28:0] ,ID mask[28:0]" "0,1"
|
|
bitfld.long 0x04 27. ",ID mask 27" "0,1"
|
|
bitfld.long 0x04 26. ",ID mask 26" "0,1"
|
|
bitfld.long 0x04 25. ",ID mask 25" "0,1"
|
|
bitfld.long 0x04 24. ",ID mask 24" "0,1"
|
|
bitfld.long 0x04 23. ",ID mask 23" "0,1"
|
|
bitfld.long 0x04 22. ",ID mask 22" "0,1"
|
|
bitfld.long 0x04 21. ",ID mask 21" "0,1"
|
|
bitfld.long 0x04 20. ",ID mask 20" "0,1"
|
|
bitfld.long 0x04 19. ",ID mask 19" "0,1"
|
|
bitfld.long 0x04 18. ",ID mask 18" "0,1"
|
|
bitfld.long 0x04 17. ",ID mask 17" "0,1"
|
|
bitfld.long 0x04 16. ",ID mask 16" "0,1"
|
|
bitfld.long 0x04 15. ",ID mask 15" "0,1"
|
|
bitfld.long 0x04 14. ",ID mask 14" "0,1"
|
|
bitfld.long 0x04 13. ",ID mask 13" "0,1"
|
|
bitfld.long 0x04 12. ",ID mask 12" "0,1"
|
|
bitfld.long 0x04 11. ",ID mask 11" "0,1"
|
|
bitfld.long 0x04 10. ",ID mask 10" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
else
|
|
group.long 0x550++0x07
|
|
line.long 0x00 "RSCAN0GAFLID5,Receive Rule ID Register 5"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM5,Receive Rule Mask Register 5"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[10:0] ,ID mask[10:0]" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
endif
|
|
group.long (0x550+0x08)++0x07
|
|
line.long 0x00 "RSCAN0GAFLP05,Receive Rule Pointer 0 Register 5"
|
|
bitfld.long 0x00 28.--31. " GAFLDLC ,Receive rule DLC" "Disabled,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " GAFLPTR ,Receive rule label"
|
|
bitfld.long 0x00 15. " GAFLRMV ,Receive buffer enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. " GAFLRMDP ,Receive buffer number select"
|
|
line.long 0x04 "RSCAN0GAFLP15,Receive Rule Pointer 1 Register 5"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x04 22. " GAFLFDP22 ,FIFO buffer 22 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP21 ,FIFO buffer 21 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP20 ,FIFO buffer 20 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP19 ,FIFO buffer 19 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP18 ,FIFO buffer 18 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP17 ,FIFO buffer 17 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP16 ,FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP15 ,FIFO buffer 15 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP14 ,FIFO buffer 14 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP13 ,FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP12 ,FIFO buffer 12 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP11 ,FIFO buffer 11 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP10 ,FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP9 ,FIFO buffer 9 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP8 ,FIFO buffer 8 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDP7 ,FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDP6 ,FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDP5 ,FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDP4 ,FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDP3 ,FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDP2 ,FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDP1 ,FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDP0 ,FIFO buffer 0 select" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x04 25. " GAFLFDP17 ,Reception FIFO buffer 17 select" "Not selected,Selected"
|
|
bitfld.long 0x04 24. " GAFLFDP16 ,Reception FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 23. " GAFLFDP15 ,Reception FIFO buffer 15 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 22. " GAFLFDP14 ,Reception FIFO buffer 14 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP13 ,Reception FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP12 ,Reception FIFO buffer 12 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP11 ,Reception FIFO buffer 11 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP10 ,Reception FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP9 ,Reception FIFO buffer 9 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP8 ,Reception FIFO buffer 8 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP7 ,Reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP6 ,Reception FIFO buffer 6 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP5 ,Reception FIFO buffer 5 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP4 ,Reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP3 ,Reception FIFO buffer 3 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP2 ,Reception FIFO buffer 2 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP1 ,Reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP0 ,Reception FIFO buffer 0 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDPR7 ,Transmission/reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDPR6 ,Transmission/reception FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDPR5 ,Transmission/reception FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDPR4 ,Transmission/reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDPR3 ,Transmission/reception FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDPR2 ,Transmission/reception FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDPR1 ,Transmission/reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDPR0 ,Transmission/reception FIFO buffer 0 select" "Not selected,Selected"
|
|
endif
|
|
if (((per.l(ad:0xE803A000+0x560))&0x80000000)==0x80000000)
|
|
group.long 0x560++0x07
|
|
line.long 0x00 "RSCAN0GAFLID6,Receive Rule ID Register 6"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM6,Receive Rule Mask Register 6"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[28:0] ,ID mask[28:0]" "0,1"
|
|
bitfld.long 0x04 27. ",ID mask 27" "0,1"
|
|
bitfld.long 0x04 26. ",ID mask 26" "0,1"
|
|
bitfld.long 0x04 25. ",ID mask 25" "0,1"
|
|
bitfld.long 0x04 24. ",ID mask 24" "0,1"
|
|
bitfld.long 0x04 23. ",ID mask 23" "0,1"
|
|
bitfld.long 0x04 22. ",ID mask 22" "0,1"
|
|
bitfld.long 0x04 21. ",ID mask 21" "0,1"
|
|
bitfld.long 0x04 20. ",ID mask 20" "0,1"
|
|
bitfld.long 0x04 19. ",ID mask 19" "0,1"
|
|
bitfld.long 0x04 18. ",ID mask 18" "0,1"
|
|
bitfld.long 0x04 17. ",ID mask 17" "0,1"
|
|
bitfld.long 0x04 16. ",ID mask 16" "0,1"
|
|
bitfld.long 0x04 15. ",ID mask 15" "0,1"
|
|
bitfld.long 0x04 14. ",ID mask 14" "0,1"
|
|
bitfld.long 0x04 13. ",ID mask 13" "0,1"
|
|
bitfld.long 0x04 12. ",ID mask 12" "0,1"
|
|
bitfld.long 0x04 11. ",ID mask 11" "0,1"
|
|
bitfld.long 0x04 10. ",ID mask 10" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
else
|
|
group.long 0x560++0x07
|
|
line.long 0x00 "RSCAN0GAFLID6,Receive Rule ID Register 6"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM6,Receive Rule Mask Register 6"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[10:0] ,ID mask[10:0]" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
endif
|
|
group.long (0x560+0x08)++0x07
|
|
line.long 0x00 "RSCAN0GAFLP06,Receive Rule Pointer 0 Register 6"
|
|
bitfld.long 0x00 28.--31. " GAFLDLC ,Receive rule DLC" "Disabled,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " GAFLPTR ,Receive rule label"
|
|
bitfld.long 0x00 15. " GAFLRMV ,Receive buffer enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. " GAFLRMDP ,Receive buffer number select"
|
|
line.long 0x04 "RSCAN0GAFLP16,Receive Rule Pointer 1 Register 6"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x04 22. " GAFLFDP22 ,FIFO buffer 22 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP21 ,FIFO buffer 21 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP20 ,FIFO buffer 20 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP19 ,FIFO buffer 19 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP18 ,FIFO buffer 18 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP17 ,FIFO buffer 17 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP16 ,FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP15 ,FIFO buffer 15 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP14 ,FIFO buffer 14 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP13 ,FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP12 ,FIFO buffer 12 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP11 ,FIFO buffer 11 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP10 ,FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP9 ,FIFO buffer 9 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP8 ,FIFO buffer 8 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDP7 ,FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDP6 ,FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDP5 ,FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDP4 ,FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDP3 ,FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDP2 ,FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDP1 ,FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDP0 ,FIFO buffer 0 select" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x04 25. " GAFLFDP17 ,Reception FIFO buffer 17 select" "Not selected,Selected"
|
|
bitfld.long 0x04 24. " GAFLFDP16 ,Reception FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 23. " GAFLFDP15 ,Reception FIFO buffer 15 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 22. " GAFLFDP14 ,Reception FIFO buffer 14 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP13 ,Reception FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP12 ,Reception FIFO buffer 12 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP11 ,Reception FIFO buffer 11 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP10 ,Reception FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP9 ,Reception FIFO buffer 9 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP8 ,Reception FIFO buffer 8 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP7 ,Reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP6 ,Reception FIFO buffer 6 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP5 ,Reception FIFO buffer 5 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP4 ,Reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP3 ,Reception FIFO buffer 3 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP2 ,Reception FIFO buffer 2 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP1 ,Reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP0 ,Reception FIFO buffer 0 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDPR7 ,Transmission/reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDPR6 ,Transmission/reception FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDPR5 ,Transmission/reception FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDPR4 ,Transmission/reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDPR3 ,Transmission/reception FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDPR2 ,Transmission/reception FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDPR1 ,Transmission/reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDPR0 ,Transmission/reception FIFO buffer 0 select" "Not selected,Selected"
|
|
endif
|
|
if (((per.l(ad:0xE803A000+0x570))&0x80000000)==0x80000000)
|
|
group.long 0x570++0x07
|
|
line.long 0x00 "RSCAN0GAFLID7,Receive Rule ID Register 7"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM7,Receive Rule Mask Register 7"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[28:0] ,ID mask[28:0]" "0,1"
|
|
bitfld.long 0x04 27. ",ID mask 27" "0,1"
|
|
bitfld.long 0x04 26. ",ID mask 26" "0,1"
|
|
bitfld.long 0x04 25. ",ID mask 25" "0,1"
|
|
bitfld.long 0x04 24. ",ID mask 24" "0,1"
|
|
bitfld.long 0x04 23. ",ID mask 23" "0,1"
|
|
bitfld.long 0x04 22. ",ID mask 22" "0,1"
|
|
bitfld.long 0x04 21. ",ID mask 21" "0,1"
|
|
bitfld.long 0x04 20. ",ID mask 20" "0,1"
|
|
bitfld.long 0x04 19. ",ID mask 19" "0,1"
|
|
bitfld.long 0x04 18. ",ID mask 18" "0,1"
|
|
bitfld.long 0x04 17. ",ID mask 17" "0,1"
|
|
bitfld.long 0x04 16. ",ID mask 16" "0,1"
|
|
bitfld.long 0x04 15. ",ID mask 15" "0,1"
|
|
bitfld.long 0x04 14. ",ID mask 14" "0,1"
|
|
bitfld.long 0x04 13. ",ID mask 13" "0,1"
|
|
bitfld.long 0x04 12. ",ID mask 12" "0,1"
|
|
bitfld.long 0x04 11. ",ID mask 11" "0,1"
|
|
bitfld.long 0x04 10. ",ID mask 10" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
else
|
|
group.long 0x570++0x07
|
|
line.long 0x00 "RSCAN0GAFLID7,Receive Rule ID Register 7"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM7,Receive Rule Mask Register 7"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[10:0] ,ID mask[10:0]" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
endif
|
|
group.long (0x570+0x08)++0x07
|
|
line.long 0x00 "RSCAN0GAFLP07,Receive Rule Pointer 0 Register 7"
|
|
bitfld.long 0x00 28.--31. " GAFLDLC ,Receive rule DLC" "Disabled,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " GAFLPTR ,Receive rule label"
|
|
bitfld.long 0x00 15. " GAFLRMV ,Receive buffer enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. " GAFLRMDP ,Receive buffer number select"
|
|
line.long 0x04 "RSCAN0GAFLP17,Receive Rule Pointer 1 Register 7"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x04 22. " GAFLFDP22 ,FIFO buffer 22 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP21 ,FIFO buffer 21 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP20 ,FIFO buffer 20 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP19 ,FIFO buffer 19 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP18 ,FIFO buffer 18 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP17 ,FIFO buffer 17 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP16 ,FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP15 ,FIFO buffer 15 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP14 ,FIFO buffer 14 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP13 ,FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP12 ,FIFO buffer 12 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP11 ,FIFO buffer 11 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP10 ,FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP9 ,FIFO buffer 9 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP8 ,FIFO buffer 8 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDP7 ,FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDP6 ,FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDP5 ,FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDP4 ,FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDP3 ,FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDP2 ,FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDP1 ,FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDP0 ,FIFO buffer 0 select" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x04 25. " GAFLFDP17 ,Reception FIFO buffer 17 select" "Not selected,Selected"
|
|
bitfld.long 0x04 24. " GAFLFDP16 ,Reception FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 23. " GAFLFDP15 ,Reception FIFO buffer 15 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 22. " GAFLFDP14 ,Reception FIFO buffer 14 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP13 ,Reception FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP12 ,Reception FIFO buffer 12 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP11 ,Reception FIFO buffer 11 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP10 ,Reception FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP9 ,Reception FIFO buffer 9 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP8 ,Reception FIFO buffer 8 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP7 ,Reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP6 ,Reception FIFO buffer 6 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP5 ,Reception FIFO buffer 5 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP4 ,Reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP3 ,Reception FIFO buffer 3 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP2 ,Reception FIFO buffer 2 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP1 ,Reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP0 ,Reception FIFO buffer 0 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDPR7 ,Transmission/reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDPR6 ,Transmission/reception FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDPR5 ,Transmission/reception FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDPR4 ,Transmission/reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDPR3 ,Transmission/reception FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDPR2 ,Transmission/reception FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDPR1 ,Transmission/reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDPR0 ,Transmission/reception FIFO buffer 0 select" "Not selected,Selected"
|
|
endif
|
|
if (((per.l(ad:0xE803A000+0x580))&0x80000000)==0x80000000)
|
|
group.long 0x580++0x07
|
|
line.long 0x00 "RSCAN0GAFLID8,Receive Rule ID Register 8"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM8,Receive Rule Mask Register 8"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[28:0] ,ID mask[28:0]" "0,1"
|
|
bitfld.long 0x04 27. ",ID mask 27" "0,1"
|
|
bitfld.long 0x04 26. ",ID mask 26" "0,1"
|
|
bitfld.long 0x04 25. ",ID mask 25" "0,1"
|
|
bitfld.long 0x04 24. ",ID mask 24" "0,1"
|
|
bitfld.long 0x04 23. ",ID mask 23" "0,1"
|
|
bitfld.long 0x04 22. ",ID mask 22" "0,1"
|
|
bitfld.long 0x04 21. ",ID mask 21" "0,1"
|
|
bitfld.long 0x04 20. ",ID mask 20" "0,1"
|
|
bitfld.long 0x04 19. ",ID mask 19" "0,1"
|
|
bitfld.long 0x04 18. ",ID mask 18" "0,1"
|
|
bitfld.long 0x04 17. ",ID mask 17" "0,1"
|
|
bitfld.long 0x04 16. ",ID mask 16" "0,1"
|
|
bitfld.long 0x04 15. ",ID mask 15" "0,1"
|
|
bitfld.long 0x04 14. ",ID mask 14" "0,1"
|
|
bitfld.long 0x04 13. ",ID mask 13" "0,1"
|
|
bitfld.long 0x04 12. ",ID mask 12" "0,1"
|
|
bitfld.long 0x04 11. ",ID mask 11" "0,1"
|
|
bitfld.long 0x04 10. ",ID mask 10" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
else
|
|
group.long 0x580++0x07
|
|
line.long 0x00 "RSCAN0GAFLID8,Receive Rule ID Register 8"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM8,Receive Rule Mask Register 8"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[10:0] ,ID mask[10:0]" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
endif
|
|
group.long (0x580+0x08)++0x07
|
|
line.long 0x00 "RSCAN0GAFLP08,Receive Rule Pointer 0 Register 8"
|
|
bitfld.long 0x00 28.--31. " GAFLDLC ,Receive rule DLC" "Disabled,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " GAFLPTR ,Receive rule label"
|
|
bitfld.long 0x00 15. " GAFLRMV ,Receive buffer enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. " GAFLRMDP ,Receive buffer number select"
|
|
line.long 0x04 "RSCAN0GAFLP18,Receive Rule Pointer 1 Register 8"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x04 22. " GAFLFDP22 ,FIFO buffer 22 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP21 ,FIFO buffer 21 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP20 ,FIFO buffer 20 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP19 ,FIFO buffer 19 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP18 ,FIFO buffer 18 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP17 ,FIFO buffer 17 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP16 ,FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP15 ,FIFO buffer 15 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP14 ,FIFO buffer 14 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP13 ,FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP12 ,FIFO buffer 12 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP11 ,FIFO buffer 11 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP10 ,FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP9 ,FIFO buffer 9 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP8 ,FIFO buffer 8 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDP7 ,FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDP6 ,FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDP5 ,FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDP4 ,FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDP3 ,FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDP2 ,FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDP1 ,FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDP0 ,FIFO buffer 0 select" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x04 25. " GAFLFDP17 ,Reception FIFO buffer 17 select" "Not selected,Selected"
|
|
bitfld.long 0x04 24. " GAFLFDP16 ,Reception FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 23. " GAFLFDP15 ,Reception FIFO buffer 15 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 22. " GAFLFDP14 ,Reception FIFO buffer 14 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP13 ,Reception FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP12 ,Reception FIFO buffer 12 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP11 ,Reception FIFO buffer 11 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP10 ,Reception FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP9 ,Reception FIFO buffer 9 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP8 ,Reception FIFO buffer 8 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP7 ,Reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP6 ,Reception FIFO buffer 6 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP5 ,Reception FIFO buffer 5 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP4 ,Reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP3 ,Reception FIFO buffer 3 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP2 ,Reception FIFO buffer 2 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP1 ,Reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP0 ,Reception FIFO buffer 0 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDPR7 ,Transmission/reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDPR6 ,Transmission/reception FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDPR5 ,Transmission/reception FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDPR4 ,Transmission/reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDPR3 ,Transmission/reception FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDPR2 ,Transmission/reception FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDPR1 ,Transmission/reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDPR0 ,Transmission/reception FIFO buffer 0 select" "Not selected,Selected"
|
|
endif
|
|
if (((per.l(ad:0xE803A000+0x590))&0x80000000)==0x80000000)
|
|
group.long 0x590++0x07
|
|
line.long 0x00 "RSCAN0GAFLID9,Receive Rule ID Register 9"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM9,Receive Rule Mask Register 9"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[28:0] ,ID mask[28:0]" "0,1"
|
|
bitfld.long 0x04 27. ",ID mask 27" "0,1"
|
|
bitfld.long 0x04 26. ",ID mask 26" "0,1"
|
|
bitfld.long 0x04 25. ",ID mask 25" "0,1"
|
|
bitfld.long 0x04 24. ",ID mask 24" "0,1"
|
|
bitfld.long 0x04 23. ",ID mask 23" "0,1"
|
|
bitfld.long 0x04 22. ",ID mask 22" "0,1"
|
|
bitfld.long 0x04 21. ",ID mask 21" "0,1"
|
|
bitfld.long 0x04 20. ",ID mask 20" "0,1"
|
|
bitfld.long 0x04 19. ",ID mask 19" "0,1"
|
|
bitfld.long 0x04 18. ",ID mask 18" "0,1"
|
|
bitfld.long 0x04 17. ",ID mask 17" "0,1"
|
|
bitfld.long 0x04 16. ",ID mask 16" "0,1"
|
|
bitfld.long 0x04 15. ",ID mask 15" "0,1"
|
|
bitfld.long 0x04 14. ",ID mask 14" "0,1"
|
|
bitfld.long 0x04 13. ",ID mask 13" "0,1"
|
|
bitfld.long 0x04 12. ",ID mask 12" "0,1"
|
|
bitfld.long 0x04 11. ",ID mask 11" "0,1"
|
|
bitfld.long 0x04 10. ",ID mask 10" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
else
|
|
group.long 0x590++0x07
|
|
line.long 0x00 "RSCAN0GAFLID9,Receive Rule ID Register 9"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM9,Receive Rule Mask Register 9"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[10:0] ,ID mask[10:0]" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
endif
|
|
group.long (0x590+0x08)++0x07
|
|
line.long 0x00 "RSCAN0GAFLP09,Receive Rule Pointer 0 Register 9"
|
|
bitfld.long 0x00 28.--31. " GAFLDLC ,Receive rule DLC" "Disabled,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " GAFLPTR ,Receive rule label"
|
|
bitfld.long 0x00 15. " GAFLRMV ,Receive buffer enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. " GAFLRMDP ,Receive buffer number select"
|
|
line.long 0x04 "RSCAN0GAFLP19,Receive Rule Pointer 1 Register 9"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x04 22. " GAFLFDP22 ,FIFO buffer 22 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP21 ,FIFO buffer 21 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP20 ,FIFO buffer 20 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP19 ,FIFO buffer 19 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP18 ,FIFO buffer 18 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP17 ,FIFO buffer 17 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP16 ,FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP15 ,FIFO buffer 15 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP14 ,FIFO buffer 14 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP13 ,FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP12 ,FIFO buffer 12 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP11 ,FIFO buffer 11 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP10 ,FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP9 ,FIFO buffer 9 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP8 ,FIFO buffer 8 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDP7 ,FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDP6 ,FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDP5 ,FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDP4 ,FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDP3 ,FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDP2 ,FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDP1 ,FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDP0 ,FIFO buffer 0 select" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x04 25. " GAFLFDP17 ,Reception FIFO buffer 17 select" "Not selected,Selected"
|
|
bitfld.long 0x04 24. " GAFLFDP16 ,Reception FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 23. " GAFLFDP15 ,Reception FIFO buffer 15 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 22. " GAFLFDP14 ,Reception FIFO buffer 14 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP13 ,Reception FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP12 ,Reception FIFO buffer 12 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP11 ,Reception FIFO buffer 11 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP10 ,Reception FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP9 ,Reception FIFO buffer 9 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP8 ,Reception FIFO buffer 8 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP7 ,Reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP6 ,Reception FIFO buffer 6 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP5 ,Reception FIFO buffer 5 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP4 ,Reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP3 ,Reception FIFO buffer 3 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP2 ,Reception FIFO buffer 2 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP1 ,Reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP0 ,Reception FIFO buffer 0 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDPR7 ,Transmission/reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDPR6 ,Transmission/reception FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDPR5 ,Transmission/reception FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDPR4 ,Transmission/reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDPR3 ,Transmission/reception FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDPR2 ,Transmission/reception FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDPR1 ,Transmission/reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDPR0 ,Transmission/reception FIFO buffer 0 select" "Not selected,Selected"
|
|
endif
|
|
if (((per.l(ad:0xE803A000+0x5A0))&0x80000000)==0x80000000)
|
|
group.long 0x5A0++0x07
|
|
line.long 0x00 "RSCAN0GAFLID10,Receive Rule ID Register 10"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM10,Receive Rule Mask Register 10"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[28:0] ,ID mask[28:0]" "0,1"
|
|
bitfld.long 0x04 27. ",ID mask 27" "0,1"
|
|
bitfld.long 0x04 26. ",ID mask 26" "0,1"
|
|
bitfld.long 0x04 25. ",ID mask 25" "0,1"
|
|
bitfld.long 0x04 24. ",ID mask 24" "0,1"
|
|
bitfld.long 0x04 23. ",ID mask 23" "0,1"
|
|
bitfld.long 0x04 22. ",ID mask 22" "0,1"
|
|
bitfld.long 0x04 21. ",ID mask 21" "0,1"
|
|
bitfld.long 0x04 20. ",ID mask 20" "0,1"
|
|
bitfld.long 0x04 19. ",ID mask 19" "0,1"
|
|
bitfld.long 0x04 18. ",ID mask 18" "0,1"
|
|
bitfld.long 0x04 17. ",ID mask 17" "0,1"
|
|
bitfld.long 0x04 16. ",ID mask 16" "0,1"
|
|
bitfld.long 0x04 15. ",ID mask 15" "0,1"
|
|
bitfld.long 0x04 14. ",ID mask 14" "0,1"
|
|
bitfld.long 0x04 13. ",ID mask 13" "0,1"
|
|
bitfld.long 0x04 12. ",ID mask 12" "0,1"
|
|
bitfld.long 0x04 11. ",ID mask 11" "0,1"
|
|
bitfld.long 0x04 10. ",ID mask 10" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
else
|
|
group.long 0x5A0++0x07
|
|
line.long 0x00 "RSCAN0GAFLID10,Receive Rule ID Register 10"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM10,Receive Rule Mask Register 10"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[10:0] ,ID mask[10:0]" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
endif
|
|
group.long (0x5A0+0x08)++0x07
|
|
line.long 0x00 "RSCAN0GAFLP010,Receive Rule Pointer 0 Register 10"
|
|
bitfld.long 0x00 28.--31. " GAFLDLC ,Receive rule DLC" "Disabled,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " GAFLPTR ,Receive rule label"
|
|
bitfld.long 0x00 15. " GAFLRMV ,Receive buffer enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. " GAFLRMDP ,Receive buffer number select"
|
|
line.long 0x04 "RSCAN0GAFLP110,Receive Rule Pointer 1 Register 10"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x04 22. " GAFLFDP22 ,FIFO buffer 22 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP21 ,FIFO buffer 21 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP20 ,FIFO buffer 20 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP19 ,FIFO buffer 19 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP18 ,FIFO buffer 18 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP17 ,FIFO buffer 17 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP16 ,FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP15 ,FIFO buffer 15 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP14 ,FIFO buffer 14 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP13 ,FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP12 ,FIFO buffer 12 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP11 ,FIFO buffer 11 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP10 ,FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP9 ,FIFO buffer 9 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP8 ,FIFO buffer 8 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDP7 ,FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDP6 ,FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDP5 ,FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDP4 ,FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDP3 ,FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDP2 ,FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDP1 ,FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDP0 ,FIFO buffer 0 select" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x04 25. " GAFLFDP17 ,Reception FIFO buffer 17 select" "Not selected,Selected"
|
|
bitfld.long 0x04 24. " GAFLFDP16 ,Reception FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 23. " GAFLFDP15 ,Reception FIFO buffer 15 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 22. " GAFLFDP14 ,Reception FIFO buffer 14 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP13 ,Reception FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP12 ,Reception FIFO buffer 12 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP11 ,Reception FIFO buffer 11 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP10 ,Reception FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP9 ,Reception FIFO buffer 9 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP8 ,Reception FIFO buffer 8 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP7 ,Reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP6 ,Reception FIFO buffer 6 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP5 ,Reception FIFO buffer 5 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP4 ,Reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP3 ,Reception FIFO buffer 3 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP2 ,Reception FIFO buffer 2 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP1 ,Reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP0 ,Reception FIFO buffer 0 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDPR7 ,Transmission/reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDPR6 ,Transmission/reception FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDPR5 ,Transmission/reception FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDPR4 ,Transmission/reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDPR3 ,Transmission/reception FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDPR2 ,Transmission/reception FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDPR1 ,Transmission/reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDPR0 ,Transmission/reception FIFO buffer 0 select" "Not selected,Selected"
|
|
endif
|
|
if (((per.l(ad:0xE803A000+0x5B0))&0x80000000)==0x80000000)
|
|
group.long 0x5B0++0x07
|
|
line.long 0x00 "RSCAN0GAFLID11,Receive Rule ID Register 11"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM11,Receive Rule Mask Register 11"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[28:0] ,ID mask[28:0]" "0,1"
|
|
bitfld.long 0x04 27. ",ID mask 27" "0,1"
|
|
bitfld.long 0x04 26. ",ID mask 26" "0,1"
|
|
bitfld.long 0x04 25. ",ID mask 25" "0,1"
|
|
bitfld.long 0x04 24. ",ID mask 24" "0,1"
|
|
bitfld.long 0x04 23. ",ID mask 23" "0,1"
|
|
bitfld.long 0x04 22. ",ID mask 22" "0,1"
|
|
bitfld.long 0x04 21. ",ID mask 21" "0,1"
|
|
bitfld.long 0x04 20. ",ID mask 20" "0,1"
|
|
bitfld.long 0x04 19. ",ID mask 19" "0,1"
|
|
bitfld.long 0x04 18. ",ID mask 18" "0,1"
|
|
bitfld.long 0x04 17. ",ID mask 17" "0,1"
|
|
bitfld.long 0x04 16. ",ID mask 16" "0,1"
|
|
bitfld.long 0x04 15. ",ID mask 15" "0,1"
|
|
bitfld.long 0x04 14. ",ID mask 14" "0,1"
|
|
bitfld.long 0x04 13. ",ID mask 13" "0,1"
|
|
bitfld.long 0x04 12. ",ID mask 12" "0,1"
|
|
bitfld.long 0x04 11. ",ID mask 11" "0,1"
|
|
bitfld.long 0x04 10. ",ID mask 10" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
else
|
|
group.long 0x5B0++0x07
|
|
line.long 0x00 "RSCAN0GAFLID11,Receive Rule ID Register 11"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM11,Receive Rule Mask Register 11"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[10:0] ,ID mask[10:0]" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
endif
|
|
group.long (0x5B0+0x08)++0x07
|
|
line.long 0x00 "RSCAN0GAFLP011,Receive Rule Pointer 0 Register 11"
|
|
bitfld.long 0x00 28.--31. " GAFLDLC ,Receive rule DLC" "Disabled,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " GAFLPTR ,Receive rule label"
|
|
bitfld.long 0x00 15. " GAFLRMV ,Receive buffer enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. " GAFLRMDP ,Receive buffer number select"
|
|
line.long 0x04 "RSCAN0GAFLP111,Receive Rule Pointer 1 Register 11"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x04 22. " GAFLFDP22 ,FIFO buffer 22 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP21 ,FIFO buffer 21 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP20 ,FIFO buffer 20 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP19 ,FIFO buffer 19 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP18 ,FIFO buffer 18 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP17 ,FIFO buffer 17 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP16 ,FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP15 ,FIFO buffer 15 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP14 ,FIFO buffer 14 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP13 ,FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP12 ,FIFO buffer 12 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP11 ,FIFO buffer 11 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP10 ,FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP9 ,FIFO buffer 9 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP8 ,FIFO buffer 8 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDP7 ,FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDP6 ,FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDP5 ,FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDP4 ,FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDP3 ,FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDP2 ,FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDP1 ,FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDP0 ,FIFO buffer 0 select" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x04 25. " GAFLFDP17 ,Reception FIFO buffer 17 select" "Not selected,Selected"
|
|
bitfld.long 0x04 24. " GAFLFDP16 ,Reception FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 23. " GAFLFDP15 ,Reception FIFO buffer 15 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 22. " GAFLFDP14 ,Reception FIFO buffer 14 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP13 ,Reception FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP12 ,Reception FIFO buffer 12 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP11 ,Reception FIFO buffer 11 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP10 ,Reception FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP9 ,Reception FIFO buffer 9 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP8 ,Reception FIFO buffer 8 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP7 ,Reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP6 ,Reception FIFO buffer 6 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP5 ,Reception FIFO buffer 5 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP4 ,Reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP3 ,Reception FIFO buffer 3 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP2 ,Reception FIFO buffer 2 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP1 ,Reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP0 ,Reception FIFO buffer 0 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDPR7 ,Transmission/reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDPR6 ,Transmission/reception FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDPR5 ,Transmission/reception FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDPR4 ,Transmission/reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDPR3 ,Transmission/reception FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDPR2 ,Transmission/reception FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDPR1 ,Transmission/reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDPR0 ,Transmission/reception FIFO buffer 0 select" "Not selected,Selected"
|
|
endif
|
|
if (((per.l(ad:0xE803A000+0x5C0))&0x80000000)==0x80000000)
|
|
group.long 0x5C0++0x07
|
|
line.long 0x00 "RSCAN0GAFLID12,Receive Rule ID Register 12"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM12,Receive Rule Mask Register 12"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[28:0] ,ID mask[28:0]" "0,1"
|
|
bitfld.long 0x04 27. ",ID mask 27" "0,1"
|
|
bitfld.long 0x04 26. ",ID mask 26" "0,1"
|
|
bitfld.long 0x04 25. ",ID mask 25" "0,1"
|
|
bitfld.long 0x04 24. ",ID mask 24" "0,1"
|
|
bitfld.long 0x04 23. ",ID mask 23" "0,1"
|
|
bitfld.long 0x04 22. ",ID mask 22" "0,1"
|
|
bitfld.long 0x04 21. ",ID mask 21" "0,1"
|
|
bitfld.long 0x04 20. ",ID mask 20" "0,1"
|
|
bitfld.long 0x04 19. ",ID mask 19" "0,1"
|
|
bitfld.long 0x04 18. ",ID mask 18" "0,1"
|
|
bitfld.long 0x04 17. ",ID mask 17" "0,1"
|
|
bitfld.long 0x04 16. ",ID mask 16" "0,1"
|
|
bitfld.long 0x04 15. ",ID mask 15" "0,1"
|
|
bitfld.long 0x04 14. ",ID mask 14" "0,1"
|
|
bitfld.long 0x04 13. ",ID mask 13" "0,1"
|
|
bitfld.long 0x04 12. ",ID mask 12" "0,1"
|
|
bitfld.long 0x04 11. ",ID mask 11" "0,1"
|
|
bitfld.long 0x04 10. ",ID mask 10" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
else
|
|
group.long 0x5C0++0x07
|
|
line.long 0x00 "RSCAN0GAFLID12,Receive Rule ID Register 12"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM12,Receive Rule Mask Register 12"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[10:0] ,ID mask[10:0]" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
endif
|
|
group.long (0x5C0+0x08)++0x07
|
|
line.long 0x00 "RSCAN0GAFLP012,Receive Rule Pointer 0 Register 12"
|
|
bitfld.long 0x00 28.--31. " GAFLDLC ,Receive rule DLC" "Disabled,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " GAFLPTR ,Receive rule label"
|
|
bitfld.long 0x00 15. " GAFLRMV ,Receive buffer enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. " GAFLRMDP ,Receive buffer number select"
|
|
line.long 0x04 "RSCAN0GAFLP112,Receive Rule Pointer 1 Register 12"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x04 22. " GAFLFDP22 ,FIFO buffer 22 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP21 ,FIFO buffer 21 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP20 ,FIFO buffer 20 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP19 ,FIFO buffer 19 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP18 ,FIFO buffer 18 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP17 ,FIFO buffer 17 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP16 ,FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP15 ,FIFO buffer 15 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP14 ,FIFO buffer 14 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP13 ,FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP12 ,FIFO buffer 12 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP11 ,FIFO buffer 11 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP10 ,FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP9 ,FIFO buffer 9 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP8 ,FIFO buffer 8 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDP7 ,FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDP6 ,FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDP5 ,FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDP4 ,FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDP3 ,FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDP2 ,FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDP1 ,FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDP0 ,FIFO buffer 0 select" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x04 25. " GAFLFDP17 ,Reception FIFO buffer 17 select" "Not selected,Selected"
|
|
bitfld.long 0x04 24. " GAFLFDP16 ,Reception FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 23. " GAFLFDP15 ,Reception FIFO buffer 15 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 22. " GAFLFDP14 ,Reception FIFO buffer 14 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP13 ,Reception FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP12 ,Reception FIFO buffer 12 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP11 ,Reception FIFO buffer 11 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP10 ,Reception FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP9 ,Reception FIFO buffer 9 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP8 ,Reception FIFO buffer 8 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP7 ,Reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP6 ,Reception FIFO buffer 6 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP5 ,Reception FIFO buffer 5 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP4 ,Reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP3 ,Reception FIFO buffer 3 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP2 ,Reception FIFO buffer 2 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP1 ,Reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP0 ,Reception FIFO buffer 0 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDPR7 ,Transmission/reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDPR6 ,Transmission/reception FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDPR5 ,Transmission/reception FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDPR4 ,Transmission/reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDPR3 ,Transmission/reception FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDPR2 ,Transmission/reception FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDPR1 ,Transmission/reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDPR0 ,Transmission/reception FIFO buffer 0 select" "Not selected,Selected"
|
|
endif
|
|
if (((per.l(ad:0xE803A000+0x5D0))&0x80000000)==0x80000000)
|
|
group.long 0x5D0++0x07
|
|
line.long 0x00 "RSCAN0GAFLID13,Receive Rule ID Register 13"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM13,Receive Rule Mask Register 13"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[28:0] ,ID mask[28:0]" "0,1"
|
|
bitfld.long 0x04 27. ",ID mask 27" "0,1"
|
|
bitfld.long 0x04 26. ",ID mask 26" "0,1"
|
|
bitfld.long 0x04 25. ",ID mask 25" "0,1"
|
|
bitfld.long 0x04 24. ",ID mask 24" "0,1"
|
|
bitfld.long 0x04 23. ",ID mask 23" "0,1"
|
|
bitfld.long 0x04 22. ",ID mask 22" "0,1"
|
|
bitfld.long 0x04 21. ",ID mask 21" "0,1"
|
|
bitfld.long 0x04 20. ",ID mask 20" "0,1"
|
|
bitfld.long 0x04 19. ",ID mask 19" "0,1"
|
|
bitfld.long 0x04 18. ",ID mask 18" "0,1"
|
|
bitfld.long 0x04 17. ",ID mask 17" "0,1"
|
|
bitfld.long 0x04 16. ",ID mask 16" "0,1"
|
|
bitfld.long 0x04 15. ",ID mask 15" "0,1"
|
|
bitfld.long 0x04 14. ",ID mask 14" "0,1"
|
|
bitfld.long 0x04 13. ",ID mask 13" "0,1"
|
|
bitfld.long 0x04 12. ",ID mask 12" "0,1"
|
|
bitfld.long 0x04 11. ",ID mask 11" "0,1"
|
|
bitfld.long 0x04 10. ",ID mask 10" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
else
|
|
group.long 0x5D0++0x07
|
|
line.long 0x00 "RSCAN0GAFLID13,Receive Rule ID Register 13"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM13,Receive Rule Mask Register 13"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[10:0] ,ID mask[10:0]" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
endif
|
|
group.long (0x5D0+0x08)++0x07
|
|
line.long 0x00 "RSCAN0GAFLP013,Receive Rule Pointer 0 Register 13"
|
|
bitfld.long 0x00 28.--31. " GAFLDLC ,Receive rule DLC" "Disabled,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " GAFLPTR ,Receive rule label"
|
|
bitfld.long 0x00 15. " GAFLRMV ,Receive buffer enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. " GAFLRMDP ,Receive buffer number select"
|
|
line.long 0x04 "RSCAN0GAFLP113,Receive Rule Pointer 1 Register 13"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x04 22. " GAFLFDP22 ,FIFO buffer 22 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP21 ,FIFO buffer 21 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP20 ,FIFO buffer 20 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP19 ,FIFO buffer 19 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP18 ,FIFO buffer 18 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP17 ,FIFO buffer 17 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP16 ,FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP15 ,FIFO buffer 15 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP14 ,FIFO buffer 14 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP13 ,FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP12 ,FIFO buffer 12 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP11 ,FIFO buffer 11 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP10 ,FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP9 ,FIFO buffer 9 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP8 ,FIFO buffer 8 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDP7 ,FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDP6 ,FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDP5 ,FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDP4 ,FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDP3 ,FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDP2 ,FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDP1 ,FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDP0 ,FIFO buffer 0 select" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x04 25. " GAFLFDP17 ,Reception FIFO buffer 17 select" "Not selected,Selected"
|
|
bitfld.long 0x04 24. " GAFLFDP16 ,Reception FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 23. " GAFLFDP15 ,Reception FIFO buffer 15 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 22. " GAFLFDP14 ,Reception FIFO buffer 14 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP13 ,Reception FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP12 ,Reception FIFO buffer 12 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP11 ,Reception FIFO buffer 11 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP10 ,Reception FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP9 ,Reception FIFO buffer 9 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP8 ,Reception FIFO buffer 8 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP7 ,Reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP6 ,Reception FIFO buffer 6 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP5 ,Reception FIFO buffer 5 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP4 ,Reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP3 ,Reception FIFO buffer 3 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP2 ,Reception FIFO buffer 2 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP1 ,Reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP0 ,Reception FIFO buffer 0 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDPR7 ,Transmission/reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDPR6 ,Transmission/reception FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDPR5 ,Transmission/reception FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDPR4 ,Transmission/reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDPR3 ,Transmission/reception FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDPR2 ,Transmission/reception FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDPR1 ,Transmission/reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDPR0 ,Transmission/reception FIFO buffer 0 select" "Not selected,Selected"
|
|
endif
|
|
if (((per.l(ad:0xE803A000+0x5E0))&0x80000000)==0x80000000)
|
|
group.long 0x5E0++0x07
|
|
line.long 0x00 "RSCAN0GAFLID14,Receive Rule ID Register 14"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM14,Receive Rule Mask Register 14"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[28:0] ,ID mask[28:0]" "0,1"
|
|
bitfld.long 0x04 27. ",ID mask 27" "0,1"
|
|
bitfld.long 0x04 26. ",ID mask 26" "0,1"
|
|
bitfld.long 0x04 25. ",ID mask 25" "0,1"
|
|
bitfld.long 0x04 24. ",ID mask 24" "0,1"
|
|
bitfld.long 0x04 23. ",ID mask 23" "0,1"
|
|
bitfld.long 0x04 22. ",ID mask 22" "0,1"
|
|
bitfld.long 0x04 21. ",ID mask 21" "0,1"
|
|
bitfld.long 0x04 20. ",ID mask 20" "0,1"
|
|
bitfld.long 0x04 19. ",ID mask 19" "0,1"
|
|
bitfld.long 0x04 18. ",ID mask 18" "0,1"
|
|
bitfld.long 0x04 17. ",ID mask 17" "0,1"
|
|
bitfld.long 0x04 16. ",ID mask 16" "0,1"
|
|
bitfld.long 0x04 15. ",ID mask 15" "0,1"
|
|
bitfld.long 0x04 14. ",ID mask 14" "0,1"
|
|
bitfld.long 0x04 13. ",ID mask 13" "0,1"
|
|
bitfld.long 0x04 12. ",ID mask 12" "0,1"
|
|
bitfld.long 0x04 11. ",ID mask 11" "0,1"
|
|
bitfld.long 0x04 10. ",ID mask 10" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
else
|
|
group.long 0x5E0++0x07
|
|
line.long 0x00 "RSCAN0GAFLID14,Receive Rule ID Register 14"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM14,Receive Rule Mask Register 14"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[10:0] ,ID mask[10:0]" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
endif
|
|
group.long (0x5E0+0x08)++0x07
|
|
line.long 0x00 "RSCAN0GAFLP014,Receive Rule Pointer 0 Register 14"
|
|
bitfld.long 0x00 28.--31. " GAFLDLC ,Receive rule DLC" "Disabled,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " GAFLPTR ,Receive rule label"
|
|
bitfld.long 0x00 15. " GAFLRMV ,Receive buffer enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. " GAFLRMDP ,Receive buffer number select"
|
|
line.long 0x04 "RSCAN0GAFLP114,Receive Rule Pointer 1 Register 14"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x04 22. " GAFLFDP22 ,FIFO buffer 22 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP21 ,FIFO buffer 21 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP20 ,FIFO buffer 20 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP19 ,FIFO buffer 19 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP18 ,FIFO buffer 18 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP17 ,FIFO buffer 17 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP16 ,FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP15 ,FIFO buffer 15 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP14 ,FIFO buffer 14 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP13 ,FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP12 ,FIFO buffer 12 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP11 ,FIFO buffer 11 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP10 ,FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP9 ,FIFO buffer 9 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP8 ,FIFO buffer 8 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDP7 ,FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDP6 ,FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDP5 ,FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDP4 ,FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDP3 ,FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDP2 ,FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDP1 ,FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDP0 ,FIFO buffer 0 select" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x04 25. " GAFLFDP17 ,Reception FIFO buffer 17 select" "Not selected,Selected"
|
|
bitfld.long 0x04 24. " GAFLFDP16 ,Reception FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 23. " GAFLFDP15 ,Reception FIFO buffer 15 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 22. " GAFLFDP14 ,Reception FIFO buffer 14 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP13 ,Reception FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP12 ,Reception FIFO buffer 12 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP11 ,Reception FIFO buffer 11 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP10 ,Reception FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP9 ,Reception FIFO buffer 9 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP8 ,Reception FIFO buffer 8 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP7 ,Reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP6 ,Reception FIFO buffer 6 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP5 ,Reception FIFO buffer 5 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP4 ,Reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP3 ,Reception FIFO buffer 3 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP2 ,Reception FIFO buffer 2 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP1 ,Reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP0 ,Reception FIFO buffer 0 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDPR7 ,Transmission/reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDPR6 ,Transmission/reception FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDPR5 ,Transmission/reception FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDPR4 ,Transmission/reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDPR3 ,Transmission/reception FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDPR2 ,Transmission/reception FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDPR1 ,Transmission/reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDPR0 ,Transmission/reception FIFO buffer 0 select" "Not selected,Selected"
|
|
endif
|
|
if (((per.l(ad:0xE803A000+0x5F0))&0x80000000)==0x80000000)
|
|
group.long 0x5F0++0x07
|
|
line.long 0x00 "RSCAN0GAFLID15,Receive Rule ID Register 15"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM15,Receive Rule Mask Register 15"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[28:0] ,ID mask[28:0]" "0,1"
|
|
bitfld.long 0x04 27. ",ID mask 27" "0,1"
|
|
bitfld.long 0x04 26. ",ID mask 26" "0,1"
|
|
bitfld.long 0x04 25. ",ID mask 25" "0,1"
|
|
bitfld.long 0x04 24. ",ID mask 24" "0,1"
|
|
bitfld.long 0x04 23. ",ID mask 23" "0,1"
|
|
bitfld.long 0x04 22. ",ID mask 22" "0,1"
|
|
bitfld.long 0x04 21. ",ID mask 21" "0,1"
|
|
bitfld.long 0x04 20. ",ID mask 20" "0,1"
|
|
bitfld.long 0x04 19. ",ID mask 19" "0,1"
|
|
bitfld.long 0x04 18. ",ID mask 18" "0,1"
|
|
bitfld.long 0x04 17. ",ID mask 17" "0,1"
|
|
bitfld.long 0x04 16. ",ID mask 16" "0,1"
|
|
bitfld.long 0x04 15. ",ID mask 15" "0,1"
|
|
bitfld.long 0x04 14. ",ID mask 14" "0,1"
|
|
bitfld.long 0x04 13. ",ID mask 13" "0,1"
|
|
bitfld.long 0x04 12. ",ID mask 12" "0,1"
|
|
bitfld.long 0x04 11. ",ID mask 11" "0,1"
|
|
bitfld.long 0x04 10. ",ID mask 10" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
else
|
|
group.long 0x5F0++0x07
|
|
line.long 0x00 "RSCAN0GAFLID15,Receive Rule ID Register 15"
|
|
bitfld.long 0x00 31. " GAFLIDE ,IDE select" "Standard,Extended"
|
|
bitfld.long 0x00 30. " GAFLRTR ,RTR select" "Data,Remote"
|
|
bitfld.long 0x00 29. " GAFLLB ,Receive rule target message select" "Another msg received,Own msg received"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " GAFLID ,ID"
|
|
line.long 0x04 "RSCAN0GAFLM15,Receive Rule Mask Register 15"
|
|
bitfld.long 0x04 31. " GAFLIDEM ,IDE mask" "Not compared,Compared"
|
|
bitfld.long 0x04 30. " GAFLRTRM ,RTR mask" "Not compared,Compared"
|
|
newline
|
|
bitfld.long 0x04 28. " GAFLIDM[10:0] ,ID mask[10:0]" "0,1"
|
|
bitfld.long 0x04 9. ",ID mask 9" "0,1"
|
|
bitfld.long 0x04 8. ",ID mask 8" "0,1"
|
|
bitfld.long 0x04 7. ",ID mask 7" "0,1"
|
|
bitfld.long 0x04 6. ",ID mask 6" "0,1"
|
|
bitfld.long 0x04 5. ",ID mask 5" "0,1"
|
|
bitfld.long 0x04 4. ",ID mask 4" "0,1"
|
|
bitfld.long 0x04 3. ",ID mask 3" "0,1"
|
|
bitfld.long 0x04 2. ",ID mask 2" "0,1"
|
|
bitfld.long 0x04 1. ",ID mask 1" "0,1"
|
|
bitfld.long 0x04 0. ",ID mask 0" "0,1"
|
|
endif
|
|
group.long (0x5F0+0x08)++0x07
|
|
line.long 0x00 "RSCAN0GAFLP015,Receive Rule Pointer 0 Register 15"
|
|
bitfld.long 0x00 28.--31. " GAFLDLC ,Receive rule DLC" "Disabled,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " GAFLPTR ,Receive rule label"
|
|
bitfld.long 0x00 15. " GAFLRMV ,Receive buffer enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. " GAFLRMDP ,Receive buffer number select"
|
|
line.long 0x04 "RSCAN0GAFLP115,Receive Rule Pointer 1 Register 15"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x04 22. " GAFLFDP22 ,FIFO buffer 22 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP21 ,FIFO buffer 21 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP20 ,FIFO buffer 20 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP19 ,FIFO buffer 19 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP18 ,FIFO buffer 18 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP17 ,FIFO buffer 17 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP16 ,FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP15 ,FIFO buffer 15 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP14 ,FIFO buffer 14 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP13 ,FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP12 ,FIFO buffer 12 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP11 ,FIFO buffer 11 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP10 ,FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP9 ,FIFO buffer 9 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP8 ,FIFO buffer 8 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDP7 ,FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDP6 ,FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDP5 ,FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDP4 ,FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDP3 ,FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDP2 ,FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDP1 ,FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDP0 ,FIFO buffer 0 select" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x04 25. " GAFLFDP17 ,Reception FIFO buffer 17 select" "Not selected,Selected"
|
|
bitfld.long 0x04 24. " GAFLFDP16 ,Reception FIFO buffer 16 select" "Not selected,Selected"
|
|
bitfld.long 0x04 23. " GAFLFDP15 ,Reception FIFO buffer 15 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 22. " GAFLFDP14 ,Reception FIFO buffer 14 select" "Not selected,Selected"
|
|
bitfld.long 0x04 21. " GAFLFDP13 ,Reception FIFO buffer 13 select" "Not selected,Selected"
|
|
bitfld.long 0x04 20. " GAFLFDP12 ,Reception FIFO buffer 12 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 19. " GAFLFDP11 ,Reception FIFO buffer 11 select" "Not selected,Selected"
|
|
bitfld.long 0x04 18. " GAFLFDP10 ,Reception FIFO buffer 10 select" "Not selected,Selected"
|
|
bitfld.long 0x04 17. " GAFLFDP9 ,Reception FIFO buffer 9 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 16. " GAFLFDP8 ,Reception FIFO buffer 8 select" "Not selected,Selected"
|
|
bitfld.long 0x04 15. " GAFLFDP7 ,Reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 14. " GAFLFDP6 ,Reception FIFO buffer 6 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 13. " GAFLFDP5 ,Reception FIFO buffer 5 select" "Not selected,Selected"
|
|
bitfld.long 0x04 12. " GAFLFDP4 ,Reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 11. " GAFLFDP3 ,Reception FIFO buffer 3 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 10. " GAFLFDP2 ,Reception FIFO buffer 2 select" "Not selected,Selected"
|
|
bitfld.long 0x04 9. " GAFLFDP1 ,Reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 8. " GAFLFDP0 ,Reception FIFO buffer 0 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 7. " GAFLFDPR7 ,Transmission/reception FIFO buffer 7 select" "Not selected,Selected"
|
|
bitfld.long 0x04 6. " GAFLFDPR6 ,Transmission/reception FIFO buffer 6 select" "Not selected,Selected"
|
|
bitfld.long 0x04 5. " GAFLFDPR5 ,Transmission/reception FIFO buffer 5 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 4. " GAFLFDPR4 ,Transmission/reception FIFO buffer 4 select" "Not selected,Selected"
|
|
bitfld.long 0x04 3. " GAFLFDPR3 ,Transmission/reception FIFO buffer 3 select" "Not selected,Selected"
|
|
bitfld.long 0x04 2. " GAFLFDPR2 ,Transmission/reception FIFO buffer 2 select" "Not selected,Selected"
|
|
newline
|
|
bitfld.long 0x04 1. " GAFLFDPR1 ,Transmission/reception FIFO buffer 1 select" "Not selected,Selected"
|
|
bitfld.long 0x04 0. " GAFLFDPR0 ,Transmission/reception FIFO buffer 0 select" "Not selected,Selected"
|
|
endif
|
|
newline
|
|
group.long 0xA4++0x07
|
|
line.long 0x00 "RSCAN0RMNB,Receive Buffer Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " NRXMB ,Receive buffer number configuration"
|
|
line.long 0x04 "RSCAN0RMND0,Receive Buffer New Data Register 0"
|
|
bitfld.long 0x04 31. " RMNS31 ,Receive buffer receive complete flag 31" "No msg,Msg"
|
|
bitfld.long 0x04 30. " RMNS30 ,Receive buffer receive complete flag 30" "No msg,Msg"
|
|
bitfld.long 0x04 29. " RMNS29 ,Receive buffer receive complete flag 29" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x04 28. " RMNS28 ,Receive buffer receive complete flag 28" "No msg,Msg"
|
|
bitfld.long 0x04 27. " RMNS27 ,Receive buffer receive complete flag 27" "No msg,Msg"
|
|
bitfld.long 0x04 26. " RMNS26 ,Receive buffer receive complete flag 26" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x04 25. " RMNS25 ,Receive buffer receive complete flag 25" "No msg,Msg"
|
|
bitfld.long 0x04 24. " RMNS24 ,Receive buffer receive complete flag 24" "No msg,Msg"
|
|
bitfld.long 0x04 23. " RMNS23 ,Receive buffer receive complete flag 23" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x04 22. " RMNS22 ,Receive buffer receive complete flag 22" "No msg,Msg"
|
|
bitfld.long 0x04 21. " RMNS21 ,Receive buffer receive complete flag 21" "No msg,Msg"
|
|
bitfld.long 0x04 20. " RMNS20 ,Receive buffer receive complete flag 20" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x04 19. " RMNS19 ,Receive buffer receive complete flag 19" "No msg,Msg"
|
|
bitfld.long 0x04 18. " RMNS18 ,Receive buffer receive complete flag 18" "No msg,Msg"
|
|
bitfld.long 0x04 17. " RMNS17 ,Receive buffer receive complete flag 17" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x04 16. " RMNS16 ,Receive buffer receive complete flag 16" "No msg,Msg"
|
|
bitfld.long 0x04 15. " RMNS15 ,Receive buffer receive complete flag 15" "No msg,Msg"
|
|
bitfld.long 0x04 14. " RMNS14 ,Receive buffer receive complete flag 14" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x04 13. " RMNS13 ,Receive buffer receive complete flag 13" "No msg,Msg"
|
|
bitfld.long 0x04 12. " RMNS12 ,Receive buffer receive complete flag 12" "No msg,Msg"
|
|
bitfld.long 0x04 11. " RMNS11 ,Receive buffer receive complete flag 11" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x04 10. " RMNS10 ,Receive buffer receive complete flag 10" "No msg,Msg"
|
|
bitfld.long 0x04 9. " RMNS9 ,Receive buffer receive complete flag 9" "No msg,Msg"
|
|
bitfld.long 0x04 8. " RMNS8 ,Receive buffer receive complete flag 8" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x04 7. " RMNS7 ,Receive buffer receive complete flag 7" "No msg,Msg"
|
|
bitfld.long 0x04 6. " RMNS6 ,Receive buffer receive complete flag 6" "No msg,Msg"
|
|
bitfld.long 0x04 5. " RMNS5 ,Receive buffer receive complete flag 5" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x04 4. " RMNS4 ,Receive buffer receive complete flag 4" "No msg,Msg"
|
|
bitfld.long 0x04 3. " RMNS3 ,Receive buffer receive complete flag 3" "No msg,Msg"
|
|
bitfld.long 0x04 2. " RMNS2 ,Receive buffer receive complete flag 2" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x04 1. " RMNS1 ,Receive buffer receive complete flag 1" "No msg,Msg"
|
|
bitfld.long 0x04 0. " RMNS0 ,Receive buffer receive complete flag 0" "No msg,Msg"
|
|
sif !cpuis("R7S91*")
|
|
group.long 0xAC++0x07
|
|
line.long 0x00 "RSCAN0RMND1,Receive Buffer New Data Register 1"
|
|
bitfld.long 0x00 31. " RMNS63 ,Receive buffer receive complete flag 63" "No msg,Msg"
|
|
bitfld.long 0x00 30. " RMNS62 ,Receive buffer receive complete flag 62" "No msg,Msg"
|
|
bitfld.long 0x00 29. " RMNS61 ,Receive buffer receive complete flag 61" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x00 28. " RMNS60 ,Receive buffer receive complete flag 60" "No msg,Msg"
|
|
bitfld.long 0x00 27. " RMNS59 ,Receive buffer receive complete flag 59" "No msg,Msg"
|
|
bitfld.long 0x00 26. " RMNS58 ,Receive buffer receive complete flag 58" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x00 25. " RMNS57 ,Receive buffer receive complete flag 57" "No msg,Msg"
|
|
bitfld.long 0x00 24. " RMNS56 ,Receive buffer receive complete flag 56" "No msg,Msg"
|
|
bitfld.long 0x00 23. " RMNS55 ,Receive buffer receive complete flag 55" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x00 22. " RMNS54 ,Receive buffer receive complete flag 54" "No msg,Msg"
|
|
bitfld.long 0x00 21. " RMNS53 ,Receive buffer receive complete flag 53" "No msg,Msg"
|
|
bitfld.long 0x00 20. " RMNS52 ,Receive buffer receive complete flag 52" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x00 19. " RMNS51 ,Receive buffer receive complete flag 51" "No msg,Msg"
|
|
bitfld.long 0x00 18. " RMNS50 ,Receive buffer receive complete flag 50" "No msg,Msg"
|
|
bitfld.long 0x00 17. " RMNS49 ,Receive buffer receive complete flag 49" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x00 16. " RMNS48 ,Receive buffer receive complete flag 48" "No msg,Msg"
|
|
bitfld.long 0x00 15. " RMNS47 ,Receive buffer receive complete flag 47" "No msg,Msg"
|
|
bitfld.long 0x00 14. " RMNS46 ,Receive buffer receive complete flag 46" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x00 13. " RMNS45 ,Receive buffer receive complete flag 45" "No msg,Msg"
|
|
bitfld.long 0x00 12. " RMNS44 ,Receive buffer receive complete flag 44" "No msg,Msg"
|
|
bitfld.long 0x00 11. " RMNS43 ,Receive buffer receive complete flag 43" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x00 10. " RMNS42 ,Receive buffer receive complete flag 42" "No msg,Msg"
|
|
bitfld.long 0x00 9. " RMNS41 ,Receive buffer receive complete flag 41" "No msg,Msg"
|
|
bitfld.long 0x00 8. " RMNS40 ,Receive buffer receive complete flag 40" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x00 7. " RMNS39 ,Receive buffer receive complete flag 39" "No msg,Msg"
|
|
bitfld.long 0x00 6. " RMNS38 ,Receive buffer receive complete flag 38" "No msg,Msg"
|
|
bitfld.long 0x00 5. " RMNS37 ,Receive buffer receive complete flag 37" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x00 4. " RMNS36 ,Receive buffer receive complete flag 36" "No msg,Msg"
|
|
bitfld.long 0x00 3. " RMNS35 ,Receive buffer receive complete flag 35" "No msg,Msg"
|
|
bitfld.long 0x00 2. " RMNS34 ,Receive buffer receive complete flag 34" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x00 1. " RMNS33 ,Receive buffer receive complete flag 33" "No msg,Msg"
|
|
bitfld.long 0x00 0. " RMNS32 ,Receive buffer receive complete flag 32" "No msg,Msg"
|
|
line.long 0x04 "RSCAN0RMND2,Receive Buffer New Data Register 2"
|
|
bitfld.long 0x04 15. " RMNS79 ,Receive buffer receive complete flag 79" "No msg,Msg"
|
|
bitfld.long 0x04 14. " RMNS78 ,Receive buffer receive complete flag 78" "No msg,Msg"
|
|
bitfld.long 0x04 13. " RMNS77 ,Receive buffer receive complete flag 77" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x04 12. " RMNS76 ,Receive buffer receive complete flag 76" "No msg,Msg"
|
|
bitfld.long 0x04 11. " RMNS75 ,Receive buffer receive complete flag 75" "No msg,Msg"
|
|
bitfld.long 0x04 10. " RMNS74 ,Receive buffer receive complete flag 74" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x04 9. " RMNS73 ,Receive buffer receive complete flag 73" "No msg,Msg"
|
|
bitfld.long 0x04 8. " RMNS72 ,Receive buffer receive complete flag 72" "No msg,Msg"
|
|
bitfld.long 0x04 7. " RMNS71 ,Receive buffer receive complete flag 71" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x04 6. " RMNS70 ,Receive buffer receive complete flag 70" "No msg,Msg"
|
|
bitfld.long 0x04 5. " RMNS69 ,Receive buffer receive complete flag 69" "No msg,Msg"
|
|
bitfld.long 0x04 4. " RMNS68 ,Receive buffer receive complete flag 68" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x04 3. " RMNS67 ,Receive buffer receive complete flag 67" "No msg,Msg"
|
|
bitfld.long 0x04 2. " RMNS66 ,Receive buffer receive complete flag 66" "No msg,Msg"
|
|
bitfld.long 0x04 1. " RMNS65 ,Receive buffer receive complete flag 65" "No msg,Msg"
|
|
newline
|
|
bitfld.long 0x04 0. " RMNS64 ,Receive buffer receive complete flag 64" "No msg,Msg"
|
|
endif
|
|
if (((per.l(ad:0xE803A000+0x600))&0x80000000)==0x80000000)
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "RSCAN0RMID0,Receive BufferID Register 0"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "RSCAN0RMID0,Receive BufferID Register 0"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x600+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR0,Receive Buffer Pointer Register 0"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF00,Receive Buffer Data Field 0 Register 0"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF10,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x610))&0x80000000)==0x80000000)
|
|
group.long 0x610++0x03
|
|
line.long 0x00 "RSCAN0RMID1,Receive BufferID Register 1"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x610++0x03
|
|
line.long 0x00 "RSCAN0RMID1,Receive BufferID Register 1"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x610+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR1,Receive Buffer Pointer Register 1"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF01,Receive Buffer Data Field 0 Register 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF11,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x620))&0x80000000)==0x80000000)
|
|
group.long 0x620++0x03
|
|
line.long 0x00 "RSCAN0RMID2,Receive BufferID Register 2"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x620++0x03
|
|
line.long 0x00 "RSCAN0RMID2,Receive BufferID Register 2"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x620+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR2,Receive Buffer Pointer Register 2"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF02,Receive Buffer Data Field 0 Register 2"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF12,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x630))&0x80000000)==0x80000000)
|
|
group.long 0x630++0x03
|
|
line.long 0x00 "RSCAN0RMID3,Receive BufferID Register 3"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x630++0x03
|
|
line.long 0x00 "RSCAN0RMID3,Receive BufferID Register 3"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x630+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR3,Receive Buffer Pointer Register 3"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF03,Receive Buffer Data Field 0 Register 3"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF13,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x640))&0x80000000)==0x80000000)
|
|
group.long 0x640++0x03
|
|
line.long 0x00 "RSCAN0RMID4,Receive BufferID Register 4"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x640++0x03
|
|
line.long 0x00 "RSCAN0RMID4,Receive BufferID Register 4"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x640+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR4,Receive Buffer Pointer Register 4"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF04,Receive Buffer Data Field 0 Register 4"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF14,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x650))&0x80000000)==0x80000000)
|
|
group.long 0x650++0x03
|
|
line.long 0x00 "RSCAN0RMID5,Receive BufferID Register 5"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x650++0x03
|
|
line.long 0x00 "RSCAN0RMID5,Receive BufferID Register 5"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x650+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR5,Receive Buffer Pointer Register 5"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF05,Receive Buffer Data Field 0 Register 5"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF15,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x660))&0x80000000)==0x80000000)
|
|
group.long 0x660++0x03
|
|
line.long 0x00 "RSCAN0RMID6,Receive BufferID Register 6"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x660++0x03
|
|
line.long 0x00 "RSCAN0RMID6,Receive BufferID Register 6"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x660+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR6,Receive Buffer Pointer Register 6"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF06,Receive Buffer Data Field 0 Register 6"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF16,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x670))&0x80000000)==0x80000000)
|
|
group.long 0x670++0x03
|
|
line.long 0x00 "RSCAN0RMID7,Receive BufferID Register 7"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x670++0x03
|
|
line.long 0x00 "RSCAN0RMID7,Receive BufferID Register 7"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x670+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR7,Receive Buffer Pointer Register 7"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF07,Receive Buffer Data Field 0 Register 7"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF17,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x680))&0x80000000)==0x80000000)
|
|
group.long 0x680++0x03
|
|
line.long 0x00 "RSCAN0RMID8,Receive BufferID Register 8"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x680++0x03
|
|
line.long 0x00 "RSCAN0RMID8,Receive BufferID Register 8"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x680+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR8,Receive Buffer Pointer Register 8"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF08,Receive Buffer Data Field 0 Register 8"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF18,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x690))&0x80000000)==0x80000000)
|
|
group.long 0x690++0x03
|
|
line.long 0x00 "RSCAN0RMID9,Receive BufferID Register 9"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x690++0x03
|
|
line.long 0x00 "RSCAN0RMID9,Receive BufferID Register 9"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x690+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR9,Receive Buffer Pointer Register 9"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF09,Receive Buffer Data Field 0 Register 9"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF19,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x6A0))&0x80000000)==0x80000000)
|
|
group.long 0x6A0++0x03
|
|
line.long 0x00 "RSCAN0RMID10,Receive BufferID Register 10"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x6A0++0x03
|
|
line.long 0x00 "RSCAN0RMID10,Receive BufferID Register 10"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x6A0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR10,Receive Buffer Pointer Register 10"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF010,Receive Buffer Data Field 0 Register 10"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF110,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x6B0))&0x80000000)==0x80000000)
|
|
group.long 0x6B0++0x03
|
|
line.long 0x00 "RSCAN0RMID11,Receive BufferID Register 11"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x6B0++0x03
|
|
line.long 0x00 "RSCAN0RMID11,Receive BufferID Register 11"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x6B0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR11,Receive Buffer Pointer Register 11"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF011,Receive Buffer Data Field 0 Register 11"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF111,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x6C0))&0x80000000)==0x80000000)
|
|
group.long 0x6C0++0x03
|
|
line.long 0x00 "RSCAN0RMID12,Receive BufferID Register 12"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x6C0++0x03
|
|
line.long 0x00 "RSCAN0RMID12,Receive BufferID Register 12"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x6C0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR12,Receive Buffer Pointer Register 12"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF012,Receive Buffer Data Field 0 Register 12"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF112,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x6D0))&0x80000000)==0x80000000)
|
|
group.long 0x6D0++0x03
|
|
line.long 0x00 "RSCAN0RMID13,Receive BufferID Register 13"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x6D0++0x03
|
|
line.long 0x00 "RSCAN0RMID13,Receive BufferID Register 13"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x6D0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR13,Receive Buffer Pointer Register 13"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF013,Receive Buffer Data Field 0 Register 13"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF113,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x6E0))&0x80000000)==0x80000000)
|
|
group.long 0x6E0++0x03
|
|
line.long 0x00 "RSCAN0RMID14,Receive BufferID Register 14"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x6E0++0x03
|
|
line.long 0x00 "RSCAN0RMID14,Receive BufferID Register 14"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x6E0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR14,Receive Buffer Pointer Register 14"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF014,Receive Buffer Data Field 0 Register 14"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF114,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x6F0))&0x80000000)==0x80000000)
|
|
group.long 0x6F0++0x03
|
|
line.long 0x00 "RSCAN0RMID15,Receive BufferID Register 15"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x6F0++0x03
|
|
line.long 0x00 "RSCAN0RMID15,Receive BufferID Register 15"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x6F0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR15,Receive Buffer Pointer Register 15"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF015,Receive Buffer Data Field 0 Register 15"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF115,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x700))&0x80000000)==0x80000000)
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "RSCAN0RMID16,Receive BufferID Register 16"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "RSCAN0RMID16,Receive BufferID Register 16"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x700+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR16,Receive Buffer Pointer Register 16"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF016,Receive Buffer Data Field 0 Register 16"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF116,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x710))&0x80000000)==0x80000000)
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "RSCAN0RMID17,Receive BufferID Register 17"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "RSCAN0RMID17,Receive BufferID Register 17"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x710+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR17,Receive Buffer Pointer Register 17"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF017,Receive Buffer Data Field 0 Register 17"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF117,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x720))&0x80000000)==0x80000000)
|
|
group.long 0x720++0x03
|
|
line.long 0x00 "RSCAN0RMID18,Receive BufferID Register 18"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x720++0x03
|
|
line.long 0x00 "RSCAN0RMID18,Receive BufferID Register 18"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x720+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR18,Receive Buffer Pointer Register 18"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF018,Receive Buffer Data Field 0 Register 18"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF118,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x730))&0x80000000)==0x80000000)
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "RSCAN0RMID19,Receive BufferID Register 19"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "RSCAN0RMID19,Receive BufferID Register 19"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x730+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR19,Receive Buffer Pointer Register 19"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF019,Receive Buffer Data Field 0 Register 19"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF119,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x740))&0x80000000)==0x80000000)
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "RSCAN0RMID20,Receive BufferID Register 20"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "RSCAN0RMID20,Receive BufferID Register 20"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x740+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR20,Receive Buffer Pointer Register 20"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF020,Receive Buffer Data Field 0 Register 20"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF120,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x750))&0x80000000)==0x80000000)
|
|
group.long 0x750++0x03
|
|
line.long 0x00 "RSCAN0RMID21,Receive BufferID Register 21"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x750++0x03
|
|
line.long 0x00 "RSCAN0RMID21,Receive BufferID Register 21"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x750+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR21,Receive Buffer Pointer Register 21"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF021,Receive Buffer Data Field 0 Register 21"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF121,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x760))&0x80000000)==0x80000000)
|
|
group.long 0x760++0x03
|
|
line.long 0x00 "RSCAN0RMID22,Receive BufferID Register 22"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x760++0x03
|
|
line.long 0x00 "RSCAN0RMID22,Receive BufferID Register 22"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x760+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR22,Receive Buffer Pointer Register 22"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF022,Receive Buffer Data Field 0 Register 22"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF122,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x770))&0x80000000)==0x80000000)
|
|
group.long 0x770++0x03
|
|
line.long 0x00 "RSCAN0RMID23,Receive BufferID Register 23"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x770++0x03
|
|
line.long 0x00 "RSCAN0RMID23,Receive BufferID Register 23"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x770+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR23,Receive Buffer Pointer Register 23"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF023,Receive Buffer Data Field 0 Register 23"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF123,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x780))&0x80000000)==0x80000000)
|
|
group.long 0x780++0x03
|
|
line.long 0x00 "RSCAN0RMID24,Receive BufferID Register 24"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x780++0x03
|
|
line.long 0x00 "RSCAN0RMID24,Receive BufferID Register 24"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x780+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR24,Receive Buffer Pointer Register 24"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF024,Receive Buffer Data Field 0 Register 24"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF124,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x790))&0x80000000)==0x80000000)
|
|
group.long 0x790++0x03
|
|
line.long 0x00 "RSCAN0RMID25,Receive BufferID Register 25"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x790++0x03
|
|
line.long 0x00 "RSCAN0RMID25,Receive BufferID Register 25"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x790+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR25,Receive Buffer Pointer Register 25"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF025,Receive Buffer Data Field 0 Register 25"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF125,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x7A0))&0x80000000)==0x80000000)
|
|
group.long 0x7A0++0x03
|
|
line.long 0x00 "RSCAN0RMID26,Receive BufferID Register 26"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x7A0++0x03
|
|
line.long 0x00 "RSCAN0RMID26,Receive BufferID Register 26"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x7A0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR26,Receive Buffer Pointer Register 26"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF026,Receive Buffer Data Field 0 Register 26"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF126,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x7B0))&0x80000000)==0x80000000)
|
|
group.long 0x7B0++0x03
|
|
line.long 0x00 "RSCAN0RMID27,Receive BufferID Register 27"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x7B0++0x03
|
|
line.long 0x00 "RSCAN0RMID27,Receive BufferID Register 27"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x7B0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR27,Receive Buffer Pointer Register 27"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF027,Receive Buffer Data Field 0 Register 27"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF127,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x7C0))&0x80000000)==0x80000000)
|
|
group.long 0x7C0++0x03
|
|
line.long 0x00 "RSCAN0RMID28,Receive BufferID Register 28"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x7C0++0x03
|
|
line.long 0x00 "RSCAN0RMID28,Receive BufferID Register 28"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x7C0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR28,Receive Buffer Pointer Register 28"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF028,Receive Buffer Data Field 0 Register 28"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF128,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x7D0))&0x80000000)==0x80000000)
|
|
group.long 0x7D0++0x03
|
|
line.long 0x00 "RSCAN0RMID29,Receive BufferID Register 29"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x7D0++0x03
|
|
line.long 0x00 "RSCAN0RMID29,Receive BufferID Register 29"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x7D0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR29,Receive Buffer Pointer Register 29"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF029,Receive Buffer Data Field 0 Register 29"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF129,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x7E0))&0x80000000)==0x80000000)
|
|
group.long 0x7E0++0x03
|
|
line.long 0x00 "RSCAN0RMID30,Receive BufferID Register 30"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x7E0++0x03
|
|
line.long 0x00 "RSCAN0RMID30,Receive BufferID Register 30"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x7E0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR30,Receive Buffer Pointer Register 30"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF030,Receive Buffer Data Field 0 Register 30"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF130,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x7F0))&0x80000000)==0x80000000)
|
|
group.long 0x7F0++0x03
|
|
line.long 0x00 "RSCAN0RMID31,Receive BufferID Register 31"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x7F0++0x03
|
|
line.long 0x00 "RSCAN0RMID31,Receive BufferID Register 31"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x7F0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR31,Receive Buffer Pointer Register 31"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF031,Receive Buffer Data Field 0 Register 31"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF131,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x800))&0x80000000)==0x80000000)
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "RSCAN0RMID32,Receive BufferID Register 32"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "RSCAN0RMID32,Receive BufferID Register 32"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x800+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR32,Receive Buffer Pointer Register 32"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF032,Receive Buffer Data Field 0 Register 32"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF132,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x810))&0x80000000)==0x80000000)
|
|
group.long 0x810++0x03
|
|
line.long 0x00 "RSCAN0RMID33,Receive BufferID Register 33"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x810++0x03
|
|
line.long 0x00 "RSCAN0RMID33,Receive BufferID Register 33"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x810+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR33,Receive Buffer Pointer Register 33"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF033,Receive Buffer Data Field 0 Register 33"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF133,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x820))&0x80000000)==0x80000000)
|
|
group.long 0x820++0x03
|
|
line.long 0x00 "RSCAN0RMID34,Receive BufferID Register 34"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x820++0x03
|
|
line.long 0x00 "RSCAN0RMID34,Receive BufferID Register 34"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x820+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR34,Receive Buffer Pointer Register 34"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF034,Receive Buffer Data Field 0 Register 34"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF134,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x830))&0x80000000)==0x80000000)
|
|
group.long 0x830++0x03
|
|
line.long 0x00 "RSCAN0RMID35,Receive BufferID Register 35"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x830++0x03
|
|
line.long 0x00 "RSCAN0RMID35,Receive BufferID Register 35"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x830+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR35,Receive Buffer Pointer Register 35"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF035,Receive Buffer Data Field 0 Register 35"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF135,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x840))&0x80000000)==0x80000000)
|
|
group.long 0x840++0x03
|
|
line.long 0x00 "RSCAN0RMID36,Receive BufferID Register 36"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x840++0x03
|
|
line.long 0x00 "RSCAN0RMID36,Receive BufferID Register 36"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x840+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR36,Receive Buffer Pointer Register 36"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF036,Receive Buffer Data Field 0 Register 36"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF136,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x850))&0x80000000)==0x80000000)
|
|
group.long 0x850++0x03
|
|
line.long 0x00 "RSCAN0RMID37,Receive BufferID Register 37"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x850++0x03
|
|
line.long 0x00 "RSCAN0RMID37,Receive BufferID Register 37"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x850+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR37,Receive Buffer Pointer Register 37"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF037,Receive Buffer Data Field 0 Register 37"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF137,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x860))&0x80000000)==0x80000000)
|
|
group.long 0x860++0x03
|
|
line.long 0x00 "RSCAN0RMID38,Receive BufferID Register 38"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x860++0x03
|
|
line.long 0x00 "RSCAN0RMID38,Receive BufferID Register 38"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x860+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR38,Receive Buffer Pointer Register 38"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF038,Receive Buffer Data Field 0 Register 38"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF138,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x870))&0x80000000)==0x80000000)
|
|
group.long 0x870++0x03
|
|
line.long 0x00 "RSCAN0RMID39,Receive BufferID Register 39"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x870++0x03
|
|
line.long 0x00 "RSCAN0RMID39,Receive BufferID Register 39"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x870+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR39,Receive Buffer Pointer Register 39"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF039,Receive Buffer Data Field 0 Register 39"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF139,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x880))&0x80000000)==0x80000000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RSCAN0RMID40,Receive BufferID Register 40"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RSCAN0RMID40,Receive BufferID Register 40"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x880+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR40,Receive Buffer Pointer Register 40"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF040,Receive Buffer Data Field 0 Register 40"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF140,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x890))&0x80000000)==0x80000000)
|
|
group.long 0x890++0x03
|
|
line.long 0x00 "RSCAN0RMID41,Receive BufferID Register 41"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x890++0x03
|
|
line.long 0x00 "RSCAN0RMID41,Receive BufferID Register 41"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x890+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR41,Receive Buffer Pointer Register 41"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF041,Receive Buffer Data Field 0 Register 41"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF141,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x8A0))&0x80000000)==0x80000000)
|
|
group.long 0x8A0++0x03
|
|
line.long 0x00 "RSCAN0RMID42,Receive BufferID Register 42"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x8A0++0x03
|
|
line.long 0x00 "RSCAN0RMID42,Receive BufferID Register 42"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x8A0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR42,Receive Buffer Pointer Register 42"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF042,Receive Buffer Data Field 0 Register 42"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF142,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x8B0))&0x80000000)==0x80000000)
|
|
group.long 0x8B0++0x03
|
|
line.long 0x00 "RSCAN0RMID43,Receive BufferID Register 43"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x8B0++0x03
|
|
line.long 0x00 "RSCAN0RMID43,Receive BufferID Register 43"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x8B0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR43,Receive Buffer Pointer Register 43"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF043,Receive Buffer Data Field 0 Register 43"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF143,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x8C0))&0x80000000)==0x80000000)
|
|
group.long 0x8C0++0x03
|
|
line.long 0x00 "RSCAN0RMID44,Receive BufferID Register 44"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x8C0++0x03
|
|
line.long 0x00 "RSCAN0RMID44,Receive BufferID Register 44"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x8C0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR44,Receive Buffer Pointer Register 44"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF044,Receive Buffer Data Field 0 Register 44"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF144,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x8D0))&0x80000000)==0x80000000)
|
|
group.long 0x8D0++0x03
|
|
line.long 0x00 "RSCAN0RMID45,Receive BufferID Register 45"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x8D0++0x03
|
|
line.long 0x00 "RSCAN0RMID45,Receive BufferID Register 45"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x8D0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR45,Receive Buffer Pointer Register 45"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF045,Receive Buffer Data Field 0 Register 45"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF145,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x8E0))&0x80000000)==0x80000000)
|
|
group.long 0x8E0++0x03
|
|
line.long 0x00 "RSCAN0RMID46,Receive BufferID Register 46"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x8E0++0x03
|
|
line.long 0x00 "RSCAN0RMID46,Receive BufferID Register 46"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x8E0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR46,Receive Buffer Pointer Register 46"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF046,Receive Buffer Data Field 0 Register 46"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF146,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x8F0))&0x80000000)==0x80000000)
|
|
group.long 0x8F0++0x03
|
|
line.long 0x00 "RSCAN0RMID47,Receive BufferID Register 47"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x8F0++0x03
|
|
line.long 0x00 "RSCAN0RMID47,Receive BufferID Register 47"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x8F0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR47,Receive Buffer Pointer Register 47"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF047,Receive Buffer Data Field 0 Register 47"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF147,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x900))&0x80000000)==0x80000000)
|
|
group.long 0x900++0x03
|
|
line.long 0x00 "RSCAN0RMID48,Receive BufferID Register 48"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x900++0x03
|
|
line.long 0x00 "RSCAN0RMID48,Receive BufferID Register 48"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x900+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR48,Receive Buffer Pointer Register 48"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF048,Receive Buffer Data Field 0 Register 48"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF148,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x910))&0x80000000)==0x80000000)
|
|
group.long 0x910++0x03
|
|
line.long 0x00 "RSCAN0RMID49,Receive BufferID Register 49"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x910++0x03
|
|
line.long 0x00 "RSCAN0RMID49,Receive BufferID Register 49"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x910+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR49,Receive Buffer Pointer Register 49"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF049,Receive Buffer Data Field 0 Register 49"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF149,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x920))&0x80000000)==0x80000000)
|
|
group.long 0x920++0x03
|
|
line.long 0x00 "RSCAN0RMID50,Receive BufferID Register 50"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x920++0x03
|
|
line.long 0x00 "RSCAN0RMID50,Receive BufferID Register 50"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x920+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR50,Receive Buffer Pointer Register 50"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF050,Receive Buffer Data Field 0 Register 50"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF150,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x930))&0x80000000)==0x80000000)
|
|
group.long 0x930++0x03
|
|
line.long 0x00 "RSCAN0RMID51,Receive BufferID Register 51"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x930++0x03
|
|
line.long 0x00 "RSCAN0RMID51,Receive BufferID Register 51"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x930+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR51,Receive Buffer Pointer Register 51"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF051,Receive Buffer Data Field 0 Register 51"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF151,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x940))&0x80000000)==0x80000000)
|
|
group.long 0x940++0x03
|
|
line.long 0x00 "RSCAN0RMID52,Receive BufferID Register 52"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x940++0x03
|
|
line.long 0x00 "RSCAN0RMID52,Receive BufferID Register 52"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x940+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR52,Receive Buffer Pointer Register 52"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF052,Receive Buffer Data Field 0 Register 52"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF152,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x950))&0x80000000)==0x80000000)
|
|
group.long 0x950++0x03
|
|
line.long 0x00 "RSCAN0RMID53,Receive BufferID Register 53"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x950++0x03
|
|
line.long 0x00 "RSCAN0RMID53,Receive BufferID Register 53"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x950+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR53,Receive Buffer Pointer Register 53"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF053,Receive Buffer Data Field 0 Register 53"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF153,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x960))&0x80000000)==0x80000000)
|
|
group.long 0x960++0x03
|
|
line.long 0x00 "RSCAN0RMID54,Receive BufferID Register 54"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x960++0x03
|
|
line.long 0x00 "RSCAN0RMID54,Receive BufferID Register 54"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x960+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR54,Receive Buffer Pointer Register 54"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF054,Receive Buffer Data Field 0 Register 54"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF154,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x970))&0x80000000)==0x80000000)
|
|
group.long 0x970++0x03
|
|
line.long 0x00 "RSCAN0RMID55,Receive BufferID Register 55"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x970++0x03
|
|
line.long 0x00 "RSCAN0RMID55,Receive BufferID Register 55"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x970+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR55,Receive Buffer Pointer Register 55"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF055,Receive Buffer Data Field 0 Register 55"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF155,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x980))&0x80000000)==0x80000000)
|
|
group.long 0x980++0x03
|
|
line.long 0x00 "RSCAN0RMID56,Receive BufferID Register 56"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x980++0x03
|
|
line.long 0x00 "RSCAN0RMID56,Receive BufferID Register 56"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x980+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR56,Receive Buffer Pointer Register 56"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF056,Receive Buffer Data Field 0 Register 56"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF156,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x990))&0x80000000)==0x80000000)
|
|
group.long 0x990++0x03
|
|
line.long 0x00 "RSCAN0RMID57,Receive BufferID Register 57"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x990++0x03
|
|
line.long 0x00 "RSCAN0RMID57,Receive BufferID Register 57"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x990+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR57,Receive Buffer Pointer Register 57"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF057,Receive Buffer Data Field 0 Register 57"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF157,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x9A0))&0x80000000)==0x80000000)
|
|
group.long 0x9A0++0x03
|
|
line.long 0x00 "RSCAN0RMID58,Receive BufferID Register 58"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x9A0++0x03
|
|
line.long 0x00 "RSCAN0RMID58,Receive BufferID Register 58"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x9A0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR58,Receive Buffer Pointer Register 58"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF058,Receive Buffer Data Field 0 Register 58"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF158,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x9B0))&0x80000000)==0x80000000)
|
|
group.long 0x9B0++0x03
|
|
line.long 0x00 "RSCAN0RMID59,Receive BufferID Register 59"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x9B0++0x03
|
|
line.long 0x00 "RSCAN0RMID59,Receive BufferID Register 59"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x9B0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR59,Receive Buffer Pointer Register 59"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF059,Receive Buffer Data Field 0 Register 59"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF159,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x9C0))&0x80000000)==0x80000000)
|
|
group.long 0x9C0++0x03
|
|
line.long 0x00 "RSCAN0RMID60,Receive BufferID Register 60"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x9C0++0x03
|
|
line.long 0x00 "RSCAN0RMID60,Receive BufferID Register 60"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x9C0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR60,Receive Buffer Pointer Register 60"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF060,Receive Buffer Data Field 0 Register 60"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF160,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x9D0))&0x80000000)==0x80000000)
|
|
group.long 0x9D0++0x03
|
|
line.long 0x00 "RSCAN0RMID61,Receive BufferID Register 61"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x9D0++0x03
|
|
line.long 0x00 "RSCAN0RMID61,Receive BufferID Register 61"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x9D0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR61,Receive Buffer Pointer Register 61"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF061,Receive Buffer Data Field 0 Register 61"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF161,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x9E0))&0x80000000)==0x80000000)
|
|
group.long 0x9E0++0x03
|
|
line.long 0x00 "RSCAN0RMID62,Receive BufferID Register 62"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x9E0++0x03
|
|
line.long 0x00 "RSCAN0RMID62,Receive BufferID Register 62"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x9E0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR62,Receive Buffer Pointer Register 62"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF062,Receive Buffer Data Field 0 Register 62"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF162,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x9F0))&0x80000000)==0x80000000)
|
|
group.long 0x9F0++0x03
|
|
line.long 0x00 "RSCAN0RMID63,Receive BufferID Register 63"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0x9F0++0x03
|
|
line.long 0x00 "RSCAN0RMID63,Receive BufferID Register 63"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0x9F0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR63,Receive Buffer Pointer Register 63"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF063,Receive Buffer Data Field 0 Register 63"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF163,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xA00))&0x80000000)==0x80000000)
|
|
group.long 0xA00++0x03
|
|
line.long 0x00 "RSCAN0RMID64,Receive BufferID Register 64"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0xA00++0x03
|
|
line.long 0x00 "RSCAN0RMID64,Receive BufferID Register 64"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0xA00+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR64,Receive Buffer Pointer Register 64"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF064,Receive Buffer Data Field 0 Register 64"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF164,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xA10))&0x80000000)==0x80000000)
|
|
group.long 0xA10++0x03
|
|
line.long 0x00 "RSCAN0RMID65,Receive BufferID Register 65"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0xA10++0x03
|
|
line.long 0x00 "RSCAN0RMID65,Receive BufferID Register 65"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0xA10+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR65,Receive Buffer Pointer Register 65"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF065,Receive Buffer Data Field 0 Register 65"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF165,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xA20))&0x80000000)==0x80000000)
|
|
group.long 0xA20++0x03
|
|
line.long 0x00 "RSCAN0RMID66,Receive BufferID Register 66"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0xA20++0x03
|
|
line.long 0x00 "RSCAN0RMID66,Receive BufferID Register 66"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0xA20+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR66,Receive Buffer Pointer Register 66"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF066,Receive Buffer Data Field 0 Register 66"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF166,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xA30))&0x80000000)==0x80000000)
|
|
group.long 0xA30++0x03
|
|
line.long 0x00 "RSCAN0RMID67,Receive BufferID Register 67"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0xA30++0x03
|
|
line.long 0x00 "RSCAN0RMID67,Receive BufferID Register 67"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0xA30+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR67,Receive Buffer Pointer Register 67"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF067,Receive Buffer Data Field 0 Register 67"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF167,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xA40))&0x80000000)==0x80000000)
|
|
group.long 0xA40++0x03
|
|
line.long 0x00 "RSCAN0RMID68,Receive BufferID Register 68"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0xA40++0x03
|
|
line.long 0x00 "RSCAN0RMID68,Receive BufferID Register 68"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0xA40+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR68,Receive Buffer Pointer Register 68"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF068,Receive Buffer Data Field 0 Register 68"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF168,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xA50))&0x80000000)==0x80000000)
|
|
group.long 0xA50++0x03
|
|
line.long 0x00 "RSCAN0RMID69,Receive BufferID Register 69"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0xA50++0x03
|
|
line.long 0x00 "RSCAN0RMID69,Receive BufferID Register 69"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0xA50+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR69,Receive Buffer Pointer Register 69"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF069,Receive Buffer Data Field 0 Register 69"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF169,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xA60))&0x80000000)==0x80000000)
|
|
group.long 0xA60++0x03
|
|
line.long 0x00 "RSCAN0RMID70,Receive BufferID Register 70"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0xA60++0x03
|
|
line.long 0x00 "RSCAN0RMID70,Receive BufferID Register 70"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0xA60+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR70,Receive Buffer Pointer Register 70"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF070,Receive Buffer Data Field 0 Register 70"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF170,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xA70))&0x80000000)==0x80000000)
|
|
group.long 0xA70++0x03
|
|
line.long 0x00 "RSCAN0RMID71,Receive BufferID Register 71"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0xA70++0x03
|
|
line.long 0x00 "RSCAN0RMID71,Receive BufferID Register 71"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0xA70+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR71,Receive Buffer Pointer Register 71"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF071,Receive Buffer Data Field 0 Register 71"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF171,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xA80))&0x80000000)==0x80000000)
|
|
group.long 0xA80++0x03
|
|
line.long 0x00 "RSCAN0RMID72,Receive BufferID Register 72"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0xA80++0x03
|
|
line.long 0x00 "RSCAN0RMID72,Receive BufferID Register 72"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0xA80+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR72,Receive Buffer Pointer Register 72"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF072,Receive Buffer Data Field 0 Register 72"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF172,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xA90))&0x80000000)==0x80000000)
|
|
group.long 0xA90++0x03
|
|
line.long 0x00 "RSCAN0RMID73,Receive BufferID Register 73"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0xA90++0x03
|
|
line.long 0x00 "RSCAN0RMID73,Receive BufferID Register 73"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0xA90+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR73,Receive Buffer Pointer Register 73"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF073,Receive Buffer Data Field 0 Register 73"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF173,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xAA0))&0x80000000)==0x80000000)
|
|
group.long 0xAA0++0x03
|
|
line.long 0x00 "RSCAN0RMID74,Receive BufferID Register 74"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0xAA0++0x03
|
|
line.long 0x00 "RSCAN0RMID74,Receive BufferID Register 74"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0xAA0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR74,Receive Buffer Pointer Register 74"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF074,Receive Buffer Data Field 0 Register 74"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF174,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xAB0))&0x80000000)==0x80000000)
|
|
group.long 0xAB0++0x03
|
|
line.long 0x00 "RSCAN0RMID75,Receive BufferID Register 75"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0xAB0++0x03
|
|
line.long 0x00 "RSCAN0RMID75,Receive BufferID Register 75"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0xAB0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR75,Receive Buffer Pointer Register 75"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF075,Receive Buffer Data Field 0 Register 75"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF175,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xAC0))&0x80000000)==0x80000000)
|
|
group.long 0xAC0++0x03
|
|
line.long 0x00 "RSCAN0RMID76,Receive BufferID Register 76"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0xAC0++0x03
|
|
line.long 0x00 "RSCAN0RMID76,Receive BufferID Register 76"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0xAC0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR76,Receive Buffer Pointer Register 76"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF076,Receive Buffer Data Field 0 Register 76"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF176,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xAD0))&0x80000000)==0x80000000)
|
|
group.long 0xAD0++0x03
|
|
line.long 0x00 "RSCAN0RMID77,Receive BufferID Register 77"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0xAD0++0x03
|
|
line.long 0x00 "RSCAN0RMID77,Receive BufferID Register 77"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0xAD0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR77,Receive Buffer Pointer Register 77"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF077,Receive Buffer Data Field 0 Register 77"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF177,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xAE0))&0x80000000)==0x80000000)
|
|
group.long 0xAE0++0x03
|
|
line.long 0x00 "RSCAN0RMID78,Receive BufferID Register 78"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0xAE0++0x03
|
|
line.long 0x00 "RSCAN0RMID78,Receive BufferID Register 78"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0xAE0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR78,Receive Buffer Pointer Register 78"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF078,Receive Buffer Data Field 0 Register 78"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF178,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xAF0))&0x80000000)==0x80000000)
|
|
group.long 0xAF0++0x03
|
|
line.long 0x00 "RSCAN0RMID79,Receive BufferID Register 79"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RMID ,Receive buffer ID data"
|
|
else
|
|
group.long 0xAF0++0x03
|
|
line.long 0x00 "RSCAN0RMID79,Receive BufferID Register 79"
|
|
bitfld.long 0x00 31. " RMIDE ,Receive buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RMRTR ,Receive buffer RTR" "Data,Remote"
|
|
hexmask.long.word 0x00 0.--10. 1. " RMID ,Receive buffer ID data"
|
|
endif
|
|
rgroup.long (0xAF0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RMPTR79,Receive Buffer Pointer Register 79"
|
|
bitfld.long 0x00 28.--31. " RMDLC ,Receive buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RMPTR ,Receive buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RMTS ,Receive buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RMDF079,Receive Buffer Data Field 0 Register 79"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RMDB3 ,Receive buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RMDB2 ,Receive buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RMDB1 ,Receive buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RMDB0 ,Receive buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RMDF179,Receive Buffer Data Field 1 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RMDB7 ,Receive buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RMDB6 ,Receive buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RMDB5 ,Receive buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RMDB4 ,Receive buffer data byte 4"
|
|
newline
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "RSCAN0RFCC0,Receive FIFO Buffer Configuration and Control Register 0"
|
|
bitfld.long 0x00 13.--15. " RFIGCV ,Receive FIFO interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
bitfld.long 0x00 12. " RFIM ,Receive FIFO interrupt source select" "RFIGCV condition,Msg received"
|
|
bitfld.long 0x00 8.--10. " RFDC ,Receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
newline
|
|
bitfld.long 0x00 1. " RFIE ,Receive FIFO interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RFE ,Receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "RSCAN0RFCC1,Receive FIFO Buffer Configuration and Control Register 1"
|
|
bitfld.long 0x00 13.--15. " RFIGCV ,Receive FIFO interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
bitfld.long 0x00 12. " RFIM ,Receive FIFO interrupt source select" "RFIGCV condition,Msg received"
|
|
bitfld.long 0x00 8.--10. " RFDC ,Receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
newline
|
|
bitfld.long 0x00 1. " RFIE ,Receive FIFO interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RFE ,Receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "RSCAN0RFCC2,Receive FIFO Buffer Configuration and Control Register 2"
|
|
bitfld.long 0x00 13.--15. " RFIGCV ,Receive FIFO interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
bitfld.long 0x00 12. " RFIM ,Receive FIFO interrupt source select" "RFIGCV condition,Msg received"
|
|
bitfld.long 0x00 8.--10. " RFDC ,Receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
newline
|
|
bitfld.long 0x00 1. " RFIE ,Receive FIFO interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RFE ,Receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "RSCAN0RFCC3,Receive FIFO Buffer Configuration and Control Register 3"
|
|
bitfld.long 0x00 13.--15. " RFIGCV ,Receive FIFO interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
bitfld.long 0x00 12. " RFIM ,Receive FIFO interrupt source select" "RFIGCV condition,Msg received"
|
|
bitfld.long 0x00 8.--10. " RFDC ,Receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
newline
|
|
bitfld.long 0x00 1. " RFIE ,Receive FIFO interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RFE ,Receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "RSCAN0RFCC4,Receive FIFO Buffer Configuration and Control Register 4"
|
|
bitfld.long 0x00 13.--15. " RFIGCV ,Receive FIFO interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
bitfld.long 0x00 12. " RFIM ,Receive FIFO interrupt source select" "RFIGCV condition,Msg received"
|
|
bitfld.long 0x00 8.--10. " RFDC ,Receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
newline
|
|
bitfld.long 0x00 1. " RFIE ,Receive FIFO interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RFE ,Receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "RSCAN0RFCC5,Receive FIFO Buffer Configuration and Control Register 5"
|
|
bitfld.long 0x00 13.--15. " RFIGCV ,Receive FIFO interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
bitfld.long 0x00 12. " RFIM ,Receive FIFO interrupt source select" "RFIGCV condition,Msg received"
|
|
bitfld.long 0x00 8.--10. " RFDC ,Receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
newline
|
|
bitfld.long 0x00 1. " RFIE ,Receive FIFO interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RFE ,Receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "RSCAN0RFCC6,Receive FIFO Buffer Configuration and Control Register 6"
|
|
bitfld.long 0x00 13.--15. " RFIGCV ,Receive FIFO interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
bitfld.long 0x00 12. " RFIM ,Receive FIFO interrupt source select" "RFIGCV condition,Msg received"
|
|
bitfld.long 0x00 8.--10. " RFDC ,Receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
newline
|
|
bitfld.long 0x00 1. " RFIE ,Receive FIFO interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RFE ,Receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "RSCAN0RFCC7,Receive FIFO Buffer Configuration and Control Register 7"
|
|
bitfld.long 0x00 13.--15. " RFIGCV ,Receive FIFO interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
bitfld.long 0x00 12. " RFIM ,Receive FIFO interrupt source select" "RFIGCV condition,Msg received"
|
|
bitfld.long 0x00 8.--10. " RFDC ,Receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
newline
|
|
bitfld.long 0x00 1. " RFIE ,Receive FIFO interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RFE ,Receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "RSCAN0RFSTS0,Receive FIFO Buffer Status Register 0"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RFMC ,Receive FIFO unread message counter"
|
|
bitfld.long 0x00 3. " RFIF ,Receive FIFO interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " RFMLT ,Receive FIFO message lost flag" "Not lost,Lost"
|
|
newline
|
|
rbitfld.long 0x00 1. " RFFLL ,Receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " RFEMP ,Receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "RSCAN0RFSTS1,Receive FIFO Buffer Status Register 1"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RFMC ,Receive FIFO unread message counter"
|
|
bitfld.long 0x00 3. " RFIF ,Receive FIFO interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " RFMLT ,Receive FIFO message lost flag" "Not lost,Lost"
|
|
newline
|
|
rbitfld.long 0x00 1. " RFFLL ,Receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " RFEMP ,Receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "RSCAN0RFSTS2,Receive FIFO Buffer Status Register 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RFMC ,Receive FIFO unread message counter"
|
|
bitfld.long 0x00 3. " RFIF ,Receive FIFO interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " RFMLT ,Receive FIFO message lost flag" "Not lost,Lost"
|
|
newline
|
|
rbitfld.long 0x00 1. " RFFLL ,Receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " RFEMP ,Receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "RSCAN0RFSTS3,Receive FIFO Buffer Status Register 3"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RFMC ,Receive FIFO unread message counter"
|
|
bitfld.long 0x00 3. " RFIF ,Receive FIFO interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " RFMLT ,Receive FIFO message lost flag" "Not lost,Lost"
|
|
newline
|
|
rbitfld.long 0x00 1. " RFFLL ,Receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " RFEMP ,Receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "RSCAN0RFSTS4,Receive FIFO Buffer Status Register 4"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RFMC ,Receive FIFO unread message counter"
|
|
bitfld.long 0x00 3. " RFIF ,Receive FIFO interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " RFMLT ,Receive FIFO message lost flag" "Not lost,Lost"
|
|
newline
|
|
rbitfld.long 0x00 1. " RFFLL ,Receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " RFEMP ,Receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "RSCAN0RFSTS5,Receive FIFO Buffer Status Register 5"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RFMC ,Receive FIFO unread message counter"
|
|
bitfld.long 0x00 3. " RFIF ,Receive FIFO interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " RFMLT ,Receive FIFO message lost flag" "Not lost,Lost"
|
|
newline
|
|
rbitfld.long 0x00 1. " RFFLL ,Receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " RFEMP ,Receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "RSCAN0RFSTS6,Receive FIFO Buffer Status Register 6"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RFMC ,Receive FIFO unread message counter"
|
|
bitfld.long 0x00 3. " RFIF ,Receive FIFO interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " RFMLT ,Receive FIFO message lost flag" "Not lost,Lost"
|
|
newline
|
|
rbitfld.long 0x00 1. " RFFLL ,Receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " RFEMP ,Receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "RSCAN0RFSTS7,Receive FIFO Buffer Status Register 7"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RFMC ,Receive FIFO unread message counter"
|
|
bitfld.long 0x00 3. " RFIF ,Receive FIFO interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " RFMLT ,Receive FIFO message lost flag" "Not lost,Lost"
|
|
newline
|
|
rbitfld.long 0x00 1. " RFFLL ,Receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " RFEMP ,Receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
wgroup.long 0xF8++0x03
|
|
line.long 0x00 "RSCAN0RFPCTR0,Receive FIFO Buffer Pointer Control Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RFPC ,Receive FIFO pointer control"
|
|
wgroup.long 0xFC++0x03
|
|
line.long 0x00 "RSCAN0RFPCTR1,Receive FIFO Buffer Pointer Control Register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RFPC ,Receive FIFO pointer control"
|
|
wgroup.long 0x100++0x03
|
|
line.long 0x00 "RSCAN0RFPCTR2,Receive FIFO Buffer Pointer Control Register 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RFPC ,Receive FIFO pointer control"
|
|
wgroup.long 0x104++0x03
|
|
line.long 0x00 "RSCAN0RFPCTR3,Receive FIFO Buffer Pointer Control Register 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RFPC ,Receive FIFO pointer control"
|
|
wgroup.long 0x108++0x03
|
|
line.long 0x00 "RSCAN0RFPCTR4,Receive FIFO Buffer Pointer Control Register 4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RFPC ,Receive FIFO pointer control"
|
|
wgroup.long 0x10C++0x03
|
|
line.long 0x00 "RSCAN0RFPCTR5,Receive FIFO Buffer Pointer Control Register 5"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RFPC ,Receive FIFO pointer control"
|
|
wgroup.long 0x110++0x03
|
|
line.long 0x00 "RSCAN0RFPCTR6,Receive FIFO Buffer Pointer Control Register 6"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RFPC ,Receive FIFO pointer control"
|
|
wgroup.long 0x114++0x03
|
|
line.long 0x00 "RSCAN0RFPCTR7,Receive FIFO Buffer Pointer Control Register 7"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RFPC ,Receive FIFO pointer control"
|
|
newline
|
|
if (((per.l(ad:0xE803A000+0xE00))&0x80000000)==0x80000000)
|
|
rgroup.long 0xE00++0x03
|
|
line.long 0x00 "RSCAN0RFID0,Receive FIFO Buffer Access ID Register 0"
|
|
bitfld.long 0x00 31. " RFIDE ,Receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RFRTR ,Receive FIFO buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RFID ,Receive FIFO buffer ID data"
|
|
else
|
|
rgroup.long 0xE00++0x03
|
|
line.long 0x00 "RSCAN0RFID0,Receive FIFO Buffer Access ID Register 0"
|
|
bitfld.long 0x00 31. " RFIDE ,Receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RFRTR ,Receive FIFO buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--10. 1. " RFID ,Receive FIFO buffer ID data"
|
|
endif
|
|
rgroup.long (0xE00+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RFPTR0,Receive FIFO BufferAccess Pointer Register 0"
|
|
bitfld.long 0x00 28.--31. " RFDLC ,Receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RFPTR ,Receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RFTS ,Receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RFDF00,Receive FIFO Buffer Access Data Field 0 Register 0"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RFDB3 ,Receive FIFO Buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RFDB2 ,Receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RFDB1 ,Receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RFDB0 ,Receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RFDF10,Receive FIFO Buffer Access Data Field 1 Register 0"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RFDB7 ,Receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RFDB6 ,Receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RFDB5 ,Receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RFDB4 ,Receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xE10))&0x80000000)==0x80000000)
|
|
rgroup.long 0xE10++0x03
|
|
line.long 0x00 "RSCAN0RFID1,Receive FIFO Buffer Access ID Register 1"
|
|
bitfld.long 0x00 31. " RFIDE ,Receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RFRTR ,Receive FIFO buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RFID ,Receive FIFO buffer ID data"
|
|
else
|
|
rgroup.long 0xE10++0x03
|
|
line.long 0x00 "RSCAN0RFID1,Receive FIFO Buffer Access ID Register 1"
|
|
bitfld.long 0x00 31. " RFIDE ,Receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RFRTR ,Receive FIFO buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--10. 1. " RFID ,Receive FIFO buffer ID data"
|
|
endif
|
|
rgroup.long (0xE10+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RFPTR1,Receive FIFO BufferAccess Pointer Register 1"
|
|
bitfld.long 0x00 28.--31. " RFDLC ,Receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RFPTR ,Receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RFTS ,Receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RFDF01,Receive FIFO Buffer Access Data Field 0 Register 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RFDB3 ,Receive FIFO Buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RFDB2 ,Receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RFDB1 ,Receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RFDB0 ,Receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RFDF11,Receive FIFO Buffer Access Data Field 1 Register 1"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RFDB7 ,Receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RFDB6 ,Receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RFDB5 ,Receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RFDB4 ,Receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xE20))&0x80000000)==0x80000000)
|
|
rgroup.long 0xE20++0x03
|
|
line.long 0x00 "RSCAN0RFID2,Receive FIFO Buffer Access ID Register 2"
|
|
bitfld.long 0x00 31. " RFIDE ,Receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RFRTR ,Receive FIFO buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RFID ,Receive FIFO buffer ID data"
|
|
else
|
|
rgroup.long 0xE20++0x03
|
|
line.long 0x00 "RSCAN0RFID2,Receive FIFO Buffer Access ID Register 2"
|
|
bitfld.long 0x00 31. " RFIDE ,Receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RFRTR ,Receive FIFO buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--10. 1. " RFID ,Receive FIFO buffer ID data"
|
|
endif
|
|
rgroup.long (0xE20+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RFPTR2,Receive FIFO BufferAccess Pointer Register 2"
|
|
bitfld.long 0x00 28.--31. " RFDLC ,Receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RFPTR ,Receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RFTS ,Receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RFDF02,Receive FIFO Buffer Access Data Field 0 Register 2"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RFDB3 ,Receive FIFO Buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RFDB2 ,Receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RFDB1 ,Receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RFDB0 ,Receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RFDF12,Receive FIFO Buffer Access Data Field 1 Register 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RFDB7 ,Receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RFDB6 ,Receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RFDB5 ,Receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RFDB4 ,Receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xE30))&0x80000000)==0x80000000)
|
|
rgroup.long 0xE30++0x03
|
|
line.long 0x00 "RSCAN0RFID3,Receive FIFO Buffer Access ID Register 3"
|
|
bitfld.long 0x00 31. " RFIDE ,Receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RFRTR ,Receive FIFO buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RFID ,Receive FIFO buffer ID data"
|
|
else
|
|
rgroup.long 0xE30++0x03
|
|
line.long 0x00 "RSCAN0RFID3,Receive FIFO Buffer Access ID Register 3"
|
|
bitfld.long 0x00 31. " RFIDE ,Receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RFRTR ,Receive FIFO buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--10. 1. " RFID ,Receive FIFO buffer ID data"
|
|
endif
|
|
rgroup.long (0xE30+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RFPTR3,Receive FIFO BufferAccess Pointer Register 3"
|
|
bitfld.long 0x00 28.--31. " RFDLC ,Receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RFPTR ,Receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RFTS ,Receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RFDF03,Receive FIFO Buffer Access Data Field 0 Register 3"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RFDB3 ,Receive FIFO Buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RFDB2 ,Receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RFDB1 ,Receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RFDB0 ,Receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RFDF13,Receive FIFO Buffer Access Data Field 1 Register 3"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RFDB7 ,Receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RFDB6 ,Receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RFDB5 ,Receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RFDB4 ,Receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xE40))&0x80000000)==0x80000000)
|
|
rgroup.long 0xE40++0x03
|
|
line.long 0x00 "RSCAN0RFID4,Receive FIFO Buffer Access ID Register 4"
|
|
bitfld.long 0x00 31. " RFIDE ,Receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RFRTR ,Receive FIFO buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RFID ,Receive FIFO buffer ID data"
|
|
else
|
|
rgroup.long 0xE40++0x03
|
|
line.long 0x00 "RSCAN0RFID4,Receive FIFO Buffer Access ID Register 4"
|
|
bitfld.long 0x00 31. " RFIDE ,Receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RFRTR ,Receive FIFO buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--10. 1. " RFID ,Receive FIFO buffer ID data"
|
|
endif
|
|
rgroup.long (0xE40+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RFPTR4,Receive FIFO BufferAccess Pointer Register 4"
|
|
bitfld.long 0x00 28.--31. " RFDLC ,Receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RFPTR ,Receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RFTS ,Receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RFDF04,Receive FIFO Buffer Access Data Field 0 Register 4"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RFDB3 ,Receive FIFO Buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RFDB2 ,Receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RFDB1 ,Receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RFDB0 ,Receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RFDF14,Receive FIFO Buffer Access Data Field 1 Register 4"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RFDB7 ,Receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RFDB6 ,Receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RFDB5 ,Receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RFDB4 ,Receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xE50))&0x80000000)==0x80000000)
|
|
rgroup.long 0xE50++0x03
|
|
line.long 0x00 "RSCAN0RFID5,Receive FIFO Buffer Access ID Register 5"
|
|
bitfld.long 0x00 31. " RFIDE ,Receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RFRTR ,Receive FIFO buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RFID ,Receive FIFO buffer ID data"
|
|
else
|
|
rgroup.long 0xE50++0x03
|
|
line.long 0x00 "RSCAN0RFID5,Receive FIFO Buffer Access ID Register 5"
|
|
bitfld.long 0x00 31. " RFIDE ,Receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RFRTR ,Receive FIFO buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--10. 1. " RFID ,Receive FIFO buffer ID data"
|
|
endif
|
|
rgroup.long (0xE50+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RFPTR5,Receive FIFO BufferAccess Pointer Register 5"
|
|
bitfld.long 0x00 28.--31. " RFDLC ,Receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RFPTR ,Receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RFTS ,Receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RFDF05,Receive FIFO Buffer Access Data Field 0 Register 5"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RFDB3 ,Receive FIFO Buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RFDB2 ,Receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RFDB1 ,Receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RFDB0 ,Receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RFDF15,Receive FIFO Buffer Access Data Field 1 Register 5"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RFDB7 ,Receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RFDB6 ,Receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RFDB5 ,Receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RFDB4 ,Receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xE60))&0x80000000)==0x80000000)
|
|
rgroup.long 0xE60++0x03
|
|
line.long 0x00 "RSCAN0RFID6,Receive FIFO Buffer Access ID Register 6"
|
|
bitfld.long 0x00 31. " RFIDE ,Receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RFRTR ,Receive FIFO buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RFID ,Receive FIFO buffer ID data"
|
|
else
|
|
rgroup.long 0xE60++0x03
|
|
line.long 0x00 "RSCAN0RFID6,Receive FIFO Buffer Access ID Register 6"
|
|
bitfld.long 0x00 31. " RFIDE ,Receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RFRTR ,Receive FIFO buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--10. 1. " RFID ,Receive FIFO buffer ID data"
|
|
endif
|
|
rgroup.long (0xE60+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RFPTR6,Receive FIFO BufferAccess Pointer Register 6"
|
|
bitfld.long 0x00 28.--31. " RFDLC ,Receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RFPTR ,Receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RFTS ,Receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RFDF06,Receive FIFO Buffer Access Data Field 0 Register 6"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RFDB3 ,Receive FIFO Buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RFDB2 ,Receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RFDB1 ,Receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RFDB0 ,Receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RFDF16,Receive FIFO Buffer Access Data Field 1 Register 6"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RFDB7 ,Receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RFDB6 ,Receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RFDB5 ,Receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RFDB4 ,Receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xE70))&0x80000000)==0x80000000)
|
|
rgroup.long 0xE70++0x03
|
|
line.long 0x00 "RSCAN0RFID7,Receive FIFO Buffer Access ID Register 7"
|
|
bitfld.long 0x00 31. " RFIDE ,Receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RFRTR ,Receive FIFO buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--28. 1. " RFID ,Receive FIFO buffer ID data"
|
|
else
|
|
rgroup.long 0xE70++0x03
|
|
line.long 0x00 "RSCAN0RFID7,Receive FIFO Buffer Access ID Register 7"
|
|
bitfld.long 0x00 31. " RFIDE ,Receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " RFRTR ,Receive FIFO buffer RTR" "Data,Remote"
|
|
hexmask.long 0x00 0.--10. 1. " RFID ,Receive FIFO buffer ID data"
|
|
endif
|
|
rgroup.long (0xE70+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0RFPTR7,Receive FIFO BufferAccess Pointer Register 7"
|
|
bitfld.long 0x00 28.--31. " RFDLC ,Receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " RFPTR ,Receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " RFTS ,Receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0RFDF07,Receive FIFO Buffer Access Data Field 0 Register 7"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RFDB3 ,Receive FIFO Buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " RFDB2 ,Receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RFDB1 ,Receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RFDB0 ,Receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0RFDF17,Receive FIFO Buffer Access Data Field 1 Register 7"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RFDB7 ,Receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " RFDB6 ,Receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " RFDB5 ,Receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " RFDB4 ,Receive FIFO buffer data byte 4"
|
|
tree.end
|
|
tree "Transmit/Receive Registers"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "RSCAN0CFCC0,Transmit/receive FIFO buffer Configuration and Control Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CFITT ,Set a message transmission interval"
|
|
bitfld.long 0x00 20.--23. " CFTML ,Transmit buffer link configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 19. " CFITR ,Transmit/receive FIFO interval timer resolution" "ITRCP,ITRCP x 10"
|
|
newline
|
|
bitfld.long 0x00 18. " CFITSS ,Transmit/receive FIFO interval timer clock source select" "CFITR,Bit time clk"
|
|
bitfld.long 0x00 16.--17. " CFM ,Transmit/receive FIFO mode select" "Receive,Transmit,Gateway,?..."
|
|
bitfld.long 0x00 13.--15. " CFIGCV ,Transmit/receive FIFO receive interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
newline
|
|
bitfld.long 0x00 12. " CFIM ,Transmit/Receive FIFO interrupt source select" "0,1"
|
|
bitfld.long 0x00 8.--10. " CFDC ,Transmit/receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
bitfld.long 0x00 2. " CFTXIE ,Transmit/receive FIFO transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " CFRXIE ,Transmit/Receive FIFO receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CFE ,Transmit/receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "RSCAN0CFCC1,Transmit/receive FIFO buffer Configuration and Control Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CFITT ,Set a message transmission interval"
|
|
bitfld.long 0x00 20.--23. " CFTML ,Transmit buffer link configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 19. " CFITR ,Transmit/receive FIFO interval timer resolution" "ITRCP,ITRCP x 10"
|
|
newline
|
|
bitfld.long 0x00 18. " CFITSS ,Transmit/receive FIFO interval timer clock source select" "CFITR,Bit time clk"
|
|
bitfld.long 0x00 16.--17. " CFM ,Transmit/receive FIFO mode select" "Receive,Transmit,Gateway,?..."
|
|
bitfld.long 0x00 13.--15. " CFIGCV ,Transmit/receive FIFO receive interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
newline
|
|
bitfld.long 0x00 12. " CFIM ,Transmit/Receive FIFO interrupt source select" "0,1"
|
|
bitfld.long 0x00 8.--10. " CFDC ,Transmit/receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
bitfld.long 0x00 2. " CFTXIE ,Transmit/receive FIFO transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " CFRXIE ,Transmit/Receive FIFO receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CFE ,Transmit/receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "RSCAN0CFCC2,Transmit/receive FIFO buffer Configuration and Control Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CFITT ,Set a message transmission interval"
|
|
bitfld.long 0x00 20.--23. " CFTML ,Transmit buffer link configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 19. " CFITR ,Transmit/receive FIFO interval timer resolution" "ITRCP,ITRCP x 10"
|
|
newline
|
|
bitfld.long 0x00 18. " CFITSS ,Transmit/receive FIFO interval timer clock source select" "CFITR,Bit time clk"
|
|
bitfld.long 0x00 16.--17. " CFM ,Transmit/receive FIFO mode select" "Receive,Transmit,Gateway,?..."
|
|
bitfld.long 0x00 13.--15. " CFIGCV ,Transmit/receive FIFO receive interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
newline
|
|
bitfld.long 0x00 12. " CFIM ,Transmit/Receive FIFO interrupt source select" "0,1"
|
|
bitfld.long 0x00 8.--10. " CFDC ,Transmit/receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
bitfld.long 0x00 2. " CFTXIE ,Transmit/receive FIFO transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " CFRXIE ,Transmit/Receive FIFO receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CFE ,Transmit/receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "RSCAN0CFCC3,Transmit/receive FIFO buffer Configuration and Control Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CFITT ,Set a message transmission interval"
|
|
bitfld.long 0x00 20.--23. " CFTML ,Transmit buffer link configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 19. " CFITR ,Transmit/receive FIFO interval timer resolution" "ITRCP,ITRCP x 10"
|
|
newline
|
|
bitfld.long 0x00 18. " CFITSS ,Transmit/receive FIFO interval timer clock source select" "CFITR,Bit time clk"
|
|
bitfld.long 0x00 16.--17. " CFM ,Transmit/receive FIFO mode select" "Receive,Transmit,Gateway,?..."
|
|
bitfld.long 0x00 13.--15. " CFIGCV ,Transmit/receive FIFO receive interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
newline
|
|
bitfld.long 0x00 12. " CFIM ,Transmit/Receive FIFO interrupt source select" "0,1"
|
|
bitfld.long 0x00 8.--10. " CFDC ,Transmit/receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
bitfld.long 0x00 2. " CFTXIE ,Transmit/receive FIFO transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " CFRXIE ,Transmit/Receive FIFO receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CFE ,Transmit/receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "RSCAN0CFCC4,Transmit/receive FIFO buffer Configuration and Control Register 4"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CFITT ,Set a message transmission interval"
|
|
bitfld.long 0x00 20.--23. " CFTML ,Transmit buffer link configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 19. " CFITR ,Transmit/receive FIFO interval timer resolution" "ITRCP,ITRCP x 10"
|
|
newline
|
|
bitfld.long 0x00 18. " CFITSS ,Transmit/receive FIFO interval timer clock source select" "CFITR,Bit time clk"
|
|
bitfld.long 0x00 16.--17. " CFM ,Transmit/receive FIFO mode select" "Receive,Transmit,Gateway,?..."
|
|
bitfld.long 0x00 13.--15. " CFIGCV ,Transmit/receive FIFO receive interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
newline
|
|
bitfld.long 0x00 12. " CFIM ,Transmit/Receive FIFO interrupt source select" "0,1"
|
|
bitfld.long 0x00 8.--10. " CFDC ,Transmit/receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
bitfld.long 0x00 2. " CFTXIE ,Transmit/receive FIFO transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " CFRXIE ,Transmit/Receive FIFO receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CFE ,Transmit/receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "RSCAN0CFCC5,Transmit/receive FIFO buffer Configuration and Control Register 5"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CFITT ,Set a message transmission interval"
|
|
bitfld.long 0x00 20.--23. " CFTML ,Transmit buffer link configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 19. " CFITR ,Transmit/receive FIFO interval timer resolution" "ITRCP,ITRCP x 10"
|
|
newline
|
|
bitfld.long 0x00 18. " CFITSS ,Transmit/receive FIFO interval timer clock source select" "CFITR,Bit time clk"
|
|
bitfld.long 0x00 16.--17. " CFM ,Transmit/receive FIFO mode select" "Receive,Transmit,Gateway,?..."
|
|
bitfld.long 0x00 13.--15. " CFIGCV ,Transmit/receive FIFO receive interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
newline
|
|
bitfld.long 0x00 12. " CFIM ,Transmit/Receive FIFO interrupt source select" "0,1"
|
|
bitfld.long 0x00 8.--10. " CFDC ,Transmit/receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
bitfld.long 0x00 2. " CFTXIE ,Transmit/receive FIFO transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " CFRXIE ,Transmit/Receive FIFO receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CFE ,Transmit/receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "RSCAN0CFCC6,Transmit/receive FIFO buffer Configuration and Control Register 6"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CFITT ,Set a message transmission interval"
|
|
bitfld.long 0x00 20.--23. " CFTML ,Transmit buffer link configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 19. " CFITR ,Transmit/receive FIFO interval timer resolution" "ITRCP,ITRCP x 10"
|
|
newline
|
|
bitfld.long 0x00 18. " CFITSS ,Transmit/receive FIFO interval timer clock source select" "CFITR,Bit time clk"
|
|
bitfld.long 0x00 16.--17. " CFM ,Transmit/receive FIFO mode select" "Receive,Transmit,Gateway,?..."
|
|
bitfld.long 0x00 13.--15. " CFIGCV ,Transmit/receive FIFO receive interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
newline
|
|
bitfld.long 0x00 12. " CFIM ,Transmit/Receive FIFO interrupt source select" "0,1"
|
|
bitfld.long 0x00 8.--10. " CFDC ,Transmit/receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
bitfld.long 0x00 2. " CFTXIE ,Transmit/receive FIFO transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " CFRXIE ,Transmit/Receive FIFO receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CFE ,Transmit/receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "RSCAN0CFCC7,Transmit/receive FIFO buffer Configuration and Control Register 7"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CFITT ,Set a message transmission interval"
|
|
bitfld.long 0x00 20.--23. " CFTML ,Transmit buffer link configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 19. " CFITR ,Transmit/receive FIFO interval timer resolution" "ITRCP,ITRCP x 10"
|
|
newline
|
|
bitfld.long 0x00 18. " CFITSS ,Transmit/receive FIFO interval timer clock source select" "CFITR,Bit time clk"
|
|
bitfld.long 0x00 16.--17. " CFM ,Transmit/receive FIFO mode select" "Receive,Transmit,Gateway,?..."
|
|
bitfld.long 0x00 13.--15. " CFIGCV ,Transmit/receive FIFO receive interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
newline
|
|
bitfld.long 0x00 12. " CFIM ,Transmit/Receive FIFO interrupt source select" "0,1"
|
|
bitfld.long 0x00 8.--10. " CFDC ,Transmit/receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
bitfld.long 0x00 2. " CFTXIE ,Transmit/receive FIFO transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " CFRXIE ,Transmit/Receive FIFO receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CFE ,Transmit/receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "RSCAN0CFCC8,Transmit/receive FIFO buffer Configuration and Control Register 8"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CFITT ,Set a message transmission interval"
|
|
bitfld.long 0x00 20.--23. " CFTML ,Transmit buffer link configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 19. " CFITR ,Transmit/receive FIFO interval timer resolution" "ITRCP,ITRCP x 10"
|
|
newline
|
|
bitfld.long 0x00 18. " CFITSS ,Transmit/receive FIFO interval timer clock source select" "CFITR,Bit time clk"
|
|
bitfld.long 0x00 16.--17. " CFM ,Transmit/receive FIFO mode select" "Receive,Transmit,Gateway,?..."
|
|
bitfld.long 0x00 13.--15. " CFIGCV ,Transmit/receive FIFO receive interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
newline
|
|
bitfld.long 0x00 12. " CFIM ,Transmit/Receive FIFO interrupt source select" "0,1"
|
|
bitfld.long 0x00 8.--10. " CFDC ,Transmit/receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
bitfld.long 0x00 2. " CFTXIE ,Transmit/receive FIFO transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " CFRXIE ,Transmit/Receive FIFO receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CFE ,Transmit/receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "RSCAN0CFCC9,Transmit/receive FIFO buffer Configuration and Control Register 9"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CFITT ,Set a message transmission interval"
|
|
bitfld.long 0x00 20.--23. " CFTML ,Transmit buffer link configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 19. " CFITR ,Transmit/receive FIFO interval timer resolution" "ITRCP,ITRCP x 10"
|
|
newline
|
|
bitfld.long 0x00 18. " CFITSS ,Transmit/receive FIFO interval timer clock source select" "CFITR,Bit time clk"
|
|
bitfld.long 0x00 16.--17. " CFM ,Transmit/receive FIFO mode select" "Receive,Transmit,Gateway,?..."
|
|
bitfld.long 0x00 13.--15. " CFIGCV ,Transmit/receive FIFO receive interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
newline
|
|
bitfld.long 0x00 12. " CFIM ,Transmit/Receive FIFO interrupt source select" "0,1"
|
|
bitfld.long 0x00 8.--10. " CFDC ,Transmit/receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
bitfld.long 0x00 2. " CFTXIE ,Transmit/receive FIFO transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " CFRXIE ,Transmit/Receive FIFO receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CFE ,Transmit/receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "RSCAN0CFCC10,Transmit/receive FIFO buffer Configuration and Control Register 10"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CFITT ,Set a message transmission interval"
|
|
bitfld.long 0x00 20.--23. " CFTML ,Transmit buffer link configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 19. " CFITR ,Transmit/receive FIFO interval timer resolution" "ITRCP,ITRCP x 10"
|
|
newline
|
|
bitfld.long 0x00 18. " CFITSS ,Transmit/receive FIFO interval timer clock source select" "CFITR,Bit time clk"
|
|
bitfld.long 0x00 16.--17. " CFM ,Transmit/receive FIFO mode select" "Receive,Transmit,Gateway,?..."
|
|
bitfld.long 0x00 13.--15. " CFIGCV ,Transmit/receive FIFO receive interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
newline
|
|
bitfld.long 0x00 12. " CFIM ,Transmit/Receive FIFO interrupt source select" "0,1"
|
|
bitfld.long 0x00 8.--10. " CFDC ,Transmit/receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
bitfld.long 0x00 2. " CFTXIE ,Transmit/receive FIFO transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " CFRXIE ,Transmit/Receive FIFO receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CFE ,Transmit/receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "RSCAN0CFCC11,Transmit/receive FIFO buffer Configuration and Control Register 11"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CFITT ,Set a message transmission interval"
|
|
bitfld.long 0x00 20.--23. " CFTML ,Transmit buffer link configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 19. " CFITR ,Transmit/receive FIFO interval timer resolution" "ITRCP,ITRCP x 10"
|
|
newline
|
|
bitfld.long 0x00 18. " CFITSS ,Transmit/receive FIFO interval timer clock source select" "CFITR,Bit time clk"
|
|
bitfld.long 0x00 16.--17. " CFM ,Transmit/receive FIFO mode select" "Receive,Transmit,Gateway,?..."
|
|
bitfld.long 0x00 13.--15. " CFIGCV ,Transmit/receive FIFO receive interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
newline
|
|
bitfld.long 0x00 12. " CFIM ,Transmit/Receive FIFO interrupt source select" "0,1"
|
|
bitfld.long 0x00 8.--10. " CFDC ,Transmit/receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
bitfld.long 0x00 2. " CFTXIE ,Transmit/receive FIFO transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " CFRXIE ,Transmit/Receive FIFO receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CFE ,Transmit/receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "RSCAN0CFCC12,Transmit/receive FIFO buffer Configuration and Control Register 12"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CFITT ,Set a message transmission interval"
|
|
bitfld.long 0x00 20.--23. " CFTML ,Transmit buffer link configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 19. " CFITR ,Transmit/receive FIFO interval timer resolution" "ITRCP,ITRCP x 10"
|
|
newline
|
|
bitfld.long 0x00 18. " CFITSS ,Transmit/receive FIFO interval timer clock source select" "CFITR,Bit time clk"
|
|
bitfld.long 0x00 16.--17. " CFM ,Transmit/receive FIFO mode select" "Receive,Transmit,Gateway,?..."
|
|
bitfld.long 0x00 13.--15. " CFIGCV ,Transmit/receive FIFO receive interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
newline
|
|
bitfld.long 0x00 12. " CFIM ,Transmit/Receive FIFO interrupt source select" "0,1"
|
|
bitfld.long 0x00 8.--10. " CFDC ,Transmit/receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
bitfld.long 0x00 2. " CFTXIE ,Transmit/receive FIFO transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " CFRXIE ,Transmit/Receive FIFO receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CFE ,Transmit/receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "RSCAN0CFCC13,Transmit/receive FIFO buffer Configuration and Control Register 13"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CFITT ,Set a message transmission interval"
|
|
bitfld.long 0x00 20.--23. " CFTML ,Transmit buffer link configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 19. " CFITR ,Transmit/receive FIFO interval timer resolution" "ITRCP,ITRCP x 10"
|
|
newline
|
|
bitfld.long 0x00 18. " CFITSS ,Transmit/receive FIFO interval timer clock source select" "CFITR,Bit time clk"
|
|
bitfld.long 0x00 16.--17. " CFM ,Transmit/receive FIFO mode select" "Receive,Transmit,Gateway,?..."
|
|
bitfld.long 0x00 13.--15. " CFIGCV ,Transmit/receive FIFO receive interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
newline
|
|
bitfld.long 0x00 12. " CFIM ,Transmit/Receive FIFO interrupt source select" "0,1"
|
|
bitfld.long 0x00 8.--10. " CFDC ,Transmit/receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
bitfld.long 0x00 2. " CFTXIE ,Transmit/receive FIFO transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " CFRXIE ,Transmit/Receive FIFO receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CFE ,Transmit/receive FIFO buffer enable" "Disabled,Enabled"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "RSCAN0CFCC14,Transmit/receive FIFO buffer Configuration and Control Register 14"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CFITT ,Set a message transmission interval"
|
|
bitfld.long 0x00 20.--23. " CFTML ,Transmit buffer link configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 19. " CFITR ,Transmit/receive FIFO interval timer resolution" "ITRCP,ITRCP x 10"
|
|
newline
|
|
bitfld.long 0x00 18. " CFITSS ,Transmit/receive FIFO interval timer clock source select" "CFITR,Bit time clk"
|
|
bitfld.long 0x00 16.--17. " CFM ,Transmit/receive FIFO mode select" "Receive,Transmit,Gateway,?..."
|
|
bitfld.long 0x00 13.--15. " CFIGCV ,Transmit/receive FIFO receive interrupt request timing select" "1/8 full,2/8 full,3/8 full,4/8 full,5/8 full,6/8 full,7/8 full,Full"
|
|
newline
|
|
bitfld.long 0x00 12. " CFIM ,Transmit/Receive FIFO interrupt source select" "0,1"
|
|
bitfld.long 0x00 8.--10. " CFDC ,Transmit/receive FIFO buffer depth configuration" "0,4,8,16,32,48,64,128"
|
|
bitfld.long 0x00 2. " CFTXIE ,Transmit/receive FIFO transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " CFRXIE ,Transmit/Receive FIFO receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CFE ,Transmit/receive FIFO buffer enable" "Disabled,Enabled"
|
|
newline
|
|
group.long 0x178++0x03
|
|
line.long 0x00 "RSCAN0CFSTS0,Transmit/Receive FIFObuffer Status Register 0"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CFMC ,Transmit/receive FIFO message counter"
|
|
bitfld.long 0x00 4. " CFTXIF ,Transmit/receive FIFO transmit interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CFRXIF ,Transmit/receive FIFO receive interrupt request flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 2. " CFMLT ,Transmit/receive FIFO message lost flag" "Not lost,Lost"
|
|
rbitfld.long 0x00 1. " CFFLL ,Transmit/receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " CFEMP ,Transmit/receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0x17C++0x03
|
|
line.long 0x00 "RSCAN0CFSTS1,Transmit/Receive FIFObuffer Status Register 1"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CFMC ,Transmit/receive FIFO message counter"
|
|
bitfld.long 0x00 4. " CFTXIF ,Transmit/receive FIFO transmit interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CFRXIF ,Transmit/receive FIFO receive interrupt request flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 2. " CFMLT ,Transmit/receive FIFO message lost flag" "Not lost,Lost"
|
|
rbitfld.long 0x00 1. " CFFLL ,Transmit/receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " CFEMP ,Transmit/receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "RSCAN0CFSTS2,Transmit/Receive FIFObuffer Status Register 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CFMC ,Transmit/receive FIFO message counter"
|
|
bitfld.long 0x00 4. " CFTXIF ,Transmit/receive FIFO transmit interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CFRXIF ,Transmit/receive FIFO receive interrupt request flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 2. " CFMLT ,Transmit/receive FIFO message lost flag" "Not lost,Lost"
|
|
rbitfld.long 0x00 1. " CFFLL ,Transmit/receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " CFEMP ,Transmit/receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "RSCAN0CFSTS3,Transmit/Receive FIFObuffer Status Register 3"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CFMC ,Transmit/receive FIFO message counter"
|
|
bitfld.long 0x00 4. " CFTXIF ,Transmit/receive FIFO transmit interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CFRXIF ,Transmit/receive FIFO receive interrupt request flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 2. " CFMLT ,Transmit/receive FIFO message lost flag" "Not lost,Lost"
|
|
rbitfld.long 0x00 1. " CFFLL ,Transmit/receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " CFEMP ,Transmit/receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "RSCAN0CFSTS4,Transmit/Receive FIFObuffer Status Register 4"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CFMC ,Transmit/receive FIFO message counter"
|
|
bitfld.long 0x00 4. " CFTXIF ,Transmit/receive FIFO transmit interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CFRXIF ,Transmit/receive FIFO receive interrupt request flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 2. " CFMLT ,Transmit/receive FIFO message lost flag" "Not lost,Lost"
|
|
rbitfld.long 0x00 1. " CFFLL ,Transmit/receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " CFEMP ,Transmit/receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0x18C++0x03
|
|
line.long 0x00 "RSCAN0CFSTS5,Transmit/Receive FIFObuffer Status Register 5"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CFMC ,Transmit/receive FIFO message counter"
|
|
bitfld.long 0x00 4. " CFTXIF ,Transmit/receive FIFO transmit interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CFRXIF ,Transmit/receive FIFO receive interrupt request flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 2. " CFMLT ,Transmit/receive FIFO message lost flag" "Not lost,Lost"
|
|
rbitfld.long 0x00 1. " CFFLL ,Transmit/receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " CFEMP ,Transmit/receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "RSCAN0CFSTS6,Transmit/Receive FIFObuffer Status Register 6"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CFMC ,Transmit/receive FIFO message counter"
|
|
bitfld.long 0x00 4. " CFTXIF ,Transmit/receive FIFO transmit interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CFRXIF ,Transmit/receive FIFO receive interrupt request flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 2. " CFMLT ,Transmit/receive FIFO message lost flag" "Not lost,Lost"
|
|
rbitfld.long 0x00 1. " CFFLL ,Transmit/receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " CFEMP ,Transmit/receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0x194++0x03
|
|
line.long 0x00 "RSCAN0CFSTS7,Transmit/Receive FIFObuffer Status Register 7"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CFMC ,Transmit/receive FIFO message counter"
|
|
bitfld.long 0x00 4. " CFTXIF ,Transmit/receive FIFO transmit interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CFRXIF ,Transmit/receive FIFO receive interrupt request flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 2. " CFMLT ,Transmit/receive FIFO message lost flag" "Not lost,Lost"
|
|
rbitfld.long 0x00 1. " CFFLL ,Transmit/receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " CFEMP ,Transmit/receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0x198++0x03
|
|
line.long 0x00 "RSCAN0CFSTS8,Transmit/Receive FIFObuffer Status Register 8"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CFMC ,Transmit/receive FIFO message counter"
|
|
bitfld.long 0x00 4. " CFTXIF ,Transmit/receive FIFO transmit interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CFRXIF ,Transmit/receive FIFO receive interrupt request flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 2. " CFMLT ,Transmit/receive FIFO message lost flag" "Not lost,Lost"
|
|
rbitfld.long 0x00 1. " CFFLL ,Transmit/receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " CFEMP ,Transmit/receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0x19C++0x03
|
|
line.long 0x00 "RSCAN0CFSTS9,Transmit/Receive FIFObuffer Status Register 9"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CFMC ,Transmit/receive FIFO message counter"
|
|
bitfld.long 0x00 4. " CFTXIF ,Transmit/receive FIFO transmit interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CFRXIF ,Transmit/receive FIFO receive interrupt request flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 2. " CFMLT ,Transmit/receive FIFO message lost flag" "Not lost,Lost"
|
|
rbitfld.long 0x00 1. " CFFLL ,Transmit/receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " CFEMP ,Transmit/receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "RSCAN0CFSTS10,Transmit/Receive FIFObuffer Status Register 10"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CFMC ,Transmit/receive FIFO message counter"
|
|
bitfld.long 0x00 4. " CFTXIF ,Transmit/receive FIFO transmit interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CFRXIF ,Transmit/receive FIFO receive interrupt request flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 2. " CFMLT ,Transmit/receive FIFO message lost flag" "Not lost,Lost"
|
|
rbitfld.long 0x00 1. " CFFLL ,Transmit/receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " CFEMP ,Transmit/receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0x1A4++0x03
|
|
line.long 0x00 "RSCAN0CFSTS11,Transmit/Receive FIFObuffer Status Register 11"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CFMC ,Transmit/receive FIFO message counter"
|
|
bitfld.long 0x00 4. " CFTXIF ,Transmit/receive FIFO transmit interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CFRXIF ,Transmit/receive FIFO receive interrupt request flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 2. " CFMLT ,Transmit/receive FIFO message lost flag" "Not lost,Lost"
|
|
rbitfld.long 0x00 1. " CFFLL ,Transmit/receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " CFEMP ,Transmit/receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0x1A8++0x03
|
|
line.long 0x00 "RSCAN0CFSTS12,Transmit/Receive FIFObuffer Status Register 12"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CFMC ,Transmit/receive FIFO message counter"
|
|
bitfld.long 0x00 4. " CFTXIF ,Transmit/receive FIFO transmit interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CFRXIF ,Transmit/receive FIFO receive interrupt request flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 2. " CFMLT ,Transmit/receive FIFO message lost flag" "Not lost,Lost"
|
|
rbitfld.long 0x00 1. " CFFLL ,Transmit/receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " CFEMP ,Transmit/receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0x1AC++0x03
|
|
line.long 0x00 "RSCAN0CFSTS13,Transmit/Receive FIFObuffer Status Register 13"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CFMC ,Transmit/receive FIFO message counter"
|
|
bitfld.long 0x00 4. " CFTXIF ,Transmit/receive FIFO transmit interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CFRXIF ,Transmit/receive FIFO receive interrupt request flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 2. " CFMLT ,Transmit/receive FIFO message lost flag" "Not lost,Lost"
|
|
rbitfld.long 0x00 1. " CFFLL ,Transmit/receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " CFEMP ,Transmit/receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
group.long 0x1B0++0x03
|
|
line.long 0x00 "RSCAN0CFSTS14,Transmit/Receive FIFObuffer Status Register 14"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CFMC ,Transmit/receive FIFO message counter"
|
|
bitfld.long 0x00 4. " CFTXIF ,Transmit/receive FIFO transmit interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CFRXIF ,Transmit/receive FIFO receive interrupt request flag" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 2. " CFMLT ,Transmit/receive FIFO message lost flag" "Not lost,Lost"
|
|
rbitfld.long 0x00 1. " CFFLL ,Transmit/receive FIFO buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " CFEMP ,Transmit/receive FIFO buffer empty status flag" "Not empty,Empty"
|
|
wgroup.long 0x1D8++0x03
|
|
line.long 0x00 "RSCAN0CFPCTR0,Transmit/Receive FIFO Buffer Pointer Control Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CFPC ,Transmit/receive FIFO pointer control"
|
|
wgroup.long 0x1DC++0x03
|
|
line.long 0x00 "RSCAN0CFPCTR1,Transmit/Receive FIFO Buffer Pointer Control Register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CFPC ,Transmit/receive FIFO pointer control"
|
|
wgroup.long 0x1E0++0x03
|
|
line.long 0x00 "RSCAN0CFPCTR2,Transmit/Receive FIFO Buffer Pointer Control Register 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CFPC ,Transmit/receive FIFO pointer control"
|
|
wgroup.long 0x1E4++0x03
|
|
line.long 0x00 "RSCAN0CFPCTR3,Transmit/Receive FIFO Buffer Pointer Control Register 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CFPC ,Transmit/receive FIFO pointer control"
|
|
wgroup.long 0x1E8++0x03
|
|
line.long 0x00 "RSCAN0CFPCTR4,Transmit/Receive FIFO Buffer Pointer Control Register 4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CFPC ,Transmit/receive FIFO pointer control"
|
|
wgroup.long 0x1EC++0x03
|
|
line.long 0x00 "RSCAN0CFPCTR5,Transmit/Receive FIFO Buffer Pointer Control Register 5"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CFPC ,Transmit/receive FIFO pointer control"
|
|
wgroup.long 0x1F0++0x03
|
|
line.long 0x00 "RSCAN0CFPCTR6,Transmit/Receive FIFO Buffer Pointer Control Register 6"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CFPC ,Transmit/receive FIFO pointer control"
|
|
wgroup.long 0x1F4++0x03
|
|
line.long 0x00 "RSCAN0CFPCTR7,Transmit/Receive FIFO Buffer Pointer Control Register 7"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CFPC ,Transmit/receive FIFO pointer control"
|
|
wgroup.long 0x1F8++0x03
|
|
line.long 0x00 "RSCAN0CFPCTR8,Transmit/Receive FIFO Buffer Pointer Control Register 8"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CFPC ,Transmit/receive FIFO pointer control"
|
|
wgroup.long 0x1FC++0x03
|
|
line.long 0x00 "RSCAN0CFPCTR9,Transmit/Receive FIFO Buffer Pointer Control Register 9"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CFPC ,Transmit/receive FIFO pointer control"
|
|
wgroup.long 0x200++0x03
|
|
line.long 0x00 "RSCAN0CFPCTR10,Transmit/Receive FIFO Buffer Pointer Control Register 10"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CFPC ,Transmit/receive FIFO pointer control"
|
|
wgroup.long 0x204++0x03
|
|
line.long 0x00 "RSCAN0CFPCTR11,Transmit/Receive FIFO Buffer Pointer Control Register 11"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CFPC ,Transmit/receive FIFO pointer control"
|
|
wgroup.long 0x208++0x03
|
|
line.long 0x00 "RSCAN0CFPCTR12,Transmit/Receive FIFO Buffer Pointer Control Register 12"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CFPC ,Transmit/receive FIFO pointer control"
|
|
wgroup.long 0x20C++0x03
|
|
line.long 0x00 "RSCAN0CFPCTR13,Transmit/Receive FIFO Buffer Pointer Control Register 13"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CFPC ,Transmit/receive FIFO pointer control"
|
|
wgroup.long 0x210++0x03
|
|
line.long 0x00 "RSCAN0CFPCTR14,Transmit/Receive FIFO Buffer Pointer Control Register 14"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CFPC ,Transmit/receive FIFO pointer control"
|
|
newline
|
|
if (((per.l(ad:0xE803A000+0xE80))&0x80000000)==0x80000000)
|
|
group.long 0xE80++0x03
|
|
line.long 0x00 "RSCAN0CFID0,Transmit/Receive FIFO Buffer Access ID Register 0"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
else
|
|
group.long 0xE80++0x03
|
|
line.long 0x00 "RSCAN0CFID0,Transmit/Receive FIFO Buffer Access ID Register 0"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
endif
|
|
group.long (0xE80+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0CFPTR0,Transmit/Receive FIFO Buffer Access Pointer Register 0"
|
|
bitfld.long 0x00 28.--31. " CFDLC ,Transmit/receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " CFPTR ,Transmit/receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " CFTS ,Transmit/receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0CFDF00,Transmit/Receive FIFO Buffer Access Data Field 0 Register 0"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CFDB3 ,Transmit/receive FIFO buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CFDB2 ,Transmit/receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " CFDB1 ,Transmit/receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " CFDB0 ,Transmit/receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0CFDF10,Transmit/Receive FIFO Buffer Access Data Field 1 Register 0"
|
|
hexmask.long.byte 0x08 24.--31. 1. " CFDB7 ,Transmit/receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " CFDB6 ,Transmit/receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " CFDB5 ,Transmit/receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " CFDB4 ,Transmit/receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xE90))&0x80000000)==0x80000000)
|
|
group.long 0xE90++0x03
|
|
line.long 0x00 "RSCAN0CFID1,Transmit/Receive FIFO Buffer Access ID Register 1"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
else
|
|
group.long 0xE90++0x03
|
|
line.long 0x00 "RSCAN0CFID1,Transmit/Receive FIFO Buffer Access ID Register 1"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
endif
|
|
group.long (0xE90+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0CFPTR1,Transmit/Receive FIFO Buffer Access Pointer Register 1"
|
|
bitfld.long 0x00 28.--31. " CFDLC ,Transmit/receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " CFPTR ,Transmit/receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " CFTS ,Transmit/receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0CFDF01,Transmit/Receive FIFO Buffer Access Data Field 0 Register 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CFDB3 ,Transmit/receive FIFO buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CFDB2 ,Transmit/receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " CFDB1 ,Transmit/receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " CFDB0 ,Transmit/receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0CFDF11,Transmit/Receive FIFO Buffer Access Data Field 1 Register 1"
|
|
hexmask.long.byte 0x08 24.--31. 1. " CFDB7 ,Transmit/receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " CFDB6 ,Transmit/receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " CFDB5 ,Transmit/receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " CFDB4 ,Transmit/receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xEA0))&0x80000000)==0x80000000)
|
|
group.long 0xEA0++0x03
|
|
line.long 0x00 "RSCAN0CFID2,Transmit/Receive FIFO Buffer Access ID Register 2"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
else
|
|
group.long 0xEA0++0x03
|
|
line.long 0x00 "RSCAN0CFID2,Transmit/Receive FIFO Buffer Access ID Register 2"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
endif
|
|
group.long (0xEA0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0CFPTR2,Transmit/Receive FIFO Buffer Access Pointer Register 2"
|
|
bitfld.long 0x00 28.--31. " CFDLC ,Transmit/receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " CFPTR ,Transmit/receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " CFTS ,Transmit/receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0CFDF02,Transmit/Receive FIFO Buffer Access Data Field 0 Register 2"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CFDB3 ,Transmit/receive FIFO buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CFDB2 ,Transmit/receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " CFDB1 ,Transmit/receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " CFDB0 ,Transmit/receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0CFDF12,Transmit/Receive FIFO Buffer Access Data Field 1 Register 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " CFDB7 ,Transmit/receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " CFDB6 ,Transmit/receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " CFDB5 ,Transmit/receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " CFDB4 ,Transmit/receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xEB0))&0x80000000)==0x80000000)
|
|
group.long 0xEB0++0x03
|
|
line.long 0x00 "RSCAN0CFID3,Transmit/Receive FIFO Buffer Access ID Register 3"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
else
|
|
group.long 0xEB0++0x03
|
|
line.long 0x00 "RSCAN0CFID3,Transmit/Receive FIFO Buffer Access ID Register 3"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
endif
|
|
group.long (0xEB0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0CFPTR3,Transmit/Receive FIFO Buffer Access Pointer Register 3"
|
|
bitfld.long 0x00 28.--31. " CFDLC ,Transmit/receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " CFPTR ,Transmit/receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " CFTS ,Transmit/receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0CFDF03,Transmit/Receive FIFO Buffer Access Data Field 0 Register 3"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CFDB3 ,Transmit/receive FIFO buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CFDB2 ,Transmit/receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " CFDB1 ,Transmit/receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " CFDB0 ,Transmit/receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0CFDF13,Transmit/Receive FIFO Buffer Access Data Field 1 Register 3"
|
|
hexmask.long.byte 0x08 24.--31. 1. " CFDB7 ,Transmit/receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " CFDB6 ,Transmit/receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " CFDB5 ,Transmit/receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " CFDB4 ,Transmit/receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xEC0))&0x80000000)==0x80000000)
|
|
group.long 0xEC0++0x03
|
|
line.long 0x00 "RSCAN0CFID4,Transmit/Receive FIFO Buffer Access ID Register 4"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
else
|
|
group.long 0xEC0++0x03
|
|
line.long 0x00 "RSCAN0CFID4,Transmit/Receive FIFO Buffer Access ID Register 4"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
endif
|
|
group.long (0xEC0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0CFPTR4,Transmit/Receive FIFO Buffer Access Pointer Register 4"
|
|
bitfld.long 0x00 28.--31. " CFDLC ,Transmit/receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " CFPTR ,Transmit/receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " CFTS ,Transmit/receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0CFDF04,Transmit/Receive FIFO Buffer Access Data Field 0 Register 4"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CFDB3 ,Transmit/receive FIFO buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CFDB2 ,Transmit/receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " CFDB1 ,Transmit/receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " CFDB0 ,Transmit/receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0CFDF14,Transmit/Receive FIFO Buffer Access Data Field 1 Register 4"
|
|
hexmask.long.byte 0x08 24.--31. 1. " CFDB7 ,Transmit/receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " CFDB6 ,Transmit/receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " CFDB5 ,Transmit/receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " CFDB4 ,Transmit/receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xED0))&0x80000000)==0x80000000)
|
|
group.long 0xED0++0x03
|
|
line.long 0x00 "RSCAN0CFID5,Transmit/Receive FIFO Buffer Access ID Register 5"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
else
|
|
group.long 0xED0++0x03
|
|
line.long 0x00 "RSCAN0CFID5,Transmit/Receive FIFO Buffer Access ID Register 5"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
endif
|
|
group.long (0xED0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0CFPTR5,Transmit/Receive FIFO Buffer Access Pointer Register 5"
|
|
bitfld.long 0x00 28.--31. " CFDLC ,Transmit/receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " CFPTR ,Transmit/receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " CFTS ,Transmit/receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0CFDF05,Transmit/Receive FIFO Buffer Access Data Field 0 Register 5"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CFDB3 ,Transmit/receive FIFO buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CFDB2 ,Transmit/receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " CFDB1 ,Transmit/receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " CFDB0 ,Transmit/receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0CFDF15,Transmit/Receive FIFO Buffer Access Data Field 1 Register 5"
|
|
hexmask.long.byte 0x08 24.--31. 1. " CFDB7 ,Transmit/receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " CFDB6 ,Transmit/receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " CFDB5 ,Transmit/receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " CFDB4 ,Transmit/receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xEE0))&0x80000000)==0x80000000)
|
|
group.long 0xEE0++0x03
|
|
line.long 0x00 "RSCAN0CFID6,Transmit/Receive FIFO Buffer Access ID Register 6"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
else
|
|
group.long 0xEE0++0x03
|
|
line.long 0x00 "RSCAN0CFID6,Transmit/Receive FIFO Buffer Access ID Register 6"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
endif
|
|
group.long (0xEE0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0CFPTR6,Transmit/Receive FIFO Buffer Access Pointer Register 6"
|
|
bitfld.long 0x00 28.--31. " CFDLC ,Transmit/receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " CFPTR ,Transmit/receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " CFTS ,Transmit/receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0CFDF06,Transmit/Receive FIFO Buffer Access Data Field 0 Register 6"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CFDB3 ,Transmit/receive FIFO buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CFDB2 ,Transmit/receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " CFDB1 ,Transmit/receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " CFDB0 ,Transmit/receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0CFDF16,Transmit/Receive FIFO Buffer Access Data Field 1 Register 6"
|
|
hexmask.long.byte 0x08 24.--31. 1. " CFDB7 ,Transmit/receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " CFDB6 ,Transmit/receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " CFDB5 ,Transmit/receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " CFDB4 ,Transmit/receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xEF0))&0x80000000)==0x80000000)
|
|
group.long 0xEF0++0x03
|
|
line.long 0x00 "RSCAN0CFID7,Transmit/Receive FIFO Buffer Access ID Register 7"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
else
|
|
group.long 0xEF0++0x03
|
|
line.long 0x00 "RSCAN0CFID7,Transmit/Receive FIFO Buffer Access ID Register 7"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
endif
|
|
group.long (0xEF0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0CFPTR7,Transmit/Receive FIFO Buffer Access Pointer Register 7"
|
|
bitfld.long 0x00 28.--31. " CFDLC ,Transmit/receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " CFPTR ,Transmit/receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " CFTS ,Transmit/receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0CFDF07,Transmit/Receive FIFO Buffer Access Data Field 0 Register 7"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CFDB3 ,Transmit/receive FIFO buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CFDB2 ,Transmit/receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " CFDB1 ,Transmit/receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " CFDB0 ,Transmit/receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0CFDF17,Transmit/Receive FIFO Buffer Access Data Field 1 Register 7"
|
|
hexmask.long.byte 0x08 24.--31. 1. " CFDB7 ,Transmit/receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " CFDB6 ,Transmit/receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " CFDB5 ,Transmit/receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " CFDB4 ,Transmit/receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xF00))&0x80000000)==0x80000000)
|
|
group.long 0xF00++0x03
|
|
line.long 0x00 "RSCAN0CFID8,Transmit/Receive FIFO Buffer Access ID Register 8"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
else
|
|
group.long 0xF00++0x03
|
|
line.long 0x00 "RSCAN0CFID8,Transmit/Receive FIFO Buffer Access ID Register 8"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
endif
|
|
group.long (0xF00+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0CFPTR8,Transmit/Receive FIFO Buffer Access Pointer Register 8"
|
|
bitfld.long 0x00 28.--31. " CFDLC ,Transmit/receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " CFPTR ,Transmit/receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " CFTS ,Transmit/receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0CFDF08,Transmit/Receive FIFO Buffer Access Data Field 0 Register 8"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CFDB3 ,Transmit/receive FIFO buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CFDB2 ,Transmit/receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " CFDB1 ,Transmit/receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " CFDB0 ,Transmit/receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0CFDF18,Transmit/Receive FIFO Buffer Access Data Field 1 Register 8"
|
|
hexmask.long.byte 0x08 24.--31. 1. " CFDB7 ,Transmit/receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " CFDB6 ,Transmit/receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " CFDB5 ,Transmit/receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " CFDB4 ,Transmit/receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xF10))&0x80000000)==0x80000000)
|
|
group.long 0xF10++0x03
|
|
line.long 0x00 "RSCAN0CFID9,Transmit/Receive FIFO Buffer Access ID Register 9"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
else
|
|
group.long 0xF10++0x03
|
|
line.long 0x00 "RSCAN0CFID9,Transmit/Receive FIFO Buffer Access ID Register 9"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
endif
|
|
group.long (0xF10+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0CFPTR9,Transmit/Receive FIFO Buffer Access Pointer Register 9"
|
|
bitfld.long 0x00 28.--31. " CFDLC ,Transmit/receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " CFPTR ,Transmit/receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " CFTS ,Transmit/receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0CFDF09,Transmit/Receive FIFO Buffer Access Data Field 0 Register 9"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CFDB3 ,Transmit/receive FIFO buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CFDB2 ,Transmit/receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " CFDB1 ,Transmit/receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " CFDB0 ,Transmit/receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0CFDF19,Transmit/Receive FIFO Buffer Access Data Field 1 Register 9"
|
|
hexmask.long.byte 0x08 24.--31. 1. " CFDB7 ,Transmit/receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " CFDB6 ,Transmit/receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " CFDB5 ,Transmit/receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " CFDB4 ,Transmit/receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xF20))&0x80000000)==0x80000000)
|
|
group.long 0xF20++0x03
|
|
line.long 0x00 "RSCAN0CFID10,Transmit/Receive FIFO Buffer Access ID Register 10"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
else
|
|
group.long 0xF20++0x03
|
|
line.long 0x00 "RSCAN0CFID10,Transmit/Receive FIFO Buffer Access ID Register 10"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
endif
|
|
group.long (0xF20+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0CFPTR10,Transmit/Receive FIFO Buffer Access Pointer Register 10"
|
|
bitfld.long 0x00 28.--31. " CFDLC ,Transmit/receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " CFPTR ,Transmit/receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " CFTS ,Transmit/receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0CFDF010,Transmit/Receive FIFO Buffer Access Data Field 0 Register 10"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CFDB3 ,Transmit/receive FIFO buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CFDB2 ,Transmit/receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " CFDB1 ,Transmit/receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " CFDB0 ,Transmit/receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0CFDF110,Transmit/Receive FIFO Buffer Access Data Field 1 Register 10"
|
|
hexmask.long.byte 0x08 24.--31. 1. " CFDB7 ,Transmit/receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " CFDB6 ,Transmit/receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " CFDB5 ,Transmit/receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " CFDB4 ,Transmit/receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xF30))&0x80000000)==0x80000000)
|
|
group.long 0xF30++0x03
|
|
line.long 0x00 "RSCAN0CFID11,Transmit/Receive FIFO Buffer Access ID Register 11"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
else
|
|
group.long 0xF30++0x03
|
|
line.long 0x00 "RSCAN0CFID11,Transmit/Receive FIFO Buffer Access ID Register 11"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
endif
|
|
group.long (0xF30+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0CFPTR11,Transmit/Receive FIFO Buffer Access Pointer Register 11"
|
|
bitfld.long 0x00 28.--31. " CFDLC ,Transmit/receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " CFPTR ,Transmit/receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " CFTS ,Transmit/receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0CFDF011,Transmit/Receive FIFO Buffer Access Data Field 0 Register 11"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CFDB3 ,Transmit/receive FIFO buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CFDB2 ,Transmit/receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " CFDB1 ,Transmit/receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " CFDB0 ,Transmit/receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0CFDF111,Transmit/Receive FIFO Buffer Access Data Field 1 Register 11"
|
|
hexmask.long.byte 0x08 24.--31. 1. " CFDB7 ,Transmit/receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " CFDB6 ,Transmit/receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " CFDB5 ,Transmit/receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " CFDB4 ,Transmit/receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xF40))&0x80000000)==0x80000000)
|
|
group.long 0xF40++0x03
|
|
line.long 0x00 "RSCAN0CFID12,Transmit/Receive FIFO Buffer Access ID Register 12"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
else
|
|
group.long 0xF40++0x03
|
|
line.long 0x00 "RSCAN0CFID12,Transmit/Receive FIFO Buffer Access ID Register 12"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
endif
|
|
group.long (0xF40+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0CFPTR12,Transmit/Receive FIFO Buffer Access Pointer Register 12"
|
|
bitfld.long 0x00 28.--31. " CFDLC ,Transmit/receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " CFPTR ,Transmit/receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " CFTS ,Transmit/receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0CFDF012,Transmit/Receive FIFO Buffer Access Data Field 0 Register 12"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CFDB3 ,Transmit/receive FIFO buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CFDB2 ,Transmit/receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " CFDB1 ,Transmit/receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " CFDB0 ,Transmit/receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0CFDF112,Transmit/Receive FIFO Buffer Access Data Field 1 Register 12"
|
|
hexmask.long.byte 0x08 24.--31. 1. " CFDB7 ,Transmit/receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " CFDB6 ,Transmit/receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " CFDB5 ,Transmit/receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " CFDB4 ,Transmit/receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xF50))&0x80000000)==0x80000000)
|
|
group.long 0xF50++0x03
|
|
line.long 0x00 "RSCAN0CFID13,Transmit/Receive FIFO Buffer Access ID Register 13"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
else
|
|
group.long 0xF50++0x03
|
|
line.long 0x00 "RSCAN0CFID13,Transmit/Receive FIFO Buffer Access ID Register 13"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
endif
|
|
group.long (0xF50+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0CFPTR13,Transmit/Receive FIFO Buffer Access Pointer Register 13"
|
|
bitfld.long 0x00 28.--31. " CFDLC ,Transmit/receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " CFPTR ,Transmit/receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " CFTS ,Transmit/receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0CFDF013,Transmit/Receive FIFO Buffer Access Data Field 0 Register 13"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CFDB3 ,Transmit/receive FIFO buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CFDB2 ,Transmit/receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " CFDB1 ,Transmit/receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " CFDB0 ,Transmit/receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0CFDF113,Transmit/Receive FIFO Buffer Access Data Field 1 Register 13"
|
|
hexmask.long.byte 0x08 24.--31. 1. " CFDB7 ,Transmit/receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " CFDB6 ,Transmit/receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " CFDB5 ,Transmit/receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " CFDB4 ,Transmit/receive FIFO buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0xF60))&0x80000000)==0x80000000)
|
|
group.long 0xF60++0x03
|
|
line.long 0x00 "RSCAN0CFID14,Transmit/Receive FIFO Buffer Access ID Register 14"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
else
|
|
group.long 0xF60++0x03
|
|
line.long 0x00 "RSCAN0CFID14,Transmit/Receive FIFO Buffer Access ID Register 14"
|
|
bitfld.long 0x00 31. " CFIDE ,Transmit/receive FIFO buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " CFRTR ,Transmit/receive FIFO buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " CFID ,Transmit/receive FIFO buffer ID data"
|
|
endif
|
|
group.long (0xF60+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0CFPTR14,Transmit/Receive FIFO Buffer Access Pointer Register 14"
|
|
bitfld.long 0x00 28.--31. " CFDLC ,Transmit/receive FIFO buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.word 0x00 16.--27. 1. " CFPTR ,Transmit/receive FIFO buffer label data"
|
|
hexmask.long.word 0x00 0.--15. 1. " CFTS ,Transmit/receive FIFO buffer timestamp data"
|
|
line.long 0x04 "RSCAN0CFDF014,Transmit/Receive FIFO Buffer Access Data Field 0 Register 14"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CFDB3 ,Transmit/receive FIFO buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CFDB2 ,Transmit/receive FIFO buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " CFDB1 ,Transmit/receive FIFO buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " CFDB0 ,Transmit/receive FIFO buffer data byte 0"
|
|
line.long 0x08 "RSCAN0CFDF114,Transmit/Receive FIFO Buffer Access Data Field 1 Register 14"
|
|
hexmask.long.byte 0x08 24.--31. 1. " CFDB7 ,Transmit/receive FIFO buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " CFDB6 ,Transmit/receive FIFO buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " CFDB5 ,Transmit/receive FIFO buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " CFDB4 ,Transmit/receive FIFO buffer data byte 4"
|
|
newline
|
|
rgroup.long 0x238++0x17
|
|
line.long 0x00 "RSCAN0FESTS,FIFO Empty Status Register"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x00 22. " CF14EMP ,Transmit/receive FIFO buffer empty status flag 14" "Not empty,Empty"
|
|
bitfld.long 0x00 21. " CF13EMP ,Transmit/receive FIFO buffer empty status flag 13" "Not empty,Empty"
|
|
bitfld.long 0x00 20. " CF12EMP ,Transmit/receive FIFO buffer empty status flag 12" "Not empty,Empty"
|
|
newline
|
|
bitfld.long 0x00 19. " CF11EMP ,Transmit/receive FIFO buffer empty status flag 11" "Not empty,Empty"
|
|
bitfld.long 0x00 18. " CF10EMP ,Transmit/receive FIFO buffer empty status flag 10" "Not empty,Empty"
|
|
bitfld.long 0x00 17. " CF9EMP ,Transmit/receive FIFO buffer empty status flag 9" "Not empty,Empty"
|
|
newline
|
|
bitfld.long 0x00 16. " CF8EMP ,Transmit/receive FIFO buffer empty status flag 8" "Not empty,Empty"
|
|
bitfld.long 0x00 15. " CF7EMP ,Transmit/receive FIFO buffer empty status flag 7" "Not empty,Empty"
|
|
bitfld.long 0x00 14. " CF6EMP ,Transmit/receive FIFO buffer empty status flag 6" "Not empty,Empty"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 13. " CF5EMP ,Transmit/receive FIFO buffer empty status flag 5" "Not empty,Empty"
|
|
bitfld.long 0x00 12. " CF4EMP ,Transmit/receive FIFO buffer empty status flag 4" "Not empty,Empty"
|
|
bitfld.long 0x00 11. " CF3EMP ,Transmit/receive FIFO buffer empty status flag 3" "Not empty,Empty"
|
|
newline
|
|
bitfld.long 0x00 10. " CF2EMP ,Transmit/receive FIFO buffer empty status flag 2" "Not empty,Empty"
|
|
bitfld.long 0x00 9. " CF1EMP ,Transmit/receive FIFO buffer empty status flag 1" "Not empty,Empty"
|
|
bitfld.long 0x00 8. " CF0EMP ,Transmit/receive FIFO buffer empty status flag 0" "Not empty,Empty"
|
|
newline
|
|
bitfld.long 0x00 7. " RF7EMP ,Receive FIFO Buffer Empty Status Flag 7" "Not empty,Empty"
|
|
bitfld.long 0x00 6. " RF6EMP ,Receive FIFO Buffer Empty Status Flag 6" "Not empty,Empty"
|
|
bitfld.long 0x00 5. " RF5EMP ,Receive FIFO Buffer Empty Status Flag 5" "Not empty,Empty"
|
|
newline
|
|
bitfld.long 0x00 4. " RF4EMP ,Receive FIFO Buffer Empty Status Flag 4" "Not empty,Empty"
|
|
bitfld.long 0x00 3. " RF3EMP ,Receive FIFO Buffer Empty Status Flag 3" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " RF2EMP ,Receive FIFO Buffer Empty Status Flag 2" "Not empty,Empty"
|
|
newline
|
|
bitfld.long 0x00 1. " RF1EMP ,Receive FIFO Buffer Empty Status Flag 1" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " RF0EMP ,Receive FIFO Buffer Empty Status Flag 0" "Not empty,Empty"
|
|
line.long 0x04 "RSCAN0FFSTS,FIFO Full Status Register"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x04 22. " CF14FLL ,Transmit/receive FIFO buffer full status flag 14" "Not full,Full"
|
|
bitfld.long 0x04 21. " CF13FLL ,Transmit/receive FIFO buffer full status flag 13" "Not full,Full"
|
|
bitfld.long 0x04 20. " CF12FLL ,Transmit/receive FIFO buffer full status flag 12" "Not full,Full"
|
|
newline
|
|
bitfld.long 0x04 19. " CF11FLL ,Transmit/receive FIFO buffer full status flag 11" "Not full,Full"
|
|
bitfld.long 0x04 18. " CF10FLL ,Transmit/receive FIFO buffer full status flag 10" "Not full,Full"
|
|
bitfld.long 0x04 17. " CF9FLL ,Transmit/receive FIFO buffer full status flag 9" "Not full,Full"
|
|
newline
|
|
bitfld.long 0x04 16. " CF8FLL ,Transmit/receive FIFO buffer full status flag 8" "Not full,Full"
|
|
bitfld.long 0x04 15. " CF7FLL ,Transmit/receive FIFO buffer full status flag 7" "Not full,Full"
|
|
bitfld.long 0x04 14. " CF6FLL ,Transmit/receive FIFO buffer full status flag 6" "Not full,Full"
|
|
newline
|
|
endif
|
|
bitfld.long 0x04 13. " CF5FLL ,Transmit/receive FIFO buffer full status flag 5" "Not full,Full"
|
|
bitfld.long 0x04 12. " CF4FLL ,Transmit/receive FIFO buffer full status flag 4" "Not full,Full"
|
|
bitfld.long 0x04 11. " CF3FLL ,Transmit/receive FIFO buffer full status flag 3" "Not full,Full"
|
|
newline
|
|
bitfld.long 0x04 10. " CF2FLL ,Transmit/receive FIFO buffer full status flag 2" "Not full,Full"
|
|
bitfld.long 0x04 9. " CF1FLL ,Transmit/receive FIFO buffer full status flag 1" "Not full,Full"
|
|
bitfld.long 0x04 8. " CF0FLL ,Transmit/receive FIFO buffer full status flag 0" "Not full,Full"
|
|
newline
|
|
bitfld.long 0x04 7. " RF7FLL ,Receive FIFO Buffer Full Status Flag 7" "Not full,Full"
|
|
bitfld.long 0x04 6. " RF6FLL ,Receive FIFO Buffer Full Status Flag 6" "Not full,Full"
|
|
bitfld.long 0x04 5. " RF5FLL ,Receive FIFO Buffer Full Status Flag 5" "Not full,Full"
|
|
newline
|
|
bitfld.long 0x04 4. " RF4FLL ,Receive FIFO Buffer Full Status Flag 4" "Not full,Full"
|
|
bitfld.long 0x04 3. " RF3FLL ,Receive FIFO Buffer Full Status Flag 3" "Not full,Full"
|
|
bitfld.long 0x04 2. " RF2FLL ,Receive FIFO Buffer Full Status Flag 2" "Not full,Full"
|
|
newline
|
|
bitfld.long 0x04 1. " RF1FLL ,Receive FIFO Buffer Full Status Flag 1" "Not full,Full"
|
|
bitfld.long 0x04 0. " RF0FLL ,Receive FIFO Buffer Full Status Flag 0" "Not full,Full"
|
|
line.long 0x08 "RSCAN0FMSTS,FIFO Message Lost Status Register"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x08 22. " CF14MLT ,Transmit/receive FIFO buffer message lost status flag 14" "Not lost,Lost"
|
|
bitfld.long 0x08 21. " CF13MLT ,Transmit/receive FIFO buffer message lost status flag 13" "Not lost,Lost"
|
|
bitfld.long 0x08 20. " CF12MLT ,Transmit/receive FIFO buffer message lost status flag 12" "Not lost,Lost"
|
|
newline
|
|
bitfld.long 0x08 19. " CF11MLT ,Transmit/receive FIFO buffer message lost status flag 11" "Not lost,Lost"
|
|
bitfld.long 0x08 18. " CF10MLT ,Transmit/receive FIFO buffer message lost status flag 10" "Not lost,Lost"
|
|
bitfld.long 0x08 17. " CF9MLT ,Transmit/receive FIFO buffer message lost status flag 9" "Not lost,Lost"
|
|
newline
|
|
bitfld.long 0x08 16. " CF8MLT ,Transmit/receive FIFO buffer message lost status flag 8" "Not lost,Lost"
|
|
bitfld.long 0x08 15. " CF7MLT ,Transmit/receive FIFO buffer message lost status flag 7" "Not lost,Lost"
|
|
bitfld.long 0x08 14. " CF6MLT ,Transmit/receive FIFO buffer message lost status flag 6" "Not lost,Lost"
|
|
newline
|
|
endif
|
|
bitfld.long 0x08 13. " CF5MLT ,Transmit/receive FIFO buffer message lost status flag 5" "Not lost,Lost"
|
|
bitfld.long 0x08 12. " CF4MLT ,Transmit/receive FIFO buffer message lost status flag 4" "Not lost,Lost"
|
|
bitfld.long 0x08 11. " CF3MLT ,Transmit/receive FIFO buffer message lost status flag 3" "Not lost,Lost"
|
|
newline
|
|
bitfld.long 0x08 10. " CF2MLT ,Transmit/receive FIFO buffer message lost status flag 2" "Not lost,Lost"
|
|
bitfld.long 0x08 9. " CF1MLT ,Transmit/receive FIFO buffer message lost status flag 1" "Not lost,Lost"
|
|
bitfld.long 0x08 8. " CF0MLT ,Transmit/receive FIFO buffer message lost status flag 0" "Not lost,Lost"
|
|
newline
|
|
bitfld.long 0x08 7. " RF7MLT ,Receive FIFO buffer message lost status flag 7" "Not lost,Lost"
|
|
bitfld.long 0x08 6. " RF6MLT ,Receive FIFO buffer message lost status flag 6" "Not lost,Lost"
|
|
bitfld.long 0x08 5. " RF5MLT ,Receive FIFO buffer message lost status flag 5" "Not lost,Lost"
|
|
newline
|
|
bitfld.long 0x08 4. " RF4MLT ,Receive FIFO buffer message lost status flag 4" "Not lost,Lost"
|
|
bitfld.long 0x08 3. " RF3MLT ,Receive FIFO buffer message lost status flag 3" "Not lost,Lost"
|
|
bitfld.long 0x08 2. " RF2MLT ,Receive FIFO buffer message lost status flag 2" "Not lost,Lost"
|
|
newline
|
|
bitfld.long 0x08 1. " RF1MLT ,Receive FIFO buffer message lost status flag 1" "Not lost,Lost"
|
|
bitfld.long 0x08 0. " RF0MLT ,Receive FIFO buffer message lost status flag 0" "Not lost,Lost"
|
|
line.long 0x0C "RSCAN0RFISTS,Receive FIFO Buffer Interrupt Flag Status Register"
|
|
bitfld.long 0x0C 7. " RF7IF ,Receive FIFO buffer interrupt request status flag 7" "Not requested,Requested"
|
|
bitfld.long 0x0C 6. " RF6IF ,Receive FIFO buffer interrupt request status flag 6" "Not requested,Requested"
|
|
bitfld.long 0x0C 5. " RF5IF ,Receive FIFO buffer interrupt request status flag 5" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 4. " RF4IF ,Receive FIFO buffer interrupt request status flag 4" "Not requested,Requested"
|
|
bitfld.long 0x0C 3. " RF3IF ,Receive FIFO buffer interrupt request status flag 3" "Not requested,Requested"
|
|
bitfld.long 0x0C 2. " RF2IF ,Receive FIFO buffer interrupt request status flag 2" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 1. " RF1IF ,Receive FIFO buffer interrupt request status flag 1" "Not requested,Requested"
|
|
bitfld.long 0x0C 0. " RF0IF ,Receive FIFO buffer interrupt request status flag 0" "Not requested,Requested"
|
|
line.long 0x10 "RSCAN0CFRISTS,Transmit/receiveFIFO buffer Receive Interrupt Flag Status Register"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x10 14. " CF14RXIF ,Transmit/receive FIFO buffer receive interrupt request status flag 14" "Not requested,Requested"
|
|
bitfld.long 0x10 13. " CF13RXIF ,Transmit/receive FIFO buffer receive interrupt request status flag 13" "Not requested,Requested"
|
|
bitfld.long 0x10 12. " CF12RXIF ,Transmit/receive FIFO buffer receive interrupt request status flag 12" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 11. " CF11RXIF ,Transmit/receive FIFO buffer receive interrupt request status flag 11" "Not requested,Requested"
|
|
bitfld.long 0x10 10. " CF10RXIF ,Transmit/receive FIFO buffer receive interrupt request status flag 10" "Not requested,Requested"
|
|
bitfld.long 0x10 9. " CF9RXIF ,Transmit/receive FIFO buffer receive interrupt request status flag 9" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 8. " CF8RXIF ,Transmit/receive FIFO buffer receive interrupt request status flag 8" "Not requested,Requested"
|
|
bitfld.long 0x10 7. " CF7RXIF ,Transmit/receive FIFO buffer receive interrupt request status flag 7" "Not requested,Requested"
|
|
bitfld.long 0x10 6. " CF6RXIF ,Transmit/receive FIFO buffer receive interrupt request status flag 6" "Not requested,Requested"
|
|
newline
|
|
endif
|
|
bitfld.long 0x10 5. " CF5RXIF ,Transmit/receive FIFO buffer receive interrupt request status flag 5" "Not requested,Requested"
|
|
bitfld.long 0x10 4. " CF4RXIF ,Transmit/receive FIFO buffer receive interrupt request status flag 4" "Not requested,Requested"
|
|
bitfld.long 0x10 3. " CF3RXIF ,Transmit/receive FIFO buffer receive interrupt request status flag 3" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 2. " CF2RXIF ,Transmit/receive FIFO buffer receive interrupt request status flag 2" "Not requested,Requested"
|
|
bitfld.long 0x10 1. " CF1RXIF ,Transmit/receive FIFO buffer receive interrupt request status flag 1" "Not requested,Requested"
|
|
bitfld.long 0x10 0. " CF0RXIF ,Transmit/receive FIFO buffer receive interrupt request status flag 0" "Not requested,Requested"
|
|
line.long 0x14 "RSCAN0CFTISTS,Transmit/receive FIFO buffer Transmit Interrupt Flag Status Register"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x14 14. " CF14TXIF ,Transmit/receive FIFO buffer transmit interrupt request status flag 14" "Not requested,Requested"
|
|
bitfld.long 0x14 13. " CF13TXIF ,Transmit/receive FIFO buffer transmit interrupt request status flag 13" "Not requested,Requested"
|
|
bitfld.long 0x14 12. " CF12TXIF ,Transmit/receive FIFO buffer transmit interrupt request status flag 12" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x14 11. " CF11TXIF ,Transmit/receive FIFO buffer transmit interrupt request status flag 11" "Not requested,Requested"
|
|
bitfld.long 0x14 10. " CF10TXIF ,Transmit/receive FIFO buffer transmit interrupt request status flag 10" "Not requested,Requested"
|
|
bitfld.long 0x14 9. " CF9TXIF ,Transmit/receive FIFO buffer transmit interrupt request status flag 9" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x14 8. " CF8TXIF ,Transmit/receive FIFO buffer transmit interrupt request status flag 8" "Not requested,Requested"
|
|
bitfld.long 0x14 7. " CF7TXIF ,Transmit/receive FIFO buffer transmit interrupt request status flag 7" "Not requested,Requested"
|
|
bitfld.long 0x14 6. " CF6TXIF ,Transmit/receive FIFO buffer transmit interrupt request status flag 6" "Not requested,Requested"
|
|
newline
|
|
endif
|
|
bitfld.long 0x14 5. " CF5TXIF ,Transmit/receive FIFO buffer transmit interrupt request status flag 5" "Not requested,Requested"
|
|
bitfld.long 0x14 4. " CF4TXIF ,Transmit/receive FIFO buffer transmit interrupt request status flag 4" "Not requested,Requested"
|
|
bitfld.long 0x14 3. " CF3TXIF ,Transmit/receive FIFO buffer transmit interrupt request status flag 3" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x14 2. " CF2TXIF ,Transmit/receive FIFO buffer transmit interrupt request status flag 2" "Not requested,Requested"
|
|
bitfld.long 0x14 1. " CF1TXIF ,Transmit/receive FIFO buffer transmit interrupt request status flag 1" "Not requested,Requested"
|
|
bitfld.long 0x14 0. " CF0TXIF ,Transmit/receive FIFO buffer transmit interrupt request status flag 0" "Not requested,Requested"
|
|
tree.end
|
|
width 17.
|
|
tree "Transmit Registers"
|
|
group.byte 0x250++0x00
|
|
line.byte 0x00 "RSCAN0TMC0,Transmit BufferControl Register 0"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x251++0x00
|
|
line.byte 0x00 "RSCAN0TMC1,Transmit BufferControl Register 1"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x252++0x00
|
|
line.byte 0x00 "RSCAN0TMC2,Transmit BufferControl Register 2"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x253++0x00
|
|
line.byte 0x00 "RSCAN0TMC3,Transmit BufferControl Register 3"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x254++0x00
|
|
line.byte 0x00 "RSCAN0TMC4,Transmit BufferControl Register 4"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x255++0x00
|
|
line.byte 0x00 "RSCAN0TMC5,Transmit BufferControl Register 5"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x256++0x00
|
|
line.byte 0x00 "RSCAN0TMC6,Transmit BufferControl Register 6"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x257++0x00
|
|
line.byte 0x00 "RSCAN0TMC7,Transmit BufferControl Register 7"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x258++0x00
|
|
line.byte 0x00 "RSCAN0TMC8,Transmit BufferControl Register 8"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x259++0x00
|
|
line.byte 0x00 "RSCAN0TMC9,Transmit BufferControl Register 9"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x25A++0x00
|
|
line.byte 0x00 "RSCAN0TMC10,Transmit BufferControl Register 10"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x25B++0x00
|
|
line.byte 0x00 "RSCAN0TMC11,Transmit BufferControl Register 11"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x25C++0x00
|
|
line.byte 0x00 "RSCAN0TMC12,Transmit BufferControl Register 12"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x25D++0x00
|
|
line.byte 0x00 "RSCAN0TMC13,Transmit BufferControl Register 13"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x25E++0x00
|
|
line.byte 0x00 "RSCAN0TMC14,Transmit BufferControl Register 14"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x25F++0x00
|
|
line.byte 0x00 "RSCAN0TMC15,Transmit BufferControl Register 15"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x260++0x00
|
|
line.byte 0x00 "RSCAN0TMC16,Transmit BufferControl Register 16"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x261++0x00
|
|
line.byte 0x00 "RSCAN0TMC17,Transmit BufferControl Register 17"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x262++0x00
|
|
line.byte 0x00 "RSCAN0TMC18,Transmit BufferControl Register 18"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x263++0x00
|
|
line.byte 0x00 "RSCAN0TMC19,Transmit BufferControl Register 19"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x264++0x00
|
|
line.byte 0x00 "RSCAN0TMC20,Transmit BufferControl Register 20"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x265++0x00
|
|
line.byte 0x00 "RSCAN0TMC21,Transmit BufferControl Register 21"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x266++0x00
|
|
line.byte 0x00 "RSCAN0TMC22,Transmit BufferControl Register 22"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x267++0x00
|
|
line.byte 0x00 "RSCAN0TMC23,Transmit BufferControl Register 23"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x268++0x00
|
|
line.byte 0x00 "RSCAN0TMC24,Transmit BufferControl Register 24"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x269++0x00
|
|
line.byte 0x00 "RSCAN0TMC25,Transmit BufferControl Register 25"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x26A++0x00
|
|
line.byte 0x00 "RSCAN0TMC26,Transmit BufferControl Register 26"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x26B++0x00
|
|
line.byte 0x00 "RSCAN0TMC27,Transmit BufferControl Register 27"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x26C++0x00
|
|
line.byte 0x00 "RSCAN0TMC28,Transmit BufferControl Register 28"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x26D++0x00
|
|
line.byte 0x00 "RSCAN0TMC29,Transmit BufferControl Register 29"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x26E++0x00
|
|
line.byte 0x00 "RSCAN0TMC30,Transmit BufferControl Register 30"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x26F++0x00
|
|
line.byte 0x00 "RSCAN0TMC31,Transmit BufferControl Register 31"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x270++0x00
|
|
line.byte 0x00 "RSCAN0TMC32,Transmit BufferControl Register 32"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x271++0x00
|
|
line.byte 0x00 "RSCAN0TMC33,Transmit BufferControl Register 33"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x272++0x00
|
|
line.byte 0x00 "RSCAN0TMC34,Transmit BufferControl Register 34"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x273++0x00
|
|
line.byte 0x00 "RSCAN0TMC35,Transmit BufferControl Register 35"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x274++0x00
|
|
line.byte 0x00 "RSCAN0TMC36,Transmit BufferControl Register 36"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x275++0x00
|
|
line.byte 0x00 "RSCAN0TMC37,Transmit BufferControl Register 37"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x276++0x00
|
|
line.byte 0x00 "RSCAN0TMC38,Transmit BufferControl Register 38"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x277++0x00
|
|
line.byte 0x00 "RSCAN0TMC39,Transmit BufferControl Register 39"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x278++0x00
|
|
line.byte 0x00 "RSCAN0TMC40,Transmit BufferControl Register 40"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x279++0x00
|
|
line.byte 0x00 "RSCAN0TMC41,Transmit BufferControl Register 41"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x27A++0x00
|
|
line.byte 0x00 "RSCAN0TMC42,Transmit BufferControl Register 42"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x27B++0x00
|
|
line.byte 0x00 "RSCAN0TMC43,Transmit BufferControl Register 43"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x27C++0x00
|
|
line.byte 0x00 "RSCAN0TMC44,Transmit BufferControl Register 44"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x27D++0x00
|
|
line.byte 0x00 "RSCAN0TMC45,Transmit BufferControl Register 45"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x27E++0x00
|
|
line.byte 0x00 "RSCAN0TMC46,Transmit BufferControl Register 46"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x27F++0x00
|
|
line.byte 0x00 "RSCAN0TMC47,Transmit BufferControl Register 47"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x280++0x00
|
|
line.byte 0x00 "RSCAN0TMC48,Transmit BufferControl Register 48"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x281++0x00
|
|
line.byte 0x00 "RSCAN0TMC49,Transmit BufferControl Register 49"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x282++0x00
|
|
line.byte 0x00 "RSCAN0TMC50,Transmit BufferControl Register 50"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x283++0x00
|
|
line.byte 0x00 "RSCAN0TMC51,Transmit BufferControl Register 51"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x284++0x00
|
|
line.byte 0x00 "RSCAN0TMC52,Transmit BufferControl Register 52"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x285++0x00
|
|
line.byte 0x00 "RSCAN0TMC53,Transmit BufferControl Register 53"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x286++0x00
|
|
line.byte 0x00 "RSCAN0TMC54,Transmit BufferControl Register 54"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x287++0x00
|
|
line.byte 0x00 "RSCAN0TMC55,Transmit BufferControl Register 55"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x288++0x00
|
|
line.byte 0x00 "RSCAN0TMC56,Transmit BufferControl Register 56"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x289++0x00
|
|
line.byte 0x00 "RSCAN0TMC57,Transmit BufferControl Register 57"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x28A++0x00
|
|
line.byte 0x00 "RSCAN0TMC58,Transmit BufferControl Register 58"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x28B++0x00
|
|
line.byte 0x00 "RSCAN0TMC59,Transmit BufferControl Register 59"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x28C++0x00
|
|
line.byte 0x00 "RSCAN0TMC60,Transmit BufferControl Register 60"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x28D++0x00
|
|
line.byte 0x00 "RSCAN0TMC61,Transmit BufferControl Register 61"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x28E++0x00
|
|
line.byte 0x00 "RSCAN0TMC62,Transmit BufferControl Register 62"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x28F++0x00
|
|
line.byte 0x00 "RSCAN0TMC63,Transmit BufferControl Register 63"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x290++0x00
|
|
line.byte 0x00 "RSCAN0TMC64,Transmit BufferControl Register 64"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x291++0x00
|
|
line.byte 0x00 "RSCAN0TMC65,Transmit BufferControl Register 65"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x292++0x00
|
|
line.byte 0x00 "RSCAN0TMC66,Transmit BufferControl Register 66"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x293++0x00
|
|
line.byte 0x00 "RSCAN0TMC67,Transmit BufferControl Register 67"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x294++0x00
|
|
line.byte 0x00 "RSCAN0TMC68,Transmit BufferControl Register 68"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x295++0x00
|
|
line.byte 0x00 "RSCAN0TMC69,Transmit BufferControl Register 69"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x296++0x00
|
|
line.byte 0x00 "RSCAN0TMC70,Transmit BufferControl Register 70"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x297++0x00
|
|
line.byte 0x00 "RSCAN0TMC71,Transmit BufferControl Register 71"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x298++0x00
|
|
line.byte 0x00 "RSCAN0TMC72,Transmit BufferControl Register 72"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x299++0x00
|
|
line.byte 0x00 "RSCAN0TMC73,Transmit BufferControl Register 73"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x29A++0x00
|
|
line.byte 0x00 "RSCAN0TMC74,Transmit BufferControl Register 74"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x29B++0x00
|
|
line.byte 0x00 "RSCAN0TMC75,Transmit BufferControl Register 75"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x29C++0x00
|
|
line.byte 0x00 "RSCAN0TMC76,Transmit BufferControl Register 76"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x29D++0x00
|
|
line.byte 0x00 "RSCAN0TMC77,Transmit BufferControl Register 77"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x29E++0x00
|
|
line.byte 0x00 "RSCAN0TMC78,Transmit BufferControl Register 78"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
group.byte 0x29F++0x00
|
|
line.byte 0x00 "RSCAN0TMC79,Transmit BufferControl Register 79"
|
|
bitfld.byte 0x00 2. " TMOM ,One-shot transmission enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMTAR ,Transmit abort request" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " TMTR ,Transmit request" "Not requested,Requested"
|
|
newline
|
|
group.byte 0x2D0++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS0,Transmit Buffer Status Register 0"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2D1++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS1,Transmit Buffer Status Register 1"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2D2++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS2,Transmit Buffer Status Register 2"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2D3++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS3,Transmit Buffer Status Register 3"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2D4++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS4,Transmit Buffer Status Register 4"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2D5++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS5,Transmit Buffer Status Register 5"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2D6++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS6,Transmit Buffer Status Register 6"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2D7++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS7,Transmit Buffer Status Register 7"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2D8++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS8,Transmit Buffer Status Register 8"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2D9++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS9,Transmit Buffer Status Register 9"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2DA++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS10,Transmit Buffer Status Register 10"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2DB++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS11,Transmit Buffer Status Register 11"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2DC++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS12,Transmit Buffer Status Register 12"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2DD++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS13,Transmit Buffer Status Register 13"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2DE++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS14,Transmit Buffer Status Register 14"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2DF++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS15,Transmit Buffer Status Register 15"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2E0++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS16,Transmit Buffer Status Register 16"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2E1++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS17,Transmit Buffer Status Register 17"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2E2++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS18,Transmit Buffer Status Register 18"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2E3++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS19,Transmit Buffer Status Register 19"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2E4++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS20,Transmit Buffer Status Register 20"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2E5++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS21,Transmit Buffer Status Register 21"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2E6++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS22,Transmit Buffer Status Register 22"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2E7++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS23,Transmit Buffer Status Register 23"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2E8++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS24,Transmit Buffer Status Register 24"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2E9++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS25,Transmit Buffer Status Register 25"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2EA++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS26,Transmit Buffer Status Register 26"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2EB++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS27,Transmit Buffer Status Register 27"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2EC++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS28,Transmit Buffer Status Register 28"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2ED++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS29,Transmit Buffer Status Register 29"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2EE++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS30,Transmit Buffer Status Register 30"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2EF++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS31,Transmit Buffer Status Register 31"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2F0++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS32,Transmit Buffer Status Register 32"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2F1++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS33,Transmit Buffer Status Register 33"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2F2++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS34,Transmit Buffer Status Register 34"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2F3++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS35,Transmit Buffer Status Register 35"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2F4++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS36,Transmit Buffer Status Register 36"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2F5++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS37,Transmit Buffer Status Register 37"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2F6++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS38,Transmit Buffer Status Register 38"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2F7++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS39,Transmit Buffer Status Register 39"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2F8++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS40,Transmit Buffer Status Register 40"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2F9++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS41,Transmit Buffer Status Register 41"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2FA++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS42,Transmit Buffer Status Register 42"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2FB++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS43,Transmit Buffer Status Register 43"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2FC++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS44,Transmit Buffer Status Register 44"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2FD++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS45,Transmit Buffer Status Register 45"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2FE++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS46,Transmit Buffer Status Register 46"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x2FF++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS47,Transmit Buffer Status Register 47"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x300++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS48,Transmit Buffer Status Register 48"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x301++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS49,Transmit Buffer Status Register 49"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x302++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS50,Transmit Buffer Status Register 50"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x303++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS51,Transmit Buffer Status Register 51"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x304++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS52,Transmit Buffer Status Register 52"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x305++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS53,Transmit Buffer Status Register 53"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x306++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS54,Transmit Buffer Status Register 54"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x307++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS55,Transmit Buffer Status Register 55"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x308++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS56,Transmit Buffer Status Register 56"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x309++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS57,Transmit Buffer Status Register 57"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x30A++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS58,Transmit Buffer Status Register 58"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x30B++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS59,Transmit Buffer Status Register 59"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x30C++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS60,Transmit Buffer Status Register 60"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x30D++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS61,Transmit Buffer Status Register 61"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x30E++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS62,Transmit Buffer Status Register 62"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x30F++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS63,Transmit Buffer Status Register 63"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x310++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS64,Transmit Buffer Status Register 64"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x311++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS65,Transmit Buffer Status Register 65"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x312++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS66,Transmit Buffer Status Register 66"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x313++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS67,Transmit Buffer Status Register 67"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x314++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS68,Transmit Buffer Status Register 68"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x315++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS69,Transmit Buffer Status Register 69"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x316++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS70,Transmit Buffer Status Register 70"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x317++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS71,Transmit Buffer Status Register 71"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x318++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS72,Transmit Buffer Status Register 72"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x319++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS73,Transmit Buffer Status Register 73"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x31A++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS74,Transmit Buffer Status Register 74"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x31B++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS75,Transmit Buffer Status Register 75"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x31C++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS76,Transmit Buffer Status Register 76"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x31D++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS77,Transmit Buffer Status Register 77"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x31E++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS78,Transmit Buffer Status Register 78"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
group.byte 0x31F++0x00
|
|
line.byte 0x00 "RSCAN0TMSTS79,Transmit Buffer Status Register 79"
|
|
bitfld.byte 0x00 4. " TMTARM ,Transmit buffer transmit abort request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " TMTRM ,Transmit buffer transmit request status flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 1.--2. " TMTRF ,Transmit buffer transmit result status flag" "In progress/Not requested,Completed,Completed without abort,Completed with abort"
|
|
newline
|
|
bitfld.byte 0x00 0. " TMTSTS ,Transmit buffer transmit status flag" "Disabled,Enabled"
|
|
newline
|
|
rgroup.long 0x350++0x03
|
|
line.long 0x00 "RSCAN0TMTRSTS0,Transmit BufferTransmit Request Status Register 0"
|
|
bitfld.long 0x00 31. " TMTRSTS31 ,Transmit buffer transmit request status flag 31" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " TMTRSTS30 ,Transmit buffer transmit request status flag 30" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " TMTRSTS29 ,Transmit buffer transmit request status flag 29" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 28. " TMTRSTS28 ,Transmit buffer transmit request status flag 28" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " TMTRSTS27 ,Transmit buffer transmit request status flag 27" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " TMTRSTS26 ,Transmit buffer transmit request status flag 26" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 25. " TMTRSTS25 ,Transmit buffer transmit request status flag 25" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " TMTRSTS24 ,Transmit buffer transmit request status flag 24" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " TMTRSTS23 ,Transmit buffer transmit request status flag 23" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 22. " TMTRSTS22 ,Transmit buffer transmit request status flag 22" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " TMTRSTS21 ,Transmit buffer transmit request status flag 21" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " TMTRSTS20 ,Transmit buffer transmit request status flag 20" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 19. " TMTRSTS19 ,Transmit buffer transmit request status flag 19" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " TMTRSTS18 ,Transmit buffer transmit request status flag 18" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " TMTRSTS17 ,Transmit buffer transmit request status flag 17" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 16. " TMTRSTS16 ,Transmit buffer transmit request status flag 16" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " TMTRSTS15 ,Transmit buffer transmit request status flag 15" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " TMTRSTS14 ,Transmit buffer transmit request status flag 14" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 13. " TMTRSTS13 ,Transmit buffer transmit request status flag 13" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " TMTRSTS12 ,Transmit buffer transmit request status flag 12" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " TMTRSTS11 ,Transmit buffer transmit request status flag 11" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 10. " TMTRSTS10 ,Transmit buffer transmit request status flag 10" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " TMTRSTS9 ,Transmit buffer transmit request status flag 9" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " TMTRSTS8 ,Transmit buffer transmit request status flag 8" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 7. " TMTRSTS7 ,Transmit buffer transmit request status flag 7" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " TMTRSTS6 ,Transmit buffer transmit request status flag 6" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " TMTRSTS5 ,Transmit buffer transmit request status flag 5" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 4. " TMTRSTS4 ,Transmit buffer transmit request status flag 4" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " TMTRSTS3 ,Transmit buffer transmit request status flag 3" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " TMTRSTS2 ,Transmit buffer transmit request status flag 2" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 1. " TMTRSTS1 ,Transmit buffer transmit request status flag 1" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " TMTRSTS0 ,Transmit buffer transmit request status flag 0" "Not requested,Requested"
|
|
sif !cpuis("R7S91*")
|
|
rgroup.long 0x354++0x07
|
|
line.long 0x00 "RSCAN0TMTRSTS1,Transmit BufferTransmit Request Status Register 1"
|
|
bitfld.long 0x00 31. " TMTRSTS63 ,Transmit buffer transmit request status flag 63" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " TMTRSTS62 ,Transmit buffer transmit request status flag 62" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " TMTRSTS61 ,Transmit buffer transmit request status flag 61" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 28. " TMTRSTS60 ,Transmit buffer transmit request status flag 60" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " TMTRSTS59 ,Transmit buffer transmit request status flag 59" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " TMTRSTS58 ,Transmit buffer transmit request status flag 58" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 25. " TMTRSTS57 ,Transmit buffer transmit request status flag 57" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " TMTRSTS56 ,Transmit buffer transmit request status flag 56" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " TMTRSTS55 ,Transmit buffer transmit request status flag 55" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 22. " TMTRSTS54 ,Transmit buffer transmit request status flag 54" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " TMTRSTS53 ,Transmit buffer transmit request status flag 53" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " TMTRSTS52 ,Transmit buffer transmit request status flag 52" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 19. " TMTRSTS51 ,Transmit buffer transmit request status flag 51" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " TMTRSTS50 ,Transmit buffer transmit request status flag 50" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " TMTRSTS49 ,Transmit buffer transmit request status flag 49" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 16. " TMTRSTS48 ,Transmit buffer transmit request status flag 48" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " TMTRSTS47 ,Transmit buffer transmit request status flag 47" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " TMTRSTS46 ,Transmit buffer transmit request status flag 46" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 13. " TMTRSTS45 ,Transmit buffer transmit request status flag 45" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " TMTRSTS44 ,Transmit buffer transmit request status flag 44" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " TMTRSTS43 ,Transmit buffer transmit request status flag 43" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 10. " TMTRSTS42 ,Transmit buffer transmit request status flag 42" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " TMTRSTS41 ,Transmit buffer transmit request status flag 41" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " TMTRSTS40 ,Transmit buffer transmit request status flag 40" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 7. " TMTRSTS39 ,Transmit buffer transmit request status flag 39" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " TMTRSTS38 ,Transmit buffer transmit request status flag 38" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " TMTRSTS37 ,Transmit buffer transmit request status flag 37" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 4. " TMTRSTS36 ,Transmit buffer transmit request status flag 36" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " TMTRSTS35 ,Transmit buffer transmit request status flag 35" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " TMTRSTS34 ,Transmit buffer transmit request status flag 34" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 1. " TMTRSTS33 ,Transmit buffer transmit request status flag 33" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " TMTRSTS32 ,Transmit buffer transmit request status flag 32" "Not requested,Requested"
|
|
line.long 0x04 "RSCAN0TMTRSTS2,Transmit Buffer Transmit Request Status Register 2"
|
|
bitfld.long 0x04 15. " TMTRSTS79 ,Transmit buffer transmit request status flag 79" "Not requested,Requested"
|
|
bitfld.long 0x04 14. " TMTRSTS78 ,Transmit buffer transmit request status flag 78" "Not requested,Requested"
|
|
bitfld.long 0x04 13. " TMTRSTS77 ,Transmit buffer transmit request status flag 77" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 12. " TMTRSTS76 ,Transmit buffer transmit request status flag 76" "Not requested,Requested"
|
|
bitfld.long 0x04 11. " TMTRSTS75 ,Transmit buffer transmit request status flag 75" "Not requested,Requested"
|
|
bitfld.long 0x04 10. " TMTRSTS74 ,Transmit buffer transmit request status flag 74" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 9. " TMTRSTS73 ,Transmit buffer transmit request status flag 73" "Not requested,Requested"
|
|
bitfld.long 0x04 8. " TMTRSTS72 ,Transmit buffer transmit request status flag 72" "Not requested,Requested"
|
|
bitfld.long 0x04 7. " TMTRSTS71 ,Transmit buffer transmit request status flag 71" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 6. " TMTRSTS70 ,Transmit buffer transmit request status flag 70" "Not requested,Requested"
|
|
bitfld.long 0x04 5. " TMTRSTS69 ,Transmit buffer transmit request status flag 69" "Not requested,Requested"
|
|
bitfld.long 0x04 4. " TMTRSTS68 ,Transmit buffer transmit request status flag 68" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 3. " TMTRSTS67 ,Transmit buffer transmit request status flag 67" "Not requested,Requested"
|
|
bitfld.long 0x04 2. " TMTRSTS66 ,Transmit buffer transmit request status flag 66" "Not requested,Requested"
|
|
bitfld.long 0x04 1. " TMTRSTS65 ,Transmit buffer transmit request status flag 65" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 0. " TMTRSTS64 ,Transmit buffer transmit request status flag 64" "Not requested,Requested"
|
|
endif
|
|
group.long 0x360++0x03
|
|
line.long 0x00 "RSCAN0TMTARSTS0, Transmit Buffer Transmit Abort Request Status Register 0"
|
|
bitfld.long 0x00 31. " TMTARSTS31 ,Transmit buffer transmit abort request status flag 31" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " TMTARSTS30 ,Transmit buffer transmit abort request status flag 30" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " TMTARSTS29 ,Transmit buffer transmit abort request status flag 29" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 28. " TMTARSTS28 ,Transmit buffer transmit abort request status flag 28" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " TMTARSTS27 ,Transmit buffer transmit abort request status flag 27" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " TMTARSTS26 ,Transmit buffer transmit abort request status flag 26" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 25. " TMTARSTS25 ,Transmit buffer transmit abort request status flag 25" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " TMTARSTS24 ,Transmit buffer transmit abort request status flag 24" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " TMTARSTS23 ,Transmit buffer transmit abort request status flag 23" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 22. " TMTARSTS22 ,Transmit buffer transmit abort request status flag 22" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " TMTARSTS21 ,Transmit buffer transmit abort request status flag 21" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " TMTARSTS20 ,Transmit buffer transmit abort request status flag 20" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 19. " TMTARSTS19 ,Transmit buffer transmit abort request status flag 19" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " TMTARSTS18 ,Transmit buffer transmit abort request status flag 18" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " TMTARSTS17 ,Transmit buffer transmit abort request status flag 17" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 16. " TMTARSTS16 ,Transmit buffer transmit abort request status flag 16" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " TMTARSTS15 ,Transmit buffer transmit abort request status flag 15" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " TMTARSTS14 ,Transmit buffer transmit abort request status flag 14" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 13. " TMTARSTS13 ,Transmit buffer transmit abort request status flag 13" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " TMTARSTS12 ,Transmit buffer transmit abort request status flag 12" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " TMTARSTS11 ,Transmit buffer transmit abort request status flag 11" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 10. " TMTARSTS10 ,Transmit buffer transmit abort request status flag 10" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " TMTARSTS9 ,Transmit buffer transmit abort request status flag 9" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " TMTARSTS8 ,Transmit buffer transmit abort request status flag 8" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 7. " TMTARSTS7 ,Transmit buffer transmit abort request status flag 7" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " TMTARSTS6 ,Transmit buffer transmit abort request status flag 6" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " TMTARSTS5 ,Transmit buffer transmit abort request status flag 5" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 4. " TMTARSTS4 ,Transmit buffer transmit abort request status flag 4" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " TMTARSTS3 ,Transmit buffer transmit abort request status flag 3" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " TMTARSTS2 ,Transmit buffer transmit abort request status flag 2" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 1. " TMTARSTS1 ,Transmit buffer transmit abort request status flag 1" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " TMTARSTS0 ,Transmit buffer transmit abort request status flag 0" "Not requested,Requested"
|
|
sif !cpuis("R7S91*")
|
|
group.long 0x364++0x07
|
|
line.long 0x00 "RSCAN0TMTARSTS1, Transmit Buffer Transmit Abort Request Status Register 1"
|
|
bitfld.long 0x00 31. " TMTARSTS63 ,Transmit buffer transmit abort request status flag 63" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " TMTARSTS62 ,Transmit buffer transmit abort request status flag 62" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " TMTARSTS61 ,Transmit buffer transmit abort request status flag 61" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 28. " TMTARSTS60 ,Transmit buffer transmit abort request status flag 60" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " TMTARSTS59 ,Transmit buffer transmit abort request status flag 59" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " TMTARSTS58 ,Transmit buffer transmit abort request status flag 58" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 25. " TMTARSTS57 ,Transmit buffer transmit abort request status flag 57" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " TMTARSTS56 ,Transmit buffer transmit abort request status flag 56" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " TMTARSTS55 ,Transmit buffer transmit abort request status flag 55" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 22. " TMTARSTS54 ,Transmit buffer transmit abort request status flag 54" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " TMTARSTS53 ,Transmit buffer transmit abort request status flag 53" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " TMTARSTS52 ,Transmit buffer transmit abort request status flag 52" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 19. " TMTARSTS51 ,Transmit buffer transmit abort request status flag 51" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " TMTARSTS50 ,Transmit buffer transmit abort request status flag 50" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " TMTARSTS49 ,Transmit buffer transmit abort request status flag 49" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 16. " TMTARSTS48 ,Transmit buffer transmit abort request status flag 48" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " TMTARSTS47 ,Transmit buffer transmit abort request status flag 47" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " TMTARSTS46 ,Transmit buffer transmit abort request status flag 46" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 13. " TMTARSTS45 ,Transmit buffer transmit abort request status flag 45" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " TMTARSTS44 ,Transmit buffer transmit abort request status flag 44" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " TMTARSTS43 ,Transmit buffer transmit abort request status flag 43" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 10. " TMTARSTS42 ,Transmit buffer transmit abort request status flag 42" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " TMTARSTS41 ,Transmit buffer transmit abort request status flag 41" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " TMTARSTS40 ,Transmit buffer transmit abort request status flag 40" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 7. " TMTARSTS39 ,Transmit buffer transmit abort request status flag 39" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " TMTARSTS38 ,Transmit buffer transmit abort request status flag 38" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " TMTARSTS37 ,Transmit buffer transmit abort request status flag 37" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 4. " TMTARSTS36 ,Transmit buffer transmit abort request status flag 36" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " TMTARSTS35 ,Transmit buffer transmit abort request status flag 35" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " TMTARSTS34 ,Transmit buffer transmit abort request status flag 34" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 1. " TMTARSTS33 ,Transmit buffer transmit abort request status flag 33" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " TMTARSTS32 ,Transmit buffer transmit abort request status flag 32" "Not requested,Requested"
|
|
line.long 0x04 "RSCAN0TMTARSTS2, Transmit Buffer Transmit Abort Request Status Register 2"
|
|
bitfld.long 0x04 15. " TMTARSTS79 ,Transmit buffer transmit abort request status flag 79" "Not requested,Requested"
|
|
bitfld.long 0x04 14. " TMTARSTS78 ,Transmit buffer transmit abort request status flag 78" "Not requested,Requested"
|
|
bitfld.long 0x04 13. " TMTARSTS77 ,Transmit buffer transmit abort request status flag 77" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 12. " TMTARSTS76 ,Transmit buffer transmit abort request status flag 76" "Not requested,Requested"
|
|
bitfld.long 0x04 11. " TMTARSTS75 ,Transmit buffer transmit abort request status flag 75" "Not requested,Requested"
|
|
bitfld.long 0x04 10. " TMTARSTS74 ,Transmit buffer transmit abort request status flag 74" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 9. " TMTARSTS73 ,Transmit buffer transmit abort request status flag 73" "Not requested,Requested"
|
|
bitfld.long 0x04 8. " TMTARSTS72 ,Transmit buffer transmit abort request status flag 72" "Not requested,Requested"
|
|
bitfld.long 0x04 7. " TMTARSTS71 ,Transmit buffer transmit abort request status flag 71" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 6. " TMTARSTS70 ,Transmit buffer transmit abort request status flag 70" "Not requested,Requested"
|
|
bitfld.long 0x04 5. " TMTARSTS69 ,Transmit buffer transmit abort request status flag 69" "Not requested,Requested"
|
|
bitfld.long 0x04 4. " TMTARSTS68 ,Transmit buffer transmit abort request status flag 68" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 3. " TMTARSTS67 ,Transmit buffer transmit abort request status flag 67" "Not requested,Requested"
|
|
bitfld.long 0x04 2. " TMTARSTS66 ,Transmit buffer transmit abort request status flag 66" "Not requested,Requested"
|
|
bitfld.long 0x04 1. " TMTARSTS65 ,Transmit buffer transmit abort request status flag 65" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 0. " TMTARSTS64 ,Transmit buffer transmit abort request status flag 64" "Not requested,Requested"
|
|
endif
|
|
rgroup.long 0x370++0x03
|
|
line.long 0x00 "RSCAN0TMTCSTS0,Transmit Buffer Transmit Complete Status Register 0"
|
|
bitfld.long 0x00 31. " TMTCSTS31 ,Transmit buffer transmit complete status flag 31" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " TMTCSTS30 ,Transmit buffer transmit complete status flag 30" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " TMTCSTS29 ,Transmit buffer transmit complete status flag 29" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 28. " TMTCSTS28 ,Transmit buffer transmit complete status flag 28" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " TMTCSTS27 ,Transmit buffer transmit complete status flag 27" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " TMTCSTS26 ,Transmit buffer transmit complete status flag 26" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 25. " TMTCSTS25 ,Transmit buffer transmit complete status flag 25" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " TMTCSTS24 ,Transmit buffer transmit complete status flag 24" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " TMTCSTS23 ,Transmit buffer transmit complete status flag 23" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 22. " TMTCSTS22 ,Transmit buffer transmit complete status flag 22" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " TMTCSTS21 ,Transmit buffer transmit complete status flag 21" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " TMTCSTS20 ,Transmit buffer transmit complete status flag 20" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 19. " TMTCSTS19 ,Transmit buffer transmit complete status flag 19" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " TMTCSTS18 ,Transmit buffer transmit complete status flag 18" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " TMTCSTS17 ,Transmit buffer transmit complete status flag 17" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 16. " TMTCSTS16 ,Transmit buffer transmit complete status flag 16" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " TMTCSTS15 ,Transmit buffer transmit complete status flag 15" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " TMTCSTS14 ,Transmit buffer transmit complete status flag 14" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 13. " TMTCSTS13 ,Transmit buffer transmit complete status flag 13" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " TMTCSTS12 ,Transmit buffer transmit complete status flag 12" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " TMTCSTS11 ,Transmit buffer transmit complete status flag 11" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 10. " TMTCSTS10 ,Transmit buffer transmit complete status flag 10" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " TMTCSTS9 ,Transmit buffer transmit complete status flag 9" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " TMTCSTS8 ,Transmit buffer transmit complete status flag 8" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 7. " TMTCSTS7 ,Transmit buffer transmit complete status flag 7" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " TMTCSTS6 ,Transmit buffer transmit complete status flag 6" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " TMTCSTS5 ,Transmit buffer transmit complete status flag 5" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 4. " TMTCSTS4 ,Transmit buffer transmit complete status flag 4" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " TMTCSTS3 ,Transmit buffer transmit complete status flag 3" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " TMTCSTS2 ,Transmit buffer transmit complete status flag 2" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 1. " TMTCSTS1 ,Transmit buffer transmit complete status flag 1" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " TMTCSTS0 ,Transmit buffer transmit complete status flag 0" "Not requested,Requested"
|
|
sif !cpuis("R7S91*")
|
|
rgroup.long 0x374++0x07
|
|
line.long 0x00 "RSCAN0TMTCSTS1,Transmit Buffer Transmit Complete Status Register 1"
|
|
bitfld.long 0x00 31. " TMTCSTS63 ,Transmit buffer transmit complete status flag 63" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " TMTCSTS62 ,Transmit buffer transmit complete status flag 62" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " TMTCSTS61 ,Transmit buffer transmit complete status flag 61" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 28. " TMTCSTS60 ,Transmit buffer transmit complete status flag 60" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " TMTCSTS59 ,Transmit buffer transmit complete status flag 59" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " TMTCSTS58 ,Transmit buffer transmit complete status flag 58" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 25. " TMTCSTS57 ,Transmit buffer transmit complete status flag 57" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " TMTCSTS56 ,Transmit buffer transmit complete status flag 56" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " TMTCSTS55 ,Transmit buffer transmit complete status flag 55" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 22. " TMTCSTS54 ,Transmit buffer transmit complete status flag 54" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " TMTCSTS53 ,Transmit buffer transmit complete status flag 53" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " TMTCSTS52 ,Transmit buffer transmit complete status flag 52" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 19. " TMTCSTS51 ,Transmit buffer transmit complete status flag 51" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " TMTCSTS50 ,Transmit buffer transmit complete status flag 50" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " TMTCSTS49 ,Transmit buffer transmit complete status flag 49" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 16. " TMTCSTS48 ,Transmit buffer transmit complete status flag 48" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " TMTCSTS47 ,Transmit buffer transmit complete status flag 47" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " TMTCSTS46 ,Transmit buffer transmit complete status flag 46" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 13. " TMTCSTS45 ,Transmit buffer transmit complete status flag 45" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " TMTCSTS44 ,Transmit buffer transmit complete status flag 44" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " TMTCSTS43 ,Transmit buffer transmit complete status flag 43" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 10. " TMTCSTS42 ,Transmit buffer transmit complete status flag 42" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " TMTCSTS41 ,Transmit buffer transmit complete status flag 41" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " TMTCSTS40 ,Transmit buffer transmit complete status flag 40" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 7. " TMTCSTS39 ,Transmit buffer transmit complete status flag 39" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " TMTCSTS38 ,Transmit buffer transmit complete status flag 38" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " TMTCSTS37 ,Transmit buffer transmit complete status flag 37" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 4. " TMTCSTS36 ,Transmit buffer transmit complete status flag 36" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " TMTCSTS35 ,Transmit buffer transmit complete status flag 35" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " TMTCSTS34 ,Transmit buffer transmit complete status flag 34" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 1. " TMTCSTS33 ,Transmit buffer transmit complete status flag 33" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " TMTCSTS32 ,Transmit buffer transmit complete status flag 32" "Not requested,Requested"
|
|
line.long 0x04 "RSCAN0TMTCSTS2,Transmit Buffer Transmit Complete Status Register 2"
|
|
bitfld.long 0x04 15. " TMTCSTS79 ,Transmit buffer transmit complete status flag 79" "Not requested,Requested"
|
|
bitfld.long 0x04 14. " TMTCSTS78 ,Transmit buffer transmit complete status flag 78" "Not requested,Requested"
|
|
bitfld.long 0x04 13. " TMTCSTS77 ,Transmit buffer transmit complete status flag 77" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 12. " TMTCSTS76 ,Transmit buffer transmit complete status flag 76" "Not requested,Requested"
|
|
bitfld.long 0x04 11. " TMTCSTS75 ,Transmit buffer transmit complete status flag 75" "Not requested,Requested"
|
|
bitfld.long 0x04 10. " TMTCSTS74 ,Transmit buffer transmit complete status flag 74" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 9. " TMTCSTS73 ,Transmit buffer transmit complete status flag 73" "Not requested,Requested"
|
|
bitfld.long 0x04 8. " TMTCSTS72 ,Transmit buffer transmit complete status flag 72" "Not requested,Requested"
|
|
bitfld.long 0x04 7. " TMTCSTS71 ,Transmit buffer transmit complete status flag 71" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 6. " TMTCSTS70 ,Transmit buffer transmit complete status flag 70" "Not requested,Requested"
|
|
bitfld.long 0x04 5. " TMTCSTS69 ,Transmit buffer transmit complete status flag 69" "Not requested,Requested"
|
|
bitfld.long 0x04 4. " TMTCSTS68 ,Transmit buffer transmit complete status flag 68" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 3. " TMTCSTS67 ,Transmit buffer transmit complete status flag 67" "Not requested,Requested"
|
|
bitfld.long 0x04 2. " TMTCSTS66 ,Transmit buffer transmit complete status flag 66" "Not requested,Requested"
|
|
bitfld.long 0x04 1. " TMTCSTS65 ,Transmit buffer transmit complete status flag 65" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 0. " TMTCSTS64 ,Transmit buffer transmit complete status flag 64" "Not requested,Requested"
|
|
endif
|
|
rgroup.long 0x380++0x03
|
|
line.long 0x00 "RSCAN0TMTASTS0,Transmit Buffer Transmit Abort Status Register 0"
|
|
bitfld.long 0x00 31. " TMTASTS31 ,Transmit buffer transmit abort status flag 31" "Not aborted,Aborted"
|
|
bitfld.long 0x00 30. " TMTASTS30 ,Transmit buffer transmit abort status flag 30" "Not aborted,Aborted"
|
|
bitfld.long 0x00 29. " TMTASTS29 ,Transmit buffer transmit abort status flag 29" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 28. " TMTASTS28 ,Transmit buffer transmit abort status flag 28" "Not aborted,Aborted"
|
|
bitfld.long 0x00 27. " TMTASTS27 ,Transmit buffer transmit abort status flag 27" "Not aborted,Aborted"
|
|
bitfld.long 0x00 26. " TMTASTS26 ,Transmit buffer transmit abort status flag 26" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 25. " TMTASTS25 ,Transmit buffer transmit abort status flag 25" "Not aborted,Aborted"
|
|
bitfld.long 0x00 24. " TMTASTS24 ,Transmit buffer transmit abort status flag 24" "Not aborted,Aborted"
|
|
bitfld.long 0x00 23. " TMTASTS23 ,Transmit buffer transmit abort status flag 23" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 22. " TMTASTS22 ,Transmit buffer transmit abort status flag 22" "Not aborted,Aborted"
|
|
bitfld.long 0x00 21. " TMTASTS21 ,Transmit buffer transmit abort status flag 21" "Not aborted,Aborted"
|
|
bitfld.long 0x00 20. " TMTASTS20 ,Transmit buffer transmit abort status flag 20" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 19. " TMTASTS19 ,Transmit buffer transmit abort status flag 19" "Not aborted,Aborted"
|
|
bitfld.long 0x00 18. " TMTASTS18 ,Transmit buffer transmit abort status flag 18" "Not aborted,Aborted"
|
|
bitfld.long 0x00 17. " TMTASTS17 ,Transmit buffer transmit abort status flag 17" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 16. " TMTASTS16 ,Transmit buffer transmit abort status flag 16" "Not aborted,Aborted"
|
|
bitfld.long 0x00 15. " TMTASTS15 ,Transmit buffer transmit abort status flag 15" "Not aborted,Aborted"
|
|
bitfld.long 0x00 14. " TMTASTS14 ,Transmit buffer transmit abort status flag 14" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 13. " TMTASTS13 ,Transmit buffer transmit abort status flag 13" "Not aborted,Aborted"
|
|
bitfld.long 0x00 12. " TMTASTS12 ,Transmit buffer transmit abort status flag 12" "Not aborted,Aborted"
|
|
bitfld.long 0x00 11. " TMTASTS11 ,Transmit buffer transmit abort status flag 11" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 10. " TMTASTS10 ,Transmit buffer transmit abort status flag 10" "Not aborted,Aborted"
|
|
bitfld.long 0x00 9. " TMTASTS9 ,Transmit buffer transmit abort status flag 9" "Not aborted,Aborted"
|
|
bitfld.long 0x00 8. " TMTASTS8 ,Transmit buffer transmit abort status flag 8" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 7. " TMTASTS7 ,Transmit buffer transmit abort status flag 7" "Not aborted,Aborted"
|
|
bitfld.long 0x00 6. " TMTASTS6 ,Transmit buffer transmit abort status flag 6" "Not aborted,Aborted"
|
|
bitfld.long 0x00 5. " TMTASTS5 ,Transmit buffer transmit abort status flag 5" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 4. " TMTASTS4 ,Transmit buffer transmit abort status flag 4" "Not aborted,Aborted"
|
|
bitfld.long 0x00 3. " TMTASTS3 ,Transmit buffer transmit abort status flag 3" "Not aborted,Aborted"
|
|
bitfld.long 0x00 2. " TMTASTS2 ,Transmit buffer transmit abort status flag 2" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 1. " TMTASTS1 ,Transmit buffer transmit abort status flag 1" "Not aborted,Aborted"
|
|
bitfld.long 0x00 0. " TMTASTS0 ,Transmit buffer transmit abort status flag 0" "Not aborted,Aborted"
|
|
sif !cpuis("R7S91*")
|
|
rgroup.long 0x384++0x07
|
|
line.long 0x00 "RSCAN0TMTASTS1,Transmit Buffer Transmit Abort Status Register 1"
|
|
bitfld.long 0x00 31. " TMTASTS63 ,Transmit buffer transmit abort status flag 63" "Not aborted,Aborted"
|
|
bitfld.long 0x00 30. " TMTASTS62 ,Transmit buffer transmit abort status flag 62" "Not aborted,Aborted"
|
|
bitfld.long 0x00 29. " TMTASTS61 ,Transmit buffer transmit abort status flag 61" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 28. " TMTASTS60 ,Transmit buffer transmit abort status flag 60" "Not aborted,Aborted"
|
|
bitfld.long 0x00 27. " TMTASTS59 ,Transmit buffer transmit abort status flag 59" "Not aborted,Aborted"
|
|
bitfld.long 0x00 26. " TMTASTS58 ,Transmit buffer transmit abort status flag 58" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 25. " TMTASTS57 ,Transmit buffer transmit abort status flag 57" "Not aborted,Aborted"
|
|
bitfld.long 0x00 24. " TMTASTS56 ,Transmit buffer transmit abort status flag 56" "Not aborted,Aborted"
|
|
bitfld.long 0x00 23. " TMTASTS55 ,Transmit buffer transmit abort status flag 55" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 22. " TMTASTS54 ,Transmit buffer transmit abort status flag 54" "Not aborted,Aborted"
|
|
bitfld.long 0x00 21. " TMTASTS53 ,Transmit buffer transmit abort status flag 53" "Not aborted,Aborted"
|
|
bitfld.long 0x00 20. " TMTASTS52 ,Transmit buffer transmit abort status flag 52" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 19. " TMTASTS51 ,Transmit buffer transmit abort status flag 51" "Not aborted,Aborted"
|
|
bitfld.long 0x00 18. " TMTASTS50 ,Transmit buffer transmit abort status flag 50" "Not aborted,Aborted"
|
|
bitfld.long 0x00 17. " TMTASTS49 ,Transmit buffer transmit abort status flag 49" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 16. " TMTASTS48 ,Transmit buffer transmit abort status flag 48" "Not aborted,Aborted"
|
|
bitfld.long 0x00 15. " TMTASTS47 ,Transmit buffer transmit abort status flag 47" "Not aborted,Aborted"
|
|
bitfld.long 0x00 14. " TMTASTS46 ,Transmit buffer transmit abort status flag 46" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 13. " TMTASTS45 ,Transmit buffer transmit abort status flag 45" "Not aborted,Aborted"
|
|
bitfld.long 0x00 12. " TMTASTS44 ,Transmit buffer transmit abort status flag 44" "Not aborted,Aborted"
|
|
bitfld.long 0x00 11. " TMTASTS43 ,Transmit buffer transmit abort status flag 43" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 10. " TMTASTS42 ,Transmit buffer transmit abort status flag 42" "Not aborted,Aborted"
|
|
bitfld.long 0x00 9. " TMTASTS41 ,Transmit buffer transmit abort status flag 41" "Not aborted,Aborted"
|
|
bitfld.long 0x00 8. " TMTASTS40 ,Transmit buffer transmit abort status flag 40" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 7. " TMTASTS39 ,Transmit buffer transmit abort status flag 39" "Not aborted,Aborted"
|
|
bitfld.long 0x00 6. " TMTASTS38 ,Transmit buffer transmit abort status flag 38" "Not aborted,Aborted"
|
|
bitfld.long 0x00 5. " TMTASTS37 ,Transmit buffer transmit abort status flag 37" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 4. " TMTASTS36 ,Transmit buffer transmit abort status flag 36" "Not aborted,Aborted"
|
|
bitfld.long 0x00 3. " TMTASTS35 ,Transmit buffer transmit abort status flag 35" "Not aborted,Aborted"
|
|
bitfld.long 0x00 2. " TMTASTS34 ,Transmit buffer transmit abort status flag 34" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 1. " TMTASTS33 ,Transmit buffer transmit abort status flag 33" "Not aborted,Aborted"
|
|
bitfld.long 0x00 0. " TMTASTS32 ,Transmit buffer transmit abort status flag 32" "Not aborted,Aborted"
|
|
line.long 0x04 "RSCAN0TMTASTS2,Transmit Buffer Transmit Abort Status Register 2"
|
|
bitfld.long 0x04 15. " TMTASTS79 ,Transmit buffer transmit abort status flag 79" "Not aborted,Aborted"
|
|
bitfld.long 0x04 14. " TMTASTS78 ,Transmit buffer transmit abort status flag 78" "Not aborted,Aborted"
|
|
bitfld.long 0x04 13. " TMTASTS77 ,Transmit buffer transmit abort status flag 77" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x04 12. " TMTASTS76 ,Transmit buffer transmit abort status flag 76" "Not aborted,Aborted"
|
|
bitfld.long 0x04 11. " TMTASTS75 ,Transmit buffer transmit abort status flag 75" "Not aborted,Aborted"
|
|
bitfld.long 0x04 10. " TMTASTS74 ,Transmit buffer transmit abort status flag 74" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x04 9. " TMTASTS73 ,Transmit buffer transmit abort status flag 73" "Not aborted,Aborted"
|
|
bitfld.long 0x04 8. " TMTASTS72 ,Transmit buffer transmit abort status flag 72" "Not aborted,Aborted"
|
|
bitfld.long 0x04 7. " TMTASTS71 ,Transmit buffer transmit abort status flag 71" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x04 6. " TMTASTS70 ,Transmit buffer transmit abort status flag 70" "Not aborted,Aborted"
|
|
bitfld.long 0x04 5. " TMTASTS69 ,Transmit buffer transmit abort status flag 69" "Not aborted,Aborted"
|
|
bitfld.long 0x04 4. " TMTASTS68 ,Transmit buffer transmit abort status flag 68" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x04 3. " TMTASTS67 ,Transmit buffer transmit abort status flag 67" "Not aborted,Aborted"
|
|
bitfld.long 0x04 2. " TMTASTS66 ,Transmit buffer transmit abort status flag 66" "Not aborted,Aborted"
|
|
bitfld.long 0x04 1. " TMTASTS65 ,Transmit buffer transmit abort status flag 65" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x04 0. " TMTASTS64 ,Transmit buffer transmit abort status flag 64" "Not aborted,Aborted"
|
|
endif
|
|
group.long 0x390++0x03
|
|
line.long 0x00 "RSCAN0TMIEC0,Transmit Buffer Interrupt Enable Configuration Register 0"
|
|
bitfld.long 0x00 31. " TMIE31 ,Transmit buffer interrupt enable bit 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TMIE30 ,Transmit buffer interrupt enable bit 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " TMIE29 ,Transmit buffer interrupt enable bit 29" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 28. " TMIE28 ,Transmit buffer interrupt enable bit 28" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " TMIE27 ,Transmit buffer interrupt enable bit 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TMIE26 ,Transmit buffer interrupt enable bit 26" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " TMIE25 ,Transmit buffer interrupt enable bit 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " TMIE24 ,Transmit buffer interrupt enable bit 24" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TMIE23 ,Transmit buffer interrupt enable bit 23" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " TMIE22 ,Transmit buffer interrupt enable bit 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " TMIE21 ,Transmit buffer interrupt enable bit 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TMIE20 ,Transmit buffer interrupt enable bit 20" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TMIE19 ,Transmit buffer interrupt enable bit 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TMIE18 ,Transmit buffer interrupt enable bit 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " TMIE17 ,Transmit buffer interrupt enable bit 17" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16. " TMIE16 ,Transmit buffer interrupt enable bit 16" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " TMIE15 ,Transmit buffer interrupt enable bit 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " TMIE14 ,Transmit buffer interrupt enable bit 14" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 13. " TMIE13 ,Transmit buffer interrupt enable bit 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TMIE12 ,Transmit buffer interrupt enable bit 12" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " TMIE11 ,Transmit buffer interrupt enable bit 11" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 10. " TMIE10 ,Transmit buffer interrupt enable bit 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TMIE9 ,Transmit buffer interrupt enable bit 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TMIE8 ,Transmit buffer interrupt enable bit 8" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " TMIE7 ,Transmit buffer interrupt enable bit 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TMIE6 ,Transmit buffer interrupt enable bit 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TMIE5 ,Transmit buffer interrupt enable bit 5" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 4. " TMIE4 ,Transmit buffer interrupt enable bit 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TMIE3 ,Transmit buffer interrupt enable bit 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TMIE2 ,Transmit buffer interrupt enable bit 2" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " TMIE1 ,Transmit buffer interrupt enable bit 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TMIE0 ,Transmit buffer interrupt enable bit 0" "Disabled,Enabled"
|
|
sif !cpuis("R7S91*")
|
|
group.long 0x394++0x07
|
|
line.long 0x00 "RSCAN0TMIEC1,Transmit Buffer Interrupt Enable Configuration Register 1"
|
|
bitfld.long 0x00 31. " TMIE63 ,Transmit buffer interrupt enable bit 63" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TMIE62 ,Transmit buffer interrupt enable bit 62" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " TMIE61 ,Transmit buffer interrupt enable bit 61" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 28. " TMIE60 ,Transmit buffer interrupt enable bit 60" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " TMIE59 ,Transmit buffer interrupt enable bit 59" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TMIE58 ,Transmit buffer interrupt enable bit 58" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " TMIE57 ,Transmit buffer interrupt enable bit 57" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " TMIE56 ,Transmit buffer interrupt enable bit 56" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TMIE55 ,Transmit buffer interrupt enable bit 55" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " TMIE54 ,Transmit buffer interrupt enable bit 54" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " TMIE53 ,Transmit buffer interrupt enable bit 53" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TMIE52 ,Transmit buffer interrupt enable bit 52" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TMIE51 ,Transmit buffer interrupt enable bit 51" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TMIE50 ,Transmit buffer interrupt enable bit 50" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " TMIE49 ,Transmit buffer interrupt enable bit 49" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16. " TMIE48 ,Transmit buffer interrupt enable bit 48" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " TMIE47 ,Transmit buffer interrupt enable bit 47" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " TMIE46 ,Transmit buffer interrupt enable bit 46" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 13. " TMIE45 ,Transmit buffer interrupt enable bit 45" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TMIE44 ,Transmit buffer interrupt enable bit 44" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " TMIE43 ,Transmit buffer interrupt enable bit 43" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 10. " TMIE42 ,Transmit buffer interrupt enable bit 42" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TMIE41 ,Transmit buffer interrupt enable bit 41" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TMIE40 ,Transmit buffer interrupt enable bit 40" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " TMIE39 ,Transmit buffer interrupt enable bit 39" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TMIE38 ,Transmit buffer interrupt enable bit 38" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TMIE37 ,Transmit buffer interrupt enable bit 37" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 4. " TMIE36 ,Transmit buffer interrupt enable bit 36" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TMIE35 ,Transmit buffer interrupt enable bit 35" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TMIE34 ,Transmit buffer interrupt enable bit 34" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " TMIE33 ,Transmit buffer interrupt enable bit 33" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TMIE32 ,Transmit buffer interrupt enable bit 32" "Disabled,Enabled"
|
|
line.long 0x04 "RSCAN0TMIEC2,Transmit Buffer Interrupt Enable Configuration Register 2"
|
|
bitfld.long 0x04 15. " TMIE79 ,Transmit buffer interrupt enable bit 79" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " TMIE78 ,Transmit buffer interrupt enable bit 78" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " TMIE77 ,Transmit buffer interrupt enable bit 77" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 12. " TMIE76 ,Transmit buffer interrupt enable bit 76" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " TMIE75 ,Transmit buffer interrupt enable bit 75" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " TMIE74 ,Transmit buffer interrupt enable bit 74" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 9. " TMIE73 ,Transmit buffer interrupt enable bit 73" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " TMIE72 ,Transmit buffer interrupt enable bit 72" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " TMIE71 ,Transmit buffer interrupt enable bit 71" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 6. " TMIE70 ,Transmit buffer interrupt enable bit 70" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " TMIE69 ,Transmit buffer interrupt enable bit 69" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " TMIE68 ,Transmit buffer interrupt enable bit 68" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 3. " TMIE67 ,Transmit buffer interrupt enable bit 67" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " TMIE66 ,Transmit buffer interrupt enable bit 66" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " TMIE65 ,Transmit buffer interrupt enable bit 65" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 0. " TMIE64 ,Transmit buffer interrupt enable bit 64" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
if (((per.l(ad:0xE803A000+0x1000))&0x80000000)==0x80000000)
|
|
group.long 0x1000++0x03
|
|
line.long 0x00 "RSCAN0TMID0,Transmit Buffer ID Register 0"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1000++0x03
|
|
line.long 0x00 "RSCAN0TMID0,Transmit Buffer ID Register 0"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1000+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR0,Transmit Buffer Pointer Register 0"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF00,Transmit Buffer Data Field 0 Register 0"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF10,Transmit Buffer Data Field 1 Register 0"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1010))&0x80000000)==0x80000000)
|
|
group.long 0x1010++0x03
|
|
line.long 0x00 "RSCAN0TMID1,Transmit Buffer ID Register 1"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1010++0x03
|
|
line.long 0x00 "RSCAN0TMID1,Transmit Buffer ID Register 1"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1010+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR1,Transmit Buffer Pointer Register 1"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF01,Transmit Buffer Data Field 0 Register 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF11,Transmit Buffer Data Field 1 Register 1"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1020))&0x80000000)==0x80000000)
|
|
group.long 0x1020++0x03
|
|
line.long 0x00 "RSCAN0TMID2,Transmit Buffer ID Register 2"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1020++0x03
|
|
line.long 0x00 "RSCAN0TMID2,Transmit Buffer ID Register 2"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1020+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR2,Transmit Buffer Pointer Register 2"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF02,Transmit Buffer Data Field 0 Register 2"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF12,Transmit Buffer Data Field 1 Register 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1030))&0x80000000)==0x80000000)
|
|
group.long 0x1030++0x03
|
|
line.long 0x00 "RSCAN0TMID3,Transmit Buffer ID Register 3"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1030++0x03
|
|
line.long 0x00 "RSCAN0TMID3,Transmit Buffer ID Register 3"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1030+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR3,Transmit Buffer Pointer Register 3"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF03,Transmit Buffer Data Field 0 Register 3"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF13,Transmit Buffer Data Field 1 Register 3"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1040))&0x80000000)==0x80000000)
|
|
group.long 0x1040++0x03
|
|
line.long 0x00 "RSCAN0TMID4,Transmit Buffer ID Register 4"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1040++0x03
|
|
line.long 0x00 "RSCAN0TMID4,Transmit Buffer ID Register 4"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1040+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR4,Transmit Buffer Pointer Register 4"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF04,Transmit Buffer Data Field 0 Register 4"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF14,Transmit Buffer Data Field 1 Register 4"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1050))&0x80000000)==0x80000000)
|
|
group.long 0x1050++0x03
|
|
line.long 0x00 "RSCAN0TMID5,Transmit Buffer ID Register 5"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1050++0x03
|
|
line.long 0x00 "RSCAN0TMID5,Transmit Buffer ID Register 5"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1050+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR5,Transmit Buffer Pointer Register 5"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF05,Transmit Buffer Data Field 0 Register 5"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF15,Transmit Buffer Data Field 1 Register 5"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1060))&0x80000000)==0x80000000)
|
|
group.long 0x1060++0x03
|
|
line.long 0x00 "RSCAN0TMID6,Transmit Buffer ID Register 6"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1060++0x03
|
|
line.long 0x00 "RSCAN0TMID6,Transmit Buffer ID Register 6"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1060+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR6,Transmit Buffer Pointer Register 6"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF06,Transmit Buffer Data Field 0 Register 6"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF16,Transmit Buffer Data Field 1 Register 6"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1070))&0x80000000)==0x80000000)
|
|
group.long 0x1070++0x03
|
|
line.long 0x00 "RSCAN0TMID7,Transmit Buffer ID Register 7"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1070++0x03
|
|
line.long 0x00 "RSCAN0TMID7,Transmit Buffer ID Register 7"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1070+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR7,Transmit Buffer Pointer Register 7"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF07,Transmit Buffer Data Field 0 Register 7"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF17,Transmit Buffer Data Field 1 Register 7"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1080))&0x80000000)==0x80000000)
|
|
group.long 0x1080++0x03
|
|
line.long 0x00 "RSCAN0TMID8,Transmit Buffer ID Register 8"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1080++0x03
|
|
line.long 0x00 "RSCAN0TMID8,Transmit Buffer ID Register 8"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1080+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR8,Transmit Buffer Pointer Register 8"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF08,Transmit Buffer Data Field 0 Register 8"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF18,Transmit Buffer Data Field 1 Register 8"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1090))&0x80000000)==0x80000000)
|
|
group.long 0x1090++0x03
|
|
line.long 0x00 "RSCAN0TMID9,Transmit Buffer ID Register 9"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1090++0x03
|
|
line.long 0x00 "RSCAN0TMID9,Transmit Buffer ID Register 9"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1090+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR9,Transmit Buffer Pointer Register 9"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF09,Transmit Buffer Data Field 0 Register 9"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF19,Transmit Buffer Data Field 1 Register 9"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x10A0))&0x80000000)==0x80000000)
|
|
group.long 0x10A0++0x03
|
|
line.long 0x00 "RSCAN0TMID10,Transmit Buffer ID Register 10"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x10A0++0x03
|
|
line.long 0x00 "RSCAN0TMID10,Transmit Buffer ID Register 10"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x10A0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR10,Transmit Buffer Pointer Register 10"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF010,Transmit Buffer Data Field 0 Register 10"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF110,Transmit Buffer Data Field 1 Register 10"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x10B0))&0x80000000)==0x80000000)
|
|
group.long 0x10B0++0x03
|
|
line.long 0x00 "RSCAN0TMID11,Transmit Buffer ID Register 11"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x10B0++0x03
|
|
line.long 0x00 "RSCAN0TMID11,Transmit Buffer ID Register 11"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x10B0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR11,Transmit Buffer Pointer Register 11"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF011,Transmit Buffer Data Field 0 Register 11"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF111,Transmit Buffer Data Field 1 Register 11"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x10C0))&0x80000000)==0x80000000)
|
|
group.long 0x10C0++0x03
|
|
line.long 0x00 "RSCAN0TMID12,Transmit Buffer ID Register 12"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x10C0++0x03
|
|
line.long 0x00 "RSCAN0TMID12,Transmit Buffer ID Register 12"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x10C0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR12,Transmit Buffer Pointer Register 12"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF012,Transmit Buffer Data Field 0 Register 12"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF112,Transmit Buffer Data Field 1 Register 12"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x10D0))&0x80000000)==0x80000000)
|
|
group.long 0x10D0++0x03
|
|
line.long 0x00 "RSCAN0TMID13,Transmit Buffer ID Register 13"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x10D0++0x03
|
|
line.long 0x00 "RSCAN0TMID13,Transmit Buffer ID Register 13"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x10D0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR13,Transmit Buffer Pointer Register 13"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF013,Transmit Buffer Data Field 0 Register 13"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF113,Transmit Buffer Data Field 1 Register 13"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x10E0))&0x80000000)==0x80000000)
|
|
group.long 0x10E0++0x03
|
|
line.long 0x00 "RSCAN0TMID14,Transmit Buffer ID Register 14"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x10E0++0x03
|
|
line.long 0x00 "RSCAN0TMID14,Transmit Buffer ID Register 14"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x10E0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR14,Transmit Buffer Pointer Register 14"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF014,Transmit Buffer Data Field 0 Register 14"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF114,Transmit Buffer Data Field 1 Register 14"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x10F0))&0x80000000)==0x80000000)
|
|
group.long 0x10F0++0x03
|
|
line.long 0x00 "RSCAN0TMID15,Transmit Buffer ID Register 15"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x10F0++0x03
|
|
line.long 0x00 "RSCAN0TMID15,Transmit Buffer ID Register 15"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x10F0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR15,Transmit Buffer Pointer Register 15"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF015,Transmit Buffer Data Field 0 Register 15"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF115,Transmit Buffer Data Field 1 Register 15"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1100))&0x80000000)==0x80000000)
|
|
group.long 0x1100++0x03
|
|
line.long 0x00 "RSCAN0TMID16,Transmit Buffer ID Register 16"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1100++0x03
|
|
line.long 0x00 "RSCAN0TMID16,Transmit Buffer ID Register 16"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1100+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR16,Transmit Buffer Pointer Register 16"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF016,Transmit Buffer Data Field 0 Register 16"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF116,Transmit Buffer Data Field 1 Register 16"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1110))&0x80000000)==0x80000000)
|
|
group.long 0x1110++0x03
|
|
line.long 0x00 "RSCAN0TMID17,Transmit Buffer ID Register 17"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1110++0x03
|
|
line.long 0x00 "RSCAN0TMID17,Transmit Buffer ID Register 17"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1110+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR17,Transmit Buffer Pointer Register 17"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF017,Transmit Buffer Data Field 0 Register 17"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF117,Transmit Buffer Data Field 1 Register 17"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1120))&0x80000000)==0x80000000)
|
|
group.long 0x1120++0x03
|
|
line.long 0x00 "RSCAN0TMID18,Transmit Buffer ID Register 18"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1120++0x03
|
|
line.long 0x00 "RSCAN0TMID18,Transmit Buffer ID Register 18"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1120+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR18,Transmit Buffer Pointer Register 18"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF018,Transmit Buffer Data Field 0 Register 18"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF118,Transmit Buffer Data Field 1 Register 18"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1130))&0x80000000)==0x80000000)
|
|
group.long 0x1130++0x03
|
|
line.long 0x00 "RSCAN0TMID19,Transmit Buffer ID Register 19"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1130++0x03
|
|
line.long 0x00 "RSCAN0TMID19,Transmit Buffer ID Register 19"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1130+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR19,Transmit Buffer Pointer Register 19"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF019,Transmit Buffer Data Field 0 Register 19"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF119,Transmit Buffer Data Field 1 Register 19"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1140))&0x80000000)==0x80000000)
|
|
group.long 0x1140++0x03
|
|
line.long 0x00 "RSCAN0TMID20,Transmit Buffer ID Register 20"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1140++0x03
|
|
line.long 0x00 "RSCAN0TMID20,Transmit Buffer ID Register 20"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1140+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR20,Transmit Buffer Pointer Register 20"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF020,Transmit Buffer Data Field 0 Register 20"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF120,Transmit Buffer Data Field 1 Register 20"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1150))&0x80000000)==0x80000000)
|
|
group.long 0x1150++0x03
|
|
line.long 0x00 "RSCAN0TMID21,Transmit Buffer ID Register 21"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1150++0x03
|
|
line.long 0x00 "RSCAN0TMID21,Transmit Buffer ID Register 21"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1150+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR21,Transmit Buffer Pointer Register 21"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF021,Transmit Buffer Data Field 0 Register 21"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF121,Transmit Buffer Data Field 1 Register 21"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1160))&0x80000000)==0x80000000)
|
|
group.long 0x1160++0x03
|
|
line.long 0x00 "RSCAN0TMID22,Transmit Buffer ID Register 22"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1160++0x03
|
|
line.long 0x00 "RSCAN0TMID22,Transmit Buffer ID Register 22"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1160+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR22,Transmit Buffer Pointer Register 22"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF022,Transmit Buffer Data Field 0 Register 22"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF122,Transmit Buffer Data Field 1 Register 22"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1170))&0x80000000)==0x80000000)
|
|
group.long 0x1170++0x03
|
|
line.long 0x00 "RSCAN0TMID23,Transmit Buffer ID Register 23"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1170++0x03
|
|
line.long 0x00 "RSCAN0TMID23,Transmit Buffer ID Register 23"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1170+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR23,Transmit Buffer Pointer Register 23"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF023,Transmit Buffer Data Field 0 Register 23"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF123,Transmit Buffer Data Field 1 Register 23"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1180))&0x80000000)==0x80000000)
|
|
group.long 0x1180++0x03
|
|
line.long 0x00 "RSCAN0TMID24,Transmit Buffer ID Register 24"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1180++0x03
|
|
line.long 0x00 "RSCAN0TMID24,Transmit Buffer ID Register 24"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1180+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR24,Transmit Buffer Pointer Register 24"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF024,Transmit Buffer Data Field 0 Register 24"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF124,Transmit Buffer Data Field 1 Register 24"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1190))&0x80000000)==0x80000000)
|
|
group.long 0x1190++0x03
|
|
line.long 0x00 "RSCAN0TMID25,Transmit Buffer ID Register 25"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1190++0x03
|
|
line.long 0x00 "RSCAN0TMID25,Transmit Buffer ID Register 25"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1190+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR25,Transmit Buffer Pointer Register 25"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF025,Transmit Buffer Data Field 0 Register 25"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF125,Transmit Buffer Data Field 1 Register 25"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x11A0))&0x80000000)==0x80000000)
|
|
group.long 0x11A0++0x03
|
|
line.long 0x00 "RSCAN0TMID26,Transmit Buffer ID Register 26"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x11A0++0x03
|
|
line.long 0x00 "RSCAN0TMID26,Transmit Buffer ID Register 26"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x11A0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR26,Transmit Buffer Pointer Register 26"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF026,Transmit Buffer Data Field 0 Register 26"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF126,Transmit Buffer Data Field 1 Register 26"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x11B0))&0x80000000)==0x80000000)
|
|
group.long 0x11B0++0x03
|
|
line.long 0x00 "RSCAN0TMID27,Transmit Buffer ID Register 27"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x11B0++0x03
|
|
line.long 0x00 "RSCAN0TMID27,Transmit Buffer ID Register 27"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x11B0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR27,Transmit Buffer Pointer Register 27"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF027,Transmit Buffer Data Field 0 Register 27"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF127,Transmit Buffer Data Field 1 Register 27"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x11C0))&0x80000000)==0x80000000)
|
|
group.long 0x11C0++0x03
|
|
line.long 0x00 "RSCAN0TMID28,Transmit Buffer ID Register 28"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x11C0++0x03
|
|
line.long 0x00 "RSCAN0TMID28,Transmit Buffer ID Register 28"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x11C0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR28,Transmit Buffer Pointer Register 28"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF028,Transmit Buffer Data Field 0 Register 28"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF128,Transmit Buffer Data Field 1 Register 28"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x11D0))&0x80000000)==0x80000000)
|
|
group.long 0x11D0++0x03
|
|
line.long 0x00 "RSCAN0TMID29,Transmit Buffer ID Register 29"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x11D0++0x03
|
|
line.long 0x00 "RSCAN0TMID29,Transmit Buffer ID Register 29"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x11D0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR29,Transmit Buffer Pointer Register 29"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF029,Transmit Buffer Data Field 0 Register 29"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF129,Transmit Buffer Data Field 1 Register 29"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x11E0))&0x80000000)==0x80000000)
|
|
group.long 0x11E0++0x03
|
|
line.long 0x00 "RSCAN0TMID30,Transmit Buffer ID Register 30"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x11E0++0x03
|
|
line.long 0x00 "RSCAN0TMID30,Transmit Buffer ID Register 30"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x11E0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR30,Transmit Buffer Pointer Register 30"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF030,Transmit Buffer Data Field 0 Register 30"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF130,Transmit Buffer Data Field 1 Register 30"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x11F0))&0x80000000)==0x80000000)
|
|
group.long 0x11F0++0x03
|
|
line.long 0x00 "RSCAN0TMID31,Transmit Buffer ID Register 31"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x11F0++0x03
|
|
line.long 0x00 "RSCAN0TMID31,Transmit Buffer ID Register 31"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x11F0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR31,Transmit Buffer Pointer Register 31"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF031,Transmit Buffer Data Field 0 Register 31"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF131,Transmit Buffer Data Field 1 Register 31"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1200))&0x80000000)==0x80000000)
|
|
group.long 0x1200++0x03
|
|
line.long 0x00 "RSCAN0TMID32,Transmit Buffer ID Register 32"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1200++0x03
|
|
line.long 0x00 "RSCAN0TMID32,Transmit Buffer ID Register 32"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1200+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR32,Transmit Buffer Pointer Register 32"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF032,Transmit Buffer Data Field 0 Register 32"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF132,Transmit Buffer Data Field 1 Register 32"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1210))&0x80000000)==0x80000000)
|
|
group.long 0x1210++0x03
|
|
line.long 0x00 "RSCAN0TMID33,Transmit Buffer ID Register 33"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1210++0x03
|
|
line.long 0x00 "RSCAN0TMID33,Transmit Buffer ID Register 33"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1210+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR33,Transmit Buffer Pointer Register 33"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF033,Transmit Buffer Data Field 0 Register 33"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF133,Transmit Buffer Data Field 1 Register 33"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1220))&0x80000000)==0x80000000)
|
|
group.long 0x1220++0x03
|
|
line.long 0x00 "RSCAN0TMID34,Transmit Buffer ID Register 34"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1220++0x03
|
|
line.long 0x00 "RSCAN0TMID34,Transmit Buffer ID Register 34"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1220+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR34,Transmit Buffer Pointer Register 34"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF034,Transmit Buffer Data Field 0 Register 34"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF134,Transmit Buffer Data Field 1 Register 34"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1230))&0x80000000)==0x80000000)
|
|
group.long 0x1230++0x03
|
|
line.long 0x00 "RSCAN0TMID35,Transmit Buffer ID Register 35"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1230++0x03
|
|
line.long 0x00 "RSCAN0TMID35,Transmit Buffer ID Register 35"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1230+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR35,Transmit Buffer Pointer Register 35"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF035,Transmit Buffer Data Field 0 Register 35"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF135,Transmit Buffer Data Field 1 Register 35"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1240))&0x80000000)==0x80000000)
|
|
group.long 0x1240++0x03
|
|
line.long 0x00 "RSCAN0TMID36,Transmit Buffer ID Register 36"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1240++0x03
|
|
line.long 0x00 "RSCAN0TMID36,Transmit Buffer ID Register 36"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1240+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR36,Transmit Buffer Pointer Register 36"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF036,Transmit Buffer Data Field 0 Register 36"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF136,Transmit Buffer Data Field 1 Register 36"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1250))&0x80000000)==0x80000000)
|
|
group.long 0x1250++0x03
|
|
line.long 0x00 "RSCAN0TMID37,Transmit Buffer ID Register 37"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1250++0x03
|
|
line.long 0x00 "RSCAN0TMID37,Transmit Buffer ID Register 37"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1250+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR37,Transmit Buffer Pointer Register 37"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF037,Transmit Buffer Data Field 0 Register 37"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF137,Transmit Buffer Data Field 1 Register 37"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1260))&0x80000000)==0x80000000)
|
|
group.long 0x1260++0x03
|
|
line.long 0x00 "RSCAN0TMID38,Transmit Buffer ID Register 38"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1260++0x03
|
|
line.long 0x00 "RSCAN0TMID38,Transmit Buffer ID Register 38"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1260+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR38,Transmit Buffer Pointer Register 38"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF038,Transmit Buffer Data Field 0 Register 38"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF138,Transmit Buffer Data Field 1 Register 38"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1270))&0x80000000)==0x80000000)
|
|
group.long 0x1270++0x03
|
|
line.long 0x00 "RSCAN0TMID39,Transmit Buffer ID Register 39"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1270++0x03
|
|
line.long 0x00 "RSCAN0TMID39,Transmit Buffer ID Register 39"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1270+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR39,Transmit Buffer Pointer Register 39"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF039,Transmit Buffer Data Field 0 Register 39"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF139,Transmit Buffer Data Field 1 Register 39"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1280))&0x80000000)==0x80000000)
|
|
group.long 0x1280++0x03
|
|
line.long 0x00 "RSCAN0TMID40,Transmit Buffer ID Register 40"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1280++0x03
|
|
line.long 0x00 "RSCAN0TMID40,Transmit Buffer ID Register 40"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1280+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR40,Transmit Buffer Pointer Register 40"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF040,Transmit Buffer Data Field 0 Register 40"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF140,Transmit Buffer Data Field 1 Register 40"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1290))&0x80000000)==0x80000000)
|
|
group.long 0x1290++0x03
|
|
line.long 0x00 "RSCAN0TMID41,Transmit Buffer ID Register 41"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1290++0x03
|
|
line.long 0x00 "RSCAN0TMID41,Transmit Buffer ID Register 41"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1290+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR41,Transmit Buffer Pointer Register 41"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF041,Transmit Buffer Data Field 0 Register 41"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF141,Transmit Buffer Data Field 1 Register 41"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x12A0))&0x80000000)==0x80000000)
|
|
group.long 0x12A0++0x03
|
|
line.long 0x00 "RSCAN0TMID42,Transmit Buffer ID Register 42"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x12A0++0x03
|
|
line.long 0x00 "RSCAN0TMID42,Transmit Buffer ID Register 42"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x12A0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR42,Transmit Buffer Pointer Register 42"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF042,Transmit Buffer Data Field 0 Register 42"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF142,Transmit Buffer Data Field 1 Register 42"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x12B0))&0x80000000)==0x80000000)
|
|
group.long 0x12B0++0x03
|
|
line.long 0x00 "RSCAN0TMID43,Transmit Buffer ID Register 43"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x12B0++0x03
|
|
line.long 0x00 "RSCAN0TMID43,Transmit Buffer ID Register 43"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x12B0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR43,Transmit Buffer Pointer Register 43"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF043,Transmit Buffer Data Field 0 Register 43"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF143,Transmit Buffer Data Field 1 Register 43"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x12C0))&0x80000000)==0x80000000)
|
|
group.long 0x12C0++0x03
|
|
line.long 0x00 "RSCAN0TMID44,Transmit Buffer ID Register 44"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x12C0++0x03
|
|
line.long 0x00 "RSCAN0TMID44,Transmit Buffer ID Register 44"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x12C0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR44,Transmit Buffer Pointer Register 44"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF044,Transmit Buffer Data Field 0 Register 44"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF144,Transmit Buffer Data Field 1 Register 44"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x12D0))&0x80000000)==0x80000000)
|
|
group.long 0x12D0++0x03
|
|
line.long 0x00 "RSCAN0TMID45,Transmit Buffer ID Register 45"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x12D0++0x03
|
|
line.long 0x00 "RSCAN0TMID45,Transmit Buffer ID Register 45"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x12D0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR45,Transmit Buffer Pointer Register 45"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF045,Transmit Buffer Data Field 0 Register 45"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF145,Transmit Buffer Data Field 1 Register 45"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x12E0))&0x80000000)==0x80000000)
|
|
group.long 0x12E0++0x03
|
|
line.long 0x00 "RSCAN0TMID46,Transmit Buffer ID Register 46"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x12E0++0x03
|
|
line.long 0x00 "RSCAN0TMID46,Transmit Buffer ID Register 46"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x12E0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR46,Transmit Buffer Pointer Register 46"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF046,Transmit Buffer Data Field 0 Register 46"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF146,Transmit Buffer Data Field 1 Register 46"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x12F0))&0x80000000)==0x80000000)
|
|
group.long 0x12F0++0x03
|
|
line.long 0x00 "RSCAN0TMID47,Transmit Buffer ID Register 47"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x12F0++0x03
|
|
line.long 0x00 "RSCAN0TMID47,Transmit Buffer ID Register 47"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x12F0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR47,Transmit Buffer Pointer Register 47"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF047,Transmit Buffer Data Field 0 Register 47"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF147,Transmit Buffer Data Field 1 Register 47"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1300))&0x80000000)==0x80000000)
|
|
group.long 0x1300++0x03
|
|
line.long 0x00 "RSCAN0TMID48,Transmit Buffer ID Register 48"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1300++0x03
|
|
line.long 0x00 "RSCAN0TMID48,Transmit Buffer ID Register 48"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1300+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR48,Transmit Buffer Pointer Register 48"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF048,Transmit Buffer Data Field 0 Register 48"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF148,Transmit Buffer Data Field 1 Register 48"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1310))&0x80000000)==0x80000000)
|
|
group.long 0x1310++0x03
|
|
line.long 0x00 "RSCAN0TMID49,Transmit Buffer ID Register 49"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1310++0x03
|
|
line.long 0x00 "RSCAN0TMID49,Transmit Buffer ID Register 49"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1310+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR49,Transmit Buffer Pointer Register 49"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF049,Transmit Buffer Data Field 0 Register 49"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF149,Transmit Buffer Data Field 1 Register 49"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1320))&0x80000000)==0x80000000)
|
|
group.long 0x1320++0x03
|
|
line.long 0x00 "RSCAN0TMID50,Transmit Buffer ID Register 50"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1320++0x03
|
|
line.long 0x00 "RSCAN0TMID50,Transmit Buffer ID Register 50"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1320+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR50,Transmit Buffer Pointer Register 50"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF050,Transmit Buffer Data Field 0 Register 50"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF150,Transmit Buffer Data Field 1 Register 50"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1330))&0x80000000)==0x80000000)
|
|
group.long 0x1330++0x03
|
|
line.long 0x00 "RSCAN0TMID51,Transmit Buffer ID Register 51"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1330++0x03
|
|
line.long 0x00 "RSCAN0TMID51,Transmit Buffer ID Register 51"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1330+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR51,Transmit Buffer Pointer Register 51"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF051,Transmit Buffer Data Field 0 Register 51"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF151,Transmit Buffer Data Field 1 Register 51"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1340))&0x80000000)==0x80000000)
|
|
group.long 0x1340++0x03
|
|
line.long 0x00 "RSCAN0TMID52,Transmit Buffer ID Register 52"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1340++0x03
|
|
line.long 0x00 "RSCAN0TMID52,Transmit Buffer ID Register 52"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1340+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR52,Transmit Buffer Pointer Register 52"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF052,Transmit Buffer Data Field 0 Register 52"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF152,Transmit Buffer Data Field 1 Register 52"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1350))&0x80000000)==0x80000000)
|
|
group.long 0x1350++0x03
|
|
line.long 0x00 "RSCAN0TMID53,Transmit Buffer ID Register 53"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1350++0x03
|
|
line.long 0x00 "RSCAN0TMID53,Transmit Buffer ID Register 53"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1350+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR53,Transmit Buffer Pointer Register 53"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF053,Transmit Buffer Data Field 0 Register 53"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF153,Transmit Buffer Data Field 1 Register 53"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1360))&0x80000000)==0x80000000)
|
|
group.long 0x1360++0x03
|
|
line.long 0x00 "RSCAN0TMID54,Transmit Buffer ID Register 54"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1360++0x03
|
|
line.long 0x00 "RSCAN0TMID54,Transmit Buffer ID Register 54"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1360+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR54,Transmit Buffer Pointer Register 54"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF054,Transmit Buffer Data Field 0 Register 54"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF154,Transmit Buffer Data Field 1 Register 54"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1370))&0x80000000)==0x80000000)
|
|
group.long 0x1370++0x03
|
|
line.long 0x00 "RSCAN0TMID55,Transmit Buffer ID Register 55"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1370++0x03
|
|
line.long 0x00 "RSCAN0TMID55,Transmit Buffer ID Register 55"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1370+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR55,Transmit Buffer Pointer Register 55"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF055,Transmit Buffer Data Field 0 Register 55"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF155,Transmit Buffer Data Field 1 Register 55"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1380))&0x80000000)==0x80000000)
|
|
group.long 0x1380++0x03
|
|
line.long 0x00 "RSCAN0TMID56,Transmit Buffer ID Register 56"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1380++0x03
|
|
line.long 0x00 "RSCAN0TMID56,Transmit Buffer ID Register 56"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1380+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR56,Transmit Buffer Pointer Register 56"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF056,Transmit Buffer Data Field 0 Register 56"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF156,Transmit Buffer Data Field 1 Register 56"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1390))&0x80000000)==0x80000000)
|
|
group.long 0x1390++0x03
|
|
line.long 0x00 "RSCAN0TMID57,Transmit Buffer ID Register 57"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1390++0x03
|
|
line.long 0x00 "RSCAN0TMID57,Transmit Buffer ID Register 57"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1390+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR57,Transmit Buffer Pointer Register 57"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF057,Transmit Buffer Data Field 0 Register 57"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF157,Transmit Buffer Data Field 1 Register 57"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x13A0))&0x80000000)==0x80000000)
|
|
group.long 0x13A0++0x03
|
|
line.long 0x00 "RSCAN0TMID58,Transmit Buffer ID Register 58"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x13A0++0x03
|
|
line.long 0x00 "RSCAN0TMID58,Transmit Buffer ID Register 58"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x13A0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR58,Transmit Buffer Pointer Register 58"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF058,Transmit Buffer Data Field 0 Register 58"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF158,Transmit Buffer Data Field 1 Register 58"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x13B0))&0x80000000)==0x80000000)
|
|
group.long 0x13B0++0x03
|
|
line.long 0x00 "RSCAN0TMID59,Transmit Buffer ID Register 59"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x13B0++0x03
|
|
line.long 0x00 "RSCAN0TMID59,Transmit Buffer ID Register 59"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x13B0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR59,Transmit Buffer Pointer Register 59"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF059,Transmit Buffer Data Field 0 Register 59"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF159,Transmit Buffer Data Field 1 Register 59"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x13C0))&0x80000000)==0x80000000)
|
|
group.long 0x13C0++0x03
|
|
line.long 0x00 "RSCAN0TMID60,Transmit Buffer ID Register 60"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x13C0++0x03
|
|
line.long 0x00 "RSCAN0TMID60,Transmit Buffer ID Register 60"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x13C0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR60,Transmit Buffer Pointer Register 60"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF060,Transmit Buffer Data Field 0 Register 60"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF160,Transmit Buffer Data Field 1 Register 60"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x13D0))&0x80000000)==0x80000000)
|
|
group.long 0x13D0++0x03
|
|
line.long 0x00 "RSCAN0TMID61,Transmit Buffer ID Register 61"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x13D0++0x03
|
|
line.long 0x00 "RSCAN0TMID61,Transmit Buffer ID Register 61"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x13D0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR61,Transmit Buffer Pointer Register 61"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF061,Transmit Buffer Data Field 0 Register 61"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF161,Transmit Buffer Data Field 1 Register 61"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x13E0))&0x80000000)==0x80000000)
|
|
group.long 0x13E0++0x03
|
|
line.long 0x00 "RSCAN0TMID62,Transmit Buffer ID Register 62"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x13E0++0x03
|
|
line.long 0x00 "RSCAN0TMID62,Transmit Buffer ID Register 62"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x13E0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR62,Transmit Buffer Pointer Register 62"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF062,Transmit Buffer Data Field 0 Register 62"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF162,Transmit Buffer Data Field 1 Register 62"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x13F0))&0x80000000)==0x80000000)
|
|
group.long 0x13F0++0x03
|
|
line.long 0x00 "RSCAN0TMID63,Transmit Buffer ID Register 63"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x13F0++0x03
|
|
line.long 0x00 "RSCAN0TMID63,Transmit Buffer ID Register 63"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x13F0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR63,Transmit Buffer Pointer Register 63"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF063,Transmit Buffer Data Field 0 Register 63"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF163,Transmit Buffer Data Field 1 Register 63"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1400))&0x80000000)==0x80000000)
|
|
group.long 0x1400++0x03
|
|
line.long 0x00 "RSCAN0TMID64,Transmit Buffer ID Register 64"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1400++0x03
|
|
line.long 0x00 "RSCAN0TMID64,Transmit Buffer ID Register 64"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1400+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR64,Transmit Buffer Pointer Register 64"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF064,Transmit Buffer Data Field 0 Register 64"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF164,Transmit Buffer Data Field 1 Register 64"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1410))&0x80000000)==0x80000000)
|
|
group.long 0x1410++0x03
|
|
line.long 0x00 "RSCAN0TMID65,Transmit Buffer ID Register 65"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1410++0x03
|
|
line.long 0x00 "RSCAN0TMID65,Transmit Buffer ID Register 65"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1410+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR65,Transmit Buffer Pointer Register 65"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF065,Transmit Buffer Data Field 0 Register 65"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF165,Transmit Buffer Data Field 1 Register 65"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1420))&0x80000000)==0x80000000)
|
|
group.long 0x1420++0x03
|
|
line.long 0x00 "RSCAN0TMID66,Transmit Buffer ID Register 66"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1420++0x03
|
|
line.long 0x00 "RSCAN0TMID66,Transmit Buffer ID Register 66"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1420+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR66,Transmit Buffer Pointer Register 66"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF066,Transmit Buffer Data Field 0 Register 66"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF166,Transmit Buffer Data Field 1 Register 66"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1430))&0x80000000)==0x80000000)
|
|
group.long 0x1430++0x03
|
|
line.long 0x00 "RSCAN0TMID67,Transmit Buffer ID Register 67"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1430++0x03
|
|
line.long 0x00 "RSCAN0TMID67,Transmit Buffer ID Register 67"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1430+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR67,Transmit Buffer Pointer Register 67"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF067,Transmit Buffer Data Field 0 Register 67"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF167,Transmit Buffer Data Field 1 Register 67"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1440))&0x80000000)==0x80000000)
|
|
group.long 0x1440++0x03
|
|
line.long 0x00 "RSCAN0TMID68,Transmit Buffer ID Register 68"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1440++0x03
|
|
line.long 0x00 "RSCAN0TMID68,Transmit Buffer ID Register 68"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1440+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR68,Transmit Buffer Pointer Register 68"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF068,Transmit Buffer Data Field 0 Register 68"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF168,Transmit Buffer Data Field 1 Register 68"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1450))&0x80000000)==0x80000000)
|
|
group.long 0x1450++0x03
|
|
line.long 0x00 "RSCAN0TMID69,Transmit Buffer ID Register 69"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1450++0x03
|
|
line.long 0x00 "RSCAN0TMID69,Transmit Buffer ID Register 69"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1450+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR69,Transmit Buffer Pointer Register 69"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF069,Transmit Buffer Data Field 0 Register 69"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF169,Transmit Buffer Data Field 1 Register 69"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1460))&0x80000000)==0x80000000)
|
|
group.long 0x1460++0x03
|
|
line.long 0x00 "RSCAN0TMID70,Transmit Buffer ID Register 70"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1460++0x03
|
|
line.long 0x00 "RSCAN0TMID70,Transmit Buffer ID Register 70"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1460+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR70,Transmit Buffer Pointer Register 70"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF070,Transmit Buffer Data Field 0 Register 70"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF170,Transmit Buffer Data Field 1 Register 70"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1470))&0x80000000)==0x80000000)
|
|
group.long 0x1470++0x03
|
|
line.long 0x00 "RSCAN0TMID71,Transmit Buffer ID Register 71"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1470++0x03
|
|
line.long 0x00 "RSCAN0TMID71,Transmit Buffer ID Register 71"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1470+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR71,Transmit Buffer Pointer Register 71"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF071,Transmit Buffer Data Field 0 Register 71"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF171,Transmit Buffer Data Field 1 Register 71"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1480))&0x80000000)==0x80000000)
|
|
group.long 0x1480++0x03
|
|
line.long 0x00 "RSCAN0TMID72,Transmit Buffer ID Register 72"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1480++0x03
|
|
line.long 0x00 "RSCAN0TMID72,Transmit Buffer ID Register 72"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1480+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR72,Transmit Buffer Pointer Register 72"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF072,Transmit Buffer Data Field 0 Register 72"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF172,Transmit Buffer Data Field 1 Register 72"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x1490))&0x80000000)==0x80000000)
|
|
group.long 0x1490++0x03
|
|
line.long 0x00 "RSCAN0TMID73,Transmit Buffer ID Register 73"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x1490++0x03
|
|
line.long 0x00 "RSCAN0TMID73,Transmit Buffer ID Register 73"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x1490+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR73,Transmit Buffer Pointer Register 73"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF073,Transmit Buffer Data Field 0 Register 73"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF173,Transmit Buffer Data Field 1 Register 73"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x14A0))&0x80000000)==0x80000000)
|
|
group.long 0x14A0++0x03
|
|
line.long 0x00 "RSCAN0TMID74,Transmit Buffer ID Register 74"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x14A0++0x03
|
|
line.long 0x00 "RSCAN0TMID74,Transmit Buffer ID Register 74"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x14A0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR74,Transmit Buffer Pointer Register 74"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF074,Transmit Buffer Data Field 0 Register 74"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF174,Transmit Buffer Data Field 1 Register 74"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x14B0))&0x80000000)==0x80000000)
|
|
group.long 0x14B0++0x03
|
|
line.long 0x00 "RSCAN0TMID75,Transmit Buffer ID Register 75"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x14B0++0x03
|
|
line.long 0x00 "RSCAN0TMID75,Transmit Buffer ID Register 75"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x14B0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR75,Transmit Buffer Pointer Register 75"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF075,Transmit Buffer Data Field 0 Register 75"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF175,Transmit Buffer Data Field 1 Register 75"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x14C0))&0x80000000)==0x80000000)
|
|
group.long 0x14C0++0x03
|
|
line.long 0x00 "RSCAN0TMID76,Transmit Buffer ID Register 76"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x14C0++0x03
|
|
line.long 0x00 "RSCAN0TMID76,Transmit Buffer ID Register 76"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x14C0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR76,Transmit Buffer Pointer Register 76"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF076,Transmit Buffer Data Field 0 Register 76"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF176,Transmit Buffer Data Field 1 Register 76"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x14D0))&0x80000000)==0x80000000)
|
|
group.long 0x14D0++0x03
|
|
line.long 0x00 "RSCAN0TMID77,Transmit Buffer ID Register 77"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x14D0++0x03
|
|
line.long 0x00 "RSCAN0TMID77,Transmit Buffer ID Register 77"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x14D0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR77,Transmit Buffer Pointer Register 77"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF077,Transmit Buffer Data Field 0 Register 77"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF177,Transmit Buffer Data Field 1 Register 77"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x14E0))&0x80000000)==0x80000000)
|
|
group.long 0x14E0++0x03
|
|
line.long 0x00 "RSCAN0TMID78,Transmit Buffer ID Register 78"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x14E0++0x03
|
|
line.long 0x00 "RSCAN0TMID78,Transmit Buffer ID Register 78"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x14E0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR78,Transmit Buffer Pointer Register 78"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF078,Transmit Buffer Data Field 0 Register 78"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF178,Transmit Buffer Data Field 1 Register 78"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
if (((per.l(ad:0xE803A000+0x14F0))&0x80000000)==0x80000000)
|
|
group.long 0x14F0++0x03
|
|
line.long 0x00 "RSCAN0TMID79,Transmit Buffer ID Register 79"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. " TMID ,Transmit buffer ID data"
|
|
else
|
|
group.long 0x14F0++0x03
|
|
line.long 0x00 "RSCAN0TMID79,Transmit Buffer ID Register 79"
|
|
bitfld.long 0x00 31. " TMIDE ,Transmit buffer IDE" "Standard,Extended"
|
|
bitfld.long 0x00 30. " TMRTR ,Transmit buffer RTR" "Data,Remote"
|
|
bitfld.long 0x00 29. " THLEN ,Transmit history data store enable" "Not stored,Stored"
|
|
newline
|
|
hexmask.long 0x00 0.--10. 1. " TMID ,Transmit buffer ID data"
|
|
endif
|
|
group.long (0x14F0+0x04)++0x0B
|
|
line.long 0x00 "RSCAN0TMPTR79,Transmit Buffer Pointer Register 79"
|
|
bitfld.long 0x00 28.--31. " TMDLC ,Transmit buffer DLC data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TMPTR ,Transmit buffer label data"
|
|
line.long 0x04 "RSCAN0TMDF079,Transmit Buffer Data Field 0 Register 79"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TMDB3 ,Transmit buffer data byte 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " TMDB2 ,Transmit buffer data byte 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TMDB1 ,Transmit buffer data byte 1"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " TMDB0 ,Transmit buffer data byte 0"
|
|
line.long 0x08 "RSCAN0TMDF179,Transmit Buffer Data Field 1 Register 79"
|
|
hexmask.long.byte 0x08 24.--31. 1. " TMDB7 ,Transmit buffer data byte 7"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TMDB6 ,Transmit buffer data byte 6"
|
|
hexmask.long.byte 0x08 8.--15. 1. " TMDB5 ,Transmit buffer data byte 5"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " TMDB4 ,Transmit buffer data byte 4"
|
|
newline
|
|
group.long 0x3A0++0x03
|
|
line.long 0x00 "RSCAN0TXQCC0,Transmit Queue Configuration and Control Register 0"
|
|
bitfld.long 0x00 13. " TXQIM ,Transmit queue interrupt source select" "Buffer empty,Msg transmitted"
|
|
bitfld.long 0x00 12. " TXQIE ,Transmit queue interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " TXQDC ,Transmit queue depth configuration" "Disabled,,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. " TXQE ,Transmit queue enable" "Disabled,Enabled"
|
|
group.long 0x3B0++0x03
|
|
line.long 0x00 "RSCAN0TXQCC1,Transmit Queue Configuration and Control Register 1"
|
|
bitfld.long 0x00 13. " TXQIM ,Transmit queue interrupt source select" "Buffer empty,Msg transmitted"
|
|
bitfld.long 0x00 12. " TXQIE ,Transmit queue interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " TXQDC ,Transmit queue depth configuration" "Disabled,,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. " TXQE ,Transmit queue enable" "Disabled,Enabled"
|
|
group.long 0x3C0++0x03
|
|
line.long 0x00 "RSCAN0TXQCC2,Transmit Queue Configuration and Control Register 2"
|
|
bitfld.long 0x00 13. " TXQIM ,Transmit queue interrupt source select" "Buffer empty,Msg transmitted"
|
|
bitfld.long 0x00 12. " TXQIE ,Transmit queue interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " TXQDC ,Transmit queue depth configuration" "Disabled,,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. " TXQE ,Transmit queue enable" "Disabled,Enabled"
|
|
group.long 0x3D0++0x03
|
|
line.long 0x00 "RSCAN0TXQCC3,Transmit Queue Configuration and Control Register 3"
|
|
bitfld.long 0x00 13. " TXQIM ,Transmit queue interrupt source select" "Buffer empty,Msg transmitted"
|
|
bitfld.long 0x00 12. " TXQIE ,Transmit queue interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " TXQDC ,Transmit queue depth configuration" "Disabled,,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. " TXQE ,Transmit queue enable" "Disabled,Enabled"
|
|
group.long 0x3E0++0x03
|
|
line.long 0x00 "RSCAN0TXQCC4,Transmit Queue Configuration and Control Register 4"
|
|
bitfld.long 0x00 13. " TXQIM ,Transmit queue interrupt source select" "Buffer empty,Msg transmitted"
|
|
bitfld.long 0x00 12. " TXQIE ,Transmit queue interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " TXQDC ,Transmit queue depth configuration" "Disabled,,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. " TXQE ,Transmit queue enable" "Disabled,Enabled"
|
|
group.long 0x3C0++0x03
|
|
line.long 0x00 "RSCAN0TXQSTS0,Transmit Queue Status Register 0"
|
|
bitfld.long 0x00 2. " TXQIF ,Transmit queue interrupt request flag" "Not requested,Requested"
|
|
rbitfld.long 0x00 1. " TXQFLL ,Transmit queue full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " TXQEMP ,Transmit queue empty status flag" "Not empty,Empty"
|
|
group.long 0x3C4++0x03
|
|
line.long 0x00 "RSCAN0TXQSTS1,Transmit Queue Status Register 1"
|
|
bitfld.long 0x00 2. " TXQIF ,Transmit queue interrupt request flag" "Not requested,Requested"
|
|
rbitfld.long 0x00 1. " TXQFLL ,Transmit queue full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " TXQEMP ,Transmit queue empty status flag" "Not empty,Empty"
|
|
group.long 0x3C8++0x03
|
|
line.long 0x00 "RSCAN0TXQSTS2,Transmit Queue Status Register 2"
|
|
bitfld.long 0x00 2. " TXQIF ,Transmit queue interrupt request flag" "Not requested,Requested"
|
|
rbitfld.long 0x00 1. " TXQFLL ,Transmit queue full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " TXQEMP ,Transmit queue empty status flag" "Not empty,Empty"
|
|
group.long 0x3CC++0x03
|
|
line.long 0x00 "RSCAN0TXQSTS3,Transmit Queue Status Register 3"
|
|
bitfld.long 0x00 2. " TXQIF ,Transmit queue interrupt request flag" "Not requested,Requested"
|
|
rbitfld.long 0x00 1. " TXQFLL ,Transmit queue full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " TXQEMP ,Transmit queue empty status flag" "Not empty,Empty"
|
|
group.long 0x3D0++0x03
|
|
line.long 0x00 "RSCAN0TXQSTS4,Transmit Queue Status Register 4"
|
|
bitfld.long 0x00 2. " TXQIF ,Transmit queue interrupt request flag" "Not requested,Requested"
|
|
rbitfld.long 0x00 1. " TXQFLL ,Transmit queue full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " TXQEMP ,Transmit queue empty status flag" "Not empty,Empty"
|
|
wgroup.long 0x3E0++0x03
|
|
line.long 0x00 "RSCAN0TXQPCTR0,Transmit Queue Pointer Control Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXQPC ,Transmit queue pointer control"
|
|
wgroup.long 0x3E4++0x03
|
|
line.long 0x00 "RSCAN0TXQPCTR1,Transmit Queue Pointer Control Register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXQPC ,Transmit queue pointer control"
|
|
wgroup.long 0x3E8++0x03
|
|
line.long 0x00 "RSCAN0TXQPCTR2,Transmit Queue Pointer Control Register 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXQPC ,Transmit queue pointer control"
|
|
wgroup.long 0x3EC++0x03
|
|
line.long 0x00 "RSCAN0TXQPCTR3,Transmit Queue Pointer Control Register 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXQPC ,Transmit queue pointer control"
|
|
wgroup.long 0x3F0++0x03
|
|
line.long 0x00 "RSCAN0TXQPCTR4,Transmit Queue Pointer Control Register 4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXQPC ,Transmit queue pointer control"
|
|
newline
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "RSCAN0THLCC0,Transmit History Configuration and Control Register 0"
|
|
bitfld.long 0x00 10. " THLDTE ,Transmit history target buffer select" "FIFO buffers/Transmit queue,Transmit buffers/FIFO/queue"
|
|
bitfld.long 0x00 9. " THLIM ,Transmit history interrupt source select" "12 sets,Single"
|
|
bitfld.long 0x00 8. " THLIE ,Transmit history interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " THLE ,Transmit history buffer enable" "Disabled,Enabled"
|
|
group.long 0x404++0x03
|
|
line.long 0x00 "RSCAN0THLCC1,Transmit History Configuration and Control Register 1"
|
|
bitfld.long 0x00 10. " THLDTE ,Transmit history target buffer select" "FIFO buffers/Transmit queue,Transmit buffers/FIFO/queue"
|
|
bitfld.long 0x00 9. " THLIM ,Transmit history interrupt source select" "12 sets,Single"
|
|
bitfld.long 0x00 8. " THLIE ,Transmit history interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " THLE ,Transmit history buffer enable" "Disabled,Enabled"
|
|
group.long 0x408++0x03
|
|
line.long 0x00 "RSCAN0THLCC2,Transmit History Configuration and Control Register 2"
|
|
bitfld.long 0x00 10. " THLDTE ,Transmit history target buffer select" "FIFO buffers/Transmit queue,Transmit buffers/FIFO/queue"
|
|
bitfld.long 0x00 9. " THLIM ,Transmit history interrupt source select" "12 sets,Single"
|
|
bitfld.long 0x00 8. " THLIE ,Transmit history interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " THLE ,Transmit history buffer enable" "Disabled,Enabled"
|
|
group.long 0x40C++0x03
|
|
line.long 0x00 "RSCAN0THLCC3,Transmit History Configuration and Control Register 3"
|
|
bitfld.long 0x00 10. " THLDTE ,Transmit history target buffer select" "FIFO buffers/Transmit queue,Transmit buffers/FIFO/queue"
|
|
bitfld.long 0x00 9. " THLIM ,Transmit history interrupt source select" "12 sets,Single"
|
|
bitfld.long 0x00 8. " THLIE ,Transmit history interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " THLE ,Transmit history buffer enable" "Disabled,Enabled"
|
|
group.long 0x410++0x03
|
|
line.long 0x00 "RSCAN0THLCC4,Transmit History Configuration and Control Register 4"
|
|
bitfld.long 0x00 10. " THLDTE ,Transmit history target buffer select" "FIFO buffers/Transmit queue,Transmit buffers/FIFO/queue"
|
|
bitfld.long 0x00 9. " THLIM ,Transmit history interrupt source select" "12 sets,Single"
|
|
bitfld.long 0x00 8. " THLIE ,Transmit history interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " THLE ,Transmit history buffer enable" "Disabled,Enabled"
|
|
newline
|
|
group.long 0x420++0x03
|
|
line.long 0x00 "RSCAN0THLSTS0,Transmit History Status Register 0"
|
|
rbitfld.long 0x00 8.--12. " THLMC ,Transmit history buffer unread data counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 3. " THLIF ,Transmit history interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " THLELT ,Transmit history buffer overflow flag" "Not occurred,Occurred"
|
|
newline
|
|
rbitfld.long 0x00 1. " THLFLL ,Transmit history buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " THLEMP ,Transmit history buffer empty status flag" "Not empty,Empty"
|
|
group.long 0x424++0x03
|
|
line.long 0x00 "RSCAN0THLSTS1,Transmit History Status Register 1"
|
|
rbitfld.long 0x00 8.--12. " THLMC ,Transmit history buffer unread data counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 3. " THLIF ,Transmit history interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " THLELT ,Transmit history buffer overflow flag" "Not occurred,Occurred"
|
|
newline
|
|
rbitfld.long 0x00 1. " THLFLL ,Transmit history buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " THLEMP ,Transmit history buffer empty status flag" "Not empty,Empty"
|
|
group.long 0x428++0x03
|
|
line.long 0x00 "RSCAN0THLSTS2,Transmit History Status Register 2"
|
|
rbitfld.long 0x00 8.--12. " THLMC ,Transmit history buffer unread data counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 3. " THLIF ,Transmit history interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " THLELT ,Transmit history buffer overflow flag" "Not occurred,Occurred"
|
|
newline
|
|
rbitfld.long 0x00 1. " THLFLL ,Transmit history buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " THLEMP ,Transmit history buffer empty status flag" "Not empty,Empty"
|
|
group.long 0x42C++0x03
|
|
line.long 0x00 "RSCAN0THLSTS3,Transmit History Status Register 3"
|
|
rbitfld.long 0x00 8.--12. " THLMC ,Transmit history buffer unread data counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 3. " THLIF ,Transmit history interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " THLELT ,Transmit history buffer overflow flag" "Not occurred,Occurred"
|
|
newline
|
|
rbitfld.long 0x00 1. " THLFLL ,Transmit history buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " THLEMP ,Transmit history buffer empty status flag" "Not empty,Empty"
|
|
group.long 0x430++0x03
|
|
line.long 0x00 "RSCAN0THLSTS4,Transmit History Status Register 4"
|
|
rbitfld.long 0x00 8.--12. " THLMC ,Transmit history buffer unread data counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 3. " THLIF ,Transmit history interrupt request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " THLELT ,Transmit history buffer overflow flag" "Not occurred,Occurred"
|
|
newline
|
|
rbitfld.long 0x00 1. " THLFLL ,Transmit history buffer full status flag" "Not full,Full"
|
|
rbitfld.long 0x00 0. " THLEMP ,Transmit history buffer empty status flag" "Not empty,Empty"
|
|
rgroup.long 0x1800++0x03
|
|
line.long 0x00 "RSCAN0THLACC0,Transmit History Access Register 0"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TID ,Label data"
|
|
bitfld.long 0x00 3.--6. " BN ,Buffer number data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " BT ,Buffer type data" ",Transmit buffer,FIFO buffer,,Transmit queue,?..."
|
|
rgroup.long 0x1804++0x03
|
|
line.long 0x00 "RSCAN0THLACC1,Transmit History Access Register 1"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TID ,Label data"
|
|
bitfld.long 0x00 3.--6. " BN ,Buffer number data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " BT ,Buffer type data" ",Transmit buffer,FIFO buffer,,Transmit queue,?..."
|
|
rgroup.long 0x1808++0x03
|
|
line.long 0x00 "RSCAN0THLACC2,Transmit History Access Register 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TID ,Label data"
|
|
bitfld.long 0x00 3.--6. " BN ,Buffer number data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " BT ,Buffer type data" ",Transmit buffer,FIFO buffer,,Transmit queue,?..."
|
|
rgroup.long 0x180C++0x03
|
|
line.long 0x00 "RSCAN0THLACC3,Transmit History Access Register 3"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TID ,Label data"
|
|
bitfld.long 0x00 3.--6. " BN ,Buffer number data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " BT ,Buffer type data" ",Transmit buffer,FIFO buffer,,Transmit queue,?..."
|
|
rgroup.long 0x1810++0x03
|
|
line.long 0x00 "RSCAN0THLACC4,Transmit History Access Register 4"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TID ,Label data"
|
|
bitfld.long 0x00 3.--6. " BN ,Buffer number data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " BT ,Buffer type data" ",Transmit buffer,FIFO buffer,,Transmit queue,?..."
|
|
wgroup.long 0x440++0x03
|
|
line.long 0x00 "RSCAN0THLPCTR0,Transmit History Pointer Control Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " THLPC ,Transmit history list pointer control"
|
|
wgroup.long 0x444++0x03
|
|
line.long 0x00 "RSCAN0THLPCTR1,Transmit History Pointer Control Register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " THLPC ,Transmit history list pointer control"
|
|
wgroup.long 0x448++0x03
|
|
line.long 0x00 "RSCAN0THLPCTR2,Transmit History Pointer Control Register 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " THLPC ,Transmit history list pointer control"
|
|
wgroup.long 0x44C++0x03
|
|
line.long 0x00 "RSCAN0THLPCTR3,Transmit History Pointer Control Register 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " THLPC ,Transmit history list pointer control"
|
|
wgroup.long 0x450++0x03
|
|
line.long 0x00 "RSCAN0THLPCTR4,Transmit History Pointer Control Register 4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " THLPC ,Transmit history list pointer control"
|
|
tree.end
|
|
newline
|
|
width 15.
|
|
group.long 0x468++0x07
|
|
line.long 0x00 "RSCAN0GTSTCFG,Global Test Configuration Register"
|
|
sif cpuis("R7S91*")
|
|
hexmask.long.byte 0x00 16.--22. 1. " RTMPS ,RAM test page configuration"
|
|
endif
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x00 4. " C4ICBCE ,RSCAN4 inter-channel communication test enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " C3ICBCE ,RSCAN3 inter-channel communication test enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 1. " C1ICBCE ,CAN1 inter-channel communication test enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " C0ICBCE ,CAN0 inter-channel communication test enable" "Disabled,Enabled"
|
|
line.long 0x04 "RSCAN0GTSTCTR,Global Test Control Register"
|
|
sif !cpuis("R7S91*")
|
|
bitfld.long 0x04 0. " ICBCTME ,Communication test between channels enable" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x04 2. " RTME ,RAM test enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " ICBCTME ,Communication test between channels enable" "Disabled,Enabled"
|
|
endif
|
|
wgroup.long 0x47C++0x03
|
|
line.long 0x00 "RSCAN0GLOCKK,Global Lock Key Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " LOCK ,Lock key"
|
|
sif cpuis("R7S91*")
|
|
group.long 0x1900++0x03
|
|
line.long 0x00 "RSCAN0RPGACC0,RAM Test Page Access Register 0"
|
|
group.long 0x1904++0x03
|
|
line.long 0x00 "RSCAN0RPGACC1,RAM Test Page Access Register 1"
|
|
group.long 0x1908++0x03
|
|
line.long 0x00 "RSCAN0RPGACC2,RAM Test Page Access Register 2"
|
|
group.long 0x190C++0x03
|
|
line.long 0x00 "RSCAN0RPGACC3,RAM Test Page Access Register 3"
|
|
group.long 0x1910++0x03
|
|
line.long 0x00 "RSCAN0RPGACC4,RAM Test Page Access Register 4"
|
|
group.long 0x1914++0x03
|
|
line.long 0x00 "RSCAN0RPGACC5,RAM Test Page Access Register 5"
|
|
group.long 0x1918++0x03
|
|
line.long 0x00 "RSCAN0RPGACC6,RAM Test Page Access Register 6"
|
|
group.long 0x191C++0x03
|
|
line.long 0x00 "RSCAN0RPGACC7,RAM Test Page Access Register 7"
|
|
group.long 0x1920++0x03
|
|
line.long 0x00 "RSCAN0RPGACC8,RAM Test Page Access Register 8"
|
|
group.long 0x1924++0x03
|
|
line.long 0x00 "RSCAN0RPGACC9,RAM Test Page Access Register 9"
|
|
group.long 0x1928++0x03
|
|
line.long 0x00 "RSCAN0RPGACC10,RAM Test Page Access Register 10"
|
|
group.long 0x192C++0x03
|
|
line.long 0x00 "RSCAN0RPGACC11,RAM Test Page Access Register 11"
|
|
group.long 0x1930++0x03
|
|
line.long 0x00 "RSCAN0RPGACC12,RAM Test Page Access Register 12"
|
|
group.long 0x1934++0x03
|
|
line.long 0x00 "RSCAN0RPGACC13,RAM Test Page Access Register 13"
|
|
group.long 0x1938++0x03
|
|
line.long 0x00 "RSCAN0RPGACC14,RAM Test Page Access Register 14"
|
|
group.long 0x193C++0x03
|
|
line.long 0x00 "RSCAN0RPGACC15,RAM Test Page Access Register 15"
|
|
group.long 0x1940++0x03
|
|
line.long 0x00 "RSCAN0RPGACC16,RAM Test Page Access Register 16"
|
|
group.long 0x1944++0x03
|
|
line.long 0x00 "RSCAN0RPGACC17,RAM Test Page Access Register 17"
|
|
group.long 0x1948++0x03
|
|
line.long 0x00 "RSCAN0RPGACC18,RAM Test Page Access Register 18"
|
|
group.long 0x194C++0x03
|
|
line.long 0x00 "RSCAN0RPGACC19,RAM Test Page Access Register 19"
|
|
group.long 0x1950++0x03
|
|
line.long 0x00 "RSCAN0RPGACC20,RAM Test Page Access Register 20"
|
|
group.long 0x1954++0x03
|
|
line.long 0x00 "RSCAN0RPGACC21,RAM Test Page Access Register 21"
|
|
group.long 0x1958++0x03
|
|
line.long 0x00 "RSCAN0RPGACC22,RAM Test Page Access Register 22"
|
|
group.long 0x195C++0x03
|
|
line.long 0x00 "RSCAN0RPGACC23,RAM Test Page Access Register 23"
|
|
group.long 0x1960++0x03
|
|
line.long 0x00 "RSCAN0RPGACC24,RAM Test Page Access Register 24"
|
|
group.long 0x1964++0x03
|
|
line.long 0x00 "RSCAN0RPGACC25,RAM Test Page Access Register 25"
|
|
group.long 0x1968++0x03
|
|
line.long 0x00 "RSCAN0RPGACC26,RAM Test Page Access Register 26"
|
|
group.long 0x196C++0x03
|
|
line.long 0x00 "RSCAN0RPGACC27,RAM Test Page Access Register 27"
|
|
group.long 0x1970++0x03
|
|
line.long 0x00 "RSCAN0RPGACC28,RAM Test Page Access Register 28"
|
|
group.long 0x1974++0x03
|
|
line.long 0x00 "RSCAN0RPGACC29,RAM Test Page Access Register 29"
|
|
group.long 0x1978++0x03
|
|
line.long 0x00 "RSCAN0RPGACC30,RAM Test Page Access Register 30"
|
|
group.long 0x197C++0x03
|
|
line.long 0x00 "RSCAN0RPGACC31,RAM Test Page Access Register 31"
|
|
group.long 0x1980++0x03
|
|
line.long 0x00 "RSCAN0RPGACC32,RAM Test Page Access Register 32"
|
|
group.long 0x1984++0x03
|
|
line.long 0x00 "RSCAN0RPGACC33,RAM Test Page Access Register 33"
|
|
group.long 0x1988++0x03
|
|
line.long 0x00 "RSCAN0RPGACC34,RAM Test Page Access Register 34"
|
|
group.long 0x198C++0x03
|
|
line.long 0x00 "RSCAN0RPGACC35,RAM Test Page Access Register 35"
|
|
group.long 0x1990++0x03
|
|
line.long 0x00 "RSCAN0RPGACC36,RAM Test Page Access Register 36"
|
|
group.long 0x1994++0x03
|
|
line.long 0x00 "RSCAN0RPGACC37,RAM Test Page Access Register 37"
|
|
group.long 0x1998++0x03
|
|
line.long 0x00 "RSCAN0RPGACC38,RAM Test Page Access Register 38"
|
|
group.long 0x199C++0x03
|
|
line.long 0x00 "RSCAN0RPGACC39,RAM Test Page Access Register 39"
|
|
group.long 0x19A0++0x03
|
|
line.long 0x00 "RSCAN0RPGACC40,RAM Test Page Access Register 40"
|
|
group.long 0x19A4++0x03
|
|
line.long 0x00 "RSCAN0RPGACC41,RAM Test Page Access Register 41"
|
|
group.long 0x19A8++0x03
|
|
line.long 0x00 "RSCAN0RPGACC42,RAM Test Page Access Register 42"
|
|
group.long 0x19AC++0x03
|
|
line.long 0x00 "RSCAN0RPGACC43,RAM Test Page Access Register 43"
|
|
group.long 0x19B0++0x03
|
|
line.long 0x00 "RSCAN0RPGACC44,RAM Test Page Access Register 44"
|
|
group.long 0x19B4++0x03
|
|
line.long 0x00 "RSCAN0RPGACC45,RAM Test Page Access Register 45"
|
|
group.long 0x19B8++0x03
|
|
line.long 0x00 "RSCAN0RPGACC46,RAM Test Page Access Register 46"
|
|
group.long 0x19BC++0x03
|
|
line.long 0x00 "RSCAN0RPGACC47,RAM Test Page Access Register 47"
|
|
group.long 0x19C0++0x03
|
|
line.long 0x00 "RSCAN0RPGACC48,RAM Test Page Access Register 48"
|
|
group.long 0x19C4++0x03
|
|
line.long 0x00 "RSCAN0RPGACC49,RAM Test Page Access Register 49"
|
|
group.long 0x19C8++0x03
|
|
line.long 0x00 "RSCAN0RPGACC50,RAM Test Page Access Register 50"
|
|
group.long 0x19CC++0x03
|
|
line.long 0x00 "RSCAN0RPGACC51,RAM Test Page Access Register 51"
|
|
group.long 0x19D0++0x03
|
|
line.long 0x00 "RSCAN0RPGACC52,RAM Test Page Access Register 52"
|
|
group.long 0x19D4++0x03
|
|
line.long 0x00 "RSCAN0RPGACC53,RAM Test Page Access Register 53"
|
|
group.long 0x19D8++0x03
|
|
line.long 0x00 "RSCAN0RPGACC54,RAM Test Page Access Register 54"
|
|
group.long 0x19DC++0x03
|
|
line.long 0x00 "RSCAN0RPGACC55,RAM Test Page Access Register 55"
|
|
group.long 0x19E0++0x03
|
|
line.long 0x00 "RSCAN0RPGACC56,RAM Test Page Access Register 56"
|
|
group.long 0x19E4++0x03
|
|
line.long 0x00 "RSCAN0RPGACC57,RAM Test Page Access Register 57"
|
|
group.long 0x19E8++0x03
|
|
line.long 0x00 "RSCAN0RPGACC58,RAM Test Page Access Register 58"
|
|
group.long 0x19EC++0x03
|
|
line.long 0x00 "RSCAN0RPGACC59,RAM Test Page Access Register 59"
|
|
group.long 0x19F0++0x03
|
|
line.long 0x00 "RSCAN0RPGACC60,RAM Test Page Access Register 60"
|
|
group.long 0x19F4++0x03
|
|
line.long 0x00 "RSCAN0RPGACC61,RAM Test Page Access Register 61"
|
|
group.long 0x19F8++0x03
|
|
line.long 0x00 "RSCAN0RPGACC62,RAM Test Page Access Register 62"
|
|
group.long 0x19FC++0x03
|
|
line.long 0x00 "RSCAN0RPGACC63,RAM Test Page Access Register 63"
|
|
group.long 0x03000++0x03
|
|
line.long 0x00 "ECCRCANCTL,RSCAN ECC Control Register"
|
|
rbitfld.long 0x00 31. " ECDEDF7 ,2-bit ECC error detection flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 30. " ECSEDF7 ,1-bit ECC error detection flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 29. " ECDEDF6 ,2-bit ECC error detection flag" "Not occurred,Occurred"
|
|
newline
|
|
rbitfld.long 0x00 28. " ECSEDF6 ,1-bit ECC error detection flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 27. " ECDEDF5 ,2-bit ECC error detection flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 26. " ECSEDF5 ,1-bit ECC error detection flag" "Not occurred,Occurred"
|
|
newline
|
|
rbitfld.long 0x00 25. " ECDEDF4 ,2-bit ECC error detection flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 24. " ECSEDF4 ,1-bit ECC error detection flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 23. " ECDEDF3 ,2-bit ECC error detection flag" "Not occurred,Occurred"
|
|
newline
|
|
rbitfld.long 0x00 22. " ECSEDF3 ,1-bit ECC error detection flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 21. " ECDEDF2 ,2-bit ECC error detection flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 20. " ECSEDF2 ,1-bit ECC error detection flag" "Not occurred,Occurred"
|
|
newline
|
|
rbitfld.long 0x00 19. " ECDEDF1 ,2-bit ECC error detection flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 18. " ECSEDF1 ,1-bit ECC error detection flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 17. " ECDEDF0 ,2-bit ECC error detection flag" "Not occurred,Occurred"
|
|
newline
|
|
rbitfld.long 0x00 16. " ECSEDF0 ,1-bit ECC error detection flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 15. " EMCA1 ,Access control 1 to ECC mode selection" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EMCA0 ,Access control 0 to ECC mode selection" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 11. " ECOVFF ,ECC overflow detection flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " ECER2C ,2-bit ECC error detection flag clear" "Not cleared,Cleared"
|
|
bitfld.long 0x00 9. " ECER1C ,1-bit ECC error detection flag clear" "Not cleared,Cleared"
|
|
newline
|
|
bitfld.long 0x00 7. " ECTHM ,ECC function through mode select" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " ECERVF ,ECC error detection enable flag" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EC1ECP ,1-bit error correction enable" "Corrected,Not corrected"
|
|
newline
|
|
bitfld.long 0x00 4. " EC2EDIC ,2-bit error detection interrupt control" "Not output,Output"
|
|
bitfld.long 0x00 3. " EC1EDIC ,2-bit error detection interrupt control" "Not output,Output"
|
|
rbitfld.long 0x00 2. " ECER2F ,2-bit error detection flag" "Not occurred,Occurred"
|
|
newline
|
|
rbitfld.long 0x00 1. " ECER1F ,1-bit error detection flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 0. " ECEMF ,ECC error indication flag" "Not occurred,Occurred"
|
|
rgroup.long 0x3010++0x03
|
|
line.long 0x00 "ECCRCANEAD0,RSCAN ECC Error Address Register 0"
|
|
hexmask.long.word 0x00 0.--10. 1. " ECEAD0 ,ECC error address storage"
|
|
rgroup.long 0x3014++0x03
|
|
line.long 0x00 "ECCRCANEAD1,RSCAN ECC Error Address Register 1"
|
|
hexmask.long.word 0x00 0.--10. 1. " ECEAD1 ,ECC error address storage"
|
|
rgroup.long 0x3018++0x03
|
|
line.long 0x00 "ECCRCANEAD2,RSCAN ECC Error Address Register 2"
|
|
hexmask.long.word 0x00 0.--10. 1. " ECEAD2 ,ECC error address storage"
|
|
rgroup.long 0x301C++0x03
|
|
line.long 0x00 "ECCRCANEAD3,RSCAN ECC Error Address Register 3"
|
|
hexmask.long.word 0x00 0.--10. 1. " ECEAD3 ,ECC error address storage"
|
|
rgroup.long 0x3020++0x03
|
|
line.long 0x00 "ECCRCANEAD4,RSCAN ECC Error Address Register 4"
|
|
hexmask.long.word 0x00 0.--10. 1. " ECEAD4 ,ECC error address storage"
|
|
rgroup.long 0x3024++0x03
|
|
line.long 0x00 "ECCRCANEAD5,RSCAN ECC Error Address Register 5"
|
|
hexmask.long.word 0x00 0.--10. 1. " ECEAD5 ,ECC error address storage"
|
|
rgroup.long 0x3028++0x03
|
|
line.long 0x00 "ECCRCANEAD6,RSCAN ECC Error Address Register 6"
|
|
hexmask.long.word 0x00 0.--10. 1. " ECEAD6 ,ECC error address storage"
|
|
rgroup.long 0x302C++0x03
|
|
line.long 0x00 "ECCRCANEAD7,RSCAN ECC Error Address Register 7"
|
|
hexmask.long.word 0x00 0.--10. 1. " ECEAD7 ,ECC error address storage"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "IEBB (IEBus Controller)"
|
|
base ad:0xFCFEF000
|
|
width 6.
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "BCR,IEBB bus control register"
|
|
bitfld.byte 0x00 7. " PW ,Communication enable flag" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " MSRQ ,Master request flag" "Not requested,Requested"
|
|
bitfld.byte 0x00 5. " ALRQ ,Broadcast request flag" "Individual,Broadcast"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " STXE ,Slave transmission enable flag" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " SRXE ,Slave reception enable flag" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
if (((per.b(ad:0xFCFEF000))&0x80)==0x0)
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "PSR,IEBB power save register"
|
|
bitfld.byte 0x00 7. " CLKE ,Operation clock enable flag" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " CMD ,Communication mode setting flag" "Mode 1,Mode 2"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "UAR,IEBB unit address register"
|
|
hexmask.word 0x00 0.--11. 1. " UAR[11:0] ,IEBB unit address register"
|
|
group.word 0x0C++0x1
|
|
line.word 0x00 "SAR,IEBB slave address register"
|
|
hexmask.word 0x00 0.--11. 1. " SAR[11:0] ,IEBB slave address register"
|
|
else
|
|
rgroup.byte 0x04++0x0
|
|
line.byte 0x00 "PSR,IEBB power save register"
|
|
bitfld.byte 0x00 7. " CLKE ,Operation clock enable flag" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " CMD ,Communication mode setting flag" "Mode 1,Mode 2"
|
|
rgroup.word 0x08++0x1
|
|
line.word 0x00 "UAR,IEBB unit address register"
|
|
hexmask.word 0x00 0.--11. 1. " UAR[11:0] ,IEBB unit address register"
|
|
group.word 0x0C++0x1
|
|
line.word 0x00 "SAR,IEBB slave address register"
|
|
hexmask.word 0x00 0.--11. 1. " SAR[11:0] ,IEBB slave address register"
|
|
endif
|
|
else
|
|
group.byte 0x04++0x0
|
|
line.byte 0x00 "PSR,IEBB power save register"
|
|
bitfld.byte 0x00 7. " CLKE ,Operation clock enable flag" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " CMD ,Communication mode setting flag" "Mode 1,Mode 2"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "UAR,IEBB unit address register"
|
|
group.word 0x0C++0x1
|
|
line.word 0x00 "SAR,IEBB slave address register"
|
|
endif
|
|
rgroup.word 0x10++0x1
|
|
line.word 0x00 "PAR,IEBB partner address register"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.word 0x00 0.--11. 1. " PAR[11:0] ,IEBB partner address register"
|
|
endif
|
|
rgroup.word 0x14++0x1
|
|
line.word 0x00 "RSA,IEBB reception slave address register"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.word 0x00 0.--11. 1. " RSA[11:0] ,IEBB reception slave address register"
|
|
endif
|
|
group.byte 0x18++0x0
|
|
line.byte 0x00 "CDR,IEBB control data register"
|
|
bitfld.byte 0x00 3. " SLCD3 ,SLCD3" "0,1"
|
|
bitfld.byte 0x00 2. " SLCD2 ,SLCD2" "0,1"
|
|
bitfld.byte 0x00 1. " SLCD1 ,SLCD1" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " SLCD0 ,SLCD0" "0,1"
|
|
group.byte 0x1C++0x0
|
|
line.byte 0x00 "TCD,IEBB transmission control data register"
|
|
bitfld.byte 0x00 0.--3. " SLTD ,Control data specify" "Read slave status,,,Data reading and locking,Lock address reading (lower 8 bits),Lock address reading (higher 4 bits),Slave status reading and unlocking,Read data,,,Command writing and locking,Data writing and locking,,,Write command,Write data"
|
|
rgroup.byte 0x20++0x0
|
|
line.byte 0x00 "RCD,IEBB reception control data register"
|
|
bitfld.byte 0x00 0.--3. " SLRD ,Specify the control data received by using the control field" "Read slave status,,,Data reading and locking,Lock address reading (lower 8 bits),Lock address reading (higher 4 bits),Slave status reading and unlocking,Read data,,,Command writing and locking,Data writing and locking,,,Write command,Write data"
|
|
group.byte 0x24++0x0
|
|
line.byte 0x00 "DLR,IEBB message length register"
|
|
group.byte 0x28++0x0
|
|
line.byte 0x00 "TDL,IEBB transmission message length register"
|
|
rgroup.byte 0x2C++0x0
|
|
line.byte 0x00 "RDL,IEBB reception message length register"
|
|
sif (cpu()=="R7S721021")
|
|
if ((((per.b(ad:0xFCFEF000))&0x80)==0x0)&&(((per.b(ad:0xFCFEF000))&0x80)==0x0))
|
|
group.byte 0x30++0x0
|
|
line.byte 0x00 "CKS,IEBB clock selection register"
|
|
bitfld.byte 0x00 4. " PRS ,Specify the prescaler output (PRSOUT)" "1,2"
|
|
bitfld.byte 0x00 0.--2. " BRS ,Specify the operation clock output (MCK)" "/1,/1,/2,/3,/4,/5,/6,/7"
|
|
else
|
|
rgroup.byte 0x30++0x0
|
|
line.byte 0x00 "CKS,IEBB clock selection register"
|
|
bitfld.byte 0x00 4. " PRS ,Specify the prescaler output (PRSOUT)" "1,2"
|
|
bitfld.byte 0x00 0.--2. " BRS ,Specify the operation clock output (MCK)" "/1,/1,/2,/3,/4,/5,/6,/7"
|
|
endif
|
|
else
|
|
group.byte 0x30++0x0
|
|
line.byte 0x00 "CKS,IEBB clock selection register"
|
|
bitfld.byte 0x00 4. " PRS ,Specify the prescaler output (PRSOUT)" "1,2"
|
|
bitfld.byte 0x00 0.--2. " BRS ,Specify the operation clock output (MCK)" "/1,/1,/2,/3,/4,/5,/6,/7"
|
|
endif
|
|
sif (cpu()=="R7S721021")
|
|
if (((per.b(ad:0xFCFEF000))&0x80)==0x0)
|
|
group.byte 0x34++0x0
|
|
line.byte 0x00 "TMS,IEBB transfer mode setting register"
|
|
bitfld.byte 0x00 7. " FMDE ,Specify whether to enable or disable FIFO mode operation" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5.--6. " SLRI ,Specify the IEBBTV occurrence timing during FIFO mode reception" "32 bytes,24 bytes,16 bytes,8 bytes"
|
|
bitfld.byte 0x00 3.--4. " SLTI ,Specify the IEBBTD occurrence timing during FIFO mode transmission" "Empty,2 bytes,4 bytes,8 bytes"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " ALC ,Specify the arbitration loss number" ",1,,3,,,,"
|
|
else
|
|
rgroup.byte 0x34++0x0
|
|
line.byte 0x00 "TMS,IEBB transfer mode setting register"
|
|
bitfld.byte 0x00 7. " FMDE ,Specify whether to enable or disable FIFO mode operation" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5.--6. " SLRI ,Specify the IEBBTV occurrence timing during FIFO mode reception" "32 bytes,24 bytes,16 bytes,8 bytes"
|
|
bitfld.byte 0x00 3.--4. " SLTI ,Specify the IEBBTD occurrence timing during FIFO mode transmission" "Empty,2 bytes,4 bytes,8 bytes"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " ALC ,Specify the arbitration loss number" ",1,,3,,,,"
|
|
endif
|
|
else
|
|
group.byte 0x34++0x0
|
|
line.byte 0x00 "TMS,IEBB transfer mode setting register"
|
|
bitfld.byte 0x00 7. " FMDE ,Specify whether to enable or disable FIFO mode operation" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5.--6. " SLRI ,Specify the IEBBTV occurrence timing during FIFO mode reception" "32 bytes,24 bytes,16 bytes,8 bytes"
|
|
bitfld.byte 0x00 3.--4. " SLTI ,Specify the IEBBTD occurrence timing during FIFO mode transmission" "Empty,2 bytes,4 bytes,8 bytes"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " ALC ,Specify the arbitration loss number" ",1,,3,,,,"
|
|
endif
|
|
wgroup.byte 0x38++0x0
|
|
line.byte 0x00 "PCR,IEBB pointer clear register"
|
|
bitfld.byte 0x00 7. " CRPT ,Clear trigger bit for the store pointer and read pointer of the reception FIFO buffer" "No effect,Clear"
|
|
bitfld.byte 0x00 6. " CTPT ,Clear the trigger bit for the write pointer and load pointer of the transmission FIFO buffer" "No effect,Clear"
|
|
rgroup.word 0x3C++0x1
|
|
line.word 0x00 "BSR,IEBB buffer status register"
|
|
bitfld.word 0x00 15. " RFLF ,Reception FIFO buffer full status flag" "< 32 bytes,32 bytes"
|
|
bitfld.word 0x00 14. " FOVR ,FIFO buffer over-reading reception" "Not occurred,Occurred"
|
|
bitfld.word 0x00 8.--12. " SRFP ,Number of remaining data bytes in FIFO buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.word 0x00 7. " TFLF ,Transmission FIFO buffer full status flag" "< 32 bytes,32 bytes"
|
|
bitfld.word 0x00 6. " FOVW ,Transmission FIFO buffer overwrite flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 0.--4. " STFP ,Number of remaining data bytes in FIFO buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.byte 0x40++0x0
|
|
line.byte 0x00 "SSR,IEBB slave status register"
|
|
bitfld.byte 0x00 4. " SSLF ,Slave transmission status flag" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STLF ,Lock status flag" "Not locked,Locked"
|
|
bitfld.byte 0x00 1. " SRXF ,IEBBDR register or FIFO buffer reception status flag" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " STXF ,IEBBDR register or FIFO buffer transmission status flag" "Not transferred,Transferred"
|
|
rgroup.byte 0x44++0x0
|
|
line.byte 0x00 "USR,IEBB unit status register"
|
|
bitfld.byte 0x00 6. " SRQF ,Slave request flag for the unit" "Not requested,Requested"
|
|
bitfld.byte 0x00 5. " ARBF ,Arbitration result flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " ALTF ,Broadcast communication flag" "Individual,Broadcast"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " ACKF ,Acknowledge transmission flag" "NACK,|ACK"
|
|
bitfld.byte 0x00 2. " LCKF ,Lock status flag" "Not locked,Locked"
|
|
group.byte 0x48++0x0
|
|
line.byte 0x00 "ISR,IEBB interrupt status register"
|
|
bitfld.byte 0x00 6. " IEBE ,Communication error flag" "Not occurred,Occurred"
|
|
rbitfld.byte 0x00 5. " STRF ,Start interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.byte 0x00 4. " STSF ,Status transmission flag (slave)" "Not requested,Requested"
|
|
textline " "
|
|
rbitfld.byte 0x00 3. " ETRF ,Communication completion flag" "Not finished,Finished"
|
|
rbitfld.byte 0x00 2. " EFMF ,Frame completion flag" "Not finished,Finished"
|
|
rbitfld.byte 0x00 0. " FOVE ,Frame over error flag" "Not occurred,Occurred"
|
|
rgroup.byte 0x4C++0x0
|
|
line.byte 0x00 "ESR,IEBB error status register"
|
|
bitfld.byte 0x00 7. " TIME ,Timing error occurrence flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 6. " PARE ,Parity error occurrence flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 5. " NACE ,NACK reception error flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " UNRE ,NACK reception error flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 3. " OVRE ,Overrun error occurrence flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 1. " ABTE ,Arbitration loss error occurrence flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " TRDE ,Inter-third-party communication error occurrence flag" "Communication targeting,Inter-third-party communication"
|
|
rgroup.byte 0x50++0x0
|
|
line.byte 0x00 "FSR,IEBB field status register"
|
|
bitfld.byte 0x00 7. " RTRF ,Reception communication completion flag" "Not finished,Finished"
|
|
bitfld.byte 0x00 6. " TTRF ,Transmission communication completion flag" "Not finished,Finished"
|
|
bitfld.byte 0x00 0.--1. " SSFS ,Field status" "Slave reception,Slave transmission,Master reception,Master transmission"
|
|
rgroup.byte 0x54++0x0
|
|
line.byte 0x00 "SCR,IEBB success count register"
|
|
rgroup.byte 0x58++0x0
|
|
line.byte 0x00 "CCR,IEBB communication count register"
|
|
wgroup.byte 0x5C++0x0
|
|
line.byte 0x00 "STC0,IEBB status clear register 0"
|
|
bitfld.byte 0x00 7. " CLTM ,Timing error flag clear" "No effect,Clear"
|
|
bitfld.byte 0x00 6. " CLPA ,Parity error flag clear" "No effect,Clear"
|
|
bitfld.byte 0x00 5. " CLNC ,NACK reception error flag clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " CLUR ,Underrun error flag clear" "No effect,Clear"
|
|
bitfld.byte 0x00 3. " CLOV ,Overrun error flag clear" "No effect,Clear"
|
|
bitfld.byte 0x00 1. " CLAB ,Arbitration loss error flag clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " CLTR ,Inter-third-party communication error flag clear" "No effect,Clear"
|
|
wgroup.byte 0x60++0x0
|
|
line.byte 0x00 "STC1,IEBB status clear register 1"
|
|
bitfld.byte 0x00 0. " CLFF ,Frame over error flag clear" "No effect,Clear"
|
|
group.byte 0x64++0x0
|
|
line.byte 0x00 "DR,IEBB data register"
|
|
width 0xB
|
|
tree.end
|
|
tree "Renesas SPDIF Interface"
|
|
base ad:0xFFFFD800
|
|
width 6.
|
|
tree "Channel 0 (Transmit Registers)"
|
|
wgroup.long 0x00++0x07
|
|
line.long 0x00 "TLCA,Transmitter Channel 1 Audio Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " APCMD ,Audio PCM Data"
|
|
line.long 0x04 "TRCA,Transmitter Channel 2 Audio Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " APCMD ,Audio PCM Data"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "TUI,Transmitter User Data Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " UB4 ,User Byte 4"
|
|
hexmask.long.byte 0x00 16.--23. 1. " UB3 ,User Byte 3"
|
|
hexmask.long.byte 0x00 8.--15. 1. " UB2 ,User Byte 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UB1 ,User Byte 1"
|
|
wgroup.long 0x08++0x07
|
|
line.long 0x00 "TLCS,Transmitter Channel 1 Status Register"
|
|
bitfld.long 0x00 28.--29. " CLAC[1:0] ,Clock Accuracy" "Level 2,Level 1,Level 3,"
|
|
bitfld.long 0x00 24.--27. " FS[3:0] ,Sample Frequency" "44.1 kHz,,48 kHz,32 kHz,,,,,,,,,,,,"
|
|
bitfld.long 0x00 20.--23. " CHNO[3:0] ,Channel Number" "Any,A,B,C,,,,,,,,,,,,"
|
|
bitfld.long 0x00 16.--19. " SRCNO[3:0] ,Source Number" "Any,1,2,3,,,,,,,,,,,,"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CATCD[7:0] ,Category Code"
|
|
bitfld.long 0x00 1.--5. " CTL[4:0] ,Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "TRCS,Transmitter Channel 2 Status Register"
|
|
bitfld.long 0x04 28.--29. " CLAC[1:0] ,Clock Accuracy" "Level 2,Level 1,Level 3,"
|
|
bitfld.long 0x04 24.--27. " FS[3:0] ,Sample Frequency" "44.1 kHz,,48 kHz,32 kHz,,,,,,,,,,,,"
|
|
bitfld.long 0x04 20.--23. " CHNO[3:0] ,Channel Number" "Any,A,B,C,,,,,,,,,,,,"
|
|
bitfld.long 0x04 16.--19. " SRCNO[3:0] ,Source Number" "Any,1,2,3,,,,,,,,,,,,"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " CATCD[7:0] ,Category Code"
|
|
bitfld.long 0x04 1.--5. " CTL[4:0] ,Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.end
|
|
tree "Channel 1 (Receive Registers)"
|
|
rgroup.long 0x14++0x07
|
|
line.long 0x00 "RLCA,Receiver Channel 1 Audio Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " APCMD ,Audio PCM Data"
|
|
line.long 0x04 "RRCA,Receiver Channel 2 Audio Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " APCMD ,Audio PCM Data"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "RUI,Receiver User Data Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " UB4 ,User Byte 4"
|
|
hexmask.long.byte 0x00 16.--23. 1. " UB3 ,User Byte 3"
|
|
hexmask.long.byte 0x00 8.--15. 1. " UB2 ,User Byte 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UB1 ,User Byte 1"
|
|
rgroup.long 0x1c++0x07
|
|
line.long 0x00 "RLCS,Receiver Channel 1 Status Register"
|
|
bitfld.long 0x00 28.--29. " CLAC[1:0] ,Clock Accuracy" "Level 2,Level 1,Level 3,"
|
|
bitfld.long 0x00 24.--27. " FS[3:0] ,Sample Frequency" "44.1 kHz,,48 kHz,32 kHz,,,,,,,,,,,,"
|
|
bitfld.long 0x00 20.--23. " CHNO[3:0] ,Channel Number" "Any,A,B,C,,,,,,,,,,,,"
|
|
bitfld.long 0x00 16.--19. " SRCNO[3:0] ,Source Number" "Any,1,2,3,,,,,,,,,,,,"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CATCD[7:0] ,Category Code"
|
|
bitfld.long 0x00 1.--5. " CTL[4:0] ,Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "RRCS,Receiver Channel 2 Status Register"
|
|
bitfld.long 0x04 28.--29. " CLAC[1:0] ,Clock Accuracy" "Level 2,Level 1,Level 3,"
|
|
bitfld.long 0x04 24.--27. " FS[3:0] ,Sample Frequency" "44.1 kHz,,48 kHz,32 kHz,,,,,,,,,,,,"
|
|
bitfld.long 0x04 20.--23. " CHNO[3:0] ,Channel Number" "Any,A,B,C,,,,,,,,,,,,"
|
|
bitfld.long 0x04 16.--19. " SRCNO[3:0] ,Source Number" "Any,1,2,3,,,,,,,,,,,,"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " CATCD[7:0] ,Category Code"
|
|
bitfld.long 0x04 1.--5. " CTL[4:0] ,Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.end
|
|
tree "Common Registers"
|
|
group.long 0x28++0x07
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 28. " CKS ,Oversampling clock select" "AUDIO_X1,AUDIO CLK"
|
|
bitfld.long 0x00 26. " PB ,Pass Back" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " RASS ,Receiver Audio Sample Bit Size" "16-bit,20-bit,24-bit,"
|
|
bitfld.long 0x00 22.--23. " TASS ,Transmitter Audio Sample Bit Size" "16-bit,20-bit,24-bit,"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RDE ,Receiver DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TDE ,Transmitter DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " NCSI ,New Channel Status Information" "Not transmitted,Transmitted"
|
|
bitfld.long 0x00 18. " AOS ,Audio Only Samples" "Present,Not present"
|
|
textline " "
|
|
bitfld.long 0x00 17. " RME ,Receiver Module Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " TME ,Transmitter Module Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " REIE ,Receiver Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " TEIE ,Transmitter Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " UBOI ,User Buffer Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " UBUI ,User Buffer Underrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " CREI ,Clock Recovery Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " PAEI ,Parity Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PREI ,Preamble Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " CSEI ,Channel Status Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ABOI ,Audio Buffer Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " ABUI ,Audio Buffer Underrun Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RUII ,Receiver User Information Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " TUII ,Transmitter User Information Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RCSI ,Receiver Channel Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RCBI ,Receiver Channel Buffer Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TCSI ,Transmitter Channel Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TCBI ,Transmitter Channel Buffer Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x04 "STAT,Status Register"
|
|
rbitfld.long 0x04 16. " CMD ,Compressed Mode Data" "Not compressed,Compressed"
|
|
rbitfld.long 0x04 15. " RIS ,Receiver Idle State" "Not idle,Idle"
|
|
rbitfld.long 0x04 14. " TIS ,Transmitter Idle State" "Not idle,Idle"
|
|
bitfld.long 0x04 13. " UBO ,User Buffer Overrun" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x04 12. " UBU ,User Buffer Underrun" "No underrun,Underrun"
|
|
bitfld.long 0x04 11. " CE ,Clock Error" "No error,Error"
|
|
bitfld.long 0x04 10. " PARE ,Parity Error" "No error,Error"
|
|
bitfld.long 0x04 9. " PREE ,Preamble Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 8. " CSE ,Channel Status Error" "No error,Error"
|
|
bitfld.long 0x04 7. " ABO ,Audio Buffer Overrun" "No overrun,Overrun"
|
|
bitfld.long 0x04 6. " ABU ,Audio Buffer Underrun" "No underrun,Underrun"
|
|
rbitfld.long 0x04 5. " RUIR ,Receiver User Information Register Status" "Empty,Full"
|
|
textline " "
|
|
rbitfld.long 0x04 4. " TUIR ,Transmitter User Information Register Status" "Full,Empty"
|
|
rbitfld.long 0x04 3. " CSRX ,Channel 1 and Channel 2 Status for Receiver" "Empty,Full"
|
|
rbitfld.long 0x04 2. " CBRX ,Channel 1 and Channel 2 Buffers for Receiver" "Empty,Full"
|
|
rbitfld.long 0x04 1. " CSTX ,Channel 1 and Channel 2 Status for Transmitter" "Full,Empty"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " CBTX ,Channel 1 and Channel 2 Buffers for Transmitter" "Full,Empty"
|
|
wgroup.long 0x30++0x03
|
|
line.long 0x00 "TDAD,Transmitter DMA Audio Data Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " APCMD ,Audio PCM Data"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "RDAD,Receiver DMA Audio Data Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " APCMD ,Audio PCM Data"
|
|
tree.end
|
|
tree.end
|
|
tree "CD-ROM Decoder"
|
|
base ad:0xE8005000
|
|
width 10.
|
|
group.byte 0x00++0x3
|
|
line.byte 0x00 "CROMEN,ROM-DEC Enable Control Register"
|
|
bitfld.byte 0x00 7. " SUBC_EN ,Subcode processing enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " CROM_EN ,CD-ROM decoding enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " CROM_STP ,Forcible stop of CD-ROM decoding" "Not stopped,Stopped"
|
|
line.byte 0x01 "CROMSY0,Sync Code-Based Synchronization Control Register"
|
|
bitfld.byte 0x01 5.--7. " SY_AUT/SY_IEN/SY_DEN ,Sync code maintenance function settings" "-,External,Interpolated,Interpolated/External,Automatic sync,Automatic sync,Automatic sync,Automatic sync"
|
|
sif (cpu()=="R7S721021")
|
|
if (((per.b(ad:0xE8005000+0x02))&0x20)!=0x0)
|
|
group.byte 0x02++0x0
|
|
line.byte 0x00 "CROMCTL0,Decoding Mode Control Register"
|
|
bitfld.byte 0x00 7. " MD_DESC ,Descrambling function ON/OFF" "OFF,ON"
|
|
bitfld.byte 0x00 5. " MD_AUTO ,Automatic mode/form detection ON/OFF" "OFF,ON"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " MD_AUTOS1 ,Criteria for mode determination when MD_AUTO = 1" "Not always,Always"
|
|
bitfld.byte 0x00 3. " MD_AUTOS2 ,Criteria for mode 2 form determination when MD_AUTO = 1" "Determination,No determination"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " MD_SEC[2:0] ,Sector type" "-,Mode0,Mode1,Long,Prohibited,Mode2 Form1,Mode2 Form2,Mode2 + auto detection"
|
|
else
|
|
group.byte 0x02++0x0
|
|
line.byte 0x00 "CROMCTL0,Decoding Mode Control Register"
|
|
bitfld.byte 0x00 7. " MD_DESC ,Descrambling function ON/OFF" "OFF,ON"
|
|
bitfld.byte 0x00 5. " MD_AUTO ,Automatic mode/form detection ON/OFF" "OFF,ON"
|
|
textline " "
|
|
rbitfld.byte 0x00 4. " MD_AUTOS1 ,Criteria for mode determination when MD_AUTO = 1" "Not always,Always"
|
|
rbitfld.byte 0x00 3. " MD_AUTOS2 ,Criteria for mode 2 form determination when MD_AUTO = 1" "Determination,No determination"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " MD_SEC[2:0] ,Sector type" "-,Mode0,Mode1,Long,,Mode2 Form1,Mode2 Form2,Mode2 + auto detection"
|
|
endif
|
|
else
|
|
group.byte 0x02++0x0
|
|
line.byte 0x00 "CROMCTL0,Decoding Mode Control Register"
|
|
bitfld.byte 0x00 7. " MD_DESC ,Descrambling function ON/OFF" "OFF,ON"
|
|
bitfld.byte 0x00 5. " MD_AUTO ,Automatic mode/form detection ON/OFF" "OFF,ON"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " MD_AUTOS1 ,Criteria for mode determination when MD_AUTO = 1" "Not always,Always"
|
|
bitfld.byte 0x00 3. " MD_AUTOS2 ,Criteria for mode 2 form determination when MD_AUTO = 1" "Determination,No determination"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " MD_SEC[2:0] ,Sector type" "-,Mode0,Mode1,Long,,Mode2 Form1,Mode2 Form2,Mode2 + auto detection"
|
|
endif
|
|
group.byte 0x03++0x0
|
|
line.byte 0x00 "CROMCTL1,EDC/ECC Check Control Register"
|
|
bitfld.byte 0x00 7. " M2F2EDC ,Mode 2 form 2 EDC disable" "No,Yes"
|
|
bitfld.byte 0x00 4.--6. " MD_DEC[2:0] ,EDC/ECC checking mode select" "-,EDC,Q + EDC,P + EDC,QP + EDC,PQ + EDC,,"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " MD_PQREP[1:0] ,Number of iterations of PQ or QP correction" "-,1,2,3"
|
|
group.byte 0x05++0x2
|
|
line.byte 0x00 "CROMCTL3,Automatic Decoding Stop Control Register"
|
|
bitfld.byte 0x00 7. " STP_ECC ,Stop if non correctable error occurred" "Running,Stopped"
|
|
bitfld.byte 0x00 6. " STP_EDC ,Stop if post-correction EDC indicate error" "Running,Stopped"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " STP_MD ,Stop if sector mode/form does not match proper modes" "Running,Stopped"
|
|
bitfld.byte 0x00 3. " STP_MIN ,Stop if non-sequential unit values encoutered" "Running,Stopped"
|
|
line.byte 0x01 "CROMCTL4,Decoding Option Setting Control Register"
|
|
sif (cpu()!="R7S721021")
|
|
bitfld.byte 0x01 7. " LINKOFF ,Buffering control at link block detection" "ON,OFF"
|
|
endif
|
|
textline " "
|
|
bitfld.byte 0x01 6. " LINK2 ,Link block detection condition" "(R-O1||R-O2)&&(R-I3&&R-I4),(R-O1&&R-O2)||(R-O1&&link)||(R-O2&&link)"
|
|
textline " "
|
|
bitfld.byte 0x01 4. " ER0SEL ,CD-ROM data-related status register setting condition" "Decoded,Buffered"
|
|
bitfld.byte 0x01 3. " NO_ECC ,ECC correction mode when the result of the EDC check before ECC correction was pass" "Not performed,Performed"
|
|
line.byte 0x02 "CROMCTL5,HEAD20 to HEAD22 Representation Control Register"
|
|
bitfld.byte 0x02 0. " MSF_LBA_SEL ,HEAD20 to HEAD22 representation mode" "BCD,HEX"
|
|
if (((per.b(ad:0xE8005000+0x1))&0xe0)==0x00)
|
|
rgroup.byte 0x8++0x0
|
|
line.byte 0x00 "CROMST0,Sync Code Status Register"
|
|
bitfld.byte 0x00 1. " ST_SECS ,Sector processed as short sector with the aid of interpolated sync codes" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " ST_SECL ,Sector processed as a long with aid of interpolated sync codes" "Disabled,Enabled"
|
|
elif (((per.b(ad:0xE8005000+0x1))&0xe0)==0x20)
|
|
rgroup.byte 0x8++0x0
|
|
line.byte 0x00 "CROMST0,Sync Code Status Register"
|
|
bitfld.byte 0x00 3. " ST_BLKS ,Sync code detected at incorrect word counter position" "Not detected,Detected"
|
|
bitfld.byte 0x00 2. " ST_BLKL ,Sync code has not been detected" "Detected,Not detected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " ST_SECS ,Sector processed as short sector with the aid of interpolated sync codes" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " ST_SECL ,Sector processed as a long with aid of interpolated sync codes" "Disabled,Enabled"
|
|
elif (((per.b(ad:0xE8005000+0x1))&0xe0)==0x40)
|
|
rgroup.byte 0x8++0x0
|
|
line.byte 0x00 "CROMST0,Sync Code Status Register"
|
|
bitfld.byte 0x00 5. " ST_SYIL ,Sync code was detected at a position" "Not detected,Detected"
|
|
bitfld.byte 0x00 4. " ST_SYNO ,Sync code has not been detected" "Detected,Not detected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " ST_SECS ,Sector processed as short sector with the aid of interpolated sync codes" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " ST_SECL ,Sector processed as a long with aid of interpolated sync codes" "Disabled,Enabled"
|
|
elif ((((per.b(ad:0xE8005000+0x1)))&0xe0)==0x60)
|
|
rgroup.byte 0x8++0x0
|
|
line.byte 0x00 "CROMST0,Sync Code Status Register"
|
|
bitfld.byte 0x00 5. " ST_SYIL ,Sync code was detected at a position" "Not detected,Detected"
|
|
bitfld.byte 0x00 4. " ST_SYNO ,Sync code has not been detected" "Detected,Not detected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " ST_BLKS ,Sync code detected at incorrect word counter position" "Not detected,Detected"
|
|
bitfld.byte 0x00 2. " ST_BLKL ,Sync code has not been detected" "Detected,Not detected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " ST_SECS ,Sector processed as short sector with the aid of interpolated sync codes" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " ST_SECL ,Sector processed as a long with aid of interpolated sync codes" "Disabled,Enabled"
|
|
else
|
|
rgroup.byte 0x8++0x0
|
|
line.byte 0x00 "CROMST0,Sync Code Status Register"
|
|
bitfld.byte 0x00 5. " ST_SYIL ,Sync code was detected at a position" "Not detected,Detected"
|
|
bitfld.byte 0x00 4. " ST_SYNO ,Sync code has not been detected" "Detected,Not detected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " ST_BLKS ,Sync code detected at incorrect word counter position" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " ST_SECS ,Sector processed as short sector with the aid of interpolated sync codes" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " ST_SECL ,Sector processed as a long with aid of interpolated sync codes" "Disabled,Enabled"
|
|
endif
|
|
rgroup.byte 0x9++0x0
|
|
line.byte 0x00 "CROMST1,Post-ECC Header Error Status Register"
|
|
bitfld.byte 0x00 3. " ER2_HEAD0 ,Error in the minutes field of the header" "No error,Error"
|
|
bitfld.byte 0x00 2. " ER2_HEAD1 ,Error status in the seconds field of the " "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " ER2_HEAD2 ,Indicates an error in the frames (1/75 second) field of" "No error,Error"
|
|
bitfld.byte 0x00 0. " ER2_HEAD3 ,Error in the mode field of the header" "No error,Error"
|
|
rgroup.byte 0xB++0x3
|
|
line.byte 0x00 "CROMST3,Post-ECC Subheader Error Status Register"
|
|
bitfld.byte 0x00 7. " ER2_SHEAD0 ,File number still has an error" "No error,Error"
|
|
bitfld.byte 0x00 6. " ER2_SHEAD1 ,Channel number still has an error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " ER2_SHEAD2 ,Sub-mode still has an error" "No error,Error"
|
|
bitfld.byte 0x00 4. " ER2_SHEAD3 ,Data type still has an error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " ER2_SHEAD4 ,File number still has an error" "No error,Error"
|
|
bitfld.byte 0x00 2. " ER2_SHEAD5 ,Channel number still has an error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " ER2_SHEAD6 ,Sub-mode still has an error" "No error,Error"
|
|
bitfld.byte 0x00 0. " ER2_SHEAD7 ,Data type still has an error" "No error,Error"
|
|
line.byte 0x01 "CROMST4,Header/Subheader Validity Check Status Register"
|
|
bitfld.byte 0x01 7. " NG_MD ,Sector mode could not be determined" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 6. " NG_MDCMP1 ,Mismatch between file number bytes (16 and 20)" "No mismatch,Mismatch"
|
|
textline " "
|
|
bitfld.byte 0x01 5. " NG_MDCMP2 ,Mismatch between channel number bytes (17 and 21)" "No mismatch,Mismatch"
|
|
bitfld.byte 0x01 4. " NG_MDCMP3 ,Mismatch between sub-mode bytes (18 and 22)" "No mismatch,Mismatch"
|
|
textline " "
|
|
bitfld.byte 0x01 3. " NG_MDCMP4 ,Mismatch between data-type bytes (19 and 23)" "No mismatch,Mismatch"
|
|
bitfld.byte 0x01 2. " NG_MDDEF ,Mode and form difference between last two sectors" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x01 1. " NG_MDTIM1 ,Minutes, seconds, or frames out of sequence " "Not occurred,Occurred"
|
|
bitfld.byte 0x01 0. " NG_MDTIM2 ,Minutes, seconds, or frames not a BCD" "Not occurred,Occurred"
|
|
line.byte 0x02 "CROMST5,Mode Determination and Link Sector Detection Status Register"
|
|
bitfld.byte 0x02 5.--7. " ST_AMD[2:0] ,Result of automatic mode determination" "Not used,Mode0,Mode1,,Mode2 not XA,Mode2 form1,Mode2 form2,"
|
|
bitfld.byte 0x02 4. " ST_MDX ,Manual mode set status" "Manual,Automatic"
|
|
textline " "
|
|
bitfld.byte 0x02 3. " LINK_ON ,Link block in determination state" "Not recognized,Recognized"
|
|
bitfld.byte 0x02 2. " LINK_DET ,Link block (run-out 1 to run-in 4) detection" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x02 1. " LINK_SDET ,Link block within 7 sectors after start detection" "Not detected,Detected"
|
|
bitfld.byte 0x02 0. " LINK_OUT1 ,Sector after ECC correction as run-out1 identification" "Not identified,Identified"
|
|
line.byte 0x03 "CROMST6,ECC/EDC Error Status Register"
|
|
bitfld.byte 0x03 7. " ST_ERR ,Decoded block contain error" "No error,Error"
|
|
bitfld.byte 0x03 5. " ST_ECCABT ,ECC processing discontinuation" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x03 4. " ST_ECCNG ,Error correction not possible" "Possible,Not possible"
|
|
bitfld.byte 0x03 3. " ST_ECCP ,P-parity errors were not corrected in ECC correction" "Corrected,Not corrected"
|
|
textline " "
|
|
bitfld.byte 0x03 2. " ST_ECCQ ,Q-parity errors were not corrected in ECC correction" "Corrected,Not corrected"
|
|
bitfld.byte 0x03 1. " ST_EDC1 ,Fail result of the EDC check before ECC result of the EDC check before ECC correction" "Not failed,Failed"
|
|
textline " "
|
|
bitfld.byte 0x03 0. " ST_EDC2 ,Fail result of the EDC check before ECC result of the EDC check before ECC correction" "Not failed,Failed"
|
|
sif (cpu()=="R7S721021")
|
|
if (((per.b(ad:0xE8005000+0x40))&0x80)!=0x0)
|
|
rgroup.byte 0x14++0x0
|
|
line.byte 0x00 "CBUFST0,Buffer Status Register"
|
|
bitfld.byte 0x00 7. " BUF_REF ,Search for the first sector to be buffered state" "Not active,Active"
|
|
bitfld.byte 0x00 6. " BUF_ACT ,Buffering active state" "Not active,Active"
|
|
else
|
|
hgroup.byte 0x14++0x0
|
|
hide.byte 0x00 "CBUFST0,Buffer Status Register"
|
|
endif
|
|
else
|
|
rgroup.byte 0x14++0x0
|
|
line.byte 0x00 "CBUFST0,Buffer Status Register"
|
|
bitfld.byte 0x00 7. " BUF_REF ,Search for the first sector to be buffered state" "Not active,Active"
|
|
bitfld.byte 0x00 6. " BUF_ACT ,Buffering active state" "Not active,Active"
|
|
endif
|
|
rgroup.byte 0x15++0x1
|
|
line.byte 0x00 "CBUFST1,Decoding Stoppage Source Status Register"
|
|
bitfld.byte 0x00 7. " BUF_ECC ,Non ECC correctable error - decoding/buffering stop" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 6. " BUF_EDC ,Post-correction EDC error - decoding/buffering stop" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " BUF_MD ,Sectors difference error - decoding/buffering stop" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 3. " BUF_MIN ,Non-sequential minutes/seconds/frames error - decoding/buffering stop" "Not occurred,Occurred"
|
|
line.byte 0x01 "CBUFST2,Buffer Overflow Status Register"
|
|
bitfld.byte 0x01 7. " BUF_NG ,Sector-to-sector transition occurred before buffer transfer complete" "Not occurred,Occurred"
|
|
rgroup.byte 0x18++0x17
|
|
line.byte 0x00 "HEAD00,Pre-ECC Correction Header: Minutes Data Register"
|
|
line.byte 0x01 "HEAD01,Pre-ECC Correction Header: Seconds Data Register"
|
|
line.byte 0x02 "HEAD02,Pre-ECC Correction Header: Frames Data Register"
|
|
line.byte 0x03 "HEAD03,Pre-ECC Correction Header: Mode Data Register"
|
|
line.byte 0x04 "SHEAD00,Pre-ECC Correction Subheader:File Number (Byte 16) Data Register"
|
|
line.byte 0x05 "SHEAD01,Pre-ECC Correction Subheader:Channel Number (Byte 17) Data Register"
|
|
line.byte 0x06 "SHEAD02,Pre-ECC Correction Subheader:Sub-Mode (Byte 18) Data Register"
|
|
line.byte 0x07 "SHEAD03,Pre-ECC Correction Subheader:Data Type (Byte 19) Data Register"
|
|
line.byte 0x08 "SHEAD04,Pre-ECC Correction Subheader:File Number (Byte 20) Data Register"
|
|
line.byte 0x09 "SHEAD05,Pre-ECC Correction Subheader:Channel Number (Byte 21) Data Register"
|
|
line.byte 0x0A "SHEAD06,Pre-ECC Correction Subheader:Sub-Mode (Byte 22) Data Register"
|
|
line.byte 0x0B "SHEAD07,Pre-ECC Correction Subheader:Data Type (Byte 23) Data Register"
|
|
line.byte 0x0C "HEAD20,Post-ECC Correction Header:Minutes Data Register"
|
|
line.byte 0x0D "HEAD21,Post-ECC Correction Header:Seconds Data Register"
|
|
line.byte 0x0E "HEAD22,Post-ECC Correction Header:Frames Data Register"
|
|
line.byte 0x0F "HEAD23,Post-ECC Correction Header:Mode Data Register"
|
|
line.byte 0x10 "SHEAD20,Post-ECC Correction Subheader:File Number (Byte 16) Data Register"
|
|
line.byte 0x11 "SHEAD21,Post-ECC Correction Subheader:Channel Number (Byte 17) Data Register"
|
|
line.byte 0x12 "SHEAD22,Post-ECC Correction Subheader:Sub-Mode (Byte 18) Data Register"
|
|
line.byte 0x13 "SHEAD23,Post-ECC Correction Subheader:Data Type (Byte 19) Data Register"
|
|
line.byte 0x14 "SHEAD24,Post-ECC Correction Subheader:File Number (Byte 20) Data Register"
|
|
line.byte 0x15 "SHEAD25,Post-ECC Correction Subheader:Channel Number (Byte 21) Data Register"
|
|
line.byte 0x16 "SHEAD26,Post-ECC Correction Subheader:Sub-Mode (Byte 22) Data Register"
|
|
line.byte 0x17 "SHEAD27,Post-ECC Correction Subheader:Data Type (Byte 23) Data Register"
|
|
group.byte 0x40++0x3
|
|
line.byte 0x00 "CBUFCTL0,Automatic Buffering Setting Control Register 0"
|
|
bitfld.byte 0x00 7. " CBUF_AUT ,Automatic buffering function ON/OFF" "OFF,ON"
|
|
bitfld.byte 0x00 6. " CBUF_EN ,Buffering to buffer RAM enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()!="R7S721021")
|
|
bitfld.byte 0x00 5. " CBUF_LINK ,Buffering Control on Link Block Detection" "Not buffered,Buffered"
|
|
bitfld.byte 0x00 3.--4. " CBUF_MD[1:0] ,Start-sector detection mode when the automatic" "Sequence,Sequence/interpolated,Any header,Interpolated"
|
|
else
|
|
bitfld.byte 0x00 3.--4. " CBUF_MD[1:0] ,Start-sector detection mode when the automatic" "Sequence,Sequence/interpolated,Any header,Interpolated"
|
|
endif
|
|
textline " "
|
|
bitfld.byte 0x00 2. " CBUF_TS ,CBUFCTL1 to CBUFCTL3 Setting Mode" "BCD,HEX"
|
|
bitfld.byte 0x00 1. " CBUF_Q ,Q-channel code buffering data specification" "Only correct,All"
|
|
line.byte 0x01 "CBUFCTL1,Automatic Buffering Start Sector Setting:Minutes Control Register"
|
|
line.byte 0x02 "CBUFCTL2,Automatic Buffering Start Sector Setting:Seconds Control Register"
|
|
line.byte 0x03 "CBUFCTL3,Automatic Buffering Start Sector Setting:Frames Control Register"
|
|
group.byte 0x45++0x0
|
|
line.byte 0x00 "CROMST0M,ISY Interrupt Source Mask Control Register"
|
|
bitfld.byte 0x00 5. " ST_SYILM ,ISY interrupt ST_SYIL source mask" "Not masked,Masked"
|
|
bitfld.byte 0x00 4. " ST_SYNOM ,ISY interrupt ST_SYNO source mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " ST_BLKSM ,ISY interrupt ST_BLKS source mask" "Not masked,Masked"
|
|
bitfld.byte 0x00 2. " ST_BLKLM ,ISY interrupt ST_BLKL source mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " ST_SECSM ,ISY interrupt ST_SECS source mask" "Not masked,Masked"
|
|
bitfld.byte 0x00 0. " ST_SECLM ,ISY interrupt ST_SECL source mask" "Not masked,Masked"
|
|
group.byte 0x100++0x0
|
|
line.byte 0x00 "ROMDECRST,CD-ROM Decoder Reset Control Register"
|
|
bitfld.byte 0x00 7. " LOGICRST ,CD-ROM decoder random logic reset signal" "No reset,Reset"
|
|
bitfld.byte 0x00 6. " RAMRST ,CD-ROM decoder RAM clearing signal" "Not completed,Completed"
|
|
rgroup.byte 0x101++0x0
|
|
line.byte 0x00 "RSTSTAT,CD-ROM Decoder Reset Status Register"
|
|
bitfld.byte 0x00 7. " RAMCLRST ,Completion of RAM clearing flag" "Not cleared,Cleared"
|
|
group.byte 0x102++0x0
|
|
line.byte 0x0 "SSI,SSI Data Control Register"
|
|
bitfld.byte 0x0 7. " BYTEND ,Endian of input data from the SSI module" "Not swapped,Swapped"
|
|
bitfld.byte 0x0 6. " BITEND ,Treatment of the bit order of the input data from the SSI module" "Not reversed,Reversed"
|
|
textline " "
|
|
bitfld.byte 0x0 4.--5. " BUFEND0[1:0] ,Higher/lower 16-bit placed to stream as first" "Discard 16 bit,Higher 16 bit,Lower 16 bit,"
|
|
bitfld.byte 0x0 2.--3. " BUFEND1[1:0] ,Higher/lower 16-bit placed to stream as second" "Discard 16 bit,Higher 16 bit,Higher 16 bit,"
|
|
group.byte 0x108++0x1
|
|
line.byte 0x00 "INTHOLD,Interrupt Flag Register"
|
|
bitfld.byte 0x00 7. " ISEC ,ISEC interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 6. " ITARG ,ITARG interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " ISY ,ISY interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " IERR ,IERR interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " IBUF ,IBUF interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " IREADY ,IREADY interrupt flag" "No interrupt,Interrupt"
|
|
line.byte 0x01 "INHINT,Interrupt Source Mask Control Register"
|
|
bitfld.byte 0x01 7. " INHISEC ,ISEC interrupt mask" "Not masked,Masked"
|
|
bitfld.byte 0x01 6. " INHITARG ,ITARG interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.byte 0x01 5. " INHISY ,ISY interrupt mask" "Not masked,Masked"
|
|
bitfld.byte 0x01 4. " INHIERR ,IERR interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.byte 0x01 3. " INHIBUF ,IBUF interrupt mask" "Not masked,Masked"
|
|
bitfld.byte 0x01 2. " INHIREADY ,IREADY interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.byte 0x01 1. " PREINH/REQDM ,DMA-transfer-request interrupt blocking" "Not masked,Masked"
|
|
bitfld.byte 0x01 0. " PREINH/IREADY ,IREADY interrupt blocking" "Not masked,Masked"
|
|
group.word 0x200++0x3
|
|
line.word 0x00 "STRMDIN0,ROM Decoder Stream Data Input Register"
|
|
line.word 0x02 "STRMDIN2,ROM Decoder Stream Data Input Register"
|
|
rgroup.word 0x204++0x1
|
|
line.word 0x00 "STRMDOUT0,CD-ROM Decoder Stream Data Output Register"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "RLIN3 (LIN/UART Interface)"
|
|
tree "Channel 0"
|
|
base ad:0xFCFE9000
|
|
width 9.
|
|
if (per.b((ad:0xFCFE9000)+0x08)&0x3)==0x00
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "LWBR,LIN Wake-up Baud Rate Select Register"
|
|
bitfld.byte 0x00 4.--7. " NSPB ,Bit Sampling Count Select" "16,,,,,,,,,,,,,,,16"
|
|
bitfld.byte 0x00 1.--3. " LPRS ,Prescaler Clock Select" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.byte 0x00 0. " LWBR0 ,Wake-up Baud Rate Select" "LIN 1.3,LIN 2.0 or 2.1"
|
|
elif (per.b((ad:0xFCFE9000)+0x08)&0x3)==0x01
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "LWBR,LIN/UART Wake-up Baud Rate Select Register"
|
|
bitfld.byte 0x00 4.--7. " NSPB ,Bit Sampling Count Select" "16,,,,,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.byte 0x00 1.--3. " LPRS ,Prescaler Clock Select" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
else
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "LWBR,LIN/UART Wake-up Baud Rate Select Register"
|
|
bitfld.byte 0x00 4.--7. " NSPB ,Bit Sampling Count Select" "16,,,,,,,8,,,,,,,,16"
|
|
bitfld.byte 0x00 1.--3. " LPRS ,Prescaler Clock Select" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
endif
|
|
group.byte 0x02++0x01
|
|
line.byte 0x00 "LBRP0,LIN/UART Baud Rate Prescaler 0 Register"
|
|
line.byte 0x01 "LBRP1,LIN/UART Baud Rate Prescaler 1 Register"
|
|
if (per.b((ad:0xFCFE9000)+0x08)&0x3)!=0x1
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "LSTC,LIN Self-Test Control Register"
|
|
bitfld.byte 0x00 0. " LSTM ,LIN Self-Test Mode" "Disabled,Enabled"
|
|
endif
|
|
if (per.b((ad:0xFCFE9000)+0x08)&0x3)==0x00
|
|
group.byte 0x08++0x01
|
|
line.byte 0x00 "LMD,LIN Mode Register"
|
|
bitfld.byte 0x00 5. " LRDNFS ,LIN Reception Data Noise Filtering Disable" "No,Yes"
|
|
bitfld.byte 0x00 4. " LIOS ,LIN Interrupt Output Select" "LIN interrupt,TX/RX interrupts"
|
|
bitfld.byte 0x00 2.--3. " LCKS ,LIN System Clock Select" "fa,fb,fc,fd"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " LMD ,LIN/UART Mode Select" "LIN master,UART,LIN slave auto BR,LIN slave fixed BR"
|
|
line.byte 0x01 "LBFC,LIN Break Field Configuration Register"
|
|
bitfld.byte 0x01 4.--5. " BDT ,Break Delimiter (High level) Width select bit" "1 Tbit,2 Tbits,3 Tbits,4 Tbits"
|
|
bitfld.byte 0x01 0.--3. " BLT ,Transmit Break (Low level) Width select bit" "13 Tbits,14 Tbits,15 Tbits,16 Tbits,17 Tbits,18 Tbits,19 Tbits,20 Tbits,21 Tbits,22 Tbits,23 Tbits,24 Tbits,25 Tbits,26 Tbits,27 Tbits,28 Tbits"
|
|
elif (per.b((ad:0xFCFE9000)+0x08)&0x3)==(0x2||0x3)
|
|
group.byte 0x08++0x01
|
|
line.byte 0x00 "LMD,LIN Mode Register"
|
|
bitfld.byte 0x00 5. " LRDNFS ,LIN Reception Data Noise Filtering Disable" "No,Yes"
|
|
bitfld.byte 0x00 4. " LIOS ,LIN Interrupt Output Select" "LIN interrupt,TX/RX interrupts"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " LMD ,LIN/UART Mode Select" "LIN master,UART,LIN slave auto BR,LIN slave fixed BR"
|
|
line.byte 0x01 "LBFC,LIN Break Field Configuration Register"
|
|
bitfld.byte 0x01 0. " LBLT ,Reception Break (Low-Level) Detection Width Setting" "10 Tbits,11 Tbits"
|
|
else
|
|
group.byte 0x08++0x01
|
|
line.byte 0x00 "LMD,UART Mode Register"
|
|
bitfld.byte 0x00 5. " LRDNFS ,LIN Reception Data Noise Filtering Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " LMD ,LIN/UART Mode Select" "LIN master,UART,LIN slave auto BR,LIN slave fixed BR"
|
|
line.byte 0x01 "LBFC,UART Configuration Register"
|
|
bitfld.byte 0x01 6. " UTPS ,UART polarity switch bit" "Normal,Inverted"
|
|
bitfld.byte 0x01 5. " URPS ,UART Input polarity switch bit" "Normal,Inverted"
|
|
bitfld.byte 0x01 3.--4. " UPS ,UART Parity select bit" "Disabled,Even,0 parity,Odd"
|
|
textline " "
|
|
bitfld.byte 0x01 2. " USBLS ,UART Stop Bit length select bit" "1 bit,2 bits"
|
|
bitfld.byte 0x01 1. " UBOS ,UART transfer format order select bit" "LSB First,MSB first"
|
|
bitfld.byte 0x01 0. " UBLS ,UART character length select bit" "8 bits,9 bits"
|
|
endif
|
|
if (per.b((ad:0xFCFE9000)+0x08)&0x3)!=0x01
|
|
group.byte 0x0A++0x00
|
|
line.byte 0x00 "LSC,LIN Space Configuration Register"
|
|
bitfld.byte 0x00 4.--5. " IBS ,Inter-Byte Space Select" "0 Tbits,1 Tbit,2 Tbits,3 Tbits"
|
|
bitfld.byte 0x00 0.--2. " IBHS ,Inter-Byte Space (Header)/Response Space Select" "0 Tbits,1 Tbit,2 Tbits,3 Tbits,4 Tbits,5 Tbits,6 Tbits,7 Tbits"
|
|
else
|
|
group.byte 0x0A++0x00
|
|
line.byte 0x00 "LSC,UART Space Configuration Register"
|
|
bitfld.byte 0x00 4.--5. " IBS ,Inter-Byte Space Select" "0 Tbits,1 Tbit,2 Tbits,3 Tbits"
|
|
endif
|
|
if (per.b((ad:0xFCFE9000)+0x08)&0x3)!=0x01
|
|
group.byte 0x0B++0x01
|
|
line.byte 0x00 "LWUP,LIN Wake-up Configuration Register"
|
|
bitfld.byte 0x00 4.--7. " WUTL ,Wake-up Transmission Low level Width Select" "1 Tbit,2 Tbits,3 Tbits,4 Tbits,5 Tbits,6 Tbits,7 Tbits,8 Tbits,9 Tbits,10 Tbits,11 Tbits,12 Tbits,13 Tbits,14 Tbits,15 Tbits,16 Tbits"
|
|
line.byte 0x01 "LIE,LIN Interrupt Enable Register"
|
|
bitfld.byte 0x01 3. " SHIE ,Successful Header Transmission Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 2. " ERRIE ,Error Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 1. " FRCIE ,Successful Frame/Wake-up Reception Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x01 0. " FTCIE ,Successful Frame/Wake-up Transmission Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
if (per.b((ad:0xFCFE9000)+0x08)&0x3)==0x00
|
|
group.byte 0x0D++0x00
|
|
line.byte 0x00 "LEDE,LIN Error Detection Enable Register"
|
|
bitfld.byte 0x00 7. " LTES ,Timeout Error Select" "Frame,Response"
|
|
bitfld.byte 0x00 3. " FERE ,Framing Error Detection Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " FTERE ,Timeout Error Detection Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " PBERE ,Physical Bus Error Detection Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " BERE ,Bit Error Detection Enable" "Disabled,Enabled"
|
|
elif (per.b((ad:0xFCFE9000)+0x08)&0x3)==(0x2||0x3)
|
|
group.byte 0x0D++0x00
|
|
line.byte 0x00 "LEDE,LIN Error Detection Enable Register"
|
|
bitfld.byte 0x00 7. " LTES ,Timeout Error Select" "Frame,Response"
|
|
bitfld.byte 0x00 6. " IPERE ,ID Parity Error Detection Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " SFERE ,Sync Field Error Detection Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " FERE ,Framing Error Detection Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " BERE ,Bit Error Detection Enable" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x0D++0x00
|
|
line.byte 0x00 "LEDE,LIN Error Detection Enable Register"
|
|
bitfld.byte 0x00 3. " FERE ,Framing Error Detection Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " OERE ,Overrun Error Detection Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " BERE ,Bit Error Detection Enable" "Disabled,Enabled"
|
|
endif
|
|
if (per.b((ad:0xFCFE9000)+0x08)&0x3)!=0x01
|
|
group.byte 0x0E++0x00
|
|
line.byte 0x00 "LCUC,LIN Control Register"
|
|
bitfld.byte 0x00 1. " OM1 ,LIN Mode Select" "Wake-up,Operation"
|
|
bitfld.byte 0x00 0. " OM0 ,LIN Reset" "No reset,Reset"
|
|
else
|
|
group.byte 0x0E++0x00
|
|
line.byte 0x00 "LCUC,UART Control Register"
|
|
bitfld.byte 0x00 0. " OM0 ,UART Reset" "No reset,Reset"
|
|
endif
|
|
if (per.b((ad:0xFCFE9000)+0x08)&0x3)==0x00
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "LTRC,LIN Transmission Control Register"
|
|
bitfld.byte 0x00 1. " RTS ,Response Transmission/Reception Start" "Stopped,Started"
|
|
bitfld.byte 0x00 0. " FTS ,Frame Transmission/wake-up Transmission /Reception Start" "Stopped,Started"
|
|
elif (per.b((ad:0xFCFE9000)+0x08)&0x3)==(0x2||0x3)
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "LTRC,LIN Transmission Control Register"
|
|
bitfld.byte 0x00 2. " LNRR ,No LIN response request bit" "No,Yes"
|
|
bitfld.byte 0x00 1. " RTS ,Response Transmission/Reception Start" "Stopped,Started"
|
|
bitfld.byte 0x00 0. " FTS ,Frame Transmission/wake-up Transmission/Reception Start" "Stopped,Started"
|
|
else
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "LTRC,UART Transmission Control Register"
|
|
bitfld.byte 0x00 1. " RTS ,UART Buffer Transmission Start" "Stopped,Started"
|
|
endif
|
|
if (per.b((ad:0xFCFE9000)+0x08)&0x3)!=0x01
|
|
rgroup.byte 0x11++0x00
|
|
line.byte 0x00 "LMST,LIN Mode Status Register"
|
|
bitfld.byte 0x00 1. " OMM1 ,LIN Mode Status Monitor" "Wake-up,Operation"
|
|
bitfld.byte 0x00 0. " OMM0 ,LIN Reset Status Monitor" "Reset,No reset"
|
|
group.byte 0x12++0x00
|
|
line.byte 0x00 "LST,LIN Status Register"
|
|
bitfld.byte 0x00 7. " HTRC ,Successful Header Transmission Flag" "Not completed,Completed"
|
|
bitfld.byte 0x00 6. " D1RC ,Successful Data 1 Reception Flag" "0,?..."
|
|
rbitfld.byte 0x00 3. " ERR ,Error Detection Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " FRC ,Successful Frame/Wake-up Reception Flag" "Not completed,Completed"
|
|
bitfld.byte 0x00 0. " FTC ,Successful Frame/Wake-up Transmission Flag" "Not completed,Completed"
|
|
else
|
|
rgroup.byte 0x11++0x00
|
|
line.byte 0x00 "LMST,UART Mode Status Register"
|
|
bitfld.byte 0x00 0. " OMM0 ,UART Reset Status Monitor" "Reset,No reset"
|
|
group.byte 0x12++0x00
|
|
line.byte 0x00 "LST,UART Status Register"
|
|
bitfld.byte 0x00 5. " URS ,Data Reception Status" "Not operated,Operated"
|
|
bitfld.byte 0x00 4. " UTS ,Transmission Status" "Not operated,Operated"
|
|
rbitfld.byte 0x00 3. " ERR ,Error Detection Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " FTC ,Successful Buffer Transmission Flag" "Not completed,Completed"
|
|
endif
|
|
if (per.b((ad:0xFCFE9000)+0x08)&0x3)==0x00
|
|
group.byte 0x13++0x01
|
|
line.byte 0x00 "LEST,LIN Error Status Register"
|
|
bitfld.byte 0x00 7. " RPER ,Response Preparation Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 5. " CSER ,Checksum Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 3. " FER ,Framing Error Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " FTER ,Timeout Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 1. " PBER ,Physical Bus Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 0. " BER ,Bit Error Flag" "No error,Error"
|
|
line.byte 0x01 "LDFC,LIN Data Field Configuration Register"
|
|
bitfld.byte 0x01 7. " LSS ,Transmission/Reception Continuation Select" "Not continued,Continued"
|
|
bitfld.byte 0x01 6. " FSM ,Frame Separate Mode Select" "Disabled,Enabled"
|
|
bitfld.byte 0x01 5. " CSM ,Checksum Select" "Classic,Enchanced"
|
|
textline " "
|
|
bitfld.byte 0x01 4. " RFT ,Response Field Communication Direction Select" "Reception,Transmission"
|
|
bitfld.byte 0x01 0.--3. " RFDL ,Response Field Length Select" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,?..."
|
|
elif (per.b((ad:0xFCFE9000)+0x08)&0x3)==(0x2||0x3)
|
|
group.byte 0x13++0x01
|
|
line.byte 0x00 "LEST,LIN Error Status Register"
|
|
bitfld.byte 0x00 7. " RPER ,Response Preparation Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 6. " IPER ,ID Parity Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 5. " CSER ,Checksum Error Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " SFER ,Sync field Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 3. " FER ,Framing Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 2. " TER ,Timeout Error Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " BER ,Bit Error Flag" "No error,Error"
|
|
line.byte 0x01 "LDFC,LIN Data Field Configuration Register"
|
|
bitfld.byte 0x01 7. " LSS ,Transmission/Reception Continuation Select" "Not continued,Continued"
|
|
bitfld.byte 0x01 5. " LCS ,Checksum Select" "Classic,Enchanced"
|
|
bitfld.byte 0x01 4. " RCDS ,Response Field Communication Direction Select" "Reception,Transmission"
|
|
textline " "
|
|
bitfld.byte 0x01 0.--3. " RFDL ,Response Field Length Select" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,?..."
|
|
else
|
|
group.byte 0x13++0x01
|
|
line.byte 0x00 "LEST,UART Error Status Register"
|
|
bitfld.byte 0x00 6. " UPER ,Parity Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 5. " IDMT ,ID Match Flag" "No match,Match"
|
|
bitfld.byte 0x00 4. " EXBT ,Expanded Bit Detection Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " FER ,Framing Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 2. " OER ,Overrun Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 0. " BER ,Bit Error Flag" "No error,Error"
|
|
line.byte 0x01 "LDFC,UART Data Field Configuration Register"
|
|
bitfld.byte 0x01 5. " UTSW ,Transmission Start Wait Bit" "No wait,Wait"
|
|
bitfld.byte 0x01 0.--3. " MDL ,UART Buffer Data Length Select" "9 data,1 data,2 data,3 data,4 data,5 data,6 data,7 data,8 data,9 data,?..."
|
|
endif
|
|
if (per.b((ad:0xFCFE9000)+0x08)&0x3)!=0x01
|
|
group.byte 0x15++0x01
|
|
line.byte 0x00 "LIDB,LIN ID Buffer Register"
|
|
bitfld.byte 0x00 7. " IDP1 ,Parity Setting 1" "No parity,Parity"
|
|
bitfld.byte 0x00 6. " IDP0 ,Parity Setting 0" "No parity,Parity"
|
|
hexmask.byte 0x00 0.--5. 1. " ID ,ID Setting"
|
|
line.byte 0x01 "LCBR,LIN Checksum Buffer Register"
|
|
else
|
|
group.byte 0x15++0x00
|
|
line.byte 0x00 "LIDB,UART ID Buffer Register"
|
|
group.byte 0x17++0x00
|
|
line.byte 0x00 "LUDB0,UART Data 0 Buffer Register"
|
|
endif
|
|
group.byte 0x18++0x07
|
|
line.byte 0x0 "LDBR1,LIN/UART Data Buffer 1 Register"
|
|
line.byte 0x1 "LDBR2,LIN/UART Data Buffer 2 Register"
|
|
line.byte 0x2 "LDBR3,LIN/UART Data Buffer 3 Register"
|
|
line.byte 0x3 "LDBR4,LIN/UART Data Buffer 4 Register"
|
|
line.byte 0x4 "LDBR5,LIN/UART Data Buffer 5 Register"
|
|
line.byte 0x5 "LDBR6,LIN/UART Data Buffer 6 Register"
|
|
line.byte 0x6 "LDBR7,LIN/UART Data Buffer 7 Register"
|
|
line.byte 0x7 "LDBR8,LIN/UART Data Buffer 8 Register"
|
|
if (per.b((ad:0xFCFE9000)+0x08)&0x3)==0x01
|
|
rgroup.byte 0x20++0x00
|
|
line.byte 0x00 "LUOER,UART Operation Enable Register"
|
|
bitfld.byte 0x00 1. " UROE ,Reception Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " UTOE ,Transmission Enable" "Disabled,Enabled"
|
|
group.byte 0x21++0x00
|
|
line.byte 0x00 "LUOR1,UART Option Register 1"
|
|
bitfld.byte 0x00 4. " UECD ,Expansion Bit Comparison Disable" "No,Yes"
|
|
bitfld.byte 0x00 3. " UTIGTS ,Transmission Interrupt Generation Timing Select" "At start,At completion"
|
|
bitfld.byte 0x00 2. " UEBDCE ,Expansion Bit Data Comparison Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " UEBDL ,Expansion Bit Detection Level Select" "0,1"
|
|
bitfld.byte 0x00 0. " UEBE ,Expansion Bit Enable" "Disabled,Enabled"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "LUTDR,UART Transmission Data Register"
|
|
hexmask.word 0x00 1.--9. 1. " UTD ,Transmitted Data"
|
|
rgroup.word 0x26++0x01
|
|
line.word 0x00 "LURDR,UART Reception Data Register"
|
|
hexmask.word 0x00 0.--8. 1. " URD ,Received Data"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "LUWTDR,UART Wait Transmission Data Register"
|
|
hexmask.word 0x00 0.--8. 1. " UWTD ,Data Transmitted After Wait"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0xFCFE9800
|
|
width 9.
|
|
if (per.b((ad:0xFCFE9800)+0x08)&0x3)==0x00
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "LWBR,LIN Wake-up Baud Rate Select Register"
|
|
bitfld.byte 0x00 4.--7. " NSPB ,Bit Sampling Count Select" "16,,,,,,,,,,,,,,,16"
|
|
bitfld.byte 0x00 1.--3. " LPRS ,Prescaler Clock Select" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.byte 0x00 0. " LWBR0 ,Wake-up Baud Rate Select" "LIN 1.3,LIN 2.0 or 2.1"
|
|
elif (per.b((ad:0xFCFE9800)+0x08)&0x3)==0x01
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "LWBR,LIN/UART Wake-up Baud Rate Select Register"
|
|
bitfld.byte 0x00 4.--7. " NSPB ,Bit Sampling Count Select" "16,,,,,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.byte 0x00 1.--3. " LPRS ,Prescaler Clock Select" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
else
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "LWBR,LIN/UART Wake-up Baud Rate Select Register"
|
|
bitfld.byte 0x00 4.--7. " NSPB ,Bit Sampling Count Select" "16,,,,,,,8,,,,,,,,16"
|
|
bitfld.byte 0x00 1.--3. " LPRS ,Prescaler Clock Select" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
endif
|
|
group.byte 0x02++0x01
|
|
line.byte 0x00 "LBRP0,LIN/UART Baud Rate Prescaler 0 Register"
|
|
line.byte 0x01 "LBRP1,LIN/UART Baud Rate Prescaler 1 Register"
|
|
if (per.b((ad:0xFCFE9800)+0x08)&0x3)!=0x1
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "LSTC,LIN Self-Test Control Register"
|
|
bitfld.byte 0x00 0. " LSTM ,LIN Self-Test Mode" "Disabled,Enabled"
|
|
endif
|
|
if (per.b((ad:0xFCFE9800)+0x08)&0x3)==0x00
|
|
group.byte 0x08++0x01
|
|
line.byte 0x00 "LMD,LIN Mode Register"
|
|
bitfld.byte 0x00 5. " LRDNFS ,LIN Reception Data Noise Filtering Disable" "No,Yes"
|
|
bitfld.byte 0x00 4. " LIOS ,LIN Interrupt Output Select" "LIN interrupt,TX/RX interrupts"
|
|
bitfld.byte 0x00 2.--3. " LCKS ,LIN System Clock Select" "fa,fb,fc,fd"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " LMD ,LIN/UART Mode Select" "LIN master,UART,LIN slave auto BR,LIN slave fixed BR"
|
|
line.byte 0x01 "LBFC,LIN Break Field Configuration Register"
|
|
bitfld.byte 0x01 4.--5. " BDT ,Break Delimiter (High level) Width select bit" "1 Tbit,2 Tbits,3 Tbits,4 Tbits"
|
|
bitfld.byte 0x01 0.--3. " BLT ,Transmit Break (Low level) Width select bit" "13 Tbits,14 Tbits,15 Tbits,16 Tbits,17 Tbits,18 Tbits,19 Tbits,20 Tbits,21 Tbits,22 Tbits,23 Tbits,24 Tbits,25 Tbits,26 Tbits,27 Tbits,28 Tbits"
|
|
elif (per.b((ad:0xFCFE9800)+0x08)&0x3)==(0x2||0x3)
|
|
group.byte 0x08++0x01
|
|
line.byte 0x00 "LMD,LIN Mode Register"
|
|
bitfld.byte 0x00 5. " LRDNFS ,LIN Reception Data Noise Filtering Disable" "No,Yes"
|
|
bitfld.byte 0x00 4. " LIOS ,LIN Interrupt Output Select" "LIN interrupt,TX/RX interrupts"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " LMD ,LIN/UART Mode Select" "LIN master,UART,LIN slave auto BR,LIN slave fixed BR"
|
|
line.byte 0x01 "LBFC,LIN Break Field Configuration Register"
|
|
bitfld.byte 0x01 0. " LBLT ,Reception Break (Low-Level) Detection Width Setting" "10 Tbits,11 Tbits"
|
|
else
|
|
group.byte 0x08++0x01
|
|
line.byte 0x00 "LMD,UART Mode Register"
|
|
bitfld.byte 0x00 5. " LRDNFS ,LIN Reception Data Noise Filtering Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " LMD ,LIN/UART Mode Select" "LIN master,UART,LIN slave auto BR,LIN slave fixed BR"
|
|
line.byte 0x01 "LBFC,UART Configuration Register"
|
|
bitfld.byte 0x01 6. " UTPS ,UART polarity switch bit" "Normal,Inverted"
|
|
bitfld.byte 0x01 5. " URPS ,UART Input polarity switch bit" "Normal,Inverted"
|
|
bitfld.byte 0x01 3.--4. " UPS ,UART Parity select bit" "Disabled,Even,0 parity,Odd"
|
|
textline " "
|
|
bitfld.byte 0x01 2. " USBLS ,UART Stop Bit length select bit" "1 bit,2 bits"
|
|
bitfld.byte 0x01 1. " UBOS ,UART transfer format order select bit" "LSB First,MSB first"
|
|
bitfld.byte 0x01 0. " UBLS ,UART character length select bit" "8 bits,9 bits"
|
|
endif
|
|
if (per.b((ad:0xFCFE9800)+0x08)&0x3)!=0x01
|
|
group.byte 0x0A++0x00
|
|
line.byte 0x00 "LSC,LIN Space Configuration Register"
|
|
bitfld.byte 0x00 4.--5. " IBS ,Inter-Byte Space Select" "0 Tbits,1 Tbit,2 Tbits,3 Tbits"
|
|
bitfld.byte 0x00 0.--2. " IBHS ,Inter-Byte Space (Header)/Response Space Select" "0 Tbits,1 Tbit,2 Tbits,3 Tbits,4 Tbits,5 Tbits,6 Tbits,7 Tbits"
|
|
else
|
|
group.byte 0x0A++0x00
|
|
line.byte 0x00 "LSC,UART Space Configuration Register"
|
|
bitfld.byte 0x00 4.--5. " IBS ,Inter-Byte Space Select" "0 Tbits,1 Tbit,2 Tbits,3 Tbits"
|
|
endif
|
|
if (per.b((ad:0xFCFE9800)+0x08)&0x3)!=0x01
|
|
group.byte 0x0B++0x01
|
|
line.byte 0x00 "LWUP,LIN Wake-up Configuration Register"
|
|
bitfld.byte 0x00 4.--7. " WUTL ,Wake-up Transmission Low level Width Select" "1 Tbit,2 Tbits,3 Tbits,4 Tbits,5 Tbits,6 Tbits,7 Tbits,8 Tbits,9 Tbits,10 Tbits,11 Tbits,12 Tbits,13 Tbits,14 Tbits,15 Tbits,16 Tbits"
|
|
line.byte 0x01 "LIE,LIN Interrupt Enable Register"
|
|
bitfld.byte 0x01 3. " SHIE ,Successful Header Transmission Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 2. " ERRIE ,Error Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 1. " FRCIE ,Successful Frame/Wake-up Reception Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x01 0. " FTCIE ,Successful Frame/Wake-up Transmission Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
if (per.b((ad:0xFCFE9800)+0x08)&0x3)==0x00
|
|
group.byte 0x0D++0x00
|
|
line.byte 0x00 "LEDE,LIN Error Detection Enable Register"
|
|
bitfld.byte 0x00 7. " LTES ,Timeout Error Select" "Frame,Response"
|
|
bitfld.byte 0x00 3. " FERE ,Framing Error Detection Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " FTERE ,Timeout Error Detection Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " PBERE ,Physical Bus Error Detection Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " BERE ,Bit Error Detection Enable" "Disabled,Enabled"
|
|
elif (per.b((ad:0xFCFE9800)+0x08)&0x3)==(0x2||0x3)
|
|
group.byte 0x0D++0x00
|
|
line.byte 0x00 "LEDE,LIN Error Detection Enable Register"
|
|
bitfld.byte 0x00 7. " LTES ,Timeout Error Select" "Frame,Response"
|
|
bitfld.byte 0x00 6. " IPERE ,ID Parity Error Detection Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " SFERE ,Sync Field Error Detection Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " FERE ,Framing Error Detection Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " BERE ,Bit Error Detection Enable" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x0D++0x00
|
|
line.byte 0x00 "LEDE,LIN Error Detection Enable Register"
|
|
bitfld.byte 0x00 3. " FERE ,Framing Error Detection Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " OERE ,Overrun Error Detection Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " BERE ,Bit Error Detection Enable" "Disabled,Enabled"
|
|
endif
|
|
if (per.b((ad:0xFCFE9800)+0x08)&0x3)!=0x01
|
|
group.byte 0x0E++0x00
|
|
line.byte 0x00 "LCUC,LIN Control Register"
|
|
bitfld.byte 0x00 1. " OM1 ,LIN Mode Select" "Wake-up,Operation"
|
|
bitfld.byte 0x00 0. " OM0 ,LIN Reset" "No reset,Reset"
|
|
else
|
|
group.byte 0x0E++0x00
|
|
line.byte 0x00 "LCUC,UART Control Register"
|
|
bitfld.byte 0x00 0. " OM0 ,UART Reset" "No reset,Reset"
|
|
endif
|
|
if (per.b((ad:0xFCFE9800)+0x08)&0x3)==0x00
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "LTRC,LIN Transmission Control Register"
|
|
bitfld.byte 0x00 1. " RTS ,Response Transmission/Reception Start" "Stopped,Started"
|
|
bitfld.byte 0x00 0. " FTS ,Frame Transmission/wake-up Transmission /Reception Start" "Stopped,Started"
|
|
elif (per.b((ad:0xFCFE9800)+0x08)&0x3)==(0x2||0x3)
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "LTRC,LIN Transmission Control Register"
|
|
bitfld.byte 0x00 2. " LNRR ,No LIN response request bit" "No,Yes"
|
|
bitfld.byte 0x00 1. " RTS ,Response Transmission/Reception Start" "Stopped,Started"
|
|
bitfld.byte 0x00 0. " FTS ,Frame Transmission/wake-up Transmission/Reception Start" "Stopped,Started"
|
|
else
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "LTRC,UART Transmission Control Register"
|
|
bitfld.byte 0x00 1. " RTS ,UART Buffer Transmission Start" "Stopped,Started"
|
|
endif
|
|
if (per.b((ad:0xFCFE9800)+0x08)&0x3)!=0x01
|
|
rgroup.byte 0x11++0x00
|
|
line.byte 0x00 "LMST,LIN Mode Status Register"
|
|
bitfld.byte 0x00 1. " OMM1 ,LIN Mode Status Monitor" "Wake-up,Operation"
|
|
bitfld.byte 0x00 0. " OMM0 ,LIN Reset Status Monitor" "Reset,No reset"
|
|
group.byte 0x12++0x00
|
|
line.byte 0x00 "LST,LIN Status Register"
|
|
bitfld.byte 0x00 7. " HTRC ,Successful Header Transmission Flag" "Not completed,Completed"
|
|
bitfld.byte 0x00 6. " D1RC ,Successful Data 1 Reception Flag" "0,?..."
|
|
rbitfld.byte 0x00 3. " ERR ,Error Detection Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " FRC ,Successful Frame/Wake-up Reception Flag" "Not completed,Completed"
|
|
bitfld.byte 0x00 0. " FTC ,Successful Frame/Wake-up Transmission Flag" "Not completed,Completed"
|
|
else
|
|
rgroup.byte 0x11++0x00
|
|
line.byte 0x00 "LMST,UART Mode Status Register"
|
|
bitfld.byte 0x00 0. " OMM0 ,UART Reset Status Monitor" "Reset,No reset"
|
|
group.byte 0x12++0x00
|
|
line.byte 0x00 "LST,UART Status Register"
|
|
bitfld.byte 0x00 5. " URS ,Data Reception Status" "Not operated,Operated"
|
|
bitfld.byte 0x00 4. " UTS ,Transmission Status" "Not operated,Operated"
|
|
rbitfld.byte 0x00 3. " ERR ,Error Detection Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " FTC ,Successful Buffer Transmission Flag" "Not completed,Completed"
|
|
endif
|
|
if (per.b((ad:0xFCFE9800)+0x08)&0x3)==0x00
|
|
group.byte 0x13++0x01
|
|
line.byte 0x00 "LEST,LIN Error Status Register"
|
|
bitfld.byte 0x00 7. " RPER ,Response Preparation Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 5. " CSER ,Checksum Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 3. " FER ,Framing Error Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " FTER ,Timeout Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 1. " PBER ,Physical Bus Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 0. " BER ,Bit Error Flag" "No error,Error"
|
|
line.byte 0x01 "LDFC,LIN Data Field Configuration Register"
|
|
bitfld.byte 0x01 7. " LSS ,Transmission/Reception Continuation Select" "Not continued,Continued"
|
|
bitfld.byte 0x01 6. " FSM ,Frame Separate Mode Select" "Disabled,Enabled"
|
|
bitfld.byte 0x01 5. " CSM ,Checksum Select" "Classic,Enchanced"
|
|
textline " "
|
|
bitfld.byte 0x01 4. " RFT ,Response Field Communication Direction Select" "Reception,Transmission"
|
|
bitfld.byte 0x01 0.--3. " RFDL ,Response Field Length Select" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,?..."
|
|
elif (per.b((ad:0xFCFE9800)+0x08)&0x3)==(0x2||0x3)
|
|
group.byte 0x13++0x01
|
|
line.byte 0x00 "LEST,LIN Error Status Register"
|
|
bitfld.byte 0x00 7. " RPER ,Response Preparation Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 6. " IPER ,ID Parity Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 5. " CSER ,Checksum Error Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " SFER ,Sync field Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 3. " FER ,Framing Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 2. " TER ,Timeout Error Flag" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " BER ,Bit Error Flag" "No error,Error"
|
|
line.byte 0x01 "LDFC,LIN Data Field Configuration Register"
|
|
bitfld.byte 0x01 7. " LSS ,Transmission/Reception Continuation Select" "Not continued,Continued"
|
|
bitfld.byte 0x01 5. " LCS ,Checksum Select" "Classic,Enchanced"
|
|
bitfld.byte 0x01 4. " RCDS ,Response Field Communication Direction Select" "Reception,Transmission"
|
|
textline " "
|
|
bitfld.byte 0x01 0.--3. " RFDL ,Response Field Length Select" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,?..."
|
|
else
|
|
group.byte 0x13++0x01
|
|
line.byte 0x00 "LEST,UART Error Status Register"
|
|
bitfld.byte 0x00 6. " UPER ,Parity Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 5. " IDMT ,ID Match Flag" "No match,Match"
|
|
bitfld.byte 0x00 4. " EXBT ,Expanded Bit Detection Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " FER ,Framing Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 2. " OER ,Overrun Error Flag" "No error,Error"
|
|
bitfld.byte 0x00 0. " BER ,Bit Error Flag" "No error,Error"
|
|
line.byte 0x01 "LDFC,UART Data Field Configuration Register"
|
|
bitfld.byte 0x01 5. " UTSW ,Transmission Start Wait Bit" "No wait,Wait"
|
|
bitfld.byte 0x01 0.--3. " MDL ,UART Buffer Data Length Select" "9 data,1 data,2 data,3 data,4 data,5 data,6 data,7 data,8 data,9 data,?..."
|
|
endif
|
|
if (per.b((ad:0xFCFE9800)+0x08)&0x3)!=0x01
|
|
group.byte 0x15++0x01
|
|
line.byte 0x00 "LIDB,LIN ID Buffer Register"
|
|
bitfld.byte 0x00 7. " IDP1 ,Parity Setting 1" "No parity,Parity"
|
|
bitfld.byte 0x00 6. " IDP0 ,Parity Setting 0" "No parity,Parity"
|
|
hexmask.byte 0x00 0.--5. 1. " ID ,ID Setting"
|
|
line.byte 0x01 "LCBR,LIN Checksum Buffer Register"
|
|
else
|
|
group.byte 0x15++0x00
|
|
line.byte 0x00 "LIDB,UART ID Buffer Register"
|
|
group.byte 0x17++0x00
|
|
line.byte 0x00 "LUDB0,UART Data 0 Buffer Register"
|
|
endif
|
|
group.byte 0x18++0x07
|
|
line.byte 0x0 "LDBR1,LIN/UART Data Buffer 1 Register"
|
|
line.byte 0x1 "LDBR2,LIN/UART Data Buffer 2 Register"
|
|
line.byte 0x2 "LDBR3,LIN/UART Data Buffer 3 Register"
|
|
line.byte 0x3 "LDBR4,LIN/UART Data Buffer 4 Register"
|
|
line.byte 0x4 "LDBR5,LIN/UART Data Buffer 5 Register"
|
|
line.byte 0x5 "LDBR6,LIN/UART Data Buffer 6 Register"
|
|
line.byte 0x6 "LDBR7,LIN/UART Data Buffer 7 Register"
|
|
line.byte 0x7 "LDBR8,LIN/UART Data Buffer 8 Register"
|
|
if (per.b((ad:0xFCFE9800)+0x08)&0x3)==0x01
|
|
rgroup.byte 0x20++0x00
|
|
line.byte 0x00 "LUOER,UART Operation Enable Register"
|
|
bitfld.byte 0x00 1. " UROE ,Reception Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " UTOE ,Transmission Enable" "Disabled,Enabled"
|
|
group.byte 0x21++0x00
|
|
line.byte 0x00 "LUOR1,UART Option Register 1"
|
|
bitfld.byte 0x00 4. " UECD ,Expansion Bit Comparison Disable" "No,Yes"
|
|
bitfld.byte 0x00 3. " UTIGTS ,Transmission Interrupt Generation Timing Select" "At start,At completion"
|
|
bitfld.byte 0x00 2. " UEBDCE ,Expansion Bit Data Comparison Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " UEBDL ,Expansion Bit Detection Level Select" "0,1"
|
|
bitfld.byte 0x00 0. " UEBE ,Expansion Bit Enable" "Disabled,Enabled"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "LUTDR,UART Transmission Data Register"
|
|
hexmask.word 0x00 1.--9. 1. " UTD ,Transmitted Data"
|
|
rgroup.word 0x26++0x01
|
|
line.word 0x00 "LURDR,UART Reception Data Register"
|
|
hexmask.word 0x00 0.--8. 1. " URD ,Received Data"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "LUWTDR,UART Wait Transmission Data Register"
|
|
hexmask.word 0x00 0.--8. 1. " UWTD ,Data Transmitted After Wait"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree "ETHER (Automatic PAUSE Frame Retransmit Count Register)"
|
|
base ad:0xE8203000
|
|
width 12.
|
|
group.long 0x1800++0x3
|
|
line.long 0x00 "ARSTR,Software Reset Register"
|
|
bitfld.long 0x00 0. " ARST ,Software Reset" "No reset,Reset"
|
|
group.long 0x500++0x3
|
|
line.long 0x00 "ECMR,E-MAC Mode Register"
|
|
bitfld.long 0x00 26. " TRCCM ,Counter Clear Mode" "Cleared on write,Cleared on read"
|
|
bitfld.long 0x00 23. " RCSC ,Checksum Calculation" "Not calculated,Calculated"
|
|
bitfld.long 0x00 21. " DPAD ,Data Padding" "Not inserted,Inserted"
|
|
textline " "
|
|
bitfld.long 0x00 20. " RZPF ,PAUSE Frame Reception with TIME = 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " ZPF ,PAUSE Frame Usage with TIME = 0 Enable/Lost Carrier Error Detection Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " PFR ,PAUSE Frame Receive Mode" "Not transferred,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 17. " RXF ,Operating Mode for Receiving Port Flow Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " TXF ,Operating Mode for Transmitting Port Flow Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " MCT ,Multicast Address Frame Receive Mode" "Other than multicast,Only multicast"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RE ,Reception Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TE ,Transmission Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DM ,Full-duplex Transfer Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PRM ,Promiscuous Mode" "Normal,Promiscuous"
|
|
group.long 0x510++0x3
|
|
line.long 0x00 "ECSR,E-MAC Status Register"
|
|
bitfld.long 0x00 4. " PFROI ,PAUSE Frame Retransmit Retry Over" "Not exceeded,Exceeded"
|
|
bitfld.long 0x00 0. " ICD ,Illegal Carrier Detection" "Not detected,Detected"
|
|
group.long 0x518++0x3
|
|
line.long 0x00 "ECSIPR,E-MAC Interrupt Permission Register"
|
|
bitfld.long 0x00 4. " PFROIP ,PAUSE Frame Retransmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ICDIP ,Illegal Carrier Detect Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x520++0x3
|
|
line.long 0x00 "PIR,PHY Interface Register"
|
|
rbitfld.long 0x00 3. " MDI ,MII Management Data-In" "Low,High"
|
|
bitfld.long 0x00 2. " MDO ,MII Management Data-Out" "Low,High"
|
|
bitfld.long 0x00 1. " MMD ,MII Management Mode" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MDC ,MII Management Data Clock" "Low,High"
|
|
group.long 0x5C0++0x3
|
|
line.long 0x00 "MAHR,MAC Address High Register"
|
|
group.long 0x5C8++0x3
|
|
line.long 0x00 "MALR,MAC Address Low Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " MA ,MAC Address Bits 15 to 0"
|
|
group.long 0x508++0x3
|
|
line.long 0x00 "RFLR,Receive Frame Length Register"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " RFL ,Receive Frame Length"
|
|
if (((per.l(ad:0xE8203000+0x500))&0x4000000)==0x4000000)
|
|
hgroup.long 0x740++0x3
|
|
hide.long 0x00 "CEFCR,CRC Error Frame Receive Counter Register"
|
|
in
|
|
hgroup.long 0x748++0x3
|
|
hide.long 0x00 "FRECR,Frame Receive Error Counter Register"
|
|
in
|
|
hgroup.long 0x750++0x3
|
|
hide.long 0x00 "TSFRCR,Too-Short Frame Receive Counter Register"
|
|
in
|
|
hgroup.long 0x758++0x3
|
|
hide.long 0x00 "TLFRCR,Too-Long Frame Receive Counter Register"
|
|
in
|
|
hgroup.long 0x760++0x3
|
|
hide.long 0x00 "RFCR,Residual-Bit Frame Receive Counter Register"
|
|
in
|
|
hgroup.long 0x778++0x3
|
|
hide.long 0x00 "MAFCR,Multicast Address Frame Receive Counter Register"
|
|
in
|
|
else
|
|
group.long 0x740++0x3
|
|
line.long 0x00 "CEFCR,CRC Error Frame Receive Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CEFC ,CRC Error Frame Count"
|
|
group.long 0x748++0x3
|
|
line.long 0x00 "FRECR,Frame Receive Error Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " FREC ,Frame Receive Error Count"
|
|
group.long 0x750++0x3
|
|
line.long 0x00 "TSFRCR,Too-Short Frame Receive Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TSFC ,Too-Short Frame Receive Count"
|
|
group.long 0x758++0x3
|
|
line.long 0x00 "TLFRCR,Too-Long Frame Receive Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TLFC ,Too-Long Frame Receive Count"
|
|
group.long 0x760++0x3
|
|
line.long 0x00 "RFCR,Residual-Bit Frame Receive Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " RFC ,Residual-Bit Frame Receive Count"
|
|
group.long 0x778++0x3
|
|
line.long 0x00 "MAFCR,Multicast Address Frame Receive Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " MAFC ,Multicast Address Frame Count"
|
|
endif
|
|
group.long 0x554++0x3
|
|
line.long 0x00 "APR,Automatic PAUSE Frame Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " AP ,Automatic PAUSE"
|
|
group.long 0x558++0x3
|
|
line.long 0x00 "MPR,Manual PAUSE Frame Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " MP ,Manual PAUSE"
|
|
group.long 0x564++0x3
|
|
line.long 0x00 "TPAUSER,Automatic PAUSE Frame Retransmit Count Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TPAUSE ,Upper Limit for Automatic PAUSE Frame Retransmission"
|
|
hgroup.long 0x55C++0x3
|
|
hide.long 0x00 "PFTCR,PAUSE Frame Transmit Counter Register"
|
|
in
|
|
hgroup.long 0x560++0x3
|
|
hide.long 0x00 "PFRCR,PAUSE Frame Receive Counter Register"
|
|
in
|
|
group.long 0x1804++0x3
|
|
line.long 0x00 "TSU_CTRST,TSU Counter Reset Register"
|
|
bitfld.long 0x00 8. " CTRST ,TSU Counter Reset" "No effect,Reset"
|
|
group.long 0x1858++0x3
|
|
line.long 0x00 "TSU_VTAG0,VLANtag Set Register"
|
|
bitfld.long 0x00 31. " VTAG0 ,Port 0 VLANtag Evaluation Function" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--11. 1. " VID0 ,V-LAN ID Setting (VID)"
|
|
rgroup.long 0x1860++0x3
|
|
line.long 0x00 "TSU_ADSBSY,CAM Entry Table Busy Register"
|
|
bitfld.long 0x00 0. " ADSBSY ,CAM Entry Table Setting Busy" "Not busy,Busy"
|
|
group.long 0x1864++0x3
|
|
line.long 0x00 "TSU_TEN,CAM Entry Table Enable Register"
|
|
bitfld.long 0x00 31. " TEN0 ,CAM Entry Table 0 (TSU_ADRH0 and TSU_ADRL0)" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TEN1 ,CAM Entry Table 1 (TSU_ADRH1 and TSU_ADRL1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " TEN2 ,CAM Entry Table 2 (TSU_ADRH2 and TSU_ADRL2)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TEN3 ,CAM Entry Table 3 (TSU_ADRH3 and TSU_ADRL3)" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " TEN4 ,CAM Entry Table 4 (TSU_ADRH4 and TSU_ADRL4)" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TEN5 ,CAM Entry Table 5 (TSU_ADRH5 and TSU_ADRL5)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TEN6 ,CAM Entry Table 6 (TSU_ADRH6 and TSU_ADRL6)" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " TEN7 ,CAM Entry Table 7 (TSU_ADRH7 and TSU_ADRL7)" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TEN8 ,CAM Entry Table 8 (TSU_ADRH8 and TSU_ADRL8)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " TEN9 ,CAM Entry Table 9 (TSU_ADRH9 and TSU_ADRL9)" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " TEN10 ,CAM Entry Table 10 (TSU_ADRH10 and TSU_ADRL10)" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TEN11 ,CAM Entry Table 11 (TSU_ADRH11 and TSU_ADRL11)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TEN12 ,CAM Entry Table 12 (TSU_ADRH12 and TSU_ADRL12)" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TEN13 ,CAM Entry Table 13 (TSU_ADRH13 and TSU_ADRL13)" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " TEN14 ,CAM Entry Table 14 (TSU_ADRH14 and TSU_ADRL14)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TEN15 ,CAM Entry Table 15 (TSU_ADRH15 and TSU_ADRL15)" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " TEN16 ,CAM Entry Table 16 (TSU_ADRH16 and TSU_ADRL16)" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " TEN17 ,CAM Entry Table 17 (TSU_ADRH17 and TSU_ADRL17)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TEN18 ,CAM Entry Table 18 (TSU_ADRH18 and TSU_ADRL18)" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TEN19 ,CAM Entry Table 19 (TSU_ADRH19 and TSU_ADRL19)" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " TEN20 ,CAM Entry Table 20 (TSU_ADRH20 and TSU_ADRL20)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TEN21 ,CAM Entry Table 21 (TSU_ADRH21 and TSU_ADRL21)" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TEN22 ,CAM Entry Table 22 (TSU_ADRH22 and TSU_ADRL22)" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TEN23 ,CAM Entry Table 23 (TSU_ADRH23 and TSU_ADRL23)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TEN24 ,CAM Entry Table 24 (TSU_ADRH24 and TSU_ADRL24)" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TEN25 ,CAM Entry Table 25 (TSU_ADRH25 and TSU_ADRL25)" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TEN26 ,CAM Entry Table 26 (TSU_ADRH26 and TSU_ADRL26)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TEN27 ,CAM Entry Table 27 (TSU_ADRH27 and TSU_ADRL27)" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TEN28 ,CAM Entry Table 28 (TSU_ADRH28 and TSU_ADRL28)" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TEN29 ,CAM Entry Table 29 (TSU_ADRH29 and TSU_ADRL29)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TEN30 ,CAM Entry Table 30 (TSU_ADRH30 and TSU_ADRL30)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TEN31 ,CAM Entry Table 31 (TSU_ADRH31 and TSU_ADRL31)" "Disabled,Enabled"
|
|
tree "CAM Entry Table Registers"
|
|
group.long 0x1900++0x7
|
|
line.long 0x00 "TSU_ADRH0 ,CAM Entry Table 0 H"
|
|
line.long 0x04 "TSU_ADRL0 ,CAM Entry Table 0 L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL0 ,MAC Address Bits (lower)"
|
|
group.long 0x1908++0x7
|
|
line.long 0x00 "TSU_ADRH1 ,CAM Entry Table 1 H"
|
|
line.long 0x04 "TSU_ADRL1 ,CAM Entry Table 1 L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL1 ,MAC Address Bits (lower)"
|
|
group.long 0x1910++0x7
|
|
line.long 0x00 "TSU_ADRH2 ,CAM Entry Table 2 H"
|
|
line.long 0x04 "TSU_ADRL2 ,CAM Entry Table 2 L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL2 ,MAC Address Bits (lower)"
|
|
group.long 0x1918++0x7
|
|
line.long 0x00 "TSU_ADRH3 ,CAM Entry Table 3 H"
|
|
line.long 0x04 "TSU_ADRL3 ,CAM Entry Table 3 L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL3 ,MAC Address Bits (lower)"
|
|
group.long 0x1920++0x7
|
|
line.long 0x00 "TSU_ADRH4 ,CAM Entry Table 4 H"
|
|
line.long 0x04 "TSU_ADRL4 ,CAM Entry Table 4 L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL4 ,MAC Address Bits (lower)"
|
|
group.long 0x1928++0x7
|
|
line.long 0x00 "TSU_ADRH5 ,CAM Entry Table 5 H"
|
|
line.long 0x04 "TSU_ADRL5 ,CAM Entry Table 5 L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL5 ,MAC Address Bits (lower)"
|
|
group.long 0x1930++0x7
|
|
line.long 0x00 "TSU_ADRH6 ,CAM Entry Table 6 H"
|
|
line.long 0x04 "TSU_ADRL6 ,CAM Entry Table 6 L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL6 ,MAC Address Bits (lower)"
|
|
group.long 0x1938++0x7
|
|
line.long 0x00 "TSU_ADRH7 ,CAM Entry Table 7 H"
|
|
line.long 0x04 "TSU_ADRL7 ,CAM Entry Table 7 L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL7 ,MAC Address Bits (lower)"
|
|
group.long 0x1940++0x7
|
|
line.long 0x00 "TSU_ADRH8 ,CAM Entry Table 8 H"
|
|
line.long 0x04 "TSU_ADRL8 ,CAM Entry Table 8 L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL8 ,MAC Address Bits (lower)"
|
|
group.long 0x1948++0x7
|
|
line.long 0x00 "TSU_ADRH9 ,CAM Entry Table 9 H"
|
|
line.long 0x04 "TSU_ADRL9 ,CAM Entry Table 9 L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL9 ,MAC Address Bits (lower)"
|
|
group.long 0x1950++0x7
|
|
line.long 0x00 "TSU_ADRH10,CAM Entry Table 10H"
|
|
line.long 0x04 "TSU_ADRL10,CAM Entry Table 10L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL10 ,MAC Address Bits (lower)"
|
|
group.long 0x1958++0x7
|
|
line.long 0x00 "TSU_ADRH11,CAM Entry Table 11H"
|
|
line.long 0x04 "TSU_ADRL11,CAM Entry Table 11L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL11 ,MAC Address Bits (lower)"
|
|
group.long 0x1960++0x7
|
|
line.long 0x00 "TSU_ADRH12,CAM Entry Table 12H"
|
|
line.long 0x04 "TSU_ADRL12,CAM Entry Table 12L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL12 ,MAC Address Bits (lower)"
|
|
group.long 0x1968++0x7
|
|
line.long 0x00 "TSU_ADRH13,CAM Entry Table 13H"
|
|
line.long 0x04 "TSU_ADRL13,CAM Entry Table 13L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL13 ,MAC Address Bits (lower)"
|
|
group.long 0x1970++0x7
|
|
line.long 0x00 "TSU_ADRH14,CAM Entry Table 14H"
|
|
line.long 0x04 "TSU_ADRL14,CAM Entry Table 14L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL14 ,MAC Address Bits (lower)"
|
|
group.long 0x1978++0x7
|
|
line.long 0x00 "TSU_ADRH15,CAM Entry Table 15H"
|
|
line.long 0x04 "TSU_ADRL15,CAM Entry Table 15L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL15 ,MAC Address Bits (lower)"
|
|
group.long 0x1980++0x7
|
|
line.long 0x00 "TSU_ADRH16,CAM Entry Table 16H"
|
|
line.long 0x04 "TSU_ADRL16,CAM Entry Table 16L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL16 ,MAC Address Bits (lower)"
|
|
group.long 0x1988++0x7
|
|
line.long 0x00 "TSU_ADRH17,CAM Entry Table 17H"
|
|
line.long 0x04 "TSU_ADRL17,CAM Entry Table 17L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL17 ,MAC Address Bits (lower)"
|
|
group.long 0x1990++0x7
|
|
line.long 0x00 "TSU_ADRH18,CAM Entry Table 18H"
|
|
line.long 0x04 "TSU_ADRL18,CAM Entry Table 18L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL18 ,MAC Address Bits (lower)"
|
|
group.long 0x1998++0x7
|
|
line.long 0x00 "TSU_ADRH19,CAM Entry Table 19H"
|
|
line.long 0x04 "TSU_ADRL19,CAM Entry Table 19L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL19 ,MAC Address Bits (lower)"
|
|
group.long 0x19A0++0x7
|
|
line.long 0x00 "TSU_ADRH20,CAM Entry Table 20H"
|
|
line.long 0x04 "TSU_ADRL20,CAM Entry Table 20L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL20 ,MAC Address Bits (lower)"
|
|
group.long 0x19A8++0x7
|
|
line.long 0x00 "TSU_ADRH21,CAM Entry Table 21H"
|
|
line.long 0x04 "TSU_ADRL21,CAM Entry Table 21L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL21 ,MAC Address Bits (lower)"
|
|
group.long 0x19B0++0x7
|
|
line.long 0x00 "TSU_ADRH22,CAM Entry Table 22H"
|
|
line.long 0x04 "TSU_ADRL22,CAM Entry Table 22L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL22 ,MAC Address Bits (lower)"
|
|
group.long 0x19B8++0x7
|
|
line.long 0x00 "TSU_ADRH23,CAM Entry Table 23H"
|
|
line.long 0x04 "TSU_ADRL23,CAM Entry Table 23L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL23 ,MAC Address Bits (lower)"
|
|
group.long 0x19C0++0x7
|
|
line.long 0x00 "TSU_ADRH24,CAM Entry Table 24H"
|
|
line.long 0x04 "TSU_ADRL24,CAM Entry Table 24L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL24 ,MAC Address Bits (lower)"
|
|
group.long 0x19C8++0x7
|
|
line.long 0x00 "TSU_ADRH25,CAM Entry Table 25H"
|
|
line.long 0x04 "TSU_ADRL25,CAM Entry Table 25L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL25 ,MAC Address Bits (lower)"
|
|
group.long 0x19D0++0x7
|
|
line.long 0x00 "TSU_ADRH26,CAM Entry Table 26H"
|
|
line.long 0x04 "TSU_ADRL26,CAM Entry Table 26L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL26 ,MAC Address Bits (lower)"
|
|
group.long 0x19D8++0x7
|
|
line.long 0x00 "TSU_ADRH27,CAM Entry Table 27H"
|
|
line.long 0x04 "TSU_ADRL27,CAM Entry Table 27L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL27 ,MAC Address Bits (lower)"
|
|
group.long 0x19E0++0x7
|
|
line.long 0x00 "TSU_ADRH28,CAM Entry Table 28H"
|
|
line.long 0x04 "TSU_ADRL28,CAM Entry Table 28L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL28 ,MAC Address Bits (lower)"
|
|
group.long 0x19E8++0x7
|
|
line.long 0x00 "TSU_ADRH29,CAM Entry Table 29H"
|
|
line.long 0x04 "TSU_ADRL29,CAM Entry Table 29L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL29 ,MAC Address Bits (lower)"
|
|
group.long 0x19F0++0x7
|
|
line.long 0x00 "TSU_ADRH30,CAM Entry Table 30H"
|
|
line.long 0x04 "TSU_ADRL30,CAM Entry Table 30L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL30 ,MAC Address Bits (lower)"
|
|
group.long 0x19F8++0x7
|
|
line.long 0x00 "TSU_ADRH31,CAM Entry Table 31H"
|
|
line.long 0x04 "TSU_ADRL31,CAM Entry Table 31L"
|
|
hexmask.long.word 0x04 0.--15. 1. " ADRL31 ,MAC Address Bits (lower)"
|
|
tree.end
|
|
textline " "
|
|
hgroup.long 0x1880++0x3
|
|
hide.long 0x00 "TXNLCR0,Transmit Frame Counter Register (Normal Transmission Only)"
|
|
in
|
|
hgroup.long 0x1884++0x3
|
|
hide.long 0x00 "TXALCR0,Transmit Frame Counter Register (Normal and Erroneous Transmission)"
|
|
in
|
|
hgroup.long 0x1888++0x3
|
|
hide.long 0x00 "RXNLCR0,Receive Frame Counter Register(Normal Reception Only)"
|
|
in
|
|
hgroup.long 0x188C++0x3
|
|
hide.long 0x00 "RXALCR0,Receive Frame Counter Register (Normal and Erroneous Reception)"
|
|
in
|
|
wgroup.long 0x00++0x3
|
|
line.long 0x00 "EDSR,E-DMAC Start Register"
|
|
bitfld.long 0x00 1. " ENT ,E-DMAC Transmitting Unit Start" "Stop,Start"
|
|
bitfld.long 0x00 0. " ENR ,E-DMAC Receiving Unit Start" "Stop,Start"
|
|
group.long 0x400++0x3
|
|
line.long 0x00 "EDMR,E-DMAC Mode Register"
|
|
bitfld.long 0x00 6. " DE ,Transmit/Receive Frame Endian" "Big,Little"
|
|
bitfld.long 0x00 4.--5. " DL ,Transmit/Receive Descriptor Length" "16 bytes,32 bytes,64 bytes,"
|
|
bitfld.long 0x00 1. " SWRT ,Software Reset of Transmit FIFO Controller" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWRR ,Software Reset of Receive FIFO Controller" "Disabled,Enabled"
|
|
group.long 0x408++0x3
|
|
line.long 0x00 "EDTRR,E-DMAC Transmit Request Register"
|
|
bitfld.long 0x00 0.--1. " TR ,Transmit Request" "Halted,Halted,Halted,Transmitted"
|
|
group.long 0x410++0x3
|
|
line.long 0x00 "EDRRR,E-DMAC Receive Request Register"
|
|
bitfld.long 0x00 0. " RR ,Receive Request" "Disabled,Enabled"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "TDLAR,Transmit Descriptor List Start Address Register"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "RDLAR,Receive Descriptor List Start Address Register"
|
|
group.long 0x428++0x3
|
|
line.long 0x00 "EESR,E-MAC/E-DMAC Status Register"
|
|
bitfld.long 0x00 30.--31. " TWB ,Write-Back Complete" "Not completed,,,Completed"
|
|
bitfld.long 0x00 21. 29. " TC ,Frame Transmission Complete" "Not completed,,,Completed"
|
|
bitfld.long 0x00 28. " TUC ,Transmit Underflow Frame Write-Back Complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 27. " ROC ,Receive Overflow Frame Write-Back Complete" "Not completed,Completed"
|
|
bitfld.long 0x00 26. " TABT ,Transmit Abort Detect" "Not aborted,Aborted"
|
|
bitfld.long 0x00 25. " RABT ,Receive Abort Detect" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 24. " RFCOF ,Receive Frame Counter Overflow" "No overflow,Overflow"
|
|
bitfld.long 0x00 22. " ECI ,E-MAC Status Register Source" "Not detected,Detected"
|
|
bitfld.long 0x00 20. " TDE ,Transmit Descriptor Empty" "TACT = 1,TACT = 0"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TFUF ,Transmit FIFO Underflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 18. " FR ,Frame Reception" "Not received,Received"
|
|
bitfld.long 0x00 17. " RDE ,Receive Descriptor Empty" "RACT = 1,RACT = 0"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RFOF ,Receive FIFO Overflow" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " RMAF ,Receive Multicast Address Frame" "Not received,Received"
|
|
bitfld.long 0x00 4. " RRF ,Receive Residual-Bit Frame" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RTLF ,Receive Too-Long Frame" "Not received,Received"
|
|
bitfld.long 0x00 2. " RTSF ,Receive Too-Short Frame" "Not received,Received"
|
|
bitfld.long 0x00 1. " PRE ,PHY-LSI Receive Error" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CERF ,CRC Error on Received Frame" "Not detected,Detected"
|
|
group.long 0x430++0x3
|
|
line.long 0x00 "EESIPR,E-MAC/E-DMAC Status Interrupt Permission Register"
|
|
bitfld.long 0x00 31. " TWB1IP ,Write-Back Complete Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TWB0IP ,Write-Back Complete Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " TC1IP ,Frame Transmission Complete Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TUCIP ,Transmit Underflow Frame Write-Back Complete Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " ROCIP ,Receive Overflow Frame Write-Back Complete Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TABTIP ,Transmit Abort Detect Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RABTIP ,Receive Abort Detect Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RFCOFIP ,Receive Frame Counter Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " ECIIP ,E-MAC Status Register Source Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TC0IP ,Frame Transmission Complete Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TDEIP ,Transmit Descriptor Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " TFUFIP ,Transmit FIFO Underflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " FRIP ,Frame Reception Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " RDEIP ,Receive Descriptor Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RFOFIP ,Receive FIFO Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RMAFIP ,Receive Multicast Address Frame Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " RRFIP ,Receive Residual-Bit Frame Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RTLFIP ,Receive Too-Long Frame Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RTSFIP ,Receive Too-Short Frame Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PREIP ,PHY-LSI Receive Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CERFIP ,CRC Error on Received Frame Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x438++0x3
|
|
line.long 0x00 "TRSCER,Transmit/Receive Status Copy Enable Register"
|
|
bitfld.long 0x00 17. " TABTCE ,TABT Bit Copy Directive" "Reflected,Not reflected"
|
|
bitfld.long 0x00 16. " RABTCE ,RABT Bit Copy Directive" "Reflected,Not reflected"
|
|
bitfld.long 0x00 7. " RMAFCE ,RMAF Bit Copy Directive" "Reflected,Not reflected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RRFCE ,RRF Bit Copy Directive" "Reflected,Not reflected"
|
|
bitfld.long 0x00 3. " RTLFCE ,RTLF Bit Copy Directive" "Reflected,Not reflected"
|
|
bitfld.long 0x00 2. " RTSFCE ,RTSF Bit Copy Directive" "Reflected,Not reflected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PRECE ,PRE Bit Copy Directive" "Reflected,Not reflected"
|
|
bitfld.long 0x00 0. " CERFCE ,CERF Bit Copy Directive" "Reflected,Not reflected"
|
|
group.long 0x440++0x3
|
|
line.long 0x00 "RMFCR,Receive Missed-Frame Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " MFC ,Missed-Frame Counter"
|
|
group.long 0x448++0x3
|
|
line.long 0x00 "TFTR,Transmit FIFO Threshold Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " TFT ,Transmit FIFO Threshold"
|
|
group.long 0x450++0x3
|
|
line.long 0x00 "FDR,FIFO Depth Register"
|
|
bitfld.long 0x00 8.--10. " TFD ,Transmit FIFO Size" "256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes,2048 bytes"
|
|
bitfld.long 0x00 0.--4. " RFD ,Receive FIFO Size" "256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes,2048 bytes,2304 bytes,2560 bytes,2816 bytes,3072 bytes,3328 bytes,3584 bytes,3840 bytes,4096 bytes,,,,,,,,,,,,,,,,"
|
|
group.long 0x458++0x3
|
|
line.long 0x00 "RMCR,Receiving Method Control Register"
|
|
bitfld.long 0x00 0. " RNC ,Receive Enable Control" "Write receive status/Clear,Write receive status/Read next"
|
|
group.long 0x34++0xB
|
|
line.long 0x00 "RDFAR,Receive Descriptor Fetch Address Register"
|
|
line.long 0x04 "RDFXR,Receive Descriptor Finished Address Register"
|
|
line.long 0x08 "RDFFR,Receive Descriptor Final Flag Register"
|
|
bitfld.long 0x08 0. " RDLF ,Receive Descriptor Queue Last Flag" "Not last,Last"
|
|
group.long 0x14++0xB
|
|
line.long 0x00 "TDFAR,Transmit Descriptor Fetch Address Register"
|
|
line.long 0x04 "TDFXR,Transmit Descriptor Finished Address Register"
|
|
line.long 0x08 "TDFFR,Transmit Descriptor Final Flag Register"
|
|
bitfld.long 0x08 0. " TDLF ,Transmit Descriptor Queue Last Flag" "Not last,Last"
|
|
group.long 0x468++0x3
|
|
line.long 0x00 "FCFTR,Overflow Alert FIFO Threshold Register"
|
|
bitfld.long 0x00 16.--20. " RFF ,Receive FIFO Overflow Alert Signal Output Threshold" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,,,,,,,,"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RFD ,Receive FIFO Overflow Alert SignalOutput Threshold"
|
|
group.long 0x460++0x3
|
|
line.long 0x00 "RPADIR,Receive Data Padding Insert Register"
|
|
bitfld.long 0x00 16.--20. " PADS ,Padding Size" "No padding,1-byte,2-byte,3-byte,4-byte,5-byte,6-byte,7-byte,8-byte,9-byte,10-byte,11-byte,12-byte,13-byte,14-byte,15-byte,16-byte,17-byte,18-byte,19-byte,20-byte,21-byte,22-byte,23-byte,24-byte,25-byte,26-byte,27-byte,28-byte,29-byte,30-byte,31-byte"
|
|
hexmask.long.word 0x00 0.--15. 1. " PADR ,Padding Slot"
|
|
group.long 0x4E4++0x3
|
|
line.long 0x00 "CSMR,Intelligent Checksum Mode Register"
|
|
bitfld.long 0x00 31. " CSELB ,Intelligent Checksum Calculation Operation Setting" "Not written back,Written back"
|
|
bitfld.long 0x00 30. " CSMD ,Intelligent Checksum Calculation Mode Setting" "All subsequent data,Upper-layer protocol packets"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " SB ,Intelligent Checksum Calculation Skip Bytes" "0 bytes,,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,19 bytes,20 bytes,21 bytes,22 bytes,23 bytes,24 bytes,25 bytes,26 bytes,27 bytes,28 bytes,29 bytes,30 bytes,31 bytes,32 bytes,33 bytes,34 bytes,35 bytes,36 bytes,37 bytes,38 bytes,39 bytes,40 bytes,41 bytes,42 bytes,43 bytes,44 bytes,45 bytes,46 bytes,47 bytes,48 bytes,49 bytes,50 bytes,51 bytes,52 bytes,53 bytes,54 bytes,55 bytes,56 bytes,57 bytes,58 bytes,59 bytes,60 bytes,61 bytes,62 bytes,"
|
|
if (((per.l(ad:0xE8203000+0x4E4))&0xC0000000)==0x80000000)
|
|
rgroup.long 0x4E8++0x7
|
|
line.long 0x00 "CSSBM,Intelligent Checksum Skipped Bytes Monitor Register"
|
|
bitfld.long 0x00 0.--5. " SBM ,Number of Skipped Bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x04 "CSSMR,Intelligent Checksum Monitor Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " CS ,Intelligent Checksum Value"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "A/D Converter"
|
|
base ad:0xE8005800
|
|
width 9.
|
|
rgroup.word 0x00++0xF
|
|
line.word 0x0 "ADDRA,A/D Data Register A"
|
|
hexmask.word 0x0 4.--15. 1. " BD ,Bit Data"
|
|
line.word 0x2 "ADDRB,A/D Data Register B"
|
|
hexmask.word 0x2 4.--15. 1. " BD ,Bit Data"
|
|
line.word 0x4 "ADDRC,A/D Data Register C"
|
|
hexmask.word 0x4 4.--15. 1. " BD ,Bit Data"
|
|
line.word 0x6 "ADDRD,A/D Data Register D"
|
|
hexmask.word 0x6 4.--15. 1. " BD ,Bit Data"
|
|
line.word 0x8 "ADDRE,A/D Data Register E"
|
|
hexmask.word 0x8 4.--15. 1. " BD ,Bit Data"
|
|
line.word 0xA "ADDRF,A/D Data Register F"
|
|
hexmask.word 0xA 4.--15. 1. " BD ,Bit Data"
|
|
line.word 0xC "ADDRG,A/D Data Register G"
|
|
hexmask.word 0xC 4.--15. 1. " BD ,Bit Data"
|
|
line.word 0xE "ADDRH,A/D Data Register H"
|
|
hexmask.word 0xE 4.--15. 1. " BD ,Bit Data"
|
|
group.word 0x20++0x3
|
|
line.word 0x00 "ADCMPHA,A/D Comparison Upper Limit Value Register A"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.word 0x00 6.--15. 1. " CULV ,Comparison Upper Limit Value"
|
|
else
|
|
hexmask.word 0x00 4.--15. 1. " CULV ,Comparison Upper Limit Value"
|
|
endif
|
|
line.word 0x02 "ADCMPLA,A/D Comparison Lower Limit Value Register A"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.word 0x02 6.--15. 1. " CLLV ,Comparison Lower Limit Value"
|
|
else
|
|
hexmask.word 0x02 4.--15. 1. " CLLV ,Comparison Lower Limit Value"
|
|
endif
|
|
group.word 0x24++0x3
|
|
line.word 0x00 "ADCMPHB,A/D Comparison Upper Limit Value Register B"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.word 0x00 6.--15. 1. " CULV ,Comparison Upper Limit Value"
|
|
else
|
|
hexmask.word 0x00 4.--15. 1. " CULV ,Comparison Upper Limit Value"
|
|
endif
|
|
line.word 0x02 "ADCMPLB,A/D Comparison Lower Limit Value Register B"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.word 0x02 6.--15. 1. " CLLV ,Comparison Lower Limit Value"
|
|
else
|
|
hexmask.word 0x02 4.--15. 1. " CLLV ,Comparison Lower Limit Value"
|
|
endif
|
|
group.word 0x28++0x3
|
|
line.word 0x00 "ADCMPHC,A/D Comparison Upper Limit Value Register C"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.word 0x00 6.--15. 1. " CULV ,Comparison Upper Limit Value"
|
|
else
|
|
hexmask.word 0x00 4.--15. 1. " CULV ,Comparison Upper Limit Value"
|
|
endif
|
|
line.word 0x02 "ADCMPLC,A/D Comparison Lower Limit Value Register C"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.word 0x02 6.--15. 1. " CLLV ,Comparison Lower Limit Value"
|
|
else
|
|
hexmask.word 0x02 4.--15. 1. " CLLV ,Comparison Lower Limit Value"
|
|
endif
|
|
group.word 0x2C++0x3
|
|
line.word 0x00 "ADCMPHD,A/D Comparison Upper Limit Value Register D"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.word 0x00 6.--15. 1. " CULV ,Comparison Upper Limit Value"
|
|
else
|
|
hexmask.word 0x00 4.--15. 1. " CULV ,Comparison Upper Limit Value"
|
|
endif
|
|
line.word 0x02 "ADCMPLD,A/D Comparison Lower Limit Value Register D"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.word 0x02 6.--15. 1. " CLLV ,Comparison Lower Limit Value"
|
|
else
|
|
hexmask.word 0x02 4.--15. 1. " CLLV ,Comparison Lower Limit Value"
|
|
endif
|
|
group.word 0x30++0x3
|
|
line.word 0x00 "ADCMPHE,A/D Comparison Upper Limit Value Register E"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.word 0x00 6.--15. 1. " CULV ,Comparison Upper Limit Value"
|
|
else
|
|
hexmask.word 0x00 4.--15. 1. " CULV ,Comparison Upper Limit Value"
|
|
endif
|
|
line.word 0x02 "ADCMPLE,A/D Comparison Lower Limit Value Register E"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.word 0x02 6.--15. 1. " CLLV ,Comparison Lower Limit Value"
|
|
else
|
|
hexmask.word 0x02 4.--15. 1. " CLLV ,Comparison Lower Limit Value"
|
|
endif
|
|
group.word 0x34++0x3
|
|
line.word 0x00 "ADCMPHF,A/D Comparison Upper Limit Value Register F"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.word 0x00 6.--15. 1. " CULV ,Comparison Upper Limit Value"
|
|
else
|
|
hexmask.word 0x00 4.--15. 1. " CULV ,Comparison Upper Limit Value"
|
|
endif
|
|
line.word 0x02 "ADCMPLF,A/D Comparison Lower Limit Value Register F"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.word 0x02 6.--15. 1. " CLLV ,Comparison Lower Limit Value"
|
|
else
|
|
hexmask.word 0x02 4.--15. 1. " CLLV ,Comparison Lower Limit Value"
|
|
endif
|
|
group.word 0x38++0x3
|
|
line.word 0x00 "ADCMPHG,A/D Comparison Upper Limit Value Register G"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.word 0x00 6.--15. 1. " CULV ,Comparison Upper Limit Value"
|
|
else
|
|
hexmask.word 0x00 4.--15. 1. " CULV ,Comparison Upper Limit Value"
|
|
endif
|
|
line.word 0x02 "ADCMPLG,A/D Comparison Lower Limit Value Register G"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.word 0x02 6.--15. 1. " CLLV ,Comparison Lower Limit Value"
|
|
else
|
|
hexmask.word 0x02 4.--15. 1. " CLLV ,Comparison Lower Limit Value"
|
|
endif
|
|
group.word 0x3C++0x3
|
|
line.word 0x00 "ADCMPHH,A/D Comparison Upper Limit Value Register H"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.word 0x00 6.--15. 1. " CULV ,Comparison Upper Limit Value"
|
|
else
|
|
hexmask.word 0x00 4.--15. 1. " CULV ,Comparison Upper Limit Value"
|
|
endif
|
|
line.word 0x02 "ADCMPLH,A/D Comparison Lower Limit Value Register H"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.word 0x02 6.--15. 1. " CLLV ,Comparison Lower Limit Value"
|
|
else
|
|
hexmask.word 0x02 4.--15. 1. " CLLV ,Comparison Lower Limit Value"
|
|
endif
|
|
if (((per.w(ad:0xE8005800+0x60))&0x38)==(0x00||0x08||0x10||0x18))
|
|
group.word 0x60++0x1
|
|
line.word 0x00 "ADCSR,A/D Control/Status Register"
|
|
bitfld.word 0x00 15. " ADF ,A/D End Flag" "Low,High"
|
|
bitfld.word 0x00 14. " ADIE ,A/D Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " ADST ,A/D Start" "Not started,Started"
|
|
textline " "
|
|
bitfld.word 0x00 9.--12. " TRGS ,Timer Trigger Select" "External Trigger input disabled,TRGAN,TRG0N,TRG4AN,TRG4BN,,,,,ADTRG\,,,,,,"
|
|
textline " "
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 6.--8. " CKS ,Clock Select" "256*tcyc,298*tcyc,340*tcyc,382*tcyc,..."
|
|
else
|
|
bitfld.word 0x00 6.--8. " CKS ,Clock Select" "256 + alpha*tcyc,298 + alpha*tcyc,340 + alpha*tcyc,382 + alpha*tcyc,1054 + alpha*tcyc,1096 + alpha*tcyc,1390 + alpha*tcyc,1432 + alpha*tcyc"
|
|
endif
|
|
textline " "
|
|
bitfld.word 0x00 3.--5. " MDS ,Multi-scan Mode" "Single mode,Single mode,Single mode,Single mode,Multi mode (1 to 4 ch),Multi mode (1 to 8 ch),Scan mode (1 to 4 ch),Scan mode (1 to 8 ch)"
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " CH ,Channel Select" "AN0,AN1,AN2,AN3,AN4,AN5,AN6,AN7"
|
|
elif (((per.w(ad:0xE8005800+0x60))&0x38)==(0x20||0x30))
|
|
group.word 0x60++0x1
|
|
line.word 0x00 "ADCSR,A/D Control/Status Register"
|
|
bitfld.word 0x00 15. " ADF ,A/D End Flag" "Low,High"
|
|
bitfld.word 0x00 14. " ADIE ,A/D Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " ADST ,A/D Start" "Not started,Started"
|
|
textline " "
|
|
bitfld.word 0x00 9.--12. " TRGS ,Timer Trigger Select" "External Trigger input disabled,TRGAN,TRG0N,TRG4AN,TRG4BN,,,,,ADTRG\,,,,,,"
|
|
textline " "
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 6.--8. " CKS ,Clock Select" "256*tcyc,298*tcyc,340*tcyc,382*tcyc,..."
|
|
else
|
|
bitfld.word 0x00 6.--8. " CKS ,Clock Select" "256 + alpha*tcyc,298 + alpha*tcyc,340 + alpha*tcyc,382 + alpha*tcyc,1054 + alpha*tcyc,1096 + alpha*tcyc,1390 + alpha*tcyc,1432 + alpha*tcyc"
|
|
endif
|
|
textline " "
|
|
bitfld.word 0x00 3.--5. " MDS ,Multi-scan Mode" "Single mode,Single mode,Single mode,Single mode,Multi mode (1 to 4 ch),Multi mode (1 to 8 ch),Scan mode (1 to 4 ch),Scan mode (1 to 8 ch)"
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " CH ,Channel Select" "AN0,AN0-AN1,AN0-AN2,AN0-AN3,AN4,AN4-AN5,AN4-AN6,AN4-AN7"
|
|
elif (((per.w(ad:0xE8005800+0x60))&0x38)==(0x28||0x38))
|
|
group.word 0x60++0x1
|
|
line.word 0x00 "ADCSR,A/D Control/Status Register"
|
|
bitfld.word 0x00 15. " ADF ,A/D End Flag" "Low,High"
|
|
bitfld.word 0x00 14. " ADIE ,A/D Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " ADST ,A/D Start" "Not started,Started"
|
|
textline " "
|
|
bitfld.word 0x00 9.--12. " TRGS ,Timer Trigger Select" "External Trigger input disabled,TRGAN,TRG0N,TRG4AN,TRG4BN,,,,,ADTRG\,,,,,,"
|
|
textline " "
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 6.--8. " CKS ,Clock Select" "256*tcyc,298*tcyc,340*tcyc,382*tcyc,..."
|
|
else
|
|
bitfld.word 0x00 6.--8. " CKS ,Clock Select" "256 + alpha*tcyc,298 + alpha*tcyc,340 + alpha*tcyc,382 + alpha*tcyc,1054 + alpha*tcyc,1096 + alpha*tcyc,1390 + alpha*tcyc,1432 + alpha*tcyc"
|
|
endif
|
|
textline " "
|
|
bitfld.word 0x00 3.--5. " MDS ,Multi-scan Mode" "Single mode,Single mode,Single mode,Single mode,Multi mode (1 to 4 ch),Multi mode (1 to 8 ch),Scan mode (1 to 4 ch),Scan mode (1 to 8 ch)"
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " CH ,Channel Select" "AN0,AN0-AN1,AN0-AN2,AN0-AN3,AN4-AN5,AN0-AN5,AN0-AN6,AN0-AN7"
|
|
endif
|
|
group.word 0x62++0x3
|
|
line.word 0x00 "ADCMPER,A/D Comparison InterruptEnable Register"
|
|
bitfld.word 0x00 15. " HLMENH ,Comparison with Upper Limit Value and Interrupt Enable H" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " HLMENG ,Comparison with Upper Limit Value and Interrupt Enable G" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " HLMENF ,Comparison with Upper Limit Value and Interrupt Enable F" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " HLMENE ,Comparison with Upper Limit Value and Interrupt Enable E" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " HLMEND ,Comparison with Upper Limit Value and Interrupt Enable D" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " HLMENC ,Comparison with Upper Limit Value and Interrupt Enable C" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " HLMENB ,Comparison with Upper Limit Value and Interrupt Enable B" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " HLMENA ,Comparison with Upper Limit Value and Interrupt Enable A" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " LLMENH ,Comparison with Lower Limit Value and Interrupt Enable H" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " LLMENG ,Comparison with Lower Limit Value and Interrupt Enable G" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " LLMENF ,Comparison with Lower Limit Value and Interrupt Enable F" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " LLMENE ,Comparison with Lower Limit Value and Interrupt Enable E" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " LLMEND ,Comparison with Lower Limit Value and Interrupt Enable D" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " LLMENC ,Comparison with Lower Limit Value and Interrupt Enable C" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " LLMENB ,Comparison with Lower Limit Value and Interrupt Enable B" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " LLMENA ,Comparison with Lower Limit Value and Interrupt Enable A" "Disabled,Enabled"
|
|
line.word 0x02 "ADCMPSR,A/D Comparison Status Register"
|
|
bitfld.word 0x02 15. " HOVRH ,Upper Limit Over Flag H" "Low,High"
|
|
bitfld.word 0x02 14. " HOVRG ,Upper Limit Over Flag G" "Low,High"
|
|
bitfld.word 0x02 13. " HOVRF ,Upper Limit Over Flag F" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x02 12. " HOVRE ,Upper Limit Over Flag E" "Low,High"
|
|
bitfld.word 0x02 11. " HOVRD ,Upper Limit Over Flag D" "Low,High"
|
|
bitfld.word 0x02 10. " HOVRC ,Upper Limit Over Flag C" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x02 9. " HOVRB ,Upper Limit Over Flag B" "Low,High"
|
|
bitfld.word 0x02 8. " HOVRA ,Upper Limit Over Flag A" "Low,High"
|
|
bitfld.word 0x02 7. " LUDRH ,Lower Limit Over Flag H" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x02 6. " LUDRG ,Lower Limit Over Flag G" "Low,High"
|
|
bitfld.word 0x02 5. " LUDRF ,Lower Limit Over Flag F" "Low,High"
|
|
bitfld.word 0x02 4. " LUDRE ,Lower Limit Over Flag E" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x02 3. " LUDRD ,Lower Limit Over Flag D" "Low,High"
|
|
bitfld.word 0x02 2. " LUDRC ,Lower Limit Over Flag C" "Low,High"
|
|
bitfld.word 0x02 1. " LUDRB ,Lower Limit Over Flag B" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x02 0. " LUDRA ,Lower Limit Over Flag A" "Low,High"
|
|
width 0xB
|
|
tree.end
|
|
tree "NAND Flash Memory Controller"
|
|
base ad:0xFCFF4000
|
|
width 0xf
|
|
group.long 0x0++0xb
|
|
line.long 0x0 "FLCMNCR,Common control register"
|
|
bitfld.long 0x00 18. " SNAND ,Large-capacity NAND flash memory select" "512 + 16 bytes,2048 + 64 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 17. " QTSEL ,Flash Clock Division Select" "Div by 2,Div by 4"
|
|
bitfld.long 0x00 10.--11. " ACM ,Access mode specification 1 and 0" "Command,Sector,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9. " NANDWF ,NAND wait insertion operation" "1 cycle,2 cycles"
|
|
bitfld.long 0x00 3. " CE ,Chip enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0xFCFF4000))&0xC00)==0x400)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "FLCMDCR,Command Control Register"
|
|
rbitfld.long 0x00 31. " ADRCNT2 ,Address issue byte count specification 2" "ADRCNT[1:0],5-byte address"
|
|
bitfld.long 0x00 27.--30. " SCTCNT[19:16] ,Sector transfer count specification [19:16]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 26. " ADRMD ,Sector access address specification" "Physical sector,Flash memory"
|
|
bitfld.long 0x00 25. " CDSRC ,Data buffer specification" "FLDATAR,FLDTFIFO"
|
|
textline " "
|
|
bitfld.long 0x00 24. " DOSR ,Status read check" "Not performed,Performed"
|
|
bitfld.long 0x00 21. " SELRW ,Data read/write specification" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 20. " DOADR ,Address stage execution specification" "Not performed,Performed"
|
|
bitfld.long 0x00 18.--19. " ADRCNT[1:0] ,Address issue byte count specification" "1-byte,2-byte,3-byte,4-byte"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DOCMD2 ,Second command stage execution specification" "Not executed,Executed"
|
|
bitfld.long 0x00 16. " DOCMD1 ,First command stage execution specification" "Not executed,Executed"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " SCTCNT[15:0] ,Sector transfer count specification [15:0]"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "FLCMDCR,Command Control Register"
|
|
rbitfld.long 0x00 31. " ADRCNT2 ,Address issue byte count specification 2" "ADRCNT[1:0],5-byte address"
|
|
bitfld.long 0x00 27.--30. " SCTCNT[19:16] ,Sector transfer count specification [19:16]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CDSRC ,Data buffer specification" "FLDATAR,FLDTFIFO"
|
|
textline " "
|
|
bitfld.long 0x00 24. " DOSR ,Status read check" "Not performed,Performed"
|
|
bitfld.long 0x00 21. " SELRW ,Data read/write specification" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 20. " DOADR ,Address stage execution specification" "Not performed,Performed"
|
|
bitfld.long 0x00 18.--19. " ADRCNT[1:0] ,Address issue byte count specification" "1-byte,2-byte,3-byte,4-byte"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DOCMD2 ,Second command stage execution specification" "Not executed,Executed"
|
|
bitfld.long 0x00 16. " DOCMD1 ,First command stage execution specification" "Not executed,Executed"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " SCTCNT[15:0] ,Sector transfer count specification [15:0]"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "FLCMCDR,Command Code Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMD2[7:0] ,Command code issued in the second command stage"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMD1[7:0] ,Command code issued in the first command stage"
|
|
if ((((per.l(ad:0xFCFF4000))&0xc00)==0x400)&&(((per.l(ad:0xFCFF4000+0x4))&0x4000000)==(0x4000000)))
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "FLADR,Address Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ADR4[7:0] ,Fourth address data"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ADR3[7:0] ,Third address data"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ADR2[7:0] ,Second address data"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ADR1[7:0] ,First address data"
|
|
elif ((((per.l(ad:0xFCFF4000))&0xc00)==0x400)&&(((per.l(ad:0xFCFF4000+0x4))&0x84000000)==0x80000000))
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "FLADR,Address Register"
|
|
hexmask.long 0x00 0.--25. 1. " ADR[25:0] ,Physical sector address"
|
|
elif ((((per.l(ad:0xFCFF4000))&0xc00)==0x400)&&(((per.l(ad:0xFCFF4000+0x4))&0x84000000)==0x00))
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "FLADR,Address Register"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " ADR[17:0] ,Physical sector address"
|
|
else
|
|
hgroup.long 0xC++0x3
|
|
hide.long 0x00 "FLADR,Address Register"
|
|
endif
|
|
if (((per.l(ad:0xFCFF4000+0x4))&0x80000000)==0x80000000)
|
|
group.long 0x3C++0x3
|
|
line.long 0x00 "FLADR2,Address Register 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ADR[7:0] ,Fifth address data"
|
|
else
|
|
hgroup.long 0x3c++0x3
|
|
hide.long 0x00 "FLADR2,Address Register 2"
|
|
endif
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "FLDTCNTR,Data Counter Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ECFLW[7:0] ,FLECFIFO access count"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DTFLW[7:0] ,FLDTFIFO access count"
|
|
hexmask.long.word 0x00 0.--11. 1. " DTCNT[11:0] ,Data count specification"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "FLDATAR,Data Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DT4[7:0] ,Fourth data"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DT3[7:0] ,Third data"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DT2[7:0] ,Second data"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DT1[7:0] ,First data"
|
|
group.long 0x18++0x7
|
|
line.long 0x00 "FLINTDMACR,Interrupt DMA Control Register"
|
|
bitfld.long 0x00 20.--21. " FIFOTRG[1:0] ,FIFO Trigger Setting" "4 bytes,16 bytes,128 (4) bytes,128 (16) bytes"
|
|
bitfld.long 0x00 19. " AC1CLR ,FLECFIFO clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 18. " AC0CLR ,FLDTFIFO clear" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " DREQ1EN ,FLECFIFODMA request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DREQ0EN ,FLDTFIFODMA request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " STERB ,Status error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BTOERB ,Timeout error" "No error,Error"
|
|
bitfld.long 0x00 6. " TRREQF1 ,FLECFIFO transfer request flag" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TRREQF0 ,FLDTFIFO transfer request flag" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " STERINTE ,Interrupt enable at status error" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RBERINTE ,Interrupt enable at timeout error" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TEINTE ,Transfer end interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TRINTE1 ,FLECFIFO transfer request enable to CPU" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TRINTE0 ,FLDTFIFO transfer request enable to CPU" "Disabled,Enabled"
|
|
line.long 0x04 "FLBSYTMR,Ready Busy Timeout Setting Register"
|
|
hexmask.long.tbyte 0x04 0.--19. 1. " RBTMOUT[19:0] ,Ready busy timeout"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "FLBSYCNT,Ready Busy Timeout Counter"
|
|
hexmask.long.byte 0x00 24.--31. 1. " STAT[7:0] ,Flash memory status obtained by the status read"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " RBTIMCNT[19:0] ,Ready busy timeout counter"
|
|
hgroup.long 0x50++0x3
|
|
hide.long 0x00 "FLDTFIFO,Data FIFO Register"
|
|
in
|
|
hgroup.long 0x60++0x3
|
|
hide.long 0x00 "FLECFIFO,Control Code FIFO Register"
|
|
in
|
|
group.byte 0x2c++0x0
|
|
line.byte 0x00 "FLTRCR,Transfer Control Register"
|
|
bitfld.byte 0x00 1. " TREND ,Processing end flag bit" "Not finished,Finished"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " TRSTRT ,Transfer start" "Stopped,Started"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "USB2.0 Host/Function Module"
|
|
tree "Channel 0"
|
|
base ad:0xE8010000
|
|
width 13.
|
|
sif (cpu()=="R7S721021")
|
|
if (0==0)
|
|
group.word 0x00++0x3
|
|
line.word 0x00 "SYSCFG0_0,System Configuration Control Register"
|
|
bitfld.word 0x00 7. " HSE ,High-speed operation enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " DCFM ,Controller Mode Select" "Function,Host"
|
|
bitfld.word 0x00 5. " DRPD ,D+/D-Line Resistor Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " DPRPU ,D+ line resistor control" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " UCKSEL ,Input Clock Selection" "48-MHz USB_X1,12-MHz EXTAL"
|
|
bitfld.word 0x00 1. " UPLLE ,USB Internal PLL Operation Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " USBE ,USB block operation enable" "Disabled,Enabled"
|
|
line.word 0x02 "BUSWAIT_0,CPU Bus Wait Register"
|
|
bitfld.word 0x02 0.--5. " BWAIT ,CPU Bus Wait" "0 waits,1 wait,2 waits,3 waits,4 waits,5 waits,6 waits,7 waits,8 waits,9 waits,10 waits,11 waits,12 waits,13 waits,14 waits,15 waits,16 waits,17 waits,18 waits,19 waits,20 waits,21 waits,22 waits,23 waits,24 waits,25 waits,26 waits,27 waits,28 waits,29 waits,30 waits,31 waits,32 waits,33 waits,34 waits,35 waits,36 waits,37 waits,38 waits,39 waits,40 waits,41 waits,42 waits,43 waits,44 waits,45 waits,46 waits,47 waits,48 waits,49 waits,50 waits,51 waits,52 waits,53 waits,54 waits,55 waits,56 waits,57 waits,58 waits,59 waits,60 waits,61 waits,62 waits,63 waits"
|
|
else
|
|
group.word 0x00++0x3
|
|
line.word 0x00 "SYSCFG0_0,System Configuration Control Register"
|
|
bitfld.word 0x00 7. " HSE ,High-speed operation enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " DCFM ,Controller Mode Select" "Function,Host"
|
|
bitfld.word 0x00 5. " DRPD ,D+/D-Line Resistor Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " DPRPU ,D+ line resistor control" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " USBE ,USB block operation enable" "Disabled,Enabled"
|
|
Line.word 0x02 "BUSWAIT_0,CPU Bus Wait Register"
|
|
bitfld.word 0x02 0.--5. " BWAIT ,CPU Bus Wait" "0 waits,1 wait,2 waits,3 waits,4 waits,5 waits,6 waits,7 waits,8 waits,9 waits,10 waits,11 waits,12 waits,13 waits,14 waits,15 waits,16 waits,17 waits,18 waits,19 waits,20 waits,21 waits,22 waits,23 waits,24 waits,25 waits,26 waits,27 waits,28 waits,29 waits,30 waits,31 waits,32 waits,33 waits,34 waits,35 waits,36 waits,37 waits,38 waits,39 waits,40 waits,41 waits,42 waits,43 waits,44 waits,45 waits,46 waits,47 waits,48 waits,49 waits,50 waits,51 waits,52 waits,53 waits,54 waits,55 waits,56 waits,57 waits,58 waits,59 waits,60 waits,61 waits,62 waits,63 waits"
|
|
endif
|
|
else
|
|
group.word 0x00++0x3
|
|
line.word 0x00 "SYSCFG0_0,System Configuration Control Register"
|
|
bitfld.word 0x00 7. " HSE ,High-speed operation enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " DCFM ,Controller Mode Select" "Function,Host"
|
|
bitfld.word 0x00 5. " DRPD ,D+/D-Line Resistor Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " DPRPU ,D+ line resistor control" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " UCKSEL ,Input Clock Selection" "48-MHz USB_X1,12-MHz EXTAL"
|
|
bitfld.word 0x00 1. " UPLLE ,USB Internal PLL Operation Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " USBE ,USB block operation enable" "Disabled,Enabled"
|
|
line.word 0x02 "BUSWAIT_0,CPU Bus Wait Register"
|
|
bitfld.word 0x02 0.--5. " BWAIT ,CPU Bus Wait" "0 waits,1 wait,2 waits,3 waits,4 waits,5 waits,6 waits,7 waits,8 waits,9 waits,10 waits,11 waits,12 waits,13 waits,14 waits,15 waits,16 waits,17 waits,18 waits,19 waits,20 waits,21 waits,22 waits,23 waits,24 waits,25 waits,26 waits,27 waits,28 waits,29 waits,30 waits,31 waits,32 waits,33 waits,34 waits,35 waits,36 waits,37 waits,38 waits,39 waits,40 waits,41 waits,42 waits,43 waits,44 waits,45 waits,46 waits,47 waits,48 waits,49 waits,50 waits,51 waits,52 waits,53 waits,54 waits,55 waits,56 waits,57 waits,58 waits,59 waits,60 waits,61 waits,62 waits,63 waits"
|
|
endif
|
|
rgroup.word 0x04++0x1
|
|
line.word 0x00 "SYSSTS0_0,System Configuration Status Register"
|
|
bitfld.word 0x00 6. " HTACT ,USB Host Sequencer Status Monitor" "Stopped,Running"
|
|
bitfld.word 0x00 5. " SOFEA ,SOF Active Monitor when the Host Controller Mode Is Selected" "Stopped,In progress"
|
|
bitfld.word 0x00 0.--1. " LNST ,USB data line status (Full-speed/High-speed/Chirp)" "SE0|Squelch|Squelch,J-state|/Squelch|Chirp-J,K-state|Invalid|Chirp K,SE1|Invalid|Invalid"
|
|
if (((per.w(ad:0xE8010000))&0x80)==0x80)
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "DVSTCTR0_0,Device State Control Register"
|
|
bitfld.word 0x00 8. " WKUP ,Wakeup output" "No signal,Wakeup"
|
|
bitfld.word 0x00 7. " RWUPE ,Remote Wakeup Detection Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " USBRST ,Bus Reset Output" "Not output,Output"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RESUME ,Resume Output" "Not output,Output"
|
|
bitfld.word 0x00 4. " UACT ,USB Bus Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 0.--2. " RHST ,Reset handshake" "Not determined,Low-speed,Full-speed,High-speed,Reset handshake,Reset handshake,Reset handshake,Reset handshake"
|
|
else
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "DVSTCTR0_0,Device State Control Register"
|
|
bitfld.word 0x00 8. " WKUP ,Wakeup output" "No signal,Wakeup"
|
|
bitfld.word 0x00 7. " RWUPE ,Remote Wakeup Detection Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " USBRST ,Bus Reset Output" "Not output,Output"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RESUME ,Resume Output" "Not output,Output"
|
|
bitfld.word 0x00 4. " UACT ,USB Bus Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 0.--2. " RHST ,Reset handshake" "Not determined,,Full-speed,High-speed,Reset handshake,,,"
|
|
endif
|
|
if (((per.w(ad:0xE8010000))&0x80)==0x00)
|
|
group.word 0x0C++0x1
|
|
line.word 0x00 "TESTMODE0_0,Test Mode Register"
|
|
bitfld.word 0x00 0.--3. " UTST ,Test mode" "Normal,Test_J,Test_K,Test_SE0_NAK,Test_Packet,,,,,,,,,,,"
|
|
else
|
|
group.word 0x0C++0x1
|
|
line.word 0x00 "TESTMODE0_0,Test Mode Register"
|
|
bitfld.word 0x00 0.--3. " UTST ,Test mode" ",,,,,,,,,Test_J,Test_K,Test_SE0_NAK,Test_Packet,Test_Force_Enable,,"
|
|
endif
|
|
group.word 0x10++0x3
|
|
line.word 0x00 "D0FBCFG_0,DMA0-FIFO Bus Configuration Register"
|
|
bitfld.word 0x00 12.--13. " DFACC ,DMA FIFO Access Mode" "Cycle steal,16-byte,32-byte,"
|
|
bitfld.word 0x00 4. " TENDE ,TEND_N Signal Enable" "Disabled,Enabled"
|
|
line.word 0x02 "D1FBCFG_0,DMA1-FIFO Bus Configuration Register"
|
|
bitfld.word 0x02 12.--13. " DFACC ,DMA FIFO Access Mode" "Cycle steal,16-byte,32-byte,"
|
|
bitfld.word 0x02 4. " TENDE ,TEND_N Signal Enable" "Disabled,Enabled"
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x00 "CFIFO_0,FIFO Port Register C"
|
|
in
|
|
hgroup.long 0x18++0x3
|
|
hide.long 0x00 "D0FIFO_0,FIFO Port Register D0"
|
|
in
|
|
hgroup.long 0x1C++0x3
|
|
hide.long 0x00 "D1FIFO_0,FIFO Port Register D1"
|
|
in
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "CFIFOSEL_0,FIFO Port Select Register C"
|
|
bitfld.word 0x00 15. " RCNT ,Read count mode" "Cleared,Decremented"
|
|
bitfld.word 0x00 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound"
|
|
bitfld.word 0x00 10.--11. " MBW ,FIFO port access bit width" "8-bit,16-bit,32-bit,"
|
|
textline " "
|
|
bitfld.word 0x00 8. " BIGEND ,CFIFO Port Endian Control" "Little,Big"
|
|
bitfld.word 0x00 5. " ISEL ,FIFO port access direction when DCP is selected" "Read,Write"
|
|
bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe 10,Pipe 11,Pipe 12,Pipe 13,Pipe 14,Pipe 15"
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "D0FIFOSEL_0,FIFO Port Select Register D0"
|
|
bitfld.word 0x00 15. " RCNT ,Read count mode" "Cleared,Decremented"
|
|
bitfld.word 0x00 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound"
|
|
bitfld.word 0x00 13. " DCLRM ,Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DREQE ,UCL_D_DREQ Signal Output Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " MBW ,FIFO port access bit width" "8-bit,16-bit,32-bit,"
|
|
bitfld.word 0x00 8. " BIGEND ,CFIFO Port Endian Control" "Little,Big"
|
|
textline " "
|
|
sif (cpu()!="R7S721021")
|
|
bitfld.word 0x00 5. " ISEL ,FIFO port access direction when DCP is selected" "Read,Write"
|
|
bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe 10,Pipe 11,Pipe 12,Pipe 13,Pipe 14,Pipe 15"
|
|
else
|
|
bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe 10,Pipe 11,Pipe 12,Pipe 13,Pipe 14,Pipe 15"
|
|
endif
|
|
group.word 0x2C++0x1
|
|
line.word 0x00 "D1FIFOSEL_0,FIFO Port Select Register D1"
|
|
bitfld.word 0x00 15. " RCNT ,Read count mode" "Cleared,Decremented"
|
|
bitfld.word 0x00 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound"
|
|
bitfld.word 0x00 13. " DCLRM ,Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DREQE ,UCL_D_DREQ Signal Output Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " MBW ,FIFO port access bit width" "8-bit,16-bit,32-bit,"
|
|
bitfld.word 0x00 8. " BIGEND ,CFIFO Port Endian Control" "Little,Big"
|
|
textline " "
|
|
sif (cpu()!="R7S721021")
|
|
bitfld.word 0x00 5. " ISEL ,FIFO port access direction when DCP is selected" "Read,Write"
|
|
bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe 10,Pipe 11,Pipe 12,Pipe 13,Pipe 14,Pipe 15"
|
|
else
|
|
bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe 10,Pipe 11,Pipe 12,Pipe 13,Pipe 14,Pipe 15"
|
|
endif
|
|
group.word 0x22++0x1
|
|
line.word 0x00 "CFIFOCTR_0,FIFO Port Control Register"
|
|
bitfld.word 0x00 15. " BVAL ,Buffer Memory Enable Flag" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " BCLR ,CPU buffer clear" ",Cleared"
|
|
rbitfld.word 0x00 13. " FRDY ,FIFO port ready" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word 0x00 0.--11. 1. " DTLN ,Receive data length"
|
|
group.word 0x2A++0x1
|
|
line.word 0x00 "D0FIFOCTR_0,FIFO Port Control Register"
|
|
bitfld.word 0x00 15. " BVAL ,Buffer Memory Enable Flag" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " BCLR ,CPU buffer clear" ",Cleared"
|
|
rbitfld.word 0x00 13. " FRDY ,FIFO port ready" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word 0x00 0.--11. 1. " DTLN ,Receive data length"
|
|
group.word 0x2E++0x1
|
|
line.word 0x00 "D1FIFOCTR_0,FIFO Port Control Register"
|
|
bitfld.word 0x00 15. " BVAL ,Buffer Memory Enable Flag" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " BCLR ,CPU buffer clear" ",Cleared"
|
|
rbitfld.word 0x00 13. " FRDY ,FIFO port ready" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word 0x00 0.--11. 1. " DTLN ,Receive data length"
|
|
group.word 0x30++0x3
|
|
line.word 0x00 "INTENB0_0,Interrupts Enable Register 0"
|
|
bitfld.word 0x00 15. " VBSE ,VBUS interrupts enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " RSME ,Resume interrupts enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " SOFE ,Frame number update interrupts enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DVSE ,Device state transition interrupts enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " CTRE ,Control transfer stage transition interrupts enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " BEMPE ,Buffer empty interrupts enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " NRDYE ,Buffer not ready response interrupts enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " BRDYE ,Buffer ready interrupts enable" "Disabled,Enabled"
|
|
line.word 0x02 "INTENB1_0,Interrupts Enable Register 1"
|
|
bitfld.word 0x02 14. " BCHGE ,USB Bus Change Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 12. " DTCHE ,Disconnection Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 11. " ATTCHE ,Connection Detection Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 6. " EOFERRE ,EOF Error Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 5. " SIGNE ,Setup Transaction Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 4. " SACKE ,Setup Transaction Normal Response Interrupt Enable" "Disabled,Enabled"
|
|
group.word 0x36++0x5
|
|
line.word 0x00 "BRDYENB_0,BRDY Interrupt Enable Register"
|
|
bitfld.word 0x00 15. " PIPEFBRDYE ,BRDY interrupt enable for PIPEF" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " PIPEEBRDYE ,BRDY interrupt enable for PIPEE" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " PIPEDBRDYE ,BRDY interrupt enable for PIPED" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " PIPECBRDYE ,BRDY interrupt enable for PIPEC" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " PIPEBBRDYE ,BRDY interrupt enable for PIPEB" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " PIPEABRDYE ,BRDY interrupt enable for PIPEA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " PIPE9BRDYE ,BRDY interrupt enable for PIPE9" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PIPE8BRDYE ,BRDY interrupt enable for PIPE8" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " PIPE7BRDYE ,BRDY interrupt enable for PIPE7" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " PIPE6BRDYE ,BRDY interrupt enable for PIPE6" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " PIPE5BRDYE ,BRDY interrupt enable for PIPE5" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " PIPE4BRDYE ,BRDY interrupt enable for PIPE4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " PIPE3BRDYE ,BRDY interrupt enable for PIPE3" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " PIPE2BRDYE ,BRDY interrupt enable for PIPE2" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " PIPE1BRDYE ,BRDY interrupt enable for PIPE1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " PIPE0BRDYE ,BRDY interrupt enable for PIPE0" "Disabled,Enabled"
|
|
line.word 0x02 "NRDYENB_0,NRDY Interrupt Enable Register"
|
|
bitfld.word 0x02 15. " PIPEFNRDYE ,NRDY interrupt enable for PIPEF" "Disabled,Enabled"
|
|
bitfld.word 0x02 14. " PIPEENRDYE ,NRDY interrupt enable for PIPEE" "Disabled,Enabled"
|
|
bitfld.word 0x02 13. " PIPEDNRDYE ,NRDY interrupt enable for PIPED" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 12. " PIPECNRDYE ,NRDY interrupt enable for PIPEC" "Disabled,Enabled"
|
|
bitfld.word 0x02 11. " PIPEBNRDYE ,NRDY interrupt enable for PIPEB" "Disabled,Enabled"
|
|
bitfld.word 0x02 10. " PIPEANRDYE ,NRDY interrupt enable for PIPEA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PIPE9NRDYE ,NRDY interrupt enable for PIPE9" "Disabled,Enabled"
|
|
bitfld.word 0x02 8. " PIPE8NRDYE ,NRDY interrupt enable for PIPE8" "Disabled,Enabled"
|
|
bitfld.word 0x02 7. " PIPE7NRDYE ,NRDY interrupt enable for PIPE7" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 6. " PIPE6NRDYE ,NRDY interrupt enable for PIPE6" "Disabled,Enabled"
|
|
bitfld.word 0x02 5. " PIPE5NRDYE ,NRDY interrupt enable for PIPE5" "Disabled,Enabled"
|
|
bitfld.word 0x02 4. " PIPE4NRDYE ,NRDY interrupt enable for PIPE4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 3. " PIPE3NRDYE ,NRDY interrupt enable for PIPE3" "Disabled,Enabled"
|
|
bitfld.word 0x02 2. " PIPE2NRDYE ,NRDY interrupt enable for PIPE2" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " PIPE1NRDYE ,NRDY interrupt enable for PIPE1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 0. " PIPE0NRDYE ,NRDY interrupt enable for PIPE0" "Disabled,Enabled"
|
|
line.word 0x04 "BEMPENB_0,BEMP Interrupt Enable Register"
|
|
bitfld.word 0x04 15. " PIPEFBEMPE ,BEMP interrupt enable for PIPEF" "Disabled,Enabled"
|
|
bitfld.word 0x04 14. " PIPEEBEMPE ,BEMP interrupt enable for PIPEE" "Disabled,Enabled"
|
|
bitfld.word 0x04 13. " PIPEDBEMPE ,BEMP interrupt enable for PIPED" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 12. " PIPECBEMPE ,BEMP interrupt enable for PIPEC" "Disabled,Enabled"
|
|
bitfld.word 0x04 11. " PIPEBBEMPE ,BEMP interrupt enable for PIPEB" "Disabled,Enabled"
|
|
bitfld.word 0x04 10. " PIPEABEMPE ,BEMP interrupt enable for PIPEA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 9. " PIPE9BEMPE ,BEMP interrupt enable for PIPE9" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " PIPE8BEMPE ,BEMP interrupt enable for PIPE8" "Disabled,Enabled"
|
|
bitfld.word 0x04 7. " PIPE7BEMPE ,BEMP interrupt enable for PIPE7" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 6. " PIPE6BEMPE ,BEMP interrupt enable for PIPE6" "Disabled,Enabled"
|
|
bitfld.word 0x04 5. " PIPE5BEMPE ,BEMP interrupt enable for PIPE5" "Disabled,Enabled"
|
|
bitfld.word 0x04 4. " PIPE4BEMPE ,BEMP interrupt enable for PIPE4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 3. " PIPE3BEMPE ,BEMP interrupt enable for PIPE3" "Disabled,Enabled"
|
|
bitfld.word 0x04 2. " PIPE2BEMPE ,BEMP interrupt enable for PIPE2" "Disabled,Enabled"
|
|
bitfld.word 0x04 1. " PIPE1BEMPE ,BEMP interrupt enable for PIPE1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 0. " PIPE0BEMPE ,BEMP interrupt enable for PIPE0" "Disabled,Enabled"
|
|
group.word 0x3C++0x1
|
|
line.word 0x00 "SOFCFG_0,SOF Output Configuration Register"
|
|
bitfld.word 0x00 8. " TRNENSEL ,Transaction-Enabled Time Select" "Non-low-speed,Low-speed"
|
|
bitfld.word 0x00 6. " BRDYM ,Status Clear Timing of Each Pipe BRDY Interrupt" "Cleared by SW,Cleared by reading"
|
|
group.word 0x40++0x3
|
|
line.word 0x00 "INTSTS0_0,Interrupt Status Register 0"
|
|
bitfld.word 0x00 15. " VBINT ,VBUS interrupt status" "Not generated,Generated"
|
|
bitfld.word 0x00 14. " RESM ,Resume interrupt status" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x00 13. " SOFR ,Frame number refresh interrupt status" "Not generated,Generated"
|
|
bitfld.word 0x00 12. " DVST ,Device state transition interrupt status" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CTRT ,Control transfer stage transition interrupt status" "Not generated,Generated"
|
|
rbitfld.word 0x00 10. " BEMP ,Buffer empty interrupt status" "Not generated,Generated"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " NRDY ,Buffer not ready interrupt status" "Not generated,Generated"
|
|
rbitfld.word 0x00 8. " BRDY ,Buffer ready interrupt status" "Not generated,Generated"
|
|
textline " "
|
|
rbitfld.word 0x00 7. " VBSTS ,VBUS input status" "Low,High"
|
|
rbitfld.word 0x00 4.--6. " DVSQ ,Device state" "Powered,Default,Address,Configured,Suspended,Suspended,Suspended,Suspended"
|
|
textline " "
|
|
bitfld.word 0x00 3. " VALID ,Setup packet reception" "Not detected,Detected"
|
|
rbitfld.word 0x00 0.--2. " CTSQ ,Control transfer stage" "Idle/Setup,Read data,Read status,Write Data,Write status,Write (no data) status,Sequence error,"
|
|
line.word 0x02 "INTSTS1_0,Interrupt Status Register 1"
|
|
bitfld.word 0x02 14. " BCHG ,USB Bus Change Interrupt Status" "Not generated,Generated"
|
|
bitfld.word 0x02 12. " DTCH ,USB Disconnection Detection Interrupt Status" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x02 11. " ATTCH ,ATTCH Interrupt Status" "Not generated,Generated"
|
|
bitfld.word 0x02 6. " EOFERR ,EOF Error Detection Interrupt Status" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x02 5. " SIGN ,Setup Transaction Error Interrupt Status" "Not generated,Generated"
|
|
bitfld.word 0x02 4. " SACK ,Setup Transaction Normal Response Interrupt Status" "Not generated,Generated"
|
|
group.word 0x46++0x5
|
|
line.word 0x00 "BRDYSTS_0,BRDY Interrupt Status Register"
|
|
bitfld.word 0x00 15. " PIPEFBRDY ,BRDY interrupt status for PIPE F" "Not generated,Generated"
|
|
bitfld.word 0x00 14. " PIPEEBRDY ,BRDY interrupt status for PIPE E" "Not generated,Generated"
|
|
bitfld.word 0x00 13. " PIPEDBRDY ,BRDY interrupt status for PIPE D" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x00 12. " PIPECBRDY ,BRDY interrupt status for PIPE C" "Not generated,Generated"
|
|
bitfld.word 0x00 11. " PIPEBBRDY ,BRDY interrupt status for PIPE B" "Not generated,Generated"
|
|
bitfld.word 0x00 10. " PIPEABRDY ,BRDY interrupt status for PIPE A" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x00 9. " PIPE9BRDY ,BRDY interrupt status for PIPE 9" "Not generated,Generated"
|
|
bitfld.word 0x00 8. " PIPE8BRDY ,BRDY interrupt status for PIPE 8" "Not generated,Generated"
|
|
bitfld.word 0x00 7. " PIPE7BRDY ,BRDY interrupt status for PIPE 7" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x00 6. " PIPE6BRDY ,BRDY interrupt status for PIPE 6" "Not generated,Generated"
|
|
bitfld.word 0x00 5. " PIPE5BRDY ,BRDY interrupt status for PIPE 5" "Not generated,Generated"
|
|
bitfld.word 0x00 4. " PIPE4BRDY ,BRDY interrupt status for PIPE 4" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x00 3. " PIPE3BRDY ,BRDY interrupt status for PIPE 3" "Not generated,Generated"
|
|
bitfld.word 0x00 2. " PIPE2BRDY ,BRDY interrupt status for PIPE 2" "Not generated,Generated"
|
|
bitfld.word 0x00 1. " PIPE1BRDY ,BRDY interrupt status for PIPE 1" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x00 0. " PIPE0BRDY ,BRDY interrupt status for PIPE 0" "Not generated,Generated"
|
|
line.word 0x02 "NRDYSTS_0,NRDY Interrupt Status Register"
|
|
bitfld.word 0x02 15. " PIPEFNRDY ,NRDY interrupt status for PIPE F" "Not generated,Generated"
|
|
bitfld.word 0x02 14. " PIPEENRDY ,NRDY interrupt status for PIPE E" "Not generated,Generated"
|
|
bitfld.word 0x02 13. " PIPEDNRDY ,NRDY interrupt status for PIPE D" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x02 12. " PIPECNRDY ,NRDY interrupt status for PIPE C" "Not generated,Generated"
|
|
bitfld.word 0x02 11. " PIPEBNRDY ,NRDY interrupt status for PIPE B" "Not generated,Generated"
|
|
bitfld.word 0x02 10. " PIPEANRDY ,NRDY interrupt status for PIPE A" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PIPE9NRDY ,NRDY interrupt status for PIPE 9" "Not generated,Generated"
|
|
bitfld.word 0x02 8. " PIPE8NRDY ,NRDY interrupt status for PIPE 8" "Not generated,Generated"
|
|
bitfld.word 0x02 7. " PIPE7NRDY ,NRDY interrupt status for PIPE 7" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x02 6. " PIPE6NRDY ,NRDY interrupt status for PIPE 6" "Not generated,Generated"
|
|
bitfld.word 0x02 5. " PIPE5NRDY ,NRDY interrupt status for PIPE 5" "Not generated,Generated"
|
|
bitfld.word 0x02 4. " PIPE4NRDY ,NRDY interrupt status for PIPE 4" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x02 3. " PIPE3NRDY ,NRDY interrupt status for PIPE 3" "Not generated,Generated"
|
|
bitfld.word 0x02 2. " PIPE2NRDY ,NRDY interrupt status for PIPE 2" "Not generated,Generated"
|
|
bitfld.word 0x02 1. " PIPE1NRDY ,NRDY interrupt status for PIPE 1" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x02 0. " PIPE0NRDY ,NRDY interrupt status for PIPE 0" "Not generated,Generated"
|
|
line.word 0x04 "BEMPSTS_0,BEMP Interrupt Status Register"
|
|
bitfld.word 0x04 15. " PIPEFBEMP ,BEMP interrupt status for PIPE F" "Not generated,Generated"
|
|
bitfld.word 0x04 14. " PIPEEBEMP ,BEMP interrupt status for PIPE E" "Not generated,Generated"
|
|
bitfld.word 0x04 13. " PIPEDBEMP ,BEMP interrupt status for PIPE D" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x04 12. " PIPECBEMP ,BEMP interrupt status for PIPE C" "Not generated,Generated"
|
|
bitfld.word 0x04 11. " PIPEBBEMP ,BEMP interrupt status for PIPE B" "Not generated,Generated"
|
|
bitfld.word 0x04 10. " PIPEABEMP ,BEMP interrupt status for PIPE A" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x04 9. " PIPE9BEMP ,BEMP interrupt status for PIPE 9" "Not generated,Generated"
|
|
bitfld.word 0x04 8. " PIPE8BEMP ,BEMP interrupt status for PIPE 8" "Not generated,Generated"
|
|
bitfld.word 0x04 7. " PIPE7BEMP ,BEMP interrupt status for PIPE 7" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x04 6. " PIPE6BEMP ,BEMP interrupt status for PIPE 6" "Not generated,Generated"
|
|
bitfld.word 0x04 5. " PIPE5BEMP ,BEMP interrupt status for PIPE 5" "Not generated,Generated"
|
|
bitfld.word 0x04 4. " PIPE4BEMP ,BEMP interrupt status for PIPE 4" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x04 3. " PIPE3BEMP ,BEMP interrupt status for PIPE 3" "Not generated,Generated"
|
|
bitfld.word 0x04 2. " PIPE2BEMP ,BEMP interrupt status for PIPE 2" "Not generated,Generated"
|
|
bitfld.word 0x04 1. " PIPE1BEMP ,BEMP interrupt status for PIPE 1" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x04 0. " PIPE0BEMP ,BEMP interrupt status for PIPE 0" "Not generated,Generated"
|
|
group.word 0x4C++0x1
|
|
line.word 0x00 "FRMNUM_0,Frame Number Register"
|
|
bitfld.word 0x00 15. " OVRN ,Overrun/Underrun" "No error,Error"
|
|
bitfld.word 0x00 14. " CRCE ,Receive data error" "No error,Error"
|
|
hexmask.word 0x00 0.--10. 1. " FRNM ,Frame number"
|
|
rgroup.word 0x4E++0x1
|
|
line.word 0x0 "UFRMNUM_0,uFrame Number Register"
|
|
bitfld.word 0x0 0.--2. " UFRNM ,uFrame" "0,1,2,3,4,5,6,7"
|
|
rgroup.word 0x50++0x1
|
|
line.word 0x00 "USBADDR_0,USB Address Register"
|
|
hexmask.word.byte 0x00 0.--6. 1. " USBADDR ,USB address"
|
|
rgroup.word 0x54++0x9
|
|
line.word 0x00 "USBREQ_0,USB Request Type Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " BREQUEST ,Request"
|
|
hexmask.word.byte 0x00 0.--7. 1. " BMREQUESTTYPE ,Request Type"
|
|
line.word 0x02 "USBVAL_0,USB Request Value Register"
|
|
line.word 0x04 "USBINDX_0,USB Request Index Register"
|
|
line.word 0x06 "USBLENG_0,USB Request Length Register"
|
|
line.word 0x08 "DCPCFG_0,DCP Configuration Register"
|
|
bitfld.word 0x08 4. " DIR ,Transfer Direction" "Receive,Transmit"
|
|
group.word 0x5E++0x3
|
|
line.word 0x00 "DCPMAXP_0,DCP Maximum Packet Size Register"
|
|
bitfld.word 0x00 12.--15. " DEVSEL ,Device Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.word.byte 0x00 0.--6. 1. " MXPS ,Maximum packet size"
|
|
line.word 0x02 "DCPCTR_0,DCP Control Register"
|
|
rbitfld.word 0x02 15. " BSTS ,Buffer status" "Disabled,Enabled"
|
|
bitfld.word 0x02 14. " SUREQ ,Setup Token Transmission" ",Setup packet"
|
|
bitfld.word 0x02 13. " CSCLR ,C-SPLIT Status Clear for Split Transaction" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x02 12. " CSSTS ,COMPLETE SPLIT (C-SPLIT) Status of Split Transaction" "Not split,Split"
|
|
bitfld.word 0x02 11. " SUREQCLR ,SUREQ Bit Clear" ",Cleared"
|
|
bitfld.word 0x02 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x02 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x02 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x02 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x02 4. " PINGE ,PING Token Issue Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 2. " CCPL ,Control transfer end enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
tree "PIPE Registers"
|
|
group.word 0x64++0x1
|
|
line.word 0x0 "PIPESEL_0,Pipe Window Select Register"
|
|
bitfld.word 0x0 0.--3. " PIPESEL ,Pipe window select" "Not selected,PIPE1,PIPE2,PIPE3,PIPE4,PIPE5,PIPE6,PIPE7,PIPE8,PIPE9,PIPE10,PIPE11,PIPE12,PIPE13,PIPE14,PIPE15"
|
|
if (((per.w(ad:0xE8010000+0x64))&0xF)==(0x1||0x2))
|
|
group.word 0x68++0x1
|
|
line.word 0x00 "PIPECFG_0,Pipe Configuration Register"
|
|
bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,Bulk,,Isochronous"
|
|
bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read"
|
|
bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous"
|
|
bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled"
|
|
bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
elif (((per.w(ad:0xE8010000+0x64))&0xF)==(0x3||0x4||0x5))
|
|
group.word 0x68++0x1
|
|
line.word 0x00 "PIPECFG_0,Pipe Configuration Register"
|
|
bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,Bulk,,"
|
|
bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read"
|
|
bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous"
|
|
bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled"
|
|
bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
elif (((per.w(ad:0xE8010000+0x64))&0xF)==0x9)
|
|
group.word 0x68++0x1
|
|
line.word 0x00 "PIPECFG_0,Pipe Configuration Register"
|
|
bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,Bulk,Interrupt,"
|
|
bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read"
|
|
bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous"
|
|
bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled"
|
|
bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
elif (((per.w(ad:0xE8010000+0x64))&0xF)==0xA)
|
|
group.word 0x68++0x1
|
|
line.word 0x00 "PIPECFG_0,Pipe Configuration Register"
|
|
bitfld.word 0x00 14.--15. " TYPE ,Transfer type" ",Bulk,Interrupt,"
|
|
bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read"
|
|
bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous"
|
|
bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled"
|
|
bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
elif (((per.w(ad:0xE8010000+0x64))&0xF)==(0xB||0xC||0xD||0xE||0xF))
|
|
group.word 0x68++0x1
|
|
line.word 0x00 "PIPECFG_0,Pipe Configuration Register"
|
|
bitfld.word 0x00 14.--15. " TYPE ,Transfer type" ",Bulk,,"
|
|
bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read"
|
|
bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous"
|
|
bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled"
|
|
bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
elif (((per.w(ad:0xE8010000+0x64))&0xF)==(0x6||0x7||0x8))
|
|
group.word 0x68++0x1
|
|
line.word 0x00 "PIPECFG_0,Pipe Configuration Register"
|
|
bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,Bulk,Interrupt,"
|
|
bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group.word 0x68++0x1
|
|
line.word 0x00 "PIPECFG_0,Pipe Configuration Register"
|
|
bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending"
|
|
bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
group.word 0x6A++0x3
|
|
line.word 0x00 "PIPEBUF_0,Pipe Buffer Setting Register"
|
|
bitfld.word 0x00 10.--14. " BUFSIZE ,Buffer size" "64 bytes,128 bytes,196 bytes,256 bytes,320 bytes,384 bytes,448 bytes,512 bytes,576 bytes,640 bytes,704 bytes,768 bytes,832 bytes,896 bytes,960 bytes,1024 bytes,1088 bytes,1152 bytes,1216 bytes,1280 bytes,1344 bytes,1408 bytes,1472 bytes,1536 bytes,1600 bytes,1664 bytes,1728 bytes,1792 bytes,1856 bytes,1920 bytes,1984 bytes,2048 bytes"
|
|
hexmask.word.byte 0x00 0.--7. 1. " BUFNMB ,Buffer number"
|
|
line.word 0x02 "PIPEMAXP_0,Pipe Maximum Packet Size Register"
|
|
bitfld.word 0x02 12.--15. " DEVSEL ,Device Select" "0,1,2,3,4,5,6,7,8,9,10,,,,,"
|
|
hexmask.word 0x02 0.--10. 1. " MXPS ,Maximum packet size"
|
|
if (((per.w(ad:0xE8010000+0x64))&0xF)==(0x3||0x4||0x5||0xA||0xB||0xC||0xD||0xE||0xF))
|
|
group.word 0x6E++0x1
|
|
line.word 0x00 "PIPEPERI_0,Pipe Timing Control Register"
|
|
bitfld.word 0x00 12. " IFIS ,Isochronous IN buffer flush" "Not flushed,Flushed"
|
|
bitfld.word 0x00 0.--2. " IITV ,Interval error detection interval" "T,T/2,T/4,T/8,T/16,T/32,T/64,T/128"
|
|
else
|
|
group.word 0x6E++0x1
|
|
line.word 0x00 "PIPEPERI_0,Pipe Timing Control Register"
|
|
bitfld.word 0x00 12. " IFIS ,Isochronous IN buffer flush" "Not flushed,Flushed"
|
|
endif
|
|
if ('1'==('6'||'7'||'8'))
|
|
group.word 0x70++0x1
|
|
line.word 0x00 "PIPE1CTR_0,PIPE1 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x70++0x1
|
|
line.word 0x00 "PIPE1CTR_0,PIPE1 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('2'==('6'||'7'||'8'))
|
|
group.word 0x72++0x1
|
|
line.word 0x00 "PIPE2CTR_0,PIPE2 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x72++0x1
|
|
line.word 0x00 "PIPE2CTR_0,PIPE2 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('3'==('6'||'7'||'8'))
|
|
group.word 0x74++0x1
|
|
line.word 0x00 "PIPE3CTR_0,PIPE3 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x74++0x1
|
|
line.word 0x00 "PIPE3CTR_0,PIPE3 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('4'==('6'||'7'||'8'))
|
|
group.word 0x76++0x1
|
|
line.word 0x00 "PIPE4CTR_0,PIPE4 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x76++0x1
|
|
line.word 0x00 "PIPE4CTR_0,PIPE4 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('5'==('6'||'7'||'8'))
|
|
group.word 0x78++0x1
|
|
line.word 0x00 "PIPE5CTR_0,PIPE5 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x78++0x1
|
|
line.word 0x00 "PIPE5CTR_0,PIPE5 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('6'==('6'||'7'||'8'))
|
|
group.word 0x7A++0x1
|
|
line.word 0x00 "PIPE6CTR_0,PIPE6 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x7A++0x1
|
|
line.word 0x00 "PIPE6CTR_0,PIPE6 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('7'==('6'||'7'||'8'))
|
|
group.word 0x7C++0x1
|
|
line.word 0x00 "PIPE7CTR_0,PIPE7 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x7C++0x1
|
|
line.word 0x00 "PIPE7CTR_0,PIPE7 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('8'==('6'||'7'||'8'))
|
|
group.word 0x7E++0x1
|
|
line.word 0x00 "PIPE8CTR_0,PIPE8 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x7E++0x1
|
|
line.word 0x00 "PIPE8CTR_0,PIPE8 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('9'==('6'||'7'||'8'))
|
|
group.word 0x80++0x1
|
|
line.word 0x00 "PIPE9CTR_0,PIPE9 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x80++0x1
|
|
line.word 0x00 "PIPE9CTR_0,PIPE9 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('A'==('6'||'7'||'8'))
|
|
group.word 0x82++0x1
|
|
line.word 0x00 "PIPEACTR_0,PIPEA Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x82++0x1
|
|
line.word 0x00 "PIPEACTR_0,PIPEA Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('B'==('6'||'7'||'8'))
|
|
group.word 0x84++0x1
|
|
line.word 0x00 "PIPEBCTR_0,PIPEB Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x84++0x1
|
|
line.word 0x00 "PIPEBCTR_0,PIPEB Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('C'==('6'||'7'||'8'))
|
|
group.word 0x86++0x1
|
|
line.word 0x00 "PIPECCTR_0,PIPEC Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x86++0x1
|
|
line.word 0x00 "PIPECCTR_0,PIPEC Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('D'==('6'||'7'||'8'))
|
|
group.word 0x88++0x1
|
|
line.word 0x00 "PIPEDCTR_0,PIPED Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x88++0x1
|
|
line.word 0x00 "PIPEDCTR_0,PIPED Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('E'==('6'||'7'||'8'))
|
|
group.word 0x8A++0x1
|
|
line.word 0x00 "PIPEECTR_0,PIPEE Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x8A++0x1
|
|
line.word 0x00 "PIPEECTR_0,PIPEE Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('F'==('6'||'7'||'8'))
|
|
group.word 0x8C++0x1
|
|
line.word 0x00 "PIPEFCTR_0,PIPEF Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x8C++0x1
|
|
line.word 0x00 "PIPEFCTR_0,PIPEF Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
sif (cpu()=="R7S721021")
|
|
group.word 0x90++0x3
|
|
line.word 0x00 "PIP1TRE_0,Pipe 1 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE1TRN_0,Pipe 1 Transaction Counter Enable Register"
|
|
group.word 0x94++0x3
|
|
line.word 0x00 "PIP2TRE_0,Pipe 2 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE2TRN_0,Pipe 2 Transaction Counter Enable Register"
|
|
group.word 0x98++0x3
|
|
line.word 0x00 "PIP3TRE_0,Pipe 3 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE3TRN_0,Pipe 3 Transaction Counter Enable Register"
|
|
group.word 0x9C++0x3
|
|
line.word 0x00 "PIP4TRE_0,Pipe 4 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE4TRN_0,Pipe 4 Transaction Counter Enable Register"
|
|
group.word 0xA0++0x3
|
|
line.word 0x00 "PIP5TRE_0,Pipe 5 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE5TRN_0,Pipe 5 Transaction Counter Enable Register"
|
|
group.word 0xA4++0x3
|
|
line.word 0x00 "PIPBTRE_0,Pipe B Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEBTRN_0,Pipe B Transaction Counter Enable Register"
|
|
group.word 0xA8++0x3
|
|
line.word 0x00 "PIPCTRE_0,Pipe C Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPECTRN_0,Pipe C Transaction Counter Enable Register"
|
|
group.word 0xAC++0x3
|
|
line.word 0x00 "PIPDTRE_0,Pipe D Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEDTRN_0,Pipe D Transaction Counter Enable Register"
|
|
group.word 0xB0++0x3
|
|
line.word 0x00 "PIPETRE_0,Pipe E Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEETRN_0,Pipe E Transaction Counter Enable Register"
|
|
group.word 0xB4++0x3
|
|
line.word 0x00 "PIPFTRE_0,Pipe F Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEFTRN_0,Pipe F Transaction Counter Enable Register"
|
|
group.word 0xB8++0x3
|
|
line.word 0x00 "PIP9TRE_0,Pipe 9 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE9TRN_0,Pipe 9 Transaction Counter Enable Register"
|
|
group.word 0xBC++0x3
|
|
line.word 0x00 "PIPATRE_0,Pipe A Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEATRN_0,Pipe A Transaction Counter Enable Register"
|
|
else
|
|
group.word 0x90++0x3
|
|
line.word 0x00 "PIP1TRE_0,Pipe 1 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE1TRN_0,Pipe 1 Transaction Counter Enable Register"
|
|
group.word 0x94++0x3
|
|
line.word 0x00 "PIP2TRE_0,Pipe 2 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE2TRN_0,Pipe 2 Transaction Counter Enable Register"
|
|
group.word 0x98++0x3
|
|
line.word 0x00 "PIP3TRE_0,Pipe 3 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE3TRN_0,Pipe 3 Transaction Counter Enable Register"
|
|
group.word 0x9C++0x3
|
|
line.word 0x00 "PIP4TRE_0,Pipe 4 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE4TRN_0,Pipe 4 Transaction Counter Enable Register"
|
|
group.word 0xA0++0x3
|
|
line.word 0x00 "PIP5TRE_0,Pipe 5 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE5TRN_0,Pipe 5 Transaction Counter Enable Register"
|
|
group.word 0xA4++0x3
|
|
line.word 0x00 "PIP9TRE_0,Pipe 9 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE9TRN_0,Pipe 9 Transaction Counter Enable Register"
|
|
group.word 0xA8++0x3
|
|
line.word 0x00 "PIPATRE_0,Pipe A Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEATRN_0,Pipe A Transaction Counter Enable Register"
|
|
group.word 0xAC++0x3
|
|
line.word 0x00 "PIPBTRE_0,Pipe B Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEBTRN_0,Pipe B Transaction Counter Enable Register"
|
|
group.word 0xB0++0x3
|
|
line.word 0x00 "PIPCTRE_0,Pipe C Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPECTRN_0,Pipe C Transaction Counter Enable Register"
|
|
group.word 0xB4++0x3
|
|
line.word 0x00 "PIPDTRE_0,Pipe D Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEDTRN_0,Pipe D Transaction Counter Enable Register"
|
|
group.word 0xB8++0x3
|
|
line.word 0x00 "PIPETRE_0,Pipe E Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEETRN_0,Pipe E Transaction Counter Enable Register"
|
|
group.word 0xBC++0x3
|
|
line.word 0x00 "PIPFTRE_0,Pipe F Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEFTRN_0,Pipe F Transaction Counter Enable Register"
|
|
endif
|
|
tree.end
|
|
textline " "
|
|
group.word 0xD0++0x15
|
|
line.word 0x0 "DEVADD0_0,Device Address n Configuration Register 0"
|
|
bitfld.word 0x0 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x0 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x0 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0x2 "DEVADD1_0,Device Address n Configuration Register 1"
|
|
bitfld.word 0x2 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x2 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x2 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0x4 "DEVADD2_0,Device Address n Configuration Register 2"
|
|
bitfld.word 0x4 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x4 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x4 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0x6 "DEVADD3_0,Device Address n Configuration Register 3"
|
|
bitfld.word 0x6 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x6 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x6 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0x8 "DEVADD4_0,Device Address n Configuration Register 4"
|
|
bitfld.word 0x8 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x8 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x8 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0xA "DEVADD5_0,Device Address n Configuration Register 5"
|
|
bitfld.word 0xA 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0xA 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0xA 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0xC "DEVADD6_0,Device Address n Configuration Register 6"
|
|
bitfld.word 0xC 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0xC 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0xC 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0xE "DEVADD7_0,Device Address n Configuration Register 7"
|
|
bitfld.word 0xE 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0xE 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0xE 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0x10 "DEVADD8_0,Device Address n Configuration Register 8"
|
|
bitfld.word 0x10 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x10 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x10 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0x12 "DEVADD9_0,Device Address n Configuration Register 9"
|
|
bitfld.word 0x12 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x12 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x12 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0x14 "DEVADDA_0,Device Address n Configuration Register A"
|
|
bitfld.word 0x14 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x14 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x14 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
group.word 0x102++0x1
|
|
line.word 0x00 "SUSPMODE_0,UTMI Suspend Mode Register"
|
|
bitfld.word 0x00 14. " SUSPM ,SuspendM Control" "Disabled,Enabled"
|
|
group.long 0x160++0x1F
|
|
line.long 0x0 "D0FIFOB0_0,FIFO Continuous Transfer Port Register 0_0"
|
|
line.long 0x4 "D0FIFOB1_0,FIFO Continuous Transfer Port Register 1_0"
|
|
line.long 0x8 "D0FIFOB2_0,FIFO Continuous Transfer Port Register 2_0"
|
|
line.long 0xC "D0FIFOB3_0,FIFO Continuous Transfer Port Register 3_0"
|
|
line.long 0x10 "D0FIFOB4_0,FIFO Continuous Transfer Port Register 4_0"
|
|
line.long 0x14 "D0FIFOB5_0,FIFO Continuous Transfer Port Register 5_0"
|
|
line.long 0x18 "D0FIFOB6_0,FIFO Continuous Transfer Port Register 6_0"
|
|
line.long 0x1C "D0FIFOB7_0,FIFO Continuous Transfer Port Register 7_0"
|
|
group.long 0x180++0x1F
|
|
line.long 0x0 "D1FIFOB0_0,FIFO Continuous Transfer Port Register 0_1"
|
|
line.long 0x4 "D1FIFOB1_0,FIFO Continuous Transfer Port Register 1_1"
|
|
line.long 0x8 "D1FIFOB2_0,FIFO Continuous Transfer Port Register 2_1"
|
|
line.long 0xC "D1FIFOB3_0,FIFO Continuous Transfer Port Register 3_1"
|
|
line.long 0x10 "D1FIFOB4_0,FIFO Continuous Transfer Port Register 4_1"
|
|
line.long 0x14 "D1FIFOB5_0,FIFO Continuous Transfer Port Register 5_1"
|
|
line.long 0x18 "D1FIFOB6_0,FIFO Continuous Transfer Port Register 6_1"
|
|
line.long 0x1C "D1FIFOB7_0,FIFO Continuous Transfer Port Register 7_1"
|
|
width 0xb
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0xE8207000
|
|
width 13.
|
|
sif (cpu()=="R7S721021")
|
|
if (1==0)
|
|
group.word 0x00++0x3
|
|
line.word 0x00 "SYSCFG0_1,System Configuration Control Register"
|
|
bitfld.word 0x00 7. " HSE ,High-speed operation enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " DCFM ,Controller Mode Select" "Function,Host"
|
|
bitfld.word 0x00 5. " DRPD ,D+/D-Line Resistor Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " DPRPU ,D+ line resistor control" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " UCKSEL ,Input Clock Selection" "48-MHz USB_X1,12-MHz EXTAL"
|
|
bitfld.word 0x00 1. " UPLLE ,USB Internal PLL Operation Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " USBE ,USB block operation enable" "Disabled,Enabled"
|
|
line.word 0x02 "BUSWAIT_1,CPU Bus Wait Register"
|
|
bitfld.word 0x02 0.--5. " BWAIT ,CPU Bus Wait" "0 waits,1 wait,2 waits,3 waits,4 waits,5 waits,6 waits,7 waits,8 waits,9 waits,10 waits,11 waits,12 waits,13 waits,14 waits,15 waits,16 waits,17 waits,18 waits,19 waits,20 waits,21 waits,22 waits,23 waits,24 waits,25 waits,26 waits,27 waits,28 waits,29 waits,30 waits,31 waits,32 waits,33 waits,34 waits,35 waits,36 waits,37 waits,38 waits,39 waits,40 waits,41 waits,42 waits,43 waits,44 waits,45 waits,46 waits,47 waits,48 waits,49 waits,50 waits,51 waits,52 waits,53 waits,54 waits,55 waits,56 waits,57 waits,58 waits,59 waits,60 waits,61 waits,62 waits,63 waits"
|
|
else
|
|
group.word 0x00++0x3
|
|
line.word 0x00 "SYSCFG0_1,System Configuration Control Register"
|
|
bitfld.word 0x00 7. " HSE ,High-speed operation enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " DCFM ,Controller Mode Select" "Function,Host"
|
|
bitfld.word 0x00 5. " DRPD ,D+/D-Line Resistor Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " DPRPU ,D+ line resistor control" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " USBE ,USB block operation enable" "Disabled,Enabled"
|
|
Line.word 0x02 "BUSWAIT_1,CPU Bus Wait Register"
|
|
bitfld.word 0x02 0.--5. " BWAIT ,CPU Bus Wait" "0 waits,1 wait,2 waits,3 waits,4 waits,5 waits,6 waits,7 waits,8 waits,9 waits,10 waits,11 waits,12 waits,13 waits,14 waits,15 waits,16 waits,17 waits,18 waits,19 waits,20 waits,21 waits,22 waits,23 waits,24 waits,25 waits,26 waits,27 waits,28 waits,29 waits,30 waits,31 waits,32 waits,33 waits,34 waits,35 waits,36 waits,37 waits,38 waits,39 waits,40 waits,41 waits,42 waits,43 waits,44 waits,45 waits,46 waits,47 waits,48 waits,49 waits,50 waits,51 waits,52 waits,53 waits,54 waits,55 waits,56 waits,57 waits,58 waits,59 waits,60 waits,61 waits,62 waits,63 waits"
|
|
endif
|
|
else
|
|
group.word 0x00++0x3
|
|
line.word 0x00 "SYSCFG0_1,System Configuration Control Register"
|
|
bitfld.word 0x00 7. " HSE ,High-speed operation enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " DCFM ,Controller Mode Select" "Function,Host"
|
|
bitfld.word 0x00 5. " DRPD ,D+/D-Line Resistor Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " DPRPU ,D+ line resistor control" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " UCKSEL ,Input Clock Selection" "48-MHz USB_X1,12-MHz EXTAL"
|
|
bitfld.word 0x00 1. " UPLLE ,USB Internal PLL Operation Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " USBE ,USB block operation enable" "Disabled,Enabled"
|
|
line.word 0x02 "BUSWAIT_1,CPU Bus Wait Register"
|
|
bitfld.word 0x02 0.--5. " BWAIT ,CPU Bus Wait" "0 waits,1 wait,2 waits,3 waits,4 waits,5 waits,6 waits,7 waits,8 waits,9 waits,10 waits,11 waits,12 waits,13 waits,14 waits,15 waits,16 waits,17 waits,18 waits,19 waits,20 waits,21 waits,22 waits,23 waits,24 waits,25 waits,26 waits,27 waits,28 waits,29 waits,30 waits,31 waits,32 waits,33 waits,34 waits,35 waits,36 waits,37 waits,38 waits,39 waits,40 waits,41 waits,42 waits,43 waits,44 waits,45 waits,46 waits,47 waits,48 waits,49 waits,50 waits,51 waits,52 waits,53 waits,54 waits,55 waits,56 waits,57 waits,58 waits,59 waits,60 waits,61 waits,62 waits,63 waits"
|
|
endif
|
|
rgroup.word 0x04++0x1
|
|
line.word 0x00 "SYSSTS0_1,System Configuration Status Register"
|
|
bitfld.word 0x00 6. " HTACT ,USB Host Sequencer Status Monitor" "Stopped,Running"
|
|
bitfld.word 0x00 5. " SOFEA ,SOF Active Monitor when the Host Controller Mode Is Selected" "Stopped,In progress"
|
|
bitfld.word 0x00 0.--1. " LNST ,USB data line status (Full-speed/High-speed/Chirp)" "SE0|Squelch|Squelch,J-state|/Squelch|Chirp-J,K-state|Invalid|Chirp K,SE1|Invalid|Invalid"
|
|
if (((per.w(ad:0xE8207000))&0x80)==0x80)
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "DVSTCTR0_1,Device State Control Register"
|
|
bitfld.word 0x00 8. " WKUP ,Wakeup output" "No signal,Wakeup"
|
|
bitfld.word 0x00 7. " RWUPE ,Remote Wakeup Detection Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " USBRST ,Bus Reset Output" "Not output,Output"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RESUME ,Resume Output" "Not output,Output"
|
|
bitfld.word 0x00 4. " UACT ,USB Bus Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 0.--2. " RHST ,Reset handshake" "Not determined,Low-speed,Full-speed,High-speed,Reset handshake,Reset handshake,Reset handshake,Reset handshake"
|
|
else
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "DVSTCTR0_1,Device State Control Register"
|
|
bitfld.word 0x00 8. " WKUP ,Wakeup output" "No signal,Wakeup"
|
|
bitfld.word 0x00 7. " RWUPE ,Remote Wakeup Detection Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " USBRST ,Bus Reset Output" "Not output,Output"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RESUME ,Resume Output" "Not output,Output"
|
|
bitfld.word 0x00 4. " UACT ,USB Bus Enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 0.--2. " RHST ,Reset handshake" "Not determined,,Full-speed,High-speed,Reset handshake,,,"
|
|
endif
|
|
if (((per.w(ad:0xE8207000))&0x80)==0x00)
|
|
group.word 0x0C++0x1
|
|
line.word 0x00 "TESTMODE0_1,Test Mode Register"
|
|
bitfld.word 0x00 0.--3. " UTST ,Test mode" "Normal,Test_J,Test_K,Test_SE0_NAK,Test_Packet,,,,,,,,,,,"
|
|
else
|
|
group.word 0x0C++0x1
|
|
line.word 0x00 "TESTMODE0_1,Test Mode Register"
|
|
bitfld.word 0x00 0.--3. " UTST ,Test mode" ",,,,,,,,,Test_J,Test_K,Test_SE0_NAK,Test_Packet,Test_Force_Enable,,"
|
|
endif
|
|
group.word 0x10++0x3
|
|
line.word 0x00 "D0FBCFG_1,DMA0-FIFO Bus Configuration Register"
|
|
bitfld.word 0x00 12.--13. " DFACC ,DMA FIFO Access Mode" "Cycle steal,16-byte,32-byte,"
|
|
bitfld.word 0x00 4. " TENDE ,TEND_N Signal Enable" "Disabled,Enabled"
|
|
line.word 0x02 "D1FBCFG_1,DMA1-FIFO Bus Configuration Register"
|
|
bitfld.word 0x02 12.--13. " DFACC ,DMA FIFO Access Mode" "Cycle steal,16-byte,32-byte,"
|
|
bitfld.word 0x02 4. " TENDE ,TEND_N Signal Enable" "Disabled,Enabled"
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x00 "CFIFO_1,FIFO Port Register C"
|
|
in
|
|
hgroup.long 0x18++0x3
|
|
hide.long 0x00 "D0FIFO_1,FIFO Port Register D0"
|
|
in
|
|
hgroup.long 0x1C++0x3
|
|
hide.long 0x00 "D1FIFO_1,FIFO Port Register D1"
|
|
in
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "CFIFOSEL_1,FIFO Port Select Register C"
|
|
bitfld.word 0x00 15. " RCNT ,Read count mode" "Cleared,Decremented"
|
|
bitfld.word 0x00 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound"
|
|
bitfld.word 0x00 10.--11. " MBW ,FIFO port access bit width" "8-bit,16-bit,32-bit,"
|
|
textline " "
|
|
bitfld.word 0x00 8. " BIGEND ,CFIFO Port Endian Control" "Little,Big"
|
|
bitfld.word 0x00 5. " ISEL ,FIFO port access direction when DCP is selected" "Read,Write"
|
|
bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe 10,Pipe 11,Pipe 12,Pipe 13,Pipe 14,Pipe 15"
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "D0FIFOSEL_1,FIFO Port Select Register D0"
|
|
bitfld.word 0x00 15. " RCNT ,Read count mode" "Cleared,Decremented"
|
|
bitfld.word 0x00 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound"
|
|
bitfld.word 0x00 13. " DCLRM ,Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DREQE ,UCL_D_DREQ Signal Output Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " MBW ,FIFO port access bit width" "8-bit,16-bit,32-bit,"
|
|
bitfld.word 0x00 8. " BIGEND ,CFIFO Port Endian Control" "Little,Big"
|
|
textline " "
|
|
sif (cpu()!="R7S721021")
|
|
bitfld.word 0x00 5. " ISEL ,FIFO port access direction when DCP is selected" "Read,Write"
|
|
bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe 10,Pipe 11,Pipe 12,Pipe 13,Pipe 14,Pipe 15"
|
|
else
|
|
bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe 10,Pipe 11,Pipe 12,Pipe 13,Pipe 14,Pipe 15"
|
|
endif
|
|
group.word 0x2C++0x1
|
|
line.word 0x00 "D1FIFOSEL_1,FIFO Port Select Register D1"
|
|
bitfld.word 0x00 15. " RCNT ,Read count mode" "Cleared,Decremented"
|
|
bitfld.word 0x00 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound"
|
|
bitfld.word 0x00 13. " DCLRM ,Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DREQE ,UCL_D_DREQ Signal Output Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--11. " MBW ,FIFO port access bit width" "8-bit,16-bit,32-bit,"
|
|
bitfld.word 0x00 8. " BIGEND ,CFIFO Port Endian Control" "Little,Big"
|
|
textline " "
|
|
sif (cpu()!="R7S721021")
|
|
bitfld.word 0x00 5. " ISEL ,FIFO port access direction when DCP is selected" "Read,Write"
|
|
bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe 10,Pipe 11,Pipe 12,Pipe 13,Pipe 14,Pipe 15"
|
|
else
|
|
bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe 10,Pipe 11,Pipe 12,Pipe 13,Pipe 14,Pipe 15"
|
|
endif
|
|
group.word 0x22++0x1
|
|
line.word 0x00 "CFIFOCTR_1,FIFO Port Control Register"
|
|
bitfld.word 0x00 15. " BVAL ,Buffer Memory Enable Flag" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " BCLR ,CPU buffer clear" ",Cleared"
|
|
rbitfld.word 0x00 13. " FRDY ,FIFO port ready" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word 0x00 0.--11. 1. " DTLN ,Receive data length"
|
|
group.word 0x2A++0x1
|
|
line.word 0x00 "D0FIFOCTR_1,FIFO Port Control Register"
|
|
bitfld.word 0x00 15. " BVAL ,Buffer Memory Enable Flag" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " BCLR ,CPU buffer clear" ",Cleared"
|
|
rbitfld.word 0x00 13. " FRDY ,FIFO port ready" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word 0x00 0.--11. 1. " DTLN ,Receive data length"
|
|
group.word 0x2E++0x1
|
|
line.word 0x00 "D1FIFOCTR_1,FIFO Port Control Register"
|
|
bitfld.word 0x00 15. " BVAL ,Buffer Memory Enable Flag" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " BCLR ,CPU buffer clear" ",Cleared"
|
|
rbitfld.word 0x00 13. " FRDY ,FIFO port ready" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word 0x00 0.--11. 1. " DTLN ,Receive data length"
|
|
group.word 0x30++0x3
|
|
line.word 0x00 "INTENB0_1,Interrupts Enable Register 0"
|
|
bitfld.word 0x00 15. " VBSE ,VBUS interrupts enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " RSME ,Resume interrupts enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " SOFE ,Frame number update interrupts enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DVSE ,Device state transition interrupts enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " CTRE ,Control transfer stage transition interrupts enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " BEMPE ,Buffer empty interrupts enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " NRDYE ,Buffer not ready response interrupts enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " BRDYE ,Buffer ready interrupts enable" "Disabled,Enabled"
|
|
line.word 0x02 "INTENB1_1,Interrupts Enable Register 1"
|
|
bitfld.word 0x02 14. " BCHGE ,USB Bus Change Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 12. " DTCHE ,Disconnection Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 11. " ATTCHE ,Connection Detection Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 6. " EOFERRE ,EOF Error Detection Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 5. " SIGNE ,Setup Transaction Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 4. " SACKE ,Setup Transaction Normal Response Interrupt Enable" "Disabled,Enabled"
|
|
group.word 0x36++0x5
|
|
line.word 0x00 "BRDYENB_1,BRDY Interrupt Enable Register"
|
|
bitfld.word 0x00 15. " PIPEFBRDYE ,BRDY interrupt enable for PIPEF" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " PIPEEBRDYE ,BRDY interrupt enable for PIPEE" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " PIPEDBRDYE ,BRDY interrupt enable for PIPED" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " PIPECBRDYE ,BRDY interrupt enable for PIPEC" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " PIPEBBRDYE ,BRDY interrupt enable for PIPEB" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " PIPEABRDYE ,BRDY interrupt enable for PIPEA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " PIPE9BRDYE ,BRDY interrupt enable for PIPE9" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " PIPE8BRDYE ,BRDY interrupt enable for PIPE8" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " PIPE7BRDYE ,BRDY interrupt enable for PIPE7" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " PIPE6BRDYE ,BRDY interrupt enable for PIPE6" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " PIPE5BRDYE ,BRDY interrupt enable for PIPE5" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " PIPE4BRDYE ,BRDY interrupt enable for PIPE4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " PIPE3BRDYE ,BRDY interrupt enable for PIPE3" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " PIPE2BRDYE ,BRDY interrupt enable for PIPE2" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " PIPE1BRDYE ,BRDY interrupt enable for PIPE1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " PIPE0BRDYE ,BRDY interrupt enable for PIPE0" "Disabled,Enabled"
|
|
line.word 0x02 "NRDYENB_1,NRDY Interrupt Enable Register"
|
|
bitfld.word 0x02 15. " PIPEFNRDYE ,NRDY interrupt enable for PIPEF" "Disabled,Enabled"
|
|
bitfld.word 0x02 14. " PIPEENRDYE ,NRDY interrupt enable for PIPEE" "Disabled,Enabled"
|
|
bitfld.word 0x02 13. " PIPEDNRDYE ,NRDY interrupt enable for PIPED" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 12. " PIPECNRDYE ,NRDY interrupt enable for PIPEC" "Disabled,Enabled"
|
|
bitfld.word 0x02 11. " PIPEBNRDYE ,NRDY interrupt enable for PIPEB" "Disabled,Enabled"
|
|
bitfld.word 0x02 10. " PIPEANRDYE ,NRDY interrupt enable for PIPEA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PIPE9NRDYE ,NRDY interrupt enable for PIPE9" "Disabled,Enabled"
|
|
bitfld.word 0x02 8. " PIPE8NRDYE ,NRDY interrupt enable for PIPE8" "Disabled,Enabled"
|
|
bitfld.word 0x02 7. " PIPE7NRDYE ,NRDY interrupt enable for PIPE7" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 6. " PIPE6NRDYE ,NRDY interrupt enable for PIPE6" "Disabled,Enabled"
|
|
bitfld.word 0x02 5. " PIPE5NRDYE ,NRDY interrupt enable for PIPE5" "Disabled,Enabled"
|
|
bitfld.word 0x02 4. " PIPE4NRDYE ,NRDY interrupt enable for PIPE4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 3. " PIPE3NRDYE ,NRDY interrupt enable for PIPE3" "Disabled,Enabled"
|
|
bitfld.word 0x02 2. " PIPE2NRDYE ,NRDY interrupt enable for PIPE2" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " PIPE1NRDYE ,NRDY interrupt enable for PIPE1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 0. " PIPE0NRDYE ,NRDY interrupt enable for PIPE0" "Disabled,Enabled"
|
|
line.word 0x04 "BEMPENB_1,BEMP Interrupt Enable Register"
|
|
bitfld.word 0x04 15. " PIPEFBEMPE ,BEMP interrupt enable for PIPEF" "Disabled,Enabled"
|
|
bitfld.word 0x04 14. " PIPEEBEMPE ,BEMP interrupt enable for PIPEE" "Disabled,Enabled"
|
|
bitfld.word 0x04 13. " PIPEDBEMPE ,BEMP interrupt enable for PIPED" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 12. " PIPECBEMPE ,BEMP interrupt enable for PIPEC" "Disabled,Enabled"
|
|
bitfld.word 0x04 11. " PIPEBBEMPE ,BEMP interrupt enable for PIPEB" "Disabled,Enabled"
|
|
bitfld.word 0x04 10. " PIPEABEMPE ,BEMP interrupt enable for PIPEA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 9. " PIPE9BEMPE ,BEMP interrupt enable for PIPE9" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " PIPE8BEMPE ,BEMP interrupt enable for PIPE8" "Disabled,Enabled"
|
|
bitfld.word 0x04 7. " PIPE7BEMPE ,BEMP interrupt enable for PIPE7" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 6. " PIPE6BEMPE ,BEMP interrupt enable for PIPE6" "Disabled,Enabled"
|
|
bitfld.word 0x04 5. " PIPE5BEMPE ,BEMP interrupt enable for PIPE5" "Disabled,Enabled"
|
|
bitfld.word 0x04 4. " PIPE4BEMPE ,BEMP interrupt enable for PIPE4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 3. " PIPE3BEMPE ,BEMP interrupt enable for PIPE3" "Disabled,Enabled"
|
|
bitfld.word 0x04 2. " PIPE2BEMPE ,BEMP interrupt enable for PIPE2" "Disabled,Enabled"
|
|
bitfld.word 0x04 1. " PIPE1BEMPE ,BEMP interrupt enable for PIPE1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 0. " PIPE0BEMPE ,BEMP interrupt enable for PIPE0" "Disabled,Enabled"
|
|
group.word 0x3C++0x1
|
|
line.word 0x00 "SOFCFG_1,SOF Output Configuration Register"
|
|
bitfld.word 0x00 8. " TRNENSEL ,Transaction-Enabled Time Select" "Non-low-speed,Low-speed"
|
|
bitfld.word 0x00 6. " BRDYM ,Status Clear Timing of Each Pipe BRDY Interrupt" "Cleared by SW,Cleared by reading"
|
|
group.word 0x40++0x3
|
|
line.word 0x00 "INTSTS0_1,Interrupt Status Register 0"
|
|
bitfld.word 0x00 15. " VBINT ,VBUS interrupt status" "Not generated,Generated"
|
|
bitfld.word 0x00 14. " RESM ,Resume interrupt status" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x00 13. " SOFR ,Frame number refresh interrupt status" "Not generated,Generated"
|
|
bitfld.word 0x00 12. " DVST ,Device state transition interrupt status" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CTRT ,Control transfer stage transition interrupt status" "Not generated,Generated"
|
|
rbitfld.word 0x00 10. " BEMP ,Buffer empty interrupt status" "Not generated,Generated"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " NRDY ,Buffer not ready interrupt status" "Not generated,Generated"
|
|
rbitfld.word 0x00 8. " BRDY ,Buffer ready interrupt status" "Not generated,Generated"
|
|
textline " "
|
|
rbitfld.word 0x00 7. " VBSTS ,VBUS input status" "Low,High"
|
|
rbitfld.word 0x00 4.--6. " DVSQ ,Device state" "Powered,Default,Address,Configured,Suspended,Suspended,Suspended,Suspended"
|
|
textline " "
|
|
bitfld.word 0x00 3. " VALID ,Setup packet reception" "Not detected,Detected"
|
|
rbitfld.word 0x00 0.--2. " CTSQ ,Control transfer stage" "Idle/Setup,Read data,Read status,Write Data,Write status,Write (no data) status,Sequence error,"
|
|
line.word 0x02 "INTSTS1_1,Interrupt Status Register 1"
|
|
bitfld.word 0x02 14. " BCHG ,USB Bus Change Interrupt Status" "Not generated,Generated"
|
|
bitfld.word 0x02 12. " DTCH ,USB Disconnection Detection Interrupt Status" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x02 11. " ATTCH ,ATTCH Interrupt Status" "Not generated,Generated"
|
|
bitfld.word 0x02 6. " EOFERR ,EOF Error Detection Interrupt Status" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x02 5. " SIGN ,Setup Transaction Error Interrupt Status" "Not generated,Generated"
|
|
bitfld.word 0x02 4. " SACK ,Setup Transaction Normal Response Interrupt Status" "Not generated,Generated"
|
|
group.word 0x46++0x5
|
|
line.word 0x00 "BRDYSTS_1,BRDY Interrupt Status Register"
|
|
bitfld.word 0x00 15. " PIPEFBRDY ,BRDY interrupt status for PIPE F" "Not generated,Generated"
|
|
bitfld.word 0x00 14. " PIPEEBRDY ,BRDY interrupt status for PIPE E" "Not generated,Generated"
|
|
bitfld.word 0x00 13. " PIPEDBRDY ,BRDY interrupt status for PIPE D" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x00 12. " PIPECBRDY ,BRDY interrupt status for PIPE C" "Not generated,Generated"
|
|
bitfld.word 0x00 11. " PIPEBBRDY ,BRDY interrupt status for PIPE B" "Not generated,Generated"
|
|
bitfld.word 0x00 10. " PIPEABRDY ,BRDY interrupt status for PIPE A" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x00 9. " PIPE9BRDY ,BRDY interrupt status for PIPE 9" "Not generated,Generated"
|
|
bitfld.word 0x00 8. " PIPE8BRDY ,BRDY interrupt status for PIPE 8" "Not generated,Generated"
|
|
bitfld.word 0x00 7. " PIPE7BRDY ,BRDY interrupt status for PIPE 7" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x00 6. " PIPE6BRDY ,BRDY interrupt status for PIPE 6" "Not generated,Generated"
|
|
bitfld.word 0x00 5. " PIPE5BRDY ,BRDY interrupt status for PIPE 5" "Not generated,Generated"
|
|
bitfld.word 0x00 4. " PIPE4BRDY ,BRDY interrupt status for PIPE 4" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x00 3. " PIPE3BRDY ,BRDY interrupt status for PIPE 3" "Not generated,Generated"
|
|
bitfld.word 0x00 2. " PIPE2BRDY ,BRDY interrupt status for PIPE 2" "Not generated,Generated"
|
|
bitfld.word 0x00 1. " PIPE1BRDY ,BRDY interrupt status for PIPE 1" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x00 0. " PIPE0BRDY ,BRDY interrupt status for PIPE 0" "Not generated,Generated"
|
|
line.word 0x02 "NRDYSTS_1,NRDY Interrupt Status Register"
|
|
bitfld.word 0x02 15. " PIPEFNRDY ,NRDY interrupt status for PIPE F" "Not generated,Generated"
|
|
bitfld.word 0x02 14. " PIPEENRDY ,NRDY interrupt status for PIPE E" "Not generated,Generated"
|
|
bitfld.word 0x02 13. " PIPEDNRDY ,NRDY interrupt status for PIPE D" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x02 12. " PIPECNRDY ,NRDY interrupt status for PIPE C" "Not generated,Generated"
|
|
bitfld.word 0x02 11. " PIPEBNRDY ,NRDY interrupt status for PIPE B" "Not generated,Generated"
|
|
bitfld.word 0x02 10. " PIPEANRDY ,NRDY interrupt status for PIPE A" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x02 9. " PIPE9NRDY ,NRDY interrupt status for PIPE 9" "Not generated,Generated"
|
|
bitfld.word 0x02 8. " PIPE8NRDY ,NRDY interrupt status for PIPE 8" "Not generated,Generated"
|
|
bitfld.word 0x02 7. " PIPE7NRDY ,NRDY interrupt status for PIPE 7" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x02 6. " PIPE6NRDY ,NRDY interrupt status for PIPE 6" "Not generated,Generated"
|
|
bitfld.word 0x02 5. " PIPE5NRDY ,NRDY interrupt status for PIPE 5" "Not generated,Generated"
|
|
bitfld.word 0x02 4. " PIPE4NRDY ,NRDY interrupt status for PIPE 4" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x02 3. " PIPE3NRDY ,NRDY interrupt status for PIPE 3" "Not generated,Generated"
|
|
bitfld.word 0x02 2. " PIPE2NRDY ,NRDY interrupt status for PIPE 2" "Not generated,Generated"
|
|
bitfld.word 0x02 1. " PIPE1NRDY ,NRDY interrupt status for PIPE 1" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x02 0. " PIPE0NRDY ,NRDY interrupt status for PIPE 0" "Not generated,Generated"
|
|
line.word 0x04 "BEMPSTS_1,BEMP Interrupt Status Register"
|
|
bitfld.word 0x04 15. " PIPEFBEMP ,BEMP interrupt status for PIPE F" "Not generated,Generated"
|
|
bitfld.word 0x04 14. " PIPEEBEMP ,BEMP interrupt status for PIPE E" "Not generated,Generated"
|
|
bitfld.word 0x04 13. " PIPEDBEMP ,BEMP interrupt status for PIPE D" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x04 12. " PIPECBEMP ,BEMP interrupt status for PIPE C" "Not generated,Generated"
|
|
bitfld.word 0x04 11. " PIPEBBEMP ,BEMP interrupt status for PIPE B" "Not generated,Generated"
|
|
bitfld.word 0x04 10. " PIPEABEMP ,BEMP interrupt status for PIPE A" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x04 9. " PIPE9BEMP ,BEMP interrupt status for PIPE 9" "Not generated,Generated"
|
|
bitfld.word 0x04 8. " PIPE8BEMP ,BEMP interrupt status for PIPE 8" "Not generated,Generated"
|
|
bitfld.word 0x04 7. " PIPE7BEMP ,BEMP interrupt status for PIPE 7" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x04 6. " PIPE6BEMP ,BEMP interrupt status for PIPE 6" "Not generated,Generated"
|
|
bitfld.word 0x04 5. " PIPE5BEMP ,BEMP interrupt status for PIPE 5" "Not generated,Generated"
|
|
bitfld.word 0x04 4. " PIPE4BEMP ,BEMP interrupt status for PIPE 4" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x04 3. " PIPE3BEMP ,BEMP interrupt status for PIPE 3" "Not generated,Generated"
|
|
bitfld.word 0x04 2. " PIPE2BEMP ,BEMP interrupt status for PIPE 2" "Not generated,Generated"
|
|
bitfld.word 0x04 1. " PIPE1BEMP ,BEMP interrupt status for PIPE 1" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.word 0x04 0. " PIPE0BEMP ,BEMP interrupt status for PIPE 0" "Not generated,Generated"
|
|
group.word 0x4C++0x1
|
|
line.word 0x00 "FRMNUM_1,Frame Number Register"
|
|
bitfld.word 0x00 15. " OVRN ,Overrun/Underrun" "No error,Error"
|
|
bitfld.word 0x00 14. " CRCE ,Receive data error" "No error,Error"
|
|
hexmask.word 0x00 0.--10. 1. " FRNM ,Frame number"
|
|
rgroup.word 0x4E++0x1
|
|
line.word 0x0 "UFRMNUM_1,uFrame Number Register"
|
|
bitfld.word 0x0 0.--2. " UFRNM ,uFrame" "0,1,2,3,4,5,6,7"
|
|
rgroup.word 0x50++0x1
|
|
line.word 0x00 "USBADDR_1,USB Address Register"
|
|
hexmask.word.byte 0x00 0.--6. 1. " USBADDR ,USB address"
|
|
rgroup.word 0x54++0x9
|
|
line.word 0x00 "USBREQ_1,USB Request Type Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " BREQUEST ,Request"
|
|
hexmask.word.byte 0x00 0.--7. 1. " BMREQUESTTYPE ,Request Type"
|
|
line.word 0x02 "USBVAL_1,USB Request Value Register"
|
|
line.word 0x04 "USBINDX_1,USB Request Index Register"
|
|
line.word 0x06 "USBLENG_1,USB Request Length Register"
|
|
line.word 0x08 "DCPCFG_1,DCP Configuration Register"
|
|
bitfld.word 0x08 4. " DIR ,Transfer Direction" "Receive,Transmit"
|
|
group.word 0x5E++0x3
|
|
line.word 0x00 "DCPMAXP_1,DCP Maximum Packet Size Register"
|
|
bitfld.word 0x00 12.--15. " DEVSEL ,Device Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.word.byte 0x00 0.--6. 1. " MXPS ,Maximum packet size"
|
|
line.word 0x02 "DCPCTR_1,DCP Control Register"
|
|
rbitfld.word 0x02 15. " BSTS ,Buffer status" "Disabled,Enabled"
|
|
bitfld.word 0x02 14. " SUREQ ,Setup Token Transmission" ",Setup packet"
|
|
bitfld.word 0x02 13. " CSCLR ,C-SPLIT Status Clear for Split Transaction" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x02 12. " CSSTS ,COMPLETE SPLIT (C-SPLIT) Status of Split Transaction" "Not split,Split"
|
|
bitfld.word 0x02 11. " SUREQCLR ,SUREQ Bit Clear" ",Cleared"
|
|
bitfld.word 0x02 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x02 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x02 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x02 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x02 4. " PINGE ,PING Token Issue Enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 2. " CCPL ,Control transfer end enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
tree "PIPE Registers"
|
|
group.word 0x64++0x1
|
|
line.word 0x0 "PIPESEL_1,Pipe Window Select Register"
|
|
bitfld.word 0x0 0.--3. " PIPESEL ,Pipe window select" "Not selected,PIPE1,PIPE2,PIPE3,PIPE4,PIPE5,PIPE6,PIPE7,PIPE8,PIPE9,PIPE10,PIPE11,PIPE12,PIPE13,PIPE14,PIPE15"
|
|
if (((per.w(ad:0xE8207000+0x64))&0xF)==(0x1||0x2))
|
|
group.word 0x68++0x1
|
|
line.word 0x00 "PIPECFG_1,Pipe Configuration Register"
|
|
bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,Bulk,,Isochronous"
|
|
bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read"
|
|
bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous"
|
|
bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled"
|
|
bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
elif (((per.w(ad:0xE8207000+0x64))&0xF)==(0x3||0x4||0x5))
|
|
group.word 0x68++0x1
|
|
line.word 0x00 "PIPECFG_1,Pipe Configuration Register"
|
|
bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,Bulk,,"
|
|
bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read"
|
|
bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous"
|
|
bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled"
|
|
bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
elif (((per.w(ad:0xE8207000+0x64))&0xF)==0x9)
|
|
group.word 0x68++0x1
|
|
line.word 0x00 "PIPECFG_1,Pipe Configuration Register"
|
|
bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,Bulk,Interrupt,"
|
|
bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read"
|
|
bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous"
|
|
bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled"
|
|
bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
elif (((per.w(ad:0xE8207000+0x64))&0xF)==0xA)
|
|
group.word 0x68++0x1
|
|
line.word 0x00 "PIPECFG_1,Pipe Configuration Register"
|
|
bitfld.word 0x00 14.--15. " TYPE ,Transfer type" ",Bulk,Interrupt,"
|
|
bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read"
|
|
bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous"
|
|
bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled"
|
|
bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
elif (((per.w(ad:0xE8207000+0x64))&0xF)==(0xB||0xC||0xD||0xE||0xF))
|
|
group.word 0x68++0x1
|
|
line.word 0x00 "PIPECFG_1,Pipe Configuration Register"
|
|
bitfld.word 0x00 14.--15. " TYPE ,Transfer type" ",Bulk,,"
|
|
bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read"
|
|
bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous"
|
|
bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled"
|
|
bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
elif (((per.w(ad:0xE8207000+0x64))&0xF)==(0x6||0x7||0x8))
|
|
group.word 0x68++0x1
|
|
line.word 0x00 "PIPECFG_1,Pipe Configuration Register"
|
|
bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,Bulk,Interrupt,"
|
|
bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group.word 0x68++0x1
|
|
line.word 0x00 "PIPECFG_1,Pipe Configuration Register"
|
|
bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending"
|
|
bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
group.word 0x6A++0x3
|
|
line.word 0x00 "PIPEBUF_1,Pipe Buffer Setting Register"
|
|
bitfld.word 0x00 10.--14. " BUFSIZE ,Buffer size" "64 bytes,128 bytes,196 bytes,256 bytes,320 bytes,384 bytes,448 bytes,512 bytes,576 bytes,640 bytes,704 bytes,768 bytes,832 bytes,896 bytes,960 bytes,1024 bytes,1088 bytes,1152 bytes,1216 bytes,1280 bytes,1344 bytes,1408 bytes,1472 bytes,1536 bytes,1600 bytes,1664 bytes,1728 bytes,1792 bytes,1856 bytes,1920 bytes,1984 bytes,2048 bytes"
|
|
hexmask.word.byte 0x00 0.--7. 1. " BUFNMB ,Buffer number"
|
|
line.word 0x02 "PIPEMAXP_1,Pipe Maximum Packet Size Register"
|
|
bitfld.word 0x02 12.--15. " DEVSEL ,Device Select" "0,1,2,3,4,5,6,7,8,9,10,,,,,"
|
|
hexmask.word 0x02 0.--10. 1. " MXPS ,Maximum packet size"
|
|
if (((per.w(ad:0xE8207000+0x64))&0xF)==(0x3||0x4||0x5||0xA||0xB||0xC||0xD||0xE||0xF))
|
|
group.word 0x6E++0x1
|
|
line.word 0x00 "PIPEPERI_1,Pipe Timing Control Register"
|
|
bitfld.word 0x00 12. " IFIS ,Isochronous IN buffer flush" "Not flushed,Flushed"
|
|
bitfld.word 0x00 0.--2. " IITV ,Interval error detection interval" "T,T/2,T/4,T/8,T/16,T/32,T/64,T/128"
|
|
else
|
|
group.word 0x6E++0x1
|
|
line.word 0x00 "PIPEPERI_1,Pipe Timing Control Register"
|
|
bitfld.word 0x00 12. " IFIS ,Isochronous IN buffer flush" "Not flushed,Flushed"
|
|
endif
|
|
if ('1'==('6'||'7'||'8'))
|
|
group.word 0x70++0x1
|
|
line.word 0x00 "PIPE1CTR_1,PIPE1 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x70++0x1
|
|
line.word 0x00 "PIPE1CTR_1,PIPE1 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('2'==('6'||'7'||'8'))
|
|
group.word 0x72++0x1
|
|
line.word 0x00 "PIPE2CTR_1,PIPE2 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x72++0x1
|
|
line.word 0x00 "PIPE2CTR_1,PIPE2 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('3'==('6'||'7'||'8'))
|
|
group.word 0x74++0x1
|
|
line.word 0x00 "PIPE3CTR_1,PIPE3 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x74++0x1
|
|
line.word 0x00 "PIPE3CTR_1,PIPE3 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('4'==('6'||'7'||'8'))
|
|
group.word 0x76++0x1
|
|
line.word 0x00 "PIPE4CTR_1,PIPE4 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x76++0x1
|
|
line.word 0x00 "PIPE4CTR_1,PIPE4 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('5'==('6'||'7'||'8'))
|
|
group.word 0x78++0x1
|
|
line.word 0x00 "PIPE5CTR_1,PIPE5 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x78++0x1
|
|
line.word 0x00 "PIPE5CTR_1,PIPE5 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('6'==('6'||'7'||'8'))
|
|
group.word 0x7A++0x1
|
|
line.word 0x00 "PIPE6CTR_1,PIPE6 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x7A++0x1
|
|
line.word 0x00 "PIPE6CTR_1,PIPE6 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('7'==('6'||'7'||'8'))
|
|
group.word 0x7C++0x1
|
|
line.word 0x00 "PIPE7CTR_1,PIPE7 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x7C++0x1
|
|
line.word 0x00 "PIPE7CTR_1,PIPE7 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('8'==('6'||'7'||'8'))
|
|
group.word 0x7E++0x1
|
|
line.word 0x00 "PIPE8CTR_1,PIPE8 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x7E++0x1
|
|
line.word 0x00 "PIPE8CTR_1,PIPE8 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('9'==('6'||'7'||'8'))
|
|
group.word 0x80++0x1
|
|
line.word 0x00 "PIPE9CTR_1,PIPE9 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x80++0x1
|
|
line.word 0x00 "PIPE9CTR_1,PIPE9 Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('A'==('6'||'7'||'8'))
|
|
group.word 0x82++0x1
|
|
line.word 0x00 "PIPEACTR_1,PIPEA Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x82++0x1
|
|
line.word 0x00 "PIPEACTR_1,PIPEA Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('B'==('6'||'7'||'8'))
|
|
group.word 0x84++0x1
|
|
line.word 0x00 "PIPEBCTR_1,PIPEB Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x84++0x1
|
|
line.word 0x00 "PIPEBCTR_1,PIPEB Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('C'==('6'||'7'||'8'))
|
|
group.word 0x86++0x1
|
|
line.word 0x00 "PIPECCTR_1,PIPEC Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x86++0x1
|
|
line.word 0x00 "PIPECCTR_1,PIPEC Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('D'==('6'||'7'||'8'))
|
|
group.word 0x88++0x1
|
|
line.word 0x00 "PIPEDCTR_1,PIPED Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x88++0x1
|
|
line.word 0x00 "PIPEDCTR_1,PIPED Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('E'==('6'||'7'||'8'))
|
|
group.word 0x8A++0x1
|
|
line.word 0x00 "PIPEECTR_1,PIPEE Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x8A++0x1
|
|
line.word 0x00 "PIPEECTR_1,PIPEE Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
if ('F'==('6'||'7'||'8'))
|
|
group.word 0x8C++0x1
|
|
line.word 0x00 "PIPEFCTR_1,PIPEF Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
textline " "
|
|
endif
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
else
|
|
group.word 0x8C++0x1
|
|
line.word 0x00 "PIPEFCTR_1,PIPEF Control Register"
|
|
rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data"
|
|
bitfld.word 0x00 13. " CSCLR ,C-SPLIT Status Clear Bit" ",Cleared"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " CSSTS ,CSSTS Status Bit" "S-SPLIT,C-SPLIT"
|
|
bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Normal,Auto response"
|
|
bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0"
|
|
bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1"
|
|
rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy"
|
|
bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL"
|
|
endif
|
|
sif (cpu()=="R7S721021")
|
|
group.word 0x90++0x3
|
|
line.word 0x00 "PIP1TRE_1,Pipe 1 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE1TRN_1,Pipe 1 Transaction Counter Enable Register"
|
|
group.word 0x94++0x3
|
|
line.word 0x00 "PIP2TRE_1,Pipe 2 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE2TRN_1,Pipe 2 Transaction Counter Enable Register"
|
|
group.word 0x98++0x3
|
|
line.word 0x00 "PIP3TRE_1,Pipe 3 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE3TRN_1,Pipe 3 Transaction Counter Enable Register"
|
|
group.word 0x9C++0x3
|
|
line.word 0x00 "PIP4TRE_1,Pipe 4 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE4TRN_1,Pipe 4 Transaction Counter Enable Register"
|
|
group.word 0xA0++0x3
|
|
line.word 0x00 "PIP5TRE_1,Pipe 5 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE5TRN_1,Pipe 5 Transaction Counter Enable Register"
|
|
group.word 0xA4++0x3
|
|
line.word 0x00 "PIPBTRE_1,Pipe B Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEBTRN_1,Pipe B Transaction Counter Enable Register"
|
|
group.word 0xA8++0x3
|
|
line.word 0x00 "PIPCTRE_1,Pipe C Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPECTRN_1,Pipe C Transaction Counter Enable Register"
|
|
group.word 0xAC++0x3
|
|
line.word 0x00 "PIPDTRE_1,Pipe D Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEDTRN_1,Pipe D Transaction Counter Enable Register"
|
|
group.word 0xB0++0x3
|
|
line.word 0x00 "PIPETRE_1,Pipe E Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEETRN_1,Pipe E Transaction Counter Enable Register"
|
|
group.word 0xB4++0x3
|
|
line.word 0x00 "PIPFTRE_1,Pipe F Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEFTRN_1,Pipe F Transaction Counter Enable Register"
|
|
group.word 0xB8++0x3
|
|
line.word 0x00 "PIP9TRE_1,Pipe 9 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE9TRN_1,Pipe 9 Transaction Counter Enable Register"
|
|
group.word 0xBC++0x3
|
|
line.word 0x00 "PIPATRE_1,Pipe A Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEATRN_1,Pipe A Transaction Counter Enable Register"
|
|
else
|
|
group.word 0x90++0x3
|
|
line.word 0x00 "PIP1TRE_1,Pipe 1 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE1TRN_1,Pipe 1 Transaction Counter Enable Register"
|
|
group.word 0x94++0x3
|
|
line.word 0x00 "PIP2TRE_1,Pipe 2 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE2TRN_1,Pipe 2 Transaction Counter Enable Register"
|
|
group.word 0x98++0x3
|
|
line.word 0x00 "PIP3TRE_1,Pipe 3 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE3TRN_1,Pipe 3 Transaction Counter Enable Register"
|
|
group.word 0x9C++0x3
|
|
line.word 0x00 "PIP4TRE_1,Pipe 4 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE4TRN_1,Pipe 4 Transaction Counter Enable Register"
|
|
group.word 0xA0++0x3
|
|
line.word 0x00 "PIP5TRE_1,Pipe 5 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE5TRN_1,Pipe 5 Transaction Counter Enable Register"
|
|
group.word 0xA4++0x3
|
|
line.word 0x00 "PIP9TRE_1,Pipe 9 Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPE9TRN_1,Pipe 9 Transaction Counter Enable Register"
|
|
group.word 0xA8++0x3
|
|
line.word 0x00 "PIPATRE_1,Pipe A Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEATRN_1,Pipe A Transaction Counter Enable Register"
|
|
group.word 0xAC++0x3
|
|
line.word 0x00 "PIPBTRE_1,Pipe B Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEBTRN_1,Pipe B Transaction Counter Enable Register"
|
|
group.word 0xB0++0x3
|
|
line.word 0x00 "PIPCTRE_1,Pipe C Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPECTRN_1,Pipe C Transaction Counter Enable Register"
|
|
group.word 0xB4++0x3
|
|
line.word 0x00 "PIPDTRE_1,Pipe D Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEDTRN_1,Pipe D Transaction Counter Enable Register"
|
|
group.word 0xB8++0x3
|
|
line.word 0x00 "PIPETRE_1,Pipe E Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEETRN_1,Pipe E Transaction Counter Enable Register"
|
|
group.word 0xBC++0x3
|
|
line.word 0x00 "PIPFTRE_1,Pipe F Transaction Counter Enable Register"
|
|
bitfld.word 0x00 9. " TRENB ,Transaction Counter Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRCLR ,Transaction Counter Clear" ",Cleared"
|
|
line.word 0x02 "PIPEFTRN_1,Pipe F Transaction Counter Enable Register"
|
|
endif
|
|
tree.end
|
|
textline " "
|
|
group.word 0xD0++0x15
|
|
line.word 0x0 "DEVADD0_1,Device Address n Configuration Register 0"
|
|
bitfld.word 0x0 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x0 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x0 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0x2 "DEVADD1_1,Device Address n Configuration Register 1"
|
|
bitfld.word 0x2 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x2 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x2 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0x4 "DEVADD2_1,Device Address n Configuration Register 2"
|
|
bitfld.word 0x4 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x4 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x4 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0x6 "DEVADD3_1,Device Address n Configuration Register 3"
|
|
bitfld.word 0x6 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x6 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x6 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0x8 "DEVADD4_1,Device Address n Configuration Register 4"
|
|
bitfld.word 0x8 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x8 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x8 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0xA "DEVADD5_1,Device Address n Configuration Register 5"
|
|
bitfld.word 0xA 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0xA 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0xA 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0xC "DEVADD6_1,Device Address n Configuration Register 6"
|
|
bitfld.word 0xC 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0xC 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0xC 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0xE "DEVADD7_1,Device Address n Configuration Register 7"
|
|
bitfld.word 0xE 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0xE 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0xE 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0x10 "DEVADD8_1,Device Address n Configuration Register 8"
|
|
bitfld.word 0x10 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x10 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x10 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0x12 "DEVADD9_1,Device Address n Configuration Register 9"
|
|
bitfld.word 0x12 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x12 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x12 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
line.word 0x14 "DEVADDA_1,Device Address n Configuration Register A"
|
|
bitfld.word 0x14 11.--14. " UPPHUB ,Address of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x14 8.--10. " HUBPORT ,Port Number of Hub to which Communication Target is Connected" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x14 6.--7. " USBSPD ,Transfer Speed of the Communication Target Device" "Disabled,Low,Full,High"
|
|
group.word 0x102++0x1
|
|
line.word 0x00 "SUSPMODE_1,UTMI Suspend Mode Register"
|
|
bitfld.word 0x00 14. " SUSPM ,SuspendM Control" "Disabled,Enabled"
|
|
group.long 0x160++0x1F
|
|
line.long 0x0 "D0FIFOB0_1,FIFO Continuous Transfer Port Register 0_0"
|
|
line.long 0x4 "D0FIFOB1_1,FIFO Continuous Transfer Port Register 1_0"
|
|
line.long 0x8 "D0FIFOB2_1,FIFO Continuous Transfer Port Register 2_0"
|
|
line.long 0xC "D0FIFOB3_1,FIFO Continuous Transfer Port Register 3_0"
|
|
line.long 0x10 "D0FIFOB4_1,FIFO Continuous Transfer Port Register 4_0"
|
|
line.long 0x14 "D0FIFOB5_1,FIFO Continuous Transfer Port Register 5_0"
|
|
line.long 0x18 "D0FIFOB6_1,FIFO Continuous Transfer Port Register 6_0"
|
|
line.long 0x1C "D0FIFOB7_1,FIFO Continuous Transfer Port Register 7_0"
|
|
group.long 0x180++0x1F
|
|
line.long 0x0 "D1FIFOB0_1,FIFO Continuous Transfer Port Register 0_1"
|
|
line.long 0x4 "D1FIFOB1_1,FIFO Continuous Transfer Port Register 1_1"
|
|
line.long 0x8 "D1FIFOB2_1,FIFO Continuous Transfer Port Register 2_1"
|
|
line.long 0xC "D1FIFOB3_1,FIFO Continuous Transfer Port Register 3_1"
|
|
line.long 0x10 "D1FIFOB4_1,FIFO Continuous Transfer Port Register 4_1"
|
|
line.long 0x14 "D1FIFOB5_1,FIFO Continuous Transfer Port Register 5_1"
|
|
line.long 0x18 "D1FIFOB6_1,FIFO Continuous Transfer Port Register 6_1"
|
|
line.long 0x1C "D1FIFOB7_1,FIFO Continuous Transfer Port Register 7_1"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "DVD (Digital Video Decoder)"
|
|
tree "Channel 0"
|
|
base ad:0xFCFFB800
|
|
width 11.
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "ADCCR1,ADC Control Register 1"
|
|
bitfld.word 0x00 8. " AGCMODE ,A/D converter AGC ON/OFF control" "Off,On"
|
|
group.word 0x0E++0x05
|
|
line.word 0x00 "TGCR1,Timing Generation Control Register 1"
|
|
hexmask.word 0x00 0.--8. 1. " SRCLEFT ,Left end of input video signal capturing area"
|
|
line.word 0x02 "TGCR2,Timing Generation Control Register 2"
|
|
hexmask.word.byte 0x02 10.--15. 1. " SRCTOP ,Top end of input video signal capturing area"
|
|
hexmask.word 0x02 0.--9. 1. " SRCHEIGHT ,Height of input video signal capturing area"
|
|
line.word 0x04 "TGCR3,Timing Generation Control Register 3"
|
|
hexmask.word 0x04 0.--10. 1. " SRCWIDTH ,Width of input video signal capturing area"
|
|
group.word 0x1A++0x1
|
|
line.word 0x00 "SYNSCR1,Sync Separation Control Register 1"
|
|
bitfld.word 0x00 13.--15. " LPFVSYNC ,Low-pass filter cutoff frequency before vertical sync separation" "None,0.94 MHz,0.67 MHz,0.54 MHz,0.47 MHz,0.34 MHz,0.27 MHz,0.23 MHz"
|
|
bitfld.word 0x00 10.--12. " LPFHSYNC ,Low-pass filter cutoff frequency before horizontal sync separation" "None,2.15 MHz,1.88 MHz,1.34 MHz,1.07 MHz,0.94 MHz,0.67 MHz,0.54 MHz"
|
|
newline
|
|
bitfld.word 0x00 4.--7. " VELOCITYSHIFT_H ,Reference level operation speed control for composite sync separation" "X1,X2,X4,X8,X16,X32,X64,X128,X256,X256,X256,X256,X256,X256,X256,X256"
|
|
bitfld.word 0x00 2.--3. " SLICERMODE_H ,Auto-slice level setting for composite sync separation circuit" "CSYNCSLICE_H,25%,50%,75%"
|
|
newline
|
|
bitfld.word 0x00 0.--1. " SLICERMODE_V ,Auto-slice level setting for composite sync separation circuit" "CSYNCSLICE_V,25%,50%,75%"
|
|
if ((per.w(ad:0xFCFFB800+0x1A)&0xC)!=0x00)
|
|
group.word 0x1C++0x01
|
|
line.word 0x00 "SYNSCR2,Sync Separation Control Register 2"
|
|
bitfld.word 0x00 6.--11. " SYNCMAXDUTY_H ,Max ratio of horizontal cycle to horizontal sync signal pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 0.--5. " SYNCMINDUTY ,Min ratio of horizontal cycle to horizontal sync signal pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
hgroup.word 0x1C++0x01
|
|
hide.word 0x00 "SYNSCR2,Sync Separation Control Register 2"
|
|
endif
|
|
if ((per.w(ad:0xFCFFB800+0x1A)&0xC)==0x00)
|
|
group.word 0x1E++0x01
|
|
line.word 0x00 "SYNSCR3,Sync Separation Control Register 3"
|
|
bitfld.word 0x00 10.--13. " SSCLIPSEL ,Clipping level" "512,546,580,614,648,682,716,750,785,819,853,887,921,955,989,1023"
|
|
hexmask.word 0x00 0.--9. 1. " CSYNCSLICE_H ,Slice level for composite sync signal separation"
|
|
else
|
|
group.word 0x1E++0x01
|
|
line.word 0x00 "SYNSCR3,Sync Separation Control Register 3"
|
|
bitfld.word 0x00 10.--13. " SSCLIPSEL ,Clipping level" "512,546,580,614,648,682,716,750,785,819,853,887,921,955,989,1023"
|
|
endif
|
|
if ((per.w(ad:0xFCFFB800+0x1A)&0x3)!=0x00)
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "SYNSCR4,Sync Separation Control Register 4"
|
|
bitfld.word 0x00 6.--11. " SYNCMAXDUTY_V ,Max Ratio of Horizontal Cycle to Vertical Sync Signal Pulse Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 0.--5. " SYNCMINDUTY_V ,Min Ratio of Horizontal Cycle to Horizontal Sync Signal Pulse Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
hgroup.word 0x20++0x01
|
|
hide.word 0x00 "SYNSCR4,Sync Separation Control Register 4"
|
|
endif
|
|
if ((per.w(ad:0xFCFFB800+0x1A)&0x3)==0x00)
|
|
group.word 0x22++0x01
|
|
line.word 0x00 "SYNSCR5,Sync Separation Control Register 5"
|
|
bitfld.word 0x00 15. " VSYNCDELAY ,Delays the separated vertical sync signal for 1/4 horizontal cycle" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--14. " VSYNCSLICE ,Threshold for vertical sync separation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--9. 1. " CSYNCSLICE_V ,Slice level for composite sync signal separation"
|
|
else
|
|
group.word 0x22++0x01
|
|
line.word 0x00 "SYNSCR5,Sync Separation Control Register 5"
|
|
bitfld.word 0x00 15. " VSYNCDELAY ,Delays the separated vertical sync signal for 1/4 horizontal cycle" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--14. " VSYNCSLICE ,Threshold for vertical sync separation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.word 0x24++0x05
|
|
line.word 0x00 "HAFCCR1,Horizontal AFC Control Register 1"
|
|
bitfld.word 0x00 12.--15. " HAFCGAIN ,Horizontal AFC loop gain" "Small value 0,Small value 1,Small value 2,Small value 3,Small value 4,Small value 5,Standard value 6,Large value 7,Large value 8,Large value 9,Large value 10,Large value 11,Large value 12,Large value 13,Large value 14,Large value 15"
|
|
bitfld.word 0x00 10. " HAFCFREERUN ,Horizontal AFC free-run oscillation mode ON/OFF" "Off,On"
|
|
newline
|
|
hexmask.word 0x00 0.--9. 1. " HAFCTYP ,Horizontal AFC center oscillation frequency"
|
|
line.word 0x02 "HAFCCR2,Horizontal AFC Control Register 2"
|
|
bitfld.word 0x02 12.--15. " HAFCSTART ,Start line of horizontal AFC normal operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x02 11. " NOX2HOSC ,Disable of horizontal AFC double speed detection" "No,Yes"
|
|
newline
|
|
bitfld.word 0x02 10. " DOX2HOSC ,Horizontal AFC forced double-speed oscillation" "Not forced,Forced"
|
|
hexmask.word 0x02 0.--9. 1. " HAFCMAX ,Maximum oscillation frequency of horizontal AFC"
|
|
line.word 0x04 "HAFCCR3,Horizontal AFC Control Register 3"
|
|
bitfld.word 0x04 12.--15. " HAFCEND ,End line of horizontal AFC normal operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x04 11. " HAFCMODE_1 ,Loop gain control for low S/N" "Fixed,Automatically"
|
|
newline
|
|
bitfld.word 0x04 10. " HAFCMODE_0 ,Horizontal AFC control during VBI period" "Phase comparison stopped,Loop gain reduced"
|
|
hexmask.word 0x04 0.--9. 1. " HAFCMIN ,Min oscillation frequency of horizontal AFC"
|
|
group.word 0x2A++0x01
|
|
line.word 0x00 "VCDWCR1,Vertical Countdown Control Register 1"
|
|
bitfld.word 0x00 15. " VCDFREERUN ,Vertical countdown free-run oscillation mode ON/OFF" "Off,On"
|
|
bitfld.word 0x00 14. " NOVCD50 ,Vertical countdown 50-Hz oscillation mode OFF" "On,Off"
|
|
newline
|
|
bitfld.word 0x00 13. " NOVCD60 ,Vertical Countdown 60-Hz (59.94-Hz) oscillation mode OFF" "On,Off"
|
|
bitfld.word 0x00 11.--12. " VCDDEFAULT ,Vertical countdown center oscillation frequency" "Auto-detection,50.00 Hz,59.94 Hz,60.00 Hz"
|
|
newline
|
|
bitfld.word 0x00 5.--10. " VCDWINDOW ,Vertical countdown sync area" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 0.--4. " VCDOFFSET ,Vertical countdown minimum oscillation frequency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x30++0x15
|
|
line.word 0x00 "DCPCR1,Digital Clamp Control Register 1"
|
|
bitfld.word 0x00 15. " DCPMODE_Y ,Clamp level setting mode (Y signal)" "Manual,Auto"
|
|
bitfld.word 0x00 11. " DCPCHECK ,Digital clamp pulse position check" "0,1"
|
|
newline
|
|
hexmask.word 0x00 0.--9. 1. " BLANKLEVEL_Y ,Clamp offset level (Y signal)"
|
|
line.word 0x02 "DCPCR2,Digital Clamp Control Register 2"
|
|
bitfld.word 0x02 15. " DCPMODE_C ,Clamp level setting mode (Cb/Cr signal)" "Manual,Auto"
|
|
bitfld.word 0x02 6.--11. " BLANKLEVEL_CB ,Clamp offset level (Cb signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.word 0x02 0.--5. " BLANKLEVEL_CR ,Clamp offset level (Cr signal)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.word 0x04 "DCPCR3,Digital Clamp Control Register 3"
|
|
bitfld.word 0x04 12.--14. " DCPRESPONSE ,Digital clamp response speed" "0,1,2,3,4,5,6,7"
|
|
line.word 0x06 "DCPCR4,Digital Clamp Control Register 4"
|
|
bitfld.word 0x06 10.--15. " DCPSTART ,Digital clamp start line (in 1-line units)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.word 0x08 "DCPCR5,Digital Clamp Control Register 5"
|
|
bitfld.word 0x08 10.--15. " DCPEND ,Digital clamp end line (in 1-line units)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.word 0x0A "DCPCR6,Digital Clamp Control Register 6"
|
|
hexmask.word.byte 0x0A 8.--14. 1. " DCPWIDTH ,Digital clamp pulse width"
|
|
line.word 0x0C "DCPCR7,Digital Clamp Control Register 7"
|
|
hexmask.word.byte 0x0C 8.--15. 1. " DCPPOS_Y ,Digital clamp pulse horizontal start position"
|
|
line.word 0x0E "DCPCR8,Digital Clamp Control Register 8"
|
|
hexmask.word.byte 0x0E 8.--15. 1. " DCPPOS_C ,Digital clamp pulse horizontal start position (Cb/Cr signal)"
|
|
line.word 0x10 "NSDCR,Noise Detection Control Register"
|
|
bitfld.word 0x10 12.--13. " ACFINPUT ,Video signal for autocorrelation function" "Y signal,Cb signal,Cr signal,Cr signal"
|
|
bitfld.word 0x10 4.--8. " ACFLAGTIME ,Delay time for autocorrelation function calculation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x10 0.--1. " ACFFILTER ,Smoothing parameter of autocorrelation function data" "0,1,2,3"
|
|
line.word 0x12 "BTLCR,Burst Lock/Chroma Decoding Control Register"
|
|
bitfld.word 0x12 14.--15. " LOCKRANGE ,Burst lock PLL lock range" "+-400 Hz,+-800 Hz,+-1200 Hz,+-1600 Hz"
|
|
bitfld.word 0x12 12.--13. " LOOPGAIN ,Burst lock PLL loop gain" "0,1,2,3"
|
|
newline
|
|
bitfld.word 0x12 10.--11. " LOCKLIMIT ,Level for burst lock PLL to Re-Search free-run frequency" "0,1,2,3"
|
|
bitfld.word 0x12 9. " BCOFREERUN ,Burst lock PLL free-run oscillation mode ON/OFF" "Off,On"
|
|
newline
|
|
bitfld.word 0x12 6.--7. " DEFAULTSYS ,Default color system" "NTSC,PAL,SECAM,Not specified"
|
|
bitfld.word 0x12 5. " NONTSC358 ,NTSC-M detection control" "On,Off"
|
|
newline
|
|
bitfld.word 0x12 4. " NONTSC443 ,NTSC-4.43 detection control" "On,Off"
|
|
bitfld.word 0x12 3. " NOPALM ,PAL-M detection control" "On,Off"
|
|
newline
|
|
bitfld.word 0x12 2. " NOPALN ,PAL-N detection control" "On,Off"
|
|
bitfld.word 0x12 1. " NOPAL443 ,PAL-B | G| H | I | D detection control" "On,Off"
|
|
newline
|
|
bitfld.word 0x12 0. " NOSECAM ,SECAM detection control" "On,Off"
|
|
line.word 0x14 "BTGPCR,Burst Gate Pulse Control Register"
|
|
bitfld.word 0x14 15. " BGPCHECK ,Burst gate pulse position check" "0,1"
|
|
hexmask.word.byte 0x14 8.--14. 1. " BGPWIDTH ,Burst gate pulse width (recommended value: 88)"
|
|
newline
|
|
hexmask.word.byte 0x14 0.--7. 1. " BGPSTART ,Burst gate pulse start position (Recommended value: 50)"
|
|
if ((per.w(ad:0xFCFFB800+0x46)&0x800)==0x00)
|
|
group.word 0x46++0x01
|
|
line.word 0x00 "ACCCR1,ACC Control Register 1"
|
|
bitfld.word 0x00 12.--15. " KILLEROFFSET ,These bits and KILLERLEVEL are added together to be the level to turn off the color killer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 11. " ACCMODE ,ACC operating mode" "Auto,Manual"
|
|
newline
|
|
bitfld.word 0x00 9.--10. " ACCMAXGAIN ,Maximum ACC gain" "6 times,8 times,12 times,16 times"
|
|
hexmask.word 0x00 0.--8. 1. " ACCLEVEL ,ACC reference color burst amplitude (Recommended value: 236)"
|
|
else
|
|
group.word 0x46++0x01
|
|
line.word 0x00 "ACCCR1,ACC Control Register 1"
|
|
bitfld.word 0x00 12.--15. " KILLEROFFSET ,These bits and KILLERLEVEL are added together to be the level to turn off the color killer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 11. " ACCMODE ,ACC operating mode" "Auto,Manual"
|
|
newline
|
|
endif
|
|
if ((per.w(ad:0xFCFFB800+0x46)&0x800)==0x800)
|
|
group.word 0x48++0x01
|
|
line.word 0x00 "ACCCR2,ACC Control Register 2"
|
|
bitfld.word 0x00 9.--10. " CHROMASUBGAIN ,Chroma manual gain (sub)" "1 time,2 times,4 times,8 times"
|
|
hexmask.word 0x00 0.--8. 1. " CHROMAMAINGAIN ,Chroma manual gain (main)"
|
|
else
|
|
hgroup.word 0x48++0x01
|
|
hide.word 0x00 "ACCCR2,ACC Control Register 2"
|
|
endif
|
|
group.word 0x4A++0x07
|
|
line.word 0x00 "ACCCR3,ACC Control Register 3"
|
|
bitfld.word 0x00 14.--15. " ACCRESPONSE ,ACC response speed" "0,1,2,3"
|
|
bitfld.word 0x00 8.--13. " ACCPRECIS ,ACC gain adjustment accuracy" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.word 0x00 7. " KILLERMODE ,Forced color killer mode ON/OFF" "Not forced,Forced"
|
|
bitfld.word 0x00 1.--6. " KILLERLEVEL ,Color killer operation start point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.word 0x02 "TINTCR,TINT Control Register"
|
|
bitfld.word 0x02 10.--15. " TINTSUB ,Fine adjustment of R-Y demodulation axis" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.word 0x02 0.--9. 1. " TINTMAIN ,Hue adjustment level"
|
|
line.word 0x04 "YCDCR,Y/C Delay/Chroma Decoding Control Register"
|
|
bitfld.word 0x04 4.--8. " LUMADELAY ,Luminance signal delay adjustment" "-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x04 2. " CHROMALPF ,LPF for demodulated chroma" "Not used,Used"
|
|
newline
|
|
bitfld.word 0x04 0.--1. " DEMODMODE ,Averaging processing for pre-demodulated line" "No processing,,For PAL,?..."
|
|
line.word 0x06 "AGCCR1,AGC Control Register 1"
|
|
bitfld.word 0x06 13. " DUREDUCE ,Manual control of sync signal amplitude detection during VBI period" "Standard value,Gain to 3/4 times"
|
|
bitfld.word 0x06 12. " NOREDUCE ,Control of sync signal amplitude detection during VBI period" "Detected,Not detected"
|
|
newline
|
|
bitfld.word 0x06 9.--11. " AGCRESPONSE ,AGC response speed" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x06 0.--8. 1. " AGCLEVEL ,Sync signal reference amplitude"
|
|
sif (cpu()=="R8A77470")||(cpu()=="SH7269")||(cpu()=="SH7268")
|
|
group.word 0x52++0x01
|
|
line.word 0x00 "AGCCR2,AGC Control Register 2"
|
|
bitfld.word 0x00 8.--13. " AGCPRECIS ,AGC gain adjustment accuracy" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
group.word 0x52++0x01
|
|
line.word 0x00 "AGCPRECIS,AGC Gain Adjustment Accuracy"
|
|
bitfld.word 0x00 8.--13. " AGCPRECIS ,AGC gain adjustment accuracy" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
group.word 0x54++0x19
|
|
line.word 0x0A "PKLIMITCR,Peak Limiter Control Register"
|
|
bitfld.word 0x0A 14.--15. " PEAKLEVEL ,Peak luminance value limited by peak limiter" "OFF,1008 LSB,992 LSB,960 LSB"
|
|
bitfld.word 0x0A 12.--13. " PEAKATTACK ,Response speed with peak limiter gain decreased" "0,1,2,3"
|
|
newline
|
|
bitfld.word 0x0A 10.--11. " PEAKRELEASE ,Response speed with peak limiter gain increased" "0,1,2,3"
|
|
bitfld.word 0x0A 8.--9. " PEAKRATIO ,Maximum compression rate of peak limiter" "50%,25%,12.5%,0%"
|
|
newline
|
|
hexmask.word.byte 0x0A 0.--7. 1. " MAXPEAKSAMPLES ,Allowable number of overflowing pixels"
|
|
line.word 0x0C "RGORCR1,Over-Range Control Register 1"
|
|
hexmask.word 0x0C 0.--9. 1. " RADJ_O_LEVEL0 ,A/D over-threshold level"
|
|
line.word 0x0E "RGORCR2,Over-Range Control Register 2"
|
|
hexmask.word 0x0E 0.--9. 1. " RADJ_U_LEVEL0 ,A/D under-threshold level"
|
|
line.word 0x10 "RGORCR3,Over-Range Control Register 3"
|
|
hexmask.word 0x10 0.--9. 1. " RADJ_O_LEVEL1 ,A/D over-threshold level"
|
|
line.word 0x12 "RGORCR4,Over-Range Control Register 4"
|
|
hexmask.word 0x12 0.--9. 1. " RADJ_U_LEVEL1 ,A/D under-threshold level"
|
|
line.word 0x14 "RGORCR5,Over-Range Control Register 5"
|
|
hexmask.word 0x14 0.--9. 1. " RADJ_O_LEVEL2 ,A/D over-threshold level"
|
|
line.word 0x16 "RGORCR6,Over-Range Control Register 6"
|
|
hexmask.word 0x16 0.--9. 1. " RADJ_U_LEVEL2 ,A/D under-threshold level"
|
|
line.word 0x18 "RGORCR7,Over-Range Control Register 7"
|
|
bitfld.word 0x18 12.--14. " TEST_MONI ,Test mode" "Normal,Normal,Normal,Normal,Level 0,Level 1,Level 2,Level 3"
|
|
bitfld.word 0x18 9.--11. " RADJ_MIX_K_FIX ,Forced range over/under mode" "Auto detection,Auto detection,Auto detection,Level 0,Level 1,Level 2,Level 3,?..."
|
|
newline
|
|
bitfld.word 0x18 2. " UCMP_SW ,Over-range detection enable" "Disabled,Enabled"
|
|
bitfld.word 0x18 1. " DCMP_SW ,Under-range detection enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x18 0. " HWIDE_SW ,Horizontal enlargement of over/under-range level" "Not provided,Provided"
|
|
group.word 0x7C++0x03
|
|
line.word 0x00 "AFCPFCR,Feedback Control Register for Horizontal AFC Phase Comparator"
|
|
bitfld.word 0x00 4. " PHDET_FIX ,Forcible or LOWGAIN control" "Not forced,Forced"
|
|
bitfld.word 0x00 0.--2. " PHDET_DIV ,Phase comparator feedback adjust for low sync signal lock stability" "1/1,1/2,1/4,1/8,1/16,1/32,?..."
|
|
line.word 0x02 "RUPDCR,Register Update Enable Register"
|
|
bitfld.word 0x02 15. " NEWSETTING ,V update enable for TGCR1 to TGCR3" "Disabled,Enabled"
|
|
rgroup.word 0x80++0x07
|
|
line.word 0x00 "VSYNCSR,Sync Separation Status/Vertical Cycle Read Register"
|
|
bitfld.word 0x00 15. " FHCOUNT[0] ,Horizontal AFC oscillation cycle" "0,1"
|
|
bitfld.word 0x00 14. " FHLOCK ,Horizontal AFC lock detection result" "Not locked,Locked"
|
|
newline
|
|
bitfld.word 0x00 13. " ISNOISY ,Detection result of low S/N signal by sync separation" "Not low,Low"
|
|
bitfld.word 0x00 12. " FHMODE ,Speed detection result" "Normal,Multiplied"
|
|
newline
|
|
bitfld.word 0x00 11. " NOSIGNAL ,No-signal detection result" "Vertical,No vertical"
|
|
bitfld.word 0x00 10. " FVLOCK ,Vertical countdown lock detection result" "Not locked,Locked"
|
|
newline
|
|
bitfld.word 0x00 9. " FVMODE ,Vertical countdown oscillation mode" "50Hz,60Hz"
|
|
bitfld.word 0x00 8. " INTERLACED ,Interlace detection result" "Progressive,Interlace"
|
|
sif (cpu()=="R8A77470")||(cpu()=="SH7269")||(cpu()=="SH7268")
|
|
newline
|
|
hexmask.word.byte 0x00 0.--7. 1. " FVCOUNT ,Vertical cycle measurement result"
|
|
endif
|
|
line.word 0x02 "HSYNCSR,Horizontal Cycle Read Register"
|
|
line.word 0x04 "DCPSR1,Digital Clamp Read Register 1"
|
|
bitfld.word 0x04 10.--15. " CLAMPLEVEL_CB ,Digital clamp subtraction value (Cb signal)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.word 0x04 0.--9. 1. " CLAMPLEVEL_CB ,Digital clamp subtraction value (Y signal)"
|
|
line.word 0x06 "DCPSR2,Digital Clamp Read Register 2"
|
|
bitfld.word 0x06 10.--15. " CLAMPLEVEL_CR ,Digital clamp subtraction value (Cr signal)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.word 0x8C++0x0B
|
|
line.word 0x00 "NSDSR,Noise Detection Read Register"
|
|
line.word 0x02 "CROMASR1,Chroma Decoding Read Register 1"
|
|
bitfld.word 0x02 14.--15. " COLORSYS ,Color system detection result" "NTSC,PAL,SECAM,Undetectable"
|
|
bitfld.word 0x02 13. " FSCMODE ,Color sub-carrier frequency detection result" "3.58 MHz,4.43 MHz"
|
|
newline
|
|
bitfld.word 0x02 12. " FSCLOCK ,Burst lock PLL lock state detection result" "Not locked,Locked"
|
|
bitfld.word 0x02 11. " NOBURST ,Color burst detection result" "Not detected,Detected"
|
|
newline
|
|
bitfld.word 0x02 9.--10. " ACCSUBGAIN ,Current ACC gain value (Sub)" "1,2,4,8"
|
|
hexmask.word 0x02 0.--8. 1. " ACCMAINGAIN ,Current ACC gain value (Main)"
|
|
line.word 0x04 "CROMASR2,Chroma Decode Read Register 2"
|
|
bitfld.word 0x04 12. " ISSECAM ,SECAM detection result" "Not detected,Detected"
|
|
bitfld.word 0x04 11. " ISPAL ,PAL detection result" "Not detected,Detected"
|
|
newline
|
|
bitfld.word 0x04 10. " ISNTSC ,NTSC detection result" "Not detected,Detected"
|
|
hexmask.word.byte 0x04 0.--7. 1. " LOCKLEVEL ,Low S/N signal detection result by burst lock PLL"
|
|
line.word 0x06 "SYNCSSR,Sync Separation Read Register"
|
|
bitfld.word 0x06 12. " ISREDUCED ,Sync amplitude detection result during VBI period" "Larger,Equal"
|
|
hexmask.word 0x06 0.--9. 1. " SYNCDEPTH ,Sync pulse amplitude detection result"
|
|
line.word 0x8 "AGCCSR1,AGC Control Read Register 1"
|
|
hexmask.word.byte 0x8 8.--15. 1. " HIGHSAMPLES ,Number of pixels which have larger luminance"
|
|
hexmask.word.byte 0x8 0.--7. 1. " PEAKSAMPLES ,Number of overflowing pixels"
|
|
line.word 0xA "AGCCSR2,AGC Control Read Register 2"
|
|
bitfld.word 0xA 8. " AGCCONVERGE ,AGC convergence detection result" "Not detected,Detected"
|
|
hexmask.word.byte 0xA 0.--7. 1. " AGCGAIN ,Current AGC gain value"
|
|
group.word 0x104++0x0D
|
|
line.word 0x00 "YCSCR3,Y/C Separation Control Register 3"
|
|
bitfld.word 0x00 12.--15. " K15 ,Two-dimensional Y/C Separation Filter Select Coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 6.--11. " K13 ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.word 0x00 0.--5. " K11 ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.word 0x2 "YCSCR4,Y/C Separation Control Register 4"
|
|
bitfld.word 0x2 12.--15. " K16 ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x2 6.--11. " K14 ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.word 0x2 0.--5. " K12 ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.word 0x4 "YCSCR5,Y/C Separation Control Register 5"
|
|
hexmask.word.byte 0x4 8.--15. 1. " K22A ,Two-dimensional Y/C separation filter select coefficient"
|
|
bitfld.word 0x4 0.--5. " K21A ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.word 0x6 "YCSCR6,Y/C Separation Control Register 6"
|
|
hexmask.word.byte 0x6 8.--15. 1. " K22B ,Two-dimensional Y/C separation filter select coefficient"
|
|
bitfld.word 0x6 0.--5. " K21B ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.word 0x8 "YCSCR7,Y/C Separation Control Register 7"
|
|
bitfld.word 0x8 12.--15. " K23B ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x8 8.--11. " K23A ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.word 0x8 0.--4. " K24 ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0xA "YCSCR8,Y/C Separation Control Register 8"
|
|
bitfld.word 0xA 15. " HBPF_NARROW ,Latter-stage horizontal BPF select" "Bypass,17 TAP"
|
|
bitfld.word 0xA 14. " HVBPF_NARROW ,Former-stage horizontal BPF select" "Bypass,17 TAP"
|
|
newline
|
|
bitfld.word 0xA 13. " HBPF1_9TAP_ON ,Former-stage horizontal BPF select" "17 TAP,9 TAP"
|
|
bitfld.word 0xA 12. " HVBPF1_9TAP_ON ,Former-stage horizontal/vertical BPF select" "17 TAP,9 TAP"
|
|
newline
|
|
bitfld.word 0xA 11. " HFIL_TAP_SEL ,Horizontal filter and horizontal/vertical filter band" "17 TAP,9 TAP"
|
|
line.word 0xC "YCSCR9,Y/C Separation Control Register 9"
|
|
bitfld.word 0xC 15. " DET2_ON ,Two-dimensional filter mixing select" "Not mixed,Mixed"
|
|
bitfld.word 0xC 8.--11. " HSEL_MIX_Y ,Mixing ratio of signal after passing horizontal filter to signal after passing former-stage horizontal filter" "100.0%/0%,87.5%/12.5%,75.0%/25.0%,62.5%/37.5%,50.0%/50.0%,37.5%/62.5%,25.0%/75.0%,12.5%/87.5%,0%/100%,?..."
|
|
newline
|
|
bitfld.word 0xC 4.--7. " VSEL_MIX_Y ,Mixing ratio of signal after passing vertical filter to signal after passing former-stage horizontal/vertical filter" "100.0%/0%,87.5%/12.5%,75.0%/25.0%,62.5%/37.5%,50.0%/50.0%,37.5%/62.5%,25.0%/75.0%,12.5%/87.5%,0%/100%,?..."
|
|
bitfld.word 0xC 0.--3. " HVSEL_MIX_Y ,Mixing ratio of signal after passing horizontal/vertical filter to signal after passing former-stage horizontal/vertical filter" "100.0%/0%,87.5%/12.5%,75.0%/25.0%,62.5%/37.5%,50.0%/50.0%,37.5%/62.5%,25.0%/75.0%,12.5%/87.5%,0%/100%,?..."
|
|
group.word 0x114++0x03
|
|
line.word 0x00 "YCSCR11,Y/C Separation Control Register 11"
|
|
hexmask.word 0x00 0.--8. 1. " V_Y_LEVEL ,Vertical luminance detection level for correlation detection filter"
|
|
line.word 0x02 "YCSCR12,Y/C Separation Control Register 12"
|
|
bitfld.word 0x02 12.--15. " DET2_MIX_C ,Mixing ratio of C signal after passing horizontal/vertical adaptive filter to signal" "100%/0%,87.5%/12%,75.0%/25%,62.5%/37.5%,50.0%/50.0%,37.5%/62.5%,25.0%/75.0%,12.5%/87.5%,0%/100%,?..."
|
|
bitfld.word 0x02 8.--11. " DET2_MIX_Y ,Mixing ratio of C signal for Y generation after passing horizontal/vertical adaptive filter to signal" "100%/0%,87.5%/12%,75.0%/25%,62.5%/37.5%,50.0%/50.0%,37.5%/62.5%,25.0%/75.0%,12.5%/87.5%,0%/100%,?..."
|
|
newline
|
|
bitfld.word 0x02 2.--3. " FIL2_MODE_2D ,Two-dimensional cascade/TAKE-OFF filter mode select" "Bypass,Cascade filter,TAKE-OFF filter,?..."
|
|
bitfld.word 0x02 0. " FIL2_NARRROW_2D ,Two-dimensional cascade filter select" "Bypass,17 TAP"
|
|
group.word 0x180++0x03
|
|
line.word 0x0 "DCPCR9,Digital Clamp Control Register 9"
|
|
bitfld.word 0x0 12. " CLP_HOLD_ON_Y ,Clamp data hold processing ON/OFF" "On,Off"
|
|
bitfld.word 0x0 11. " CLP_HOLD_ON_CB ,Clamp data hold processing ON/OFF (Cb)" "On,Off"
|
|
newline
|
|
bitfld.word 0x0 10. " CLP_HOLD_ON_CR ,Clamp data hold processing ON/OFF (Cr)" "On,Off"
|
|
width 8.
|
|
tree "Chroma Filter TAP Coefficient (WA_F0 to WA_F8) Registers for Y/C Separation (YCTWA_F0 to YCTWA_F8)"
|
|
group.word (0x192+0x0)++0x01
|
|
line.word 0x00 "WA_F0,Chroma Filter TAP Coefficient Register 0"
|
|
bitfld.word 0x00 12. " FIL2_2D_WA_F0[12] ,Two-dimensional cascade broadband - Sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WA_F0[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x192+0x2)++0x01
|
|
line.word 0x00 "WA_F1,Chroma Filter TAP Coefficient Register 1"
|
|
bitfld.word 0x00 12. " FIL2_2D_WA_F1[12] ,Two-dimensional cascade broadband - Sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WA_F1[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x192+0x4)++0x01
|
|
line.word 0x00 "WA_F2,Chroma Filter TAP Coefficient Register 2"
|
|
bitfld.word 0x00 12. " FIL2_2D_WA_F2[12] ,Two-dimensional cascade broadband - Sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WA_F2[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x192+0x6)++0x01
|
|
line.word 0x00 "WA_F3,Chroma Filter TAP Coefficient Register 3"
|
|
bitfld.word 0x00 12. " FIL2_2D_WA_F3[12] ,Two-dimensional cascade broadband - Sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WA_F3[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x192+0x8)++0x01
|
|
line.word 0x00 "WA_F4,Chroma Filter TAP Coefficient Register 4"
|
|
bitfld.word 0x00 12. " FIL2_2D_WA_F4[12] ,Two-dimensional cascade broadband - Sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WA_F4[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x192+0xA)++0x01
|
|
line.word 0x00 "WA_F5,Chroma Filter TAP Coefficient Register 5"
|
|
bitfld.word 0x00 12. " FIL2_2D_WA_F5[12] ,Two-dimensional cascade broadband - Sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WA_F5[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x192+0xC)++0x01
|
|
line.word 0x00 "WA_F6,Chroma Filter TAP Coefficient Register 6"
|
|
bitfld.word 0x00 12. " FIL2_2D_WA_F6[12] ,Two-dimensional cascade broadband - Sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WA_F6[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x192+0xE)++0x01
|
|
line.word 0x00 "WA_F7,Chroma Filter TAP Coefficient Register 7"
|
|
bitfld.word 0x00 12. " FIL2_2D_WA_F7[12] ,Two-dimensional cascade broadband - Sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WA_F7[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x192+0x10)++0x01
|
|
line.word 0x00 "WA_F8,Chroma Filter TAP Coefficient Register 8"
|
|
bitfld.word 0x00 12. " FIL2_2D_WA_F8[12] ,Two-dimensional cascade broadband - Sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WA_F8[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
tree.end
|
|
tree "Chroma Filter TAP Coefficient (WB_F0 to WB_F8) Registers for Y/C Separation (YCTWB_F0 to YCTWB_F8)"
|
|
group.word (0x1A4+0x0)++0x01
|
|
line.word 0x00 "WB_F0,Chroma Filter TAP Coefficient Register 0"
|
|
bitfld.word 0x00 12. " FIL2_2D_WB_F0{12] ,Two-dimensional cascade broadband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WB_F0[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x1A4+0x2)++0x01
|
|
line.word 0x00 "WB_F1,Chroma Filter TAP Coefficient Register 1"
|
|
bitfld.word 0x00 12. " FIL2_2D_WB_F1{12] ,Two-dimensional cascade broadband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WB_F1[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x1A4+0x4)++0x01
|
|
line.word 0x00 "WB_F2,Chroma Filter TAP Coefficient Register 2"
|
|
bitfld.word 0x00 12. " FIL2_2D_WB_F2{12] ,Two-dimensional cascade broadband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WB_F2[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x1A4+0x6)++0x01
|
|
line.word 0x00 "WB_F3,Chroma Filter TAP Coefficient Register 3"
|
|
bitfld.word 0x00 12. " FIL2_2D_WB_F3{12] ,Two-dimensional cascade broadband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WB_F3[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x1A4+0x8)++0x01
|
|
line.word 0x00 "WB_F4,Chroma Filter TAP Coefficient Register 4"
|
|
bitfld.word 0x00 12. " FIL2_2D_WB_F4{12] ,Two-dimensional cascade broadband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WB_F4[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x1A4+0xA)++0x01
|
|
line.word 0x00 "WB_F5,Chroma Filter TAP Coefficient Register 5"
|
|
bitfld.word 0x00 12. " FIL2_2D_WB_F5{12] ,Two-dimensional cascade broadband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WB_F5[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x1A4+0xC)++0x01
|
|
line.word 0x00 "WB_F6,Chroma Filter TAP Coefficient Register 6"
|
|
bitfld.word 0x00 12. " FIL2_2D_WB_F6{12] ,Two-dimensional cascade broadband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WB_F6[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x1A4+0xE)++0x01
|
|
line.word 0x00 "WB_F7,Chroma Filter TAP Coefficient Register 7"
|
|
bitfld.word 0x00 12. " FIL2_2D_WB_F7{12] ,Two-dimensional cascade broadband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WB_F7[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x1A4+0x10)++0x01
|
|
line.word 0x00 "WB_F8,Chroma Filter TAP Coefficient Register 8"
|
|
bitfld.word 0x00 12. " FIL2_2D_WB_F8{12] ,Two-dimensional cascade broadband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WB_F8[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
tree.end
|
|
tree "Chroma Filter TAP Coefficient (NA_F0 to NA_F8) Registers for Y/C Separation (YCTNA_F0 to YCTNA_F8)"
|
|
group.word (0x1B6+0x0)++0x01
|
|
line.word 0x00 "NA_F0,Chroma Filter TAP Coefficient Register 0"
|
|
bitfld.word 0x00 12. " FIL2_2D_NA_F0[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NA_F0[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1B6+0x2)++0x01
|
|
line.word 0x00 "NA_F1,Chroma Filter TAP Coefficient Register 1"
|
|
bitfld.word 0x00 12. " FIL2_2D_NA_F1[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NA_F1[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1B6+0x4)++0x01
|
|
line.word 0x00 "NA_F2,Chroma Filter TAP Coefficient Register 2"
|
|
bitfld.word 0x00 12. " FIL2_2D_NA_F2[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NA_F2[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1B6+0x6)++0x01
|
|
line.word 0x00 "NA_F3,Chroma Filter TAP Coefficient Register 3"
|
|
bitfld.word 0x00 12. " FIL2_2D_NA_F3[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NA_F3[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1B6+0x8)++0x01
|
|
line.word 0x00 "NA_F4,Chroma Filter TAP Coefficient Register 4"
|
|
bitfld.word 0x00 12. " FIL2_2D_NA_F4[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NA_F4[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1B6+0xA)++0x01
|
|
line.word 0x00 "NA_F5,Chroma Filter TAP Coefficient Register 5"
|
|
bitfld.word 0x00 12. " FIL2_2D_NA_F5[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NA_F5[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1B6+0xC)++0x01
|
|
line.word 0x00 "NA_F6,Chroma Filter TAP Coefficient Register 6"
|
|
bitfld.word 0x00 12. " FIL2_2D_NA_F6[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NA_F6[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1B6+0xE)++0x01
|
|
line.word 0x00 "NA_F7,Chroma Filter TAP Coefficient Register 7"
|
|
bitfld.word 0x00 12. " FIL2_2D_NA_F7[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NA_F7[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1B6+0x10)++0x01
|
|
line.word 0x00 "NA_F8,Chroma Filter TAP Coefficient Register 8"
|
|
bitfld.word 0x00 12. " FIL2_2D_NA_F8[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NA_F8[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
tree.end
|
|
tree "Chroma Filter TAP Coefficient (NB_F0 to NB_F8) Registers for Y/C Separation (YCTNB_F0 to YCTNB_F8)"
|
|
group.word (0x1C8+0x0)++0x01
|
|
line.word 0x00 "NB_F0,Chroma Filter TAP Coefficient Register 0"
|
|
bitfld.word 0x00 12. " FIL2_2D_NB_F0[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NB_F0[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1C8+0x2)++0x01
|
|
line.word 0x00 "NB_F1,Chroma Filter TAP Coefficient Register 1"
|
|
bitfld.word 0x00 12. " FIL2_2D_NB_F1[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NB_F1[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1C8+0x4)++0x01
|
|
line.word 0x00 "NB_F2,Chroma Filter TAP Coefficient Register 2"
|
|
bitfld.word 0x00 12. " FIL2_2D_NB_F2[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NB_F2[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1C8+0x6)++0x01
|
|
line.word 0x00 "NB_F3,Chroma Filter TAP Coefficient Register 3"
|
|
bitfld.word 0x00 12. " FIL2_2D_NB_F3[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NB_F3[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1C8+0x8)++0x01
|
|
line.word 0x00 "NB_F4,Chroma Filter TAP Coefficient Register 4"
|
|
bitfld.word 0x00 12. " FIL2_2D_NB_F4[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NB_F4[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1C8+0xA)++0x01
|
|
line.word 0x00 "NB_F5,Chroma Filter TAP Coefficient Register 5"
|
|
bitfld.word 0x00 12. " FIL2_2D_NB_F5[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NB_F5[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1C8+0xC)++0x01
|
|
line.word 0x00 "NB_F6,Chroma Filter TAP Coefficient Register 6"
|
|
bitfld.word 0x00 12. " FIL2_2D_NB_F6[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NB_F6[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1C8+0xE)++0x01
|
|
line.word 0x00 "NB_F7,Chroma Filter TAP Coefficient Register 7"
|
|
bitfld.word 0x00 12. " FIL2_2D_NB_F7[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NB_F7[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1C8+0x10)++0x01
|
|
line.word 0x00 "NB_F8,Chroma Filter TAP Coefficient Register 8"
|
|
bitfld.word 0x00 12. " FIL2_2D_NB_F8[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NB_F8[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
tree.end
|
|
newline
|
|
width 12.
|
|
group.word 0x200++0x5
|
|
line.word 0x00 "YGAINCR,Luminance (Y) Signal Gain Control Register"
|
|
hexmask.word 0x00 0.--9. 1. " Y_GAIN2 ,Y signal gain coefficient"
|
|
line.word 0x02 "CBGAINCR,Color Difference (Cb) Signal Gain Control Register"
|
|
hexmask.word 0x02 0.--9. 1. " CB_GAIN2 ,Cb signal gain coefficient"
|
|
line.word 0x04 "CRGAINCR,Color Difference (Cr) Signal Gain Control Register"
|
|
hexmask.word 0x04 0.--9. 1. " CR_GAIN2 ,Cr signal gain coefficient"
|
|
group.word 0x280++0x05
|
|
line.word 0x00 "PGA_UPDATE,PGA Register Update"
|
|
bitfld.word 0x00 0. " PGA_VEN ,PGACR register V update enable" "Disabled,Enabled"
|
|
line.word 0x02 "PGACR,PGA Control Register"
|
|
bitfld.word 0x02 14. " PGA_GAIN_SEL ,PGA switch" "Automatic,Manual"
|
|
newline
|
|
bitfld.word 0x02 8.--13. " PGA_GAIN ,PGA gain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.word 0x04 "ADCCR2,ADC Control Register 2"
|
|
bitfld.word 0x04 0. " ADC_VINSEL ,Input pin control" "VIN1,VIN2"
|
|
sif cpu()=="R8A77470"
|
|
group.word 0x286++0x01
|
|
line.word 0x00 "ADCCR3,ADC Control Register 3"
|
|
bitfld.word 0x00 0. " PSAVON ,PGACR register V update enable" "Run,Halted"
|
|
base ad:0xE60600CC
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "ADCCR4,ADC Control Register 4"
|
|
bitfld.word 0x00 1. " VIN1SEL ,Video input module channel 1 input select" "External input,Output signal"
|
|
newline
|
|
bitfld.word 0x00 0. " VIN0SEL ,Video input module channel 0 input select" "External input,Output signal"
|
|
endif
|
|
width 0x0b
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0xFCFFA800
|
|
width 11.
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "ADCCR1,ADC Control Register 1"
|
|
bitfld.word 0x00 8. " AGCMODE ,A/D converter AGC ON/OFF control" "Off,On"
|
|
group.word 0x0E++0x05
|
|
line.word 0x00 "TGCR1,Timing Generation Control Register 1"
|
|
hexmask.word 0x00 0.--8. 1. " SRCLEFT ,Left end of input video signal capturing area"
|
|
line.word 0x02 "TGCR2,Timing Generation Control Register 2"
|
|
hexmask.word.byte 0x02 10.--15. 1. " SRCTOP ,Top end of input video signal capturing area"
|
|
hexmask.word 0x02 0.--9. 1. " SRCHEIGHT ,Height of input video signal capturing area"
|
|
line.word 0x04 "TGCR3,Timing Generation Control Register 3"
|
|
hexmask.word 0x04 0.--10. 1. " SRCWIDTH ,Width of input video signal capturing area"
|
|
group.word 0x1A++0x1
|
|
line.word 0x00 "SYNSCR1,Sync Separation Control Register 1"
|
|
bitfld.word 0x00 13.--15. " LPFVSYNC ,Low-pass filter cutoff frequency before vertical sync separation" "None,0.94 MHz,0.67 MHz,0.54 MHz,0.47 MHz,0.34 MHz,0.27 MHz,0.23 MHz"
|
|
bitfld.word 0x00 10.--12. " LPFHSYNC ,Low-pass filter cutoff frequency before horizontal sync separation" "None,2.15 MHz,1.88 MHz,1.34 MHz,1.07 MHz,0.94 MHz,0.67 MHz,0.54 MHz"
|
|
newline
|
|
bitfld.word 0x00 4.--7. " VELOCITYSHIFT_H ,Reference level operation speed control for composite sync separation" "X1,X2,X4,X8,X16,X32,X64,X128,X256,X256,X256,X256,X256,X256,X256,X256"
|
|
bitfld.word 0x00 2.--3. " SLICERMODE_H ,Auto-slice level setting for composite sync separation circuit" "CSYNCSLICE_H,25%,50%,75%"
|
|
newline
|
|
bitfld.word 0x00 0.--1. " SLICERMODE_V ,Auto-slice level setting for composite sync separation circuit" "CSYNCSLICE_V,25%,50%,75%"
|
|
if ((per.w(ad:0xFCFFA800+0x1A)&0xC)!=0x00)
|
|
group.word 0x1C++0x01
|
|
line.word 0x00 "SYNSCR2,Sync Separation Control Register 2"
|
|
bitfld.word 0x00 6.--11. " SYNCMAXDUTY_H ,Max ratio of horizontal cycle to horizontal sync signal pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 0.--5. " SYNCMINDUTY ,Min ratio of horizontal cycle to horizontal sync signal pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
hgroup.word 0x1C++0x01
|
|
hide.word 0x00 "SYNSCR2,Sync Separation Control Register 2"
|
|
endif
|
|
if ((per.w(ad:0xFCFFA800+0x1A)&0xC)==0x00)
|
|
group.word 0x1E++0x01
|
|
line.word 0x00 "SYNSCR3,Sync Separation Control Register 3"
|
|
bitfld.word 0x00 10.--13. " SSCLIPSEL ,Clipping level" "512,546,580,614,648,682,716,750,785,819,853,887,921,955,989,1023"
|
|
hexmask.word 0x00 0.--9. 1. " CSYNCSLICE_H ,Slice level for composite sync signal separation"
|
|
else
|
|
group.word 0x1E++0x01
|
|
line.word 0x00 "SYNSCR3,Sync Separation Control Register 3"
|
|
bitfld.word 0x00 10.--13. " SSCLIPSEL ,Clipping level" "512,546,580,614,648,682,716,750,785,819,853,887,921,955,989,1023"
|
|
endif
|
|
if ((per.w(ad:0xFCFFA800+0x1A)&0x3)!=0x00)
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "SYNSCR4,Sync Separation Control Register 4"
|
|
bitfld.word 0x00 6.--11. " SYNCMAXDUTY_V ,Max Ratio of Horizontal Cycle to Vertical Sync Signal Pulse Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 0.--5. " SYNCMINDUTY_V ,Min Ratio of Horizontal Cycle to Horizontal Sync Signal Pulse Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
hgroup.word 0x20++0x01
|
|
hide.word 0x00 "SYNSCR4,Sync Separation Control Register 4"
|
|
endif
|
|
if ((per.w(ad:0xFCFFA800+0x1A)&0x3)==0x00)
|
|
group.word 0x22++0x01
|
|
line.word 0x00 "SYNSCR5,Sync Separation Control Register 5"
|
|
bitfld.word 0x00 15. " VSYNCDELAY ,Delays the separated vertical sync signal for 1/4 horizontal cycle" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--14. " VSYNCSLICE ,Threshold for vertical sync separation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.word 0x00 0.--9. 1. " CSYNCSLICE_V ,Slice level for composite sync signal separation"
|
|
else
|
|
group.word 0x22++0x01
|
|
line.word 0x00 "SYNSCR5,Sync Separation Control Register 5"
|
|
bitfld.word 0x00 15. " VSYNCDELAY ,Delays the separated vertical sync signal for 1/4 horizontal cycle" "Disabled,Enabled"
|
|
bitfld.word 0x00 10.--14. " VSYNCSLICE ,Threshold for vertical sync separation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.word 0x24++0x05
|
|
line.word 0x00 "HAFCCR1,Horizontal AFC Control Register 1"
|
|
bitfld.word 0x00 12.--15. " HAFCGAIN ,Horizontal AFC loop gain" "Small value 0,Small value 1,Small value 2,Small value 3,Small value 4,Small value 5,Standard value 6,Large value 7,Large value 8,Large value 9,Large value 10,Large value 11,Large value 12,Large value 13,Large value 14,Large value 15"
|
|
bitfld.word 0x00 10. " HAFCFREERUN ,Horizontal AFC free-run oscillation mode ON/OFF" "Off,On"
|
|
newline
|
|
hexmask.word 0x00 0.--9. 1. " HAFCTYP ,Horizontal AFC center oscillation frequency"
|
|
line.word 0x02 "HAFCCR2,Horizontal AFC Control Register 2"
|
|
bitfld.word 0x02 12.--15. " HAFCSTART ,Start line of horizontal AFC normal operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x02 11. " NOX2HOSC ,Disable of horizontal AFC double speed detection" "No,Yes"
|
|
newline
|
|
bitfld.word 0x02 10. " DOX2HOSC ,Horizontal AFC forced double-speed oscillation" "Not forced,Forced"
|
|
hexmask.word 0x02 0.--9. 1. " HAFCMAX ,Maximum oscillation frequency of horizontal AFC"
|
|
line.word 0x04 "HAFCCR3,Horizontal AFC Control Register 3"
|
|
bitfld.word 0x04 12.--15. " HAFCEND ,End line of horizontal AFC normal operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x04 11. " HAFCMODE_1 ,Loop gain control for low S/N" "Fixed,Automatically"
|
|
newline
|
|
bitfld.word 0x04 10. " HAFCMODE_0 ,Horizontal AFC control during VBI period" "Phase comparison stopped,Loop gain reduced"
|
|
hexmask.word 0x04 0.--9. 1. " HAFCMIN ,Min oscillation frequency of horizontal AFC"
|
|
group.word 0x2A++0x01
|
|
line.word 0x00 "VCDWCR1,Vertical Countdown Control Register 1"
|
|
bitfld.word 0x00 15. " VCDFREERUN ,Vertical countdown free-run oscillation mode ON/OFF" "Off,On"
|
|
bitfld.word 0x00 14. " NOVCD50 ,Vertical countdown 50-Hz oscillation mode OFF" "On,Off"
|
|
newline
|
|
bitfld.word 0x00 13. " NOVCD60 ,Vertical Countdown 60-Hz (59.94-Hz) oscillation mode OFF" "On,Off"
|
|
bitfld.word 0x00 11.--12. " VCDDEFAULT ,Vertical countdown center oscillation frequency" "Auto-detection,50.00 Hz,59.94 Hz,60.00 Hz"
|
|
newline
|
|
bitfld.word 0x00 5.--10. " VCDWINDOW ,Vertical countdown sync area" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 0.--4. " VCDOFFSET ,Vertical countdown minimum oscillation frequency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.word 0x30++0x15
|
|
line.word 0x00 "DCPCR1,Digital Clamp Control Register 1"
|
|
bitfld.word 0x00 15. " DCPMODE_Y ,Clamp level setting mode (Y signal)" "Manual,Auto"
|
|
bitfld.word 0x00 11. " DCPCHECK ,Digital clamp pulse position check" "0,1"
|
|
newline
|
|
hexmask.word 0x00 0.--9. 1. " BLANKLEVEL_Y ,Clamp offset level (Y signal)"
|
|
line.word 0x02 "DCPCR2,Digital Clamp Control Register 2"
|
|
bitfld.word 0x02 15. " DCPMODE_C ,Clamp level setting mode (Cb/Cr signal)" "Manual,Auto"
|
|
bitfld.word 0x02 6.--11. " BLANKLEVEL_CB ,Clamp offset level (Cb signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.word 0x02 0.--5. " BLANKLEVEL_CR ,Clamp offset level (Cr signal)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.word 0x04 "DCPCR3,Digital Clamp Control Register 3"
|
|
bitfld.word 0x04 12.--14. " DCPRESPONSE ,Digital clamp response speed" "0,1,2,3,4,5,6,7"
|
|
line.word 0x06 "DCPCR4,Digital Clamp Control Register 4"
|
|
bitfld.word 0x06 10.--15. " DCPSTART ,Digital clamp start line (in 1-line units)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.word 0x08 "DCPCR5,Digital Clamp Control Register 5"
|
|
bitfld.word 0x08 10.--15. " DCPEND ,Digital clamp end line (in 1-line units)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.word 0x0A "DCPCR6,Digital Clamp Control Register 6"
|
|
hexmask.word.byte 0x0A 8.--14. 1. " DCPWIDTH ,Digital clamp pulse width"
|
|
line.word 0x0C "DCPCR7,Digital Clamp Control Register 7"
|
|
hexmask.word.byte 0x0C 8.--15. 1. " DCPPOS_Y ,Digital clamp pulse horizontal start position"
|
|
line.word 0x0E "DCPCR8,Digital Clamp Control Register 8"
|
|
hexmask.word.byte 0x0E 8.--15. 1. " DCPPOS_C ,Digital clamp pulse horizontal start position (Cb/Cr signal)"
|
|
line.word 0x10 "NSDCR,Noise Detection Control Register"
|
|
bitfld.word 0x10 12.--13. " ACFINPUT ,Video signal for autocorrelation function" "Y signal,Cb signal,Cr signal,Cr signal"
|
|
bitfld.word 0x10 4.--8. " ACFLAGTIME ,Delay time for autocorrelation function calculation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.word 0x10 0.--1. " ACFFILTER ,Smoothing parameter of autocorrelation function data" "0,1,2,3"
|
|
line.word 0x12 "BTLCR,Burst Lock/Chroma Decoding Control Register"
|
|
bitfld.word 0x12 14.--15. " LOCKRANGE ,Burst lock PLL lock range" "+-400 Hz,+-800 Hz,+-1200 Hz,+-1600 Hz"
|
|
bitfld.word 0x12 12.--13. " LOOPGAIN ,Burst lock PLL loop gain" "0,1,2,3"
|
|
newline
|
|
bitfld.word 0x12 10.--11. " LOCKLIMIT ,Level for burst lock PLL to Re-Search free-run frequency" "0,1,2,3"
|
|
bitfld.word 0x12 9. " BCOFREERUN ,Burst lock PLL free-run oscillation mode ON/OFF" "Off,On"
|
|
newline
|
|
bitfld.word 0x12 6.--7. " DEFAULTSYS ,Default color system" "NTSC,PAL,SECAM,Not specified"
|
|
bitfld.word 0x12 5. " NONTSC358 ,NTSC-M detection control" "On,Off"
|
|
newline
|
|
bitfld.word 0x12 4. " NONTSC443 ,NTSC-4.43 detection control" "On,Off"
|
|
bitfld.word 0x12 3. " NOPALM ,PAL-M detection control" "On,Off"
|
|
newline
|
|
bitfld.word 0x12 2. " NOPALN ,PAL-N detection control" "On,Off"
|
|
bitfld.word 0x12 1. " NOPAL443 ,PAL-B | G| H | I | D detection control" "On,Off"
|
|
newline
|
|
bitfld.word 0x12 0. " NOSECAM ,SECAM detection control" "On,Off"
|
|
line.word 0x14 "BTGPCR,Burst Gate Pulse Control Register"
|
|
bitfld.word 0x14 15. " BGPCHECK ,Burst gate pulse position check" "0,1"
|
|
hexmask.word.byte 0x14 8.--14. 1. " BGPWIDTH ,Burst gate pulse width (recommended value: 88)"
|
|
newline
|
|
hexmask.word.byte 0x14 0.--7. 1. " BGPSTART ,Burst gate pulse start position (Recommended value: 50)"
|
|
if ((per.w(ad:0xFCFFA800+0x46)&0x800)==0x00)
|
|
group.word 0x46++0x01
|
|
line.word 0x00 "ACCCR1,ACC Control Register 1"
|
|
bitfld.word 0x00 12.--15. " KILLEROFFSET ,These bits and KILLERLEVEL are added together to be the level to turn off the color killer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 11. " ACCMODE ,ACC operating mode" "Auto,Manual"
|
|
newline
|
|
bitfld.word 0x00 9.--10. " ACCMAXGAIN ,Maximum ACC gain" "6 times,8 times,12 times,16 times"
|
|
hexmask.word 0x00 0.--8. 1. " ACCLEVEL ,ACC reference color burst amplitude (Recommended value: 236)"
|
|
else
|
|
group.word 0x46++0x01
|
|
line.word 0x00 "ACCCR1,ACC Control Register 1"
|
|
bitfld.word 0x00 12.--15. " KILLEROFFSET ,These bits and KILLERLEVEL are added together to be the level to turn off the color killer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 11. " ACCMODE ,ACC operating mode" "Auto,Manual"
|
|
newline
|
|
endif
|
|
if ((per.w(ad:0xFCFFA800+0x46)&0x800)==0x800)
|
|
group.word 0x48++0x01
|
|
line.word 0x00 "ACCCR2,ACC Control Register 2"
|
|
bitfld.word 0x00 9.--10. " CHROMASUBGAIN ,Chroma manual gain (sub)" "1 time,2 times,4 times,8 times"
|
|
hexmask.word 0x00 0.--8. 1. " CHROMAMAINGAIN ,Chroma manual gain (main)"
|
|
else
|
|
hgroup.word 0x48++0x01
|
|
hide.word 0x00 "ACCCR2,ACC Control Register 2"
|
|
endif
|
|
group.word 0x4A++0x07
|
|
line.word 0x00 "ACCCR3,ACC Control Register 3"
|
|
bitfld.word 0x00 14.--15. " ACCRESPONSE ,ACC response speed" "0,1,2,3"
|
|
bitfld.word 0x00 8.--13. " ACCPRECIS ,ACC gain adjustment accuracy" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.word 0x00 7. " KILLERMODE ,Forced color killer mode ON/OFF" "Not forced,Forced"
|
|
bitfld.word 0x00 1.--6. " KILLERLEVEL ,Color killer operation start point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.word 0x02 "TINTCR,TINT Control Register"
|
|
bitfld.word 0x02 10.--15. " TINTSUB ,Fine adjustment of R-Y demodulation axis" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.word 0x02 0.--9. 1. " TINTMAIN ,Hue adjustment level"
|
|
line.word 0x04 "YCDCR,Y/C Delay/Chroma Decoding Control Register"
|
|
bitfld.word 0x04 4.--8. " LUMADELAY ,Luminance signal delay adjustment" "-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x04 2. " CHROMALPF ,LPF for demodulated chroma" "Not used,Used"
|
|
newline
|
|
bitfld.word 0x04 0.--1. " DEMODMODE ,Averaging processing for pre-demodulated line" "No processing,,For PAL,?..."
|
|
line.word 0x06 "AGCCR1,AGC Control Register 1"
|
|
bitfld.word 0x06 13. " DUREDUCE ,Manual control of sync signal amplitude detection during VBI period" "Standard value,Gain to 3/4 times"
|
|
bitfld.word 0x06 12. " NOREDUCE ,Control of sync signal amplitude detection during VBI period" "Detected,Not detected"
|
|
newline
|
|
bitfld.word 0x06 9.--11. " AGCRESPONSE ,AGC response speed" "0,1,2,3,4,5,6,7"
|
|
hexmask.word 0x06 0.--8. 1. " AGCLEVEL ,Sync signal reference amplitude"
|
|
sif (cpu()=="R8A77470")||(cpu()=="SH7269")||(cpu()=="SH7268")
|
|
group.word 0x52++0x01
|
|
line.word 0x00 "AGCCR2,AGC Control Register 2"
|
|
bitfld.word 0x00 8.--13. " AGCPRECIS ,AGC gain adjustment accuracy" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
group.word 0x52++0x01
|
|
line.word 0x00 "AGCPRECIS,AGC Gain Adjustment Accuracy"
|
|
bitfld.word 0x00 8.--13. " AGCPRECIS ,AGC gain adjustment accuracy" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
group.word 0x54++0x19
|
|
line.word 0x0A "PKLIMITCR,Peak Limiter Control Register"
|
|
bitfld.word 0x0A 14.--15. " PEAKLEVEL ,Peak luminance value limited by peak limiter" "OFF,1008 LSB,992 LSB,960 LSB"
|
|
bitfld.word 0x0A 12.--13. " PEAKATTACK ,Response speed with peak limiter gain decreased" "0,1,2,3"
|
|
newline
|
|
bitfld.word 0x0A 10.--11. " PEAKRELEASE ,Response speed with peak limiter gain increased" "0,1,2,3"
|
|
bitfld.word 0x0A 8.--9. " PEAKRATIO ,Maximum compression rate of peak limiter" "50%,25%,12.5%,0%"
|
|
newline
|
|
hexmask.word.byte 0x0A 0.--7. 1. " MAXPEAKSAMPLES ,Allowable number of overflowing pixels"
|
|
line.word 0x0C "RGORCR1,Over-Range Control Register 1"
|
|
hexmask.word 0x0C 0.--9. 1. " RADJ_O_LEVEL0 ,A/D over-threshold level"
|
|
line.word 0x0E "RGORCR2,Over-Range Control Register 2"
|
|
hexmask.word 0x0E 0.--9. 1. " RADJ_U_LEVEL0 ,A/D under-threshold level"
|
|
line.word 0x10 "RGORCR3,Over-Range Control Register 3"
|
|
hexmask.word 0x10 0.--9. 1. " RADJ_O_LEVEL1 ,A/D over-threshold level"
|
|
line.word 0x12 "RGORCR4,Over-Range Control Register 4"
|
|
hexmask.word 0x12 0.--9. 1. " RADJ_U_LEVEL1 ,A/D under-threshold level"
|
|
line.word 0x14 "RGORCR5,Over-Range Control Register 5"
|
|
hexmask.word 0x14 0.--9. 1. " RADJ_O_LEVEL2 ,A/D over-threshold level"
|
|
line.word 0x16 "RGORCR6,Over-Range Control Register 6"
|
|
hexmask.word 0x16 0.--9. 1. " RADJ_U_LEVEL2 ,A/D under-threshold level"
|
|
line.word 0x18 "RGORCR7,Over-Range Control Register 7"
|
|
bitfld.word 0x18 12.--14. " TEST_MONI ,Test mode" "Normal,Normal,Normal,Normal,Level 0,Level 1,Level 2,Level 3"
|
|
bitfld.word 0x18 9.--11. " RADJ_MIX_K_FIX ,Forced range over/under mode" "Auto detection,Auto detection,Auto detection,Level 0,Level 1,Level 2,Level 3,?..."
|
|
newline
|
|
bitfld.word 0x18 2. " UCMP_SW ,Over-range detection enable" "Disabled,Enabled"
|
|
bitfld.word 0x18 1. " DCMP_SW ,Under-range detection enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x18 0. " HWIDE_SW ,Horizontal enlargement of over/under-range level" "Not provided,Provided"
|
|
group.word 0x7C++0x03
|
|
line.word 0x00 "AFCPFCR,Feedback Control Register for Horizontal AFC Phase Comparator"
|
|
bitfld.word 0x00 4. " PHDET_FIX ,Forcible or LOWGAIN control" "Not forced,Forced"
|
|
bitfld.word 0x00 0.--2. " PHDET_DIV ,Phase comparator feedback adjust for low sync signal lock stability" "1/1,1/2,1/4,1/8,1/16,1/32,?..."
|
|
line.word 0x02 "RUPDCR,Register Update Enable Register"
|
|
bitfld.word 0x02 15. " NEWSETTING ,V update enable for TGCR1 to TGCR3" "Disabled,Enabled"
|
|
rgroup.word 0x80++0x07
|
|
line.word 0x00 "VSYNCSR,Sync Separation Status/Vertical Cycle Read Register"
|
|
bitfld.word 0x00 15. " FHCOUNT[0] ,Horizontal AFC oscillation cycle" "0,1"
|
|
bitfld.word 0x00 14. " FHLOCK ,Horizontal AFC lock detection result" "Not locked,Locked"
|
|
newline
|
|
bitfld.word 0x00 13. " ISNOISY ,Detection result of low S/N signal by sync separation" "Not low,Low"
|
|
bitfld.word 0x00 12. " FHMODE ,Speed detection result" "Normal,Multiplied"
|
|
newline
|
|
bitfld.word 0x00 11. " NOSIGNAL ,No-signal detection result" "Vertical,No vertical"
|
|
bitfld.word 0x00 10. " FVLOCK ,Vertical countdown lock detection result" "Not locked,Locked"
|
|
newline
|
|
bitfld.word 0x00 9. " FVMODE ,Vertical countdown oscillation mode" "50Hz,60Hz"
|
|
bitfld.word 0x00 8. " INTERLACED ,Interlace detection result" "Progressive,Interlace"
|
|
sif (cpu()=="R8A77470")||(cpu()=="SH7269")||(cpu()=="SH7268")
|
|
newline
|
|
hexmask.word.byte 0x00 0.--7. 1. " FVCOUNT ,Vertical cycle measurement result"
|
|
endif
|
|
line.word 0x02 "HSYNCSR,Horizontal Cycle Read Register"
|
|
line.word 0x04 "DCPSR1,Digital Clamp Read Register 1"
|
|
bitfld.word 0x04 10.--15. " CLAMPLEVEL_CB ,Digital clamp subtraction value (Cb signal)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.word 0x04 0.--9. 1. " CLAMPLEVEL_CB ,Digital clamp subtraction value (Y signal)"
|
|
line.word 0x06 "DCPSR2,Digital Clamp Read Register 2"
|
|
bitfld.word 0x06 10.--15. " CLAMPLEVEL_CR ,Digital clamp subtraction value (Cr signal)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.word 0x8C++0x0B
|
|
line.word 0x00 "NSDSR,Noise Detection Read Register"
|
|
line.word 0x02 "CROMASR1,Chroma Decoding Read Register 1"
|
|
bitfld.word 0x02 14.--15. " COLORSYS ,Color system detection result" "NTSC,PAL,SECAM,Undetectable"
|
|
bitfld.word 0x02 13. " FSCMODE ,Color sub-carrier frequency detection result" "3.58 MHz,4.43 MHz"
|
|
newline
|
|
bitfld.word 0x02 12. " FSCLOCK ,Burst lock PLL lock state detection result" "Not locked,Locked"
|
|
bitfld.word 0x02 11. " NOBURST ,Color burst detection result" "Not detected,Detected"
|
|
newline
|
|
bitfld.word 0x02 9.--10. " ACCSUBGAIN ,Current ACC gain value (Sub)" "1,2,4,8"
|
|
hexmask.word 0x02 0.--8. 1. " ACCMAINGAIN ,Current ACC gain value (Main)"
|
|
line.word 0x04 "CROMASR2,Chroma Decode Read Register 2"
|
|
bitfld.word 0x04 12. " ISSECAM ,SECAM detection result" "Not detected,Detected"
|
|
bitfld.word 0x04 11. " ISPAL ,PAL detection result" "Not detected,Detected"
|
|
newline
|
|
bitfld.word 0x04 10. " ISNTSC ,NTSC detection result" "Not detected,Detected"
|
|
hexmask.word.byte 0x04 0.--7. 1. " LOCKLEVEL ,Low S/N signal detection result by burst lock PLL"
|
|
line.word 0x06 "SYNCSSR,Sync Separation Read Register"
|
|
bitfld.word 0x06 12. " ISREDUCED ,Sync amplitude detection result during VBI period" "Larger,Equal"
|
|
hexmask.word 0x06 0.--9. 1. " SYNCDEPTH ,Sync pulse amplitude detection result"
|
|
line.word 0x8 "AGCCSR1,AGC Control Read Register 1"
|
|
hexmask.word.byte 0x8 8.--15. 1. " HIGHSAMPLES ,Number of pixels which have larger luminance"
|
|
hexmask.word.byte 0x8 0.--7. 1. " PEAKSAMPLES ,Number of overflowing pixels"
|
|
line.word 0xA "AGCCSR2,AGC Control Read Register 2"
|
|
bitfld.word 0xA 8. " AGCCONVERGE ,AGC convergence detection result" "Not detected,Detected"
|
|
hexmask.word.byte 0xA 0.--7. 1. " AGCGAIN ,Current AGC gain value"
|
|
group.word 0x104++0x0D
|
|
line.word 0x00 "YCSCR3,Y/C Separation Control Register 3"
|
|
bitfld.word 0x00 12.--15. " K15 ,Two-dimensional Y/C Separation Filter Select Coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 6.--11. " K13 ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.word 0x00 0.--5. " K11 ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.word 0x2 "YCSCR4,Y/C Separation Control Register 4"
|
|
bitfld.word 0x2 12.--15. " K16 ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x2 6.--11. " K14 ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.word 0x2 0.--5. " K12 ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.word 0x4 "YCSCR5,Y/C Separation Control Register 5"
|
|
hexmask.word.byte 0x4 8.--15. 1. " K22A ,Two-dimensional Y/C separation filter select coefficient"
|
|
bitfld.word 0x4 0.--5. " K21A ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.word 0x6 "YCSCR6,Y/C Separation Control Register 6"
|
|
hexmask.word.byte 0x6 8.--15. 1. " K22B ,Two-dimensional Y/C separation filter select coefficient"
|
|
bitfld.word 0x6 0.--5. " K21B ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.word 0x8 "YCSCR7,Y/C Separation Control Register 7"
|
|
bitfld.word 0x8 12.--15. " K23B ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x8 8.--11. " K23A ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.word 0x8 0.--4. " K24 ,Two-dimensional Y/C separation filter select coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0xA "YCSCR8,Y/C Separation Control Register 8"
|
|
bitfld.word 0xA 15. " HBPF_NARROW ,Latter-stage horizontal BPF select" "Bypass,17 TAP"
|
|
bitfld.word 0xA 14. " HVBPF_NARROW ,Former-stage horizontal BPF select" "Bypass,17 TAP"
|
|
newline
|
|
bitfld.word 0xA 13. " HBPF1_9TAP_ON ,Former-stage horizontal BPF select" "17 TAP,9 TAP"
|
|
bitfld.word 0xA 12. " HVBPF1_9TAP_ON ,Former-stage horizontal/vertical BPF select" "17 TAP,9 TAP"
|
|
newline
|
|
bitfld.word 0xA 11. " HFIL_TAP_SEL ,Horizontal filter and horizontal/vertical filter band" "17 TAP,9 TAP"
|
|
line.word 0xC "YCSCR9,Y/C Separation Control Register 9"
|
|
bitfld.word 0xC 15. " DET2_ON ,Two-dimensional filter mixing select" "Not mixed,Mixed"
|
|
bitfld.word 0xC 8.--11. " HSEL_MIX_Y ,Mixing ratio of signal after passing horizontal filter to signal after passing former-stage horizontal filter" "100.0%/0%,87.5%/12.5%,75.0%/25.0%,62.5%/37.5%,50.0%/50.0%,37.5%/62.5%,25.0%/75.0%,12.5%/87.5%,0%/100%,?..."
|
|
newline
|
|
bitfld.word 0xC 4.--7. " VSEL_MIX_Y ,Mixing ratio of signal after passing vertical filter to signal after passing former-stage horizontal/vertical filter" "100.0%/0%,87.5%/12.5%,75.0%/25.0%,62.5%/37.5%,50.0%/50.0%,37.5%/62.5%,25.0%/75.0%,12.5%/87.5%,0%/100%,?..."
|
|
bitfld.word 0xC 0.--3. " HVSEL_MIX_Y ,Mixing ratio of signal after passing horizontal/vertical filter to signal after passing former-stage horizontal/vertical filter" "100.0%/0%,87.5%/12.5%,75.0%/25.0%,62.5%/37.5%,50.0%/50.0%,37.5%/62.5%,25.0%/75.0%,12.5%/87.5%,0%/100%,?..."
|
|
group.word 0x114++0x03
|
|
line.word 0x00 "YCSCR11,Y/C Separation Control Register 11"
|
|
hexmask.word 0x00 0.--8. 1. " V_Y_LEVEL ,Vertical luminance detection level for correlation detection filter"
|
|
line.word 0x02 "YCSCR12,Y/C Separation Control Register 12"
|
|
bitfld.word 0x02 12.--15. " DET2_MIX_C ,Mixing ratio of C signal after passing horizontal/vertical adaptive filter to signal" "100%/0%,87.5%/12%,75.0%/25%,62.5%/37.5%,50.0%/50.0%,37.5%/62.5%,25.0%/75.0%,12.5%/87.5%,0%/100%,?..."
|
|
bitfld.word 0x02 8.--11. " DET2_MIX_Y ,Mixing ratio of C signal for Y generation after passing horizontal/vertical adaptive filter to signal" "100%/0%,87.5%/12%,75.0%/25%,62.5%/37.5%,50.0%/50.0%,37.5%/62.5%,25.0%/75.0%,12.5%/87.5%,0%/100%,?..."
|
|
newline
|
|
bitfld.word 0x02 2.--3. " FIL2_MODE_2D ,Two-dimensional cascade/TAKE-OFF filter mode select" "Bypass,Cascade filter,TAKE-OFF filter,?..."
|
|
bitfld.word 0x02 0. " FIL2_NARRROW_2D ,Two-dimensional cascade filter select" "Bypass,17 TAP"
|
|
group.word 0x180++0x03
|
|
line.word 0x0 "DCPCR9,Digital Clamp Control Register 9"
|
|
bitfld.word 0x0 12. " CLP_HOLD_ON_Y ,Clamp data hold processing ON/OFF" "On,Off"
|
|
bitfld.word 0x0 11. " CLP_HOLD_ON_CB ,Clamp data hold processing ON/OFF (Cb)" "On,Off"
|
|
newline
|
|
bitfld.word 0x0 10. " CLP_HOLD_ON_CR ,Clamp data hold processing ON/OFF (Cr)" "On,Off"
|
|
width 8.
|
|
tree "Chroma Filter TAP Coefficient (WA_F0 to WA_F8) Registers for Y/C Separation (YCTWA_F0 to YCTWA_F8)"
|
|
group.word (0x192+0x0)++0x01
|
|
line.word 0x00 "WA_F0,Chroma Filter TAP Coefficient Register 0"
|
|
bitfld.word 0x00 12. " FIL2_2D_WA_F0[12] ,Two-dimensional cascade broadband - Sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WA_F0[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x192+0x2)++0x01
|
|
line.word 0x00 "WA_F1,Chroma Filter TAP Coefficient Register 1"
|
|
bitfld.word 0x00 12. " FIL2_2D_WA_F1[12] ,Two-dimensional cascade broadband - Sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WA_F1[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x192+0x4)++0x01
|
|
line.word 0x00 "WA_F2,Chroma Filter TAP Coefficient Register 2"
|
|
bitfld.word 0x00 12. " FIL2_2D_WA_F2[12] ,Two-dimensional cascade broadband - Sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WA_F2[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x192+0x6)++0x01
|
|
line.word 0x00 "WA_F3,Chroma Filter TAP Coefficient Register 3"
|
|
bitfld.word 0x00 12. " FIL2_2D_WA_F3[12] ,Two-dimensional cascade broadband - Sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WA_F3[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x192+0x8)++0x01
|
|
line.word 0x00 "WA_F4,Chroma Filter TAP Coefficient Register 4"
|
|
bitfld.word 0x00 12. " FIL2_2D_WA_F4[12] ,Two-dimensional cascade broadband - Sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WA_F4[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x192+0xA)++0x01
|
|
line.word 0x00 "WA_F5,Chroma Filter TAP Coefficient Register 5"
|
|
bitfld.word 0x00 12. " FIL2_2D_WA_F5[12] ,Two-dimensional cascade broadband - Sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WA_F5[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x192+0xC)++0x01
|
|
line.word 0x00 "WA_F6,Chroma Filter TAP Coefficient Register 6"
|
|
bitfld.word 0x00 12. " FIL2_2D_WA_F6[12] ,Two-dimensional cascade broadband - Sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WA_F6[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x192+0xE)++0x01
|
|
line.word 0x00 "WA_F7,Chroma Filter TAP Coefficient Register 7"
|
|
bitfld.word 0x00 12. " FIL2_2D_WA_F7[12] ,Two-dimensional cascade broadband - Sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WA_F7[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x192+0x10)++0x01
|
|
line.word 0x00 "WA_F8,Chroma Filter TAP Coefficient Register 8"
|
|
bitfld.word 0x00 12. " FIL2_2D_WA_F8[12] ,Two-dimensional cascade broadband - Sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WA_F8[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
tree.end
|
|
tree "Chroma Filter TAP Coefficient (WB_F0 to WB_F8) Registers for Y/C Separation (YCTWB_F0 to YCTWB_F8)"
|
|
group.word (0x1A4+0x0)++0x01
|
|
line.word 0x00 "WB_F0,Chroma Filter TAP Coefficient Register 0"
|
|
bitfld.word 0x00 12. " FIL2_2D_WB_F0{12] ,Two-dimensional cascade broadband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WB_F0[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x1A4+0x2)++0x01
|
|
line.word 0x00 "WB_F1,Chroma Filter TAP Coefficient Register 1"
|
|
bitfld.word 0x00 12. " FIL2_2D_WB_F1{12] ,Two-dimensional cascade broadband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WB_F1[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x1A4+0x4)++0x01
|
|
line.word 0x00 "WB_F2,Chroma Filter TAP Coefficient Register 2"
|
|
bitfld.word 0x00 12. " FIL2_2D_WB_F2{12] ,Two-dimensional cascade broadband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WB_F2[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x1A4+0x6)++0x01
|
|
line.word 0x00 "WB_F3,Chroma Filter TAP Coefficient Register 3"
|
|
bitfld.word 0x00 12. " FIL2_2D_WB_F3{12] ,Two-dimensional cascade broadband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WB_F3[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x1A4+0x8)++0x01
|
|
line.word 0x00 "WB_F4,Chroma Filter TAP Coefficient Register 4"
|
|
bitfld.word 0x00 12. " FIL2_2D_WB_F4{12] ,Two-dimensional cascade broadband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WB_F4[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x1A4+0xA)++0x01
|
|
line.word 0x00 "WB_F5,Chroma Filter TAP Coefficient Register 5"
|
|
bitfld.word 0x00 12. " FIL2_2D_WB_F5{12] ,Two-dimensional cascade broadband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WB_F5[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x1A4+0xC)++0x01
|
|
line.word 0x00 "WB_F6,Chroma Filter TAP Coefficient Register 6"
|
|
bitfld.word 0x00 12. " FIL2_2D_WB_F6{12] ,Two-dimensional cascade broadband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WB_F6[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x1A4+0xE)++0x01
|
|
line.word 0x00 "WB_F7,Chroma Filter TAP Coefficient Register 7"
|
|
bitfld.word 0x00 12. " FIL2_2D_WB_F7{12] ,Two-dimensional cascade broadband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WB_F7[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
group.word (0x1A4+0x10)++0x01
|
|
line.word 0x00 "WB_F8,Chroma Filter TAP Coefficient Register 8"
|
|
bitfld.word 0x00 12. " FIL2_2D_WB_F8{12] ,Two-dimensional cascade broadband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_WB_F8[0:11] ,Two-dimensional cascade broadband - absolute value"
|
|
tree.end
|
|
tree "Chroma Filter TAP Coefficient (NA_F0 to NA_F8) Registers for Y/C Separation (YCTNA_F0 to YCTNA_F8)"
|
|
group.word (0x1B6+0x0)++0x01
|
|
line.word 0x00 "NA_F0,Chroma Filter TAP Coefficient Register 0"
|
|
bitfld.word 0x00 12. " FIL2_2D_NA_F0[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NA_F0[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1B6+0x2)++0x01
|
|
line.word 0x00 "NA_F1,Chroma Filter TAP Coefficient Register 1"
|
|
bitfld.word 0x00 12. " FIL2_2D_NA_F1[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NA_F1[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1B6+0x4)++0x01
|
|
line.word 0x00 "NA_F2,Chroma Filter TAP Coefficient Register 2"
|
|
bitfld.word 0x00 12. " FIL2_2D_NA_F2[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NA_F2[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1B6+0x6)++0x01
|
|
line.word 0x00 "NA_F3,Chroma Filter TAP Coefficient Register 3"
|
|
bitfld.word 0x00 12. " FIL2_2D_NA_F3[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NA_F3[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1B6+0x8)++0x01
|
|
line.word 0x00 "NA_F4,Chroma Filter TAP Coefficient Register 4"
|
|
bitfld.word 0x00 12. " FIL2_2D_NA_F4[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NA_F4[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1B6+0xA)++0x01
|
|
line.word 0x00 "NA_F5,Chroma Filter TAP Coefficient Register 5"
|
|
bitfld.word 0x00 12. " FIL2_2D_NA_F5[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NA_F5[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1B6+0xC)++0x01
|
|
line.word 0x00 "NA_F6,Chroma Filter TAP Coefficient Register 6"
|
|
bitfld.word 0x00 12. " FIL2_2D_NA_F6[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NA_F6[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1B6+0xE)++0x01
|
|
line.word 0x00 "NA_F7,Chroma Filter TAP Coefficient Register 7"
|
|
bitfld.word 0x00 12. " FIL2_2D_NA_F7[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NA_F7[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1B6+0x10)++0x01
|
|
line.word 0x00 "NA_F8,Chroma Filter TAP Coefficient Register 8"
|
|
bitfld.word 0x00 12. " FIL2_2D_NA_F8[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NA_F8[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
tree.end
|
|
tree "Chroma Filter TAP Coefficient (NB_F0 to NB_F8) Registers for Y/C Separation (YCTNB_F0 to YCTNB_F8)"
|
|
group.word (0x1C8+0x0)++0x01
|
|
line.word 0x00 "NB_F0,Chroma Filter TAP Coefficient Register 0"
|
|
bitfld.word 0x00 12. " FIL2_2D_NB_F0[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NB_F0[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1C8+0x2)++0x01
|
|
line.word 0x00 "NB_F1,Chroma Filter TAP Coefficient Register 1"
|
|
bitfld.word 0x00 12. " FIL2_2D_NB_F1[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NB_F1[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1C8+0x4)++0x01
|
|
line.word 0x00 "NB_F2,Chroma Filter TAP Coefficient Register 2"
|
|
bitfld.word 0x00 12. " FIL2_2D_NB_F2[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NB_F2[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1C8+0x6)++0x01
|
|
line.word 0x00 "NB_F3,Chroma Filter TAP Coefficient Register 3"
|
|
bitfld.word 0x00 12. " FIL2_2D_NB_F3[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NB_F3[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1C8+0x8)++0x01
|
|
line.word 0x00 "NB_F4,Chroma Filter TAP Coefficient Register 4"
|
|
bitfld.word 0x00 12. " FIL2_2D_NB_F4[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NB_F4[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1C8+0xA)++0x01
|
|
line.word 0x00 "NB_F5,Chroma Filter TAP Coefficient Register 5"
|
|
bitfld.word 0x00 12. " FIL2_2D_NB_F5[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NB_F5[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1C8+0xC)++0x01
|
|
line.word 0x00 "NB_F6,Chroma Filter TAP Coefficient Register 6"
|
|
bitfld.word 0x00 12. " FIL2_2D_NB_F6[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NB_F6[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1C8+0xE)++0x01
|
|
line.word 0x00 "NB_F7,Chroma Filter TAP Coefficient Register 7"
|
|
bitfld.word 0x00 12. " FIL2_2D_NB_F7[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NB_F7[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
group.word (0x1C8+0x10)++0x01
|
|
line.word 0x00 "NB_F8,Chroma Filter TAP Coefficient Register 8"
|
|
bitfld.word 0x00 12. " FIL2_2D_NB_F8[12] ,Two-dimensional cascade narrowband - sign" "0,1"
|
|
hexmask.word 0x00 0.--11. 1. " FIL2_2D_NB_F8[0:11] ,Two-dimensional cascade narrowband - absolute value"
|
|
tree.end
|
|
newline
|
|
width 12.
|
|
group.word 0x200++0x5
|
|
line.word 0x00 "YGAINCR,Luminance (Y) Signal Gain Control Register"
|
|
hexmask.word 0x00 0.--9. 1. " Y_GAIN2 ,Y signal gain coefficient"
|
|
line.word 0x02 "CBGAINCR,Color Difference (Cb) Signal Gain Control Register"
|
|
hexmask.word 0x02 0.--9. 1. " CB_GAIN2 ,Cb signal gain coefficient"
|
|
line.word 0x04 "CRGAINCR,Color Difference (Cr) Signal Gain Control Register"
|
|
hexmask.word 0x04 0.--9. 1. " CR_GAIN2 ,Cr signal gain coefficient"
|
|
group.word 0x280++0x05
|
|
line.word 0x00 "PGA_UPDATE,PGA Register Update"
|
|
bitfld.word 0x00 0. " PGA_VEN ,PGACR register V update enable" "Disabled,Enabled"
|
|
line.word 0x02 "PGACR,PGA Control Register"
|
|
bitfld.word 0x02 14. " PGA_GAIN_SEL ,PGA switch" "Automatic,Manual"
|
|
newline
|
|
bitfld.word 0x02 8.--13. " PGA_GAIN ,PGA gain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.word 0x04 "ADCCR2,ADC Control Register 2"
|
|
bitfld.word 0x04 0. " ADC_VINSEL ,Input pin control" "VIN1,VIN2"
|
|
sif cpu()=="R8A77470"
|
|
group.word 0x286++0x01
|
|
line.word 0x00 "ADCCR3,ADC Control Register 3"
|
|
bitfld.word 0x00 0. " PSAVON ,PGACR register V update enable" "Run,Halted"
|
|
base ad:0xE60600CC
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "ADCCR4,ADC Control Register 4"
|
|
bitfld.word 0x00 1. " VIN1SEL ,Video input module channel 1 input select" "External input,Output signal"
|
|
newline
|
|
bitfld.word 0x00 0. " VIN0SEL ,Video input module channel 0 input select" "External input,Output signal"
|
|
endif
|
|
width 0x0b
|
|
tree.end
|
|
tree.end
|
|
tree.open "IC (Video Display Controller 5 : Input Controller)"
|
|
tree "Channel 0"
|
|
base ad:0xFCFF7400
|
|
width 18.
|
|
group.long 0x00++0x13 "Input Controller"
|
|
line.long 0x00 "INP_UPDATE,External Input block register update control register"
|
|
eventfld.long 0x00 4. " INP_EXT_UPDATE ,External Input Block Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 0. " INP_IMG_UPDATE ,Sync Signal Adjustment Block Register Update" "Not updated,Updated"
|
|
line.long 0x04 "INP_SEL_CNT,Input select control register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x04 20. " INP_SEL ,Input Select" "Off,On"
|
|
bitfld.long 0x04 12.--14. " INP_FORMAT ,External Input Format Select" "YcbCr444|RGB888,RGB666,RGB565,BT656,BT601,YCbCr422,?..."
|
|
elif cpuis("SH7268")||cpuis("SH7269")
|
|
bitfld.long 0x04 20. " INP_SEL ,Input Select" "Video decoder output,External input pins"
|
|
bitfld.long 0x04 12.--14. " INP_FORMAT ,External Input Format Select" "YcbCr444|RGB888,RGB666,RGB565,BT656,BT601,?..."
|
|
else
|
|
bitfld.long 0x04 20. " INP_SEL ,Input Select" "Video decoder output,External input pins"
|
|
bitfld.long 0x04 12.--14. " INP_FORMAT ,External Input Format Select" "YcbCr444|RGB888,RGB666,RGB565,BT656,BT601,YCbCr422,?..."
|
|
endif
|
|
newline
|
|
bitfld.long 0x04 8. " INP_PXD_EDGE ,Clock Edge Select for Capturing External Input Video Image Signals DV_DATA23 to DV_DATA0" "Rising,Falling"
|
|
bitfld.long 0x04 4. " INP_VS_EDGE ,Clock Edge Select for Capturing External Input Vsync Signals DV_VSYNC" "Rising,Falling"
|
|
newline
|
|
bitfld.long 0x04 0. " INP_HS_EDGE ,Clock Edge Select for Capturing External Input Hsync Signals DV_HSYNC" "Rising,Falling"
|
|
line.long 0x08 "INP_EXT_SYNC_CNT,External input sync signal control register"
|
|
bitfld.long 0x08 28. " INP_ENDIAN_ON ,External Input Bit Endian Change On/Off Control" "Off,On"
|
|
bitfld.long 0x08 24. " INP_SWAP_ON ,External Input B/R Signal Swap On/Off Control" "Off,On"
|
|
newline
|
|
bitfld.long 0x08 20. " INP_VS_INV ,External Input Vsync Signal DV_VSYNC Inversion Control" "Not inverted - positive,Inverted - negative"
|
|
bitfld.long 0x08 16. " INP_HS_INV ,External Input Hsync Signal DV_HSYNC Inversion Control" "Not inverted - positive,Inverted - negative"
|
|
newline
|
|
bitfld.long 0x08 8. " INP_H_EDGE_SEL ,Reference Select for External Input BT656 Hsync Signal" "EAV,SAV"
|
|
bitfld.long 0x08 4. " INP_F525_625 ,Number of Lines for BT656 External Input" "525 lines,625 lines"
|
|
newline
|
|
bitfld.long 0x08 0.--1. " INP_H_POS ,Y/Cb/Y/Cr Data String Start Timing to Hsync Reference for BT656/601 or YCbCr422 External Input" "Cb/Y/Cr/Y(BT656/601)|Cb/Cr (YCbCr422),Y/Cr/Y/Cb(BT656/601)|(YCbCr422),Cr/Y/Cb/Y(BT656/601)|(YCbCr422),Y/Cb/Y/Cr(BT656/601)|Cr/Cb (YCbCr422)"
|
|
newline
|
|
line.long 0x0C "INP_VSYNC_PH_ADJ,Vsync signal phase adjustment register"
|
|
hexmask.long.word 0x0C 16.--25. 1. " INP_FH50 ,Vsync Signal 1/2fH Phase Timing"
|
|
hexmask.long.word 0x0C 0.--9. 1. " INP_FH25 ,Vsync Signal 1/4fH Phase Timing"
|
|
line.long 0x10 "INP_DLY_ADJ,Sync signal delay adjustment register"
|
|
bitfld.long 0x10 24.--26. " INP_VS_DLY ,Number of lines for Delaying Vsync signal and Field Differentiation Signal" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x10 16.--23. 1. " INP_FLD_DLY ,Field Differentiation Signal Delay Amount"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--15. 1. " INP_VS_DLY ,Vsync Signal Delay Amount"
|
|
hexmask.long.byte 0x10 0.--7. 1. " INP_HS_DLY ,Hsync Signal Delay Amount"
|
|
width 21.
|
|
group.long 0x80++0x0B "Image Quality Adjustment Block"
|
|
line.long 0x00 "IMGCNT_UPDATE,Image quality adjustment block register update control register"
|
|
eventfld.long 0x00 0. " IMGCNT_VEN ,Image Quality Adjustment Block Register Update" "Not updated,Updated"
|
|
line.long 0x04 "IMGCNT_NR_CNT0,NR control register 0"
|
|
bitfld.long 0x04 20. " NR1D_MD ,Horizontal Noise Reduction Operating Mode" "G/B/R,Y/Cb/Cr"
|
|
bitfld.long 0x04 16. " NR1D_ON ,Noise Reduction On/Off Control" "Off,On"
|
|
newline
|
|
hexmask.long.byte 0x04 8.--14. 1. " NR1D_Y_TH[6:0] ,Maximum Value (Absolute Value) of Y/G Signal Coring"
|
|
bitfld.long 0x04 4.--5. " NR1D_Y_TAP[1:0] ,Y/G Signal TAP Select" "1 adjacent pix,2 adjacent pix,3 adjacent pix,4 adjacent pix"
|
|
newline
|
|
bitfld.long 0x04 0.--1. " NR1D_Y_GAIN ,Noise Reduction Gain Adjustment of Y/G Signal" "1/2,1/4,1/8,1/16"
|
|
line.long 0x08 "IMGCNT_NR_CNT1,NR control register 1"
|
|
hexmask.long.byte 0x08 24.--30. 1. " NR1D_CB_TH ,Maximum Value (Absolute Value) of Cb/B Signal Coring"
|
|
bitfld.long 0x08 20.--21. " NR1D_CB_TAP ,Cb/B Signal TAP Select" "Adjacent,2 adjacent,3 adjacent,4 adjacent"
|
|
newline
|
|
bitfld.long 0x08 16.--17. " NR1D_CB_GAIN ,Noise Reduction Gain Adjustment of Cb/B Signal" "1/2,1/4,1/8,1/16"
|
|
hexmask.long.byte 0x08 8.--14. 1. " NR1D_CR_TH ,Maximum Value (Absolute Value) of Cr/R Signal Coring"
|
|
newline
|
|
bitfld.long 0x08 4.--5. " NR1D_CR_TAP ,Cr/R Signal TAP Select" "1 adjacent pix.,2 adjacent pix.,3 adjacent pix.,4 adjacent pix."
|
|
bitfld.long 0x08 0.--1. " NR1D_CR_GAIN ,Noise Reduction Gain Adjustment of Cr/R Signal" "1/2,1/4,1/8,1/16"
|
|
group.long 0xA0++0x1B
|
|
line.long 0x00 "IMGCNT_MTX_MODE,Image quality adjustment block matrix mode register"
|
|
bitfld.long 0x00 0.--1. " IMGCNT_MTX_MD ,Operating Mode" "GBR -> GBR,GBR -> YCbCr,YCbCr -> GBR,YCbCr -> YCbCr"
|
|
line.long 0x04 "IMGCNT_MTX_YG_ADJ0,Image quality adjustment block matrix YG adjustment register 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " IMGCNT_MTX_YG ,Offset (DC) Adjustment of Y/G Signal"
|
|
hexmask.long.word 0x04 0.--10. 1. " IMGCNT_MTX_GG ,Y/G Signal Gain Adjustment for Y/G Signal Output"
|
|
line.long 0x08 "IMGCNT_MTX_YG_ADJ1,Image quality adjustment block matrix YG adjustment register 1"
|
|
hexmask.long.word 0x08 16.--26. 1. " IMGCNT_MTX_GB ,Cb/B Signal Gain Adjustment for Y/G Signal Output"
|
|
hexmask.long.word 0x08 0.--10. 1. " IMGCNT_MTX_GR ,Cr/R Signal Gain Adjustment for Y/G Signal Output"
|
|
line.long 0x0C "IMGCNT_MTX_CBB_ADJ0,Image quality adjustment block matrix CBB adjustment register 0"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " IMGCNT_MTX_B ,Offset (DC) Adjustment of Cb/B Signal"
|
|
hexmask.long.word 0x0C 0.--10. 1. " IMGCNT_MTX_BG ,Y/G Signal Gain Adjustment for Y/G Signal Output"
|
|
line.long 0x10 "IMGCNT_MTX_CBB_ADJ1,Image quality adjustment block matrix CBB adjustment register 1"
|
|
hexmask.long.word 0x10 16.--26. 1. " IMGCNT_MTX_BB ,Cb/B Signal Gain Adjustment for Cb/B Signal Output"
|
|
hexmask.long.word 0x10 0.--10. 1. " IMGCNT_MTX_BR ,Cr/R Signal Gain Adjustment for Cb/B Signal Output"
|
|
line.long 0x14 "IMGCNT_MTX_CRR_ADJ0,Image quality adjustment block matrix CRR adjustment register 0"
|
|
hexmask.long.byte 0x14 16.--23. 1. " IMGCNT_MTX_R ,Offset (DC) Adjustment of Cr/R Signal"
|
|
hexmask.long.word 0x14 0.--10. 1. " IMGCNT_MTX_RG ,Y/G Signal Gain Adjustment for Cr/R Signal Output"
|
|
line.long 0x18 "IMGCNT_MTX_CRR_ADJ1,Image quality adjustment block matrix CRR adjustment register 1"
|
|
hexmask.long.word 0x18 16.--26. 1. " IMGCNT_MTX_RB ,Cb/B Signal Gain Adjustment for Cr/R Signal Output"
|
|
hexmask.long.word 0x18 0.--10. 1. " IMGCNT_MTX_RR ,Cr/R Signal Gain Adjustment for Cr/R Signal Output"
|
|
sif (cpu()!="R7S721021"&&cpu()!="SH7268"&&cpu()!="SH7269")
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "IMGCNT_DRC_REG,Dynamic range compression register"
|
|
bitfld.long 0x00 0. " DRC_EN ,Use of Contrast Correction (Dynamic Range Compression)" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0xFCFF9400
|
|
width 18.
|
|
group.long 0x00++0x13 "Input Controller"
|
|
line.long 0x00 "INP_UPDATE,External Input block register update control register"
|
|
eventfld.long 0x00 4. " INP_EXT_UPDATE ,External Input Block Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 0. " INP_IMG_UPDATE ,Sync Signal Adjustment Block Register Update" "Not updated,Updated"
|
|
line.long 0x04 "INP_SEL_CNT,Input select control register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x04 20. " INP_SEL ,Input Select" "Off,On"
|
|
bitfld.long 0x04 12.--14. " INP_FORMAT ,External Input Format Select" "YcbCr444|RGB888,RGB666,RGB565,BT656,BT601,YCbCr422,?..."
|
|
elif cpuis("SH7268")||cpuis("SH7269")
|
|
bitfld.long 0x04 20. " INP_SEL ,Input Select" "Video decoder output,External input pins"
|
|
bitfld.long 0x04 12.--14. " INP_FORMAT ,External Input Format Select" "YcbCr444|RGB888,RGB666,RGB565,BT656,BT601,?..."
|
|
else
|
|
bitfld.long 0x04 20. " INP_SEL ,Input Select" "Video decoder output,External input pins"
|
|
bitfld.long 0x04 12.--14. " INP_FORMAT ,External Input Format Select" "YcbCr444|RGB888,RGB666,RGB565,BT656,BT601,YCbCr422,?..."
|
|
endif
|
|
newline
|
|
bitfld.long 0x04 8. " INP_PXD_EDGE ,Clock Edge Select for Capturing External Input Video Image Signals DV_DATA23 to DV_DATA0" "Rising,Falling"
|
|
bitfld.long 0x04 4. " INP_VS_EDGE ,Clock Edge Select for Capturing External Input Vsync Signals DV_VSYNC" "Rising,Falling"
|
|
newline
|
|
bitfld.long 0x04 0. " INP_HS_EDGE ,Clock Edge Select for Capturing External Input Hsync Signals DV_HSYNC" "Rising,Falling"
|
|
line.long 0x08 "INP_EXT_SYNC_CNT,External input sync signal control register"
|
|
bitfld.long 0x08 28. " INP_ENDIAN_ON ,External Input Bit Endian Change On/Off Control" "Off,On"
|
|
bitfld.long 0x08 24. " INP_SWAP_ON ,External Input B/R Signal Swap On/Off Control" "Off,On"
|
|
newline
|
|
bitfld.long 0x08 20. " INP_VS_INV ,External Input Vsync Signal DV_VSYNC Inversion Control" "Not inverted - positive,Inverted - negative"
|
|
bitfld.long 0x08 16. " INP_HS_INV ,External Input Hsync Signal DV_HSYNC Inversion Control" "Not inverted - positive,Inverted - negative"
|
|
newline
|
|
bitfld.long 0x08 8. " INP_H_EDGE_SEL ,Reference Select for External Input BT656 Hsync Signal" "EAV,SAV"
|
|
bitfld.long 0x08 4. " INP_F525_625 ,Number of Lines for BT656 External Input" "525 lines,625 lines"
|
|
newline
|
|
bitfld.long 0x08 0.--1. " INP_H_POS ,Y/Cb/Y/Cr Data String Start Timing to Hsync Reference for BT656/601 or YCbCr422 External Input" "Cb/Y/Cr/Y(BT656/601)|Cb/Cr (YCbCr422),Y/Cr/Y/Cb(BT656/601)|(YCbCr422),Cr/Y/Cb/Y(BT656/601)|(YCbCr422),Y/Cb/Y/Cr(BT656/601)|Cr/Cb (YCbCr422)"
|
|
newline
|
|
line.long 0x0C "INP_VSYNC_PH_ADJ,Vsync signal phase adjustment register"
|
|
hexmask.long.word 0x0C 16.--25. 1. " INP_FH50 ,Vsync Signal 1/2fH Phase Timing"
|
|
hexmask.long.word 0x0C 0.--9. 1. " INP_FH25 ,Vsync Signal 1/4fH Phase Timing"
|
|
line.long 0x10 "INP_DLY_ADJ,Sync signal delay adjustment register"
|
|
bitfld.long 0x10 24.--26. " INP_VS_DLY ,Number of lines for Delaying Vsync signal and Field Differentiation Signal" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x10 16.--23. 1. " INP_FLD_DLY ,Field Differentiation Signal Delay Amount"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--15. 1. " INP_VS_DLY ,Vsync Signal Delay Amount"
|
|
hexmask.long.byte 0x10 0.--7. 1. " INP_HS_DLY ,Hsync Signal Delay Amount"
|
|
width 21.
|
|
group.long 0x80++0x0B "Image Quality Adjustment Block"
|
|
line.long 0x00 "IMGCNT_UPDATE,Image quality adjustment block register update control register"
|
|
eventfld.long 0x00 0. " IMGCNT_VEN ,Image Quality Adjustment Block Register Update" "Not updated,Updated"
|
|
line.long 0x04 "IMGCNT_NR_CNT0,NR control register 0"
|
|
bitfld.long 0x04 20. " NR1D_MD ,Horizontal Noise Reduction Operating Mode" "G/B/R,Y/Cb/Cr"
|
|
bitfld.long 0x04 16. " NR1D_ON ,Noise Reduction On/Off Control" "Off,On"
|
|
newline
|
|
hexmask.long.byte 0x04 8.--14. 1. " NR1D_Y_TH[6:0] ,Maximum Value (Absolute Value) of Y/G Signal Coring"
|
|
bitfld.long 0x04 4.--5. " NR1D_Y_TAP[1:0] ,Y/G Signal TAP Select" "1 adjacent pix,2 adjacent pix,3 adjacent pix,4 adjacent pix"
|
|
newline
|
|
bitfld.long 0x04 0.--1. " NR1D_Y_GAIN ,Noise Reduction Gain Adjustment of Y/G Signal" "1/2,1/4,1/8,1/16"
|
|
line.long 0x08 "IMGCNT_NR_CNT1,NR control register 1"
|
|
hexmask.long.byte 0x08 24.--30. 1. " NR1D_CB_TH ,Maximum Value (Absolute Value) of Cb/B Signal Coring"
|
|
bitfld.long 0x08 20.--21. " NR1D_CB_TAP ,Cb/B Signal TAP Select" "Adjacent,2 adjacent,3 adjacent,4 adjacent"
|
|
newline
|
|
bitfld.long 0x08 16.--17. " NR1D_CB_GAIN ,Noise Reduction Gain Adjustment of Cb/B Signal" "1/2,1/4,1/8,1/16"
|
|
hexmask.long.byte 0x08 8.--14. 1. " NR1D_CR_TH ,Maximum Value (Absolute Value) of Cr/R Signal Coring"
|
|
newline
|
|
bitfld.long 0x08 4.--5. " NR1D_CR_TAP ,Cr/R Signal TAP Select" "1 adjacent pix.,2 adjacent pix.,3 adjacent pix.,4 adjacent pix."
|
|
bitfld.long 0x08 0.--1. " NR1D_CR_GAIN ,Noise Reduction Gain Adjustment of Cr/R Signal" "1/2,1/4,1/8,1/16"
|
|
group.long 0xA0++0x1B
|
|
line.long 0x00 "IMGCNT_MTX_MODE,Image quality adjustment block matrix mode register"
|
|
bitfld.long 0x00 0.--1. " IMGCNT_MTX_MD ,Operating Mode" "GBR -> GBR,GBR -> YCbCr,YCbCr -> GBR,YCbCr -> YCbCr"
|
|
line.long 0x04 "IMGCNT_MTX_YG_ADJ0,Image quality adjustment block matrix YG adjustment register 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " IMGCNT_MTX_YG ,Offset (DC) Adjustment of Y/G Signal"
|
|
hexmask.long.word 0x04 0.--10. 1. " IMGCNT_MTX_GG ,Y/G Signal Gain Adjustment for Y/G Signal Output"
|
|
line.long 0x08 "IMGCNT_MTX_YG_ADJ1,Image quality adjustment block matrix YG adjustment register 1"
|
|
hexmask.long.word 0x08 16.--26. 1. " IMGCNT_MTX_GB ,Cb/B Signal Gain Adjustment for Y/G Signal Output"
|
|
hexmask.long.word 0x08 0.--10. 1. " IMGCNT_MTX_GR ,Cr/R Signal Gain Adjustment for Y/G Signal Output"
|
|
line.long 0x0C "IMGCNT_MTX_CBB_ADJ0,Image quality adjustment block matrix CBB adjustment register 0"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " IMGCNT_MTX_B ,Offset (DC) Adjustment of Cb/B Signal"
|
|
hexmask.long.word 0x0C 0.--10. 1. " IMGCNT_MTX_BG ,Y/G Signal Gain Adjustment for Y/G Signal Output"
|
|
line.long 0x10 "IMGCNT_MTX_CBB_ADJ1,Image quality adjustment block matrix CBB adjustment register 1"
|
|
hexmask.long.word 0x10 16.--26. 1. " IMGCNT_MTX_BB ,Cb/B Signal Gain Adjustment for Cb/B Signal Output"
|
|
hexmask.long.word 0x10 0.--10. 1. " IMGCNT_MTX_BR ,Cr/R Signal Gain Adjustment for Cb/B Signal Output"
|
|
line.long 0x14 "IMGCNT_MTX_CRR_ADJ0,Image quality adjustment block matrix CRR adjustment register 0"
|
|
hexmask.long.byte 0x14 16.--23. 1. " IMGCNT_MTX_R ,Offset (DC) Adjustment of Cr/R Signal"
|
|
hexmask.long.word 0x14 0.--10. 1. " IMGCNT_MTX_RG ,Y/G Signal Gain Adjustment for Cr/R Signal Output"
|
|
line.long 0x18 "IMGCNT_MTX_CRR_ADJ1,Image quality adjustment block matrix CRR adjustment register 1"
|
|
hexmask.long.word 0x18 16.--26. 1. " IMGCNT_MTX_RB ,Cb/B Signal Gain Adjustment for Cr/R Signal Output"
|
|
hexmask.long.word 0x18 0.--10. 1. " IMGCNT_MTX_RR ,Cr/R Signal Gain Adjustment for Cr/R Signal Output"
|
|
sif (cpu()!="R7S721021"&&cpu()!="SH7268"&&cpu()!="SH7269")
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "IMGCNT_DRC_REG,Dynamic range compression register"
|
|
bitfld.long 0x00 0. " DRC_EN ,Use of Contrast Correction (Dynamic Range Compression)" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "SC (Video Display Controller 5: Scaler)"
|
|
tree "Channel 0"
|
|
base ad:0xFCFF7500
|
|
width 15.
|
|
group.long (0x0+0x00)++0x1F "SC0"
|
|
line.long 0x00 "SCL0_UPDATE,SCL0 register update control register"
|
|
eventfld.long 0x00 13. " SCL0_VEN_D ,Scaling-Up Control and Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 12. " SCL0_VEN_C ,Scaling-Down Control and Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
newline
|
|
eventfld.long 0x00 8. " SCL0_UPDATE ,SYNC Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 4. " SCL0_VEN_B ,Synchronization Control and Scaling-up Control Register Update" "Not updated,Updated"
|
|
newline
|
|
eventfld.long 0x00 0. " SCL0_VEN_A ,Scaling-Down Control Register Update" "Not updated,Updated"
|
|
line.long 0x04 "SCL0_FRC1,Mask control register"
|
|
hexmask.long.word 0x04 16.--31. 1. " RES_VMASK ,Repeated Vsync Signal Masking Period"
|
|
bitfld.long 0x04 0. " RES_VMASK_ON ,Repeated Vsync Signal Masking Control" "Disabled,Enabled"
|
|
line.long 0x08 "SCL0_FRC2,Missing Vsync compensation control register"
|
|
hexmask.long.word 0x08 16.--31. 1. " RES_VLACK ,Missing-Sync Compensating Pulse Output Wait Time"
|
|
bitfld.long 0x08 0. " RES_VLACK_ON ,Missing Vsync Signal Compensation" "Disabled,Enabled"
|
|
line.long 0x0C "SCL0_FRC3,Output sync select register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x0C 8. " RES_VS_IN_SEL ,Horizontal and Vertical Sync Signal Output and Full-Screen Enable Signal Select" "Scaler0,Scaler1"
|
|
bitfld.long 0x0C 0. " RES_VS_SEL ,Vsync Signal Output Select" "Externally,Internally"
|
|
else
|
|
bitfld.long 0x0C 0. " RES_VS_SEL ,Vsync Signal Output Select" "Externally,Internally"
|
|
endif
|
|
line.long 0x10 "SCL0_FRC4,Free-running period control register"
|
|
hexmask.long.word 0x10 16.--26. 1. " RES_FV ,Free-Running Vsync Period Setting"
|
|
hexmask.long.word 0x10 0.--10. 1. " RES_FH ,Hsync Period Setting"
|
|
line.long 0x14 "SCL0_FRC5,Output delay control register"
|
|
bitfld.long 0x14 8. " RES_FLD_DLY_SEL ,Field Determination Signal Delay Control" "No delay,Delay 1 cycle"
|
|
hexmask.long.byte 0x14 0.--7. 1. " RES_VSDLY ,Vsync Signal Delay Control"
|
|
line.long 0x18 "SCL0_FRC6,Full-screen vertical size register"
|
|
hexmask.long.word 0x18 16.--26. 1. " RES_F_VS ,Vertical Enable Signal Start Position for Full Screen"
|
|
hexmask.long.word 0x18 0.--10. 1. " RES_F_VW ,Vertical Enable Signal Width for Full Screen (lines)"
|
|
line.long 0x1C "SCL0_FRC7,Full-screen horizontal size register"
|
|
hexmask.long.word 0x1C 16.--26. 1. " RES_F_HS ,Horizontal Enable Signal Start Position for Full Screen"
|
|
hexmask.long.word 0x1C 0.--10. 1. " RES_F_HW ,Horizontal Enable Signal Width for Full Screen"
|
|
sif cpuis("SH7268")||cpuis("SH7269")
|
|
group.long (0x0+0x20)++0x03
|
|
line.long 0x00 "SCL0_FRC8,Field Determination Signal Switching Register"
|
|
bitfld.long 0x00 10. " RES_US_FLD ,Field determination signal switching" "Synch. block,Frame number"
|
|
endif
|
|
rgroup.long (0x0+0x24)++0x03
|
|
line.long 0x00 "SCL0_FRC9,Vsync detection register"
|
|
bitfld.long 0x00 4. " RES_QVLOCK ,Locked Vsync Signal Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " RES_QVLACK ,Missing Vsync Signal Detection Flag" "Not detected,Detected"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
rgroup.word (0x0+0x28)++0x03
|
|
line.word 0x00 "SCL0_MON0,Status monitor 0 register"
|
|
hexmask.word 0x00 0.--10. 1. " RES_LIN_STAT ,Current location of the image line input to the scaling-down control block"
|
|
line.word 0x02 "SCL0_INT,Interrupt control register"
|
|
hexmask.word 0x02 0.--10. 1. " RES_LINE ,Setting of Interrupt on Image Line Input to Scaling-down Control Block"
|
|
endif
|
|
group.long (0x0+0x2C)++0x3B
|
|
line.long 0x00 "SCL0_DS1,Scaling-down control register"
|
|
bitfld.long 0x00 4. " RES_DS_V_ON ,Vertical Scale Down On/Off" "Off,On"
|
|
bitfld.long 0x00 0. " RES_DS_H_ON ,Horizontal Scale Down On/Off" "Off,On"
|
|
line.long 0x04 "SCL0_DS2,Vertical capture size register"
|
|
hexmask.long.word 0x04 16.--26. 1. " RES_VS ,Vertical Position Setting for Video Signal Capturing"
|
|
hexmask.long.word 0x04 0.--10. 1. " RES_VW ,Vertical Width of Video Signal to be Captured"
|
|
line.long 0x08 "SCL0_DS3,Horizontal capture size register"
|
|
hexmask.long.word 0x08 16.--26. 1. " RES_HS ,Horizontal Position Setting for Video Signal Capturing"
|
|
hexmask.long.word 0x08 0.--10. 1. " RES_HW ,Horizontal Width of Video Signal to be Captured"
|
|
line.long 0x0C "SCL0_DS4,Horizontal scale down register"
|
|
bitfld.long 0x0C 29. " RES_PFIL_SEL ,Prefilter Mode Select for Brightness Signals - Off/On(1/4 + 1/2 + 1/4)" "Off,On"
|
|
bitfld.long 0x0C 28. " RES_DS_H_INTERPOTYP ,Horizontal Interpolation Mode Select" "Hold,Linear"
|
|
newline
|
|
hexmask.long.word 0x0C 0.--15. 1. " RES_DS_H_RATIO ,Horizontal Scale Down Ratio"
|
|
line.long 0x10 "SCL0_DS5,Initial vertical phase register"
|
|
bitfld.long 0x10 28. " RES_V_INTERPOTYP ,Vertical Interpolation Mode Select" "Hold,Linear"
|
|
hexmask.long.word 0x10 16.--27. 1. " RES_TOP_INIPHASE ,Vertical Interpolation Start Phase for Top Field 0 to 4095"
|
|
newline
|
|
hexmask.long.word 0x10 0.--11. 1. " RES_BTM_INIPHASE ,Vertical Interpolation Start Phase for Bottom Field 0 to 4095"
|
|
line.long 0x14 "SCL0_DS6,Initial vertical phase register"
|
|
hexmask.long.word 0x14 0.--15. 1. " RES_V_RATIO ,Vertical Scale Up/Down Ratio"
|
|
line.long 0x18 "SCL0_DS7,Scaling-down control block output size register"
|
|
hexmask.long.word 0x18 16.--26. 1. " RES_OUT_VW ,Number of Valid Lines in Vertical Direction Output by Scaling-down Control Block"
|
|
hexmask.long.word 0x18 0.--10. 1. " RES_OUT_HW ,Number of Valid Horizontal Pixels Output by Scaling-Down Control Block"
|
|
line.long 0x1C "SCL0_US1,Scaling-down control block output size register"
|
|
bitfld.long 0x1C 4. " RES_US_V_ON ,Vertical Scale Up On/Off" "Off,On"
|
|
bitfld.long 0x1C 0. " RES_US_H_ON ,Horizontal Scale Up On/Off" "Off,On"
|
|
line.long 0x20 "SCL0_US2,Output image vertical size register"
|
|
hexmask.long.word 0x20 16.--26. 1. " RES_P_VS ,Vertical Enable Signal Start Position for Output Image"
|
|
hexmask.long.word 0x20 0.--10. 1. " RES_P_VW ,Vertical Enable Signal Width for Output Image (lines)"
|
|
line.long 0x24 "SCL0_US3,Output image vertical size register"
|
|
hexmask.long.word 0x24 16.--26. 1. " RES_P_HS ,Horizontal Enable Signal Start Position for Output Image"
|
|
hexmask.long.word 0x24 0.--10. 1. " RES_P_HW ,Horizontal Enable Signal Width for Output Image"
|
|
line.long 0x28 "SCL0_US4,Scaling-Up Control Block Input Size Register"
|
|
hexmask.long.word 0x28 16.--26. 1. " RES_IN_VW ,Number of Valid Lines in Vertical Direction Input to Scaling-down Control Block"
|
|
hexmask.long.word 0x28 0.--10. 1. " RES_IN_HW ,Number of Valid Horizontal Pixels Input to Scaling-down Control Block"
|
|
line.long 0x2C "SCL0_US5,Scaling-up control block input size register"
|
|
hexmask.long.word 0x2C 0.--15. 1. " RES_US_H_RATIO ,Horizontal Scale Up Ratio"
|
|
line.long 0x30 "SCL0_US6,Horizontal Scale Up Initial Phase Register"
|
|
bitfld.long 0x30 28. " RES_US_H_INTERPOTYP ,Horizontal Interpolation Mode Select" "Hold,Linear"
|
|
hexmask.long.word 0x30 16.--27. 1. " RES_US_HT_INIPHASE ,Horizontal Interpolation Start Phase for Top Field 0 to 4095"
|
|
newline
|
|
hexmask.long.word 0x30 0.--11. 1. " RES_US_HB_INIPHASE ,Horizontal Interpolation Start Phase for Bottom Field 0 to 4095"
|
|
line.long 0x34 "SCL0_US7,Trimming Register"
|
|
hexmask.long.byte 0x34 8.--15. 1. " RES_HCUT ,Horizontal Amount of Cut-off Post-Scaling Image (Right and Left Parts)"
|
|
hexmask.long.byte 0x34 0.--7. 1. " RES_VCUT ,Vertical Amount of Cut-off Post-Scaling Image (Upper and Lower Parts)"
|
|
line.long 0x38 "SCL0_US8,Frame Buffer Read Select Register"
|
|
bitfld.long 0x38 4. " RES_IBUS_SYNC_SEL ,Sync Signal Select for Frame Buffer Read Block" "Scaling-up control block,Graphics processing block"
|
|
bitfld.long 0x38 0. " RES_DISP_ON ,Post-Scaling Image Frame Display On/Off" "On,Off"
|
|
group.long (0x0+0x6C)++0x3
|
|
line.long 0x00 "SCL0_OVR1,Background color register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RES_BK_CLO_R ,Background Color Setting R/Cr Signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RES_BK_COL_G ,Background Color Setting G/Y Signal"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " RES_BK_COL_B ,Background Color Setting B/Cb Signal"
|
|
group.long (0x0+0x80)++0x03
|
|
line.long 0x00 "SCL1_UPDATE,SCL1 register update control register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
eventfld.long 0x00 20. " SCL1_UPDATE_B ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 16. " SCL1_UPDATE_A ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
newline
|
|
endif
|
|
eventfld.long 0x00 4. " SCL1_VEN_B ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 0. " SCL1_VEN_A ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
group.long (0x0+0x88)++0x0F
|
|
line.long 0x00 "SCL1_WR1,Writing mode register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x00 16.--18. " RES_WRSWA ,8-Bit | 16-Bit | 32-Bit Swap Setting" "Not swapped,8-bit,16-bit,16-bit + 8-bit,32-bit,32-bit + 8-bit,32-bit + 16-bit,32-bit + 16-bit + 8-bit"
|
|
bitfld.long 0x00 7. " RES_TB_ADD_MOD ,Top and Bottom Data Write Address Specification Method" "0,1"
|
|
else
|
|
bitfld.long 0x00 8. " RES_FLM_MD ,Frame Buffer Address Generation Mode Select [RES_BASE x RES_FLM_OFF x VALUES]" "Frame number,Field information"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 4.--6. " RES_DS_WR_MD ,Frame Buffer Writing Mode for Image Processing" "Normal,Horizontal mirroring,90 rotation,180 rotation,270 rotation,?..."
|
|
newline
|
|
sif cpuis("SH7268")||cpuis("SH7269")
|
|
bitfld.long 0x00 2.--3. " RES_MD ,Frame Buffer Video-Signal Writing Format" "YCbCr422,RGB565,RGB888,?..."
|
|
bitfld.long 0x00 1. " RES_LOOP ,Frame Buffer Write Mode Select" "Frame,Line"
|
|
newline
|
|
bitfld.long 0x00 0. " RES_BST_MD ,Transfer Burst Length for Frame Buffer Writing" "32,128"
|
|
endif
|
|
line.long 0x04 "SCL1_WR2,Write address register 1T"
|
|
line.long 0x08 "SCL1_WR3,Write address register 2T"
|
|
hexmask.long.word 0x08 16.--30. 0x01 " RES_LN_OFF ,Frame Buffer Line Offset Address"
|
|
hexmask.long.word 0x08 0.--9. 1. " RES_FLM_NUM ,Number of Frames of Buffer to be Written"
|
|
line.long 0x0C "SCL1_WR4,Write address register 3T"
|
|
hexmask.long.tbyte 0x0C 0.--22. 1. " RES_FLM_OFF ,Frame Buffer Frame Offset Address"
|
|
group.long (0x0+0x9C)++0x07
|
|
line.long 0x00 "SCL1_WR5,Frame sub-sampling register"
|
|
bitfld.long 0x00 12. " RES_INTER ,Field Operating Mode Select" "Progressive,Interlace"
|
|
bitfld.long 0x00 8.--9. " RES_FS_RATE ,Writing Rate" "1/1,1/2,1/4,1/8"
|
|
newline
|
|
bitfld.long 0x00 4. " RES_FLD_SEL ,Write Field Select" "Top,Bottom"
|
|
bitfld.long 0x00 0. " RES_WENB ,Frame Buffer Write Enable" "Disabled,Enabled"
|
|
line.long 0x04 "SCL1_WR6,Bit reduction register"
|
|
bitfld.long 0x04 4. " RES_DTH_ON ,Dither Correction On/Off" "Off,On"
|
|
bitfld.long 0x04 0. " RES_BITDEC_ON ,Bit Reduction On/Off" "Off,On"
|
|
rgroup.long (0x0+0xA4)++0x03
|
|
line.long 0x00 "SCL1_WR7,Write detection register"
|
|
bitfld.long 0x00 16. " RES_OVERFLOW ,Line Buffer Overflow Detect" "No overflow,Overflow"
|
|
hexmask.long.word 0x00 0.--9. 1. " RES_FLM_CNT ,Frame Number of Frame Being Accessed"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
group.long (0x0+0xA8)++0x0F
|
|
line.long 0x00 "SCL1_WR8,Write address register 1B"
|
|
line.long 0x04 "SCL1_WR9,Write address register 2B"
|
|
hexmask.long.word 0x04 16.--30. 1. " RES_LN_OFF_B ,Frame Buffer Line Offset Address for Bottom"
|
|
hexmask.long.word 0x04 0.--9. 1. " RES_FLM_NUM_B ,Number of Frames of Buffer to be Written to for Bottom Field"
|
|
line.long 0x08 "SCL1_WR10,Write address register 3B"
|
|
hexmask.long.tbyte 0x08 0.--22. 1. " RES_FLM_OFF_B ,Frame Buffer Frame Offset Address for Bottom"
|
|
line.long 0x0C "SCL1_WR11,Write detection register B"
|
|
hexmask.long.word 0x0C 0.--9. 1. " RES_FLM_CNT_B ,Frame Number of Frame Being Accessed in Bottom Field"
|
|
rgroup.long (0x0+0xB8)++0x1B
|
|
line.long 0x00 "SCL1_MON1,Status monitor 1 register"
|
|
bitfld.long 0x00 8.--9. " PBUF_NUM ,Write pointer indicating the pointer buffer number corresponding to the location currently being written to" "0,1,2,3"
|
|
line.long 0x04 "SCL1_PBUF0,Pointer buffer 0 register"
|
|
line.long 0x08 "SCL1_PBUF1,Pointer buffer 1 register"
|
|
line.long 0x0C "SCL1_PBUF2,Pointer buffer 2 register"
|
|
line.long 0x10 "SCL1_PBUF3,Pointer buffer 3 register"
|
|
line.long 0x14 "SCL1_PBUF_FLD,Pointer buffer and field information register"
|
|
bitfld.long 0x14 24. " FLD_INF3 ,Top or bottom field information of the frame buffer pointed to by pointer buffer 3" "Top,Bottom"
|
|
bitfld.long 0x14 16. " FLD_INF2 ,Top or bottom field information of the frame buffer pointed to by pointer buffer 2" "Top,Bottom"
|
|
newline
|
|
bitfld.long 0x14 8. " FLD_INF1 ,Top or bottom field information of the frame buffer pointed to by pointer buffer 1" "Top,Bottom"
|
|
bitfld.long 0x14 0. " FLD_INF0 ,Top or bottom field information of the frame buffer pointed to by pointer buffer 0" "Top,Bottom"
|
|
line.long 0x18 "SCL1_PBUF_CNT,Pointer buffer control register"
|
|
bitfld.long 0x18 16. " PBUF_RST ,Reset Control for Pointer Buffer" "No reset,Reset"
|
|
endif
|
|
group.long (0x800+0x00)++0x1F "SC1"
|
|
line.long 0x00 "SCL0_UPDATE,SCL0 register update control register"
|
|
eventfld.long 0x00 13. " SCL0_VEN_D ,Scaling-Up Control and Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 12. " SCL0_VEN_C ,Scaling-Down Control and Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
newline
|
|
eventfld.long 0x00 8. " SCL0_UPDATE ,SYNC Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 4. " SCL0_VEN_B ,Synchronization Control and Scaling-up Control Register Update" "Not updated,Updated"
|
|
newline
|
|
eventfld.long 0x00 0. " SCL0_VEN_A ,Scaling-Down Control Register Update" "Not updated,Updated"
|
|
line.long 0x04 "SCL0_FRC1,Mask control register"
|
|
hexmask.long.word 0x04 16.--31. 1. " RES_VMASK ,Repeated Vsync Signal Masking Period"
|
|
bitfld.long 0x04 0. " RES_VMASK_ON ,Repeated Vsync Signal Masking Control" "Disabled,Enabled"
|
|
line.long 0x08 "SCL0_FRC2,Missing Vsync compensation control register"
|
|
hexmask.long.word 0x08 16.--31. 1. " RES_VLACK ,Missing-Sync Compensating Pulse Output Wait Time"
|
|
bitfld.long 0x08 0. " RES_VLACK_ON ,Missing Vsync Signal Compensation" "Disabled,Enabled"
|
|
line.long 0x0C "SCL0_FRC3,Output sync select register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x0C 8. " RES_VS_IN_SEL ,Horizontal and Vertical Sync Signal Output and Full-Screen Enable Signal Select" "Scaler0,Scaler1"
|
|
bitfld.long 0x0C 0. " RES_VS_SEL ,Vsync Signal Output Select" "Externally,Internally"
|
|
else
|
|
bitfld.long 0x0C 0. " RES_VS_SEL ,Vsync Signal Output Select" "Externally,Internally"
|
|
endif
|
|
line.long 0x10 "SCL0_FRC4,Free-running period control register"
|
|
hexmask.long.word 0x10 16.--26. 1. " RES_FV ,Free-Running Vsync Period Setting"
|
|
hexmask.long.word 0x10 0.--10. 1. " RES_FH ,Hsync Period Setting"
|
|
line.long 0x14 "SCL0_FRC5,Output delay control register"
|
|
bitfld.long 0x14 8. " RES_FLD_DLY_SEL ,Field Determination Signal Delay Control" "No delay,Delay 1 cycle"
|
|
hexmask.long.byte 0x14 0.--7. 1. " RES_VSDLY ,Vsync Signal Delay Control"
|
|
line.long 0x18 "SCL0_FRC6,Full-screen vertical size register"
|
|
hexmask.long.word 0x18 16.--26. 1. " RES_F_VS ,Vertical Enable Signal Start Position for Full Screen"
|
|
hexmask.long.word 0x18 0.--10. 1. " RES_F_VW ,Vertical Enable Signal Width for Full Screen (lines)"
|
|
line.long 0x1C "SCL0_FRC7,Full-screen horizontal size register"
|
|
hexmask.long.word 0x1C 16.--26. 1. " RES_F_HS ,Horizontal Enable Signal Start Position for Full Screen"
|
|
hexmask.long.word 0x1C 0.--10. 1. " RES_F_HW ,Horizontal Enable Signal Width for Full Screen"
|
|
sif cpuis("SH7268")||cpuis("SH7269")
|
|
group.long (0x800+0x20)++0x03
|
|
line.long 0x00 "SCL0_FRC8,Field Determination Signal Switching Register"
|
|
bitfld.long 0x00 10. " RES_US_FLD ,Field determination signal switching" "Synch. block,Frame number"
|
|
endif
|
|
rgroup.long (0x800+0x24)++0x03
|
|
line.long 0x00 "SCL0_FRC9,Vsync detection register"
|
|
bitfld.long 0x00 4. " RES_QVLOCK ,Locked Vsync Signal Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " RES_QVLACK ,Missing Vsync Signal Detection Flag" "Not detected,Detected"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
rgroup.word (0x800+0x28)++0x03
|
|
line.word 0x00 "SCL0_MON0,Status monitor 0 register"
|
|
hexmask.word 0x00 0.--10. 1. " RES_LIN_STAT ,Current location of the image line input to the scaling-down control block"
|
|
line.word 0x02 "SCL0_INT,Interrupt control register"
|
|
hexmask.word 0x02 0.--10. 1. " RES_LINE ,Setting of Interrupt on Image Line Input to Scaling-down Control Block"
|
|
endif
|
|
group.long (0x800+0x2C)++0x3B
|
|
line.long 0x00 "SCL0_DS1,Scaling-down control register"
|
|
bitfld.long 0x00 4. " RES_DS_V_ON ,Vertical Scale Down On/Off" "Off,On"
|
|
bitfld.long 0x00 0. " RES_DS_H_ON ,Horizontal Scale Down On/Off" "Off,On"
|
|
line.long 0x04 "SCL0_DS2,Vertical capture size register"
|
|
hexmask.long.word 0x04 16.--26. 1. " RES_VS ,Vertical Position Setting for Video Signal Capturing"
|
|
hexmask.long.word 0x04 0.--10. 1. " RES_VW ,Vertical Width of Video Signal to be Captured"
|
|
line.long 0x08 "SCL0_DS3,Horizontal capture size register"
|
|
hexmask.long.word 0x08 16.--26. 1. " RES_HS ,Horizontal Position Setting for Video Signal Capturing"
|
|
hexmask.long.word 0x08 0.--10. 1. " RES_HW ,Horizontal Width of Video Signal to be Captured"
|
|
line.long 0x0C "SCL0_DS4,Horizontal scale down register"
|
|
bitfld.long 0x0C 29. " RES_PFIL_SEL ,Prefilter Mode Select for Brightness Signals - Off/On(1/4 + 1/2 + 1/4)" "Off,On"
|
|
bitfld.long 0x0C 28. " RES_DS_H_INTERPOTYP ,Horizontal Interpolation Mode Select" "Hold,Linear"
|
|
newline
|
|
hexmask.long.word 0x0C 0.--15. 1. " RES_DS_H_RATIO ,Horizontal Scale Down Ratio"
|
|
line.long 0x10 "SCL0_DS5,Initial vertical phase register"
|
|
bitfld.long 0x10 28. " RES_V_INTERPOTYP ,Vertical Interpolation Mode Select" "Hold,Linear"
|
|
hexmask.long.word 0x10 16.--27. 1. " RES_TOP_INIPHASE ,Vertical Interpolation Start Phase for Top Field 0 to 4095"
|
|
newline
|
|
hexmask.long.word 0x10 0.--11. 1. " RES_BTM_INIPHASE ,Vertical Interpolation Start Phase for Bottom Field 0 to 4095"
|
|
line.long 0x14 "SCL0_DS6,Initial vertical phase register"
|
|
hexmask.long.word 0x14 0.--15. 1. " RES_V_RATIO ,Vertical Scale Up/Down Ratio"
|
|
line.long 0x18 "SCL0_DS7,Scaling-down control block output size register"
|
|
hexmask.long.word 0x18 16.--26. 1. " RES_OUT_VW ,Number of Valid Lines in Vertical Direction Output by Scaling-down Control Block"
|
|
hexmask.long.word 0x18 0.--10. 1. " RES_OUT_HW ,Number of Valid Horizontal Pixels Output by Scaling-Down Control Block"
|
|
line.long 0x1C "SCL0_US1,Scaling-down control block output size register"
|
|
bitfld.long 0x1C 4. " RES_US_V_ON ,Vertical Scale Up On/Off" "Off,On"
|
|
bitfld.long 0x1C 0. " RES_US_H_ON ,Horizontal Scale Up On/Off" "Off,On"
|
|
line.long 0x20 "SCL0_US2,Output image vertical size register"
|
|
hexmask.long.word 0x20 16.--26. 1. " RES_P_VS ,Vertical Enable Signal Start Position for Output Image"
|
|
hexmask.long.word 0x20 0.--10. 1. " RES_P_VW ,Vertical Enable Signal Width for Output Image (lines)"
|
|
line.long 0x24 "SCL0_US3,Output image vertical size register"
|
|
hexmask.long.word 0x24 16.--26. 1. " RES_P_HS ,Horizontal Enable Signal Start Position for Output Image"
|
|
hexmask.long.word 0x24 0.--10. 1. " RES_P_HW ,Horizontal Enable Signal Width for Output Image"
|
|
line.long 0x28 "SCL0_US4,Scaling-Up Control Block Input Size Register"
|
|
hexmask.long.word 0x28 16.--26. 1. " RES_IN_VW ,Number of Valid Lines in Vertical Direction Input to Scaling-down Control Block"
|
|
hexmask.long.word 0x28 0.--10. 1. " RES_IN_HW ,Number of Valid Horizontal Pixels Input to Scaling-down Control Block"
|
|
line.long 0x2C "SCL0_US5,Scaling-up control block input size register"
|
|
hexmask.long.word 0x2C 0.--15. 1. " RES_US_H_RATIO ,Horizontal Scale Up Ratio"
|
|
line.long 0x30 "SCL0_US6,Horizontal Scale Up Initial Phase Register"
|
|
bitfld.long 0x30 28. " RES_US_H_INTERPOTYP ,Horizontal Interpolation Mode Select" "Hold,Linear"
|
|
hexmask.long.word 0x30 16.--27. 1. " RES_US_HT_INIPHASE ,Horizontal Interpolation Start Phase for Top Field 0 to 4095"
|
|
newline
|
|
hexmask.long.word 0x30 0.--11. 1. " RES_US_HB_INIPHASE ,Horizontal Interpolation Start Phase for Bottom Field 0 to 4095"
|
|
line.long 0x34 "SCL0_US7,Trimming Register"
|
|
hexmask.long.byte 0x34 8.--15. 1. " RES_HCUT ,Horizontal Amount of Cut-off Post-Scaling Image (Right and Left Parts)"
|
|
hexmask.long.byte 0x34 0.--7. 1. " RES_VCUT ,Vertical Amount of Cut-off Post-Scaling Image (Upper and Lower Parts)"
|
|
line.long 0x38 "SCL0_US8,Frame Buffer Read Select Register"
|
|
bitfld.long 0x38 4. " RES_IBUS_SYNC_SEL ,Sync Signal Select for Frame Buffer Read Block" "Scaling-up control block,Graphics processing block"
|
|
bitfld.long 0x38 0. " RES_DISP_ON ,Post-Scaling Image Frame Display On/Off" "On,Off"
|
|
group.long (0x800+0x6C)++0x3
|
|
line.long 0x00 "SCL0_OVR1,Background color register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RES_BK_CLO_R ,Background Color Setting R/Cr Signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RES_BK_COL_G ,Background Color Setting G/Y Signal"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " RES_BK_COL_B ,Background Color Setting B/Cb Signal"
|
|
group.long (0x800+0x80)++0x03
|
|
line.long 0x00 "SCL1_UPDATE,SCL1 register update control register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
eventfld.long 0x00 20. " SCL1_UPDATE_B ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 16. " SCL1_UPDATE_A ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
newline
|
|
endif
|
|
eventfld.long 0x00 4. " SCL1_VEN_B ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 0. " SCL1_VEN_A ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
group.long (0x800+0x88)++0x0F
|
|
line.long 0x00 "SCL1_WR1,Writing mode register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x00 16.--18. " RES_WRSWA ,8-Bit | 16-Bit | 32-Bit Swap Setting" "Not swapped,8-bit,16-bit,16-bit + 8-bit,32-bit,32-bit + 8-bit,32-bit + 16-bit,32-bit + 16-bit + 8-bit"
|
|
bitfld.long 0x00 7. " RES_TB_ADD_MOD ,Top and Bottom Data Write Address Specification Method" "0,1"
|
|
else
|
|
bitfld.long 0x00 8. " RES_FLM_MD ,Frame Buffer Address Generation Mode Select [RES_BASE x RES_FLM_OFF x VALUES]" "Frame number,Field information"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 4.--6. " RES_DS_WR_MD ,Frame Buffer Writing Mode for Image Processing" "Normal,Horizontal mirroring,90 rotation,180 rotation,270 rotation,?..."
|
|
newline
|
|
sif cpuis("SH7268")||cpuis("SH7269")
|
|
bitfld.long 0x00 2.--3. " RES_MD ,Frame Buffer Video-Signal Writing Format" "YCbCr422,RGB565,RGB888,?..."
|
|
bitfld.long 0x00 1. " RES_LOOP ,Frame Buffer Write Mode Select" "Frame,Line"
|
|
newline
|
|
bitfld.long 0x00 0. " RES_BST_MD ,Transfer Burst Length for Frame Buffer Writing" "32,128"
|
|
endif
|
|
line.long 0x04 "SCL1_WR2,Write address register 1T"
|
|
line.long 0x08 "SCL1_WR3,Write address register 2T"
|
|
hexmask.long.word 0x08 16.--30. 0x01 " RES_LN_OFF ,Frame Buffer Line Offset Address"
|
|
hexmask.long.word 0x08 0.--9. 1. " RES_FLM_NUM ,Number of Frames of Buffer to be Written"
|
|
line.long 0x0C "SCL1_WR4,Write address register 3T"
|
|
hexmask.long.tbyte 0x0C 0.--22. 1. " RES_FLM_OFF ,Frame Buffer Frame Offset Address"
|
|
group.long (0x800+0x9C)++0x07
|
|
line.long 0x00 "SCL1_WR5,Frame sub-sampling register"
|
|
bitfld.long 0x00 12. " RES_INTER ,Field Operating Mode Select" "Progressive,Interlace"
|
|
bitfld.long 0x00 8.--9. " RES_FS_RATE ,Writing Rate" "1/1,1/2,1/4,1/8"
|
|
newline
|
|
bitfld.long 0x00 4. " RES_FLD_SEL ,Write Field Select" "Top,Bottom"
|
|
bitfld.long 0x00 0. " RES_WENB ,Frame Buffer Write Enable" "Disabled,Enabled"
|
|
line.long 0x04 "SCL1_WR6,Bit reduction register"
|
|
bitfld.long 0x04 4. " RES_DTH_ON ,Dither Correction On/Off" "Off,On"
|
|
bitfld.long 0x04 0. " RES_BITDEC_ON ,Bit Reduction On/Off" "Off,On"
|
|
rgroup.long (0x800+0xA4)++0x03
|
|
line.long 0x00 "SCL1_WR7,Write detection register"
|
|
bitfld.long 0x00 16. " RES_OVERFLOW ,Line Buffer Overflow Detect" "No overflow,Overflow"
|
|
hexmask.long.word 0x00 0.--9. 1. " RES_FLM_CNT ,Frame Number of Frame Being Accessed"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
group.long (0x800+0xA8)++0x0F
|
|
line.long 0x00 "SCL1_WR8,Write address register 1B"
|
|
line.long 0x04 "SCL1_WR9,Write address register 2B"
|
|
hexmask.long.word 0x04 16.--30. 1. " RES_LN_OFF_B ,Frame Buffer Line Offset Address for Bottom"
|
|
hexmask.long.word 0x04 0.--9. 1. " RES_FLM_NUM_B ,Number of Frames of Buffer to be Written to for Bottom Field"
|
|
line.long 0x08 "SCL1_WR10,Write address register 3B"
|
|
hexmask.long.tbyte 0x08 0.--22. 1. " RES_FLM_OFF_B ,Frame Buffer Frame Offset Address for Bottom"
|
|
line.long 0x0C "SCL1_WR11,Write detection register B"
|
|
hexmask.long.word 0x0C 0.--9. 1. " RES_FLM_CNT_B ,Frame Number of Frame Being Accessed in Bottom Field"
|
|
rgroup.long (0x800+0xB8)++0x1B
|
|
line.long 0x00 "SCL1_MON1,Status monitor 1 register"
|
|
bitfld.long 0x00 8.--9. " PBUF_NUM ,Write pointer indicating the pointer buffer number corresponding to the location currently being written to" "0,1,2,3"
|
|
line.long 0x04 "SCL1_PBUF0,Pointer buffer 0 register"
|
|
line.long 0x08 "SCL1_PBUF1,Pointer buffer 1 register"
|
|
line.long 0x0C "SCL1_PBUF2,Pointer buffer 2 register"
|
|
line.long 0x10 "SCL1_PBUF3,Pointer buffer 3 register"
|
|
line.long 0x14 "SCL1_PBUF_FLD,Pointer buffer and field information register"
|
|
bitfld.long 0x14 24. " FLD_INF3 ,Top or bottom field information of the frame buffer pointed to by pointer buffer 3" "Top,Bottom"
|
|
bitfld.long 0x14 16. " FLD_INF2 ,Top or bottom field information of the frame buffer pointed to by pointer buffer 2" "Top,Bottom"
|
|
newline
|
|
bitfld.long 0x14 8. " FLD_INF1 ,Top or bottom field information of the frame buffer pointed to by pointer buffer 1" "Top,Bottom"
|
|
bitfld.long 0x14 0. " FLD_INF0 ,Top or bottom field information of the frame buffer pointed to by pointer buffer 0" "Top,Bottom"
|
|
line.long 0x18 "SCL1_PBUF_CNT,Pointer buffer control register"
|
|
bitfld.long 0x18 16. " PBUF_RST ,Reset Control for Pointer Buffer" "No reset,Reset"
|
|
endif
|
|
group.long (0x0+0x100)++0x1F "GR0"
|
|
line.long 0x00 "UPDATE,Graphics 0 register update control register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
eventfld.long 0x00 8. " UPDATE ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 4. " P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
else
|
|
eventfld.long 0x00 4. " P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
endif
|
|
newline
|
|
eventfld.long 0x00 0. " IBUS_VEN ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
line.long 0x04 "FLM_RD,Frame buffer read control register"
|
|
bitfld.long 0x04 0. " R_ENB ,Frame Buffer Read Enable" "Disabled,Enabled"
|
|
line.long 0x08 "FLM1,Frame buffer control register 1"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x08 31. " FLD_SEL ,Enables or disables top or bottom field selection for the next frame buffer to be read" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " LN_OFF_DIR ,Selects the line offset address direction of the frame buffer" "Inc,Dec"
|
|
newline
|
|
bitfld.long 0x08 8.--9. " FLM_SEL ,Selects a frame buffer address setting signal" "Links scaling-down process,Selects FLM_NUM,Links distortion correction,Links pointer buffer"
|
|
else
|
|
bitfld.long 0x08 16. " LN_OFF_DIR ,Selects the line offset address direction of the frame buffer" "Inc,Dec"
|
|
newline
|
|
bitfld.long 0x08 8.--9. " FLM_SEL ,Selects a frame buffer address setting signal" "Links scaling-down process,Selects FLM_NUM,Links distortion correction,?..."
|
|
endif
|
|
newline
|
|
bitfld.long 0x08 4. " IMR_FLM_INV ,Sets the frame buffer number for distortion correction." "Not replaced,Replaced"
|
|
bitfld.long 0x08 0. " BST_MD ,Frame Buffer Burst Transfer Mode" "32-byte,128- byte"
|
|
line.long 0x0C "FLM2,Frame buffer control register 2"
|
|
line.long 0x10 "FLM3,Frame buffer control register 3"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x10 31. " FLD_NXT ,Top or Bottom Field Selection for Next Frame Buffer" "Top,Bottom"
|
|
hexmask.long.word 0x10 16.--30. 0x01 " LN_OFF ,Frame Buffer Line Offset Address"
|
|
else
|
|
hexmask.long.word 0x10 16.--30. 0x01 " LN_OFF ,Frame Buffer Line Offset Address"
|
|
endif
|
|
newline
|
|
hexmask.long.word 0x10 0.--9. 1. " FLM_NUM ,Frame Number of Frame Buffer"
|
|
line.long 0x14 "FLM4,Frame buffer control register 4"
|
|
hexmask.long.tbyte 0x14 0.--22. 0x01 " FLM_OFF ,Frame Buffer Frame Offset Address"
|
|
line.long 0x18 "FLM5,Frame buffer control register 5"
|
|
hexmask.long.word 0x18 16.--26. 1. " FLM_LNUM ,Sets number of lines in a frame"
|
|
hexmask.long.word 0x18 0.--10. 0x01 " FLM_LOOP ,Number of lines when reading the addresses repeatedly by returning to the start address after reaching the end address"
|
|
line.long 0x1C "FLM6,Frame buffer control register 6"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x1C 28.--31. " FORMAT ,Sets the format of the frame buffer read signal" "RGB565,RGB888,AlphaRGB1555,AlphaRGB4444,AlphaRGB8888,CLUT8,CLUT4,CLUT1,YCbCr422,YCbCr444,RGBalpha5551,RGBalpha8888,?..."
|
|
else
|
|
bitfld.long 0x1C 28.--31. " FORMAT ,Sets the format of the frame buffer read signal" "RGB565,RGB888,AlphaRGB1555,AlphaRGB4444,AlphaRGB8888,CLUT8,CLUT4,CLUT1,YCbCr422,?..."
|
|
endif
|
|
hexmask.long.word 0x1C 16.--26. 1. " HW ,Sets the width of the horizontal valid period"
|
|
newline
|
|
bitfld.long 0x1C 13.--15. " YCC_SWAP ,Controls swapping of data read from buffer in the YCbCr422 format" "Cb/Y0/Cr/Y1,Y0/Cb/Y1/C,Cr/Y0/Cb/Y1,Y0/Cr/Y1/Cb,Y1/Cr/Y0/Cb,Cr/Y1/Cb/Y0,Y1/Cb/Y0/Cr,Cb/Y1/Cr/Y0"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x1C 12. " RDSWA2 ,32-Bit Swap Setting" "Not swapped,Swapped"
|
|
newline
|
|
bitfld.long 0x1C 11. " RDSWA1 ,16-Bit Swap Setting" "Not swapped,Swapped"
|
|
bitfld.long 0x1C 10. " RDSWA0 ,8-Bit Swap Setting" "Not swapped,Swapped"
|
|
else
|
|
bitfld.long 0x1C 12. " ENDIAN_ON ,Turns on/off the endian control of data read from buffer" "Off,On"
|
|
endif
|
|
newline
|
|
bitfld.long 0x1C 8. " CNV444_MD ,Sets the interpolation mode for YCC422 to YCbCr444 conversion" "Hold,Average"
|
|
bitfld.long 0x1C 0.--5. " STA_POS ,Sets the amount of data to be skipped through" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long (0x0+0x120)++0x0B
|
|
line.long 0x00 "AB1,Alpha blending control register 1"
|
|
bitfld.long 0x00 4. " GRC_DISP_ON ,Turns on/off frame-line display of the graphics image area" "Off,On"
|
|
bitfld.long 0x00 0.--1. " DISP_SEL ,Selects the graphics display mode" "Background color,Lower-layer graphics,Current graphics,Blended lower-layer graphics and current graphics"
|
|
line.long 0x04 "AB2,Alpha blending control register 2"
|
|
hexmask.long.word 0x04 16.--26. 1. " GRC_VS ,Vertical Start Position of Graphics Image Area"
|
|
hexmask.long.word 0x04 0.--10. 1. " GRC_VW ,Vertical Width of Graphics Image Area"
|
|
line.long 0x08 "AB3,Alpha blending control register 3"
|
|
hexmask.long.word 0x08 16.--26. 1. " GRC_HS ,Horizontal Start Position of Graphics Image Area"
|
|
hexmask.long.word 0x08 0.--10. 1. " GRC_HW ,Horizontal Width of Graphics Image Area"
|
|
group.long (0x0+0x138)++0x1B
|
|
line.long 0x0 "AB7,Alpha blending control register 7"
|
|
bitfld.long 0x0 0. " CK_ON ,CLUT-Index/RGB-Index Chroma-Key Processing On/Off" "Off,On"
|
|
line.long 0x04 "AB8,Alpha blending control register 8"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CK_KCLUT ,CLUT Signal for CLUT-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CK_KG ,G Signal for RGB-Index Chroma-Key Processing"
|
|
newline
|
|
hexmask.long.byte 0x04 8.--15. 1. " CK_KB ,B Signal for RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x04 0.--7. 1. " CK_KR ,R Signal for RGB-Index Chroma-Key Processing"
|
|
line.long 0x08 "AB9,Alpha blending control register 9"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
hexmask.long.byte 0x08 24.--31. 1. " A ,Replaced Alpha Signal after RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x08 16.--23. 1. " G ,Replaced G Signal after RGB-Index Chroma-Key Processing"
|
|
newline
|
|
hexmask.long.byte 0x08 8.--15. 1. " B ,Replaced B Signal after RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x08 0.--7. 1. " R ,Replaced R Signal after RGB-Index Chroma-Key Processing"
|
|
else
|
|
hexmask.long.byte 0x08 24.--31. 1. " A0 ,CLUT1 alpah0 Signal"
|
|
hexmask.long.byte 0x08 16.--23. 1. " G0 ,CLUT1 G0 Signal"
|
|
newline
|
|
hexmask.long.byte 0x08 8.--15. 1. " B0 ,CLUT1 B0 Signal"
|
|
hexmask.long.byte 0x08 0.--7. 1. " R0 ,CLUT1 R0 Signal"
|
|
endif
|
|
line.long 0x0C "AB10,Alpha blending control register 10"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " A0 ,CLUT1 alpha0 Signal"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " G0 ,CLUT1 G0 Signal"
|
|
newline
|
|
hexmask.long.byte 0x0C 8.--15. 1. " B0 ,CLUT1 B0 Signal"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " R0 ,CLUT1 R0 Signal"
|
|
line.long 0x10 "AB11,Alpha blending control register 11"
|
|
hexmask.long.byte 0x10 24.--31. 1. " A1 ,CLUT1 alpha1 Signal"
|
|
hexmask.long.byte 0x10 16.--23. 1. " G1 ,CLUT1 G1 Signal"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--15. 1. " B1 ,CLUT1 B1 Signal"
|
|
hexmask.long.byte 0x10 0.--7. 1. " R1 ,CLUT1 R1 Signal"
|
|
line.long 0x14 "BASE,Background color control register"
|
|
hexmask.long.byte 0x14 16.--23. 1. " BASE_G ,Background Color G/Y Signal"
|
|
hexmask.long.byte 0x14 8.--15. 1. " BASE_B ,Background Color B/Cb Signal"
|
|
newline
|
|
hexmask.long.byte 0x14 0.--7. 1. " BASE_R ,Background Color R/Cr Signal"
|
|
line.long 0x18 "CLUT,CLUT table control register"
|
|
bitfld.long 0x18 16. " CLT_SEL ,CLUT Table Select Signal" "Table 0,Table 1"
|
|
group.long (0x800+0x100)++0x1F "GR1"
|
|
line.long 0x00 "UPDATE,Graphics 0 register update control register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
eventfld.long 0x00 8. " UPDATE ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 4. " P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
else
|
|
eventfld.long 0x00 4. " P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
endif
|
|
newline
|
|
eventfld.long 0x00 0. " IBUS_VEN ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
line.long 0x04 "FLM_RD,Frame buffer read control register"
|
|
bitfld.long 0x04 0. " R_ENB ,Frame Buffer Read Enable" "Disabled,Enabled"
|
|
line.long 0x08 "FLM1,Frame buffer control register 1"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x08 31. " FLD_SEL ,Enables or disables top or bottom field selection for the next frame buffer to be read" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " LN_OFF_DIR ,Selects the line offset address direction of the frame buffer" "Inc,Dec"
|
|
newline
|
|
bitfld.long 0x08 8.--9. " FLM_SEL ,Selects a frame buffer address setting signal" "Links scaling-down process,Selects FLM_NUM,Links distortion correction,Links pointer buffer"
|
|
else
|
|
bitfld.long 0x08 16. " LN_OFF_DIR ,Selects the line offset address direction of the frame buffer" "Inc,Dec"
|
|
newline
|
|
bitfld.long 0x08 8.--9. " FLM_SEL ,Selects a frame buffer address setting signal" "Links scaling-down process,Selects FLM_NUM,Links distortion correction,?..."
|
|
endif
|
|
newline
|
|
bitfld.long 0x08 4. " IMR_FLM_INV ,Sets the frame buffer number for distortion correction." "Not replaced,Replaced"
|
|
bitfld.long 0x08 0. " BST_MD ,Frame Buffer Burst Transfer Mode" "32-byte,128- byte"
|
|
line.long 0x0C "FLM2,Frame buffer control register 2"
|
|
line.long 0x10 "FLM3,Frame buffer control register 3"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x10 31. " FLD_NXT ,Top or Bottom Field Selection for Next Frame Buffer" "Top,Bottom"
|
|
hexmask.long.word 0x10 16.--30. 0x01 " LN_OFF ,Frame Buffer Line Offset Address"
|
|
else
|
|
hexmask.long.word 0x10 16.--30. 0x01 " LN_OFF ,Frame Buffer Line Offset Address"
|
|
endif
|
|
newline
|
|
hexmask.long.word 0x10 0.--9. 1. " FLM_NUM ,Frame Number of Frame Buffer"
|
|
line.long 0x14 "FLM4,Frame buffer control register 4"
|
|
hexmask.long.tbyte 0x14 0.--22. 0x01 " FLM_OFF ,Frame Buffer Frame Offset Address"
|
|
line.long 0x18 "FLM5,Frame buffer control register 5"
|
|
hexmask.long.word 0x18 16.--26. 1. " FLM_LNUM ,Sets number of lines in a frame"
|
|
hexmask.long.word 0x18 0.--10. 0x01 " FLM_LOOP ,Number of lines when reading the addresses repeatedly by returning to the start address after reaching the end address"
|
|
line.long 0x1C "FLM6,Frame buffer control register 6"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x1C 28.--31. " FORMAT ,Sets the format of the frame buffer read signal" "RGB565,RGB888,AlphaRGB1555,AlphaRGB4444,AlphaRGB8888,CLUT8,CLUT4,CLUT1,YCbCr422,YCbCr444,RGBalpha5551,RGBalpha8888,?..."
|
|
else
|
|
bitfld.long 0x1C 28.--31. " FORMAT ,Sets the format of the frame buffer read signal" "RGB565,RGB888,AlphaRGB1555,AlphaRGB4444,AlphaRGB8888,CLUT8,CLUT4,CLUT1,YCbCr422,?..."
|
|
endif
|
|
hexmask.long.word 0x1C 16.--26. 1. " HW ,Sets the width of the horizontal valid period"
|
|
newline
|
|
bitfld.long 0x1C 13.--15. " YCC_SWAP ,Controls swapping of data read from buffer in the YCbCr422 format" "Cb/Y0/Cr/Y1,Y0/Cb/Y1/C,Cr/Y0/Cb/Y1,Y0/Cr/Y1/Cb,Y1/Cr/Y0/Cb,Cr/Y1/Cb/Y0,Y1/Cb/Y0/Cr,Cb/Y1/Cr/Y0"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x1C 12. " RDSWA2 ,32-Bit Swap Setting" "Not swapped,Swapped"
|
|
newline
|
|
bitfld.long 0x1C 11. " RDSWA1 ,16-Bit Swap Setting" "Not swapped,Swapped"
|
|
bitfld.long 0x1C 10. " RDSWA0 ,8-Bit Swap Setting" "Not swapped,Swapped"
|
|
else
|
|
bitfld.long 0x1C 12. " ENDIAN_ON ,Turns on/off the endian control of data read from buffer" "Off,On"
|
|
endif
|
|
newline
|
|
bitfld.long 0x1C 8. " CNV444_MD ,Sets the interpolation mode for YCC422 to YCbCr444 conversion" "Hold,Average"
|
|
bitfld.long 0x1C 0.--5. " STA_POS ,Sets the amount of data to be skipped through" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long (0x800+0x120)++0x0B
|
|
line.long 0x00 "AB1,Alpha blending control register 1"
|
|
bitfld.long 0x00 4. " GRC_DISP_ON ,Turns on/off frame-line display of the graphics image area" "Off,On"
|
|
bitfld.long 0x00 0.--1. " DISP_SEL ,Selects the graphics display mode" "Background color,Lower-layer graphics,Current graphics,Blended lower-layer graphics and current graphics"
|
|
line.long 0x04 "AB2,Alpha blending control register 2"
|
|
hexmask.long.word 0x04 16.--26. 1. " GRC_VS ,Vertical Start Position of Graphics Image Area"
|
|
hexmask.long.word 0x04 0.--10. 1. " GRC_VW ,Vertical Width of Graphics Image Area"
|
|
line.long 0x08 "AB3,Alpha blending control register 3"
|
|
hexmask.long.word 0x08 16.--26. 1. " GRC_HS ,Horizontal Start Position of Graphics Image Area"
|
|
hexmask.long.word 0x08 0.--10. 1. " GRC_HW ,Horizontal Width of Graphics Image Area"
|
|
group.long (0x800+0x138)++0x1B
|
|
line.long 0x0 "AB7,Alpha blending control register 7"
|
|
bitfld.long 0x0 0. " CK_ON ,CLUT-Index/RGB-Index Chroma-Key Processing On/Off" "Off,On"
|
|
line.long 0x04 "AB8,Alpha blending control register 8"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CK_KCLUT ,CLUT Signal for CLUT-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CK_KG ,G Signal for RGB-Index Chroma-Key Processing"
|
|
newline
|
|
hexmask.long.byte 0x04 8.--15. 1. " CK_KB ,B Signal for RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x04 0.--7. 1. " CK_KR ,R Signal for RGB-Index Chroma-Key Processing"
|
|
line.long 0x08 "AB9,Alpha blending control register 9"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
hexmask.long.byte 0x08 24.--31. 1. " A ,Replaced Alpha Signal after RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x08 16.--23. 1. " G ,Replaced G Signal after RGB-Index Chroma-Key Processing"
|
|
newline
|
|
hexmask.long.byte 0x08 8.--15. 1. " B ,Replaced B Signal after RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x08 0.--7. 1. " R ,Replaced R Signal after RGB-Index Chroma-Key Processing"
|
|
else
|
|
hexmask.long.byte 0x08 24.--31. 1. " A0 ,CLUT1 alpah0 Signal"
|
|
hexmask.long.byte 0x08 16.--23. 1. " G0 ,CLUT1 G0 Signal"
|
|
newline
|
|
hexmask.long.byte 0x08 8.--15. 1. " B0 ,CLUT1 B0 Signal"
|
|
hexmask.long.byte 0x08 0.--7. 1. " R0 ,CLUT1 R0 Signal"
|
|
endif
|
|
line.long 0x0C "AB10,Alpha blending control register 10"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " A0 ,CLUT1 alpha0 Signal"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " G0 ,CLUT1 G0 Signal"
|
|
newline
|
|
hexmask.long.byte 0x0C 8.--15. 1. " B0 ,CLUT1 B0 Signal"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " R0 ,CLUT1 R0 Signal"
|
|
line.long 0x10 "AB11,Alpha blending control register 11"
|
|
hexmask.long.byte 0x10 24.--31. 1. " A1 ,CLUT1 alpha1 Signal"
|
|
hexmask.long.byte 0x10 16.--23. 1. " G1 ,CLUT1 G1 Signal"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--15. 1. " B1 ,CLUT1 B1 Signal"
|
|
hexmask.long.byte 0x10 0.--7. 1. " R1 ,CLUT1 R1 Signal"
|
|
line.long 0x14 "BASE,Background color control register"
|
|
hexmask.long.byte 0x14 16.--23. 1. " BASE_G ,Background Color G/Y Signal"
|
|
hexmask.long.byte 0x14 8.--15. 1. " BASE_B ,Background Color B/Cb Signal"
|
|
newline
|
|
hexmask.long.byte 0x14 0.--7. 1. " BASE_R ,Background Color R/Cr Signal"
|
|
line.long 0x18 "CLUT,CLUT table control register"
|
|
bitfld.long 0x18 16. " CLT_SEL ,CLUT Table Select Signal" "Table 0,Table 1"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
rgroup.long 0x154++0x03
|
|
line.long 0x00 "MON,Status Monitor Register (Graphics 1)"
|
|
bitfld.long 0x00 0. " ARC_ST ,Status Flag for Alpha Blending in Rectangular Area" "Completed,In progress"
|
|
endif
|
|
width 0x00B
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0xFCFF9500
|
|
width 15.
|
|
group.long (0x0+0x00)++0x1F "SC0"
|
|
line.long 0x00 "SCL0_UPDATE,SCL0 register update control register"
|
|
eventfld.long 0x00 13. " SCL0_VEN_D ,Scaling-Up Control and Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 12. " SCL0_VEN_C ,Scaling-Down Control and Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
newline
|
|
eventfld.long 0x00 8. " SCL0_UPDATE ,SYNC Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 4. " SCL0_VEN_B ,Synchronization Control and Scaling-up Control Register Update" "Not updated,Updated"
|
|
newline
|
|
eventfld.long 0x00 0. " SCL0_VEN_A ,Scaling-Down Control Register Update" "Not updated,Updated"
|
|
line.long 0x04 "SCL0_FRC1,Mask control register"
|
|
hexmask.long.word 0x04 16.--31. 1. " RES_VMASK ,Repeated Vsync Signal Masking Period"
|
|
bitfld.long 0x04 0. " RES_VMASK_ON ,Repeated Vsync Signal Masking Control" "Disabled,Enabled"
|
|
line.long 0x08 "SCL0_FRC2,Missing Vsync compensation control register"
|
|
hexmask.long.word 0x08 16.--31. 1. " RES_VLACK ,Missing-Sync Compensating Pulse Output Wait Time"
|
|
bitfld.long 0x08 0. " RES_VLACK_ON ,Missing Vsync Signal Compensation" "Disabled,Enabled"
|
|
line.long 0x0C "SCL0_FRC3,Output sync select register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x0C 8. " RES_VS_IN_SEL ,Horizontal and Vertical Sync Signal Output and Full-Screen Enable Signal Select" "Scaler0,Scaler1"
|
|
bitfld.long 0x0C 0. " RES_VS_SEL ,Vsync Signal Output Select" "Externally,Internally"
|
|
else
|
|
bitfld.long 0x0C 0. " RES_VS_SEL ,Vsync Signal Output Select" "Externally,Internally"
|
|
endif
|
|
line.long 0x10 "SCL0_FRC4,Free-running period control register"
|
|
hexmask.long.word 0x10 16.--26. 1. " RES_FV ,Free-Running Vsync Period Setting"
|
|
hexmask.long.word 0x10 0.--10. 1. " RES_FH ,Hsync Period Setting"
|
|
line.long 0x14 "SCL0_FRC5,Output delay control register"
|
|
bitfld.long 0x14 8. " RES_FLD_DLY_SEL ,Field Determination Signal Delay Control" "No delay,Delay 1 cycle"
|
|
hexmask.long.byte 0x14 0.--7. 1. " RES_VSDLY ,Vsync Signal Delay Control"
|
|
line.long 0x18 "SCL0_FRC6,Full-screen vertical size register"
|
|
hexmask.long.word 0x18 16.--26. 1. " RES_F_VS ,Vertical Enable Signal Start Position for Full Screen"
|
|
hexmask.long.word 0x18 0.--10. 1. " RES_F_VW ,Vertical Enable Signal Width for Full Screen (lines)"
|
|
line.long 0x1C "SCL0_FRC7,Full-screen horizontal size register"
|
|
hexmask.long.word 0x1C 16.--26. 1. " RES_F_HS ,Horizontal Enable Signal Start Position for Full Screen"
|
|
hexmask.long.word 0x1C 0.--10. 1. " RES_F_HW ,Horizontal Enable Signal Width for Full Screen"
|
|
sif cpuis("SH7268")||cpuis("SH7269")
|
|
group.long (0x0+0x20)++0x03
|
|
line.long 0x00 "SCL0_FRC8,Field Determination Signal Switching Register"
|
|
bitfld.long 0x00 10. " RES_US_FLD ,Field determination signal switching" "Synch. block,Frame number"
|
|
endif
|
|
rgroup.long (0x0+0x24)++0x03
|
|
line.long 0x00 "SCL0_FRC9,Vsync detection register"
|
|
bitfld.long 0x00 4. " RES_QVLOCK ,Locked Vsync Signal Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " RES_QVLACK ,Missing Vsync Signal Detection Flag" "Not detected,Detected"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
rgroup.word (0x0+0x28)++0x03
|
|
line.word 0x00 "SCL0_MON0,Status monitor 0 register"
|
|
hexmask.word 0x00 0.--10. 1. " RES_LIN_STAT ,Current location of the image line input to the scaling-down control block"
|
|
line.word 0x02 "SCL0_INT,Interrupt control register"
|
|
hexmask.word 0x02 0.--10. 1. " RES_LINE ,Setting of Interrupt on Image Line Input to Scaling-down Control Block"
|
|
endif
|
|
group.long (0x0+0x2C)++0x3B
|
|
line.long 0x00 "SCL0_DS1,Scaling-down control register"
|
|
bitfld.long 0x00 4. " RES_DS_V_ON ,Vertical Scale Down On/Off" "Off,On"
|
|
bitfld.long 0x00 0. " RES_DS_H_ON ,Horizontal Scale Down On/Off" "Off,On"
|
|
line.long 0x04 "SCL0_DS2,Vertical capture size register"
|
|
hexmask.long.word 0x04 16.--26. 1. " RES_VS ,Vertical Position Setting for Video Signal Capturing"
|
|
hexmask.long.word 0x04 0.--10. 1. " RES_VW ,Vertical Width of Video Signal to be Captured"
|
|
line.long 0x08 "SCL0_DS3,Horizontal capture size register"
|
|
hexmask.long.word 0x08 16.--26. 1. " RES_HS ,Horizontal Position Setting for Video Signal Capturing"
|
|
hexmask.long.word 0x08 0.--10. 1. " RES_HW ,Horizontal Width of Video Signal to be Captured"
|
|
line.long 0x0C "SCL0_DS4,Horizontal scale down register"
|
|
bitfld.long 0x0C 29. " RES_PFIL_SEL ,Prefilter Mode Select for Brightness Signals - Off/On(1/4 + 1/2 + 1/4)" "Off,On"
|
|
bitfld.long 0x0C 28. " RES_DS_H_INTERPOTYP ,Horizontal Interpolation Mode Select" "Hold,Linear"
|
|
newline
|
|
hexmask.long.word 0x0C 0.--15. 1. " RES_DS_H_RATIO ,Horizontal Scale Down Ratio"
|
|
line.long 0x10 "SCL0_DS5,Initial vertical phase register"
|
|
bitfld.long 0x10 28. " RES_V_INTERPOTYP ,Vertical Interpolation Mode Select" "Hold,Linear"
|
|
hexmask.long.word 0x10 16.--27. 1. " RES_TOP_INIPHASE ,Vertical Interpolation Start Phase for Top Field 0 to 4095"
|
|
newline
|
|
hexmask.long.word 0x10 0.--11. 1. " RES_BTM_INIPHASE ,Vertical Interpolation Start Phase for Bottom Field 0 to 4095"
|
|
line.long 0x14 "SCL0_DS6,Initial vertical phase register"
|
|
hexmask.long.word 0x14 0.--15. 1. " RES_V_RATIO ,Vertical Scale Up/Down Ratio"
|
|
line.long 0x18 "SCL0_DS7,Scaling-down control block output size register"
|
|
hexmask.long.word 0x18 16.--26. 1. " RES_OUT_VW ,Number of Valid Lines in Vertical Direction Output by Scaling-down Control Block"
|
|
hexmask.long.word 0x18 0.--10. 1. " RES_OUT_HW ,Number of Valid Horizontal Pixels Output by Scaling-Down Control Block"
|
|
line.long 0x1C "SCL0_US1,Scaling-down control block output size register"
|
|
bitfld.long 0x1C 4. " RES_US_V_ON ,Vertical Scale Up On/Off" "Off,On"
|
|
bitfld.long 0x1C 0. " RES_US_H_ON ,Horizontal Scale Up On/Off" "Off,On"
|
|
line.long 0x20 "SCL0_US2,Output image vertical size register"
|
|
hexmask.long.word 0x20 16.--26. 1. " RES_P_VS ,Vertical Enable Signal Start Position for Output Image"
|
|
hexmask.long.word 0x20 0.--10. 1. " RES_P_VW ,Vertical Enable Signal Width for Output Image (lines)"
|
|
line.long 0x24 "SCL0_US3,Output image vertical size register"
|
|
hexmask.long.word 0x24 16.--26. 1. " RES_P_HS ,Horizontal Enable Signal Start Position for Output Image"
|
|
hexmask.long.word 0x24 0.--10. 1. " RES_P_HW ,Horizontal Enable Signal Width for Output Image"
|
|
line.long 0x28 "SCL0_US4,Scaling-Up Control Block Input Size Register"
|
|
hexmask.long.word 0x28 16.--26. 1. " RES_IN_VW ,Number of Valid Lines in Vertical Direction Input to Scaling-down Control Block"
|
|
hexmask.long.word 0x28 0.--10. 1. " RES_IN_HW ,Number of Valid Horizontal Pixels Input to Scaling-down Control Block"
|
|
line.long 0x2C "SCL0_US5,Scaling-up control block input size register"
|
|
hexmask.long.word 0x2C 0.--15. 1. " RES_US_H_RATIO ,Horizontal Scale Up Ratio"
|
|
line.long 0x30 "SCL0_US6,Horizontal Scale Up Initial Phase Register"
|
|
bitfld.long 0x30 28. " RES_US_H_INTERPOTYP ,Horizontal Interpolation Mode Select" "Hold,Linear"
|
|
hexmask.long.word 0x30 16.--27. 1. " RES_US_HT_INIPHASE ,Horizontal Interpolation Start Phase for Top Field 0 to 4095"
|
|
newline
|
|
hexmask.long.word 0x30 0.--11. 1. " RES_US_HB_INIPHASE ,Horizontal Interpolation Start Phase for Bottom Field 0 to 4095"
|
|
line.long 0x34 "SCL0_US7,Trimming Register"
|
|
hexmask.long.byte 0x34 8.--15. 1. " RES_HCUT ,Horizontal Amount of Cut-off Post-Scaling Image (Right and Left Parts)"
|
|
hexmask.long.byte 0x34 0.--7. 1. " RES_VCUT ,Vertical Amount of Cut-off Post-Scaling Image (Upper and Lower Parts)"
|
|
line.long 0x38 "SCL0_US8,Frame Buffer Read Select Register"
|
|
bitfld.long 0x38 4. " RES_IBUS_SYNC_SEL ,Sync Signal Select for Frame Buffer Read Block" "Scaling-up control block,Graphics processing block"
|
|
bitfld.long 0x38 0. " RES_DISP_ON ,Post-Scaling Image Frame Display On/Off" "On,Off"
|
|
group.long (0x0+0x6C)++0x3
|
|
line.long 0x00 "SCL0_OVR1,Background color register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RES_BK_CLO_R ,Background Color Setting R/Cr Signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RES_BK_COL_G ,Background Color Setting G/Y Signal"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " RES_BK_COL_B ,Background Color Setting B/Cb Signal"
|
|
group.long (0x0+0x80)++0x03
|
|
line.long 0x00 "SCL1_UPDATE,SCL1 register update control register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
eventfld.long 0x00 20. " SCL1_UPDATE_B ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 16. " SCL1_UPDATE_A ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
newline
|
|
endif
|
|
eventfld.long 0x00 4. " SCL1_VEN_B ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 0. " SCL1_VEN_A ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
group.long (0x0+0x88)++0x0F
|
|
line.long 0x00 "SCL1_WR1,Writing mode register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x00 16.--18. " RES_WRSWA ,8-Bit | 16-Bit | 32-Bit Swap Setting" "Not swapped,8-bit,16-bit,16-bit + 8-bit,32-bit,32-bit + 8-bit,32-bit + 16-bit,32-bit + 16-bit + 8-bit"
|
|
bitfld.long 0x00 7. " RES_TB_ADD_MOD ,Top and Bottom Data Write Address Specification Method" "0,1"
|
|
else
|
|
bitfld.long 0x00 8. " RES_FLM_MD ,Frame Buffer Address Generation Mode Select [RES_BASE x RES_FLM_OFF x VALUES]" "Frame number,Field information"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 4.--6. " RES_DS_WR_MD ,Frame Buffer Writing Mode for Image Processing" "Normal,Horizontal mirroring,90 rotation,180 rotation,270 rotation,?..."
|
|
newline
|
|
sif cpuis("SH7268")||cpuis("SH7269")
|
|
bitfld.long 0x00 2.--3. " RES_MD ,Frame Buffer Video-Signal Writing Format" "YCbCr422,RGB565,RGB888,?..."
|
|
bitfld.long 0x00 1. " RES_LOOP ,Frame Buffer Write Mode Select" "Frame,Line"
|
|
newline
|
|
bitfld.long 0x00 0. " RES_BST_MD ,Transfer Burst Length for Frame Buffer Writing" "32,128"
|
|
endif
|
|
line.long 0x04 "SCL1_WR2,Write address register 1T"
|
|
line.long 0x08 "SCL1_WR3,Write address register 2T"
|
|
hexmask.long.word 0x08 16.--30. 0x01 " RES_LN_OFF ,Frame Buffer Line Offset Address"
|
|
hexmask.long.word 0x08 0.--9. 1. " RES_FLM_NUM ,Number of Frames of Buffer to be Written"
|
|
line.long 0x0C "SCL1_WR4,Write address register 3T"
|
|
hexmask.long.tbyte 0x0C 0.--22. 1. " RES_FLM_OFF ,Frame Buffer Frame Offset Address"
|
|
group.long (0x0+0x9C)++0x07
|
|
line.long 0x00 "SCL1_WR5,Frame sub-sampling register"
|
|
bitfld.long 0x00 12. " RES_INTER ,Field Operating Mode Select" "Progressive,Interlace"
|
|
bitfld.long 0x00 8.--9. " RES_FS_RATE ,Writing Rate" "1/1,1/2,1/4,1/8"
|
|
newline
|
|
bitfld.long 0x00 4. " RES_FLD_SEL ,Write Field Select" "Top,Bottom"
|
|
bitfld.long 0x00 0. " RES_WENB ,Frame Buffer Write Enable" "Disabled,Enabled"
|
|
line.long 0x04 "SCL1_WR6,Bit reduction register"
|
|
bitfld.long 0x04 4. " RES_DTH_ON ,Dither Correction On/Off" "Off,On"
|
|
bitfld.long 0x04 0. " RES_BITDEC_ON ,Bit Reduction On/Off" "Off,On"
|
|
rgroup.long (0x0+0xA4)++0x03
|
|
line.long 0x00 "SCL1_WR7,Write detection register"
|
|
bitfld.long 0x00 16. " RES_OVERFLOW ,Line Buffer Overflow Detect" "No overflow,Overflow"
|
|
hexmask.long.word 0x00 0.--9. 1. " RES_FLM_CNT ,Frame Number of Frame Being Accessed"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
group.long (0x0+0xA8)++0x0F
|
|
line.long 0x00 "SCL1_WR8,Write address register 1B"
|
|
line.long 0x04 "SCL1_WR9,Write address register 2B"
|
|
hexmask.long.word 0x04 16.--30. 1. " RES_LN_OFF_B ,Frame Buffer Line Offset Address for Bottom"
|
|
hexmask.long.word 0x04 0.--9. 1. " RES_FLM_NUM_B ,Number of Frames of Buffer to be Written to for Bottom Field"
|
|
line.long 0x08 "SCL1_WR10,Write address register 3B"
|
|
hexmask.long.tbyte 0x08 0.--22. 1. " RES_FLM_OFF_B ,Frame Buffer Frame Offset Address for Bottom"
|
|
line.long 0x0C "SCL1_WR11,Write detection register B"
|
|
hexmask.long.word 0x0C 0.--9. 1. " RES_FLM_CNT_B ,Frame Number of Frame Being Accessed in Bottom Field"
|
|
rgroup.long (0x0+0xB8)++0x1B
|
|
line.long 0x00 "SCL1_MON1,Status monitor 1 register"
|
|
bitfld.long 0x00 8.--9. " PBUF_NUM ,Write pointer indicating the pointer buffer number corresponding to the location currently being written to" "0,1,2,3"
|
|
line.long 0x04 "SCL1_PBUF0,Pointer buffer 0 register"
|
|
line.long 0x08 "SCL1_PBUF1,Pointer buffer 1 register"
|
|
line.long 0x0C "SCL1_PBUF2,Pointer buffer 2 register"
|
|
line.long 0x10 "SCL1_PBUF3,Pointer buffer 3 register"
|
|
line.long 0x14 "SCL1_PBUF_FLD,Pointer buffer and field information register"
|
|
bitfld.long 0x14 24. " FLD_INF3 ,Top or bottom field information of the frame buffer pointed to by pointer buffer 3" "Top,Bottom"
|
|
bitfld.long 0x14 16. " FLD_INF2 ,Top or bottom field information of the frame buffer pointed to by pointer buffer 2" "Top,Bottom"
|
|
newline
|
|
bitfld.long 0x14 8. " FLD_INF1 ,Top or bottom field information of the frame buffer pointed to by pointer buffer 1" "Top,Bottom"
|
|
bitfld.long 0x14 0. " FLD_INF0 ,Top or bottom field information of the frame buffer pointed to by pointer buffer 0" "Top,Bottom"
|
|
line.long 0x18 "SCL1_PBUF_CNT,Pointer buffer control register"
|
|
bitfld.long 0x18 16. " PBUF_RST ,Reset Control for Pointer Buffer" "No reset,Reset"
|
|
endif
|
|
group.long (0x800+0x00)++0x1F "SC1"
|
|
line.long 0x00 "SCL0_UPDATE,SCL0 register update control register"
|
|
eventfld.long 0x00 13. " SCL0_VEN_D ,Scaling-Up Control and Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 12. " SCL0_VEN_C ,Scaling-Down Control and Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
newline
|
|
eventfld.long 0x00 8. " SCL0_UPDATE ,SYNC Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 4. " SCL0_VEN_B ,Synchronization Control and Scaling-up Control Register Update" "Not updated,Updated"
|
|
newline
|
|
eventfld.long 0x00 0. " SCL0_VEN_A ,Scaling-Down Control Register Update" "Not updated,Updated"
|
|
line.long 0x04 "SCL0_FRC1,Mask control register"
|
|
hexmask.long.word 0x04 16.--31. 1. " RES_VMASK ,Repeated Vsync Signal Masking Period"
|
|
bitfld.long 0x04 0. " RES_VMASK_ON ,Repeated Vsync Signal Masking Control" "Disabled,Enabled"
|
|
line.long 0x08 "SCL0_FRC2,Missing Vsync compensation control register"
|
|
hexmask.long.word 0x08 16.--31. 1. " RES_VLACK ,Missing-Sync Compensating Pulse Output Wait Time"
|
|
bitfld.long 0x08 0. " RES_VLACK_ON ,Missing Vsync Signal Compensation" "Disabled,Enabled"
|
|
line.long 0x0C "SCL0_FRC3,Output sync select register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x0C 8. " RES_VS_IN_SEL ,Horizontal and Vertical Sync Signal Output and Full-Screen Enable Signal Select" "Scaler0,Scaler1"
|
|
bitfld.long 0x0C 0. " RES_VS_SEL ,Vsync Signal Output Select" "Externally,Internally"
|
|
else
|
|
bitfld.long 0x0C 0. " RES_VS_SEL ,Vsync Signal Output Select" "Externally,Internally"
|
|
endif
|
|
line.long 0x10 "SCL0_FRC4,Free-running period control register"
|
|
hexmask.long.word 0x10 16.--26. 1. " RES_FV ,Free-Running Vsync Period Setting"
|
|
hexmask.long.word 0x10 0.--10. 1. " RES_FH ,Hsync Period Setting"
|
|
line.long 0x14 "SCL0_FRC5,Output delay control register"
|
|
bitfld.long 0x14 8. " RES_FLD_DLY_SEL ,Field Determination Signal Delay Control" "No delay,Delay 1 cycle"
|
|
hexmask.long.byte 0x14 0.--7. 1. " RES_VSDLY ,Vsync Signal Delay Control"
|
|
line.long 0x18 "SCL0_FRC6,Full-screen vertical size register"
|
|
hexmask.long.word 0x18 16.--26. 1. " RES_F_VS ,Vertical Enable Signal Start Position for Full Screen"
|
|
hexmask.long.word 0x18 0.--10. 1. " RES_F_VW ,Vertical Enable Signal Width for Full Screen (lines)"
|
|
line.long 0x1C "SCL0_FRC7,Full-screen horizontal size register"
|
|
hexmask.long.word 0x1C 16.--26. 1. " RES_F_HS ,Horizontal Enable Signal Start Position for Full Screen"
|
|
hexmask.long.word 0x1C 0.--10. 1. " RES_F_HW ,Horizontal Enable Signal Width for Full Screen"
|
|
sif cpuis("SH7268")||cpuis("SH7269")
|
|
group.long (0x800+0x20)++0x03
|
|
line.long 0x00 "SCL0_FRC8,Field Determination Signal Switching Register"
|
|
bitfld.long 0x00 10. " RES_US_FLD ,Field determination signal switching" "Synch. block,Frame number"
|
|
endif
|
|
rgroup.long (0x800+0x24)++0x03
|
|
line.long 0x00 "SCL0_FRC9,Vsync detection register"
|
|
bitfld.long 0x00 4. " RES_QVLOCK ,Locked Vsync Signal Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " RES_QVLACK ,Missing Vsync Signal Detection Flag" "Not detected,Detected"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
rgroup.word (0x800+0x28)++0x03
|
|
line.word 0x00 "SCL0_MON0,Status monitor 0 register"
|
|
hexmask.word 0x00 0.--10. 1. " RES_LIN_STAT ,Current location of the image line input to the scaling-down control block"
|
|
line.word 0x02 "SCL0_INT,Interrupt control register"
|
|
hexmask.word 0x02 0.--10. 1. " RES_LINE ,Setting of Interrupt on Image Line Input to Scaling-down Control Block"
|
|
endif
|
|
group.long (0x800+0x2C)++0x3B
|
|
line.long 0x00 "SCL0_DS1,Scaling-down control register"
|
|
bitfld.long 0x00 4. " RES_DS_V_ON ,Vertical Scale Down On/Off" "Off,On"
|
|
bitfld.long 0x00 0. " RES_DS_H_ON ,Horizontal Scale Down On/Off" "Off,On"
|
|
line.long 0x04 "SCL0_DS2,Vertical capture size register"
|
|
hexmask.long.word 0x04 16.--26. 1. " RES_VS ,Vertical Position Setting for Video Signal Capturing"
|
|
hexmask.long.word 0x04 0.--10. 1. " RES_VW ,Vertical Width of Video Signal to be Captured"
|
|
line.long 0x08 "SCL0_DS3,Horizontal capture size register"
|
|
hexmask.long.word 0x08 16.--26. 1. " RES_HS ,Horizontal Position Setting for Video Signal Capturing"
|
|
hexmask.long.word 0x08 0.--10. 1. " RES_HW ,Horizontal Width of Video Signal to be Captured"
|
|
line.long 0x0C "SCL0_DS4,Horizontal scale down register"
|
|
bitfld.long 0x0C 29. " RES_PFIL_SEL ,Prefilter Mode Select for Brightness Signals - Off/On(1/4 + 1/2 + 1/4)" "Off,On"
|
|
bitfld.long 0x0C 28. " RES_DS_H_INTERPOTYP ,Horizontal Interpolation Mode Select" "Hold,Linear"
|
|
newline
|
|
hexmask.long.word 0x0C 0.--15. 1. " RES_DS_H_RATIO ,Horizontal Scale Down Ratio"
|
|
line.long 0x10 "SCL0_DS5,Initial vertical phase register"
|
|
bitfld.long 0x10 28. " RES_V_INTERPOTYP ,Vertical Interpolation Mode Select" "Hold,Linear"
|
|
hexmask.long.word 0x10 16.--27. 1. " RES_TOP_INIPHASE ,Vertical Interpolation Start Phase for Top Field 0 to 4095"
|
|
newline
|
|
hexmask.long.word 0x10 0.--11. 1. " RES_BTM_INIPHASE ,Vertical Interpolation Start Phase for Bottom Field 0 to 4095"
|
|
line.long 0x14 "SCL0_DS6,Initial vertical phase register"
|
|
hexmask.long.word 0x14 0.--15. 1. " RES_V_RATIO ,Vertical Scale Up/Down Ratio"
|
|
line.long 0x18 "SCL0_DS7,Scaling-down control block output size register"
|
|
hexmask.long.word 0x18 16.--26. 1. " RES_OUT_VW ,Number of Valid Lines in Vertical Direction Output by Scaling-down Control Block"
|
|
hexmask.long.word 0x18 0.--10. 1. " RES_OUT_HW ,Number of Valid Horizontal Pixels Output by Scaling-Down Control Block"
|
|
line.long 0x1C "SCL0_US1,Scaling-down control block output size register"
|
|
bitfld.long 0x1C 4. " RES_US_V_ON ,Vertical Scale Up On/Off" "Off,On"
|
|
bitfld.long 0x1C 0. " RES_US_H_ON ,Horizontal Scale Up On/Off" "Off,On"
|
|
line.long 0x20 "SCL0_US2,Output image vertical size register"
|
|
hexmask.long.word 0x20 16.--26. 1. " RES_P_VS ,Vertical Enable Signal Start Position for Output Image"
|
|
hexmask.long.word 0x20 0.--10. 1. " RES_P_VW ,Vertical Enable Signal Width for Output Image (lines)"
|
|
line.long 0x24 "SCL0_US3,Output image vertical size register"
|
|
hexmask.long.word 0x24 16.--26. 1. " RES_P_HS ,Horizontal Enable Signal Start Position for Output Image"
|
|
hexmask.long.word 0x24 0.--10. 1. " RES_P_HW ,Horizontal Enable Signal Width for Output Image"
|
|
line.long 0x28 "SCL0_US4,Scaling-Up Control Block Input Size Register"
|
|
hexmask.long.word 0x28 16.--26. 1. " RES_IN_VW ,Number of Valid Lines in Vertical Direction Input to Scaling-down Control Block"
|
|
hexmask.long.word 0x28 0.--10. 1. " RES_IN_HW ,Number of Valid Horizontal Pixels Input to Scaling-down Control Block"
|
|
line.long 0x2C "SCL0_US5,Scaling-up control block input size register"
|
|
hexmask.long.word 0x2C 0.--15. 1. " RES_US_H_RATIO ,Horizontal Scale Up Ratio"
|
|
line.long 0x30 "SCL0_US6,Horizontal Scale Up Initial Phase Register"
|
|
bitfld.long 0x30 28. " RES_US_H_INTERPOTYP ,Horizontal Interpolation Mode Select" "Hold,Linear"
|
|
hexmask.long.word 0x30 16.--27. 1. " RES_US_HT_INIPHASE ,Horizontal Interpolation Start Phase for Top Field 0 to 4095"
|
|
newline
|
|
hexmask.long.word 0x30 0.--11. 1. " RES_US_HB_INIPHASE ,Horizontal Interpolation Start Phase for Bottom Field 0 to 4095"
|
|
line.long 0x34 "SCL0_US7,Trimming Register"
|
|
hexmask.long.byte 0x34 8.--15. 1. " RES_HCUT ,Horizontal Amount of Cut-off Post-Scaling Image (Right and Left Parts)"
|
|
hexmask.long.byte 0x34 0.--7. 1. " RES_VCUT ,Vertical Amount of Cut-off Post-Scaling Image (Upper and Lower Parts)"
|
|
line.long 0x38 "SCL0_US8,Frame Buffer Read Select Register"
|
|
bitfld.long 0x38 4. " RES_IBUS_SYNC_SEL ,Sync Signal Select for Frame Buffer Read Block" "Scaling-up control block,Graphics processing block"
|
|
bitfld.long 0x38 0. " RES_DISP_ON ,Post-Scaling Image Frame Display On/Off" "On,Off"
|
|
group.long (0x800+0x6C)++0x3
|
|
line.long 0x00 "SCL0_OVR1,Background color register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RES_BK_CLO_R ,Background Color Setting R/Cr Signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RES_BK_COL_G ,Background Color Setting G/Y Signal"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " RES_BK_COL_B ,Background Color Setting B/Cb Signal"
|
|
group.long (0x800+0x80)++0x03
|
|
line.long 0x00 "SCL1_UPDATE,SCL1 register update control register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
eventfld.long 0x00 20. " SCL1_UPDATE_B ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 16. " SCL1_UPDATE_A ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
newline
|
|
endif
|
|
eventfld.long 0x00 4. " SCL1_VEN_B ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 0. " SCL1_VEN_A ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
group.long (0x800+0x88)++0x0F
|
|
line.long 0x00 "SCL1_WR1,Writing mode register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x00 16.--18. " RES_WRSWA ,8-Bit | 16-Bit | 32-Bit Swap Setting" "Not swapped,8-bit,16-bit,16-bit + 8-bit,32-bit,32-bit + 8-bit,32-bit + 16-bit,32-bit + 16-bit + 8-bit"
|
|
bitfld.long 0x00 7. " RES_TB_ADD_MOD ,Top and Bottom Data Write Address Specification Method" "0,1"
|
|
else
|
|
bitfld.long 0x00 8. " RES_FLM_MD ,Frame Buffer Address Generation Mode Select [RES_BASE x RES_FLM_OFF x VALUES]" "Frame number,Field information"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 4.--6. " RES_DS_WR_MD ,Frame Buffer Writing Mode for Image Processing" "Normal,Horizontal mirroring,90 rotation,180 rotation,270 rotation,?..."
|
|
newline
|
|
sif cpuis("SH7268")||cpuis("SH7269")
|
|
bitfld.long 0x00 2.--3. " RES_MD ,Frame Buffer Video-Signal Writing Format" "YCbCr422,RGB565,RGB888,?..."
|
|
bitfld.long 0x00 1. " RES_LOOP ,Frame Buffer Write Mode Select" "Frame,Line"
|
|
newline
|
|
bitfld.long 0x00 0. " RES_BST_MD ,Transfer Burst Length for Frame Buffer Writing" "32,128"
|
|
endif
|
|
line.long 0x04 "SCL1_WR2,Write address register 1T"
|
|
line.long 0x08 "SCL1_WR3,Write address register 2T"
|
|
hexmask.long.word 0x08 16.--30. 0x01 " RES_LN_OFF ,Frame Buffer Line Offset Address"
|
|
hexmask.long.word 0x08 0.--9. 1. " RES_FLM_NUM ,Number of Frames of Buffer to be Written"
|
|
line.long 0x0C "SCL1_WR4,Write address register 3T"
|
|
hexmask.long.tbyte 0x0C 0.--22. 1. " RES_FLM_OFF ,Frame Buffer Frame Offset Address"
|
|
group.long (0x800+0x9C)++0x07
|
|
line.long 0x00 "SCL1_WR5,Frame sub-sampling register"
|
|
bitfld.long 0x00 12. " RES_INTER ,Field Operating Mode Select" "Progressive,Interlace"
|
|
bitfld.long 0x00 8.--9. " RES_FS_RATE ,Writing Rate" "1/1,1/2,1/4,1/8"
|
|
newline
|
|
bitfld.long 0x00 4. " RES_FLD_SEL ,Write Field Select" "Top,Bottom"
|
|
bitfld.long 0x00 0. " RES_WENB ,Frame Buffer Write Enable" "Disabled,Enabled"
|
|
line.long 0x04 "SCL1_WR6,Bit reduction register"
|
|
bitfld.long 0x04 4. " RES_DTH_ON ,Dither Correction On/Off" "Off,On"
|
|
bitfld.long 0x04 0. " RES_BITDEC_ON ,Bit Reduction On/Off" "Off,On"
|
|
rgroup.long (0x800+0xA4)++0x03
|
|
line.long 0x00 "SCL1_WR7,Write detection register"
|
|
bitfld.long 0x00 16. " RES_OVERFLOW ,Line Buffer Overflow Detect" "No overflow,Overflow"
|
|
hexmask.long.word 0x00 0.--9. 1. " RES_FLM_CNT ,Frame Number of Frame Being Accessed"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
group.long (0x800+0xA8)++0x0F
|
|
line.long 0x00 "SCL1_WR8,Write address register 1B"
|
|
line.long 0x04 "SCL1_WR9,Write address register 2B"
|
|
hexmask.long.word 0x04 16.--30. 1. " RES_LN_OFF_B ,Frame Buffer Line Offset Address for Bottom"
|
|
hexmask.long.word 0x04 0.--9. 1. " RES_FLM_NUM_B ,Number of Frames of Buffer to be Written to for Bottom Field"
|
|
line.long 0x08 "SCL1_WR10,Write address register 3B"
|
|
hexmask.long.tbyte 0x08 0.--22. 1. " RES_FLM_OFF_B ,Frame Buffer Frame Offset Address for Bottom"
|
|
line.long 0x0C "SCL1_WR11,Write detection register B"
|
|
hexmask.long.word 0x0C 0.--9. 1. " RES_FLM_CNT_B ,Frame Number of Frame Being Accessed in Bottom Field"
|
|
rgroup.long (0x800+0xB8)++0x1B
|
|
line.long 0x00 "SCL1_MON1,Status monitor 1 register"
|
|
bitfld.long 0x00 8.--9. " PBUF_NUM ,Write pointer indicating the pointer buffer number corresponding to the location currently being written to" "0,1,2,3"
|
|
line.long 0x04 "SCL1_PBUF0,Pointer buffer 0 register"
|
|
line.long 0x08 "SCL1_PBUF1,Pointer buffer 1 register"
|
|
line.long 0x0C "SCL1_PBUF2,Pointer buffer 2 register"
|
|
line.long 0x10 "SCL1_PBUF3,Pointer buffer 3 register"
|
|
line.long 0x14 "SCL1_PBUF_FLD,Pointer buffer and field information register"
|
|
bitfld.long 0x14 24. " FLD_INF3 ,Top or bottom field information of the frame buffer pointed to by pointer buffer 3" "Top,Bottom"
|
|
bitfld.long 0x14 16. " FLD_INF2 ,Top or bottom field information of the frame buffer pointed to by pointer buffer 2" "Top,Bottom"
|
|
newline
|
|
bitfld.long 0x14 8. " FLD_INF1 ,Top or bottom field information of the frame buffer pointed to by pointer buffer 1" "Top,Bottom"
|
|
bitfld.long 0x14 0. " FLD_INF0 ,Top or bottom field information of the frame buffer pointed to by pointer buffer 0" "Top,Bottom"
|
|
line.long 0x18 "SCL1_PBUF_CNT,Pointer buffer control register"
|
|
bitfld.long 0x18 16. " PBUF_RST ,Reset Control for Pointer Buffer" "No reset,Reset"
|
|
endif
|
|
group.long (0x0+0x100)++0x1F "GR0"
|
|
line.long 0x00 "UPDATE,Graphics 0 register update control register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
eventfld.long 0x00 8. " UPDATE ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 4. " P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
else
|
|
eventfld.long 0x00 4. " P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
endif
|
|
newline
|
|
eventfld.long 0x00 0. " IBUS_VEN ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
line.long 0x04 "FLM_RD,Frame buffer read control register"
|
|
bitfld.long 0x04 0. " R_ENB ,Frame Buffer Read Enable" "Disabled,Enabled"
|
|
line.long 0x08 "FLM1,Frame buffer control register 1"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x08 31. " FLD_SEL ,Enables or disables top or bottom field selection for the next frame buffer to be read" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " LN_OFF_DIR ,Selects the line offset address direction of the frame buffer" "Inc,Dec"
|
|
newline
|
|
bitfld.long 0x08 8.--9. " FLM_SEL ,Selects a frame buffer address setting signal" "Links scaling-down process,Selects FLM_NUM,Links distortion correction,Links pointer buffer"
|
|
else
|
|
bitfld.long 0x08 16. " LN_OFF_DIR ,Selects the line offset address direction of the frame buffer" "Inc,Dec"
|
|
newline
|
|
bitfld.long 0x08 8.--9. " FLM_SEL ,Selects a frame buffer address setting signal" "Links scaling-down process,Selects FLM_NUM,Links distortion correction,?..."
|
|
endif
|
|
newline
|
|
bitfld.long 0x08 4. " IMR_FLM_INV ,Sets the frame buffer number for distortion correction." "Not replaced,Replaced"
|
|
bitfld.long 0x08 0. " BST_MD ,Frame Buffer Burst Transfer Mode" "32-byte,128- byte"
|
|
line.long 0x0C "FLM2,Frame buffer control register 2"
|
|
line.long 0x10 "FLM3,Frame buffer control register 3"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x10 31. " FLD_NXT ,Top or Bottom Field Selection for Next Frame Buffer" "Top,Bottom"
|
|
hexmask.long.word 0x10 16.--30. 0x01 " LN_OFF ,Frame Buffer Line Offset Address"
|
|
else
|
|
hexmask.long.word 0x10 16.--30. 0x01 " LN_OFF ,Frame Buffer Line Offset Address"
|
|
endif
|
|
newline
|
|
hexmask.long.word 0x10 0.--9. 1. " FLM_NUM ,Frame Number of Frame Buffer"
|
|
line.long 0x14 "FLM4,Frame buffer control register 4"
|
|
hexmask.long.tbyte 0x14 0.--22. 0x01 " FLM_OFF ,Frame Buffer Frame Offset Address"
|
|
line.long 0x18 "FLM5,Frame buffer control register 5"
|
|
hexmask.long.word 0x18 16.--26. 1. " FLM_LNUM ,Sets number of lines in a frame"
|
|
hexmask.long.word 0x18 0.--10. 0x01 " FLM_LOOP ,Number of lines when reading the addresses repeatedly by returning to the start address after reaching the end address"
|
|
line.long 0x1C "FLM6,Frame buffer control register 6"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x1C 28.--31. " FORMAT ,Sets the format of the frame buffer read signal" "RGB565,RGB888,AlphaRGB1555,AlphaRGB4444,AlphaRGB8888,CLUT8,CLUT4,CLUT1,YCbCr422,YCbCr444,RGBalpha5551,RGBalpha8888,?..."
|
|
else
|
|
bitfld.long 0x1C 28.--31. " FORMAT ,Sets the format of the frame buffer read signal" "RGB565,RGB888,AlphaRGB1555,AlphaRGB4444,AlphaRGB8888,CLUT8,CLUT4,CLUT1,YCbCr422,?..."
|
|
endif
|
|
hexmask.long.word 0x1C 16.--26. 1. " HW ,Sets the width of the horizontal valid period"
|
|
newline
|
|
bitfld.long 0x1C 13.--15. " YCC_SWAP ,Controls swapping of data read from buffer in the YCbCr422 format" "Cb/Y0/Cr/Y1,Y0/Cb/Y1/C,Cr/Y0/Cb/Y1,Y0/Cr/Y1/Cb,Y1/Cr/Y0/Cb,Cr/Y1/Cb/Y0,Y1/Cb/Y0/Cr,Cb/Y1/Cr/Y0"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x1C 12. " RDSWA2 ,32-Bit Swap Setting" "Not swapped,Swapped"
|
|
newline
|
|
bitfld.long 0x1C 11. " RDSWA1 ,16-Bit Swap Setting" "Not swapped,Swapped"
|
|
bitfld.long 0x1C 10. " RDSWA0 ,8-Bit Swap Setting" "Not swapped,Swapped"
|
|
else
|
|
bitfld.long 0x1C 12. " ENDIAN_ON ,Turns on/off the endian control of data read from buffer" "Off,On"
|
|
endif
|
|
newline
|
|
bitfld.long 0x1C 8. " CNV444_MD ,Sets the interpolation mode for YCC422 to YCbCr444 conversion" "Hold,Average"
|
|
bitfld.long 0x1C 0.--5. " STA_POS ,Sets the amount of data to be skipped through" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long (0x0+0x120)++0x0B
|
|
line.long 0x00 "AB1,Alpha blending control register 1"
|
|
bitfld.long 0x00 4. " GRC_DISP_ON ,Turns on/off frame-line display of the graphics image area" "Off,On"
|
|
bitfld.long 0x00 0.--1. " DISP_SEL ,Selects the graphics display mode" "Background color,Lower-layer graphics,Current graphics,Blended lower-layer graphics and current graphics"
|
|
line.long 0x04 "AB2,Alpha blending control register 2"
|
|
hexmask.long.word 0x04 16.--26. 1. " GRC_VS ,Vertical Start Position of Graphics Image Area"
|
|
hexmask.long.word 0x04 0.--10. 1. " GRC_VW ,Vertical Width of Graphics Image Area"
|
|
line.long 0x08 "AB3,Alpha blending control register 3"
|
|
hexmask.long.word 0x08 16.--26. 1. " GRC_HS ,Horizontal Start Position of Graphics Image Area"
|
|
hexmask.long.word 0x08 0.--10. 1. " GRC_HW ,Horizontal Width of Graphics Image Area"
|
|
group.long (0x0+0x138)++0x1B
|
|
line.long 0x0 "AB7,Alpha blending control register 7"
|
|
bitfld.long 0x0 0. " CK_ON ,CLUT-Index/RGB-Index Chroma-Key Processing On/Off" "Off,On"
|
|
line.long 0x04 "AB8,Alpha blending control register 8"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CK_KCLUT ,CLUT Signal for CLUT-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CK_KG ,G Signal for RGB-Index Chroma-Key Processing"
|
|
newline
|
|
hexmask.long.byte 0x04 8.--15. 1. " CK_KB ,B Signal for RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x04 0.--7. 1. " CK_KR ,R Signal for RGB-Index Chroma-Key Processing"
|
|
line.long 0x08 "AB9,Alpha blending control register 9"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
hexmask.long.byte 0x08 24.--31. 1. " A ,Replaced Alpha Signal after RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x08 16.--23. 1. " G ,Replaced G Signal after RGB-Index Chroma-Key Processing"
|
|
newline
|
|
hexmask.long.byte 0x08 8.--15. 1. " B ,Replaced B Signal after RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x08 0.--7. 1. " R ,Replaced R Signal after RGB-Index Chroma-Key Processing"
|
|
else
|
|
hexmask.long.byte 0x08 24.--31. 1. " A0 ,CLUT1 alpah0 Signal"
|
|
hexmask.long.byte 0x08 16.--23. 1. " G0 ,CLUT1 G0 Signal"
|
|
newline
|
|
hexmask.long.byte 0x08 8.--15. 1. " B0 ,CLUT1 B0 Signal"
|
|
hexmask.long.byte 0x08 0.--7. 1. " R0 ,CLUT1 R0 Signal"
|
|
endif
|
|
line.long 0x0C "AB10,Alpha blending control register 10"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " A0 ,CLUT1 alpha0 Signal"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " G0 ,CLUT1 G0 Signal"
|
|
newline
|
|
hexmask.long.byte 0x0C 8.--15. 1. " B0 ,CLUT1 B0 Signal"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " R0 ,CLUT1 R0 Signal"
|
|
line.long 0x10 "AB11,Alpha blending control register 11"
|
|
hexmask.long.byte 0x10 24.--31. 1. " A1 ,CLUT1 alpha1 Signal"
|
|
hexmask.long.byte 0x10 16.--23. 1. " G1 ,CLUT1 G1 Signal"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--15. 1. " B1 ,CLUT1 B1 Signal"
|
|
hexmask.long.byte 0x10 0.--7. 1. " R1 ,CLUT1 R1 Signal"
|
|
line.long 0x14 "BASE,Background color control register"
|
|
hexmask.long.byte 0x14 16.--23. 1. " BASE_G ,Background Color G/Y Signal"
|
|
hexmask.long.byte 0x14 8.--15. 1. " BASE_B ,Background Color B/Cb Signal"
|
|
newline
|
|
hexmask.long.byte 0x14 0.--7. 1. " BASE_R ,Background Color R/Cr Signal"
|
|
line.long 0x18 "CLUT,CLUT table control register"
|
|
bitfld.long 0x18 16. " CLT_SEL ,CLUT Table Select Signal" "Table 0,Table 1"
|
|
group.long (0x800+0x100)++0x1F "GR1"
|
|
line.long 0x00 "UPDATE,Graphics 0 register update control register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
eventfld.long 0x00 8. " UPDATE ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 4. " P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
else
|
|
eventfld.long 0x00 4. " P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
endif
|
|
newline
|
|
eventfld.long 0x00 0. " IBUS_VEN ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
line.long 0x04 "FLM_RD,Frame buffer read control register"
|
|
bitfld.long 0x04 0. " R_ENB ,Frame Buffer Read Enable" "Disabled,Enabled"
|
|
line.long 0x08 "FLM1,Frame buffer control register 1"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x08 31. " FLD_SEL ,Enables or disables top or bottom field selection for the next frame buffer to be read" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " LN_OFF_DIR ,Selects the line offset address direction of the frame buffer" "Inc,Dec"
|
|
newline
|
|
bitfld.long 0x08 8.--9. " FLM_SEL ,Selects a frame buffer address setting signal" "Links scaling-down process,Selects FLM_NUM,Links distortion correction,Links pointer buffer"
|
|
else
|
|
bitfld.long 0x08 16. " LN_OFF_DIR ,Selects the line offset address direction of the frame buffer" "Inc,Dec"
|
|
newline
|
|
bitfld.long 0x08 8.--9. " FLM_SEL ,Selects a frame buffer address setting signal" "Links scaling-down process,Selects FLM_NUM,Links distortion correction,?..."
|
|
endif
|
|
newline
|
|
bitfld.long 0x08 4. " IMR_FLM_INV ,Sets the frame buffer number for distortion correction." "Not replaced,Replaced"
|
|
bitfld.long 0x08 0. " BST_MD ,Frame Buffer Burst Transfer Mode" "32-byte,128- byte"
|
|
line.long 0x0C "FLM2,Frame buffer control register 2"
|
|
line.long 0x10 "FLM3,Frame buffer control register 3"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x10 31. " FLD_NXT ,Top or Bottom Field Selection for Next Frame Buffer" "Top,Bottom"
|
|
hexmask.long.word 0x10 16.--30. 0x01 " LN_OFF ,Frame Buffer Line Offset Address"
|
|
else
|
|
hexmask.long.word 0x10 16.--30. 0x01 " LN_OFF ,Frame Buffer Line Offset Address"
|
|
endif
|
|
newline
|
|
hexmask.long.word 0x10 0.--9. 1. " FLM_NUM ,Frame Number of Frame Buffer"
|
|
line.long 0x14 "FLM4,Frame buffer control register 4"
|
|
hexmask.long.tbyte 0x14 0.--22. 0x01 " FLM_OFF ,Frame Buffer Frame Offset Address"
|
|
line.long 0x18 "FLM5,Frame buffer control register 5"
|
|
hexmask.long.word 0x18 16.--26. 1. " FLM_LNUM ,Sets number of lines in a frame"
|
|
hexmask.long.word 0x18 0.--10. 0x01 " FLM_LOOP ,Number of lines when reading the addresses repeatedly by returning to the start address after reaching the end address"
|
|
line.long 0x1C "FLM6,Frame buffer control register 6"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x1C 28.--31. " FORMAT ,Sets the format of the frame buffer read signal" "RGB565,RGB888,AlphaRGB1555,AlphaRGB4444,AlphaRGB8888,CLUT8,CLUT4,CLUT1,YCbCr422,YCbCr444,RGBalpha5551,RGBalpha8888,?..."
|
|
else
|
|
bitfld.long 0x1C 28.--31. " FORMAT ,Sets the format of the frame buffer read signal" "RGB565,RGB888,AlphaRGB1555,AlphaRGB4444,AlphaRGB8888,CLUT8,CLUT4,CLUT1,YCbCr422,?..."
|
|
endif
|
|
hexmask.long.word 0x1C 16.--26. 1. " HW ,Sets the width of the horizontal valid period"
|
|
newline
|
|
bitfld.long 0x1C 13.--15. " YCC_SWAP ,Controls swapping of data read from buffer in the YCbCr422 format" "Cb/Y0/Cr/Y1,Y0/Cb/Y1/C,Cr/Y0/Cb/Y1,Y0/Cr/Y1/Cb,Y1/Cr/Y0/Cb,Cr/Y1/Cb/Y0,Y1/Cb/Y0/Cr,Cb/Y1/Cr/Y0"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x1C 12. " RDSWA2 ,32-Bit Swap Setting" "Not swapped,Swapped"
|
|
newline
|
|
bitfld.long 0x1C 11. " RDSWA1 ,16-Bit Swap Setting" "Not swapped,Swapped"
|
|
bitfld.long 0x1C 10. " RDSWA0 ,8-Bit Swap Setting" "Not swapped,Swapped"
|
|
else
|
|
bitfld.long 0x1C 12. " ENDIAN_ON ,Turns on/off the endian control of data read from buffer" "Off,On"
|
|
endif
|
|
newline
|
|
bitfld.long 0x1C 8. " CNV444_MD ,Sets the interpolation mode for YCC422 to YCbCr444 conversion" "Hold,Average"
|
|
bitfld.long 0x1C 0.--5. " STA_POS ,Sets the amount of data to be skipped through" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long (0x800+0x120)++0x0B
|
|
line.long 0x00 "AB1,Alpha blending control register 1"
|
|
bitfld.long 0x00 4. " GRC_DISP_ON ,Turns on/off frame-line display of the graphics image area" "Off,On"
|
|
bitfld.long 0x00 0.--1. " DISP_SEL ,Selects the graphics display mode" "Background color,Lower-layer graphics,Current graphics,Blended lower-layer graphics and current graphics"
|
|
line.long 0x04 "AB2,Alpha blending control register 2"
|
|
hexmask.long.word 0x04 16.--26. 1. " GRC_VS ,Vertical Start Position of Graphics Image Area"
|
|
hexmask.long.word 0x04 0.--10. 1. " GRC_VW ,Vertical Width of Graphics Image Area"
|
|
line.long 0x08 "AB3,Alpha blending control register 3"
|
|
hexmask.long.word 0x08 16.--26. 1. " GRC_HS ,Horizontal Start Position of Graphics Image Area"
|
|
hexmask.long.word 0x08 0.--10. 1. " GRC_HW ,Horizontal Width of Graphics Image Area"
|
|
group.long (0x800+0x138)++0x1B
|
|
line.long 0x0 "AB7,Alpha blending control register 7"
|
|
bitfld.long 0x0 0. " CK_ON ,CLUT-Index/RGB-Index Chroma-Key Processing On/Off" "Off,On"
|
|
line.long 0x04 "AB8,Alpha blending control register 8"
|
|
hexmask.long.byte 0x04 24.--31. 1. " CK_KCLUT ,CLUT Signal for CLUT-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x04 16.--23. 1. " CK_KG ,G Signal for RGB-Index Chroma-Key Processing"
|
|
newline
|
|
hexmask.long.byte 0x04 8.--15. 1. " CK_KB ,B Signal for RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x04 0.--7. 1. " CK_KR ,R Signal for RGB-Index Chroma-Key Processing"
|
|
line.long 0x08 "AB9,Alpha blending control register 9"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
hexmask.long.byte 0x08 24.--31. 1. " A ,Replaced Alpha Signal after RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x08 16.--23. 1. " G ,Replaced G Signal after RGB-Index Chroma-Key Processing"
|
|
newline
|
|
hexmask.long.byte 0x08 8.--15. 1. " B ,Replaced B Signal after RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x08 0.--7. 1. " R ,Replaced R Signal after RGB-Index Chroma-Key Processing"
|
|
else
|
|
hexmask.long.byte 0x08 24.--31. 1. " A0 ,CLUT1 alpah0 Signal"
|
|
hexmask.long.byte 0x08 16.--23. 1. " G0 ,CLUT1 G0 Signal"
|
|
newline
|
|
hexmask.long.byte 0x08 8.--15. 1. " B0 ,CLUT1 B0 Signal"
|
|
hexmask.long.byte 0x08 0.--7. 1. " R0 ,CLUT1 R0 Signal"
|
|
endif
|
|
line.long 0x0C "AB10,Alpha blending control register 10"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " A0 ,CLUT1 alpha0 Signal"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " G0 ,CLUT1 G0 Signal"
|
|
newline
|
|
hexmask.long.byte 0x0C 8.--15. 1. " B0 ,CLUT1 B0 Signal"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " R0 ,CLUT1 R0 Signal"
|
|
line.long 0x10 "AB11,Alpha blending control register 11"
|
|
hexmask.long.byte 0x10 24.--31. 1. " A1 ,CLUT1 alpha1 Signal"
|
|
hexmask.long.byte 0x10 16.--23. 1. " G1 ,CLUT1 G1 Signal"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--15. 1. " B1 ,CLUT1 B1 Signal"
|
|
hexmask.long.byte 0x10 0.--7. 1. " R1 ,CLUT1 R1 Signal"
|
|
line.long 0x14 "BASE,Background color control register"
|
|
hexmask.long.byte 0x14 16.--23. 1. " BASE_G ,Background Color G/Y Signal"
|
|
hexmask.long.byte 0x14 8.--15. 1. " BASE_B ,Background Color B/Cb Signal"
|
|
newline
|
|
hexmask.long.byte 0x14 0.--7. 1. " BASE_R ,Background Color R/Cr Signal"
|
|
line.long 0x18 "CLUT,CLUT table control register"
|
|
bitfld.long 0x18 16. " CLT_SEL ,CLUT Table Select Signal" "Table 0,Table 1"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
rgroup.long 0x154++0x03
|
|
line.long 0x00 "MON,Status Monitor Register (Graphics 1)"
|
|
bitfld.long 0x00 0. " ARC_ST ,Status Flag for Alpha Blending in Rectangular Area" "Completed,In progress"
|
|
endif
|
|
width 0x00B
|
|
tree.end
|
|
tree.end
|
|
tree.open "IQI (Video Display Controller 5 : Image Quality Improver)"
|
|
tree "Channel 0"
|
|
base ad:0xFCFF7680
|
|
width 14.
|
|
group.long 0x0++0x4F "ADJ0"
|
|
line.long 0x00 "UPDATE,Register update control register in image quality improver"
|
|
eventfld.long 0x00 0. " ADJ0_VEN ,Image Quality Improver Register Update" "Not updated,Updated"
|
|
line.long 0x04 "BKSTR_SET,Black stretch register (image quality improver 0)"
|
|
bitfld.long 0x04 24. " BKSTR_ON ,Black Stretch On/Off Control" "Off,On"
|
|
bitfld.long 0x04 20.--23. " BKSTR_ST ,Black Stretch Start Point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x04 16.--19. " BKSTR_D ,Depth of Black Stretch" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--12. " BKSTR_T1 ,Black Stretch Time Constant (T1)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x04 0.--4. " BKSTR_T2 ,Black Stretch Time Constant (T2)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "ENH_TIM1,Enhancer timing adjustment register 1"
|
|
bitfld.long 0x08 4. " ENH_MD ,Operating Mode" "RGB,YCbCr"
|
|
bitfld.long 0x08 0. " ENH_DISP_ON ,Frame Line Display On/Off of Enhancer-Enabled Area" "Off,On"
|
|
line.long 0x0C "ENH_TIM2,Enhancer timing adjustment register 2"
|
|
hexmask.long.word 0x0C 16.--26. 1. " ENH_HS ,Start Position of Horizontal Valid Image Area in Enhancer-Enabled Area"
|
|
hexmask.long.word 0x0C 0.--10. 1. " ENH_VW ,Width of Vertical Valid Image Area in Enhancer-Enabled Area"
|
|
line.long 0x10 "ENH_TIM3,Enhancer timing adjustment register 3"
|
|
hexmask.long.word 0x10 16.--26. 1. " ENH_HS ,Start Position of Horizontal Valid Image Area in Enhancer-Enabled Area"
|
|
hexmask.long.word 0x10 0.--10. 1. " ENH_HW ,Width of Horizontal Valid Image Area in Enhancer-Enabled Area"
|
|
line.long 0x14 "ENH_SHP1,Enhancer sharpness register 1"
|
|
bitfld.long 0x14 16. " SHP_H_ON ,Sharpness On/Off Control" "Off,On"
|
|
hexmask.long.byte 0x14 0.--6. 1. " SHP_H1_CORE ,Active Sharpness Range"
|
|
line.long 0x18 "ENH_SHP2,Enhancer sharpness register 2"
|
|
hexmask.long.byte 0x18 24.--31. 1. " SHP_H1_CLIP_O ,Sharpness Correction Value Clipping"
|
|
hexmask.long.byte 0x18 16.--23. 1. " SHP_H1_CLIP_U ,Sharpness Correction Value Clipping"
|
|
newline
|
|
hexmask.long.byte 0x18 8.--15. 1. " SHP_H1_GAIN_O ,Sharpness Edge Amplitude Value Gain"
|
|
hexmask.long.byte 0x18 0.--7. 1. " SHP_H1_GAIN_U ,Sharpness Edge Amplitude Value Gain"
|
|
line.long 0x1C "ENH_SHP3,Enhancer sharpness register 3"
|
|
bitfld.long 0x1C 16. " SHP_H2_LPF_SEL ,LPF Selection for Folding Prevention before H2 Edge Detection" "Not selected,Selected"
|
|
hexmask.long.byte 0x1C 0.--6. 1. " SHP_H2_CORE ,Active Sharpness Range"
|
|
line.long 0x20 "ENH_SHP4,Enhancer sharpness register 4"
|
|
hexmask.long.byte 0x20 24.--31. 1. " SHP_H2_CLIP_O ,Sharpness Correction Value Clipping (on the Overshoot Side)"
|
|
hexmask.long.byte 0x20 16.--23. 1. " SHP_H2_CLIP_U ,Sharpness Correction Value Clipping (on the Undershoot Side)"
|
|
newline
|
|
hexmask.long.byte 0x20 8.--15. 1. " SHP_H2_GAIN_O ,Sharpness Edge Amplitude Value Gain (on the Overshoot Side)"
|
|
hexmask.long.byte 0x20 0.--7. 1. " SHP_H2_GAIN_U ,Sharpness Edge Amplitude Value Gain (on the Undershoot Side)"
|
|
line.long 0x24 "ENH_SHP5,Enhancer sharpness register 5"
|
|
hexmask.long.byte 0x24 0.--6. 1. " SHP_H3_CORE ,Active Sharpness Range"
|
|
line.long 0x28 "ENH_SHP6,Enhancer sharpness register 6"
|
|
hexmask.long.byte 0x28 24.--31. 1. " SHP_H3_CLIP_O ,Sharpness Correction Value Clipping (on the Overshoot Side)"
|
|
hexmask.long.byte 0x28 16.--23. 1. " SHP_H3_CLIP_U ,Sharpness Correction Value Clipping (on the Undershoot Side)"
|
|
newline
|
|
hexmask.long.byte 0x28 8.--15. 1. " SHP_H3_GAIN_O ,Sharpness Edge Amplitude Value Gain (on the Overshoot Side)"
|
|
hexmask.long.byte 0x28 0.--7. 1. " SHP_H3_GAIN_U ,Sharpness Edge Amplitude Value Gain (on the Undershoot Side)"
|
|
line.long 0x2C "ENH_LTI1,Enhancer LTI register 1"
|
|
bitfld.long 0x2C 31. " LTI_H_ON ,LTI On/Off Control" "Off,On"
|
|
bitfld.long 0x2C 24. " LTI_H2_LPF_SEL ,LPF Selection for Folding Prevention before H2 Edge Detection" "Not selected,Selected"
|
|
newline
|
|
hexmask.long.byte 0x2C 16.--23. 1. " LTI_H2_INC_ZERO ,Median Filter LTI Correction Threshold"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " LTI_H2_GAIN ,LTI Edge Amplitude Value Gain"
|
|
newline
|
|
hexmask.long.byte 0x2C 0.--7. 1. " LTI_H2_CORE ,LTI Coring"
|
|
line.long 0x30 "ENH_LTI2,Enhancer LTI register 2"
|
|
bitfld.long 0x30 24. " LTI_H4_MEDIAN_TAP_SEL ,Median Filter Reference Pixel Select" "Second adjacent,Adjacent"
|
|
hexmask.long.byte 0x30 16.--23. 1. " LTI_H4_INC_ZERO ,Median Filter LTI Correction Threshold"
|
|
newline
|
|
hexmask.long.byte 0x30 8.--15. 1. " LTI_H4_GAIN ,LTI Edge Amplitude Value Gain"
|
|
hexmask.long.byte 0x30 0.--7. 1. " LTI_H4_CORE ,LTI Coring"
|
|
line.long 0x34 "MTX_MODE,Matrix mode register in image quality imprower"
|
|
bitfld.long 0x34 0.--1. " ADJ0_MTX_MD ,Operating Mode" "GBR->GBR,,YCbCr->GBR,?..."
|
|
line.long 0x38 "MTX_YG_ADJ0,Matrix YG control register 0 in image quality improver"
|
|
hexmask.long.word 0x38 16.--23. 1. " ADJ0_MTX_YG ,Gain Adjustment of Cb/B Signal of G Signal Output Signed"
|
|
hexmask.long.word 0x38 0.--10. 1. " ADJ0_MTX_GG ,Gain Adjustment of Cr/R Signal of G Signal Output Signed"
|
|
line.long 0x3C "MTX_YG_ADJ1,Matrix YG control register 1 in image quality improver"
|
|
hexmask.long.word 0x3C 16.--26. 1. " ADJ0_MTX_GB ,Gain Adjustment of Cb/B Signal of G Signal Output Signed"
|
|
hexmask.long.word 0x3C 0.--10. 1. " ADJ0_MTX_GR ,Gain Adjustment of Cr/R Signal of G Signal Output"
|
|
line.long 0x40 "MTX_CBB_ADJ0,Matrix CBB control register 0 in image quality improver"
|
|
hexmask.long.byte 0x40 16.--23. 1. " ADJ0_MTX_B ,B Signal Offset (DC) Adjustment"
|
|
hexmask.long.word 0x40 0.--10. 1. " ADJ0_MTX_BG ,B Signal Offset (DC) Adjustment"
|
|
line.long 0x44 "MTX_CBB_ADJ1,Matrix CBB control register 1 in image quality improver"
|
|
hexmask.long.word 0x44 16.--26. 1. " ADJ0_MTX_BB ,Gain Adjustment of Cb/B Signal of B Signal Output Signed"
|
|
hexmask.long.word 0x44 0.--10. 1. " ADJ0_MTX_BR ,Gain Adjustment of Cr/R Signal of B Signal Output Signed"
|
|
line.long 0x48 "MTX_CRR_ADJ0,Matrix CRR control register 0 in image quality improver"
|
|
hexmask.long.byte 0x48 16.--23. 1. " ADJ0_MTX_R ,R Signal Offset (DC) Adjustment"
|
|
hexmask.long.word 0x48 0.--10. 1. " ADJ0_MTX_RG ,Gain Adjustment of Y/G Signal of R Signal Output Signed"
|
|
line.long 0x4C "MTX_CRR_ADJ1,Matrix CRR control register 1 in image quality improver"
|
|
hexmask.long.word 0x4C 16.--26. 1. " ADJ0_MTX_RB ,Gain Adjustment of Cb/B Signal of R Signal Output Signed"
|
|
hexmask.long.word 0x4C 0.--10. 1. " ADJ0_MTX_RR ,Gain Adjustment of Cr/R Signal of R Signal Output Signed"
|
|
group.long 0x800++0x4F "ADJ0"
|
|
line.long 0x00 "UPDATE,Register update control register in image quality improver"
|
|
eventfld.long 0x00 0. " ADJ1_VEN ,Image Quality Improver Register Update" "Not updated,Updated"
|
|
line.long 0x04 "BKSTR_SET,Black stretch register (image quality improver 0)"
|
|
bitfld.long 0x04 24. " BKSTR_ON ,Black Stretch On/Off Control" "Off,On"
|
|
bitfld.long 0x04 20.--23. " BKSTR_ST ,Black Stretch Start Point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x04 16.--19. " BKSTR_D ,Depth of Black Stretch" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--12. " BKSTR_T1 ,Black Stretch Time Constant (T1)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x04 0.--4. " BKSTR_T2 ,Black Stretch Time Constant (T2)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "ENH_TIM1,Enhancer timing adjustment register 1"
|
|
bitfld.long 0x08 4. " ENH_MD ,Operating Mode" "RGB,YCbCr"
|
|
bitfld.long 0x08 0. " ENH_DISP_ON ,Frame Line Display On/Off of Enhancer-Enabled Area" "Off,On"
|
|
line.long 0x0C "ENH_TIM2,Enhancer timing adjustment register 2"
|
|
hexmask.long.word 0x0C 16.--26. 1. " ENH_HS ,Start Position of Horizontal Valid Image Area in Enhancer-Enabled Area"
|
|
hexmask.long.word 0x0C 0.--10. 1. " ENH_VW ,Width of Vertical Valid Image Area in Enhancer-Enabled Area"
|
|
line.long 0x10 "ENH_TIM3,Enhancer timing adjustment register 3"
|
|
hexmask.long.word 0x10 16.--26. 1. " ENH_HS ,Start Position of Horizontal Valid Image Area in Enhancer-Enabled Area"
|
|
hexmask.long.word 0x10 0.--10. 1. " ENH_HW ,Width of Horizontal Valid Image Area in Enhancer-Enabled Area"
|
|
line.long 0x14 "ENH_SHP1,Enhancer sharpness register 1"
|
|
bitfld.long 0x14 16. " SHP_H_ON ,Sharpness On/Off Control" "Off,On"
|
|
hexmask.long.byte 0x14 0.--6. 1. " SHP_H1_CORE ,Active Sharpness Range"
|
|
line.long 0x18 "ENH_SHP2,Enhancer sharpness register 2"
|
|
hexmask.long.byte 0x18 24.--31. 1. " SHP_H1_CLIP_O ,Sharpness Correction Value Clipping"
|
|
hexmask.long.byte 0x18 16.--23. 1. " SHP_H1_CLIP_U ,Sharpness Correction Value Clipping"
|
|
newline
|
|
hexmask.long.byte 0x18 8.--15. 1. " SHP_H1_GAIN_O ,Sharpness Edge Amplitude Value Gain"
|
|
hexmask.long.byte 0x18 0.--7. 1. " SHP_H1_GAIN_U ,Sharpness Edge Amplitude Value Gain"
|
|
line.long 0x1C "ENH_SHP3,Enhancer sharpness register 3"
|
|
bitfld.long 0x1C 16. " SHP_H2_LPF_SEL ,LPF Selection for Folding Prevention before H2 Edge Detection" "Not selected,Selected"
|
|
hexmask.long.byte 0x1C 0.--6. 1. " SHP_H2_CORE ,Active Sharpness Range"
|
|
line.long 0x20 "ENH_SHP4,Enhancer sharpness register 4"
|
|
hexmask.long.byte 0x20 24.--31. 1. " SHP_H2_CLIP_O ,Sharpness Correction Value Clipping (on the Overshoot Side)"
|
|
hexmask.long.byte 0x20 16.--23. 1. " SHP_H2_CLIP_U ,Sharpness Correction Value Clipping (on the Undershoot Side)"
|
|
newline
|
|
hexmask.long.byte 0x20 8.--15. 1. " SHP_H2_GAIN_O ,Sharpness Edge Amplitude Value Gain (on the Overshoot Side)"
|
|
hexmask.long.byte 0x20 0.--7. 1. " SHP_H2_GAIN_U ,Sharpness Edge Amplitude Value Gain (on the Undershoot Side)"
|
|
line.long 0x24 "ENH_SHP5,Enhancer sharpness register 5"
|
|
hexmask.long.byte 0x24 0.--6. 1. " SHP_H3_CORE ,Active Sharpness Range"
|
|
line.long 0x28 "ENH_SHP6,Enhancer sharpness register 6"
|
|
hexmask.long.byte 0x28 24.--31. 1. " SHP_H3_CLIP_O ,Sharpness Correction Value Clipping (on the Overshoot Side)"
|
|
hexmask.long.byte 0x28 16.--23. 1. " SHP_H3_CLIP_U ,Sharpness Correction Value Clipping (on the Undershoot Side)"
|
|
newline
|
|
hexmask.long.byte 0x28 8.--15. 1. " SHP_H3_GAIN_O ,Sharpness Edge Amplitude Value Gain (on the Overshoot Side)"
|
|
hexmask.long.byte 0x28 0.--7. 1. " SHP_H3_GAIN_U ,Sharpness Edge Amplitude Value Gain (on the Undershoot Side)"
|
|
line.long 0x2C "ENH_LTI1,Enhancer LTI register 1"
|
|
bitfld.long 0x2C 31. " LTI_H_ON ,LTI On/Off Control" "Off,On"
|
|
bitfld.long 0x2C 24. " LTI_H2_LPF_SEL ,LPF Selection for Folding Prevention before H2 Edge Detection" "Not selected,Selected"
|
|
newline
|
|
hexmask.long.byte 0x2C 16.--23. 1. " LTI_H2_INC_ZERO ,Median Filter LTI Correction Threshold"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " LTI_H2_GAIN ,LTI Edge Amplitude Value Gain"
|
|
newline
|
|
hexmask.long.byte 0x2C 0.--7. 1. " LTI_H2_CORE ,LTI Coring"
|
|
line.long 0x30 "ENH_LTI2,Enhancer LTI register 2"
|
|
bitfld.long 0x30 24. " LTI_H4_MEDIAN_TAP_SEL ,Median Filter Reference Pixel Select" "Second adjacent,Adjacent"
|
|
hexmask.long.byte 0x30 16.--23. 1. " LTI_H4_INC_ZERO ,Median Filter LTI Correction Threshold"
|
|
newline
|
|
hexmask.long.byte 0x30 8.--15. 1. " LTI_H4_GAIN ,LTI Edge Amplitude Value Gain"
|
|
hexmask.long.byte 0x30 0.--7. 1. " LTI_H4_CORE ,LTI Coring"
|
|
line.long 0x34 "MTX_MODE,Matrix mode register in image quality imprower"
|
|
bitfld.long 0x34 0.--1. " ADJ1_MTX_MD ,Operating Mode" "GBR->GBR,,YCbCr->GBR,?..."
|
|
line.long 0x38 "MTX_YG_ADJ0,Matrix YG control register 0 in image quality improver"
|
|
hexmask.long.word 0x38 16.--23. 1. " ADJ1_MTX_YG ,Gain Adjustment of Cb/B Signal of G Signal Output Signed"
|
|
hexmask.long.word 0x38 0.--10. 1. " ADJ1_MTX_GG ,Gain Adjustment of Cr/R Signal of G Signal Output Signed"
|
|
line.long 0x3C "MTX_YG_ADJ1,Matrix YG control register 1 in image quality improver"
|
|
hexmask.long.word 0x3C 16.--26. 1. " ADJ1_MTX_GB ,Gain Adjustment of Cb/B Signal of G Signal Output Signed"
|
|
hexmask.long.word 0x3C 0.--10. 1. " ADJ1_MTX_GR ,Gain Adjustment of Cr/R Signal of G Signal Output"
|
|
line.long 0x40 "MTX_CBB_ADJ0,Matrix CBB control register 0 in image quality improver"
|
|
hexmask.long.byte 0x40 16.--23. 1. " ADJ1_MTX_B ,B Signal Offset (DC) Adjustment"
|
|
hexmask.long.word 0x40 0.--10. 1. " ADJ1_MTX_BG ,B Signal Offset (DC) Adjustment"
|
|
line.long 0x44 "MTX_CBB_ADJ1,Matrix CBB control register 1 in image quality improver"
|
|
hexmask.long.word 0x44 16.--26. 1. " ADJ1_MTX_BB ,Gain Adjustment of Cb/B Signal of B Signal Output Signed"
|
|
hexmask.long.word 0x44 0.--10. 1. " ADJ1_MTX_BR ,Gain Adjustment of Cr/R Signal of B Signal Output Signed"
|
|
line.long 0x48 "MTX_CRR_ADJ0,Matrix CRR control register 0 in image quality improver"
|
|
hexmask.long.byte 0x48 16.--23. 1. " ADJ1_MTX_R ,R Signal Offset (DC) Adjustment"
|
|
hexmask.long.word 0x48 0.--10. 1. " ADJ1_MTX_RG ,Gain Adjustment of Y/G Signal of R Signal Output Signed"
|
|
line.long 0x4C "MTX_CRR_ADJ1,Matrix CRR control register 1 in image quality improver"
|
|
hexmask.long.word 0x4C 16.--26. 1. " ADJ1_MTX_RB ,Gain Adjustment of Cb/B Signal of R Signal Output Signed"
|
|
hexmask.long.word 0x4C 0.--10. 1. " ADJ1_MTX_RR ,Gain Adjustment of Cr/R Signal of R Signal Output Signed"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0xFCFF9680
|
|
width 14.
|
|
group.long 0x0++0x4F "ADJ0"
|
|
line.long 0x00 "UPDATE,Register update control register in image quality improver"
|
|
eventfld.long 0x00 0. " ADJ0_VEN ,Image Quality Improver Register Update" "Not updated,Updated"
|
|
line.long 0x04 "BKSTR_SET,Black stretch register (image quality improver 0)"
|
|
bitfld.long 0x04 24. " BKSTR_ON ,Black Stretch On/Off Control" "Off,On"
|
|
bitfld.long 0x04 20.--23. " BKSTR_ST ,Black Stretch Start Point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x04 16.--19. " BKSTR_D ,Depth of Black Stretch" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--12. " BKSTR_T1 ,Black Stretch Time Constant (T1)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x04 0.--4. " BKSTR_T2 ,Black Stretch Time Constant (T2)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "ENH_TIM1,Enhancer timing adjustment register 1"
|
|
bitfld.long 0x08 4. " ENH_MD ,Operating Mode" "RGB,YCbCr"
|
|
bitfld.long 0x08 0. " ENH_DISP_ON ,Frame Line Display On/Off of Enhancer-Enabled Area" "Off,On"
|
|
line.long 0x0C "ENH_TIM2,Enhancer timing adjustment register 2"
|
|
hexmask.long.word 0x0C 16.--26. 1. " ENH_HS ,Start Position of Horizontal Valid Image Area in Enhancer-Enabled Area"
|
|
hexmask.long.word 0x0C 0.--10. 1. " ENH_VW ,Width of Vertical Valid Image Area in Enhancer-Enabled Area"
|
|
line.long 0x10 "ENH_TIM3,Enhancer timing adjustment register 3"
|
|
hexmask.long.word 0x10 16.--26. 1. " ENH_HS ,Start Position of Horizontal Valid Image Area in Enhancer-Enabled Area"
|
|
hexmask.long.word 0x10 0.--10. 1. " ENH_HW ,Width of Horizontal Valid Image Area in Enhancer-Enabled Area"
|
|
line.long 0x14 "ENH_SHP1,Enhancer sharpness register 1"
|
|
bitfld.long 0x14 16. " SHP_H_ON ,Sharpness On/Off Control" "Off,On"
|
|
hexmask.long.byte 0x14 0.--6. 1. " SHP_H1_CORE ,Active Sharpness Range"
|
|
line.long 0x18 "ENH_SHP2,Enhancer sharpness register 2"
|
|
hexmask.long.byte 0x18 24.--31. 1. " SHP_H1_CLIP_O ,Sharpness Correction Value Clipping"
|
|
hexmask.long.byte 0x18 16.--23. 1. " SHP_H1_CLIP_U ,Sharpness Correction Value Clipping"
|
|
newline
|
|
hexmask.long.byte 0x18 8.--15. 1. " SHP_H1_GAIN_O ,Sharpness Edge Amplitude Value Gain"
|
|
hexmask.long.byte 0x18 0.--7. 1. " SHP_H1_GAIN_U ,Sharpness Edge Amplitude Value Gain"
|
|
line.long 0x1C "ENH_SHP3,Enhancer sharpness register 3"
|
|
bitfld.long 0x1C 16. " SHP_H2_LPF_SEL ,LPF Selection for Folding Prevention before H2 Edge Detection" "Not selected,Selected"
|
|
hexmask.long.byte 0x1C 0.--6. 1. " SHP_H2_CORE ,Active Sharpness Range"
|
|
line.long 0x20 "ENH_SHP4,Enhancer sharpness register 4"
|
|
hexmask.long.byte 0x20 24.--31. 1. " SHP_H2_CLIP_O ,Sharpness Correction Value Clipping (on the Overshoot Side)"
|
|
hexmask.long.byte 0x20 16.--23. 1. " SHP_H2_CLIP_U ,Sharpness Correction Value Clipping (on the Undershoot Side)"
|
|
newline
|
|
hexmask.long.byte 0x20 8.--15. 1. " SHP_H2_GAIN_O ,Sharpness Edge Amplitude Value Gain (on the Overshoot Side)"
|
|
hexmask.long.byte 0x20 0.--7. 1. " SHP_H2_GAIN_U ,Sharpness Edge Amplitude Value Gain (on the Undershoot Side)"
|
|
line.long 0x24 "ENH_SHP5,Enhancer sharpness register 5"
|
|
hexmask.long.byte 0x24 0.--6. 1. " SHP_H3_CORE ,Active Sharpness Range"
|
|
line.long 0x28 "ENH_SHP6,Enhancer sharpness register 6"
|
|
hexmask.long.byte 0x28 24.--31. 1. " SHP_H3_CLIP_O ,Sharpness Correction Value Clipping (on the Overshoot Side)"
|
|
hexmask.long.byte 0x28 16.--23. 1. " SHP_H3_CLIP_U ,Sharpness Correction Value Clipping (on the Undershoot Side)"
|
|
newline
|
|
hexmask.long.byte 0x28 8.--15. 1. " SHP_H3_GAIN_O ,Sharpness Edge Amplitude Value Gain (on the Overshoot Side)"
|
|
hexmask.long.byte 0x28 0.--7. 1. " SHP_H3_GAIN_U ,Sharpness Edge Amplitude Value Gain (on the Undershoot Side)"
|
|
line.long 0x2C "ENH_LTI1,Enhancer LTI register 1"
|
|
bitfld.long 0x2C 31. " LTI_H_ON ,LTI On/Off Control" "Off,On"
|
|
bitfld.long 0x2C 24. " LTI_H2_LPF_SEL ,LPF Selection for Folding Prevention before H2 Edge Detection" "Not selected,Selected"
|
|
newline
|
|
hexmask.long.byte 0x2C 16.--23. 1. " LTI_H2_INC_ZERO ,Median Filter LTI Correction Threshold"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " LTI_H2_GAIN ,LTI Edge Amplitude Value Gain"
|
|
newline
|
|
hexmask.long.byte 0x2C 0.--7. 1. " LTI_H2_CORE ,LTI Coring"
|
|
line.long 0x30 "ENH_LTI2,Enhancer LTI register 2"
|
|
bitfld.long 0x30 24. " LTI_H4_MEDIAN_TAP_SEL ,Median Filter Reference Pixel Select" "Second adjacent,Adjacent"
|
|
hexmask.long.byte 0x30 16.--23. 1. " LTI_H4_INC_ZERO ,Median Filter LTI Correction Threshold"
|
|
newline
|
|
hexmask.long.byte 0x30 8.--15. 1. " LTI_H4_GAIN ,LTI Edge Amplitude Value Gain"
|
|
hexmask.long.byte 0x30 0.--7. 1. " LTI_H4_CORE ,LTI Coring"
|
|
line.long 0x34 "MTX_MODE,Matrix mode register in image quality imprower"
|
|
bitfld.long 0x34 0.--1. " ADJ0_MTX_MD ,Operating Mode" "GBR->GBR,,YCbCr->GBR,?..."
|
|
line.long 0x38 "MTX_YG_ADJ0,Matrix YG control register 0 in image quality improver"
|
|
hexmask.long.word 0x38 16.--23. 1. " ADJ0_MTX_YG ,Gain Adjustment of Cb/B Signal of G Signal Output Signed"
|
|
hexmask.long.word 0x38 0.--10. 1. " ADJ0_MTX_GG ,Gain Adjustment of Cr/R Signal of G Signal Output Signed"
|
|
line.long 0x3C "MTX_YG_ADJ1,Matrix YG control register 1 in image quality improver"
|
|
hexmask.long.word 0x3C 16.--26. 1. " ADJ0_MTX_GB ,Gain Adjustment of Cb/B Signal of G Signal Output Signed"
|
|
hexmask.long.word 0x3C 0.--10. 1. " ADJ0_MTX_GR ,Gain Adjustment of Cr/R Signal of G Signal Output"
|
|
line.long 0x40 "MTX_CBB_ADJ0,Matrix CBB control register 0 in image quality improver"
|
|
hexmask.long.byte 0x40 16.--23. 1. " ADJ0_MTX_B ,B Signal Offset (DC) Adjustment"
|
|
hexmask.long.word 0x40 0.--10. 1. " ADJ0_MTX_BG ,B Signal Offset (DC) Adjustment"
|
|
line.long 0x44 "MTX_CBB_ADJ1,Matrix CBB control register 1 in image quality improver"
|
|
hexmask.long.word 0x44 16.--26. 1. " ADJ0_MTX_BB ,Gain Adjustment of Cb/B Signal of B Signal Output Signed"
|
|
hexmask.long.word 0x44 0.--10. 1. " ADJ0_MTX_BR ,Gain Adjustment of Cr/R Signal of B Signal Output Signed"
|
|
line.long 0x48 "MTX_CRR_ADJ0,Matrix CRR control register 0 in image quality improver"
|
|
hexmask.long.byte 0x48 16.--23. 1. " ADJ0_MTX_R ,R Signal Offset (DC) Adjustment"
|
|
hexmask.long.word 0x48 0.--10. 1. " ADJ0_MTX_RG ,Gain Adjustment of Y/G Signal of R Signal Output Signed"
|
|
line.long 0x4C "MTX_CRR_ADJ1,Matrix CRR control register 1 in image quality improver"
|
|
hexmask.long.word 0x4C 16.--26. 1. " ADJ0_MTX_RB ,Gain Adjustment of Cb/B Signal of R Signal Output Signed"
|
|
hexmask.long.word 0x4C 0.--10. 1. " ADJ0_MTX_RR ,Gain Adjustment of Cr/R Signal of R Signal Output Signed"
|
|
group.long 0x800++0x4F "ADJ0"
|
|
line.long 0x00 "UPDATE,Register update control register in image quality improver"
|
|
eventfld.long 0x00 0. " ADJ1_VEN ,Image Quality Improver Register Update" "Not updated,Updated"
|
|
line.long 0x04 "BKSTR_SET,Black stretch register (image quality improver 0)"
|
|
bitfld.long 0x04 24. " BKSTR_ON ,Black Stretch On/Off Control" "Off,On"
|
|
bitfld.long 0x04 20.--23. " BKSTR_ST ,Black Stretch Start Point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x04 16.--19. " BKSTR_D ,Depth of Black Stretch" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--12. " BKSTR_T1 ,Black Stretch Time Constant (T1)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x04 0.--4. " BKSTR_T2 ,Black Stretch Time Constant (T2)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "ENH_TIM1,Enhancer timing adjustment register 1"
|
|
bitfld.long 0x08 4. " ENH_MD ,Operating Mode" "RGB,YCbCr"
|
|
bitfld.long 0x08 0. " ENH_DISP_ON ,Frame Line Display On/Off of Enhancer-Enabled Area" "Off,On"
|
|
line.long 0x0C "ENH_TIM2,Enhancer timing adjustment register 2"
|
|
hexmask.long.word 0x0C 16.--26. 1. " ENH_HS ,Start Position of Horizontal Valid Image Area in Enhancer-Enabled Area"
|
|
hexmask.long.word 0x0C 0.--10. 1. " ENH_VW ,Width of Vertical Valid Image Area in Enhancer-Enabled Area"
|
|
line.long 0x10 "ENH_TIM3,Enhancer timing adjustment register 3"
|
|
hexmask.long.word 0x10 16.--26. 1. " ENH_HS ,Start Position of Horizontal Valid Image Area in Enhancer-Enabled Area"
|
|
hexmask.long.word 0x10 0.--10. 1. " ENH_HW ,Width of Horizontal Valid Image Area in Enhancer-Enabled Area"
|
|
line.long 0x14 "ENH_SHP1,Enhancer sharpness register 1"
|
|
bitfld.long 0x14 16. " SHP_H_ON ,Sharpness On/Off Control" "Off,On"
|
|
hexmask.long.byte 0x14 0.--6. 1. " SHP_H1_CORE ,Active Sharpness Range"
|
|
line.long 0x18 "ENH_SHP2,Enhancer sharpness register 2"
|
|
hexmask.long.byte 0x18 24.--31. 1. " SHP_H1_CLIP_O ,Sharpness Correction Value Clipping"
|
|
hexmask.long.byte 0x18 16.--23. 1. " SHP_H1_CLIP_U ,Sharpness Correction Value Clipping"
|
|
newline
|
|
hexmask.long.byte 0x18 8.--15. 1. " SHP_H1_GAIN_O ,Sharpness Edge Amplitude Value Gain"
|
|
hexmask.long.byte 0x18 0.--7. 1. " SHP_H1_GAIN_U ,Sharpness Edge Amplitude Value Gain"
|
|
line.long 0x1C "ENH_SHP3,Enhancer sharpness register 3"
|
|
bitfld.long 0x1C 16. " SHP_H2_LPF_SEL ,LPF Selection for Folding Prevention before H2 Edge Detection" "Not selected,Selected"
|
|
hexmask.long.byte 0x1C 0.--6. 1. " SHP_H2_CORE ,Active Sharpness Range"
|
|
line.long 0x20 "ENH_SHP4,Enhancer sharpness register 4"
|
|
hexmask.long.byte 0x20 24.--31. 1. " SHP_H2_CLIP_O ,Sharpness Correction Value Clipping (on the Overshoot Side)"
|
|
hexmask.long.byte 0x20 16.--23. 1. " SHP_H2_CLIP_U ,Sharpness Correction Value Clipping (on the Undershoot Side)"
|
|
newline
|
|
hexmask.long.byte 0x20 8.--15. 1. " SHP_H2_GAIN_O ,Sharpness Edge Amplitude Value Gain (on the Overshoot Side)"
|
|
hexmask.long.byte 0x20 0.--7. 1. " SHP_H2_GAIN_U ,Sharpness Edge Amplitude Value Gain (on the Undershoot Side)"
|
|
line.long 0x24 "ENH_SHP5,Enhancer sharpness register 5"
|
|
hexmask.long.byte 0x24 0.--6. 1. " SHP_H3_CORE ,Active Sharpness Range"
|
|
line.long 0x28 "ENH_SHP6,Enhancer sharpness register 6"
|
|
hexmask.long.byte 0x28 24.--31. 1. " SHP_H3_CLIP_O ,Sharpness Correction Value Clipping (on the Overshoot Side)"
|
|
hexmask.long.byte 0x28 16.--23. 1. " SHP_H3_CLIP_U ,Sharpness Correction Value Clipping (on the Undershoot Side)"
|
|
newline
|
|
hexmask.long.byte 0x28 8.--15. 1. " SHP_H3_GAIN_O ,Sharpness Edge Amplitude Value Gain (on the Overshoot Side)"
|
|
hexmask.long.byte 0x28 0.--7. 1. " SHP_H3_GAIN_U ,Sharpness Edge Amplitude Value Gain (on the Undershoot Side)"
|
|
line.long 0x2C "ENH_LTI1,Enhancer LTI register 1"
|
|
bitfld.long 0x2C 31. " LTI_H_ON ,LTI On/Off Control" "Off,On"
|
|
bitfld.long 0x2C 24. " LTI_H2_LPF_SEL ,LPF Selection for Folding Prevention before H2 Edge Detection" "Not selected,Selected"
|
|
newline
|
|
hexmask.long.byte 0x2C 16.--23. 1. " LTI_H2_INC_ZERO ,Median Filter LTI Correction Threshold"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " LTI_H2_GAIN ,LTI Edge Amplitude Value Gain"
|
|
newline
|
|
hexmask.long.byte 0x2C 0.--7. 1. " LTI_H2_CORE ,LTI Coring"
|
|
line.long 0x30 "ENH_LTI2,Enhancer LTI register 2"
|
|
bitfld.long 0x30 24. " LTI_H4_MEDIAN_TAP_SEL ,Median Filter Reference Pixel Select" "Second adjacent,Adjacent"
|
|
hexmask.long.byte 0x30 16.--23. 1. " LTI_H4_INC_ZERO ,Median Filter LTI Correction Threshold"
|
|
newline
|
|
hexmask.long.byte 0x30 8.--15. 1. " LTI_H4_GAIN ,LTI Edge Amplitude Value Gain"
|
|
hexmask.long.byte 0x30 0.--7. 1. " LTI_H4_CORE ,LTI Coring"
|
|
line.long 0x34 "MTX_MODE,Matrix mode register in image quality imprower"
|
|
bitfld.long 0x34 0.--1. " ADJ1_MTX_MD ,Operating Mode" "GBR->GBR,,YCbCr->GBR,?..."
|
|
line.long 0x38 "MTX_YG_ADJ0,Matrix YG control register 0 in image quality improver"
|
|
hexmask.long.word 0x38 16.--23. 1. " ADJ1_MTX_YG ,Gain Adjustment of Cb/B Signal of G Signal Output Signed"
|
|
hexmask.long.word 0x38 0.--10. 1. " ADJ1_MTX_GG ,Gain Adjustment of Cr/R Signal of G Signal Output Signed"
|
|
line.long 0x3C "MTX_YG_ADJ1,Matrix YG control register 1 in image quality improver"
|
|
hexmask.long.word 0x3C 16.--26. 1. " ADJ1_MTX_GB ,Gain Adjustment of Cb/B Signal of G Signal Output Signed"
|
|
hexmask.long.word 0x3C 0.--10. 1. " ADJ1_MTX_GR ,Gain Adjustment of Cr/R Signal of G Signal Output"
|
|
line.long 0x40 "MTX_CBB_ADJ0,Matrix CBB control register 0 in image quality improver"
|
|
hexmask.long.byte 0x40 16.--23. 1. " ADJ1_MTX_B ,B Signal Offset (DC) Adjustment"
|
|
hexmask.long.word 0x40 0.--10. 1. " ADJ1_MTX_BG ,B Signal Offset (DC) Adjustment"
|
|
line.long 0x44 "MTX_CBB_ADJ1,Matrix CBB control register 1 in image quality improver"
|
|
hexmask.long.word 0x44 16.--26. 1. " ADJ1_MTX_BB ,Gain Adjustment of Cb/B Signal of B Signal Output Signed"
|
|
hexmask.long.word 0x44 0.--10. 1. " ADJ1_MTX_BR ,Gain Adjustment of Cr/R Signal of B Signal Output Signed"
|
|
line.long 0x48 "MTX_CRR_ADJ0,Matrix CRR control register 0 in image quality improver"
|
|
hexmask.long.byte 0x48 16.--23. 1. " ADJ1_MTX_R ,R Signal Offset (DC) Adjustment"
|
|
hexmask.long.word 0x48 0.--10. 1. " ADJ1_MTX_RG ,Gain Adjustment of Y/G Signal of R Signal Output Signed"
|
|
line.long 0x4C "MTX_CRR_ADJ1,Matrix CRR control register 1 in image quality improver"
|
|
hexmask.long.word 0x4C 16.--26. 1. " ADJ1_MTX_RB ,Gain Adjustment of Cb/B Signal of R Signal Output Signed"
|
|
hexmask.long.word 0x4C 0.--10. 1. " ADJ1_MTX_RR ,Gain Adjustment of Cr/R Signal of R Signal Output Signed"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "IS (Video Display Controller5 : Image Synthesizer)"
|
|
tree "Channel 0"
|
|
base ad:0xFCFF7700
|
|
width 14.
|
|
tree "Graphics 2 Process"
|
|
group.long 0x00++0x53
|
|
line.long 0x00 "GR2_UPDATE,Graphics 2 register update control register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
eventfld.long 0x00 8. " GR2_UPDATE ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 4. " GR2_P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
else
|
|
eventfld.long 0x00 4. " GR2_P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
endif
|
|
newline
|
|
eventfld.long 0x00 0. " GR2_IBUS_VEN ,Frame Buffer Read Register Update" "Not updated,Updated"
|
|
line.long 0x04 "GR2_FLM_RD,Frame Buffer Read Control Register (Graphics 2)"
|
|
bitfld.long 0x04 0. " GR2_R_ENB ,Frame Buffer Read Enable" "Disabled,Enabled"
|
|
line.long 0x08 "GR2_FLM1,Frame Buffer Control Register 1"
|
|
bitfld.long 0x08 16. " GR2_LN_OFF_DIR ,Selects the line offset address direction of the frame buffer" "Increment,Decrement"
|
|
bitfld.long 0x08 8.--9. " GR2_FLM_SEL ,Selects a frame buffer address setting signal" "Frame 0,GR2_FLM_NUM,Frame 0,?..."
|
|
newline
|
|
bitfld.long 0x08 0. " GR2_BST_MD ,Frame Buffer Burst Transfer Mode" "32-byte,128-byte"
|
|
line.long 0x0C "GR2_FLM2,Frame Buffer Control Register 2 - Base Address (upper)"
|
|
line.long 0x10 "GR2_FLM3,Frame Buffer Control Register 3"
|
|
hexmask.long.word 0x10 16.--30. 0x01 " GR2_LN_OFF ,Frame Buffer Line Offset Address"
|
|
hexmask.long.word 0x10 0.--9. 0x01 " GR2_FLM_NUM ,Frame Number of Frame Buffer"
|
|
line.long 0x14 "GR2_FLM4,Frame Buffer Control Register 4"
|
|
hexmask.long.tbyte 0x14 0.--22. 1. " GR2_FLM_OFF ,Frame Buffer Frame Offset Address (upper)"
|
|
line.long 0x18 "GR2_FLM5,Frame Buffer Control Register 5"
|
|
hexmask.long.word 0x18 16.--26. 1. " GR2_FLM_LNUM ,Sets number of lines in a frame"
|
|
hexmask.long.word 0x18 0.--10. 1. " GR2_FLM_LOOP ,Number of lines when reading the addresses repeatedly by returning to the start address after reaching the end address"
|
|
line.long 0x1C "GR2_FLM6,Frame Buffer Control Register 6"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x1C 28.--31. " GR2_FORMAT ,Sets the format of the frame buffer read signal" "RGB565,RGB888,AlphaRGB1555,AlphaRGB4444,AlphaRGB8888,CLUT8,CLUT4,CLUT1,,,RGBalpha5551,RGBalpha8888,?..."
|
|
hexmask.long.word 0x1C 16.--26. 1. " GR2_HW ,Sets the width of the horizontal valid period"
|
|
newline
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x1C 10.--12. " GR2_RDSWA[2:0] ,8-Bit 16-Bit or 32-Bit Swap Setting" "Not swapped,8-bit,16-bit,16-bit+8-bit,32-bit,32-bit+8-bit,32-bit+16-bit,32-bit+16-bit+8-bit"
|
|
else
|
|
bitfld.long 0x1C 12. " GR2_RDSWA2 ,32-bit swap" "Not swapped,Swapped"
|
|
bitfld.long 0x1C 11. " GR2_RDSWA1 ,16-bit swap" "Not swapped,Swapped"
|
|
newline
|
|
bitfld.long 0x1C 10. " GR2_RDSWA0 ,8-bit swap" "Not swapped,Swapped"
|
|
endif
|
|
else
|
|
bitfld.long 0x1C 28.--31. " GR2_FORMAT ,Sets the format of the frame buffer read signal" "RGB565,RGB888,AlphaRGB1555,AlphaRGB4444,AlphaRGB8888,CLUT8,CLUT4,CLUT1,?..."
|
|
hexmask.long.word 0x1C 16.--26. 1. " GR2_HW ,Sets the width of the horizontal valid period"
|
|
newline
|
|
bitfld.long 0x1C 12. " GR2_ENDIAN_ON ,Turns on/off the endian control of data read from buffer" "Off,On"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x1C 0.--5. 1. " GR2_STA_POS ,Sets the amount of data to be skipped through"
|
|
line.long 0x20 "GR2_AB1,Alpha Blending Control Register 1"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x20 15. " GR2_ARC_MUL ,Turns on/off multiplication processing with current alpha at alpha blending in a rectangular area" "Off,On"
|
|
bitfld.long 0x20 14. " GR2_ACALC_MD ,Turns on/off premultiplication processing at alpha blending in one-pixel units" "Off,On"
|
|
newline
|
|
endif
|
|
bitfld.long 0x20 12. " G2_ARC_ON ,Turns on/off alpha blending in a rectangular area" "Off,On"
|
|
bitfld.long 0x20 8. " GR2_ARC_DISP_ON ,Turns on/off frame-line display of the image area for alpha blending in a rectangular area" "Off,On"
|
|
newline
|
|
bitfld.long 0x20 4. " GR2_GRC_DISP_ON ,Turns on/off frame-line display of the graphics image area" "Off,On"
|
|
bitfld.long 0x20 0.--1. " GR2_DISP_SEL ,Selects the graphics display mode" "Background,Lower-layer,Current,Blended"
|
|
line.long 0x24 "GR2_AB2,Alpha Blending Control Register 2"
|
|
hexmask.long.word 0x24 16.--26. 1. " GR2_GRC_VS ,Sets the vertical start position of the graphics image area"
|
|
hexmask.long.word 0x24 0.--10. 1. " GR2_GRC_VW ,Sets the vertical width of the graphics image area"
|
|
line.long 0x28 "GR2_AB3,Alpha Blending Control Register 3"
|
|
hexmask.long.word 0x28 16.--26. 1. " GR2_GRC_HS ,Sets the horizontal start position of the graphics image area"
|
|
hexmask.long.word 0x28 0.--10. 1. " GR2_GRC_HW ,Sets the horizontal width of the graphics image area"
|
|
line.long 0x2C "GR2_AB4,Alpha Blending Control Register 4"
|
|
hexmask.long.word 0x2C 16.--26. 1. " GR2_ARC_VS ,Sets the vertical start position of the valid image area for alpha blending in a rectangular area"
|
|
hexmask.long.word 0x2C 0.--10. 1. " GR2_ARC_VW ,Sets the vertical width of the valid image area for alpha blending in a rectangular area"
|
|
line.long 0x30 "GR2_AB5,Alpha Blending Control Register 5 (Graphics 2)"
|
|
hexmask.long.word 0x30 16.--26. 1. " GR2_ARC_HS ,Sets the horizontal start position of the valid image area for alpha blending in a rectangular area"
|
|
hexmask.long.word 0x30 0.--10. 1. " GR2_ARC_HW ,Sets the horizontal width of the valid image area for alpha blending in a rectangular area"
|
|
line.long 0x34 "GR2_AB6,Alpha Blending Control Register 6 (Graphics 2)"
|
|
bitfld.long 0x34 24. " GR2_ARC_MODE ,Alpha Blending Mode in Rectangular Area" "Addition,Subtraction"
|
|
hexmask.long.byte 0x34 16.--23. 1. " GR2_ARC_COEF ,Sets the alpha coefficient for alpha blending in a rectangular area"
|
|
newline
|
|
hexmask.long.byte 0x34 0.--7. 1. " GR2_ARC_RATE ,Sets the value obtained by subtracting 1 from the frame rate for alpha blending in a rectangular area"
|
|
line.long 0x38 "GR2_AB7,Alpha Blending Control Register 7"
|
|
hexmask.long.byte 0x38 16.--23. 1. " GR2_ARC_DEF ,Sets the initial alpha value for alpha blending in a rectangular area"
|
|
bitfld.long 0x38 0. " GR2_CK_ON ,Turns on/off CLUT-index/RGB-index chroma-key processing" "Off,On"
|
|
line.long 0x3C "GR2_AB8,Alpha Blending Control Register 8"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " GR2_CK_KCLUT ,CLUT Signal for CLUT-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " GR2_CK_KG ,G Signal for RGB-Index Chroma-Key Processing"
|
|
newline
|
|
hexmask.long.byte 0x3C 8.--15. 1. " GR2_CK_KB ,B Signal for RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " GR2_CK_KR ,R Signal for RGB-Index Chroma-Key Processing"
|
|
line.long 0x40 "GR2_AB9,Alpha Blending Control Register 9 (Graphics 2)"
|
|
hexmask.long.byte 0x40 24.--31. 1. " GR2_CK_A ,Replaced Alpha Signal after RGB/CLUT-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x40 16.--23. 1. " GR2_CK_G ,Replaced G Signal after RGB/CLUT-Index Chroma-Key Processing"
|
|
newline
|
|
hexmask.long.byte 0x40 8.--15. 1. " GR2_CK_B ,Replaced B Signal after RGB/CLUT-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x40 0.--7. 1. " GR2_CK_R ,Replaced R Signal after RGB/CLUT-Index Chroma-Key Processing"
|
|
line.long 0x44 "GR2_AB10,Alpha Blending Control Register 10"
|
|
hexmask.long.byte 0x44 24.--31. 1. " GR2_A0 ,CLUT1 alpha0 Signal"
|
|
hexmask.long.byte 0x44 16.--23. 1. " GR2_G0 ,CLUT1 G0 Signal"
|
|
newline
|
|
hexmask.long.byte 0x44 8.--15. 1. " GR2_B0 ,CLUT1 B0 Signal"
|
|
hexmask.long.byte 0x44 0.--7. 1. " GR2_R0 ,CLUT1 R0 Signal"
|
|
line.long 0x48 "GR2_AB11,Alpha Blending Control Register 11"
|
|
hexmask.long.byte 0x48 24.--31. 1. " GR2_A1 ,CLUT1 alpha1 Signal"
|
|
hexmask.long.byte 0x48 16.--23. 1. " GR2_G1 ,CLUT1 G1 Signal"
|
|
newline
|
|
hexmask.long.byte 0x48 8.--15. 1. " GR2_B1 ,CLUT1 B1 Signal"
|
|
hexmask.long.byte 0x48 0.--7. 1. " GR2_R1 ,CLUT1 R1 Signal"
|
|
line.long 0x4C "GR2_BASE,Background Color Control Register (Graphics 2)"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " GR2_BASE_G ,Background Color G Signal"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " GR2_BASE_B ,Background Color B Signal"
|
|
newline
|
|
hexmask.long.byte 0x4C 0.--7. 1. " GR2_BASE_R ,Background Color R Signal"
|
|
line.long 0x50 "GR2_CLUT,CLUT Table Control Register (Graphics 2)"
|
|
bitfld.long 0x50 16. " GR2_CLT_SEL ,CLUT Table Select Signal" "Table 0,Table 1"
|
|
rgroup.long 0x54++0x3
|
|
line.long 0x00 "GR2_MON,Status Monitor Register (Graphics 2)"
|
|
bitfld.long 0x00 0. " GR2_ARC_ST ,Status Flag for Alpha Blending in Rectangular Area" "Completed,In progress"
|
|
tree.end
|
|
tree "Graphics 3 Process"
|
|
group.long 0x80++0x53
|
|
line.long 0x00 "GR3_UPDATE,Graphics 3 Register Update Control Register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
eventfld.long 0x00 8. " GR3_UPDATE ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 4. " GR3_P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
else
|
|
eventfld.long 0x00 4. " GR3_P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
endif
|
|
newline
|
|
eventfld.long 0x00 0. " GR3_IBUS_VEN ,Frame Buffer Read Register Update" "Not updated,Updated"
|
|
line.long 0x04 "GR3_FLM_RD,Frame Buffer Read Control Register (Graphics 3)"
|
|
bitfld.long 0x04 0. " GR3_R_ENB ,Frame Buffer Read Enable" "Disabled,Enabled"
|
|
line.long 0x08 "GR3_FLM1,Frame Buffer Control Register 1 (Graphics 3)"
|
|
bitfld.long 0x08 16. " GR3_LN_OFF_DIR ,Selects the line offset address direction of the frame buffer" "Increment,Decrement"
|
|
bitfld.long 0x08 8.--9. " GR3_FLM_SEL ,Selects a frame buffer address setting signal" "Frame 0,GR3_FLM_NUM,Frame 0,?..."
|
|
newline
|
|
bitfld.long 0x08 0. " GR3_BST_MD ,Frame Buffer Burst Transfer Mode" "32-byte,128-byte"
|
|
line.long 0x0C "GR3_FLM2,Frame Buffer Control Register 2 (Graphics 3)"
|
|
line.long 0x10 "GR3_FLM3,Frame Buffer Control Register 3 (Graphics 3)"
|
|
hexmask.long.word 0x10 16.--30. 1. " GR3_LN_OFF ,Frame Buffer Line Offset Address"
|
|
hexmask.long.word 0x10 0.--9. 1. " GR3_FLM_NUM ,Frame Number of Frame Buffer"
|
|
line.long 0x14 "GR3_FLM4,Frame Buffer Control Register 4 (Graphics 3)"
|
|
hexmask.long.tbyte 0x14 0.--22. 1. " GR3_FLM_OFF ,Frame Buffer Frame Offset Address"
|
|
line.long 0x18 "GR3_FLM5,Frame Buffer Control Register 5 (Graphics 3)"
|
|
hexmask.long.word 0x18 16.--26. 1. " GR3_FLM_LNUM ,Sets number of lines in a frame"
|
|
hexmask.long.word 0x18 0.--10. 1. " GR3_FLM_LOOP ,Number of lines when reading the addresses repeatedly by returning to the start address after reaching the end address"
|
|
line.long 0x1C "GR3_FLM6,Frame Buffer Control Register 6 (Graphics 3)"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x1C 28.--31. " GR3_FORMAT ,Sets the format of the frame buffer read signal" "RGB565,RGB888,AlphaRGB1555,AlphaRGB4444,AlphaRGB8888,CLUT8,CLUT4,CLUT1,,,RGBalpha5551,RGBalpha8888,?..."
|
|
hexmask.long.word 0x1C 16.--26. 1. " GR3_HW ,Sets the width of the horizontal valid period"
|
|
newline
|
|
bitfld.long 0x1C 12. " GR3_RDSWA2 ,32-bit swap" "Not swapped,Swapped"
|
|
bitfld.long 0x1C 11. " GR3_RDSWA1 ,16-bit swap" "Not swapped,Swapped"
|
|
newline
|
|
bitfld.long 0x1C 10. " GR3_RDSWA0 ,8-bit swap" "Not swapped,Swapped"
|
|
bitfld.long 0x1C 0.--5. " GR3_STA_POS ,Sets the amount of data to be skipped through" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
bitfld.long 0x1C 28.--31. " GR3_FORMAT ,Sets the format of the frame buffer read signal" "RGB565,RGB888,AlphaRGB1555,AlphaRGB4444,AlphaRGB8888,CLUT8,CLUT4,CLUT1,?..."
|
|
hexmask.long.word 0x1C 16.--26. 1. " GR3_HW ,Sets the width of the horizontal valid period"
|
|
newline
|
|
bitfld.long 0x1C 12. " GR3_ENDIAN_ON ,Endian on" "Off,On"
|
|
bitfld.long 0x1C 0.--5. " GR3_STA_POS ,Sets the amount of data to be skipped through" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
line.long 0x20 "GR3_AB1,Alpha Blending Control Register 1 (Graphics 3)"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x20 15. " GR3_ARC_MUL ,Turns on/off multiplication processing with current alpha at alpha blending in a rectangular area" "Off,On"
|
|
bitfld.long 0x20 14. " GR3_ACALC_MD ,Turns on/off premultiplication processing at alpha blending in one-pixel units" "Off,On"
|
|
newline
|
|
bitfld.long 0x20 12. " GR3_ARC_ON ,Turns on/off alpha blending in a rectangular area" "Off,On"
|
|
newline
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x20 8. " GR3_ARC_DISP_ON ,Turns on/off frame-line display of the image area for alpha blending" "Off,On"
|
|
newline
|
|
bitfld.long 0x20 4. " GR3_GRC_DISP_ON ,Turns on/off frame-line display of the graphics image area" "Off,On"
|
|
else
|
|
bitfld.long 0x20 8. " GR3_GRC_DISP_ON ,Turns on/off frame-line display of the graphics image area" "Off,On"
|
|
endif
|
|
else
|
|
bitfld.long 0x20 12. " GR3_ARC_ON ,Turns on/off alpha blending in a rectangular area" "Off,On"
|
|
newline
|
|
bitfld.long 0x20 8. " GR3_ARC_DISP_ON ,Turns on/off frame-line display of the image area for alpha blending" "Off,On"
|
|
bitfld.long 0x20 4. " GR3_GRC_DISP_ON ,Turns on/off frame-line display of the graphics image area" "Off,On"
|
|
endif
|
|
newline
|
|
bitfld.long 0x20 0.--1. " GR3_DISP_SEL ,Selects the graphics display mode" "Background,Lower-layer,Current,Blended"
|
|
line.long 0x24 "GR3_AB2,Alpha Blending Control Register 2 (Graphics 3)"
|
|
hexmask.long.word 0x24 16.--26. 1. " GR3_GRC_VS ,Sets the vertical start position of the graphics image area"
|
|
hexmask.long.word 0x24 0.--10. 1. " GR3_GRC_VW ,Sets the vertical width of the graphics image area"
|
|
line.long 0x28 "GR3_AB3,Alpha Blending Control Register 3"
|
|
hexmask.long.word 0x28 16.--26. 1. " GR3_GRC_HS ,Sets the horizontal start position of the graphics image area"
|
|
hexmask.long.word 0x28 0.--10. 1. " GR3_GRC_HW ,Sets the horizontal width of the graphics image area"
|
|
line.long 0x2C "GR3_AB4,Alpha Blending Control Register 4"
|
|
hexmask.long.word 0x2C 16.--26. 1. " GR3_ARC_VS ,Sets the vertical start position of the valid image area for alpha blending in a rectangular area"
|
|
hexmask.long.word 0x2C 0.--10. 1. " GR3_ARC_VW ,Sets the vertical width of the valid image area for alpha blending in a rectangular area"
|
|
line.long 0x30 "GR3_AB5,Alpha Blending Control Register 5"
|
|
hexmask.long.word 0x30 16.--26. 1. " GR3_ARC_HS ,Sets the horizontal start position of the valid image area for alpha blending in a rectangular area"
|
|
hexmask.long.word 0x30 0.--10. 1. " GR3_ARC_HW ,Sets the horizontal width of the valid image area for alpha blending in a rectangular area"
|
|
line.long 0x34 "GR3_AB6,Alpha Blending Control Register 6"
|
|
bitfld.long 0x34 24. " GR3_ARC_MODE ,Alpha Blending Mode in Rectangular Area" "Addition,Subtraction"
|
|
hexmask.long.byte 0x34 16.--23. 1. " GR3_ARC_COEF ,Sets the alpha coefficient for alpha blending in a rectangular area"
|
|
newline
|
|
hexmask.long.byte 0x34 0.--7. 1. " GR3_ARC_RATE ,Sets the value obtained by subtracting 1 from the frame rate for alpha blending in a rectangular area"
|
|
line.long 0x38 "GR3_AB7,Alpha Blending Control Register 7"
|
|
hexmask.long.byte 0x38 16.--23. 1. " GR3_ARC_DEF ,Sets the initial alpha value for alpha blending in a rectangular area"
|
|
bitfld.long 0x38 0. " GR3_CK_ON ,Turns on/off CLUT-index/RGB-index chroma-key processing" "Off,On"
|
|
line.long 0x3C "GR3_AB8,Alpha Blending Control Register 8"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " GR3_CK_KCLUT ,CLUT Signal for CLUT-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " GR3_CK_KG ,G Signal for RGB-Index Chroma-Key Processing"
|
|
newline
|
|
hexmask.long.byte 0x3C 8.--15. 1. " GR3_CK_KB ,B Signal for RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " GR3_CK_KR ,R Signal for RGB-Index Chroma-Key Processing"
|
|
line.long 0x40 "GR3_AB9,Alpha Blending Control Register 9 (Graphics 3)"
|
|
hexmask.long.byte 0x40 24.--31. 1. " GR3_CK_A ,Replaced Alpha Signal after RGB/CLUT-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x40 16.--23. 1. " GR3_CK_G ,Replaced G Signal after RGB/CLUT-Index Chroma-Key Processing"
|
|
newline
|
|
hexmask.long.byte 0x40 8.--15. 1. " GR3_CK_B ,Replaced B Signal after RGB/CLUT-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x40 0.--7. 1. " GR3_CK_R ,Replaced R Signal after RGB/CLUT-Index Chroma-Key Processing"
|
|
line.long 0x44 "GR3_AB10,Alpha Blending Control Register 10"
|
|
hexmask.long.byte 0x44 24.--31. 1. " GR3_A0 ,CLUT1 alpha0 Signal"
|
|
hexmask.long.byte 0x44 16.--23. 1. " GR3_G0 ,CLUT1 G0 Signal"
|
|
newline
|
|
hexmask.long.byte 0x44 8.--15. 1. " GR3_B0 ,CLUT1 B0 Signal"
|
|
hexmask.long.byte 0x44 0.--7. 1. " GR3_R0 ,CLUT1 R0 Signal"
|
|
line.long 0x48 "GR3_AB11,Alpha Blending Control Register 11"
|
|
hexmask.long.byte 0x48 24.--31. 1. " GR3_A1 ,CLUT1 alpha1 Signal"
|
|
hexmask.long.byte 0x48 16.--23. 1. " GR3_G1 ,CLUT1 G1 Signal"
|
|
newline
|
|
hexmask.long.byte 0x48 8.--15. 1. " GR3_B1 ,CLUT1 B1 Signal"
|
|
hexmask.long.byte 0x48 0.--7. 1. " GR3_R1 ,CLUT1 R1 Signal"
|
|
line.long 0x4C "GR3_BASE,Background Color Control Register (Graphics 3)"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " GR3_BASE_G ,Background Color G Signal"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " GR3_BASE_B ,Background Color B Signal"
|
|
newline
|
|
hexmask.long.byte 0x4C 0.--7. 1. " GR3_BASE_R ,Background Color R Signal"
|
|
line.long 0x50 "GR3_CLUT_INT,CLUT Table and Interrupt Control Register (Graphics 3)"
|
|
bitfld.long 0x50 16. " GR3_CLT_SEL ,CLUT Table Select Signal" "Table 0,Table 1"
|
|
hexmask.long.word 0x50 0.--10. 1. " GR3_LINE ,Line Interrupt Set"
|
|
rgroup.long 0xD4++0x3
|
|
line.long 0x00 "GR3_MON,Status Monitor Register (Graphics 3)"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
hexmask.long.word 0x00 16.--26. 1. " GR3_LIN_STAT ,Line Position of Image being Currently Read"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 0. " GR3_ARC_ST ,Status Flag for Alpha Blending in Rectangular Area" "Completed,In progress"
|
|
tree.end
|
|
sif (cpu()=="R7S721021")
|
|
tree "VIN Synthesizer"
|
|
base ad:0xFCFF7000
|
|
width 15.
|
|
group.long 0xE00++0x3
|
|
line.long 0x00 "GR_VIN_UPDATE,VIN Synthesizer Register Update Control Register"
|
|
eventfld.long 0x00 8. " GR_VIN_UPDATE ,Graphics Display Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 4. " GR_VIN_P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
group.long 0xE20++0x03
|
|
line.long 0x00 "GR_VIN_AB1,Alpha Blending Control Register 1 (VIN Synthesizer)"
|
|
bitfld.long 0x00 2. " GR_VIN_SCL_UND_SEL ,Selection of Lower-Layer Plane in Scaler" "Graphics 0,?..."
|
|
bitfld.long 0x00 0.--1. " GR_VIN_DISP_SEL ,Selects the graphics display mode" "Background,Lower-layer,?..."
|
|
tree.end
|
|
elif cpuis("SH7268")||cpuis("SH7269")
|
|
tree "CLUT Table Configuration"
|
|
base ad:0xFCFF6000
|
|
width 13.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "GR1_CLUT,Graphics 1 CLUT table"
|
|
button "GR1_CLUT" "d (ad:0xFCFF6000)--(ad:0xFCFF6000+0x3FF) /long"
|
|
group.long 0x400++0x3
|
|
line.long 0x00 "GR2_CLUT,Graphics 2 CLUT table"
|
|
button "GR2_CLUT" "d (ad:0xFCFF6000+0x400)--(ad:0xFCFF6000+0x7FF) /long"
|
|
group.long 0x800++0x3
|
|
line.long 0x00 "GR3_CLUT,Graphics 3 CLUT table"
|
|
button "GR3_CLUT" "d (ad:0xFCFF6000+0x800)--(ad:0xFCFF6000+0xBFF) /long"
|
|
tree.end
|
|
else
|
|
tree "VIN Synthesizer"
|
|
base ad:0xFCFF7000
|
|
width 15.
|
|
group.long 0xE00++0x3
|
|
line.long 0x00 "GR_VIN_UPDATE,Graphics 3 Register Update Control Register"
|
|
eventfld.long 0x00 8. " GR_VIN_UPDATE ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 4. " GR_VIN_P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
newline
|
|
group.long 0xE20++0x1B
|
|
line.long 0x00 "GR_VIN_AB1,Alpha Blending Control Register 1 (Graphics 3)"
|
|
bitfld.long 0x00 12. " GR_VIN_ARC_ON ,Turns on/off alpha blending in a rectangular area." "Off,On"
|
|
bitfld.long 0x00 8. " GR_VIN_ARC_DISP_ON ,Turns on/off frame-line display of the image area for alpha blending in a rectangular area" "Off,On"
|
|
newline
|
|
bitfld.long 0x00 4. " GR_VIN_GRC_DISP_ON ,Turns on/off frame-line display of the graphics image area" "Off,On"
|
|
bitfld.long 0x00 2. " GR_VIN_SCL_UND_SEL ,Selection of Lower-Layer Plane in Scaler" "Graphics 0,Graphics 1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " GR_VIN_DISP_SEL ,Selects the graphics display mode" "Background,Lower-layer,Current,Blended"
|
|
line.long 0x04 "GR_VIN_AB2,Alpha Blending Control Register 2 (Graphics 3)"
|
|
hexmask.long.word 0x04 16.--26. 1. " GR_VIN_GRC_VS ,Sets the vertical start position of the graphics image area"
|
|
hexmask.long.word 0x04 0.--10. 1. " GR_VIN_GRC_VW ,Sets the vertical width of the graphics image area"
|
|
line.long 0x08 "GR_VIN_AB3,Alpha Blending Control Register 3"
|
|
hexmask.long.word 0x08 16.--26. 1. " GR_VIN_GRC_HS ,Sets the horizontal start position of the graphics image area"
|
|
hexmask.long.word 0x08 0.--10. 1. " GR_VIN_GRC_HW ,Sets the horizontal width of the graphics image area"
|
|
line.long 0x0C "GR_VIN_AB4,Alpha Blending Control Register 4"
|
|
hexmask.long.word 0x0C 16.--26. 1. " GR_VIN_ARC_VS ,Sets the vertical start position of the valid image area for alpha blending in a rectangular area"
|
|
hexmask.long.word 0x0C 0.--10. 1. " GR_VIN_ARC_VW ,Sets the vertical width of the valid image area for alpha blending in a rectangular area"
|
|
line.long 0x10 "GR_VIN_AB5,Alpha Blending Control Register 5"
|
|
hexmask.long.word 0x10 16.--26. 1. " GR_VIN_ARC_HS ,Sets the horizontal start position of the valid image area for alpha blending in a rectangular area"
|
|
hexmask.long.word 0x10 0.--10. 1. " GR_VIN_ARC_HW ,Sets the horizontal width of the valid image area for alpha blending in a rectangular area"
|
|
line.long 0x14 "GR_VIN_AB6,Alpha Blending Control Register 6"
|
|
bitfld.long 0x14 24. " GR_VIN_ARC_MODE ,Alpha Blending Mode in Rectangular Area" "Addition,Subtraction"
|
|
hexmask.long.byte 0x14 16.--23. 1. " GR_VIN_ARC_COEF ,Sets the alpha coefficient for alpha blending in a rectangular area"
|
|
newline
|
|
hexmask.long.byte 0x14 0.--7. 1. " GR_VIN_ARC_RATE ,Sets the value obtained by subtracting 1 from the frame rate for alpha blending in a rectangular area"
|
|
line.long 0x18 "GR_VIN_AB7,Alpha Blending Control Register 7"
|
|
hexmask.long.byte 0x18 16.--23. 1. " GR_VIN_ARC_DEF ,Sets the initial alpha value for alpha blending in a rectangular area"
|
|
newline
|
|
group.long 0xE4C++0x3
|
|
line.long 0x00 "GR_VIN_BASE,Background Color Control Register (Graphics 2)"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GR_VIN_BASE_G ,Background Color G Signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GR_VIN_BASE_B ,Background Color B Signal"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " GR_VIN_BASE_R ,Background Color R Signal"
|
|
newline
|
|
rgroup.long 0xE54++0x3
|
|
line.long 0x00 "GR_VIN_MON,Status Monitor Register (Graphics 2)"
|
|
bitfld.long 0x00 0. " GR_VIN_ARC_ST ,Status Flag for Alpha Blending in Rectangular Area" "Completed,In progress"
|
|
tree.end
|
|
tree "CLUT Table Configuration"
|
|
base ad:0xFCFF6000
|
|
width 13.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "GR0_CLUT,Graphics 0 CLUT table"
|
|
button "GR0_CLUT" "d (ad:0xFCFF6000)--(ad:0xFCFF6000+0x3FF) /long"
|
|
group.long 0x400++0x3
|
|
line.long 0x00 "GR1_CLUT,Graphics 1 CLUT table"
|
|
button "GR1_CLUT" "d (ad:0xFCFF6000+0x400)--(ad:0xFCFF6000+0x7FF) /long"
|
|
group.long 0x800++0x3
|
|
line.long 0x00 "GR2_CLUT,Graphics 2 CLUT table"
|
|
button "GR2_CLUT" "d (ad:0xFCFF6000+0x800)--(ad:0xFCFF6000+0xBFF) /long"
|
|
group.long 0xC00++0x3
|
|
line.long 0x00 "GR3_CLUT,Graphics 3 CLUT table"
|
|
button "GR3_CLUT" "d (ad:0xFCFF6000+0xC00)--(ad:0xFCFF6000+0xFFF) /long"
|
|
group.long 0x1000++0x3
|
|
line.long 0x00 "GR_OIR_CLUT,Graphics OIR CLUT table"
|
|
button "GR_OIR_CLUT" "d (ad:0xFCFF6000+0x1000)--(ad:0xFCFF6000+0x13FF) /long"
|
|
tree.end
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0xFCFF9700
|
|
width 14.
|
|
tree "Graphics 2 Process"
|
|
group.long 0x00++0x53
|
|
line.long 0x00 "GR2_UPDATE,Graphics 2 register update control register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
eventfld.long 0x00 8. " GR2_UPDATE ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 4. " GR2_P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
else
|
|
eventfld.long 0x00 4. " GR2_P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
endif
|
|
newline
|
|
eventfld.long 0x00 0. " GR2_IBUS_VEN ,Frame Buffer Read Register Update" "Not updated,Updated"
|
|
line.long 0x04 "GR2_FLM_RD,Frame Buffer Read Control Register (Graphics 2)"
|
|
bitfld.long 0x04 0. " GR2_R_ENB ,Frame Buffer Read Enable" "Disabled,Enabled"
|
|
line.long 0x08 "GR2_FLM1,Frame Buffer Control Register 1"
|
|
bitfld.long 0x08 16. " GR2_LN_OFF_DIR ,Selects the line offset address direction of the frame buffer" "Increment,Decrement"
|
|
bitfld.long 0x08 8.--9. " GR2_FLM_SEL ,Selects a frame buffer address setting signal" "Frame 0,GR2_FLM_NUM,Frame 0,?..."
|
|
newline
|
|
bitfld.long 0x08 0. " GR2_BST_MD ,Frame Buffer Burst Transfer Mode" "32-byte,128-byte"
|
|
line.long 0x0C "GR2_FLM2,Frame Buffer Control Register 2 - Base Address (upper)"
|
|
line.long 0x10 "GR2_FLM3,Frame Buffer Control Register 3"
|
|
hexmask.long.word 0x10 16.--30. 0x01 " GR2_LN_OFF ,Frame Buffer Line Offset Address"
|
|
hexmask.long.word 0x10 0.--9. 0x01 " GR2_FLM_NUM ,Frame Number of Frame Buffer"
|
|
line.long 0x14 "GR2_FLM4,Frame Buffer Control Register 4"
|
|
hexmask.long.tbyte 0x14 0.--22. 1. " GR2_FLM_OFF ,Frame Buffer Frame Offset Address (upper)"
|
|
line.long 0x18 "GR2_FLM5,Frame Buffer Control Register 5"
|
|
hexmask.long.word 0x18 16.--26. 1. " GR2_FLM_LNUM ,Sets number of lines in a frame"
|
|
hexmask.long.word 0x18 0.--10. 1. " GR2_FLM_LOOP ,Number of lines when reading the addresses repeatedly by returning to the start address after reaching the end address"
|
|
line.long 0x1C "GR2_FLM6,Frame Buffer Control Register 6"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x1C 28.--31. " GR2_FORMAT ,Sets the format of the frame buffer read signal" "RGB565,RGB888,AlphaRGB1555,AlphaRGB4444,AlphaRGB8888,CLUT8,CLUT4,CLUT1,,,RGBalpha5551,RGBalpha8888,?..."
|
|
hexmask.long.word 0x1C 16.--26. 1. " GR2_HW ,Sets the width of the horizontal valid period"
|
|
newline
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x1C 10.--12. " GR2_RDSWA[2:0] ,8-Bit 16-Bit or 32-Bit Swap Setting" "Not swapped,8-bit,16-bit,16-bit+8-bit,32-bit,32-bit+8-bit,32-bit+16-bit,32-bit+16-bit+8-bit"
|
|
else
|
|
bitfld.long 0x1C 12. " GR2_RDSWA2 ,32-bit swap" "Not swapped,Swapped"
|
|
bitfld.long 0x1C 11. " GR2_RDSWA1 ,16-bit swap" "Not swapped,Swapped"
|
|
newline
|
|
bitfld.long 0x1C 10. " GR2_RDSWA0 ,8-bit swap" "Not swapped,Swapped"
|
|
endif
|
|
else
|
|
bitfld.long 0x1C 28.--31. " GR2_FORMAT ,Sets the format of the frame buffer read signal" "RGB565,RGB888,AlphaRGB1555,AlphaRGB4444,AlphaRGB8888,CLUT8,CLUT4,CLUT1,?..."
|
|
hexmask.long.word 0x1C 16.--26. 1. " GR2_HW ,Sets the width of the horizontal valid period"
|
|
newline
|
|
bitfld.long 0x1C 12. " GR2_ENDIAN_ON ,Turns on/off the endian control of data read from buffer" "Off,On"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x1C 0.--5. 1. " GR2_STA_POS ,Sets the amount of data to be skipped through"
|
|
line.long 0x20 "GR2_AB1,Alpha Blending Control Register 1"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x20 15. " GR2_ARC_MUL ,Turns on/off multiplication processing with current alpha at alpha blending in a rectangular area" "Off,On"
|
|
bitfld.long 0x20 14. " GR2_ACALC_MD ,Turns on/off premultiplication processing at alpha blending in one-pixel units" "Off,On"
|
|
newline
|
|
endif
|
|
bitfld.long 0x20 12. " G2_ARC_ON ,Turns on/off alpha blending in a rectangular area" "Off,On"
|
|
bitfld.long 0x20 8. " GR2_ARC_DISP_ON ,Turns on/off frame-line display of the image area for alpha blending in a rectangular area" "Off,On"
|
|
newline
|
|
bitfld.long 0x20 4. " GR2_GRC_DISP_ON ,Turns on/off frame-line display of the graphics image area" "Off,On"
|
|
bitfld.long 0x20 0.--1. " GR2_DISP_SEL ,Selects the graphics display mode" "Background,Lower-layer,Current,Blended"
|
|
line.long 0x24 "GR2_AB2,Alpha Blending Control Register 2"
|
|
hexmask.long.word 0x24 16.--26. 1. " GR2_GRC_VS ,Sets the vertical start position of the graphics image area"
|
|
hexmask.long.word 0x24 0.--10. 1. " GR2_GRC_VW ,Sets the vertical width of the graphics image area"
|
|
line.long 0x28 "GR2_AB3,Alpha Blending Control Register 3"
|
|
hexmask.long.word 0x28 16.--26. 1. " GR2_GRC_HS ,Sets the horizontal start position of the graphics image area"
|
|
hexmask.long.word 0x28 0.--10. 1. " GR2_GRC_HW ,Sets the horizontal width of the graphics image area"
|
|
line.long 0x2C "GR2_AB4,Alpha Blending Control Register 4"
|
|
hexmask.long.word 0x2C 16.--26. 1. " GR2_ARC_VS ,Sets the vertical start position of the valid image area for alpha blending in a rectangular area"
|
|
hexmask.long.word 0x2C 0.--10. 1. " GR2_ARC_VW ,Sets the vertical width of the valid image area for alpha blending in a rectangular area"
|
|
line.long 0x30 "GR2_AB5,Alpha Blending Control Register 5 (Graphics 2)"
|
|
hexmask.long.word 0x30 16.--26. 1. " GR2_ARC_HS ,Sets the horizontal start position of the valid image area for alpha blending in a rectangular area"
|
|
hexmask.long.word 0x30 0.--10. 1. " GR2_ARC_HW ,Sets the horizontal width of the valid image area for alpha blending in a rectangular area"
|
|
line.long 0x34 "GR2_AB6,Alpha Blending Control Register 6 (Graphics 2)"
|
|
bitfld.long 0x34 24. " GR2_ARC_MODE ,Alpha Blending Mode in Rectangular Area" "Addition,Subtraction"
|
|
hexmask.long.byte 0x34 16.--23. 1. " GR2_ARC_COEF ,Sets the alpha coefficient for alpha blending in a rectangular area"
|
|
newline
|
|
hexmask.long.byte 0x34 0.--7. 1. " GR2_ARC_RATE ,Sets the value obtained by subtracting 1 from the frame rate for alpha blending in a rectangular area"
|
|
line.long 0x38 "GR2_AB7,Alpha Blending Control Register 7"
|
|
hexmask.long.byte 0x38 16.--23. 1. " GR2_ARC_DEF ,Sets the initial alpha value for alpha blending in a rectangular area"
|
|
bitfld.long 0x38 0. " GR2_CK_ON ,Turns on/off CLUT-index/RGB-index chroma-key processing" "Off,On"
|
|
line.long 0x3C "GR2_AB8,Alpha Blending Control Register 8"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " GR2_CK_KCLUT ,CLUT Signal for CLUT-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " GR2_CK_KG ,G Signal for RGB-Index Chroma-Key Processing"
|
|
newline
|
|
hexmask.long.byte 0x3C 8.--15. 1. " GR2_CK_KB ,B Signal for RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " GR2_CK_KR ,R Signal for RGB-Index Chroma-Key Processing"
|
|
line.long 0x40 "GR2_AB9,Alpha Blending Control Register 9 (Graphics 2)"
|
|
hexmask.long.byte 0x40 24.--31. 1. " GR2_CK_A ,Replaced Alpha Signal after RGB/CLUT-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x40 16.--23. 1. " GR2_CK_G ,Replaced G Signal after RGB/CLUT-Index Chroma-Key Processing"
|
|
newline
|
|
hexmask.long.byte 0x40 8.--15. 1. " GR2_CK_B ,Replaced B Signal after RGB/CLUT-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x40 0.--7. 1. " GR2_CK_R ,Replaced R Signal after RGB/CLUT-Index Chroma-Key Processing"
|
|
line.long 0x44 "GR2_AB10,Alpha Blending Control Register 10"
|
|
hexmask.long.byte 0x44 24.--31. 1. " GR2_A0 ,CLUT1 alpha0 Signal"
|
|
hexmask.long.byte 0x44 16.--23. 1. " GR2_G0 ,CLUT1 G0 Signal"
|
|
newline
|
|
hexmask.long.byte 0x44 8.--15. 1. " GR2_B0 ,CLUT1 B0 Signal"
|
|
hexmask.long.byte 0x44 0.--7. 1. " GR2_R0 ,CLUT1 R0 Signal"
|
|
line.long 0x48 "GR2_AB11,Alpha Blending Control Register 11"
|
|
hexmask.long.byte 0x48 24.--31. 1. " GR2_A1 ,CLUT1 alpha1 Signal"
|
|
hexmask.long.byte 0x48 16.--23. 1. " GR2_G1 ,CLUT1 G1 Signal"
|
|
newline
|
|
hexmask.long.byte 0x48 8.--15. 1. " GR2_B1 ,CLUT1 B1 Signal"
|
|
hexmask.long.byte 0x48 0.--7. 1. " GR2_R1 ,CLUT1 R1 Signal"
|
|
line.long 0x4C "GR2_BASE,Background Color Control Register (Graphics 2)"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " GR2_BASE_G ,Background Color G Signal"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " GR2_BASE_B ,Background Color B Signal"
|
|
newline
|
|
hexmask.long.byte 0x4C 0.--7. 1. " GR2_BASE_R ,Background Color R Signal"
|
|
line.long 0x50 "GR2_CLUT,CLUT Table Control Register (Graphics 2)"
|
|
bitfld.long 0x50 16. " GR2_CLT_SEL ,CLUT Table Select Signal" "Table 0,Table 1"
|
|
rgroup.long 0x54++0x3
|
|
line.long 0x00 "GR2_MON,Status Monitor Register (Graphics 2)"
|
|
bitfld.long 0x00 0. " GR2_ARC_ST ,Status Flag for Alpha Blending in Rectangular Area" "Completed,In progress"
|
|
tree.end
|
|
tree "Graphics 3 Process"
|
|
group.long 0x80++0x53
|
|
line.long 0x00 "GR3_UPDATE,Graphics 3 Register Update Control Register"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
eventfld.long 0x00 8. " GR3_UPDATE ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 4. " GR3_P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
else
|
|
eventfld.long 0x00 4. " GR3_P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
endif
|
|
newline
|
|
eventfld.long 0x00 0. " GR3_IBUS_VEN ,Frame Buffer Read Register Update" "Not updated,Updated"
|
|
line.long 0x04 "GR3_FLM_RD,Frame Buffer Read Control Register (Graphics 3)"
|
|
bitfld.long 0x04 0. " GR3_R_ENB ,Frame Buffer Read Enable" "Disabled,Enabled"
|
|
line.long 0x08 "GR3_FLM1,Frame Buffer Control Register 1 (Graphics 3)"
|
|
bitfld.long 0x08 16. " GR3_LN_OFF_DIR ,Selects the line offset address direction of the frame buffer" "Increment,Decrement"
|
|
bitfld.long 0x08 8.--9. " GR3_FLM_SEL ,Selects a frame buffer address setting signal" "Frame 0,GR3_FLM_NUM,Frame 0,?..."
|
|
newline
|
|
bitfld.long 0x08 0. " GR3_BST_MD ,Frame Buffer Burst Transfer Mode" "32-byte,128-byte"
|
|
line.long 0x0C "GR3_FLM2,Frame Buffer Control Register 2 (Graphics 3)"
|
|
line.long 0x10 "GR3_FLM3,Frame Buffer Control Register 3 (Graphics 3)"
|
|
hexmask.long.word 0x10 16.--30. 1. " GR3_LN_OFF ,Frame Buffer Line Offset Address"
|
|
hexmask.long.word 0x10 0.--9. 1. " GR3_FLM_NUM ,Frame Number of Frame Buffer"
|
|
line.long 0x14 "GR3_FLM4,Frame Buffer Control Register 4 (Graphics 3)"
|
|
hexmask.long.tbyte 0x14 0.--22. 1. " GR3_FLM_OFF ,Frame Buffer Frame Offset Address"
|
|
line.long 0x18 "GR3_FLM5,Frame Buffer Control Register 5 (Graphics 3)"
|
|
hexmask.long.word 0x18 16.--26. 1. " GR3_FLM_LNUM ,Sets number of lines in a frame"
|
|
hexmask.long.word 0x18 0.--10. 1. " GR3_FLM_LOOP ,Number of lines when reading the addresses repeatedly by returning to the start address after reaching the end address"
|
|
line.long 0x1C "GR3_FLM6,Frame Buffer Control Register 6 (Graphics 3)"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x1C 28.--31. " GR3_FORMAT ,Sets the format of the frame buffer read signal" "RGB565,RGB888,AlphaRGB1555,AlphaRGB4444,AlphaRGB8888,CLUT8,CLUT4,CLUT1,,,RGBalpha5551,RGBalpha8888,?..."
|
|
hexmask.long.word 0x1C 16.--26. 1. " GR3_HW ,Sets the width of the horizontal valid period"
|
|
newline
|
|
bitfld.long 0x1C 12. " GR3_RDSWA2 ,32-bit swap" "Not swapped,Swapped"
|
|
bitfld.long 0x1C 11. " GR3_RDSWA1 ,16-bit swap" "Not swapped,Swapped"
|
|
newline
|
|
bitfld.long 0x1C 10. " GR3_RDSWA0 ,8-bit swap" "Not swapped,Swapped"
|
|
bitfld.long 0x1C 0.--5. " GR3_STA_POS ,Sets the amount of data to be skipped through" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
bitfld.long 0x1C 28.--31. " GR3_FORMAT ,Sets the format of the frame buffer read signal" "RGB565,RGB888,AlphaRGB1555,AlphaRGB4444,AlphaRGB8888,CLUT8,CLUT4,CLUT1,?..."
|
|
hexmask.long.word 0x1C 16.--26. 1. " GR3_HW ,Sets the width of the horizontal valid period"
|
|
newline
|
|
bitfld.long 0x1C 12. " GR3_ENDIAN_ON ,Endian on" "Off,On"
|
|
bitfld.long 0x1C 0.--5. " GR3_STA_POS ,Sets the amount of data to be skipped through" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
line.long 0x20 "GR3_AB1,Alpha Blending Control Register 1 (Graphics 3)"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
bitfld.long 0x20 15. " GR3_ARC_MUL ,Turns on/off multiplication processing with current alpha at alpha blending in a rectangular area" "Off,On"
|
|
bitfld.long 0x20 14. " GR3_ACALC_MD ,Turns on/off premultiplication processing at alpha blending in one-pixel units" "Off,On"
|
|
newline
|
|
bitfld.long 0x20 12. " GR3_ARC_ON ,Turns on/off alpha blending in a rectangular area" "Off,On"
|
|
newline
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x20 8. " GR3_ARC_DISP_ON ,Turns on/off frame-line display of the image area for alpha blending" "Off,On"
|
|
newline
|
|
bitfld.long 0x20 4. " GR3_GRC_DISP_ON ,Turns on/off frame-line display of the graphics image area" "Off,On"
|
|
else
|
|
bitfld.long 0x20 8. " GR3_GRC_DISP_ON ,Turns on/off frame-line display of the graphics image area" "Off,On"
|
|
endif
|
|
else
|
|
bitfld.long 0x20 12. " GR3_ARC_ON ,Turns on/off alpha blending in a rectangular area" "Off,On"
|
|
newline
|
|
bitfld.long 0x20 8. " GR3_ARC_DISP_ON ,Turns on/off frame-line display of the image area for alpha blending" "Off,On"
|
|
bitfld.long 0x20 4. " GR3_GRC_DISP_ON ,Turns on/off frame-line display of the graphics image area" "Off,On"
|
|
endif
|
|
newline
|
|
bitfld.long 0x20 0.--1. " GR3_DISP_SEL ,Selects the graphics display mode" "Background,Lower-layer,Current,Blended"
|
|
line.long 0x24 "GR3_AB2,Alpha Blending Control Register 2 (Graphics 3)"
|
|
hexmask.long.word 0x24 16.--26. 1. " GR3_GRC_VS ,Sets the vertical start position of the graphics image area"
|
|
hexmask.long.word 0x24 0.--10. 1. " GR3_GRC_VW ,Sets the vertical width of the graphics image area"
|
|
line.long 0x28 "GR3_AB3,Alpha Blending Control Register 3"
|
|
hexmask.long.word 0x28 16.--26. 1. " GR3_GRC_HS ,Sets the horizontal start position of the graphics image area"
|
|
hexmask.long.word 0x28 0.--10. 1. " GR3_GRC_HW ,Sets the horizontal width of the graphics image area"
|
|
line.long 0x2C "GR3_AB4,Alpha Blending Control Register 4"
|
|
hexmask.long.word 0x2C 16.--26. 1. " GR3_ARC_VS ,Sets the vertical start position of the valid image area for alpha blending in a rectangular area"
|
|
hexmask.long.word 0x2C 0.--10. 1. " GR3_ARC_VW ,Sets the vertical width of the valid image area for alpha blending in a rectangular area"
|
|
line.long 0x30 "GR3_AB5,Alpha Blending Control Register 5"
|
|
hexmask.long.word 0x30 16.--26. 1. " GR3_ARC_HS ,Sets the horizontal start position of the valid image area for alpha blending in a rectangular area"
|
|
hexmask.long.word 0x30 0.--10. 1. " GR3_ARC_HW ,Sets the horizontal width of the valid image area for alpha blending in a rectangular area"
|
|
line.long 0x34 "GR3_AB6,Alpha Blending Control Register 6"
|
|
bitfld.long 0x34 24. " GR3_ARC_MODE ,Alpha Blending Mode in Rectangular Area" "Addition,Subtraction"
|
|
hexmask.long.byte 0x34 16.--23. 1. " GR3_ARC_COEF ,Sets the alpha coefficient for alpha blending in a rectangular area"
|
|
newline
|
|
hexmask.long.byte 0x34 0.--7. 1. " GR3_ARC_RATE ,Sets the value obtained by subtracting 1 from the frame rate for alpha blending in a rectangular area"
|
|
line.long 0x38 "GR3_AB7,Alpha Blending Control Register 7"
|
|
hexmask.long.byte 0x38 16.--23. 1. " GR3_ARC_DEF ,Sets the initial alpha value for alpha blending in a rectangular area"
|
|
bitfld.long 0x38 0. " GR3_CK_ON ,Turns on/off CLUT-index/RGB-index chroma-key processing" "Off,On"
|
|
line.long 0x3C "GR3_AB8,Alpha Blending Control Register 8"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " GR3_CK_KCLUT ,CLUT Signal for CLUT-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " GR3_CK_KG ,G Signal for RGB-Index Chroma-Key Processing"
|
|
newline
|
|
hexmask.long.byte 0x3C 8.--15. 1. " GR3_CK_KB ,B Signal for RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " GR3_CK_KR ,R Signal for RGB-Index Chroma-Key Processing"
|
|
line.long 0x40 "GR3_AB9,Alpha Blending Control Register 9 (Graphics 3)"
|
|
hexmask.long.byte 0x40 24.--31. 1. " GR3_CK_A ,Replaced Alpha Signal after RGB/CLUT-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x40 16.--23. 1. " GR3_CK_G ,Replaced G Signal after RGB/CLUT-Index Chroma-Key Processing"
|
|
newline
|
|
hexmask.long.byte 0x40 8.--15. 1. " GR3_CK_B ,Replaced B Signal after RGB/CLUT-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x40 0.--7. 1. " GR3_CK_R ,Replaced R Signal after RGB/CLUT-Index Chroma-Key Processing"
|
|
line.long 0x44 "GR3_AB10,Alpha Blending Control Register 10"
|
|
hexmask.long.byte 0x44 24.--31. 1. " GR3_A0 ,CLUT1 alpha0 Signal"
|
|
hexmask.long.byte 0x44 16.--23. 1. " GR3_G0 ,CLUT1 G0 Signal"
|
|
newline
|
|
hexmask.long.byte 0x44 8.--15. 1. " GR3_B0 ,CLUT1 B0 Signal"
|
|
hexmask.long.byte 0x44 0.--7. 1. " GR3_R0 ,CLUT1 R0 Signal"
|
|
line.long 0x48 "GR3_AB11,Alpha Blending Control Register 11"
|
|
hexmask.long.byte 0x48 24.--31. 1. " GR3_A1 ,CLUT1 alpha1 Signal"
|
|
hexmask.long.byte 0x48 16.--23. 1. " GR3_G1 ,CLUT1 G1 Signal"
|
|
newline
|
|
hexmask.long.byte 0x48 8.--15. 1. " GR3_B1 ,CLUT1 B1 Signal"
|
|
hexmask.long.byte 0x48 0.--7. 1. " GR3_R1 ,CLUT1 R1 Signal"
|
|
line.long 0x4C "GR3_BASE,Background Color Control Register (Graphics 3)"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " GR3_BASE_G ,Background Color G Signal"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " GR3_BASE_B ,Background Color B Signal"
|
|
newline
|
|
hexmask.long.byte 0x4C 0.--7. 1. " GR3_BASE_R ,Background Color R Signal"
|
|
line.long 0x50 "GR3_CLUT_INT,CLUT Table and Interrupt Control Register (Graphics 3)"
|
|
bitfld.long 0x50 16. " GR3_CLT_SEL ,CLUT Table Select Signal" "Table 0,Table 1"
|
|
hexmask.long.word 0x50 0.--10. 1. " GR3_LINE ,Line Interrupt Set"
|
|
rgroup.long 0xD4++0x3
|
|
line.long 0x00 "GR3_MON,Status Monitor Register (Graphics 3)"
|
|
sif !cpuis("SH7268")&&!cpuis("SH7269")
|
|
hexmask.long.word 0x00 16.--26. 1. " GR3_LIN_STAT ,Line Position of Image being Currently Read"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 0. " GR3_ARC_ST ,Status Flag for Alpha Blending in Rectangular Area" "Completed,In progress"
|
|
tree.end
|
|
sif (cpu()=="R7S721021")
|
|
tree "VIN Synthesizer"
|
|
base ad:0xFCFF9000
|
|
width 15.
|
|
group.long 0xE00++0x3
|
|
line.long 0x00 "GR_VIN_UPDATE,VIN Synthesizer Register Update Control Register"
|
|
eventfld.long 0x00 8. " GR_VIN_UPDATE ,Graphics Display Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 4. " GR_VIN_P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
group.long 0xE20++0x03
|
|
line.long 0x00 "GR_VIN_AB1,Alpha Blending Control Register 1 (VIN Synthesizer)"
|
|
bitfld.long 0x00 2. " GR_VIN_SCL_UND_SEL ,Selection of Lower-Layer Plane in Scaler" "Graphics 0,?..."
|
|
bitfld.long 0x00 0.--1. " GR_VIN_DISP_SEL ,Selects the graphics display mode" "Background,Lower-layer,?..."
|
|
tree.end
|
|
elif cpuis("SH7268")||cpuis("SH7269")
|
|
tree "CLUT Table Configuration"
|
|
base ad:0xFCFF8000
|
|
width 13.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "GR1_CLUT,Graphics 1 CLUT table"
|
|
button "GR1_CLUT" "d (ad:0xFCFF8000)--(ad:0xFCFF8000+0x3FF) /long"
|
|
group.long 0x400++0x3
|
|
line.long 0x00 "GR2_CLUT,Graphics 2 CLUT table"
|
|
button "GR2_CLUT" "d (ad:0xFCFF8000+0x400)--(ad:0xFCFF8000+0x7FF) /long"
|
|
group.long 0x800++0x3
|
|
line.long 0x00 "GR3_CLUT,Graphics 3 CLUT table"
|
|
button "GR3_CLUT" "d (ad:0xFCFF8000+0x800)--(ad:0xFCFF8000+0xBFF) /long"
|
|
tree.end
|
|
else
|
|
tree "VIN Synthesizer"
|
|
base ad:0xFCFF9000
|
|
width 15.
|
|
group.long 0xE00++0x3
|
|
line.long 0x00 "GR_VIN_UPDATE,Graphics 3 Register Update Control Register"
|
|
eventfld.long 0x00 8. " GR_VIN_UPDATE ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 4. " GR_VIN_P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
newline
|
|
group.long 0xE20++0x1B
|
|
line.long 0x00 "GR_VIN_AB1,Alpha Blending Control Register 1 (Graphics 3)"
|
|
bitfld.long 0x00 12. " GR_VIN_ARC_ON ,Turns on/off alpha blending in a rectangular area." "Off,On"
|
|
bitfld.long 0x00 8. " GR_VIN_ARC_DISP_ON ,Turns on/off frame-line display of the image area for alpha blending in a rectangular area" "Off,On"
|
|
newline
|
|
bitfld.long 0x00 4. " GR_VIN_GRC_DISP_ON ,Turns on/off frame-line display of the graphics image area" "Off,On"
|
|
bitfld.long 0x00 2. " GR_VIN_SCL_UND_SEL ,Selection of Lower-Layer Plane in Scaler" "Graphics 0,Graphics 1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " GR_VIN_DISP_SEL ,Selects the graphics display mode" "Background,Lower-layer,Current,Blended"
|
|
line.long 0x04 "GR_VIN_AB2,Alpha Blending Control Register 2 (Graphics 3)"
|
|
hexmask.long.word 0x04 16.--26. 1. " GR_VIN_GRC_VS ,Sets the vertical start position of the graphics image area"
|
|
hexmask.long.word 0x04 0.--10. 1. " GR_VIN_GRC_VW ,Sets the vertical width of the graphics image area"
|
|
line.long 0x08 "GR_VIN_AB3,Alpha Blending Control Register 3"
|
|
hexmask.long.word 0x08 16.--26. 1. " GR_VIN_GRC_HS ,Sets the horizontal start position of the graphics image area"
|
|
hexmask.long.word 0x08 0.--10. 1. " GR_VIN_GRC_HW ,Sets the horizontal width of the graphics image area"
|
|
line.long 0x0C "GR_VIN_AB4,Alpha Blending Control Register 4"
|
|
hexmask.long.word 0x0C 16.--26. 1. " GR_VIN_ARC_VS ,Sets the vertical start position of the valid image area for alpha blending in a rectangular area"
|
|
hexmask.long.word 0x0C 0.--10. 1. " GR_VIN_ARC_VW ,Sets the vertical width of the valid image area for alpha blending in a rectangular area"
|
|
line.long 0x10 "GR_VIN_AB5,Alpha Blending Control Register 5"
|
|
hexmask.long.word 0x10 16.--26. 1. " GR_VIN_ARC_HS ,Sets the horizontal start position of the valid image area for alpha blending in a rectangular area"
|
|
hexmask.long.word 0x10 0.--10. 1. " GR_VIN_ARC_HW ,Sets the horizontal width of the valid image area for alpha blending in a rectangular area"
|
|
line.long 0x14 "GR_VIN_AB6,Alpha Blending Control Register 6"
|
|
bitfld.long 0x14 24. " GR_VIN_ARC_MODE ,Alpha Blending Mode in Rectangular Area" "Addition,Subtraction"
|
|
hexmask.long.byte 0x14 16.--23. 1. " GR_VIN_ARC_COEF ,Sets the alpha coefficient for alpha blending in a rectangular area"
|
|
newline
|
|
hexmask.long.byte 0x14 0.--7. 1. " GR_VIN_ARC_RATE ,Sets the value obtained by subtracting 1 from the frame rate for alpha blending in a rectangular area"
|
|
line.long 0x18 "GR_VIN_AB7,Alpha Blending Control Register 7"
|
|
hexmask.long.byte 0x18 16.--23. 1. " GR_VIN_ARC_DEF ,Sets the initial alpha value for alpha blending in a rectangular area"
|
|
newline
|
|
group.long 0xE4C++0x3
|
|
line.long 0x00 "GR_VIN_BASE,Background Color Control Register (Graphics 2)"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GR_VIN_BASE_G ,Background Color G Signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GR_VIN_BASE_B ,Background Color B Signal"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " GR_VIN_BASE_R ,Background Color R Signal"
|
|
newline
|
|
rgroup.long 0xE54++0x3
|
|
line.long 0x00 "GR_VIN_MON,Status Monitor Register (Graphics 2)"
|
|
bitfld.long 0x00 0. " GR_VIN_ARC_ST ,Status Flag for Alpha Blending in Rectangular Area" "Completed,In progress"
|
|
tree.end
|
|
tree "CLUT Table Configuration"
|
|
base ad:0xFCFF8000
|
|
width 13.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "GR0_CLUT,Graphics 0 CLUT table"
|
|
button "GR0_CLUT" "d (ad:0xFCFF8000)--(ad:0xFCFF8000+0x3FF) /long"
|
|
group.long 0x400++0x3
|
|
line.long 0x00 "GR1_CLUT,Graphics 1 CLUT table"
|
|
button "GR1_CLUT" "d (ad:0xFCFF8000+0x400)--(ad:0xFCFF8000+0x7FF) /long"
|
|
group.long 0x800++0x3
|
|
line.long 0x00 "GR2_CLUT,Graphics 2 CLUT table"
|
|
button "GR2_CLUT" "d (ad:0xFCFF8000+0x800)--(ad:0xFCFF8000+0xBFF) /long"
|
|
group.long 0xC00++0x3
|
|
line.long 0x00 "GR3_CLUT,Graphics 3 CLUT table"
|
|
button "GR3_CLUT" "d (ad:0xFCFF8000+0xC00)--(ad:0xFCFF8000+0xFFF) /long"
|
|
group.long 0x1000++0x3
|
|
line.long 0x00 "GR_OIR_CLUT,Graphics OIR CLUT table"
|
|
button "GR_OIR_CLUT" "d (ad:0xFCFF8000+0x1000)--(ad:0xFCFF8000+0x13FF) /long"
|
|
tree.end
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree.open "OIG (Video Display Controller 5: Output Image Generator)"
|
|
tree "Channel 0"
|
|
base ad:0xFCFF7E00
|
|
width 17.
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "OIR_SCL0_UPDATE,SCL0 register update control register"
|
|
eventfld.long 0x00 13. " SCL0_VEN_D ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 12. " SCL0_VEN_C ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
textline " "
|
|
eventfld.long 0x00 8. " SCL0_UPDATE ,SYNC Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 4. " SCL0_VEN_B ,Synchronization Control Register Update" "Not updated,Updated"
|
|
textline " "
|
|
eventfld.long 0x00 0. " SCL0_VEN_A ,Capture Control Register Update" "Not updated,Updated"
|
|
group.long 0x84++0x1F
|
|
line.long 0x00 "OIR_SCL0_FRC1,Mask Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " OIR_RES_VMASK ,Repeated Vsync Signal Masking Period"
|
|
bitfld.long 0x00 0. " OIR_RES_VMASK_ON ,Repeated Vsync Signal Masking Control" "Disabled,Enabled"
|
|
line.long 0x04 "OIR_SCL0_FRC2,Missing Vsync Compensation Control Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " OIR_RES_VLACK ,Missing-Sync Compensating Pulse Output Wait Time"
|
|
bitfld.long 0x04 0. " OIR_RES_VLACK_ON ,Missing Vsync Signal Compensation" "Disabled,Enabled"
|
|
line.long 0x08 "OIR_SCL0_FRC3,Output Sync Select Register"
|
|
bitfld.long 0x08 16. " OIR_RES_EN ,Enabling or Disabling the Output Image Generator" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " OIR_RES_VS_SEL ,Vsync Signal Output Select" "Externally,Internally"
|
|
line.long 0x0C "OIR_SCL0_FRC4,Free-Running Period Control Register"
|
|
hexmask.long.word 0x0C 16.--26. 1. " OIR_RES_FV ,Free-Running Vsync Period Setting"
|
|
hexmask.long.word 0x0C 0.--10. 1. " OIR_RES_FH ,Hsync Period Setting"
|
|
line.long 0x10 "OIR_SCL0_FRC5,Output Delay Control Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " OIR_RES_VSDLY ,Vsync Signal Delay Control"
|
|
line.long 0x14 "OIR_SCL0_FRC6,Free-Running Period Control Register"
|
|
hexmask.long.word 0x14 16.--26. 1. " OIR_RES_F_VS ,Vertical Enable Signal Start Position for Full Screen"
|
|
hexmask.long.word 0x14 0.--10. 1. " OIR_RES_F_VW ,Vertical Enable Signal Width for Full Screen"
|
|
line.long 0x18 "OIR_SCL0_FRC7,Full-Screen Horizontal Size Register"
|
|
hexmask.long.word 0x18 16.--26. 1. " OIR_RES_F_HS ,Horizontal Enable Signal Start Position for Full Screen"
|
|
hexmask.long.word 0x18 0.--10. 1. " OIR_RES_F_HW ,Horizontal Enable Signal Width for Full Screen (pixel-clock cycles)"
|
|
group.long 0xAC++0x0B
|
|
line.long 0x00 "OIR_SCL0_DS1,Scaling-Down Control Register"
|
|
bitfld.long 0x00 4. " OIR_RES_DS_V_ON ,Vertical Scale Down On/Off" "Off,On"
|
|
bitfld.long 0x00 0. " OIR_RES_DS_H_ON ,Horizontal Scale Down On/Off" "Off,On"
|
|
line.long 0x04 "OIR_SCL0_DS2,Vertical Capture Size Register"
|
|
hexmask.long.word 0x04 16.--26. 1. " OIR_RES_VS ,Vertical Position Setting for Video Signal Capturing"
|
|
hexmask.long.word 0x04 0.--10. 1. " OIR_RES_VW ,Vertical Width of Video Signal to be Captured"
|
|
line.long 0x08 "OIR_SCL0_DS3,Horizontal Capture Size Register"
|
|
hexmask.long.word 0x08 16.--26. 1. " OIR_RES_HS ,Horizontal Position Setting for Video Signal Capturing"
|
|
hexmask.long.word 0x08 0.--10. 1. " OIR_RES_HW ,Horizontal Width of Video Signal to be Captured"
|
|
group.long 0xC4++0x0F
|
|
line.long 0x00 "OIR_SCL0_DS7,Scaling-Down Control Block Output Size Register"
|
|
hexmask.long.word 0x00 16.--26. 1. " OIR_RES_OUT_VW ,Number of Valid Lines in Vertical Direction Output by Scaling-down Control Block"
|
|
hexmask.long.word 0x00 0.--10. 1. " OIR_RES_OUT_HW ,Number of Valid Horizontal Pixels Output by Scaling-Down Control"
|
|
line.long 0x04 "OIR_SCL0_US1,Scaling-Up Control Register"
|
|
bitfld.long 0x04 4. " OIR_RES_US_V_ON ,Vertical Scale Up On/Off" "Off,On"
|
|
bitfld.long 0x04 0. " OIR_RES_US_H_ON ,Horizontal Scale Up On/Off" "Off,On"
|
|
line.long 0x08 "OIR_SCL0_US2,Output Image Vertical Size Register"
|
|
hexmask.long.word 0x08 16.--26. 1. " OIR_RES_P_VS ,Vertical Enable Signal Start Position for Output Image"
|
|
hexmask.long.word 0x08 0.--10. 1. " OIR_RES_P_VW ,Vertical Enable Signal Width for Output Image (lines)"
|
|
line.long 0x0C "OIR_SCL0_US3,Output Image Horizontal Size Register"
|
|
hexmask.long.word 0x0C 16.--26. 1. " OIR_RES_P_HS ,Horizontal Enable Signal Start Position for Output Image"
|
|
hexmask.long.word 0x0C 0.--10. 1. " OIR_RES_P_HW ,Horizontal Enable Signal Width for Output Image"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "OIR_SCL0_US8,Frame Buffer Read Select Register"
|
|
bitfld.long 0x00 4. " OIR_RES_IBUS_SYNC_SEL ,Sync Signal Select for Frame Buffer Read Block" "Output image,Graphics processing"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "OIR_SCL0_OVR1,Background Color Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OIR_RES_BK_CLO_R ,Background Color Setting R/Cr Signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " OIR_RES_BK_COL_G ,Background Color Setting G/Y Signal"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " OIR_RES_BK_COL_B ,Background Color Setting B/Cb Signal"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "OIR_SCL1_UPDATE,SCL1 Register Update Control Register"
|
|
bitfld.long 0x00 16. " OIR_SCL1_UPDATE_A ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " OIR_SCL1_VEN_B ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 0. " OIR_SCL1_VEN_A ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
group.long 0x108++0xF
|
|
line.long 0x00 "OIR_SCL1_WR1,Writing Mode Register"
|
|
bitfld.long 0x00 18. " OIR_RES_WRSWA2 ,32-Bit Swap Setting" "Not swapped,Swapped"
|
|
bitfld.long 0x00 17. " OIR_RES_WRSWA1 ,16-Bit Swap Setting" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x00 16. " OIR_RES_WRSWA0 ,8-Bit Swap Setting" "Not swapped,Swapped"
|
|
bitfld.long 0x00 2.--3. " OIR_RES_MD ,Frame Buffer Video-Signal Writing Format" ",RGB565 (16 bits),RGB888 (24 (32) bits),?..."
|
|
textline " "
|
|
bitfld.long 0x00 1. " OIR_RES_LOOP ,Frame Buffer Write Mode Select" "Frame,Line"
|
|
bitfld.long 0x00 0. " OIR_RES_BST_MD ,Transfer Burst Length for Frame Buffer Writing" "32-byte,128-byte"
|
|
line.long 0x04 "OIR_SCL1_WR2,Write Address Register 2"
|
|
line.long 0x08 "OIR_SCL1_WR3,Write Address Register 2"
|
|
hexmask.long.word 0x08 16.--30. 1. " OIR_RES_LN_OFF ,Frame Buffer Line Offset Address"
|
|
hexmask.long.word 0x08 0.--9. 1. " OIR_RES_FLM_NUM ,Number of Frames of Buffer to be Written"
|
|
line.long 0x0C "OIR_SCL1_WR4,Write Address Register 3"
|
|
hexmask.long.tbyte 0x0C 0.--22. 1. " OIR_RES_FLM_OFF ,Frame Buffer Frame Offset Address"
|
|
group.long 0x11C++0xB
|
|
line.long 0x00 "OIR_SCL1_WR5,Frame Sub-Sampling Register"
|
|
bitfld.long 0x00 12. " OIR_RES_INTER ,Field Operating Mode Select" "Progressive,Interlace"
|
|
bitfld.long 0x00 8.--9. " OIR_RES_FS_RATE ,Writing Rate" "1/1,1/2,1/4,1/8"
|
|
textline " "
|
|
bitfld.long 0x00 0. " OIR_RES_WENB ,Frame Buffer Write Enable" "Disabled,Enabled"
|
|
line.long 0x04 "OIR_SCL1_WR6,Bit Reduction Register"
|
|
bitfld.long 0x04 4. " OIR_RES_DTH_ON ,Dither Correction On/Off" "Off,On"
|
|
bitfld.long 0x04 0. " OIR_RES_BITDEC_ON ,Bit Reduction On/Off" "Off,On"
|
|
line.long 0x08 "OIR_SCL1_WR7,Write Detection Register"
|
|
bitfld.long 0x08 16. " OIR_SCL1_WR7 ,Write Detection Register" "Not detected,Detected"
|
|
hexmask.long.word 0x08 0.--9. 1. " OIR_RES_FLM_CNT ,Frame Number of Frame Being Accessed"
|
|
group.long 0x180++0x2B
|
|
line.long 0x00 "GR_OIR_UPDATE,Graphics (OIR) Register Update Control Register"
|
|
bitfld.long 0x00 8. " GR_OIR_UPDATE ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " GR_OIR_P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 0. " GR_OIR_IBUS_VEN ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
line.long 0x04 "GR_OIR_FLM_RD,Update Control Register"
|
|
bitfld.long 0x04 0. " GR_OIR_R_ENB ,Frame Buffer Read Enable" "Disabled,Enabled"
|
|
line.long 0x08 "GR_OIR_FLM1,Frame Buffer Control Register 1"
|
|
bitfld.long 0x04 16. " INC ,Selects the line offset address direction of the frame buffer" "Inc,Dec"
|
|
bitfld.long 0x04 8.--9. " GR_OIR_FLM_SEL ,Selects a frame buffer address setting signal" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x04 4. " GR_OIR_IMR_FLM_INV ,Sets the frame buffer number for distortion correction for displa" "Not replace,Replaces"
|
|
bitfld.long 0x04 0. " GR_OIR_BST_MD ,Frame Buffer Burst Transfer Mode" "32-byte,128-byte"
|
|
line.long 0x0C "GR_OIR_FLM2,Frame Buffer Control Register 2"
|
|
line.long 0x10 "GR_OIR_FLM3,Frame Buffer Control Register 3"
|
|
hexmask.long.word 0x0C 16.--30. 1. " GR_OIR_LN_OFF ,Frame Buffer Line Offset Address"
|
|
hexmask.long.word 0x0C 0.--9. 1. " GR_OIR_FLM_NUM ,Frame Number of Frame Buffer"
|
|
line.long 0x14 "GR_OIR_FLM4,Frame Buffer Control Register 4"
|
|
hexmask.long.tbyte 0x10 0.--22. 1. " GR_OIR_FLM_OFF ,Frame Buffer Frame Offset Address"
|
|
line.long 0x18 "GR_OIR_FLM5,Frame Buffer Control Register 5"
|
|
hexmask.long.word 0x14 16.--26. 1. " GR_OIR_FLM_LNUM ,Sets number of lines in a frame"
|
|
hexmask.long.word 0x14 0.--10. 1. " GR_OIR_FLM_LOOP ,Number of lines when reading the addresses repeatedly by returning to the start address after reaching the end address"
|
|
line.long 0x1C "GR_OIR_FLM6,Frame Buffer Control Register 6"
|
|
bitfld.long 0x18 28.--31. " GR_OIR_FORMAT ,Sets the format of the frame buffer read signal" "RGB565,RGB888,alphaRGB1555,alphaRGB4444,alphaRGB8888,CLUT8,CLUT4,CLUT1,,,RGBalpha5551,RGBalpha8888,?..."
|
|
hexmask.long.word 0x18 13.--25. 1. " GR_OIR_HW ,Sets the width of the horizontal valid period"
|
|
textline " "
|
|
bitfld.long 0x1C 12. " GR_OIR_RDSWA2 ,32-Bit Swap Setting" "Not swapped,Swapped"
|
|
bitfld.long 0x1C 11. " GR_OIR_RDSWA1 ,16-Bit Swap Setting" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x1C 10. " GR_OIR_RDSWA0 ,8-Bit Swap Setting" "Not swapped,Swapped"
|
|
bitfld.long 0x1C 0.--5. " GR_OIR_STA_POS ,Sets the amount of data to be skipped through" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x20 "GR_OIR_AB1,Alpha Blending Control Register 1"
|
|
bitfld.long 0x1C 4. " GR_OIR_GRC_DISP_ON ,Turns on/off frame-line display of the graphics image area" "Off,On"
|
|
bitfld.long 0x1C 0.--1. " GR_OIR_DISP_SEL ,Selects the graphics display mode" "Background,Lower-layer,Current,Blended"
|
|
line.long 0x24 "GR_OIR_AB2,Alpha Blending Control Register 2"
|
|
hexmask.long.word 0x20 16.--26. 1. " GR_OIR_GRC_VS ,Vertical Start Position of Graphics Image Area"
|
|
hexmask.long.word 0x20 0.--10. 1. " GR_OIR_GRC_VW ,Vertical Width of Graphics Image Area"
|
|
line.long 0x28 "GR_OIR_AB3,Alpha Blending Control Register 3"
|
|
hexmask.long.word 0x24 16.--26. 1. " GR_OIR_GRC_HS ,Horizontal Start Position of Graphics Image Area"
|
|
hexmask.long.word 0x24 0.--10. 1. " GR_OIR_GRC_HW ,Horizontal Width of Graphics Image Area"
|
|
group.long 0x1B8++0x1B
|
|
line.long 0x00 "GR_OIR_AB7,Alpha Blending Control Register 7"
|
|
bitfld.long 0x00 0. " GR_OIR_CK_ON ,CLUT-Index/RGB-Index Chroma-Key Processing On/Off" "Off,On"
|
|
line.long 0x04 "GR_OIR_AB8,Alpha Blending Control Register 8"
|
|
hexmask.long.byte 0x04 24.--31. 1. " GR_OIR_CK_KCLUT ,CLUT Signal for CLUT-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x04 16.--23. 1. " GR_OIR_CK_KG ,G Signal for RGB-Index Chroma-Key Processing"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " GR_OIR_CK_KB ,B Signal for RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x04 0.--7. 1. " GR_OIR_CK_KR ,R Signal for RGB-Index Chroma-Key Processing"
|
|
line.long 0x08 "GR_OIR_AB9,Alpha Blending Control Register 9"
|
|
hexmask.long.byte 0x08 24.--31. 1. " GR_OIR_CK_A ,Replaced Alpha Signal after RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x08 16.--23. 1. " GR_OIR_CK_G ,Replaced G Signal after RGB-Index Chroma-Key Processing"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " GR_OIR_CK_B ,Replaced B Signal after RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x08 0.--7. 1. " GR_OIR_CK_R ,Replaced R Signal after RGB-Index Chroma-Key Processing"
|
|
line.long 0x0C "GR_OIR_AB10,Alpha Blending Control Register 10"
|
|
hexmask.long.byte 0xC 24.--31. 1. " GR_OIR_A0 ,CLUT1 alpha0 Signal"
|
|
hexmask.long.byte 0xC 16.--23. 1. " GR_OIR_G0 ,CLUT1 G0 Signal"
|
|
textline " "
|
|
hexmask.long.byte 0xC 8.--15. 1. " GR_OIR_B0 ,CLUT1 B0 Signal"
|
|
hexmask.long.byte 0xC 0.--7. 1. " GR_OIR_R0 ,CLUT1 R0 Signal"
|
|
line.long 0x10 "GR_OIR_AB11,Alpha Blending Control Register 11"
|
|
hexmask.long.byte 0x10 24.--31. 1. " GR_OIR_A1 ,CLUT1 alpha1 Signal"
|
|
hexmask.long.byte 0x10 16.--23. 1. " GR_OIR_G1 ,CLUT1 G1 Signal"
|
|
textline " "
|
|
hexmask.long.byte 0x10 8.--15. 1. " GR_OIR_B1 ,CLUT1 B1 Signal"
|
|
hexmask.long.byte 0x10 0.--7. 1. " GR_OIR_R1 ,CLUT1 R1 Signal"
|
|
line.long 0x14 "GR_OIR_BASE,Background Color Control Register"
|
|
hexmask.long.byte 0x14 16.--23. 1. " GR_OIR_BASE_G ,Background Color G Signal"
|
|
hexmask.long.byte 0x14 8.--15. 1. " GR_OIR_BASE_B ,Background Color B Signal"
|
|
textline " "
|
|
hexmask.long.byte 0x14 0.--7. 1. " GR_OIR_BASE_R ,Background Color R Signal"
|
|
line.long 0x18 "GR_OIR_CLUT,CLUT Table Control Register"
|
|
bitfld.long 0x18 16. " GR_OIR_CLUT ,CLUT Table Control Register" "Table 0,Table 1"
|
|
hexmask.long.word 0x18 0.--8. 1. " GR_OIR_LINE ,Line interrupt Setting"
|
|
rgroup.long 0x1D4++0x03
|
|
line.long 0x00 "GR_OIR_MON,Status Monitor Register"
|
|
hexmask.long.word 0x00 16.--26. 1. " GR_OIR_MON ,Status Monitor Register"
|
|
width 0x0b
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0xFCFF9E00
|
|
width 17.
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "OIR_SCL0_UPDATE,SCL0 register update control register"
|
|
eventfld.long 0x00 13. " SCL0_VEN_D ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 12. " SCL0_VEN_C ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
textline " "
|
|
eventfld.long 0x00 8. " SCL0_UPDATE ,SYNC Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 4. " SCL0_VEN_B ,Synchronization Control Register Update" "Not updated,Updated"
|
|
textline " "
|
|
eventfld.long 0x00 0. " SCL0_VEN_A ,Capture Control Register Update" "Not updated,Updated"
|
|
group.long 0x84++0x1F
|
|
line.long 0x00 "OIR_SCL0_FRC1,Mask Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " OIR_RES_VMASK ,Repeated Vsync Signal Masking Period"
|
|
bitfld.long 0x00 0. " OIR_RES_VMASK_ON ,Repeated Vsync Signal Masking Control" "Disabled,Enabled"
|
|
line.long 0x04 "OIR_SCL0_FRC2,Missing Vsync Compensation Control Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " OIR_RES_VLACK ,Missing-Sync Compensating Pulse Output Wait Time"
|
|
bitfld.long 0x04 0. " OIR_RES_VLACK_ON ,Missing Vsync Signal Compensation" "Disabled,Enabled"
|
|
line.long 0x08 "OIR_SCL0_FRC3,Output Sync Select Register"
|
|
bitfld.long 0x08 16. " OIR_RES_EN ,Enabling or Disabling the Output Image Generator" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " OIR_RES_VS_SEL ,Vsync Signal Output Select" "Externally,Internally"
|
|
line.long 0x0C "OIR_SCL0_FRC4,Free-Running Period Control Register"
|
|
hexmask.long.word 0x0C 16.--26. 1. " OIR_RES_FV ,Free-Running Vsync Period Setting"
|
|
hexmask.long.word 0x0C 0.--10. 1. " OIR_RES_FH ,Hsync Period Setting"
|
|
line.long 0x10 "OIR_SCL0_FRC5,Output Delay Control Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " OIR_RES_VSDLY ,Vsync Signal Delay Control"
|
|
line.long 0x14 "OIR_SCL0_FRC6,Free-Running Period Control Register"
|
|
hexmask.long.word 0x14 16.--26. 1. " OIR_RES_F_VS ,Vertical Enable Signal Start Position for Full Screen"
|
|
hexmask.long.word 0x14 0.--10. 1. " OIR_RES_F_VW ,Vertical Enable Signal Width for Full Screen"
|
|
line.long 0x18 "OIR_SCL0_FRC7,Full-Screen Horizontal Size Register"
|
|
hexmask.long.word 0x18 16.--26. 1. " OIR_RES_F_HS ,Horizontal Enable Signal Start Position for Full Screen"
|
|
hexmask.long.word 0x18 0.--10. 1. " OIR_RES_F_HW ,Horizontal Enable Signal Width for Full Screen (pixel-clock cycles)"
|
|
group.long 0xAC++0x0B
|
|
line.long 0x00 "OIR_SCL0_DS1,Scaling-Down Control Register"
|
|
bitfld.long 0x00 4. " OIR_RES_DS_V_ON ,Vertical Scale Down On/Off" "Off,On"
|
|
bitfld.long 0x00 0. " OIR_RES_DS_H_ON ,Horizontal Scale Down On/Off" "Off,On"
|
|
line.long 0x04 "OIR_SCL0_DS2,Vertical Capture Size Register"
|
|
hexmask.long.word 0x04 16.--26. 1. " OIR_RES_VS ,Vertical Position Setting for Video Signal Capturing"
|
|
hexmask.long.word 0x04 0.--10. 1. " OIR_RES_VW ,Vertical Width of Video Signal to be Captured"
|
|
line.long 0x08 "OIR_SCL0_DS3,Horizontal Capture Size Register"
|
|
hexmask.long.word 0x08 16.--26. 1. " OIR_RES_HS ,Horizontal Position Setting for Video Signal Capturing"
|
|
hexmask.long.word 0x08 0.--10. 1. " OIR_RES_HW ,Horizontal Width of Video Signal to be Captured"
|
|
group.long 0xC4++0x0F
|
|
line.long 0x00 "OIR_SCL0_DS7,Scaling-Down Control Block Output Size Register"
|
|
hexmask.long.word 0x00 16.--26. 1. " OIR_RES_OUT_VW ,Number of Valid Lines in Vertical Direction Output by Scaling-down Control Block"
|
|
hexmask.long.word 0x00 0.--10. 1. " OIR_RES_OUT_HW ,Number of Valid Horizontal Pixels Output by Scaling-Down Control"
|
|
line.long 0x04 "OIR_SCL0_US1,Scaling-Up Control Register"
|
|
bitfld.long 0x04 4. " OIR_RES_US_V_ON ,Vertical Scale Up On/Off" "Off,On"
|
|
bitfld.long 0x04 0. " OIR_RES_US_H_ON ,Horizontal Scale Up On/Off" "Off,On"
|
|
line.long 0x08 "OIR_SCL0_US2,Output Image Vertical Size Register"
|
|
hexmask.long.word 0x08 16.--26. 1. " OIR_RES_P_VS ,Vertical Enable Signal Start Position for Output Image"
|
|
hexmask.long.word 0x08 0.--10. 1. " OIR_RES_P_VW ,Vertical Enable Signal Width for Output Image (lines)"
|
|
line.long 0x0C "OIR_SCL0_US3,Output Image Horizontal Size Register"
|
|
hexmask.long.word 0x0C 16.--26. 1. " OIR_RES_P_HS ,Horizontal Enable Signal Start Position for Output Image"
|
|
hexmask.long.word 0x0C 0.--10. 1. " OIR_RES_P_HW ,Horizontal Enable Signal Width for Output Image"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "OIR_SCL0_US8,Frame Buffer Read Select Register"
|
|
bitfld.long 0x00 4. " OIR_RES_IBUS_SYNC_SEL ,Sync Signal Select for Frame Buffer Read Block" "Output image,Graphics processing"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "OIR_SCL0_OVR1,Background Color Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OIR_RES_BK_CLO_R ,Background Color Setting R/Cr Signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " OIR_RES_BK_COL_G ,Background Color Setting G/Y Signal"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " OIR_RES_BK_COL_B ,Background Color Setting B/Cb Signal"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "OIR_SCL1_UPDATE,SCL1 Register Update Control Register"
|
|
bitfld.long 0x00 16. " OIR_SCL1_UPDATE_A ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " OIR_SCL1_VEN_B ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 0. " OIR_SCL1_VEN_A ,Frame Buffer Write Control Register Update" "Not updated,Updated"
|
|
group.long 0x108++0xF
|
|
line.long 0x00 "OIR_SCL1_WR1,Writing Mode Register"
|
|
bitfld.long 0x00 18. " OIR_RES_WRSWA2 ,32-Bit Swap Setting" "Not swapped,Swapped"
|
|
bitfld.long 0x00 17. " OIR_RES_WRSWA1 ,16-Bit Swap Setting" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x00 16. " OIR_RES_WRSWA0 ,8-Bit Swap Setting" "Not swapped,Swapped"
|
|
bitfld.long 0x00 2.--3. " OIR_RES_MD ,Frame Buffer Video-Signal Writing Format" ",RGB565 (16 bits),RGB888 (24 (32) bits),?..."
|
|
textline " "
|
|
bitfld.long 0x00 1. " OIR_RES_LOOP ,Frame Buffer Write Mode Select" "Frame,Line"
|
|
bitfld.long 0x00 0. " OIR_RES_BST_MD ,Transfer Burst Length for Frame Buffer Writing" "32-byte,128-byte"
|
|
line.long 0x04 "OIR_SCL1_WR2,Write Address Register 2"
|
|
line.long 0x08 "OIR_SCL1_WR3,Write Address Register 2"
|
|
hexmask.long.word 0x08 16.--30. 1. " OIR_RES_LN_OFF ,Frame Buffer Line Offset Address"
|
|
hexmask.long.word 0x08 0.--9. 1. " OIR_RES_FLM_NUM ,Number of Frames of Buffer to be Written"
|
|
line.long 0x0C "OIR_SCL1_WR4,Write Address Register 3"
|
|
hexmask.long.tbyte 0x0C 0.--22. 1. " OIR_RES_FLM_OFF ,Frame Buffer Frame Offset Address"
|
|
group.long 0x11C++0xB
|
|
line.long 0x00 "OIR_SCL1_WR5,Frame Sub-Sampling Register"
|
|
bitfld.long 0x00 12. " OIR_RES_INTER ,Field Operating Mode Select" "Progressive,Interlace"
|
|
bitfld.long 0x00 8.--9. " OIR_RES_FS_RATE ,Writing Rate" "1/1,1/2,1/4,1/8"
|
|
textline " "
|
|
bitfld.long 0x00 0. " OIR_RES_WENB ,Frame Buffer Write Enable" "Disabled,Enabled"
|
|
line.long 0x04 "OIR_SCL1_WR6,Bit Reduction Register"
|
|
bitfld.long 0x04 4. " OIR_RES_DTH_ON ,Dither Correction On/Off" "Off,On"
|
|
bitfld.long 0x04 0. " OIR_RES_BITDEC_ON ,Bit Reduction On/Off" "Off,On"
|
|
line.long 0x08 "OIR_SCL1_WR7,Write Detection Register"
|
|
bitfld.long 0x08 16. " OIR_SCL1_WR7 ,Write Detection Register" "Not detected,Detected"
|
|
hexmask.long.word 0x08 0.--9. 1. " OIR_RES_FLM_CNT ,Frame Number of Frame Being Accessed"
|
|
group.long 0x180++0x2B
|
|
line.long 0x00 "GR_OIR_UPDATE,Graphics (OIR) Register Update Control Register"
|
|
bitfld.long 0x00 8. " GR_OIR_UPDATE ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
textline " "
|
|
eventfld.long 0x00 4. " GR_OIR_P_VEN ,Graphics Display Register Update" "Not updated,Updated"
|
|
eventfld.long 0x00 0. " GR_OIR_IBUS_VEN ,Frame Buffer Read Control Register Update" "Not updated,Updated"
|
|
line.long 0x04 "GR_OIR_FLM_RD,Update Control Register"
|
|
bitfld.long 0x04 0. " GR_OIR_R_ENB ,Frame Buffer Read Enable" "Disabled,Enabled"
|
|
line.long 0x08 "GR_OIR_FLM1,Frame Buffer Control Register 1"
|
|
bitfld.long 0x04 16. " INC ,Selects the line offset address direction of the frame buffer" "Inc,Dec"
|
|
bitfld.long 0x04 8.--9. " GR_OIR_FLM_SEL ,Selects a frame buffer address setting signal" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x04 4. " GR_OIR_IMR_FLM_INV ,Sets the frame buffer number for distortion correction for displa" "Not replace,Replaces"
|
|
bitfld.long 0x04 0. " GR_OIR_BST_MD ,Frame Buffer Burst Transfer Mode" "32-byte,128-byte"
|
|
line.long 0x0C "GR_OIR_FLM2,Frame Buffer Control Register 2"
|
|
line.long 0x10 "GR_OIR_FLM3,Frame Buffer Control Register 3"
|
|
hexmask.long.word 0x0C 16.--30. 1. " GR_OIR_LN_OFF ,Frame Buffer Line Offset Address"
|
|
hexmask.long.word 0x0C 0.--9. 1. " GR_OIR_FLM_NUM ,Frame Number of Frame Buffer"
|
|
line.long 0x14 "GR_OIR_FLM4,Frame Buffer Control Register 4"
|
|
hexmask.long.tbyte 0x10 0.--22. 1. " GR_OIR_FLM_OFF ,Frame Buffer Frame Offset Address"
|
|
line.long 0x18 "GR_OIR_FLM5,Frame Buffer Control Register 5"
|
|
hexmask.long.word 0x14 16.--26. 1. " GR_OIR_FLM_LNUM ,Sets number of lines in a frame"
|
|
hexmask.long.word 0x14 0.--10. 1. " GR_OIR_FLM_LOOP ,Number of lines when reading the addresses repeatedly by returning to the start address after reaching the end address"
|
|
line.long 0x1C "GR_OIR_FLM6,Frame Buffer Control Register 6"
|
|
bitfld.long 0x18 28.--31. " GR_OIR_FORMAT ,Sets the format of the frame buffer read signal" "RGB565,RGB888,alphaRGB1555,alphaRGB4444,alphaRGB8888,CLUT8,CLUT4,CLUT1,,,RGBalpha5551,RGBalpha8888,?..."
|
|
hexmask.long.word 0x18 13.--25. 1. " GR_OIR_HW ,Sets the width of the horizontal valid period"
|
|
textline " "
|
|
bitfld.long 0x1C 12. " GR_OIR_RDSWA2 ,32-Bit Swap Setting" "Not swapped,Swapped"
|
|
bitfld.long 0x1C 11. " GR_OIR_RDSWA1 ,16-Bit Swap Setting" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x1C 10. " GR_OIR_RDSWA0 ,8-Bit Swap Setting" "Not swapped,Swapped"
|
|
bitfld.long 0x1C 0.--5. " GR_OIR_STA_POS ,Sets the amount of data to be skipped through" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x20 "GR_OIR_AB1,Alpha Blending Control Register 1"
|
|
bitfld.long 0x1C 4. " GR_OIR_GRC_DISP_ON ,Turns on/off frame-line display of the graphics image area" "Off,On"
|
|
bitfld.long 0x1C 0.--1. " GR_OIR_DISP_SEL ,Selects the graphics display mode" "Background,Lower-layer,Current,Blended"
|
|
line.long 0x24 "GR_OIR_AB2,Alpha Blending Control Register 2"
|
|
hexmask.long.word 0x20 16.--26. 1. " GR_OIR_GRC_VS ,Vertical Start Position of Graphics Image Area"
|
|
hexmask.long.word 0x20 0.--10. 1. " GR_OIR_GRC_VW ,Vertical Width of Graphics Image Area"
|
|
line.long 0x28 "GR_OIR_AB3,Alpha Blending Control Register 3"
|
|
hexmask.long.word 0x24 16.--26. 1. " GR_OIR_GRC_HS ,Horizontal Start Position of Graphics Image Area"
|
|
hexmask.long.word 0x24 0.--10. 1. " GR_OIR_GRC_HW ,Horizontal Width of Graphics Image Area"
|
|
group.long 0x1B8++0x1B
|
|
line.long 0x00 "GR_OIR_AB7,Alpha Blending Control Register 7"
|
|
bitfld.long 0x00 0. " GR_OIR_CK_ON ,CLUT-Index/RGB-Index Chroma-Key Processing On/Off" "Off,On"
|
|
line.long 0x04 "GR_OIR_AB8,Alpha Blending Control Register 8"
|
|
hexmask.long.byte 0x04 24.--31. 1. " GR_OIR_CK_KCLUT ,CLUT Signal for CLUT-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x04 16.--23. 1. " GR_OIR_CK_KG ,G Signal for RGB-Index Chroma-Key Processing"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " GR_OIR_CK_KB ,B Signal for RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x04 0.--7. 1. " GR_OIR_CK_KR ,R Signal for RGB-Index Chroma-Key Processing"
|
|
line.long 0x08 "GR_OIR_AB9,Alpha Blending Control Register 9"
|
|
hexmask.long.byte 0x08 24.--31. 1. " GR_OIR_CK_A ,Replaced Alpha Signal after RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x08 16.--23. 1. " GR_OIR_CK_G ,Replaced G Signal after RGB-Index Chroma-Key Processing"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " GR_OIR_CK_B ,Replaced B Signal after RGB-Index Chroma-Key Processing"
|
|
hexmask.long.byte 0x08 0.--7. 1. " GR_OIR_CK_R ,Replaced R Signal after RGB-Index Chroma-Key Processing"
|
|
line.long 0x0C "GR_OIR_AB10,Alpha Blending Control Register 10"
|
|
hexmask.long.byte 0xC 24.--31. 1. " GR_OIR_A0 ,CLUT1 alpha0 Signal"
|
|
hexmask.long.byte 0xC 16.--23. 1. " GR_OIR_G0 ,CLUT1 G0 Signal"
|
|
textline " "
|
|
hexmask.long.byte 0xC 8.--15. 1. " GR_OIR_B0 ,CLUT1 B0 Signal"
|
|
hexmask.long.byte 0xC 0.--7. 1. " GR_OIR_R0 ,CLUT1 R0 Signal"
|
|
line.long 0x10 "GR_OIR_AB11,Alpha Blending Control Register 11"
|
|
hexmask.long.byte 0x10 24.--31. 1. " GR_OIR_A1 ,CLUT1 alpha1 Signal"
|
|
hexmask.long.byte 0x10 16.--23. 1. " GR_OIR_G1 ,CLUT1 G1 Signal"
|
|
textline " "
|
|
hexmask.long.byte 0x10 8.--15. 1. " GR_OIR_B1 ,CLUT1 B1 Signal"
|
|
hexmask.long.byte 0x10 0.--7. 1. " GR_OIR_R1 ,CLUT1 R1 Signal"
|
|
line.long 0x14 "GR_OIR_BASE,Background Color Control Register"
|
|
hexmask.long.byte 0x14 16.--23. 1. " GR_OIR_BASE_G ,Background Color G Signal"
|
|
hexmask.long.byte 0x14 8.--15. 1. " GR_OIR_BASE_B ,Background Color B Signal"
|
|
textline " "
|
|
hexmask.long.byte 0x14 0.--7. 1. " GR_OIR_BASE_R ,Background Color R Signal"
|
|
line.long 0x18 "GR_OIR_CLUT,CLUT Table Control Register"
|
|
bitfld.long 0x18 16. " GR_OIR_CLUT ,CLUT Table Control Register" "Table 0,Table 1"
|
|
hexmask.long.word 0x18 0.--8. 1. " GR_OIR_LINE ,Line interrupt Setting"
|
|
rgroup.long 0x1D4++0x03
|
|
line.long 0x00 "GR_OIR_MON,Status Monitor Register"
|
|
hexmask.long.word 0x00 16.--26. 1. " GR_OIR_MON ,Status Monitor Register"
|
|
width 0x0b
|
|
tree.end
|
|
tree.end
|
|
tree.open "GAM_G (Video Display Controller 5:Output Controller)"
|
|
tree "Channel 0"
|
|
base ad:0xFCFF7800
|
|
width 14.
|
|
tree "Gamma Correction Block Register Configuration"
|
|
tree "GAM G"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "GAM_G_UPDATE,Register Update Control Register G In Gamma Correction Block"
|
|
sif (cpu()=="R7S721021"||cpu()=="SH7268"||cpu()=="SH7269")
|
|
eventfld.long 0x00 0. " GAM_G_VEN ,Gamma correction (G) register update" "Not updated,Updated"
|
|
else
|
|
bitfld.long 0x00 0. " GAM_G_VEN ,Gamma correction (G) register update" "Not updated,Updated"
|
|
endif
|
|
line.long 0x04 "GAM_SW,Function Switch Register In Gamma Correction Block"
|
|
bitfld.long 0x04 0. " GAM_ON ,Gamma correction on/off control" "Off,On"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "GAM_G_LUT1,Table sEtting Register G1 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN0 ,Gain adjustment of area 0 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN1 ,Gain adjustment of area 1 of G signal"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "GAM_G_LUT2,Table sEtting Register G2 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN2 ,Gain adjustment of area 2 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN3 ,Gain adjustment of area 3 of G signal"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GAM_G_LUT3,Table sEtting Register G3 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN4 ,Gain adjustment of area 4 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN5 ,Gain adjustment of area 5 of G signal"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GAM_G_LUT4,Table sEtting Register G4 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN6 ,Gain adjustment of area 6 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN7 ,Gain adjustment of area 7 of G signal"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "GAM_G_LUT5,Table sEtting Register G5 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN8 ,Gain adjustment of area 8 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN9 ,Gain adjustment of area 9 of G signal"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GAM_G_LUT6,Table sEtting Register G6 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN10 ,Gain adjustment of area 10 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN11 ,Gain adjustment of area 11 of G signal"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GAM_G_LUT7,Table sEtting Register G7 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN12 ,Gain adjustment of area 12 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN13 ,Gain adjustment of area 13 of G signal"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "GAM_G_LUT8,Table sEtting Register G8 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN14 ,Gain adjustment of area 14 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN15 ,Gain adjustment of area 15 of G signal"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "GAM_G_LUT9,Table sEtting Register G9 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN16 ,Gain adjustment of area 16 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN17 ,Gain adjustment of area 17 of G signal"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "GAM_G_LUT10,Table sEtting Register G10 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN18 ,Gain adjustment of area 18 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN19 ,Gain adjustment of area 19 of G signal"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "GAM_G_LUT11,Table sEtting Register G11 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN20 ,Gain adjustment of area 20 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN21 ,Gain adjustment of area 21 of G signal"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "GAM_G_LUT12,Table sEtting Register G12 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN22 ,Gain adjustment of area 22 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN23 ,Gain adjustment of area 23 of G signal"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "GAM_G_LUT13,Table sEtting Register G13 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN24 ,Gain adjustment of area 24 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN25 ,Gain adjustment of area 25 of G signal"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "GAM_G_LUT14,Table sEtting Register G14 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN26 ,Gain adjustment of area 26 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN27 ,Gain adjustment of area 27 of G signal"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "GAM_G_LUT15,Table sEtting Register G15 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN28 ,Gain adjustment of area 28 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN29 ,Gain adjustment of area 29 of G signal"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "GAM_G_LUT16,Table sEtting Register G16 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN30 ,Gain adjustment of area 30 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN31 ,Gain adjustment of area 31 of G signal"
|
|
newline
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "GAM_G_AREA1,Area Setting Register G1 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_G_TH1 ,Start threshold of area 1 of G signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_G_TH2 ,Start threshold of area 2 of G signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_G_TH3 ,Start threshold of area 3 of G signal"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "GAM_G_AREA2,Area Setting Register G2 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_G_TH4 ,Start threshold of area 4 of G signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_G_TH5 ,Start threshold of area 5 of G signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_G_TH6 ,Start threshold of area 6 of G signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_G_TH7 ,Start threshold of area 7 of G signal"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "GAM_G_AREA3,Area Setting Register G3 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_G_TH8 ,Start threshold of area 8 of G signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_G_TH9 ,Start threshold of area 9 of G signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_G_TH10 ,Start threshold of area 10 of G signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_G_TH11 ,Start threshold of area 11 of G signal"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "GAM_G_AREA4,Area Setting Register G4 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_G_TH12 ,Start threshold of area 12 of G signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_G_TH13 ,Start threshold of area 13 of G signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_G_TH14 ,Start threshold of area 14 of G signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_G_TH15 ,Start threshold of area 15 of G signal"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "GAM_G_AREA5,Area Setting Register G5 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_G_TH16 ,Start threshold of area 16 of G signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_G_TH17 ,Start threshold of area 17 of G signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_G_TH18 ,Start threshold of area 18 of G signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_G_TH19 ,Start threshold of area 19 of G signal"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "GAM_G_AREA6,Area Setting Register G6 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_G_TH20 ,Start threshold of area 20 of G signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_G_TH21 ,Start threshold of area 21 of G signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_G_TH22 ,Start threshold of area 22 of G signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_G_TH23 ,Start threshold of area 23 of G signal"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "GAM_G_AREA7,Area Setting Register G7 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_G_TH24 ,Start threshold of area 24 of G signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_G_TH25 ,Start threshold of area 25 of G signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_G_TH26 ,Start threshold of area 26 of G signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_G_TH27 ,Start threshold of area 27 of G signal"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "GAM_G_AREA8,Area Setting Register G8 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_G_TH28 ,Start threshold of area 28 of G signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_G_TH29 ,Start threshold of area 29 of G signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_G_TH30 ,Start threshold of area 30 of G signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_G_TH31 ,Start threshold of area 31 of G signal"
|
|
tree.end
|
|
tree "GAM B"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "GAM_B_UPDATE,Register Update Control Register B In Gamma Correction Block"
|
|
sif (cpu()=="R7S721021"||cpu()=="SH7268"||cpu()=="SH7269")
|
|
eventfld.long 0x00 0. " GAM_B_VEN ,Gamma correction (B) register update" "Not updated,Updated"
|
|
else
|
|
bitfld.long 0x00 0. " GAM_B_VEN ,Gamma correction (B) register update" "Not updated,Updated"
|
|
endif
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "GAM_B_LUT1,Table Setting Register B1 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN0 ,Gain adjustment of area 0 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN1 ,Gain adjustment of area 1 of B signal"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "GAM_B_LUT2,Table Setting Register B2 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN2 ,Gain adjustment of area 2 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN3 ,Gain adjustment of area 3 of B signal"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "GAM_B_LUT3,Table Setting Register B3 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN4 ,Gain adjustment of area 4 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN5 ,Gain adjustment of area 5 of B signal"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "GAM_B_LUT4,Table Setting Register B4 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN6 ,Gain adjustment of area 6 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN7 ,Gain adjustment of area 7 of B signal"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "GAM_B_LUT5,Table Setting Register B5 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN8 ,Gain adjustment of area 8 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN9 ,Gain adjustment of area 9 of B signal"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "GAM_B_LUT6,Table Setting Register B6 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN10 ,Gain adjustment of area 10 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN11 ,Gain adjustment of area 11 of B signal"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "GAM_B_LUT7,Table Setting Register B7 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN12 ,Gain adjustment of area 12 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN13 ,Gain adjustment of area 13 of B signal"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "GAM_B_LUT8,Table Setting Register B8 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN14 ,Gain adjustment of area 14 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN15 ,Gain adjustment of area 15 of B signal"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "GAM_B_LUT9,Table Setting Register B9 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN16 ,Gain adjustment of area 16 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN17 ,Gain adjustment of area 17 of B signal"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "GAM_B_LUT10,Table Setting Register B10 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN18 ,Gain adjustment of area 18 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN19 ,Gain adjustment of area 19 of B signal"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "GAM_B_LUT11,Table Setting Register B11 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN20 ,Gain adjustment of area 20 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN21 ,Gain adjustment of area 21 of B signal"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "GAM_B_LUT12,Table Setting Register B12 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN22 ,Gain adjustment of area 22 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN23 ,Gain adjustment of area 23 of B signal"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "GAM_B_LUT13,Table Setting Register B13 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN24 ,Gain adjustment of area 24 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN25 ,Gain adjustment of area 25 of B signal"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "GAM_B_LUT14,Table Setting Register B14 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN26 ,Gain adjustment of area 26 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN27 ,Gain adjustment of area 27 of B signal"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "GAM_B_LUT15,Table Setting Register B15 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN28 ,Gain adjustment of area 28 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN29 ,Gain adjustment of area 29 of B signal"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "GAM_B_LUT16,Table Setting Register B16 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN30 ,Gain adjustment of area 30 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN31 ,Gain adjustment of area 31 of B signal"
|
|
newline
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "GAM_B_AREA1 ,Area Setting Register B1 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_B_TH0 ,Start threshold of area 0 of B signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_B_TH1 ,Start threshold of area 1 of B signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_B_TH2 ,Start threshold of area 2 of B signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_B_TH3 ,Start threshold of area 3 of B signal"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "GAM_B_AREA2 ,Area Setting Register B2 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_B_TH4 ,Start threshold of area 4 of B signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_B_TH5 ,Start threshold of area 5 of B signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_B_TH6 ,Start threshold of area 6 of B signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_B_TH7 ,Start threshold of area 7 of B signal"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "GAM_B_AREA3 ,Area Setting Register B3 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_B_TH8 ,Start threshold of area 8 of B signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_B_TH9 ,Start threshold of area 9 of B signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_B_TH10 ,Start threshold of area 10 of B signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_B_TH11 ,Start threshold of area 11 of B signal"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "GAM_B_AREA4 ,Area Setting Register B4 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_B_TH12 ,Start threshold of area 12 of B signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_B_TH13 ,Start threshold of area 13 of B signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_B_TH14 ,Start threshold of area 14 of B signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_B_TH15 ,Start threshold of area 15 of B signal"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "GAM_B_AREA5 ,Area Setting Register B5 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_B_TH16 ,Start threshold of area 16 of B signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_B_TH17 ,Start threshold of area 17 of B signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_B_TH18 ,Start threshold of area 18 of B signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_B_TH19 ,Start threshold of area 19 of B signal"
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "GAM_B_AREA6 ,Area Setting Register B6 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_B_TH20 ,Start threshold of area 20 of B signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_B_TH21 ,Start threshold of area 21 of B signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_B_TH22 ,Start threshold of area 22 of B signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_B_TH23 ,Start threshold of area 23 of B signal"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "GAM_B_AREA7 ,Area Setting Register B7 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_B_TH24 ,Start threshold of area 24 of B signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_B_TH25 ,Start threshold of area 25 of B signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_B_TH26 ,Start threshold of area 26 of B signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_B_TH27 ,Start threshold of area 27 of B signal"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "GAM_B_AREA8 ,Area Setting Register B8 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_B_TH28 ,Start threshold of area 28 of B signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_B_TH29 ,Start threshold of area 29 of B signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_B_TH30 ,Start threshold of area 30 of B signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_B_TH31 ,Start threshold of area 31 of B signal"
|
|
tree.end
|
|
tree "GAM R"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "GAM_R_UPDATE,Register Update Control Register R In Gamma Correction Block"
|
|
sif (cpu()=="R7S721021"||cpu()=="SH7268"||cpu()=="SH7269")
|
|
eventfld.long 0x00 0. " GAM_R_VEN ,Gamma correction (R) register update" "Not updated,Updated"
|
|
else
|
|
bitfld.long 0x00 0. " GAM_R_VEN ,Gamma correction (R) register update" "Not updated,Updated"
|
|
endif
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "GAM_G_LUT1,Table Setting Register R1 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN0 ,Gain adjustment of area 0 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN1 ,Gain adjustment of area 1 of R signal"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "GAM_G_LUT2,Table Setting Register R2 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN2 ,Gain adjustment of area 2 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN3 ,Gain adjustment of area 3 of R signal"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "GAM_G_LUT3,Table Setting Register R3 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN4 ,Gain adjustment of area 4 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN5 ,Gain adjustment of area 5 of R signal"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "GAM_G_LUT4,Table Setting Register R4 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN6 ,Gain adjustment of area 6 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN7 ,Gain adjustment of area 7 of R signal"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "GAM_G_LUT5,Table Setting Register R5 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN8 ,Gain adjustment of area 8 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN9 ,Gain adjustment of area 9 of R signal"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "GAM_G_LUT6,Table Setting Register R6 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN10 ,Gain adjustment of area 10 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN11 ,Gain adjustment of area 11 of R signal"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "GAM_G_LUT7,Table Setting Register R7 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN12 ,Gain adjustment of area 12 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN13 ,Gain adjustment of area 13 of R signal"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "GAM_G_LUT8,Table Setting Register R8 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN14 ,Gain adjustment of area 14 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN15 ,Gain adjustment of area 15 of R signal"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "GAM_G_LUT9,Table Setting Register R9 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN16 ,Gain adjustment of area 16 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN17 ,Gain adjustment of area 17 of R signal"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "GAM_G_LUT10,Table Setting Register R10 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN18 ,Gain adjustment of area 18 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN19 ,Gain adjustment of area 19 of R signal"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "GAM_G_LUT11,Table Setting Register R11 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN20 ,Gain adjustment of area 20 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN21 ,Gain adjustment of area 21 of R signal"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "GAM_G_LUT12,Table Setting Register R12 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN22 ,Gain adjustment of area 22 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN23 ,Gain adjustment of area 23 of R signal"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "GAM_G_LUT13,Table Setting Register R13 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN24 ,Gain adjustment of area 24 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN25 ,Gain adjustment of area 25 of R signal"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "GAM_G_LUT14,Table Setting Register R14 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN26 ,Gain adjustment of area 26 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN27 ,Gain adjustment of area 27 of R signal"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "GAM_G_LUT15,Table Setting Register R15 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN28 ,Gain adjustment of area 28 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN29 ,Gain adjustment of area 29 of R signal"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "GAM_G_LUT16,Table Setting Register R16 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN30 ,Gain adjustment of area 30 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN31 ,Gain adjustment of area 31 of R signal"
|
|
newline
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "GAM_R_AREA1 ,Area Setting Register R1 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_R_TH0 ,Start threshold of area 0 of R signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_R_TH1 ,Start threshold of area 1 of R signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_R_TH2 ,Start threshold of area 2 of R signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_R_TH3 ,Start threshold of area 3 of R signal"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "GAM_R_AREA2 ,Area Setting Register R2 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_R_TH4 ,Start threshold of area 4 of R signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_R_TH5 ,Start threshold of area 5 of R signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_R_TH6 ,Start threshold of area 6 of R signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_R_TH7 ,Start threshold of area 7 of R signal"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "GAM_R_AREA3 ,Area Setting Register R3 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_R_TH8 ,Start threshold of area 8 of R signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_R_TH9 ,Start threshold of area 9 of R signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_R_TH10 ,Start threshold of area 10 of R signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_R_TH11 ,Start threshold of area 11 of R signal"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "GAM_R_AREA4 ,Area Setting Register R4 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_R_TH12 ,Start threshold of area 12 of R signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_R_TH13 ,Start threshold of area 13 of R signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_R_TH14 ,Start threshold of area 14 of R signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_R_TH15 ,Start threshold of area 15 of R signal"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "GAM_R_AREA5 ,Area Setting Register R5 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_R_TH16 ,Start threshold of area 16 of R signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_R_TH17 ,Start threshold of area 17 of R signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_R_TH18 ,Start threshold of area 18 of R signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_R_TH19 ,Start threshold of area 19 of R signal"
|
|
group.long 0x15C++0x03
|
|
line.long 0x00 "GAM_R_AREA6 ,Area Setting Register R6 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_R_TH20 ,Start threshold of area 20 of R signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_R_TH21 ,Start threshold of area 21 of R signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_R_TH22 ,Start threshold of area 22 of R signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_R_TH23 ,Start threshold of area 23 of R signal"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "GAM_R_AREA7 ,Area Setting Register R7 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_R_TH24 ,Start threshold of area 24 of R signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_R_TH25 ,Start threshold of area 25 of R signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_R_TH26 ,Start threshold of area 26 of R signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_R_TH27 ,Start threshold of area 27 of R signal"
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "GAM_R_AREA8 ,Area Setting Register R8 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_R_TH28 ,Start threshold of area 28 of R signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_R_TH29 ,Start threshold of area 29 of R signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_R_TH30 ,Start threshold of area 30 of R signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_R_TH31 ,Start threshold of area 31 of R signal"
|
|
tree.end
|
|
tree.end
|
|
tree "TCON Block Register Configuration"
|
|
width 16.
|
|
group.long 0x180++0x43
|
|
line.long 0x00 "TCON_UPDATE,TCON Register Update Control Register"
|
|
sif (cpu()=="R7S721021"||cpu()=="SH7268"||cpu()=="SH7269")
|
|
eventfld.long 0x00 0. " TCON_VEN ,LCD TCON register update" "Not updated,Updated"
|
|
else
|
|
bitfld.long 0x00 0. " TCON_VEN ,LCD TCON register update" "Not updated,Updated"
|
|
endif
|
|
line.long 0x04 "TCON_TIM,TCON Reference Timing Setting Register"
|
|
hexmask.long.word 0x04 16.--26. 1. " TCON_HALF ,1/2fH timing"
|
|
hexmask.long.word 0x04 0.--10. 1. " TCON_OFFSET ,Offset hsync signal timing"
|
|
line.long 0x08 "TCON_TIM_STVA1,TCON Vertical Timing Setting Register STVA1"
|
|
hexmask.long.word 0x08 16.--26. 1. " TCON_STVA_VS ,STVA signal pulse start position"
|
|
hexmask.long.word 0x08 0.--10. 1. " TCON_STVA_VW ,STVA signal pulse width"
|
|
line.long 0x0C "TCON_TIM_STVA2,TCON Vertical Timing Setting Register STVA2"
|
|
bitfld.long 0x0C 4. " TCON_STVA_INV ,Polarity inversion control of STVA signal" "Not inverted,Inverted"
|
|
bitfld.long 0x0C 0.--2. " TCON_STVA_SEL ,Output signal select for LCD_TCON0 pin" "STVA/VS,STVB/VE,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
line.long 0x10 "TCON_TIM_STVB1,TCON Vertical Timing Setting Register STVB1"
|
|
hexmask.long.word 0x10 16.--26. 1. " TCON_STVB_VS ,STVB signal pulse start position"
|
|
hexmask.long.word 0x10 0.--10. 1. " TCON_STVB_VW ,STVB signal pulse width"
|
|
line.long 0x14 "TCON_TIM_STVB2,TCON Vertical Timing Setting Register STVB2"
|
|
bitfld.long 0x14 4. " TCON_STVB_INV ,Polarity inversion control of STVB signal" "Not inverted,Inverted"
|
|
bitfld.long 0x14 0.--2. " TCON_STVB_SEL ,Output signal select for LCD_TCON1 pin" "STVA/VS,STVB/VE,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
line.long 0x18 "TCON_TIM_STH1,TCON Horizontal Timing Setting Register STH1"
|
|
hexmask.long.word 0x18 16.--26. 1. " TCON_STH_HS ,STH signal pulse start position"
|
|
hexmask.long.word 0x18 0.--10. 1. " TCON_STH_HW ,STH signal pulse width"
|
|
line.long 0x1C "TCON_TIM_STH2,TCON Horizontal Timing Setting Register STH2"
|
|
sif (cpu()=="R7S721021")||cpuis("SH7268")||cpuis("SH7269")
|
|
bitfld.long 0x1C 8. " TCON_STHHSSEL ,STH signal operating reference select" "Hsync,Offset Hsync"
|
|
bitfld.long 0x1C 4. " TCON_STH_INV ,Polarity inversion control of STH signal" "Not inverted,Inverted"
|
|
newline
|
|
bitfld.long 0x1C 0.--2. " TCON_STH_SEL ,Output signal select for LCD_TCON2 pin" "STVA/VS,STVB/VE,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
else
|
|
bitfld.long 0x1C 4. " TCON_STH_INV ,Polarity inversion control of STH signal" "Not inverted,Inverted"
|
|
bitfld.long 0x1C 0.--2. " TCON_STH_SEL ,Output signal select for LCD_TCON1 pin" "STVA/VS,STVB/VS,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
endif
|
|
line.long 0x20 "TCON_TIM_STB1,TCON Horizontal Timing Setting Register STB1"
|
|
hexmask.long.word 0x20 16.--26. 1. " TCON_STB_HS ,STB signal pulse start position"
|
|
hexmask.long.word 0x20 0.--10. 1. " TCON_STB_HW ,STB signal pulse width"
|
|
line.long 0x24 "TCON_TIM_STB2,TCON Horizontal Timing Setting Register STB2"
|
|
sif (cpu()=="R7S721021")||cpuis("SH7268")||cpuis("SH7269")
|
|
bitfld.long 0x24 8. " TCON_STBHSSEL ,STB signal operating reference select" "Hsync,Offset Hsync"
|
|
bitfld.long 0x24 4. " TCON_STB_INV ,Polarity inversion control of STB signal" "Not inverted,Inverted"
|
|
newline
|
|
bitfld.long 0x24 0.--2. " TCON_STB_SEL ,Output signal select for LCD_TCON3 pin" "STVA/VS,STVB/VE,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
else
|
|
bitfld.long 0x24 4. " TCON_STB_INV ,Polarity inversion control of STB signal" "Not inverted,Inverted"
|
|
bitfld.long 0x24 0.--2. " TCON_STB_SEL ,Output signal select for LCD_TCON1 pin" "STVA/VS,STVB/VS,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
endif
|
|
line.long 0x28 "TCON_TIM_CPV1,TCON Horizontal Timing Setting Register CPV1"
|
|
hexmask.long.word 0x28 16.--26. 1. " TCON_CPV_HS ,CPV signal pulse start position"
|
|
hexmask.long.word 0x28 0.--10. 1. " TCON_CPV_HW ,CPV signal pulse width"
|
|
line.long 0x2C "TCON_TIM_CPV2,TCON Horizontal Timing Setting Register CPV2"
|
|
sif (cpu()=="R7S721021")||cpuis("SH7268")||cpuis("SH7269")
|
|
bitfld.long 0x2C 8. " TCON_CPVHSSEL ,CPV signal operating reference select" "Hsync,Offset Hsync"
|
|
bitfld.long 0x2C 4. " TCON_CPV_INV ,Polarity inversion control of CPV signal" "Not inverted,Inverted"
|
|
newline
|
|
bitfld.long 0x2C 0.--2. " TCON_CPV_SEL ,Output signal select for LCD_TCON4 pin" "STVA/VS,STVB/VE,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
else
|
|
bitfld.long 0x2C 4. " TCON_CPV_INV ,Polarity inversion control of CPV signal" "Not inverted,Inverted"
|
|
bitfld.long 0x2C 0.--2. " TCON_CPV_SEL ,Output signal select for LCD_TCON1 pin" "STVA/VS,STVB/VS,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
endif
|
|
line.long 0x30 "TCON_TIM_POLA1,TCON Horizontal Timing Setting Register POLA1"
|
|
hexmask.long.word 0x30 16.--26. 1. " TCON_POLA_HS ,POLA signal pulse start position"
|
|
hexmask.long.word 0x30 0.--10. 1. " TCON_POLA_HW ,POLA signal pulse width"
|
|
line.long 0x34 "TCON_TIM_POLA2,TCON Horizontal Timing Setting Register POLA2"
|
|
sif (cpu()=="R7S721021")||cpuis("SH7268")||cpuis("SH7269")
|
|
bitfld.long 0x34 12.--13. " TCON_POLA_MD ,POLA signal generation mode select" "Normal,1x1 reverse,1x2 reverse,2x2 reverse"
|
|
bitfld.long 0x34 8. " TCON_POLA_HS_SEL ,POLA signal operating reference select" "Hsync,Offset Hsync"
|
|
newline
|
|
bitfld.long 0x34 4. " TCON_POLA_INV ,Polarity inversion control of POLA signal" "Not inverted,Inverted"
|
|
bitfld.long 0x34 0.--2. " TCON_POLA_SEL ,Output signal select for LCD_TCON5 pin" "STVA/VS,STVB/VE,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
else
|
|
bitfld.long 0x34 4. " TCON_POLA_INV ,Polarity inversion control of POLA signal" "Not inverted,Inverted"
|
|
bitfld.long 0x34 0.--2. " TCON_POLA_SEL ,Output signal select for LCD_TCON1 pin" "STVA/VS,STVB/VS,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
endif
|
|
line.long 0x38 "TCON_TIM_POLB1,TCON Horizontal Timing Setting Register Polb1"
|
|
hexmask.long.word 0x38 16.--26. 1. " TCON_POLB_HS ,POLB signal pulse start position"
|
|
hexmask.long.word 0x38 0.--10. 1. " TCON_POLB_HW ,POLB signal pulse width"
|
|
line.long 0x3C "TCON_TIM_POLB2,TCON horizontal timing setting register POLB2"
|
|
sif (cpu()=="R7S721021")||cpuis("SH7268")||cpuis("SH7269")
|
|
bitfld.long 0x3C 12.--13. " TCON_POLB_MD ,POLB signal generation mode select" "Normal,1x1 reverse,1x2 reverse,2x2 reverse"
|
|
bitfld.long 0x3C 8. " TCON_POLB_HS_SEL ,POLB signal operating reference select" "Hsync,Offset Hsync"
|
|
newline
|
|
bitfld.long 0x3C 4. " TCON_POLB_INV ,Polarity inversion control of POLB signal" "Not inverted,Inverted"
|
|
bitfld.long 0x3C 0.--2. " TCON_POLB_SEL ,Output signal select for LCD_TCON6 pin" "STVA/VS,STVB/VE,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
else
|
|
bitfld.long 0x3C 4. " TCON_POLB_INV ,Polarity inversion control of POLB signal" "Not inverted,Inverted"
|
|
bitfld.long 0x3C 0.--2. " TCON_POLB_SEL ,Output signal select for LCD_TCON1 pin" "STVA/VS,STVB/VS,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
endif
|
|
line.long 0x40 "TCON_TIM_DE,TCON Data Enable Polarity Setting Register"
|
|
bitfld.long 0x40 0. " TCON_DE_INV ,Polarity inversion control of DE signal" "Not inverted,Inverted"
|
|
tree.end
|
|
tree "Output Controller Register Configuration"
|
|
width 14.
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "OUT_UPDATE,Register Update Control Register In Output Controller"
|
|
sif (cpu()=="R7S721021"||cpu()=="SH7268"||cpu()=="SH7269")
|
|
eventfld.long 0x00 0. " OUTCNT_VEN ,Brightness/contrast|dither process|output interface register update" "Not updated,Updated"
|
|
else
|
|
bitfld.long 0x00 0. " OUTCNT_VEN ,Brightness/contrast|dither process|output interface register update" "Not updated,Updated"
|
|
endif
|
|
if ((per.l(ad:0xFCFF7800+0x204)&0x300)==0x100)
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "OUT_SET,Output Interface Register"
|
|
bitfld.long 0x00 28. " OUT_ENDIAN_ON ,Bit endian change on/off control" "Off,On"
|
|
bitfld.long 0x00 24. " OUT_SWAP_ON ,B/R Signal swap on/off control" "Off,On"
|
|
newline
|
|
bitfld.long 0x00 12.--13. " OUT_FORMAT ,Output format select" "RBG888,RGB666,RGB565,Serial RGB"
|
|
bitfld.long 0x00 8.--9. " OUT_FRQ_SEL ,Clock frequency control" "100% speed,Triple speed,Quadruple speed,?..."
|
|
newline
|
|
bitfld.long 0x00 4. " OUT_DIR_SEL ,Scan direction select" "Forward scan,Reverse scan"
|
|
bitfld.long 0x00 0.--1. " OUT_PHASE ,Clock phase adjustment during serial RGB output triple speed mode" "0 clk,1 clk,2 clk,?..."
|
|
elif ((per.l(ad:0xFCFF7800+0x204)&0x300)==0x200)
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "OUT_SET,Output Interface Register"
|
|
bitfld.long 0x00 28. " OUT_ENDIAN_ON ,Bit endian change on/off control" "Off,On"
|
|
bitfld.long 0x00 24. " OUT_SWAP_ON ,B/R signal swap on/off control" "Off,On"
|
|
newline
|
|
bitfld.long 0x00 12.--13. " OUT_FORMAT ,Output format select" "RBG888,RGB666,RGB565,Serial RGB"
|
|
bitfld.long 0x00 8.--9. " OUT_FRQ_SEL ,Clock frequency control" "100% speed,Triple speed,Quadruple speed,?..."
|
|
newline
|
|
bitfld.long 0x00 4. " OUT_DIR_SEL ,Scan direction select" "Forward scan,Reverse scan"
|
|
bitfld.long 0x00 0.--1. " OUT_PHASE ,Clock phase adjustment during serial RGB output triple speed mode" "0 clk,1 clk,2 clk,3 clk"
|
|
else
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "OUT_SET,Output Interface Register"
|
|
bitfld.long 0x00 28. " OUT_ENDIAN_ON ,Bit endian change on/off control" "Off,On"
|
|
bitfld.long 0x00 24. " OUT_SWAP_ON ,B/R signal swap on/off control" "Off,On"
|
|
newline
|
|
bitfld.long 0x00 12.--13. " OUT_FORMAT ,Output format select" "RBG888,RGB666,RGB565,Serial RGB"
|
|
bitfld.long 0x00 8.--9. " OUT_FRQ_SEL ,Clock frequency control" "100% speed,Triple speed,Quadruple speed,?..."
|
|
newline
|
|
bitfld.long 0x00 4. " OUT_DIR_SEL ,Scan direction select" "Forward scan,Reverse scan"
|
|
sif (cpu()=="R7S721021")||cpuis("SH7268")||cpuis("SH7269")
|
|
rbitfld.long 0x00 0.--1. " OUT_PHASE ,Clock phase adjustment during serial RGB output triple speed mode" "0 clk,1 clk,2 clk,3 clk"
|
|
else
|
|
bitfld.long 0x00 0.--1. " OUT_PHASE ,Clock phase adjustment during serial Rgb output triple speed mode" "0 clk,1 clk,?..."
|
|
endif
|
|
endif
|
|
group.long 0x208++0x0F
|
|
line.long 0x00 "OUT_BRIGHT1,Brightness (DC) Correction Register 1"
|
|
hexmask.long.word 0x00 0.--9. 1. " PBRT_G ,Brightness (DC) adjustment of G signal"
|
|
line.long 0x04 "OUT_BRIGHT2,Brightness (DC) Correction Register 2"
|
|
hexmask.long.word 0x04 16.--25. 1. " PBRT_B ,Brightness (DC) adjustment of B signal"
|
|
hexmask.long.word 0x04 0.--9. 1. " PBRT_R ,Brightness (DC) adjustment of R signal"
|
|
line.long 0x08 "OUT_CONTRAST,Contrast (Gain) Correction Register"
|
|
hexmask.long.byte 0x08 16.--23. 1. " CONT_G ,Contrast (gain) adjustment of G signal"
|
|
hexmask.long.byte 0x08 8.--15. 1. " CONT_B ,Contrast (gain) adjustment of B signal"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " CONT_R ,Contrast (gain) adjustment of R signal"
|
|
line.long 0x0C "OUT_PDTHA,Panel Dither Register"
|
|
bitfld.long 0x0C 20.--21. " PDTH_SEL ,Panel dither operation mode" "Truncate,Round-off,2x2 pattern dither,Random pattern dither"
|
|
bitfld.long 0x0C 16.--17. " PDTH_FORMAT ,Panel dither output format select" "RGB888,RGB666,RGB565,?..."
|
|
newline
|
|
bitfld.long 0x0C 12.--13. " PDTH_PA ,Pattern value (A) of 2 x 2 pattern dither" "0,1,2,3"
|
|
bitfld.long 0x0C 8.--9. " PDTH_PB ,Pattern value (B) of 2 x 2 pattern dither" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0C 4.--5. " PDTH_PC ,Pattern value (C) of 2 x 2 pattern dither" "0,1,2,3"
|
|
bitfld.long 0x0C 0.--1. " PDTH_PD ,Pattern value (D) of 2 x 2 pattern dither" "0,1,2,3"
|
|
group.long 0x224++0x03
|
|
line.long 0x00 "OUT_CLK_PHASE,OUtput Phase Control Register"
|
|
bitfld.long 0x00 12. " OUTCNT_FRONT_GAM ,Correction circuit sequence control" "Brightness->contrast->gamma correction,Gamma correction->brightness->contrast"
|
|
newline
|
|
bitfld.long 0x00 8. " OUTCNT_LCD_EDGE ,Output phase control of lcd_data23 to LCD_DATA0 pin" "Rising edge,Falling edge"
|
|
newline
|
|
bitfld.long 0x00 6. " OUTCNT_STVA_EDGE ,Output phase control of LCD_TCON0 pin" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 5. " OUTCNT_STVB_EDGE ,Output phase control of LCD_TCON1 pin" "Rising edge,Falling edge"
|
|
newline
|
|
bitfld.long 0x00 4. " OUTCNT_STH_EDGE ,Output phase control of LCD_TCON2 pin" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 3. " OUTCNT_STB_EDGE ,Output phase control of LCD_TCON3 pin" "Rising edge,Falling edge"
|
|
newline
|
|
bitfld.long 0x00 2. " OUTCNT_CPV_EDGE ,Output phase control of LCD_TCON4 pin" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 1. " OUTCNT_POLA_EDGE ,Output phase control of LCD_TCON5 pin" "Rising edge,Falling edge"
|
|
newline
|
|
bitfld.long 0x00 0. " OUTCNT_POLB_EDGE ,Output phase control of LCD_TCON6 pin" "Rising edge,Falling edge"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0xFCFF9800
|
|
width 14.
|
|
tree "Gamma Correction Block Register Configuration"
|
|
tree "GAM G"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "GAM_G_UPDATE,Register Update Control Register G In Gamma Correction Block"
|
|
sif (cpu()=="R7S721021"||cpu()=="SH7268"||cpu()=="SH7269")
|
|
eventfld.long 0x00 0. " GAM_G_VEN ,Gamma correction (G) register update" "Not updated,Updated"
|
|
else
|
|
bitfld.long 0x00 0. " GAM_G_VEN ,Gamma correction (G) register update" "Not updated,Updated"
|
|
endif
|
|
line.long 0x04 "GAM_SW,Function Switch Register In Gamma Correction Block"
|
|
bitfld.long 0x04 0. " GAM_ON ,Gamma correction on/off control" "Off,On"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "GAM_G_LUT1,Table sEtting Register G1 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN0 ,Gain adjustment of area 0 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN1 ,Gain adjustment of area 1 of G signal"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "GAM_G_LUT2,Table sEtting Register G2 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN2 ,Gain adjustment of area 2 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN3 ,Gain adjustment of area 3 of G signal"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GAM_G_LUT3,Table sEtting Register G3 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN4 ,Gain adjustment of area 4 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN5 ,Gain adjustment of area 5 of G signal"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GAM_G_LUT4,Table sEtting Register G4 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN6 ,Gain adjustment of area 6 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN7 ,Gain adjustment of area 7 of G signal"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "GAM_G_LUT5,Table sEtting Register G5 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN8 ,Gain adjustment of area 8 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN9 ,Gain adjustment of area 9 of G signal"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GAM_G_LUT6,Table sEtting Register G6 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN10 ,Gain adjustment of area 10 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN11 ,Gain adjustment of area 11 of G signal"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GAM_G_LUT7,Table sEtting Register G7 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN12 ,Gain adjustment of area 12 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN13 ,Gain adjustment of area 13 of G signal"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "GAM_G_LUT8,Table sEtting Register G8 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN14 ,Gain adjustment of area 14 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN15 ,Gain adjustment of area 15 of G signal"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "GAM_G_LUT9,Table sEtting Register G9 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN16 ,Gain adjustment of area 16 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN17 ,Gain adjustment of area 17 of G signal"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "GAM_G_LUT10,Table sEtting Register G10 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN18 ,Gain adjustment of area 18 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN19 ,Gain adjustment of area 19 of G signal"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "GAM_G_LUT11,Table sEtting Register G11 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN20 ,Gain adjustment of area 20 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN21 ,Gain adjustment of area 21 of G signal"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "GAM_G_LUT12,Table sEtting Register G12 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN22 ,Gain adjustment of area 22 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN23 ,Gain adjustment of area 23 of G signal"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "GAM_G_LUT13,Table sEtting Register G13 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN24 ,Gain adjustment of area 24 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN25 ,Gain adjustment of area 25 of G signal"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "GAM_G_LUT14,Table sEtting Register G14 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN26 ,Gain adjustment of area 26 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN27 ,Gain adjustment of area 27 of G signal"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "GAM_G_LUT15,Table sEtting Register G15 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN28 ,Gain adjustment of area 28 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN29 ,Gain adjustment of area 29 of G signal"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "GAM_G_LUT16,Table sEtting Register G16 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_G_GAIN30 ,Gain adjustment of area 30 of G signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_G_GAIN31 ,Gain adjustment of area 31 of G signal"
|
|
newline
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "GAM_G_AREA1,Area Setting Register G1 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_G_TH1 ,Start threshold of area 1 of G signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_G_TH2 ,Start threshold of area 2 of G signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_G_TH3 ,Start threshold of area 3 of G signal"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "GAM_G_AREA2,Area Setting Register G2 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_G_TH4 ,Start threshold of area 4 of G signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_G_TH5 ,Start threshold of area 5 of G signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_G_TH6 ,Start threshold of area 6 of G signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_G_TH7 ,Start threshold of area 7 of G signal"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "GAM_G_AREA3,Area Setting Register G3 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_G_TH8 ,Start threshold of area 8 of G signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_G_TH9 ,Start threshold of area 9 of G signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_G_TH10 ,Start threshold of area 10 of G signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_G_TH11 ,Start threshold of area 11 of G signal"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "GAM_G_AREA4,Area Setting Register G4 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_G_TH12 ,Start threshold of area 12 of G signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_G_TH13 ,Start threshold of area 13 of G signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_G_TH14 ,Start threshold of area 14 of G signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_G_TH15 ,Start threshold of area 15 of G signal"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "GAM_G_AREA5,Area Setting Register G5 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_G_TH16 ,Start threshold of area 16 of G signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_G_TH17 ,Start threshold of area 17 of G signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_G_TH18 ,Start threshold of area 18 of G signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_G_TH19 ,Start threshold of area 19 of G signal"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "GAM_G_AREA6,Area Setting Register G6 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_G_TH20 ,Start threshold of area 20 of G signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_G_TH21 ,Start threshold of area 21 of G signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_G_TH22 ,Start threshold of area 22 of G signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_G_TH23 ,Start threshold of area 23 of G signal"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "GAM_G_AREA7,Area Setting Register G7 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_G_TH24 ,Start threshold of area 24 of G signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_G_TH25 ,Start threshold of area 25 of G signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_G_TH26 ,Start threshold of area 26 of G signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_G_TH27 ,Start threshold of area 27 of G signal"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "GAM_G_AREA8,Area Setting Register G8 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_G_TH28 ,Start threshold of area 28 of G signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_G_TH29 ,Start threshold of area 29 of G signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_G_TH30 ,Start threshold of area 30 of G signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_G_TH31 ,Start threshold of area 31 of G signal"
|
|
tree.end
|
|
tree "GAM B"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "GAM_B_UPDATE,Register Update Control Register B In Gamma Correction Block"
|
|
sif (cpu()=="R7S721021"||cpu()=="SH7268"||cpu()=="SH7269")
|
|
eventfld.long 0x00 0. " GAM_B_VEN ,Gamma correction (B) register update" "Not updated,Updated"
|
|
else
|
|
bitfld.long 0x00 0. " GAM_B_VEN ,Gamma correction (B) register update" "Not updated,Updated"
|
|
endif
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "GAM_B_LUT1,Table Setting Register B1 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN0 ,Gain adjustment of area 0 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN1 ,Gain adjustment of area 1 of B signal"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "GAM_B_LUT2,Table Setting Register B2 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN2 ,Gain adjustment of area 2 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN3 ,Gain adjustment of area 3 of B signal"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "GAM_B_LUT3,Table Setting Register B3 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN4 ,Gain adjustment of area 4 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN5 ,Gain adjustment of area 5 of B signal"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "GAM_B_LUT4,Table Setting Register B4 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN6 ,Gain adjustment of area 6 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN7 ,Gain adjustment of area 7 of B signal"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "GAM_B_LUT5,Table Setting Register B5 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN8 ,Gain adjustment of area 8 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN9 ,Gain adjustment of area 9 of B signal"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "GAM_B_LUT6,Table Setting Register B6 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN10 ,Gain adjustment of area 10 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN11 ,Gain adjustment of area 11 of B signal"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "GAM_B_LUT7,Table Setting Register B7 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN12 ,Gain adjustment of area 12 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN13 ,Gain adjustment of area 13 of B signal"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "GAM_B_LUT8,Table Setting Register B8 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN14 ,Gain adjustment of area 14 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN15 ,Gain adjustment of area 15 of B signal"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "GAM_B_LUT9,Table Setting Register B9 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN16 ,Gain adjustment of area 16 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN17 ,Gain adjustment of area 17 of B signal"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "GAM_B_LUT10,Table Setting Register B10 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN18 ,Gain adjustment of area 18 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN19 ,Gain adjustment of area 19 of B signal"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "GAM_B_LUT11,Table Setting Register B11 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN20 ,Gain adjustment of area 20 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN21 ,Gain adjustment of area 21 of B signal"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "GAM_B_LUT12,Table Setting Register B12 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN22 ,Gain adjustment of area 22 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN23 ,Gain adjustment of area 23 of B signal"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "GAM_B_LUT13,Table Setting Register B13 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN24 ,Gain adjustment of area 24 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN25 ,Gain adjustment of area 25 of B signal"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "GAM_B_LUT14,Table Setting Register B14 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN26 ,Gain adjustment of area 26 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN27 ,Gain adjustment of area 27 of B signal"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "GAM_B_LUT15,Table Setting Register B15 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN28 ,Gain adjustment of area 28 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN29 ,Gain adjustment of area 29 of B signal"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "GAM_B_LUT16,Table Setting Register B16 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_B_GAIN30 ,Gain adjustment of area 30 of B signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_B_GAIN31 ,Gain adjustment of area 31 of B signal"
|
|
newline
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "GAM_B_AREA1 ,Area Setting Register B1 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_B_TH0 ,Start threshold of area 0 of B signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_B_TH1 ,Start threshold of area 1 of B signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_B_TH2 ,Start threshold of area 2 of B signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_B_TH3 ,Start threshold of area 3 of B signal"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "GAM_B_AREA2 ,Area Setting Register B2 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_B_TH4 ,Start threshold of area 4 of B signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_B_TH5 ,Start threshold of area 5 of B signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_B_TH6 ,Start threshold of area 6 of B signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_B_TH7 ,Start threshold of area 7 of B signal"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "GAM_B_AREA3 ,Area Setting Register B3 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_B_TH8 ,Start threshold of area 8 of B signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_B_TH9 ,Start threshold of area 9 of B signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_B_TH10 ,Start threshold of area 10 of B signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_B_TH11 ,Start threshold of area 11 of B signal"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "GAM_B_AREA4 ,Area Setting Register B4 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_B_TH12 ,Start threshold of area 12 of B signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_B_TH13 ,Start threshold of area 13 of B signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_B_TH14 ,Start threshold of area 14 of B signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_B_TH15 ,Start threshold of area 15 of B signal"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "GAM_B_AREA5 ,Area Setting Register B5 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_B_TH16 ,Start threshold of area 16 of B signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_B_TH17 ,Start threshold of area 17 of B signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_B_TH18 ,Start threshold of area 18 of B signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_B_TH19 ,Start threshold of area 19 of B signal"
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "GAM_B_AREA6 ,Area Setting Register B6 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_B_TH20 ,Start threshold of area 20 of B signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_B_TH21 ,Start threshold of area 21 of B signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_B_TH22 ,Start threshold of area 22 of B signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_B_TH23 ,Start threshold of area 23 of B signal"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "GAM_B_AREA7 ,Area Setting Register B7 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_B_TH24 ,Start threshold of area 24 of B signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_B_TH25 ,Start threshold of area 25 of B signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_B_TH26 ,Start threshold of area 26 of B signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_B_TH27 ,Start threshold of area 27 of B signal"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "GAM_B_AREA8 ,Area Setting Register B8 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_B_TH28 ,Start threshold of area 28 of B signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_B_TH29 ,Start threshold of area 29 of B signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_B_TH30 ,Start threshold of area 30 of B signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_B_TH31 ,Start threshold of area 31 of B signal"
|
|
tree.end
|
|
tree "GAM R"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "GAM_R_UPDATE,Register Update Control Register R In Gamma Correction Block"
|
|
sif (cpu()=="R7S721021"||cpu()=="SH7268"||cpu()=="SH7269")
|
|
eventfld.long 0x00 0. " GAM_R_VEN ,Gamma correction (R) register update" "Not updated,Updated"
|
|
else
|
|
bitfld.long 0x00 0. " GAM_R_VEN ,Gamma correction (R) register update" "Not updated,Updated"
|
|
endif
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "GAM_G_LUT1,Table Setting Register R1 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN0 ,Gain adjustment of area 0 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN1 ,Gain adjustment of area 1 of R signal"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "GAM_G_LUT2,Table Setting Register R2 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN2 ,Gain adjustment of area 2 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN3 ,Gain adjustment of area 3 of R signal"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "GAM_G_LUT3,Table Setting Register R3 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN4 ,Gain adjustment of area 4 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN5 ,Gain adjustment of area 5 of R signal"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "GAM_G_LUT4,Table Setting Register R4 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN6 ,Gain adjustment of area 6 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN7 ,Gain adjustment of area 7 of R signal"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "GAM_G_LUT5,Table Setting Register R5 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN8 ,Gain adjustment of area 8 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN9 ,Gain adjustment of area 9 of R signal"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "GAM_G_LUT6,Table Setting Register R6 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN10 ,Gain adjustment of area 10 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN11 ,Gain adjustment of area 11 of R signal"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "GAM_G_LUT7,Table Setting Register R7 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN12 ,Gain adjustment of area 12 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN13 ,Gain adjustment of area 13 of R signal"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "GAM_G_LUT8,Table Setting Register R8 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN14 ,Gain adjustment of area 14 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN15 ,Gain adjustment of area 15 of R signal"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "GAM_G_LUT9,Table Setting Register R9 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN16 ,Gain adjustment of area 16 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN17 ,Gain adjustment of area 17 of R signal"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "GAM_G_LUT10,Table Setting Register R10 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN18 ,Gain adjustment of area 18 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN19 ,Gain adjustment of area 19 of R signal"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "GAM_G_LUT11,Table Setting Register R11 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN20 ,Gain adjustment of area 20 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN21 ,Gain adjustment of area 21 of R signal"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "GAM_G_LUT12,Table Setting Register R12 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN22 ,Gain adjustment of area 22 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN23 ,Gain adjustment of area 23 of R signal"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "GAM_G_LUT13,Table Setting Register R13 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN24 ,Gain adjustment of area 24 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN25 ,Gain adjustment of area 25 of R signal"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "GAM_G_LUT14,Table Setting Register R14 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN26 ,Gain adjustment of area 26 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN27 ,Gain adjustment of area 27 of R signal"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "GAM_G_LUT15,Table Setting Register R15 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN28 ,Gain adjustment of area 28 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN29 ,Gain adjustment of area 29 of R signal"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "GAM_G_LUT16,Table Setting Register R16 In Gamma Correction Block"
|
|
hexmask.long.word 0x00 16.--26. 1. " GAM_R_GAIN30 ,Gain adjustment of area 30 of R signal"
|
|
hexmask.long.word 0x00 0.--10. 1. " GAM_R_GAIN31 ,Gain adjustment of area 31 of R signal"
|
|
newline
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "GAM_R_AREA1 ,Area Setting Register R1 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_R_TH0 ,Start threshold of area 0 of R signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_R_TH1 ,Start threshold of area 1 of R signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_R_TH2 ,Start threshold of area 2 of R signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_R_TH3 ,Start threshold of area 3 of R signal"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "GAM_R_AREA2 ,Area Setting Register R2 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_R_TH4 ,Start threshold of area 4 of R signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_R_TH5 ,Start threshold of area 5 of R signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_R_TH6 ,Start threshold of area 6 of R signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_R_TH7 ,Start threshold of area 7 of R signal"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "GAM_R_AREA3 ,Area Setting Register R3 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_R_TH8 ,Start threshold of area 8 of R signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_R_TH9 ,Start threshold of area 9 of R signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_R_TH10 ,Start threshold of area 10 of R signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_R_TH11 ,Start threshold of area 11 of R signal"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "GAM_R_AREA4 ,Area Setting Register R4 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_R_TH12 ,Start threshold of area 12 of R signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_R_TH13 ,Start threshold of area 13 of R signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_R_TH14 ,Start threshold of area 14 of R signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_R_TH15 ,Start threshold of area 15 of R signal"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "GAM_R_AREA5 ,Area Setting Register R5 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_R_TH16 ,Start threshold of area 16 of R signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_R_TH17 ,Start threshold of area 17 of R signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_R_TH18 ,Start threshold of area 18 of R signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_R_TH19 ,Start threshold of area 19 of R signal"
|
|
group.long 0x15C++0x03
|
|
line.long 0x00 "GAM_R_AREA6 ,Area Setting Register R6 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_R_TH20 ,Start threshold of area 20 of R signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_R_TH21 ,Start threshold of area 21 of R signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_R_TH22 ,Start threshold of area 22 of R signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_R_TH23 ,Start threshold of area 23 of R signal"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "GAM_R_AREA7 ,Area Setting Register R7 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_R_TH24 ,Start threshold of area 24 of R signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_R_TH25 ,Start threshold of area 25 of R signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_R_TH26 ,Start threshold of area 26 of R signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_R_TH27 ,Start threshold of area 27 of R signal"
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "GAM_R_AREA8 ,Area Setting Register R8 In Gamma Correction Block"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAM_R_TH28 ,Start threshold of area 28 of R signal"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GAM_R_TH29 ,Start threshold of area 29 of R signal"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAM_R_TH30 ,Start threshold of area 30 of R signal"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GAM_R_TH31 ,Start threshold of area 31 of R signal"
|
|
tree.end
|
|
tree.end
|
|
tree "TCON Block Register Configuration"
|
|
width 16.
|
|
group.long 0x180++0x43
|
|
line.long 0x00 "TCON_UPDATE,TCON Register Update Control Register"
|
|
sif (cpu()=="R7S721021"||cpu()=="SH7268"||cpu()=="SH7269")
|
|
eventfld.long 0x00 0. " TCON_VEN ,LCD TCON register update" "Not updated,Updated"
|
|
else
|
|
bitfld.long 0x00 0. " TCON_VEN ,LCD TCON register update" "Not updated,Updated"
|
|
endif
|
|
line.long 0x04 "TCON_TIM,TCON Reference Timing Setting Register"
|
|
hexmask.long.word 0x04 16.--26. 1. " TCON_HALF ,1/2fH timing"
|
|
hexmask.long.word 0x04 0.--10. 1. " TCON_OFFSET ,Offset hsync signal timing"
|
|
line.long 0x08 "TCON_TIM_STVA1,TCON Vertical Timing Setting Register STVA1"
|
|
hexmask.long.word 0x08 16.--26. 1. " TCON_STVA_VS ,STVA signal pulse start position"
|
|
hexmask.long.word 0x08 0.--10. 1. " TCON_STVA_VW ,STVA signal pulse width"
|
|
line.long 0x0C "TCON_TIM_STVA2,TCON Vertical Timing Setting Register STVA2"
|
|
bitfld.long 0x0C 4. " TCON_STVA_INV ,Polarity inversion control of STVA signal" "Not inverted,Inverted"
|
|
bitfld.long 0x0C 0.--2. " TCON_STVA_SEL ,Output signal select for LCD_TCON0 pin" "STVA/VS,STVB/VE,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
line.long 0x10 "TCON_TIM_STVB1,TCON Vertical Timing Setting Register STVB1"
|
|
hexmask.long.word 0x10 16.--26. 1. " TCON_STVB_VS ,STVB signal pulse start position"
|
|
hexmask.long.word 0x10 0.--10. 1. " TCON_STVB_VW ,STVB signal pulse width"
|
|
line.long 0x14 "TCON_TIM_STVB2,TCON Vertical Timing Setting Register STVB2"
|
|
bitfld.long 0x14 4. " TCON_STVB_INV ,Polarity inversion control of STVB signal" "Not inverted,Inverted"
|
|
bitfld.long 0x14 0.--2. " TCON_STVB_SEL ,Output signal select for LCD_TCON1 pin" "STVA/VS,STVB/VE,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
line.long 0x18 "TCON_TIM_STH1,TCON Horizontal Timing Setting Register STH1"
|
|
hexmask.long.word 0x18 16.--26. 1. " TCON_STH_HS ,STH signal pulse start position"
|
|
hexmask.long.word 0x18 0.--10. 1. " TCON_STH_HW ,STH signal pulse width"
|
|
line.long 0x1C "TCON_TIM_STH2,TCON Horizontal Timing Setting Register STH2"
|
|
sif (cpu()=="R7S721021")||cpuis("SH7268")||cpuis("SH7269")
|
|
bitfld.long 0x1C 8. " TCON_STHHSSEL ,STH signal operating reference select" "Hsync,Offset Hsync"
|
|
bitfld.long 0x1C 4. " TCON_STH_INV ,Polarity inversion control of STH signal" "Not inverted,Inverted"
|
|
newline
|
|
bitfld.long 0x1C 0.--2. " TCON_STH_SEL ,Output signal select for LCD_TCON2 pin" "STVA/VS,STVB/VE,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
else
|
|
bitfld.long 0x1C 4. " TCON_STH_INV ,Polarity inversion control of STH signal" "Not inverted,Inverted"
|
|
bitfld.long 0x1C 0.--2. " TCON_STH_SEL ,Output signal select for LCD_TCON1 pin" "STVA/VS,STVB/VS,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
endif
|
|
line.long 0x20 "TCON_TIM_STB1,TCON Horizontal Timing Setting Register STB1"
|
|
hexmask.long.word 0x20 16.--26. 1. " TCON_STB_HS ,STB signal pulse start position"
|
|
hexmask.long.word 0x20 0.--10. 1. " TCON_STB_HW ,STB signal pulse width"
|
|
line.long 0x24 "TCON_TIM_STB2,TCON Horizontal Timing Setting Register STB2"
|
|
sif (cpu()=="R7S721021")||cpuis("SH7268")||cpuis("SH7269")
|
|
bitfld.long 0x24 8. " TCON_STBHSSEL ,STB signal operating reference select" "Hsync,Offset Hsync"
|
|
bitfld.long 0x24 4. " TCON_STB_INV ,Polarity inversion control of STB signal" "Not inverted,Inverted"
|
|
newline
|
|
bitfld.long 0x24 0.--2. " TCON_STB_SEL ,Output signal select for LCD_TCON3 pin" "STVA/VS,STVB/VE,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
else
|
|
bitfld.long 0x24 4. " TCON_STB_INV ,Polarity inversion control of STB signal" "Not inverted,Inverted"
|
|
bitfld.long 0x24 0.--2. " TCON_STB_SEL ,Output signal select for LCD_TCON1 pin" "STVA/VS,STVB/VS,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
endif
|
|
line.long 0x28 "TCON_TIM_CPV1,TCON Horizontal Timing Setting Register CPV1"
|
|
hexmask.long.word 0x28 16.--26. 1. " TCON_CPV_HS ,CPV signal pulse start position"
|
|
hexmask.long.word 0x28 0.--10. 1. " TCON_CPV_HW ,CPV signal pulse width"
|
|
line.long 0x2C "TCON_TIM_CPV2,TCON Horizontal Timing Setting Register CPV2"
|
|
sif (cpu()=="R7S721021")||cpuis("SH7268")||cpuis("SH7269")
|
|
bitfld.long 0x2C 8. " TCON_CPVHSSEL ,CPV signal operating reference select" "Hsync,Offset Hsync"
|
|
bitfld.long 0x2C 4. " TCON_CPV_INV ,Polarity inversion control of CPV signal" "Not inverted,Inverted"
|
|
newline
|
|
bitfld.long 0x2C 0.--2. " TCON_CPV_SEL ,Output signal select for LCD_TCON4 pin" "STVA/VS,STVB/VE,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
else
|
|
bitfld.long 0x2C 4. " TCON_CPV_INV ,Polarity inversion control of CPV signal" "Not inverted,Inverted"
|
|
bitfld.long 0x2C 0.--2. " TCON_CPV_SEL ,Output signal select for LCD_TCON1 pin" "STVA/VS,STVB/VS,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
endif
|
|
line.long 0x30 "TCON_TIM_POLA1,TCON Horizontal Timing Setting Register POLA1"
|
|
hexmask.long.word 0x30 16.--26. 1. " TCON_POLA_HS ,POLA signal pulse start position"
|
|
hexmask.long.word 0x30 0.--10. 1. " TCON_POLA_HW ,POLA signal pulse width"
|
|
line.long 0x34 "TCON_TIM_POLA2,TCON Horizontal Timing Setting Register POLA2"
|
|
sif (cpu()=="R7S721021")||cpuis("SH7268")||cpuis("SH7269")
|
|
bitfld.long 0x34 12.--13. " TCON_POLA_MD ,POLA signal generation mode select" "Normal,1x1 reverse,1x2 reverse,2x2 reverse"
|
|
bitfld.long 0x34 8. " TCON_POLA_HS_SEL ,POLA signal operating reference select" "Hsync,Offset Hsync"
|
|
newline
|
|
bitfld.long 0x34 4. " TCON_POLA_INV ,Polarity inversion control of POLA signal" "Not inverted,Inverted"
|
|
bitfld.long 0x34 0.--2. " TCON_POLA_SEL ,Output signal select for LCD_TCON5 pin" "STVA/VS,STVB/VE,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
else
|
|
bitfld.long 0x34 4. " TCON_POLA_INV ,Polarity inversion control of POLA signal" "Not inverted,Inverted"
|
|
bitfld.long 0x34 0.--2. " TCON_POLA_SEL ,Output signal select for LCD_TCON1 pin" "STVA/VS,STVB/VS,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
endif
|
|
line.long 0x38 "TCON_TIM_POLB1,TCON Horizontal Timing Setting Register Polb1"
|
|
hexmask.long.word 0x38 16.--26. 1. " TCON_POLB_HS ,POLB signal pulse start position"
|
|
hexmask.long.word 0x38 0.--10. 1. " TCON_POLB_HW ,POLB signal pulse width"
|
|
line.long 0x3C "TCON_TIM_POLB2,TCON horizontal timing setting register POLB2"
|
|
sif (cpu()=="R7S721021")||cpuis("SH7268")||cpuis("SH7269")
|
|
bitfld.long 0x3C 12.--13. " TCON_POLB_MD ,POLB signal generation mode select" "Normal,1x1 reverse,1x2 reverse,2x2 reverse"
|
|
bitfld.long 0x3C 8. " TCON_POLB_HS_SEL ,POLB signal operating reference select" "Hsync,Offset Hsync"
|
|
newline
|
|
bitfld.long 0x3C 4. " TCON_POLB_INV ,Polarity inversion control of POLB signal" "Not inverted,Inverted"
|
|
bitfld.long 0x3C 0.--2. " TCON_POLB_SEL ,Output signal select for LCD_TCON6 pin" "STVA/VS,STVB/VE,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
else
|
|
bitfld.long 0x3C 4. " TCON_POLB_INV ,Polarity inversion control of POLB signal" "Not inverted,Inverted"
|
|
bitfld.long 0x3C 0.--2. " TCON_POLB_SEL ,Output signal select for LCD_TCON1 pin" "STVA/VS,STVB/VS,STH/SP/HS,STB/LP/HE,CPV/GCK,POLA,POLB,DE"
|
|
endif
|
|
line.long 0x40 "TCON_TIM_DE,TCON Data Enable Polarity Setting Register"
|
|
bitfld.long 0x40 0. " TCON_DE_INV ,Polarity inversion control of DE signal" "Not inverted,Inverted"
|
|
tree.end
|
|
tree "Output Controller Register Configuration"
|
|
width 14.
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "OUT_UPDATE,Register Update Control Register In Output Controller"
|
|
sif (cpu()=="R7S721021"||cpu()=="SH7268"||cpu()=="SH7269")
|
|
eventfld.long 0x00 0. " OUTCNT_VEN ,Brightness/contrast|dither process|output interface register update" "Not updated,Updated"
|
|
else
|
|
bitfld.long 0x00 0. " OUTCNT_VEN ,Brightness/contrast|dither process|output interface register update" "Not updated,Updated"
|
|
endif
|
|
if ((per.l(ad:0xFCFF9800+0x204)&0x300)==0x100)
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "OUT_SET,Output Interface Register"
|
|
bitfld.long 0x00 28. " OUT_ENDIAN_ON ,Bit endian change on/off control" "Off,On"
|
|
bitfld.long 0x00 24. " OUT_SWAP_ON ,B/R Signal swap on/off control" "Off,On"
|
|
newline
|
|
bitfld.long 0x00 12.--13. " OUT_FORMAT ,Output format select" "RBG888,RGB666,RGB565,Serial RGB"
|
|
bitfld.long 0x00 8.--9. " OUT_FRQ_SEL ,Clock frequency control" "100% speed,Triple speed,Quadruple speed,?..."
|
|
newline
|
|
bitfld.long 0x00 4. " OUT_DIR_SEL ,Scan direction select" "Forward scan,Reverse scan"
|
|
bitfld.long 0x00 0.--1. " OUT_PHASE ,Clock phase adjustment during serial RGB output triple speed mode" "0 clk,1 clk,2 clk,?..."
|
|
elif ((per.l(ad:0xFCFF9800+0x204)&0x300)==0x200)
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "OUT_SET,Output Interface Register"
|
|
bitfld.long 0x00 28. " OUT_ENDIAN_ON ,Bit endian change on/off control" "Off,On"
|
|
bitfld.long 0x00 24. " OUT_SWAP_ON ,B/R signal swap on/off control" "Off,On"
|
|
newline
|
|
bitfld.long 0x00 12.--13. " OUT_FORMAT ,Output format select" "RBG888,RGB666,RGB565,Serial RGB"
|
|
bitfld.long 0x00 8.--9. " OUT_FRQ_SEL ,Clock frequency control" "100% speed,Triple speed,Quadruple speed,?..."
|
|
newline
|
|
bitfld.long 0x00 4. " OUT_DIR_SEL ,Scan direction select" "Forward scan,Reverse scan"
|
|
bitfld.long 0x00 0.--1. " OUT_PHASE ,Clock phase adjustment during serial RGB output triple speed mode" "0 clk,1 clk,2 clk,3 clk"
|
|
else
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "OUT_SET,Output Interface Register"
|
|
bitfld.long 0x00 28. " OUT_ENDIAN_ON ,Bit endian change on/off control" "Off,On"
|
|
bitfld.long 0x00 24. " OUT_SWAP_ON ,B/R signal swap on/off control" "Off,On"
|
|
newline
|
|
bitfld.long 0x00 12.--13. " OUT_FORMAT ,Output format select" "RBG888,RGB666,RGB565,Serial RGB"
|
|
bitfld.long 0x00 8.--9. " OUT_FRQ_SEL ,Clock frequency control" "100% speed,Triple speed,Quadruple speed,?..."
|
|
newline
|
|
bitfld.long 0x00 4. " OUT_DIR_SEL ,Scan direction select" "Forward scan,Reverse scan"
|
|
sif (cpu()=="R7S721021")||cpuis("SH7268")||cpuis("SH7269")
|
|
rbitfld.long 0x00 0.--1. " OUT_PHASE ,Clock phase adjustment during serial RGB output triple speed mode" "0 clk,1 clk,2 clk,3 clk"
|
|
else
|
|
bitfld.long 0x00 0.--1. " OUT_PHASE ,Clock phase adjustment during serial Rgb output triple speed mode" "0 clk,1 clk,?..."
|
|
endif
|
|
endif
|
|
group.long 0x208++0x0F
|
|
line.long 0x00 "OUT_BRIGHT1,Brightness (DC) Correction Register 1"
|
|
hexmask.long.word 0x00 0.--9. 1. " PBRT_G ,Brightness (DC) adjustment of G signal"
|
|
line.long 0x04 "OUT_BRIGHT2,Brightness (DC) Correction Register 2"
|
|
hexmask.long.word 0x04 16.--25. 1. " PBRT_B ,Brightness (DC) adjustment of B signal"
|
|
hexmask.long.word 0x04 0.--9. 1. " PBRT_R ,Brightness (DC) adjustment of R signal"
|
|
line.long 0x08 "OUT_CONTRAST,Contrast (Gain) Correction Register"
|
|
hexmask.long.byte 0x08 16.--23. 1. " CONT_G ,Contrast (gain) adjustment of G signal"
|
|
hexmask.long.byte 0x08 8.--15. 1. " CONT_B ,Contrast (gain) adjustment of B signal"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " CONT_R ,Contrast (gain) adjustment of R signal"
|
|
line.long 0x0C "OUT_PDTHA,Panel Dither Register"
|
|
bitfld.long 0x0C 20.--21. " PDTH_SEL ,Panel dither operation mode" "Truncate,Round-off,2x2 pattern dither,Random pattern dither"
|
|
bitfld.long 0x0C 16.--17. " PDTH_FORMAT ,Panel dither output format select" "RGB888,RGB666,RGB565,?..."
|
|
newline
|
|
bitfld.long 0x0C 12.--13. " PDTH_PA ,Pattern value (A) of 2 x 2 pattern dither" "0,1,2,3"
|
|
bitfld.long 0x0C 8.--9. " PDTH_PB ,Pattern value (B) of 2 x 2 pattern dither" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0C 4.--5. " PDTH_PC ,Pattern value (C) of 2 x 2 pattern dither" "0,1,2,3"
|
|
bitfld.long 0x0C 0.--1. " PDTH_PD ,Pattern value (D) of 2 x 2 pattern dither" "0,1,2,3"
|
|
group.long 0x224++0x03
|
|
line.long 0x00 "OUT_CLK_PHASE,OUtput Phase Control Register"
|
|
bitfld.long 0x00 12. " OUTCNT_FRONT_GAM ,Correction circuit sequence control" "Brightness->contrast->gamma correction,Gamma correction->brightness->contrast"
|
|
newline
|
|
bitfld.long 0x00 8. " OUTCNT_LCD_EDGE ,Output phase control of lcd_data23 to LCD_DATA0 pin" "Rising edge,Falling edge"
|
|
newline
|
|
bitfld.long 0x00 6. " OUTCNT_STVA_EDGE ,Output phase control of LCD_TCON0 pin" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 5. " OUTCNT_STVB_EDGE ,Output phase control of LCD_TCON1 pin" "Rising edge,Falling edge"
|
|
newline
|
|
bitfld.long 0x00 4. " OUTCNT_STH_EDGE ,Output phase control of LCD_TCON2 pin" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 3. " OUTCNT_STB_EDGE ,Output phase control of LCD_TCON3 pin" "Rising edge,Falling edge"
|
|
newline
|
|
bitfld.long 0x00 2. " OUTCNT_CPV_EDGE ,Output phase control of LCD_TCON4 pin" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 1. " OUTCNT_POLA_EDGE ,Output phase control of LCD_TCON5 pin" "Rising edge,Falling edge"
|
|
newline
|
|
bitfld.long 0x00 0. " OUTCNT_POLB_EDGE ,Output phase control of LCD_TCON6 pin" "Rising edge,Falling edge"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "SYSCNT (Video Display Controller 5:System Controller)"
|
|
tree "Channel 0"
|
|
base ad:0xFCFF7A00
|
|
width 18.
|
|
group.long 0x80++0x17
|
|
line.long 0x0 "SYSCNT_INT1,Interrupt control register 1"
|
|
bitfld.long 0x0 27. " INT_STA7 ,INT7 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x0 24. " INT_STA6 ,INT6 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x0 20. " INT_STA5 ,INT5 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x0 16. " INT_STA4 ,INT4 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 11. " INT_STA3 ,INT3 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x0 8. " INT_STA2 ,INT2 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x0 4. " INT_STA1 ,INT1 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x0 0. " INT_STA0 ,INT0 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
line.long 0x4 "SYSCNT_INT2,Interrupt control register 2"
|
|
bitfld.long 0x4 28. " INT_STA15 ,INT15 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x4 24. " INT_STA14 ,INT14 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x4 20. " INT_STA13 ,INT13 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x4 16. " INT_STA12 ,INT12 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x4 12. " INT_STA11 ,INT11 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x4 8. " INT_STA10 ,INT10 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x4 4. " INT_STA9 ,INT9 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x4 0. " INT_STA8 ,INT8 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
line.long 0x8 "SYSCNT_INT3,Interrupt control register 3"
|
|
bitfld.long 0x8 24. " INT_STA22 ,INT22 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x8 20. " INT_STA21 ,INT21 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x8 16. " INT_STA20 ,INT20 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x8 12. " INT_STA19 ,INT19 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x8 8. " INT_STA18 ,INT18 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x8 4. " INT_STA17 ,INT17 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x8 0. " INT_STA16 ,INT16 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
line.long 0xC "SYSCNT_INT4,Interrupt control register 4"
|
|
bitfld.long 0xC 28. " INT_OUT7_ON ,INT7 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0xC 24. " INT_OUT6_ON ,INT6 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0xC 20. " INT_OUT5_ON ,INT5 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0xC 16. " INT_OUT4_ON ,INT4 Interrupt Output On/Off" "Off,On"
|
|
textline " "
|
|
bitfld.long 0xC 12. " INT_OUT3_ON ,INT3 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0xC 8. " INT_OUT2_ON ,INT2 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0xC 4. " INT_OUT1_ON ,INT1 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0xC 0. " INT_OUT0_ON ,INT0 Interrupt Output On/Off" "Off,On"
|
|
line.long 0x10 "SYSCNT_INT5,Interrupt control register 5"
|
|
bitfld.long 0x10 28. " INT_OUT15_ON ,INT15 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x10 24. " INT_OUT14_ON ,INT14 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x10 20. " INT_OUT13_ON ,INT13 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x10 16. " INT_OUT12_ON ,INT12 Interrupt Output On/Off" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x10 12. " INT_OUT11_ON ,INT11 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x10 8. " INT_OUT10_ON ,INT10 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x10 4. " INT_OUT9_ON ,INT9 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x10 0. " INT_OUT8_ON ,INT8 Interrupt Output On/Off" "Off,On"
|
|
line.long 0x14 "SYSCNT_INT6,Interrupt control register 6"
|
|
bitfld.long 0x14 24. " INT_OUT22_ON ,INT22 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x14 20. " INT_OUT21_ON ,INT21 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x14 16. " INT_OUT20_ON ,INT20 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x14 12. " INT_OUT19_ON ,INT19 Interrupt Output On/Off" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x14 8. " INT_OUT18_ON ,INT18 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x14 4. " INT_OUT17_ON ,INT17 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x14 0. " INT_OUT16_ON ,INT16 Interrupt Output On/Off" "Off,On"
|
|
group.word 0x98++0x1
|
|
line.word 0x00 "SYSCNT_PANEL_CLK,Panel clock control register"
|
|
bitfld.word 0x00 12.--13. " PANEL_ICKSEL ,Divided Clock Source Select" "Video image clock,LCD_EXTCLK0,LCD_EXTCLK1,Peripheral clock 1"
|
|
bitfld.word 0x00 10.--11. " PANEL_OCKSEL ,Panel Clock Output Select" "Peripheral clock 1,LVDS PLL clock,LVDS PLL clock divided by 7,?..."
|
|
bitfld.word 0x00 8. " PANEL_ICKEN ,Panel Clock Operation Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0.--5. " PANEL_DCDR ,Clock Frequency Division Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.word 0x9a++0x3
|
|
line.word 0x00 "SYSCNT_CLUT,CLUT table read select signal status register"
|
|
bitfld.word 0x00 14. " GR_OIR_CLT_SEL_ST ,Graphics OIR CLUT Table Read Select Signal Status Flag" "CLUT table 0,CLUT table 1"
|
|
bitfld.word 0x00 12. " GR3_CLT_SEL_ST ,Graphics 3 CLUT Table Read Select Signal Status Flag" "CLUT table 0,CLUT table 1"
|
|
bitfld.word 0x00 8. " GR2_CLT_SEL_ST ,Graphics 2 CLUT Table Read Select Signal Status Flag" "CLUT table 0,CLUT table 1"
|
|
textline " "
|
|
bitfld.word 0x00 4. " GR1_CLT_SEL_ST ,Graphics 1 CLUT Table Read Select Signal Status Flag" "CLUT table 0,CLUT table 1"
|
|
bitfld.word 0x00 0. " GR0_CLT_SEL_ST ,Graphics 0 CLUT Table Read Select Signal Status Flag" "CLUT table 0,CLUT table 1"
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0xFCFF9A00
|
|
width 18.
|
|
group.long 0x80++0x17
|
|
line.long 0x0 "SYSCNT_INT1,Interrupt control register 1"
|
|
bitfld.long 0x0 27. " INT_STA7 ,INT7 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x0 24. " INT_STA6 ,INT6 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x0 20. " INT_STA5 ,INT5 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x0 16. " INT_STA4 ,INT4 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 11. " INT_STA3 ,INT3 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x0 8. " INT_STA2 ,INT2 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x0 4. " INT_STA1 ,INT1 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x0 0. " INT_STA0 ,INT0 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
line.long 0x4 "SYSCNT_INT2,Interrupt control register 2"
|
|
bitfld.long 0x4 28. " INT_STA15 ,INT15 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x4 24. " INT_STA14 ,INT14 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x4 20. " INT_STA13 ,INT13 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x4 16. " INT_STA12 ,INT12 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x4 12. " INT_STA11 ,INT11 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x4 8. " INT_STA10 ,INT10 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x4 4. " INT_STA9 ,INT9 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x4 0. " INT_STA8 ,INT8 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
line.long 0x8 "SYSCNT_INT3,Interrupt control register 3"
|
|
bitfld.long 0x8 24. " INT_STA22 ,INT22 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x8 20. " INT_STA21 ,INT21 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x8 16. " INT_STA20 ,INT20 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x8 12. " INT_STA19 ,INT19 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x8 8. " INT_STA18 ,INT18 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x8 4. " INT_STA17 ,INT17 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
bitfld.long 0x8 0. " INT_STA16 ,INT16 Interrupt Clear/Hold" "Not occurred,Occurred"
|
|
line.long 0xC "SYSCNT_INT4,Interrupt control register 4"
|
|
bitfld.long 0xC 28. " INT_OUT7_ON ,INT7 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0xC 24. " INT_OUT6_ON ,INT6 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0xC 20. " INT_OUT5_ON ,INT5 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0xC 16. " INT_OUT4_ON ,INT4 Interrupt Output On/Off" "Off,On"
|
|
textline " "
|
|
bitfld.long 0xC 12. " INT_OUT3_ON ,INT3 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0xC 8. " INT_OUT2_ON ,INT2 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0xC 4. " INT_OUT1_ON ,INT1 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0xC 0. " INT_OUT0_ON ,INT0 Interrupt Output On/Off" "Off,On"
|
|
line.long 0x10 "SYSCNT_INT5,Interrupt control register 5"
|
|
bitfld.long 0x10 28. " INT_OUT15_ON ,INT15 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x10 24. " INT_OUT14_ON ,INT14 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x10 20. " INT_OUT13_ON ,INT13 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x10 16. " INT_OUT12_ON ,INT12 Interrupt Output On/Off" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x10 12. " INT_OUT11_ON ,INT11 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x10 8. " INT_OUT10_ON ,INT10 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x10 4. " INT_OUT9_ON ,INT9 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x10 0. " INT_OUT8_ON ,INT8 Interrupt Output On/Off" "Off,On"
|
|
line.long 0x14 "SYSCNT_INT6,Interrupt control register 6"
|
|
bitfld.long 0x14 24. " INT_OUT22_ON ,INT22 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x14 20. " INT_OUT21_ON ,INT21 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x14 16. " INT_OUT20_ON ,INT20 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x14 12. " INT_OUT19_ON ,INT19 Interrupt Output On/Off" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x14 8. " INT_OUT18_ON ,INT18 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x14 4. " INT_OUT17_ON ,INT17 Interrupt Output On/Off" "Off,On"
|
|
bitfld.long 0x14 0. " INT_OUT16_ON ,INT16 Interrupt Output On/Off" "Off,On"
|
|
group.word 0x98++0x1
|
|
line.word 0x00 "SYSCNT_PANEL_CLK,Panel clock control register"
|
|
bitfld.word 0x00 12.--13. " PANEL_ICKSEL ,Divided Clock Source Select" "Video image clock,LCD_EXTCLK0,LCD_EXTCLK1,Peripheral clock 1"
|
|
bitfld.word 0x00 10.--11. " PANEL_OCKSEL ,Panel Clock Output Select" "Peripheral clock 1,LVDS PLL clock,LVDS PLL clock divided by 7,?..."
|
|
bitfld.word 0x00 8. " PANEL_ICKEN ,Panel Clock Operation Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0.--5. " PANEL_DCDR ,Clock Frequency Division Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.word 0x9a++0x3
|
|
line.word 0x00 "SYSCNT_CLUT,CLUT table read select signal status register"
|
|
bitfld.word 0x00 14. " GR_OIR_CLT_SEL_ST ,Graphics OIR CLUT Table Read Select Signal Status Flag" "CLUT table 0,CLUT table 1"
|
|
bitfld.word 0x00 12. " GR3_CLT_SEL_ST ,Graphics 3 CLUT Table Read Select Signal Status Flag" "CLUT table 0,CLUT table 1"
|
|
bitfld.word 0x00 8. " GR2_CLT_SEL_ST ,Graphics 2 CLUT Table Read Select Signal Status Flag" "CLUT table 0,CLUT table 1"
|
|
textline " "
|
|
bitfld.word 0x00 4. " GR1_CLT_SEL_ST ,Graphics 1 CLUT Table Read Select Signal Status Flag" "CLUT table 0,CLUT table 1"
|
|
bitfld.word 0x00 0. " GR0_CLT_SEL_ST ,Graphics 0 CLUT Table Read Select Signal Status Flag" "CLUT table 0,CLUT table 1"
|
|
tree.end
|
|
tree.end
|
|
tree "LVDS (LVDS Output Interface)"
|
|
base ad:0xFCFF7A30
|
|
width 14.
|
|
group.long 0x30++0x7
|
|
line.long 0x00 "LVDS_UPDATE,LVDS register update control register"
|
|
bitfld.long 0x00 16. " LVDS_UPDATE ,LVDS Register Update" "Not updated,Updated"
|
|
line.long 0x04 "LVDSFCL,LVDS format conversion register L"
|
|
bitfld.long 0x04 28. " SYNC_MODE ,SYNC Mode Switch" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " SYNC_POL1 ,LVDS_TCON0 output value" "0,1"
|
|
bitfld.long 0x04 22. " SYNC_POL0 ,LVDS_TCON2 output value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " LVDS_SEL2 ,TXOUT2P/M Data Format Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 4.--7. " LVDS_SEL1 ,TXOUT1P/M Data Format Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " LVDS_SEL0 ,TXOUT0P/M Data Format Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x50++0x7
|
|
line.long 0x00 "LCLKSELR,LVDS clock select register"
|
|
bitfld.long 0x00 24.--26. " LVDS_IN_CLK_SEL ,These bits select the clock input to frequency divider 1" "VIDEO_X1,DV0_CLK,DV1_CLK,LCD0_EXTCLK,LCD1_EXTCLK,P1f,?..."
|
|
bitfld.long 0x00 16.--17. " LVDS_IDIV_SET ,These bits specify the frequency dividing value (NIDIV) for frequency divider 1" "NIDIV = 1,NIDIV = 2,NIDIV = 4,?..."
|
|
bitfld.long 0x00 10.--15. " LVDSPLL_TST ,Internal Parameter Setting for LVDS PLL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " LVDS_ODIV_SET ,Frequency dividing value (NODIV) for frequency divider 2." "NODIV = 1,NODIV = 2,NODIV = 4,?..."
|
|
bitfld.long 0x00 4. " LVDS_CLK_EN ,Enables the LVDS PLL output" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " LVDS_VDC_SEL ,Selects a channel in video display controller 5 whose data is to be output through the LVDS interface" "Channel 0,Channel 1"
|
|
line.long 0x04 "LPLLSETR,LVDSPLL setting register"
|
|
bitfld.long 0x04 31. " LVDSPLL_BP ,Makes the input signal bypass the LVDS PLL and outputs it without change." "Normal operation,Bypass output"
|
|
hexmask.long.word 0x04 16.--26. 1. " LVDSPLL_FD ,These bits specify the frequency dividing value (NFD) for the feedback frequency in the LVDS PLL"
|
|
bitfld.long 0x04 8.--12. " LVDSPLL_RD ,These bits specify the frequency dividing value (NRD) for the input frequency in the LVDS PLL" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
textline " "
|
|
bitfld.long 0x04 4.--5. " LVDSPLL_OD ,The frequency dividing value (NOD) for the output frequency in the LVDS PLL." "1,2,4,8"
|
|
bitfld.long 0x04 0. " LVDSPLL_PD ,Controls power-down for the LVDS PLL" "Normal operation,Power-down state"
|
|
rgroup.long 0x58++0x3
|
|
line.long 0x00 "LPLLMONR,LVDSPLL monitor register"
|
|
bitfld.long 0x00 0. " LVDSPLL_LD ,Detects the locked state of the LVDS PLL" "Unlocked,Locked"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "DISCOM (Display Out Comparison Unit)"
|
|
tree "Channel 0"
|
|
base ad:0xFCFFA800
|
|
width 12.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "DOCMCR,Control register"
|
|
bitfld.long 0x00 16. " CMPRU ,Display Out Comparison Update Value" "0,1"
|
|
bitfld.long 0x00 0. " CMPR ,Display Out Comparison Execution" "Stopped,Executed"
|
|
rgroup.long 0x04++0x3
|
|
line.long 0x00 "DOCMSTR,Status register"
|
|
bitfld.long 0x00 0. " CMPST ,Display Out Comparison Status" "Match,Not match"
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "DOCMCLSTR,Status clear register"
|
|
bitfld.long 0x00 0. " CMPCLST ,Display Out Comparison Status Clear" "Not cleared,Cleared"
|
|
line.long 0x04 "DOCMIENR,Interrupt enable register"
|
|
sif cpuis("SH7268")||cpuis("SH7269")
|
|
rbitfld.long 0x04 0. " CMPIEN ,Display Out Comparison Mismatch Detection Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x04 0. " CMPIEN ,Display Out Comparison Mismatch Detection Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x14++0x7
|
|
line.long 0x00 "DOCMPMR,Operation parameter setting register"
|
|
bitfld.long 0x00 16. " CMPBT ,Pixel Format Data Width" "32 bits/pixel,16 bits/pixel"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMPDFA ,Display Out Comparison Default alpha Value"
|
|
newline
|
|
bitfld.long 0x00 7. " CMPDAUF ,Display Out Comparison Default alpha Value Use" "Disabled,Enabled"
|
|
sif cpuis("SH7268")||cpuis("SH7269")
|
|
bitfld.long 0x00 0.--3. " CMPSELP ,Display Out Comparison Selection Plane" "No data,Graphics plane 1,Graphics plane 2,Graphics plane 3,,,,,,After alpha blending,?..."
|
|
else
|
|
bitfld.long 0x00 0.--3. " CMPSELP ,Display Out Comparison Selection Plane" "No data,Graphics plane 1,Graphics plane 2,Graphics plane 3,Graphics plane 4,Graphics plane 5,,,,After alpha blending,?..."
|
|
endif
|
|
line.long 0x04 "DOCMECRCR,Expected CRC code register"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "DOCMCCRCR,Calculated CRC code value register"
|
|
group.long 0x20++0x13
|
|
line.long 0x00 "DOCMSPXR,Horizontal start position setting register"
|
|
hexmask.long.word 0x00 0.--10. 1. " CMPSPX ,Display Out Comparison Horizontal Start Position"
|
|
line.long 0x04 "DOCMSPYR,Vertical start position setting register"
|
|
hexmask.long.word 0x04 0.--10. 1. " CMPSPY ,Display Out Comparison Vertical Start Position"
|
|
line.long 0x08 "DOCMSZXR,Horizontal size setting register"
|
|
hexmask.long.word 0x08 0.--10. 1. " CMPSZX ,Display Out Comparison Horizontal Size"
|
|
line.long 0x0c "DOCMSZYR,Vertical size setting register"
|
|
hexmask.long.word 0x0C 0.--10. 1. " CMPSZY ,Display Out Comparison Vertical Size"
|
|
line.long 0x10 "DOCMCRCIR,CRC code initialization register"
|
|
width 0xb
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0xFCFFB000
|
|
width 12.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "DOCMCR,Control register"
|
|
bitfld.long 0x00 16. " CMPRU ,Display Out Comparison Update Value" "0,1"
|
|
bitfld.long 0x00 0. " CMPR ,Display Out Comparison Execution" "Stopped,Executed"
|
|
rgroup.long 0x04++0x3
|
|
line.long 0x00 "DOCMSTR,Status register"
|
|
bitfld.long 0x00 0. " CMPST ,Display Out Comparison Status" "Match,Not match"
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "DOCMCLSTR,Status clear register"
|
|
bitfld.long 0x00 0. " CMPCLST ,Display Out Comparison Status Clear" "Not cleared,Cleared"
|
|
line.long 0x04 "DOCMIENR,Interrupt enable register"
|
|
sif cpuis("SH7268")||cpuis("SH7269")
|
|
rbitfld.long 0x04 0. " CMPIEN ,Display Out Comparison Mismatch Detection Interrupt Enable" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x04 0. " CMPIEN ,Display Out Comparison Mismatch Detection Interrupt Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x14++0x7
|
|
line.long 0x00 "DOCMPMR,Operation parameter setting register"
|
|
bitfld.long 0x00 16. " CMPBT ,Pixel Format Data Width" "32 bits/pixel,16 bits/pixel"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMPDFA ,Display Out Comparison Default alpha Value"
|
|
newline
|
|
bitfld.long 0x00 7. " CMPDAUF ,Display Out Comparison Default alpha Value Use" "Disabled,Enabled"
|
|
sif cpuis("SH7268")||cpuis("SH7269")
|
|
bitfld.long 0x00 0.--3. " CMPSELP ,Display Out Comparison Selection Plane" "No data,Graphics plane 1,Graphics plane 2,Graphics plane 3,,,,,,After alpha blending,?..."
|
|
else
|
|
bitfld.long 0x00 0.--3. " CMPSELP ,Display Out Comparison Selection Plane" "No data,Graphics plane 1,Graphics plane 2,Graphics plane 3,Graphics plane 4,Graphics plane 5,,,,After alpha blending,?..."
|
|
endif
|
|
line.long 0x04 "DOCMECRCR,Expected CRC code register"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "DOCMCCRCR,Calculated CRC code value register"
|
|
group.long 0x20++0x13
|
|
line.long 0x00 "DOCMSPXR,Horizontal start position setting register"
|
|
hexmask.long.word 0x00 0.--10. 1. " CMPSPX ,Display Out Comparison Horizontal Start Position"
|
|
line.long 0x04 "DOCMSPYR,Vertical start position setting register"
|
|
hexmask.long.word 0x04 0.--10. 1. " CMPSPY ,Display Out Comparison Vertical Start Position"
|
|
line.long 0x08 "DOCMSZXR,Horizontal size setting register"
|
|
hexmask.long.word 0x08 0.--10. 1. " CMPSZX ,Display Out Comparison Horizontal Size"
|
|
line.long 0x0c "DOCMSZYR,Vertical size setting register"
|
|
hexmask.long.word 0x0C 0.--10. 1. " CMPSZY ,Display Out Comparison Vertical Size"
|
|
line.long 0x10 "DOCMCRCIR,CRC code initialization register"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "JCU (JPEG Codec Unit)"
|
|
base ad:0xE8017000
|
|
width 11.
|
|
if ((per.l(ad:0xE8017000+0x00)&0x8)==0x8)
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "JCMOD,JPEG code mode register"
|
|
bitfld.byte 0x00 3. " DSP ,Compression/Decompression Set" "Compression,Decompression"
|
|
bitfld.byte 0x00 0.--2. " REDU ,Pixel format" "YCbCr444,YCbCr422,YCbCr420,,,,YCbCr411,?..."
|
|
else
|
|
group.byte 0x00++0x1
|
|
line.byte 0x00 "JCMOD,JPEG code mode register"
|
|
bitfld.byte 0x00 3. " DSP ,Compression/Decompression Set" "Compression,Decompression"
|
|
bitfld.byte 0x00 0.--2. " REDU ,Pixel format" ",YCbCr422,?..."
|
|
endif
|
|
group.byte 0x01++0x0
|
|
line.byte 0x00 "JCCMD,JPEG code command register"
|
|
bitfld.byte 0x00 7. " BRST ,Bus Reset" "Not reset,Reset"
|
|
bitfld.byte 0x00 2. " JEND ,Interrupt Request Clear Command" "Not clear,Clear"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " JRST ,JPEG Core Process Stop Clear Command" "Not clear,Clear"
|
|
bitfld.byte 0x00 0. " JSRT ,JPEG Core Process Start Command" "Not start,Start"
|
|
group.byte 0x03++0x7
|
|
line.byte 0x00 "JCQTN,JPEG code quantization table number register"
|
|
bitfld.byte 0x00 0.--1. " QT1 ,Quantization table number for the 1 color component" "0,1,2,3"
|
|
textline " "
|
|
bitfld.byte 0x00 2.--3. " QT2 ,Quantization table number for the 2 color component" "0,1,2,3"
|
|
textline " "
|
|
bitfld.byte 0x00 4.--5. " QT3 ,Quantization table number for the 3 color component" "0,1,2,3"
|
|
textline " "
|
|
line.byte 0x01 "JCHTN,JPEG code Huffman table number register"
|
|
bitfld.byte 0x01 1. " HTA1 ,Huffman table number (AC) for the 1 color component" "0,1"
|
|
bitfld.byte 0x01 0. " HTD1 ,Huffman table number (DC) for the 1 color component" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x01 3. " HTA2 ,Huffman table number (AC) for the 2 color component" "0,1"
|
|
bitfld.byte 0x01 2. " HTD2 ,Huffman table number (DC) for the 2 color component" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x01 5. " HTA3 ,Huffman table number (AC) for the 3 color component" "0,1"
|
|
bitfld.byte 0x01 4. " HTD3 ,Huffman table number (DC) for the 3 color component" "0,1"
|
|
textline " "
|
|
line.byte 0x02 "JCDRIU,JPEG code DRI upper register"
|
|
line.byte 0x03 "JCDRID,JPEG code DRI lower register"
|
|
line.byte 0x04 "JCVSZU,JPEG code vertical size upper register"
|
|
line.byte 0x05 "JCVSZD,JPEG code vertical size lower register"
|
|
line.byte 0x06 "JCHSZU,JPEG code horizontal size upper register"
|
|
line.byte 0x07 "JCHSZD,JPEG code horizontal size lower register"
|
|
rgroup.byte 0xb++0x2
|
|
line.byte 0x00 "JCDTCU,JPEG code data count upper register"
|
|
line.byte 0x01 "JCDTCM,JPEG code data count middle register"
|
|
line.byte 0x02 "JCDTCD,JPEG code data count lower register"
|
|
group.byte 0xE++0x1
|
|
line.byte 0x00 "JINTE0,JPEG interrupt enable register 0"
|
|
bitfld.byte 0x00 7. " INT7 ,Interrupt 7 Enables" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " INT6 ,Interrupt 6 Enables" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " INT5 ,Interrupt 5 Enables" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " INT3 ,Interrupt 3 Enables" "Disabled,Enabled"
|
|
line.byte 0x01 "JINTS0,JPEG interrupt status register 0"
|
|
bitfld.byte 0x01 6. " INT6 ,Interrupt 6 Enables" "No interrupt,Interrupt"
|
|
bitfld.byte 0x01 5. " INT5 ,Interrupt 5 Enables" "No interrupt,Interrupt"
|
|
bitfld.byte 0x01 3. " INT3 ,Interrupt 3 Enables" "No interrupt,Interrupt"
|
|
group.long 0x8C++0x7
|
|
line.long 0x00 "JINTE1,JPEG interrupt enable register 1"
|
|
bitfld.long 0x00 6. " CBTEN ,Enables or disables a data transfer processing interrupt request" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DINLEN ,Enables or disables a data transfer processing interrupt request" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " JOUTEN ,Enables or disables a data transfer processing interrupt request" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DBTEN ,Enables or disables a data transfer processing interrupt request" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " JINEN ,Enables or disables a data transfer processing interrupt request" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DOUTLEN ,Enables or disables a data transfer processing interrupt request" "Disabled,Enabled"
|
|
line.long 0x04 "JINTS1,JPEG interrupt status register 1"
|
|
bitfld.long 0x04 6. " CBTF ,This bit is set to 1 when the last output coded data is written in compression" "Not occurred,Occurred"
|
|
bitfld.long 0x04 5. " DINLF ,This bit is set to 1 when the number of input image data lines indicated by JIFESLC is read in compression" "Not occurred,Occurred"
|
|
bitfld.long 0x04 4. " JOUTF ,This bit is set to 1 when the amount of output coded data indicated by JIFEDDC is written in compression" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 2. " DBTF ,This bit is set to 1 when the last output image data is written in decompression" "Not occurred,Occurred"
|
|
bitfld.long 0x04 1. " JINF ,This bit is set to 1 when the amount of input coded data indicated by JIFDSDC is read in decompression" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " DOUTLF ,In decompression, this bit is set to 1 when the number of lines of output image data indicated by JIFDDLC have been written" "Not occurred,Occurred"
|
|
group.byte 0x10++0x0
|
|
line.byte 0x00 "JCDERR,JPEG code decode error register"
|
|
bitfld.byte 0x00 0.--3. " ERR ,Error Code" "Normal,SOI not detected,SOF 1 to SOFF detected,Unprovided pixel format detected,SOF accuracy error:Other than 8 detected,DQT accuracy error:Other than 0 detected,Component error 1,Component error 2,SOF0 DQT and DHT not detected when SOS detected,SOS not detected:SOS not detected until EOI detected,EOI not detected,Restart interval data number error detected,Image size error detected,Last MCU data number error detected,Block data number error detected,?..."
|
|
rgroup.byte 0x11++0x0
|
|
line.byte 0x00 "JCRST,JPEG code reset register"
|
|
bitfld.byte 0x00 0. " RST ,Operating State" "State other than below,Suspended state"
|
|
group.long 0x40++0x33
|
|
line.long 0x00 "JIFECNT,JPEG interface compression control register"
|
|
bitfld.long 0x00 14. " JOUTRINI ,Address Initialization when Output Coded Data is Resumed" "Not initialized,Initialized"
|
|
bitfld.long 0x00 13. " JOUTRCMD ,Output Coded Data Resume Command" "Not resumed,Resumed"
|
|
textline " "
|
|
bitfld.long 0x00 12. " JOUTC ,Count Mode Setting for Stopping Output Coded Data" "Off,On"
|
|
bitfld.long 0x00 8.--10. " JOUTSWA ,Byte/Word/Longword Swap" "No swap,Byte swap,Word swap,Word-byte swap,Longword swap,Longword-byte swap,Longword-word swap,Longword-word-byte swap"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DINRINI ,Address Initialization when Resuming Input of Image Data Lines" "Not initialized,Initialized"
|
|
bitfld.long 0x00 5. " DINRCMD ,Input Image Data Lines Resume Command" "Not resumed,Resumed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DINLC ,Count Mode Setting for Stopping Input Image Data Lines" "Off,On"
|
|
bitfld.long 0x00 0.--2. " DINSWAP ,Byte/Word Swap" "No swap,Byte swap,Word swap,Word-byte swap,Longword swap,Longword-byte swap,Longword-word swap,Longword-word-byte swap"
|
|
line.long 0x04 "JIFESA,JPEG interface compression source address register"
|
|
hexmask.long 0x04 3.--31. 8. " ESA[31:3] ,Input Image Data Source Add"
|
|
line.long 0x08 "JIFESOFST,JPEG interface compression line offset register"
|
|
hexmask.long.word 0x08 3.--14. 8. " ESMW[14:3] ,IInput Image Data Lines Offset"
|
|
line.long 0x0c "JIFEDA,JPEG interface compression destination address register"
|
|
hexmask.long 0x0c 3.--31. 8. " EDA[31:3] ,Output Coded Data Destination Address"
|
|
line.long 0x10 "JIFESLC,JPEG interface compression source line count register"
|
|
hexmask.long.word 0x10 3.--15. 1. " LINES[15:3] ,Number of Input Image Data Lines to be Read"
|
|
line.long 0x14 "JIFEDDC,JPEG interface compression destination register"
|
|
hexmask.long.word 0x14 3.--15. 1. " JDATAS[15:3] ,Amount of Output Coded Data to be Written"
|
|
line.long 0x18 "JIFDCNT,JPEG interface decompression control register"
|
|
bitfld.long 0x18 28.--29. " VINTER ,Vertical Subsampling" "No subsampling,1/2,1/4,1/8"
|
|
bitfld.long 0x18 26.--27. " HINTER ,Horizontal Subsampling" "No subsampling,1/2,1/4,1/8"
|
|
textline " "
|
|
bitfld.long 0x18 24.--25. " OPF ,Specifies output image data pixel format" "YCbCr422,ARGB8888,RGB565,?..."
|
|
bitfld.long 0x18 14. " JINRINI ,Address Initialization when Input Coded Data is Resumed" "Not initialized,Initialized"
|
|
textline " "
|
|
bitfld.long 0x18 13. " JINRCMD ,Input Coded Data Resume Command" "Not resumed,Resumed"
|
|
bitfld.long 0x18 12. " JINC ,Count Mode Setting for Stopping Input Coded Data" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x18 8.--10. " JINSWAP ,Byte/Word/Longword Swap" "No swap,Byte swap,Word swap,Word-byte swap,Longword swap,Longword-byte swap,Longword-word swap,Longword-word-byte swap"
|
|
bitfld.long 0x18 6. " DOUTRINI ,Address Initialization when Resuming Output of Image Data Lines" "Not initialized,Initialized"
|
|
textline " "
|
|
bitfld.long 0x18 5. " DOUTRCMD ,Output Image Data Lines Resume Command" "Not resumed,Resumed"
|
|
bitfld.long 0x18 4. " DOUTLC ,Count Mode for Stopping Output Image Data Lines" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x18 0.--2. " DOUTSWAP ,Byte/Word Swap" "No swap,Byte swap,Word swap,Word-byte swap,Longword swap,Longword-byte swap,Longword-word swap,Longword-word-byte swap"
|
|
line.long 0x1c "JIFDSA,JPEG interface decompression source address register"
|
|
hexmask.long 0x1c 3.--31. 8. " DSA[31:3] ,Input Image Data Source Address"
|
|
line.long 0x20 "JIFDDOFST,JPEG interface decompression destination offset register"
|
|
hexmask.long.word 0x20 3.--14. 1. " DDMW[14:3] ,Output Image Data Lines Offset"
|
|
line.long 0x24 "JIFDDA,JPEG interface decompression destination address register"
|
|
hexmask.long 0x24 3.--31. 8. " DDA[31:3] ,Output Image Data Source Address"
|
|
line.long 0x28 "JIFDSDC,JPEG interface decompression source count register"
|
|
hexmask.long.word 0x28 3.--15. 1. " JDATAS[15:3] ,Amount of Input Coded Data to be Read"
|
|
line.long 0x2c "JIFDDLC,JPEG interface decompression destination line count register"
|
|
hexmask.long.word 0x2c 3.--15. 1. " LINES[15:3] ,Specify the number of lines of output image data to be written."
|
|
line.long 0x30 "JIFDADT,JPEG interface decompression alpha setting register"
|
|
hexmask.long.byte 0x30 0.--7. 1. " ALPHA ,Setting of the alpha value for output in ARGB8888 format"
|
|
group.long 0x94++0x7
|
|
line.long 0x00 "JIFESVSZ,JPEG input image data CbCr range setting register"
|
|
bitfld.long 0x00 15. " DINYCHG ,Input Image Data CbCr Range Setting" "-128 to 127,0 to 255"
|
|
line.long 0x04 "JIFESHSZ,JPEG output image data CbCr range setting register"
|
|
bitfld.long 0x04 15. " DOUTYCHG ,Output Image Data CbCr Range Setting" "-128 to 127,0 to 255"
|
|
group.byte 0x100++0x3
|
|
line.byte 0x00 "JCQTBL0,JPEG code quantization table register"
|
|
button "JCQTBL0" "d ad:(ad:0xE8017000+0x100)--ad:(ad:0xE8017000+0x13f) /byte"
|
|
group.byte 0x140++0x3
|
|
line.byte 0x00 "JCQTBL1,JPEG code quantization table register"
|
|
button "JCQTBL1" "d ad:(ad:0xE8017000+0x140)--ad:(ad:0xE8017000+0x17f) /byte"
|
|
group.byte 0x180++0x3
|
|
line.byte 0x00 "JCQTBL2,JPEG code quantization table register"
|
|
button "JCQTBL2" "d ad:(ad:0xE8017000+0x180)--ad:(ad:0xE8017000+0x1bf) /byte"
|
|
group.byte 0x1c0++0x3
|
|
line.byte 0x00 "JCQTBL3,JPEG code quantization table register"
|
|
button "JCQTBL3" "d ad:(ad:0xE8017000+0x1c0)--ad:(ad:0xE8017000+0x1ff) /byte"
|
|
group.byte 0x200++0x3
|
|
line.byte 0x00 "JCHTBD0,JPEG Huffman table DC register"
|
|
button "JCHTBD0" "d ad:(ad:0xE8017000+0x200)--ad:(ad:0xE8017000+0x21b) /byte"
|
|
group.byte 0x300++0x3
|
|
line.byte 0x00 "JCHTBD1,JPEG Huffman table DC register"
|
|
button "JCHTBD1" "d ad:(ad:0xE8017000+0x300)--ad:(ad:0xE8017000+0x31b) /byte"
|
|
group.byte 0x220++0x03
|
|
line.byte 0x00 "JCHTBA0,JPEG code Huffman table AC register"
|
|
button "JCHTBA0" "d ad:(ad:0xE8017000+0x220)--ad:(ad:0xE8017000+0x2d1) /byte"
|
|
group.byte 0x320++0x03
|
|
line.byte 0x00 "JCHTBA1,JPEG code Huffman table AC register"
|
|
button "JCHTBA1" "d ad:(ad:0xE8017000+0x320)--ad:(ad:0xE8017000+0x3d1) /byte"
|
|
width 12.
|
|
tree.end
|
|
tree "CEU (Capture Engine Unit)"
|
|
base ad:0xE8210000
|
|
width 10.
|
|
tree "Plane A"
|
|
group.long 0x00++0xf
|
|
line.long 0x00 "CAPSR,CEU Capture start register"
|
|
bitfld.long 0x00 16. " CPKIL ,Software reset of capturing" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CE ,Starts capturing" "Stopped,Started"
|
|
line.long 0x04 "CAPCR,CEU Capture control register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " FDRP ,Sets the frame drop interval in continuous-frame capture"
|
|
bitfld.long 0x04 20.--21. " MTCM ,Unit for transferring data to a bus bridge module" "32 bytes,64 bytes,128 bytes,256 bytes"
|
|
bitfld.long 0x04 16. " CTNCP ,Continuous capture until the CE bit is cleared to 0" "Disabled,Enabled"
|
|
line.long 0x08 "CAMCR,CEU Capture interface control register"
|
|
bitfld.long 0x08 16. " FLDPOL ,Sets the polarity of the field identification signal from an external module" "FLD signal is high-active,FLD signal is low-active"
|
|
textline " "
|
|
bitfld.long 0x08 12. " DTIF ,Sets the digital image input pins from which data is to be captured" "8-bit,16-bit"
|
|
bitfld.long 0x08 8.--9. " DTARY ,Input order of the luminance component and chrominance component" "Cb0 Y0 Cr0 Y1,Cr0 Y0 Cb0 Y1,Y0 Cb0 Y1 Cr0,Y0 Cr0 Y1 Cb0"
|
|
bitfld.long 0x08 4.--5. " JPG ,These bits select the fetched data type" "Image capture mode,Data synchronous fetch mode,Data enable fetch mode,"
|
|
textline " "
|
|
bitfld.long 0x08 1. " VDPOL ,Polarity for detection of the vertical sync signal input from an external module" "High-active,Low-active"
|
|
bitfld.long 0x08 0. " HDPOL ,Polarity for detection of the horizontal sync signal input from an external module" "High-active,Low-active"
|
|
line.long 0x0c "CMCYR,CEU Capture interface cycle register"
|
|
hexmask.long.word 0x0c 16.--29. 1. " VCYL ,Vertical HD Count of External Module"
|
|
hexmask.long.word 0x0c 0.--13. 1. " HCYL ,Horizontal Cycle Count of External Module"
|
|
group.long (0x0+0x10)++0x7
|
|
line.long 0x0 "CAMOR,CEU Capture interface offset register"
|
|
hexmask.long.word 0x0 16.--27. 1. " VOFST ,Capture start location in terms of the HD count from a vertical sync signal"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.long.word 0x0 0.--12. 1. " HOFST ,Capture start location in terms of the number of clock cycles from a horizontal sync signal"
|
|
else
|
|
hexmask.long.word 0x0 0.--13. 1. " HOFST ,Capture start location in terms of the number of clock cycles from a horizontal sync signal"
|
|
endif
|
|
line.long 0x4 "CAPWR,CEU Capture interface width register"
|
|
hexmask.long.word 0x4 18.--27. 1. " VWDTH[11:2] ,Vertical capture period"
|
|
sif (cpu()=="R7S721021")
|
|
rbitfld.long 0x4 16.--17. " VWDTH[1:0] ,Number of lines (HD count) to be captured from the location specified by the VOFST bits in CAMOR" "0,1,2,3"
|
|
hexmask.long.word 0x4 1.--12. 1. " HWDTH[12:1] ,Horizontal capture period"
|
|
textline " "
|
|
rbitfld.long 0x4 0. " HWDTH[0] ,Number of cycles to be captured from the location specified by the HOFST bits (8/16)" "0,1"
|
|
else
|
|
bitfld.long 0x4 16.--17. " VWDTH[1:0] ,Number of lines (HD count) to be captured from the location specified by the VOFST bits in CAMOR" "0,1,2,3"
|
|
hexmask.long.word 0x4 1.--12. 1. " HWDTH[12:1] ,Horizontal capture period"
|
|
textline " "
|
|
bitfld.long 0x4 0. " HWDTH[0] ,Number of cycles to be captured from the location specified by the HOFST bits (8/16)" "0,1"
|
|
endif
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "CAIFR,CEU Capture interface input format register"
|
|
bitfld.long 0x0 8. " IFS ,Sets the input mode for capturing images" "Progressive,Interface"
|
|
textline " "
|
|
bitfld.long 0x0 4. " CIM ,Sets the images to be captured" "Frame or both-field image,One-field image"
|
|
textline " "
|
|
bitfld.long 0x0 0.--1. " FCI ,Timing to start capturing" "From the VD input,Input of a top-field image is waited and then capture starts from the top field,Input of a bottom-field image is waited and then capture starts from the bottom field,"
|
|
sif (cpu()=="R7S721021")
|
|
if (((per.l(ad:0xE8210000))&0x1)==0x0)
|
|
group.long 0x28++0x7
|
|
line.long 0x00 "CRCNTR,CEU register control register"
|
|
rbitfld.long 0x00 4. " RVS ,Sets the timing to switch the register plane in both-field capture" "2 VD,1 VD"
|
|
bitfld.long 0x00 1. " RS ,Specifies which register plane is used by the CEU in synchronization with VD" "A,B"
|
|
bitfld.long 0x00 0. " RC ,Specifies switching of the register plane used by the CEU in synchronization with VD" "Specified register plane,Switches in synchr. with VD"
|
|
line.long 0x04 "CRCMPR,CEU register forcible control register"
|
|
bitfld.long 0x04 0. " RA ,Indicates the register plane currently specified" "A,B"
|
|
else
|
|
group.long 0x28++0x7
|
|
line.long 0x00 "CRCNTR,CEU register control register"
|
|
bitfld.long 0x00 4. " RVS ,Sets the timing to switch the register plane in both-field capture" "2 VD,1 VD"
|
|
rbitfld.long 0x00 1. " RS ,Specifies which register plane is used by the CEU in synchronization with VD" "A,B"
|
|
bitfld.long 0x00 0. " RC ,Specifies switching of the register plane used by the CEU in synchronization with VD" "Specified register plane,Switches in synchr. with VD"
|
|
line.long 0x04 "CRCMPR,CEU register forcible control register"
|
|
bitfld.long 0x04 0. " RA ,Indicates the register plane currently specified" "A,B"
|
|
endif
|
|
else
|
|
group.long 0x28++0x7
|
|
line.long 0x00 "CRCNTR,CEU register control register"
|
|
bitfld.long 0x00 4. " RVS ,Sets the timing to switch the register plane in both-field capture" "2 VD,1 VD"
|
|
bitfld.long 0x00 1. " RS ,Specifies which register plane is used by the CEU in synchronization with VD" "A,B"
|
|
bitfld.long 0x00 0. " RC ,Specifies switching of the register plane used by the CEU in synchronization with VD" "Specified register plane,Switches in synchr. with VD"
|
|
line.long 0x04 "CRCMPR,CEU register forcible control register"
|
|
bitfld.long 0x04 0. " RA ,Indicates the register plane currently specified" "A,B"
|
|
endif
|
|
group.long (0x0+0x30)++0x1f
|
|
line.long 0x00 "CFLCR,CEU Capture filter control register"
|
|
bitfld.long 0x00 28.--31. " VMANT ,Mantissa Part of Vertical Scale-Down Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 19.--27. 1. " VFRAC ,Fraction Part of Vertical Scale-Down Factor"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x00 16.--18. " VFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
rbitfld.long 0x00 12.--15. " HMANT ,Mantissa Part of Horizontal Scale-Down Factor" "0,1,2,3,4,5,6,7,..."
|
|
hexmask.long.word 0x00 3.--11. 1. " HFRAC ,Fraction Part of Horizontal Scale-Down Factor"
|
|
rbitfld.long 0x00 0.--2. " HFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.long 0x00 16.--18. " VFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " HMANT ,Mantissa Part of Horizontal Scale-Down Factor" "0,1,2,3,4,5,6,7,..."
|
|
hexmask.long.word 0x00 3.--11. 1. " HFRAC ,Fraction Part of Horizontal Scale-Down Factor"
|
|
bitfld.long 0x00 0.--2. " HFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif (cpu()=="R7S721021")
|
|
group.long (0x0+0x30)++0x1f
|
|
line.long 0x00 "CFLCR,CEU Capture filter control register"
|
|
bitfld.long 0x00 28.--31. " VMANT ,Mantissa Part of Vertical Scale-Down Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 19.--27. 1. " VFRAC ,Fraction Part of Vertical Scale-Down Factor"
|
|
bitfld.long 0x00 16.--18. " VFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
rbitfld.long 0x00 12.--15. " HMANT ,Mantissa Part of Horizontal Scale-Down Factor" "0,1,2,3,4,5,6,7,..."
|
|
hexmask.long.word 0x00 3.--11. 1. " HFRAC ,Fraction Part of Horizontal Scale-Down Factor"
|
|
rbitfld.long 0x00 0.--2. " HFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "CFSZR,CEU Capture filter size clip register"
|
|
hexmask.long.word 0x04 18.--27. 1. " VFCLP[11:2] ,Vertical clipping value of the filter output size"
|
|
rbitfld.long 0x04 16.--17. " VFCLP[1:0] ,Vertical clipping value of the filter output size" "0,1,2,3"
|
|
hexmask.long.word 0x04 2.--11. 1. " HFCLP[11:2] ,Horizontal clipping value of the filter output size"
|
|
textline " "
|
|
rbitfld.long 0x04 0.--1. " HFCLP[1:0] ,Horizontal clipping value of the filter output size" "0,1,2,3"
|
|
line.long 0x08 "CDWDR,CEU Capture destination width register"
|
|
hexmask.long.word 0x8 2.--12. 1. " CHDW[12:2] ,Horizontal image size in the memory area where the captured image is to be stored"
|
|
rbitfld.long 0x8 0.--1. " CHDW[1:0] ,Horizontal image size in the memory area where the captured image is to be stored" "0,1,2,3"
|
|
line.long 0xc "CDAYR,CEU Capture data address Y register"
|
|
hexmask.long 0xc 2.--31. 4. " CAYR[31:2] ,Address for storing the Y"
|
|
rbitfld.long 0xc 0.--1. " CAYR[1:0] ,Address for storing the Y" "0,1,2,3"
|
|
line.long 0x10 "CDACR,CEU Capture data address C register"
|
|
hexmask.long 0x10 2.--31. 4. " CACR[31:2] ,Address for storing the C"
|
|
bitfld.long 0x10 0.--1. " CACR[1:0] ,Address for storing the C" "0,1,2,3"
|
|
line.long 0x14 "CDBYR,CEU Capture data bottom-field address Y register"
|
|
hexmask.long 0x14 2.--31. 4. " CBYR[31:2] ,Address for storing the Y"
|
|
rbitfld.long 0x14 0.--1. " CBYR[1:0] ,Address for storing the Y" "0,1,2,3"
|
|
line.long 0x18 "CDBCR,CEU Capture data bottom-field address C register"
|
|
hexmask.long 0x18 2.--31. 4. " CBCR[31:2] ,Address for storing the C"
|
|
rbitfld.long 0x18 0.--1. " CBCR[1:0] ,Address for storing the C" "0,1,2,3"
|
|
line.long 0x1c "CBDSR,CEU Capture bundle destination size register"
|
|
hexmask.long.tbyte 0x1c 3.--22. 1. " CBVS[31:3] ,Number of bytes for output to the memory in a bundle write"
|
|
rbitfld.long 0x1c 0.--2. " CBVS[2:0] ,Number of bytes for output to the memory in a bundle write" "0,1,2,3,4,5,6,7"
|
|
else
|
|
group.long (0x0+0x30)++0x1f
|
|
line.long 0x00 "CFLCR,CEU Capture filter control register"
|
|
bitfld.long 0x00 28.--31. " VMANT ,Mantissa Part of Vertical Scale-Down Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 19.--27. 1. " VFRAC ,Fraction Part of Vertical Scale-Down Factor"
|
|
bitfld.long 0x00 16.--18. " VFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " HMANT ,Mantissa Part of Horizontal Scale-Down Factor" "0,1,2,3,4,5,6,7,..."
|
|
hexmask.long.word 0x00 3.--11. 1. " HFRAC ,Fraction Part of Horizontal Scale-Down Factor"
|
|
bitfld.long 0x00 0.--2. " HFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "CFSZR,CEU Capture filter size clip register"
|
|
hexmask.long.word 0x04 18.--27. 1. " VFCLP[11:2] ,Vertical clipping value of the filter output size"
|
|
bitfld.long 0x04 16.--17. " VFCLP[1:0] ,Vertical clipping value of the filter output size" "0,1,2,3"
|
|
hexmask.long.word 0x04 2.--11. 1. " HFCLP[11:2] ,Horizontal clipping value of the filter output size"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " HFCLP[1:0] ,Horizontal clipping value of the filter output size" "0,1,2,3"
|
|
line.long 0x08 "CDWDR,CEU Capture destination width register"
|
|
hexmask.long.word 0x8 2.--12. 1. " CHDW[12:2] ,Horizontal image size in the memory area where the captured image is to be stored"
|
|
bitfld.long 0x8 0.--1. " CHDW[1:0] ,Horizontal image size in the memory area where the captured image is to be stored" "0,1,2,3"
|
|
line.long 0xc "CDAYR,CEU Capture data address Y register"
|
|
hexmask.long 0xc 2.--31. 4. " CAYR[31:2] ,Address for storing the Y"
|
|
bitfld.long 0xc 0.--1. " CAYR[31:2] ,Address for storing the Y" "0,1,2,3"
|
|
line.long 0x10 "CDACR,CEU Capture data address C register"
|
|
hexmask.long 0x10 2.--31. 4. " CACR[31:2] ,Address for storing the C"
|
|
bitfld.long 0x10 0.--1. " CACR[1:0] ,Address for storing the C" "0,1,2,3"
|
|
line.long 0x14 "CDBYR,CEU Capture data bottom-field address Y register"
|
|
hexmask.long 0x14 2.--31. 4. " CBYR[31:2] ,Address for storing the Y"
|
|
bitfld.long 0x14 0.--1. " CBYR[31:2] ,Address for storing the Y" "0,1,2,3"
|
|
line.long 0x18 "CDBCR,CEU Capture data bottom-field address C register"
|
|
hexmask.long 0x18 2.--31. 4. " CBCR[31:2] ,Address for storing the C"
|
|
bitfld.long 0x18 0.--1. " CBCR[1:0] ,Address for storing the C" "0,1,2,3"
|
|
line.long 0x1c "CBDSR,CEU Capture bundle destination size register"
|
|
hexmask.long 0x1c 3.--22. 1. " CBVS[31:3] ,Number of bytes for output to the memory in a bundle write"
|
|
bitfld.long 0x1c 0.--2. " CBVS[2:0] ,Number of bytes for output to the memory in a bundle write" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
group.long 0x5c++0x3
|
|
line.long 0x0 "CFWCR,CEU Firewall operation control register"
|
|
hexmask.long 0x00 5.--31. 1. " FWV ,The upper limit of a write address"
|
|
bitfld.long 0x00 0. " FWE ,Firewall is activated" "Not activated,Activated"
|
|
group.long (0x0+0x60)++0x7
|
|
line.long 0x0 "CLFCR,CEU Capture low-pass filter control register"
|
|
bitfld.long 0x0 0. " LPF ,Enables or disables operation of the low-pass filter" "Disabled,Enabled"
|
|
line.long 0x4 "CDOCR,CEU Capture data output control register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x04 16. " CBE ,Controls the number of lines of captured data to be written to the memory" "Normal,Bundle"
|
|
bitfld.long 0x04 4. " CDS ,Sets the image format when outputting the image data captured in the YCbCr 422 format to the memory" "YCbCr 422 to YCbCr 420,YCbCr 422 to memory without conversion"
|
|
else
|
|
bitfld.long 0x04 16. " CBE ,Controls the number of lines of captured data to be written to the memory" "0,1"
|
|
bitfld.long 0x04 4. " CDS ,Sets the image format when outputting the image data captured in the YCbCr 422 format to the memory" "YCbCr 422 to YCbCr 420,YCbCr 422 to memory without conversion"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x04 2. " COLS ,Controls swapping in 32-bit units for data output from the CEU" "Not swapped,Swapped"
|
|
bitfld.long 0x04 1. " COWS ,Controls swapping in 16-bit units for data output from the CEU" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x04 0. " COBS ,Controls swapping in 8-bit units for data output from the CEU" "Not swapped,Swapped"
|
|
sif (cpu()=="R7S721021")
|
|
group.long 0x70++0x7
|
|
line.long 0x00 "CEIER,CEU Capture interrupt enable register"
|
|
bitfld.long 0x00 25. " NVDIE ,Non-VD Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " NHDIE ,Non-HD Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " FWFIE ,FWF Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " VBPIE ,VBP Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " IGVSIE ,IGVS Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IGHSIE ,IGHS Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CDTOFIE ,CDTOF Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " CPBE4IE ,CPBE4 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " CPBE3IE ,CPBE3 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " CPBE2IE ,CPBE2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " CPBE1IE ,CPBE1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " VDIE ,VD Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " HDIE ,HD Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IGRWIE ,Register-Access-During-Capture Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CFEIE ,CFE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CPEIE ,One-Frame Capture End Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x04 "CETCR,CEU Capture event flag clear"
|
|
bitfld.long 0x04 25. " NVD ,Non-VD interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " NHD ,Non-HD interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " FWF ,Data is written to the address that exceeds the value specified" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " VBP ,Bit is used for an interrupt indicating that VD" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 18. " IGVS ,Bit is set when there is an illegal VD input from an external module" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " IGHS ,Bit is set when there is an illegal HD input from an external module" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " CDTOF ,Bit is used for an interrupt indicating that data overflowed in the CRAM" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " CPBE4 ,Bit is used for an interrupt indicating that writing to CDBYR2 and CDBCR2 in a bundle write has finished" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 14. " CPBE3 ,Bit is set when data for the number of lines set in CBDSR has been captured and the last data transfer to the bus has completed" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " CPBE2 ,Bit is set when data for the number of lines set in CBDSR has been captured and the last data transfer to the bus has completed." "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " CPBE1 ,Bit is set when data for the number of lines set in CBDSR has been captured and the last data transfer to the bus has completed" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " VD ,Bit is set when a VD input from an external module is detected" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 8. " HD ,Bit is set when an HD input from an external module is detected" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " IGRW ,Bit is set when a register to which writing during capturing is prohibited has been written to" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " CFE ,Bit is used for an interrupt indicating that capturing of one field from an external module has finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CPE ,Bit is set when the image of the size set in CAPWR is captured and the last data transfer to the bus finished" "Disabled,Enabled"
|
|
else
|
|
group.long 0x70++0x7
|
|
line.long 0x00 "CEIER,CEU Capture interrupt enable register"
|
|
bitfld.long 0x00 25. " NVDIE ,No VD was input" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " NHDIE ,No HD was input" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " FWFIE ,No FWF was input" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " VBPIE ,No VBP was input" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " IGVSIE ,No IGVS was input" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IGHSIE ,No IGHS was input" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CDTOFIE ,No CDTOF was input" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " CPBE4IE ,No CPBE4 was input" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " CPBE3IE ,No CPBE3 was input" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " CPBE2IE ,No CPBE2 was input" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " CPBE1IE ,No CPBE1 was input" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " VDIE ,No VD was input" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " HDIE ,No HD was input" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IGRWIE ,No Register-Access-During-Capture was input" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CFEIE ,No CFE was input" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CPEIE ,No One-Frame Capture End was input" "Disabled,Enabled"
|
|
line.long 0x04 "CETCR,CEU Capture event flag clear"
|
|
bitfld.long 0x04 25. " NVD ,No VD was input" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " NHD ,No HD was input" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " FWF ,No FWF was input" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " VBP ,No VBP was input" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 18. " IGVS ,No IGVS was input" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " IGHS ,No IGHS was input" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " CDTOF ,No CDTOF was input" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " CPBE4 ,No CPBE4 was input" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 14. " CPBE3 ,No CPBE3 was input" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " CPBE2 ,No CPBE2 was input" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " CPBE1 ,No CPBE1 was input" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " VD ,No VD was input" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 8. " HD ,No HD was input" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " IGRW ,No Register-Access-During-Capture was input" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " CFE ,No CFE was input" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CPE ,No One-Frame Capture End was input" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x7c++0x3
|
|
line.long 0x00 "CSTSR,CEU Capture status register"
|
|
bitfld.long 0x0 24. " CRST ,Indicates which register plane is currently used" "A,B"
|
|
bitfld.long 0x0 16. " CPFLD ,Indicates which field is being captured" "Bottom field,Top field"
|
|
bitfld.long 0x0 0. " CPTON ,Indicates that the CEU is operating" "Not operating,Operating"
|
|
sif (cpu()=="R7S721021")
|
|
rgroup.long 0x84++0x3
|
|
line.long 0x00 "CDSSR,CEU Capture data size register"
|
|
else
|
|
group.long 0x84++0x3
|
|
line.long 0x00 "CDSSR,CEU Capture data size register"
|
|
endif
|
|
sif (cpu()=="R7S721021")
|
|
group.long (0x0+0x90)++0x0F
|
|
line.long 0x00 "CDAYR2,CEU Capture data address Y register 2"
|
|
hexmask.long 0x0 2.--31. 4. " CAYR[31:2] ,Address for storing the Y"
|
|
rbitfld.long 0x0 0.--1. " CAYR2[1:0] ,Address for storing the Y" "0,1,2,3"
|
|
line.long 0x04 "CDACR2,CEU Capture data address C register 2"
|
|
hexmask.long 0x04 2.--31. 4. " CACR2[31:2] ,Address for storing the C"
|
|
rbitfld.long 0x04 0.--1. " CACR2[1:0] ,Address for storing the C" "0,1,2,3"
|
|
line.long 0x08 "CDBYR2,CEU Capture data bottom-field address Y register 2"
|
|
hexmask.long 0x08 2.--31. 4. " CBYR2[31:2] ,Address for storing the Y"
|
|
rbitfld.long 0x08 0.--1. " CBYR2[1:0] ,Address for storing the Y" "0,1,2,3"
|
|
line.long 0x0C "CDBCR2,CEU Capture data bottom-field address C register 2"
|
|
hexmask.long 0x0C 2.--31. 4. " CBCR2[31:2] ,Address for storing the C"
|
|
rbitfld.long 0x0C 0.--1. " CBCR2[1:0] ,Address for storing the C" "0,1,2,3"
|
|
else
|
|
group.long (0x0+0x90)++0xf
|
|
line.long 0x00 "CDAYR2,CEU Capture data address Y register 2"
|
|
hexmask.long 0x0 2.--31. 4. " CAYR[31:2] ,Address for storing the Y"
|
|
line.long 0x04 "CDACR2,CEU Capture data address C register 2"
|
|
hexmask.long 0x4 2.--31. 4. " CACR2[31:2] ,Address for storing the C"
|
|
line.long 0x08 "CDABYR2,CEU Capture data bottom-field address Y register 2"
|
|
hexmask.long 0x8 2.--31. 4. " CBYR2[31:2] ,Address for storing the Y"
|
|
line.long 0x0c "CDABCR2,CEU Capture data bottom-field address Y register 2"
|
|
hexmask.long 0xc 2.--31. 4. " CBCR2[31:2] ,Address for storing the C"
|
|
endif
|
|
tree.end
|
|
tree "Plane B"
|
|
group.long (0x1000+0x10)++0x7
|
|
line.long 0x0 "CAMOR,CEU Capture interface offset register"
|
|
hexmask.long.word 0x0 16.--27. 1. " VOFST ,Capture start location in terms of the HD count from a vertical sync signal"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.long.word 0x0 0.--12. 1. " HOFST ,Capture start location in terms of the number of clock cycles from a horizontal sync signal"
|
|
else
|
|
hexmask.long.word 0x0 0.--13. 1. " HOFST ,Capture start location in terms of the number of clock cycles from a horizontal sync signal"
|
|
endif
|
|
line.long 0x4 "CAPWR,CEU Capture interface width register"
|
|
hexmask.long.word 0x4 18.--27. 1. " VWDTH[11:2] ,Vertical capture period"
|
|
sif (cpu()=="R7S721021")
|
|
rbitfld.long 0x4 16.--17. " VWDTH[1:0] ,Number of lines (HD count) to be captured from the location specified by the VOFST bits in CAMOR" "0,1,2,3"
|
|
hexmask.long.word 0x4 1.--12. 1. " HWDTH[12:1] ,Horizontal capture period"
|
|
textline " "
|
|
rbitfld.long 0x4 0. " HWDTH[0] ,Number of cycles to be captured from the location specified by the HOFST bits (8/16)" "0,1"
|
|
else
|
|
bitfld.long 0x4 16.--17. " VWDTH[1:0] ,Number of lines (HD count) to be captured from the location specified by the VOFST bits in CAMOR" "0,1,2,3"
|
|
hexmask.long.word 0x4 1.--12. 1. " HWDTH[12:1] ,Horizontal capture period"
|
|
textline " "
|
|
bitfld.long 0x4 0. " HWDTH[0] ,Number of cycles to be captured from the location specified by the HOFST bits (8/16)" "0,1"
|
|
endif
|
|
group.long (0x1000+0x30)++0x1f
|
|
line.long 0x00 "CFLCR,CEU Capture filter control register"
|
|
bitfld.long 0x00 28.--31. " VMANT ,Mantissa Part of Vertical Scale-Down Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 19.--27. 1. " VFRAC ,Fraction Part of Vertical Scale-Down Factor"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x00 16.--18. " VFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
rbitfld.long 0x00 12.--15. " HMANT ,Mantissa Part of Horizontal Scale-Down Factor" "0,1,2,3,4,5,6,7,..."
|
|
hexmask.long.word 0x00 3.--11. 1. " HFRAC ,Fraction Part of Horizontal Scale-Down Factor"
|
|
rbitfld.long 0x00 0.--2. " HFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.long 0x00 16.--18. " VFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " HMANT ,Mantissa Part of Horizontal Scale-Down Factor" "0,1,2,3,4,5,6,7,..."
|
|
hexmask.long.word 0x00 3.--11. 1. " HFRAC ,Fraction Part of Horizontal Scale-Down Factor"
|
|
bitfld.long 0x00 0.--2. " HFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif (cpu()=="R7S721021")
|
|
group.long (0x1000+0x30)++0x1f
|
|
line.long 0x00 "CFLCR,CEU Capture filter control register"
|
|
bitfld.long 0x00 28.--31. " VMANT ,Mantissa Part of Vertical Scale-Down Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 19.--27. 1. " VFRAC ,Fraction Part of Vertical Scale-Down Factor"
|
|
bitfld.long 0x00 16.--18. " VFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
rbitfld.long 0x00 12.--15. " HMANT ,Mantissa Part of Horizontal Scale-Down Factor" "0,1,2,3,4,5,6,7,..."
|
|
hexmask.long.word 0x00 3.--11. 1. " HFRAC ,Fraction Part of Horizontal Scale-Down Factor"
|
|
rbitfld.long 0x00 0.--2. " HFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "CFSZR,CEU Capture filter size clip register"
|
|
hexmask.long.word 0x04 18.--27. 1. " VFCLP[11:2] ,Vertical clipping value of the filter output size"
|
|
rbitfld.long 0x04 16.--17. " VFCLP[1:0] ,Vertical clipping value of the filter output size" "0,1,2,3"
|
|
hexmask.long.word 0x04 2.--11. 1. " HFCLP[11:2] ,Horizontal clipping value of the filter output size"
|
|
textline " "
|
|
rbitfld.long 0x04 0.--1. " HFCLP[1:0] ,Horizontal clipping value of the filter output size" "0,1,2,3"
|
|
line.long 0x08 "CDWDR,CEU Capture destination width register"
|
|
hexmask.long.word 0x8 2.--12. 1. " CHDW[12:2] ,Horizontal image size in the memory area where the captured image is to be stored"
|
|
rbitfld.long 0x8 0.--1. " CHDW[1:0] ,Horizontal image size in the memory area where the captured image is to be stored" "0,1,2,3"
|
|
line.long 0xc "CDAYR,CEU Capture data address Y register"
|
|
hexmask.long 0xc 2.--31. 4. " CAYR[31:2] ,Address for storing the Y"
|
|
rbitfld.long 0xc 0.--1. " CAYR[1:0] ,Address for storing the Y" "0,1,2,3"
|
|
line.long 0x10 "CDACR,CEU Capture data address C register"
|
|
hexmask.long 0x10 2.--31. 4. " CACR[31:2] ,Address for storing the C"
|
|
bitfld.long 0x10 0.--1. " CACR[1:0] ,Address for storing the C" "0,1,2,3"
|
|
line.long 0x14 "CDBYR,CEU Capture data bottom-field address Y register"
|
|
hexmask.long 0x14 2.--31. 4. " CBYR[31:2] ,Address for storing the Y"
|
|
rbitfld.long 0x14 0.--1. " CBYR[1:0] ,Address for storing the Y" "0,1,2,3"
|
|
line.long 0x18 "CDBCR,CEU Capture data bottom-field address C register"
|
|
hexmask.long 0x18 2.--31. 4. " CBCR[31:2] ,Address for storing the C"
|
|
rbitfld.long 0x18 0.--1. " CBCR[1:0] ,Address for storing the C" "0,1,2,3"
|
|
line.long 0x1c "CBDSR,CEU Capture bundle destination size register"
|
|
hexmask.long.tbyte 0x1c 3.--22. 1. " CBVS[31:3] ,Number of bytes for output to the memory in a bundle write"
|
|
rbitfld.long 0x1c 0.--2. " CBVS[2:0] ,Number of bytes for output to the memory in a bundle write" "0,1,2,3,4,5,6,7"
|
|
else
|
|
group.long (0x1000+0x30)++0x1f
|
|
line.long 0x00 "CFLCR,CEU Capture filter control register"
|
|
bitfld.long 0x00 28.--31. " VMANT ,Mantissa Part of Vertical Scale-Down Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 19.--27. 1. " VFRAC ,Fraction Part of Vertical Scale-Down Factor"
|
|
bitfld.long 0x00 16.--18. " VFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " HMANT ,Mantissa Part of Horizontal Scale-Down Factor" "0,1,2,3,4,5,6,7,..."
|
|
hexmask.long.word 0x00 3.--11. 1. " HFRAC ,Fraction Part of Horizontal Scale-Down Factor"
|
|
bitfld.long 0x00 0.--2. " HFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "CFSZR,CEU Capture filter size clip register"
|
|
hexmask.long.word 0x04 18.--27. 1. " VFCLP[11:2] ,Vertical clipping value of the filter output size"
|
|
bitfld.long 0x04 16.--17. " VFCLP[1:0] ,Vertical clipping value of the filter output size" "0,1,2,3"
|
|
hexmask.long.word 0x04 2.--11. 1. " HFCLP[11:2] ,Horizontal clipping value of the filter output size"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " HFCLP[1:0] ,Horizontal clipping value of the filter output size" "0,1,2,3"
|
|
line.long 0x08 "CDWDR,CEU Capture destination width register"
|
|
hexmask.long.word 0x8 2.--12. 1. " CHDW[12:2] ,Horizontal image size in the memory area where the captured image is to be stored"
|
|
bitfld.long 0x8 0.--1. " CHDW[1:0] ,Horizontal image size in the memory area where the captured image is to be stored" "0,1,2,3"
|
|
line.long 0xc "CDAYR,CEU Capture data address Y register"
|
|
hexmask.long 0xc 2.--31. 4. " CAYR[31:2] ,Address for storing the Y"
|
|
bitfld.long 0xc 0.--1. " CAYR[31:2] ,Address for storing the Y" "0,1,2,3"
|
|
line.long 0x10 "CDACR,CEU Capture data address C register"
|
|
hexmask.long 0x10 2.--31. 4. " CACR[31:2] ,Address for storing the C"
|
|
bitfld.long 0x10 0.--1. " CACR[1:0] ,Address for storing the C" "0,1,2,3"
|
|
line.long 0x14 "CDBYR,CEU Capture data bottom-field address Y register"
|
|
hexmask.long 0x14 2.--31. 4. " CBYR[31:2] ,Address for storing the Y"
|
|
bitfld.long 0x14 0.--1. " CBYR[31:2] ,Address for storing the Y" "0,1,2,3"
|
|
line.long 0x18 "CDBCR,CEU Capture data bottom-field address C register"
|
|
hexmask.long 0x18 2.--31. 4. " CBCR[31:2] ,Address for storing the C"
|
|
bitfld.long 0x18 0.--1. " CBCR[1:0] ,Address for storing the C" "0,1,2,3"
|
|
line.long 0x1c "CBDSR,CEU Capture bundle destination size register"
|
|
hexmask.long 0x1c 3.--22. 1. " CBVS[31:3] ,Number of bytes for output to the memory in a bundle write"
|
|
bitfld.long 0x1c 0.--2. " CBVS[2:0] ,Number of bytes for output to the memory in a bundle write" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
group.long (0x1000+0x60)++0x7
|
|
line.long 0x0 "CLFCR,CEU Capture low-pass filter control register"
|
|
bitfld.long 0x0 0. " LPF ,Enables or disables operation of the low-pass filter" "Disabled,Enabled"
|
|
line.long 0x4 "CDOCR,CEU Capture data output control register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x04 16. " CBE ,Controls the number of lines of captured data to be written to the memory" "Normal,Bundle"
|
|
bitfld.long 0x04 4. " CDS ,Sets the image format when outputting the image data captured in the YCbCr 422 format to the memory" "YCbCr 422 to YCbCr 420,YCbCr 422 to memory without conversion"
|
|
else
|
|
bitfld.long 0x04 16. " CBE ,Controls the number of lines of captured data to be written to the memory" "0,1"
|
|
bitfld.long 0x04 4. " CDS ,Sets the image format when outputting the image data captured in the YCbCr 422 format to the memory" "YCbCr 422 to YCbCr 420,YCbCr 422 to memory without conversion"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x04 2. " COLS ,Controls swapping in 32-bit units for data output from the CEU" "Not swapped,Swapped"
|
|
bitfld.long 0x04 1. " COWS ,Controls swapping in 16-bit units for data output from the CEU" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x04 0. " COBS ,Controls swapping in 8-bit units for data output from the CEU" "Not swapped,Swapped"
|
|
sif (cpu()=="R7S721021")
|
|
group.long (0x1000+0x90)++0x0F
|
|
line.long 0x00 "CDAYR2,CEU Capture data address Y register 2"
|
|
hexmask.long 0x0 2.--31. 4. " CAYR[31:2] ,Address for storing the Y"
|
|
rbitfld.long 0x0 0.--1. " CAYR2[1:0] ,Address for storing the Y" "0,1,2,3"
|
|
line.long 0x04 "CDACR2,CEU Capture data address C register 2"
|
|
hexmask.long 0x04 2.--31. 4. " CACR2[31:2] ,Address for storing the C"
|
|
rbitfld.long 0x04 0.--1. " CACR2[1:0] ,Address for storing the C" "0,1,2,3"
|
|
line.long 0x08 "CDBYR2,CEU Capture data bottom-field address Y register 2"
|
|
hexmask.long 0x08 2.--31. 4. " CBYR2[31:2] ,Address for storing the Y"
|
|
rbitfld.long 0x08 0.--1. " CBYR2[1:0] ,Address for storing the Y" "0,1,2,3"
|
|
line.long 0x0C "CDBCR2,CEU Capture data bottom-field address C register 2"
|
|
hexmask.long 0x0C 2.--31. 4. " CBCR2[31:2] ,Address for storing the C"
|
|
rbitfld.long 0x0C 0.--1. " CBCR2[1:0] ,Address for storing the C" "0,1,2,3"
|
|
else
|
|
group.long (0x1000+0x90)++0xf
|
|
line.long 0x00 "CDAYR2,CEU Capture data address Y register 2"
|
|
hexmask.long 0x0 2.--31. 4. " CAYR[31:2] ,Address for storing the Y"
|
|
line.long 0x04 "CDACR2,CEU Capture data address C register 2"
|
|
hexmask.long 0x4 2.--31. 4. " CACR2[31:2] ,Address for storing the C"
|
|
line.long 0x08 "CDABYR2,CEU Capture data bottom-field address Y register 2"
|
|
hexmask.long 0x8 2.--31. 4. " CBYR2[31:2] ,Address for storing the Y"
|
|
line.long 0x0c "CDABCR2,CEU Capture data bottom-field address Y register 2"
|
|
hexmask.long 0xc 2.--31. 4. " CBCR2[31:2] ,Address for storing the C"
|
|
endif
|
|
tree.end
|
|
tree "Mirror"
|
|
group.long (0x2000+0x10)++0x7
|
|
line.long 0x0 "CAMOR,CEU Capture interface offset register"
|
|
hexmask.long.word 0x0 16.--27. 1. " VOFST ,Capture start location in terms of the HD count from a vertical sync signal"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.long.word 0x0 0.--12. 1. " HOFST ,Capture start location in terms of the number of clock cycles from a horizontal sync signal"
|
|
else
|
|
hexmask.long.word 0x0 0.--13. 1. " HOFST ,Capture start location in terms of the number of clock cycles from a horizontal sync signal"
|
|
endif
|
|
line.long 0x4 "CAPWR,CEU Capture interface width register"
|
|
hexmask.long.word 0x4 18.--27. 1. " VWDTH[11:2] ,Vertical capture period"
|
|
sif (cpu()=="R7S721021")
|
|
rbitfld.long 0x4 16.--17. " VWDTH[1:0] ,Number of lines (HD count) to be captured from the location specified by the VOFST bits in CAMOR" "0,1,2,3"
|
|
hexmask.long.word 0x4 1.--12. 1. " HWDTH[12:1] ,Horizontal capture period"
|
|
textline " "
|
|
rbitfld.long 0x4 0. " HWDTH[0] ,Number of cycles to be captured from the location specified by the HOFST bits (8/16)" "0,1"
|
|
else
|
|
bitfld.long 0x4 16.--17. " VWDTH[1:0] ,Number of lines (HD count) to be captured from the location specified by the VOFST bits in CAMOR" "0,1,2,3"
|
|
hexmask.long.word 0x4 1.--12. 1. " HWDTH[12:1] ,Horizontal capture period"
|
|
textline " "
|
|
bitfld.long 0x4 0. " HWDTH[0] ,Number of cycles to be captured from the location specified by the HOFST bits (8/16)" "0,1"
|
|
endif
|
|
group.long (0x2000+0x30)++0x1f
|
|
line.long 0x00 "CFLCR,CEU Capture filter control register"
|
|
bitfld.long 0x00 28.--31. " VMANT ,Mantissa Part of Vertical Scale-Down Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 19.--27. 1. " VFRAC ,Fraction Part of Vertical Scale-Down Factor"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x00 16.--18. " VFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
rbitfld.long 0x00 12.--15. " HMANT ,Mantissa Part of Horizontal Scale-Down Factor" "0,1,2,3,4,5,6,7,..."
|
|
hexmask.long.word 0x00 3.--11. 1. " HFRAC ,Fraction Part of Horizontal Scale-Down Factor"
|
|
rbitfld.long 0x00 0.--2. " HFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.long 0x00 16.--18. " VFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " HMANT ,Mantissa Part of Horizontal Scale-Down Factor" "0,1,2,3,4,5,6,7,..."
|
|
hexmask.long.word 0x00 3.--11. 1. " HFRAC ,Fraction Part of Horizontal Scale-Down Factor"
|
|
bitfld.long 0x00 0.--2. " HFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif (cpu()=="R7S721021")
|
|
group.long (0x2000+0x30)++0x1f
|
|
line.long 0x00 "CFLCR,CEU Capture filter control register"
|
|
bitfld.long 0x00 28.--31. " VMANT ,Mantissa Part of Vertical Scale-Down Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 19.--27. 1. " VFRAC ,Fraction Part of Vertical Scale-Down Factor"
|
|
bitfld.long 0x00 16.--18. " VFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
rbitfld.long 0x00 12.--15. " HMANT ,Mantissa Part of Horizontal Scale-Down Factor" "0,1,2,3,4,5,6,7,..."
|
|
hexmask.long.word 0x00 3.--11. 1. " HFRAC ,Fraction Part of Horizontal Scale-Down Factor"
|
|
rbitfld.long 0x00 0.--2. " HFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "CFSZR,CEU Capture filter size clip register"
|
|
hexmask.long.word 0x04 18.--27. 1. " VFCLP[11:2] ,Vertical clipping value of the filter output size"
|
|
rbitfld.long 0x04 16.--17. " VFCLP[1:0] ,Vertical clipping value of the filter output size" "0,1,2,3"
|
|
hexmask.long.word 0x04 2.--11. 1. " HFCLP[11:2] ,Horizontal clipping value of the filter output size"
|
|
textline " "
|
|
rbitfld.long 0x04 0.--1. " HFCLP[1:0] ,Horizontal clipping value of the filter output size" "0,1,2,3"
|
|
line.long 0x08 "CDWDR,CEU Capture destination width register"
|
|
hexmask.long.word 0x8 2.--12. 1. " CHDW[12:2] ,Horizontal image size in the memory area where the captured image is to be stored"
|
|
rbitfld.long 0x8 0.--1. " CHDW[1:0] ,Horizontal image size in the memory area where the captured image is to be stored" "0,1,2,3"
|
|
line.long 0xc "CDAYR,CEU Capture data address Y register"
|
|
hexmask.long 0xc 2.--31. 4. " CAYR[31:2] ,Address for storing the Y"
|
|
rbitfld.long 0xc 0.--1. " CAYR[1:0] ,Address for storing the Y" "0,1,2,3"
|
|
line.long 0x10 "CDACR,CEU Capture data address C register"
|
|
hexmask.long 0x10 2.--31. 4. " CACR[31:2] ,Address for storing the C"
|
|
bitfld.long 0x10 0.--1. " CACR[1:0] ,Address for storing the C" "0,1,2,3"
|
|
line.long 0x14 "CDBYR,CEU Capture data bottom-field address Y register"
|
|
hexmask.long 0x14 2.--31. 4. " CBYR[31:2] ,Address for storing the Y"
|
|
rbitfld.long 0x14 0.--1. " CBYR[1:0] ,Address for storing the Y" "0,1,2,3"
|
|
line.long 0x18 "CDBCR,CEU Capture data bottom-field address C register"
|
|
hexmask.long 0x18 2.--31. 4. " CBCR[31:2] ,Address for storing the C"
|
|
rbitfld.long 0x18 0.--1. " CBCR[1:0] ,Address for storing the C" "0,1,2,3"
|
|
line.long 0x1c "CBDSR,CEU Capture bundle destination size register"
|
|
hexmask.long.tbyte 0x1c 3.--22. 1. " CBVS[31:3] ,Number of bytes for output to the memory in a bundle write"
|
|
rbitfld.long 0x1c 0.--2. " CBVS[2:0] ,Number of bytes for output to the memory in a bundle write" "0,1,2,3,4,5,6,7"
|
|
else
|
|
group.long (0x2000+0x30)++0x1f
|
|
line.long 0x00 "CFLCR,CEU Capture filter control register"
|
|
bitfld.long 0x00 28.--31. " VMANT ,Mantissa Part of Vertical Scale-Down Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 19.--27. 1. " VFRAC ,Fraction Part of Vertical Scale-Down Factor"
|
|
bitfld.long 0x00 16.--18. " VFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " HMANT ,Mantissa Part of Horizontal Scale-Down Factor" "0,1,2,3,4,5,6,7,..."
|
|
hexmask.long.word 0x00 3.--11. 1. " HFRAC ,Fraction Part of Horizontal Scale-Down Factor"
|
|
bitfld.long 0x00 0.--2. " HFRAC ,The fraction of the scale-down factor" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "CFSZR,CEU Capture filter size clip register"
|
|
hexmask.long.word 0x04 18.--27. 1. " VFCLP[11:2] ,Vertical clipping value of the filter output size"
|
|
bitfld.long 0x04 16.--17. " VFCLP[1:0] ,Vertical clipping value of the filter output size" "0,1,2,3"
|
|
hexmask.long.word 0x04 2.--11. 1. " HFCLP[11:2] ,Horizontal clipping value of the filter output size"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " HFCLP[1:0] ,Horizontal clipping value of the filter output size" "0,1,2,3"
|
|
line.long 0x08 "CDWDR,CEU Capture destination width register"
|
|
hexmask.long.word 0x8 2.--12. 1. " CHDW[12:2] ,Horizontal image size in the memory area where the captured image is to be stored"
|
|
bitfld.long 0x8 0.--1. " CHDW[1:0] ,Horizontal image size in the memory area where the captured image is to be stored" "0,1,2,3"
|
|
line.long 0xc "CDAYR,CEU Capture data address Y register"
|
|
hexmask.long 0xc 2.--31. 4. " CAYR[31:2] ,Address for storing the Y"
|
|
bitfld.long 0xc 0.--1. " CAYR[31:2] ,Address for storing the Y" "0,1,2,3"
|
|
line.long 0x10 "CDACR,CEU Capture data address C register"
|
|
hexmask.long 0x10 2.--31. 4. " CACR[31:2] ,Address for storing the C"
|
|
bitfld.long 0x10 0.--1. " CACR[1:0] ,Address for storing the C" "0,1,2,3"
|
|
line.long 0x14 "CDBYR,CEU Capture data bottom-field address Y register"
|
|
hexmask.long 0x14 2.--31. 4. " CBYR[31:2] ,Address for storing the Y"
|
|
bitfld.long 0x14 0.--1. " CBYR[31:2] ,Address for storing the Y" "0,1,2,3"
|
|
line.long 0x18 "CDBCR,CEU Capture data bottom-field address C register"
|
|
hexmask.long 0x18 2.--31. 4. " CBCR[31:2] ,Address for storing the C"
|
|
bitfld.long 0x18 0.--1. " CBCR[1:0] ,Address for storing the C" "0,1,2,3"
|
|
line.long 0x1c "CBDSR,CEU Capture bundle destination size register"
|
|
hexmask.long 0x1c 3.--22. 1. " CBVS[31:3] ,Number of bytes for output to the memory in a bundle write"
|
|
bitfld.long 0x1c 0.--2. " CBVS[2:0] ,Number of bytes for output to the memory in a bundle write" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
group.long (0x2000+0x60)++0x7
|
|
line.long 0x0 "CLFCR,CEU Capture low-pass filter control register"
|
|
bitfld.long 0x0 0. " LPF ,Enables or disables operation of the low-pass filter" "Disabled,Enabled"
|
|
line.long 0x4 "CDOCR,CEU Capture data output control register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x04 16. " CBE ,Controls the number of lines of captured data to be written to the memory" "Normal,Bundle"
|
|
bitfld.long 0x04 4. " CDS ,Sets the image format when outputting the image data captured in the YCbCr 422 format to the memory" "YCbCr 422 to YCbCr 420,YCbCr 422 to memory without conversion"
|
|
else
|
|
bitfld.long 0x04 16. " CBE ,Controls the number of lines of captured data to be written to the memory" "0,1"
|
|
bitfld.long 0x04 4. " CDS ,Sets the image format when outputting the image data captured in the YCbCr 422 format to the memory" "YCbCr 422 to YCbCr 420,YCbCr 422 to memory without conversion"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x04 2. " COLS ,Controls swapping in 32-bit units for data output from the CEU" "Not swapped,Swapped"
|
|
bitfld.long 0x04 1. " COWS ,Controls swapping in 16-bit units for data output from the CEU" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x04 0. " COBS ,Controls swapping in 8-bit units for data output from the CEU" "Not swapped,Swapped"
|
|
sif (cpu()=="R7S721021")
|
|
group.long (0x2000+0x90)++0x0F
|
|
line.long 0x00 "CDAYR2,CEU Capture data address Y register 2"
|
|
hexmask.long 0x0 2.--31. 4. " CAYR[31:2] ,Address for storing the Y"
|
|
rbitfld.long 0x0 0.--1. " CAYR2[1:0] ,Address for storing the Y" "0,1,2,3"
|
|
line.long 0x04 "CDACR2,CEU Capture data address C register 2"
|
|
hexmask.long 0x04 2.--31. 4. " CACR2[31:2] ,Address for storing the C"
|
|
rbitfld.long 0x04 0.--1. " CACR2[1:0] ,Address for storing the C" "0,1,2,3"
|
|
line.long 0x08 "CDBYR2,CEU Capture data bottom-field address Y register 2"
|
|
hexmask.long 0x08 2.--31. 4. " CBYR2[31:2] ,Address for storing the Y"
|
|
rbitfld.long 0x08 0.--1. " CBYR2[1:0] ,Address for storing the Y" "0,1,2,3"
|
|
line.long 0x0C "CDBCR2,CEU Capture data bottom-field address C register 2"
|
|
hexmask.long 0x0C 2.--31. 4. " CBCR2[31:2] ,Address for storing the C"
|
|
rbitfld.long 0x0C 0.--1. " CBCR2[1:0] ,Address for storing the C" "0,1,2,3"
|
|
else
|
|
group.long (0x2000+0x90)++0xf
|
|
line.long 0x00 "CDAYR2,CEU Capture data address Y register 2"
|
|
hexmask.long 0x0 2.--31. 4. " CAYR[31:2] ,Address for storing the Y"
|
|
line.long 0x04 "CDACR2,CEU Capture data address C register 2"
|
|
hexmask.long 0x4 2.--31. 4. " CACR2[31:2] ,Address for storing the C"
|
|
line.long 0x08 "CDABYR2,CEU Capture data bottom-field address Y register 2"
|
|
hexmask.long 0x8 2.--31. 4. " CBYR2[31:2] ,Address for storing the Y"
|
|
line.long 0x0c "CDABCR2,CEU Capture data bottom-field address Y register 2"
|
|
hexmask.long 0xc 2.--31. 4. " CBCR2[31:2] ,Address for storing the C"
|
|
endif
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree.open "PFV (Pixel Format Converter)"
|
|
tree "PFV0"
|
|
base ad:0xE8205000
|
|
width 9.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "PFVCR,PFV control register"
|
|
bitfld.long 0x00 16. " PFVE ,PFV Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " DTH_ON ,RGB565 Bit Reduction Setting" "Round-off mode,2 x 2 pattern dither"
|
|
bitfld.long 0x00 10.--11. " IFMT ,Pixel Format Setting for Input Data" "RGB888,RGB565,Setting prohibited,YCbCr422"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " OFMT ,Pixel Format Setting for Output Data" "ARGB8888,RGB565,Setting prohibited,YCbCr422"
|
|
bitfld.long 0x00 5. " DINSWAP16 ,Swap Setting for 16-Bit Input Data" "Not swapped,Swapped"
|
|
bitfld.long 0x00 4. " DOUTSWAP16 ,Swap Setting for 16-Bit Output Data" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " DINSWAP32 ,Swap Setting for Input Data" "Not swapped,Byte swap,Word swap,Word-byte swap"
|
|
bitfld.long 0x00 0.--1. " ODOUTSWAP32 ,Swap Setting for Output Data" "Not swapped,Byte swap,Word swap,Word-byte swap"
|
|
line.long 0x04 "PFVICR,PFV interrupt control regi"
|
|
bitfld.long 0x04 6. " PFVEEN ,PFV Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " IFEN ,Input FIFO Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " OFEN ,Output FIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2.--3. " IDTRG ,Input FIFO Byte Count Trigger" "30 bytes,28 bytes,16 bytes,0 bytes"
|
|
bitfld.long 0x04 0.--1. " ODTRG ,Output FIFO Byte Count Trigger" "2 bytes,4 bytes,16 bytes,32 bytes"
|
|
rgroup.long 0x08++0x3
|
|
line.long 0x00 "PFVISR,PFV interrupt status register"
|
|
bitfld.long 0x00 3. " IFOVF ,Input FIFO Overflow Interrupt Source Flag" "No overflow,Overflow"
|
|
bitfld.long 0x00 2. " OFUDF ,Output FIFO Underflow Interrupt Source Flag" "No underflow,Underflow"
|
|
bitfld.long 0x00 1. " IFEMP ,Input FIFO Empty Interrupt Source Flag" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " OFFUL ,Output FIFO Full Interrupt Source Flag" "Not full,Full"
|
|
if ((per.l(ad:0xE8205000+0x0)&0x8400)==0x400)
|
|
wgroup.word 0x20++0x1
|
|
line.word 0x00 "PFVID,PFV Input Buffer Register"
|
|
button "PFVID" "d ad:(ad:0xE8205000+0x20)--ad:(ad:0xE8205000+0x3c) /word"
|
|
else
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "PFVID,PFV Input Buffer Register"
|
|
button "PFVID" "d ad:(ad:0xE8205000+0x20)--ad:(ad:0xE8205000+0x3c) /long"
|
|
endif
|
|
if ((per.l(ad:0xE8205000+0x0)&0x2100)==0x100)
|
|
hgroup.word 0x40++0x1
|
|
hide.word 0x00 "PFVOD,PFV output buffer register"
|
|
button "PFVOD" "d ad:(ad:0xE8205000+0x40)--ad:(ad:0xE8205000+0x5c) /word"
|
|
else
|
|
hgroup.long 0x40++0x3
|
|
hide.long 0x00 "PFVOD,PFV output buffer register"
|
|
button "PFVOD" "d ad:(ad:0xE8205000+0x40)--ad:(ad:0xE8205000+0x5c) /long"
|
|
endif
|
|
rgroup.long 0x64++0x7
|
|
line.long 0x00 "PFVIFSR,PFV input FIFO status register"
|
|
bitfld.long 0x00 0.--5. " IFVD ,Valid Byte Count in Input FIFO" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,Full,?..."
|
|
line.long 0x04 "PFVOFSR,PFV output FIFO status register"
|
|
bitfld.long 0x04 0.--5. " OFVD ,Valid Byte Count in Output FIFO" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,Full,?..."
|
|
group.long 0x6c++0x7
|
|
line.long 0x0 "PFVACR,PFV ? setting register"
|
|
hexmask.long.byte 0x0 0.--7. 1. " ALPHA ,A value used for output in the ARGB8888 format"
|
|
width 17.
|
|
line.long 0x04 "PFV_MTX_MODE,PFV matrix mode register"
|
|
bitfld.long 0x04 0.--1. " PFV_MTX_MD ,Operating Mode" "GBR->GBR,GBR->YCbCr,YCbCr->GBR,YCbCr->YCbCr"
|
|
group.long 0x74++0x1b
|
|
line.long 0x00 "PFV_MTX_YG_ADJ0,PFV matrix YG adjustment register 0"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PFV_MTX_YG ,Offset (DC) Adjustment for Output YG Data"
|
|
textline " "
|
|
hexmask.long.word 0x0 0.--10. 1. " PFV_MTX_GG ,Input YG Data Gain Adjustment for Output YG Data"
|
|
line.long 0x04 "PFV_MTX_YG_ADJ1,PFV matrix YG adjustment register 1"
|
|
hexmask.long.word 0x04 16.--26. 1. " PFV_MTX_YG ,OInput Cb/B Data Gain Adjustment for Output YG Data"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--10. 1. " PFV_MTX_YG ,Input Cr/R Data Gain Adjustment for Output YG Data"
|
|
line.long 0x08 "PFV_MTX_CBB_ADJ0,PFV matrix CBB adjustment register 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " PFV_MTX_CBB ,Offset (DC) Adjustment for Output CBB Data"
|
|
textline " "
|
|
hexmask.long.word 0x08 0.--10. 1. " PFV_MTX_GG ,Input CBB Data Gain Adjustment for Output CBB Data"
|
|
line.long 0x0C "PFV_MTX_CBB_ADJ1,PFV matrix CBB adjustment register 1"
|
|
hexmask.long.word 0x0C 16.--26. 1. " PFV_MTX_CBB ,OInput Cb/B Data Gain Adjustment for Output CBB Data"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--10. 1. " PFV_MTX_CBB ,Input Cr/R Data Gain Adjustment for Output CBB Data"
|
|
line.long 0x10 "PFV_MTX_CRR_ADJ0,PFV matrix CRR adjustment register 0"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PFV_MTX_CRR ,Offset (DC) Adjustment for Output CRR Data"
|
|
textline " "
|
|
hexmask.long.word 0x10 0.--10. 1. " PFV_MTX_GG ,Input CRR Data Gain Adjustment for Output CRR Data"
|
|
line.long 0x14 "PFV_MTX_CRR_ADJ1,PFV matrix CRR adjustment register 1"
|
|
hexmask.long.word 0x14 16.--26. 1. " PFV_MTX_CRR ,OInput Cb/B Data Gain Adjustment for Output CRR Data"
|
|
textline " "
|
|
hexmask.long.word 0x14 0.--10. 1. " PFV_MTX_CRR ,Input Cr/R Data Gain Adjustment for Output CRR Data"
|
|
group.long 0x8c++0x3
|
|
line.long 0x00 "PFVSZR,PFV Image Size Setting Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " PFVSZX ,Horizontal Size"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " PFVSZY ,Vertical Size"
|
|
width 0xb
|
|
tree.end
|
|
tree "PFV1"
|
|
base ad:0xE8205800
|
|
width 9.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "PFVCR,PFV control register"
|
|
bitfld.long 0x00 16. " PFVE ,PFV Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " DTH_ON ,RGB565 Bit Reduction Setting" "Round-off mode,2 x 2 pattern dither"
|
|
bitfld.long 0x00 10.--11. " IFMT ,Pixel Format Setting for Input Data" "RGB888,RGB565,Setting prohibited,YCbCr422"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " OFMT ,Pixel Format Setting for Output Data" "ARGB8888,RGB565,Setting prohibited,YCbCr422"
|
|
bitfld.long 0x00 5. " DINSWAP16 ,Swap Setting for 16-Bit Input Data" "Not swapped,Swapped"
|
|
bitfld.long 0x00 4. " DOUTSWAP16 ,Swap Setting for 16-Bit Output Data" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " DINSWAP32 ,Swap Setting for Input Data" "Not swapped,Byte swap,Word swap,Word-byte swap"
|
|
bitfld.long 0x00 0.--1. " ODOUTSWAP32 ,Swap Setting for Output Data" "Not swapped,Byte swap,Word swap,Word-byte swap"
|
|
line.long 0x04 "PFVICR,PFV interrupt control regi"
|
|
bitfld.long 0x04 6. " PFVEEN ,PFV Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " IFEN ,Input FIFO Empty Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " OFEN ,Output FIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2.--3. " IDTRG ,Input FIFO Byte Count Trigger" "30 bytes,28 bytes,16 bytes,0 bytes"
|
|
bitfld.long 0x04 0.--1. " ODTRG ,Output FIFO Byte Count Trigger" "2 bytes,4 bytes,16 bytes,32 bytes"
|
|
rgroup.long 0x08++0x3
|
|
line.long 0x00 "PFVISR,PFV interrupt status register"
|
|
bitfld.long 0x00 3. " IFOVF ,Input FIFO Overflow Interrupt Source Flag" "No overflow,Overflow"
|
|
bitfld.long 0x00 2. " OFUDF ,Output FIFO Underflow Interrupt Source Flag" "No underflow,Underflow"
|
|
bitfld.long 0x00 1. " IFEMP ,Input FIFO Empty Interrupt Source Flag" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " OFFUL ,Output FIFO Full Interrupt Source Flag" "Not full,Full"
|
|
if ((per.l(ad:0xE8205800+0x0)&0x8400)==0x400)
|
|
wgroup.word 0x20++0x1
|
|
line.word 0x00 "PFVID,PFV Input Buffer Register"
|
|
button "PFVID" "d ad:(ad:0xE8205800+0x20)--ad:(ad:0xE8205800+0x3c) /word"
|
|
else
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "PFVID,PFV Input Buffer Register"
|
|
button "PFVID" "d ad:(ad:0xE8205800+0x20)--ad:(ad:0xE8205800+0x3c) /long"
|
|
endif
|
|
if ((per.l(ad:0xE8205800+0x0)&0x2100)==0x100)
|
|
hgroup.word 0x40++0x1
|
|
hide.word 0x00 "PFVOD,PFV output buffer register"
|
|
button "PFVOD" "d ad:(ad:0xE8205800+0x40)--ad:(ad:0xE8205800+0x5c) /word"
|
|
else
|
|
hgroup.long 0x40++0x3
|
|
hide.long 0x00 "PFVOD,PFV output buffer register"
|
|
button "PFVOD" "d ad:(ad:0xE8205800+0x40)--ad:(ad:0xE8205800+0x5c) /long"
|
|
endif
|
|
rgroup.long 0x64++0x7
|
|
line.long 0x00 "PFVIFSR,PFV input FIFO status register"
|
|
bitfld.long 0x00 0.--5. " IFVD ,Valid Byte Count in Input FIFO" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,Full,?..."
|
|
line.long 0x04 "PFVOFSR,PFV output FIFO status register"
|
|
bitfld.long 0x04 0.--5. " OFVD ,Valid Byte Count in Output FIFO" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,Full,?..."
|
|
group.long 0x6c++0x7
|
|
line.long 0x0 "PFVACR,PFV ? setting register"
|
|
hexmask.long.byte 0x0 0.--7. 1. " ALPHA ,A value used for output in the ARGB8888 format"
|
|
width 17.
|
|
line.long 0x04 "PFV_MTX_MODE,PFV matrix mode register"
|
|
bitfld.long 0x04 0.--1. " PFV_MTX_MD ,Operating Mode" "GBR->GBR,GBR->YCbCr,YCbCr->GBR,YCbCr->YCbCr"
|
|
group.long 0x74++0x1b
|
|
line.long 0x00 "PFV_MTX_YG_ADJ0,PFV matrix YG adjustment register 0"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PFV_MTX_YG ,Offset (DC) Adjustment for Output YG Data"
|
|
textline " "
|
|
hexmask.long.word 0x0 0.--10. 1. " PFV_MTX_GG ,Input YG Data Gain Adjustment for Output YG Data"
|
|
line.long 0x04 "PFV_MTX_YG_ADJ1,PFV matrix YG adjustment register 1"
|
|
hexmask.long.word 0x04 16.--26. 1. " PFV_MTX_YG ,OInput Cb/B Data Gain Adjustment for Output YG Data"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--10. 1. " PFV_MTX_YG ,Input Cr/R Data Gain Adjustment for Output YG Data"
|
|
line.long 0x08 "PFV_MTX_CBB_ADJ0,PFV matrix CBB adjustment register 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " PFV_MTX_CBB ,Offset (DC) Adjustment for Output CBB Data"
|
|
textline " "
|
|
hexmask.long.word 0x08 0.--10. 1. " PFV_MTX_GG ,Input CBB Data Gain Adjustment for Output CBB Data"
|
|
line.long 0x0C "PFV_MTX_CBB_ADJ1,PFV matrix CBB adjustment register 1"
|
|
hexmask.long.word 0x0C 16.--26. 1. " PFV_MTX_CBB ,OInput Cb/B Data Gain Adjustment for Output CBB Data"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--10. 1. " PFV_MTX_CBB ,Input Cr/R Data Gain Adjustment for Output CBB Data"
|
|
line.long 0x10 "PFV_MTX_CRR_ADJ0,PFV matrix CRR adjustment register 0"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PFV_MTX_CRR ,Offset (DC) Adjustment for Output CRR Data"
|
|
textline " "
|
|
hexmask.long.word 0x10 0.--10. 1. " PFV_MTX_GG ,Input CRR Data Gain Adjustment for Output CRR Data"
|
|
line.long 0x14 "PFV_MTX_CRR_ADJ1,PFV matrix CRR adjustment register 1"
|
|
hexmask.long.word 0x14 16.--26. 1. " PFV_MTX_CRR ,OInput Cb/B Data Gain Adjustment for Output CRR Data"
|
|
textline " "
|
|
hexmask.long.word 0x14 0.--10. 1. " PFV_MTX_CRR ,Input Cr/R Data Gain Adjustment for Output CRR Data"
|
|
group.long 0x8c++0x3
|
|
line.long 0x00 "PFVSZR,PFV Image Size Setting Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " PFVSZX ,Horizontal Size"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " PFVSZY ,Vertical Size"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "SCUX"
|
|
base ad:0xE8208000
|
|
width 18.
|
|
group.long 0x0++0x7 "IPC"
|
|
line.long 0x00 "IPCIR_IPC0_0,IPC0_&2 initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
line.long 0x04 "IPSLR_IPC0_0,IPC0_&2 pass select register"
|
|
bitfld.long 0x04 0.--2. " IPC_PASS_SEL ,Controls the pass selection of this module (Tming signal//Audio data)" "No operation,EXTERNAL(SSIF)>IPC>SRC,,EXTERNAL>IPC>FFD/SRC//FFD>IPC>SRC,FFD>IPC>SRC,No operation,No operation,No operation"
|
|
group.long (0x0+0x400)++0x7 "OPC"
|
|
line.long 0x00 "OPCIR_OPC0_0,OPC0_&2 initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
line.long 0x04 "OPSLR_OPC0_0,OPC0_&2 pass select register"
|
|
bitfld.long 0x04 0.--2. " OPC_PASS_SEL ,Controls the pass selection of this module (Tming signal//Audio data)" "No operation,EXTERNAL>OPC>SRC/DVU,,EXTERNAL>OPC>FFU/SRC//SRC>OPC>FFU,FFU>OPC>SRC//SRC>OPC>FFU,No operation,No operation,No operation"
|
|
group.long (0x0+0x800)++0x3 "FDO"
|
|
line.long 0x00 "FFDIR_FDO0_0,FFD0_0 FIFO download initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
sif (cpu()=="R7S721021")
|
|
if (("0"=="2")||("0"=="3"))
|
|
group.long (0x0+0x804)++0x03
|
|
line.long 0x00 "FDAIR_FFD0_0,FFD0_0 FIFO download audio information register"
|
|
bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,,,,,,,,,,,,,,"
|
|
else
|
|
group.long (0x0+0x804)++0x03
|
|
line.long 0x00 "FDAIR_FFD0_0,FFD0_0 FIFO download audio information register"
|
|
bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
endif
|
|
else
|
|
group.long (0x0+0x804)++0x03
|
|
line.long 0x00 "FDAIR_FFD0_0,FFD0_0 FIFO download audio information register"
|
|
bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
endif
|
|
group.long (0x0+0x808)++0x0F
|
|
line.long 0x00 "DRQSR_FFD0_0,FFD0_0 FIFO download request size register"
|
|
bitfld.long 0x00 0.--3. " SIZE ,Request size data" "256 data,128 data,64 data,32 data,16 data,8 data,4 data,2 data,1 data,,,,,,,"
|
|
line.long 0x04 "FFDPR_FFD0_0,FFD0_0 FIFO download pass register"
|
|
bitfld.long 0x04 0.--1. " PASS ,Data Pass Select" "No pass selected,CIM > FFD > IPC,CIM > FFD > IPC,"
|
|
line.long 0x08 "FFDBR_FFD0_0,FFD0_0 FIFO download boot register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x08 0. " BOOT ,Data Request Start/Stop" "Stopped,Started"
|
|
else
|
|
bitfld.long 0x08 0. " BOOT ,Boot the Data Request" "Halt the data request,Boot the data request"
|
|
endif
|
|
line.long 0x0C "DEVMR_FFD0_0,FFD0_0 FIFO download event mask register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x0C 31. " DEVMUF ,FFD Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 30. " DEVMOF ,FFD Overflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 29. " DEVMOL ,Overlap Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " DEVMIUF ,FFD Initialization Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 15. " DEVMRQ ,FFD Request Packet Mask" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x0C 31. " DEVMUF ,FFD Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 30. " DEVMOF ,FFD Overflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 29. " DEVMOL ,Overlap Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " DEVMUF ,FFD Initialization Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 15. " DEVMRQ ,FFD Request Packet Mask" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x0+0x81c)++0x03
|
|
line.long 0x0 "DEVCR_FFD0_0,FFD0_0 FIFO download event clear register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x0 31. " DEVCUF ,FFD Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 30. " DEVCOF ,FFD Overflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 29. " DEVCOL ,Overlap Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x0 28. " DEVCIUF ,FFD Initialization Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 15. " DEVCRQ ,FFD Request Packet Clear" "Cleared,Waiting"
|
|
else
|
|
bitfld.long 0x0 31. " DEVCUF ,FFD Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 30. " DEVCOF ,FFD Overflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 29. " DEVCOL ,Overlap Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x0 28. " DEVCUF ,FFD Initialization Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 15. " DEVCRQ ,FFD Request Packet Clear" "Cleared,Waiting"
|
|
endif
|
|
group.long (0x0+0xC00)++0x3
|
|
line.long 0x00 "FFUIR_FFU0_0,FFU0_0 FIFO upload initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
sif (cpu()=="R7S721021")
|
|
if (("0"=="2")||("0"=="3"))
|
|
group.long (0x0+0xC04)++0x03 "FFU"
|
|
line.long 0x0 "FUAIR_FFU0_0,FFU0_0 FIFO upload audio information register"
|
|
bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,,,,,,,,,,,,,,"
|
|
else
|
|
group.long (0x0+0xC04)++0x03 "FFU"
|
|
line.long 0x0 "FUAIR_FFU0_0,FFU0_0 FIFO upload audio information register"
|
|
bitfld.long 0x0 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
endif
|
|
else
|
|
group.long (0x0+0xC04)++0x03 "FFU"
|
|
line.long 0x0 "FUAIR_FFU0_0,FFU0_0 FIFO upload audio information register"
|
|
bitfld.long 0x0 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
endif
|
|
group.long (0x0+0xC08)++0x0B
|
|
line.long 0x00 "URQSR_FFU0_0,FFU0_0 FIFO upload request size register"
|
|
bitfld.long 0x00 0.--3. " SIZE ,Request size data" "256 data,128 data,64 data,32 data,16 data,8 data, 4 data,2 data,1 data,,,,,,,"
|
|
line.long 0x04 "FFUPR_FFU0_0,FFU0_0 FIFO upload pass register"
|
|
bitfld.long 0x04 0.--1. " PASS ,Data Pass Select" "No pass selected,CIM > FFD > IPC,CIM > FFD > IPC,"
|
|
line.long 0x08 "UEVMR_FFU0_0,FFU0_0 FIFO upload event mask register"
|
|
bitfld.long 0x08 31. " UEVMUF ,FFU Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " UEVMOF ,FFU Overflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " UEVMOL ,FFU Overlap Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 15. " UEVMRQ ,FFU Request Packet Mask" "Disabled,Enabled"
|
|
group.long (0x0+0xC18)++0x3
|
|
line.long 0x0 "UEVCR_FFU0_0,FFU0_0 FIFO upload event clear register"
|
|
bitfld.long 0x0 31. " UEVCUF ,FFU Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 30. " UEVCOF ,FFU Overflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 29. " UEVCOL ,FFU Overlap Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x0 15. " UEVCRQ ,FFU Request Packet Clear" "Cleared,Waiting"
|
|
group.long 0x100++0x7 "IPC"
|
|
line.long 0x00 "IPCIR_IPC0_1,IPC0_&2 initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
line.long 0x04 "IPSLR_IPC0_1,IPC0_&2 pass select register"
|
|
bitfld.long 0x04 0.--2. " IPC_PASS_SEL ,Controls the pass selection of this module (Tming signal//Audio data)" "No operation,EXTERNAL(SSIF)>IPC>SRC,,EXTERNAL>IPC>FFD/SRC//FFD>IPC>SRC,FFD>IPC>SRC,No operation,No operation,No operation"
|
|
group.long (0x100+0x400)++0x7 "OPC"
|
|
line.long 0x00 "OPCIR_OPC0_1,OPC0_&2 initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
line.long 0x04 "OPSLR_OPC0_1,OPC0_&2 pass select register"
|
|
bitfld.long 0x04 0.--2. " OPC_PASS_SEL ,Controls the pass selection of this module (Tming signal//Audio data)" "No operation,EXTERNAL>OPC>SRC/DVU,,EXTERNAL>OPC>FFU/SRC//SRC>OPC>FFU,FFU>OPC>SRC//SRC>OPC>FFU,No operation,No operation,No operation"
|
|
group.long (0x100+0x800)++0x3 "FDO"
|
|
line.long 0x00 "FFDIR_FDO0_1,FFD0_1 FIFO download initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
sif (cpu()=="R7S721021")
|
|
if (("1"=="2")||("1"=="3"))
|
|
group.long (0x100+0x804)++0x03
|
|
line.long 0x00 "FDAIR_FFD0_1,FFD0_1 FIFO download audio information register"
|
|
bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,,,,,,,,,,,,,,"
|
|
else
|
|
group.long (0x100+0x804)++0x03
|
|
line.long 0x00 "FDAIR_FFD0_1,FFD0_1 FIFO download audio information register"
|
|
bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
endif
|
|
else
|
|
group.long (0x100+0x804)++0x03
|
|
line.long 0x00 "FDAIR_FFD0_1,FFD0_1 FIFO download audio information register"
|
|
bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
endif
|
|
group.long (0x100+0x808)++0x0F
|
|
line.long 0x00 "DRQSR_FFD0_1,FFD0_1 FIFO download request size register"
|
|
bitfld.long 0x00 0.--3. " SIZE ,Request size data" "256 data,128 data,64 data,32 data,16 data,8 data,4 data,2 data,1 data,,,,,,,"
|
|
line.long 0x04 "FFDPR_FFD0_1,FFD0_1 FIFO download pass register"
|
|
bitfld.long 0x04 0.--1. " PASS ,Data Pass Select" "No pass selected,CIM > FFD > IPC,CIM > FFD > IPC,"
|
|
line.long 0x08 "FFDBR_FFD0_1,FFD0_1 FIFO download boot register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x08 0. " BOOT ,Data Request Start/Stop" "Stopped,Started"
|
|
else
|
|
bitfld.long 0x08 0. " BOOT ,Boot the Data Request" "Halt the data request,Boot the data request"
|
|
endif
|
|
line.long 0x0C "DEVMR_FFD0_1,FFD0_1 FIFO download event mask register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x0C 31. " DEVMUF ,FFD Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 30. " DEVMOF ,FFD Overflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 29. " DEVMOL ,Overlap Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " DEVMIUF ,FFD Initialization Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 15. " DEVMRQ ,FFD Request Packet Mask" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x0C 31. " DEVMUF ,FFD Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 30. " DEVMOF ,FFD Overflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 29. " DEVMOL ,Overlap Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " DEVMUF ,FFD Initialization Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 15. " DEVMRQ ,FFD Request Packet Mask" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x100+0x81c)++0x03
|
|
line.long 0x0 "DEVCR_FFD0_1,FFD0_1 FIFO download event clear register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x0 31. " DEVCUF ,FFD Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 30. " DEVCOF ,FFD Overflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 29. " DEVCOL ,Overlap Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x0 28. " DEVCIUF ,FFD Initialization Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 15. " DEVCRQ ,FFD Request Packet Clear" "Cleared,Waiting"
|
|
else
|
|
bitfld.long 0x0 31. " DEVCUF ,FFD Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 30. " DEVCOF ,FFD Overflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 29. " DEVCOL ,Overlap Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x0 28. " DEVCUF ,FFD Initialization Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 15. " DEVCRQ ,FFD Request Packet Clear" "Cleared,Waiting"
|
|
endif
|
|
group.long (0x100+0xC00)++0x3
|
|
line.long 0x00 "FFUIR_FFU0_1,FFU0_1 FIFO upload initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
sif (cpu()=="R7S721021")
|
|
if (("1"=="2")||("1"=="3"))
|
|
group.long (0x100+0xC04)++0x03 "FFU"
|
|
line.long 0x0 "FUAIR_FFU0_1,FFU0_1 FIFO upload audio information register"
|
|
bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,,,,,,,,,,,,,,"
|
|
else
|
|
group.long (0x100+0xC04)++0x03 "FFU"
|
|
line.long 0x0 "FUAIR_FFU0_1,FFU0_1 FIFO upload audio information register"
|
|
bitfld.long 0x0 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
endif
|
|
else
|
|
group.long (0x100+0xC04)++0x03 "FFU"
|
|
line.long 0x0 "FUAIR_FFU0_1,FFU0_1 FIFO upload audio information register"
|
|
bitfld.long 0x0 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
endif
|
|
group.long (0x100+0xC08)++0x0B
|
|
line.long 0x00 "URQSR_FFU0_1,FFU0_1 FIFO upload request size register"
|
|
bitfld.long 0x00 0.--3. " SIZE ,Request size data" "256 data,128 data,64 data,32 data,16 data,8 data, 4 data,2 data,1 data,,,,,,,"
|
|
line.long 0x04 "FFUPR_FFU0_1,FFU0_1 FIFO upload pass register"
|
|
bitfld.long 0x04 0.--1. " PASS ,Data Pass Select" "No pass selected,CIM > FFD > IPC,CIM > FFD > IPC,"
|
|
line.long 0x08 "UEVMR_FFU0_1,FFU0_1 FIFO upload event mask register"
|
|
bitfld.long 0x08 31. " UEVMUF ,FFU Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " UEVMOF ,FFU Overflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " UEVMOL ,FFU Overlap Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 15. " UEVMRQ ,FFU Request Packet Mask" "Disabled,Enabled"
|
|
group.long (0x100+0xC18)++0x3
|
|
line.long 0x0 "UEVCR_FFU0_1,FFU0_1 FIFO upload event clear register"
|
|
bitfld.long 0x0 31. " UEVCUF ,FFU Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 30. " UEVCOF ,FFU Overflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 29. " UEVCOL ,FFU Overlap Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x0 15. " UEVCRQ ,FFU Request Packet Clear" "Cleared,Waiting"
|
|
group.long 0x200++0x7 "IPC"
|
|
line.long 0x00 "IPCIR_IPC0_2,IPC0_&2 initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
line.long 0x04 "IPSLR_IPC0_2,IPC0_&2 pass select register"
|
|
bitfld.long 0x04 0.--2. " IPC_PASS_SEL ,Controls the pass selection of this module (Tming signal//Audio data)" "No operation,EXTERNAL(SSIF)>IPC>SRC,,EXTERNAL>IPC>FFD/SRC//FFD>IPC>SRC,FFD>IPC>SRC,No operation,No operation,No operation"
|
|
group.long (0x200+0x400)++0x7 "OPC"
|
|
line.long 0x00 "OPCIR_OPC0_2,OPC0_&2 initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
line.long 0x04 "OPSLR_OPC0_2,OPC0_&2 pass select register"
|
|
bitfld.long 0x04 0.--2. " OPC_PASS_SEL ,Controls the pass selection of this module (Tming signal//Audio data)" "No operation,EXTERNAL>OPC>SRC/DVU,,EXTERNAL>OPC>FFU/SRC//SRC>OPC>FFU,FFU>OPC>SRC//SRC>OPC>FFU,No operation,No operation,No operation"
|
|
group.long (0x200+0x800)++0x3 "FDO"
|
|
line.long 0x00 "FFDIR_FDO0_2,FFD0_2 FIFO download initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
sif (cpu()=="R7S721021")
|
|
if (("2"=="2")||("2"=="3"))
|
|
group.long (0x200+0x804)++0x03
|
|
line.long 0x00 "FDAIR_FFD0_2,FFD0_2 FIFO download audio information register"
|
|
bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,,,,,,,,,,,,,,"
|
|
else
|
|
group.long (0x200+0x804)++0x03
|
|
line.long 0x00 "FDAIR_FFD0_2,FFD0_2 FIFO download audio information register"
|
|
bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
endif
|
|
else
|
|
group.long (0x200+0x804)++0x03
|
|
line.long 0x00 "FDAIR_FFD0_2,FFD0_2 FIFO download audio information register"
|
|
bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
endif
|
|
group.long (0x200+0x808)++0x0F
|
|
line.long 0x00 "DRQSR_FFD0_2,FFD0_2 FIFO download request size register"
|
|
bitfld.long 0x00 0.--3. " SIZE ,Request size data" "64 data,32 data,16 data,8 data,4 data,2 data,1 data,,,,,,,,,"
|
|
line.long 0x04 "FFDPR_FFD0_2,FFD0_2 FIFO download pass register"
|
|
bitfld.long 0x04 0.--1. " PASS ,Data Pass Select" "No pass selected,CIM > FFD > IPC,CIM > FFD > IPC,"
|
|
line.long 0x08 "FFDBR_FFD0_2,FFD0_2 FIFO download boot register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x08 0. " BOOT ,Data Request Start/Stop" "Stopped,Started"
|
|
else
|
|
bitfld.long 0x08 0. " BOOT ,Boot the Data Request" "Halt the data request,Boot the data request"
|
|
endif
|
|
line.long 0x0C "DEVMR_FFD0_2,FFD0_2 FIFO download event mask register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x0C 31. " DEVMUF ,FFD Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 30. " DEVMOF ,FFD Overflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 29. " DEVMOL ,Overlap Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " DEVMIUF ,FFD Initialization Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 15. " DEVMRQ ,FFD Request Packet Mask" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x0C 31. " DEVMUF ,FFD Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 30. " DEVMOF ,FFD Overflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 29. " DEVMOL ,Overlap Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " DEVMUF ,FFD Initialization Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 15. " DEVMRQ ,FFD Request Packet Mask" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x200+0x81c)++0x03
|
|
line.long 0x0 "DEVCR_FFD0_2,FFD0_2 FIFO download event clear register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x0 31. " DEVCUF ,FFD Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 30. " DEVCOF ,FFD Overflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 29. " DEVCOL ,Overlap Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x0 28. " DEVCIUF ,FFD Initialization Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 15. " DEVCRQ ,FFD Request Packet Clear" "Cleared,Waiting"
|
|
else
|
|
bitfld.long 0x0 31. " DEVCUF ,FFD Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 30. " DEVCOF ,FFD Overflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 29. " DEVCOL ,Overlap Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x0 28. " DEVCUF ,FFD Initialization Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 15. " DEVCRQ ,FFD Request Packet Clear" "Cleared,Waiting"
|
|
endif
|
|
group.long (0x200+0xC00)++0x3
|
|
line.long 0x00 "FFUIR_FFU0_2,FFU0_2 FIFO upload initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
sif (cpu()=="R7S721021")
|
|
if (("2"=="2")||("2"=="3"))
|
|
group.long (0x200+0xC04)++0x03 "FFU"
|
|
line.long 0x0 "FUAIR_FFU0_2,FFU0_2 FIFO upload audio information register"
|
|
bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,,,,,,,,,,,,,,"
|
|
else
|
|
group.long (0x200+0xC04)++0x03 "FFU"
|
|
line.long 0x0 "FUAIR_FFU0_2,FFU0_2 FIFO upload audio information register"
|
|
bitfld.long 0x0 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
endif
|
|
else
|
|
group.long (0x200+0xC04)++0x03 "FFU"
|
|
line.long 0x0 "FUAIR_FFU0_2,FFU0_2 FIFO upload audio information register"
|
|
bitfld.long 0x0 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
endif
|
|
group.long (0x200+0xC08)++0x0B
|
|
line.long 0x00 "URQSR_FFU0_2,FFU0_2 FIFO upload request size register"
|
|
bitfld.long 0x00 0.--3. " SIZE ,Request size data" "64 data,32 data,16 data,8 data,4 data,2 data,1 data,,,,,,,,,"
|
|
line.long 0x04 "FFUPR_FFU0_2,FFU0_2 FIFO upload pass register"
|
|
bitfld.long 0x04 0.--1. " PASS ,Data Pass Select" "No pass selected,CIM > FFD > IPC,CIM > FFD > IPC,"
|
|
line.long 0x08 "UEVMR_FFU0_2,FFU0_2 FIFO upload event mask register"
|
|
bitfld.long 0x08 31. " UEVMUF ,FFU Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " UEVMOF ,FFU Overflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " UEVMOL ,FFU Overlap Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 15. " UEVMRQ ,FFU Request Packet Mask" "Disabled,Enabled"
|
|
group.long (0x200+0xC18)++0x3
|
|
line.long 0x0 "UEVCR_FFU0_2,FFU0_2 FIFO upload event clear register"
|
|
bitfld.long 0x0 31. " UEVCUF ,FFU Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 30. " UEVCOF ,FFU Overflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 29. " UEVCOL ,FFU Overlap Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x0 15. " UEVCRQ ,FFU Request Packet Clear" "Cleared,Waiting"
|
|
group.long 0x300++0x7 "IPC"
|
|
line.long 0x00 "IPCIR_IPC0_3,IPC0_&2 initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
line.long 0x04 "IPSLR_IPC0_3,IPC0_&2 pass select register"
|
|
bitfld.long 0x04 0.--2. " IPC_PASS_SEL ,Controls the pass selection of this module (Tming signal//Audio data)" "No operation,EXTERNAL(SSIF)>IPC>SRC,,EXTERNAL>IPC>FFD/SRC//FFD>IPC>SRC,FFD>IPC>SRC,No operation,No operation,No operation"
|
|
group.long (0x300+0x400)++0x7 "OPC"
|
|
line.long 0x00 "OPCIR_OPC0_3,OPC0_&2 initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
line.long 0x04 "OPSLR_OPC0_3,OPC0_&2 pass select register"
|
|
bitfld.long 0x04 0.--2. " OPC_PASS_SEL ,Controls the pass selection of this module (Tming signal//Audio data)" "No operation,EXTERNAL>OPC>SRC/DVU,,EXTERNAL>OPC>FFU/SRC//SRC>OPC>FFU,FFU>OPC>SRC//SRC>OPC>FFU,No operation,No operation,No operation"
|
|
group.long (0x300+0x800)++0x3 "FDO"
|
|
line.long 0x00 "FFDIR_FDO0_3,FFD0_3 FIFO download initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
sif (cpu()=="R7S721021")
|
|
if (("3"=="2")||("3"=="3"))
|
|
group.long (0x300+0x804)++0x03
|
|
line.long 0x00 "FDAIR_FFD0_3,FFD0_3 FIFO download audio information register"
|
|
bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,,,,,,,,,,,,,,"
|
|
else
|
|
group.long (0x300+0x804)++0x03
|
|
line.long 0x00 "FDAIR_FFD0_3,FFD0_3 FIFO download audio information register"
|
|
bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
endif
|
|
else
|
|
group.long (0x300+0x804)++0x03
|
|
line.long 0x00 "FDAIR_FFD0_3,FFD0_3 FIFO download audio information register"
|
|
bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
endif
|
|
group.long (0x300+0x808)++0x0F
|
|
line.long 0x00 "DRQSR_FFD0_3,FFD0_3 FIFO download request size register"
|
|
bitfld.long 0x00 0.--3. " SIZE ,Request size data" "64 data,32 data,16 data,8 data,4 data,2 data,1 data,,,,,,,,,"
|
|
line.long 0x04 "FFDPR_FFD0_3,FFD0_3 FIFO download pass register"
|
|
bitfld.long 0x04 0.--1. " PASS ,Data Pass Select" "No pass selected,CIM > FFD > IPC,CIM > FFD > IPC,"
|
|
line.long 0x08 "FFDBR_FFD0_3,FFD0_3 FIFO download boot register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x08 0. " BOOT ,Data Request Start/Stop" "Stopped,Started"
|
|
else
|
|
bitfld.long 0x08 0. " BOOT ,Boot the Data Request" "Halt the data request,Boot the data request"
|
|
endif
|
|
line.long 0x0C "DEVMR_FFD0_3,FFD0_3 FIFO download event mask register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x0C 31. " DEVMUF ,FFD Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 30. " DEVMOF ,FFD Overflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 29. " DEVMOL ,Overlap Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " DEVMIUF ,FFD Initialization Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 15. " DEVMRQ ,FFD Request Packet Mask" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x0C 31. " DEVMUF ,FFD Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 30. " DEVMOF ,FFD Overflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 29. " DEVMOL ,Overlap Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " DEVMUF ,FFD Initialization Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x0C 15. " DEVMRQ ,FFD Request Packet Mask" "Disabled,Enabled"
|
|
endif
|
|
group.long (0x300+0x81c)++0x03
|
|
line.long 0x0 "DEVCR_FFD0_3,FFD0_3 FIFO download event clear register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x0 31. " DEVCUF ,FFD Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 30. " DEVCOF ,FFD Overflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 29. " DEVCOL ,Overlap Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x0 28. " DEVCIUF ,FFD Initialization Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 15. " DEVCRQ ,FFD Request Packet Clear" "Cleared,Waiting"
|
|
else
|
|
bitfld.long 0x0 31. " DEVCUF ,FFD Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 30. " DEVCOF ,FFD Overflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 29. " DEVCOL ,Overlap Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x0 28. " DEVCUF ,FFD Initialization Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 15. " DEVCRQ ,FFD Request Packet Clear" "Cleared,Waiting"
|
|
endif
|
|
group.long (0x300+0xC00)++0x3
|
|
line.long 0x00 "FFUIR_FFU0_3,FFU0_3 FIFO upload initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
sif (cpu()=="R7S721021")
|
|
if (("3"=="2")||("3"=="3"))
|
|
group.long (0x300+0xC04)++0x03 "FFU"
|
|
line.long 0x0 "FUAIR_FFU0_3,FFU0_3 FIFO upload audio information register"
|
|
bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,,,,,,,,,,,,,,"
|
|
else
|
|
group.long (0x300+0xC04)++0x03 "FFU"
|
|
line.long 0x0 "FUAIR_FFU0_3,FFU0_3 FIFO upload audio information register"
|
|
bitfld.long 0x0 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
endif
|
|
else
|
|
group.long (0x300+0xC04)++0x03 "FFU"
|
|
line.long 0x0 "FUAIR_FFU0_3,FFU0_3 FIFO upload audio information register"
|
|
bitfld.long 0x0 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
endif
|
|
group.long (0x300+0xC08)++0x0B
|
|
line.long 0x00 "URQSR_FFU0_3,FFU0_3 FIFO upload request size register"
|
|
bitfld.long 0x00 0.--3. " SIZE ,Request size data" "64 data,32 data,16 data,8 data,4 data,2 data,1 data,,,,,,,,,"
|
|
line.long 0x04 "FFUPR_FFU0_3,FFU0_3 FIFO upload pass register"
|
|
bitfld.long 0x04 0.--1. " PASS ,Data Pass Select" "No pass selected,CIM > FFD > IPC,CIM > FFD > IPC,"
|
|
line.long 0x08 "UEVMR_FFU0_3,FFU0_3 FIFO upload event mask register"
|
|
bitfld.long 0x08 31. " UEVMUF ,FFU Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " UEVMOF ,FFU Overflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " UEVMOL ,FFU Overlap Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 15. " UEVMRQ ,FFU Request Packet Mask" "Disabled,Enabled"
|
|
group.long (0x300+0xC18)++0x3
|
|
line.long 0x0 "UEVCR_FFU0_3,FFU0_3 FIFO upload event clear register"
|
|
bitfld.long 0x0 31. " UEVCUF ,FFU Underflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 30. " UEVCOF ,FFU Overflow Clear" "Cleared,Waiting"
|
|
bitfld.long 0x0 29. " UEVCOL ,FFU Overlap Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x0 15. " UEVCRQ ,FFU Request Packet Clear" "Cleared,Waiting"
|
|
tree "SRC Registers"
|
|
group.long 0x1000++0x1F "Register 0"
|
|
line.long 0x00 "SRCIR0_2SRC0_0,2SRC0_0 initialization register 0"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
line.long 0x04 "SADIR0_2SRC0_0,2SRC0_0 audio information register 0"
|
|
bitfld.long 0x04 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bit,,,,,,,,16 bit,..."
|
|
bitfld.long 0x04 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
line.long 0x08 "SRCBR0_2SRC0_0,2SRC0_0 bypass register 0"
|
|
bitfld.long 0x08 0. " BYPASS ,Bypass Mode" "SRC function used,SRC function not used"
|
|
line.long 0x0c "IFSCR0_2SRC0_0,2SRC0_0 IFS control register 0"
|
|
bitfld.long 0x0c 0. " INTIFSEN ,INTIFS value setting enable" "Disabled,Enabled"
|
|
line.long 0x10 "IFSVR0_2SRC0_0,2SRC0_0 IFS value setting register 0"
|
|
hexmask.long 0x10 0.--27. 1. " INTIFS ,Initial value of FSI"
|
|
line.long 0x14 "SRCCR0_2SRC0_0,2SRC0_0 control register 0"
|
|
bitfld.long 0x14 20. " WATMD ,Wait Time Control of SRC" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x14 12. " BUFMD ,Low Delay Mode" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x14 12. " BUFMD ,Low Delay Control by Buffer Size of SRC" "Disabled,Enabled"
|
|
endif
|
|
bitfld.long 0x14 0. " SRCMD ,Select SRC Mode of SRC" "Asynchronous SRC,Synchronous SRC"
|
|
line.long 0x18 "MNFSR0_2SRC0_0,2SRC0_0 minimum FS setting register 0"
|
|
hexmask.long 0x18 0.--27. 1. " MINFS ,These bits set the minimum FS ratio"
|
|
line.long 0x1c "BFSSR0_2SRC0_0,2SRC0_0 buffer size setting register 0"
|
|
hexmask.long.word 0x1c 16.--25. 1. " BUFDATA ,Buffer size of 1 channel in DATA RAM"
|
|
bitfld.long 0x1c 0.--3. " BUFIN ,Set the buffer size of 1 channel in INDATA RAM" "0,1,2,3,4,Low delay,6,7,8,9,10,11,12,13,14,15"
|
|
sif (cpu()=="R7S721021")
|
|
rgroup.long (0x1000+0x20)++0x03
|
|
line.long 0x00 "SC2SR0_2SRC0_0,2SRC0_0 SCU2 status register 0"
|
|
bitfld.long 0x00 31. " SRCWSTS ,Status of Wait Time Operation of SRC" "Waited,Reached"
|
|
bitfld.long 0x00 30. " SC2MUTE ,SRC Mute Status" "Not fixed,Fixed"
|
|
bitfld.long 0x00 28.--29. " SC2STS ,Status of SRC" "Reseated,Initialized,Operated,"
|
|
textline " "
|
|
hexmask.long 0x00 0.--27. 1. " SC2FSI ,Latest value of FSI which is calculated by SRC"
|
|
else
|
|
group.long (0x1000+0x20)++0x03
|
|
line.long 0x00 "SC2SR0_2SRC0_0,2SRC0_0 SCU2 status register 0"
|
|
bitfld.long 0x00 31. " SRCWSTS ,Status of Wait Time Operation of SRC" "Wait,Reached"
|
|
bitfld.long 0x00 30. " SC2MUTE ,Mute status of sampling rate conversion function of SRC" "Not stable,Stable"
|
|
bitfld.long 0x00 28.--29. " SC2STS ,Status of SRC" "Resetting,Initialized,Operating,"
|
|
endif
|
|
group.long (0x1000+0x24)++0x07
|
|
line.long 0x00 "WATSR0_2SRC0_0,2SRC0_0 wait time setting register 0"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " WTIME ,These bits set the wait time when WATMD bit of SRCCRp_2SRC0_m register is 1"
|
|
line.long 0x04 "SEVMR0_2SRC0_0,2SRC0_0 event mask register 0"
|
|
bitfld.long 0x04 31. " EVMUF ,Sampling Rate Converter Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " EVMOF ,Sampling Rate Converter Overflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " EVMWAIT ,Sampling Rate Converter Wait Time Mask" "Disabled,Enabled"
|
|
group.long (0x1000+0x30)++0x3
|
|
line.long 0x0 "SEVCR0_2SRC0_0,2SRC0_0 event clear register 0"
|
|
bitfld.long 0x0 31. " EVCUF ,Sampling Rate Converter Underflow Clear" "Cleared,Wait"
|
|
bitfld.long 0x0 30. " EVCOF ,Sampling Rate Converter Overflow Clear" "Cleared,Wait"
|
|
bitfld.long 0x0 14. " EVCWAIT ,Sampling Rate Converter Wait Time Clear" "Cleared,Wait"
|
|
group.long 0x1034++0x1F "Register 1"
|
|
line.long 0x00 "SRCIR1_2SRC0_0,2SRC0_0 initialization register 1"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
line.long 0x04 "SADIR1_2SRC0_0,2SRC0_0 audio information register 1"
|
|
bitfld.long 0x04 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bit,,,,,,,,16 bit,..."
|
|
bitfld.long 0x04 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
line.long 0x08 "SRCBR1_2SRC0_0,2SRC0_0 bypass register 1"
|
|
bitfld.long 0x08 0. " BYPASS ,Bypass Mode" "SRC function used,SRC function not used"
|
|
line.long 0x0c "IFSCR1_2SRC0_0,2SRC0_0 IFS control register 1"
|
|
bitfld.long 0x0c 0. " INTIFSEN ,INTIFS value setting enable" "Disabled,Enabled"
|
|
line.long 0x10 "IFSVR1_2SRC0_0,2SRC0_0 IFS value setting register 1"
|
|
hexmask.long 0x10 0.--27. 1. " INTIFS ,Initial value of FSI"
|
|
line.long 0x14 "SRCCR1_2SRC0_0,2SRC0_0 control register 1"
|
|
bitfld.long 0x14 20. " WATMD ,Wait Time Control of SRC" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x14 12. " BUFMD ,Low Delay Mode" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x14 12. " BUFMD ,Low Delay Control by Buffer Size of SRC" "Disabled,Enabled"
|
|
endif
|
|
bitfld.long 0x14 0. " SRCMD ,Select SRC Mode of SRC" "Asynchronous SRC,Synchronous SRC"
|
|
line.long 0x18 "MNFSR1_2SRC0_0,2SRC0_0 minimum FS setting register 1"
|
|
hexmask.long 0x18 0.--27. 1. " MINFS ,These bits set the minimum FS ratio"
|
|
line.long 0x1c "BFSSR1_2SRC0_0,2SRC0_0 buffer size setting register 1"
|
|
hexmask.long.word 0x1c 16.--25. 1. " BUFDATA ,Buffer size of 1 channel in DATA RAM"
|
|
bitfld.long 0x1c 0.--3. " BUFIN ,Set the buffer size of 1 channel in INDATA RAM" "0,1,2,3,4,Low delay,6,7,8,9,10,11,12,13,14,15"
|
|
sif (cpu()=="R7S721021")
|
|
rgroup.long (0x1034+0x20)++0x03
|
|
line.long 0x00 "SC2SR1_2SRC0_0,2SRC0_0 SCU2 status register 1"
|
|
bitfld.long 0x00 31. " SRCWSTS ,Status of Wait Time Operation of SRC" "Waited,Reached"
|
|
bitfld.long 0x00 30. " SC2MUTE ,SRC Mute Status" "Not fixed,Fixed"
|
|
bitfld.long 0x00 28.--29. " SC2STS ,Status of SRC" "Reseated,Initialized,Operated,"
|
|
textline " "
|
|
hexmask.long 0x00 0.--27. 1. " SC2FSI ,Latest value of FSI which is calculated by SRC"
|
|
else
|
|
group.long (0x1034+0x20)++0x03
|
|
line.long 0x00 "SC2SR1_2SRC0_0,2SRC0_0 SCU2 status register 1"
|
|
bitfld.long 0x00 31. " SRCWSTS ,Status of Wait Time Operation of SRC" "Wait,Reached"
|
|
bitfld.long 0x00 30. " SC2MUTE ,Mute status of sampling rate conversion function of SRC" "Not stable,Stable"
|
|
bitfld.long 0x00 28.--29. " SC2STS ,Status of SRC" "Resetting,Initialized,Operating,"
|
|
endif
|
|
group.long (0x1034+0x24)++0x07
|
|
line.long 0x00 "WATSR1_2SRC0_0,2SRC0_0 wait time setting register 1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " WTIME ,These bits set the wait time when WATMD bit of SRCCRp_2SRC0_m register is 1"
|
|
line.long 0x04 "SEVMR1_2SRC0_0,2SRC0_0 event mask register 1"
|
|
bitfld.long 0x04 31. " EVMUF ,Sampling Rate Converter Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " EVMOF ,Sampling Rate Converter Overflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " EVMWAIT ,Sampling Rate Converter Wait Time Mask" "Disabled,Enabled"
|
|
group.long (0x1034+0x30)++0x3
|
|
line.long 0x0 "SEVCR1_2SRC0_0,2SRC0_0 event clear register 1"
|
|
bitfld.long 0x0 31. " EVCUF ,Sampling Rate Converter Underflow Clear" "Cleared,Wait"
|
|
bitfld.long 0x0 30. " EVCOF ,Sampling Rate Converter Overflow Clear" "Cleared,Wait"
|
|
bitfld.long 0x0 14. " EVCWAIT ,Sampling Rate Converter Wait Time Clear" "Cleared,Wait"
|
|
group.long (0x1000+0x68)++0x3
|
|
line.long 0x00 "SRCIRR_2SRC0_0,2SRC0_0 initialization register RIF"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
group.long 0x1100++0x1F "Register 0"
|
|
line.long 0x00 "SRCIR0_2SRC0_1,2SRC0_1 initialization register 0"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
line.long 0x04 "SADIR0_2SRC0_1,2SRC0_1 audio information register 0"
|
|
bitfld.long 0x04 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bit,,,,,,,,16 bit,..."
|
|
bitfld.long 0x04 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
line.long 0x08 "SRCBR0_2SRC0_1,2SRC0_1 bypass register 0"
|
|
bitfld.long 0x08 0. " BYPASS ,Bypass Mode" "SRC function used,SRC function not used"
|
|
line.long 0x0c "IFSCR0_2SRC0_1,2SRC0_1 IFS control register 0"
|
|
bitfld.long 0x0c 0. " INTIFSEN ,INTIFS value setting enable" "Disabled,Enabled"
|
|
line.long 0x10 "IFSVR0_2SRC0_1,2SRC0_1 IFS value setting register 0"
|
|
hexmask.long 0x10 0.--27. 1. " INTIFS ,Initial value of FSI"
|
|
line.long 0x14 "SRCCR0_2SRC0_1,2SRC0_1 control register 0"
|
|
bitfld.long 0x14 20. " WATMD ,Wait Time Control of SRC" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x14 12. " BUFMD ,Low Delay Mode" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x14 12. " BUFMD ,Low Delay Control by Buffer Size of SRC" "Disabled,Enabled"
|
|
endif
|
|
bitfld.long 0x14 0. " SRCMD ,Select SRC Mode of SRC" "Asynchronous SRC,Synchronous SRC"
|
|
line.long 0x18 "MNFSR0_2SRC0_1,2SRC0_1 minimum FS setting register 0"
|
|
hexmask.long 0x18 0.--27. 1. " MINFS ,These bits set the minimum FS ratio"
|
|
line.long 0x1c "BFSSR0_2SRC0_1,2SRC0_1 buffer size setting register 0"
|
|
hexmask.long.word 0x1c 16.--25. 1. " BUFDATA ,Buffer size of 1 channel in DATA RAM"
|
|
bitfld.long 0x1c 0.--3. " BUFIN ,Set the buffer size of 1 channel in INDATA RAM" "0,1,2,3,4,Low delay,6,7,8,9,10,11,12,13,14,15"
|
|
sif (cpu()=="R7S721021")
|
|
rgroup.long (0x1100+0x20)++0x03
|
|
line.long 0x00 "SC2SR0_2SRC0_1,2SRC0_1 SCU2 status register 0"
|
|
bitfld.long 0x00 31. " SRCWSTS ,Status of Wait Time Operation of SRC" "Waited,Reached"
|
|
bitfld.long 0x00 30. " SC2MUTE ,SRC Mute Status" "Not fixed,Fixed"
|
|
bitfld.long 0x00 28.--29. " SC2STS ,Status of SRC" "Reseated,Initialized,Operated,"
|
|
textline " "
|
|
hexmask.long 0x00 0.--27. 1. " SC2FSI ,Latest value of FSI which is calculated by SRC"
|
|
else
|
|
group.long (0x1100+0x20)++0x03
|
|
line.long 0x00 "SC2SR0_2SRC0_1,2SRC0_1 SCU2 status register 0"
|
|
bitfld.long 0x00 31. " SRCWSTS ,Status of Wait Time Operation of SRC" "Wait,Reached"
|
|
bitfld.long 0x00 30. " SC2MUTE ,Mute status of sampling rate conversion function of SRC" "Not stable,Stable"
|
|
bitfld.long 0x00 28.--29. " SC2STS ,Status of SRC" "Resetting,Initialized,Operating,"
|
|
endif
|
|
group.long (0x1100+0x24)++0x07
|
|
line.long 0x00 "WATSR0_2SRC0_1,2SRC0_1 wait time setting register 0"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " WTIME ,These bits set the wait time when WATMD bit of SRCCRp_2SRC0_m register is 1"
|
|
line.long 0x04 "SEVMR0_2SRC0_1,2SRC0_1 event mask register 0"
|
|
bitfld.long 0x04 31. " EVMUF ,Sampling Rate Converter Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " EVMOF ,Sampling Rate Converter Overflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " EVMWAIT ,Sampling Rate Converter Wait Time Mask" "Disabled,Enabled"
|
|
group.long (0x1100+0x30)++0x3
|
|
line.long 0x0 "SEVCR0_2SRC0_1,2SRC0_1 event clear register 0"
|
|
bitfld.long 0x0 31. " EVCUF ,Sampling Rate Converter Underflow Clear" "Cleared,Wait"
|
|
bitfld.long 0x0 30. " EVCOF ,Sampling Rate Converter Overflow Clear" "Cleared,Wait"
|
|
bitfld.long 0x0 14. " EVCWAIT ,Sampling Rate Converter Wait Time Clear" "Cleared,Wait"
|
|
group.long 0x1134++0x1F "Register 1"
|
|
line.long 0x00 "SRCIR1_2SRC0_1,2SRC0_1 initialization register 1"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
line.long 0x04 "SADIR1_2SRC0_1,2SRC0_1 audio information register 1"
|
|
bitfld.long 0x04 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bit,,,,,,,,16 bit,..."
|
|
bitfld.long 0x04 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
line.long 0x08 "SRCBR1_2SRC0_1,2SRC0_1 bypass register 1"
|
|
bitfld.long 0x08 0. " BYPASS ,Bypass Mode" "SRC function used,SRC function not used"
|
|
line.long 0x0c "IFSCR1_2SRC0_1,2SRC0_1 IFS control register 1"
|
|
bitfld.long 0x0c 0. " INTIFSEN ,INTIFS value setting enable" "Disabled,Enabled"
|
|
line.long 0x10 "IFSVR1_2SRC0_1,2SRC0_1 IFS value setting register 1"
|
|
hexmask.long 0x10 0.--27. 1. " INTIFS ,Initial value of FSI"
|
|
line.long 0x14 "SRCCR1_2SRC0_1,2SRC0_1 control register 1"
|
|
bitfld.long 0x14 20. " WATMD ,Wait Time Control of SRC" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x14 12. " BUFMD ,Low Delay Mode" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x14 12. " BUFMD ,Low Delay Control by Buffer Size of SRC" "Disabled,Enabled"
|
|
endif
|
|
bitfld.long 0x14 0. " SRCMD ,Select SRC Mode of SRC" "Asynchronous SRC,Synchronous SRC"
|
|
line.long 0x18 "MNFSR1_2SRC0_1,2SRC0_1 minimum FS setting register 1"
|
|
hexmask.long 0x18 0.--27. 1. " MINFS ,These bits set the minimum FS ratio"
|
|
line.long 0x1c "BFSSR1_2SRC0_1,2SRC0_1 buffer size setting register 1"
|
|
hexmask.long.word 0x1c 16.--25. 1. " BUFDATA ,Buffer size of 1 channel in DATA RAM"
|
|
bitfld.long 0x1c 0.--3. " BUFIN ,Set the buffer size of 1 channel in INDATA RAM" "0,1,2,3,4,Low delay,6,7,8,9,10,11,12,13,14,15"
|
|
sif (cpu()=="R7S721021")
|
|
rgroup.long (0x1134+0x20)++0x03
|
|
line.long 0x00 "SC2SR1_2SRC0_1,2SRC0_1 SCU2 status register 1"
|
|
bitfld.long 0x00 31. " SRCWSTS ,Status of Wait Time Operation of SRC" "Waited,Reached"
|
|
bitfld.long 0x00 30. " SC2MUTE ,SRC Mute Status" "Not fixed,Fixed"
|
|
bitfld.long 0x00 28.--29. " SC2STS ,Status of SRC" "Reseated,Initialized,Operated,"
|
|
textline " "
|
|
hexmask.long 0x00 0.--27. 1. " SC2FSI ,Latest value of FSI which is calculated by SRC"
|
|
else
|
|
group.long (0x1134+0x20)++0x03
|
|
line.long 0x00 "SC2SR1_2SRC0_1,2SRC0_1 SCU2 status register 1"
|
|
bitfld.long 0x00 31. " SRCWSTS ,Status of Wait Time Operation of SRC" "Wait,Reached"
|
|
bitfld.long 0x00 30. " SC2MUTE ,Mute status of sampling rate conversion function of SRC" "Not stable,Stable"
|
|
bitfld.long 0x00 28.--29. " SC2STS ,Status of SRC" "Resetting,Initialized,Operating,"
|
|
endif
|
|
group.long (0x1134+0x24)++0x07
|
|
line.long 0x00 "WATSR1_2SRC0_1,2SRC0_1 wait time setting register 1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " WTIME ,These bits set the wait time when WATMD bit of SRCCRp_2SRC0_m register is 1"
|
|
line.long 0x04 "SEVMR1_2SRC0_1,2SRC0_1 event mask register 1"
|
|
bitfld.long 0x04 31. " EVMUF ,Sampling Rate Converter Underflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " EVMOF ,Sampling Rate Converter Overflow Mask" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " EVMWAIT ,Sampling Rate Converter Wait Time Mask" "Disabled,Enabled"
|
|
group.long (0x1134+0x30)++0x3
|
|
line.long 0x0 "SEVCR1_2SRC0_1,2SRC0_1 event clear register 1"
|
|
bitfld.long 0x0 31. " EVCUF ,Sampling Rate Converter Underflow Clear" "Cleared,Wait"
|
|
bitfld.long 0x0 30. " EVCOF ,Sampling Rate Converter Overflow Clear" "Cleared,Wait"
|
|
bitfld.long 0x0 14. " EVCWAIT ,Sampling Rate Converter Wait Time Clear" "Cleared,Wait"
|
|
group.long (0x1100+0x68)++0x3
|
|
line.long 0x00 "SRCIRR_2SRC0_0,2SRC0_0 initialization register RIF"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
tree.end
|
|
tree "DVU Registers"
|
|
group.long 0x1200++0x47 "DVU0_0"
|
|
line.long 0x00 "DVUIR_DVU0_0,DVU0_0 initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
line.long 0x04 "VADIR_DVU0_0,DVU0_0 audio information register"
|
|
bitfld.long 0x04 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bit,,,,,,,,16 bit,..."
|
|
bitfld.long 0x04 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
line.long 0x08 "DVUBR_DVU0_0,DVU0_0 bypass register"
|
|
bitfld.long 0x08 0. " BYPASS ,Bypass Mode" "DVU function used,DVU function not used"
|
|
line.long 0x0c "DVUCR_DVU0_0,DVU0_0 control register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x0c 8. " VVMD ,Digital Volume Mode Select" "Disabled,Enabled"
|
|
bitfld.long 0x0c 4. " VRMD ,Volume Ramp Mode Select" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " ZCMD ,Zero Cross Mute Mode Select" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x0c 8. " VVMD ,Select Digital Volume Value Mode" "Sleep function,Use function"
|
|
bitfld.long 0x0c 4. " VRMD ,Select Volume Ramp Mode" "Sleep ramp function,Use ramp function"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " ZCMD ,Select Zero Cross Mute Mode" "Sleep mule function,Use mule function"
|
|
endif
|
|
line.long 0x10 "ZCMCR_DVU0_0,DVU0_0 zero cross mute control register"
|
|
bitfld.long 0x10 7. " ZCEN7 ,Zero Cross Mute Enable for Channel 7" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " ZCEN6 ,Zero Cross Mute Enable for Channel 6" "Disabled,Enabled"
|
|
bitfld.long 0x10 5. " ZCEN5 ,Zero Cross Mute Enable for Channel 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " ZCEN4 ,Zero Cross Mute Enable for Channel 4" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " ZCEN3 ,Zero Cross Mute Enable for Channel 3" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " ZCEN2 ,Zero Cross Mute Enable for Channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ZCEN1 ,Zero Cross Mute Enable for Channel 1" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " ZCEN0 ,Zero Cross Mute Enable for Channel 0" "Disabled,Enabled"
|
|
line.long 0x14 "VRCTR_DVU0_0,DVU0_0 volume ramp control register"
|
|
bitfld.long 0x14 7. " VREN7 ,Volume Ramp Enable for Channel 7" "Disabled,Enabled"
|
|
bitfld.long 0x14 6. " VREN6 ,Volume Ramp Enable for Channel 6" "Disabled,Enabled"
|
|
bitfld.long 0x14 5. " VREN5 ,Volume Ramp Enable for Channel 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 4. " VREN4 ,Volume Ramp Enable for Channel 4" "Disabled,Enabled"
|
|
bitfld.long 0x14 3. " VREN3 ,Volume Ramp Enable for Channel 3" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " VREN2 ,Volume Ramp Enable for Channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 1. " VREN1 ,Volume Ramp Enable for Channel 1" "Disabled,Enabled"
|
|
bitfld.long 0x14 0. " VREN0 ,Volume Ramp Enable for Channel 0" "Disabled,Enabled"
|
|
line.long 0x18 "VRPDR_DVU0_0,DVU0_0 volume ramp period register"
|
|
bitfld.long 0x18 8.--12. " VRPDUP ,Volume Ramp Period for Volume Up" "1 [sample] (128 dB/1 step),2 [sample] (64 dB/1 step),4 [sample] (32 dB/1 step),8 [sample] (16 dB/1 step),16 [sample] (8 dB/1 step),32 [sample] (4 dB/1 step),64[sample](2 dB/1 step),128[sample](1 dB/1 step),256[sample](0.5 dB/1 step),512[sample](0.25 dB/1 step),1024[sample](0.125 dB/1 step),2048[sample](0.125 dB/2 step),4096[sample](0.125 dB/4 step),8192[sample](0.125 dB/8 step),16384[sample](0.125 dB/16 step),32768[sample](0.125 dB/32 step),65536[sample](0.125 dB/64 step),131072[sample](0.125 dB/128 step),262144[sample](0.125 dB/256 step),524288[sample](0.125 dB/512 step),1048576[sample] (0.125 dB/1024 step),2097152[sample](0.125 dB/2048 step),4194304[sample](0.125 dB/4096 step),8388608[sample](0.125 dB/8192 step),,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x18 0.--4. " VRPDDW ,Volume Ramp Period for Volume Down" "1 [sample] (-128 dB/1 step),2 [sample] (-64 dB/1 step),4 [sample] (-32 dB/1 step),8 [sample] (-16 dB/1 step),16 [sample] (-8 dB/1 step),32 [sample] (-4 dB/1 step),64[sample](-2 dB/1 step),128[sample](-1 dB/1 step),256[sample](-0.5 dB/1 step),512[sample](-0.25 dB/1 step),1024[sample](-0.125 dB/1 step),2048[sample](-0.125 dB/2 step),4096[sample](-0.125 dB/4 step),8192[sample](-0.125 dB/8 step),16384[sample](-0.125 dB/16 step),32768[sample](-0.125 dB/32 step),65536[sample](-0.125 dB/64 step),131072[sample](-0.125 dB/128 step),262144[sample](-0.125 dB/256 step),524288[sample](-0.125 dB/512 step),1048576[sample] (-0.125 dB/1024 step),2097152[sample](-0.125 dB/2048 step),4194304[sample](-0.125 dB/4096 step),8388608[sample](-0.125 dB/8192 step),,,,,,,,"
|
|
line.long 0x1c "VRDBR_DVU0_0,DVU0_0 volume ramp decibel register"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.long.word 0x1c 0.--9. 1. " VRDB ,Decibel of Volume Ramp"
|
|
else
|
|
hexmask.long.word 0x1c 0.--9. 1. " VRDB ,dB of volume ram"
|
|
endif
|
|
line.long 0x20 "VRWTR_DVU0_0,DVU0_0 volume ramp wait time register"
|
|
hexmask.long.tbyte 0x20 0.--23. 1. " VRWT ,Volume Ramp Wait Time"
|
|
line.long 0x24 "VOL0R_DVU0_0,DVU0_0 volume value setting 0 register"
|
|
hexmask.long.tbyte 0x24 0.--23. 1. " VOLVAL0 ,Digital Volume Value for Channel 0"
|
|
line.long 0x28 "VOL1R_DVU0_0,DVU0_0 volume value setting 1 register"
|
|
hexmask.long.tbyte 0x28 0.--23. 1. " VOLVAL1 ,Digital Volume Value for Channel 1"
|
|
line.long 0x2c "VOL2R_DVU0_0,DVU0_0 volume value setting 2 register"
|
|
hexmask.long.tbyte 0x2c 0.--23. 1. " VOLVAL2 ,Digital Volume Value for Channel 2"
|
|
line.long 0x30 "VOL3R_DVU0_0,DVU0_0 volume value setting 3 register"
|
|
hexmask.long.tbyte 0x30 0.--23. 1. " VOLVAL3 ,Digital Volume Value for Channel 3"
|
|
line.long 0x34 "VOL4R_DVU0_0,DVU0_0 volume value setting 4 register"
|
|
hexmask.long.tbyte 0x34 0.--23. 1. " VOLVAL4 ,Digital Volume Value for Channel 4"
|
|
line.long 0x38 "VOL5R_DVU0_0,DVU0_0 volume value setting 5 register"
|
|
hexmask.long.tbyte 0x38 0.--23. 1. " VOLVAL5 ,Digital Volume Value for Channel 5"
|
|
line.long 0x3c "VOL6R_DVU0_0,DVU0_0 volume value setting 6 register"
|
|
hexmask.long.tbyte 0x3c 0.--23. 1. " VOLVAL6 ,Digital Volume Value for Channel 6"
|
|
line.long 0x40 "VOL7R_DVU0_0,DVU0_0 volume value setting 7 register"
|
|
hexmask.long.tbyte 0x40 0.--23. 1. " VOLVAL7 ,Digital Volume Value for Channel 7"
|
|
line.long 0x44 "DVUER_DVU0_0,DVU0_0 enable register"
|
|
bitfld.long 0x44 0. " DVUEN ,DVU register setting Enable" "Disabled,Enabled"
|
|
rgroup.long (0x1200+0x48)++0x3
|
|
line.long 0x00 "DVUSR_DVU0_0,DVU0_0 status register"
|
|
bitfld.long 0x00 23. " ZSTS7 ,Zero Cross Mute Status of Channel 7" "Not mute status,Mute status"
|
|
bitfld.long 0x00 22. " ZSTS6 ,Zero Cross Mute Status of Channel 6" "Not mute status,Mute status"
|
|
bitfld.long 0x00 21. " ZSTS5 ,Zero Cross Mute Status of Channel 5" "Not mute status,Mute status"
|
|
textline " "
|
|
bitfld.long 0x00 20. " ZSTS4 ,Zero Cross Mute Status of Channel 4" "Not mute status,Mute status"
|
|
bitfld.long 0x00 19. " ZSTS3 ,Zero Cross Mute Status of Channel 3" "Not mute status,Mute status"
|
|
bitfld.long 0x00 18. " ZSTS2 ,Zero Cross Mute Status of Channel 2" "Not mute status,Mute status"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ZSTS1 ,Zero Cross Mute Status of Channel 1" "Not mute status,Mute status"
|
|
bitfld.long 0x00 16. " ZSTS0 ,Zero Cross Mute Status of Channel 0" "Not mute status,Mute status"
|
|
bitfld.long 0x00 0.--2. " VRSTS ,Volume Ramp Status" "Mute status,Volume ramp down,Volume ramp up,Value of BRDBR register,Maintained,,,"
|
|
group.long (0x1200+0x4c)++0x3
|
|
line.long 0x00 "VEVMR_DVU0_0,DVU0_0 event mask register"
|
|
bitfld.long 0x00 31. " VEVMZCM7 ,Channel 7 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " VEVMZCM6 ,Channel 6 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " VEVMZCM5 ,Channel 5 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " VEVMZCM4 ,Channel 4 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " VEVMZCM3 ,Channel 3 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " VEVMZCM2 ,Channel 2 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " VEVMZCM1 ,Channel 1 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " VEVMZCM0 ,Channel 0 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " VEVMVR ,Volume Ramp Status Change" "Disabled,Enabled"
|
|
group.long (0x1200+0x54)++0x3
|
|
line.long 0x00 "VEVCR_DVU0_0,DVU0_0 event clear register"
|
|
bitfld.long 0x00 31. " VEVCZCM7 ,Channel 7 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 30. " VEVCZCM6 ,Channel 6 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 29. " VEVCZCM5 ,Channel 5 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x00 28. " VEVCZCM4 ,Channel 4 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 27. " VEVCZCM3 ,Channel 3 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 26. " VEVCZCM2 ,Channel 2 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x00 25. " VEVCZCM1 ,Channel 1 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 24. " VEVCZCM0 ,Channel 0 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 15. " VEVCVR ,Volume Ramp Status Change Clear" "Cleared,Waiting"
|
|
group.long 0x1300++0x47 "DVU0_1"
|
|
line.long 0x00 "DVUIR_DVU0_1,DVU0_1 initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
line.long 0x04 "VADIR_DVU0_1,DVU0_1 audio information register"
|
|
bitfld.long 0x04 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bit,,,,,,,,16 bit,..."
|
|
bitfld.long 0x04 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
line.long 0x08 "DVUBR_DVU0_1,DVU0_1 bypass register"
|
|
bitfld.long 0x08 0. " BYPASS ,Bypass Mode" "DVU function used,DVU function not used"
|
|
line.long 0x0c "DVUCR_DVU0_1,DVU0_1 control register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x0c 8. " VVMD ,Digital Volume Mode Select" "Disabled,Enabled"
|
|
bitfld.long 0x0c 4. " VRMD ,Volume Ramp Mode Select" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " ZCMD ,Zero Cross Mute Mode Select" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x0c 8. " VVMD ,Select Digital Volume Value Mode" "Sleep function,Use function"
|
|
bitfld.long 0x0c 4. " VRMD ,Select Volume Ramp Mode" "Sleep ramp function,Use ramp function"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " ZCMD ,Select Zero Cross Mute Mode" "Sleep mule function,Use mule function"
|
|
endif
|
|
line.long 0x10 "ZCMCR_DVU0_1,DVU0_1 zero cross mute control register"
|
|
bitfld.long 0x10 7. " ZCEN7 ,Zero Cross Mute Enable for Channel 7" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " ZCEN6 ,Zero Cross Mute Enable for Channel 6" "Disabled,Enabled"
|
|
bitfld.long 0x10 5. " ZCEN5 ,Zero Cross Mute Enable for Channel 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " ZCEN4 ,Zero Cross Mute Enable for Channel 4" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " ZCEN3 ,Zero Cross Mute Enable for Channel 3" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " ZCEN2 ,Zero Cross Mute Enable for Channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ZCEN1 ,Zero Cross Mute Enable for Channel 1" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " ZCEN0 ,Zero Cross Mute Enable for Channel 0" "Disabled,Enabled"
|
|
line.long 0x14 "VRCTR_DVU0_1,DVU0_1 volume ramp control register"
|
|
bitfld.long 0x14 7. " VREN7 ,Volume Ramp Enable for Channel 7" "Disabled,Enabled"
|
|
bitfld.long 0x14 6. " VREN6 ,Volume Ramp Enable for Channel 6" "Disabled,Enabled"
|
|
bitfld.long 0x14 5. " VREN5 ,Volume Ramp Enable for Channel 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 4. " VREN4 ,Volume Ramp Enable for Channel 4" "Disabled,Enabled"
|
|
bitfld.long 0x14 3. " VREN3 ,Volume Ramp Enable for Channel 3" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " VREN2 ,Volume Ramp Enable for Channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 1. " VREN1 ,Volume Ramp Enable for Channel 1" "Disabled,Enabled"
|
|
bitfld.long 0x14 0. " VREN0 ,Volume Ramp Enable for Channel 0" "Disabled,Enabled"
|
|
line.long 0x18 "VRPDR_DVU0_1,DVU0_1 volume ramp period register"
|
|
bitfld.long 0x18 8.--12. " VRPDUP ,Volume Ramp Period for Volume Up" "1 [sample] (128 dB/1 step),2 [sample] (64 dB/1 step),4 [sample] (32 dB/1 step),8 [sample] (16 dB/1 step),16 [sample] (8 dB/1 step),32 [sample] (4 dB/1 step),64[sample](2 dB/1 step),128[sample](1 dB/1 step),256[sample](0.5 dB/1 step),512[sample](0.25 dB/1 step),1024[sample](0.125 dB/1 step),2048[sample](0.125 dB/2 step),4096[sample](0.125 dB/4 step),8192[sample](0.125 dB/8 step),16384[sample](0.125 dB/16 step),32768[sample](0.125 dB/32 step),65536[sample](0.125 dB/64 step),131072[sample](0.125 dB/128 step),262144[sample](0.125 dB/256 step),524288[sample](0.125 dB/512 step),1048576[sample] (0.125 dB/1024 step),2097152[sample](0.125 dB/2048 step),4194304[sample](0.125 dB/4096 step),8388608[sample](0.125 dB/8192 step),,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x18 0.--4. " VRPDDW ,Volume Ramp Period for Volume Down" "1 [sample] (-128 dB/1 step),2 [sample] (-64 dB/1 step),4 [sample] (-32 dB/1 step),8 [sample] (-16 dB/1 step),16 [sample] (-8 dB/1 step),32 [sample] (-4 dB/1 step),64[sample](-2 dB/1 step),128[sample](-1 dB/1 step),256[sample](-0.5 dB/1 step),512[sample](-0.25 dB/1 step),1024[sample](-0.125 dB/1 step),2048[sample](-0.125 dB/2 step),4096[sample](-0.125 dB/4 step),8192[sample](-0.125 dB/8 step),16384[sample](-0.125 dB/16 step),32768[sample](-0.125 dB/32 step),65536[sample](-0.125 dB/64 step),131072[sample](-0.125 dB/128 step),262144[sample](-0.125 dB/256 step),524288[sample](-0.125 dB/512 step),1048576[sample] (-0.125 dB/1024 step),2097152[sample](-0.125 dB/2048 step),4194304[sample](-0.125 dB/4096 step),8388608[sample](-0.125 dB/8192 step),,,,,,,,"
|
|
line.long 0x1c "VRDBR_DVU0_1,DVU0_1 volume ramp decibel register"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.long.word 0x1c 0.--9. 1. " VRDB ,Decibel of Volume Ramp"
|
|
else
|
|
hexmask.long.word 0x1c 0.--9. 1. " VRDB ,dB of volume ram"
|
|
endif
|
|
line.long 0x20 "VRWTR_DVU0_1,DVU0_1 volume ramp wait time register"
|
|
hexmask.long.tbyte 0x20 0.--23. 1. " VRWT ,Volume Ramp Wait Time"
|
|
line.long 0x24 "VOL0R_DVU0_1,DVU0_1 volume value setting 0 register"
|
|
hexmask.long.tbyte 0x24 0.--23. 1. " VOLVAL0 ,Digital Volume Value for Channel 0"
|
|
line.long 0x28 "VOL1R_DVU0_1,DVU0_1 volume value setting 1 register"
|
|
hexmask.long.tbyte 0x28 0.--23. 1. " VOLVAL1 ,Digital Volume Value for Channel 1"
|
|
line.long 0x2c "VOL2R_DVU0_1,DVU0_1 volume value setting 2 register"
|
|
hexmask.long.tbyte 0x2c 0.--23. 1. " VOLVAL2 ,Digital Volume Value for Channel 2"
|
|
line.long 0x30 "VOL3R_DVU0_1,DVU0_1 volume value setting 3 register"
|
|
hexmask.long.tbyte 0x30 0.--23. 1. " VOLVAL3 ,Digital Volume Value for Channel 3"
|
|
line.long 0x34 "VOL4R_DVU0_1,DVU0_1 volume value setting 4 register"
|
|
hexmask.long.tbyte 0x34 0.--23. 1. " VOLVAL4 ,Digital Volume Value for Channel 4"
|
|
line.long 0x38 "VOL5R_DVU0_1,DVU0_1 volume value setting 5 register"
|
|
hexmask.long.tbyte 0x38 0.--23. 1. " VOLVAL5 ,Digital Volume Value for Channel 5"
|
|
line.long 0x3c "VOL6R_DVU0_1,DVU0_1 volume value setting 6 register"
|
|
hexmask.long.tbyte 0x3c 0.--23. 1. " VOLVAL6 ,Digital Volume Value for Channel 6"
|
|
line.long 0x40 "VOL7R_DVU0_1,DVU0_1 volume value setting 7 register"
|
|
hexmask.long.tbyte 0x40 0.--23. 1. " VOLVAL7 ,Digital Volume Value for Channel 7"
|
|
line.long 0x44 "DVUER_DVU0_1,DVU0_1 enable register"
|
|
bitfld.long 0x44 0. " DVUEN ,DVU register setting Enable" "Disabled,Enabled"
|
|
rgroup.long (0x1300+0x48)++0x3
|
|
line.long 0x00 "DVUSR_DVU0_1,DVU0_1 status register"
|
|
bitfld.long 0x00 23. " ZSTS7 ,Zero Cross Mute Status of Channel 7" "Not mute status,Mute status"
|
|
bitfld.long 0x00 22. " ZSTS6 ,Zero Cross Mute Status of Channel 6" "Not mute status,Mute status"
|
|
bitfld.long 0x00 21. " ZSTS5 ,Zero Cross Mute Status of Channel 5" "Not mute status,Mute status"
|
|
textline " "
|
|
bitfld.long 0x00 20. " ZSTS4 ,Zero Cross Mute Status of Channel 4" "Not mute status,Mute status"
|
|
bitfld.long 0x00 19. " ZSTS3 ,Zero Cross Mute Status of Channel 3" "Not mute status,Mute status"
|
|
bitfld.long 0x00 18. " ZSTS2 ,Zero Cross Mute Status of Channel 2" "Not mute status,Mute status"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ZSTS1 ,Zero Cross Mute Status of Channel 1" "Not mute status,Mute status"
|
|
bitfld.long 0x00 16. " ZSTS0 ,Zero Cross Mute Status of Channel 0" "Not mute status,Mute status"
|
|
bitfld.long 0x00 0.--2. " VRSTS ,Volume Ramp Status" "Mute status,Volume ramp down,Volume ramp up,Value of BRDBR register,Maintained,,,"
|
|
group.long (0x1300+0x4c)++0x3
|
|
line.long 0x00 "VEVMR_DVU0_1,DVU0_1 event mask register"
|
|
bitfld.long 0x00 31. " VEVMZCM7 ,Channel 7 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " VEVMZCM6 ,Channel 6 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " VEVMZCM5 ,Channel 5 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " VEVMZCM4 ,Channel 4 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " VEVMZCM3 ,Channel 3 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " VEVMZCM2 ,Channel 2 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " VEVMZCM1 ,Channel 1 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " VEVMZCM0 ,Channel 0 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " VEVMVR ,Volume Ramp Status Change" "Disabled,Enabled"
|
|
group.long (0x1300+0x54)++0x3
|
|
line.long 0x00 "VEVCR_DVU0_1,DVU0_1 event clear register"
|
|
bitfld.long 0x00 31. " VEVCZCM7 ,Channel 7 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 30. " VEVCZCM6 ,Channel 6 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 29. " VEVCZCM5 ,Channel 5 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x00 28. " VEVCZCM4 ,Channel 4 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 27. " VEVCZCM3 ,Channel 3 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 26. " VEVCZCM2 ,Channel 2 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x00 25. " VEVCZCM1 ,Channel 1 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 24. " VEVCZCM0 ,Channel 0 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 15. " VEVCVR ,Volume Ramp Status Change Clear" "Cleared,Waiting"
|
|
group.long 0x1400++0x47 "DVU0_2"
|
|
line.long 0x00 "DVUIR_DVU0_2,DVU0_2 initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
line.long 0x04 "VADIR_DVU0_2,DVU0_2 audio information register"
|
|
bitfld.long 0x04 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bit,,,,,,,,16 bit,..."
|
|
bitfld.long 0x04 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
line.long 0x08 "DVUBR_DVU0_2,DVU0_2 bypass register"
|
|
bitfld.long 0x08 0. " BYPASS ,Bypass Mode" "DVU function used,DVU function not used"
|
|
line.long 0x0c "DVUCR_DVU0_2,DVU0_2 control register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x0c 8. " VVMD ,Digital Volume Mode Select" "Disabled,Enabled"
|
|
bitfld.long 0x0c 4. " VRMD ,Volume Ramp Mode Select" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " ZCMD ,Zero Cross Mute Mode Select" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x0c 8. " VVMD ,Select Digital Volume Value Mode" "Sleep function,Use function"
|
|
bitfld.long 0x0c 4. " VRMD ,Select Volume Ramp Mode" "Sleep ramp function,Use ramp function"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " ZCMD ,Select Zero Cross Mute Mode" "Sleep mule function,Use mule function"
|
|
endif
|
|
line.long 0x10 "ZCMCR_DVU0_2,DVU0_2 zero cross mute control register"
|
|
bitfld.long 0x10 7. " ZCEN7 ,Zero Cross Mute Enable for Channel 7" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " ZCEN6 ,Zero Cross Mute Enable for Channel 6" "Disabled,Enabled"
|
|
bitfld.long 0x10 5. " ZCEN5 ,Zero Cross Mute Enable for Channel 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " ZCEN4 ,Zero Cross Mute Enable for Channel 4" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " ZCEN3 ,Zero Cross Mute Enable for Channel 3" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " ZCEN2 ,Zero Cross Mute Enable for Channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ZCEN1 ,Zero Cross Mute Enable for Channel 1" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " ZCEN0 ,Zero Cross Mute Enable for Channel 0" "Disabled,Enabled"
|
|
line.long 0x14 "VRCTR_DVU0_2,DVU0_2 volume ramp control register"
|
|
bitfld.long 0x14 7. " VREN7 ,Volume Ramp Enable for Channel 7" "Disabled,Enabled"
|
|
bitfld.long 0x14 6. " VREN6 ,Volume Ramp Enable for Channel 6" "Disabled,Enabled"
|
|
bitfld.long 0x14 5. " VREN5 ,Volume Ramp Enable for Channel 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 4. " VREN4 ,Volume Ramp Enable for Channel 4" "Disabled,Enabled"
|
|
bitfld.long 0x14 3. " VREN3 ,Volume Ramp Enable for Channel 3" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " VREN2 ,Volume Ramp Enable for Channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 1. " VREN1 ,Volume Ramp Enable for Channel 1" "Disabled,Enabled"
|
|
bitfld.long 0x14 0. " VREN0 ,Volume Ramp Enable for Channel 0" "Disabled,Enabled"
|
|
line.long 0x18 "VRPDR_DVU0_2,DVU0_2 volume ramp period register"
|
|
bitfld.long 0x18 8.--12. " VRPDUP ,Volume Ramp Period for Volume Up" "1 [sample] (128 dB/1 step),2 [sample] (64 dB/1 step),4 [sample] (32 dB/1 step),8 [sample] (16 dB/1 step),16 [sample] (8 dB/1 step),32 [sample] (4 dB/1 step),64[sample](2 dB/1 step),128[sample](1 dB/1 step),256[sample](0.5 dB/1 step),512[sample](0.25 dB/1 step),1024[sample](0.125 dB/1 step),2048[sample](0.125 dB/2 step),4096[sample](0.125 dB/4 step),8192[sample](0.125 dB/8 step),16384[sample](0.125 dB/16 step),32768[sample](0.125 dB/32 step),65536[sample](0.125 dB/64 step),131072[sample](0.125 dB/128 step),262144[sample](0.125 dB/256 step),524288[sample](0.125 dB/512 step),1048576[sample] (0.125 dB/1024 step),2097152[sample](0.125 dB/2048 step),4194304[sample](0.125 dB/4096 step),8388608[sample](0.125 dB/8192 step),,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x18 0.--4. " VRPDDW ,Volume Ramp Period for Volume Down" "1 [sample] (-128 dB/1 step),2 [sample] (-64 dB/1 step),4 [sample] (-32 dB/1 step),8 [sample] (-16 dB/1 step),16 [sample] (-8 dB/1 step),32 [sample] (-4 dB/1 step),64[sample](-2 dB/1 step),128[sample](-1 dB/1 step),256[sample](-0.5 dB/1 step),512[sample](-0.25 dB/1 step),1024[sample](-0.125 dB/1 step),2048[sample](-0.125 dB/2 step),4096[sample](-0.125 dB/4 step),8192[sample](-0.125 dB/8 step),16384[sample](-0.125 dB/16 step),32768[sample](-0.125 dB/32 step),65536[sample](-0.125 dB/64 step),131072[sample](-0.125 dB/128 step),262144[sample](-0.125 dB/256 step),524288[sample](-0.125 dB/512 step),1048576[sample] (-0.125 dB/1024 step),2097152[sample](-0.125 dB/2048 step),4194304[sample](-0.125 dB/4096 step),8388608[sample](-0.125 dB/8192 step),,,,,,,,"
|
|
line.long 0x1c "VRDBR_DVU0_2,DVU0_2 volume ramp decibel register"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.long.word 0x1c 0.--9. 1. " VRDB ,Decibel of Volume Ramp"
|
|
else
|
|
hexmask.long.word 0x1c 0.--9. 1. " VRDB ,dB of volume ram"
|
|
endif
|
|
line.long 0x20 "VRWTR_DVU0_2,DVU0_2 volume ramp wait time register"
|
|
hexmask.long.tbyte 0x20 0.--23. 1. " VRWT ,Volume Ramp Wait Time"
|
|
line.long 0x24 "VOL0R_DVU0_2,DVU0_2 volume value setting 0 register"
|
|
hexmask.long.tbyte 0x24 0.--23. 1. " VOLVAL0 ,Digital Volume Value for Channel 0"
|
|
line.long 0x28 "VOL1R_DVU0_2,DVU0_2 volume value setting 1 register"
|
|
hexmask.long.tbyte 0x28 0.--23. 1. " VOLVAL1 ,Digital Volume Value for Channel 1"
|
|
line.long 0x2c "VOL2R_DVU0_2,DVU0_2 volume value setting 2 register"
|
|
hexmask.long.tbyte 0x2c 0.--23. 1. " VOLVAL2 ,Digital Volume Value for Channel 2"
|
|
line.long 0x30 "VOL3R_DVU0_2,DVU0_2 volume value setting 3 register"
|
|
hexmask.long.tbyte 0x30 0.--23. 1. " VOLVAL3 ,Digital Volume Value for Channel 3"
|
|
line.long 0x34 "VOL4R_DVU0_2,DVU0_2 volume value setting 4 register"
|
|
hexmask.long.tbyte 0x34 0.--23. 1. " VOLVAL4 ,Digital Volume Value for Channel 4"
|
|
line.long 0x38 "VOL5R_DVU0_2,DVU0_2 volume value setting 5 register"
|
|
hexmask.long.tbyte 0x38 0.--23. 1. " VOLVAL5 ,Digital Volume Value for Channel 5"
|
|
line.long 0x3c "VOL6R_DVU0_2,DVU0_2 volume value setting 6 register"
|
|
hexmask.long.tbyte 0x3c 0.--23. 1. " VOLVAL6 ,Digital Volume Value for Channel 6"
|
|
line.long 0x40 "VOL7R_DVU0_2,DVU0_2 volume value setting 7 register"
|
|
hexmask.long.tbyte 0x40 0.--23. 1. " VOLVAL7 ,Digital Volume Value for Channel 7"
|
|
line.long 0x44 "DVUER_DVU0_2,DVU0_2 enable register"
|
|
bitfld.long 0x44 0. " DVUEN ,DVU register setting Enable" "Disabled,Enabled"
|
|
rgroup.long (0x1400+0x48)++0x3
|
|
line.long 0x00 "DVUSR_DVU0_2,DVU0_2 status register"
|
|
bitfld.long 0x00 23. " ZSTS7 ,Zero Cross Mute Status of Channel 7" "Not mute status,Mute status"
|
|
bitfld.long 0x00 22. " ZSTS6 ,Zero Cross Mute Status of Channel 6" "Not mute status,Mute status"
|
|
bitfld.long 0x00 21. " ZSTS5 ,Zero Cross Mute Status of Channel 5" "Not mute status,Mute status"
|
|
textline " "
|
|
bitfld.long 0x00 20. " ZSTS4 ,Zero Cross Mute Status of Channel 4" "Not mute status,Mute status"
|
|
bitfld.long 0x00 19. " ZSTS3 ,Zero Cross Mute Status of Channel 3" "Not mute status,Mute status"
|
|
bitfld.long 0x00 18. " ZSTS2 ,Zero Cross Mute Status of Channel 2" "Not mute status,Mute status"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ZSTS1 ,Zero Cross Mute Status of Channel 1" "Not mute status,Mute status"
|
|
bitfld.long 0x00 16. " ZSTS0 ,Zero Cross Mute Status of Channel 0" "Not mute status,Mute status"
|
|
bitfld.long 0x00 0.--2. " VRSTS ,Volume Ramp Status" "Mute status,Volume ramp down,Volume ramp up,Value of BRDBR register,Maintained,,,"
|
|
group.long (0x1400+0x4c)++0x3
|
|
line.long 0x00 "VEVMR_DVU0_2,DVU0_2 event mask register"
|
|
bitfld.long 0x00 31. " VEVMZCM7 ,Channel 7 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " VEVMZCM6 ,Channel 6 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " VEVMZCM5 ,Channel 5 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " VEVMZCM4 ,Channel 4 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " VEVMZCM3 ,Channel 3 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " VEVMZCM2 ,Channel 2 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " VEVMZCM1 ,Channel 1 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " VEVMZCM0 ,Channel 0 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " VEVMVR ,Volume Ramp Status Change" "Disabled,Enabled"
|
|
group.long (0x1400+0x54)++0x3
|
|
line.long 0x00 "VEVCR_DVU0_2,DVU0_2 event clear register"
|
|
bitfld.long 0x00 31. " VEVCZCM7 ,Channel 7 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 30. " VEVCZCM6 ,Channel 6 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 29. " VEVCZCM5 ,Channel 5 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x00 28. " VEVCZCM4 ,Channel 4 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 27. " VEVCZCM3 ,Channel 3 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 26. " VEVCZCM2 ,Channel 2 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x00 25. " VEVCZCM1 ,Channel 1 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 24. " VEVCZCM0 ,Channel 0 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 15. " VEVCVR ,Volume Ramp Status Change Clear" "Cleared,Waiting"
|
|
group.long 0x1500++0x47 "DVU0_3"
|
|
line.long 0x00 "DVUIR_DVU0_3,DVU0_3 initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
line.long 0x04 "VADIR_DVU0_3,DVU0_3 audio information register"
|
|
bitfld.long 0x04 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bit,,,,,,,,16 bit,..."
|
|
bitfld.long 0x04 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
line.long 0x08 "DVUBR_DVU0_3,DVU0_3 bypass register"
|
|
bitfld.long 0x08 0. " BYPASS ,Bypass Mode" "DVU function used,DVU function not used"
|
|
line.long 0x0c "DVUCR_DVU0_3,DVU0_3 control register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x0c 8. " VVMD ,Digital Volume Mode Select" "Disabled,Enabled"
|
|
bitfld.long 0x0c 4. " VRMD ,Volume Ramp Mode Select" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " ZCMD ,Zero Cross Mute Mode Select" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x0c 8. " VVMD ,Select Digital Volume Value Mode" "Sleep function,Use function"
|
|
bitfld.long 0x0c 4. " VRMD ,Select Volume Ramp Mode" "Sleep ramp function,Use ramp function"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " ZCMD ,Select Zero Cross Mute Mode" "Sleep mule function,Use mule function"
|
|
endif
|
|
line.long 0x10 "ZCMCR_DVU0_3,DVU0_3 zero cross mute control register"
|
|
bitfld.long 0x10 7. " ZCEN7 ,Zero Cross Mute Enable for Channel 7" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " ZCEN6 ,Zero Cross Mute Enable for Channel 6" "Disabled,Enabled"
|
|
bitfld.long 0x10 5. " ZCEN5 ,Zero Cross Mute Enable for Channel 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " ZCEN4 ,Zero Cross Mute Enable for Channel 4" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " ZCEN3 ,Zero Cross Mute Enable for Channel 3" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " ZCEN2 ,Zero Cross Mute Enable for Channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ZCEN1 ,Zero Cross Mute Enable for Channel 1" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " ZCEN0 ,Zero Cross Mute Enable for Channel 0" "Disabled,Enabled"
|
|
line.long 0x14 "VRCTR_DVU0_3,DVU0_3 volume ramp control register"
|
|
bitfld.long 0x14 7. " VREN7 ,Volume Ramp Enable for Channel 7" "Disabled,Enabled"
|
|
bitfld.long 0x14 6. " VREN6 ,Volume Ramp Enable for Channel 6" "Disabled,Enabled"
|
|
bitfld.long 0x14 5. " VREN5 ,Volume Ramp Enable for Channel 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 4. " VREN4 ,Volume Ramp Enable for Channel 4" "Disabled,Enabled"
|
|
bitfld.long 0x14 3. " VREN3 ,Volume Ramp Enable for Channel 3" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " VREN2 ,Volume Ramp Enable for Channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 1. " VREN1 ,Volume Ramp Enable for Channel 1" "Disabled,Enabled"
|
|
bitfld.long 0x14 0. " VREN0 ,Volume Ramp Enable for Channel 0" "Disabled,Enabled"
|
|
line.long 0x18 "VRPDR_DVU0_3,DVU0_3 volume ramp period register"
|
|
bitfld.long 0x18 8.--12. " VRPDUP ,Volume Ramp Period for Volume Up" "1 [sample] (128 dB/1 step),2 [sample] (64 dB/1 step),4 [sample] (32 dB/1 step),8 [sample] (16 dB/1 step),16 [sample] (8 dB/1 step),32 [sample] (4 dB/1 step),64[sample](2 dB/1 step),128[sample](1 dB/1 step),256[sample](0.5 dB/1 step),512[sample](0.25 dB/1 step),1024[sample](0.125 dB/1 step),2048[sample](0.125 dB/2 step),4096[sample](0.125 dB/4 step),8192[sample](0.125 dB/8 step),16384[sample](0.125 dB/16 step),32768[sample](0.125 dB/32 step),65536[sample](0.125 dB/64 step),131072[sample](0.125 dB/128 step),262144[sample](0.125 dB/256 step),524288[sample](0.125 dB/512 step),1048576[sample] (0.125 dB/1024 step),2097152[sample](0.125 dB/2048 step),4194304[sample](0.125 dB/4096 step),8388608[sample](0.125 dB/8192 step),,,,,,,,"
|
|
textline " "
|
|
bitfld.long 0x18 0.--4. " VRPDDW ,Volume Ramp Period for Volume Down" "1 [sample] (-128 dB/1 step),2 [sample] (-64 dB/1 step),4 [sample] (-32 dB/1 step),8 [sample] (-16 dB/1 step),16 [sample] (-8 dB/1 step),32 [sample] (-4 dB/1 step),64[sample](-2 dB/1 step),128[sample](-1 dB/1 step),256[sample](-0.5 dB/1 step),512[sample](-0.25 dB/1 step),1024[sample](-0.125 dB/1 step),2048[sample](-0.125 dB/2 step),4096[sample](-0.125 dB/4 step),8192[sample](-0.125 dB/8 step),16384[sample](-0.125 dB/16 step),32768[sample](-0.125 dB/32 step),65536[sample](-0.125 dB/64 step),131072[sample](-0.125 dB/128 step),262144[sample](-0.125 dB/256 step),524288[sample](-0.125 dB/512 step),1048576[sample] (-0.125 dB/1024 step),2097152[sample](-0.125 dB/2048 step),4194304[sample](-0.125 dB/4096 step),8388608[sample](-0.125 dB/8192 step),,,,,,,,"
|
|
line.long 0x1c "VRDBR_DVU0_3,DVU0_3 volume ramp decibel register"
|
|
sif (cpu()=="R7S721021")
|
|
hexmask.long.word 0x1c 0.--9. 1. " VRDB ,Decibel of Volume Ramp"
|
|
else
|
|
hexmask.long.word 0x1c 0.--9. 1. " VRDB ,dB of volume ram"
|
|
endif
|
|
line.long 0x20 "VRWTR_DVU0_3,DVU0_3 volume ramp wait time register"
|
|
hexmask.long.tbyte 0x20 0.--23. 1. " VRWT ,Volume Ramp Wait Time"
|
|
line.long 0x24 "VOL0R_DVU0_3,DVU0_3 volume value setting 0 register"
|
|
hexmask.long.tbyte 0x24 0.--23. 1. " VOLVAL0 ,Digital Volume Value for Channel 0"
|
|
line.long 0x28 "VOL1R_DVU0_3,DVU0_3 volume value setting 1 register"
|
|
hexmask.long.tbyte 0x28 0.--23. 1. " VOLVAL1 ,Digital Volume Value for Channel 1"
|
|
line.long 0x2c "VOL2R_DVU0_3,DVU0_3 volume value setting 2 register"
|
|
hexmask.long.tbyte 0x2c 0.--23. 1. " VOLVAL2 ,Digital Volume Value for Channel 2"
|
|
line.long 0x30 "VOL3R_DVU0_3,DVU0_3 volume value setting 3 register"
|
|
hexmask.long.tbyte 0x30 0.--23. 1. " VOLVAL3 ,Digital Volume Value for Channel 3"
|
|
line.long 0x34 "VOL4R_DVU0_3,DVU0_3 volume value setting 4 register"
|
|
hexmask.long.tbyte 0x34 0.--23. 1. " VOLVAL4 ,Digital Volume Value for Channel 4"
|
|
line.long 0x38 "VOL5R_DVU0_3,DVU0_3 volume value setting 5 register"
|
|
hexmask.long.tbyte 0x38 0.--23. 1. " VOLVAL5 ,Digital Volume Value for Channel 5"
|
|
line.long 0x3c "VOL6R_DVU0_3,DVU0_3 volume value setting 6 register"
|
|
hexmask.long.tbyte 0x3c 0.--23. 1. " VOLVAL6 ,Digital Volume Value for Channel 6"
|
|
line.long 0x40 "VOL7R_DVU0_3,DVU0_3 volume value setting 7 register"
|
|
hexmask.long.tbyte 0x40 0.--23. 1. " VOLVAL7 ,Digital Volume Value for Channel 7"
|
|
line.long 0x44 "DVUER_DVU0_3,DVU0_3 enable register"
|
|
bitfld.long 0x44 0. " DVUEN ,DVU register setting Enable" "Disabled,Enabled"
|
|
rgroup.long (0x1500+0x48)++0x3
|
|
line.long 0x00 "DVUSR_DVU0_3,DVU0_3 status register"
|
|
bitfld.long 0x00 23. " ZSTS7 ,Zero Cross Mute Status of Channel 7" "Not mute status,Mute status"
|
|
bitfld.long 0x00 22. " ZSTS6 ,Zero Cross Mute Status of Channel 6" "Not mute status,Mute status"
|
|
bitfld.long 0x00 21. " ZSTS5 ,Zero Cross Mute Status of Channel 5" "Not mute status,Mute status"
|
|
textline " "
|
|
bitfld.long 0x00 20. " ZSTS4 ,Zero Cross Mute Status of Channel 4" "Not mute status,Mute status"
|
|
bitfld.long 0x00 19. " ZSTS3 ,Zero Cross Mute Status of Channel 3" "Not mute status,Mute status"
|
|
bitfld.long 0x00 18. " ZSTS2 ,Zero Cross Mute Status of Channel 2" "Not mute status,Mute status"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ZSTS1 ,Zero Cross Mute Status of Channel 1" "Not mute status,Mute status"
|
|
bitfld.long 0x00 16. " ZSTS0 ,Zero Cross Mute Status of Channel 0" "Not mute status,Mute status"
|
|
bitfld.long 0x00 0.--2. " VRSTS ,Volume Ramp Status" "Mute status,Volume ramp down,Volume ramp up,Value of BRDBR register,Maintained,,,"
|
|
group.long (0x1500+0x4c)++0x3
|
|
line.long 0x00 "VEVMR_DVU0_3,DVU0_3 event mask register"
|
|
bitfld.long 0x00 31. " VEVMZCM7 ,Channel 7 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " VEVMZCM6 ,Channel 6 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " VEVMZCM5 ,Channel 5 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " VEVMZCM4 ,Channel 4 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " VEVMZCM3 ,Channel 3 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " VEVMZCM2 ,Channel 2 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " VEVMZCM1 ,Channel 1 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " VEVMZCM0 ,Channel 0 Zero Cross Mute Status Change Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " VEVMVR ,Volume Ramp Status Change" "Disabled,Enabled"
|
|
group.long (0x1500+0x54)++0x3
|
|
line.long 0x00 "VEVCR_DVU0_3,DVU0_3 event clear register"
|
|
bitfld.long 0x00 31. " VEVCZCM7 ,Channel 7 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 30. " VEVCZCM6 ,Channel 6 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 29. " VEVCZCM5 ,Channel 5 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x00 28. " VEVCZCM4 ,Channel 4 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 27. " VEVCZCM3 ,Channel 3 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 26. " VEVCZCM2 ,Channel 2 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
textline " "
|
|
bitfld.long 0x00 25. " VEVCZCM1 ,Channel 1 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 24. " VEVCZCM0 ,Channel 0 Zero Cross Mute Status Change Clear" "Cleared,Waiting"
|
|
bitfld.long 0x00 15. " VEVCVR ,Volume Ramp Status Change Clear" "Cleared,Waiting"
|
|
tree.end
|
|
tree "MIX Registers"
|
|
group.long 0x1600++0x13
|
|
line.long 0x00 "MIXIR_MIX0_0,MIX0_0 initialization register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization of Processing" "Processing State,Initialization"
|
|
line.long 0x04 "MADIR_MIX0_0,MIX0_0 audio information register"
|
|
bitfld.long 0x04 0.--3. " CHNUM ,Channel Number" "Zero,1 channel,2 channel,,4 channel,,6 channel,,8 channel,,,,,,,"
|
|
line.long 0x08 "MIXBR_MIX0_0,MIX0_0 bypass register"
|
|
bitfld.long 0x08 16.--17. " BPSYS ,Select Bypass System" "Input Data of system A,Input Data of system B,Input Data of system C,Input Data of system D"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x08 0. " BYPASS ,Bypass Mode" "MIX function used,SRC function is not used"
|
|
else
|
|
bitfld.long 0x08 0. " BYPASS ,Bypass Mode" "MIX function used,MIX function not used"
|
|
endif
|
|
line.long 0x0c "MIXMR_MIX0_0,MIX0_0 mode register"
|
|
bitfld.long 0x0c 0. " MIXMODE ,MIX mode" "Step mixer,Ramp mixer"
|
|
line.long 0x10 "MVPDR_MIX0_0,MIX0_0 volume period register"
|
|
bitfld.long 0x10 8.--11. " MXPDUP ,MIX Period for Volume Up" "128 dB/1 sample,64 dB/1 sample,32 dB/1 sample,16 dB/1 sample,8 dB/1 sample,4 dB/1 sample,2 dB/1 sample,1 dB/1 sample,0.5 dB/1 sample,0.25 dB/1 sample,0.125 dB/1 sample,,,,,"
|
|
bitfld.long 0x10 0.--3. " MXPDDW ,MIX Period for Volume Down" "-128 dB/1 sample,-64 dB/1 sample,-32 dB/1 sample,-16 dB/1 sample,-8 dB/1 sample,-4 dB/1 sample,-2 dB/1 sample,-1 dB/1 sample,-0.5 dB/1 sample,-0.25 dB/1 sample,-0.125 dB/1 sample,,,,,"
|
|
group.long 0x1614++0xf
|
|
line.long 0x0 "MDBAR_MIX0_0,MIX0_0 decibel A register"
|
|
hexmask.long.word 0x0 0.--9. 1. " MIXDBA ,dB of system A"
|
|
line.long 0x4 "MDBBR_MIX0_0,MIX0_0 decibel B register"
|
|
hexmask.long.word 0x4 0.--9. 1. " MIXDBB ,dB of system B"
|
|
line.long 0x8 "MDBCR_MIX0_0,MIX0_0 decibel C register"
|
|
hexmask.long.word 0x8 0.--9. 1. " MIXDBC ,dB of system C"
|
|
line.long 0xC "MDBDR_MIX0_0,MIX0_0 decibel D register"
|
|
hexmask.long.word 0xC 0.--9. 1. " MIXDBD ,dB of system D"
|
|
group.long 0x1624++0x3
|
|
line.long 0x00 "MDBER_MIX0_0,MIX0_0 decibel enable register"
|
|
bitfld.long 0x00 0. " MIXDBEN ,MIX dB Enable" "Disabled,Enabled"
|
|
rgroup.long 0x1628++0x3
|
|
line.long 0x0 "MIXSR_MIX0_0,MIX0_0 status register"
|
|
bitfld.long 0x00 0.--1. " MIXSTS ,MIX Status" "Ramp process is stable,Ramp down,Ramp up,"
|
|
tree.end
|
|
tree "CIM Registers"
|
|
group.long 0x1700++0x7
|
|
line.long 0x00 "SWRSR_CIM,Software reset register"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "SCUX is reset,SCUX is operating"
|
|
else
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,Operating state"
|
|
endif
|
|
line.long 0x04 "DMACR_CIM,DMA control register"
|
|
bitfld.long 0x04 7. " DMAMDFFU3 ,FFU0_3 DMA Mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " DMAMDFFU2 ,FFU0_2 DMA Mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " DMAMDFFU1 ,FFU0_1 DMA Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " DMAMDFFU0 ,FFU0_0 DMA Mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " DMAMDFFD3 ,FFD0_3 DMA Mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " DMAMDFFD2 ,FFD0_2 DMA Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " DMAMDFFD1 ,FFD0_1 DMA Mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " DMAMDFFD0 ,FFD0_0 DMA Mode" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
if ((per.l(ad:0xE8208800+0x8)&15.)==3.)
|
|
wgroup.long 0x1708++0xf
|
|
line.long 0x0 "DMATD0_CIM,DMA transfer register for FFD0_0 RAM"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. " WRITE_DATA ,data to be transmitted to FFD0_0"
|
|
line.long 0x4 "DMATD1_CIM,DMA transfer register for FFD0_1 RAM"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. " WRITE_DATA ,data to be transmitted to FFD0_1"
|
|
line.long 0x8 "DMATD2_CIM,DMA transfer register for FFD0_2 RAM"
|
|
hexmask.long.tbyte 0x8 8.--31. 1. " WRITE_DATA ,data to be transmitted to FFD0_2"
|
|
line.long 0xC "DMATD3_CIM,DMA transfer register for FFD0_3 RAM"
|
|
hexmask.long.tbyte 0xC 8.--31. 1. " WRITE_DATA ,data to be transmitted to FFD0_3"
|
|
elif ((per.l(ad:0xE8208800+0x8)&15.)==4.)
|
|
wgroup.word 0x170A++0x01
|
|
line.word 0x00 "DMATD0_CIM,DMA transfer register for FFD0_0 RAM"
|
|
hexmask.word 0x00 0.--15. 1. " WRITE_DATA ,data to be transmitted to FFD0_0"
|
|
wgroup.word 0x170E++0x01
|
|
line.word 0x00 "DMATD1_CIM,DMA transfer register for FFD0_1 RAM"
|
|
hexmask.word 0x00 0.--15. 1. " WRITE_DATA ,data to be transmitted to FFD0_1"
|
|
wgroup.word 0x1712++0x01
|
|
line.word 0x00 "DMATD2_CIM,DMA transfer register for FFD0_2 RAM"
|
|
hexmask.word 0x00 0.--15. 1. " WRITE_DATA ,data to be transmitted to FFD0_2"
|
|
wgroup.word 0x1716++0x01
|
|
line.word 0x00 "DMATD3_CIM,DMA transfer register for FFD0_3 RAM"
|
|
hexmask.word 0x00 0.--15. 1. " WRITE_DATA ,data to be transmitted to FFD0_3"
|
|
endif
|
|
else
|
|
if ((per.l(ad:0xE8208800+0x8)&15.)==3.)
|
|
wgroup.long 0x1708++0xf
|
|
line.long 0x0 "DMATD0_CIM,DMA transfer register for FFD0_0 RAM"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. " WRITE_DATA ,data to be transmitted to FFD0_0"
|
|
line.long 0x4 "DMATD1_CIM,DMA transfer register for FFD0_1 RAM"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. " WRITE_DATA ,data to be transmitted to FFD0_1"
|
|
line.long 0x8 "DMATD2_CIM,DMA transfer register for FFD0_2 RAM"
|
|
hexmask.long.tbyte 0x8 8.--31. 1. " WRITE_DATA ,data to be transmitted to FFD0_2"
|
|
line.long 0xC "DMATD3_CIM,DMA transfer register for FFD0_3 RAM"
|
|
hexmask.long.tbyte 0xC 8.--31. 1. " WRITE_DATA ,data to be transmitted to FFD0_3"
|
|
elif ((per.l(ad:0xE8208800+0x8)&15.)==4.)
|
|
wgroup.word 0x1708++0xf
|
|
line.word 0x0 "DMATD0_CIM,DMA transfer register for FFD0_0 RAM"
|
|
hexmask.word 0x0 0.--15. 1. " WRITE_DATA ,data to be transmitted to FFD0_0"
|
|
line.word 0x4 "DMATD1_CIM,DMA transfer register for FFD0_1 RAM"
|
|
hexmask.word 0x4 0.--15. 1. " WRITE_DATA ,data to be transmitted to FFD0_1"
|
|
line.word 0x8 "DMATD2_CIM,DMA transfer register for FFD0_2 RAM"
|
|
hexmask.word 0x8 0.--15. 1. " WRITE_DATA ,data to be transmitted to FFD0_2"
|
|
line.word 0xC "DMATD3_CIM,DMA transfer register for FFD0_3 RAM"
|
|
hexmask.word 0xC 0.--15. 1. " WRITE_DATA ,data to be transmitted to FFD0_3"
|
|
endif
|
|
endif
|
|
rgroup.long 0x1718++0xf
|
|
line.long 0x0 "DMATU0_CIM,DMA transfer register for FFU0_0 RAM"
|
|
line.long 0x4 "DMATU1_CIM,DMA transfer register for FFU0_1 RAM"
|
|
line.long 0x8 "DMATU2_CIM,DMA transfer register for FFU0_2 RAM"
|
|
line.long 0xC "DMATU3_CIM,DMA transfer register for FFU0_3 RAM"
|
|
sif (cpu()=="R7S721021")
|
|
if (((per.l(ad:0xE8208800+0x75))&0x8)!=0x0)
|
|
group.long 0x1738++0x3
|
|
line.long 0x00 "SSIRSEL_CIM,SSI route select register"
|
|
bitfld.long 0x00 30.--31. " SISEL3 ,SRC3 SSIF Input Select" "SSIF2,..."
|
|
bitfld.long 0x00 28.--29. " SISEL2 ,SRC32SSIF Input Select" "SSIF1,..."
|
|
bitfld.long 0x00 26.--27. " SISEL1 ,SRC1 SSIF Input Select" "SSIF3,..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " SISEL0 ,SRC0 SSIF Input Select" "SSIF0,SSIF012,..."
|
|
bitfld.long 0x00 12.--13. " SOSEL3 ,SSIF3 Output Select" "SRC1,SRC0,MIX,"
|
|
bitfld.long 0x00 8.--9. " SOSEL2 ,SSIF2 Output Select" "SRC3,SRC0,SRC1,MIX"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " SOSEL1 ,SSIF1 Output Select" "SRC2,SRC0,SRC1,MIX"
|
|
bitfld.long 0x00 0.--1. " SOSEL0 ,SSIF0 Output Select" "SRC0,SRC1,MIX,"
|
|
else
|
|
group.long 0x1738++0x3
|
|
line.long 0x00 "SSIRSEL_CIM,SSI route select register"
|
|
bitfld.long 0x00 30.--31. " SISEL3 ,SRC3 SSIF Input Select" "SSIF2,..."
|
|
bitfld.long 0x00 28.--29. " SISEL2 ,SRC32SSIF Input Select" "SSIF1,..."
|
|
bitfld.long 0x00 26.--27. " SISEL1 ,SRC1 SSIF Input Select" "SSIF3,..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " SISEL0 ,SRC0 SSIF Input Select" "SSIF0,SSIF012,..."
|
|
bitfld.long 0x00 12.--13. " SOSEL3 ,SSIF3 Output Select" "SRC1,SRC0,MIX,"
|
|
bitfld.long 0x00 8.--9. " SOSEL2 ,SSIF2 Output Select" "SRC3,..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " SOSEL1 ,SSIF1 Output Select" "SRC2,..."
|
|
bitfld.long 0x00 0.--1. " SOSEL0 ,SSIF0 Output Select" "SRC0,SRC1,MIX,"
|
|
endif
|
|
else
|
|
group.long 0x1738++0x3
|
|
line.long 0x00 "SSIRSEL_CIM,SSI route select register"
|
|
bitfld.long 0x00 30.--31. " SISEL3 ,SRC3 SSIF Input Select" "SSIF2,SSIF5,..."
|
|
bitfld.long 0x00 28.--29. " SISEL2 ,SRC32SSIF Input Select" "SSIF1,SSIF4,..."
|
|
bitfld.long 0x00 26.--27. " SISEL1 ,SRC1 SSIF Input Select" "SSIF3,SSIF345,..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " SISEL0 ,SRC0 SSIF Input Select" "SSIF0,SSIF012,..."
|
|
bitfld.long 0x00 20.--21. " SOSEL5 ,SSIF5 Output Select" "SRC3,SRC1,SRC0,MIX"
|
|
bitfld.long 0x00 17.--18. " SOSEL4 ,SSIF4 Output Select" "SRC2,SRC1,SRC0,MIX"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " SOSEL3 ,SSIF3 Output Select" "SRC1,SRC0,MIX,"
|
|
bitfld.long 0x00 8.--9. " SOSEL2 ,SSIF2 Output Select" "SRC3,SRC0,SRC1,MIX"
|
|
bitfld.long 0x00 4.--5. " SOSEL1 ,SSIF1 Output Select" "SRC2,SRC0,SRC1,MIX"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " SOSEL0 ,SSIF0 Output Select" "SRC0,SRC1,MIX,"
|
|
endif
|
|
group.long 0x173c++0xf
|
|
line.long 0x0 "FDTSEL0_CIM,FFD0_0 timing select register"
|
|
hexmask.long.word 0x0 16.--26. 1. " SCKDIV ,Division Ratio"
|
|
bitfld.long 0x0 8. " DIVEN ,Division Enable" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x0 0.--3. " SCKSEL ,Clock select" "AUDIO_CLK,AUIDIO_X1 input,MLB_CLK,USB_X1,Peripheral clock/2,,,,WS signal of SSIF0,WS signal of SSIF1,WS signal of SSIF2,WS signal of SSIF3,..."
|
|
else
|
|
bitfld.long 0x0 0.--3. " SCKSEL ,Clock select" "AUDIO_CLK,AUIDIO_X1 input,MLB_CLK,USB_X1,Peripheral clock/2,,,,WS signal of SSIF0,WS signal of SSIF1,WS signal of SSIF2,WS signal of SSIF3,WS signal of SSIF4,WS signal of SSIF5,,"
|
|
endif
|
|
line.long 0x4 "FDTSEL1_CIM,FFD0_1 timing select register"
|
|
hexmask.long.word 0x4 16.--26. 1. " SCKDIV ,Division Ratio"
|
|
bitfld.long 0x4 8. " DIVEN ,Division Enable" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x4 0.--3. " SCKSEL ,Clock select" "AUDIO_CLK,AUIDIO_X1 input,MLB_CLK,USB_X1,Peripheral clock/2,,,,WS signal of SSIF0,WS signal of SSIF1,WS signal of SSIF2,WS signal of SSIF3,..."
|
|
else
|
|
bitfld.long 0x4 0.--3. " SCKSEL ,Clock select" "AUDIO_CLK,AUIDIO_X1 input,MLB_CLK,USB_X1,Peripheral clock/2,,,,WS signal of SSIF0,WS signal of SSIF1,WS signal of SSIF2,WS signal of SSIF3,WS signal of SSIF4,WS signal of SSIF5,,"
|
|
endif
|
|
line.long 0x8 "FDTSEL2_CIM,FFD0_2 timing select register"
|
|
hexmask.long.word 0x8 16.--26. 1. " SCKDIV ,Division Ratio"
|
|
bitfld.long 0x8 8. " DIVEN ,Division Enable" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0x8 0.--3. " SCKSEL ,Clock select" "AUDIO_CLK,AUIDIO_X1 input,MLB_CLK,USB_X1,Peripheral clock/2,,,,WS signal of SSIF0,WS signal of SSIF1,WS signal of SSIF2,WS signal of SSIF3,..."
|
|
else
|
|
bitfld.long 0x8 0.--3. " SCKSEL ,Clock select" "AUDIO_CLK,AUIDIO_X1 input,MLB_CLK,USB_X1,Peripheral clock/2,,,,WS signal of SSIF0,WS signal of SSIF1,WS signal of SSIF2,WS signal of SSIF3,WS signal of SSIF4,WS signal of SSIF5,,"
|
|
endif
|
|
line.long 0xC "FDTSEL3_CIM,FFD0_3 timing select register"
|
|
hexmask.long.word 0xC 16.--26. 1. " SCKDIV ,Division Ratio"
|
|
bitfld.long 0xC 8. " DIVEN ,Division Enable" "Disabled,Enabled"
|
|
sif (cpu()=="R7S721021")
|
|
bitfld.long 0xC 0.--3. " SCKSEL ,Clock select" "AUDIO_CLK,AUIDIO_X1 input,MLB_CLK,USB_X1,Peripheral clock/2,,,,WS signal of SSIF0,WS signal of SSIF1,WS signal of SSIF2,WS signal of SSIF3,..."
|
|
else
|
|
bitfld.long 0xC 0.--3. " SCKSEL ,Clock select" "AUDIO_CLK,AUIDIO_X1 input,MLB_CLK,USB_X1,Peripheral clock/2,,,,WS signal of SSIF0,WS signal of SSIF1,WS signal of SSIF2,WS signal of SSIF3,WS signal of SSIF4,WS signal of SSIF5,,"
|
|
endif
|
|
sif (cpu()=="R7S721021")
|
|
wgroup.long 0x174c++0xf
|
|
line.long 0x0 "FUTSEL0_CIM,FFU0_0 timing select register"
|
|
hexmask.long.word 0x0 16.--26. 1. " SCKDIV ,Division Ratio"
|
|
bitfld.long 0x0 8. " DIVEN ,Division Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0.--3. " SCKSEL ,Clock select" "AUDIO_CLK,AUIDIO_X1 input,MLB_CLK,USB_X1,Peripheral clock/2,,,,WS signal of SSIF0,WS signal of SSIF1,WS signal of SSIF2,WS signal of SSIF3,..."
|
|
line.long 0x4 "FUTSEL1_CIM,FFU0_1 timing select register"
|
|
hexmask.long.word 0x4 16.--26. 1. " SCKDIV ,Division Ratio"
|
|
bitfld.long 0x4 8. " DIVEN ,Division Enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 0.--3. " SCKSEL ,Clock select" "AUDIO_CLK,AUIDIO_X1 input,MLB_CLK,USB_X1,Peripheral clock/2,,,,WS signal of SSIF0,WS signal of SSIF1,WS signal of SSIF2,WS signal of SSIF3,..."
|
|
line.long 0x8 "FUTSEL2_CIM,FFU0_2 timing select register"
|
|
hexmask.long.word 0x8 16.--26. 1. " SCKDIV ,Division Ratio"
|
|
bitfld.long 0x8 8. " DIVEN ,Division Enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 0.--3. " SCKSEL ,Clock select" "AUDIO_CLK,AUIDIO_X1 input,MLB_CLK,USB_X1,Peripheral clock/2,,,,WS signal of SSIF0,WS signal of SSIF1,WS signal of SSIF2,WS signal of SSIF3,..."
|
|
line.long 0xC "FUTSEL3_CIM,FFU0_3 timing select register"
|
|
hexmask.long.word 0xC 16.--26. 1. " SCKDIV ,Division Ratio"
|
|
bitfld.long 0xC 8. " DIVEN ,Division Enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 0.--3. " SCKSEL ,Clock select" "AUDIO_CLK,AUIDIO_X1 input,MLB_CLK,USB_X1,Peripheral clock/2,,,,WS signal of SSIF0,WS signal of SSIF1,WS signal of SSIF2,WS signal of SSIF3,..."
|
|
else
|
|
wgroup.long 0x174c++0xf
|
|
line.long 0x0 "FUTSEL0_CIM,FFU0_0 timing select register"
|
|
hexmask.long.word 0x0 16.--26. 1. " SCKDIV ,Division Ratio"
|
|
bitfld.long 0x0 8. " DIVEN ,Division Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0.--3. " SCKSEL ,Clock select" "AUDIO_CLK,AUIDIO_X1 input,MLB_CLK,USB_X1,Peripheral clock/2,,,,WS signal of SSIF0,WS signal of SSIF1,WS signal of SSIF2,WS signal of SSIF3,WS signal of SSIF4,WS signal of SSIF5,,"
|
|
line.long 0x4 "FUTSEL1_CIM,FFU0_1 timing select register"
|
|
hexmask.long.word 0x4 16.--26. 1. " SCKDIV ,Division Ratio"
|
|
bitfld.long 0x4 8. " DIVEN ,Division Enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 0.--3. " SCKSEL ,Clock select" "AUDIO_CLK,AUIDIO_X1 input,MLB_CLK,USB_X1,Peripheral clock/2,,,,WS signal of SSIF0,WS signal of SSIF1,WS signal of SSIF2,WS signal of SSIF3,WS signal of SSIF4,WS signal of SSIF5,,"
|
|
line.long 0x8 "FUTSEL2_CIM,FFU0_2 timing select register"
|
|
hexmask.long.word 0x8 16.--26. 1. " SCKDIV ,Division Ratio"
|
|
bitfld.long 0x8 8. " DIVEN ,Division Enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 0.--3. " SCKSEL ,Clock select" "AUDIO_CLK,AUIDIO_X1 input,MLB_CLK,USB_X1,Peripheral clock/2,,,,WS signal of SSIF0,WS signal of SSIF1,WS signal of SSIF2,WS signal of SSIF3,WS signal of SSIF4,WS signal of SSIF5,,"
|
|
line.long 0xC "FUTSEL3_CIM,FFU0_3 timing select register"
|
|
hexmask.long.word 0xC 16.--26. 1. " SCKDIV ,Division Ratio"
|
|
bitfld.long 0xC 8. " DIVEN ,Division Enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 0.--3. " SCKSEL ,Clock select" "AUDIO_CLK,AUIDIO_X1 input,MLB_CLK,USB_X1,Peripheral clock/2,,,,WS signal of SSIF0,WS signal of SSIF1,WS signal of SSIF2,WS signal of SSIF3,WS signal of SSIF4,WS signal of SSIF5,,"
|
|
endif
|
|
group.long 0x175c++0x3
|
|
line.long 0x00 "SSIPMD_CIM,SSI pin mode register"
|
|
sif (cpu()!="R7S721021")
|
|
bitfld.long 0x00 21. " SSI5CKS ,SSIF5 Clock Select" "AUDIO_CLK input,MLB_CLK input"
|
|
bitfld.long 0x00 20. " SSI4CKS ,SSIF4 Clock Select" "AUDIO_CLK input,MLB_CLK input"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 19. " SSI3CKS ,SSIF3 Clock Select" "AUDIO_CLK input,MLB_CLK input"
|
|
bitfld.long 0x00 18. " SSI2CKS ,SSIF2 Clock Select" "AUDIO_CLK input,MLB_CLK input"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SSI1CKS ,SSIF1 Clock Select" "AUDIO_CLK input,MLB_CLK input"
|
|
bitfld.long 0x00 16. " SSI0CKS ,SSIF0 Clock Select" "AUDIO_CLK input,MLB_CLK input"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " SSI3PMD ,SSIF3 Pin Mode" "Pins are used independently,Used in common(SSFI0 and SSFI3 are slaves),Used in common(SSFI0 is master),"
|
|
textline " "
|
|
sif (cpu()!="R7S721021")
|
|
bitfld.long 0x00 12. " SSI345EN ,SSIF345 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SSI4PMD ,SSIF4 Pin Mod" "Pins are used independently,Used in common(SSFI3 and SSFI5 are slaves),Used in common(SSFI3 is master),"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 4. " SSI012EN ,SSIF012 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " SSI2PMD ,SSIF2 Pin Mode" "Pins are used independently,Used in common(SSFI0 and SSFI2 are slaves),Used in common(SSFI0 is master),"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " SSI1PMD ,SSIF2 Pin Mode" "Pins are used independently,Used in common(SSFI0 and SSFI1 are slaves),Used in common(SSFI0 is master),"
|
|
wgroup.long 0x1760++0x3
|
|
line.long 0x00 "SSICTRL_CIM,SSI control register"
|
|
bitfld.long 0x00 30. " SSI3TX ,SSIF3 Direct Transmission" "Disabled,Enabled"
|
|
sif (cpu()!="R7S721021")
|
|
bitfld.long 0x00 29. " SSI4TX ,SSIF4 Direct Transmission" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " SSI5TX ,SSIF6 Direct Transmission" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SSI3RX ,SSIF6 Direct Reception" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 26. " SSI3RX ,SSIF3 Direct Reception" "Disabled,Enabled"
|
|
endif
|
|
sif (cpu()!="R7S721021")
|
|
bitfld.long 0x00 25. " SSI4RX ,SSIF6 Direct Reception" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SSI5RX ,SSIF6 Direct Reception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SSI345TEN ,SSIF345 Transmission Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SSI345REN ,SSIF345 Reception Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SSI0TX ,SSIF0 Direct Transmission" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 14. " SSI0TX ,SSIF0 Direct Transmission" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 13. " SSI1TX ,SSIF1 Direct Transmission" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " SSI2TX ,SSIF2 Direct Transmission" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " SSI0RX ,SSIF0 Direct Reception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SSI1RX ,SSIF1 Direct Reception" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SSI2RX ,SSIF2 Direct Reception" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SSI012TEN ,SSIF012 Transmission Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SSI012REN ,SSIF012 Reception Enable" "Disabled,Enabled"
|
|
group.long 0x1764++0xf
|
|
line.long 0x0 "SRCRSEL0_CIM,SRC0 route select register"
|
|
bitfld.long 0x0 28.--30. " PLACE7 ,Place 7" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 24.--26. " PLACE6 ,Place 6" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--22. " PLACE5 ,Place 5" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x0 16.--18. " PLACE4 ,Place 4" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 12.--14. " PLACE3 ,Place 3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 8.--10. " PLACE2 ,Place 2" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x0 4.--6. " PLACE1 ,Place 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. " PLACE0 ,Place 0" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "SRCRSEL1_CIM,SRC1 route select register"
|
|
bitfld.long 0x4 28.--30. " PLACE7 ,Place 7" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 24.--26. " PLACE6 ,Place 6" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 20.--22. " PLACE5 ,Place 5" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x4 16.--18. " PLACE4 ,Place 4" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 12.--14. " PLACE3 ,Place 3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 8.--10. " PLACE2 ,Place 2" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x4 4.--6. " PLACE1 ,Place 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 0.--2. " PLACE0 ,Place 0" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "SRCRSEL2_CIM,SRC2 route select register"
|
|
bitfld.long 0x8 28.--30. " PLACE7 ,Place 7" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 24.--26. " PLACE6 ,Place 6" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 20.--22. " PLACE5 ,Place 5" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x8 16.--18. " PLACE4 ,Place 4" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 12.--14. " PLACE3 ,Place 3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 8.--10. " PLACE2 ,Place 2" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x8 4.--6. " PLACE1 ,Place 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. " PLACE0 ,Place 0" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "SRCRSEL3_CIM,SRC3 route select register"
|
|
bitfld.long 0xC 28.--30. " PLACE7 ,Place 7" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 24.--26. " PLACE6 ,Place 6" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 20.--22. " PLACE5 ,Place 5" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0xC 16.--18. " PLACE4 ,Place 4" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 12.--14. " PLACE3 ,Place 3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 8.--10. " PLACE2 ,Place 2" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0xC 4.--6. " PLACE1 ,Place 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 0.--2. " PLACE0 ,Place 0" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1774++0x3
|
|
line.long 0x00 "MIXRSEL_CIM,MIX route select register"
|
|
bitfld.long 0x00 28.--30. " PLACE7 ,Place 7" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--26. " PLACE6 ,Place 6" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--22. " PLACE5 ,Place 5" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " PLACE4 ,Place 4" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " PLACE3 ,Place 3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " PLACE2 ,Place 2" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " PLACE1 ,Place 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " PLACE0 ,Place 0" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree.end
|
|
tree.open "SG (Sound generator)"
|
|
tree "SG 0"
|
|
base ad:0xFCFF4800
|
|
width 10.
|
|
group.byte 0x00++0x05
|
|
line.byte 0x00 "SGCR1_0,Sound Generator Control Register 1_0"
|
|
bitfld.byte 0x00 7. " SGST ,Operation Start" "Stopped,Started"
|
|
bitfld.byte 0x00 6. " STPM ,Stop Procedure Select" "When SGST = 0,When SGST=0 and SGDEF=1"
|
|
bitfld.byte 0x00 3.--4. " SGCK ,Clock Select" "P0/2,P0/4,P0/8,P0/16"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " DPF ,Attenuator Function Select" "Off,TONE frequency,TONE frequency/2,TONE frequency/4,TONE frequency/8,TONE frequency/16,TONE frequency/32,?..."
|
|
line.byte 0x01 "SGSR0,Sound Generator Control Status Register"
|
|
bitfld.byte 0x01 7. " SGIE ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 6. " SGDEF ,Attenuation End Flag" "Disabled,Enabled"
|
|
line.byte 0x02 "SGCR2_0,Sound Generator Control Register 2_0"
|
|
bitfld.byte 0x02 7. " SGEND ,Stop" "Not stopped,Stopped"
|
|
bitfld.byte 0x02 6. " TCHG ,ATONE Change Protect" "Disabled,Enabled"
|
|
line.byte 0x03 "SGLR0,Sound generator loudness Register 0"
|
|
bitfld.byte 0x3 7. " LD7 ,Loudness Data 7" "0,1"
|
|
bitfld.byte 0x3 6. " LD6 ,Loudness Data 6" "0,1"
|
|
bitfld.byte 0x3 5. " LD5 ,Loudness Data 5" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x3 4. " LD4 ,Loudness Data 4" "0,1"
|
|
bitfld.byte 0x3 3. " LD3 ,Loudness Data 3" "0,1"
|
|
bitfld.byte 0x3 2. " LD2 ,Loudness Data 2" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x3 1. " LD1 ,Loudness Data 1" "0,1"
|
|
bitfld.byte 0x3 0. " LD0 ,Loudness Data 0" "0,1"
|
|
line.byte 0x04 "SGTFR_0,Sound generator tone frequency Register 0"
|
|
bitfld.byte 0x4 6. " TONE6 ,Tone Frequency Setting 6" "0,1"
|
|
bitfld.byte 0x4 5. " TONE5 ,Tone Frequency Setting 5" "0,1"
|
|
bitfld.byte 0x4 4. " TONE4 ,Tone Frequency Setting 4" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x4 3. " TONE3 ,Tone Frequency Setting 3" "0,1"
|
|
bitfld.byte 0x4 2. " TONE2 ,Tone Frequency Setting 2" "0,1"
|
|
bitfld.byte 0x4 1. " TONE1 ,Tone Frequency Setting 1" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x4 0. " TONE0 ,Tone Frequency Setting 0" "0,1"
|
|
line.byte 0x05 "SGSFR_0,Sound generator reference frequency Register 0"
|
|
bitfld.byte 0x5 7. " SFS7 ,Reference Frequency Setting 7" "0,1"
|
|
bitfld.byte 0x5 6. " SFS6 ,Reference Frequency Setting 6" "0,1"
|
|
bitfld.byte 0x5 5. " SFS5 ,Reference Frequency Setting 5" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x5 4. " SFS4 ,Reference Frequency Setting 4" "0,1"
|
|
bitfld.byte 0x5 3. " SFS3 ,Reference Frequency Setting 3" "0,1"
|
|
bitfld.byte 0x5 2. " SFS2 ,Reference Frequency Setting 2" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x5 1. " SFS1 ,Reference Frequency Setting 1" "0,1"
|
|
bitfld.byte 0x5 0. " SFS0 ,Reference Frequency Setting 0" "0,1"
|
|
width 12.
|
|
tree.end
|
|
tree "SG 1"
|
|
base ad:0xFCFF4A00
|
|
width 10.
|
|
group.byte 0x00++0x05
|
|
line.byte 0x00 "SGCR1_1,Sound Generator Control Register 1_1"
|
|
bitfld.byte 0x00 7. " SGST ,Operation Start" "Stopped,Started"
|
|
bitfld.byte 0x00 6. " STPM ,Stop Procedure Select" "When SGST = 0,When SGST=0 and SGDEF=1"
|
|
bitfld.byte 0x00 3.--4. " SGCK ,Clock Select" "P0/2,P0/4,P0/8,P0/16"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " DPF ,Attenuator Function Select" "Off,TONE frequency,TONE frequency/2,TONE frequency/4,TONE frequency/8,TONE frequency/16,TONE frequency/32,?..."
|
|
line.byte 0x01 "SGSR1,Sound Generator Control Status Register"
|
|
bitfld.byte 0x01 7. " SGIE ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 6. " SGDEF ,Attenuation End Flag" "Disabled,Enabled"
|
|
line.byte 0x02 "SGCR2_1,Sound Generator Control Register 2_1"
|
|
bitfld.byte 0x02 7. " SGEND ,Stop" "Not stopped,Stopped"
|
|
bitfld.byte 0x02 6. " TCHG ,ATONE Change Protect" "Disabled,Enabled"
|
|
line.byte 0x03 "SGLR1,Sound generator loudness Register 1"
|
|
bitfld.byte 0x3 7. " LD7 ,Loudness Data 7" "0,1"
|
|
bitfld.byte 0x3 6. " LD6 ,Loudness Data 6" "0,1"
|
|
bitfld.byte 0x3 5. " LD5 ,Loudness Data 5" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x3 4. " LD4 ,Loudness Data 4" "0,1"
|
|
bitfld.byte 0x3 3. " LD3 ,Loudness Data 3" "0,1"
|
|
bitfld.byte 0x3 2. " LD2 ,Loudness Data 2" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x3 1. " LD1 ,Loudness Data 1" "0,1"
|
|
bitfld.byte 0x3 0. " LD0 ,Loudness Data 0" "0,1"
|
|
line.byte 0x04 "SGTFR_1,Sound generator tone frequency Register 1"
|
|
bitfld.byte 0x4 6. " TONE6 ,Tone Frequency Setting 6" "0,1"
|
|
bitfld.byte 0x4 5. " TONE5 ,Tone Frequency Setting 5" "0,1"
|
|
bitfld.byte 0x4 4. " TONE4 ,Tone Frequency Setting 4" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x4 3. " TONE3 ,Tone Frequency Setting 3" "0,1"
|
|
bitfld.byte 0x4 2. " TONE2 ,Tone Frequency Setting 2" "0,1"
|
|
bitfld.byte 0x4 1. " TONE1 ,Tone Frequency Setting 1" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x4 0. " TONE0 ,Tone Frequency Setting 0" "0,1"
|
|
line.byte 0x05 "SGSFR_1,Sound generator reference frequency Register 1"
|
|
bitfld.byte 0x5 7. " SFS7 ,Reference Frequency Setting 7" "0,1"
|
|
bitfld.byte 0x5 6. " SFS6 ,Reference Frequency Setting 6" "0,1"
|
|
bitfld.byte 0x5 5. " SFS5 ,Reference Frequency Setting 5" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x5 4. " SFS4 ,Reference Frequency Setting 4" "0,1"
|
|
bitfld.byte 0x5 3. " SFS3 ,Reference Frequency Setting 3" "0,1"
|
|
bitfld.byte 0x5 2. " SFS2 ,Reference Frequency Setting 2" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x5 1. " SFS1 ,Reference Frequency Setting 1" "0,1"
|
|
bitfld.byte 0x5 0. " SFS0 ,Reference Frequency Setting 0" "0,1"
|
|
width 12.
|
|
tree.end
|
|
tree "SG 2"
|
|
base ad:0xFCFF4C00
|
|
width 10.
|
|
group.byte 0x00++0x05
|
|
line.byte 0x00 "SGCR1_2,Sound Generator Control Register 1_2"
|
|
bitfld.byte 0x00 7. " SGST ,Operation Start" "Stopped,Started"
|
|
bitfld.byte 0x00 6. " STPM ,Stop Procedure Select" "When SGST = 0,When SGST=0 and SGDEF=1"
|
|
bitfld.byte 0x00 3.--4. " SGCK ,Clock Select" "P0/2,P0/4,P0/8,P0/16"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " DPF ,Attenuator Function Select" "Off,TONE frequency,TONE frequency/2,TONE frequency/4,TONE frequency/8,TONE frequency/16,TONE frequency/32,?..."
|
|
line.byte 0x01 "SGSR2,Sound Generator Control Status Register"
|
|
bitfld.byte 0x01 7. " SGIE ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 6. " SGDEF ,Attenuation End Flag" "Disabled,Enabled"
|
|
line.byte 0x02 "SGCR2_2,Sound Generator Control Register 2_2"
|
|
bitfld.byte 0x02 7. " SGEND ,Stop" "Not stopped,Stopped"
|
|
bitfld.byte 0x02 6. " TCHG ,ATONE Change Protect" "Disabled,Enabled"
|
|
line.byte 0x03 "SGLR2,Sound generator loudness Register 2"
|
|
bitfld.byte 0x3 7. " LD7 ,Loudness Data 7" "0,1"
|
|
bitfld.byte 0x3 6. " LD6 ,Loudness Data 6" "0,1"
|
|
bitfld.byte 0x3 5. " LD5 ,Loudness Data 5" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x3 4. " LD4 ,Loudness Data 4" "0,1"
|
|
bitfld.byte 0x3 3. " LD3 ,Loudness Data 3" "0,1"
|
|
bitfld.byte 0x3 2. " LD2 ,Loudness Data 2" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x3 1. " LD1 ,Loudness Data 1" "0,1"
|
|
bitfld.byte 0x3 0. " LD0 ,Loudness Data 0" "0,1"
|
|
line.byte 0x04 "SGTFR_2,Sound generator tone frequency Register 2"
|
|
bitfld.byte 0x4 6. " TONE6 ,Tone Frequency Setting 6" "0,1"
|
|
bitfld.byte 0x4 5. " TONE5 ,Tone Frequency Setting 5" "0,1"
|
|
bitfld.byte 0x4 4. " TONE4 ,Tone Frequency Setting 4" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x4 3. " TONE3 ,Tone Frequency Setting 3" "0,1"
|
|
bitfld.byte 0x4 2. " TONE2 ,Tone Frequency Setting 2" "0,1"
|
|
bitfld.byte 0x4 1. " TONE1 ,Tone Frequency Setting 1" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x4 0. " TONE0 ,Tone Frequency Setting 0" "0,1"
|
|
line.byte 0x05 "SGSFR_2,Sound generator reference frequency Register 2"
|
|
bitfld.byte 0x5 7. " SFS7 ,Reference Frequency Setting 7" "0,1"
|
|
bitfld.byte 0x5 6. " SFS6 ,Reference Frequency Setting 6" "0,1"
|
|
bitfld.byte 0x5 5. " SFS5 ,Reference Frequency Setting 5" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x5 4. " SFS4 ,Reference Frequency Setting 4" "0,1"
|
|
bitfld.byte 0x5 3. " SFS3 ,Reference Frequency Setting 3" "0,1"
|
|
bitfld.byte 0x5 2. " SFS2 ,Reference Frequency Setting 2" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x5 1. " SFS1 ,Reference Frequency Setting 1" "0,1"
|
|
bitfld.byte 0x5 0. " SFS0 ,Reference Frequency Setting 0" "0,1"
|
|
width 12.
|
|
tree.end
|
|
tree "SG 3"
|
|
base ad:0xFCFF4E00
|
|
width 10.
|
|
group.byte 0x00++0x05
|
|
line.byte 0x00 "SGCR1_3,Sound Generator Control Register 1_3"
|
|
bitfld.byte 0x00 7. " SGST ,Operation Start" "Stopped,Started"
|
|
bitfld.byte 0x00 6. " STPM ,Stop Procedure Select" "When SGST = 0,When SGST=0 and SGDEF=1"
|
|
bitfld.byte 0x00 3.--4. " SGCK ,Clock Select" "P0/2,P0/4,P0/8,P0/16"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " DPF ,Attenuator Function Select" "Off,TONE frequency,TONE frequency/2,TONE frequency/4,TONE frequency/8,TONE frequency/16,TONE frequency/32,?..."
|
|
line.byte 0x01 "SGSR3,Sound Generator Control Status Register"
|
|
bitfld.byte 0x01 7. " SGIE ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 6. " SGDEF ,Attenuation End Flag" "Disabled,Enabled"
|
|
line.byte 0x02 "SGCR2_3,Sound Generator Control Register 2_3"
|
|
bitfld.byte 0x02 7. " SGEND ,Stop" "Not stopped,Stopped"
|
|
bitfld.byte 0x02 6. " TCHG ,ATONE Change Protect" "Disabled,Enabled"
|
|
line.byte 0x03 "SGLR3,Sound generator loudness Register 3"
|
|
bitfld.byte 0x3 7. " LD7 ,Loudness Data 7" "0,1"
|
|
bitfld.byte 0x3 6. " LD6 ,Loudness Data 6" "0,1"
|
|
bitfld.byte 0x3 5. " LD5 ,Loudness Data 5" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x3 4. " LD4 ,Loudness Data 4" "0,1"
|
|
bitfld.byte 0x3 3. " LD3 ,Loudness Data 3" "0,1"
|
|
bitfld.byte 0x3 2. " LD2 ,Loudness Data 2" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x3 1. " LD1 ,Loudness Data 1" "0,1"
|
|
bitfld.byte 0x3 0. " LD0 ,Loudness Data 0" "0,1"
|
|
line.byte 0x04 "SGTFR_3,Sound generator tone frequency Register 3"
|
|
bitfld.byte 0x4 6. " TONE6 ,Tone Frequency Setting 6" "0,1"
|
|
bitfld.byte 0x4 5. " TONE5 ,Tone Frequency Setting 5" "0,1"
|
|
bitfld.byte 0x4 4. " TONE4 ,Tone Frequency Setting 4" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x4 3. " TONE3 ,Tone Frequency Setting 3" "0,1"
|
|
bitfld.byte 0x4 2. " TONE2 ,Tone Frequency Setting 2" "0,1"
|
|
bitfld.byte 0x4 1. " TONE1 ,Tone Frequency Setting 1" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x4 0. " TONE0 ,Tone Frequency Setting 0" "0,1"
|
|
line.byte 0x05 "SGSFR_3,Sound generator reference frequency Register 3"
|
|
bitfld.byte 0x5 7. " SFS7 ,Reference Frequency Setting 7" "0,1"
|
|
bitfld.byte 0x5 6. " SFS6 ,Reference Frequency Setting 6" "0,1"
|
|
bitfld.byte 0x5 5. " SFS5 ,Reference Frequency Setting 5" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x5 4. " SFS4 ,Reference Frequency Setting 4" "0,1"
|
|
bitfld.byte 0x5 3. " SFS3 ,Reference Frequency Setting 3" "0,1"
|
|
bitfld.byte 0x5 2. " SFS2 ,Reference Frequency Setting 2" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x5 1. " SFS1 ,Reference Frequency Setting 1" "0,1"
|
|
bitfld.byte 0x5 0. " SFS0 ,Reference Frequency Setting 0" "0,1"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree "CE (MMC Host Interface)"
|
|
base ad:0xE804C800
|
|
width 15.
|
|
group.word 0x00++0x3
|
|
line.word 0x00 "CE_CMD_SET1,Command setting register"
|
|
bitfld.word 0x00 8.--13. " CMD ,Command Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 6.--7. " RTYP ,Response Type" "No response,6-byte response,17-byte response,"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RBSY ,Response Busy Select" "Not involved,Involved"
|
|
bitfld.word 0x00 3. " WDAT ,Presence/Absence of Data" "Absent,Present"
|
|
textline " "
|
|
bitfld.word 0x00 2. " DWEN ,Read/Write " "Read,Write"
|
|
bitfld.word 0x00 1. " CMLTE ,Single/Multi Block Transfer Select" "Single-block,Multi-block"
|
|
textline " "
|
|
bitfld.word 0x00 0. " CMD12EN ,Automatic CMD12 Issuance" "Disabled,Enabled"
|
|
line.word 0x02 "CE_CMD_SET2,Command setting register"
|
|
bitfld.word 0x02 14.--15. " RIDXC ,Response Index Check" "Checks the response index,Checks the check bits,No checking,"
|
|
bitfld.word 0x02 12.--13. " RCRC7C ,Response CRC7 Check" "Checks CRC7,Checks the check bits,Checks internal CRC7,No checking"
|
|
textline " "
|
|
bitfld.word 0x02 10. " CRC16C ,CRC16 Check in Reception" "Checks CRC16,Not check"
|
|
bitfld.word 0x02 8. " CRCSTE ,CRC Status Reception" "Receives CRC status,Not received"
|
|
textline " "
|
|
bitfld.word 0x02 7. " TBIT ,Transmission Bit Setting" "1,0"
|
|
bitfld.word 0x02 6. " OPDM ,Open-Drain Output Mode" "Normal output,Open-drain output"
|
|
textline " "
|
|
bitfld.word 0x02 3. " SBIT ,Read Data Start Bit Detection" "When the MMC_D signals set by DATW are all 0,When MMC_D[0] is 0"
|
|
bitfld.word 0x02 0.--1. " DATW ,Data Bus Width Setting" "1,4,8,"
|
|
group.long 0x08++0x17
|
|
line.long 0x0 "CE_ARG,Argument register"
|
|
line.long 0x04 "CE_ARG_CMD12,Argument register for automatically-issued CMD 12"
|
|
line.long 0x08 "CE_CMD_CTRL,Command control register"
|
|
bitfld.long 0x08 0. " BREAK ,Forcible Termination of Command Sequence" "Not brake,Brake"
|
|
line.long 0x0c "CE_BLOCK_SET,Transfer block setting register"
|
|
hexmask.long.word 0x0c 16.--31. 1. " BLKCNT ,Number of Blocks for Transfer"
|
|
hexmask.long.word 0x0c 0.--15. 1. " BLKSIZ ,Transfer Block Size"
|
|
line.long 0x10 "CE_CLK_CTRL,Clock control register"
|
|
bitfld.long 0x10 24. " CLKEN ,MMC Clock Output Control" "Not output,Outputs the MMC clock"
|
|
bitfld.long 0x10 16.--19. " CLKDIV ,MMC Clock Frequency Setting" "P1/2,P1/2^2,P1/2^3,P1/2^4,P1/2^5,P1/2^6,P1/2^7,P1/2^8,P1/2^9,P1/2^10,,,,,,"
|
|
bitfld.long 0x10 12.--13. " SRSPTO ,Response Timeout Setting" "64 MMC clock cycles,128 MMC clock cycles,256 MMC clock cycles,"
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " SRBSYTO ,Response Busy Timeout Setting" "2^14 MMC clock cycles,2^15 MMC clock cycles,2^16 MMC clock cycles,2^17 MMC clock cycles,2^18 MMC clock cycles,2^19 MMC clock cycles,2^20 MMC clock cycles,2^21 MMC clock cycles,2^22 MMC clock cycles,2^23 MMC clock cycles,2^24 MMC clock cycles,2^25 MMC clock cycles,2^26 MMC clock cycles,2^27 MMC clock cycles,2^28 MMC clock cycles,2^29 MMC clock cycles"
|
|
bitfld.long 0x10 4.--7. " SRWDTO ,Write Data/Read Data Timeout Setting" "2^14 MMC clock cycles,2^15 MMC clock cycles,2^16 MMC clock cycles,2^17 MMC clock cycles,2^18 MMC clock cycles,2^19 MMC clock cycles,2^20 MMC clock cycles,2^21 MMC clock cycles,2^22 MMC clock cycles,2^23 MMC clock cycles,2^24 MMC clock cycles,2^25 MMC clock cycles,2^26 MMC clock cycles,2^27 MMC clock cycles,2^28 MMC clock cycles,2^29 MMC clock cycles"
|
|
line.long 0x14 "CE_BUF_ACC,Buffer access configuration register"
|
|
bitfld.long 0x14 25. " DMAWEN ,Buffer Write DMA Transfer Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 24. " DMAREN ,Buffer Read DMA Transfer Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 16. " ATYP ,Buffer Access Select" "Not swapped,Swapped"
|
|
rgroup.long 0x20++0xf
|
|
line.long 0x0 "CE_RESP3,Response register 3"
|
|
line.long 0x4 "CE_RESP2,Response register 2"
|
|
line.long 0x8 "CE_RESP1,Response register 1"
|
|
line.long 0xC "CE_RESP0,Response register 0"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x00 "CE_RESP_CMD12,Response register for automatically-issued CMD12"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "CE_DATA,Data register"
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "CE_INT,Interrupt flag register"
|
|
bitfld.long 0x0 26. " CMD12DRE ,Automatic CMD12 Issuance & Buffer Read Complete" "Not completed,Completed"
|
|
bitfld.long 0x0 25. " CMD12RBE ,Automatic CMD12 Issuance Response Busy Complete" "Not completed,Completed"
|
|
bitfld.long 0x0 24. " CMD12CRE ,Automatic CMD12 Response Complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x0 23. " DTRANE ,Data Transmission Complete" "Not completed,Completed"
|
|
bitfld.long 0x0 22. " BUFRE ,Buffer Read Complete" "Not completed,Completed"
|
|
bitfld.long 0x0 21. " BUFWEN ,Buffer Write Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x0 20. " BUFREN ,Buffer Read Ready" "Not ready,Ready"
|
|
bitfld.long 0x0 17. " RBSYE ,Response Busy Complete" "Not completed,Completed"
|
|
bitfld.long 0x0 16. " CRSPE ,Command/Response Complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x0 15. " CMDVIO ,Command Issuance Error" "No error,Error"
|
|
bitfld.long 0x0 14. " BUFVIO ,Buffer Access Error" "No error,Error"
|
|
bitfld.long 0x0 11. " WDATERR ,Write Data Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 10. " RDATERR ,Read Data Error" "No error,Error"
|
|
bitfld.long 0x0 9. " RIDXERR ,Response Index Error" "No error,Error"
|
|
bitfld.long 0x0 8. " RSPERR ,Response Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 4. " CRCSTO ,CRC Status Timeout" "Not occurred,Occurred"
|
|
bitfld.long 0x0 3. " WDATTO ,Write Data Timeout" "Not occurred,Occurred"
|
|
bitfld.long 0x0 2. " RDATTO ,Read Data Timeout" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RBSYTO ,Response Busy Timeout" "Not occurred,Occurred"
|
|
bitfld.long 0x0 0. " RSPTO ,Response Timeout" "Not occurred,Occurred"
|
|
line.long 0x04 "CE_INT_EN,Interrupt enable register"
|
|
bitfld.long 0x04 26. " MCMD12DRE ,CMD12DRE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 25. " MCMD12RBE ,CMD12RBE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " MCMD12CRE ,CMD12CRE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " MDTRANE ,DTRANE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " MBUFRE ,BUFRE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " MBUFWEN ,BUFWEN Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 20. " MBUFREN , BUFREN Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " MRBSYE ,RBSYE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " MCRSPE ,CRSPE Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " MCMDVIO ,CMDVIO Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " MBUFVIO ,BUFVIO Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " MWDATERR ,WDATERR Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " MRDATERR ,RDATERR Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " MRIDXERR ,RIDXERR Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " MRSPERR ,RSPERR Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " MCRCSTO ,CRCSTO Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " MWDATTO ,WDATTO Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " MRDATTO ,RDATTO Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " MRBSYTO ,RBSYTO Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " MRSPTO ,RSPTO Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.long 0x48++0x7
|
|
line.long 0x00 "CE_HOST_STS1,Status register 1"
|
|
bitfld.long 0x00 31. " CMDSEQ ,Command Sequence Status" "In the initial state,Is being executed"
|
|
bitfld.long 0x00 30. " CMDSIG ,MMC_CMD Line Status" "0,1"
|
|
bitfld.long 0x00 24.--29. " RSPIDX ,Response Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATSIG ,MMC_D Status"
|
|
hexmask.long.word 0x00 0.--15. 1. " RCVBLK ,Number of Transferred Blocks"
|
|
line.long 0x04 "CE_HOST_STS2,Status register 2"
|
|
bitfld.long 0x04 31. " CRCSTE ,CRC Status Error" "Not occurred,Occurred"
|
|
bitfld.long 0x04 30. " CRC16E ,Read Data CRC16 Error" "Not occurred,Occurred"
|
|
bitfld.long 0x04 29. " AC12CRCE ,Automatic CMD12 Response CRC7 Error" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RSPCRC7E ,Command Response CRC7 Error" "Not occurred,Occurred"
|
|
bitfld.long 0x04 27. " CRCSTEBE ,CRC Status End Bit Error" "Not occurred,Occurred"
|
|
bitfld.long 0x04 26. " RDATEBE ,Read Data End Bit Error" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 25. " AC12REBE ,Automatic CMD12 Response End Bit Error" "Not occurred,Occurred"
|
|
bitfld.long 0x04 24. " RSPEBE ,Command Response End Bit Error" "Not occurred,Occurred"
|
|
bitfld.long 0x04 23. " AC12IDXE ,Automatic CMD12 Response Index Error" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 22. " RSPIDXE ,Command Response Index Error" "Not occurred,Occurred"
|
|
bitfld.long 0x04 16.--18. " CRCST ,CRC Status" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 14. " STRDATTO ,Read Data Timeout" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 13. " DATBSYTO ,Data Busy Timeout" "Not occurred,Occurred"
|
|
bitfld.long 0x04 12. " CRCSTTO ,CRC Status Timeout" "Not occurred,Occurred"
|
|
bitfld.long 0x04 11. " AC12BSYTO ,Automatic CMD12 Response Busy Timeout" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 10. " RSPBSYTO ,Response Busy Timeout" "Not occurred,Occurred"
|
|
bitfld.long 0x04 9. " AC12RSPTO ,Automatic CMD12 Response Timeou" "Not occurred,Occurred"
|
|
bitfld.long 0x04 8. " STRSPTO ,Response Timeout" "Not occurred,Occurred"
|
|
group.long 0x5c++0x3
|
|
line.long 0x00 "CE_DMA_MODE,DMA mode setting register"
|
|
bitfld.long 0x00 0. " DMASEL ,DMA Transfer Size Select" "2-byte or 4-byte word,64-byte unit"
|
|
group.long 0x70++0x7
|
|
line.long 0x00 "CE_DETECT,Card detection/port control register"
|
|
bitfld.long 0x00 14. " CDSIG ,MMC_CD Pin Status Indication" "Not detected,Detected"
|
|
bitfld.long 0x00 13. " CDRISE ,MMC_CD Pin Rise Detection Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 12. " CDFALL ,MMC_CD Pin Fall Detection Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MCDRISE ,CDRISE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " MCDFALL ,CDFALL Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x04 "CE_ADD_MODE,Special mode setting register"
|
|
bitfld.long 0x04 19. " CLKMAIN ,Internal Clock Control" "Normal mode,Low power consumption"
|
|
group.long 0x7c++0x3
|
|
line.long 0x00 "CE_VERSION,Version register"
|
|
bitfld.long 0x00 31. " SWRST ,Software Reset" "Not reset,Reset"
|
|
hexmask.long.word 0x00 0.--15. 1. " VERSION ,Version Information"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWM (Motor Control PWM Timer)"
|
|
base ad:0xFCFF5000
|
|
width 8.
|
|
group.byte 0xE0++0x1
|
|
line.byte 0x00 "PWCR_1,PWM control register_1"
|
|
bitfld.byte 0x00 5. " IE ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " CMF ,Compare Match Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 3. " CST ,Counter start" "Stopped,Started"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " CKS ,Clock Select" "Counts on P0/1,Counts on P0/2,Counts on P0/4,Counts on P0/8,Counts on P0/16,Counts on P0/16,Counts on P0/1,Counts on P0/16"
|
|
group.byte (0xE0+0x4)++0x1
|
|
line.byte 0x0 "PWPR_1,PWM polarity register_1"
|
|
bitfld.byte 0x0 7. " OPS1H ,Output Polarity Select" "Direct output,Inverse output"
|
|
bitfld.byte 0x0 6. " OPS1G ,Output Polarity Select" "Direct output,Inverse output"
|
|
bitfld.byte 0x0 5. " OPS1F ,Output Polarity Select" "Direct output,Inverse output"
|
|
textline " "
|
|
bitfld.byte 0x0 4. " OPS1E ,Output Polarity Select" "Direct output,Inverse output"
|
|
bitfld.byte 0x0 3. " OPS1D ,Output Polarity Select" "Direct output,Inverse output"
|
|
bitfld.byte 0x0 2. " OPS1C ,Output Polarity Select" "Direct output,Inverse output"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " OPS1B ,Output Polarity Select" "Direct output,Inverse output"
|
|
bitfld.byte 0x0 0. " OPS1A ,Output Polarity Select" "Direct output,Inverse output"
|
|
group.word (0xE0+0x6)++0x9
|
|
line.word 0x00 "PWCYR_1,PWM cycle register_1"
|
|
bitfld.word 0x0 15. " PWCY15 ,PWM conversion cycle 15" "Not set,Set"
|
|
bitfld.word 0x0 14. " PWCY14 ,PWM conversion cycle 14" "Not set,Set"
|
|
bitfld.word 0x0 13. " PWCY13 ,PWM conversion cycle 13" "Not set,Set"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PWCY12 ,PWM conversion cycle 12" "Not set,Set"
|
|
bitfld.word 0x0 11. " PWCY11 ,PWM conversion cycle 11" "Not set,Set"
|
|
bitfld.word 0x0 10. " PWCY10 ,PWM conversion cycle 10" "Not set,Set"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PWCY9 ,PWM conversion cycle 9" "Not set,Set"
|
|
bitfld.word 0x0 8. " PWCY8 ,PWM conversion cycle 8" "Not set,Set"
|
|
bitfld.word 0x0 7. " PWCY7 ,PWM conversion cycle 7" "Not set,Set"
|
|
textline " "
|
|
bitfld.word 0x0 6. " PWCY6 ,PWM conversion cycle 6" "Not set,Set"
|
|
bitfld.word 0x0 5. " PWCY5 ,PWM conversion cycle 5" "Not set,Set"
|
|
bitfld.word 0x0 4. " PWCY4 ,PWM conversion cycle 4" "Not set,Set"
|
|
textline " "
|
|
bitfld.word 0x0 3. " PWCY3 ,PWM conversion cycle 3" "Not set,Set"
|
|
bitfld.word 0x0 2. " PWCY2 ,PWM conversion cycle 2" "Not set,Set"
|
|
bitfld.word 0x0 1. " PWCY1 ,PWM conversion cycle 1" "Not set,Set"
|
|
textline " "
|
|
bitfld.word 0x0 0. " PWCY0 ,PWM conversion cycle 0" "Not set,Set"
|
|
line.word 0x02 "PWBFR_1A,PWM buffer register_1A"
|
|
bitfld.word 0x02 12. " OTS ,Output Terminal Select" "0,1"
|
|
bitfld.word 0x02 9. " DT9 ,Duty 9" "0,1"
|
|
bitfld.word 0x02 8. " DT8 ,Duty 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x02 7. " DT7 ,Duty 7" "0,1"
|
|
bitfld.word 0x02 6. " DT6 ,Duty 6" "0,1"
|
|
bitfld.word 0x02 5. " DT5 ,Duty 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x02 4. " DT4 ,Duty 4" "0,1"
|
|
bitfld.word 0x02 3. " DT3 ,Duty 3" "0,1"
|
|
bitfld.word 0x02 2. " DT2 ,Duty 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x02 1. " DT1 ,Duty 1" "0,1"
|
|
bitfld.word 0x02 0. " DT0 ,Duty 0" "0,1"
|
|
line.word 0x04 "PWBFR_1C,PWM buffer register_1C"
|
|
bitfld.word 0x04 12. " OTS ,Output Terminal Select" "0,1"
|
|
bitfld.word 0x04 9. " DT9 ,Duty 9" "0,1"
|
|
bitfld.word 0x04 8. " DT8 ,Duty 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x04 7. " DT7 ,Duty 7" "0,1"
|
|
bitfld.word 0x04 6. " DT6 ,Duty 6" "0,1"
|
|
bitfld.word 0x04 5. " DT5 ,Duty 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x04 4. " DT4 ,Duty 4" "0,1"
|
|
bitfld.word 0x04 3. " DT3 ,Duty 3" "0,1"
|
|
bitfld.word 0x04 2. " DT2 ,Duty 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x04 1. " DT1 ,Duty 1" "0,1"
|
|
bitfld.word 0x04 0. " DT0 ,Duty 0" "0,1"
|
|
line.word 0x06 "PWBFR_1E,PWM buffer register_1E"
|
|
bitfld.word 0x06 12. " OTS ,Output Terminal Select" "0,1"
|
|
bitfld.word 0x06 9. " DT9 ,Duty 9" "0,1"
|
|
bitfld.word 0x06 8. " DT8 ,Duty 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x06 7. " DT7 ,Duty 7" "0,1"
|
|
bitfld.word 0x06 6. " DT6 ,Duty 6" "0,1"
|
|
bitfld.word 0x06 5. " DT5 ,Duty 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x06 4. " DT4 ,Duty 4" "0,1"
|
|
bitfld.word 0x06 3. " DT3 ,Duty 3" "0,1"
|
|
bitfld.word 0x06 2. " DT2 ,Duty 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x06 1. " DT1 ,Duty 1" "0,1"
|
|
bitfld.word 0x06 0. " DT0 ,Duty 0" "0,1"
|
|
line.word 0x08 "PWBFR_1G,PWM buffer register_1G"
|
|
bitfld.word 0x08 12. " OTS ,Output Terminal Select" "0,1"
|
|
bitfld.word 0x08 9. " DT9 ,Duty 9" "0,1"
|
|
bitfld.word 0x08 8. " DT8 ,Duty 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x08 7. " DT7 ,Duty 7" "0,1"
|
|
bitfld.word 0x08 6. " DT6 ,Duty 6" "0,1"
|
|
bitfld.word 0x08 5. " DT5 ,Duty 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x08 4. " DT4 ,Duty 4" "0,1"
|
|
bitfld.word 0x08 3. " DT3 ,Duty 3" "0,1"
|
|
bitfld.word 0x08 2. " DT2 ,Duty 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x08 1. " DT1 ,Duty 1" "0,1"
|
|
bitfld.word 0x08 0. " DT0 ,Duty 0" "0,1"
|
|
group.byte 0xF0++0x1
|
|
line.byte 0x00 "PWCR_2,PWM control register_2"
|
|
bitfld.byte 0x00 5. " IE ,Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " CMF ,Compare Match Flag" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 3. " CST ,Counter start" "Stopped,Started"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--2. " CKS ,Clock Select" "Counts on P0/1,Counts on P0/2,Counts on P0/4,Counts on P0/8,Counts on P0/16,Counts on P0/16,Counts on P0/1,Counts on P0/16"
|
|
group.byte (0xF0+0x4)++0x1
|
|
line.byte 0x0 "PWPR_2,PWM polarity register_2"
|
|
bitfld.byte 0x0 7. " OPS2H ,Output Polarity Select" "Direct output,Inverse output"
|
|
bitfld.byte 0x0 6. " OPS2G ,Output Polarity Select" "Direct output,Inverse output"
|
|
bitfld.byte 0x0 5. " OPS2F ,Output Polarity Select" "Direct output,Inverse output"
|
|
textline " "
|
|
bitfld.byte 0x0 4. " OPS2E ,Output Polarity Select" "Direct output,Inverse output"
|
|
bitfld.byte 0x0 3. " OPS2D ,Output Polarity Select" "Direct output,Inverse output"
|
|
bitfld.byte 0x0 2. " OPS2C ,Output Polarity Select" "Direct output,Inverse output"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " OPS2B ,Output Polarity Select" "Direct output,Inverse output"
|
|
bitfld.byte 0x0 0. " OPS2A ,Output Polarity Select" "Direct output,Inverse output"
|
|
group.word (0xF0+0x6)++0x9
|
|
line.word 0x00 "PWCYR_2,PWM cycle register_2"
|
|
bitfld.word 0x0 15. " PWCY15 ,PWM conversion cycle 15" "Not set,Set"
|
|
bitfld.word 0x0 14. " PWCY14 ,PWM conversion cycle 14" "Not set,Set"
|
|
bitfld.word 0x0 13. " PWCY13 ,PWM conversion cycle 13" "Not set,Set"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PWCY12 ,PWM conversion cycle 12" "Not set,Set"
|
|
bitfld.word 0x0 11. " PWCY11 ,PWM conversion cycle 11" "Not set,Set"
|
|
bitfld.word 0x0 10. " PWCY10 ,PWM conversion cycle 10" "Not set,Set"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PWCY9 ,PWM conversion cycle 9" "Not set,Set"
|
|
bitfld.word 0x0 8. " PWCY8 ,PWM conversion cycle 8" "Not set,Set"
|
|
bitfld.word 0x0 7. " PWCY7 ,PWM conversion cycle 7" "Not set,Set"
|
|
textline " "
|
|
bitfld.word 0x0 6. " PWCY6 ,PWM conversion cycle 6" "Not set,Set"
|
|
bitfld.word 0x0 5. " PWCY5 ,PWM conversion cycle 5" "Not set,Set"
|
|
bitfld.word 0x0 4. " PWCY4 ,PWM conversion cycle 4" "Not set,Set"
|
|
textline " "
|
|
bitfld.word 0x0 3. " PWCY3 ,PWM conversion cycle 3" "Not set,Set"
|
|
bitfld.word 0x0 2. " PWCY2 ,PWM conversion cycle 2" "Not set,Set"
|
|
bitfld.word 0x0 1. " PWCY1 ,PWM conversion cycle 1" "Not set,Set"
|
|
textline " "
|
|
bitfld.word 0x0 0. " PWCY0 ,PWM conversion cycle 0" "Not set,Set"
|
|
line.word 0x02 "PWBFR_2A,PWM buffer register_2A"
|
|
bitfld.word 0x02 12. " OTS ,Output Terminal Select" "0,1"
|
|
bitfld.word 0x02 9. " DT9 ,Duty 9" "0,1"
|
|
bitfld.word 0x02 8. " DT8 ,Duty 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x02 7. " DT7 ,Duty 7" "0,1"
|
|
bitfld.word 0x02 6. " DT6 ,Duty 6" "0,1"
|
|
bitfld.word 0x02 5. " DT5 ,Duty 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x02 4. " DT4 ,Duty 4" "0,1"
|
|
bitfld.word 0x02 3. " DT3 ,Duty 3" "0,1"
|
|
bitfld.word 0x02 2. " DT2 ,Duty 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x02 1. " DT1 ,Duty 1" "0,1"
|
|
bitfld.word 0x02 0. " DT0 ,Duty 0" "0,1"
|
|
line.word 0x04 "PWBFR_2C,PWM buffer register_2C"
|
|
bitfld.word 0x04 12. " OTS ,Output Terminal Select" "0,1"
|
|
bitfld.word 0x04 9. " DT9 ,Duty 9" "0,1"
|
|
bitfld.word 0x04 8. " DT8 ,Duty 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x04 7. " DT7 ,Duty 7" "0,1"
|
|
bitfld.word 0x04 6. " DT6 ,Duty 6" "0,1"
|
|
bitfld.word 0x04 5. " DT5 ,Duty 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x04 4. " DT4 ,Duty 4" "0,1"
|
|
bitfld.word 0x04 3. " DT3 ,Duty 3" "0,1"
|
|
bitfld.word 0x04 2. " DT2 ,Duty 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x04 1. " DT1 ,Duty 1" "0,1"
|
|
bitfld.word 0x04 0. " DT0 ,Duty 0" "0,1"
|
|
line.word 0x06 "PWBFR_2E,PWM buffer register_2E"
|
|
bitfld.word 0x06 12. " OTS ,Output Terminal Select" "0,1"
|
|
bitfld.word 0x06 9. " DT9 ,Duty 9" "0,1"
|
|
bitfld.word 0x06 8. " DT8 ,Duty 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x06 7. " DT7 ,Duty 7" "0,1"
|
|
bitfld.word 0x06 6. " DT6 ,Duty 6" "0,1"
|
|
bitfld.word 0x06 5. " DT5 ,Duty 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x06 4. " DT4 ,Duty 4" "0,1"
|
|
bitfld.word 0x06 3. " DT3 ,Duty 3" "0,1"
|
|
bitfld.word 0x06 2. " DT2 ,Duty 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x06 1. " DT1 ,Duty 1" "0,1"
|
|
bitfld.word 0x06 0. " DT0 ,Duty 0" "0,1"
|
|
line.word 0x08 "PWBFR_2G,PWM buffer register_2G"
|
|
bitfld.word 0x08 12. " OTS ,Output Terminal Select" "0,1"
|
|
bitfld.word 0x08 9. " DT9 ,Duty 9" "0,1"
|
|
bitfld.word 0x08 8. " DT8 ,Duty 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x08 7. " DT7 ,Duty 7" "0,1"
|
|
bitfld.word 0x08 6. " DT6 ,Duty 6" "0,1"
|
|
bitfld.word 0x08 5. " DT5 ,Duty 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x08 4. " DT4 ,Duty 4" "0,1"
|
|
bitfld.word 0x08 3. " DT3 ,Duty 3" "0,1"
|
|
bitfld.word 0x08 2. " DT2 ,Duty 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x08 1. " DT1 ,Duty 1" "0,1"
|
|
bitfld.word 0x08 0. " DT0 ,Duty 0" "0,1"
|
|
rgroup.byte 0x6++0x1
|
|
line.byte 0x00 "PWBTCR,PWM buffer transfer control register"
|
|
bitfld.byte 0x00 7. " BTC2G ,Disable data transfer from PWBFR_7 to PWDTR_7" "No,Yes"
|
|
bitfld.byte 0x00 6. " BTC2E ,Disable data transfer from PWBFR_6 to PWDTR_6" "No,Yes"
|
|
bitfld.byte 0x00 5. " BTC2C ,Disable data transfer from PWBFR_5 to PWDTR_5" "No,Yes"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " BTC2A ,Disable data transfer from PWBFR_4 to PWDTR_4" "No,Yes"
|
|
bitfld.byte 0x00 3. " BTC1G ,Disable data transfer from PWBFR_3 to PWDTR_3" "No,Yes"
|
|
bitfld.byte 0x00 2. " BTC1E ,Disable data transfer from PWBFR_2 to PWDTR_2" "No,Yes"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " BTC1C ,Disable data transfer from PWBFR_1 to PWDTR_1" "No,Yes"
|
|
bitfld.byte 0x00 0. " BTC1A ,Disable data transfer from PWBFR_0 to PWDTR_0" "No,Yes"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "Ports"
|
|
tree "JTAG control registers"
|
|
base ad:0xFCFE7b00
|
|
width 9.
|
|
rgroup.word 0x20++0x1
|
|
line.word 0x00 "JPPR0,Port pin read register"
|
|
bitfld.word 0x0 1. " PPR01 ,Value of the P0_1 pin" "0,1"
|
|
bitfld.word 0x0 0. " PPR00 ,Value of the P0_0 pin" "0,1"
|
|
group.word 0x40++0x1
|
|
line.word 0x00 "JPMC0,Port mode control register"
|
|
bitfld.word 0x0 1. " PMC1 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 0. " PMC0 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
group.long 0x90++0x3
|
|
line.long 0x00 "JPMCSR0,Port mode control set/reset register"
|
|
bitfld.long 0x0 17. " JPMCSR1 ,Value of the corresponding lower bit of the JPMCSR register is written to the corresponding PJPMC$21 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 16. " JPMCSR0 ,Value of the corresponding lower bit of the JPMCSR register is written to the corresponding PJPMC$20 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " JPMCSR1 ,Value of the corresponding higher bit of the JPMC register" "0,1"
|
|
bitfld.long 0x0 0. " JPMCSR0 ,Value of the corresponding higher bit of the JPMC register" "0,1"
|
|
group.word 0x400++0x1
|
|
line.word 0x00 "JPIBC0,Port input buffer control register"
|
|
bitfld.word 0x0 1. " JPBDC1 ,Enable bidirectional mode of the corresponding pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " JPBDC0 ,Enable bidirectional mode of the corresponding pin 0" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "General ports control registers"
|
|
base ad:0xFCFE3000
|
|
tree "Port 0"
|
|
width 12.
|
|
rgroup.word 0x200++0x1
|
|
line.word 0x00 "PPR0,Port 0 pin read register"
|
|
bitfld.word 0x0 5. " PPR05 ,Value of the P0_5 pin" "0,1"
|
|
bitfld.word 0x0 4. " PPR04 ,Value of the P0_4 pin" "0,1"
|
|
bitfld.word 0x0 3. " PPR03 ,Value of the P0_3 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 2. " PPR02 ,Value of the P0_2 pin" "0,1"
|
|
bitfld.word 0x0 1. " PPR01 ,Value of the P0_1 pin" "0,1"
|
|
bitfld.word 0x0 0. " PPR00 ,Value of the P0_0 pin" "0,1"
|
|
group.word 0x400++0x1
|
|
line.word 0x00 "PMC0,Port 0 mode control register"
|
|
bitfld.word 0x0 5. " PMC05 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 4. " PMC04 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 3. " PMC03 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 2. " PMC02 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 1. " PMC01 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 0. " PMC00 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
group.long 0x900++0x3
|
|
line.long 0x00 "PMCSR0,Port 0 mode scontrol set/reset register"
|
|
bitfld.long 0x0 21. " PMCSR05 ,Value of the corresponding lower bit of the PMCSR0 register is written to the corresponding PPMC05 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 20. " PMCSR04 ,Value of the corresponding lower bit of the PMCSR0 register is written to the corresponding PPMC04 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 19. " PMCSR03 ,Value of the corresponding lower bit of the PMCSR0 register is written to the corresponding PPMC03 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 18. " PMCSR02 ,Value of the corresponding lower bit of the PMCSR0 register is written to the corresponding PPMC02 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 17. " PMCSR01 ,Value of the corresponding lower bit of the PMCSR0 register is written to the corresponding PPMC01 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 16. " PMCSR00 ,Value of the corresponding lower bit of the PMCSR0 register is written to the corresponding PPMC00 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " PMCSR05 ,Value of the corresponding higher bit of the PMC0 register" "PMC05=0,PMC05=1"
|
|
bitfld.long 0x0 4. " PMCSR04 ,Value of the corresponding higher bit of the PMC0 register" "PMC04=0,PMC04=1"
|
|
bitfld.long 0x0 3. " PMCSR03 ,Value of the corresponding higher bit of the PMC0 register" "PMC03=0,PMC03=1"
|
|
textline " "
|
|
bitfld.long 0x0 2. " PMCSR02 ,Value of the corresponding higher bit of the PMC0 register" "PMC02=0,PMC02=1"
|
|
bitfld.long 0x0 1. " PMCSR01 ,Value of the corresponding higher bit of the PMC0 register" "PMC01=0,PMC01=1"
|
|
bitfld.long 0x0 0. " PMCSR00 ,Value of the corresponding higher bit of the PMC0 register" "PMC00=0,PMC00=1"
|
|
group.word 0x4000++0x1
|
|
line.word 0x00 "PIBC0,Port 0 input buffer control register"
|
|
bitfld.word 0x0 5. " PIBC05 ,Enable or disable the input buffer of pin 5" "Disabled,Enabled"
|
|
bitfld.word 0x0 4. " PIBC04 ,Enable or disable the input buffer of pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 3. " PIBC03 ,Enable or disable the input buffer of pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PIBC02 ,Enable or disable the input buffer of pin 2" "Disabled,Enabled"
|
|
bitfld.word 0x0 1. " PIBC01 ,Enable or disable the input buffer of pin 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 0. " PIBC00 ,Enable or disable the input buffer of pin 0" "Disabled,Enabled"
|
|
width 12.
|
|
rgroup.long 0xc00++0x3
|
|
line.long 0x00 "SNCR0,Serial sound interface noise canceler control register"
|
|
bitfld.long 0x00 6. " ETSEL ,The Ethernet controller and EthernetAVB status" "Eth. is enabled and Eth.AVB is disabled,Eth.AVB is enabled and Eth. is disabled"
|
|
bitfld.long 0x0 5. " SSI5NCE ,Serial Sound Interface Channel 5 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " SSI4NCE ,Serial Sound Interface Channel 4 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " SSI3NCE ,Serial Sound Interface Channel 3 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " SSI2NCE ,Serial Sound Interface Channel 2 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " SSI1NCE ,Serial Sound Interface Channel 1 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " SSI0NCE ,Serial Sound Interface Channel 0 Noise Canceler Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 1"
|
|
width 8.
|
|
group.word (0x00+0x4)++0x1
|
|
line.word 0x00 "P1,Port 1 register"
|
|
bitfld.word 0x0 15. " P115 ,Output level of the 15 pin " "Low,High"
|
|
bitfld.word 0x0 14. " P114 ,Output level of the 14 pin " "Low,High"
|
|
bitfld.word 0x0 13. " P113 ,Output level of the 13 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 12. " P112 ,Output level of the 12 pin " "Low,High"
|
|
bitfld.word 0x0 11. " P111 ,Output level of the 11 pin " "Low,High"
|
|
bitfld.word 0x0 10. " P110 ,Output level of the 10 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 9. " P19 ,Output level of the 9 pin " "Low,High"
|
|
bitfld.word 0x0 8. " P18 ,Output level of the 8 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 7. " P17 ,Output level of the 7 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 6. " P16 ,Output level of the 6 pin " "Low,High"
|
|
bitfld.word 0x0 5. " P15 ,Output level of the 5 pin " "Low,High"
|
|
bitfld.word 0x0 4. " P14 ,Output level of the 4 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 3. " P13 ,Output level of the 3 pin " "Low,High"
|
|
bitfld.word 0x0 2. " P12 ,Output level of the 2 pin " "Low,High"
|
|
bitfld.word 0x0 1. " P11 ,Output level of the 1 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 0. " P10 ,Output level of the 0 pin " "Low,High"
|
|
group.long (0x100+0x4)++0x3
|
|
line.long 0x00 "PSR1,Port 1 set/reset register"
|
|
bitfld.long 0x0 31. " PSR131 ,Value of the corresponding lower bit is written " "P131 is independent of PSR131,Value of the PSR131 bit"
|
|
bitfld.long 0x0 30. " PSR130 ,Value of the corresponding lower bit is written " "P130 is independent of PSR130,Value of the PSR130 bit"
|
|
textline " "
|
|
bitfld.long 0x0 29. " PSR129 ,Value of the corresponding lower bit is written " "P129 is independent of PSR129,Value of the PSR129 bit"
|
|
bitfld.long 0x0 28. " PSR128 ,Value of the corresponding lower bit is written " "P128 is independent of PSR128,Value of the PSR128 bit"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PSR127 ,Value of the corresponding lower bit is written " "P127 is independent of PSR127,Value of the PSR127 bit"
|
|
bitfld.long 0x0 26. " PSR126 ,Value of the corresponding lower bit is written " "P126 is independent of PSR126,Value of the PSR126 bit"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PSR125 ,Value of the corresponding lower bit is written " "P125 is independent of PSR125,Value of the PSR125 bit"
|
|
bitfld.long 0x0 24. " PSR124 ,Value of the corresponding lower bit is written " "P124 is independent of PSR124,Value of the PSR124 bit"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PSR123 ,Value of the corresponding lower bit is written " "P123 is independent of PSR123,Value of the PSR123 bit"
|
|
bitfld.long 0x0 22. " PSR122 ,Value of the corresponding lower bit is written " "P122 is independent of PSR122,Value of the PSR122 bit"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PSR121 ,Value of the corresponding lower bit is written " "P121 is independent of PSR121,Value of the PSR121 bit"
|
|
bitfld.long 0x0 20. " PSR120 ,Value of the corresponding lower bit is written " "P120 is independent of PSR120,Value of the PSR120 bit"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PSR119 ,Value of the corresponding lower bit is written " "P119 is independent of PSR119,Value of the PSR119 bit"
|
|
bitfld.long 0x0 18. " PSR118 ,Value of the corresponding lower bit is written " "P118 is independent of PSR118,Value of the PSR118 bit"
|
|
textline " "
|
|
bitfld.long 0x0 17. " PSR117 ,Value of the corresponding lower bit is written " "P117 is independent of PSR117,Value of the PSR117 bit"
|
|
bitfld.long 0x0 16. " PSR116 ,Value of the corresponding lower bit is written " "P116 is independent of PSR116,Value of the PSR116 bit"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PSR115 ,Value of the corresponding higher bit is written " "P115=0,P115=1"
|
|
bitfld.long 0x0 14. " PSR114 ,Value of the corresponding higher bit is written " "P114=0,P114=1"
|
|
bitfld.long 0x0 13. " PSR113 ,Value of the corresponding higher bit is written " "P113=0,P113=1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PSR112 ,Value of the corresponding higher bit is written " "P112=0,P112=1"
|
|
bitfld.long 0x0 11. " PSR111 ,Value of the corresponding higher bit is written " "P111=0,P111=1"
|
|
bitfld.long 0x0 10. " PSR110 ,Value of the corresponding higher bit is written " "P110=0,P110=1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PSR19 ,Value of the corresponding higher bit is written " "P19=0,P19=1"
|
|
bitfld.long 0x0 8. " PSR18 ,Value of the corresponding higher bit is written " "P18=0,P18=1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PSR17 ,Value of the corresponding higher bit is written " "P17=0,P17=1"
|
|
bitfld.long 0x0 6. " PSR16 ,Value of the corresponding higher bit is written " "P16=0,P16=1"
|
|
bitfld.long 0x0 5. " PSR15 ,Value of the corresponding higher bit is written " "P15=0,P15=1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PSR14 ,Value of the corresponding higher bit is written " "P14=0,P14=1"
|
|
bitfld.long 0x0 3. " PSR13 ,Value of the corresponding higher bit is written " "P13=0,P13=1"
|
|
bitfld.long 0x0 2. " PSR12 ,Value of the corresponding higher bit is written " "P12=0,P12=1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PSR11 ,Value of the corresponding higher bit is written " "P11=0,P11=1"
|
|
bitfld.long 0x0 0. " PSR10 ,Value of the corresponding higher bit is written " "P10=0,P10=1"
|
|
rgroup.word (0x200+0x4)++0x1
|
|
line.word 0x00 "PPR1,Port 1 pin read register"
|
|
bitfld.word 0x0 15. " PPR115 ,Value of the P1_15 pin" "0,1"
|
|
bitfld.word 0x0 14. " PPR114 ,Value of the P1_14 pin" "0,1"
|
|
bitfld.word 0x0 13. " PPR113 ,Value of the P1_13 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PPR112 ,Value of the P1_12 pin" "0,1"
|
|
bitfld.word 0x0 11. " PPR111 ,Value of the P1_11 pin" "0,1"
|
|
bitfld.word 0x0 10. " PPR110 ,Value of the P1_10 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PPR19 ,Value of the P1_9 pin" "0,1"
|
|
bitfld.word 0x0 8. " PPR18 ,Value of the P1_8 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PPR17 ,Value of the P1_7 pin" "0,1"
|
|
bitfld.word 0x0 6. " PPR16 ,Value of the P1_6 pin" "0,1"
|
|
bitfld.word 0x0 5. " PPR15 ,Value of the P1_5 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PPR14 ,Value of the P1_4 pin" "0,1"
|
|
bitfld.word 0x0 3. " PPR13 ,Value of the P1_3 pin" "0,1"
|
|
bitfld.word 0x0 2. " PPR12 ,Value of the P1_2 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PPR11 ,Value of the P1_1 pin" "0,1"
|
|
bitfld.word 0x0 0. " PPR10 ,Value of the P1_0 pin" "0,1"
|
|
group.word (0x300+0x4)++0x1
|
|
line.word 0x00 "PM1,Port 1 mode register"
|
|
bitfld.word 0x0 15. " PM115 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 14. " PM114 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 13. " PM113 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PM112 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 11. " PM111 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 10. " PM110 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PM19 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 8. " PM18 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PM17 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 6. " PM16 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 5. " PM15 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PM14 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 3. " PM13 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 2. " PM12 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PM11 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 0. " PM10 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
group.word (0x400+0x4)++0x1
|
|
line.word 0x00 "PMC1,Port 1 mode control register"
|
|
bitfld.word 0x0 15. " PMC115 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 14. " PMC114 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 13. " PMC113 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PMC112 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 11. " PMC111 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 10. " PMC110 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PMC19 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 8. " PMC18 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PMC17 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 6. " PMC16 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 5. " PMC15 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PMC14 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 3. " PMC13 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 2. " PMC12 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PMC11 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 0. " PMC10 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
group.word (0x500+0x4)++0x1
|
|
line.word 0x00 "PFC1,Port 1 function control register"
|
|
bitfld.word 0x0 15. " PFC115 , Specifies the alternative function of a pin 15" "0,1"
|
|
bitfld.word 0x0 14. " PFC114 , Specifies the alternative function of a pin 14" "0,1"
|
|
bitfld.word 0x0 13. " PFC113 , Specifies the alternative function of a pin 13" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFC112 , Specifies the alternative function of a pin 12" "0,1"
|
|
bitfld.word 0x0 11. " PFC111 , Specifies the alternative function of a pin 11" "0,1"
|
|
bitfld.word 0x0 10. " PFC110 , Specifies the alternative function of a pin 10" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFC19 , Specifies the alternative function of a pin 9" "0,1"
|
|
bitfld.word 0x0 8. " PFC18 , Specifies the alternative function of a pin 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFC17 , Specifies the alternative function of a pin 7" "0,1"
|
|
bitfld.word 0x0 6. " PFC16 , Specifies the alternative function of a pin 6" "0,1"
|
|
bitfld.word 0x0 5. " PFC15 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFC14 , Specifies the alternative function of a pin 4" "0,1"
|
|
bitfld.word 0x0 3. " PFC13 , Specifies the alternative function of a pin 3" "0,1"
|
|
bitfld.word 0x0 2. " PFC12 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFC11 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFC10 , Specifies the alternative function of a pin 0" "0,1"
|
|
group.word (0x600+0x4)++0x1
|
|
line.word 0x00 "PFCE1,Port 1 function control expansion register"
|
|
bitfld.word 0x0 15. " PFCE115 , Specifies the alternative function of a pin 15" "0,1"
|
|
bitfld.word 0x0 14. " PFCE114 , Specifies the alternative function of a pin 14" "0,1"
|
|
bitfld.word 0x0 13. " PFCE113 , Specifies the alternative function of a pin 13" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFCE112 , Specifies the alternative function of a pin 12" "0,1"
|
|
bitfld.word 0x0 11. " PFCE111 , Specifies the alternative function of a pin 11" "0,1"
|
|
bitfld.word 0x0 10. " PFCE110 , Specifies the alternative function of a pin 10" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFCE19 , Specifies the alternative function of a pin 9" "0,1"
|
|
bitfld.word 0x0 8. " PFCE18 , Specifies the alternative function of a pin 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFCE17 , Specifies the alternative function of a pin 7" "0,1"
|
|
bitfld.word 0x0 6. " PFCE16 , Specifies the alternative function of a pin 6" "0,1"
|
|
bitfld.word 0x0 5. " PFCE15 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFCE14 , Specifies the alternative function of a pin 4" "0,1"
|
|
bitfld.word 0x0 3. " PFCE13 , Specifies the alternative function of a pin 3" "0,1"
|
|
bitfld.word 0x0 2. " PFCE12 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCE11 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFCE10 , Specifies the alternative function of a pin 0" "0,1"
|
|
wgroup.word (0x700+0x4)++0x1
|
|
line.word 0x00 "PNOT1,Port 1 NOT register"
|
|
bitfld.word 0x0 15. " PNOT115 , Specifies whether to invert P1.P115" "Not inverted,Inverted"
|
|
bitfld.word 0x0 14. " PNOT114 , Specifies whether to invert P1.P114" "Not inverted,Inverted"
|
|
bitfld.word 0x0 13. " PNOT113 , Specifies whether to invert P1.P113" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PNOT112 , Specifies whether to invert P1.P112" "Not inverted,Inverted"
|
|
bitfld.word 0x0 11. " PNOT111 , Specifies whether to invert P1.P111" "Not inverted,Inverted"
|
|
bitfld.word 0x0 10. " PNOT110 , Specifies whether to invert P1.P110" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PNOT19 , Specifies whether to invert P1.P19" "Not inverted,Inverted"
|
|
bitfld.word 0x0 8. " PNOT18 , Specifies whether to invert P1.P18" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PNOT17 , Specifies whether to invert P1.P17" "Not inverted,Inverted"
|
|
bitfld.word 0x0 6. " PNOT16 , Specifies whether to invert P1.P16" "Not inverted,Inverted"
|
|
bitfld.word 0x0 5. " PNOT15 , Specifies whether to invert P1.P15" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PNOT14 , Specifies whether to invert P1.P14" "Not inverted,Inverted"
|
|
bitfld.word 0x0 3. " PNOT13 , Specifies whether to invert P1.P13" "Not inverted,Inverted"
|
|
bitfld.word 0x0 2. " PNOT12 , Specifies whether to invert P1.P12" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PNOT11 , Specifies whether to invert P1.P11" "Not inverted,Inverted"
|
|
bitfld.word 0x0 0. " PNOT10 , Specifies whether to invert P1.P10" "Not inverted,Inverted"
|
|
group.long (0x800+0x4)++0x3
|
|
line.long 0x00 "PMSR1,Port 1 mode set/reset register"
|
|
bitfld.long 0x0 31. " PMSR131 , Specifies whether the value of the corresponding lower bit of the PMSR1 register is written to the corresponding bit" "Not depend on the PMSR131 bit,Becomes value of the PMSR131 bit"
|
|
bitfld.long 0x0 30. " PMSR130 , Specifies whether the value of the corresponding lower bit of the PMSR1 register is written to the corresponding bit" "Not depend on the PMSR130 bit,Becomes value of the PMSR130 bit"
|
|
textline " "
|
|
bitfld.long 0x0 29. " PMSR129 , Specifies whether the value of the corresponding lower bit of the PMSR1 register is written to the corresponding bit" "Not depend on the PMSR129 bit,Becomes value of the PMSR129 bit"
|
|
bitfld.long 0x0 28. " PMSR128 , Specifies whether the value of the corresponding lower bit of the PMSR1 register is written to the corresponding bit" "Not depend on the PMSR128 bit,Becomes value of the PMSR128 bit"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PMSR127 , Specifies whether the value of the corresponding lower bit of the PMSR1 register is written to the corresponding bit" "Not depend on the PMSR127 bit,Becomes value of the PMSR127 bit"
|
|
bitfld.long 0x0 26. " PMSR126 , Specifies whether the value of the corresponding lower bit of the PMSR1 register is written to the corresponding bit" "Not depend on the PMSR126 bit,Becomes value of the PMSR126 bit"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PMSR125 , Specifies whether the value of the corresponding lower bit of the PMSR1 register is written to the corresponding bit" "Not depend on the PMSR125 bit,Becomes value of the PMSR125 bit"
|
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bitfld.long 0x0 24. " PMSR124 , Specifies whether the value of the corresponding lower bit of the PMSR1 register is written to the corresponding bit" "Not depend on the PMSR124 bit,Becomes value of the PMSR124 bit"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PMSR123 , Specifies whether the value of the corresponding lower bit of the PMSR1 register is written to the corresponding bit" "Not depend on the PMSR123 bit,Becomes value of the PMSR123 bit"
|
|
bitfld.long 0x0 22. " PMSR122 , Specifies whether the value of the corresponding lower bit of the PMSR1 register is written to the corresponding bit" "Not depend on the PMSR122 bit,Becomes value of the PMSR122 bit"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PMSR121 , Specifies whether the value of the corresponding lower bit of the PMSR1 register is written to the corresponding bit" "Not depend on the PMSR121 bit,Becomes value of the PMSR121 bit"
|
|
bitfld.long 0x0 20. " PMSR120 , Specifies whether the value of the corresponding lower bit of the PMSR1 register is written to the corresponding bit" "Not depend on the PMSR120 bit,Becomes value of the PMSR120 bit"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PMSR119 , Specifies whether the value of the corresponding lower bit of the PMSR1 register is written to the corresponding bit" "Not depend on the PMSR119 bit,Becomes value of the PMSR119 bit"
|
|
bitfld.long 0x0 18. " PMSR118 , Specifies whether the value of the corresponding lower bit of the PMSR1 register is written to the corresponding bit" "Not depend on the PMSR118 bit,Becomes value of the PMSR118 bit"
|
|
textline " "
|
|
bitfld.long 0x0 17. " PMSR117 , Specifies whether the value of the corresponding lower bit of the PMSR1 register is written to the corresponding bit" "Not depend on the PMSR117 bit,Becomes value of the PMSR117 bit"
|
|
bitfld.long 0x0 16. " PMSR116 , Specifies whether the value of the corresponding lower bit of the PMSR1 register is written to the corresponding bit" "Not depend on the PMSR116 bit,Becomes value of the PMSR116 bit"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PMSR115 , Specifies whether the value of the corresponding higher bit of the PMSR1 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 14. " PMSR114 , Specifies whether the value of the corresponding higher bit of the PMSR1 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 13. " PMSR113 , Specifies whether the value of the corresponding higher bit of the PMSR1 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PMSR112 , Specifies whether the value of the corresponding higher bit of the PMSR1 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 11. " PMSR111 , Specifies whether the value of the corresponding higher bit of the PMSR1 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 10. " PMSR110 , Specifies whether the value of the corresponding higher bit of the PMSR1 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PMSR19 , Specifies whether the value of the corresponding higher bit of the PMSR1 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 8. " PMSR18 , Specifies whether the value of the corresponding higher bit of the PMSR1 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PMSR17 , Specifies whether the value of the corresponding higher bit of the PMSR1 register is 1" "PMnm = 0,PMnm = 1"
|
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bitfld.long 0x0 6. " PMSR16 , Specifies whether the value of the corresponding higher bit of the PMSR1 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 5. " PMSR15 , Specifies whether the value of the corresponding higher bit of the PMSR1 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PMSR14 , Specifies whether the value of the corresponding higher bit of the PMSR1 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 3. " PMSR13 , Specifies whether the value of the corresponding higher bit of the PMSR1 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 2. " PMSR12 , Specifies whether the value of the corresponding higher bit of the PMSR1 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PMSR11 , Specifies whether the value of the corresponding higher bit of the PMSR1 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 0. " PMSR10 , Specifies whether the value of the corresponding higher bit of the PMSR1 register is 1" "PMnm = 0,PMnm = 1"
|
|
group.long (0x900+0x4)++0x3
|
|
line.long 0x00 "PMCSR1,Port 1 mode scontrol set/reset register"
|
|
bitfld.long 0x0 31. " PMCSR115 ,Value of the corresponding lower bit of the PMCSR1 register is written to the corresponding PPMC115 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " PMCSR114 ,Value of the corresponding lower bit of the PMCSR1 register is written to the corresponding PPMC114 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 29. " PMCSR113 ,Value of the corresponding lower bit of the PMCSR1 register is written to the corresponding PPMC113 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 28. " PMCSR112 ,Value of the corresponding lower bit of the PMCSR1 register is written to the corresponding PPMC112 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 27. " PMCSR111 ,Value of the corresponding lower bit of the PMCSR1 register is written to the corresponding PPMC111 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 26. " PMCSR110 ,Value of the corresponding lower bit of the PMCSR1 register is written to the corresponding PPMC110 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PMCSR19 ,Value of the corresponding lower bit of the PMCSR1 register is written to the corresponding PPMC19 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 24. " PMCSR18 ,Value of the corresponding lower bit of the PMCSR1 register is written to the corresponding PPMC18 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PMCSR17 ,Value of the corresponding lower bit of the PMCSR1 register is written to the corresponding PPMC17 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 22. " PMCSR16 ,Value of the corresponding lower bit of the PMCSR1 register is written to the corresponding PPMC16 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PMCSR15 ,Value of the corresponding lower bit of the PMCSR1 register is written to the corresponding PPMC15 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 20. " PMCSR14 ,Value of the corresponding lower bit of the PMCSR1 register is written to the corresponding PPMC14 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 19. " PMCSR13 ,Value of the corresponding lower bit of the PMCSR1 register is written to the corresponding PPMC13 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 18. " PMCSR12 ,Value of the corresponding lower bit of the PMCSR1 register is written to the corresponding PPMC12 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 17. " PMCSR11 ,Value of the corresponding lower bit of the PMCSR1 register is written to the corresponding PPMC11 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 16. " PMCSR10 ,Value of the corresponding lower bit of the PMCSR1 register is written to the corresponding PPMC10 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PMCSR115 ,Value of the corresponding higher bit of the PMC1 register" "PMC115=0,PMC115=1"
|
|
bitfld.long 0x0 14. " PMCSR114 ,Value of the corresponding higher bit of the PMC1 register" "PMC114=0,PMC114=1"
|
|
bitfld.long 0x0 13. " PMCSR113 ,Value of the corresponding higher bit of the PMC1 register" "PMC113=0,PMC113=1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PMCSR112 ,Value of the corresponding higher bit of the PMC1 register" "PMC112=0,PMC112=1"
|
|
bitfld.long 0x0 11. " PMCSR111 ,Value of the corresponding higher bit of the PMC1 register" "PMC111=0,PMC111=1"
|
|
bitfld.long 0x0 10. " PMCSR110 ,Value of the corresponding higher bit of the PMC1 register" "PMC110=0,PMC110=1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PMCSR19 ,Value of the corresponding higher bit of the PMC1 register" "PMC19=0,PMC19=1"
|
|
bitfld.long 0x0 8. " PMCSR18 ,Value of the corresponding higher bit of the PMC1 register" "PMC18=0,PMC18=1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PMCSR17 ,Value of the corresponding higher bit of the PMC1 register" "PMC17=0,PMC17=1"
|
|
bitfld.long 0x0 6. " PMCSR16 ,Value of the corresponding higher bit of the PMC1 register" "PMC16=0,PMC16=1"
|
|
bitfld.long 0x0 5. " PMCSR15 ,Value of the corresponding higher bit of the PMC1 register" "PMC15=0,PMC15=1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PMCSR14 ,Value of the corresponding higher bit of the PMC1 register" "PMC14=0,PMC14=1"
|
|
bitfld.long 0x0 3. " PMCSR13 ,Value of the corresponding higher bit of the PMC1 register" "PMC13=0,PMC13=1"
|
|
bitfld.long 0x0 2. " PMCSR12 ,Value of the corresponding higher bit of the PMC1 register" "PMC12=0,PMC12=1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PMCSR11 ,Value of the corresponding higher bit of the PMC1 register" "PMC11=0,PMC11=1"
|
|
bitfld.long 0x0 0. " PMCSR10 ,Value of the corresponding higher bit of the PMC1 register" "PMC10=0,PMC10=1"
|
|
group.word (0xA00+0x4)++0x1
|
|
line.word 0x00 "PFCAE1,Port 1 Function Control Additional Expansion register"
|
|
bitfld.word 0x0 15. " PFCAE115 ,Specifies the alternative function of a pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PFCAE114 ,Specifies the alternative function of a pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PFCAE113 ,Specifies the alternative function of a pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFCAE112 ,Specifies the alternative function of a pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PFCAE111 ,Specifies the alternative function of a pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PFCAE110 ,Specifies the alternative function of a pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFCAE19 ,Specifies the alternative function of a pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PFCAE18 ,Specifies the alternative function of a pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFCAE17 ,Specifies the alternative function of a pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PFCAE16 ,Specifies the alternative function of a pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PFCAE15 ,Specifies the alternative function of a pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFCAE14 ,Specifies the alternative function of a pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PFCAE13 ,Specifies the alternative function of a pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PFCAE12 ,Specifies the alternative function of a pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCAE11 ,Specifies the alternative function of a pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PFCAE10 ,Specifies the alternative function of a pin 0" "Disabled,Enabled"
|
|
group.word (0x4000+0x4)++0x1
|
|
line.word 0x00 "PIBC1,Port 1 input buffer control register"
|
|
bitfld.word 0x0 15. " PIBC115 ,Enable or disable the input buffer of pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PIBC114 ,Enable or disable the input buffer of pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PIBC113 ,Enable or disable the input buffer of pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PIBC112 ,Enable or disable the input buffer of pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PIBC111 ,Enable or disable the input buffer of pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PIBC110 ,Enable or disable the input buffer of pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PIBC19 ,Enable or disable the input buffer of pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PIBC18 ,Enable or disable the input buffer of pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIBC17 ,Enable or disable the input buffer of pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PIBC16 ,Enable or disable the input buffer of pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PIBC15 ,Enable or disable the input buffer of pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIBC14 ,Enable or disable the input buffer of pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PIBC13 ,Enable or disable the input buffer of pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PIBC12 ,Enable or disable the input buffer of pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PIBC11 ,Enable or disable the input buffer of pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PIBC10 ,Enable or disable the input buffer of pin 0" "Disabled,Enabled"
|
|
group.word (0x4100+0x4)++0x1
|
|
line.word 0x00 "PBDC1,Port 1 ibi-direction control register"
|
|
bitfld.word 0x0 15. " PBDC115 ,Enable bidirectional mode of the corresponding pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PBDC114 ,Enable bidirectional mode of the corresponding pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PBDC113 ,Enable bidirectional mode of the corresponding pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PBDC112 ,Enable bidirectional mode of the corresponding pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PBDC111 ,Enable bidirectional mode of the corresponding pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PBDC110 ,Enable bidirectional mode of the corresponding pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PBDC19 ,Enable bidirectional mode of the corresponding pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PBDC18 ,Enable bidirectional mode of the corresponding pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PBDC17 ,Enable bidirectional mode of the corresponding pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PBDC16 ,Enable bidirectional mode of the corresponding pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PBDC15 ,Enable bidirectional mode of the corresponding pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PBDC14 ,Enable bidirectional mode of the corresponding pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PBDC13 ,Enable bidirectional mode of the corresponding pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PBDC12 ,Enable bidirectional mode of the corresponding pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PBDC11 ,Enable bidirectional mode of the corresponding pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PBDC10 ,Enable bidirectional mode of the corresponding pin 0" "Disabled,Enabled"
|
|
group.word (0x4200+0x4)++0x1
|
|
line.word 0x00 "PIPC1,Port 1 IP control register"
|
|
bitfld.word 0x0 15. " PIPC115 ,The I/O mode" "According to the value of the PM1.PM115 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 14. " PIPC114 ,The I/O mode" "According to the value of the PM1.PM114 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 13. " PIPC113 ,The I/O mode" "According to the value of the PM1.PM113 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 12. " PIPC112 ,The I/O mode" "According to the value of the PM1.PM112 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 11. " PIPC111 ,The I/O mode" "According to the value of the PM1.PM111 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 10. " PIPC110 ,The I/O mode" "According to the value of the PM1.PM110 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PIPC19 ,The I/O mode" "According to the value of the PM1.PM19 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 8. " PIPC18 ,The I/O mode" "According to the value of the PM1.PM18 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIPC17 ,The I/O mode" "According to the value of the PM1.PM17 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 6. " PIPC16 ,The I/O mode" "According to the value of the PM1.PM16 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 5. " PIPC15 ,The I/O mode" "According to the value of the PM1.PM15 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIPC14 ,The I/O mode" "According to the value of the PM1.PM14 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 3. " PIPC13 ,The I/O mode" "According to the value of the PM1.PM13 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 2. " PIPC12 ,The I/O mode" "According to the value of the PM1.PM12 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 1. " PIPC11 ,The I/O mode" "According to the value of the PM1.PM11 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 0. " PIPC10 ,The I/O mode" "According to the value of the PM1.PM10 bit,Selected by the alternative function"
|
|
rgroup.long (0xc00+0x4)++0x3
|
|
line.long 0x00 "SNCR1,Serial sound interface noise canceler control register"
|
|
bitfld.long 0x00 6. " ETSEL ,The Ethernet controller and EthernetAVB status" "Eth. is enabled and Eth.AVB is disabled,Eth.AVB is enabled and Eth. is disabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " SSI5NCE ,Serial Sound Interface Channel 5 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SSI4NCE ,Serial Sound Interface Channel 4 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " SSI3NCE ,Serial Sound Interface Channel 3 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " SSI2NCE ,Serial Sound Interface Channel 2 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " SSI1NCE ,Serial Sound Interface Channel 1 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " SSI0NCE ,Serial Sound Interface Channel 0 Noise Canceler Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 2"
|
|
width 8.
|
|
group.word (0x00+0x8)++0x1
|
|
line.word 0x00 "P2,Port 2 register"
|
|
bitfld.word 0x0 15. " P215 ,Output level of the 15 pin " "Low,High"
|
|
bitfld.word 0x0 14. " P214 ,Output level of the 14 pin " "Low,High"
|
|
bitfld.word 0x0 13. " P213 ,Output level of the 13 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 12. " P212 ,Output level of the 12 pin " "Low,High"
|
|
bitfld.word 0x0 11. " P211 ,Output level of the 11 pin " "Low,High"
|
|
bitfld.word 0x0 10. " P210 ,Output level of the 10 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 9. " P29 ,Output level of the 9 pin " "Low,High"
|
|
bitfld.word 0x0 8. " P28 ,Output level of the 8 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 7. " P27 ,Output level of the 7 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 6. " P26 ,Output level of the 6 pin " "Low,High"
|
|
bitfld.word 0x0 5. " P25 ,Output level of the 5 pin " "Low,High"
|
|
bitfld.word 0x0 4. " P24 ,Output level of the 4 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 3. " P23 ,Output level of the 3 pin " "Low,High"
|
|
bitfld.word 0x0 2. " P22 ,Output level of the 2 pin " "Low,High"
|
|
bitfld.word 0x0 1. " P21 ,Output level of the 1 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 0. " P20 ,Output level of the 0 pin " "Low,High"
|
|
group.long (0x100+0x8)++0x3
|
|
line.long 0x00 "PSR2,Port 2 set/reset register"
|
|
bitfld.long 0x0 31. " PSR231 ,Value of the corresponding lower bit is written " "P231 is independent of PSR231,Value of the PSR231 bit"
|
|
bitfld.long 0x0 30. " PSR230 ,Value of the corresponding lower bit is written " "P230 is independent of PSR230,Value of the PSR230 bit"
|
|
textline " "
|
|
bitfld.long 0x0 29. " PSR229 ,Value of the corresponding lower bit is written " "P229 is independent of PSR229,Value of the PSR229 bit"
|
|
bitfld.long 0x0 28. " PSR228 ,Value of the corresponding lower bit is written " "P228 is independent of PSR228,Value of the PSR228 bit"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PSR227 ,Value of the corresponding lower bit is written " "P227 is independent of PSR227,Value of the PSR227 bit"
|
|
bitfld.long 0x0 26. " PSR226 ,Value of the corresponding lower bit is written " "P226 is independent of PSR226,Value of the PSR226 bit"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PSR225 ,Value of the corresponding lower bit is written " "P225 is independent of PSR225,Value of the PSR225 bit"
|
|
bitfld.long 0x0 24. " PSR224 ,Value of the corresponding lower bit is written " "P224 is independent of PSR224,Value of the PSR224 bit"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PSR223 ,Value of the corresponding lower bit is written " "P223 is independent of PSR223,Value of the PSR223 bit"
|
|
bitfld.long 0x0 22. " PSR222 ,Value of the corresponding lower bit is written " "P222 is independent of PSR222,Value of the PSR222 bit"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PSR221 ,Value of the corresponding lower bit is written " "P221 is independent of PSR221,Value of the PSR221 bit"
|
|
bitfld.long 0x0 20. " PSR220 ,Value of the corresponding lower bit is written " "P220 is independent of PSR220,Value of the PSR220 bit"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PSR219 ,Value of the corresponding lower bit is written " "P219 is independent of PSR219,Value of the PSR219 bit"
|
|
bitfld.long 0x0 18. " PSR218 ,Value of the corresponding lower bit is written " "P218 is independent of PSR218,Value of the PSR218 bit"
|
|
textline " "
|
|
bitfld.long 0x0 17. " PSR217 ,Value of the corresponding lower bit is written " "P217 is independent of PSR217,Value of the PSR217 bit"
|
|
bitfld.long 0x0 16. " PSR216 ,Value of the corresponding lower bit is written " "P216 is independent of PSR216,Value of the PSR216 bit"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PSR215 ,Value of the corresponding higher bit is written " "P215=0,P215=1"
|
|
bitfld.long 0x0 14. " PSR214 ,Value of the corresponding higher bit is written " "P214=0,P214=1"
|
|
bitfld.long 0x0 13. " PSR213 ,Value of the corresponding higher bit is written " "P213=0,P213=1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PSR212 ,Value of the corresponding higher bit is written " "P212=0,P212=1"
|
|
bitfld.long 0x0 11. " PSR211 ,Value of the corresponding higher bit is written " "P211=0,P211=1"
|
|
bitfld.long 0x0 10. " PSR210 ,Value of the corresponding higher bit is written " "P210=0,P210=1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PSR29 ,Value of the corresponding higher bit is written " "P29=0,P29=1"
|
|
bitfld.long 0x0 8. " PSR28 ,Value of the corresponding higher bit is written " "P28=0,P28=1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PSR27 ,Value of the corresponding higher bit is written " "P27=0,P27=1"
|
|
bitfld.long 0x0 6. " PSR26 ,Value of the corresponding higher bit is written " "P26=0,P26=1"
|
|
bitfld.long 0x0 5. " PSR25 ,Value of the corresponding higher bit is written " "P25=0,P25=1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PSR24 ,Value of the corresponding higher bit is written " "P24=0,P24=1"
|
|
bitfld.long 0x0 3. " PSR23 ,Value of the corresponding higher bit is written " "P23=0,P23=1"
|
|
bitfld.long 0x0 2. " PSR22 ,Value of the corresponding higher bit is written " "P22=0,P22=1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PSR21 ,Value of the corresponding higher bit is written " "P21=0,P21=1"
|
|
bitfld.long 0x0 0. " PSR20 ,Value of the corresponding higher bit is written " "P20=0,P20=1"
|
|
rgroup.word (0x200+0x8)++0x1
|
|
line.word 0x00 "PPR2,Port 2 pin read register"
|
|
bitfld.word 0x0 15. " PPR215 ,Value of the P2_15 pin" "0,1"
|
|
bitfld.word 0x0 14. " PPR214 ,Value of the P2_14 pin" "0,1"
|
|
bitfld.word 0x0 13. " PPR213 ,Value of the P2_13 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PPR212 ,Value of the P2_12 pin" "0,1"
|
|
bitfld.word 0x0 11. " PPR211 ,Value of the P2_11 pin" "0,1"
|
|
bitfld.word 0x0 10. " PPR210 ,Value of the P2_10 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PPR29 ,Value of the P2_9 pin" "0,1"
|
|
bitfld.word 0x0 8. " PPR28 ,Value of the P2_8 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PPR27 ,Value of the P2_7 pin" "0,1"
|
|
bitfld.word 0x0 6. " PPR26 ,Value of the P2_6 pin" "0,1"
|
|
bitfld.word 0x0 5. " PPR25 ,Value of the P2_5 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PPR24 ,Value of the P2_4 pin" "0,1"
|
|
bitfld.word 0x0 3. " PPR23 ,Value of the P2_3 pin" "0,1"
|
|
bitfld.word 0x0 2. " PPR22 ,Value of the P2_2 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PPR21 ,Value of the P2_1 pin" "0,1"
|
|
bitfld.word 0x0 0. " PPR20 ,Value of the P2_0 pin" "0,1"
|
|
group.word (0x300+0x8)++0x1
|
|
line.word 0x00 "PM2,Port 2 mode register"
|
|
bitfld.word 0x0 15. " PM215 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 14. " PM214 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 13. " PM213 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PM212 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 11. " PM211 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 10. " PM210 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PM29 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 8. " PM28 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PM27 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 6. " PM26 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 5. " PM25 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PM24 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 3. " PM23 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 2. " PM22 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PM21 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 0. " PM20 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
group.word (0x400+0x8)++0x1
|
|
line.word 0x00 "PMC2,Port 2 mode control register"
|
|
bitfld.word 0x0 15. " PMC215 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 14. " PMC214 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 13. " PMC213 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PMC212 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 11. " PMC211 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 10. " PMC210 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PMC29 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 8. " PMC28 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PMC27 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 6. " PMC26 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 5. " PMC25 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PMC24 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 3. " PMC23 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 2. " PMC22 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PMC21 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 0. " PMC20 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
group.word (0x500+0x8)++0x1
|
|
line.word 0x00 "PFC2,Port 2 function control register"
|
|
bitfld.word 0x0 15. " PFC215 , Specifies the alternative function of a pin 15" "0,1"
|
|
bitfld.word 0x0 14. " PFC214 , Specifies the alternative function of a pin 14" "0,1"
|
|
bitfld.word 0x0 13. " PFC213 , Specifies the alternative function of a pin 13" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFC212 , Specifies the alternative function of a pin 12" "0,1"
|
|
bitfld.word 0x0 11. " PFC211 , Specifies the alternative function of a pin 11" "0,1"
|
|
bitfld.word 0x0 10. " PFC210 , Specifies the alternative function of a pin 10" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFC29 , Specifies the alternative function of a pin 9" "0,1"
|
|
bitfld.word 0x0 8. " PFC28 , Specifies the alternative function of a pin 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFC27 , Specifies the alternative function of a pin 7" "0,1"
|
|
bitfld.word 0x0 6. " PFC26 , Specifies the alternative function of a pin 6" "0,1"
|
|
bitfld.word 0x0 5. " PFC25 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFC24 , Specifies the alternative function of a pin 4" "0,1"
|
|
bitfld.word 0x0 3. " PFC23 , Specifies the alternative function of a pin 3" "0,1"
|
|
bitfld.word 0x0 2. " PFC22 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFC21 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFC20 , Specifies the alternative function of a pin 0" "0,1"
|
|
group.word (0x600+0x8)++0x1
|
|
line.word 0x00 "PFCE2,Port 2 function control expansion register"
|
|
bitfld.word 0x0 15. " PFCE215 , Specifies the alternative function of a pin 15" "0,1"
|
|
bitfld.word 0x0 14. " PFCE214 , Specifies the alternative function of a pin 14" "0,1"
|
|
bitfld.word 0x0 13. " PFCE213 , Specifies the alternative function of a pin 13" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFCE212 , Specifies the alternative function of a pin 12" "0,1"
|
|
bitfld.word 0x0 11. " PFCE211 , Specifies the alternative function of a pin 11" "0,1"
|
|
bitfld.word 0x0 10. " PFCE210 , Specifies the alternative function of a pin 10" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFCE29 , Specifies the alternative function of a pin 9" "0,1"
|
|
bitfld.word 0x0 8. " PFCE28 , Specifies the alternative function of a pin 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFCE27 , Specifies the alternative function of a pin 7" "0,1"
|
|
bitfld.word 0x0 6. " PFCE26 , Specifies the alternative function of a pin 6" "0,1"
|
|
bitfld.word 0x0 5. " PFCE25 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFCE24 , Specifies the alternative function of a pin 4" "0,1"
|
|
bitfld.word 0x0 3. " PFCE23 , Specifies the alternative function of a pin 3" "0,1"
|
|
bitfld.word 0x0 2. " PFCE22 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCE21 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFCE20 , Specifies the alternative function of a pin 0" "0,1"
|
|
wgroup.word (0x700+0x8)++0x1
|
|
line.word 0x00 "PNOT2,Port 2 NOT register"
|
|
bitfld.word 0x0 15. " PNOT215 , Specifies whether to invert P2.P215" "Not inverted,Inverted"
|
|
bitfld.word 0x0 14. " PNOT214 , Specifies whether to invert P2.P214" "Not inverted,Inverted"
|
|
bitfld.word 0x0 13. " PNOT213 , Specifies whether to invert P2.P213" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PNOT212 , Specifies whether to invert P2.P212" "Not inverted,Inverted"
|
|
bitfld.word 0x0 11. " PNOT211 , Specifies whether to invert P2.P211" "Not inverted,Inverted"
|
|
bitfld.word 0x0 10. " PNOT210 , Specifies whether to invert P2.P210" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PNOT29 , Specifies whether to invert P2.P29" "Not inverted,Inverted"
|
|
bitfld.word 0x0 8. " PNOT28 , Specifies whether to invert P2.P28" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PNOT27 , Specifies whether to invert P2.P27" "Not inverted,Inverted"
|
|
bitfld.word 0x0 6. " PNOT26 , Specifies whether to invert P2.P26" "Not inverted,Inverted"
|
|
bitfld.word 0x0 5. " PNOT25 , Specifies whether to invert P2.P25" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PNOT24 , Specifies whether to invert P2.P24" "Not inverted,Inverted"
|
|
bitfld.word 0x0 3. " PNOT23 , Specifies whether to invert P2.P23" "Not inverted,Inverted"
|
|
bitfld.word 0x0 2. " PNOT22 , Specifies whether to invert P2.P22" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PNOT21 , Specifies whether to invert P2.P21" "Not inverted,Inverted"
|
|
bitfld.word 0x0 0. " PNOT20 , Specifies whether to invert P2.P20" "Not inverted,Inverted"
|
|
group.long (0x800+0x8)++0x3
|
|
line.long 0x00 "PMSR2,Port 2 mode set/reset register"
|
|
bitfld.long 0x0 31. " PMSR231 , Specifies whether the value of the corresponding lower bit of the PMSR2 register is written to the corresponding bit" "Not depend on the PMSR231 bit,Becomes value of the PMSR231 bit"
|
|
bitfld.long 0x0 30. " PMSR230 , Specifies whether the value of the corresponding lower bit of the PMSR2 register is written to the corresponding bit" "Not depend on the PMSR230 bit,Becomes value of the PMSR230 bit"
|
|
textline " "
|
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bitfld.long 0x0 29. " PMSR229 , Specifies whether the value of the corresponding lower bit of the PMSR2 register is written to the corresponding bit" "Not depend on the PMSR229 bit,Becomes value of the PMSR229 bit"
|
|
bitfld.long 0x0 28. " PMSR228 , Specifies whether the value of the corresponding lower bit of the PMSR2 register is written to the corresponding bit" "Not depend on the PMSR228 bit,Becomes value of the PMSR228 bit"
|
|
textline " "
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bitfld.long 0x0 27. " PMSR227 , Specifies whether the value of the corresponding lower bit of the PMSR2 register is written to the corresponding bit" "Not depend on the PMSR227 bit,Becomes value of the PMSR227 bit"
|
|
bitfld.long 0x0 26. " PMSR226 , Specifies whether the value of the corresponding lower bit of the PMSR2 register is written to the corresponding bit" "Not depend on the PMSR226 bit,Becomes value of the PMSR226 bit"
|
|
textline " "
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bitfld.long 0x0 25. " PMSR225 , Specifies whether the value of the corresponding lower bit of the PMSR2 register is written to the corresponding bit" "Not depend on the PMSR225 bit,Becomes value of the PMSR225 bit"
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bitfld.long 0x0 24. " PMSR224 , Specifies whether the value of the corresponding lower bit of the PMSR2 register is written to the corresponding bit" "Not depend on the PMSR224 bit,Becomes value of the PMSR224 bit"
|
|
textline " "
|
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bitfld.long 0x0 23. " PMSR223 , Specifies whether the value of the corresponding lower bit of the PMSR2 register is written to the corresponding bit" "Not depend on the PMSR223 bit,Becomes value of the PMSR223 bit"
|
|
bitfld.long 0x0 22. " PMSR222 , Specifies whether the value of the corresponding lower bit of the PMSR2 register is written to the corresponding bit" "Not depend on the PMSR222 bit,Becomes value of the PMSR222 bit"
|
|
textline " "
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|
bitfld.long 0x0 21. " PMSR221 , Specifies whether the value of the corresponding lower bit of the PMSR2 register is written to the corresponding bit" "Not depend on the PMSR221 bit,Becomes value of the PMSR221 bit"
|
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bitfld.long 0x0 20. " PMSR220 , Specifies whether the value of the corresponding lower bit of the PMSR2 register is written to the corresponding bit" "Not depend on the PMSR220 bit,Becomes value of the PMSR220 bit"
|
|
textline " "
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bitfld.long 0x0 19. " PMSR219 , Specifies whether the value of the corresponding lower bit of the PMSR2 register is written to the corresponding bit" "Not depend on the PMSR219 bit,Becomes value of the PMSR219 bit"
|
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bitfld.long 0x0 18. " PMSR218 , Specifies whether the value of the corresponding lower bit of the PMSR2 register is written to the corresponding bit" "Not depend on the PMSR218 bit,Becomes value of the PMSR218 bit"
|
|
textline " "
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bitfld.long 0x0 17. " PMSR217 , Specifies whether the value of the corresponding lower bit of the PMSR2 register is written to the corresponding bit" "Not depend on the PMSR217 bit,Becomes value of the PMSR217 bit"
|
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bitfld.long 0x0 16. " PMSR216 , Specifies whether the value of the corresponding lower bit of the PMSR2 register is written to the corresponding bit" "Not depend on the PMSR216 bit,Becomes value of the PMSR216 bit"
|
|
textline " "
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bitfld.long 0x0 15. " PMSR215 , Specifies whether the value of the corresponding higher bit of the PMSR2 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 14. " PMSR214 , Specifies whether the value of the corresponding higher bit of the PMSR2 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 13. " PMSR213 , Specifies whether the value of the corresponding higher bit of the PMSR2 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
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bitfld.long 0x0 12. " PMSR212 , Specifies whether the value of the corresponding higher bit of the PMSR2 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 11. " PMSR211 , Specifies whether the value of the corresponding higher bit of the PMSR2 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 10. " PMSR210 , Specifies whether the value of the corresponding higher bit of the PMSR2 register is 1" "PMnm = 0,PMnm = 1"
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|
textline " "
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bitfld.long 0x0 9. " PMSR29 , Specifies whether the value of the corresponding higher bit of the PMSR2 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 8. " PMSR28 , Specifies whether the value of the corresponding higher bit of the PMSR2 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
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bitfld.long 0x0 7. " PMSR27 , Specifies whether the value of the corresponding higher bit of the PMSR2 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 6. " PMSR26 , Specifies whether the value of the corresponding higher bit of the PMSR2 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 5. " PMSR25 , Specifies whether the value of the corresponding higher bit of the PMSR2 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
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bitfld.long 0x0 4. " PMSR24 , Specifies whether the value of the corresponding higher bit of the PMSR2 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 3. " PMSR23 , Specifies whether the value of the corresponding higher bit of the PMSR2 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 2. " PMSR22 , Specifies whether the value of the corresponding higher bit of the PMSR2 register is 1" "PMnm = 0,PMnm = 1"
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textline " "
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bitfld.long 0x0 1. " PMSR21 , Specifies whether the value of the corresponding higher bit of the PMSR2 register is 1" "PMnm = 0,PMnm = 1"
|
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bitfld.long 0x0 0. " PMSR20 , Specifies whether the value of the corresponding higher bit of the PMSR2 register is 1" "PMnm = 0,PMnm = 1"
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group.long (0x900+0x8)++0x3
|
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line.long 0x00 "PMCSR2,Port 2 mode scontrol set/reset register"
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bitfld.long 0x0 31. " PMCSR215 ,Value of the corresponding lower bit of the PMCSR2 register is written to the corresponding PPMC215 bit" "Disabled,Enabled"
|
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bitfld.long 0x0 30. " PMCSR214 ,Value of the corresponding lower bit of the PMCSR2 register is written to the corresponding PPMC214 bit" "Disabled,Enabled"
|
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bitfld.long 0x0 29. " PMCSR213 ,Value of the corresponding lower bit of the PMCSR2 register is written to the corresponding PPMC213 bit" "Disabled,Enabled"
|
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textline " "
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bitfld.long 0x0 28. " PMCSR212 ,Value of the corresponding lower bit of the PMCSR2 register is written to the corresponding PPMC212 bit" "Disabled,Enabled"
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bitfld.long 0x0 27. " PMCSR211 ,Value of the corresponding lower bit of the PMCSR2 register is written to the corresponding PPMC211 bit" "Disabled,Enabled"
|
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bitfld.long 0x0 26. " PMCSR210 ,Value of the corresponding lower bit of the PMCSR2 register is written to the corresponding PPMC210 bit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x0 25. " PMCSR29 ,Value of the corresponding lower bit of the PMCSR2 register is written to the corresponding PPMC29 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 24. " PMCSR28 ,Value of the corresponding lower bit of the PMCSR2 register is written to the corresponding PPMC28 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PMCSR27 ,Value of the corresponding lower bit of the PMCSR2 register is written to the corresponding PPMC27 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 22. " PMCSR26 ,Value of the corresponding lower bit of the PMCSR2 register is written to the corresponding PPMC26 bit" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x0 21. " PMCSR25 ,Value of the corresponding lower bit of the PMCSR2 register is written to the corresponding PPMC25 bit" "Disabled,Enabled"
|
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bitfld.long 0x0 20. " PMCSR24 ,Value of the corresponding lower bit of the PMCSR2 register is written to the corresponding PPMC24 bit" "Disabled,Enabled"
|
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bitfld.long 0x0 19. " PMCSR23 ,Value of the corresponding lower bit of the PMCSR2 register is written to the corresponding PPMC23 bit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x0 18. " PMCSR22 ,Value of the corresponding lower bit of the PMCSR2 register is written to the corresponding PPMC22 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 17. " PMCSR21 ,Value of the corresponding lower bit of the PMCSR2 register is written to the corresponding PPMC21 bit" "Disabled,Enabled"
|
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bitfld.long 0x0 16. " PMCSR20 ,Value of the corresponding lower bit of the PMCSR2 register is written to the corresponding PPMC20 bit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x0 15. " PMCSR215 ,Value of the corresponding higher bit of the PMC2 register" "PMC215=0,PMC215=1"
|
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bitfld.long 0x0 14. " PMCSR214 ,Value of the corresponding higher bit of the PMC2 register" "PMC214=0,PMC214=1"
|
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bitfld.long 0x0 13. " PMCSR213 ,Value of the corresponding higher bit of the PMC2 register" "PMC213=0,PMC213=1"
|
|
textline " "
|
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bitfld.long 0x0 12. " PMCSR212 ,Value of the corresponding higher bit of the PMC2 register" "PMC212=0,PMC212=1"
|
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bitfld.long 0x0 11. " PMCSR211 ,Value of the corresponding higher bit of the PMC2 register" "PMC211=0,PMC211=1"
|
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bitfld.long 0x0 10. " PMCSR210 ,Value of the corresponding higher bit of the PMC2 register" "PMC210=0,PMC210=1"
|
|
textline " "
|
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bitfld.long 0x0 9. " PMCSR29 ,Value of the corresponding higher bit of the PMC2 register" "PMC29=0,PMC29=1"
|
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bitfld.long 0x0 8. " PMCSR28 ,Value of the corresponding higher bit of the PMC2 register" "PMC28=0,PMC28=1"
|
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textline " "
|
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bitfld.long 0x0 7. " PMCSR27 ,Value of the corresponding higher bit of the PMC2 register" "PMC27=0,PMC27=1"
|
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bitfld.long 0x0 6. " PMCSR26 ,Value of the corresponding higher bit of the PMC2 register" "PMC26=0,PMC26=1"
|
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bitfld.long 0x0 5. " PMCSR25 ,Value of the corresponding higher bit of the PMC2 register" "PMC25=0,PMC25=1"
|
|
textline " "
|
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bitfld.long 0x0 4. " PMCSR24 ,Value of the corresponding higher bit of the PMC2 register" "PMC24=0,PMC24=1"
|
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bitfld.long 0x0 3. " PMCSR23 ,Value of the corresponding higher bit of the PMC2 register" "PMC23=0,PMC23=1"
|
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bitfld.long 0x0 2. " PMCSR22 ,Value of the corresponding higher bit of the PMC2 register" "PMC22=0,PMC22=1"
|
|
textline " "
|
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bitfld.long 0x0 1. " PMCSR21 ,Value of the corresponding higher bit of the PMC2 register" "PMC21=0,PMC21=1"
|
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bitfld.long 0x0 0. " PMCSR20 ,Value of the corresponding higher bit of the PMC2 register" "PMC20=0,PMC20=1"
|
|
group.word (0xA00+0x8)++0x1
|
|
line.word 0x00 "PFCAE2,Port 2 Function Control Additional Expansion register"
|
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bitfld.word 0x0 15. " PFCAE215 ,Specifies the alternative function of a pin 15" "Disabled,Enabled"
|
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bitfld.word 0x0 14. " PFCAE214 ,Specifies the alternative function of a pin 14" "Disabled,Enabled"
|
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bitfld.word 0x0 13. " PFCAE213 ,Specifies the alternative function of a pin 13" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.word 0x0 12. " PFCAE212 ,Specifies the alternative function of a pin 12" "Disabled,Enabled"
|
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bitfld.word 0x0 11. " PFCAE211 ,Specifies the alternative function of a pin 11" "Disabled,Enabled"
|
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bitfld.word 0x0 10. " PFCAE210 ,Specifies the alternative function of a pin 10" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.word 0x0 9. " PFCAE29 ,Specifies the alternative function of a pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PFCAE28 ,Specifies the alternative function of a pin 8" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.word 0x0 7. " PFCAE27 ,Specifies the alternative function of a pin 7" "Disabled,Enabled"
|
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bitfld.word 0x0 6. " PFCAE26 ,Specifies the alternative function of a pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PFCAE25 ,Specifies the alternative function of a pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFCAE24 ,Specifies the alternative function of a pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PFCAE23 ,Specifies the alternative function of a pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PFCAE22 ,Specifies the alternative function of a pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCAE21 ,Specifies the alternative function of a pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PFCAE20 ,Specifies the alternative function of a pin 0" "Disabled,Enabled"
|
|
group.word (0x4000+0x8)++0x1
|
|
line.word 0x00 "PIBC2,Port 2 input buffer control register"
|
|
bitfld.word 0x0 15. " PIBC215 ,Enable or disable the input buffer of pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PIBC214 ,Enable or disable the input buffer of pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PIBC213 ,Enable or disable the input buffer of pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PIBC212 ,Enable or disable the input buffer of pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PIBC211 ,Enable or disable the input buffer of pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PIBC210 ,Enable or disable the input buffer of pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PIBC29 ,Enable or disable the input buffer of pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PIBC28 ,Enable or disable the input buffer of pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIBC27 ,Enable or disable the input buffer of pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PIBC26 ,Enable or disable the input buffer of pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PIBC25 ,Enable or disable the input buffer of pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIBC24 ,Enable or disable the input buffer of pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PIBC23 ,Enable or disable the input buffer of pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PIBC22 ,Enable or disable the input buffer of pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PIBC21 ,Enable or disable the input buffer of pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PIBC20 ,Enable or disable the input buffer of pin 0" "Disabled,Enabled"
|
|
group.word (0x4100+0x8)++0x1
|
|
line.word 0x00 "PBDC2,Port 2 ibi-direction control register"
|
|
bitfld.word 0x0 15. " PBDC215 ,Enable bidirectional mode of the corresponding pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PBDC214 ,Enable bidirectional mode of the corresponding pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PBDC213 ,Enable bidirectional mode of the corresponding pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PBDC212 ,Enable bidirectional mode of the corresponding pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PBDC211 ,Enable bidirectional mode of the corresponding pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PBDC210 ,Enable bidirectional mode of the corresponding pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PBDC29 ,Enable bidirectional mode of the corresponding pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PBDC28 ,Enable bidirectional mode of the corresponding pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PBDC27 ,Enable bidirectional mode of the corresponding pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PBDC26 ,Enable bidirectional mode of the corresponding pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PBDC25 ,Enable bidirectional mode of the corresponding pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PBDC24 ,Enable bidirectional mode of the corresponding pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PBDC23 ,Enable bidirectional mode of the corresponding pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PBDC22 ,Enable bidirectional mode of the corresponding pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PBDC21 ,Enable bidirectional mode of the corresponding pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PBDC20 ,Enable bidirectional mode of the corresponding pin 0" "Disabled,Enabled"
|
|
group.word (0x4200+0x8)++0x1
|
|
line.word 0x00 "PIPC2,Port 2 IP control register"
|
|
bitfld.word 0x0 15. " PIPC215 ,The I/O mode" "According to the value of the PM2.PM215 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 14. " PIPC214 ,The I/O mode" "According to the value of the PM2.PM214 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 13. " PIPC213 ,The I/O mode" "According to the value of the PM2.PM213 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 12. " PIPC212 ,The I/O mode" "According to the value of the PM2.PM212 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 11. " PIPC211 ,The I/O mode" "According to the value of the PM2.PM211 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 10. " PIPC210 ,The I/O mode" "According to the value of the PM2.PM210 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PIPC29 ,The I/O mode" "According to the value of the PM2.PM29 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 8. " PIPC28 ,The I/O mode" "According to the value of the PM2.PM28 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIPC27 ,The I/O mode" "According to the value of the PM2.PM27 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 6. " PIPC26 ,The I/O mode" "According to the value of the PM2.PM26 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 5. " PIPC25 ,The I/O mode" "According to the value of the PM2.PM25 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIPC24 ,The I/O mode" "According to the value of the PM2.PM24 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 3. " PIPC23 ,The I/O mode" "According to the value of the PM2.PM23 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 2. " PIPC22 ,The I/O mode" "According to the value of the PM2.PM22 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 1. " PIPC21 ,The I/O mode" "According to the value of the PM2.PM21 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 0. " PIPC20 ,The I/O mode" "According to the value of the PM2.PM20 bit,Selected by the alternative function"
|
|
rgroup.long (0xc00+0x8)++0x3
|
|
line.long 0x00 "SNCR2,Serial sound interface noise canceler control register"
|
|
bitfld.long 0x00 6. " ETSEL ,The Ethernet controller and EthernetAVB status" "Eth. is enabled and Eth.AVB is disabled,Eth.AVB is enabled and Eth. is disabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " SSI5NCE ,Serial Sound Interface Channel 5 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SSI4NCE ,Serial Sound Interface Channel 4 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " SSI3NCE ,Serial Sound Interface Channel 3 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " SSI2NCE ,Serial Sound Interface Channel 2 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " SSI1NCE ,Serial Sound Interface Channel 1 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " SSI0NCE ,Serial Sound Interface Channel 0 Noise Canceler Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 3"
|
|
width 8.
|
|
group.word (0x00+0xC)++0x1
|
|
line.word 0x00 "P3,Port 3 register"
|
|
bitfld.word 0x0 15. " P315 ,Output level of the 15 pin " "Low,High"
|
|
bitfld.word 0x0 14. " P314 ,Output level of the 14 pin " "Low,High"
|
|
bitfld.word 0x0 13. " P313 ,Output level of the 13 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 12. " P312 ,Output level of the 12 pin " "Low,High"
|
|
bitfld.word 0x0 11. " P311 ,Output level of the 11 pin " "Low,High"
|
|
bitfld.word 0x0 10. " P310 ,Output level of the 10 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 9. " P39 ,Output level of the 9 pin " "Low,High"
|
|
bitfld.word 0x0 8. " P38 ,Output level of the 8 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 7. " P37 ,Output level of the 7 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 6. " P36 ,Output level of the 6 pin " "Low,High"
|
|
bitfld.word 0x0 5. " P35 ,Output level of the 5 pin " "Low,High"
|
|
bitfld.word 0x0 4. " P34 ,Output level of the 4 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 3. " P33 ,Output level of the 3 pin " "Low,High"
|
|
bitfld.word 0x0 2. " P32 ,Output level of the 2 pin " "Low,High"
|
|
bitfld.word 0x0 1. " P31 ,Output level of the 1 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 0. " P30 ,Output level of the 0 pin " "Low,High"
|
|
group.long (0x100+0xC)++0x3
|
|
line.long 0x00 "PSR3,Port 3 set/reset register"
|
|
bitfld.long 0x0 31. " PSR331 ,Value of the corresponding lower bit is written " "P331 is independent of PSR331,Value of the PSR331 bit"
|
|
bitfld.long 0x0 30. " PSR330 ,Value of the corresponding lower bit is written " "P330 is independent of PSR330,Value of the PSR330 bit"
|
|
textline " "
|
|
bitfld.long 0x0 29. " PSR329 ,Value of the corresponding lower bit is written " "P329 is independent of PSR329,Value of the PSR329 bit"
|
|
bitfld.long 0x0 28. " PSR328 ,Value of the corresponding lower bit is written " "P328 is independent of PSR328,Value of the PSR328 bit"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PSR327 ,Value of the corresponding lower bit is written " "P327 is independent of PSR327,Value of the PSR327 bit"
|
|
bitfld.long 0x0 26. " PSR326 ,Value of the corresponding lower bit is written " "P326 is independent of PSR326,Value of the PSR326 bit"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PSR325 ,Value of the corresponding lower bit is written " "P325 is independent of PSR325,Value of the PSR325 bit"
|
|
bitfld.long 0x0 24. " PSR324 ,Value of the corresponding lower bit is written " "P324 is independent of PSR324,Value of the PSR324 bit"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PSR323 ,Value of the corresponding lower bit is written " "P323 is independent of PSR323,Value of the PSR323 bit"
|
|
bitfld.long 0x0 22. " PSR322 ,Value of the corresponding lower bit is written " "P322 is independent of PSR322,Value of the PSR322 bit"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PSR321 ,Value of the corresponding lower bit is written " "P321 is independent of PSR321,Value of the PSR321 bit"
|
|
bitfld.long 0x0 20. " PSR320 ,Value of the corresponding lower bit is written " "P320 is independent of PSR320,Value of the PSR320 bit"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PSR319 ,Value of the corresponding lower bit is written " "P319 is independent of PSR319,Value of the PSR319 bit"
|
|
bitfld.long 0x0 18. " PSR318 ,Value of the corresponding lower bit is written " "P318 is independent of PSR318,Value of the PSR318 bit"
|
|
textline " "
|
|
bitfld.long 0x0 17. " PSR317 ,Value of the corresponding lower bit is written " "P317 is independent of PSR317,Value of the PSR317 bit"
|
|
bitfld.long 0x0 16. " PSR316 ,Value of the corresponding lower bit is written " "P316 is independent of PSR316,Value of the PSR316 bit"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PSR315 ,Value of the corresponding higher bit is written " "P315=0,P315=1"
|
|
bitfld.long 0x0 14. " PSR314 ,Value of the corresponding higher bit is written " "P314=0,P314=1"
|
|
bitfld.long 0x0 13. " PSR313 ,Value of the corresponding higher bit is written " "P313=0,P313=1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PSR312 ,Value of the corresponding higher bit is written " "P312=0,P312=1"
|
|
bitfld.long 0x0 11. " PSR311 ,Value of the corresponding higher bit is written " "P311=0,P311=1"
|
|
bitfld.long 0x0 10. " PSR310 ,Value of the corresponding higher bit is written " "P310=0,P310=1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PSR39 ,Value of the corresponding higher bit is written " "P39=0,P39=1"
|
|
bitfld.long 0x0 8. " PSR38 ,Value of the corresponding higher bit is written " "P38=0,P38=1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PSR37 ,Value of the corresponding higher bit is written " "P37=0,P37=1"
|
|
bitfld.long 0x0 6. " PSR36 ,Value of the corresponding higher bit is written " "P36=0,P36=1"
|
|
bitfld.long 0x0 5. " PSR35 ,Value of the corresponding higher bit is written " "P35=0,P35=1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PSR34 ,Value of the corresponding higher bit is written " "P34=0,P34=1"
|
|
bitfld.long 0x0 3. " PSR33 ,Value of the corresponding higher bit is written " "P33=0,P33=1"
|
|
bitfld.long 0x0 2. " PSR32 ,Value of the corresponding higher bit is written " "P32=0,P32=1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PSR31 ,Value of the corresponding higher bit is written " "P31=0,P31=1"
|
|
bitfld.long 0x0 0. " PSR30 ,Value of the corresponding higher bit is written " "P30=0,P30=1"
|
|
rgroup.word (0x200+0xC)++0x1
|
|
line.word 0x00 "PPR3,Port 3 pin read register"
|
|
bitfld.word 0x0 15. " PPR315 ,Value of the P3_15 pin" "0,1"
|
|
bitfld.word 0x0 14. " PPR314 ,Value of the P3_14 pin" "0,1"
|
|
bitfld.word 0x0 13. " PPR313 ,Value of the P3_13 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PPR312 ,Value of the P3_12 pin" "0,1"
|
|
bitfld.word 0x0 11. " PPR311 ,Value of the P3_11 pin" "0,1"
|
|
bitfld.word 0x0 10. " PPR310 ,Value of the P3_10 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PPR39 ,Value of the P3_9 pin" "0,1"
|
|
bitfld.word 0x0 8. " PPR38 ,Value of the P3_8 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PPR37 ,Value of the P3_7 pin" "0,1"
|
|
bitfld.word 0x0 6. " PPR36 ,Value of the P3_6 pin" "0,1"
|
|
bitfld.word 0x0 5. " PPR35 ,Value of the P3_5 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PPR34 ,Value of the P3_4 pin" "0,1"
|
|
bitfld.word 0x0 3. " PPR33 ,Value of the P3_3 pin" "0,1"
|
|
bitfld.word 0x0 2. " PPR32 ,Value of the P3_2 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PPR31 ,Value of the P3_1 pin" "0,1"
|
|
bitfld.word 0x0 0. " PPR30 ,Value of the P3_0 pin" "0,1"
|
|
group.word (0x300+0xC)++0x1
|
|
line.word 0x00 "PM3,Port 3 mode register"
|
|
bitfld.word 0x0 15. " PM315 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 14. " PM314 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 13. " PM313 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PM312 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 11. " PM311 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 10. " PM310 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PM39 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 8. " PM38 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PM37 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 6. " PM36 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 5. " PM35 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PM34 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 3. " PM33 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 2. " PM32 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PM31 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 0. " PM30 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
group.word (0x400+0xC)++0x1
|
|
line.word 0x00 "PMC3,Port 3 mode control register"
|
|
bitfld.word 0x0 15. " PMC315 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 14. " PMC314 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 13. " PMC313 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PMC312 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 11. " PMC311 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 10. " PMC310 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PMC39 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 8. " PMC38 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PMC37 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 6. " PMC36 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 5. " PMC35 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PMC34 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 3. " PMC33 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 2. " PMC32 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PMC31 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 0. " PMC30 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
group.word (0x500+0xC)++0x1
|
|
line.word 0x00 "PFC3,Port 3 function control register"
|
|
bitfld.word 0x0 15. " PFC315 , Specifies the alternative function of a pin 15" "0,1"
|
|
bitfld.word 0x0 14. " PFC314 , Specifies the alternative function of a pin 14" "0,1"
|
|
bitfld.word 0x0 13. " PFC313 , Specifies the alternative function of a pin 13" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFC312 , Specifies the alternative function of a pin 12" "0,1"
|
|
bitfld.word 0x0 11. " PFC311 , Specifies the alternative function of a pin 11" "0,1"
|
|
bitfld.word 0x0 10. " PFC310 , Specifies the alternative function of a pin 10" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFC39 , Specifies the alternative function of a pin 9" "0,1"
|
|
bitfld.word 0x0 8. " PFC38 , Specifies the alternative function of a pin 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFC37 , Specifies the alternative function of a pin 7" "0,1"
|
|
bitfld.word 0x0 6. " PFC36 , Specifies the alternative function of a pin 6" "0,1"
|
|
bitfld.word 0x0 5. " PFC35 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFC34 , Specifies the alternative function of a pin 4" "0,1"
|
|
bitfld.word 0x0 3. " PFC33 , Specifies the alternative function of a pin 3" "0,1"
|
|
bitfld.word 0x0 2. " PFC32 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFC31 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFC30 , Specifies the alternative function of a pin 0" "0,1"
|
|
group.word (0x600+0xC)++0x1
|
|
line.word 0x00 "PFCE3,Port 3 function control expansion register"
|
|
bitfld.word 0x0 15. " PFCE315 , Specifies the alternative function of a pin 15" "0,1"
|
|
bitfld.word 0x0 14. " PFCE314 , Specifies the alternative function of a pin 14" "0,1"
|
|
bitfld.word 0x0 13. " PFCE313 , Specifies the alternative function of a pin 13" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFCE312 , Specifies the alternative function of a pin 12" "0,1"
|
|
bitfld.word 0x0 11. " PFCE311 , Specifies the alternative function of a pin 11" "0,1"
|
|
bitfld.word 0x0 10. " PFCE310 , Specifies the alternative function of a pin 10" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFCE39 , Specifies the alternative function of a pin 9" "0,1"
|
|
bitfld.word 0x0 8. " PFCE38 , Specifies the alternative function of a pin 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFCE37 , Specifies the alternative function of a pin 7" "0,1"
|
|
bitfld.word 0x0 6. " PFCE36 , Specifies the alternative function of a pin 6" "0,1"
|
|
bitfld.word 0x0 5. " PFCE35 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFCE34 , Specifies the alternative function of a pin 4" "0,1"
|
|
bitfld.word 0x0 3. " PFCE33 , Specifies the alternative function of a pin 3" "0,1"
|
|
bitfld.word 0x0 2. " PFCE32 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCE31 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFCE30 , Specifies the alternative function of a pin 0" "0,1"
|
|
wgroup.word (0x700+0xC)++0x1
|
|
line.word 0x00 "PNOT3,Port 3 NOT register"
|
|
bitfld.word 0x0 15. " PNOT315 , Specifies whether to invert P3.P315" "Not inverted,Inverted"
|
|
bitfld.word 0x0 14. " PNOT314 , Specifies whether to invert P3.P314" "Not inverted,Inverted"
|
|
bitfld.word 0x0 13. " PNOT313 , Specifies whether to invert P3.P313" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PNOT312 , Specifies whether to invert P3.P312" "Not inverted,Inverted"
|
|
bitfld.word 0x0 11. " PNOT311 , Specifies whether to invert P3.P311" "Not inverted,Inverted"
|
|
bitfld.word 0x0 10. " PNOT310 , Specifies whether to invert P3.P310" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PNOT39 , Specifies whether to invert P3.P39" "Not inverted,Inverted"
|
|
bitfld.word 0x0 8. " PNOT38 , Specifies whether to invert P3.P38" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PNOT37 , Specifies whether to invert P3.P37" "Not inverted,Inverted"
|
|
bitfld.word 0x0 6. " PNOT36 , Specifies whether to invert P3.P36" "Not inverted,Inverted"
|
|
bitfld.word 0x0 5. " PNOT35 , Specifies whether to invert P3.P35" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PNOT34 , Specifies whether to invert P3.P34" "Not inverted,Inverted"
|
|
bitfld.word 0x0 3. " PNOT33 , Specifies whether to invert P3.P33" "Not inverted,Inverted"
|
|
bitfld.word 0x0 2. " PNOT32 , Specifies whether to invert P3.P32" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PNOT31 , Specifies whether to invert P3.P31" "Not inverted,Inverted"
|
|
bitfld.word 0x0 0. " PNOT30 , Specifies whether to invert P3.P30" "Not inverted,Inverted"
|
|
group.long (0x800+0xC)++0x3
|
|
line.long 0x00 "PMSR3,Port 3 mode set/reset register"
|
|
bitfld.long 0x0 31. " PMSR331 , Specifies whether the value of the corresponding lower bit of the PMSR3 register is written to the corresponding bit" "Not depend on the PMSR331 bit,Becomes value of the PMSR331 bit"
|
|
bitfld.long 0x0 30. " PMSR330 , Specifies whether the value of the corresponding lower bit of the PMSR3 register is written to the corresponding bit" "Not depend on the PMSR330 bit,Becomes value of the PMSR330 bit"
|
|
textline " "
|
|
bitfld.long 0x0 29. " PMSR329 , Specifies whether the value of the corresponding lower bit of the PMSR3 register is written to the corresponding bit" "Not depend on the PMSR329 bit,Becomes value of the PMSR329 bit"
|
|
bitfld.long 0x0 28. " PMSR328 , Specifies whether the value of the corresponding lower bit of the PMSR3 register is written to the corresponding bit" "Not depend on the PMSR328 bit,Becomes value of the PMSR328 bit"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PMSR327 , Specifies whether the value of the corresponding lower bit of the PMSR3 register is written to the corresponding bit" "Not depend on the PMSR327 bit,Becomes value of the PMSR327 bit"
|
|
bitfld.long 0x0 26. " PMSR326 , Specifies whether the value of the corresponding lower bit of the PMSR3 register is written to the corresponding bit" "Not depend on the PMSR326 bit,Becomes value of the PMSR326 bit"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PMSR325 , Specifies whether the value of the corresponding lower bit of the PMSR3 register is written to the corresponding bit" "Not depend on the PMSR325 bit,Becomes value of the PMSR325 bit"
|
|
bitfld.long 0x0 24. " PMSR324 , Specifies whether the value of the corresponding lower bit of the PMSR3 register is written to the corresponding bit" "Not depend on the PMSR324 bit,Becomes value of the PMSR324 bit"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PMSR323 , Specifies whether the value of the corresponding lower bit of the PMSR3 register is written to the corresponding bit" "Not depend on the PMSR323 bit,Becomes value of the PMSR323 bit"
|
|
bitfld.long 0x0 22. " PMSR322 , Specifies whether the value of the corresponding lower bit of the PMSR3 register is written to the corresponding bit" "Not depend on the PMSR322 bit,Becomes value of the PMSR322 bit"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PMSR321 , Specifies whether the value of the corresponding lower bit of the PMSR3 register is written to the corresponding bit" "Not depend on the PMSR321 bit,Becomes value of the PMSR321 bit"
|
|
bitfld.long 0x0 20. " PMSR320 , Specifies whether the value of the corresponding lower bit of the PMSR3 register is written to the corresponding bit" "Not depend on the PMSR320 bit,Becomes value of the PMSR320 bit"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PMSR319 , Specifies whether the value of the corresponding lower bit of the PMSR3 register is written to the corresponding bit" "Not depend on the PMSR319 bit,Becomes value of the PMSR319 bit"
|
|
bitfld.long 0x0 18. " PMSR318 , Specifies whether the value of the corresponding lower bit of the PMSR3 register is written to the corresponding bit" "Not depend on the PMSR318 bit,Becomes value of the PMSR318 bit"
|
|
textline " "
|
|
bitfld.long 0x0 17. " PMSR317 , Specifies whether the value of the corresponding lower bit of the PMSR3 register is written to the corresponding bit" "Not depend on the PMSR317 bit,Becomes value of the PMSR317 bit"
|
|
bitfld.long 0x0 16. " PMSR316 , Specifies whether the value of the corresponding lower bit of the PMSR3 register is written to the corresponding bit" "Not depend on the PMSR316 bit,Becomes value of the PMSR316 bit"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PMSR315 , Specifies whether the value of the corresponding higher bit of the PMSR3 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 14. " PMSR314 , Specifies whether the value of the corresponding higher bit of the PMSR3 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 13. " PMSR313 , Specifies whether the value of the corresponding higher bit of the PMSR3 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PMSR312 , Specifies whether the value of the corresponding higher bit of the PMSR3 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 11. " PMSR311 , Specifies whether the value of the corresponding higher bit of the PMSR3 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 10. " PMSR310 , Specifies whether the value of the corresponding higher bit of the PMSR3 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PMSR39 , Specifies whether the value of the corresponding higher bit of the PMSR3 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 8. " PMSR38 , Specifies whether the value of the corresponding higher bit of the PMSR3 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PMSR37 , Specifies whether the value of the corresponding higher bit of the PMSR3 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 6. " PMSR36 , Specifies whether the value of the corresponding higher bit of the PMSR3 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 5. " PMSR35 , Specifies whether the value of the corresponding higher bit of the PMSR3 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PMSR34 , Specifies whether the value of the corresponding higher bit of the PMSR3 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 3. " PMSR33 , Specifies whether the value of the corresponding higher bit of the PMSR3 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 2. " PMSR32 , Specifies whether the value of the corresponding higher bit of the PMSR3 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PMSR31 , Specifies whether the value of the corresponding higher bit of the PMSR3 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 0. " PMSR30 , Specifies whether the value of the corresponding higher bit of the PMSR3 register is 1" "PMnm = 0,PMnm = 1"
|
|
group.long (0x900+0xC)++0x3
|
|
line.long 0x00 "PMCSR3,Port 3 mode scontrol set/reset register"
|
|
bitfld.long 0x0 31. " PMCSR315 ,Value of the corresponding lower bit of the PMCSR3 register is written to the corresponding PPMC315 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " PMCSR314 ,Value of the corresponding lower bit of the PMCSR3 register is written to the corresponding PPMC314 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 29. " PMCSR313 ,Value of the corresponding lower bit of the PMCSR3 register is written to the corresponding PPMC313 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 28. " PMCSR312 ,Value of the corresponding lower bit of the PMCSR3 register is written to the corresponding PPMC312 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 27. " PMCSR311 ,Value of the corresponding lower bit of the PMCSR3 register is written to the corresponding PPMC311 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 26. " PMCSR310 ,Value of the corresponding lower bit of the PMCSR3 register is written to the corresponding PPMC310 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PMCSR39 ,Value of the corresponding lower bit of the PMCSR3 register is written to the corresponding PPMC39 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 24. " PMCSR38 ,Value of the corresponding lower bit of the PMCSR3 register is written to the corresponding PPMC38 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PMCSR37 ,Value of the corresponding lower bit of the PMCSR3 register is written to the corresponding PPMC37 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 22. " PMCSR36 ,Value of the corresponding lower bit of the PMCSR3 register is written to the corresponding PPMC36 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PMCSR35 ,Value of the corresponding lower bit of the PMCSR3 register is written to the corresponding PPMC35 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 20. " PMCSR34 ,Value of the corresponding lower bit of the PMCSR3 register is written to the corresponding PPMC34 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 19. " PMCSR33 ,Value of the corresponding lower bit of the PMCSR3 register is written to the corresponding PPMC33 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 18. " PMCSR32 ,Value of the corresponding lower bit of the PMCSR3 register is written to the corresponding PPMC32 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 17. " PMCSR31 ,Value of the corresponding lower bit of the PMCSR3 register is written to the corresponding PPMC31 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 16. " PMCSR30 ,Value of the corresponding lower bit of the PMCSR3 register is written to the corresponding PPMC30 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PMCSR315 ,Value of the corresponding higher bit of the PMC3 register" "PMC315=0,PMC315=1"
|
|
bitfld.long 0x0 14. " PMCSR314 ,Value of the corresponding higher bit of the PMC3 register" "PMC314=0,PMC314=1"
|
|
bitfld.long 0x0 13. " PMCSR313 ,Value of the corresponding higher bit of the PMC3 register" "PMC313=0,PMC313=1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PMCSR312 ,Value of the corresponding higher bit of the PMC3 register" "PMC312=0,PMC312=1"
|
|
bitfld.long 0x0 11. " PMCSR311 ,Value of the corresponding higher bit of the PMC3 register" "PMC311=0,PMC311=1"
|
|
bitfld.long 0x0 10. " PMCSR310 ,Value of the corresponding higher bit of the PMC3 register" "PMC310=0,PMC310=1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PMCSR39 ,Value of the corresponding higher bit of the PMC3 register" "PMC39=0,PMC39=1"
|
|
bitfld.long 0x0 8. " PMCSR38 ,Value of the corresponding higher bit of the PMC3 register" "PMC38=0,PMC38=1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PMCSR37 ,Value of the corresponding higher bit of the PMC3 register" "PMC37=0,PMC37=1"
|
|
bitfld.long 0x0 6. " PMCSR36 ,Value of the corresponding higher bit of the PMC3 register" "PMC36=0,PMC36=1"
|
|
bitfld.long 0x0 5. " PMCSR35 ,Value of the corresponding higher bit of the PMC3 register" "PMC35=0,PMC35=1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PMCSR34 ,Value of the corresponding higher bit of the PMC3 register" "PMC34=0,PMC34=1"
|
|
bitfld.long 0x0 3. " PMCSR33 ,Value of the corresponding higher bit of the PMC3 register" "PMC33=0,PMC33=1"
|
|
bitfld.long 0x0 2. " PMCSR32 ,Value of the corresponding higher bit of the PMC3 register" "PMC32=0,PMC32=1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PMCSR31 ,Value of the corresponding higher bit of the PMC3 register" "PMC31=0,PMC31=1"
|
|
bitfld.long 0x0 0. " PMCSR30 ,Value of the corresponding higher bit of the PMC3 register" "PMC30=0,PMC30=1"
|
|
group.word (0xA00+0xC)++0x1
|
|
line.word 0x00 "PFCAE3,Port 3 Function Control Additional Expansion register"
|
|
bitfld.word 0x0 15. " PFCAE315 ,Specifies the alternative function of a pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PFCAE314 ,Specifies the alternative function of a pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PFCAE313 ,Specifies the alternative function of a pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFCAE312 ,Specifies the alternative function of a pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PFCAE311 ,Specifies the alternative function of a pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PFCAE310 ,Specifies the alternative function of a pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFCAE39 ,Specifies the alternative function of a pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PFCAE38 ,Specifies the alternative function of a pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFCAE37 ,Specifies the alternative function of a pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PFCAE36 ,Specifies the alternative function of a pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PFCAE35 ,Specifies the alternative function of a pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFCAE34 ,Specifies the alternative function of a pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PFCAE33 ,Specifies the alternative function of a pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PFCAE32 ,Specifies the alternative function of a pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCAE31 ,Specifies the alternative function of a pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PFCAE30 ,Specifies the alternative function of a pin 0" "Disabled,Enabled"
|
|
group.word (0x4000+0xC)++0x1
|
|
line.word 0x00 "PIBC3,Port 3 input buffer control register"
|
|
bitfld.word 0x0 15. " PIBC315 ,Enable or disable the input buffer of pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PIBC314 ,Enable or disable the input buffer of pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PIBC313 ,Enable or disable the input buffer of pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PIBC312 ,Enable or disable the input buffer of pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PIBC311 ,Enable or disable the input buffer of pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PIBC310 ,Enable or disable the input buffer of pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PIBC39 ,Enable or disable the input buffer of pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PIBC38 ,Enable or disable the input buffer of pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIBC37 ,Enable or disable the input buffer of pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PIBC36 ,Enable or disable the input buffer of pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PIBC35 ,Enable or disable the input buffer of pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIBC34 ,Enable or disable the input buffer of pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PIBC33 ,Enable or disable the input buffer of pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PIBC32 ,Enable or disable the input buffer of pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PIBC31 ,Enable or disable the input buffer of pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PIBC30 ,Enable or disable the input buffer of pin 0" "Disabled,Enabled"
|
|
group.word (0x4100+0xC)++0x1
|
|
line.word 0x00 "PBDC3,Port 3 ibi-direction control register"
|
|
bitfld.word 0x0 15. " PBDC315 ,Enable bidirectional mode of the corresponding pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PBDC314 ,Enable bidirectional mode of the corresponding pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PBDC313 ,Enable bidirectional mode of the corresponding pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PBDC312 ,Enable bidirectional mode of the corresponding pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PBDC311 ,Enable bidirectional mode of the corresponding pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PBDC310 ,Enable bidirectional mode of the corresponding pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PBDC39 ,Enable bidirectional mode of the corresponding pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PBDC38 ,Enable bidirectional mode of the corresponding pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PBDC37 ,Enable bidirectional mode of the corresponding pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PBDC36 ,Enable bidirectional mode of the corresponding pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PBDC35 ,Enable bidirectional mode of the corresponding pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PBDC34 ,Enable bidirectional mode of the corresponding pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PBDC33 ,Enable bidirectional mode of the corresponding pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PBDC32 ,Enable bidirectional mode of the corresponding pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PBDC31 ,Enable bidirectional mode of the corresponding pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PBDC30 ,Enable bidirectional mode of the corresponding pin 0" "Disabled,Enabled"
|
|
group.word (0x4200+0xC)++0x1
|
|
line.word 0x00 "PIPC3,Port 3 IP control register"
|
|
bitfld.word 0x0 15. " PIPC315 ,The I/O mode" "According to the value of the PM3.PM315 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 14. " PIPC314 ,The I/O mode" "According to the value of the PM3.PM314 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 13. " PIPC313 ,The I/O mode" "According to the value of the PM3.PM313 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 12. " PIPC312 ,The I/O mode" "According to the value of the PM3.PM312 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 11. " PIPC311 ,The I/O mode" "According to the value of the PM3.PM311 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 10. " PIPC310 ,The I/O mode" "According to the value of the PM3.PM310 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PIPC39 ,The I/O mode" "According to the value of the PM3.PM39 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 8. " PIPC38 ,The I/O mode" "According to the value of the PM3.PM38 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIPC37 ,The I/O mode" "According to the value of the PM3.PM37 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 6. " PIPC36 ,The I/O mode" "According to the value of the PM3.PM36 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 5. " PIPC35 ,The I/O mode" "According to the value of the PM3.PM35 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIPC34 ,The I/O mode" "According to the value of the PM3.PM34 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 3. " PIPC33 ,The I/O mode" "According to the value of the PM3.PM33 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 2. " PIPC32 ,The I/O mode" "According to the value of the PM3.PM32 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 1. " PIPC31 ,The I/O mode" "According to the value of the PM3.PM31 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 0. " PIPC30 ,The I/O mode" "According to the value of the PM3.PM30 bit,Selected by the alternative function"
|
|
rgroup.long (0xc00+0xC)++0x3
|
|
line.long 0x00 "SNCR3,Serial sound interface noise canceler control register"
|
|
bitfld.long 0x00 6. " ETSEL ,The Ethernet controller and EthernetAVB status" "Eth. is enabled and Eth.AVB is disabled,Eth.AVB is enabled and Eth. is disabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " SSI5NCE ,Serial Sound Interface Channel 5 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SSI4NCE ,Serial Sound Interface Channel 4 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " SSI3NCE ,Serial Sound Interface Channel 3 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " SSI2NCE ,Serial Sound Interface Channel 2 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " SSI1NCE ,Serial Sound Interface Channel 1 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " SSI0NCE ,Serial Sound Interface Channel 0 Noise Canceler Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 4"
|
|
width 8.
|
|
group.word (0x00+0x10)++0x1
|
|
line.word 0x00 "P4,Port 4 register"
|
|
bitfld.word 0x0 15. " P415 ,Output level of the 15 pin " "Low,High"
|
|
bitfld.word 0x0 14. " P414 ,Output level of the 14 pin " "Low,High"
|
|
bitfld.word 0x0 13. " P413 ,Output level of the 13 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 12. " P412 ,Output level of the 12 pin " "Low,High"
|
|
bitfld.word 0x0 11. " P411 ,Output level of the 11 pin " "Low,High"
|
|
bitfld.word 0x0 10. " P410 ,Output level of the 10 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 9. " P49 ,Output level of the 9 pin " "Low,High"
|
|
bitfld.word 0x0 8. " P48 ,Output level of the 8 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 7. " P47 ,Output level of the 7 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 6. " P46 ,Output level of the 6 pin " "Low,High"
|
|
bitfld.word 0x0 5. " P45 ,Output level of the 5 pin " "Low,High"
|
|
bitfld.word 0x0 4. " P44 ,Output level of the 4 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 3. " P43 ,Output level of the 3 pin " "Low,High"
|
|
bitfld.word 0x0 2. " P42 ,Output level of the 2 pin " "Low,High"
|
|
bitfld.word 0x0 1. " P41 ,Output level of the 1 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 0. " P40 ,Output level of the 0 pin " "Low,High"
|
|
group.long (0x100+0x10)++0x3
|
|
line.long 0x00 "PSR4,Port 4 set/reset register"
|
|
bitfld.long 0x0 31. " PSR431 ,Value of the corresponding lower bit is written " "P431 is independent of PSR431,Value of the PSR431 bit"
|
|
bitfld.long 0x0 30. " PSR430 ,Value of the corresponding lower bit is written " "P430 is independent of PSR430,Value of the PSR430 bit"
|
|
textline " "
|
|
bitfld.long 0x0 29. " PSR429 ,Value of the corresponding lower bit is written " "P429 is independent of PSR429,Value of the PSR429 bit"
|
|
bitfld.long 0x0 28. " PSR428 ,Value of the corresponding lower bit is written " "P428 is independent of PSR428,Value of the PSR428 bit"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PSR427 ,Value of the corresponding lower bit is written " "P427 is independent of PSR427,Value of the PSR427 bit"
|
|
bitfld.long 0x0 26. " PSR426 ,Value of the corresponding lower bit is written " "P426 is independent of PSR426,Value of the PSR426 bit"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PSR425 ,Value of the corresponding lower bit is written " "P425 is independent of PSR425,Value of the PSR425 bit"
|
|
bitfld.long 0x0 24. " PSR424 ,Value of the corresponding lower bit is written " "P424 is independent of PSR424,Value of the PSR424 bit"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PSR423 ,Value of the corresponding lower bit is written " "P423 is independent of PSR423,Value of the PSR423 bit"
|
|
bitfld.long 0x0 22. " PSR422 ,Value of the corresponding lower bit is written " "P422 is independent of PSR422,Value of the PSR422 bit"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PSR421 ,Value of the corresponding lower bit is written " "P421 is independent of PSR421,Value of the PSR421 bit"
|
|
bitfld.long 0x0 20. " PSR420 ,Value of the corresponding lower bit is written " "P420 is independent of PSR420,Value of the PSR420 bit"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PSR419 ,Value of the corresponding lower bit is written " "P419 is independent of PSR419,Value of the PSR419 bit"
|
|
bitfld.long 0x0 18. " PSR418 ,Value of the corresponding lower bit is written " "P418 is independent of PSR418,Value of the PSR418 bit"
|
|
textline " "
|
|
bitfld.long 0x0 17. " PSR417 ,Value of the corresponding lower bit is written " "P417 is independent of PSR417,Value of the PSR417 bit"
|
|
bitfld.long 0x0 16. " PSR416 ,Value of the corresponding lower bit is written " "P416 is independent of PSR416,Value of the PSR416 bit"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PSR415 ,Value of the corresponding higher bit is written " "P415=0,P415=1"
|
|
bitfld.long 0x0 14. " PSR414 ,Value of the corresponding higher bit is written " "P414=0,P414=1"
|
|
bitfld.long 0x0 13. " PSR413 ,Value of the corresponding higher bit is written " "P413=0,P413=1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PSR412 ,Value of the corresponding higher bit is written " "P412=0,P412=1"
|
|
bitfld.long 0x0 11. " PSR411 ,Value of the corresponding higher bit is written " "P411=0,P411=1"
|
|
bitfld.long 0x0 10. " PSR410 ,Value of the corresponding higher bit is written " "P410=0,P410=1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PSR49 ,Value of the corresponding higher bit is written " "P49=0,P49=1"
|
|
bitfld.long 0x0 8. " PSR48 ,Value of the corresponding higher bit is written " "P48=0,P48=1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PSR47 ,Value of the corresponding higher bit is written " "P47=0,P47=1"
|
|
bitfld.long 0x0 6. " PSR46 ,Value of the corresponding higher bit is written " "P46=0,P46=1"
|
|
bitfld.long 0x0 5. " PSR45 ,Value of the corresponding higher bit is written " "P45=0,P45=1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PSR44 ,Value of the corresponding higher bit is written " "P44=0,P44=1"
|
|
bitfld.long 0x0 3. " PSR43 ,Value of the corresponding higher bit is written " "P43=0,P43=1"
|
|
bitfld.long 0x0 2. " PSR42 ,Value of the corresponding higher bit is written " "P42=0,P42=1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PSR41 ,Value of the corresponding higher bit is written " "P41=0,P41=1"
|
|
bitfld.long 0x0 0. " PSR40 ,Value of the corresponding higher bit is written " "P40=0,P40=1"
|
|
rgroup.word (0x200+0x10)++0x1
|
|
line.word 0x00 "PPR4,Port 4 pin read register"
|
|
bitfld.word 0x0 15. " PPR415 ,Value of the P4_15 pin" "0,1"
|
|
bitfld.word 0x0 14. " PPR414 ,Value of the P4_14 pin" "0,1"
|
|
bitfld.word 0x0 13. " PPR413 ,Value of the P4_13 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PPR412 ,Value of the P4_12 pin" "0,1"
|
|
bitfld.word 0x0 11. " PPR411 ,Value of the P4_11 pin" "0,1"
|
|
bitfld.word 0x0 10. " PPR410 ,Value of the P4_10 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PPR49 ,Value of the P4_9 pin" "0,1"
|
|
bitfld.word 0x0 8. " PPR48 ,Value of the P4_8 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PPR47 ,Value of the P4_7 pin" "0,1"
|
|
bitfld.word 0x0 6. " PPR46 ,Value of the P4_6 pin" "0,1"
|
|
bitfld.word 0x0 5. " PPR45 ,Value of the P4_5 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PPR44 ,Value of the P4_4 pin" "0,1"
|
|
bitfld.word 0x0 3. " PPR43 ,Value of the P4_3 pin" "0,1"
|
|
bitfld.word 0x0 2. " PPR42 ,Value of the P4_2 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PPR41 ,Value of the P4_1 pin" "0,1"
|
|
bitfld.word 0x0 0. " PPR40 ,Value of the P4_0 pin" "0,1"
|
|
group.word (0x300+0x10)++0x1
|
|
line.word 0x00 "PM4,Port 4 mode register"
|
|
bitfld.word 0x0 15. " PM415 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 14. " PM414 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 13. " PM413 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PM412 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 11. " PM411 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 10. " PM410 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PM49 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 8. " PM48 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PM47 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 6. " PM46 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 5. " PM45 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PM44 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 3. " PM43 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 2. " PM42 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PM41 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 0. " PM40 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
group.word (0x400+0x10)++0x1
|
|
line.word 0x00 "PMC4,Port 4 mode control register"
|
|
bitfld.word 0x0 15. " PMC415 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 14. " PMC414 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 13. " PMC413 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PMC412 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 11. " PMC411 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 10. " PMC410 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PMC49 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 8. " PMC48 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PMC47 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 6. " PMC46 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 5. " PMC45 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PMC44 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 3. " PMC43 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 2. " PMC42 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PMC41 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 0. " PMC40 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
group.word (0x500+0x10)++0x1
|
|
line.word 0x00 "PFC4,Port 4 function control register"
|
|
bitfld.word 0x0 15. " PFC415 , Specifies the alternative function of a pin 15" "0,1"
|
|
bitfld.word 0x0 14. " PFC414 , Specifies the alternative function of a pin 14" "0,1"
|
|
bitfld.word 0x0 13. " PFC413 , Specifies the alternative function of a pin 13" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFC412 , Specifies the alternative function of a pin 12" "0,1"
|
|
bitfld.word 0x0 11. " PFC411 , Specifies the alternative function of a pin 11" "0,1"
|
|
bitfld.word 0x0 10. " PFC410 , Specifies the alternative function of a pin 10" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFC49 , Specifies the alternative function of a pin 9" "0,1"
|
|
bitfld.word 0x0 8. " PFC48 , Specifies the alternative function of a pin 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFC47 , Specifies the alternative function of a pin 7" "0,1"
|
|
bitfld.word 0x0 6. " PFC46 , Specifies the alternative function of a pin 6" "0,1"
|
|
bitfld.word 0x0 5. " PFC45 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFC44 , Specifies the alternative function of a pin 4" "0,1"
|
|
bitfld.word 0x0 3. " PFC43 , Specifies the alternative function of a pin 3" "0,1"
|
|
bitfld.word 0x0 2. " PFC42 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFC41 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFC40 , Specifies the alternative function of a pin 0" "0,1"
|
|
group.word (0x600+0x10)++0x1
|
|
line.word 0x00 "PFCE4,Port 4 function control expansion register"
|
|
bitfld.word 0x0 15. " PFCE415 , Specifies the alternative function of a pin 15" "0,1"
|
|
bitfld.word 0x0 14. " PFCE414 , Specifies the alternative function of a pin 14" "0,1"
|
|
bitfld.word 0x0 13. " PFCE413 , Specifies the alternative function of a pin 13" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFCE412 , Specifies the alternative function of a pin 12" "0,1"
|
|
bitfld.word 0x0 11. " PFCE411 , Specifies the alternative function of a pin 11" "0,1"
|
|
bitfld.word 0x0 10. " PFCE410 , Specifies the alternative function of a pin 10" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFCE49 , Specifies the alternative function of a pin 9" "0,1"
|
|
bitfld.word 0x0 8. " PFCE48 , Specifies the alternative function of a pin 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFCE47 , Specifies the alternative function of a pin 7" "0,1"
|
|
bitfld.word 0x0 6. " PFCE46 , Specifies the alternative function of a pin 6" "0,1"
|
|
bitfld.word 0x0 5. " PFCE45 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFCE44 , Specifies the alternative function of a pin 4" "0,1"
|
|
bitfld.word 0x0 3. " PFCE43 , Specifies the alternative function of a pin 3" "0,1"
|
|
bitfld.word 0x0 2. " PFCE42 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCE41 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFCE40 , Specifies the alternative function of a pin 0" "0,1"
|
|
wgroup.word (0x700+0x10)++0x1
|
|
line.word 0x00 "PNOT4,Port 4 NOT register"
|
|
bitfld.word 0x0 15. " PNOT415 , Specifies whether to invert P4.P415" "Not inverted,Inverted"
|
|
bitfld.word 0x0 14. " PNOT414 , Specifies whether to invert P4.P414" "Not inverted,Inverted"
|
|
bitfld.word 0x0 13. " PNOT413 , Specifies whether to invert P4.P413" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PNOT412 , Specifies whether to invert P4.P412" "Not inverted,Inverted"
|
|
bitfld.word 0x0 11. " PNOT411 , Specifies whether to invert P4.P411" "Not inverted,Inverted"
|
|
bitfld.word 0x0 10. " PNOT410 , Specifies whether to invert P4.P410" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PNOT49 , Specifies whether to invert P4.P49" "Not inverted,Inverted"
|
|
bitfld.word 0x0 8. " PNOT48 , Specifies whether to invert P4.P48" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PNOT47 , Specifies whether to invert P4.P47" "Not inverted,Inverted"
|
|
bitfld.word 0x0 6. " PNOT46 , Specifies whether to invert P4.P46" "Not inverted,Inverted"
|
|
bitfld.word 0x0 5. " PNOT45 , Specifies whether to invert P4.P45" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PNOT44 , Specifies whether to invert P4.P44" "Not inverted,Inverted"
|
|
bitfld.word 0x0 3. " PNOT43 , Specifies whether to invert P4.P43" "Not inverted,Inverted"
|
|
bitfld.word 0x0 2. " PNOT42 , Specifies whether to invert P4.P42" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PNOT41 , Specifies whether to invert P4.P41" "Not inverted,Inverted"
|
|
bitfld.word 0x0 0. " PNOT40 , Specifies whether to invert P4.P40" "Not inverted,Inverted"
|
|
group.long (0x800+0x10)++0x3
|
|
line.long 0x00 "PMSR4,Port 4 mode set/reset register"
|
|
bitfld.long 0x0 31. " PMSR431 , Specifies whether the value of the corresponding lower bit of the PMSR4 register is written to the corresponding bit" "Not depend on the PMSR431 bit,Becomes value of the PMSR431 bit"
|
|
bitfld.long 0x0 30. " PMSR430 , Specifies whether the value of the corresponding lower bit of the PMSR4 register is written to the corresponding bit" "Not depend on the PMSR430 bit,Becomes value of the PMSR430 bit"
|
|
textline " "
|
|
bitfld.long 0x0 29. " PMSR429 , Specifies whether the value of the corresponding lower bit of the PMSR4 register is written to the corresponding bit" "Not depend on the PMSR429 bit,Becomes value of the PMSR429 bit"
|
|
bitfld.long 0x0 28. " PMSR428 , Specifies whether the value of the corresponding lower bit of the PMSR4 register is written to the corresponding bit" "Not depend on the PMSR428 bit,Becomes value of the PMSR428 bit"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PMSR427 , Specifies whether the value of the corresponding lower bit of the PMSR4 register is written to the corresponding bit" "Not depend on the PMSR427 bit,Becomes value of the PMSR427 bit"
|
|
bitfld.long 0x0 26. " PMSR426 , Specifies whether the value of the corresponding lower bit of the PMSR4 register is written to the corresponding bit" "Not depend on the PMSR426 bit,Becomes value of the PMSR426 bit"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PMSR425 , Specifies whether the value of the corresponding lower bit of the PMSR4 register is written to the corresponding bit" "Not depend on the PMSR425 bit,Becomes value of the PMSR425 bit"
|
|
bitfld.long 0x0 24. " PMSR424 , Specifies whether the value of the corresponding lower bit of the PMSR4 register is written to the corresponding bit" "Not depend on the PMSR424 bit,Becomes value of the PMSR424 bit"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PMSR423 , Specifies whether the value of the corresponding lower bit of the PMSR4 register is written to the corresponding bit" "Not depend on the PMSR423 bit,Becomes value of the PMSR423 bit"
|
|
bitfld.long 0x0 22. " PMSR422 , Specifies whether the value of the corresponding lower bit of the PMSR4 register is written to the corresponding bit" "Not depend on the PMSR422 bit,Becomes value of the PMSR422 bit"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PMSR421 , Specifies whether the value of the corresponding lower bit of the PMSR4 register is written to the corresponding bit" "Not depend on the PMSR421 bit,Becomes value of the PMSR421 bit"
|
|
bitfld.long 0x0 20. " PMSR420 , Specifies whether the value of the corresponding lower bit of the PMSR4 register is written to the corresponding bit" "Not depend on the PMSR420 bit,Becomes value of the PMSR420 bit"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PMSR419 , Specifies whether the value of the corresponding lower bit of the PMSR4 register is written to the corresponding bit" "Not depend on the PMSR419 bit,Becomes value of the PMSR419 bit"
|
|
bitfld.long 0x0 18. " PMSR418 , Specifies whether the value of the corresponding lower bit of the PMSR4 register is written to the corresponding bit" "Not depend on the PMSR418 bit,Becomes value of the PMSR418 bit"
|
|
textline " "
|
|
bitfld.long 0x0 17. " PMSR417 , Specifies whether the value of the corresponding lower bit of the PMSR4 register is written to the corresponding bit" "Not depend on the PMSR417 bit,Becomes value of the PMSR417 bit"
|
|
bitfld.long 0x0 16. " PMSR416 , Specifies whether the value of the corresponding lower bit of the PMSR4 register is written to the corresponding bit" "Not depend on the PMSR416 bit,Becomes value of the PMSR416 bit"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PMSR415 , Specifies whether the value of the corresponding higher bit of the PMSR4 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 14. " PMSR414 , Specifies whether the value of the corresponding higher bit of the PMSR4 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 13. " PMSR413 , Specifies whether the value of the corresponding higher bit of the PMSR4 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PMSR412 , Specifies whether the value of the corresponding higher bit of the PMSR4 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 11. " PMSR411 , Specifies whether the value of the corresponding higher bit of the PMSR4 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 10. " PMSR410 , Specifies whether the value of the corresponding higher bit of the PMSR4 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PMSR49 , Specifies whether the value of the corresponding higher bit of the PMSR4 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 8. " PMSR48 , Specifies whether the value of the corresponding higher bit of the PMSR4 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PMSR47 , Specifies whether the value of the corresponding higher bit of the PMSR4 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 6. " PMSR46 , Specifies whether the value of the corresponding higher bit of the PMSR4 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 5. " PMSR45 , Specifies whether the value of the corresponding higher bit of the PMSR4 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PMSR44 , Specifies whether the value of the corresponding higher bit of the PMSR4 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 3. " PMSR43 , Specifies whether the value of the corresponding higher bit of the PMSR4 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 2. " PMSR42 , Specifies whether the value of the corresponding higher bit of the PMSR4 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PMSR41 , Specifies whether the value of the corresponding higher bit of the PMSR4 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 0. " PMSR40 , Specifies whether the value of the corresponding higher bit of the PMSR4 register is 1" "PMnm = 0,PMnm = 1"
|
|
group.long (0x900+0x10)++0x3
|
|
line.long 0x00 "PMCSR4,Port 4 mode scontrol set/reset register"
|
|
bitfld.long 0x0 31. " PMCSR415 ,Value of the corresponding lower bit of the PMCSR4 register is written to the corresponding PPMC415 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " PMCSR414 ,Value of the corresponding lower bit of the PMCSR4 register is written to the corresponding PPMC414 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 29. " PMCSR413 ,Value of the corresponding lower bit of the PMCSR4 register is written to the corresponding PPMC413 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 28. " PMCSR412 ,Value of the corresponding lower bit of the PMCSR4 register is written to the corresponding PPMC412 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 27. " PMCSR411 ,Value of the corresponding lower bit of the PMCSR4 register is written to the corresponding PPMC411 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 26. " PMCSR410 ,Value of the corresponding lower bit of the PMCSR4 register is written to the corresponding PPMC410 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PMCSR49 ,Value of the corresponding lower bit of the PMCSR4 register is written to the corresponding PPMC49 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 24. " PMCSR48 ,Value of the corresponding lower bit of the PMCSR4 register is written to the corresponding PPMC48 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PMCSR47 ,Value of the corresponding lower bit of the PMCSR4 register is written to the corresponding PPMC47 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 22. " PMCSR46 ,Value of the corresponding lower bit of the PMCSR4 register is written to the corresponding PPMC46 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PMCSR45 ,Value of the corresponding lower bit of the PMCSR4 register is written to the corresponding PPMC45 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 20. " PMCSR44 ,Value of the corresponding lower bit of the PMCSR4 register is written to the corresponding PPMC44 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 19. " PMCSR43 ,Value of the corresponding lower bit of the PMCSR4 register is written to the corresponding PPMC43 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 18. " PMCSR42 ,Value of the corresponding lower bit of the PMCSR4 register is written to the corresponding PPMC42 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 17. " PMCSR41 ,Value of the corresponding lower bit of the PMCSR4 register is written to the corresponding PPMC41 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 16. " PMCSR40 ,Value of the corresponding lower bit of the PMCSR4 register is written to the corresponding PPMC40 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PMCSR415 ,Value of the corresponding higher bit of the PMC4 register" "PMC415=0,PMC415=1"
|
|
bitfld.long 0x0 14. " PMCSR414 ,Value of the corresponding higher bit of the PMC4 register" "PMC414=0,PMC414=1"
|
|
bitfld.long 0x0 13. " PMCSR413 ,Value of the corresponding higher bit of the PMC4 register" "PMC413=0,PMC413=1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PMCSR412 ,Value of the corresponding higher bit of the PMC4 register" "PMC412=0,PMC412=1"
|
|
bitfld.long 0x0 11. " PMCSR411 ,Value of the corresponding higher bit of the PMC4 register" "PMC411=0,PMC411=1"
|
|
bitfld.long 0x0 10. " PMCSR410 ,Value of the corresponding higher bit of the PMC4 register" "PMC410=0,PMC410=1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PMCSR49 ,Value of the corresponding higher bit of the PMC4 register" "PMC49=0,PMC49=1"
|
|
bitfld.long 0x0 8. " PMCSR48 ,Value of the corresponding higher bit of the PMC4 register" "PMC48=0,PMC48=1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PMCSR47 ,Value of the corresponding higher bit of the PMC4 register" "PMC47=0,PMC47=1"
|
|
bitfld.long 0x0 6. " PMCSR46 ,Value of the corresponding higher bit of the PMC4 register" "PMC46=0,PMC46=1"
|
|
bitfld.long 0x0 5. " PMCSR45 ,Value of the corresponding higher bit of the PMC4 register" "PMC45=0,PMC45=1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PMCSR44 ,Value of the corresponding higher bit of the PMC4 register" "PMC44=0,PMC44=1"
|
|
bitfld.long 0x0 3. " PMCSR43 ,Value of the corresponding higher bit of the PMC4 register" "PMC43=0,PMC43=1"
|
|
bitfld.long 0x0 2. " PMCSR42 ,Value of the corresponding higher bit of the PMC4 register" "PMC42=0,PMC42=1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PMCSR41 ,Value of the corresponding higher bit of the PMC4 register" "PMC41=0,PMC41=1"
|
|
bitfld.long 0x0 0. " PMCSR40 ,Value of the corresponding higher bit of the PMC4 register" "PMC40=0,PMC40=1"
|
|
group.word (0xA00+0x10)++0x1
|
|
line.word 0x00 "PFCAE4,Port 4 Function Control Additional Expansion register"
|
|
bitfld.word 0x0 15. " PFCAE415 ,Specifies the alternative function of a pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PFCAE414 ,Specifies the alternative function of a pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PFCAE413 ,Specifies the alternative function of a pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFCAE412 ,Specifies the alternative function of a pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PFCAE411 ,Specifies the alternative function of a pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PFCAE410 ,Specifies the alternative function of a pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFCAE49 ,Specifies the alternative function of a pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PFCAE48 ,Specifies the alternative function of a pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFCAE47 ,Specifies the alternative function of a pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PFCAE46 ,Specifies the alternative function of a pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PFCAE45 ,Specifies the alternative function of a pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFCAE44 ,Specifies the alternative function of a pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PFCAE43 ,Specifies the alternative function of a pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PFCAE42 ,Specifies the alternative function of a pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCAE41 ,Specifies the alternative function of a pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PFCAE40 ,Specifies the alternative function of a pin 0" "Disabled,Enabled"
|
|
group.word (0x4000+0x10)++0x1
|
|
line.word 0x00 "PIBC4,Port 4 input buffer control register"
|
|
bitfld.word 0x0 15. " PIBC415 ,Enable or disable the input buffer of pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PIBC414 ,Enable or disable the input buffer of pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PIBC413 ,Enable or disable the input buffer of pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PIBC412 ,Enable or disable the input buffer of pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PIBC411 ,Enable or disable the input buffer of pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PIBC410 ,Enable or disable the input buffer of pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PIBC49 ,Enable or disable the input buffer of pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PIBC48 ,Enable or disable the input buffer of pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIBC47 ,Enable or disable the input buffer of pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PIBC46 ,Enable or disable the input buffer of pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PIBC45 ,Enable or disable the input buffer of pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIBC44 ,Enable or disable the input buffer of pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PIBC43 ,Enable or disable the input buffer of pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PIBC42 ,Enable or disable the input buffer of pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PIBC41 ,Enable or disable the input buffer of pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PIBC40 ,Enable or disable the input buffer of pin 0" "Disabled,Enabled"
|
|
group.word (0x4100+0x10)++0x1
|
|
line.word 0x00 "PBDC4,Port 4 ibi-direction control register"
|
|
bitfld.word 0x0 15. " PBDC415 ,Enable bidirectional mode of the corresponding pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PBDC414 ,Enable bidirectional mode of the corresponding pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PBDC413 ,Enable bidirectional mode of the corresponding pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PBDC412 ,Enable bidirectional mode of the corresponding pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PBDC411 ,Enable bidirectional mode of the corresponding pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PBDC410 ,Enable bidirectional mode of the corresponding pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PBDC49 ,Enable bidirectional mode of the corresponding pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PBDC48 ,Enable bidirectional mode of the corresponding pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PBDC47 ,Enable bidirectional mode of the corresponding pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PBDC46 ,Enable bidirectional mode of the corresponding pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PBDC45 ,Enable bidirectional mode of the corresponding pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PBDC44 ,Enable bidirectional mode of the corresponding pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PBDC43 ,Enable bidirectional mode of the corresponding pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PBDC42 ,Enable bidirectional mode of the corresponding pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PBDC41 ,Enable bidirectional mode of the corresponding pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PBDC40 ,Enable bidirectional mode of the corresponding pin 0" "Disabled,Enabled"
|
|
group.word (0x4200+0x10)++0x1
|
|
line.word 0x00 "PIPC4,Port 4 IP control register"
|
|
bitfld.word 0x0 15. " PIPC415 ,The I/O mode" "According to the value of the PM4.PM415 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 14. " PIPC414 ,The I/O mode" "According to the value of the PM4.PM414 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 13. " PIPC413 ,The I/O mode" "According to the value of the PM4.PM413 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 12. " PIPC412 ,The I/O mode" "According to the value of the PM4.PM412 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 11. " PIPC411 ,The I/O mode" "According to the value of the PM4.PM411 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 10. " PIPC410 ,The I/O mode" "According to the value of the PM4.PM410 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PIPC49 ,The I/O mode" "According to the value of the PM4.PM49 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 8. " PIPC48 ,The I/O mode" "According to the value of the PM4.PM48 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIPC47 ,The I/O mode" "According to the value of the PM4.PM47 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 6. " PIPC46 ,The I/O mode" "According to the value of the PM4.PM46 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 5. " PIPC45 ,The I/O mode" "According to the value of the PM4.PM45 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIPC44 ,The I/O mode" "According to the value of the PM4.PM44 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 3. " PIPC43 ,The I/O mode" "According to the value of the PM4.PM43 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 2. " PIPC42 ,The I/O mode" "According to the value of the PM4.PM42 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 1. " PIPC41 ,The I/O mode" "According to the value of the PM4.PM41 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 0. " PIPC40 ,The I/O mode" "According to the value of the PM4.PM40 bit,Selected by the alternative function"
|
|
rgroup.long (0xc00+0x10)++0x3
|
|
line.long 0x00 "SNCR4,Serial sound interface noise canceler control register"
|
|
bitfld.long 0x00 6. " ETSEL ,The Ethernet controller and EthernetAVB status" "Eth. is enabled and Eth.AVB is disabled,Eth.AVB is enabled and Eth. is disabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " SSI5NCE ,Serial Sound Interface Channel 5 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SSI4NCE ,Serial Sound Interface Channel 4 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " SSI3NCE ,Serial Sound Interface Channel 3 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " SSI2NCE ,Serial Sound Interface Channel 2 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " SSI1NCE ,Serial Sound Interface Channel 1 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " SSI0NCE ,Serial Sound Interface Channel 0 Noise Canceler Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 5"
|
|
width 8.
|
|
group.word (0x00+0x14)++0x1
|
|
line.word 0x00 "P5,Port 5 register"
|
|
bitfld.word 0x0 10. " P510 ,Output level of the 10 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 9. " P59 ,Output level of the 9 pin " "Low,High"
|
|
bitfld.word 0x0 8. " P58 ,Output level of the 8 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 7. " P57 ,Output level of the 7 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 6. " P56 ,Output level of the 6 pin " "Low,High"
|
|
bitfld.word 0x0 5. " P55 ,Output level of the 5 pin " "Low,High"
|
|
bitfld.word 0x0 4. " P54 ,Output level of the 4 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 3. " P53 ,Output level of the 3 pin " "Low,High"
|
|
bitfld.word 0x0 2. " P52 ,Output level of the 2 pin " "Low,High"
|
|
bitfld.word 0x0 1. " P51 ,Output level of the 1 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 0. " P50 ,Output level of the 0 pin " "Low,High"
|
|
group.long (0x100+0x14)++0x3
|
|
line.long 0x00 "PSR5,Port 5 set/reset register"
|
|
bitfld.long 0x0 31. " PSR531 ,Value of the corresponding lower bit is written " "P531 is independent of PSR531,Value of the PSR531 bit"
|
|
bitfld.long 0x0 30. " PSR530 ,Value of the corresponding lower bit is written " "P530 is independent of PSR530,Value of the PSR530 bit"
|
|
textline " "
|
|
bitfld.long 0x0 29. " PSR529 ,Value of the corresponding lower bit is written " "P529 is independent of PSR529,Value of the PSR529 bit"
|
|
bitfld.long 0x0 28. " PSR528 ,Value of the corresponding lower bit is written " "P528 is independent of PSR528,Value of the PSR528 bit"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PSR527 ,Value of the corresponding lower bit is written " "P527 is independent of PSR527,Value of the PSR527 bit"
|
|
bitfld.long 0x0 26. " PSR526 ,Value of the corresponding lower bit is written " "P526 is independent of PSR526,Value of the PSR526 bit"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PSR525 ,Value of the corresponding lower bit is written " "P525 is independent of PSR525,Value of the PSR525 bit"
|
|
bitfld.long 0x0 24. " PSR524 ,Value of the corresponding lower bit is written " "P524 is independent of PSR524,Value of the PSR524 bit"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PSR523 ,Value of the corresponding lower bit is written " "P523 is independent of PSR523,Value of the PSR523 bit"
|
|
bitfld.long 0x0 22. " PSR522 ,Value of the corresponding lower bit is written " "P522 is independent of PSR522,Value of the PSR522 bit"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PSR521 ,Value of the corresponding lower bit is written " "P521 is independent of PSR521,Value of the PSR521 bit"
|
|
bitfld.long 0x0 20. " PSR520 ,Value of the corresponding lower bit is written " "P520 is independent of PSR520,Value of the PSR520 bit"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PSR519 ,Value of the corresponding lower bit is written " "P519 is independent of PSR519,Value of the PSR519 bit"
|
|
bitfld.long 0x0 18. " PSR518 ,Value of the corresponding lower bit is written " "P518 is independent of PSR518,Value of the PSR518 bit"
|
|
textline " "
|
|
bitfld.long 0x0 17. " PSR517 ,Value of the corresponding lower bit is written " "P517 is independent of PSR517,Value of the PSR517 bit"
|
|
bitfld.long 0x0 16. " PSR516 ,Value of the corresponding lower bit is written " "P516 is independent of PSR516,Value of the PSR516 bit"
|
|
textline " "
|
|
bitfld.long 0x0 10. " PSR510 ,Value of the corresponding higher bit is written " "P510=0,P510=1"
|
|
bitfld.long 0x0 9. " PSR59 ,Value of the corresponding higher bit is written " "P59=0,P59=1"
|
|
bitfld.long 0x0 8. " PSR58 ,Value of the corresponding higher bit is written " "P58=0,P58=1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PSR57 ,Value of the corresponding higher bit is written " "P57=0,P57=1"
|
|
bitfld.long 0x0 6. " PSR56 ,Value of the corresponding higher bit is written " "P56=0,P56=1"
|
|
bitfld.long 0x0 5. " PSR55 ,Value of the corresponding higher bit is written " "P55=0,P55=1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PSR54 ,Value of the corresponding higher bit is written " "P54=0,P54=1"
|
|
bitfld.long 0x0 3. " PSR53 ,Value of the corresponding higher bit is written " "P53=0,P53=1"
|
|
bitfld.long 0x0 2. " PSR52 ,Value of the corresponding higher bit is written " "P52=0,P52=1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PSR51 ,Value of the corresponding higher bit is written " "P51=0,P51=1"
|
|
bitfld.long 0x0 0. " PSR50 ,Value of the corresponding higher bit is written " "P50=0,P50=1"
|
|
rgroup.word (0x200+0x14)++0x1
|
|
line.word 0x00 "PPR5,Port 5 pin read register"
|
|
bitfld.word 0x0 10. " PPR510 ,Value of the P5_10 pin" "0,1"
|
|
bitfld.word 0x0 9. " PPR59 ,Value of the P5_9 pin" "0,1"
|
|
bitfld.word 0x0 8. " PPR58 ,Value of the P5_8 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PPR57 ,Value of the P5_7 pin" "0,1"
|
|
bitfld.word 0x0 6. " PPR56 ,Value of the P5_6 pin" "0,1"
|
|
bitfld.word 0x0 5. " PPR55 ,Value of the P5_5 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PPR54 ,Value of the P5_4 pin" "0,1"
|
|
bitfld.word 0x0 3. " PPR53 ,Value of the P5_3 pin" "0,1"
|
|
bitfld.word 0x0 2. " PPR52 ,Value of the P5_2 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PPR51 ,Value of the P5_1 pin" "0,1"
|
|
bitfld.word 0x0 0. " PPR50 ,Value of the P5_0 pin" "0,1"
|
|
group.word (0x300+0x14)++0x1
|
|
line.word 0x00 "PM5,Port 5 mode register"
|
|
bitfld.word 0x0 10. " PM510 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 9. " PM59 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 8. " PM58 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PM57 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 6. " PM56 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 5. " PM55 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PM54 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 3. " PM53 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 2. " PM52 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PM51 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 0. " PM50 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
group.word (0x400+0x14)++0x1
|
|
line.word 0x00 "PMC5,Port 5 mode control register"
|
|
bitfld.word 0x0 10. " PMC510 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 9. " PMC59 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 8. " PMC58 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PMC57 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 6. " PMC56 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 5. " PMC55 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PMC54 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 3. " PMC53 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 2. " PMC52 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PMC51 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 0. " PMC50 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
group.word (0x500+0x14)++0x1
|
|
line.word 0x00 "PFC5,Port 5 function control register"
|
|
bitfld.word 0x0 10. " PFC510 , Specifies the alternative function of a pin 10" "0,1"
|
|
bitfld.word 0x0 9. " PFC59 , Specifies the alternative function of a pin 9" "0,1"
|
|
bitfld.word 0x0 8. " PFC58 , Specifies the alternative function of a pin 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFC57 , Specifies the alternative function of a pin 7" "0,1"
|
|
bitfld.word 0x0 6. " PFC56 , Specifies the alternative function of a pin 6" "0,1"
|
|
bitfld.word 0x0 5. " PFC55 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFC54 , Specifies the alternative function of a pin 4" "0,1"
|
|
bitfld.word 0x0 3. " PFC53 , Specifies the alternative function of a pin 3" "0,1"
|
|
bitfld.word 0x0 2. " PFC52 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFC51 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFC50 , Specifies the alternative function of a pin 0" "0,1"
|
|
group.word (0x600+0x14)++0x1
|
|
line.word 0x00 "PFCE5,Port 5 function control expansion register"
|
|
bitfld.word 0x0 10. " PFCE510 , Specifies the alternative function of a pin 10" "0,1"
|
|
bitfld.word 0x0 9. " PFCE59 , Specifies the alternative function of a pin 9" "0,1"
|
|
bitfld.word 0x0 8. " PFCE58 , Specifies the alternative function of a pin 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFCE57 , Specifies the alternative function of a pin 7" "0,1"
|
|
bitfld.word 0x0 6. " PFCE56 , Specifies the alternative function of a pin 6" "0,1"
|
|
bitfld.word 0x0 5. " PFCE55 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFCE54 , Specifies the alternative function of a pin 4" "0,1"
|
|
bitfld.word 0x0 3. " PFCE53 , Specifies the alternative function of a pin 3" "0,1"
|
|
bitfld.word 0x0 2. " PFCE52 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCE51 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFCE50 , Specifies the alternative function of a pin 0" "0,1"
|
|
wgroup.word (0x700+0x14)++0x1
|
|
line.word 0x00 "PNOT5,Port 5 NOT register"
|
|
bitfld.word 0x0 10. " PNOT510 , Specifies whether to invert P5.P510" "Not inverted,Inverted"
|
|
bitfld.word 0x0 9. " PNOT59 , Specifies whether to invert P5.P59" "Not inverted,Inverted"
|
|
bitfld.word 0x0 8. " PNOT58 , Specifies whether to invert P5.P58" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PNOT57 , Specifies whether to invert P5.P57" "Not inverted,Inverted"
|
|
bitfld.word 0x0 6. " PNOT56 , Specifies whether to invert P5.P56" "Not inverted,Inverted"
|
|
bitfld.word 0x0 5. " PNOT55 , Specifies whether to invert P5.P55" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PNOT54 , Specifies whether to invert P5.P54" "Not inverted,Inverted"
|
|
bitfld.word 0x0 3. " PNOT53 , Specifies whether to invert P5.P53" "Not inverted,Inverted"
|
|
bitfld.word 0x0 2. " PNOT52 , Specifies whether to invert P5.P52" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PNOT51 , Specifies whether to invert P5.P51" "Not inverted,Inverted"
|
|
bitfld.word 0x0 0. " PNOT50 , Specifies whether to invert P5.P50" "Not inverted,Inverted"
|
|
group.long (0x800+0x14)++0x3
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|
line.long 0x00 "PMSR5,Port 5 mode set/reset register"
|
|
bitfld.long 0x0 31. " PMSR531 , Specifies whether the value of the corresponding lower bit of the PMSR5 register is written to the corresponding bit" "Not depend on the PMSR531 bit,Becomes value of the PMSR531 bit"
|
|
bitfld.long 0x0 30. " PMSR530 , Specifies whether the value of the corresponding lower bit of the PMSR5 register is written to the corresponding bit" "Not depend on the PMSR530 bit,Becomes value of the PMSR530 bit"
|
|
textline " "
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bitfld.long 0x0 29. " PMSR529 , Specifies whether the value of the corresponding lower bit of the PMSR5 register is written to the corresponding bit" "Not depend on the PMSR529 bit,Becomes value of the PMSR529 bit"
|
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bitfld.long 0x0 28. " PMSR528 , Specifies whether the value of the corresponding lower bit of the PMSR5 register is written to the corresponding bit" "Not depend on the PMSR528 bit,Becomes value of the PMSR528 bit"
|
|
textline " "
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bitfld.long 0x0 27. " PMSR527 , Specifies whether the value of the corresponding lower bit of the PMSR5 register is written to the corresponding bit" "Not depend on the PMSR527 bit,Becomes value of the PMSR527 bit"
|
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bitfld.long 0x0 26. " PMSR526 , Specifies whether the value of the corresponding lower bit of the PMSR5 register is written to the corresponding bit" "Not depend on the PMSR526 bit,Becomes value of the PMSR526 bit"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PMSR525 , Specifies whether the value of the corresponding lower bit of the PMSR5 register is written to the corresponding bit" "Not depend on the PMSR525 bit,Becomes value of the PMSR525 bit"
|
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bitfld.long 0x0 24. " PMSR524 , Specifies whether the value of the corresponding lower bit of the PMSR5 register is written to the corresponding bit" "Not depend on the PMSR524 bit,Becomes value of the PMSR524 bit"
|
|
textline " "
|
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bitfld.long 0x0 23. " PMSR523 , Specifies whether the value of the corresponding lower bit of the PMSR5 register is written to the corresponding bit" "Not depend on the PMSR523 bit,Becomes value of the PMSR523 bit"
|
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bitfld.long 0x0 22. " PMSR522 , Specifies whether the value of the corresponding lower bit of the PMSR5 register is written to the corresponding bit" "Not depend on the PMSR522 bit,Becomes value of the PMSR522 bit"
|
|
textline " "
|
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bitfld.long 0x0 21. " PMSR521 , Specifies whether the value of the corresponding lower bit of the PMSR5 register is written to the corresponding bit" "Not depend on the PMSR521 bit,Becomes value of the PMSR521 bit"
|
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bitfld.long 0x0 20. " PMSR520 , Specifies whether the value of the corresponding lower bit of the PMSR5 register is written to the corresponding bit" "Not depend on the PMSR520 bit,Becomes value of the PMSR520 bit"
|
|
textline " "
|
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bitfld.long 0x0 19. " PMSR519 , Specifies whether the value of the corresponding lower bit of the PMSR5 register is written to the corresponding bit" "Not depend on the PMSR519 bit,Becomes value of the PMSR519 bit"
|
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bitfld.long 0x0 18. " PMSR518 , Specifies whether the value of the corresponding lower bit of the PMSR5 register is written to the corresponding bit" "Not depend on the PMSR518 bit,Becomes value of the PMSR518 bit"
|
|
textline " "
|
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bitfld.long 0x0 17. " PMSR517 , Specifies whether the value of the corresponding lower bit of the PMSR5 register is written to the corresponding bit" "Not depend on the PMSR517 bit,Becomes value of the PMSR517 bit"
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bitfld.long 0x0 16. " PMSR516 , Specifies whether the value of the corresponding lower bit of the PMSR5 register is written to the corresponding bit" "Not depend on the PMSR516 bit,Becomes value of the PMSR516 bit"
|
|
textline " "
|
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bitfld.long 0x0 10. " PMSR510 , Specifies whether the value of the corresponding higher bit of the PMSR5 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 9. " PMSR59 , Specifies whether the value of the corresponding higher bit of the PMSR5 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 8. " PMSR58 , Specifies whether the value of the corresponding higher bit of the PMSR5 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PMSR57 , Specifies whether the value of the corresponding higher bit of the PMSR5 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 6. " PMSR56 , Specifies whether the value of the corresponding higher bit of the PMSR5 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 5. " PMSR55 , Specifies whether the value of the corresponding higher bit of the PMSR5 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PMSR54 , Specifies whether the value of the corresponding higher bit of the PMSR5 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 3. " PMSR53 , Specifies whether the value of the corresponding higher bit of the PMSR5 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 2. " PMSR52 , Specifies whether the value of the corresponding higher bit of the PMSR5 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
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bitfld.long 0x0 1. " PMSR51 , Specifies whether the value of the corresponding higher bit of the PMSR5 register is 1" "PMnm = 0,PMnm = 1"
|
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bitfld.long 0x0 0. " PMSR50 , Specifies whether the value of the corresponding higher bit of the PMSR5 register is 1" "PMnm = 0,PMnm = 1"
|
|
group.long (0x900+0x14)++0x3
|
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line.long 0x00 "PMCSR5,Port 5 mode scontrol set/reset register"
|
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bitfld.long 0x0 26. " PMCSR510 ,Value of the corresponding lower bit of the PMCSR5 register is written to the corresponding PPMC510 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. " PMCSR59 ,Value of the corresponding lower bit of the PMCSR5 register is written to the corresponding PPMC59 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 24. " PMCSR58 ,Value of the corresponding lower bit of the PMCSR5 register is written to the corresponding PPMC58 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PMCSR57 ,Value of the corresponding lower bit of the PMCSR5 register is written to the corresponding PPMC57 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 22. " PMCSR56 ,Value of the corresponding lower bit of the PMCSR5 register is written to the corresponding PPMC56 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PMCSR55 ,Value of the corresponding lower bit of the PMCSR5 register is written to the corresponding PPMC55 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 20. " PMCSR54 ,Value of the corresponding lower bit of the PMCSR5 register is written to the corresponding PPMC54 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 19. " PMCSR53 ,Value of the corresponding lower bit of the PMCSR5 register is written to the corresponding PPMC53 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 18. " PMCSR52 ,Value of the corresponding lower bit of the PMCSR5 register is written to the corresponding PPMC52 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 17. " PMCSR51 ,Value of the corresponding lower bit of the PMCSR5 register is written to the corresponding PPMC51 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 16. " PMCSR50 ,Value of the corresponding lower bit of the PMCSR5 register is written to the corresponding PPMC50 bit" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x0 10. " PMCSR510 ,Value of the corresponding higher bit of the PMC5 register" "PMC510=0,PMC510=1"
|
|
bitfld.long 0x0 9. " PMCSR59 ,Value of the corresponding higher bit of the PMC5 register" "PMC59=0,PMC59=1"
|
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bitfld.long 0x0 8. " PMCSR58 ,Value of the corresponding higher bit of the PMC5 register" "PMC58=0,PMC58=1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PMCSR57 ,Value of the corresponding higher bit of the PMC5 register" "PMC57=0,PMC57=1"
|
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bitfld.long 0x0 6. " PMCSR56 ,Value of the corresponding higher bit of the PMC5 register" "PMC56=0,PMC56=1"
|
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bitfld.long 0x0 5. " PMCSR55 ,Value of the corresponding higher bit of the PMC5 register" "PMC55=0,PMC55=1"
|
|
textline " "
|
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bitfld.long 0x0 4. " PMCSR54 ,Value of the corresponding higher bit of the PMC5 register" "PMC54=0,PMC54=1"
|
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bitfld.long 0x0 3. " PMCSR53 ,Value of the corresponding higher bit of the PMC5 register" "PMC53=0,PMC53=1"
|
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bitfld.long 0x0 2. " PMCSR52 ,Value of the corresponding higher bit of the PMC5 register" "PMC52=0,PMC52=1"
|
|
textline " "
|
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bitfld.long 0x0 1. " PMCSR51 ,Value of the corresponding higher bit of the PMC5 register" "PMC51=0,PMC51=1"
|
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bitfld.long 0x0 0. " PMCSR50 ,Value of the corresponding higher bit of the PMC5 register" "PMC50=0,PMC50=1"
|
|
group.word (0xA00+0x14)++0x1
|
|
line.word 0x00 "PFCAE5,Port 5 Function Control Additional Expansion register"
|
|
bitfld.word 0x0 10. " PFCAE510 ,Specifies the alternative function of a pin 10" "Disabled,Enabled"
|
|
bitfld.word 0x0 9. " PFCAE59 ,Specifies the alternative function of a pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PFCAE58 ,Specifies the alternative function of a pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFCAE57 ,Specifies the alternative function of a pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PFCAE56 ,Specifies the alternative function of a pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PFCAE55 ,Specifies the alternative function of a pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFCAE54 ,Specifies the alternative function of a pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PFCAE53 ,Specifies the alternative function of a pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PFCAE52 ,Specifies the alternative function of a pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCAE51 ,Specifies the alternative function of a pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PFCAE50 ,Specifies the alternative function of a pin 0" "Disabled,Enabled"
|
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group.word (0x4000+0x14)++0x1
|
|
line.word 0x00 "PIBC5,Port 5 input buffer control register"
|
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bitfld.word 0x0 10. " PIBC510 ,Enable or disable the input buffer of pin 10" "Disabled,Enabled"
|
|
bitfld.word 0x0 9. " PIBC59 ,Enable or disable the input buffer of pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PIBC58 ,Enable or disable the input buffer of pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIBC57 ,Enable or disable the input buffer of pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PIBC56 ,Enable or disable the input buffer of pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PIBC55 ,Enable or disable the input buffer of pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIBC54 ,Enable or disable the input buffer of pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PIBC53 ,Enable or disable the input buffer of pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PIBC52 ,Enable or disable the input buffer of pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PIBC51 ,Enable or disable the input buffer of pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PIBC50 ,Enable or disable the input buffer of pin 0" "Disabled,Enabled"
|
|
group.word (0x4100+0x14)++0x1
|
|
line.word 0x00 "PBDC5,Port 5 ibi-direction control register"
|
|
bitfld.word 0x0 10. " PBDC510 ,Enable bidirectional mode of the corresponding pin 10" "Disabled,Enabled"
|
|
bitfld.word 0x0 9. " PBDC59 ,Enable bidirectional mode of the corresponding pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PBDC58 ,Enable bidirectional mode of the corresponding pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PBDC57 ,Enable bidirectional mode of the corresponding pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PBDC56 ,Enable bidirectional mode of the corresponding pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PBDC55 ,Enable bidirectional mode of the corresponding pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PBDC54 ,Enable bidirectional mode of the corresponding pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PBDC53 ,Enable bidirectional mode of the corresponding pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PBDC52 ,Enable bidirectional mode of the corresponding pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PBDC51 ,Enable bidirectional mode of the corresponding pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PBDC50 ,Enable bidirectional mode of the corresponding pin 0" "Disabled,Enabled"
|
|
group.word (0x4200+0x14)++0x1
|
|
line.word 0x00 "PIPC5,Port 5 IP control register"
|
|
bitfld.word 0x0 10. " PIPC510 ,The I/O mode" "According to the value of the PM5.PM510 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PIPC59 ,The I/O mode" "According to the value of the PM5.PM59 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 8. " PIPC58 ,The I/O mode" "According to the value of the PM5.PM58 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIPC57 ,The I/O mode" "According to the value of the PM5.PM57 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 6. " PIPC56 ,The I/O mode" "According to the value of the PM5.PM56 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 5. " PIPC55 ,The I/O mode" "According to the value of the PM5.PM55 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIPC54 ,The I/O mode" "According to the value of the PM5.PM54 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 3. " PIPC53 ,The I/O mode" "According to the value of the PM5.PM53 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 2. " PIPC52 ,The I/O mode" "According to the value of the PM5.PM52 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 1. " PIPC51 ,The I/O mode" "According to the value of the PM5.PM51 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 0. " PIPC50 ,The I/O mode" "According to the value of the PM5.PM50 bit,Selected by the alternative function"
|
|
rgroup.long (0xc00+0x14)++0x3
|
|
line.long 0x00 "SNCR5,Serial sound interface noise canceler control register"
|
|
bitfld.long 0x00 6. " ETSEL ,The Ethernet controller and EthernetAVB status" "Eth. is enabled and Eth.AVB is disabled,Eth.AVB is enabled and Eth. is disabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " SSI5NCE ,Serial Sound Interface Channel 5 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SSI4NCE ,Serial Sound Interface Channel 4 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " SSI3NCE ,Serial Sound Interface Channel 3 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " SSI2NCE ,Serial Sound Interface Channel 2 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " SSI1NCE ,Serial Sound Interface Channel 1 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " SSI0NCE ,Serial Sound Interface Channel 0 Noise Canceler Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 6"
|
|
width 8.
|
|
group.word (0x00+0x18)++0x1
|
|
line.word 0x00 "P6,Port 6 register"
|
|
bitfld.word 0x0 15. " P615 ,Output level of the 15 pin " "Low,High"
|
|
bitfld.word 0x0 14. " P614 ,Output level of the 14 pin " "Low,High"
|
|
bitfld.word 0x0 13. " P613 ,Output level of the 13 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 12. " P612 ,Output level of the 12 pin " "Low,High"
|
|
bitfld.word 0x0 11. " P611 ,Output level of the 11 pin " "Low,High"
|
|
bitfld.word 0x0 10. " P610 ,Output level of the 10 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 9. " P69 ,Output level of the 9 pin " "Low,High"
|
|
bitfld.word 0x0 8. " P68 ,Output level of the 8 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 7. " P67 ,Output level of the 7 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 6. " P66 ,Output level of the 6 pin " "Low,High"
|
|
bitfld.word 0x0 5. " P65 ,Output level of the 5 pin " "Low,High"
|
|
bitfld.word 0x0 4. " P64 ,Output level of the 4 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 3. " P63 ,Output level of the 3 pin " "Low,High"
|
|
bitfld.word 0x0 2. " P62 ,Output level of the 2 pin " "Low,High"
|
|
bitfld.word 0x0 1. " P61 ,Output level of the 1 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 0. " P60 ,Output level of the 0 pin " "Low,High"
|
|
group.long (0x100+0x18)++0x3
|
|
line.long 0x00 "PSR6,Port 6 set/reset register"
|
|
bitfld.long 0x0 31. " PSR631 ,Value of the corresponding lower bit is written " "P631 is independent of PSR631,Value of the PSR631 bit"
|
|
bitfld.long 0x0 30. " PSR630 ,Value of the corresponding lower bit is written " "P630 is independent of PSR630,Value of the PSR630 bit"
|
|
textline " "
|
|
bitfld.long 0x0 29. " PSR629 ,Value of the corresponding lower bit is written " "P629 is independent of PSR629,Value of the PSR629 bit"
|
|
bitfld.long 0x0 28. " PSR628 ,Value of the corresponding lower bit is written " "P628 is independent of PSR628,Value of the PSR628 bit"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PSR627 ,Value of the corresponding lower bit is written " "P627 is independent of PSR627,Value of the PSR627 bit"
|
|
bitfld.long 0x0 26. " PSR626 ,Value of the corresponding lower bit is written " "P626 is independent of PSR626,Value of the PSR626 bit"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PSR625 ,Value of the corresponding lower bit is written " "P625 is independent of PSR625,Value of the PSR625 bit"
|
|
bitfld.long 0x0 24. " PSR624 ,Value of the corresponding lower bit is written " "P624 is independent of PSR624,Value of the PSR624 bit"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PSR623 ,Value of the corresponding lower bit is written " "P623 is independent of PSR623,Value of the PSR623 bit"
|
|
bitfld.long 0x0 22. " PSR622 ,Value of the corresponding lower bit is written " "P622 is independent of PSR622,Value of the PSR622 bit"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PSR621 ,Value of the corresponding lower bit is written " "P621 is independent of PSR621,Value of the PSR621 bit"
|
|
bitfld.long 0x0 20. " PSR620 ,Value of the corresponding lower bit is written " "P620 is independent of PSR620,Value of the PSR620 bit"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PSR619 ,Value of the corresponding lower bit is written " "P619 is independent of PSR619,Value of the PSR619 bit"
|
|
bitfld.long 0x0 18. " PSR618 ,Value of the corresponding lower bit is written " "P618 is independent of PSR618,Value of the PSR618 bit"
|
|
textline " "
|
|
bitfld.long 0x0 17. " PSR617 ,Value of the corresponding lower bit is written " "P617 is independent of PSR617,Value of the PSR617 bit"
|
|
bitfld.long 0x0 16. " PSR616 ,Value of the corresponding lower bit is written " "P616 is independent of PSR616,Value of the PSR616 bit"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PSR615 ,Value of the corresponding higher bit is written " "P615=0,P615=1"
|
|
bitfld.long 0x0 14. " PSR614 ,Value of the corresponding higher bit is written " "P614=0,P614=1"
|
|
bitfld.long 0x0 13. " PSR613 ,Value of the corresponding higher bit is written " "P613=0,P613=1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PSR612 ,Value of the corresponding higher bit is written " "P612=0,P612=1"
|
|
bitfld.long 0x0 11. " PSR611 ,Value of the corresponding higher bit is written " "P611=0,P611=1"
|
|
bitfld.long 0x0 10. " PSR610 ,Value of the corresponding higher bit is written " "P610=0,P610=1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PSR69 ,Value of the corresponding higher bit is written " "P69=0,P69=1"
|
|
bitfld.long 0x0 8. " PSR68 ,Value of the corresponding higher bit is written " "P68=0,P68=1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PSR67 ,Value of the corresponding higher bit is written " "P67=0,P67=1"
|
|
bitfld.long 0x0 6. " PSR66 ,Value of the corresponding higher bit is written " "P66=0,P66=1"
|
|
bitfld.long 0x0 5. " PSR65 ,Value of the corresponding higher bit is written " "P65=0,P65=1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PSR64 ,Value of the corresponding higher bit is written " "P64=0,P64=1"
|
|
bitfld.long 0x0 3. " PSR63 ,Value of the corresponding higher bit is written " "P63=0,P63=1"
|
|
bitfld.long 0x0 2. " PSR62 ,Value of the corresponding higher bit is written " "P62=0,P62=1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PSR61 ,Value of the corresponding higher bit is written " "P61=0,P61=1"
|
|
bitfld.long 0x0 0. " PSR60 ,Value of the corresponding higher bit is written " "P60=0,P60=1"
|
|
rgroup.word (0x200+0x18)++0x1
|
|
line.word 0x00 "PPR6,Port 6 pin read register"
|
|
bitfld.word 0x0 15. " PPR615 ,Value of the P6_15 pin" "0,1"
|
|
bitfld.word 0x0 14. " PPR614 ,Value of the P6_14 pin" "0,1"
|
|
bitfld.word 0x0 13. " PPR613 ,Value of the P6_13 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PPR612 ,Value of the P6_12 pin" "0,1"
|
|
bitfld.word 0x0 11. " PPR611 ,Value of the P6_11 pin" "0,1"
|
|
bitfld.word 0x0 10. " PPR610 ,Value of the P6_10 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PPR69 ,Value of the P6_9 pin" "0,1"
|
|
bitfld.word 0x0 8. " PPR68 ,Value of the P6_8 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PPR67 ,Value of the P6_7 pin" "0,1"
|
|
bitfld.word 0x0 6. " PPR66 ,Value of the P6_6 pin" "0,1"
|
|
bitfld.word 0x0 5. " PPR65 ,Value of the P6_5 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PPR64 ,Value of the P6_4 pin" "0,1"
|
|
bitfld.word 0x0 3. " PPR63 ,Value of the P6_3 pin" "0,1"
|
|
bitfld.word 0x0 2. " PPR62 ,Value of the P6_2 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PPR61 ,Value of the P6_1 pin" "0,1"
|
|
bitfld.word 0x0 0. " PPR60 ,Value of the P6_0 pin" "0,1"
|
|
group.word (0x300+0x18)++0x1
|
|
line.word 0x00 "PM6,Port 6 mode register"
|
|
bitfld.word 0x0 15. " PM615 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 14. " PM614 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 13. " PM613 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PM612 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 11. " PM611 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 10. " PM610 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PM69 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 8. " PM68 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PM67 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 6. " PM66 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 5. " PM65 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PM64 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 3. " PM63 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 2. " PM62 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PM61 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 0. " PM60 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
group.word (0x400+0x18)++0x1
|
|
line.word 0x00 "PMC6,Port 6 mode control register"
|
|
bitfld.word 0x0 15. " PMC615 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 14. " PMC614 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 13. " PMC613 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PMC612 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 11. " PMC611 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 10. " PMC610 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PMC69 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 8. " PMC68 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PMC67 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 6. " PMC66 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 5. " PMC65 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PMC64 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 3. " PMC63 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 2. " PMC62 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PMC61 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 0. " PMC60 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
group.word (0x500+0x18)++0x1
|
|
line.word 0x00 "PFC6,Port 6 function control register"
|
|
bitfld.word 0x0 15. " PFC615 , Specifies the alternative function of a pin 15" "0,1"
|
|
bitfld.word 0x0 14. " PFC614 , Specifies the alternative function of a pin 14" "0,1"
|
|
bitfld.word 0x0 13. " PFC613 , Specifies the alternative function of a pin 13" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFC612 , Specifies the alternative function of a pin 12" "0,1"
|
|
bitfld.word 0x0 11. " PFC611 , Specifies the alternative function of a pin 11" "0,1"
|
|
bitfld.word 0x0 10. " PFC610 , Specifies the alternative function of a pin 10" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFC69 , Specifies the alternative function of a pin 9" "0,1"
|
|
bitfld.word 0x0 8. " PFC68 , Specifies the alternative function of a pin 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFC67 , Specifies the alternative function of a pin 7" "0,1"
|
|
bitfld.word 0x0 6. " PFC66 , Specifies the alternative function of a pin 6" "0,1"
|
|
bitfld.word 0x0 5. " PFC65 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFC64 , Specifies the alternative function of a pin 4" "0,1"
|
|
bitfld.word 0x0 3. " PFC63 , Specifies the alternative function of a pin 3" "0,1"
|
|
bitfld.word 0x0 2. " PFC62 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFC61 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFC60 , Specifies the alternative function of a pin 0" "0,1"
|
|
group.word (0x600+0x18)++0x1
|
|
line.word 0x00 "PFCE6,Port 6 function control expansion register"
|
|
bitfld.word 0x0 15. " PFCE615 , Specifies the alternative function of a pin 15" "0,1"
|
|
bitfld.word 0x0 14. " PFCE614 , Specifies the alternative function of a pin 14" "0,1"
|
|
bitfld.word 0x0 13. " PFCE613 , Specifies the alternative function of a pin 13" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFCE612 , Specifies the alternative function of a pin 12" "0,1"
|
|
bitfld.word 0x0 11. " PFCE611 , Specifies the alternative function of a pin 11" "0,1"
|
|
bitfld.word 0x0 10. " PFCE610 , Specifies the alternative function of a pin 10" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFCE69 , Specifies the alternative function of a pin 9" "0,1"
|
|
bitfld.word 0x0 8. " PFCE68 , Specifies the alternative function of a pin 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFCE67 , Specifies the alternative function of a pin 7" "0,1"
|
|
bitfld.word 0x0 6. " PFCE66 , Specifies the alternative function of a pin 6" "0,1"
|
|
bitfld.word 0x0 5. " PFCE65 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFCE64 , Specifies the alternative function of a pin 4" "0,1"
|
|
bitfld.word 0x0 3. " PFCE63 , Specifies the alternative function of a pin 3" "0,1"
|
|
bitfld.word 0x0 2. " PFCE62 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCE61 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFCE60 , Specifies the alternative function of a pin 0" "0,1"
|
|
wgroup.word (0x700+0x18)++0x1
|
|
line.word 0x00 "PNOT6,Port 6 NOT register"
|
|
bitfld.word 0x0 15. " PNOT615 , Specifies whether to invert P6.P615" "Not inverted,Inverted"
|
|
bitfld.word 0x0 14. " PNOT614 , Specifies whether to invert P6.P614" "Not inverted,Inverted"
|
|
bitfld.word 0x0 13. " PNOT613 , Specifies whether to invert P6.P613" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PNOT612 , Specifies whether to invert P6.P612" "Not inverted,Inverted"
|
|
bitfld.word 0x0 11. " PNOT611 , Specifies whether to invert P6.P611" "Not inverted,Inverted"
|
|
bitfld.word 0x0 10. " PNOT610 , Specifies whether to invert P6.P610" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PNOT69 , Specifies whether to invert P6.P69" "Not inverted,Inverted"
|
|
bitfld.word 0x0 8. " PNOT68 , Specifies whether to invert P6.P68" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PNOT67 , Specifies whether to invert P6.P67" "Not inverted,Inverted"
|
|
bitfld.word 0x0 6. " PNOT66 , Specifies whether to invert P6.P66" "Not inverted,Inverted"
|
|
bitfld.word 0x0 5. " PNOT65 , Specifies whether to invert P6.P65" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PNOT64 , Specifies whether to invert P6.P64" "Not inverted,Inverted"
|
|
bitfld.word 0x0 3. " PNOT63 , Specifies whether to invert P6.P63" "Not inverted,Inverted"
|
|
bitfld.word 0x0 2. " PNOT62 , Specifies whether to invert P6.P62" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PNOT61 , Specifies whether to invert P6.P61" "Not inverted,Inverted"
|
|
bitfld.word 0x0 0. " PNOT60 , Specifies whether to invert P6.P60" "Not inverted,Inverted"
|
|
group.long (0x800+0x18)++0x3
|
|
line.long 0x00 "PMSR6,Port 6 mode set/reset register"
|
|
bitfld.long 0x0 31. " PMSR631 , Specifies whether the value of the corresponding lower bit of the PMSR6 register is written to the corresponding bit" "Not depend on the PMSR631 bit,Becomes value of the PMSR631 bit"
|
|
bitfld.long 0x0 30. " PMSR630 , Specifies whether the value of the corresponding lower bit of the PMSR6 register is written to the corresponding bit" "Not depend on the PMSR630 bit,Becomes value of the PMSR630 bit"
|
|
textline " "
|
|
bitfld.long 0x0 29. " PMSR629 , Specifies whether the value of the corresponding lower bit of the PMSR6 register is written to the corresponding bit" "Not depend on the PMSR629 bit,Becomes value of the PMSR629 bit"
|
|
bitfld.long 0x0 28. " PMSR628 , Specifies whether the value of the corresponding lower bit of the PMSR6 register is written to the corresponding bit" "Not depend on the PMSR628 bit,Becomes value of the PMSR628 bit"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PMSR627 , Specifies whether the value of the corresponding lower bit of the PMSR6 register is written to the corresponding bit" "Not depend on the PMSR627 bit,Becomes value of the PMSR627 bit"
|
|
bitfld.long 0x0 26. " PMSR626 , Specifies whether the value of the corresponding lower bit of the PMSR6 register is written to the corresponding bit" "Not depend on the PMSR626 bit,Becomes value of the PMSR626 bit"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PMSR625 , Specifies whether the value of the corresponding lower bit of the PMSR6 register is written to the corresponding bit" "Not depend on the PMSR625 bit,Becomes value of the PMSR625 bit"
|
|
bitfld.long 0x0 24. " PMSR624 , Specifies whether the value of the corresponding lower bit of the PMSR6 register is written to the corresponding bit" "Not depend on the PMSR624 bit,Becomes value of the PMSR624 bit"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PMSR623 , Specifies whether the value of the corresponding lower bit of the PMSR6 register is written to the corresponding bit" "Not depend on the PMSR623 bit,Becomes value of the PMSR623 bit"
|
|
bitfld.long 0x0 22. " PMSR622 , Specifies whether the value of the corresponding lower bit of the PMSR6 register is written to the corresponding bit" "Not depend on the PMSR622 bit,Becomes value of the PMSR622 bit"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PMSR621 , Specifies whether the value of the corresponding lower bit of the PMSR6 register is written to the corresponding bit" "Not depend on the PMSR621 bit,Becomes value of the PMSR621 bit"
|
|
bitfld.long 0x0 20. " PMSR620 , Specifies whether the value of the corresponding lower bit of the PMSR6 register is written to the corresponding bit" "Not depend on the PMSR620 bit,Becomes value of the PMSR620 bit"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PMSR619 , Specifies whether the value of the corresponding lower bit of the PMSR6 register is written to the corresponding bit" "Not depend on the PMSR619 bit,Becomes value of the PMSR619 bit"
|
|
bitfld.long 0x0 18. " PMSR618 , Specifies whether the value of the corresponding lower bit of the PMSR6 register is written to the corresponding bit" "Not depend on the PMSR618 bit,Becomes value of the PMSR618 bit"
|
|
textline " "
|
|
bitfld.long 0x0 17. " PMSR617 , Specifies whether the value of the corresponding lower bit of the PMSR6 register is written to the corresponding bit" "Not depend on the PMSR617 bit,Becomes value of the PMSR617 bit"
|
|
bitfld.long 0x0 16. " PMSR616 , Specifies whether the value of the corresponding lower bit of the PMSR6 register is written to the corresponding bit" "Not depend on the PMSR616 bit,Becomes value of the PMSR616 bit"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PMSR615 , Specifies whether the value of the corresponding higher bit of the PMSR6 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 14. " PMSR614 , Specifies whether the value of the corresponding higher bit of the PMSR6 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 13. " PMSR613 , Specifies whether the value of the corresponding higher bit of the PMSR6 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PMSR612 , Specifies whether the value of the corresponding higher bit of the PMSR6 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 11. " PMSR611 , Specifies whether the value of the corresponding higher bit of the PMSR6 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 10. " PMSR610 , Specifies whether the value of the corresponding higher bit of the PMSR6 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PMSR69 , Specifies whether the value of the corresponding higher bit of the PMSR6 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 8. " PMSR68 , Specifies whether the value of the corresponding higher bit of the PMSR6 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PMSR67 , Specifies whether the value of the corresponding higher bit of the PMSR6 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 6. " PMSR66 , Specifies whether the value of the corresponding higher bit of the PMSR6 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 5. " PMSR65 , Specifies whether the value of the corresponding higher bit of the PMSR6 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PMSR64 , Specifies whether the value of the corresponding higher bit of the PMSR6 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 3. " PMSR63 , Specifies whether the value of the corresponding higher bit of the PMSR6 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 2. " PMSR62 , Specifies whether the value of the corresponding higher bit of the PMSR6 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PMSR61 , Specifies whether the value of the corresponding higher bit of the PMSR6 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 0. " PMSR60 , Specifies whether the value of the corresponding higher bit of the PMSR6 register is 1" "PMnm = 0,PMnm = 1"
|
|
group.long (0x900+0x18)++0x3
|
|
line.long 0x00 "PMCSR6,Port 6 mode scontrol set/reset register"
|
|
bitfld.long 0x0 31. " PMCSR615 ,Value of the corresponding lower bit of the PMCSR6 register is written to the corresponding PPMC615 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " PMCSR614 ,Value of the corresponding lower bit of the PMCSR6 register is written to the corresponding PPMC614 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 29. " PMCSR613 ,Value of the corresponding lower bit of the PMCSR6 register is written to the corresponding PPMC613 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 28. " PMCSR612 ,Value of the corresponding lower bit of the PMCSR6 register is written to the corresponding PPMC612 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 27. " PMCSR611 ,Value of the corresponding lower bit of the PMCSR6 register is written to the corresponding PPMC611 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 26. " PMCSR610 ,Value of the corresponding lower bit of the PMCSR6 register is written to the corresponding PPMC610 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PMCSR69 ,Value of the corresponding lower bit of the PMCSR6 register is written to the corresponding PPMC69 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 24. " PMCSR68 ,Value of the corresponding lower bit of the PMCSR6 register is written to the corresponding PPMC68 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PMCSR67 ,Value of the corresponding lower bit of the PMCSR6 register is written to the corresponding PPMC67 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 22. " PMCSR66 ,Value of the corresponding lower bit of the PMCSR6 register is written to the corresponding PPMC66 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PMCSR65 ,Value of the corresponding lower bit of the PMCSR6 register is written to the corresponding PPMC65 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 20. " PMCSR64 ,Value of the corresponding lower bit of the PMCSR6 register is written to the corresponding PPMC64 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 19. " PMCSR63 ,Value of the corresponding lower bit of the PMCSR6 register is written to the corresponding PPMC63 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 18. " PMCSR62 ,Value of the corresponding lower bit of the PMCSR6 register is written to the corresponding PPMC62 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 17. " PMCSR61 ,Value of the corresponding lower bit of the PMCSR6 register is written to the corresponding PPMC61 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 16. " PMCSR60 ,Value of the corresponding lower bit of the PMCSR6 register is written to the corresponding PPMC60 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PMCSR615 ,Value of the corresponding higher bit of the PMC6 register" "PMC615=0,PMC615=1"
|
|
bitfld.long 0x0 14. " PMCSR614 ,Value of the corresponding higher bit of the PMC6 register" "PMC614=0,PMC614=1"
|
|
bitfld.long 0x0 13. " PMCSR613 ,Value of the corresponding higher bit of the PMC6 register" "PMC613=0,PMC613=1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PMCSR612 ,Value of the corresponding higher bit of the PMC6 register" "PMC612=0,PMC612=1"
|
|
bitfld.long 0x0 11. " PMCSR611 ,Value of the corresponding higher bit of the PMC6 register" "PMC611=0,PMC611=1"
|
|
bitfld.long 0x0 10. " PMCSR610 ,Value of the corresponding higher bit of the PMC6 register" "PMC610=0,PMC610=1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PMCSR69 ,Value of the corresponding higher bit of the PMC6 register" "PMC69=0,PMC69=1"
|
|
bitfld.long 0x0 8. " PMCSR68 ,Value of the corresponding higher bit of the PMC6 register" "PMC68=0,PMC68=1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PMCSR67 ,Value of the corresponding higher bit of the PMC6 register" "PMC67=0,PMC67=1"
|
|
bitfld.long 0x0 6. " PMCSR66 ,Value of the corresponding higher bit of the PMC6 register" "PMC66=0,PMC66=1"
|
|
bitfld.long 0x0 5. " PMCSR65 ,Value of the corresponding higher bit of the PMC6 register" "PMC65=0,PMC65=1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PMCSR64 ,Value of the corresponding higher bit of the PMC6 register" "PMC64=0,PMC64=1"
|
|
bitfld.long 0x0 3. " PMCSR63 ,Value of the corresponding higher bit of the PMC6 register" "PMC63=0,PMC63=1"
|
|
bitfld.long 0x0 2. " PMCSR62 ,Value of the corresponding higher bit of the PMC6 register" "PMC62=0,PMC62=1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PMCSR61 ,Value of the corresponding higher bit of the PMC6 register" "PMC61=0,PMC61=1"
|
|
bitfld.long 0x0 0. " PMCSR60 ,Value of the corresponding higher bit of the PMC6 register" "PMC60=0,PMC60=1"
|
|
group.word (0xA00+0x18)++0x1
|
|
line.word 0x00 "PFCAE6,Port 6 Function Control Additional Expansion register"
|
|
bitfld.word 0x0 15. " PFCAE615 ,Specifies the alternative function of a pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PFCAE614 ,Specifies the alternative function of a pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PFCAE613 ,Specifies the alternative function of a pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFCAE612 ,Specifies the alternative function of a pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PFCAE611 ,Specifies the alternative function of a pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PFCAE610 ,Specifies the alternative function of a pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFCAE69 ,Specifies the alternative function of a pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PFCAE68 ,Specifies the alternative function of a pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFCAE67 ,Specifies the alternative function of a pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PFCAE66 ,Specifies the alternative function of a pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PFCAE65 ,Specifies the alternative function of a pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFCAE64 ,Specifies the alternative function of a pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PFCAE63 ,Specifies the alternative function of a pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PFCAE62 ,Specifies the alternative function of a pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCAE61 ,Specifies the alternative function of a pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PFCAE60 ,Specifies the alternative function of a pin 0" "Disabled,Enabled"
|
|
group.word (0x4000+0x18)++0x1
|
|
line.word 0x00 "PIBC6,Port 6 input buffer control register"
|
|
bitfld.word 0x0 15. " PIBC615 ,Enable or disable the input buffer of pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PIBC614 ,Enable or disable the input buffer of pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PIBC613 ,Enable or disable the input buffer of pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PIBC612 ,Enable or disable the input buffer of pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PIBC611 ,Enable or disable the input buffer of pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PIBC610 ,Enable or disable the input buffer of pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PIBC69 ,Enable or disable the input buffer of pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PIBC68 ,Enable or disable the input buffer of pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIBC67 ,Enable or disable the input buffer of pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PIBC66 ,Enable or disable the input buffer of pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PIBC65 ,Enable or disable the input buffer of pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIBC64 ,Enable or disable the input buffer of pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PIBC63 ,Enable or disable the input buffer of pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PIBC62 ,Enable or disable the input buffer of pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PIBC61 ,Enable or disable the input buffer of pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PIBC60 ,Enable or disable the input buffer of pin 0" "Disabled,Enabled"
|
|
group.word (0x4100+0x18)++0x1
|
|
line.word 0x00 "PBDC6,Port 6 ibi-direction control register"
|
|
bitfld.word 0x0 15. " PBDC615 ,Enable bidirectional mode of the corresponding pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PBDC614 ,Enable bidirectional mode of the corresponding pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PBDC613 ,Enable bidirectional mode of the corresponding pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PBDC612 ,Enable bidirectional mode of the corresponding pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PBDC611 ,Enable bidirectional mode of the corresponding pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PBDC610 ,Enable bidirectional mode of the corresponding pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PBDC69 ,Enable bidirectional mode of the corresponding pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PBDC68 ,Enable bidirectional mode of the corresponding pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PBDC67 ,Enable bidirectional mode of the corresponding pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PBDC66 ,Enable bidirectional mode of the corresponding pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PBDC65 ,Enable bidirectional mode of the corresponding pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PBDC64 ,Enable bidirectional mode of the corresponding pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PBDC63 ,Enable bidirectional mode of the corresponding pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PBDC62 ,Enable bidirectional mode of the corresponding pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PBDC61 ,Enable bidirectional mode of the corresponding pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PBDC60 ,Enable bidirectional mode of the corresponding pin 0" "Disabled,Enabled"
|
|
group.word (0x4200+0x18)++0x1
|
|
line.word 0x00 "PIPC6,Port 6 IP control register"
|
|
bitfld.word 0x0 15. " PIPC615 ,The I/O mode" "According to the value of the PM6.PM615 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 14. " PIPC614 ,The I/O mode" "According to the value of the PM6.PM614 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 13. " PIPC613 ,The I/O mode" "According to the value of the PM6.PM613 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 12. " PIPC612 ,The I/O mode" "According to the value of the PM6.PM612 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 11. " PIPC611 ,The I/O mode" "According to the value of the PM6.PM611 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 10. " PIPC610 ,The I/O mode" "According to the value of the PM6.PM610 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PIPC69 ,The I/O mode" "According to the value of the PM6.PM69 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 8. " PIPC68 ,The I/O mode" "According to the value of the PM6.PM68 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIPC67 ,The I/O mode" "According to the value of the PM6.PM67 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 6. " PIPC66 ,The I/O mode" "According to the value of the PM6.PM66 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 5. " PIPC65 ,The I/O mode" "According to the value of the PM6.PM65 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIPC64 ,The I/O mode" "According to the value of the PM6.PM64 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 3. " PIPC63 ,The I/O mode" "According to the value of the PM6.PM63 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 2. " PIPC62 ,The I/O mode" "According to the value of the PM6.PM62 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 1. " PIPC61 ,The I/O mode" "According to the value of the PM6.PM61 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 0. " PIPC60 ,The I/O mode" "According to the value of the PM6.PM60 bit,Selected by the alternative function"
|
|
rgroup.long (0xc00+0x18)++0x3
|
|
line.long 0x00 "SNCR6,Serial sound interface noise canceler control register"
|
|
bitfld.long 0x00 6. " ETSEL ,The Ethernet controller and EthernetAVB status" "Eth. is enabled and Eth.AVB is disabled,Eth.AVB is enabled and Eth. is disabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " SSI5NCE ,Serial Sound Interface Channel 5 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SSI4NCE ,Serial Sound Interface Channel 4 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " SSI3NCE ,Serial Sound Interface Channel 3 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " SSI2NCE ,Serial Sound Interface Channel 2 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " SSI1NCE ,Serial Sound Interface Channel 1 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " SSI0NCE ,Serial Sound Interface Channel 0 Noise Canceler Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 7"
|
|
width 8.
|
|
group.word (0x00+0x1C)++0x1
|
|
line.word 0x00 "P7,Port 7 register"
|
|
bitfld.word 0x0 15. " P715 ,Output level of the 15 pin " "Low,High"
|
|
bitfld.word 0x0 14. " P714 ,Output level of the 14 pin " "Low,High"
|
|
bitfld.word 0x0 13. " P713 ,Output level of the 13 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 12. " P712 ,Output level of the 12 pin " "Low,High"
|
|
bitfld.word 0x0 11. " P711 ,Output level of the 11 pin " "Low,High"
|
|
bitfld.word 0x0 10. " P710 ,Output level of the 10 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 9. " P79 ,Output level of the 9 pin " "Low,High"
|
|
bitfld.word 0x0 8. " P78 ,Output level of the 8 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 7. " P77 ,Output level of the 7 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 6. " P76 ,Output level of the 6 pin " "Low,High"
|
|
bitfld.word 0x0 5. " P75 ,Output level of the 5 pin " "Low,High"
|
|
bitfld.word 0x0 4. " P74 ,Output level of the 4 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 3. " P73 ,Output level of the 3 pin " "Low,High"
|
|
bitfld.word 0x0 2. " P72 ,Output level of the 2 pin " "Low,High"
|
|
bitfld.word 0x0 1. " P71 ,Output level of the 1 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 0. " P70 ,Output level of the 0 pin " "Low,High"
|
|
group.long (0x100+0x1C)++0x3
|
|
line.long 0x00 "PSR7,Port 7 set/reset register"
|
|
bitfld.long 0x0 31. " PSR731 ,Value of the corresponding lower bit is written " "P731 is independent of PSR731,Value of the PSR731 bit"
|
|
bitfld.long 0x0 30. " PSR730 ,Value of the corresponding lower bit is written " "P730 is independent of PSR730,Value of the PSR730 bit"
|
|
textline " "
|
|
bitfld.long 0x0 29. " PSR729 ,Value of the corresponding lower bit is written " "P729 is independent of PSR729,Value of the PSR729 bit"
|
|
bitfld.long 0x0 28. " PSR728 ,Value of the corresponding lower bit is written " "P728 is independent of PSR728,Value of the PSR728 bit"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PSR727 ,Value of the corresponding lower bit is written " "P727 is independent of PSR727,Value of the PSR727 bit"
|
|
bitfld.long 0x0 26. " PSR726 ,Value of the corresponding lower bit is written " "P726 is independent of PSR726,Value of the PSR726 bit"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PSR725 ,Value of the corresponding lower bit is written " "P725 is independent of PSR725,Value of the PSR725 bit"
|
|
bitfld.long 0x0 24. " PSR724 ,Value of the corresponding lower bit is written " "P724 is independent of PSR724,Value of the PSR724 bit"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PSR723 ,Value of the corresponding lower bit is written " "P723 is independent of PSR723,Value of the PSR723 bit"
|
|
bitfld.long 0x0 22. " PSR722 ,Value of the corresponding lower bit is written " "P722 is independent of PSR722,Value of the PSR722 bit"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PSR721 ,Value of the corresponding lower bit is written " "P721 is independent of PSR721,Value of the PSR721 bit"
|
|
bitfld.long 0x0 20. " PSR720 ,Value of the corresponding lower bit is written " "P720 is independent of PSR720,Value of the PSR720 bit"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PSR719 ,Value of the corresponding lower bit is written " "P719 is independent of PSR719,Value of the PSR719 bit"
|
|
bitfld.long 0x0 18. " PSR718 ,Value of the corresponding lower bit is written " "P718 is independent of PSR718,Value of the PSR718 bit"
|
|
textline " "
|
|
bitfld.long 0x0 17. " PSR717 ,Value of the corresponding lower bit is written " "P717 is independent of PSR717,Value of the PSR717 bit"
|
|
bitfld.long 0x0 16. " PSR716 ,Value of the corresponding lower bit is written " "P716 is independent of PSR716,Value of the PSR716 bit"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PSR715 ,Value of the corresponding higher bit is written " "P715=0,P715=1"
|
|
bitfld.long 0x0 14. " PSR714 ,Value of the corresponding higher bit is written " "P714=0,P714=1"
|
|
bitfld.long 0x0 13. " PSR713 ,Value of the corresponding higher bit is written " "P713=0,P713=1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PSR712 ,Value of the corresponding higher bit is written " "P712=0,P712=1"
|
|
bitfld.long 0x0 11. " PSR711 ,Value of the corresponding higher bit is written " "P711=0,P711=1"
|
|
bitfld.long 0x0 10. " PSR710 ,Value of the corresponding higher bit is written " "P710=0,P710=1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PSR79 ,Value of the corresponding higher bit is written " "P79=0,P79=1"
|
|
bitfld.long 0x0 8. " PSR78 ,Value of the corresponding higher bit is written " "P78=0,P78=1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PSR77 ,Value of the corresponding higher bit is written " "P77=0,P77=1"
|
|
bitfld.long 0x0 6. " PSR76 ,Value of the corresponding higher bit is written " "P76=0,P76=1"
|
|
bitfld.long 0x0 5. " PSR75 ,Value of the corresponding higher bit is written " "P75=0,P75=1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PSR74 ,Value of the corresponding higher bit is written " "P74=0,P74=1"
|
|
bitfld.long 0x0 3. " PSR73 ,Value of the corresponding higher bit is written " "P73=0,P73=1"
|
|
bitfld.long 0x0 2. " PSR72 ,Value of the corresponding higher bit is written " "P72=0,P72=1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PSR71 ,Value of the corresponding higher bit is written " "P71=0,P71=1"
|
|
bitfld.long 0x0 0. " PSR70 ,Value of the corresponding higher bit is written " "P70=0,P70=1"
|
|
rgroup.word (0x200+0x1C)++0x1
|
|
line.word 0x00 "PPR7,Port 7 pin read register"
|
|
bitfld.word 0x0 15. " PPR715 ,Value of the P7_15 pin" "0,1"
|
|
bitfld.word 0x0 14. " PPR714 ,Value of the P7_14 pin" "0,1"
|
|
bitfld.word 0x0 13. " PPR713 ,Value of the P7_13 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PPR712 ,Value of the P7_12 pin" "0,1"
|
|
bitfld.word 0x0 11. " PPR711 ,Value of the P7_11 pin" "0,1"
|
|
bitfld.word 0x0 10. " PPR710 ,Value of the P7_10 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PPR79 ,Value of the P7_9 pin" "0,1"
|
|
bitfld.word 0x0 8. " PPR78 ,Value of the P7_8 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PPR77 ,Value of the P7_7 pin" "0,1"
|
|
bitfld.word 0x0 6. " PPR76 ,Value of the P7_6 pin" "0,1"
|
|
bitfld.word 0x0 5. " PPR75 ,Value of the P7_5 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PPR74 ,Value of the P7_4 pin" "0,1"
|
|
bitfld.word 0x0 3. " PPR73 ,Value of the P7_3 pin" "0,1"
|
|
bitfld.word 0x0 2. " PPR72 ,Value of the P7_2 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PPR71 ,Value of the P7_1 pin" "0,1"
|
|
bitfld.word 0x0 0. " PPR70 ,Value of the P7_0 pin" "0,1"
|
|
group.word (0x300+0x1C)++0x1
|
|
line.word 0x00 "PM7,Port 7 mode register"
|
|
bitfld.word 0x0 15. " PM715 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 14. " PM714 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 13. " PM713 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PM712 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 11. " PM711 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 10. " PM710 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PM79 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 8. " PM78 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
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bitfld.word 0x0 7. " PM77 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
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bitfld.word 0x0 6. " PM76 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
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bitfld.word 0x0 5. " PM75 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
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|
textline " "
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bitfld.word 0x0 4. " PM74 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
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bitfld.word 0x0 3. " PM73 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
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bitfld.word 0x0 2. " PM72 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
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|
textline " "
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bitfld.word 0x0 1. " PM71 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
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bitfld.word 0x0 0. " PM70 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
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group.word (0x400+0x1C)++0x1
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line.word 0x00 "PMC7,Port 7 mode control register"
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bitfld.word 0x0 15. " PMC715 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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bitfld.word 0x0 14. " PMC714 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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bitfld.word 0x0 13. " PMC713 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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|
textline " "
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bitfld.word 0x0 12. " PMC712 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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bitfld.word 0x0 11. " PMC711 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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bitfld.word 0x0 10. " PMC710 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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|
textline " "
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bitfld.word 0x0 9. " PMC79 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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bitfld.word 0x0 8. " PMC78 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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|
textline " "
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bitfld.word 0x0 7. " PMC77 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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bitfld.word 0x0 6. " PMC76 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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bitfld.word 0x0 5. " PMC75 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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|
textline " "
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bitfld.word 0x0 4. " PMC74 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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bitfld.word 0x0 3. " PMC73 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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|
bitfld.word 0x0 2. " PMC72 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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|
textline " "
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|
bitfld.word 0x0 1. " PMC71 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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|
bitfld.word 0x0 0. " PMC70 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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group.word (0x500+0x1C)++0x1
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line.word 0x00 "PFC7,Port 7 function control register"
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bitfld.word 0x0 15. " PFC715 , Specifies the alternative function of a pin 15" "0,1"
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bitfld.word 0x0 14. " PFC714 , Specifies the alternative function of a pin 14" "0,1"
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bitfld.word 0x0 13. " PFC713 , Specifies the alternative function of a pin 13" "0,1"
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|
textline " "
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|
bitfld.word 0x0 12. " PFC712 , Specifies the alternative function of a pin 12" "0,1"
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bitfld.word 0x0 11. " PFC711 , Specifies the alternative function of a pin 11" "0,1"
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bitfld.word 0x0 10. " PFC710 , Specifies the alternative function of a pin 10" "0,1"
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|
textline " "
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bitfld.word 0x0 9. " PFC79 , Specifies the alternative function of a pin 9" "0,1"
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bitfld.word 0x0 8. " PFC78 , Specifies the alternative function of a pin 8" "0,1"
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textline " "
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bitfld.word 0x0 7. " PFC77 , Specifies the alternative function of a pin 7" "0,1"
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bitfld.word 0x0 6. " PFC76 , Specifies the alternative function of a pin 6" "0,1"
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bitfld.word 0x0 5. " PFC75 , Specifies the alternative function of a pin 5" "0,1"
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|
textline " "
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|
bitfld.word 0x0 4. " PFC74 , Specifies the alternative function of a pin 4" "0,1"
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bitfld.word 0x0 3. " PFC73 , Specifies the alternative function of a pin 3" "0,1"
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bitfld.word 0x0 2. " PFC72 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFC71 , Specifies the alternative function of a pin 1" "0,1"
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bitfld.word 0x0 0. " PFC70 , Specifies the alternative function of a pin 0" "0,1"
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group.word (0x600+0x1C)++0x1
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line.word 0x00 "PFCE7,Port 7 function control expansion register"
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bitfld.word 0x0 15. " PFCE715 , Specifies the alternative function of a pin 15" "0,1"
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bitfld.word 0x0 14. " PFCE714 , Specifies the alternative function of a pin 14" "0,1"
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bitfld.word 0x0 13. " PFCE713 , Specifies the alternative function of a pin 13" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFCE712 , Specifies the alternative function of a pin 12" "0,1"
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|
bitfld.word 0x0 11. " PFCE711 , Specifies the alternative function of a pin 11" "0,1"
|
|
bitfld.word 0x0 10. " PFCE710 , Specifies the alternative function of a pin 10" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFCE79 , Specifies the alternative function of a pin 9" "0,1"
|
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bitfld.word 0x0 8. " PFCE78 , Specifies the alternative function of a pin 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFCE77 , Specifies the alternative function of a pin 7" "0,1"
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|
bitfld.word 0x0 6. " PFCE76 , Specifies the alternative function of a pin 6" "0,1"
|
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bitfld.word 0x0 5. " PFCE75 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
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|
bitfld.word 0x0 4. " PFCE74 , Specifies the alternative function of a pin 4" "0,1"
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bitfld.word 0x0 3. " PFCE73 , Specifies the alternative function of a pin 3" "0,1"
|
|
bitfld.word 0x0 2. " PFCE72 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCE71 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFCE70 , Specifies the alternative function of a pin 0" "0,1"
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|
wgroup.word (0x700+0x1C)++0x1
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line.word 0x00 "PNOT7,Port 7 NOT register"
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|
bitfld.word 0x0 15. " PNOT715 , Specifies whether to invert P7.P715" "Not inverted,Inverted"
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|
bitfld.word 0x0 14. " PNOT714 , Specifies whether to invert P7.P714" "Not inverted,Inverted"
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|
bitfld.word 0x0 13. " PNOT713 , Specifies whether to invert P7.P713" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PNOT712 , Specifies whether to invert P7.P712" "Not inverted,Inverted"
|
|
bitfld.word 0x0 11. " PNOT711 , Specifies whether to invert P7.P711" "Not inverted,Inverted"
|
|
bitfld.word 0x0 10. " PNOT710 , Specifies whether to invert P7.P710" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PNOT79 , Specifies whether to invert P7.P79" "Not inverted,Inverted"
|
|
bitfld.word 0x0 8. " PNOT78 , Specifies whether to invert P7.P78" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PNOT77 , Specifies whether to invert P7.P77" "Not inverted,Inverted"
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|
bitfld.word 0x0 6. " PNOT76 , Specifies whether to invert P7.P76" "Not inverted,Inverted"
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|
bitfld.word 0x0 5. " PNOT75 , Specifies whether to invert P7.P75" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PNOT74 , Specifies whether to invert P7.P74" "Not inverted,Inverted"
|
|
bitfld.word 0x0 3. " PNOT73 , Specifies whether to invert P7.P73" "Not inverted,Inverted"
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|
bitfld.word 0x0 2. " PNOT72 , Specifies whether to invert P7.P72" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PNOT71 , Specifies whether to invert P7.P71" "Not inverted,Inverted"
|
|
bitfld.word 0x0 0. " PNOT70 , Specifies whether to invert P7.P70" "Not inverted,Inverted"
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|
group.long (0x800+0x1C)++0x3
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|
line.long 0x00 "PMSR7,Port 7 mode set/reset register"
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bitfld.long 0x0 31. " PMSR731 , Specifies whether the value of the corresponding lower bit of the PMSR7 register is written to the corresponding bit" "Not depend on the PMSR731 bit,Becomes value of the PMSR731 bit"
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bitfld.long 0x0 30. " PMSR730 , Specifies whether the value of the corresponding lower bit of the PMSR7 register is written to the corresponding bit" "Not depend on the PMSR730 bit,Becomes value of the PMSR730 bit"
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|
textline " "
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bitfld.long 0x0 29. " PMSR729 , Specifies whether the value of the corresponding lower bit of the PMSR7 register is written to the corresponding bit" "Not depend on the PMSR729 bit,Becomes value of the PMSR729 bit"
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bitfld.long 0x0 28. " PMSR728 , Specifies whether the value of the corresponding lower bit of the PMSR7 register is written to the corresponding bit" "Not depend on the PMSR728 bit,Becomes value of the PMSR728 bit"
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textline " "
|
|
bitfld.long 0x0 27. " PMSR727 , Specifies whether the value of the corresponding lower bit of the PMSR7 register is written to the corresponding bit" "Not depend on the PMSR727 bit,Becomes value of the PMSR727 bit"
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bitfld.long 0x0 26. " PMSR726 , Specifies whether the value of the corresponding lower bit of the PMSR7 register is written to the corresponding bit" "Not depend on the PMSR726 bit,Becomes value of the PMSR726 bit"
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textline " "
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bitfld.long 0x0 25. " PMSR725 , Specifies whether the value of the corresponding lower bit of the PMSR7 register is written to the corresponding bit" "Not depend on the PMSR725 bit,Becomes value of the PMSR725 bit"
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bitfld.long 0x0 24. " PMSR724 , Specifies whether the value of the corresponding lower bit of the PMSR7 register is written to the corresponding bit" "Not depend on the PMSR724 bit,Becomes value of the PMSR724 bit"
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textline " "
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bitfld.long 0x0 23. " PMSR723 , Specifies whether the value of the corresponding lower bit of the PMSR7 register is written to the corresponding bit" "Not depend on the PMSR723 bit,Becomes value of the PMSR723 bit"
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bitfld.long 0x0 22. " PMSR722 , Specifies whether the value of the corresponding lower bit of the PMSR7 register is written to the corresponding bit" "Not depend on the PMSR722 bit,Becomes value of the PMSR722 bit"
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textline " "
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bitfld.long 0x0 21. " PMSR721 , Specifies whether the value of the corresponding lower bit of the PMSR7 register is written to the corresponding bit" "Not depend on the PMSR721 bit,Becomes value of the PMSR721 bit"
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bitfld.long 0x0 20. " PMSR720 , Specifies whether the value of the corresponding lower bit of the PMSR7 register is written to the corresponding bit" "Not depend on the PMSR720 bit,Becomes value of the PMSR720 bit"
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textline " "
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bitfld.long 0x0 19. " PMSR719 , Specifies whether the value of the corresponding lower bit of the PMSR7 register is written to the corresponding bit" "Not depend on the PMSR719 bit,Becomes value of the PMSR719 bit"
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bitfld.long 0x0 18. " PMSR718 , Specifies whether the value of the corresponding lower bit of the PMSR7 register is written to the corresponding bit" "Not depend on the PMSR718 bit,Becomes value of the PMSR718 bit"
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textline " "
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bitfld.long 0x0 17. " PMSR717 , Specifies whether the value of the corresponding lower bit of the PMSR7 register is written to the corresponding bit" "Not depend on the PMSR717 bit,Becomes value of the PMSR717 bit"
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bitfld.long 0x0 16. " PMSR716 , Specifies whether the value of the corresponding lower bit of the PMSR7 register is written to the corresponding bit" "Not depend on the PMSR716 bit,Becomes value of the PMSR716 bit"
|
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textline " "
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bitfld.long 0x0 15. " PMSR715 , Specifies whether the value of the corresponding higher bit of the PMSR7 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 14. " PMSR714 , Specifies whether the value of the corresponding higher bit of the PMSR7 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 13. " PMSR713 , Specifies whether the value of the corresponding higher bit of the PMSR7 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PMSR712 , Specifies whether the value of the corresponding higher bit of the PMSR7 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 11. " PMSR711 , Specifies whether the value of the corresponding higher bit of the PMSR7 register is 1" "PMnm = 0,PMnm = 1"
|
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bitfld.long 0x0 10. " PMSR710 , Specifies whether the value of the corresponding higher bit of the PMSR7 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PMSR79 , Specifies whether the value of the corresponding higher bit of the PMSR7 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 8. " PMSR78 , Specifies whether the value of the corresponding higher bit of the PMSR7 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PMSR77 , Specifies whether the value of the corresponding higher bit of the PMSR7 register is 1" "PMnm = 0,PMnm = 1"
|
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bitfld.long 0x0 6. " PMSR76 , Specifies whether the value of the corresponding higher bit of the PMSR7 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 5. " PMSR75 , Specifies whether the value of the corresponding higher bit of the PMSR7 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PMSR74 , Specifies whether the value of the corresponding higher bit of the PMSR7 register is 1" "PMnm = 0,PMnm = 1"
|
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bitfld.long 0x0 3. " PMSR73 , Specifies whether the value of the corresponding higher bit of the PMSR7 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 2. " PMSR72 , Specifies whether the value of the corresponding higher bit of the PMSR7 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PMSR71 , Specifies whether the value of the corresponding higher bit of the PMSR7 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 0. " PMSR70 , Specifies whether the value of the corresponding higher bit of the PMSR7 register is 1" "PMnm = 0,PMnm = 1"
|
|
group.long (0x900+0x1C)++0x3
|
|
line.long 0x00 "PMCSR7,Port 7 mode scontrol set/reset register"
|
|
bitfld.long 0x0 31. " PMCSR715 ,Value of the corresponding lower bit of the PMCSR7 register is written to the corresponding PPMC715 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " PMCSR714 ,Value of the corresponding lower bit of the PMCSR7 register is written to the corresponding PPMC714 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 29. " PMCSR713 ,Value of the corresponding lower bit of the PMCSR7 register is written to the corresponding PPMC713 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 28. " PMCSR712 ,Value of the corresponding lower bit of the PMCSR7 register is written to the corresponding PPMC712 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 27. " PMCSR711 ,Value of the corresponding lower bit of the PMCSR7 register is written to the corresponding PPMC711 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 26. " PMCSR710 ,Value of the corresponding lower bit of the PMCSR7 register is written to the corresponding PPMC710 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PMCSR79 ,Value of the corresponding lower bit of the PMCSR7 register is written to the corresponding PPMC79 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 24. " PMCSR78 ,Value of the corresponding lower bit of the PMCSR7 register is written to the corresponding PPMC78 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PMCSR77 ,Value of the corresponding lower bit of the PMCSR7 register is written to the corresponding PPMC77 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 22. " PMCSR76 ,Value of the corresponding lower bit of the PMCSR7 register is written to the corresponding PPMC76 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PMCSR75 ,Value of the corresponding lower bit of the PMCSR7 register is written to the corresponding PPMC75 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 20. " PMCSR74 ,Value of the corresponding lower bit of the PMCSR7 register is written to the corresponding PPMC74 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 19. " PMCSR73 ,Value of the corresponding lower bit of the PMCSR7 register is written to the corresponding PPMC73 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 18. " PMCSR72 ,Value of the corresponding lower bit of the PMCSR7 register is written to the corresponding PPMC72 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 17. " PMCSR71 ,Value of the corresponding lower bit of the PMCSR7 register is written to the corresponding PPMC71 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 16. " PMCSR70 ,Value of the corresponding lower bit of the PMCSR7 register is written to the corresponding PPMC70 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PMCSR715 ,Value of the corresponding higher bit of the PMC7 register" "PMC715=0,PMC715=1"
|
|
bitfld.long 0x0 14. " PMCSR714 ,Value of the corresponding higher bit of the PMC7 register" "PMC714=0,PMC714=1"
|
|
bitfld.long 0x0 13. " PMCSR713 ,Value of the corresponding higher bit of the PMC7 register" "PMC713=0,PMC713=1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PMCSR712 ,Value of the corresponding higher bit of the PMC7 register" "PMC712=0,PMC712=1"
|
|
bitfld.long 0x0 11. " PMCSR711 ,Value of the corresponding higher bit of the PMC7 register" "PMC711=0,PMC711=1"
|
|
bitfld.long 0x0 10. " PMCSR710 ,Value of the corresponding higher bit of the PMC7 register" "PMC710=0,PMC710=1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PMCSR79 ,Value of the corresponding higher bit of the PMC7 register" "PMC79=0,PMC79=1"
|
|
bitfld.long 0x0 8. " PMCSR78 ,Value of the corresponding higher bit of the PMC7 register" "PMC78=0,PMC78=1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PMCSR77 ,Value of the corresponding higher bit of the PMC7 register" "PMC77=0,PMC77=1"
|
|
bitfld.long 0x0 6. " PMCSR76 ,Value of the corresponding higher bit of the PMC7 register" "PMC76=0,PMC76=1"
|
|
bitfld.long 0x0 5. " PMCSR75 ,Value of the corresponding higher bit of the PMC7 register" "PMC75=0,PMC75=1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PMCSR74 ,Value of the corresponding higher bit of the PMC7 register" "PMC74=0,PMC74=1"
|
|
bitfld.long 0x0 3. " PMCSR73 ,Value of the corresponding higher bit of the PMC7 register" "PMC73=0,PMC73=1"
|
|
bitfld.long 0x0 2. " PMCSR72 ,Value of the corresponding higher bit of the PMC7 register" "PMC72=0,PMC72=1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PMCSR71 ,Value of the corresponding higher bit of the PMC7 register" "PMC71=0,PMC71=1"
|
|
bitfld.long 0x0 0. " PMCSR70 ,Value of the corresponding higher bit of the PMC7 register" "PMC70=0,PMC70=1"
|
|
group.word (0xA00+0x1C)++0x1
|
|
line.word 0x00 "PFCAE7,Port 7 Function Control Additional Expansion register"
|
|
bitfld.word 0x0 15. " PFCAE715 ,Specifies the alternative function of a pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PFCAE714 ,Specifies the alternative function of a pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PFCAE713 ,Specifies the alternative function of a pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFCAE712 ,Specifies the alternative function of a pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PFCAE711 ,Specifies the alternative function of a pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PFCAE710 ,Specifies the alternative function of a pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFCAE79 ,Specifies the alternative function of a pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PFCAE78 ,Specifies the alternative function of a pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFCAE77 ,Specifies the alternative function of a pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PFCAE76 ,Specifies the alternative function of a pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PFCAE75 ,Specifies the alternative function of a pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFCAE74 ,Specifies the alternative function of a pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PFCAE73 ,Specifies the alternative function of a pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PFCAE72 ,Specifies the alternative function of a pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCAE71 ,Specifies the alternative function of a pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PFCAE70 ,Specifies the alternative function of a pin 0" "Disabled,Enabled"
|
|
group.word (0x4000+0x1C)++0x1
|
|
line.word 0x00 "PIBC7,Port 7 input buffer control register"
|
|
bitfld.word 0x0 15. " PIBC715 ,Enable or disable the input buffer of pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PIBC714 ,Enable or disable the input buffer of pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PIBC713 ,Enable or disable the input buffer of pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PIBC712 ,Enable or disable the input buffer of pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PIBC711 ,Enable or disable the input buffer of pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PIBC710 ,Enable or disable the input buffer of pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PIBC79 ,Enable or disable the input buffer of pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PIBC78 ,Enable or disable the input buffer of pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIBC77 ,Enable or disable the input buffer of pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PIBC76 ,Enable or disable the input buffer of pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PIBC75 ,Enable or disable the input buffer of pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIBC74 ,Enable or disable the input buffer of pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PIBC73 ,Enable or disable the input buffer of pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PIBC72 ,Enable or disable the input buffer of pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PIBC71 ,Enable or disable the input buffer of pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PIBC70 ,Enable or disable the input buffer of pin 0" "Disabled,Enabled"
|
|
group.word (0x4100+0x1C)++0x1
|
|
line.word 0x00 "PBDC7,Port 7 ibi-direction control register"
|
|
bitfld.word 0x0 15. " PBDC715 ,Enable bidirectional mode of the corresponding pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PBDC714 ,Enable bidirectional mode of the corresponding pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PBDC713 ,Enable bidirectional mode of the corresponding pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PBDC712 ,Enable bidirectional mode of the corresponding pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PBDC711 ,Enable bidirectional mode of the corresponding pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PBDC710 ,Enable bidirectional mode of the corresponding pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PBDC79 ,Enable bidirectional mode of the corresponding pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PBDC78 ,Enable bidirectional mode of the corresponding pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PBDC77 ,Enable bidirectional mode of the corresponding pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PBDC76 ,Enable bidirectional mode of the corresponding pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PBDC75 ,Enable bidirectional mode of the corresponding pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PBDC74 ,Enable bidirectional mode of the corresponding pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PBDC73 ,Enable bidirectional mode of the corresponding pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PBDC72 ,Enable bidirectional mode of the corresponding pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PBDC71 ,Enable bidirectional mode of the corresponding pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PBDC70 ,Enable bidirectional mode of the corresponding pin 0" "Disabled,Enabled"
|
|
group.word (0x4200+0x1C)++0x1
|
|
line.word 0x00 "PIPC7,Port 7 IP control register"
|
|
bitfld.word 0x0 15. " PIPC715 ,The I/O mode" "According to the value of the PM7.PM715 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 14. " PIPC714 ,The I/O mode" "According to the value of the PM7.PM714 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 13. " PIPC713 ,The I/O mode" "According to the value of the PM7.PM713 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 12. " PIPC712 ,The I/O mode" "According to the value of the PM7.PM712 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 11. " PIPC711 ,The I/O mode" "According to the value of the PM7.PM711 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 10. " PIPC710 ,The I/O mode" "According to the value of the PM7.PM710 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PIPC79 ,The I/O mode" "According to the value of the PM7.PM79 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 8. " PIPC78 ,The I/O mode" "According to the value of the PM7.PM78 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIPC77 ,The I/O mode" "According to the value of the PM7.PM77 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 6. " PIPC76 ,The I/O mode" "According to the value of the PM7.PM76 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 5. " PIPC75 ,The I/O mode" "According to the value of the PM7.PM75 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIPC74 ,The I/O mode" "According to the value of the PM7.PM74 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 3. " PIPC73 ,The I/O mode" "According to the value of the PM7.PM73 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 2. " PIPC72 ,The I/O mode" "According to the value of the PM7.PM72 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 1. " PIPC71 ,The I/O mode" "According to the value of the PM7.PM71 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 0. " PIPC70 ,The I/O mode" "According to the value of the PM7.PM70 bit,Selected by the alternative function"
|
|
rgroup.long (0xc00+0x1C)++0x3
|
|
line.long 0x00 "SNCR7,Serial sound interface noise canceler control register"
|
|
bitfld.long 0x00 6. " ETSEL ,The Ethernet controller and EthernetAVB status" "Eth. is enabled and Eth.AVB is disabled,Eth.AVB is enabled and Eth. is disabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " SSI5NCE ,Serial Sound Interface Channel 5 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SSI4NCE ,Serial Sound Interface Channel 4 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " SSI3NCE ,Serial Sound Interface Channel 3 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " SSI2NCE ,Serial Sound Interface Channel 2 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " SSI1NCE ,Serial Sound Interface Channel 1 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " SSI0NCE ,Serial Sound Interface Channel 0 Noise Canceler Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 8"
|
|
width 8.
|
|
group.word (0x00+0x20)++0x1
|
|
line.word 0x00 "P8,Port 8 register"
|
|
bitfld.word 0x0 15. " P815 ,Output level of the 15 pin " "Low,High"
|
|
bitfld.word 0x0 14. " P814 ,Output level of the 14 pin " "Low,High"
|
|
bitfld.word 0x0 13. " P813 ,Output level of the 13 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 12. " P812 ,Output level of the 12 pin " "Low,High"
|
|
bitfld.word 0x0 11. " P811 ,Output level of the 11 pin " "Low,High"
|
|
bitfld.word 0x0 10. " P810 ,Output level of the 10 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 9. " P89 ,Output level of the 9 pin " "Low,High"
|
|
bitfld.word 0x0 8. " P88 ,Output level of the 8 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 7. " P87 ,Output level of the 7 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 6. " P86 ,Output level of the 6 pin " "Low,High"
|
|
bitfld.word 0x0 5. " P85 ,Output level of the 5 pin " "Low,High"
|
|
bitfld.word 0x0 4. " P84 ,Output level of the 4 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 3. " P83 ,Output level of the 3 pin " "Low,High"
|
|
bitfld.word 0x0 2. " P82 ,Output level of the 2 pin " "Low,High"
|
|
bitfld.word 0x0 1. " P81 ,Output level of the 1 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 0. " P80 ,Output level of the 0 pin " "Low,High"
|
|
group.long (0x100+0x20)++0x3
|
|
line.long 0x00 "PSR8,Port 8 set/reset register"
|
|
bitfld.long 0x0 31. " PSR831 ,Value of the corresponding lower bit is written " "P831 is independent of PSR831,Value of the PSR831 bit"
|
|
bitfld.long 0x0 30. " PSR830 ,Value of the corresponding lower bit is written " "P830 is independent of PSR830,Value of the PSR830 bit"
|
|
textline " "
|
|
bitfld.long 0x0 29. " PSR829 ,Value of the corresponding lower bit is written " "P829 is independent of PSR829,Value of the PSR829 bit"
|
|
bitfld.long 0x0 28. " PSR828 ,Value of the corresponding lower bit is written " "P828 is independent of PSR828,Value of the PSR828 bit"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PSR827 ,Value of the corresponding lower bit is written " "P827 is independent of PSR827,Value of the PSR827 bit"
|
|
bitfld.long 0x0 26. " PSR826 ,Value of the corresponding lower bit is written " "P826 is independent of PSR826,Value of the PSR826 bit"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PSR825 ,Value of the corresponding lower bit is written " "P825 is independent of PSR825,Value of the PSR825 bit"
|
|
bitfld.long 0x0 24. " PSR824 ,Value of the corresponding lower bit is written " "P824 is independent of PSR824,Value of the PSR824 bit"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PSR823 ,Value of the corresponding lower bit is written " "P823 is independent of PSR823,Value of the PSR823 bit"
|
|
bitfld.long 0x0 22. " PSR822 ,Value of the corresponding lower bit is written " "P822 is independent of PSR822,Value of the PSR822 bit"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PSR821 ,Value of the corresponding lower bit is written " "P821 is independent of PSR821,Value of the PSR821 bit"
|
|
bitfld.long 0x0 20. " PSR820 ,Value of the corresponding lower bit is written " "P820 is independent of PSR820,Value of the PSR820 bit"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PSR819 ,Value of the corresponding lower bit is written " "P819 is independent of PSR819,Value of the PSR819 bit"
|
|
bitfld.long 0x0 18. " PSR818 ,Value of the corresponding lower bit is written " "P818 is independent of PSR818,Value of the PSR818 bit"
|
|
textline " "
|
|
bitfld.long 0x0 17. " PSR817 ,Value of the corresponding lower bit is written " "P817 is independent of PSR817,Value of the PSR817 bit"
|
|
bitfld.long 0x0 16. " PSR816 ,Value of the corresponding lower bit is written " "P816 is independent of PSR816,Value of the PSR816 bit"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PSR815 ,Value of the corresponding higher bit is written " "P815=0,P815=1"
|
|
bitfld.long 0x0 14. " PSR814 ,Value of the corresponding higher bit is written " "P814=0,P814=1"
|
|
bitfld.long 0x0 13. " PSR813 ,Value of the corresponding higher bit is written " "P813=0,P813=1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PSR812 ,Value of the corresponding higher bit is written " "P812=0,P812=1"
|
|
bitfld.long 0x0 11. " PSR811 ,Value of the corresponding higher bit is written " "P811=0,P811=1"
|
|
bitfld.long 0x0 10. " PSR810 ,Value of the corresponding higher bit is written " "P810=0,P810=1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PSR89 ,Value of the corresponding higher bit is written " "P89=0,P89=1"
|
|
bitfld.long 0x0 8. " PSR88 ,Value of the corresponding higher bit is written " "P88=0,P88=1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PSR87 ,Value of the corresponding higher bit is written " "P87=0,P87=1"
|
|
bitfld.long 0x0 6. " PSR86 ,Value of the corresponding higher bit is written " "P86=0,P86=1"
|
|
bitfld.long 0x0 5. " PSR85 ,Value of the corresponding higher bit is written " "P85=0,P85=1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PSR84 ,Value of the corresponding higher bit is written " "P84=0,P84=1"
|
|
bitfld.long 0x0 3. " PSR83 ,Value of the corresponding higher bit is written " "P83=0,P83=1"
|
|
bitfld.long 0x0 2. " PSR82 ,Value of the corresponding higher bit is written " "P82=0,P82=1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PSR81 ,Value of the corresponding higher bit is written " "P81=0,P81=1"
|
|
bitfld.long 0x0 0. " PSR80 ,Value of the corresponding higher bit is written " "P80=0,P80=1"
|
|
rgroup.word (0x200+0x20)++0x1
|
|
line.word 0x00 "PPR8,Port 8 pin read register"
|
|
bitfld.word 0x0 15. " PPR815 ,Value of the P8_15 pin" "0,1"
|
|
bitfld.word 0x0 14. " PPR814 ,Value of the P8_14 pin" "0,1"
|
|
bitfld.word 0x0 13. " PPR813 ,Value of the P8_13 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PPR812 ,Value of the P8_12 pin" "0,1"
|
|
bitfld.word 0x0 11. " PPR811 ,Value of the P8_11 pin" "0,1"
|
|
bitfld.word 0x0 10. " PPR810 ,Value of the P8_10 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PPR89 ,Value of the P8_9 pin" "0,1"
|
|
bitfld.word 0x0 8. " PPR88 ,Value of the P8_8 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PPR87 ,Value of the P8_7 pin" "0,1"
|
|
bitfld.word 0x0 6. " PPR86 ,Value of the P8_6 pin" "0,1"
|
|
bitfld.word 0x0 5. " PPR85 ,Value of the P8_5 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PPR84 ,Value of the P8_4 pin" "0,1"
|
|
bitfld.word 0x0 3. " PPR83 ,Value of the P8_3 pin" "0,1"
|
|
bitfld.word 0x0 2. " PPR82 ,Value of the P8_2 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PPR81 ,Value of the P8_1 pin" "0,1"
|
|
bitfld.word 0x0 0. " PPR80 ,Value of the P8_0 pin" "0,1"
|
|
group.word (0x300+0x20)++0x1
|
|
line.word 0x00 "PM8,Port 8 mode register"
|
|
bitfld.word 0x0 15. " PM815 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 14. " PM814 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 13. " PM813 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PM812 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 11. " PM811 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 10. " PM810 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PM89 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 8. " PM88 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PM87 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 6. " PM86 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 5. " PM85 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PM84 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 3. " PM83 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 2. " PM82 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PM81 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 0. " PM80 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
group.word (0x400+0x20)++0x1
|
|
line.word 0x00 "PMC8,Port 8 mode control register"
|
|
bitfld.word 0x0 15. " PMC815 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 14. " PMC814 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 13. " PMC813 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PMC812 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 11. " PMC811 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 10. " PMC810 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PMC89 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 8. " PMC88 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PMC87 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 6. " PMC86 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 5. " PMC85 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PMC84 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 3. " PMC83 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 2. " PMC82 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PMC81 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 0. " PMC80 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
group.word (0x500+0x20)++0x1
|
|
line.word 0x00 "PFC8,Port 8 function control register"
|
|
bitfld.word 0x0 15. " PFC815 , Specifies the alternative function of a pin 15" "0,1"
|
|
bitfld.word 0x0 14. " PFC814 , Specifies the alternative function of a pin 14" "0,1"
|
|
bitfld.word 0x0 13. " PFC813 , Specifies the alternative function of a pin 13" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFC812 , Specifies the alternative function of a pin 12" "0,1"
|
|
bitfld.word 0x0 11. " PFC811 , Specifies the alternative function of a pin 11" "0,1"
|
|
bitfld.word 0x0 10. " PFC810 , Specifies the alternative function of a pin 10" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFC89 , Specifies the alternative function of a pin 9" "0,1"
|
|
bitfld.word 0x0 8. " PFC88 , Specifies the alternative function of a pin 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFC87 , Specifies the alternative function of a pin 7" "0,1"
|
|
bitfld.word 0x0 6. " PFC86 , Specifies the alternative function of a pin 6" "0,1"
|
|
bitfld.word 0x0 5. " PFC85 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFC84 , Specifies the alternative function of a pin 4" "0,1"
|
|
bitfld.word 0x0 3. " PFC83 , Specifies the alternative function of a pin 3" "0,1"
|
|
bitfld.word 0x0 2. " PFC82 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFC81 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFC80 , Specifies the alternative function of a pin 0" "0,1"
|
|
group.word (0x600+0x20)++0x1
|
|
line.word 0x00 "PFCE8,Port 8 function control expansion register"
|
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bitfld.word 0x0 15. " PFCE815 , Specifies the alternative function of a pin 15" "0,1"
|
|
bitfld.word 0x0 14. " PFCE814 , Specifies the alternative function of a pin 14" "0,1"
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bitfld.word 0x0 13. " PFCE813 , Specifies the alternative function of a pin 13" "0,1"
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|
textline " "
|
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bitfld.word 0x0 12. " PFCE812 , Specifies the alternative function of a pin 12" "0,1"
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bitfld.word 0x0 11. " PFCE811 , Specifies the alternative function of a pin 11" "0,1"
|
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bitfld.word 0x0 10. " PFCE810 , Specifies the alternative function of a pin 10" "0,1"
|
|
textline " "
|
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bitfld.word 0x0 9. " PFCE89 , Specifies the alternative function of a pin 9" "0,1"
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bitfld.word 0x0 8. " PFCE88 , Specifies the alternative function of a pin 8" "0,1"
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|
textline " "
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bitfld.word 0x0 7. " PFCE87 , Specifies the alternative function of a pin 7" "0,1"
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bitfld.word 0x0 6. " PFCE86 , Specifies the alternative function of a pin 6" "0,1"
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bitfld.word 0x0 5. " PFCE85 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
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bitfld.word 0x0 4. " PFCE84 , Specifies the alternative function of a pin 4" "0,1"
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bitfld.word 0x0 3. " PFCE83 , Specifies the alternative function of a pin 3" "0,1"
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bitfld.word 0x0 2. " PFCE82 , Specifies the alternative function of a pin 2" "0,1"
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|
textline " "
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bitfld.word 0x0 1. " PFCE81 , Specifies the alternative function of a pin 1" "0,1"
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bitfld.word 0x0 0. " PFCE80 , Specifies the alternative function of a pin 0" "0,1"
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wgroup.word (0x700+0x20)++0x1
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line.word 0x00 "PNOT8,Port 8 NOT register"
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bitfld.word 0x0 15. " PNOT815 , Specifies whether to invert P8.P815" "Not inverted,Inverted"
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bitfld.word 0x0 14. " PNOT814 , Specifies whether to invert P8.P814" "Not inverted,Inverted"
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bitfld.word 0x0 13. " PNOT813 , Specifies whether to invert P8.P813" "Not inverted,Inverted"
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|
textline " "
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bitfld.word 0x0 12. " PNOT812 , Specifies whether to invert P8.P812" "Not inverted,Inverted"
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bitfld.word 0x0 11. " PNOT811 , Specifies whether to invert P8.P811" "Not inverted,Inverted"
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bitfld.word 0x0 10. " PNOT810 , Specifies whether to invert P8.P810" "Not inverted,Inverted"
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|
textline " "
|
|
bitfld.word 0x0 9. " PNOT89 , Specifies whether to invert P8.P89" "Not inverted,Inverted"
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bitfld.word 0x0 8. " PNOT88 , Specifies whether to invert P8.P88" "Not inverted,Inverted"
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|
textline " "
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bitfld.word 0x0 7. " PNOT87 , Specifies whether to invert P8.P87" "Not inverted,Inverted"
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bitfld.word 0x0 6. " PNOT86 , Specifies whether to invert P8.P86" "Not inverted,Inverted"
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bitfld.word 0x0 5. " PNOT85 , Specifies whether to invert P8.P85" "Not inverted,Inverted"
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|
textline " "
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bitfld.word 0x0 4. " PNOT84 , Specifies whether to invert P8.P84" "Not inverted,Inverted"
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bitfld.word 0x0 3. " PNOT83 , Specifies whether to invert P8.P83" "Not inverted,Inverted"
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bitfld.word 0x0 2. " PNOT82 , Specifies whether to invert P8.P82" "Not inverted,Inverted"
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|
textline " "
|
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bitfld.word 0x0 1. " PNOT81 , Specifies whether to invert P8.P81" "Not inverted,Inverted"
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|
bitfld.word 0x0 0. " PNOT80 , Specifies whether to invert P8.P80" "Not inverted,Inverted"
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group.long (0x800+0x20)++0x3
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line.long 0x00 "PMSR8,Port 8 mode set/reset register"
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bitfld.long 0x0 31. " PMSR831 , Specifies whether the value of the corresponding lower bit of the PMSR8 register is written to the corresponding bit" "Not depend on the PMSR831 bit,Becomes value of the PMSR831 bit"
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bitfld.long 0x0 30. " PMSR830 , Specifies whether the value of the corresponding lower bit of the PMSR8 register is written to the corresponding bit" "Not depend on the PMSR830 bit,Becomes value of the PMSR830 bit"
|
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textline " "
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bitfld.long 0x0 29. " PMSR829 , Specifies whether the value of the corresponding lower bit of the PMSR8 register is written to the corresponding bit" "Not depend on the PMSR829 bit,Becomes value of the PMSR829 bit"
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bitfld.long 0x0 28. " PMSR828 , Specifies whether the value of the corresponding lower bit of the PMSR8 register is written to the corresponding bit" "Not depend on the PMSR828 bit,Becomes value of the PMSR828 bit"
|
|
textline " "
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bitfld.long 0x0 27. " PMSR827 , Specifies whether the value of the corresponding lower bit of the PMSR8 register is written to the corresponding bit" "Not depend on the PMSR827 bit,Becomes value of the PMSR827 bit"
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bitfld.long 0x0 26. " PMSR826 , Specifies whether the value of the corresponding lower bit of the PMSR8 register is written to the corresponding bit" "Not depend on the PMSR826 bit,Becomes value of the PMSR826 bit"
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textline " "
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bitfld.long 0x0 25. " PMSR825 , Specifies whether the value of the corresponding lower bit of the PMSR8 register is written to the corresponding bit" "Not depend on the PMSR825 bit,Becomes value of the PMSR825 bit"
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bitfld.long 0x0 24. " PMSR824 , Specifies whether the value of the corresponding lower bit of the PMSR8 register is written to the corresponding bit" "Not depend on the PMSR824 bit,Becomes value of the PMSR824 bit"
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textline " "
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bitfld.long 0x0 23. " PMSR823 , Specifies whether the value of the corresponding lower bit of the PMSR8 register is written to the corresponding bit" "Not depend on the PMSR823 bit,Becomes value of the PMSR823 bit"
|
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bitfld.long 0x0 22. " PMSR822 , Specifies whether the value of the corresponding lower bit of the PMSR8 register is written to the corresponding bit" "Not depend on the PMSR822 bit,Becomes value of the PMSR822 bit"
|
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textline " "
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bitfld.long 0x0 21. " PMSR821 , Specifies whether the value of the corresponding lower bit of the PMSR8 register is written to the corresponding bit" "Not depend on the PMSR821 bit,Becomes value of the PMSR821 bit"
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bitfld.long 0x0 20. " PMSR820 , Specifies whether the value of the corresponding lower bit of the PMSR8 register is written to the corresponding bit" "Not depend on the PMSR820 bit,Becomes value of the PMSR820 bit"
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textline " "
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bitfld.long 0x0 19. " PMSR819 , Specifies whether the value of the corresponding lower bit of the PMSR8 register is written to the corresponding bit" "Not depend on the PMSR819 bit,Becomes value of the PMSR819 bit"
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bitfld.long 0x0 18. " PMSR818 , Specifies whether the value of the corresponding lower bit of the PMSR8 register is written to the corresponding bit" "Not depend on the PMSR818 bit,Becomes value of the PMSR818 bit"
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textline " "
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bitfld.long 0x0 17. " PMSR817 , Specifies whether the value of the corresponding lower bit of the PMSR8 register is written to the corresponding bit" "Not depend on the PMSR817 bit,Becomes value of the PMSR817 bit"
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bitfld.long 0x0 16. " PMSR816 , Specifies whether the value of the corresponding lower bit of the PMSR8 register is written to the corresponding bit" "Not depend on the PMSR816 bit,Becomes value of the PMSR816 bit"
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textline " "
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bitfld.long 0x0 15. " PMSR815 , Specifies whether the value of the corresponding higher bit of the PMSR8 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 14. " PMSR814 , Specifies whether the value of the corresponding higher bit of the PMSR8 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 13. " PMSR813 , Specifies whether the value of the corresponding higher bit of the PMSR8 register is 1" "PMnm = 0,PMnm = 1"
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|
textline " "
|
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bitfld.long 0x0 12. " PMSR812 , Specifies whether the value of the corresponding higher bit of the PMSR8 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 11. " PMSR811 , Specifies whether the value of the corresponding higher bit of the PMSR8 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 10. " PMSR810 , Specifies whether the value of the corresponding higher bit of the PMSR8 register is 1" "PMnm = 0,PMnm = 1"
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|
textline " "
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bitfld.long 0x0 9. " PMSR89 , Specifies whether the value of the corresponding higher bit of the PMSR8 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 8. " PMSR88 , Specifies whether the value of the corresponding higher bit of the PMSR8 register is 1" "PMnm = 0,PMnm = 1"
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|
textline " "
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bitfld.long 0x0 7. " PMSR87 , Specifies whether the value of the corresponding higher bit of the PMSR8 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 6. " PMSR86 , Specifies whether the value of the corresponding higher bit of the PMSR8 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 5. " PMSR85 , Specifies whether the value of the corresponding higher bit of the PMSR8 register is 1" "PMnm = 0,PMnm = 1"
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textline " "
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bitfld.long 0x0 4. " PMSR84 , Specifies whether the value of the corresponding higher bit of the PMSR8 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 3. " PMSR83 , Specifies whether the value of the corresponding higher bit of the PMSR8 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 2. " PMSR82 , Specifies whether the value of the corresponding higher bit of the PMSR8 register is 1" "PMnm = 0,PMnm = 1"
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textline " "
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bitfld.long 0x0 1. " PMSR81 , Specifies whether the value of the corresponding higher bit of the PMSR8 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 0. " PMSR80 , Specifies whether the value of the corresponding higher bit of the PMSR8 register is 1" "PMnm = 0,PMnm = 1"
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group.long (0x900+0x20)++0x3
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line.long 0x00 "PMCSR8,Port 8 mode scontrol set/reset register"
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bitfld.long 0x0 31. " PMCSR815 ,Value of the corresponding lower bit of the PMCSR8 register is written to the corresponding PPMC815 bit" "Disabled,Enabled"
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bitfld.long 0x0 30. " PMCSR814 ,Value of the corresponding lower bit of the PMCSR8 register is written to the corresponding PPMC814 bit" "Disabled,Enabled"
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bitfld.long 0x0 29. " PMCSR813 ,Value of the corresponding lower bit of the PMCSR8 register is written to the corresponding PPMC813 bit" "Disabled,Enabled"
|
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textline " "
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bitfld.long 0x0 28. " PMCSR812 ,Value of the corresponding lower bit of the PMCSR8 register is written to the corresponding PPMC812 bit" "Disabled,Enabled"
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bitfld.long 0x0 27. " PMCSR811 ,Value of the corresponding lower bit of the PMCSR8 register is written to the corresponding PPMC811 bit" "Disabled,Enabled"
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bitfld.long 0x0 26. " PMCSR810 ,Value of the corresponding lower bit of the PMCSR8 register is written to the corresponding PPMC810 bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 25. " PMCSR89 ,Value of the corresponding lower bit of the PMCSR8 register is written to the corresponding PPMC89 bit" "Disabled,Enabled"
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bitfld.long 0x0 24. " PMCSR88 ,Value of the corresponding lower bit of the PMCSR8 register is written to the corresponding PPMC88 bit" "Disabled,Enabled"
|
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textline " "
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bitfld.long 0x0 23. " PMCSR87 ,Value of the corresponding lower bit of the PMCSR8 register is written to the corresponding PPMC87 bit" "Disabled,Enabled"
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bitfld.long 0x0 22. " PMCSR86 ,Value of the corresponding lower bit of the PMCSR8 register is written to the corresponding PPMC86 bit" "Disabled,Enabled"
|
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textline " "
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bitfld.long 0x0 21. " PMCSR85 ,Value of the corresponding lower bit of the PMCSR8 register is written to the corresponding PPMC85 bit" "Disabled,Enabled"
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bitfld.long 0x0 20. " PMCSR84 ,Value of the corresponding lower bit of the PMCSR8 register is written to the corresponding PPMC84 bit" "Disabled,Enabled"
|
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bitfld.long 0x0 19. " PMCSR83 ,Value of the corresponding lower bit of the PMCSR8 register is written to the corresponding PPMC83 bit" "Disabled,Enabled"
|
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textline " "
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bitfld.long 0x0 18. " PMCSR82 ,Value of the corresponding lower bit of the PMCSR8 register is written to the corresponding PPMC82 bit" "Disabled,Enabled"
|
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bitfld.long 0x0 17. " PMCSR81 ,Value of the corresponding lower bit of the PMCSR8 register is written to the corresponding PPMC81 bit" "Disabled,Enabled"
|
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bitfld.long 0x0 16. " PMCSR80 ,Value of the corresponding lower bit of the PMCSR8 register is written to the corresponding PPMC80 bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 15. " PMCSR815 ,Value of the corresponding higher bit of the PMC8 register" "PMC815=0,PMC815=1"
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bitfld.long 0x0 14. " PMCSR814 ,Value of the corresponding higher bit of the PMC8 register" "PMC814=0,PMC814=1"
|
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bitfld.long 0x0 13. " PMCSR813 ,Value of the corresponding higher bit of the PMC8 register" "PMC813=0,PMC813=1"
|
|
textline " "
|
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bitfld.long 0x0 12. " PMCSR812 ,Value of the corresponding higher bit of the PMC8 register" "PMC812=0,PMC812=1"
|
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bitfld.long 0x0 11. " PMCSR811 ,Value of the corresponding higher bit of the PMC8 register" "PMC811=0,PMC811=1"
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bitfld.long 0x0 10. " PMCSR810 ,Value of the corresponding higher bit of the PMC8 register" "PMC810=0,PMC810=1"
|
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textline " "
|
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bitfld.long 0x0 9. " PMCSR89 ,Value of the corresponding higher bit of the PMC8 register" "PMC89=0,PMC89=1"
|
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bitfld.long 0x0 8. " PMCSR88 ,Value of the corresponding higher bit of the PMC8 register" "PMC88=0,PMC88=1"
|
|
textline " "
|
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bitfld.long 0x0 7. " PMCSR87 ,Value of the corresponding higher bit of the PMC8 register" "PMC87=0,PMC87=1"
|
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bitfld.long 0x0 6. " PMCSR86 ,Value of the corresponding higher bit of the PMC8 register" "PMC86=0,PMC86=1"
|
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bitfld.long 0x0 5. " PMCSR85 ,Value of the corresponding higher bit of the PMC8 register" "PMC85=0,PMC85=1"
|
|
textline " "
|
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bitfld.long 0x0 4. " PMCSR84 ,Value of the corresponding higher bit of the PMC8 register" "PMC84=0,PMC84=1"
|
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bitfld.long 0x0 3. " PMCSR83 ,Value of the corresponding higher bit of the PMC8 register" "PMC83=0,PMC83=1"
|
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bitfld.long 0x0 2. " PMCSR82 ,Value of the corresponding higher bit of the PMC8 register" "PMC82=0,PMC82=1"
|
|
textline " "
|
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bitfld.long 0x0 1. " PMCSR81 ,Value of the corresponding higher bit of the PMC8 register" "PMC81=0,PMC81=1"
|
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bitfld.long 0x0 0. " PMCSR80 ,Value of the corresponding higher bit of the PMC8 register" "PMC80=0,PMC80=1"
|
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group.word (0xA00+0x20)++0x1
|
|
line.word 0x00 "PFCAE8,Port 8 Function Control Additional Expansion register"
|
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bitfld.word 0x0 15. " PFCAE815 ,Specifies the alternative function of a pin 15" "Disabled,Enabled"
|
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bitfld.word 0x0 14. " PFCAE814 ,Specifies the alternative function of a pin 14" "Disabled,Enabled"
|
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bitfld.word 0x0 13. " PFCAE813 ,Specifies the alternative function of a pin 13" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.word 0x0 12. " PFCAE812 ,Specifies the alternative function of a pin 12" "Disabled,Enabled"
|
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bitfld.word 0x0 11. " PFCAE811 ,Specifies the alternative function of a pin 11" "Disabled,Enabled"
|
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bitfld.word 0x0 10. " PFCAE810 ,Specifies the alternative function of a pin 10" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.word 0x0 9. " PFCAE89 ,Specifies the alternative function of a pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PFCAE88 ,Specifies the alternative function of a pin 8" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.word 0x0 7. " PFCAE87 ,Specifies the alternative function of a pin 7" "Disabled,Enabled"
|
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bitfld.word 0x0 6. " PFCAE86 ,Specifies the alternative function of a pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PFCAE85 ,Specifies the alternative function of a pin 5" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.word 0x0 4. " PFCAE84 ,Specifies the alternative function of a pin 4" "Disabled,Enabled"
|
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bitfld.word 0x0 3. " PFCAE83 ,Specifies the alternative function of a pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PFCAE82 ,Specifies the alternative function of a pin 2" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.word 0x0 1. " PFCAE81 ,Specifies the alternative function of a pin 1" "Disabled,Enabled"
|
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bitfld.word 0x0 0. " PFCAE80 ,Specifies the alternative function of a pin 0" "Disabled,Enabled"
|
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group.word (0x4000+0x20)++0x1
|
|
line.word 0x00 "PIBC8,Port 8 input buffer control register"
|
|
bitfld.word 0x0 15. " PIBC815 ,Enable or disable the input buffer of pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PIBC814 ,Enable or disable the input buffer of pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PIBC813 ,Enable or disable the input buffer of pin 13" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.word 0x0 12. " PIBC812 ,Enable or disable the input buffer of pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PIBC811 ,Enable or disable the input buffer of pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PIBC810 ,Enable or disable the input buffer of pin 10" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.word 0x0 9. " PIBC89 ,Enable or disable the input buffer of pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PIBC88 ,Enable or disable the input buffer of pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIBC87 ,Enable or disable the input buffer of pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PIBC86 ,Enable or disable the input buffer of pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PIBC85 ,Enable or disable the input buffer of pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIBC84 ,Enable or disable the input buffer of pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PIBC83 ,Enable or disable the input buffer of pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PIBC82 ,Enable or disable the input buffer of pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PIBC81 ,Enable or disable the input buffer of pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PIBC80 ,Enable or disable the input buffer of pin 0" "Disabled,Enabled"
|
|
group.word (0x4100+0x20)++0x1
|
|
line.word 0x00 "PBDC8,Port 8 ibi-direction control register"
|
|
bitfld.word 0x0 15. " PBDC815 ,Enable bidirectional mode of the corresponding pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PBDC814 ,Enable bidirectional mode of the corresponding pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PBDC813 ,Enable bidirectional mode of the corresponding pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PBDC812 ,Enable bidirectional mode of the corresponding pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PBDC811 ,Enable bidirectional mode of the corresponding pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PBDC810 ,Enable bidirectional mode of the corresponding pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PBDC89 ,Enable bidirectional mode of the corresponding pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PBDC88 ,Enable bidirectional mode of the corresponding pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PBDC87 ,Enable bidirectional mode of the corresponding pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PBDC86 ,Enable bidirectional mode of the corresponding pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PBDC85 ,Enable bidirectional mode of the corresponding pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PBDC84 ,Enable bidirectional mode of the corresponding pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PBDC83 ,Enable bidirectional mode of the corresponding pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PBDC82 ,Enable bidirectional mode of the corresponding pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PBDC81 ,Enable bidirectional mode of the corresponding pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PBDC80 ,Enable bidirectional mode of the corresponding pin 0" "Disabled,Enabled"
|
|
group.word (0x4200+0x20)++0x1
|
|
line.word 0x00 "PIPC8,Port 8 IP control register"
|
|
bitfld.word 0x0 15. " PIPC815 ,The I/O mode" "According to the value of the PM8.PM815 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 14. " PIPC814 ,The I/O mode" "According to the value of the PM8.PM814 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 13. " PIPC813 ,The I/O mode" "According to the value of the PM8.PM813 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 12. " PIPC812 ,The I/O mode" "According to the value of the PM8.PM812 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 11. " PIPC811 ,The I/O mode" "According to the value of the PM8.PM811 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 10. " PIPC810 ,The I/O mode" "According to the value of the PM8.PM810 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PIPC89 ,The I/O mode" "According to the value of the PM8.PM89 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 8. " PIPC88 ,The I/O mode" "According to the value of the PM8.PM88 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIPC87 ,The I/O mode" "According to the value of the PM8.PM87 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 6. " PIPC86 ,The I/O mode" "According to the value of the PM8.PM86 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 5. " PIPC85 ,The I/O mode" "According to the value of the PM8.PM85 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIPC84 ,The I/O mode" "According to the value of the PM8.PM84 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 3. " PIPC83 ,The I/O mode" "According to the value of the PM8.PM83 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 2. " PIPC82 ,The I/O mode" "According to the value of the PM8.PM82 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 1. " PIPC81 ,The I/O mode" "According to the value of the PM8.PM81 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 0. " PIPC80 ,The I/O mode" "According to the value of the PM8.PM80 bit,Selected by the alternative function"
|
|
rgroup.long (0xc00+0x20)++0x3
|
|
line.long 0x00 "SNCR8,Serial sound interface noise canceler control register"
|
|
bitfld.long 0x00 6. " ETSEL ,The Ethernet controller and EthernetAVB status" "Eth. is enabled and Eth.AVB is disabled,Eth.AVB is enabled and Eth. is disabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " SSI5NCE ,Serial Sound Interface Channel 5 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SSI4NCE ,Serial Sound Interface Channel 4 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " SSI3NCE ,Serial Sound Interface Channel 3 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " SSI2NCE ,Serial Sound Interface Channel 2 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " SSI1NCE ,Serial Sound Interface Channel 1 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " SSI0NCE ,Serial Sound Interface Channel 0 Noise Canceler Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 9"
|
|
width 8.
|
|
group.word (0x00+0x24)++0x1
|
|
line.word 0x00 "P9,Port 9 register"
|
|
bitfld.word 0x0 7. " P97 ,Output level of the 7 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 6. " P96 ,Output level of the 6 pin " "Low,High"
|
|
bitfld.word 0x0 5. " P95 ,Output level of the 5 pin " "Low,High"
|
|
bitfld.word 0x0 4. " P94 ,Output level of the 4 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 3. " P93 ,Output level of the 3 pin " "Low,High"
|
|
bitfld.word 0x0 2. " P92 ,Output level of the 2 pin " "Low,High"
|
|
bitfld.word 0x0 1. " P91 ,Output level of the 1 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 0. " P90 ,Output level of the 0 pin " "Low,High"
|
|
group.long (0x100+0x24)++0x3
|
|
line.long 0x00 "PSR9,Port 9 set/reset register"
|
|
bitfld.long 0x0 27. " PSR927 ,Value of the corresponding lower bit is written " "P927 is independent of PSR927,Value of the PSR927 bit"
|
|
bitfld.long 0x0 26. " PSR926 ,Value of the corresponding lower bit is written " "P926 is independent of PSR926,Value of the PSR926 bit"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PSR925 ,Value of the corresponding lower bit is written " "P925 is independent of PSR925,Value of the PSR925 bit"
|
|
bitfld.long 0x0 24. " PSR924 ,Value of the corresponding lower bit is written " "P924 is independent of PSR924,Value of the PSR924 bit"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PSR923 ,Value of the corresponding lower bit is written " "P923 is independent of PSR923,Value of the PSR923 bit"
|
|
bitfld.long 0x0 22. " PSR922 ,Value of the corresponding lower bit is written " "P922 is independent of PSR922,Value of the PSR922 bit"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PSR921 ,Value of the corresponding lower bit is written " "P921 is independent of PSR921,Value of the PSR921 bit"
|
|
bitfld.long 0x0 20. " PSR920 ,Value of the corresponding lower bit is written " "P920 is independent of PSR920,Value of the PSR920 bit"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PSR919 ,Value of the corresponding lower bit is written " "P919 is independent of PSR919,Value of the PSR919 bit"
|
|
bitfld.long 0x0 18. " PSR918 ,Value of the corresponding lower bit is written " "P918 is independent of PSR918,Value of the PSR918 bit"
|
|
textline " "
|
|
bitfld.long 0x0 17. " PSR917 ,Value of the corresponding lower bit is written " "P917 is independent of PSR917,Value of the PSR917 bit"
|
|
bitfld.long 0x0 16. " PSR916 ,Value of the corresponding lower bit is written " "P916 is independent of PSR916,Value of the PSR916 bit"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PSR97 ,Value of the corresponding higher bit is written " "P97=0,P97=1"
|
|
bitfld.long 0x0 6. " PSR96 ,Value of the corresponding higher bit is written " "P96=0,P96=1"
|
|
bitfld.long 0x0 5. " PSR95 ,Value of the corresponding higher bit is written " "P95=0,P95=1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PSR94 ,Value of the corresponding higher bit is written " "P94=0,P94=1"
|
|
bitfld.long 0x0 3. " PSR93 ,Value of the corresponding higher bit is written " "P93=0,P93=1"
|
|
bitfld.long 0x0 2. " PSR92 ,Value of the corresponding higher bit is written " "P92=0,P92=1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PSR91 ,Value of the corresponding higher bit is written " "P91=0,P91=1"
|
|
bitfld.long 0x0 0. " PSR90 ,Value of the corresponding higher bit is written " "P90=0,P90=1"
|
|
rgroup.word (0x200+0x24)++0x1
|
|
line.word 0x00 "PPR9,Port 9 pin read register"
|
|
bitfld.word 0x0 7. " PPR97 ,Value of the P9_7 pin" "0,1"
|
|
bitfld.word 0x0 6. " PPR96 ,Value of the P9_6 pin" "0,1"
|
|
bitfld.word 0x0 5. " PPR95 ,Value of the P9_5 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PPR94 ,Value of the P9_4 pin" "0,1"
|
|
bitfld.word 0x0 3. " PPR93 ,Value of the P9_3 pin" "0,1"
|
|
bitfld.word 0x0 2. " PPR92 ,Value of the P9_2 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PPR91 ,Value of the P9_1 pin" "0,1"
|
|
bitfld.word 0x0 0. " PPR90 ,Value of the P9_0 pin" "0,1"
|
|
group.word (0x300+0x24)++0x1
|
|
line.word 0x00 "PM9,Port 9 mode register"
|
|
bitfld.word 0x0 7. " PM97 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 6. " PM96 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 5. " PM95 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PM94 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 3. " PM93 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 2. " PM92 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PM91 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 0. " PM90 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
group.word (0x400+0x24)++0x1
|
|
line.word 0x00 "PMC9,Port 9 mode control register"
|
|
bitfld.word 0x0 7. " PMC97 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 6. " PMC96 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 5. " PMC95 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PMC94 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 3. " PMC93 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 2. " PMC92 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PMC91 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 0. " PMC90 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
group.word (0x500+0x24)++0x1
|
|
line.word 0x00 "PFC9,Port 9 function control register"
|
|
bitfld.word 0x0 7. " PFC97 , Specifies the alternative function of a pin 7" "0,1"
|
|
bitfld.word 0x0 6. " PFC96 , Specifies the alternative function of a pin 6" "0,1"
|
|
bitfld.word 0x0 5. " PFC95 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFC94 , Specifies the alternative function of a pin 4" "0,1"
|
|
bitfld.word 0x0 3. " PFC93 , Specifies the alternative function of a pin 3" "0,1"
|
|
bitfld.word 0x0 2. " PFC92 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFC91 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFC90 , Specifies the alternative function of a pin 0" "0,1"
|
|
group.word (0x600+0x24)++0x1
|
|
line.word 0x00 "PFCE9,Port 9 function control expansion register"
|
|
bitfld.word 0x0 7. " PFCE97 , Specifies the alternative function of a pin 7" "0,1"
|
|
bitfld.word 0x0 6. " PFCE96 , Specifies the alternative function of a pin 6" "0,1"
|
|
bitfld.word 0x0 5. " PFCE95 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFCE94 , Specifies the alternative function of a pin 4" "0,1"
|
|
bitfld.word 0x0 3. " PFCE93 , Specifies the alternative function of a pin 3" "0,1"
|
|
bitfld.word 0x0 2. " PFCE92 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCE91 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFCE90 , Specifies the alternative function of a pin 0" "0,1"
|
|
wgroup.word (0x700+0x24)++0x1
|
|
line.word 0x00 "PNOT9,Port 9 NOT register"
|
|
bitfld.word 0x0 7. " PNOT97 , Specifies whether to invert P9.P97" "Not inverted,Inverted"
|
|
bitfld.word 0x0 6. " PNOT96 , Specifies whether to invert P9.P96" "Not inverted,Inverted"
|
|
bitfld.word 0x0 5. " PNOT95 , Specifies whether to invert P9.P95" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PNOT94 , Specifies whether to invert P9.P94" "Not inverted,Inverted"
|
|
bitfld.word 0x0 3. " PNOT93 , Specifies whether to invert P9.P93" "Not inverted,Inverted"
|
|
bitfld.word 0x0 2. " PNOT92 , Specifies whether to invert P9.P92" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PNOT91 , Specifies whether to invert P9.P91" "Not inverted,Inverted"
|
|
bitfld.word 0x0 0. " PNOT90 , Specifies whether to invert P9.P90" "Not inverted,Inverted"
|
|
group.long (0x800+0x24)++0x3
|
|
line.long 0x00 "PMSR9,Port 9 mode set/reset register"
|
|
bitfld.long 0x0 27. " PMSR927 , Specifies whether the value of the corresponding lower bit of the PMSR9 register is written to the corresponding bit" "Not depend on the PMSR927 bit,Becomes value of the PMSR927 bit"
|
|
bitfld.long 0x0 26. " PMSR926 , Specifies whether the value of the corresponding lower bit of the PMSR9 register is written to the corresponding bit" "Not depend on the PMSR926 bit,Becomes value of the PMSR926 bit"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PMSR925 , Specifies whether the value of the corresponding lower bit of the PMSR9 register is written to the corresponding bit" "Not depend on the PMSR925 bit,Becomes value of the PMSR925 bit"
|
|
bitfld.long 0x0 24. " PMSR924 , Specifies whether the value of the corresponding lower bit of the PMSR9 register is written to the corresponding bit" "Not depend on the PMSR924 bit,Becomes value of the PMSR924 bit"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PMSR923 , Specifies whether the value of the corresponding lower bit of the PMSR9 register is written to the corresponding bit" "Not depend on the PMSR923 bit,Becomes value of the PMSR923 bit"
|
|
bitfld.long 0x0 22. " PMSR922 , Specifies whether the value of the corresponding lower bit of the PMSR9 register is written to the corresponding bit" "Not depend on the PMSR922 bit,Becomes value of the PMSR922 bit"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PMSR921 , Specifies whether the value of the corresponding lower bit of the PMSR9 register is written to the corresponding bit" "Not depend on the PMSR921 bit,Becomes value of the PMSR921 bit"
|
|
bitfld.long 0x0 20. " PMSR920 , Specifies whether the value of the corresponding lower bit of the PMSR9 register is written to the corresponding bit" "Not depend on the PMSR920 bit,Becomes value of the PMSR920 bit"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PMSR919 , Specifies whether the value of the corresponding lower bit of the PMSR9 register is written to the corresponding bit" "Not depend on the PMSR919 bit,Becomes value of the PMSR919 bit"
|
|
bitfld.long 0x0 18. " PMSR918 , Specifies whether the value of the corresponding lower bit of the PMSR9 register is written to the corresponding bit" "Not depend on the PMSR918 bit,Becomes value of the PMSR918 bit"
|
|
textline " "
|
|
bitfld.long 0x0 17. " PMSR917 , Specifies whether the value of the corresponding lower bit of the PMSR9 register is written to the corresponding bit" "Not depend on the PMSR917 bit,Becomes value of the PMSR917 bit"
|
|
bitfld.long 0x0 16. " PMSR916 , Specifies whether the value of the corresponding lower bit of the PMSR9 register is written to the corresponding bit" "Not depend on the PMSR916 bit,Becomes value of the PMSR916 bit"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PMSR97 , Specifies whether the value of the corresponding higher bit of the PMSR9 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 6. " PMSR96 , Specifies whether the value of the corresponding higher bit of the PMSR9 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 5. " PMSR95 , Specifies whether the value of the corresponding higher bit of the PMSR9 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PMSR94 , Specifies whether the value of the corresponding higher bit of the PMSR9 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 3. " PMSR93 , Specifies whether the value of the corresponding higher bit of the PMSR9 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 2. " PMSR92 , Specifies whether the value of the corresponding higher bit of the PMSR9 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PMSR91 , Specifies whether the value of the corresponding higher bit of the PMSR9 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 0. " PMSR90 , Specifies whether the value of the corresponding higher bit of the PMSR9 register is 1" "PMnm = 0,PMnm = 1"
|
|
group.long (0x900+0x24)++0x3
|
|
line.long 0x00 "PMCSR9,Port 9 mode scontrol set/reset register"
|
|
bitfld.long 0x0 23. " PMCSR97 ,Value of the corresponding lower bit of the PMCSR9 register is written to the corresponding PPMC97 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 22. " PMCSR96 ,Value of the corresponding lower bit of the PMCSR9 register is written to the corresponding PPMC96 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PMCSR95 ,Value of the corresponding lower bit of the PMCSR9 register is written to the corresponding PPMC95 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 20. " PMCSR94 ,Value of the corresponding lower bit of the PMCSR9 register is written to the corresponding PPMC94 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 19. " PMCSR93 ,Value of the corresponding lower bit of the PMCSR9 register is written to the corresponding PPMC93 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 18. " PMCSR92 ,Value of the corresponding lower bit of the PMCSR9 register is written to the corresponding PPMC92 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 17. " PMCSR91 ,Value of the corresponding lower bit of the PMCSR9 register is written to the corresponding PPMC91 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 16. " PMCSR90 ,Value of the corresponding lower bit of the PMCSR9 register is written to the corresponding PPMC90 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PMCSR97 ,Value of the corresponding higher bit of the PMC9 register" "PMC97=0,PMC97=1"
|
|
bitfld.long 0x0 6. " PMCSR96 ,Value of the corresponding higher bit of the PMC9 register" "PMC96=0,PMC96=1"
|
|
bitfld.long 0x0 5. " PMCSR95 ,Value of the corresponding higher bit of the PMC9 register" "PMC95=0,PMC95=1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PMCSR94 ,Value of the corresponding higher bit of the PMC9 register" "PMC94=0,PMC94=1"
|
|
bitfld.long 0x0 3. " PMCSR93 ,Value of the corresponding higher bit of the PMC9 register" "PMC93=0,PMC93=1"
|
|
bitfld.long 0x0 2. " PMCSR92 ,Value of the corresponding higher bit of the PMC9 register" "PMC92=0,PMC92=1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PMCSR91 ,Value of the corresponding higher bit of the PMC9 register" "PMC91=0,PMC91=1"
|
|
bitfld.long 0x0 0. " PMCSR90 ,Value of the corresponding higher bit of the PMC9 register" "PMC90=0,PMC90=1"
|
|
group.word (0xA00+0x24)++0x1
|
|
line.word 0x00 "PFCAE9,Port 9 Function Control Additional Expansion register"
|
|
bitfld.word 0x0 7. " PFCAE97 ,Specifies the alternative function of a pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PFCAE96 ,Specifies the alternative function of a pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PFCAE95 ,Specifies the alternative function of a pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFCAE94 ,Specifies the alternative function of a pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PFCAE93 ,Specifies the alternative function of a pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PFCAE92 ,Specifies the alternative function of a pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCAE91 ,Specifies the alternative function of a pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PFCAE90 ,Specifies the alternative function of a pin 0" "Disabled,Enabled"
|
|
group.word (0x4000+0x24)++0x1
|
|
line.word 0x00 "PIBC9,Port 9 input buffer control register"
|
|
bitfld.word 0x0 7. " PIBC97 ,Enable or disable the input buffer of pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PIBC96 ,Enable or disable the input buffer of pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PIBC95 ,Enable or disable the input buffer of pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIBC94 ,Enable or disable the input buffer of pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PIBC93 ,Enable or disable the input buffer of pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PIBC92 ,Enable or disable the input buffer of pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PIBC91 ,Enable or disable the input buffer of pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PIBC90 ,Enable or disable the input buffer of pin 0" "Disabled,Enabled"
|
|
group.word (0x4100+0x24)++0x1
|
|
line.word 0x00 "PBDC9,Port 9 ibi-direction control register"
|
|
bitfld.word 0x0 7. " PBDC97 ,Enable bidirectional mode of the corresponding pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PBDC96 ,Enable bidirectional mode of the corresponding pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PBDC95 ,Enable bidirectional mode of the corresponding pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PBDC94 ,Enable bidirectional mode of the corresponding pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PBDC93 ,Enable bidirectional mode of the corresponding pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PBDC92 ,Enable bidirectional mode of the corresponding pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PBDC91 ,Enable bidirectional mode of the corresponding pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PBDC90 ,Enable bidirectional mode of the corresponding pin 0" "Disabled,Enabled"
|
|
group.word (0x4200+0x24)++0x1
|
|
line.word 0x00 "PIPC9,Port 9 IP control register"
|
|
bitfld.word 0x0 7. " PIPC97 ,The I/O mode" "According to the value of the PM9.PM97 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 6. " PIPC96 ,The I/O mode" "According to the value of the PM9.PM96 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 5. " PIPC95 ,The I/O mode" "According to the value of the PM9.PM95 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIPC94 ,The I/O mode" "According to the value of the PM9.PM94 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 3. " PIPC93 ,The I/O mode" "According to the value of the PM9.PM93 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 2. " PIPC92 ,The I/O mode" "According to the value of the PM9.PM92 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 1. " PIPC91 ,The I/O mode" "According to the value of the PM9.PM91 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 0. " PIPC90 ,The I/O mode" "According to the value of the PM9.PM90 bit,Selected by the alternative function"
|
|
rgroup.long (0xc00+0x24)++0x3
|
|
line.long 0x00 "SNCR9,Serial sound interface noise canceler control register"
|
|
bitfld.long 0x00 6. " ETSEL ,The Ethernet controller and EthernetAVB status" "Eth. is enabled and Eth.AVB is disabled,Eth.AVB is enabled and Eth. is disabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " SSI5NCE ,Serial Sound Interface Channel 5 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SSI4NCE ,Serial Sound Interface Channel 4 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " SSI3NCE ,Serial Sound Interface Channel 3 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " SSI2NCE ,Serial Sound Interface Channel 2 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " SSI1NCE ,Serial Sound Interface Channel 1 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " SSI0NCE ,Serial Sound Interface Channel 0 Noise Canceler Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 10"
|
|
width 8.
|
|
group.word (0x00+0x28)++0x1
|
|
line.word 0x00 "P10,Port 10 register"
|
|
bitfld.word 0x0 15. " P1015 ,Output level of the 15 pin " "Low,High"
|
|
bitfld.word 0x0 14. " P1014 ,Output level of the 14 pin " "Low,High"
|
|
bitfld.word 0x0 13. " P1013 ,Output level of the 13 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 12. " P1012 ,Output level of the 12 pin " "Low,High"
|
|
bitfld.word 0x0 11. " P1011 ,Output level of the 11 pin " "Low,High"
|
|
bitfld.word 0x0 10. " P1010 ,Output level of the 10 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 9. " P109 ,Output level of the 9 pin " "Low,High"
|
|
bitfld.word 0x0 8. " P108 ,Output level of the 8 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 7. " P107 ,Output level of the 7 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 6. " P106 ,Output level of the 6 pin " "Low,High"
|
|
bitfld.word 0x0 5. " P105 ,Output level of the 5 pin " "Low,High"
|
|
bitfld.word 0x0 4. " P104 ,Output level of the 4 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 3. " P103 ,Output level of the 3 pin " "Low,High"
|
|
bitfld.word 0x0 2. " P102 ,Output level of the 2 pin " "Low,High"
|
|
bitfld.word 0x0 1. " P101 ,Output level of the 1 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 0. " P100 ,Output level of the 0 pin " "Low,High"
|
|
group.long (0x100+0x28)++0x3
|
|
line.long 0x00 "PSR10,Port 10 set/reset register"
|
|
bitfld.long 0x0 31. " PSR1031 ,Value of the corresponding lower bit is written " "P1031 is independent of PSR1031,Value of the PSR1031 bit"
|
|
bitfld.long 0x0 30. " PSR1030 ,Value of the corresponding lower bit is written " "P1030 is independent of PSR1030,Value of the PSR1030 bit"
|
|
textline " "
|
|
bitfld.long 0x0 29. " PSR1029 ,Value of the corresponding lower bit is written " "P1029 is independent of PSR1029,Value of the PSR1029 bit"
|
|
bitfld.long 0x0 28. " PSR1028 ,Value of the corresponding lower bit is written " "P1028 is independent of PSR1028,Value of the PSR1028 bit"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PSR1027 ,Value of the corresponding lower bit is written " "P1027 is independent of PSR1027,Value of the PSR1027 bit"
|
|
bitfld.long 0x0 26. " PSR1026 ,Value of the corresponding lower bit is written " "P1026 is independent of PSR1026,Value of the PSR1026 bit"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PSR1025 ,Value of the corresponding lower bit is written " "P1025 is independent of PSR1025,Value of the PSR1025 bit"
|
|
bitfld.long 0x0 24. " PSR1024 ,Value of the corresponding lower bit is written " "P1024 is independent of PSR1024,Value of the PSR1024 bit"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PSR1023 ,Value of the corresponding lower bit is written " "P1023 is independent of PSR1023,Value of the PSR1023 bit"
|
|
bitfld.long 0x0 22. " PSR1022 ,Value of the corresponding lower bit is written " "P1022 is independent of PSR1022,Value of the PSR1022 bit"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PSR1021 ,Value of the corresponding lower bit is written " "P1021 is independent of PSR1021,Value of the PSR1021 bit"
|
|
bitfld.long 0x0 20. " PSR1020 ,Value of the corresponding lower bit is written " "P1020 is independent of PSR1020,Value of the PSR1020 bit"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PSR1019 ,Value of the corresponding lower bit is written " "P1019 is independent of PSR1019,Value of the PSR1019 bit"
|
|
bitfld.long 0x0 18. " PSR1018 ,Value of the corresponding lower bit is written " "P1018 is independent of PSR1018,Value of the PSR1018 bit"
|
|
textline " "
|
|
bitfld.long 0x0 17. " PSR1017 ,Value of the corresponding lower bit is written " "P1017 is independent of PSR1017,Value of the PSR1017 bit"
|
|
bitfld.long 0x0 16. " PSR1016 ,Value of the corresponding lower bit is written " "P1016 is independent of PSR1016,Value of the PSR1016 bit"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PSR1015 ,Value of the corresponding higher bit is written " "P1015=0,P1015=1"
|
|
bitfld.long 0x0 14. " PSR1014 ,Value of the corresponding higher bit is written " "P1014=0,P1014=1"
|
|
bitfld.long 0x0 13. " PSR1013 ,Value of the corresponding higher bit is written " "P1013=0,P1013=1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PSR1012 ,Value of the corresponding higher bit is written " "P1012=0,P1012=1"
|
|
bitfld.long 0x0 11. " PSR1011 ,Value of the corresponding higher bit is written " "P1011=0,P1011=1"
|
|
bitfld.long 0x0 10. " PSR1010 ,Value of the corresponding higher bit is written " "P1010=0,P1010=1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PSR109 ,Value of the corresponding higher bit is written " "P109=0,P109=1"
|
|
bitfld.long 0x0 8. " PSR108 ,Value of the corresponding higher bit is written " "P108=0,P108=1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PSR107 ,Value of the corresponding higher bit is written " "P107=0,P107=1"
|
|
bitfld.long 0x0 6. " PSR106 ,Value of the corresponding higher bit is written " "P106=0,P106=1"
|
|
bitfld.long 0x0 5. " PSR105 ,Value of the corresponding higher bit is written " "P105=0,P105=1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PSR104 ,Value of the corresponding higher bit is written " "P104=0,P104=1"
|
|
bitfld.long 0x0 3. " PSR103 ,Value of the corresponding higher bit is written " "P103=0,P103=1"
|
|
bitfld.long 0x0 2. " PSR102 ,Value of the corresponding higher bit is written " "P102=0,P102=1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PSR101 ,Value of the corresponding higher bit is written " "P101=0,P101=1"
|
|
bitfld.long 0x0 0. " PSR100 ,Value of the corresponding higher bit is written " "P100=0,P100=1"
|
|
rgroup.word (0x200+0x28)++0x1
|
|
line.word 0x00 "PPR10,Port 10 pin read register"
|
|
bitfld.word 0x0 15. " PPR1015 ,Value of the P10_15 pin" "0,1"
|
|
bitfld.word 0x0 14. " PPR1014 ,Value of the P10_14 pin" "0,1"
|
|
bitfld.word 0x0 13. " PPR1013 ,Value of the P10_13 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PPR1012 ,Value of the P10_12 pin" "0,1"
|
|
bitfld.word 0x0 11. " PPR1011 ,Value of the P10_11 pin" "0,1"
|
|
bitfld.word 0x0 10. " PPR1010 ,Value of the P10_10 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PPR109 ,Value of the P10_9 pin" "0,1"
|
|
bitfld.word 0x0 8. " PPR108 ,Value of the P10_8 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PPR107 ,Value of the P10_7 pin" "0,1"
|
|
bitfld.word 0x0 6. " PPR106 ,Value of the P10_6 pin" "0,1"
|
|
bitfld.word 0x0 5. " PPR105 ,Value of the P10_5 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PPR104 ,Value of the P10_4 pin" "0,1"
|
|
bitfld.word 0x0 3. " PPR103 ,Value of the P10_3 pin" "0,1"
|
|
bitfld.word 0x0 2. " PPR102 ,Value of the P10_2 pin" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PPR101 ,Value of the P10_1 pin" "0,1"
|
|
bitfld.word 0x0 0. " PPR100 ,Value of the P10_0 pin" "0,1"
|
|
group.word (0x300+0x28)++0x1
|
|
line.word 0x00 "PM10,Port 10 mode register"
|
|
bitfld.word 0x0 15. " PM1015 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 14. " PM1014 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 13. " PM1013 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PM1012 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 11. " PM1011 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 10. " PM1010 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PM109 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 8. " PM108 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PM107 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 6. " PM106 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 5. " PM105 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PM104 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 3. " PM103 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 2. " PM102 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PM101 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 0. " PM100 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
group.word (0x400+0x28)++0x1
|
|
line.word 0x00 "PMC10,Port 10 mode control register"
|
|
bitfld.word 0x0 15. " PMC1015 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 14. " PMC1014 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 13. " PMC1013 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PMC1012 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 11. " PMC1011 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 10. " PMC1010 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PMC109 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 8. " PMC108 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PMC107 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 6. " PMC106 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 5. " PMC105 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PMC104 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 3. " PMC103 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 2. " PMC102 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PMC101 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
bitfld.word 0x0 0. " PMC100 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
group.word (0x500+0x28)++0x1
|
|
line.word 0x00 "PFC10,Port 10 function control register"
|
|
bitfld.word 0x0 15. " PFC1015 , Specifies the alternative function of a pin 15" "0,1"
|
|
bitfld.word 0x0 14. " PFC1014 , Specifies the alternative function of a pin 14" "0,1"
|
|
bitfld.word 0x0 13. " PFC1013 , Specifies the alternative function of a pin 13" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFC1012 , Specifies the alternative function of a pin 12" "0,1"
|
|
bitfld.word 0x0 11. " PFC1011 , Specifies the alternative function of a pin 11" "0,1"
|
|
bitfld.word 0x0 10. " PFC1010 , Specifies the alternative function of a pin 10" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFC109 , Specifies the alternative function of a pin 9" "0,1"
|
|
bitfld.word 0x0 8. " PFC108 , Specifies the alternative function of a pin 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFC107 , Specifies the alternative function of a pin 7" "0,1"
|
|
bitfld.word 0x0 6. " PFC106 , Specifies the alternative function of a pin 6" "0,1"
|
|
bitfld.word 0x0 5. " PFC105 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFC104 , Specifies the alternative function of a pin 4" "0,1"
|
|
bitfld.word 0x0 3. " PFC103 , Specifies the alternative function of a pin 3" "0,1"
|
|
bitfld.word 0x0 2. " PFC102 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFC101 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFC100 , Specifies the alternative function of a pin 0" "0,1"
|
|
group.word (0x600+0x28)++0x1
|
|
line.word 0x00 "PFCE10,Port 10 function control expansion register"
|
|
bitfld.word 0x0 15. " PFCE1015 , Specifies the alternative function of a pin 15" "0,1"
|
|
bitfld.word 0x0 14. " PFCE1014 , Specifies the alternative function of a pin 14" "0,1"
|
|
bitfld.word 0x0 13. " PFCE1013 , Specifies the alternative function of a pin 13" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFCE1012 , Specifies the alternative function of a pin 12" "0,1"
|
|
bitfld.word 0x0 11. " PFCE1011 , Specifies the alternative function of a pin 11" "0,1"
|
|
bitfld.word 0x0 10. " PFCE1010 , Specifies the alternative function of a pin 10" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFCE109 , Specifies the alternative function of a pin 9" "0,1"
|
|
bitfld.word 0x0 8. " PFCE108 , Specifies the alternative function of a pin 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFCE107 , Specifies the alternative function of a pin 7" "0,1"
|
|
bitfld.word 0x0 6. " PFCE106 , Specifies the alternative function of a pin 6" "0,1"
|
|
bitfld.word 0x0 5. " PFCE105 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFCE104 , Specifies the alternative function of a pin 4" "0,1"
|
|
bitfld.word 0x0 3. " PFCE103 , Specifies the alternative function of a pin 3" "0,1"
|
|
bitfld.word 0x0 2. " PFCE102 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCE101 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFCE100 , Specifies the alternative function of a pin 0" "0,1"
|
|
wgroup.word (0x700+0x28)++0x1
|
|
line.word 0x00 "PNOT10,Port 10 NOT register"
|
|
bitfld.word 0x0 15. " PNOT1015 , Specifies whether to invert P10.P1015" "Not inverted,Inverted"
|
|
bitfld.word 0x0 14. " PNOT1014 , Specifies whether to invert P10.P1014" "Not inverted,Inverted"
|
|
bitfld.word 0x0 13. " PNOT1013 , Specifies whether to invert P10.P1013" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PNOT1012 , Specifies whether to invert P10.P1012" "Not inverted,Inverted"
|
|
bitfld.word 0x0 11. " PNOT1011 , Specifies whether to invert P10.P1011" "Not inverted,Inverted"
|
|
bitfld.word 0x0 10. " PNOT1010 , Specifies whether to invert P10.P1010" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PNOT109 , Specifies whether to invert P10.P109" "Not inverted,Inverted"
|
|
bitfld.word 0x0 8. " PNOT108 , Specifies whether to invert P10.P108" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PNOT107 , Specifies whether to invert P10.P107" "Not inverted,Inverted"
|
|
bitfld.word 0x0 6. " PNOT106 , Specifies whether to invert P10.P106" "Not inverted,Inverted"
|
|
bitfld.word 0x0 5. " PNOT105 , Specifies whether to invert P10.P105" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PNOT104 , Specifies whether to invert P10.P104" "Not inverted,Inverted"
|
|
bitfld.word 0x0 3. " PNOT103 , Specifies whether to invert P10.P103" "Not inverted,Inverted"
|
|
bitfld.word 0x0 2. " PNOT102 , Specifies whether to invert P10.P102" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PNOT101 , Specifies whether to invert P10.P101" "Not inverted,Inverted"
|
|
bitfld.word 0x0 0. " PNOT100 , Specifies whether to invert P10.P100" "Not inverted,Inverted"
|
|
group.long (0x800+0x28)++0x3
|
|
line.long 0x00 "PMSR10,Port 10 mode set/reset register"
|
|
bitfld.long 0x0 31. " PMSR1031 , Specifies whether the value of the corresponding lower bit of the PMSR10 register is written to the corresponding bit" "Not depend on the PMSR1031 bit,Becomes value of the PMSR1031 bit"
|
|
bitfld.long 0x0 30. " PMSR1030 , Specifies whether the value of the corresponding lower bit of the PMSR10 register is written to the corresponding bit" "Not depend on the PMSR1030 bit,Becomes value of the PMSR1030 bit"
|
|
textline " "
|
|
bitfld.long 0x0 29. " PMSR1029 , Specifies whether the value of the corresponding lower bit of the PMSR10 register is written to the corresponding bit" "Not depend on the PMSR1029 bit,Becomes value of the PMSR1029 bit"
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bitfld.long 0x0 28. " PMSR1028 , Specifies whether the value of the corresponding lower bit of the PMSR10 register is written to the corresponding bit" "Not depend on the PMSR1028 bit,Becomes value of the PMSR1028 bit"
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|
textline " "
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bitfld.long 0x0 27. " PMSR1027 , Specifies whether the value of the corresponding lower bit of the PMSR10 register is written to the corresponding bit" "Not depend on the PMSR1027 bit,Becomes value of the PMSR1027 bit"
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bitfld.long 0x0 26. " PMSR1026 , Specifies whether the value of the corresponding lower bit of the PMSR10 register is written to the corresponding bit" "Not depend on the PMSR1026 bit,Becomes value of the PMSR1026 bit"
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|
textline " "
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bitfld.long 0x0 25. " PMSR1025 , Specifies whether the value of the corresponding lower bit of the PMSR10 register is written to the corresponding bit" "Not depend on the PMSR1025 bit,Becomes value of the PMSR1025 bit"
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bitfld.long 0x0 24. " PMSR1024 , Specifies whether the value of the corresponding lower bit of the PMSR10 register is written to the corresponding bit" "Not depend on the PMSR1024 bit,Becomes value of the PMSR1024 bit"
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|
textline " "
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bitfld.long 0x0 23. " PMSR1023 , Specifies whether the value of the corresponding lower bit of the PMSR10 register is written to the corresponding bit" "Not depend on the PMSR1023 bit,Becomes value of the PMSR1023 bit"
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bitfld.long 0x0 22. " PMSR1022 , Specifies whether the value of the corresponding lower bit of the PMSR10 register is written to the corresponding bit" "Not depend on the PMSR1022 bit,Becomes value of the PMSR1022 bit"
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|
textline " "
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bitfld.long 0x0 21. " PMSR1021 , Specifies whether the value of the corresponding lower bit of the PMSR10 register is written to the corresponding bit" "Not depend on the PMSR1021 bit,Becomes value of the PMSR1021 bit"
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bitfld.long 0x0 20. " PMSR1020 , Specifies whether the value of the corresponding lower bit of the PMSR10 register is written to the corresponding bit" "Not depend on the PMSR1020 bit,Becomes value of the PMSR1020 bit"
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|
textline " "
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bitfld.long 0x0 19. " PMSR1019 , Specifies whether the value of the corresponding lower bit of the PMSR10 register is written to the corresponding bit" "Not depend on the PMSR1019 bit,Becomes value of the PMSR1019 bit"
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bitfld.long 0x0 18. " PMSR1018 , Specifies whether the value of the corresponding lower bit of the PMSR10 register is written to the corresponding bit" "Not depend on the PMSR1018 bit,Becomes value of the PMSR1018 bit"
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textline " "
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bitfld.long 0x0 17. " PMSR1017 , Specifies whether the value of the corresponding lower bit of the PMSR10 register is written to the corresponding bit" "Not depend on the PMSR1017 bit,Becomes value of the PMSR1017 bit"
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bitfld.long 0x0 16. " PMSR1016 , Specifies whether the value of the corresponding lower bit of the PMSR10 register is written to the corresponding bit" "Not depend on the PMSR1016 bit,Becomes value of the PMSR1016 bit"
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textline " "
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bitfld.long 0x0 15. " PMSR1015 , Specifies whether the value of the corresponding higher bit of the PMSR10 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 14. " PMSR1014 , Specifies whether the value of the corresponding higher bit of the PMSR10 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 13. " PMSR1013 , Specifies whether the value of the corresponding higher bit of the PMSR10 register is 1" "PMnm = 0,PMnm = 1"
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|
textline " "
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bitfld.long 0x0 12. " PMSR1012 , Specifies whether the value of the corresponding higher bit of the PMSR10 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 11. " PMSR1011 , Specifies whether the value of the corresponding higher bit of the PMSR10 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 10. " PMSR1010 , Specifies whether the value of the corresponding higher bit of the PMSR10 register is 1" "PMnm = 0,PMnm = 1"
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textline " "
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bitfld.long 0x0 9. " PMSR109 , Specifies whether the value of the corresponding higher bit of the PMSR10 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 8. " PMSR108 , Specifies whether the value of the corresponding higher bit of the PMSR10 register is 1" "PMnm = 0,PMnm = 1"
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textline " "
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bitfld.long 0x0 7. " PMSR107 , Specifies whether the value of the corresponding higher bit of the PMSR10 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 6. " PMSR106 , Specifies whether the value of the corresponding higher bit of the PMSR10 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 5. " PMSR105 , Specifies whether the value of the corresponding higher bit of the PMSR10 register is 1" "PMnm = 0,PMnm = 1"
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textline " "
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bitfld.long 0x0 4. " PMSR104 , Specifies whether the value of the corresponding higher bit of the PMSR10 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 3. " PMSR103 , Specifies whether the value of the corresponding higher bit of the PMSR10 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 2. " PMSR102 , Specifies whether the value of the corresponding higher bit of the PMSR10 register is 1" "PMnm = 0,PMnm = 1"
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textline " "
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bitfld.long 0x0 1. " PMSR101 , Specifies whether the value of the corresponding higher bit of the PMSR10 register is 1" "PMnm = 0,PMnm = 1"
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bitfld.long 0x0 0. " PMSR100 , Specifies whether the value of the corresponding higher bit of the PMSR10 register is 1" "PMnm = 0,PMnm = 1"
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group.long (0x900+0x28)++0x3
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line.long 0x00 "PMCSR10,Port 10 mode scontrol set/reset register"
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bitfld.long 0x0 31. " PMCSR1015 ,Value of the corresponding lower bit of the PMCSR10 register is written to the corresponding PPMC1015 bit" "Disabled,Enabled"
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bitfld.long 0x0 30. " PMCSR1014 ,Value of the corresponding lower bit of the PMCSR10 register is written to the corresponding PPMC1014 bit" "Disabled,Enabled"
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bitfld.long 0x0 29. " PMCSR1013 ,Value of the corresponding lower bit of the PMCSR10 register is written to the corresponding PPMC1013 bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 28. " PMCSR1012 ,Value of the corresponding lower bit of the PMCSR10 register is written to the corresponding PPMC1012 bit" "Disabled,Enabled"
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bitfld.long 0x0 27. " PMCSR1011 ,Value of the corresponding lower bit of the PMCSR10 register is written to the corresponding PPMC1011 bit" "Disabled,Enabled"
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bitfld.long 0x0 26. " PMCSR1010 ,Value of the corresponding lower bit of the PMCSR10 register is written to the corresponding PPMC1010 bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 25. " PMCSR109 ,Value of the corresponding lower bit of the PMCSR10 register is written to the corresponding PPMC109 bit" "Disabled,Enabled"
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bitfld.long 0x0 24. " PMCSR108 ,Value of the corresponding lower bit of the PMCSR10 register is written to the corresponding PPMC108 bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 23. " PMCSR107 ,Value of the corresponding lower bit of the PMCSR10 register is written to the corresponding PPMC107 bit" "Disabled,Enabled"
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bitfld.long 0x0 22. " PMCSR106 ,Value of the corresponding lower bit of the PMCSR10 register is written to the corresponding PPMC106 bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 21. " PMCSR105 ,Value of the corresponding lower bit of the PMCSR10 register is written to the corresponding PPMC105 bit" "Disabled,Enabled"
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bitfld.long 0x0 20. " PMCSR104 ,Value of the corresponding lower bit of the PMCSR10 register is written to the corresponding PPMC104 bit" "Disabled,Enabled"
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bitfld.long 0x0 19. " PMCSR103 ,Value of the corresponding lower bit of the PMCSR10 register is written to the corresponding PPMC103 bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 18. " PMCSR102 ,Value of the corresponding lower bit of the PMCSR10 register is written to the corresponding PPMC102 bit" "Disabled,Enabled"
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bitfld.long 0x0 17. " PMCSR101 ,Value of the corresponding lower bit of the PMCSR10 register is written to the corresponding PPMC101 bit" "Disabled,Enabled"
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bitfld.long 0x0 16. " PMCSR100 ,Value of the corresponding lower bit of the PMCSR10 register is written to the corresponding PPMC100 bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 15. " PMCSR1015 ,Value of the corresponding higher bit of the PMC10 register" "PMC1015=0,PMC1015=1"
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bitfld.long 0x0 14. " PMCSR1014 ,Value of the corresponding higher bit of the PMC10 register" "PMC1014=0,PMC1014=1"
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bitfld.long 0x0 13. " PMCSR1013 ,Value of the corresponding higher bit of the PMC10 register" "PMC1013=0,PMC1013=1"
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textline " "
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bitfld.long 0x0 12. " PMCSR1012 ,Value of the corresponding higher bit of the PMC10 register" "PMC1012=0,PMC1012=1"
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bitfld.long 0x0 11. " PMCSR1011 ,Value of the corresponding higher bit of the PMC10 register" "PMC1011=0,PMC1011=1"
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bitfld.long 0x0 10. " PMCSR1010 ,Value of the corresponding higher bit of the PMC10 register" "PMC1010=0,PMC1010=1"
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textline " "
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bitfld.long 0x0 9. " PMCSR109 ,Value of the corresponding higher bit of the PMC10 register" "PMC109=0,PMC109=1"
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bitfld.long 0x0 8. " PMCSR108 ,Value of the corresponding higher bit of the PMC10 register" "PMC108=0,PMC108=1"
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textline " "
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bitfld.long 0x0 7. " PMCSR107 ,Value of the corresponding higher bit of the PMC10 register" "PMC107=0,PMC107=1"
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bitfld.long 0x0 6. " PMCSR106 ,Value of the corresponding higher bit of the PMC10 register" "PMC106=0,PMC106=1"
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bitfld.long 0x0 5. " PMCSR105 ,Value of the corresponding higher bit of the PMC10 register" "PMC105=0,PMC105=1"
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textline " "
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bitfld.long 0x0 4. " PMCSR104 ,Value of the corresponding higher bit of the PMC10 register" "PMC104=0,PMC104=1"
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bitfld.long 0x0 3. " PMCSR103 ,Value of the corresponding higher bit of the PMC10 register" "PMC103=0,PMC103=1"
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bitfld.long 0x0 2. " PMCSR102 ,Value of the corresponding higher bit of the PMC10 register" "PMC102=0,PMC102=1"
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textline " "
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bitfld.long 0x0 1. " PMCSR101 ,Value of the corresponding higher bit of the PMC10 register" "PMC101=0,PMC101=1"
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bitfld.long 0x0 0. " PMCSR100 ,Value of the corresponding higher bit of the PMC10 register" "PMC100=0,PMC100=1"
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group.word (0xA00+0x28)++0x1
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line.word 0x00 "PFCAE10,Port 10 Function Control Additional Expansion register"
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bitfld.word 0x0 15. " PFCAE1015 ,Specifies the alternative function of a pin 15" "Disabled,Enabled"
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bitfld.word 0x0 14. " PFCAE1014 ,Specifies the alternative function of a pin 14" "Disabled,Enabled"
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bitfld.word 0x0 13. " PFCAE1013 ,Specifies the alternative function of a pin 13" "Disabled,Enabled"
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textline " "
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bitfld.word 0x0 12. " PFCAE1012 ,Specifies the alternative function of a pin 12" "Disabled,Enabled"
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bitfld.word 0x0 11. " PFCAE1011 ,Specifies the alternative function of a pin 11" "Disabled,Enabled"
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bitfld.word 0x0 10. " PFCAE1010 ,Specifies the alternative function of a pin 10" "Disabled,Enabled"
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textline " "
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bitfld.word 0x0 9. " PFCAE109 ,Specifies the alternative function of a pin 9" "Disabled,Enabled"
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bitfld.word 0x0 8. " PFCAE108 ,Specifies the alternative function of a pin 8" "Disabled,Enabled"
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textline " "
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bitfld.word 0x0 7. " PFCAE107 ,Specifies the alternative function of a pin 7" "Disabled,Enabled"
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bitfld.word 0x0 6. " PFCAE106 ,Specifies the alternative function of a pin 6" "Disabled,Enabled"
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bitfld.word 0x0 5. " PFCAE105 ,Specifies the alternative function of a pin 5" "Disabled,Enabled"
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textline " "
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bitfld.word 0x0 4. " PFCAE104 ,Specifies the alternative function of a pin 4" "Disabled,Enabled"
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bitfld.word 0x0 3. " PFCAE103 ,Specifies the alternative function of a pin 3" "Disabled,Enabled"
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bitfld.word 0x0 2. " PFCAE102 ,Specifies the alternative function of a pin 2" "Disabled,Enabled"
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textline " "
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bitfld.word 0x0 1. " PFCAE101 ,Specifies the alternative function of a pin 1" "Disabled,Enabled"
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bitfld.word 0x0 0. " PFCAE100 ,Specifies the alternative function of a pin 0" "Disabled,Enabled"
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group.word (0x4000+0x28)++0x1
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line.word 0x00 "PIBC10,Port 10 input buffer control register"
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bitfld.word 0x0 15. " PIBC1015 ,Enable or disable the input buffer of pin 15" "Disabled,Enabled"
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bitfld.word 0x0 14. " PIBC1014 ,Enable or disable the input buffer of pin 14" "Disabled,Enabled"
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bitfld.word 0x0 13. " PIBC1013 ,Enable or disable the input buffer of pin 13" "Disabled,Enabled"
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textline " "
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bitfld.word 0x0 12. " PIBC1012 ,Enable or disable the input buffer of pin 12" "Disabled,Enabled"
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bitfld.word 0x0 11. " PIBC1011 ,Enable or disable the input buffer of pin 11" "Disabled,Enabled"
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bitfld.word 0x0 10. " PIBC1010 ,Enable or disable the input buffer of pin 10" "Disabled,Enabled"
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textline " "
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bitfld.word 0x0 9. " PIBC109 ,Enable or disable the input buffer of pin 9" "Disabled,Enabled"
|
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bitfld.word 0x0 8. " PIBC108 ,Enable or disable the input buffer of pin 8" "Disabled,Enabled"
|
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textline " "
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bitfld.word 0x0 7. " PIBC107 ,Enable or disable the input buffer of pin 7" "Disabled,Enabled"
|
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bitfld.word 0x0 6. " PIBC106 ,Enable or disable the input buffer of pin 6" "Disabled,Enabled"
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bitfld.word 0x0 5. " PIBC105 ,Enable or disable the input buffer of pin 5" "Disabled,Enabled"
|
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textline " "
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bitfld.word 0x0 4. " PIBC104 ,Enable or disable the input buffer of pin 4" "Disabled,Enabled"
|
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bitfld.word 0x0 3. " PIBC103 ,Enable or disable the input buffer of pin 3" "Disabled,Enabled"
|
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bitfld.word 0x0 2. " PIBC102 ,Enable or disable the input buffer of pin 2" "Disabled,Enabled"
|
|
textline " "
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bitfld.word 0x0 1. " PIBC101 ,Enable or disable the input buffer of pin 1" "Disabled,Enabled"
|
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bitfld.word 0x0 0. " PIBC100 ,Enable or disable the input buffer of pin 0" "Disabled,Enabled"
|
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group.word (0x4100+0x28)++0x1
|
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line.word 0x00 "PBDC10,Port 10 ibi-direction control register"
|
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bitfld.word 0x0 15. " PBDC1015 ,Enable bidirectional mode of the corresponding pin 15" "Disabled,Enabled"
|
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bitfld.word 0x0 14. " PBDC1014 ,Enable bidirectional mode of the corresponding pin 14" "Disabled,Enabled"
|
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bitfld.word 0x0 13. " PBDC1013 ,Enable bidirectional mode of the corresponding pin 13" "Disabled,Enabled"
|
|
textline " "
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bitfld.word 0x0 12. " PBDC1012 ,Enable bidirectional mode of the corresponding pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PBDC1011 ,Enable bidirectional mode of the corresponding pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PBDC1010 ,Enable bidirectional mode of the corresponding pin 10" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.word 0x0 9. " PBDC109 ,Enable bidirectional mode of the corresponding pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PBDC108 ,Enable bidirectional mode of the corresponding pin 8" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.word 0x0 7. " PBDC107 ,Enable bidirectional mode of the corresponding pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PBDC106 ,Enable bidirectional mode of the corresponding pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PBDC105 ,Enable bidirectional mode of the corresponding pin 5" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.word 0x0 4. " PBDC104 ,Enable bidirectional mode of the corresponding pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PBDC103 ,Enable bidirectional mode of the corresponding pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PBDC102 ,Enable bidirectional mode of the corresponding pin 2" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.word 0x0 1. " PBDC101 ,Enable bidirectional mode of the corresponding pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PBDC100 ,Enable bidirectional mode of the corresponding pin 0" "Disabled,Enabled"
|
|
group.word (0x4200+0x28)++0x1
|
|
line.word 0x00 "PIPC10,Port 10 IP control register"
|
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bitfld.word 0x0 15. " PIPC1015 ,The I/O mode" "According to the value of the PM10.PM1015 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 14. " PIPC1014 ,The I/O mode" "According to the value of the PM10.PM1014 bit,Selected by the alternative function"
|
|
textline " "
|
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bitfld.word 0x0 13. " PIPC1013 ,The I/O mode" "According to the value of the PM10.PM1013 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 12. " PIPC1012 ,The I/O mode" "According to the value of the PM10.PM1012 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 11. " PIPC1011 ,The I/O mode" "According to the value of the PM10.PM1011 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 10. " PIPC1010 ,The I/O mode" "According to the value of the PM10.PM1010 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PIPC109 ,The I/O mode" "According to the value of the PM10.PM109 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 8. " PIPC108 ,The I/O mode" "According to the value of the PM10.PM108 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIPC107 ,The I/O mode" "According to the value of the PM10.PM107 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 6. " PIPC106 ,The I/O mode" "According to the value of the PM10.PM106 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 5. " PIPC105 ,The I/O mode" "According to the value of the PM10.PM105 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIPC104 ,The I/O mode" "According to the value of the PM10.PM104 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 3. " PIPC103 ,The I/O mode" "According to the value of the PM10.PM103 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 2. " PIPC102 ,The I/O mode" "According to the value of the PM10.PM102 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 1. " PIPC101 ,The I/O mode" "According to the value of the PM10.PM101 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 0. " PIPC100 ,The I/O mode" "According to the value of the PM10.PM100 bit,Selected by the alternative function"
|
|
rgroup.long (0xc00+0x28)++0x3
|
|
line.long 0x00 "SNCR10,Serial sound interface noise canceler control register"
|
|
bitfld.long 0x00 6. " ETSEL ,The Ethernet controller and EthernetAVB status" "Eth. is enabled and Eth.AVB is disabled,Eth.AVB is enabled and Eth. is disabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " SSI5NCE ,Serial Sound Interface Channel 5 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SSI4NCE ,Serial Sound Interface Channel 4 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " SSI3NCE ,Serial Sound Interface Channel 3 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " SSI2NCE ,Serial Sound Interface Channel 2 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " SSI1NCE ,Serial Sound Interface Channel 1 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " SSI0NCE ,Serial Sound Interface Channel 0 Noise Canceler Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 11"
|
|
width 8.
|
|
group.word (0x00+0x2C)++0x1
|
|
line.word 0x00 "P11,Port 11 register"
|
|
bitfld.word 0x0 15. " P1115 ,Output level of the 15 pin " "Low,High"
|
|
bitfld.word 0x0 14. " P1114 ,Output level of the 14 pin " "Low,High"
|
|
bitfld.word 0x0 13. " P1113 ,Output level of the 13 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 12. " P1112 ,Output level of the 12 pin " "Low,High"
|
|
bitfld.word 0x0 11. " P1111 ,Output level of the 11 pin " "Low,High"
|
|
bitfld.word 0x0 10. " P1110 ,Output level of the 10 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 9. " P119 ,Output level of the 9 pin " "Low,High"
|
|
bitfld.word 0x0 8. " P118 ,Output level of the 8 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 7. " P117 ,Output level of the 7 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 6. " P116 ,Output level of the 6 pin " "Low,High"
|
|
bitfld.word 0x0 5. " P115 ,Output level of the 5 pin " "Low,High"
|
|
bitfld.word 0x0 4. " P114 ,Output level of the 4 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 3. " P113 ,Output level of the 3 pin " "Low,High"
|
|
bitfld.word 0x0 2. " P112 ,Output level of the 2 pin " "Low,High"
|
|
bitfld.word 0x0 1. " P111 ,Output level of the 1 pin " "Low,High"
|
|
textline " "
|
|
bitfld.word 0x0 0. " P110 ,Output level of the 0 pin " "Low,High"
|
|
group.long (0x100+0x2C)++0x3
|
|
line.long 0x00 "PSR11,Port 11 set/reset register"
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bitfld.long 0x0 31. " PSR1131 ,Value of the corresponding lower bit is written " "P1131 is independent of PSR1131,Value of the PSR1131 bit"
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bitfld.long 0x0 30. " PSR1130 ,Value of the corresponding lower bit is written " "P1130 is independent of PSR1130,Value of the PSR1130 bit"
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|
textline " "
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bitfld.long 0x0 29. " PSR1129 ,Value of the corresponding lower bit is written " "P1129 is independent of PSR1129,Value of the PSR1129 bit"
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bitfld.long 0x0 28. " PSR1128 ,Value of the corresponding lower bit is written " "P1128 is independent of PSR1128,Value of the PSR1128 bit"
|
|
textline " "
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bitfld.long 0x0 27. " PSR1127 ,Value of the corresponding lower bit is written " "P1127 is independent of PSR1127,Value of the PSR1127 bit"
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bitfld.long 0x0 26. " PSR1126 ,Value of the corresponding lower bit is written " "P1126 is independent of PSR1126,Value of the PSR1126 bit"
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textline " "
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bitfld.long 0x0 25. " PSR1125 ,Value of the corresponding lower bit is written " "P1125 is independent of PSR1125,Value of the PSR1125 bit"
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bitfld.long 0x0 24. " PSR1124 ,Value of the corresponding lower bit is written " "P1124 is independent of PSR1124,Value of the PSR1124 bit"
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|
textline " "
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bitfld.long 0x0 23. " PSR1123 ,Value of the corresponding lower bit is written " "P1123 is independent of PSR1123,Value of the PSR1123 bit"
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bitfld.long 0x0 22. " PSR1122 ,Value of the corresponding lower bit is written " "P1122 is independent of PSR1122,Value of the PSR1122 bit"
|
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textline " "
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bitfld.long 0x0 21. " PSR1121 ,Value of the corresponding lower bit is written " "P1121 is independent of PSR1121,Value of the PSR1121 bit"
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bitfld.long 0x0 20. " PSR1120 ,Value of the corresponding lower bit is written " "P1120 is independent of PSR1120,Value of the PSR1120 bit"
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textline " "
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bitfld.long 0x0 19. " PSR1119 ,Value of the corresponding lower bit is written " "P1119 is independent of PSR1119,Value of the PSR1119 bit"
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bitfld.long 0x0 18. " PSR1118 ,Value of the corresponding lower bit is written " "P1118 is independent of PSR1118,Value of the PSR1118 bit"
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textline " "
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bitfld.long 0x0 17. " PSR1117 ,Value of the corresponding lower bit is written " "P1117 is independent of PSR1117,Value of the PSR1117 bit"
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bitfld.long 0x0 16. " PSR1116 ,Value of the corresponding lower bit is written " "P1116 is independent of PSR1116,Value of the PSR1116 bit"
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textline " "
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bitfld.long 0x0 15. " PSR1115 ,Value of the corresponding higher bit is written " "P1115=0,P1115=1"
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bitfld.long 0x0 14. " PSR1114 ,Value of the corresponding higher bit is written " "P1114=0,P1114=1"
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bitfld.long 0x0 13. " PSR1113 ,Value of the corresponding higher bit is written " "P1113=0,P1113=1"
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|
textline " "
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bitfld.long 0x0 12. " PSR1112 ,Value of the corresponding higher bit is written " "P1112=0,P1112=1"
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bitfld.long 0x0 11. " PSR1111 ,Value of the corresponding higher bit is written " "P1111=0,P1111=1"
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bitfld.long 0x0 10. " PSR1110 ,Value of the corresponding higher bit is written " "P1110=0,P1110=1"
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textline " "
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bitfld.long 0x0 9. " PSR119 ,Value of the corresponding higher bit is written " "P119=0,P119=1"
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bitfld.long 0x0 8. " PSR118 ,Value of the corresponding higher bit is written " "P118=0,P118=1"
|
|
textline " "
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bitfld.long 0x0 7. " PSR117 ,Value of the corresponding higher bit is written " "P117=0,P117=1"
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bitfld.long 0x0 6. " PSR116 ,Value of the corresponding higher bit is written " "P116=0,P116=1"
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bitfld.long 0x0 5. " PSR115 ,Value of the corresponding higher bit is written " "P115=0,P115=1"
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|
textline " "
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bitfld.long 0x0 4. " PSR114 ,Value of the corresponding higher bit is written " "P114=0,P114=1"
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bitfld.long 0x0 3. " PSR113 ,Value of the corresponding higher bit is written " "P113=0,P113=1"
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bitfld.long 0x0 2. " PSR112 ,Value of the corresponding higher bit is written " "P112=0,P112=1"
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|
textline " "
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bitfld.long 0x0 1. " PSR111 ,Value of the corresponding higher bit is written " "P111=0,P111=1"
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bitfld.long 0x0 0. " PSR110 ,Value of the corresponding higher bit is written " "P110=0,P110=1"
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rgroup.word (0x200+0x2C)++0x1
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line.word 0x00 "PPR11,Port 11 pin read register"
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bitfld.word 0x0 15. " PPR1115 ,Value of the P11_15 pin" "0,1"
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bitfld.word 0x0 14. " PPR1114 ,Value of the P11_14 pin" "0,1"
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bitfld.word 0x0 13. " PPR1113 ,Value of the P11_13 pin" "0,1"
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textline " "
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bitfld.word 0x0 12. " PPR1112 ,Value of the P11_12 pin" "0,1"
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bitfld.word 0x0 11. " PPR1111 ,Value of the P11_11 pin" "0,1"
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bitfld.word 0x0 10. " PPR1110 ,Value of the P11_10 pin" "0,1"
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textline " "
|
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bitfld.word 0x0 9. " PPR119 ,Value of the P11_9 pin" "0,1"
|
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bitfld.word 0x0 8. " PPR118 ,Value of the P11_8 pin" "0,1"
|
|
textline " "
|
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bitfld.word 0x0 7. " PPR117 ,Value of the P11_7 pin" "0,1"
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bitfld.word 0x0 6. " PPR116 ,Value of the P11_6 pin" "0,1"
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bitfld.word 0x0 5. " PPR115 ,Value of the P11_5 pin" "0,1"
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|
textline " "
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bitfld.word 0x0 4. " PPR114 ,Value of the P11_4 pin" "0,1"
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bitfld.word 0x0 3. " PPR113 ,Value of the P11_3 pin" "0,1"
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bitfld.word 0x0 2. " PPR112 ,Value of the P11_2 pin" "0,1"
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textline " "
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bitfld.word 0x0 1. " PPR111 ,Value of the P11_1 pin" "0,1"
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bitfld.word 0x0 0. " PPR110 ,Value of the P11_0 pin" "0,1"
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group.word (0x300+0x2C)++0x1
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line.word 0x00 "PM11,Port 11 mode register"
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bitfld.word 0x0 15. " PM1115 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
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bitfld.word 0x0 14. " PM1114 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
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bitfld.word 0x0 13. " PM1113 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
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bitfld.word 0x0 12. " PM1112 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
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bitfld.word 0x0 11. " PM1111 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
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bitfld.word 0x0 10. " PM1110 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
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textline " "
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bitfld.word 0x0 9. " PM119 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
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bitfld.word 0x0 8. " PM118 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PM117 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
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bitfld.word 0x0 6. " PM116 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 5. " PM115 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PM114 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
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bitfld.word 0x0 3. " PM113 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
bitfld.word 0x0 2. " PM112 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
|
textline " "
|
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bitfld.word 0x0 1. " PM111 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
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bitfld.word 0x0 0. " PM110 ,Specifies input/output mode of the corresponding pin" "Output mode,Input mode"
|
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group.word (0x400+0x2C)++0x1
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line.word 0x00 "PMC11,Port 11 mode control register"
|
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bitfld.word 0x0 15. " PMC1115 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
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bitfld.word 0x0 14. " PMC1114 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
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bitfld.word 0x0 13. " PMC1113 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PMC1112 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
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bitfld.word 0x0 11. " PMC1111 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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bitfld.word 0x0 10. " PMC1110 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
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textline " "
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bitfld.word 0x0 9. " PMC119 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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bitfld.word 0x0 8. " PMC118 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
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textline " "
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bitfld.word 0x0 7. " PMC117 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
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bitfld.word 0x0 6. " PMC116 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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bitfld.word 0x0 5. " PMC115 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
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textline " "
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bitfld.word 0x0 4. " PMC114 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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bitfld.word 0x0 3. " PMC113 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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bitfld.word 0x0 2. " PMC112 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
|
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textline " "
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bitfld.word 0x0 1. " PMC111 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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bitfld.word 0x0 0. " PMC110 , Specifies the operation mode of the corresponding pin" "Port mode,Alternative mode"
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group.word (0x500+0x2C)++0x1
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line.word 0x00 "PFC11,Port 11 function control register"
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bitfld.word 0x0 15. " PFC1115 , Specifies the alternative function of a pin 15" "0,1"
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bitfld.word 0x0 14. " PFC1114 , Specifies the alternative function of a pin 14" "0,1"
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bitfld.word 0x0 13. " PFC1113 , Specifies the alternative function of a pin 13" "0,1"
|
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textline " "
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bitfld.word 0x0 12. " PFC1112 , Specifies the alternative function of a pin 12" "0,1"
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bitfld.word 0x0 11. " PFC1111 , Specifies the alternative function of a pin 11" "0,1"
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bitfld.word 0x0 10. " PFC1110 , Specifies the alternative function of a pin 10" "0,1"
|
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textline " "
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bitfld.word 0x0 9. " PFC119 , Specifies the alternative function of a pin 9" "0,1"
|
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bitfld.word 0x0 8. " PFC118 , Specifies the alternative function of a pin 8" "0,1"
|
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textline " "
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bitfld.word 0x0 7. " PFC117 , Specifies the alternative function of a pin 7" "0,1"
|
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bitfld.word 0x0 6. " PFC116 , Specifies the alternative function of a pin 6" "0,1"
|
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bitfld.word 0x0 5. " PFC115 , Specifies the alternative function of a pin 5" "0,1"
|
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textline " "
|
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bitfld.word 0x0 4. " PFC114 , Specifies the alternative function of a pin 4" "0,1"
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bitfld.word 0x0 3. " PFC113 , Specifies the alternative function of a pin 3" "0,1"
|
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bitfld.word 0x0 2. " PFC112 , Specifies the alternative function of a pin 2" "0,1"
|
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textline " "
|
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bitfld.word 0x0 1. " PFC111 , Specifies the alternative function of a pin 1" "0,1"
|
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bitfld.word 0x0 0. " PFC110 , Specifies the alternative function of a pin 0" "0,1"
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group.word (0x600+0x2C)++0x1
|
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line.word 0x00 "PFCE11,Port 11 function control expansion register"
|
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bitfld.word 0x0 15. " PFCE1115 , Specifies the alternative function of a pin 15" "0,1"
|
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bitfld.word 0x0 14. " PFCE1114 , Specifies the alternative function of a pin 14" "0,1"
|
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bitfld.word 0x0 13. " PFCE1113 , Specifies the alternative function of a pin 13" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFCE1112 , Specifies the alternative function of a pin 12" "0,1"
|
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bitfld.word 0x0 11. " PFCE1111 , Specifies the alternative function of a pin 11" "0,1"
|
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bitfld.word 0x0 10. " PFCE1110 , Specifies the alternative function of a pin 10" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFCE119 , Specifies the alternative function of a pin 9" "0,1"
|
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bitfld.word 0x0 8. " PFCE118 , Specifies the alternative function of a pin 8" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFCE117 , Specifies the alternative function of a pin 7" "0,1"
|
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bitfld.word 0x0 6. " PFCE116 , Specifies the alternative function of a pin 6" "0,1"
|
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bitfld.word 0x0 5. " PFCE115 , Specifies the alternative function of a pin 5" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFCE114 , Specifies the alternative function of a pin 4" "0,1"
|
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bitfld.word 0x0 3. " PFCE113 , Specifies the alternative function of a pin 3" "0,1"
|
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bitfld.word 0x0 2. " PFCE112 , Specifies the alternative function of a pin 2" "0,1"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCE111 , Specifies the alternative function of a pin 1" "0,1"
|
|
bitfld.word 0x0 0. " PFCE110 , Specifies the alternative function of a pin 0" "0,1"
|
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wgroup.word (0x700+0x2C)++0x1
|
|
line.word 0x00 "PNOT11,Port 11 NOT register"
|
|
bitfld.word 0x0 15. " PNOT1115 , Specifies whether to invert P11.P1115" "Not inverted,Inverted"
|
|
bitfld.word 0x0 14. " PNOT1114 , Specifies whether to invert P11.P1114" "Not inverted,Inverted"
|
|
bitfld.word 0x0 13. " PNOT1113 , Specifies whether to invert P11.P1113" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PNOT1112 , Specifies whether to invert P11.P1112" "Not inverted,Inverted"
|
|
bitfld.word 0x0 11. " PNOT1111 , Specifies whether to invert P11.P1111" "Not inverted,Inverted"
|
|
bitfld.word 0x0 10. " PNOT1110 , Specifies whether to invert P11.P1110" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PNOT119 , Specifies whether to invert P11.P119" "Not inverted,Inverted"
|
|
bitfld.word 0x0 8. " PNOT118 , Specifies whether to invert P11.P118" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PNOT117 , Specifies whether to invert P11.P117" "Not inverted,Inverted"
|
|
bitfld.word 0x0 6. " PNOT116 , Specifies whether to invert P11.P116" "Not inverted,Inverted"
|
|
bitfld.word 0x0 5. " PNOT115 , Specifies whether to invert P11.P115" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PNOT114 , Specifies whether to invert P11.P114" "Not inverted,Inverted"
|
|
bitfld.word 0x0 3. " PNOT113 , Specifies whether to invert P11.P113" "Not inverted,Inverted"
|
|
bitfld.word 0x0 2. " PNOT112 , Specifies whether to invert P11.P112" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PNOT111 , Specifies whether to invert P11.P111" "Not inverted,Inverted"
|
|
bitfld.word 0x0 0. " PNOT110 , Specifies whether to invert P11.P110" "Not inverted,Inverted"
|
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group.long (0x800+0x2C)++0x3
|
|
line.long 0x00 "PMSR11,Port 11 mode set/reset register"
|
|
bitfld.long 0x0 31. " PMSR1131 , Specifies whether the value of the corresponding lower bit of the PMSR11 register is written to the corresponding bit" "Not depend on the PMSR1131 bit,Becomes value of the PMSR1131 bit"
|
|
bitfld.long 0x0 30. " PMSR1130 , Specifies whether the value of the corresponding lower bit of the PMSR11 register is written to the corresponding bit" "Not depend on the PMSR1130 bit,Becomes value of the PMSR1130 bit"
|
|
textline " "
|
|
bitfld.long 0x0 29. " PMSR1129 , Specifies whether the value of the corresponding lower bit of the PMSR11 register is written to the corresponding bit" "Not depend on the PMSR1129 bit,Becomes value of the PMSR1129 bit"
|
|
bitfld.long 0x0 28. " PMSR1128 , Specifies whether the value of the corresponding lower bit of the PMSR11 register is written to the corresponding bit" "Not depend on the PMSR1128 bit,Becomes value of the PMSR1128 bit"
|
|
textline " "
|
|
bitfld.long 0x0 27. " PMSR1127 , Specifies whether the value of the corresponding lower bit of the PMSR11 register is written to the corresponding bit" "Not depend on the PMSR1127 bit,Becomes value of the PMSR1127 bit"
|
|
bitfld.long 0x0 26. " PMSR1126 , Specifies whether the value of the corresponding lower bit of the PMSR11 register is written to the corresponding bit" "Not depend on the PMSR1126 bit,Becomes value of the PMSR1126 bit"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PMSR1125 , Specifies whether the value of the corresponding lower bit of the PMSR11 register is written to the corresponding bit" "Not depend on the PMSR1125 bit,Becomes value of the PMSR1125 bit"
|
|
bitfld.long 0x0 24. " PMSR1124 , Specifies whether the value of the corresponding lower bit of the PMSR11 register is written to the corresponding bit" "Not depend on the PMSR1124 bit,Becomes value of the PMSR1124 bit"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PMSR1123 , Specifies whether the value of the corresponding lower bit of the PMSR11 register is written to the corresponding bit" "Not depend on the PMSR1123 bit,Becomes value of the PMSR1123 bit"
|
|
bitfld.long 0x0 22. " PMSR1122 , Specifies whether the value of the corresponding lower bit of the PMSR11 register is written to the corresponding bit" "Not depend on the PMSR1122 bit,Becomes value of the PMSR1122 bit"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PMSR1121 , Specifies whether the value of the corresponding lower bit of the PMSR11 register is written to the corresponding bit" "Not depend on the PMSR1121 bit,Becomes value of the PMSR1121 bit"
|
|
bitfld.long 0x0 20. " PMSR1120 , Specifies whether the value of the corresponding lower bit of the PMSR11 register is written to the corresponding bit" "Not depend on the PMSR1120 bit,Becomes value of the PMSR1120 bit"
|
|
textline " "
|
|
bitfld.long 0x0 19. " PMSR1119 , Specifies whether the value of the corresponding lower bit of the PMSR11 register is written to the corresponding bit" "Not depend on the PMSR1119 bit,Becomes value of the PMSR1119 bit"
|
|
bitfld.long 0x0 18. " PMSR1118 , Specifies whether the value of the corresponding lower bit of the PMSR11 register is written to the corresponding bit" "Not depend on the PMSR1118 bit,Becomes value of the PMSR1118 bit"
|
|
textline " "
|
|
bitfld.long 0x0 17. " PMSR1117 , Specifies whether the value of the corresponding lower bit of the PMSR11 register is written to the corresponding bit" "Not depend on the PMSR1117 bit,Becomes value of the PMSR1117 bit"
|
|
bitfld.long 0x0 16. " PMSR1116 , Specifies whether the value of the corresponding lower bit of the PMSR11 register is written to the corresponding bit" "Not depend on the PMSR1116 bit,Becomes value of the PMSR1116 bit"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PMSR1115 , Specifies whether the value of the corresponding higher bit of the PMSR11 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 14. " PMSR1114 , Specifies whether the value of the corresponding higher bit of the PMSR11 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 13. " PMSR1113 , Specifies whether the value of the corresponding higher bit of the PMSR11 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PMSR1112 , Specifies whether the value of the corresponding higher bit of the PMSR11 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 11. " PMSR1111 , Specifies whether the value of the corresponding higher bit of the PMSR11 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 10. " PMSR1110 , Specifies whether the value of the corresponding higher bit of the PMSR11 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PMSR119 , Specifies whether the value of the corresponding higher bit of the PMSR11 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 8. " PMSR118 , Specifies whether the value of the corresponding higher bit of the PMSR11 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PMSR117 , Specifies whether the value of the corresponding higher bit of the PMSR11 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 6. " PMSR116 , Specifies whether the value of the corresponding higher bit of the PMSR11 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 5. " PMSR115 , Specifies whether the value of the corresponding higher bit of the PMSR11 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PMSR114 , Specifies whether the value of the corresponding higher bit of the PMSR11 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 3. " PMSR113 , Specifies whether the value of the corresponding higher bit of the PMSR11 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 2. " PMSR112 , Specifies whether the value of the corresponding higher bit of the PMSR11 register is 1" "PMnm = 0,PMnm = 1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PMSR111 , Specifies whether the value of the corresponding higher bit of the PMSR11 register is 1" "PMnm = 0,PMnm = 1"
|
|
bitfld.long 0x0 0. " PMSR110 , Specifies whether the value of the corresponding higher bit of the PMSR11 register is 1" "PMnm = 0,PMnm = 1"
|
|
group.long (0x900+0x2C)++0x3
|
|
line.long 0x00 "PMCSR11,Port 11 mode scontrol set/reset register"
|
|
bitfld.long 0x0 31. " PMCSR1115 ,Value of the corresponding lower bit of the PMCSR11 register is written to the corresponding PPMC1115 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " PMCSR1114 ,Value of the corresponding lower bit of the PMCSR11 register is written to the corresponding PPMC1114 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 29. " PMCSR1113 ,Value of the corresponding lower bit of the PMCSR11 register is written to the corresponding PPMC1113 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 28. " PMCSR1112 ,Value of the corresponding lower bit of the PMCSR11 register is written to the corresponding PPMC1112 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 27. " PMCSR1111 ,Value of the corresponding lower bit of the PMCSR11 register is written to the corresponding PPMC1111 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 26. " PMCSR1110 ,Value of the corresponding lower bit of the PMCSR11 register is written to the corresponding PPMC1110 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PMCSR119 ,Value of the corresponding lower bit of the PMCSR11 register is written to the corresponding PPMC119 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 24. " PMCSR118 ,Value of the corresponding lower bit of the PMCSR11 register is written to the corresponding PPMC118 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 23. " PMCSR117 ,Value of the corresponding lower bit of the PMCSR11 register is written to the corresponding PPMC117 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 22. " PMCSR116 ,Value of the corresponding lower bit of the PMCSR11 register is written to the corresponding PPMC116 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 21. " PMCSR115 ,Value of the corresponding lower bit of the PMCSR11 register is written to the corresponding PPMC115 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 20. " PMCSR114 ,Value of the corresponding lower bit of the PMCSR11 register is written to the corresponding PPMC114 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 19. " PMCSR113 ,Value of the corresponding lower bit of the PMCSR11 register is written to the corresponding PPMC113 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 18. " PMCSR112 ,Value of the corresponding lower bit of the PMCSR11 register is written to the corresponding PPMC112 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 17. " PMCSR111 ,Value of the corresponding lower bit of the PMCSR11 register is written to the corresponding PPMC111 bit" "Disabled,Enabled"
|
|
bitfld.long 0x0 16. " PMCSR110 ,Value of the corresponding lower bit of the PMCSR11 register is written to the corresponding PPMC110 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 15. " PMCSR1115 ,Value of the corresponding higher bit of the PMC11 register" "PMC1115=0,PMC1115=1"
|
|
bitfld.long 0x0 14. " PMCSR1114 ,Value of the corresponding higher bit of the PMC11 register" "PMC1114=0,PMC1114=1"
|
|
bitfld.long 0x0 13. " PMCSR1113 ,Value of the corresponding higher bit of the PMC11 register" "PMC1113=0,PMC1113=1"
|
|
textline " "
|
|
bitfld.long 0x0 12. " PMCSR1112 ,Value of the corresponding higher bit of the PMC11 register" "PMC1112=0,PMC1112=1"
|
|
bitfld.long 0x0 11. " PMCSR1111 ,Value of the corresponding higher bit of the PMC11 register" "PMC1111=0,PMC1111=1"
|
|
bitfld.long 0x0 10. " PMCSR1110 ,Value of the corresponding higher bit of the PMC11 register" "PMC1110=0,PMC1110=1"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PMCSR119 ,Value of the corresponding higher bit of the PMC11 register" "PMC119=0,PMC119=1"
|
|
bitfld.long 0x0 8. " PMCSR118 ,Value of the corresponding higher bit of the PMC11 register" "PMC118=0,PMC118=1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " PMCSR117 ,Value of the corresponding higher bit of the PMC11 register" "PMC117=0,PMC117=1"
|
|
bitfld.long 0x0 6. " PMCSR116 ,Value of the corresponding higher bit of the PMC11 register" "PMC116=0,PMC116=1"
|
|
bitfld.long 0x0 5. " PMCSR115 ,Value of the corresponding higher bit of the PMC11 register" "PMC115=0,PMC115=1"
|
|
textline " "
|
|
bitfld.long 0x0 4. " PMCSR114 ,Value of the corresponding higher bit of the PMC11 register" "PMC114=0,PMC114=1"
|
|
bitfld.long 0x0 3. " PMCSR113 ,Value of the corresponding higher bit of the PMC11 register" "PMC113=0,PMC113=1"
|
|
bitfld.long 0x0 2. " PMCSR112 ,Value of the corresponding higher bit of the PMC11 register" "PMC112=0,PMC112=1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " PMCSR111 ,Value of the corresponding higher bit of the PMC11 register" "PMC111=0,PMC111=1"
|
|
bitfld.long 0x0 0. " PMCSR110 ,Value of the corresponding higher bit of the PMC11 register" "PMC110=0,PMC110=1"
|
|
group.word (0xA00+0x2C)++0x1
|
|
line.word 0x00 "PFCAE11,Port 11 Function Control Additional Expansion register"
|
|
bitfld.word 0x0 15. " PFCAE1115 ,Specifies the alternative function of a pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PFCAE1114 ,Specifies the alternative function of a pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PFCAE1113 ,Specifies the alternative function of a pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PFCAE1112 ,Specifies the alternative function of a pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PFCAE1111 ,Specifies the alternative function of a pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PFCAE1110 ,Specifies the alternative function of a pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PFCAE119 ,Specifies the alternative function of a pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PFCAE118 ,Specifies the alternative function of a pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PFCAE117 ,Specifies the alternative function of a pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PFCAE116 ,Specifies the alternative function of a pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PFCAE115 ,Specifies the alternative function of a pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PFCAE114 ,Specifies the alternative function of a pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PFCAE113 ,Specifies the alternative function of a pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PFCAE112 ,Specifies the alternative function of a pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PFCAE111 ,Specifies the alternative function of a pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PFCAE110 ,Specifies the alternative function of a pin 0" "Disabled,Enabled"
|
|
group.word (0x4000+0x2C)++0x1
|
|
line.word 0x00 "PIBC11,Port 11 input buffer control register"
|
|
bitfld.word 0x0 15. " PIBC1115 ,Enable or disable the input buffer of pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PIBC1114 ,Enable or disable the input buffer of pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PIBC1113 ,Enable or disable the input buffer of pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PIBC1112 ,Enable or disable the input buffer of pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PIBC1111 ,Enable or disable the input buffer of pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PIBC1110 ,Enable or disable the input buffer of pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PIBC119 ,Enable or disable the input buffer of pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PIBC118 ,Enable or disable the input buffer of pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIBC117 ,Enable or disable the input buffer of pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PIBC116 ,Enable or disable the input buffer of pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PIBC115 ,Enable or disable the input buffer of pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIBC114 ,Enable or disable the input buffer of pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PIBC113 ,Enable or disable the input buffer of pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PIBC112 ,Enable or disable the input buffer of pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PIBC111 ,Enable or disable the input buffer of pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PIBC110 ,Enable or disable the input buffer of pin 0" "Disabled,Enabled"
|
|
group.word (0x4100+0x2C)++0x1
|
|
line.word 0x00 "PBDC11,Port 11 ibi-direction control register"
|
|
bitfld.word 0x0 15. " PBDC1115 ,Enable bidirectional mode of the corresponding pin 15" "Disabled,Enabled"
|
|
bitfld.word 0x0 14. " PBDC1114 ,Enable bidirectional mode of the corresponding pin 14" "Disabled,Enabled"
|
|
bitfld.word 0x0 13. " PBDC1113 ,Enable bidirectional mode of the corresponding pin 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 12. " PBDC1112 ,Enable bidirectional mode of the corresponding pin 12" "Disabled,Enabled"
|
|
bitfld.word 0x0 11. " PBDC1111 ,Enable bidirectional mode of the corresponding pin 11" "Disabled,Enabled"
|
|
bitfld.word 0x0 10. " PBDC1110 ,Enable bidirectional mode of the corresponding pin 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PBDC119 ,Enable bidirectional mode of the corresponding pin 9" "Disabled,Enabled"
|
|
bitfld.word 0x0 8. " PBDC118 ,Enable bidirectional mode of the corresponding pin 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PBDC117 ,Enable bidirectional mode of the corresponding pin 7" "Disabled,Enabled"
|
|
bitfld.word 0x0 6. " PBDC116 ,Enable bidirectional mode of the corresponding pin 6" "Disabled,Enabled"
|
|
bitfld.word 0x0 5. " PBDC115 ,Enable bidirectional mode of the corresponding pin 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PBDC114 ,Enable bidirectional mode of the corresponding pin 4" "Disabled,Enabled"
|
|
bitfld.word 0x0 3. " PBDC113 ,Enable bidirectional mode of the corresponding pin 3" "Disabled,Enabled"
|
|
bitfld.word 0x0 2. " PBDC112 ,Enable bidirectional mode of the corresponding pin 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x0 1. " PBDC111 ,Enable bidirectional mode of the corresponding pin 1" "Disabled,Enabled"
|
|
bitfld.word 0x0 0. " PBDC110 ,Enable bidirectional mode of the corresponding pin 0" "Disabled,Enabled"
|
|
group.word (0x4200+0x2C)++0x1
|
|
line.word 0x00 "PIPC11,Port 11 IP control register"
|
|
bitfld.word 0x0 15. " PIPC1115 ,The I/O mode" "According to the value of the PM11.PM1115 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 14. " PIPC1114 ,The I/O mode" "According to the value of the PM11.PM1114 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 13. " PIPC1113 ,The I/O mode" "According to the value of the PM11.PM1113 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 12. " PIPC1112 ,The I/O mode" "According to the value of the PM11.PM1112 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 11. " PIPC1111 ,The I/O mode" "According to the value of the PM11.PM1111 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 10. " PIPC1110 ,The I/O mode" "According to the value of the PM11.PM1110 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 9. " PIPC119 ,The I/O mode" "According to the value of the PM11.PM119 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 8. " PIPC118 ,The I/O mode" "According to the value of the PM11.PM118 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 7. " PIPC117 ,The I/O mode" "According to the value of the PM11.PM117 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 6. " PIPC116 ,The I/O mode" "According to the value of the PM11.PM116 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 5. " PIPC115 ,The I/O mode" "According to the value of the PM11.PM115 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 4. " PIPC114 ,The I/O mode" "According to the value of the PM11.PM114 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 3. " PIPC113 ,The I/O mode" "According to the value of the PM11.PM113 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 2. " PIPC112 ,The I/O mode" "According to the value of the PM11.PM112 bit,Selected by the alternative function"
|
|
bitfld.word 0x0 1. " PIPC111 ,The I/O mode" "According to the value of the PM11.PM111 bit,Selected by the alternative function"
|
|
textline " "
|
|
bitfld.word 0x0 0. " PIPC110 ,The I/O mode" "According to the value of the PM11.PM110 bit,Selected by the alternative function"
|
|
rgroup.long (0xc00+0x2C)++0x3
|
|
line.long 0x00 "SNCR11,Serial sound interface noise canceler control register"
|
|
bitfld.long 0x00 6. " ETSEL ,The Ethernet controller and EthernetAVB status" "Eth. is enabled and Eth.AVB is disabled,Eth.AVB is enabled and Eth. is disabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " SSI5NCE ,Serial Sound Interface Channel 5 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SSI4NCE ,Serial Sound Interface Channel 4 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " SSI3NCE ,Serial Sound Interface Channel 3 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " SSI2NCE ,Serial Sound Interface Channel 2 Noise Canceler Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " SSI1NCE ,Serial Sound Interface Channel 1 Noise Canceler Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " SSI0NCE ,Serial Sound Interface Channel 0 Noise Canceler Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree "PDM (Power-Down Modes)"
|
|
base ad:0xFCFE0000
|
|
width 10.
|
|
group.byte 0x20++0x0
|
|
line.byte 0x00 "STBCR1,Standby control register 1"
|
|
bitfld.byte 0x00 6.--7. " DEEP_STBY ,Software and Deep Standby" "Sleep mode,Sleep mode,Software standby mode,Deep standby mode"
|
|
group.byte 0x24++0x0
|
|
line.byte 0x00 "STBCR2,Standby control register 2"
|
|
bitfld.byte 0x00 7. " HIZ ,Port High Impedance" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " MSTP20 ,Module Stop 20" "Not halted,Halted"
|
|
group.byte 0x420++0x0
|
|
line.byte 0x00 "STBCR3,Standby control register 3"
|
|
bitfld.byte 0x00 7. " MSTP37 ,Module Stop 7" "Not halted,Halted"
|
|
bitfld.byte 0x00 6. " MSTP36 ,Module Stop 6" "Not halted,Halted"
|
|
bitfld.byte 0x00 5. " MSTP35 ,Module Stop 5" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " MSTP34 ,Module Stop 4" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MSTP33 ,Module Stop 3" "Not halted,Halted"
|
|
bitfld.byte 0x00 2. " MSTP32 ,Module Stop 2" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " MSTP31 ,Module Stop 1" "Not halted,Halted"
|
|
bitfld.byte 0x00 0. " MSTP30 ,Module Stop 0" "Not halted,Halted"
|
|
group.byte 0x424++0x0
|
|
line.byte 0x00 "STBCR4,Standby control register 4"
|
|
bitfld.byte 0x00 7. " MSTP47 ,Module Stop 7" "Not halted,Halted"
|
|
bitfld.byte 0x00 6. " MSTP46 ,Module Stop 6" "Not halted,Halted"
|
|
bitfld.byte 0x00 5. " MSTP45 ,Module Stop 5" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " MSTP44 ,Module Stop 4" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MSTP43 ,Module Stop 3" "Not halted,Halted"
|
|
bitfld.byte 0x00 2. " MSTP42 ,Module Stop 2" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " MSTP41 ,Module Stop 1" "Not halted,Halted"
|
|
bitfld.byte 0x00 0. " MSTP40 ,Module Stop 0" "Not halted,Halted"
|
|
group.byte 0x428++0x0
|
|
line.byte 0x00 "STBCR5,Standby control register 5"
|
|
bitfld.byte 0x00 7. " MSTP57 ,Module Stop 7" "Not halted,Halted"
|
|
bitfld.byte 0x00 6. " MSTP56 ,Module Stop 6" "Not halted,Halted"
|
|
bitfld.byte 0x00 5. " MSTP55 ,Module Stop 5" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " MSTP54 ,Module Stop 4" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MSTP53 ,Module Stop 3" "Not halted,Halted"
|
|
bitfld.byte 0x00 2. " MSTP52 ,Module Stop 2" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " MSTP51 ,Module Stop 1" "Not halted,Halted"
|
|
bitfld.byte 0x00 0. " MSTP50 ,Module Stop 0" "Not halted,Halted"
|
|
group.byte 0x42C++0x0
|
|
line.byte 0x00 "STBCR6,Standby control register 6"
|
|
bitfld.byte 0x00 7. " MSTP67 ,Module Stop 7" "Not halted,Halted"
|
|
bitfld.byte 0x00 6. " MSTP66 ,Module Stop 6" "Not halted,Halted"
|
|
bitfld.byte 0x00 5. " MSTP65 ,Module Stop 5" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " MSTP64 ,Module Stop 4" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MSTP63 ,Module Stop 3" "Not halted,Halted"
|
|
bitfld.byte 0x00 2. " MSTP62 ,Module Stop 2" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " MSTP61 ,Module Stop 1" "Not halted,Halted"
|
|
bitfld.byte 0x00 0. " MSTP60 ,Module Stop 0" "Not halted,Halted"
|
|
group.byte 0x430++0x0
|
|
line.byte 0x00 "STBCR7,Standby control register 7"
|
|
bitfld.byte 0x00 7. " MSTP77 ,Module Stop 7" "Not halted,Halted"
|
|
bitfld.byte 0x00 6. " MSTP76 ,Module Stop 6" "Not halted,Halted"
|
|
bitfld.byte 0x00 4. " MSTP74 ,Module Stop 4" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MSTP73 ,Module Stop 3" "Not halted,Halted"
|
|
bitfld.byte 0x00 1. " MSTP71 ,Module Stop 1" "Not halted,Halted"
|
|
bitfld.byte 0x00 0. " MSTP70 ,Module Stop 0" "Not halted,Halted"
|
|
group.byte 0x434++0x0
|
|
line.byte 0x00 "STBCR8,Standby control register 8"
|
|
bitfld.byte 0x00 7. " MSTP87 ,Module Stop 7" "Not halted,Halted"
|
|
bitfld.byte 0x00 6. " MSTP86 ,Module Stop 6" "Not halted,Halted"
|
|
bitfld.byte 0x00 5. " MSTP85 ,Module Stop 5" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " MSTP84 ,Module Stop 4" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MSTP83 ,Module Stop 3" "Not halted,Halted"
|
|
bitfld.byte 0x00 2. " MSTP82 ,Module Stop 2" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " MSTP81 ,Module Stop 1" "Not halted,Halted"
|
|
group.byte 0x438++0x0
|
|
line.byte 0x00 "STBCR9,Standby control register 9"
|
|
bitfld.byte 0x00 7. " MSTP97 ,Module Stop 7" "Not halted,Halted"
|
|
bitfld.byte 0x00 6. " MSTP96 ,Module Stop 6" "Not halted,Halted"
|
|
bitfld.byte 0x00 5. " MSTP95 ,Module Stop 5" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " MSTP94 ,Module Stop 4" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MSTP93 ,Module Stop 3" "Not halted,Halted"
|
|
bitfld.byte 0x00 2. " MSTP92 ,Module Stop 2" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " MSTP91 ,Module Stop 1" "Not halted,Halted"
|
|
bitfld.byte 0x00 0. " MSTP90 ,Module Stop 0" "Not halted,Halted"
|
|
group.byte 0x43C++0x0
|
|
line.byte 0x00 "STBCR10,Standby control register 10"
|
|
bitfld.byte 0x00 7. " MSTP107 ,Module Stop 7" "Not halted,Halted"
|
|
bitfld.byte 0x00 6. " MSTP106 ,Module Stop 6" "Not halted,Halted"
|
|
bitfld.byte 0x00 5. " MSTP105 ,Module Stop 5" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " MSTP104 ,Module Stop 4" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MSTP103 ,Module Stop 3" "Not halted,Halted"
|
|
bitfld.byte 0x00 2. " MSTP102 ,Module Stop 2" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " MSTP101 ,Module Stop 1" "Not halted,Halted"
|
|
bitfld.byte 0x00 0. " MSTP100 ,Module Stop 0" "Not halted,Halted"
|
|
group.byte 0x440++0x0
|
|
line.byte 0x00 "STBCR11,Standby control register 11"
|
|
bitfld.byte 0x00 7. " MSTP117 ,Module Stop 7" "Not halted,Halted"
|
|
bitfld.byte 0x00 6. " MSTP116 ,Module Stop 6" "Not halted,Halted"
|
|
bitfld.byte 0x00 5. " MSTP115 ,Module Stop 5" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " MSTP114 ,Module Stop 4" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MSTP113 ,Module Stop 3" "Not halted,Halted"
|
|
bitfld.byte 0x00 2. " MSTP112 ,Module Stop 2" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " MSTP111 ,Module Stop 1" "Not halted,Halted"
|
|
bitfld.byte 0x00 0. " MSTP110 ,Module Stop 0" "Not halted,Halted"
|
|
group.byte 0x444++0x0
|
|
line.byte 0x00 "STBCR12,Standby control register 12"
|
|
bitfld.byte 0x00 7. " MSTP127 ,Module Stop 7" "Not halted,Halted"
|
|
bitfld.byte 0x00 6. " MSTP126 ,Module Stop 6" "Not halted,Halted"
|
|
bitfld.byte 0x00 4. " MSTP124 ,Module Stop 4" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MSTP123 ,Module Stop 3" "Not halted,Halted"
|
|
bitfld.byte 0x00 2. " MSTP122 ,Module Stop 2" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " MSTP121 ,Module Stop 1" "Not halted,Halted"
|
|
bitfld.byte 0x00 0. " MSTP120 ,Module Stop 0" "Not halted,Halted"
|
|
group.byte 0x470++0x0
|
|
line.byte 0x00 "STBCR13,Standby control register 13"
|
|
bitfld.byte 0x00 7. " MSTP137 ,Module Stop 7" "Not halted,Halted"
|
|
bitfld.byte 0x00 6. " MSTP136 ,Module Stop 6" "Not halted,Halted"
|
|
bitfld.byte 0x00 4. " MSTP134 ,Module Stop 4" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MSTP133 ,Module Stop 3" "Not halted,Halted"
|
|
bitfld.byte 0x00 2. " MSTP132 ,Module Stop 2" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " MSTP131 ,Module Stop 1" "Not halted,Halted"
|
|
group.byte 0x460++0x0
|
|
line.byte 0x00 "SWRSTCR1,Software reset control register 1"
|
|
bitfld.byte 0x00 7. " AXTALE ,AUDIO_X1 Clock Control" "Not halted,Halted"
|
|
bitfld.byte 0x00 6. " SRST16 ,Serial Sound Interface Channel 6 Software reset" "No reset,Reset"
|
|
bitfld.byte 0x00 5. " SRST15 ,Serial Sound Interface Channel 5 Software reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " SRST14 ,Serial Sound Interface Channel 4 Software reset" "No reset,Reset"
|
|
bitfld.byte 0x00 3. " SRST13 ,Serial Sound Interface Channel 3 Software reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " SRST12 ,Serial Sound Interface Channel 2 Software reset" "No reset,Reset"
|
|
bitfld.byte 0x00 1. " SRST11 ,Serial Sound Interface Channel 1 Software reset" "No reset,Reset"
|
|
bitfld.byte 0x00 0. " SRST10 ,Serial Sound Interface Channel 0 Software reset" "No reset,Reset"
|
|
group.byte 0x464++0x0
|
|
line.byte 0x00 "SWRSTCR2,Software reset control register 2"
|
|
bitfld.byte 0x00 1. " SRST21 ,Serial Sound Interface Channel 1 Software reset" "No reset,Reset"
|
|
group.byte 0x468++0x0
|
|
line.byte 0x00 "SWRSTCR3,Software reset control register 3"
|
|
bitfld.byte 0x00 2. " SRST32 ,Serial Sound Interface Channel 2 Software reset" "No reset,Reset"
|
|
group.byte 0x400++0x0
|
|
line.byte 0x00 "SYSCR1,System control register 1"
|
|
bitfld.byte 0x00 4. " VRAMWE4 ,RAM Write Enable 4" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " VRAMWE3 ,RAM Write Enable 3" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " VRAMWE2 ,RAM Write Enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " VRAMWE1 ,RAM Write Enable 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " VRAMWE0 ,RAM Write Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
group.byte 0x404++0x0
|
|
line.byte 0x00 "SYSCR2,System control register 2"
|
|
bitfld.byte 0x00 4. " VRAME4 ,RAM Enable 4" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " VRAME3 ,RAM Enable 3" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " VRAME2 ,RAM Enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " VRAME1 ,RAM Enable 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " VRAME0 ,RAM Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
group.byte 0x408++0x0
|
|
line.byte 0x00 "SYSCR3,System control register 3"
|
|
bitfld.byte 0x00 4. " VRAME4 ,RAM Enable 4" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " VRAME3 ,RAM Enable 3" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " VRAME2 ,RAM Enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " VRAME1 ,RAM Enable 1" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " VRAME0 ,RAM Enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
rgroup.byte 0x18++0x0
|
|
line.byte 0x00 "CPUSTS,CPU status register"
|
|
bitfld.byte 0x00 4. " ISBUSY ,State during Changing of the Frequency of CPU and Return from Software Standby" "Not occurred,Occurred"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x00 "STBREQ1,Standby request register 1"
|
|
bitfld.byte 0x00 5. " STBRQ15 ,Standby Request to CoreSight" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " STBRQ13 ,Standby Request to CoreSight" "Invalid,Valid"
|
|
bitfld.byte 0x00 2. " STBRQ12 ,Standby Request to CoreSight" "Invalid,Valid"
|
|
textline " "
|
|
textline " "
|
|
bitfld.byte 0x00 0. " STBRQ10 ,Standby Request to CoreSight" "Invalid,Valid"
|
|
group.byte 0x34++0x0
|
|
line.byte 0x00 "STBREQ2,Standby request register 2"
|
|
bitfld.byte 0x00 7. " STBRQ27 ,Standby Request to CoreSight" "Invalid,Valid"
|
|
bitfld.byte 0x00 6. " STBRQ26 ,Standby Request to CoreSight" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " STBRQ25 ,Standby Request to CoreSight" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " STBRQ24 ,Standby Request to CoreSight" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " STBRQ23 ,Standby Request to CoreSight" "Invalid,Valid"
|
|
bitfld.byte 0x00 2. " STBRQ22 ,Standby Request to CoreSight" "Invalid,Valid"
|
|
textline " "
|
|
textline " "
|
|
bitfld.byte 0x00 1. " STBRQ21 ,Standby Request to CoreSight" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " STBRQ20 ,Standby Request to CoreSight" "Invalid,Valid"
|
|
rgroup.byte 0x40++0x0
|
|
line.byte 0x00 "STBACK1,Standby acknowledge register 1"
|
|
bitfld.byte 0x00 5. " STBAK15 ,Standby Acknowledgement from CoreSight" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " STBAK13 ,Standby Acknowledgement from CoreSight" "Invalid,Valid"
|
|
bitfld.byte 0x00 2. " STBAK12 ,Standby Acknowledgement from CoreSight" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " STBAK10 ,Standby Acknowledgement from CoreSight" "Invalid,Valid"
|
|
rgroup.byte 0x44++0x0
|
|
line.byte 0x00 "STBACK2,Standby acknowledge register 2"
|
|
bitfld.byte 0x00 7. " STBAK27 ,Standby Acknowledgement from CoreSight" "Invalid,Valid"
|
|
bitfld.byte 0x00 6. " STBAK26 ,Standby Acknowledgement from CoreSight" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " STBAK25 ,Standby Acknowledgement from CoreSight" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " STBAK24 ,Standby Acknowledgement from CoreSight" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " STBAK23 ,Standby Acknowledgement from CoreSight" "Invalid,Valid"
|
|
bitfld.byte 0x00 2. " STBAK22 ,Standby Acknowledgement from CoreSight" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " STBAK21 ,Standby Acknowledgement from CoreSight" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " STBAK20 ,Standby Acknowledgement from CoreSight" "Invalid,Valid"
|
|
group.byte 0x1800++0x0
|
|
line.byte 0x00 "RRAMKP,On-chip data-retention RAM area setting register"
|
|
bitfld.byte 0x00 3. " RRAMKP3 ,On-Chip Data-Retention RAM Storage Area 3" "Not retained,Retained"
|
|
bitfld.byte 0x00 2. " RRAMKP2 ,On-Chip Data-Retention RAM Storage Area 2" "Not retained,Retained"
|
|
bitfld.byte 0x00 1. " RRAMKP1 ,On-Chip Data-Retention RAM Storage Area 1" "Not retained,Retained"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " RRAMKP0 ,On-Chip Data-Retention RAM Storage Area 0" "Not retained,Retained"
|
|
group.byte 0x1802++0x0
|
|
line.byte 0x00 "DSCTR,Deep standby control register"
|
|
bitfld.byte 0x00 7. " EBUSKEEPE ,Retention of External Memory Control Pin State" "Not retained,Retained"
|
|
bitfld.byte 0x00 6. " RAMBOOT ,Selection of Method after Returning from Deep Standby Mode" "0,1"
|
|
group.word 0x1804++0x5
|
|
line.word 0x00 "DSSSR,Deep standby cancel source register"
|
|
bitfld.word 0x00 14. " P6_2 ,Cancel by Change on P6_2" "Not canceled,Canceled"
|
|
bitfld.word 0x00 13. " P3_9 ,Cancel by Change on P3_9" "Not canceled,Canceled"
|
|
bitfld.word 0x00 12. " P3_1 ,Cancel by Change on P3_1" "Not canceled,Canceled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " P2_12 ,Cancel by Change on P2_12" "Not canceled,Canceled"
|
|
bitfld.word 0x00 10. " P8_7 ,Cancel by Change on P8_7" "Not canceled,Canceled"
|
|
bitfld.word 0x00 9. " P3_3 ,Cancel by Change on P3_3" "Not canceled,Canceled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " NMI ,Cancel by Change on NMI" "Not canceled,Canceled"
|
|
bitfld.word 0x00 6. " RTCAR ,Cancel by Realtime Clock Alarm Interrupt" "Not canceled,Canceled"
|
|
bitfld.word 0x00 5. " P6_4 ,Cancel by Change on P6_4" "Not canceled,Canceled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " P5_9 ,Cancel by Change on P5_9" "Not canceled,Canceled"
|
|
bitfld.word 0x00 3. " P7_8 ,Cancel by Change on P7_8" "Not canceled,Canceled"
|
|
bitfld.word 0x00 2. " P2_15 ,Cancel by Change on P2_15" "Not canceled,Canceled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " P9_1 ,Cancel by Change on P9_1" "Not canceled,Canceled"
|
|
bitfld.word 0x00 0. " P8_2 ,Cancel by Change on P8_2" "Not canceled,Canceled"
|
|
line.word 0x02 "DSESR,Deep standby cancel edge select register"
|
|
bitfld.word 0x02 14. " P6_2 ,Edge detection P6_2" "Falling edge,Rising edge"
|
|
bitfld.word 0x02 13. " P3_9 ,Edge detection P3_9" "Falling edge,Rising edge"
|
|
bitfld.word 0x02 12. " P3_1 ,Edge detection P3_1" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.word 0x02 11. " P2_12 ,Edge detection P2_12" "Falling edge,Rising edge"
|
|
bitfld.word 0x02 10. " P8_7 ,Edge detection P8_7" "Falling edge,Rising edge"
|
|
bitfld.word 0x02 9. " P3_3 ,Edge detection P3_3" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.word 0x02 8. " NMI ,Edge detection NMI" "Falling edge,Rising edge"
|
|
bitfld.word 0x02 5. " P6_4 ,Edge detection P6_4" "Falling edge,Rising edge"
|
|
bitfld.word 0x02 4. " P5_9 ,Edge detection P5_9" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.word 0x02 3. " P7_8 ,Edge detection P7_8" "Falling edge,Rising edge"
|
|
bitfld.word 0x02 2. " P2_15 ,Edge detection P2_15" "Falling edge,Rising edge"
|
|
bitfld.word 0x02 1. " P9_1 ,Edge detection P9_1" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.word 0x02 0. " P8_2 ,Edge detection P8_2" "Falling edge,Rising edge"
|
|
line.word 0x04 "DSFR,Deep standby cancel ource flag register"
|
|
bitfld.word 0x04 15. " IOKEEP ,Release of Pin State Retention" "Not retained,Retained"
|
|
bitfld.word 0x04 14. " P6_2 ,Flag P6_2" "Not changed,Changed"
|
|
bitfld.word 0x04 13. " P3_9 ,Flag P3_9" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.word 0x04 12. " P3_1 ,Flag P3_1" "Not changed,Changed"
|
|
bitfld.word 0x04 11. " P2_12 ,Flag P2_12" "Not changed,Changed"
|
|
bitfld.word 0x04 10. " P8_7 ,Flag P8_7" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.word 0x04 9. " P3_3 ,Flag P3_3" "Not changed,Changed"
|
|
bitfld.word 0x04 8. " NMI ,Flag NMI" "No interrupt,Interrupt"
|
|
bitfld.word 0x04 6. " RTCAR ,RTCAR Flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x04 5. " P6_4 ,Flag P6_4" "Not changed,Changed"
|
|
bitfld.word 0x04 4. " P5_9 ,Flag P5_9" "Not changed,Changed"
|
|
bitfld.word 0x04 3. " P7_8 ,Flag P7_8" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.word 0x04 2. " P2_15 ,Flag P2_15" "Not changed,Changed"
|
|
bitfld.word 0x04 1. " P9_1 ,Flag P9_1" "Not changed,Changed"
|
|
bitfld.word 0x04 0. " P8_2 ,Flag P8_2" "Not changed,Changed"
|
|
group.byte 0x1810++0x0
|
|
line.byte 0x00 "XTALCTR,XTAL crystal oscilator gain control register"
|
|
bitfld.byte 0x00 1. " GAIN1 ,Realtime Clock Crystal Oscillator" "Large gain,Small gain"
|
|
bitfld.byte 0x00 0. " GAIN0 ,XTAL Crystal Oscillator" "Large gain,Small gain"
|
|
width 0xb
|
|
tree.end
|
|
tree "DI (Debugger Interface)"
|
|
base ad:0xFC00F000
|
|
width 18.
|
|
group.long 0x00++0x7 "ICE Registers"
|
|
line.long 0x00 "ICEREGMDRSTCTL,Mode reset control register"
|
|
bitfld.long 0x00 20. " NIDEN_CPU0 ,CPU Noninvasive Debug Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " DBGEN_CPU0 ,CPU Debug Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " RSTRB_CPU0_DERSTZ ,NEON Reset" "No reset,Reset"
|
|
bitfld.long 0x00 8. " RSTRB_CPU0_CPURSTZ ,CPU Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RSTRB_SYS_SYSRSTZ ,System Reset" "No reset,Reset"
|
|
bitfld.long 0x00 3. " RSTRB_CPU_PORSTZ ,CPU Subsystem Power-On Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RSTRB_CPU_PRSTDBGZ ,CPU Subsystem Debug Peripheral Reset" "No reset,Reset"
|
|
bitfld.long 0x00 1. " RSTRB_CPU_SYSRSTZ ,CPU Subsystem Reset" "No reset,Reset"
|
|
line.long 0x04 "ICEREGJTTRCSEL,JTAG trace select register"
|
|
bitfld.long 0x04 23. " PINSETEN ,Selects control method of debug enable signal supplied to the CPU" "ICEREGMDRSTCTL,BSCANP pin"
|
|
bitfld.long 0x04 20. " TRCMUX_SEL ,Sets the priority of the function multiplexed on the pins to which trace output is assigned" "Depends on I/O port setting,Act as trace outputs"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "ICEREGCLKPWRCTRL,Clock power control register"
|
|
bitfld.long 0x00 7. " FAKEDBGCTRL ,Enables or disables the fake debug mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FAKEDBG ,Selects whether or not to stop the power supply in deep standby mode" "Stopped,Not stopped"
|
|
wgroup.long 0xfb0++0x3
|
|
line.long 0x00 "CEREGLOCKACCES,Lock access register"
|
|
width 0xb
|
|
tree.end
|
|
textline ""
|