14272 lines
1.0 MiB
14272 lines
1.0 MiB
; --------------------------------------------------------------------------------
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; @Title: MSP432x On-Chip Peripherals
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; @Props: Released
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; @Author: LOS, ASK
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; @Changelog: 2017-04-07 ASK
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; @Manufacturer: TI - Texas Instruments
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; @Core: Cortex-M4F
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; @Doc: slau356c.pdf (2016-06)
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; slas826d.pdf (2016-06)
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; @Chip: MSP432P401R, MSP432P401M
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: permsp432.per 17736 2024-04-08 09:26:07Z kwisniewski $
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tree.close "Core Registers (Cortex-M4F)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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group.long 0x08++0x03
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line.long 0x00 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes"
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bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes"
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bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes"
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textline " "
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bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes"
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bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes"
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group.long 0x10++0x0B
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
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textline " "
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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line.long 0x08 "SYST_CVR,SysTick Current Value Register"
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rgroup.long 0x1C++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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rgroup.long 0xD00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code"
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bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..."
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bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
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bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0xD04++0x23
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active"
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bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending"
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bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed"
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textline " "
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bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending"
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bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed"
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bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending"
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hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field"
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bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
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textline " "
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
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line.long 0x04 "VTOR,Vector Table Offset Register"
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hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address"
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
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rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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textline " "
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bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear"
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bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset"
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line.long 0x0C "SCR,System Control Register"
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bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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line.long 0x10 "CCR,Configuration Control Register"
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bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
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bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
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bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment"
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bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
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bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
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bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed"
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bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
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line.long 0x14 "SHPR1,SSystem Handler Priority Register 1"
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hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
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hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
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hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
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textline " "
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hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
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line.long 0x18 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
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hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
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hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
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textline " "
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hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
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line.long 0x1C "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
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hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
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hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
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textline " "
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hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
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line.long 0x20 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled"
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bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled"
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bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled"
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textline " "
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bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending"
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bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending"
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bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending"
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bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
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bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
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textline " "
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bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active"
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bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
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bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
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textline " "
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bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
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bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
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group.byte 0xD28++0x1
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line.byte 0x00 "MMFSR,MemManage Status Register"
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bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred"
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bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
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bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
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line.byte 0x01 "BFSR,Bus Fault Status Register"
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bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred"
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bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
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bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
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group.word 0xD2A++0x1
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line.word 0x00 "USAFAULT,Usage Fault Status Register"
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bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
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bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
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bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
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textline " "
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bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
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bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error"
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bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
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group.long 0xD2C++0x07
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line.long 0x00 "HFSR,Hard Fault Status Register"
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bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
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bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred"
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bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
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line.long 0x04 "DFSR,Debug Fault Status Register"
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bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted"
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bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
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bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred"
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textline " "
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bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed"
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bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested"
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group.long 0xD34++0x0B
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line.long 0x00 "MMFAR,MemManage Fault Address Register"
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line.long 0x04 "BFAR,BusFault Address Register"
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line.long 0x08 "AFSR,Auxiliary Fault Status Register"
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group.long 0xD88++0x03
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line.long 0x00 "CPACR,Coprocessor Access Control Register"
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bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access"
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wgroup.long 0xF00++0x03
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line.long 0x00 "STIR,Software Trigger Interrupt Register"
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hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
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width 10.
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tree "Feature Registers"
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rgroup.long 0xD40++0x0B
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line.long 0x00 "ID_PFR0,Processor Feature Register 0"
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bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
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bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
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line.long 0x04 "ID_PFR1,Processor Feature Register 1"
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bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
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line.long 0x08 "ID_DFR0,Debug Feature Register 0"
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bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
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hgroup.long 0xD4C++0x03
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hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
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rgroup.long 0xD50++0x03
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line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
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bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
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textline " "
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bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
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bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
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hgroup.long 0xD54++0x03
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hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
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rgroup.long 0xD58++0x03
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line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
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rgroup.long 0xD60++0x13
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line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
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bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
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bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
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bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
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bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
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bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
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line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
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bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
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bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
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bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
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textline " "
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bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
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line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
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bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
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bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
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bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
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bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
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bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
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textline " "
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bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
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line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
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bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
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bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
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bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
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textline " "
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bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
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bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
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textline " "
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bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
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line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif CORENAME()=="CORTEXM4F"
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x07
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..."
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
textline ""
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region"
|
|
hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported"
|
|
textline " "
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count Register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
line.long 0x04 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x30)++0x07
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
line.long 0x04 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x40)++0x07
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
line.long 0x04 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x50)++0x07
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
line.long 0x04 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
config 16. 8.
|
|
tree "RSTCTL (Reset Controller)"
|
|
base ad:0xE0042000
|
|
width 25.
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "RSTCTL_RESET_REQ,Reset Request Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RSTKEY ,Reset key"
|
|
bitfld.long 0x00 1. " HARD_REQ ,Hard reset request to the reset controller" "No effect,Reset"
|
|
bitfld.long 0x00 0. " SOFT_REQ ,Soft reset request to the reset controller" "No effect,Reset"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "RSTCTL_HARDRESET_STAT,Hard Reset Status Register"
|
|
setclrfld.long 0x00 15. 0x08 15. 0x04 15. " SRC15 ,Source of the hard reset 15 (PCM)" "No reset,Reset"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " SRC14 ,Source of the hard reset 14 (CS)" "No reset,Reset"
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " SRC3 ,Source of the hard reset 3 (FLCTL)" "No reset,Reset"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " SRC2 ,Source of the hard reset 2 (WDT_A Password Violation)" "No reset,Reset"
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC1 ,Source of the hard reset 1 (WDT_A Time-out)" "No reset,Reset"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " SRC0 ,Source of the hard reset 0 (SYSRESETREQ)" "No reset,Reset"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "RSTCTL_SOFTRESET_STAT,Soft Reset Status Register"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " SRC2 ,Source of the soft reset 2 (WDT_A Password Violation)" "No reset,Reset"
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SRC1 ,Source of the soft reset 1 (WDT_A Time-out)" "No reset,Reset"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " SRC0 ,Source of the soft reset 0 (CPU LOCKUP Condition)" "No reset,Reset"
|
|
rgroup.long 0x100++0x03
|
|
line.long 0x00 "RSTCTL_PSSRESET_STAT,PSS Reset Status Register"
|
|
bitfld.long 0x00 3. " VCCDET ,POR caused by a VCCDET trip condition in the PSS" "No reset,Reset"
|
|
bitfld.long 0x00 2. " BGREF ,POR caused by a band gap reference not okay condition in the PSS" "No reset,Reset"
|
|
bitfld.long 0x00 1. " SVSH ,POR caused by an SVSH trip condition in the PSS" "No reset,Reset"
|
|
wgroup.long 0x104++0x03
|
|
line.long 0x00 "RSTCTL_PSSRESET_CLR,PSS Reset Status Clear Register"
|
|
bitfld.long 0x00 0. " CLR ,PSS reset flags" "No effect,Clear"
|
|
rgroup.long 0x108++0x03
|
|
line.long 0x00 "RSTCTL_PCMRESET_STAT,PCM Reset Status Register"
|
|
bitfld.long 0x00 1. " LPM45 ,POR caused by PCM due to an exit from LPM4.5" "No reset,Reset"
|
|
bitfld.long 0x00 0. " LPM35 ,POR caused by PCM due to an exit from LPM3.5" "No reset,Reset"
|
|
wgroup.long 0x10C++0x03
|
|
line.long 0x00 "RSTCTL_PCMRESET_CLR,PCM Reset Status Clear Register"
|
|
bitfld.long 0x00 0. " CLR ,PCM reset flags" "No effect,Clear"
|
|
rgroup.long 0x110++0x03
|
|
line.long 0x00 "RSTCTL_PINRESET_STAT,Pin Reset Status Register"
|
|
bitfld.long 0x00 0. " RSTNMI ,POR caused by RSTn/NMI pin based reset event in the device" "No reset,Reset"
|
|
wgroup.long 0x114++0x03
|
|
line.long 0x00 "RSTCTL_PINRESET_CLR,Pin Reset Status Clear Register"
|
|
bitfld.long 0x00 0. " CLR ,Pin reset flag" "No effect,Clear"
|
|
rgroup.long 0x118++0x03
|
|
line.long 0x00 "RSTCTL_REBOOTRESET_STAT,Reboot Reset Status Register"
|
|
bitfld.long 0x00 0. " REBOOT ,Reboot reset caused by the SYSCTL module" "No reset,Reset"
|
|
wgroup.long 0x11C++0x03
|
|
line.long 0x00 "RSTCTL_REBOOTRESET_CLR,Reboot Reset Status Clear Register"
|
|
bitfld.long 0x00 0. " CLR ,Reboot reset flag" "No effect,Clear"
|
|
rgroup.long 0x120++0x03
|
|
line.long 0x00 "RSTCTL_CSRESET_STAT,CS Reset Status Register"
|
|
bitfld.long 0x00 0. " DCOR_SHT ,POR caused by DCO short circuit fault in the external resistor mode" "No reset,Reset"
|
|
wgroup.long 0x124++0x03
|
|
line.long 0x00 "RRSTCTL_CSRESET_CLR,CS Reset Status Clear Register"
|
|
bitfld.long 0x00 0. " CLR ,DCOR_SHT flag" "No effect,Clear"
|
|
width 0x0B
|
|
tree.end
|
|
tree "SYSTCTL (System Controller)"
|
|
base ad:0xE0043000
|
|
width 20.
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "SYS_REBOOT_CTL,Reboot Control Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " WKEY ,Key to enable writes to bit 0"
|
|
bitfld.long 0x00 0. " REBOOT ,Reboot of the device" "No effect,Reboot"
|
|
group.long 0x04++0x0B
|
|
line.long 0x00 "SYS_NMI_CTLSTAT,NMI Control And Status Register"
|
|
bitfld.long 0x00 19. " PIN_FLG ,RSTn/NMI as a source of NMI flag" "No,Yes"
|
|
rbitfld.long 0x00 18. " PCM_FLG ,PCM interrupt as a source of NMI flag" "No,Yes"
|
|
rbitfld.long 0x00 17. " PSS_FLG ,PSS interrupt as a source of NMI flag" "No,Yes"
|
|
rbitfld.long 0x00 16. " CS_FLG ,CS interrupt as a source of NMI flag" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PIN_SRC ,RSTn/NMI as a source of POR/NMI" "POR class reset,NMI"
|
|
bitfld.long 0x00 2. " PCM_SRC ,PCM interrupt as a source of NMI" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PSS_SRC ,PSS interrupt as a source of NMI" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CS_SRC ,CS interrupt as a source of NMI" "Disabled,Enabled"
|
|
line.long 0x04 "SYS_WDTRESET_CTL,Watchdog Reset Control Register"
|
|
bitfld.long 0x04 1. " VIOLATION ,WDT password violation event generated" "Soft reset,Hard reset"
|
|
bitfld.long 0x04 0. " TIMEOUT ,WDT timeout event generated" "Soft reset,Hard reset"
|
|
line.long 0x08 "SYS_PERIHALT_CTL,Peripheral Halt Control Register"
|
|
bitfld.long 0x08 15. " HALT_DMA ,Peripheral operation when CPU is halted" "Unaffected,Frozen"
|
|
bitfld.long 0x08 14. " HALT_WDT ,Peripheral operation when CPU is halted" "Unaffected,Frozen"
|
|
bitfld.long 0x08 13. " HALT_ADC ,Peripheral operation when CPU is halted" "Unaffected,Frozen"
|
|
bitfld.long 0x08 12. " HALT_EUB3 ,Peripheral operation when CPU is halted" "Unaffected,Frozen"
|
|
textline " "
|
|
bitfld.long 0x08 11. " HALT_EUB2 ,Peripheral operation when CPU is halted" "Unaffected,Frozen"
|
|
bitfld.long 0x08 10. " HALT_EUB1 ,Peripheral operation when CPU is halted" "Unaffected,Frozen"
|
|
bitfld.long 0x08 9. " HALT_EUB0 ,Peripheral operation when CPU is halted" "Unaffected,Frozen"
|
|
bitfld.long 0x08 8. " HALT_EUA3 ,Peripheral operation when CPU is halted" "Unaffected,Frozen"
|
|
textline " "
|
|
bitfld.long 0x08 7. " HALT_EUA2 ,Peripheral operation when CPU is halted" "Unaffected,Frozen"
|
|
bitfld.long 0x08 6. " HALT_EUA1 ,Peripheral operation when CPU is halted" "Unaffected,Frozen"
|
|
bitfld.long 0x08 5. " HALT_EUA0 ,Peripheral operation when CPU is halted" "Unaffected,Frozen"
|
|
bitfld.long 0x08 4. " HALT_T32_0 ,Peripheral operation when CPU is halted" "Unaffected,Frozen"
|
|
textline " "
|
|
bitfld.long 0x08 3. " HALT_T16_3 ,Peripheral operation when CPU is halted" "Unaffected,Frozen"
|
|
bitfld.long 0x08 2. " HALT_T16_2 ,Peripheral operation when CPU is halted" "Unaffected,Frozen"
|
|
bitfld.long 0x08 1. " HALT_T16_1 ,Peripheral operation when CPU is halted" "Unaffected,Frozen"
|
|
bitfld.long 0x08 0. " HALT_T16_0 ,Peripheral operation when CPU is halted" "Unaffected,Frozen"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "SYS_SRAM_SIZE,SRAM Size Register"
|
|
if (((per.l(ad:0xE0043000+0x14))&0x10000)==0x10000)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SYS_SRAM_BANKEN,SRAM Bank Enable Register"
|
|
rbitfld.long 0x00 16. " SRAM_RDY ,SRAM ready for accesses" "Not ready,Ready"
|
|
bitfld.long 0x00 7. " BNK7_EN ,Bank7 of the SRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BNK6_EN ,Bank6 of the SRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " BNK5_EN ,Bank5 of the SRAM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BNK4_EN ,Bank4 of the SRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " BNK3_EN ,Bank3 of the SRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " BNK2_EN ,Bank2 of the SRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " BNK1_EN ,Bank1 of the SRAM enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " BNK0_EN ,Bank0 of the SRAM enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SYS_SRAM_BANKEN,SRAM Bank Enable Register"
|
|
bitfld.long 0x00 16. " SRAM_RDY ,SRAM ready for accesses" "Not ready,Ready"
|
|
bitfld.long 0x00 7. " BNK7_EN ,Bank7 of the SRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BNK6_EN ,Bank6 of the SRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " BNK5_EN ,Bank5 of the SRAM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BNK4_EN ,Bank4 of the SRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " BNK3_EN ,Bank3 of the SRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " BNK2_EN ,Bank2 of the SRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " BNK1_EN ,Bank1 of the SRAM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BNK0_EN ,Bank0 of the SRAM enable" "Disabled,Enabled"
|
|
endif
|
|
if (((per.l(ad:0xE0043000+0x18))&0x10000)==0x10000)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "SYS_SRAM_BANKRET,SRAM Bank Retention Control Register"
|
|
rbitfld.long 0x00 16. " SRAM_RDY ,SRAM ready for accesses" "Not ready,Ready"
|
|
bitfld.long 0x00 7. " BNK7_RET ,Bank7 of the SRAM retained in LPM3 and LPM4" "Not retained,Retained"
|
|
bitfld.long 0x00 6. " BNK6_RET ,Bank6 of the SRAM retained in LPM3 and LPM4" "Not retained,Retained"
|
|
bitfld.long 0x00 5. " BNK5_RET ,Bank5 of the SRAM retained in LPM3 and LPM4" "Not retained,Retained"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BNK4_RET ,Bank4 of the SRAM retained in LPM3 and LPM4" "Not retained,Retained"
|
|
bitfld.long 0x00 3. " BNK3_RET ,Bank3 of the SRAM retained in LPM3 and LPM4" "Not retained,Retained"
|
|
bitfld.long 0x00 2. " BNK2_RET ,Bank2 of the SRAM retained in LPM3 and LPM4" "Not retained,Retained"
|
|
bitfld.long 0x00 1. " BNK1_RET ,Bank1 of the SRAM retained in LPM3 and LPM4" "Not retained,Retained"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " BNK0_RET ,Bank0 of the SRAM retained in LPM3 and LPM4" "Not retained,Retained"
|
|
else
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "SYS_SRAM_BANKRET,SRAM Bank Retention Control Register"
|
|
bitfld.long 0x00 16. " SRAM_RDY ,SRAM ready for accesses" "Not ready,Ready"
|
|
bitfld.long 0x00 7. " BNK7_RET ,Bank7 of the SRAM retained in LPM3 and LPM4" "Not retained,Retained"
|
|
bitfld.long 0x00 6. " BNK6_RET ,Bank6 of the SRAM retained in LPM3 and LPM4" "Not retained,Retained"
|
|
bitfld.long 0x00 5. " BNK5_RET ,Bank5 of the SRAM retained in LPM3 and LPM4" "Not retained,Retained"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BNK4_RET ,Bank4 of the SRAM retained in LPM3 and LPM4" "Not retained,Retained"
|
|
bitfld.long 0x00 3. " BNK3_RET ,Bank3 of the SRAM retained in LPM3 and LPM4" "Not retained,Retained"
|
|
bitfld.long 0x00 2. " BNK2_RET ,Bank2 of the SRAM retained in LPM3 and LPM4" "Not retained,Retained"
|
|
bitfld.long 0x00 1. " BNK1_RET ,Bank1 of the SRAM retained in LPM3 and LPM4" "Not retained,Retained"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BNK0_RET ,Bank0 of the SRAM retained in LPM3 and LPM4" "Not retained,Retained"
|
|
endif
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "SYS_FLASH_SIZE,Flash Size Register"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SYS_DIO_GLTFLT_CTL,Digital I/O Glitch Filter Control Register"
|
|
bitfld.long 0x00 0. " GLTCH_EN ,Glitch filter on the digital I/Os enable" "Disabled,Enabled"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "SYS_SECDATA_UNLOCK,IP Protected Secure Zone Data Access Unlock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " UNLKEY ,Unlock Key"
|
|
group.long 0x1000++0x03
|
|
line.long 0x00 "SYS_MASTER_UNLOCK,Master Unlock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " UNLKEY ,Unlock Key"
|
|
if (((per.l(ad:0xE0043000+0x1000))&0xFFFF)==0xA596)
|
|
group.long 0x1004++0x0B
|
|
line.long 0x00 "SYS_BOOTOVER_REQ0,Boot Override Request 0 Register"
|
|
line.long 0x04 "SYS_BOOTOVER_REQ1,Boot Override Request 1 Register"
|
|
line.long 0x08 "SYS_BOOTOVER_ACK,Boot Override Acknowledge Register"
|
|
wgroup.long 0x1010++0x03
|
|
line.long 0x00 "SYS_RESET_REQ,Reset Request Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " WKEY ,Key to validate/enable write to bits 1-0"
|
|
bitfld.long 0x00 1. " REBOOT ,Reboot reset pulse to the device reset controller" "No effect,Reboot"
|
|
bitfld.long 0x00 0. " POR ,POR pulse to the device reset controller" "No effect,POR"
|
|
group.long 0x1014++0x03
|
|
line.long 0x00 "SYS_RESET_STATOVER,Reset Status And Override Register"
|
|
bitfld.long 0x00 10. " RBT_OVER ,Override request for the reboot reset output of the reset controller" "No override,Override"
|
|
bitfld.long 0x00 9. " HARD_OVER ,Override request for the HARD reset output of the reset controller" "No override,Override"
|
|
bitfld.long 0x00 8. " SOFT_OVER ,Override request for the SOFT reset output of the reset controller" "No override,Override"
|
|
rbitfld.long 0x00 2. " REBOOT ,Reboot reset" "No reset,Reset"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " HARD ,HARD reset" "No reset,Reset"
|
|
rbitfld.long 0x00 0. " SOFT ,SOFT reset" "No reset,Reset"
|
|
rgroup.long 0x1020++0x03
|
|
line.long 0x00 "SYS_SYSTEM_STAT,System Status Register"
|
|
bitfld.long 0x00 5. " IP_PROT_ACT ,IP protection" "Not active,Active"
|
|
bitfld.long 0x00 4. " JTAG_SWD_LOCK_ACT ,JTAG and SWD lock" "Not active,Active"
|
|
bitfld.long 0x00 3. " DBG_SEC_ACT ,Debug security" "Not active,Active"
|
|
else
|
|
hgroup.long 0x1004++0x03
|
|
hide.long 0x00 "SYS_BOOTOVER_REQ0,Boot Override Request 0 Register"
|
|
hgroup.long 0x1008++0x03
|
|
hide.long 0x00 "SYS_BOOTOVER_REQ1,Boot Override Request 1 Register"
|
|
hgroup.long 0x100C++0x03
|
|
hide.long 0x00 "SYS_BOOTOVER_ACK,Boot Override Acknowledge Register"
|
|
hgroup.long 0x1010++0x03
|
|
hide.long 0x00 "SYS_RESET_REQ,Reset Request Register"
|
|
hgroup.long 0x1014++0x03
|
|
hide.long 0x00 "SYS_RESET_STATOVER,Reset Status And Override Register"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "CS (Clock System)"
|
|
base ad:0x40010400
|
|
width 13.
|
|
group.long 0x00++0x13
|
|
line.long 0x00 "CSKEY,Clock System Key Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CSKEY ,Clock System Key"
|
|
line.long 0x04 "CSCTL0,Clock System Control 0 Register"
|
|
bitfld.long 0x04 23. " DCOEN ,DCO oscillator enable. For 0b if MCLK/HSMCLK/SMCLK is used as a source then DCO is on" "Disabled/Enabled,Enabled"
|
|
bitfld.long 0x04 22. " DCORES ,DCO external resistor mode" "Internal,External"
|
|
bitfld.long 0x04 16.--18. " DCORSEL ,DCO frequency range select(Nominal DCO Frequency)" "1-2(1.5MHz),2-4(3MHz),4-8(6MHz),8-16(12MHz),16-32(24MHz),32-64(48MHz),?..."
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--9. 1. " DCOTUNE ,DCO frequency tuning select"
|
|
line.long 0x08 "CSCTL1,Clock System Control 1 Register"
|
|
bitfld.long 0x08 28.--30. " DIVS ,SMCLK source divider" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.long 0x08 24.--26. " DIVA ,ACLK source divider" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.long 0x08 20.--22. " DIVHS ,HSMCLK source divider" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.long 0x08 16.--18. " DIVM ,MCLK source divider" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.long 0x08 12. " SELB ,Selects the BCLK source" "LFXTCLK,REFOCLK"
|
|
bitfld.long 0x08 8.--10. " SELA ,Selects the ACLK source" "LFXTCLK,VLOCLK,REFOCLK,?..."
|
|
textline " "
|
|
bitfld.long 0x08 4.--6. " SELS ,Selects the SMCLK and HSMCLK source" "LFXTCLK,VLOCLK,REFOCLK,DCOCLK,MODOSC,HFXTCLK,?..."
|
|
bitfld.long 0x08 0.--2. " SELS ,Selects the MCLK source" "LFXTCLK,VLOCLK,REFOCLK,DCOCLK,MODOSC,HFXTCLK,?..."
|
|
line.long 0x0C "CSCTL2,Clock System Control 2 Register"
|
|
bitfld.long 0x0C 25. " HFXTBYPASS ,HFXT bypass select" "Crystal,Square wave"
|
|
bitfld.long 0x0C 24. " HFXT_EN ,Turns on the HFXT oscillator regardless if used as a clock resource" "0,1"
|
|
bitfld.long 0x0C 20.--22. " HFXTFREQ ,HFXT frequency selection (MHz)" "1-4,>4-8,>8-16,>16-24,>24-32,>32-40,>40-48,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 16. " HFXTDRIVE ,HFXT oscillator drive selection" "Not available,Available"
|
|
bitfld.long 0x0C 9. " LFXTBYPASS ,LFXT bypass select" "Crystal,Square wave"
|
|
bitfld.long 0x0C 8. " LFXT_EN ,Turns on the LFXT oscillator regardless if used as a clock resource" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0C 0.--1. " LFXTDRIVE ,LFXT oscillator current can be adjusted to its drive needs" "Lowest,Increased,Increased,Maximum"
|
|
line.long 0x10 "CSCTL3,Clock System Control 3 Register"
|
|
bitfld.long 0x10 7. " FCNTHF_EN ,Enable start fault counter for HFXT" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " RFCNTHF ,Reset start fault counter for HFXT" "No effect,Reset"
|
|
bitfld.long 0x10 4.--5. " FCNTHF ,Start flag counter for LFXT and selects number of HFXT cycles" "2048 cycles,4096 cycles,8192 cycles,16384 cycles"
|
|
textline " "
|
|
bitfld.long 0x10 3. " FCNTLF_EN ,Enable start fault counter for LFXT" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " RFCNTHF ,Reset start fault counter for HFXT" "No effect,Reset"
|
|
bitfld.long 0x10 0.--1. " FCNTHF ,Start flag counter for LFXT and selects number of LFXT cycles" "4096 cycles,8192 cycles,16384 cycles,32768 cycles"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CSCLKEN,Clock System Clock Enable Register"
|
|
bitfld.long 0x00 15. " REFOFSEL ,Selects REFO nominal frequency" "32.768 kHz,128 kHz"
|
|
bitfld.long 0x00 10. " MODOSC_EN ,For 0b if ACLK/MCLK/HSMCLK/SMCLK is used as a source then MODOSC is on" "Disabled/Enabled,Enabled"
|
|
bitfld.long 0x00 9. " REFO_EN ,For 0b if ACLK/MCLK/HSMCLK/SMCLK is used as a source then REFO is on" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " VLO_EN ,For 0b if ACLK/MCLK/HSMCLK/SMCLK is used as a source then VLO is on" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SMCLK_EN ,SMCLK system clock conditional request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HSMCLK_EN ,HSMCLK system clock conditional request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MCLK_EN ,MCLK system clock conditional request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ACLK_EN ,ACLK system clock conditional request enable" "Disabled,Enabled"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "CSSTAT,Clock System Status Register"
|
|
bitfld.long 0x00 28. " BCLK_READY ,BCLK Ready status" "Not ready,Ready"
|
|
bitfld.long 0x00 27. " SMCLK_READY ,SMCLK Ready status" "Not ready,Ready"
|
|
bitfld.long 0x00 26. " HSMCLK_READY ,HSMCLK Ready status" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 25. " MCLK_READY ,MCLK Ready status" "Not ready,Ready"
|
|
bitfld.long 0x00 24. " ACLK_READY ,ACLK Ready status" "Not ready,Ready"
|
|
bitfld.long 0x00 23. " REFOCLK_ON ,REFOCLK system clock status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " LFXTCLK_ON ,LFXTCLK system clock status" "Inactive,Active"
|
|
bitfld.long 0x00 21. " VLOCLK_ON ,VLOCLK system clock status" "Inactive,Active"
|
|
bitfld.long 0x00 20. " MODCLK_ON ,MODCLK system clock status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SMCLK_ON ,SMCLK system clock status" "Inactive,Active"
|
|
bitfld.long 0x00 18. " HSMCLK_ON ,HSMCLK system clock status" "Inactive,Active"
|
|
bitfld.long 0x00 17. " MCLK_ON ,MCLK system clock status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ACLK_ON ,ACLK system clock status" "Inactive,Active"
|
|
bitfld.long 0x00 7. " REFO_ON ,REFO status" "Inactive,Active"
|
|
bitfld.long 0x00 6. " LFXT_ON ,LFXT status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " VLO_ON ,VLO status" "Inactive,Active"
|
|
bitfld.long 0x00 4. " MODOSC_ON ,MODOSC status" "Inactive,Active"
|
|
bitfld.long 0x00 2. " HFXT_ON ,HFXT status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DCOBIAS_ON ,DCO bias status" "Inactive,Active"
|
|
bitfld.long 0x00 0. " DCO_ON ,DCO status" "Inactive,Active"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CSIE,Clock System Interrupt Enable Register"
|
|
bitfld.long 0x00 9. " FCNTHFIE ,Start fault counter interrupt enable HFXT" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " FCNTLFIE ,Start fault counter interrupt enable LFXT" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " DCOR_OPNIE ,DCO external resistor open circuit fault flag interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " HFXTIE ,HFXT oscillator fault flag interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " LFXTIE ,LFXT oscillator fault flag interrupt enable" "Disabled,Enabled"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CSIFG,Clock System Interrupt Flag Register"
|
|
setclrfld.long 0x00 9. 0x10 9. 0x02 9. " FCNTHFIFG ,Start fault counter interrupt flag HFXT" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x10 8. 0x02 8. " FCNTLFIFG ,Start fault counter interrupt flag LFXT" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x10 6. 0x02 6. " DCOR_OPNIFG ,DCO external resistor open circuit fault flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x10 5. 0x02 5. " DCOR_SHTIFG ,DCO external resistor short circuit fault flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. 0x10 1. 0x02 1. " HFXTIFG ,HFXT oscillator fault flag" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x10 0. 0x02 0. " LFXTIFG ,LFXT oscillator fault flag" "No interrupt,Interrupt"
|
|
group.long 0x60++0x07
|
|
line.long 0x00 "CSDCOERCAL0,DCO External Resistor Calibration 0 Register"
|
|
hexmask.long.word 0x00 16.--25. 1. " DCO_FCAL_RSEL04 ,DCO frequency calibration for DCO frequency range (DCORSEL) 0 to 4"
|
|
bitfld.long 0x00 0.--1. " DCO_TCCAL ,DCO Temperature compensation calibration" "0,1,2,3"
|
|
line.long 0x04 "CSDCOERCAL1,DCO External Resistor Calibration 1 Register"
|
|
hexmask.long.word 0x04 0.--9. 1. " DCO_FCAL_RSEL5 ,DCO frequency calibration for DCO frequency range (DCORSEL) 5"
|
|
width 0x0B
|
|
tree.end
|
|
tree "PSS (Power Supply System)"
|
|
base ad:0x40010800
|
|
width 9.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "PSSKEY,PSS Key Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PSSKEY ,PSS key"
|
|
line.long 0x04 "PSSCTL0,PSS Control 0 Register"
|
|
bitfld.long 0x04 10. " DCDC_FORCE ,Force DC-DC regulator operation" "Not forced,Forced"
|
|
bitfld.long 0x04 7. " SVMHOUTPOLAL ,SVMHOUT pin polarity active low" "High,Low"
|
|
bitfld.long 0x04 6. " SVMHOE ,SVSM high-side output enable" "Not output,Output"
|
|
bitfld.long 0x04 3.--5. " SVSMHTH ,SVSM high-side reset voltage level" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x04 2. " SVSMHS ,Supply supervisor or monitor selection for the high-side" "SVSH,SVMH"
|
|
bitfld.long 0x04 1. " SVSMHLP ,SVSM high-side low power normal performance mode" "Full,Low"
|
|
bitfld.long 0x04 0. " SVSMHOFF ,SVSM high-side off" "On,Off"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "PSSIE,PSS Interrupt Enable Register"
|
|
bitfld.long 0x00 1. " SVSMHIE ,High-side SVSM interrupt enable, when set as a monitor (SVSMHS = 1)" "Disabled,Enabled"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "PSSIFG,PSS Interrupt Flag Register"
|
|
bitfld.long 0x00 1. " SVSMHIFG ,High-side SVSM interrupt flag" "No interrupt,Interrupt"
|
|
wgroup.long 0x3C++0x03
|
|
line.long 0x00 "PSSCLRIFG,PSS Clear Interrupt Flag Register"
|
|
bitfld.long 0x00 1. " CLRSVSMHIFG ,SVSMH clear interrupt flag" "No effect,Clear"
|
|
width 0x0B
|
|
tree.end
|
|
tree "PCM (Power Control Manager)"
|
|
base ad:0x40010000
|
|
width 11.
|
|
if (((per.l(ad:0x40010000+0x04))&0x100)==0x100)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PCMCTL0,PCM Control 0 Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " PCMKEY ,PCM key"
|
|
bitfld.long 0x00 8.--13. " CPM ,Current Power Mode" "AM_LDO_VCORE0,AM_LDO_VCORE1,,,AM_DCDC_VCORE0,AM_DCDC_VCORE1,,,AM_LF_VCORE0,AM_LF_VCORE1,,LPM0_LDO_VCORE0,LPM0_LDO_VCORE1,,,LPM0_DCDC_VCORE0,LPM0_DCDC_VCORE1,,,LPM0_LF_VCORE0,LPM0_LF_VCORE1,?..."
|
|
rbitfld.long 0x00 4.--7. " LPMR ,Low Power Mode Request" "LPM3,,,,,,,,,,LPM3.5,,LPM4.5,?..."
|
|
rbitfld.long 0x00 0.--3. " AMR ,Active Mode Request" "AM_LDO_VCORE0,AM_LDO_VCORE0,,,AM_DCDC_VCORE0,AM_DCDC_VCORE1,,,AM_LF_VCORE0,AM_LF_VCORE1,?..."
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PCMCTL0,PCM Control 0 Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " PCMKEY ,PCM key"
|
|
bitfld.long 0x00 8.--13. " CPM ,Current Power Mode" "AM_LDO_VCORE0,AM_LDO_VCORE1,,,AM_DCDC_VCORE0,AM_DCDC_VCORE1,,,AM_LF_VCORE0,AM_LF_VCORE1,,LPM0_LDO_VCORE0,LPM0_LDO_VCORE1,,,LPM0_DCDC_VCORE0,LPM0_DCDC_VCORE1,,,LPM0_LF_VCORE0,LPM0_LF_VCORE1,?..."
|
|
bitfld.long 0x00 4.--7. " LPMR ,Low Power Mode Request" "LPM3,,,,,,,,,,LPM3.5,,LPM4.5,?..."
|
|
bitfld.long 0x00 0.--3. " AMR ,Active Mode Request" "AM_LDO_VCORE0,AM_LDO_VCORE0,,,AM_DCDC_VCORE0,AM_DCDC_VCORE1,,,AM_LF_VCORE0,AM_LF_VCORE1,?..."
|
|
endif
|
|
group.long 0x04++0x07
|
|
line.long 0x00 "PCMCTL1,PCM Control 1 Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " PCMKEY ,PCM key"
|
|
rbitfld.long 0x00 8. " PMR_BUSY ,Power mode request busy flag" "Idle,Busy"
|
|
bitfld.long 0x00 2. " FORCE_LPM_ENTRY ,Bit selection for the application to determine whether the entry into LPM3/LPMx.5" "Aborted,Not aborted"
|
|
bitfld.long 0x00 1. " LOCKBKUP ,Lock Backup" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LOCKLPM5 ,Lock LPM5" "Not locked,Locked"
|
|
line.long 0x04 "PCMIE,PCM Interrupt Enable Register"
|
|
bitfld.long 0x04 6. " DCDC_ERROR_IE ,DC-DC error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " AM_INVALID_TR_IE ,Active mode invalid transition interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " LPM_INVALID_CLK_IE ,LPM invalid clock interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " LPM_INVALID_TR_IE ,LPM invalid transition interrupt enable" "Disabled,Enabled"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "PCMIFG,PCM Interrupt Flag Register"
|
|
bitfld.long 0x00 6. " DCDC_ERROR_IFG ,DC-DC error flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " AM_INVALID_TR_IFG ,Active mode invalid transition flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " LPM_INVALID_CLK_IFG ,LPM invalid clock flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " LPM_INVALID_TR_IFG ,LPM invalid transition flag" "No interrupt,Interrupt"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "PCMCLRIFG,PCM Clear Interrupt Flag Register"
|
|
bitfld.long 0x00 6. " DCDC_ERROR_IFG ,Clear DC-DC error flag" "No effect,Clear"
|
|
bitfld.long 0x00 2. " AM_INVALID_TR_IFG ,Clear active mode invalid transition flag" "No effect,Clear"
|
|
bitfld.long 0x00 1. " LPM_INVALID_CLK_IFG ,Clear LPM invalid clock flag" "No effect,Clear"
|
|
bitfld.long 0x00 0. " LPM_INVALID_TR_IFG ,Clear LPM invalid transition flag" "No effect,Clear"
|
|
width 0x0B
|
|
tree.end
|
|
tree "FLCTL (Flash Controller)"
|
|
base ad:0x40011000
|
|
width 25.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "FLCTL_POWER_STAT,Flash Power Status Register"
|
|
bitfld.long 0x00 7. " RD_2T ,Flash is being accessed in 2T mode" "1T mode,2T mode"
|
|
bitfld.long 0x00 6. " TRIMSTAT ,PSS trim done status" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " IREFSTAT ,PSS IREF stable status" "Not stable,Stable"
|
|
bitfld.long 0x00 4. " VREFSTAT ,PSS VREF stable status" "Not stable,Stable"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LDOSTAT ,PSS FLDO GOOD status" "Not GOOD,GOOD"
|
|
bitfld.long 0x00 0.--2. " PSTAT ,Flash power status" "Power-down,Power-up,Check in progress,Check in progress,Active,Active in Low-Frequency,Standby,Current mirror"
|
|
if (((per.l(ad:0x40011000+0x20))&0x30000)==0x00)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "FLCTL_BANK0_RDCTL,Flash Bank0 Read Control Register"
|
|
rbitfld.long 0x00 16.--19. " RD_MODE_STATUS ,Reflects the current read mode of the bank" "Normal read mode,Read margin 0,Read margin 1,Program verify,Erase verify,?..."
|
|
bitfld.long 0x00 12.--15. " WAIT ,Reflects the current read mode of the bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5. " BUFD ,Enables read buffering feature for data reads to this bank" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " BUFI ,Enables read buffering feature for instruction fetches to this bank" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " RD_MODE ,Flash read mode control setting for bank" "Normal read mode,Read margin 0,Read margin 1,Program verify,Erase verify,?..."
|
|
line.long 0x04 "FLCTL_BANK1_RDCTL,Flash Bank1 Read Control Register"
|
|
rbitfld.long 0x04 16.--19. " RD_MODE_STATUS ,Reflects the current read mode of the bank" "Normal read mode,Read margin 0,Read margin 1,Program verify,Erase verify,?..."
|
|
bitfld.long 0x04 12.--15. " WAIT ,Reflects the current read mode of the bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 5. " BUFD ,Enables read buffering feature for data reads to this bank" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " BUFI ,Enables read buffering feature for instruction fetches to this bank" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " RD_MODE ,Flash read mode control setting for bank" "Normal read mode,Read margin 0,Read margin 1,Program verify,Erase verify,?..."
|
|
group.long 0x20++0x0B
|
|
line.long 0x00 "FLCTL_RDBRST_CTLSTAT,Flash Read Burst/Compare Control And Status Register"
|
|
bitfld.long 0x00 23. " CLR_STAT ,Clear status bits" "No effect,Clear"
|
|
rbitfld.long 0x00 19. " ADDR_ERR ,Burst/Compare operation was terminated due to access to reserved memory" "No error,Error"
|
|
rbitfld.long 0x00 18. " CMP_ERR ,Burst/Compare operation encountered at least one data comparison error" "No error,Error"
|
|
rbitfld.long 0x00 16.--17. " BRST_STAT ,Status of Burst/Compare operation" "Idle,Burst/Compare pending,Burst/Compare in progress,Burst completed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DATA_CMP ,Data pattern used for comparison against memory read data" "0s,Fs"
|
|
bitfld.long 0x00 3. " STOP_FAIL ,Burst/Compare operation terminate on first compare mismatch" "Not stopped,Stopped"
|
|
bitfld.long 0x00 1.--2. " MEM_TYPE ,Type of memory that burst is carried out on" "Main memory,Information memory,?..."
|
|
bitfld.long 0x00 0. " START ,Triggers start of Burst/Compare operation" "Not started,Started"
|
|
line.long 0x04 "FLCTL_RDBRST_STARTADDR,Flash Read Burst/Compare Start Address Register"
|
|
hexmask.long.tbyte 0x04 0.--20. 0x1 " START_ADDRESS ,Start address of burst operation"
|
|
line.long 0x08 "FLCTL_RDBRST_LEN,Flash Read Burst/Compare Length Register"
|
|
hexmask.long.tbyte 0x08 0.--20. 1. " BURST_LENGTH ,Length of burst operation"
|
|
group.long 0x3C++0x07
|
|
line.long 0x00 "FLCTL_RDBRST_FAILADDR,Flash Read Burst/Compare Fail Address Register"
|
|
hexmask.long.tbyte 0x00 0.--20. 0x1 " FAIL_ADDRESS ,Reflects address of last failed compare"
|
|
line.long 0x04 "FLCTL_RDBRST_FAILCNT,Flash Read Burst/Compare Fail Count Register"
|
|
hexmask.long.tbyte 0x04 0.--16. 1. " FAIL_COUNT ,Reflects number of failures encountered in burst operation"
|
|
else
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "FLCTL_BANK0_RDCTL,Flash Bank0 Read Control Register"
|
|
rbitfld.long 0x00 16.--19. " RD_MODE_STATUS ,Reflects the current read mode of the bank" "Normal read mode,Read margin 0,Read margin 1,Program verify,Erase verify,?..."
|
|
rbitfld.long 0x00 12.--15. " WAIT ,Reflects the current read mode of the bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5. " BUFD ,Enables read buffering feature for data reads to this bank" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " BUFI ,Enables read buffering feature for instruction fetches to this bank" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 0.--3. " RD_MODE ,Flash read mode control setting for bank" "Normal read mode,Read margin 0,Read margin 1,Program verify,Erase verify,?..."
|
|
line.long 0x04 "FLCTL_BANK1_RDCTL,Flash Bank1 Read Control Register"
|
|
rbitfld.long 0x04 16.--19. " RD_MODE_STATUS ,Reflects the current read mode of the bank" "Normal read mode,Read margin 0,Read margin 1,Program verify,Erase verify,?..."
|
|
rbitfld.long 0x04 12.--15. " WAIT ,Reflects the current read mode of the bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 5. " BUFD ,Enables read buffering feature for data reads to this bank" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " BUFI ,Enables read buffering feature for instruction fetches to this bank" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 0.--3. " RD_MODE ,Flash read mode control setting for bank" "Normal read mode,Read margin 0,Read margin 1,Program verify,Erase verify,?..."
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FLCTL_RDBRST_CTLSTAT,Flash Read Burst/compare Control And Status Register"
|
|
bitfld.long 0x00 23. " CLR_STAT ,Clear status bits" "No effect,Clear"
|
|
rbitfld.long 0x00 19. " ADDR_ERR ,Burst/Compare operation was terminated due to access to reserved memory" "No error,Error"
|
|
rbitfld.long 0x00 18. " CMP_ERR ,Burst/Compare operation encountered at least one data comparison error" "No error,Error"
|
|
rbitfld.long 0x00 16.--17. " BRST_STAT ,Status of Burst/Compare operation" "Idle,Burst/Compare pending,Burst/Compare in progress,Burst completed"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " DATA_CMP ,Data pattern used for comparison against memory read data" "0s,Fs"
|
|
rbitfld.long 0x00 3. " STOP_FAIL ,Burst/Compare operation terminate on first compare mismatch" "Not stopped,Stopped"
|
|
rbitfld.long 0x00 1.--2. " MEM_TYPE ,Type of memory that burst is carried out on" "Main memory,Information memory,?..."
|
|
rbitfld.long 0x00 0. " START ,Triggers start of Burst/Compare operation" "Not started,Started"
|
|
rgroup.long 0x24++0x07
|
|
line.long 0x00 "FLCTL_RDBRST_STARTADDR,Flash Read Burst/Compare Start Address Register"
|
|
hexmask.long.tbyte 0x00 0.--20. 0x1 " START_ADDRESS ,Start address of burst operation"
|
|
line.long 0x04 "FLCTL_RDBRST_LEN,Flash Read Burst/Compare Length Register"
|
|
hexmask.long.tbyte 0x04 0.--20. 1. " BURST_LENGTH ,Length of burst operation"
|
|
rgroup.long 0x3C++0x07
|
|
line.long 0x00 "FLCTL_RDBRST_FAILADDR,Flash Read Burst/Compare Fail Address Register"
|
|
hexmask.long.tbyte 0x00 0.--20. 0x1 " FAIL_ADDRESS ,Reflects address of last failed compare"
|
|
line.long 0x04 "FLCTL_RDBRST_FAILCNT,Flash Read Burst/Compare Fail Count Register"
|
|
hexmask.long.tbyte 0x04 0.--16. 1. " FAIL_COUNT ,Reflects number of failures encountered in burst operation"
|
|
endif
|
|
if (((per.l(ad:0x40011000+0x50))&0x30000)==0x00)
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "FLCTL_PRG_CTLSTAT,Flash Program Control And Status Register"
|
|
rbitfld.long 0x00 16.--17. " STATUS ,Reflects the status of program operations in the flash memory" "Idle,Triggered,Program in progress,?..."
|
|
bitfld.long 0x00 3. " VER_PST ,Controls automatic post program verify operations" "No post,Post"
|
|
bitfld.long 0x00 2. " VER_PRE ,Controls automatic pre program verify operations" "No pre,Pre"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MODE ,Controls write mode selected by application" "Write immediate,Full word write"
|
|
bitfld.long 0x00 0. " ENABLE ,Master control for all word program operations" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x50++0x03
|
|
line.long 0x00 "FLCTL_PRG_CTLSTAT,Flash Program Control And Status Register"
|
|
bitfld.long 0x00 18. " BNK_ACT ,Reflects which bank is currently undergoing a program operation" "Bank0,Bank1"
|
|
bitfld.long 0x00 16.--17. " STATUS ,Reflects the status of program operations in the flash memory" "Idle,Triggered,Program in progress,?..."
|
|
bitfld.long 0x00 3. " VER_PST ,Controls automatic post program verify operations" "No post,Post"
|
|
bitfld.long 0x00 2. " VER_PRE ,Controls automatic pre program verify operations" "No pre,Pre"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MODE ,Controls write mode selected by application" "Write immediate,Full word write"
|
|
bitfld.long 0x00 0. " ENABLE ,Master control for all word program operations" "Disabled,Enabled"
|
|
endif
|
|
if (((per.l(ad:0x40011000+0x54))&0x70000)==0x00)
|
|
group.long 0x54++0x07
|
|
line.long 0x00 "FLCTL_PRGBRST_CTLSTAT,Flash Program Burst Control And Status Register"
|
|
bitfld.long 0x00 23. " CLR_STAT ,Clear status bits" "No effect,Clear"
|
|
rbitfld.long 0x00 21. " ADDR_ERR ,Burst operation was terminated due to attempted program of reserved memory" "No error,Error"
|
|
rbitfld.long 0x00 20. " PST_ERR ,Burst operation encountered post-program auto-verify errors" "No error,Error"
|
|
rbitfld.long 0x00 19. " PST_ERR ,Burst operation encountered pre-program auto-verify errors" "No error,Error"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " BURST_STATUS ,Reflects the status of a burst operation" "Idle,Pending,Active 1st 128,Active 2nd 128,Active 3rd 128,Active 4th 128,,Burst completed"
|
|
bitfld.long 0x00 7. " AUTO_PST ,Controls the Auto-Verify operation after the burst program" "No program,Automatic burst"
|
|
bitfld.long 0x00 6. " AUTO_PRE ,Controls the Auto-Verify operation before the burst program" "No program,Automatic burst"
|
|
bitfld.long 0x00 3.--5. " LEN ,Length of burst" "No burst,1 word burst of 128 bits,2*128 bits burst write,3*128 bits burst write,4*128 bits burst write,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " TYPE ,Type of memory that burst program is carried out on" "Main,Information,?..."
|
|
bitfld.long 0x00 0. " START ,Write 1 triggers start of burst program operation" "No effect,Start"
|
|
line.long 0x04 "FLCTL_PRGBRST_STARTADDR,Flash Program Burst Start Address Register"
|
|
hexmask.long.tbyte 0x04 0.--21. 0x1 " START_ADDRESS ,Start address of program burst operation"
|
|
group.long 0x60++0x3F
|
|
line.long 0x00 "FLCTL_PRGBRST_DATA0_0,Flash Program Burst Data0 Input Register"
|
|
line.long 0x04 "FLCTL_PRGBRST_DATA0_1,Flash Program Burst Data0 Input Register"
|
|
line.long 0x08 "FLCTL_PRGBRST_DATA0_2,Flash Program Burst Data0 Input Register"
|
|
line.long 0x0C "FLCTL_PRGBRST_DATA0_3,Flash Program Burst Data0 Input Register"
|
|
line.long 0x10 "FLCTL_PRGBRST_DATA1_0,Flash Program Burst Data1 Input Register"
|
|
line.long 0x14 "FLCTL_PRGBRST_DATA1_1,Flash Program Burst Data1 Input Register"
|
|
line.long 0x18 "FLCTL_PRGBRST_DATA1_2,Flash Program Burst Data1 Input Register"
|
|
line.long 0x1C "FLCTL_PRGBRST_DATA1_3,Flash Program Burst Data1 Input Register"
|
|
line.long 0x20 "FLCTL_PRGBRST_DATA2_0,Flash Program Burst Data2 Input Register"
|
|
line.long 0x24 "FLCTL_PRGBRST_DATA2_1,Flash Program Burst Data2 Input Register"
|
|
line.long 0x28 "FLCTL_PRGBRST_DATA2_2,Flash Program Burst Data2 Input Register"
|
|
line.long 0x2C "FLCTL_PRGBRST_DATA2_3,Flash Program Burst Data2 Input Register"
|
|
line.long 0x30 "FLCTL_PRGBRST_DATA3_0,Flash Program Burst Data3 Input Register"
|
|
line.long 0x34 "FLCTL_PRGBRST_DATA3_1,Flash Program Burst Data3 Input Register"
|
|
line.long 0x38 "FLCTL_PRGBRST_DATA3_2,Flash Program Burst Data3 Input Register"
|
|
line.long 0x3C "FLCTL_PRGBRST_DATA3_3,Flash Program Burst Data3 Input Register"
|
|
else
|
|
rgroup.long 0x54++0x07
|
|
line.long 0x00 "FLCTL_PRGBRST_CTLSTAT,Flash Program Burst Control And Status Register"
|
|
bitfld.long 0x00 23. " CLR_STAT ,Clear status bits" "No effect,Clear"
|
|
bitfld.long 0x00 21. " ADDR_ERR ,Burst operation was terminated due to attempted program of reserved memory" "No error,Error"
|
|
bitfld.long 0x00 20. " PST_ERR ,Burst operation encountered post-program auto-verify errors" "No error,Error"
|
|
bitfld.long 0x00 19. " PST_ERR ,Burst operation encountered pre-program auto-verify errors" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " BURST_STATUS ,Reflects the status of a burst operation" "Idle,Pending,Active 1st 128,Active 2nd 128,Active 3rd 128,Active 4th 128,,Burst completed"
|
|
bitfld.long 0x00 7. " AUTO_PST ,Controls the Auto-Verify operation after the burst program" "No program,Automatic burst"
|
|
bitfld.long 0x00 6. " AUTO_PRE ,Controls the Auto-Verify operation before the burst program" "No program,Automatic burst"
|
|
bitfld.long 0x00 3.--5. " LEN ,Length of burst" "No burst,1 word burst of 128 bits,2*128 bits burst write,3*128 bits burst write,4*128 bits burst write,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " TYPE ,Type of memory that burst program is carried out on" "Main,Information,?..."
|
|
bitfld.long 0x00 0. " START ,Write 1 triggers start of burst program operation" "No effect,Start"
|
|
line.long 0x04 "FLCTL_PRGBRST_STARTADDR,Flash Program Burst Start Address Register"
|
|
hexmask.long.tbyte 0x04 0.--21. 0x1 " START_ADDRESS ,Start address of program burst operation"
|
|
rgroup.long 0x60++0x3F
|
|
line.long 0x00 "FLCTL_PRGBRST_DATA0_0,Flash Program Burst Data0 Input Register"
|
|
line.long 0x04 "FLCTL_PRGBRST_DATA0_1,Flash Program Burst Data0 Input Register"
|
|
line.long 0x08 "FLCTL_PRGBRST_DATA0_2,Flash Program Burst Data0 Input Register"
|
|
line.long 0x0C "FLCTL_PRGBRST_DATA0_3,Flash Program Burst Data0 Input Register"
|
|
line.long 0x10 "FLCTL_PRGBRST_DATA1_0,Flash Program Burst Data1 Input Register"
|
|
line.long 0x14 "FLCTL_PRGBRST_DATA1_1,Flash Program Burst Data1 Input Register"
|
|
line.long 0x18 "FLCTL_PRGBRST_DATA1_2,Flash Program Burst Data1 Input Register"
|
|
line.long 0x1C "FLCTL_PRGBRST_DATA1_3,Flash Program Burst Data1 Input Register"
|
|
line.long 0x20 "FLCTL_PRGBRST_DATA2_0,Flash Program Burst Data2 Input Register"
|
|
line.long 0x24 "FLCTL_PRGBRST_DATA2_1,Flash Program Burst Data2 Input Register"
|
|
line.long 0x28 "FLCTL_PRGBRST_DATA2_2,Flash Program Burst Data2 Input Register"
|
|
line.long 0x2C "FLCTL_PRGBRST_DATA2_3,Flash Program Burst Data2 Input Register"
|
|
line.long 0x30 "FLCTL_PRGBRST_DATA3_0,Flash Program Burst Data3 Input Register"
|
|
line.long 0x34 "FLCTL_PRGBRST_DATA3_1,Flash Program Burst Data3 Input Register"
|
|
line.long 0x38 "FLCTL_PRGBRST_DATA3_2,Flash Program Burst Data3 Input Register"
|
|
line.long 0x3C "FLCTL_PRGBRST_DATA3_3,Flash Program Burst Data3 Input Register"
|
|
endif
|
|
if (((per.l(ad:0x40011000+0xA0))&0x30000)==0x00)
|
|
group.long 0xA0++0x07
|
|
line.long 0x00 "FLCTL_ERASE_CTLSTAT,Flash Erase Control And Status Register"
|
|
bitfld.long 0x00 19. " CLR_STAT ,Clear status bits" "No effect,Clear"
|
|
rbitfld.long 0x00 18. " ADDR_ERR ,Burst/compare operation was terminated due to access to reserved memory" "No error,Error"
|
|
rbitfld.long 0x00 16.--17. " STATUS ,Reflects the status of erase operations in the flash memory" "Idle,Erase pending,Erase in progress,Erase completed"
|
|
bitfld.long 0x00 2.--3. " TYPE ,Type of memory that burst is carried out on" "Main,Information,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1. " MODE ,Controls write mode selected by application" "Sector erase,Mass erase"
|
|
bitfld.long 0x00 0. " START ,Triggers start of erase operation" "No effect,Start"
|
|
line.long 0x04 "FLCTL_ERASE_SECTADDR,Flash Erase Sector Address Register"
|
|
hexmask.long.tbyte 0x04 0.--21. 0x1 " SECT_ADDRESS ,Address of sector being erased"
|
|
else
|
|
rgroup.long 0xA0++0x07
|
|
line.long 0x00 "FLCTL_ERASE_CTLSTAT,Flash Erase Control And Status Register"
|
|
bitfld.long 0x00 19. " CLR_STAT ,Clear status bits" "No effect,Clear"
|
|
bitfld.long 0x00 18. " ADDR_ERR ,Burst/compare operation was terminated due to access to reserved memory" "No error,Error"
|
|
bitfld.long 0x00 16.--17. " STATUS ,Reflects the status of erase operations in the flash memory" "Idle,Erase pending,Erase in progress,Erase completed"
|
|
bitfld.long 0x00 2.--3. " TYPE ,Type of memory that burst is carried out on" "Main,Information,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1. " MODE ,Controls write mode selected by application" "Sector erase,Mass erase"
|
|
bitfld.long 0x00 0. " START ,Triggers start of erase operation" "No effect,Start"
|
|
line.long 0x04 "FLCTL_ERASE_SECTADDR,Flash Erase Sector Address Register"
|
|
hexmask.long.tbyte 0x04 0.--21. 0x1 " SECT_ADDRESS ,Address of sector being erased"
|
|
endif
|
|
if (((per.l(ad:0x40011000+0x50))&0x30000)==0x00)&&(((per.l(ad:0x40011000+0x54))&0x70000)==0x00)&&(((per.l(ad:0x40011000+0xA0))&0x30000)==0x00)
|
|
group.long 0xB0++0x07
|
|
line.long 0x00 "FLCTL_BANK0_INFO_WEPROT,Flash Information Memory Bank0 Write/erase Protection Register"
|
|
bitfld.long 0x00 1. " PROT1 ,Protects sector 1 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " PROT0 ,Protects sector 0 from program or erase operations" "Not protected,Protected"
|
|
line.long 0x04 "FLCTL_BANK0_MAIN_WEPROT,Flash Main Memory Bank0 Write/erase Protection Register"
|
|
bitfld.long 0x04 31. " PROT31 ,Protects sector 31 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 30. " PROT30 ,Protects sector 30 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 29. " PROT29 ,Protects sector 29 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 28. " PROT28 ,Protects sector 28 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 27. " PROT27 ,Protects sector 27 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 26. " PROT26 ,Protects sector 26 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 25. " PROT25 ,Protects sector 25 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 24. " PROT24 ,Protects sector 24 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 23. " PROT23 ,Protects sector 23 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 22. " PROT22 ,Protects sector 22 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 21. " PROT21 ,Protects sector 21 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 20. " PROT20 ,Protects sector 20 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " PROT19 ,Protects sector 19 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 18. " PROT18 ,Protects sector 18 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 17. " PROT17 ,Protects sector 17 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 16. " PROT16 ,Protects sector 16 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 15. " PROT15 ,Protects sector 15 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 14. " PROT14 ,Protects sector 14 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 13. " PROT13 ,Protects sector 13 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 12. " PROT12 ,Protects sector 12 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 11. " PROT11 ,Protects sector 11 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 10. " PROT10 ,Protects sector 10 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 9. " PROT9 ,Protects sector 9 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 8. " PROT8 ,Protects sector 8 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PROT7 ,Protects sector 7 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 6. " PROT6 ,Protects sector 6 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 5. " PROT5 ,Protects sector 5 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 4. " PROT4 ,Protects sector 4 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PROT3 ,Protects sector 3 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 2. " PROT2 ,Protects sector 2 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 1. " PROT1 ,Protects sector 1 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 0. " PROT0 ,Protects sector 0 from program or erase operations" "Not protected,Protected"
|
|
group.long 0xC0++0x07
|
|
line.long 0x00 "FLCTL_BANK1_INFO_WEPROT,Flash Information Memory Bank1 Write/Erase Protection Register"
|
|
bitfld.long 0x00 1. " PROT1 ,Protects sector 1 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " PROT0 ,Protects sector 0 from program or erase operations" "Not protected,Protected"
|
|
line.long 0x04 "FLCTL_BANK1_MAIN_WEPROT,Flash Main Memory Bank1 Write/Erase Protection Register"
|
|
bitfld.long 0x04 31. " PROT31 ,Protects sector 31 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 30. " PROT30 ,Protects sector 30 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 29. " PROT29 ,Protects sector 29 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 28. " PROT28 ,Protects sector 28 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 27. " PROT27 ,Protects sector 27 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 26. " PROT26 ,Protects sector 26 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 25. " PROT25 ,Protects sector 25 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 24. " PROT24 ,Protects sector 24 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 23. " PROT23 ,Protects sector 23 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 22. " PROT22 ,Protects sector 22 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 21. " PROT21 ,Protects sector 21 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 20. " PROT20 ,Protects sector 20 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " PROT19 ,Protects sector 19 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 18. " PROT18 ,Protects sector 18 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 17. " PROT17 ,Protects sector 17 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 16. " PROT16 ,Protects sector 16 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 15. " PROT15 ,Protects sector 15 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 14. " PROT14 ,Protects sector 14 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 13. " PROT13 ,Protects sector 13 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 12. " PROT12 ,Protects sector 12 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 11. " PROT11 ,Protects sector 11 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 10. " PROT10 ,Protects sector 10 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 9. " PROT9 ,Protects sector 9 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 8. " PROT8 ,Protects sector 8 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PROT7 ,Protects sector 7 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 6. " PROT6 ,Protects sector 6 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 5. " PROT5 ,Protects sector 5 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 4. " PROT4 ,Protects sector 4 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PROT3 ,Protects sector 3 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 2. " PROT2 ,Protects sector 2 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 1. " PROT1 ,Protects sector 1 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 0. " PROT0 ,Protects sector 0 from program or erase operations" "Not protected,Protected"
|
|
else
|
|
rgroup.long 0xB0++0x07
|
|
line.long 0x00 "FLCTL_BANK0_INFO_WEPROT,Flash Information Memory Bank0 Write/Erase Protection Register"
|
|
bitfld.long 0x00 1. " PROT1 ,Protects sector 1 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " PROT0 ,Protects sector 0 from program or erase operations" "Not protected,Protected"
|
|
line.long 0x04 "FLCTL_BANK0_MAIN_WEPROT,Flash Main Memory Bank0 Write/Erase Protection Register"
|
|
bitfld.long 0x04 31. " PROT31 ,Protects sector 31 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 30. " PROT30 ,Protects sector 30 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 29. " PROT29 ,Protects sector 29 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 28. " PROT28 ,Protects sector 28 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 27. " PROT27 ,Protects sector 27 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 26. " PROT26 ,Protects sector 26 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 25. " PROT25 ,Protects sector 25 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 24. " PROT24 ,Protects sector 24 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 23. " PROT23 ,Protects sector 23 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 22. " PROT22 ,Protects sector 22 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 21. " PROT21 ,Protects sector 21 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 20. " PROT20 ,Protects sector 20 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " PROT19 ,Protects sector 19 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 18. " PROT18 ,Protects sector 18 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 17. " PROT17 ,Protects sector 17 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 16. " PROT16 ,Protects sector 16 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 15. " PROT15 ,Protects sector 15 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 14. " PROT14 ,Protects sector 14 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 13. " PROT13 ,Protects sector 13 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 12. " PROT12 ,Protects sector 12 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 11. " PROT11 ,Protects sector 11 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 10. " PROT10 ,Protects sector 10 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 9. " PROT9 ,Protects sector 9 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 8. " PROT8 ,Protects sector 8 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PROT7 ,Protects sector 7 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 6. " PROT6 ,Protects sector 6 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 5. " PROT5 ,Protects sector 5 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 4. " PROT4 ,Protects sector 4 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PROT3 ,Protects sector 3 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 2. " PROT2 ,Protects sector 2 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 1. " PROT1 ,Protects sector 1 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 0. " PROT0 ,Protects sector 0 from program or erase operations" "Not protected,Protected"
|
|
rgroup.long 0xC0++0x07
|
|
line.long 0x00 "FLCTL_BANK1_INFO_WEPROT,Flash Information Memory Bank1 Write/Erase Protection Register"
|
|
bitfld.long 0x00 1. " PROT1 ,Protects sector 1 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " PROT0 ,Protects sector 0 from program or erase operations" "Not protected,Protected"
|
|
line.long 0x04 "FLCTL_BANK1_MAIN_WEPROT,Flash Main Memory Bank1 Write/Erase Protection Register"
|
|
bitfld.long 0x04 31. " PROT31 ,Protects sector 31 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 30. " PROT30 ,Protects sector 30 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 29. " PROT29 ,Protects sector 29 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 28. " PROT28 ,Protects sector 28 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 27. " PROT27 ,Protects sector 27 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 26. " PROT26 ,Protects sector 26 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 25. " PROT25 ,Protects sector 25 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 24. " PROT24 ,Protects sector 24 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 23. " PROT23 ,Protects sector 23 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 22. " PROT22 ,Protects sector 22 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 21. " PROT21 ,Protects sector 21 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 20. " PROT20 ,Protects sector 20 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " PROT19 ,Protects sector 19 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 18. " PROT18 ,Protects sector 18 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 17. " PROT17 ,Protects sector 17 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 16. " PROT16 ,Protects sector 16 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 15. " PROT15 ,Protects sector 15 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 14. " PROT14 ,Protects sector 14 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 13. " PROT13 ,Protects sector 13 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 12. " PROT12 ,Protects sector 12 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 11. " PROT11 ,Protects sector 11 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 10. " PROT10 ,Protects sector 10 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 9. " PROT9 ,Protects sector 9 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 8. " PROT8 ,Protects sector 8 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PROT7 ,Protects sector 7 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 6. " PROT6 ,Protects sector 6 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 5. " PROT5 ,Protects sector 5 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 4. " PROT4 ,Protects sector 4 from program or erase operations" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PROT3 ,Protects sector 3 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 2. " PROT2 ,Protects sector 2 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 1. " PROT1 ,Protects sector 1 from program or erase operations" "Not protected,Protected"
|
|
bitfld.long 0x04 0. " PROT0 ,Protects sector 0 from program or erase operations" "Not protected,Protected"
|
|
endif
|
|
group.long 0xD0++0x0F
|
|
line.long 0x00 "FLCTL_BMRK_CTLSTAT,Flash Benchmark Control And Status Register"
|
|
bitfld.long 0x00 3. " CMP_SEL ,Selects which benchmark register should be compared against the threshold" "Instruction,Data"
|
|
bitfld.long 0x00 2. " CMP_EN ,Enables comparison of the instruction or data benchmark registers against the threshold value" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " D_BMRK ,Increments the data benchmark count register on each data read access to the flash" "No effect,Increment"
|
|
bitfld.long 0x00 0. " I_BMRK ,Increments the instruction benchmark count register on each instruction fetch to the flash" "No effect,Increment"
|
|
line.long 0x04 "FLCTL_BMRK_IFETCH,Flash Benchmark Instruction Fetch Count Register"
|
|
line.long 0x08 "FLCTL_BMRK_DREAD,Flash Benchmark Data Read Count Register"
|
|
line.long 0x0C "FLCTL_BMRK_CMP,Flash Benchmark Count Compare Register"
|
|
rgroup.long 0xF0++0x03
|
|
line.long 0x00 "FLCTL_IFG,Flash Interrupt Flag Register"
|
|
bitfld.long 0x00 9. " PRG_ERR ,Word composition error in full word write mode" "No error,Error"
|
|
bitfld.long 0x00 8. " BMRK ,Benchmark compare match occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " ERASE ,Erase operation is complete" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " PRGB ,Configured burst program operation is complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PRG ,Word program operation is complete" "Not completed,Completed"
|
|
bitfld.long 0x00 2. " AVPST ,Post-program verify operation has failed comparison" "Not failed,Failed"
|
|
bitfld.long 0x00 1. " AVPRE ,Pre-program verify operation has detected an error" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " RDBRST ,Read Burst/Compare operation is complete" "Not detected,Detected"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "FLCTL_IE,Flash Interrupt Enable Register"
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " PRG_ERR ,Enables the controller to generate an interrupt based on the corresponding bit in the FLCTL_IFG" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " BMRK ,Enables the controller to generate an interrupt based on the corresponding bit in the FLCTL_IFG" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " ERASE ,Enables the controller to generate an interrupt based on the corresponding bit in the FLCTL_IFG" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " PRGB ,Enables the controller to generate an interrupt based on the corresponding bit in the FLCTL_IFG" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " PRG ,Enables the controller to generate an interrupt based on the corresponding bit in the FLCTL_IFG" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " AVPST ,Enables the controller to generate an interrupt based on the corresponding bit in the FLCTL_IFG" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " AVPRE ,Enables the controller to generate an interrupt based on the corresponding bit in the FLCTL_IFG" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " RDBRST ,Enables the controller to generate an interrupt based on the corresponding bit in the FLCTL_IFG" "Disabled,Enabled"
|
|
rgroup.long 0x100++0x0F
|
|
line.long 0x00 "FLCTL_READ_TIMCTL,Flash Read Timing Control Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " SETUP_LONG ,Length of setup time into read mode when the device is recovering"
|
|
bitfld.long 0x00 12.--15. " IREF_BOOST1 ,Length of IREF_BOOST1 signal of the flash memory" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SETUP ,Length of the setup phase for this operation"
|
|
line.long 0x04 "FLCTL_READMARGIN_TIMCTL,Flash Read Margin Timing Control Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " SETUP ,Length of the setup phase for this operation"
|
|
line.long 0x08 "FLCTL_PRGVER_TIMCTL,Flash Program Verify Timing Control Register"
|
|
bitfld.long 0x08 12.--15. " HOLD ,Length of the hold phase for this operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 8.--11. " ACTIVE ,Length of the active phase for this operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x08 0.--7. 1. " SETUP ,Length of the setup phase for this operation"
|
|
line.long 0x0C "FLCTL_ERSVER_TIMCTL,Flash Erase Verify Timing Control Register"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " SETUP ,Length of the setup phase for this operation"
|
|
rgroup.long 0x114++0x0F
|
|
line.long 0x00 "FLCTL_PROGRAM_TIMCTL,Flash Program Timing Control Register"
|
|
bitfld.long 0x00 28.--31. " HOLD ,Length of the hold phase for this operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.tbyte 0x00 8.--27. 1. " ACTIVE ,Length of the active phase for this operation"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SETUP ,Length of the setup phase for this operation"
|
|
line.long 0x04 "FLCTL_PROGRAM_TIMCTL,Flash Program Timing Control Register"
|
|
bitfld.long 0x04 28.--31. " HOLD ,Length of the hold phase for this operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.tbyte 0x04 8.--27. 1. " ACTIVE ,Length of the active phase for this operation"
|
|
hexmask.long.byte 0x04 0.--7. 1. " SETUP ,Length of the setup phase for this operation"
|
|
line.long 0x08 "FLCTL_MASSERASE_TIMCTL,Flash Mass Erase Timing Control Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " BOOST_HOLD ,Length for which flash deactivates the LDO boost signal before processing any new commands"
|
|
hexmask.long.byte 0x08 0.--7. 1. " BOOST_ACTIVE ,Length of the time for which LDO boost signal is kept active"
|
|
line.long 0x0C "FLCTL_BURSTPRG_TIMCTL,Flash Burst Program Timing Control Register"
|
|
hexmask.long.tbyte 0x0C 8.--27. 1. " ACTIVE ,Length of the active phase for this operation"
|
|
width 0x0B
|
|
tree.end
|
|
tree "DMA (Direct Memory Access)"
|
|
base ad:0x4000E000
|
|
width 25.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "DMA_DEVICE_CFG,DMA Device Configuration Status Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " NUM_SRC_PER_CHANNEL ,Number of DMA sources per channel"
|
|
hexmask.long.byte 0x00 0.--7. 1. " NUM_DMA_CHANNELS ,Number of DMA channels available on the device"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DMA_SW_CHTRIG,DMA Software Channel Trigger Register"
|
|
eventfld.long 0x00 7. " CH7 ,DMA_CHANNEL7 trigger" "Inactive,Active"
|
|
eventfld.long 0x00 6. " CH6 ,DMA_CHANNEL6 trigger" "Inactive,Active"
|
|
eventfld.long 0x00 5. " CH5 ,DMA_CHANNEL5 trigger" "Inactive,Active"
|
|
eventfld.long 0x00 4. " CH4 ,DMA_CHANNEL4 trigger" "Inactive,Active"
|
|
textline " "
|
|
eventfld.long 0x00 3. " CH3 ,DMA_CHANNEL3 trigger" "Inactive,Active"
|
|
eventfld.long 0x00 2. " CH2 ,DMA_CHANNEL2 trigger" "Inactive,Active"
|
|
eventfld.long 0x00 1. " CH1 ,DMA_CHANNEL1 trigger" "Inactive,Active"
|
|
eventfld.long 0x00 0. " CH0 ,DMA_CHANNEL0 trigger" "Inactive,Active"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DMA_CH0_SRCCFG,DMA Channel 0 Source Configuration Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DMA_SRC ,Controls which device level DMA source is mapped to the channel input"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "DMA_CH1_SRCCFG,DMA Channel 1 Source Configuration Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DMA_SRC ,Controls which device level DMA source is mapped to the channel input"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "DMA_CH2_SRCCFG,DMA Channel 2 Source Configuration Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DMA_SRC ,Controls which device level DMA source is mapped to the channel input"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DMA_CH3_SRCCFG,DMA Channel 3 Source Configuration Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DMA_SRC ,Controls which device level DMA source is mapped to the channel input"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DMA_CH4_SRCCFG,DMA Channel 4 Source Configuration Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DMA_SRC ,Controls which device level DMA source is mapped to the channel input"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "DMA_CH5_SRCCFG,DMA Channel 5 Source Configuration Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DMA_SRC ,Controls which device level DMA source is mapped to the channel input"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DMA_CH6_SRCCFG,DMA Channel 6 Source Configuration Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DMA_SRC ,Controls which device level DMA source is mapped to the channel input"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "DMA_CH7_SRCCFG,DMA Channel 7 Source Configuration Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DMA_SRC ,Controls which device level DMA source is mapped to the channel input"
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "DMA_INT1_SRCCFG,DMA Interrupt 1 Source Channel Configuration Register"
|
|
bitfld.long 0x00 5. " EN ,Enables the DMA_INT1 mapping" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " INT_SRC ,Controls which channel's completion event is mapped as a source of this Interrupt" "0,1,2,3,4,5,6,7,?..."
|
|
line.long 0x04 "DMA_INT2_SRCCFG,DMA Interrupt 2 Source Channel Configuration Register"
|
|
bitfld.long 0x04 5. " EN ,Enables the DMA_INT2 mapping" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--4. " INT_SRC ,Controls which channel's completion event is mapped as a source of this Interrupt" "0,1,2,3,4,5,6,7,?..."
|
|
line.long 0x08 "DMA_INT3_SRCCFG,DMA Interrupt 3 Source Channel Configuration Register"
|
|
bitfld.long 0x08 5. " EN ,Enables the DMA_INT3 mapping" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--4. " INT_SRC ,Controls which channel's completion event is mapped as a source of this Interrupt" "0,1,2,3,4,5,6,7,?..."
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "DMA_INT0_SRCFLG_set/clr,DMA Interrupt 0 Source Channel Flag Register"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " CH7 ,Channel 7 was the source of DMA_INT0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " CH6 ,Channel 6 was the source of DMA_INT0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " CH5 ,Channel 5 was the source of DMA_INT0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " CH4 ,Channel 4 was the source of DMA_INT0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " CH3 ,Channel 3 was the source of DMA_INT0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " CH2 ,Channel 2 was the source of DMA_INT0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " CH1 ,Channel 1 was the source of DMA_INT0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " CH0 ,Channel 0 was the source of DMA_INT0" "No interrupt,Interrupt"
|
|
hgroup.long 0x1000++0x03
|
|
hide.long 0x00 "DMA_STAT,DMA Status Register"
|
|
in
|
|
wgroup.long 0x1004++0x03
|
|
line.long 0x00 "DMA_CFG,DMA Configuration Register"
|
|
bitfld.long 0x00 7. " CHPROTCTRL[3] ,Indicate if a cacheable access is occurring" "Low,High"
|
|
bitfld.long 0x00 6. " [2] ,Indicate if a bufferable access is occurring" "Low,High"
|
|
bitfld.long 0x00 5. " [1] ,Indicate if a privileged access is occurring" "Low,High"
|
|
bitfld.long 0x00 0. " MASTEN ,Enable status of the controller" "Disable,Enable"
|
|
hgroup.long 0x1008++0x03
|
|
hide.long 0x00 "DMA_CTLBASE,DMA Channel Control Data Base Pointer Register"
|
|
in
|
|
hgroup.long 0x100C++0x03
|
|
hide.long 0x00 "DMA_ALTBASE,DMA Channel Alternate Control Data Base Pointer Register"
|
|
in
|
|
hgroup.long 0x1010++0x03
|
|
hide.long 0x00 "DMA_WAITSTAT,DMA Channel Wait on Request Status Register"
|
|
in
|
|
wgroup.long 0x1014++0x03
|
|
line.long 0x00 "DMA_SWREQ,DMA Channel Software Request Register"
|
|
bitfld.long 0x00 7. " CHNL_SW_REQ_[7] ,DMA request for channel 7" "No effect,Request"
|
|
bitfld.long 0x00 6. " [6] ,DMA request for channel 6" "No effect,Request"
|
|
bitfld.long 0x00 5. " [5] ,DMA request for channel 5" "No effect,Request"
|
|
bitfld.long 0x00 4. " [4] ,DMA request for channel 4" "No effect,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,DMA request for channel 3" "No effect,Request"
|
|
bitfld.long 0x00 2. " [2] ,DMA request for channel 2" "No effect,Request"
|
|
bitfld.long 0x00 1. " [1] ,DMA request for channel 1" "No effect,Request"
|
|
bitfld.long 0x00 0. " [0] ,DMA request for channel 0" "No effect,Request"
|
|
textline ""
|
|
group.long 0x1018++0x03
|
|
line.long 0x00 "DMA_USEBURST_set/clr,DMA Channel Useburst Register"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " DMA_USEBURST_[7] ,DMA channel 7 receives on dma_req[7]/dma_sreq[7]" "Not received,Received"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,DMA channel 6 receives on dma_req[6]/dma_sreq[6]" "Not received,Received"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,DMA channel 5 receives on dma_req[5]/dma_sreq[5]" "Not received,Received"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,DMA channel 4 receives on dma_req[4]/dma_sreq[4]" "Not received,Received"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,DMA channel 3 receives on dma_req[3]/dma_sreq[3]" "Not received,Received"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,DMA channel 2 receives on dma_req[2]/dma_sreq[2]" "Not received,Received"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,DMA channel 1 receives on dma_req[1]/dma_sreq[1]" "Not received,Received"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,DMA channel 0 receives on dma_req[0]/dma_sreq[0]" "Not received,Received"
|
|
textline ""
|
|
group.long 0x1020++0x03
|
|
line.long 0x00 "DMA_REQMASK_set/clr,DMA Channel Request Mask Register"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " DMA_REQMASK_[7] ,External requests for channel 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,External requests for channel 6" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,External requests for channel 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,External requests for channel 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,External requests for channel 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,External requests for channel 2" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,External requests for channel 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,External requests for channel 0" "Disabled,Enabled"
|
|
textline ""
|
|
group.long 0x1028++0x03
|
|
line.long 0x00 "DMA_ENA_set/clr,DMA Channel Enable Register"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " DMA_ENA_[7] ,Status of channel 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Status of channel 6" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Status of channel 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Status of channel 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Status of channel 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Status of channel 2" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Status of channel 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Status of channel 0" "Disabled,Enabled"
|
|
textline ""
|
|
group.long 0x1030++0x03
|
|
line.long 0x00 "DMA_ALT_set/clr,DMA Channel Primary-Alternate Register"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " DMA_ALT_[7] ,Channel 7 data structure status" "Primary,Alternate"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Channel 6 data structure status" "Primary,Alternate"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Channel 5 data structure status" "Primary,Alternate"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Channel 4 data structure status" "Primary,Alternate"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Channel 3 data structure status" "Primary,Alternate"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Channel 2 data structure status" "Primary,Alternate"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Channel 1 data structure status" "Primary,Alternate"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Channel 0 data structure status" "Primary,Alternate"
|
|
textline ""
|
|
group.long 0x1038++0x03
|
|
line.long 0x00 "DMA_PRIO_set/clr,DMA Channel Priority Register"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " DMA_PRIO_[7] ,Channel 7 priority mask status" "Default,High"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Channel 6 priority mask status" "Default,High"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Channel 5 priority mask status" "Default,High"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Channel 4 priority mask status" "Default,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Channel 3 priority mask status" "Default,High"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Channel 2 priority mask status" "Default,High"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Channel 1 priority mask status" "Default,High"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Channel 0 priority mask status" "Default,High"
|
|
textline ""
|
|
group.long 0x104C++0x03
|
|
line.long 0x00 "DMA_ERRCLR,DMA Bus Error Clear Register"
|
|
bitfld.long 0x00 0. " ERRCLR ,Status of dma_err" "Low,High"
|
|
width 0x0B
|
|
tree.end
|
|
tree "GPIO (General Purpose Input/Output)"
|
|
base ad:0x40004C00
|
|
width 9.
|
|
rgroup.word 0xE++0x01
|
|
line.word 0x00 "P1IV,Port 1 Interrupt Vector Register"
|
|
bitfld.word 0x00 0.--4. " P1IV ,Port 1 interrupt vector value (Source/Flag/Priority)" "No interrupt pending,,Port 1.0/P1IFG.0/Highest,,Port 1.1/P1IFG.1,,Port 1.2/P1IFG.2,,Port 1.3/P1IFG.3,,Port 1.4/P1IFG.4,,Port 1.5/P1IFG.5,,Port 1.6/P1IFG.6,,Port 1.7/P1IFG.7/Lowest,?..."
|
|
rgroup.word 0x1E++0x01
|
|
line.word 0x00 "P2IV,Port 2 Interrupt Vector Register"
|
|
bitfld.word 0x00 0.--4. " P2IV ,Port 2 interrupt vector value (Source/Flag/Priority)" "No interrupt pending,,Port 2.0/P2IFG.0/Highest,,Port 2.1/P2IFG.1,,Port 2.2/P2IFG.2,,Port 2.3/P2IFG.3,,Port 2.4/P2IFG.4,,Port 2.5/P2IFG.5,,Port 2.6/P2IFG.6,,Port 2.7/P2IFG.7/Lowest,?..."
|
|
rgroup.word 0x2E++0x01
|
|
line.word 0x00 "P3IV,Port 3 Interrupt Vector Register"
|
|
bitfld.word 0x00 0.--4. " P3IV ,Port 3 interrupt vector value (Source/Flag/Priority)" "No interrupt pending,,Port 3.0/P3IFG.0/Highest,,Port 3.1/P3IFG.1,,Port 3.2/P3IFG.2,,Port 3.3/P3IFG.3,,Port 3.4/P3IFG.4,,Port 3.5/P3IFG.5,,Port 3.6/P3IFG.6,,Port 3.7/P3IFG.7/Lowest,?..."
|
|
rgroup.word 0x3E++0x01
|
|
line.word 0x00 "P4IV,Port 4 Interrupt Vector Register"
|
|
bitfld.word 0x00 0.--4. " P4IV ,Port 4 interrupt vector value (Source/Flag/Priority)" "No interrupt pending,,Port 4.0/P4IFG.0/Highest,,Port 4.1/P4IFG.1,,Port 4.2/P4IFG.2,,Port 4.3/P4IFG.3,,Port 4.4/P4IFG.4,,Port 4.5/P4IFG.5,,Port 4.6/P4IFG.6,,Port 4.7/P4IFG.7/Lowest,?..."
|
|
rgroup.word 0x4E++0x01
|
|
line.word 0x00 "P5IV,Port 5 Interrupt Vector Register"
|
|
bitfld.word 0x00 0.--4. " P5IV ,Port 5 interrupt vector value (Source/Flag/Priority)" "No interrupt pending,,Port 5.0/P5IFG.0/Highest,,Port 5.1/P5IFG.1,,Port 5.2/P5IFG.2,,Port 5.3/P5IFG.3,,Port 5.4/P5IFG.4,,Port 5.5/P5IFG.5,,Port 5.6/P5IFG.6,,Port 5.7/P5IFG.7/Lowest,?..."
|
|
rgroup.word 0x5E++0x01
|
|
line.word 0x00 "P6IV,Port 6 Interrupt Vector Register"
|
|
bitfld.word 0x00 0.--4. " P6IV ,Port 6 interrupt vector value (Source/Flag/Priority)" "No interrupt pending,,Port 6.0/P6IFG.0/Highest,,Port 6.1/P6IFG.1,,Port 6.2/P6IFG.2,,Port 6.3/P6IFG.3,,Port 6.4/P6IFG.4,,Port 6.5/P6IFG.5,,Port 6.6/P6IFG.6,,Port 6.7/P6IFG.7/Lowest,?..."
|
|
rgroup.word 0x6E++0x01
|
|
line.word 0x00 "P7IV,Port 7 Interrupt Vector Register"
|
|
bitfld.word 0x00 0.--4. " P7IV ,Port 7 interrupt vector value (Source/Flag/Priority)" "No interrupt pending,,Port 7.0/P7IFG.0/Highest,,Port 7.1/P7IFG.1,,Port 7.2/P7IFG.2,,Port 7.3/P7IFG.3,,Port 7.4/P7IFG.4,,Port 7.5/P7IFG.5,,Port 7.6/P7IFG.6,,Port 7.7/P7IFG.7/Lowest,?..."
|
|
rgroup.word 0x7E++0x01
|
|
line.word 0x00 "P8IV,Port 8 Interrupt Vector Register"
|
|
bitfld.word 0x00 0.--4. " P8IV ,Port 8 interrupt vector value (Source/Flag/Priority)" "No interrupt pending,,Port 8.0/P8IFG.0/Highest,,Port 8.1/P8IFG.1,,Port 8.2/P8IFG.2,,Port 8.3/P8IFG.3,,Port 8.4/P8IFG.4,,Port 8.5/P8IFG.5,,Port 8.6/P8IFG.6,,Port 8.7/P8IFG.7/Lowest,?..."
|
|
rgroup.word 0x8E++0x01
|
|
line.word 0x00 "P9IV,Port 9 Interrupt Vector Register"
|
|
bitfld.word 0x00 0.--4. " P9IV ,Port 9 interrupt vector value (Source/Flag/Priority)" "No interrupt pending,,Port 9.0/P9IFG.0/Highest,,Port 9.1/P9IFG.1,,Port 9.2/P9IFG.2,,Port 9.3/P9IFG.3,,Port 9.4/P9IFG.4,,Port 9.5/P9IFG.5,,Port 9.6/P9IFG.6,,Port 9.7/P9IFG.7/Lowest,?..."
|
|
rgroup.word 0x9E++0x01
|
|
line.word 0x00 "P10IV,Port 10 Interrupt Vector Register"
|
|
bitfld.word 0x00 0.--4. " P10IV ,Port 10 interrupt vector value (Source/Flag/Priority)" "No interrupt pending,,Port 10.0/P10IFG.0/Highest,,Port 10.1/P10IFG.1,,Port 10.2/P10IFG.2,,Port 10.3/P10IFG.3,,Port 10.4/P10IFG.4,,Port 10.5/P10IFG.5,,Port 10.6/P10IFG.6,,Port 10.7/P10IFG.7/Lowest,?..."
|
|
tree "PORT 1"
|
|
rgroup.byte 0x0++0x00
|
|
line.byte 0x00 "P1IN,Port 1 Input Register"
|
|
bitfld.byte 0x00 7. " P1IN7 ,Port 1 input" "Low,High"
|
|
bitfld.byte 0x00 6. " P1IN6 ,Port 1 input" "Low,High"
|
|
bitfld.byte 0x00 5. " P1IN5 ,Port 1 input" "Low,High"
|
|
bitfld.byte 0x00 4. " P1IN4 ,Port 1 input" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P1IN3 ,Port 1 input" "Low,High"
|
|
bitfld.byte 0x00 2. " P1IN2 ,Port 1 input" "Low,High"
|
|
bitfld.byte 0x00 1. " P1IN1 ,Port 1 input" "Low,High"
|
|
bitfld.byte 0x00 0. " P1IN0 ,Port 1 input" "Low,High"
|
|
group.byte (0x0+0x02)++0x00
|
|
line.byte 0x00 "P1OUT,Port 1 Output Register"
|
|
bitfld.byte 0x00 7. " P1OUT7 ,Port 1 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 6. " P1OUT6 ,Port 1 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 5. " P1OUT5 ,Port 1 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 4. " P1OUT4 ,Port 1 Output" "Low/Pulldown,High/Pullup"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P1OUT3 ,Port 1 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 2. " P1OUT2 ,Port 1 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 1. " P1OUT1 ,Port 1 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 0. " P1OUT0 ,Port 1 Output" "Low/Pulldown,High/Pullup"
|
|
group.byte (0x0+0x04)++0x00
|
|
line.byte 0x00 "P1DIR,Port 1 Direction Register"
|
|
bitfld.byte 0x00 7. " P1DIR7 ,Port 1 direction" "Input,Output"
|
|
bitfld.byte 0x00 6. " P1DIR6 ,Port 1 direction" "Input,Output"
|
|
bitfld.byte 0x00 5. " P1DIR5 ,Port 1 direction" "Input,Output"
|
|
bitfld.byte 0x00 4. " P1DIR4 ,Port 1 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P1DIR3 ,Port 1 direction" "Input,Output"
|
|
bitfld.byte 0x00 2. " P1DIR2 ,Port 1 direction" "Input,Output"
|
|
bitfld.byte 0x00 1. " P1DIR1 ,Port 1 direction" "Input,Output"
|
|
bitfld.byte 0x00 0. " P1DIR0 ,Port 1 direction" "Input,Output"
|
|
group.byte (0x0+0x06)++0x00
|
|
line.byte 0x00 "P1REN,Port 1 Pullup or Pulldown Resistor Enable Register"
|
|
bitfld.byte 0x00 7. " P1REN7 ,Port 1 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P1REN6 ,Port 1 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P1REN5 ,Port 1 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P1REN4 ,Port 1 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P1REN3 ,Port 1 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P1REN2 ,Port 1 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P1REN1 ,Port 1 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P1REN0 ,Port 1 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
group.byte (0x0+0x08)++0x00
|
|
line.byte 0x00 "P1DS,Port 1 Drive Strength Selection Register"
|
|
bitfld.byte 0x00 7. " P1DS7 ,Port 1 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 6. " P1DS6 ,Port 1 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 5. " P1DS5 ,Port 1 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 4. " P1DS4 ,Port 1 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P1DS3 ,Port 1 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 2. " P1DS2 ,Port 1 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 1. " P1DS1 ,Port 1 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 0. " P1DS0 ,Port 1 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
group.byte (0x0+0x0A)++0x00
|
|
line.byte 0x00 "P1SEL0,Port 1 Function Selection Register"
|
|
bitfld.byte 0x00 7. " P1SEL7 ,Port function selection 7" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 6. " P1SEL6 ,Port function selection 6" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 5. " P1SEL5 ,Port function selection 5" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 4. " P1SEL4 ,Port function selection 4" "GPIO/Secondary,Primary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P1SEL3 ,Port function selection 3" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 2. " P1SEL2 ,Port function selection 2" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 1. " P1SEL1 ,Port function selection 1" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 0. " P1SEL0 ,Port function selection 0" "GPIO/Secondary,Primary/Tertiary"
|
|
group.byte (0x0+0x0C)++0x00
|
|
line.byte 0x00 "P1SEL1,Port 1 Function Selection Register"
|
|
bitfld.byte 0x00 7. " P1SEL7 ,Port function selection 7" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 6. " P1SEL6 ,Port function selection 6" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 5. " P1SEL5 ,Port function selection 5" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 4. " P1SEL4 ,Port function selection 4" "GPIO/Primary,Secondary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P1SEL3 ,Port function selection 3" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 2. " P1SEL2 ,Port function selection 2" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 1. " P1SEL1 ,Port function selection 1" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 0. " P1SEL0 ,Port function selection 0" "GPIO/Primary,Secondary/Tertiary"
|
|
group.byte (0x0+0x16)++0x00
|
|
line.byte 0x00 "P1SELC,Port 1 Complement Selection Register"
|
|
bitfld.byte 0x00 7. " P1SELC7 ,Port 1 Port selection complement 7" "0,1"
|
|
bitfld.byte 0x00 6. " P1SELC6 ,Port 1 Port selection complement 6" "0,1"
|
|
bitfld.byte 0x00 5. " P1SELC5 ,Port 1 Port selection complement 5" "0,1"
|
|
bitfld.byte 0x00 4. " P1SELC4 ,Port 1 Port selection complement 4" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P1SELC3 ,Port 1 Port selection complement 3" "0,1"
|
|
bitfld.byte 0x00 2. " P1SELC2 ,Port 1 Port selection complement 2" "0,1"
|
|
bitfld.byte 0x00 1. " P1SELC1 ,Port 1 Port selection complement 1" "0,1"
|
|
bitfld.byte 0x00 0. " P1SELC0 ,Port 1 Port selection complement 0" "0,1"
|
|
group.byte (0x0+0x18)++0x00
|
|
line.byte 0x00 "P1IES,Port 1 Interrupt Edge Select Register"
|
|
bitfld.byte 0x00 7. " P1IES7 ,Port 1 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 6. " P1IES6 ,Port 1 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 5. " P1IES5 ,Port 1 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 4. " P1IES4 ,Port 1 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P1IES3 ,Port 1 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 2. " P1IES2 ,Port 1 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 1. " P1IES1 ,Port 1 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 0. " P1IES0 ,Port 1 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
group.byte (0x0+0x1A)++0x00
|
|
line.byte 0x00 "P1IE,Port 1 Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " P1IE7 ,Port 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P1IE6 ,Port 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P1IE5 ,Port 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P1IE4 ,Port 1 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P1IE3 ,Port 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P1IE2 ,Port 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P1IE1 ,Port 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P1IE0 ,Port 1 interrupt enable" "Disabled,Enabled"
|
|
group.byte (0x0+0x1C)++0x00
|
|
line.byte 0x00 "P1IFG,Port 1 Interrupt Flag Register"
|
|
bitfld.byte 0x00 7. " P1IFG7 ,Port 1 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 6. " P1IFG6 ,Port 1 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 5. " P1IFG5 ,Port 1 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " P1IFG4 ,Port 1 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P1IFG3 ,Port 1 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " P1IFG2 ,Port 1 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " P1IFG1 ,Port 1 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " P1IFG0 ,Port 1 interrupt flag" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "PORT 2"
|
|
rgroup.byte (0x0+0x01)++0x00
|
|
line.byte 0x00 "P2IN,Port 2 Input Register"
|
|
bitfld.byte 0x00 7. " P2IN7 ,Port 2 input" "Low,High"
|
|
bitfld.byte 0x00 6. " P2IN6 ,Port 2 input" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P2IN5 ,Port 2 input" "Low,High"
|
|
bitfld.byte 0x00 4. " P2IN4 ,Port 2 input" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P2IN3 ,Port 2 input" "Low,High"
|
|
bitfld.byte 0x00 2. " P2IN2 ,Port 2 input" "Low,High"
|
|
bitfld.byte 0x00 1. " P2IN1 ,Port 2 input" "Low,High"
|
|
bitfld.byte 0x00 0. " P2IN0 ,Port 2 input" "Low,High"
|
|
group.byte (0x0+0x03)++0x00
|
|
line.byte 0x00 "P2OUT,Port 2 Output Register"
|
|
bitfld.byte 0x00 7. " P2OUT7 ,Port 2 Output" "Low,High"
|
|
bitfld.byte 0x00 6. " P2OUT6 ,Port 2 Output" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P2OUT5 ,Port 2 Output" "Low,High"
|
|
bitfld.byte 0x00 4. " P2OUT4 ,Port 2 Output" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P2OUT3 ,Port 2 Output" "Low,High"
|
|
bitfld.byte 0x00 2. " P2OUT2 ,Port 2 Output" "Low,High"
|
|
bitfld.byte 0x00 1. " P2OUT1 ,Port 2 Output" "Low,High"
|
|
bitfld.byte 0x00 0. " P2OUT0 ,Port 2 Output" "Low,High"
|
|
group.byte (0x0+0x05)++0x00
|
|
line.byte 0x00 "P2DIR,Port 2 Direction Register"
|
|
bitfld.byte 0x00 7. " P2DIR7 ,Port 2 direction" "Input,Output"
|
|
bitfld.byte 0x00 6. " P2DIR6 ,Port 2 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P2DIR5 ,Port 2 direction" "Input,Output"
|
|
bitfld.byte 0x00 4. " P2DIR4 ,Port 2 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P2DIR3 ,Port 2 direction" "Input,Output"
|
|
bitfld.byte 0x00 2. " P2DIR2 ,Port 2 direction" "Input,Output"
|
|
bitfld.byte 0x00 1. " P2DIR1 ,Port 2 direction" "Input,Output"
|
|
bitfld.byte 0x00 0. " P2DIR0 ,Port 2 direction" "Input,Output"
|
|
group.byte (0x0+0x07)++0x00
|
|
line.byte 0x00 "P2REN,Port 2 Pullup or Pulldown Resistor Enable Register"
|
|
bitfld.byte 0x00 7. " P2REN7 ,Port 2 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P2REN6 ,Port 2 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P2REN5 ,Port 2 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P2REN4 ,Port 2 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P2REN3 ,Port 2 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P2REN2 ,Port 2 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P2REN1 ,Port 2 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P2REN0 ,Port 2 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
group.byte (0x0+0x09)++0x00
|
|
line.byte 0x00 "P2DS,Port 2 Drive Strength Selection Register"
|
|
bitfld.byte 0x00 7. " P2DS7 ,Port 2 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 6. " P2DS6 ,Port 2 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P2DS5 ,Port 2 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 4. " P2DS4 ,Port 2 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P2DS3 ,Port 2 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 2. " P2DS2 ,Port 2 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 1. " P2DS1 ,Port 2 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 0. " P2DS0 ,Port 2 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
group.byte (0x0+0x0B)++0x00
|
|
line.byte 0x00 "P2SEL0,Port 2 Function Selection Register"
|
|
bitfld.byte 0x00 7. " P2SEL7 ,Port function selection 7" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 6. " P2SEL6 ,Port function selection 6" "GPIO/Secondary,Primary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P2SEL5 ,Port function selection 5" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 4. " P2SEL4 ,Port function selection 4" "GPIO/Secondary,Primary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P2SEL3 ,Port function selection 3" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 2. " P2SEL2 ,Port function selection 2" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 1. " P2SEL1 ,Port function selection 1" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 0. " P2SEL0 ,Port function selection 0" "GPIO/Secondary,Primary/Tertiary"
|
|
group.byte (0x0+0x0D)++0x00
|
|
line.byte 0x00 "P2SEL1,Port 2 Function Selection Register"
|
|
bitfld.byte 0x00 7. " P2SEL7 ,Port function selection 7" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 6. " P2SEL6 ,Port function selection 6" "GPIO/Primary,Secondary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P2SEL5 ,Port function selection 5" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 4. " P2SEL4 ,Port function selection 4" "GPIO/Primary,Secondary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P2SEL3 ,Port function selection 3" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 2. " P2SEL2 ,Port function selection 2" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 1. " P2SEL1 ,Port function selection 1" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 0. " P2SEL0 ,Port function selection 0" "GPIO/Primary,Secondary/Tertiary"
|
|
group.byte (0x0+0x17)++0x00
|
|
line.byte 0x00 "P2SELC,Port 2 Complement Selection Register"
|
|
bitfld.byte 0x00 7. " P2SELC7 ,Port 2 Port selection complement 7" "0,1"
|
|
bitfld.byte 0x00 6. " P2SELC6 ,Port 2 Port selection complement 6" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P2SELC5 ,Port 2 Port selection complement 5" "0,1"
|
|
bitfld.byte 0x00 4. " P2SELC4 ,Port 2 Port selection complement 4" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P2SELC3 ,Port 2 Port selection complement 3" "0,1"
|
|
bitfld.byte 0x00 2. " P2SELC2 ,Port 2 Port selection complement 2" "0,1"
|
|
bitfld.byte 0x00 1. " P2SELC1 ,Port 2 Port selection complement 1" "0,1"
|
|
bitfld.byte 0x00 0. " P2SELC0 ,Port 2 Port selection complement 0" "0,1"
|
|
group.byte (0x0+0x19)++0x00
|
|
line.byte 0x00 "P2IES,Port 2 Interrupt Edge Select Register"
|
|
bitfld.byte 0x00 7. " P2IES7 ,Port 2 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 6. " P2IES6 ,Port 2 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P2IES5 ,Port 2 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 4. " P2IES4 ,Port 2 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P2IES3 ,Port 2 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 2. " P2IES2 ,Port 2 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 1. " P2IES1 ,Port 2 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 0. " P2IES0 ,Port 2 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
group.byte (0x0+0x1B)++0x00
|
|
line.byte 0x00 "P2IE,Port 2 Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " P2IE7 ,Port 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P2IE6 ,Port 2 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P2IE5 ,Port 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P2IE4 ,Port 2 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P2IE3 ,Port 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P2IE2 ,Port 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P2IE1 ,Port 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P2IE0 ,Port 2 interrupt enable" "Disabled,Enabled"
|
|
group.byte (0x0+0x1D)++0x00
|
|
line.byte 0x00 "P2IFG,Port 2 Interrupt Flag Register"
|
|
bitfld.byte 0x00 7. " P2IFG7 ,Port 2 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 6. " P2IFG6 ,Port 2 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P2IFG5 ,Port 2 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " P2IFG4 ,Port 2 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P2IFG3 ,Port 2 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " P2IFG2 ,Port 2 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " P2IFG1 ,Port 2 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " P2IFG0 ,Port 2 interrupt flag" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "PORT 3"
|
|
rgroup.byte 0x20++0x00
|
|
line.byte 0x00 "P3IN,Port 3 Input Register"
|
|
bitfld.byte 0x00 7. " P3IN7 ,Port 3 input" "Low,High"
|
|
bitfld.byte 0x00 6. " P3IN6 ,Port 3 input" "Low,High"
|
|
bitfld.byte 0x00 5. " P3IN5 ,Port 3 input" "Low,High"
|
|
bitfld.byte 0x00 4. " P3IN4 ,Port 3 input" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P3IN3 ,Port 3 input" "Low,High"
|
|
bitfld.byte 0x00 2. " P3IN2 ,Port 3 input" "Low,High"
|
|
bitfld.byte 0x00 1. " P3IN1 ,Port 3 input" "Low,High"
|
|
bitfld.byte 0x00 0. " P3IN0 ,Port 3 input" "Low,High"
|
|
group.byte (0x20+0x02)++0x00
|
|
line.byte 0x00 "P3OUT,Port 3 Output Register"
|
|
bitfld.byte 0x00 7. " P3OUT7 ,Port 3 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 6. " P3OUT6 ,Port 3 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 5. " P3OUT5 ,Port 3 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 4. " P3OUT4 ,Port 3 Output" "Low/Pulldown,High/Pullup"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P3OUT3 ,Port 3 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 2. " P3OUT2 ,Port 3 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 1. " P3OUT1 ,Port 3 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 0. " P3OUT0 ,Port 3 Output" "Low/Pulldown,High/Pullup"
|
|
group.byte (0x20+0x04)++0x00
|
|
line.byte 0x00 "P3DIR,Port 3 Direction Register"
|
|
bitfld.byte 0x00 7. " P3DIR7 ,Port 3 direction" "Input,Output"
|
|
bitfld.byte 0x00 6. " P3DIR6 ,Port 3 direction" "Input,Output"
|
|
bitfld.byte 0x00 5. " P3DIR5 ,Port 3 direction" "Input,Output"
|
|
bitfld.byte 0x00 4. " P3DIR4 ,Port 3 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P3DIR3 ,Port 3 direction" "Input,Output"
|
|
bitfld.byte 0x00 2. " P3DIR2 ,Port 3 direction" "Input,Output"
|
|
bitfld.byte 0x00 1. " P3DIR1 ,Port 3 direction" "Input,Output"
|
|
bitfld.byte 0x00 0. " P3DIR0 ,Port 3 direction" "Input,Output"
|
|
group.byte (0x20+0x06)++0x00
|
|
line.byte 0x00 "P3REN,Port 3 Pullup or Pulldown Resistor Enable Register"
|
|
bitfld.byte 0x00 7. " P3REN7 ,Port 3 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P3REN6 ,Port 3 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P3REN5 ,Port 3 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P3REN4 ,Port 3 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P3REN3 ,Port 3 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P3REN2 ,Port 3 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P3REN1 ,Port 3 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P3REN0 ,Port 3 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
group.byte (0x20+0x08)++0x00
|
|
line.byte 0x00 "P3DS,Port 3 Drive Strength Selection Register"
|
|
bitfld.byte 0x00 7. " P3DS7 ,Port 3 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 6. " P3DS6 ,Port 3 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 5. " P3DS5 ,Port 3 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 4. " P3DS4 ,Port 3 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P3DS3 ,Port 3 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 2. " P3DS2 ,Port 3 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 1. " P3DS1 ,Port 3 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 0. " P3DS0 ,Port 3 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
group.byte (0x20+0x0A)++0x00
|
|
line.byte 0x00 "P3SEL0,Port 3 Function Selection Register"
|
|
bitfld.byte 0x00 7. " P3SEL7 ,Port function selection 7" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 6. " P3SEL6 ,Port function selection 6" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 5. " P3SEL5 ,Port function selection 5" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 4. " P3SEL4 ,Port function selection 4" "GPIO/Secondary,Primary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P3SEL3 ,Port function selection 3" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 2. " P3SEL2 ,Port function selection 2" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 1. " P3SEL1 ,Port function selection 1" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 0. " P3SEL0 ,Port function selection 0" "GPIO/Secondary,Primary/Tertiary"
|
|
group.byte (0x20+0x0C)++0x00
|
|
line.byte 0x00 "P3SEL1,Port 3 Function Selection Register"
|
|
bitfld.byte 0x00 7. " P3SEL7 ,Port function selection 7" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 6. " P3SEL6 ,Port function selection 6" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 5. " P3SEL5 ,Port function selection 5" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 4. " P3SEL4 ,Port function selection 4" "GPIO/Primary,Secondary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P3SEL3 ,Port function selection 3" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 2. " P3SEL2 ,Port function selection 2" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 1. " P3SEL1 ,Port function selection 1" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 0. " P3SEL0 ,Port function selection 0" "GPIO/Primary,Secondary/Tertiary"
|
|
group.byte (0x20+0x16)++0x00
|
|
line.byte 0x00 "P3SELC,Port 3 Complement Selection Register"
|
|
bitfld.byte 0x00 7. " P3SELC7 ,Port 3 Port selection complement 7" "0,1"
|
|
bitfld.byte 0x00 6. " P3SELC6 ,Port 3 Port selection complement 6" "0,1"
|
|
bitfld.byte 0x00 5. " P3SELC5 ,Port 3 Port selection complement 5" "0,1"
|
|
bitfld.byte 0x00 4. " P3SELC4 ,Port 3 Port selection complement 4" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P3SELC3 ,Port 3 Port selection complement 3" "0,1"
|
|
bitfld.byte 0x00 2. " P3SELC2 ,Port 3 Port selection complement 2" "0,1"
|
|
bitfld.byte 0x00 1. " P3SELC1 ,Port 3 Port selection complement 1" "0,1"
|
|
bitfld.byte 0x00 0. " P3SELC0 ,Port 3 Port selection complement 0" "0,1"
|
|
group.byte (0x20+0x18)++0x00
|
|
line.byte 0x00 "P3IES,Port 3 Interrupt Edge Select Register"
|
|
bitfld.byte 0x00 7. " P3IES7 ,Port 3 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 6. " P3IES6 ,Port 3 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 5. " P3IES5 ,Port 3 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 4. " P3IES4 ,Port 3 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P3IES3 ,Port 3 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 2. " P3IES2 ,Port 3 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 1. " P3IES1 ,Port 3 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 0. " P3IES0 ,Port 3 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
group.byte (0x20+0x1A)++0x00
|
|
line.byte 0x00 "P3IE,Port 3 Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " P3IE7 ,Port 3 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P3IE6 ,Port 3 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P3IE5 ,Port 3 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P3IE4 ,Port 3 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P3IE3 ,Port 3 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P3IE2 ,Port 3 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P3IE1 ,Port 3 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P3IE0 ,Port 3 interrupt enable" "Disabled,Enabled"
|
|
group.byte (0x20+0x1C)++0x00
|
|
line.byte 0x00 "P3IFG,Port 3 Interrupt Flag Register"
|
|
bitfld.byte 0x00 7. " P3IFG7 ,Port 3 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 6. " P3IFG6 ,Port 3 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 5. " P3IFG5 ,Port 3 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " P3IFG4 ,Port 3 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P3IFG3 ,Port 3 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " P3IFG2 ,Port 3 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " P3IFG1 ,Port 3 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " P3IFG0 ,Port 3 interrupt flag" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "PORT 4"
|
|
rgroup.byte (0x20+0x01)++0x00
|
|
line.byte 0x00 "P4IN,Port 4 Input Register"
|
|
bitfld.byte 0x00 7. " P4IN7 ,Port 4 input" "Low,High"
|
|
bitfld.byte 0x00 6. " P4IN6 ,Port 4 input" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P4IN5 ,Port 4 input" "Low,High"
|
|
bitfld.byte 0x00 4. " P4IN4 ,Port 4 input" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P4IN3 ,Port 4 input" "Low,High"
|
|
bitfld.byte 0x00 2. " P4IN2 ,Port 4 input" "Low,High"
|
|
bitfld.byte 0x00 1. " P4IN1 ,Port 4 input" "Low,High"
|
|
bitfld.byte 0x00 0. " P4IN0 ,Port 4 input" "Low,High"
|
|
group.byte (0x20+0x03)++0x00
|
|
line.byte 0x00 "P4OUT,Port 4 Output Register"
|
|
bitfld.byte 0x00 7. " P4OUT7 ,Port 4 Output" "Low,High"
|
|
bitfld.byte 0x00 6. " P4OUT6 ,Port 4 Output" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P4OUT5 ,Port 4 Output" "Low,High"
|
|
bitfld.byte 0x00 4. " P4OUT4 ,Port 4 Output" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P4OUT3 ,Port 4 Output" "Low,High"
|
|
bitfld.byte 0x00 2. " P4OUT2 ,Port 4 Output" "Low,High"
|
|
bitfld.byte 0x00 1. " P4OUT1 ,Port 4 Output" "Low,High"
|
|
bitfld.byte 0x00 0. " P4OUT0 ,Port 4 Output" "Low,High"
|
|
group.byte (0x20+0x05)++0x00
|
|
line.byte 0x00 "P4DIR,Port 4 Direction Register"
|
|
bitfld.byte 0x00 7. " P4DIR7 ,Port 4 direction" "Input,Output"
|
|
bitfld.byte 0x00 6. " P4DIR6 ,Port 4 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P4DIR5 ,Port 4 direction" "Input,Output"
|
|
bitfld.byte 0x00 4. " P4DIR4 ,Port 4 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P4DIR3 ,Port 4 direction" "Input,Output"
|
|
bitfld.byte 0x00 2. " P4DIR2 ,Port 4 direction" "Input,Output"
|
|
bitfld.byte 0x00 1. " P4DIR1 ,Port 4 direction" "Input,Output"
|
|
bitfld.byte 0x00 0. " P4DIR0 ,Port 4 direction" "Input,Output"
|
|
group.byte (0x20+0x07)++0x00
|
|
line.byte 0x00 "P4REN,Port 4 Pullup or Pulldown Resistor Enable Register"
|
|
bitfld.byte 0x00 7. " P4REN7 ,Port 4 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P4REN6 ,Port 4 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P4REN5 ,Port 4 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P4REN4 ,Port 4 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P4REN3 ,Port 4 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P4REN2 ,Port 4 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P4REN1 ,Port 4 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P4REN0 ,Port 4 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
group.byte (0x20+0x09)++0x00
|
|
line.byte 0x00 "P4DS,Port 4 Drive Strength Selection Register"
|
|
bitfld.byte 0x00 7. " P4DS7 ,Port 4 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 6. " P4DS6 ,Port 4 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P4DS5 ,Port 4 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 4. " P4DS4 ,Port 4 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P4DS3 ,Port 4 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 2. " P4DS2 ,Port 4 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 1. " P4DS1 ,Port 4 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 0. " P4DS0 ,Port 4 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
group.byte (0x20+0x0B)++0x00
|
|
line.byte 0x00 "P4SEL0,Port 4 Function Selection Register"
|
|
bitfld.byte 0x00 7. " P4SEL7 ,Port function selection 7" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 6. " P4SEL6 ,Port function selection 6" "GPIO/Secondary,Primary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P4SEL5 ,Port function selection 5" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 4. " P4SEL4 ,Port function selection 4" "GPIO/Secondary,Primary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P4SEL3 ,Port function selection 3" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 2. " P4SEL2 ,Port function selection 2" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 1. " P4SEL1 ,Port function selection 1" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 0. " P4SEL0 ,Port function selection 0" "GPIO/Secondary,Primary/Tertiary"
|
|
group.byte (0x20+0x0D)++0x00
|
|
line.byte 0x00 "P4SEL1,Port 4 Function Selection Register"
|
|
bitfld.byte 0x00 7. " P4SEL7 ,Port function selection 7" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 6. " P4SEL6 ,Port function selection 6" "GPIO/Primary,Secondary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P4SEL5 ,Port function selection 5" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 4. " P4SEL4 ,Port function selection 4" "GPIO/Primary,Secondary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P4SEL3 ,Port function selection 3" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 2. " P4SEL2 ,Port function selection 2" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 1. " P4SEL1 ,Port function selection 1" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 0. " P4SEL0 ,Port function selection 0" "GPIO/Primary,Secondary/Tertiary"
|
|
group.byte (0x20+0x17)++0x00
|
|
line.byte 0x00 "P4SELC,Port 4 Complement Selection Register"
|
|
bitfld.byte 0x00 7. " P4SELC7 ,Port 4 Port selection complement 7" "0,1"
|
|
bitfld.byte 0x00 6. " P4SELC6 ,Port 4 Port selection complement 6" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P4SELC5 ,Port 4 Port selection complement 5" "0,1"
|
|
bitfld.byte 0x00 4. " P4SELC4 ,Port 4 Port selection complement 4" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P4SELC3 ,Port 4 Port selection complement 3" "0,1"
|
|
bitfld.byte 0x00 2. " P4SELC2 ,Port 4 Port selection complement 2" "0,1"
|
|
bitfld.byte 0x00 1. " P4SELC1 ,Port 4 Port selection complement 1" "0,1"
|
|
bitfld.byte 0x00 0. " P4SELC0 ,Port 4 Port selection complement 0" "0,1"
|
|
group.byte (0x20+0x19)++0x00
|
|
line.byte 0x00 "P4IES,Port 4 Interrupt Edge Select Register"
|
|
bitfld.byte 0x00 7. " P4IES7 ,Port 4 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 6. " P4IES6 ,Port 4 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P4IES5 ,Port 4 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 4. " P4IES4 ,Port 4 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P4IES3 ,Port 4 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 2. " P4IES2 ,Port 4 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 1. " P4IES1 ,Port 4 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 0. " P4IES0 ,Port 4 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
group.byte (0x20+0x1B)++0x00
|
|
line.byte 0x00 "P4IE,Port 4 Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " P4IE7 ,Port 4 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P4IE6 ,Port 4 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P4IE5 ,Port 4 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P4IE4 ,Port 4 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P4IE3 ,Port 4 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P4IE2 ,Port 4 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P4IE1 ,Port 4 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P4IE0 ,Port 4 interrupt enable" "Disabled,Enabled"
|
|
group.byte (0x20+0x1D)++0x00
|
|
line.byte 0x00 "P4IFG,Port 4 Interrupt Flag Register"
|
|
bitfld.byte 0x00 7. " P4IFG7 ,Port 4 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 6. " P4IFG6 ,Port 4 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P4IFG5 ,Port 4 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " P4IFG4 ,Port 4 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P4IFG3 ,Port 4 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " P4IFG2 ,Port 4 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " P4IFG1 ,Port 4 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " P4IFG0 ,Port 4 interrupt flag" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "PORT 5"
|
|
rgroup.byte 0x40++0x00
|
|
line.byte 0x00 "P5IN,Port 5 Input Register"
|
|
bitfld.byte 0x00 7. " P5IN7 ,Port 5 input" "Low,High"
|
|
bitfld.byte 0x00 6. " P5IN6 ,Port 5 input" "Low,High"
|
|
bitfld.byte 0x00 5. " P5IN5 ,Port 5 input" "Low,High"
|
|
bitfld.byte 0x00 4. " P5IN4 ,Port 5 input" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P5IN3 ,Port 5 input" "Low,High"
|
|
bitfld.byte 0x00 2. " P5IN2 ,Port 5 input" "Low,High"
|
|
bitfld.byte 0x00 1. " P5IN1 ,Port 5 input" "Low,High"
|
|
bitfld.byte 0x00 0. " P5IN0 ,Port 5 input" "Low,High"
|
|
group.byte (0x40+0x02)++0x00
|
|
line.byte 0x00 "P5OUT,Port 5 Output Register"
|
|
bitfld.byte 0x00 7. " P5OUT7 ,Port 5 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 6. " P5OUT6 ,Port 5 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 5. " P5OUT5 ,Port 5 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 4. " P5OUT4 ,Port 5 Output" "Low/Pulldown,High/Pullup"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P5OUT3 ,Port 5 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 2. " P5OUT2 ,Port 5 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 1. " P5OUT1 ,Port 5 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 0. " P5OUT0 ,Port 5 Output" "Low/Pulldown,High/Pullup"
|
|
group.byte (0x40+0x04)++0x00
|
|
line.byte 0x00 "P5DIR,Port 5 Direction Register"
|
|
bitfld.byte 0x00 7. " P5DIR7 ,Port 5 direction" "Input,Output"
|
|
bitfld.byte 0x00 6. " P5DIR6 ,Port 5 direction" "Input,Output"
|
|
bitfld.byte 0x00 5. " P5DIR5 ,Port 5 direction" "Input,Output"
|
|
bitfld.byte 0x00 4. " P5DIR4 ,Port 5 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P5DIR3 ,Port 5 direction" "Input,Output"
|
|
bitfld.byte 0x00 2. " P5DIR2 ,Port 5 direction" "Input,Output"
|
|
bitfld.byte 0x00 1. " P5DIR1 ,Port 5 direction" "Input,Output"
|
|
bitfld.byte 0x00 0. " P5DIR0 ,Port 5 direction" "Input,Output"
|
|
group.byte (0x40+0x06)++0x00
|
|
line.byte 0x00 "P5REN,Port 5 Pullup or Pulldown Resistor Enable Register"
|
|
bitfld.byte 0x00 7. " P5REN7 ,Port 5 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P5REN6 ,Port 5 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P5REN5 ,Port 5 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P5REN4 ,Port 5 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P5REN3 ,Port 5 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P5REN2 ,Port 5 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P5REN1 ,Port 5 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P5REN0 ,Port 5 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
group.byte (0x40+0x08)++0x00
|
|
line.byte 0x00 "P5DS,Port 5 Drive Strength Selection Register"
|
|
bitfld.byte 0x00 7. " P5DS7 ,Port 5 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 6. " P5DS6 ,Port 5 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 5. " P5DS5 ,Port 5 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 4. " P5DS4 ,Port 5 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P5DS3 ,Port 5 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 2. " P5DS2 ,Port 5 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 1. " P5DS1 ,Port 5 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 0. " P5DS0 ,Port 5 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
group.byte (0x40+0x0A)++0x00
|
|
line.byte 0x00 "P5SEL0,Port 5 Function Selection Register"
|
|
bitfld.byte 0x00 7. " P5SEL7 ,Port function selection 7" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 6. " P5SEL6 ,Port function selection 6" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 5. " P5SEL5 ,Port function selection 5" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 4. " P5SEL4 ,Port function selection 4" "GPIO/Secondary,Primary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P5SEL3 ,Port function selection 3" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 2. " P5SEL2 ,Port function selection 2" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 1. " P5SEL1 ,Port function selection 1" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 0. " P5SEL0 ,Port function selection 0" "GPIO/Secondary,Primary/Tertiary"
|
|
group.byte (0x40+0x0C)++0x00
|
|
line.byte 0x00 "P5SEL1,Port 5 Function Selection Register"
|
|
bitfld.byte 0x00 7. " P5SEL7 ,Port function selection 7" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 6. " P5SEL6 ,Port function selection 6" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 5. " P5SEL5 ,Port function selection 5" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 4. " P5SEL4 ,Port function selection 4" "GPIO/Primary,Secondary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P5SEL3 ,Port function selection 3" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 2. " P5SEL2 ,Port function selection 2" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 1. " P5SEL1 ,Port function selection 1" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 0. " P5SEL0 ,Port function selection 0" "GPIO/Primary,Secondary/Tertiary"
|
|
group.byte (0x40+0x16)++0x00
|
|
line.byte 0x00 "P5SELC,Port 5 Complement Selection Register"
|
|
bitfld.byte 0x00 7. " P5SELC7 ,Port 5 Port selection complement 7" "0,1"
|
|
bitfld.byte 0x00 6. " P5SELC6 ,Port 5 Port selection complement 6" "0,1"
|
|
bitfld.byte 0x00 5. " P5SELC5 ,Port 5 Port selection complement 5" "0,1"
|
|
bitfld.byte 0x00 4. " P5SELC4 ,Port 5 Port selection complement 4" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P5SELC3 ,Port 5 Port selection complement 3" "0,1"
|
|
bitfld.byte 0x00 2. " P5SELC2 ,Port 5 Port selection complement 2" "0,1"
|
|
bitfld.byte 0x00 1. " P5SELC1 ,Port 5 Port selection complement 1" "0,1"
|
|
bitfld.byte 0x00 0. " P5SELC0 ,Port 5 Port selection complement 0" "0,1"
|
|
group.byte (0x40+0x18)++0x00
|
|
line.byte 0x00 "P5IES,Port 5 Interrupt Edge Select Register"
|
|
bitfld.byte 0x00 7. " P5IES7 ,Port 5 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 6. " P5IES6 ,Port 5 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 5. " P5IES5 ,Port 5 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 4. " P5IES4 ,Port 5 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P5IES3 ,Port 5 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 2. " P5IES2 ,Port 5 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 1. " P5IES1 ,Port 5 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 0. " P5IES0 ,Port 5 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
group.byte (0x40+0x1A)++0x00
|
|
line.byte 0x00 "P5IE,Port 5 Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " P5IE7 ,Port 5 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P5IE6 ,Port 5 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P5IE5 ,Port 5 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P5IE4 ,Port 5 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P5IE3 ,Port 5 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P5IE2 ,Port 5 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P5IE1 ,Port 5 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P5IE0 ,Port 5 interrupt enable" "Disabled,Enabled"
|
|
group.byte (0x40+0x1C)++0x00
|
|
line.byte 0x00 "P5IFG,Port 5 Interrupt Flag Register"
|
|
bitfld.byte 0x00 7. " P5IFG7 ,Port 5 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 6. " P5IFG6 ,Port 5 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 5. " P5IFG5 ,Port 5 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " P5IFG4 ,Port 5 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P5IFG3 ,Port 5 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " P5IFG2 ,Port 5 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " P5IFG1 ,Port 5 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " P5IFG0 ,Port 5 interrupt flag" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "PORT 6"
|
|
rgroup.byte (0x40+0x01)++0x00
|
|
line.byte 0x00 "P6IN,Port 6 Input Register"
|
|
bitfld.byte 0x00 7. " P6IN7 ,Port 6 input" "Low,High"
|
|
bitfld.byte 0x00 6. " P6IN6 ,Port 6 input" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P6IN5 ,Port 6 input" "Low,High"
|
|
bitfld.byte 0x00 4. " P6IN4 ,Port 6 input" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P6IN3 ,Port 6 input" "Low,High"
|
|
bitfld.byte 0x00 2. " P6IN2 ,Port 6 input" "Low,High"
|
|
bitfld.byte 0x00 1. " P6IN1 ,Port 6 input" "Low,High"
|
|
bitfld.byte 0x00 0. " P6IN0 ,Port 6 input" "Low,High"
|
|
group.byte (0x40+0x03)++0x00
|
|
line.byte 0x00 "P6OUT,Port 6 Output Register"
|
|
bitfld.byte 0x00 7. " P6OUT7 ,Port 6 Output" "Low,High"
|
|
bitfld.byte 0x00 6. " P6OUT6 ,Port 6 Output" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P6OUT5 ,Port 6 Output" "Low,High"
|
|
bitfld.byte 0x00 4. " P6OUT4 ,Port 6 Output" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P6OUT3 ,Port 6 Output" "Low,High"
|
|
bitfld.byte 0x00 2. " P6OUT2 ,Port 6 Output" "Low,High"
|
|
bitfld.byte 0x00 1. " P6OUT1 ,Port 6 Output" "Low,High"
|
|
bitfld.byte 0x00 0. " P6OUT0 ,Port 6 Output" "Low,High"
|
|
group.byte (0x40+0x05)++0x00
|
|
line.byte 0x00 "P6DIR,Port 6 Direction Register"
|
|
bitfld.byte 0x00 7. " P6DIR7 ,Port 6 direction" "Input,Output"
|
|
bitfld.byte 0x00 6. " P6DIR6 ,Port 6 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P6DIR5 ,Port 6 direction" "Input,Output"
|
|
bitfld.byte 0x00 4. " P6DIR4 ,Port 6 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P6DIR3 ,Port 6 direction" "Input,Output"
|
|
bitfld.byte 0x00 2. " P6DIR2 ,Port 6 direction" "Input,Output"
|
|
bitfld.byte 0x00 1. " P6DIR1 ,Port 6 direction" "Input,Output"
|
|
bitfld.byte 0x00 0. " P6DIR0 ,Port 6 direction" "Input,Output"
|
|
group.byte (0x40+0x07)++0x00
|
|
line.byte 0x00 "P6REN,Port 6 Pullup or Pulldown Resistor Enable Register"
|
|
bitfld.byte 0x00 7. " P6REN7 ,Port 6 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P6REN6 ,Port 6 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P6REN5 ,Port 6 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P6REN4 ,Port 6 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P6REN3 ,Port 6 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P6REN2 ,Port 6 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P6REN1 ,Port 6 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P6REN0 ,Port 6 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
group.byte (0x40+0x09)++0x00
|
|
line.byte 0x00 "P6DS,Port 6 Drive Strength Selection Register"
|
|
bitfld.byte 0x00 7. " P6DS7 ,Port 6 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 6. " P6DS6 ,Port 6 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P6DS5 ,Port 6 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 4. " P6DS4 ,Port 6 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P6DS3 ,Port 6 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 2. " P6DS2 ,Port 6 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 1. " P6DS1 ,Port 6 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 0. " P6DS0 ,Port 6 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
group.byte (0x40+0x0B)++0x00
|
|
line.byte 0x00 "P6SEL0,Port 6 Function Selection Register"
|
|
bitfld.byte 0x00 7. " P6SEL7 ,Port function selection 7" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 6. " P6SEL6 ,Port function selection 6" "GPIO/Secondary,Primary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P6SEL5 ,Port function selection 5" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 4. " P6SEL4 ,Port function selection 4" "GPIO/Secondary,Primary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P6SEL3 ,Port function selection 3" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 2. " P6SEL2 ,Port function selection 2" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 1. " P6SEL1 ,Port function selection 1" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 0. " P6SEL0 ,Port function selection 0" "GPIO/Secondary,Primary/Tertiary"
|
|
group.byte (0x40+0x0D)++0x00
|
|
line.byte 0x00 "P6SEL1,Port 6 Function Selection Register"
|
|
bitfld.byte 0x00 7. " P6SEL7 ,Port function selection 7" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 6. " P6SEL6 ,Port function selection 6" "GPIO/Primary,Secondary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P6SEL5 ,Port function selection 5" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 4. " P6SEL4 ,Port function selection 4" "GPIO/Primary,Secondary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P6SEL3 ,Port function selection 3" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 2. " P6SEL2 ,Port function selection 2" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 1. " P6SEL1 ,Port function selection 1" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 0. " P6SEL0 ,Port function selection 0" "GPIO/Primary,Secondary/Tertiary"
|
|
group.byte (0x40+0x17)++0x00
|
|
line.byte 0x00 "P6SELC,Port 6 Complement Selection Register"
|
|
bitfld.byte 0x00 7. " P6SELC7 ,Port 6 Port selection complement 7" "0,1"
|
|
bitfld.byte 0x00 6. " P6SELC6 ,Port 6 Port selection complement 6" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P6SELC5 ,Port 6 Port selection complement 5" "0,1"
|
|
bitfld.byte 0x00 4. " P6SELC4 ,Port 6 Port selection complement 4" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P6SELC3 ,Port 6 Port selection complement 3" "0,1"
|
|
bitfld.byte 0x00 2. " P6SELC2 ,Port 6 Port selection complement 2" "0,1"
|
|
bitfld.byte 0x00 1. " P6SELC1 ,Port 6 Port selection complement 1" "0,1"
|
|
bitfld.byte 0x00 0. " P6SELC0 ,Port 6 Port selection complement 0" "0,1"
|
|
group.byte (0x40+0x19)++0x00
|
|
line.byte 0x00 "P6IES,Port 6 Interrupt Edge Select Register"
|
|
bitfld.byte 0x00 7. " P6IES7 ,Port 6 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 6. " P6IES6 ,Port 6 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P6IES5 ,Port 6 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 4. " P6IES4 ,Port 6 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P6IES3 ,Port 6 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 2. " P6IES2 ,Port 6 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 1. " P6IES1 ,Port 6 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 0. " P6IES0 ,Port 6 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
group.byte (0x40+0x1B)++0x00
|
|
line.byte 0x00 "P6IE,Port 6 Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " P6IE7 ,Port 6 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P6IE6 ,Port 6 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P6IE5 ,Port 6 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P6IE4 ,Port 6 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P6IE3 ,Port 6 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P6IE2 ,Port 6 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P6IE1 ,Port 6 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P6IE0 ,Port 6 interrupt enable" "Disabled,Enabled"
|
|
group.byte (0x40+0x1D)++0x00
|
|
line.byte 0x00 "P6IFG,Port 6 Interrupt Flag Register"
|
|
bitfld.byte 0x00 7. " P6IFG7 ,Port 6 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 6. " P6IFG6 ,Port 6 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P6IFG5 ,Port 6 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " P6IFG4 ,Port 6 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P6IFG3 ,Port 6 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " P6IFG2 ,Port 6 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " P6IFG1 ,Port 6 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " P6IFG0 ,Port 6 interrupt flag" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "PORT 7"
|
|
rgroup.byte 0x60++0x00
|
|
line.byte 0x00 "P7IN,Port 7 Input Register"
|
|
bitfld.byte 0x00 7. " P7IN7 ,Port 7 input" "Low,High"
|
|
bitfld.byte 0x00 6. " P7IN6 ,Port 7 input" "Low,High"
|
|
bitfld.byte 0x00 5. " P7IN5 ,Port 7 input" "Low,High"
|
|
bitfld.byte 0x00 4. " P7IN4 ,Port 7 input" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P7IN3 ,Port 7 input" "Low,High"
|
|
bitfld.byte 0x00 2. " P7IN2 ,Port 7 input" "Low,High"
|
|
bitfld.byte 0x00 1. " P7IN1 ,Port 7 input" "Low,High"
|
|
bitfld.byte 0x00 0. " P7IN0 ,Port 7 input" "Low,High"
|
|
group.byte (0x60+0x02)++0x00
|
|
line.byte 0x00 "P7OUT,Port 7 Output Register"
|
|
bitfld.byte 0x00 7. " P7OUT7 ,Port 7 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 6. " P7OUT6 ,Port 7 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 5. " P7OUT5 ,Port 7 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 4. " P7OUT4 ,Port 7 Output" "Low/Pulldown,High/Pullup"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P7OUT3 ,Port 7 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 2. " P7OUT2 ,Port 7 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 1. " P7OUT1 ,Port 7 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 0. " P7OUT0 ,Port 7 Output" "Low/Pulldown,High/Pullup"
|
|
group.byte (0x60+0x04)++0x00
|
|
line.byte 0x00 "P7DIR,Port 7 Direction Register"
|
|
bitfld.byte 0x00 7. " P7DIR7 ,Port 7 direction" "Input,Output"
|
|
bitfld.byte 0x00 6. " P7DIR6 ,Port 7 direction" "Input,Output"
|
|
bitfld.byte 0x00 5. " P7DIR5 ,Port 7 direction" "Input,Output"
|
|
bitfld.byte 0x00 4. " P7DIR4 ,Port 7 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P7DIR3 ,Port 7 direction" "Input,Output"
|
|
bitfld.byte 0x00 2. " P7DIR2 ,Port 7 direction" "Input,Output"
|
|
bitfld.byte 0x00 1. " P7DIR1 ,Port 7 direction" "Input,Output"
|
|
bitfld.byte 0x00 0. " P7DIR0 ,Port 7 direction" "Input,Output"
|
|
group.byte (0x60+0x06)++0x00
|
|
line.byte 0x00 "P7REN,Port 7 Pullup or Pulldown Resistor Enable Register"
|
|
bitfld.byte 0x00 7. " P7REN7 ,Port 7 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P7REN6 ,Port 7 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P7REN5 ,Port 7 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P7REN4 ,Port 7 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P7REN3 ,Port 7 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P7REN2 ,Port 7 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P7REN1 ,Port 7 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P7REN0 ,Port 7 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
group.byte (0x60+0x08)++0x00
|
|
line.byte 0x00 "P7DS,Port 7 Drive Strength Selection Register"
|
|
bitfld.byte 0x00 7. " P7DS7 ,Port 7 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 6. " P7DS6 ,Port 7 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 5. " P7DS5 ,Port 7 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 4. " P7DS4 ,Port 7 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P7DS3 ,Port 7 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 2. " P7DS2 ,Port 7 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 1. " P7DS1 ,Port 7 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 0. " P7DS0 ,Port 7 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
group.byte (0x60+0x0A)++0x00
|
|
line.byte 0x00 "P7SEL0,Port 7 Function Selection Register"
|
|
bitfld.byte 0x00 7. " P7SEL7 ,Port function selection 7" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 6. " P7SEL6 ,Port function selection 6" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 5. " P7SEL5 ,Port function selection 5" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 4. " P7SEL4 ,Port function selection 4" "GPIO/Secondary,Primary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P7SEL3 ,Port function selection 3" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 2. " P7SEL2 ,Port function selection 2" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 1. " P7SEL1 ,Port function selection 1" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 0. " P7SEL0 ,Port function selection 0" "GPIO/Secondary,Primary/Tertiary"
|
|
group.byte (0x60+0x0C)++0x00
|
|
line.byte 0x00 "P7SEL1,Port 7 Function Selection Register"
|
|
bitfld.byte 0x00 7. " P7SEL7 ,Port function selection 7" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 6. " P7SEL6 ,Port function selection 6" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 5. " P7SEL5 ,Port function selection 5" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 4. " P7SEL4 ,Port function selection 4" "GPIO/Primary,Secondary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P7SEL3 ,Port function selection 3" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 2. " P7SEL2 ,Port function selection 2" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 1. " P7SEL1 ,Port function selection 1" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 0. " P7SEL0 ,Port function selection 0" "GPIO/Primary,Secondary/Tertiary"
|
|
group.byte (0x60+0x16)++0x00
|
|
line.byte 0x00 "P7SELC,Port 7 Complement Selection Register"
|
|
bitfld.byte 0x00 7. " P7SELC7 ,Port 7 Port selection complement 7" "0,1"
|
|
bitfld.byte 0x00 6. " P7SELC6 ,Port 7 Port selection complement 6" "0,1"
|
|
bitfld.byte 0x00 5. " P7SELC5 ,Port 7 Port selection complement 5" "0,1"
|
|
bitfld.byte 0x00 4. " P7SELC4 ,Port 7 Port selection complement 4" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P7SELC3 ,Port 7 Port selection complement 3" "0,1"
|
|
bitfld.byte 0x00 2. " P7SELC2 ,Port 7 Port selection complement 2" "0,1"
|
|
bitfld.byte 0x00 1. " P7SELC1 ,Port 7 Port selection complement 1" "0,1"
|
|
bitfld.byte 0x00 0. " P7SELC0 ,Port 7 Port selection complement 0" "0,1"
|
|
group.byte (0x60+0x18)++0x00
|
|
line.byte 0x00 "P7IES,Port 7 Interrupt Edge Select Register"
|
|
bitfld.byte 0x00 7. " P7IES7 ,Port 7 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 6. " P7IES6 ,Port 7 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 5. " P7IES5 ,Port 7 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 4. " P7IES4 ,Port 7 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P7IES3 ,Port 7 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 2. " P7IES2 ,Port 7 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 1. " P7IES1 ,Port 7 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 0. " P7IES0 ,Port 7 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
group.byte (0x60+0x1A)++0x00
|
|
line.byte 0x00 "P7IE,Port 7 Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " P7IE7 ,Port 7 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P7IE6 ,Port 7 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P7IE5 ,Port 7 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P7IE4 ,Port 7 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P7IE3 ,Port 7 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P7IE2 ,Port 7 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P7IE1 ,Port 7 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P7IE0 ,Port 7 interrupt enable" "Disabled,Enabled"
|
|
group.byte (0x60+0x1C)++0x00
|
|
line.byte 0x00 "P7IFG,Port 7 Interrupt Flag Register"
|
|
bitfld.byte 0x00 7. " P7IFG7 ,Port 7 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 6. " P7IFG6 ,Port 7 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 5. " P7IFG5 ,Port 7 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " P7IFG4 ,Port 7 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P7IFG3 ,Port 7 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " P7IFG2 ,Port 7 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " P7IFG1 ,Port 7 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " P7IFG0 ,Port 7 interrupt flag" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "PORT 8"
|
|
rgroup.byte (0x60+0x01)++0x00
|
|
line.byte 0x00 "P8IN,Port 8 Input Register"
|
|
bitfld.byte 0x00 7. " P8IN7 ,Port 8 input" "Low,High"
|
|
bitfld.byte 0x00 6. " P8IN6 ,Port 8 input" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P8IN5 ,Port 8 input" "Low,High"
|
|
bitfld.byte 0x00 4. " P8IN4 ,Port 8 input" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P8IN3 ,Port 8 input" "Low,High"
|
|
bitfld.byte 0x00 2. " P8IN2 ,Port 8 input" "Low,High"
|
|
bitfld.byte 0x00 1. " P8IN1 ,Port 8 input" "Low,High"
|
|
bitfld.byte 0x00 0. " P8IN0 ,Port 8 input" "Low,High"
|
|
group.byte (0x60+0x03)++0x00
|
|
line.byte 0x00 "P8OUT,Port 8 Output Register"
|
|
bitfld.byte 0x00 7. " P8OUT7 ,Port 8 Output" "Low,High"
|
|
bitfld.byte 0x00 6. " P8OUT6 ,Port 8 Output" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P8OUT5 ,Port 8 Output" "Low,High"
|
|
bitfld.byte 0x00 4. " P8OUT4 ,Port 8 Output" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P8OUT3 ,Port 8 Output" "Low,High"
|
|
bitfld.byte 0x00 2. " P8OUT2 ,Port 8 Output" "Low,High"
|
|
bitfld.byte 0x00 1. " P8OUT1 ,Port 8 Output" "Low,High"
|
|
bitfld.byte 0x00 0. " P8OUT0 ,Port 8 Output" "Low,High"
|
|
group.byte (0x60+0x05)++0x00
|
|
line.byte 0x00 "P8DIR,Port 8 Direction Register"
|
|
bitfld.byte 0x00 7. " P8DIR7 ,Port 8 direction" "Input,Output"
|
|
bitfld.byte 0x00 6. " P8DIR6 ,Port 8 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P8DIR5 ,Port 8 direction" "Input,Output"
|
|
bitfld.byte 0x00 4. " P8DIR4 ,Port 8 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P8DIR3 ,Port 8 direction" "Input,Output"
|
|
bitfld.byte 0x00 2. " P8DIR2 ,Port 8 direction" "Input,Output"
|
|
bitfld.byte 0x00 1. " P8DIR1 ,Port 8 direction" "Input,Output"
|
|
bitfld.byte 0x00 0. " P8DIR0 ,Port 8 direction" "Input,Output"
|
|
group.byte (0x60+0x07)++0x00
|
|
line.byte 0x00 "P8REN,Port 8 Pullup or Pulldown Resistor Enable Register"
|
|
bitfld.byte 0x00 7. " P8REN7 ,Port 8 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P8REN6 ,Port 8 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P8REN5 ,Port 8 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P8REN4 ,Port 8 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P8REN3 ,Port 8 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P8REN2 ,Port 8 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P8REN1 ,Port 8 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P8REN0 ,Port 8 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
group.byte (0x60+0x09)++0x00
|
|
line.byte 0x00 "P8DS,Port 8 Drive Strength Selection Register"
|
|
bitfld.byte 0x00 7. " P8DS7 ,Port 8 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 6. " P8DS6 ,Port 8 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P8DS5 ,Port 8 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 4. " P8DS4 ,Port 8 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P8DS3 ,Port 8 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 2. " P8DS2 ,Port 8 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 1. " P8DS1 ,Port 8 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 0. " P8DS0 ,Port 8 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
group.byte (0x60+0x0B)++0x00
|
|
line.byte 0x00 "P8SEL0,Port 8 Function Selection Register"
|
|
bitfld.byte 0x00 7. " P8SEL7 ,Port function selection 7" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 6. " P8SEL6 ,Port function selection 6" "GPIO/Secondary,Primary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P8SEL5 ,Port function selection 5" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 4. " P8SEL4 ,Port function selection 4" "GPIO/Secondary,Primary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P8SEL3 ,Port function selection 3" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 2. " P8SEL2 ,Port function selection 2" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 1. " P8SEL1 ,Port function selection 1" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 0. " P8SEL0 ,Port function selection 0" "GPIO/Secondary,Primary/Tertiary"
|
|
group.byte (0x60+0x0D)++0x00
|
|
line.byte 0x00 "P8SEL1,Port 8 Function Selection Register"
|
|
bitfld.byte 0x00 7. " P8SEL7 ,Port function selection 7" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 6. " P8SEL6 ,Port function selection 6" "GPIO/Primary,Secondary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P8SEL5 ,Port function selection 5" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 4. " P8SEL4 ,Port function selection 4" "GPIO/Primary,Secondary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P8SEL3 ,Port function selection 3" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 2. " P8SEL2 ,Port function selection 2" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 1. " P8SEL1 ,Port function selection 1" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 0. " P8SEL0 ,Port function selection 0" "GPIO/Primary,Secondary/Tertiary"
|
|
group.byte (0x60+0x17)++0x00
|
|
line.byte 0x00 "P8SELC,Port 8 Complement Selection Register"
|
|
bitfld.byte 0x00 7. " P8SELC7 ,Port 8 Port selection complement 7" "0,1"
|
|
bitfld.byte 0x00 6. " P8SELC6 ,Port 8 Port selection complement 6" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P8SELC5 ,Port 8 Port selection complement 5" "0,1"
|
|
bitfld.byte 0x00 4. " P8SELC4 ,Port 8 Port selection complement 4" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P8SELC3 ,Port 8 Port selection complement 3" "0,1"
|
|
bitfld.byte 0x00 2. " P8SELC2 ,Port 8 Port selection complement 2" "0,1"
|
|
bitfld.byte 0x00 1. " P8SELC1 ,Port 8 Port selection complement 1" "0,1"
|
|
bitfld.byte 0x00 0. " P8SELC0 ,Port 8 Port selection complement 0" "0,1"
|
|
group.byte (0x60+0x19)++0x00
|
|
line.byte 0x00 "P8IES,Port 8 Interrupt Edge Select Register"
|
|
bitfld.byte 0x00 7. " P8IES7 ,Port 8 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 6. " P8IES6 ,Port 8 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P8IES5 ,Port 8 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 4. " P8IES4 ,Port 8 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P8IES3 ,Port 8 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 2. " P8IES2 ,Port 8 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 1. " P8IES1 ,Port 8 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 0. " P8IES0 ,Port 8 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
group.byte (0x60+0x1B)++0x00
|
|
line.byte 0x00 "P8IE,Port 8 Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " P8IE7 ,Port 8 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P8IE6 ,Port 8 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P8IE5 ,Port 8 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P8IE4 ,Port 8 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P8IE3 ,Port 8 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P8IE2 ,Port 8 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P8IE1 ,Port 8 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P8IE0 ,Port 8 interrupt enable" "Disabled,Enabled"
|
|
group.byte (0x60+0x1D)++0x00
|
|
line.byte 0x00 "P8IFG,Port 8 Interrupt Flag Register"
|
|
bitfld.byte 0x00 7. " P8IFG7 ,Port 8 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 6. " P8IFG6 ,Port 8 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " P8IFG5 ,Port 8 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " P8IFG4 ,Port 8 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P8IFG3 ,Port 8 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " P8IFG2 ,Port 8 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " P8IFG1 ,Port 8 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " P8IFG0 ,Port 8 interrupt flag" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "PORT 9"
|
|
rgroup.byte 0x80++0x00
|
|
line.byte 0x00 "P9IN,Port 9 Input Register"
|
|
bitfld.byte 0x00 7. " P9IN7 ,Port 9 input" "Low,High"
|
|
bitfld.byte 0x00 6. " P9IN6 ,Port 9 input" "Low,High"
|
|
bitfld.byte 0x00 5. " P9IN5 ,Port 9 input" "Low,High"
|
|
bitfld.byte 0x00 4. " P9IN4 ,Port 9 input" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P9IN3 ,Port 9 input" "Low,High"
|
|
bitfld.byte 0x00 2. " P9IN2 ,Port 9 input" "Low,High"
|
|
bitfld.byte 0x00 1. " P9IN1 ,Port 9 input" "Low,High"
|
|
bitfld.byte 0x00 0. " P9IN0 ,Port 9 input" "Low,High"
|
|
group.byte (0x80+0x02)++0x00
|
|
line.byte 0x00 "P9OUT,Port 9 Output Register"
|
|
bitfld.byte 0x00 7. " P9OUT7 ,Port 9 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 6. " P9OUT6 ,Port 9 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 5. " P9OUT5 ,Port 9 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 4. " P9OUT4 ,Port 9 Output" "Low/Pulldown,High/Pullup"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P9OUT3 ,Port 9 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 2. " P9OUT2 ,Port 9 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 1. " P9OUT1 ,Port 9 Output" "Low/Pulldown,High/Pullup"
|
|
bitfld.byte 0x00 0. " P9OUT0 ,Port 9 Output" "Low/Pulldown,High/Pullup"
|
|
group.byte (0x80+0x04)++0x00
|
|
line.byte 0x00 "P9DIR,Port 9 Direction Register"
|
|
bitfld.byte 0x00 7. " P9DIR7 ,Port 9 direction" "Input,Output"
|
|
bitfld.byte 0x00 6. " P9DIR6 ,Port 9 direction" "Input,Output"
|
|
bitfld.byte 0x00 5. " P9DIR5 ,Port 9 direction" "Input,Output"
|
|
bitfld.byte 0x00 4. " P9DIR4 ,Port 9 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P9DIR3 ,Port 9 direction" "Input,Output"
|
|
bitfld.byte 0x00 2. " P9DIR2 ,Port 9 direction" "Input,Output"
|
|
bitfld.byte 0x00 1. " P9DIR1 ,Port 9 direction" "Input,Output"
|
|
bitfld.byte 0x00 0. " P9DIR0 ,Port 9 direction" "Input,Output"
|
|
group.byte (0x80+0x06)++0x00
|
|
line.byte 0x00 "P9REN,Port 9 Pullup or Pulldown Resistor Enable Register"
|
|
bitfld.byte 0x00 7. " P9REN7 ,Port 9 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P9REN6 ,Port 9 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P9REN5 ,Port 9 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P9REN4 ,Port 9 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P9REN3 ,Port 9 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P9REN2 ,Port 9 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P9REN1 ,Port 9 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P9REN0 ,Port 9 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
group.byte (0x80+0x08)++0x00
|
|
line.byte 0x00 "P9DS,Port 9 Drive Strength Selection Register"
|
|
bitfld.byte 0x00 7. " P9DS7 ,Port 9 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 6. " P9DS6 ,Port 9 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 5. " P9DS5 ,Port 9 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 4. " P9DS4 ,Port 9 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P9DS3 ,Port 9 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 2. " P9DS2 ,Port 9 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 1. " P9DS1 ,Port 9 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 0. " P9DS0 ,Port 9 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
group.byte (0x80+0x0A)++0x00
|
|
line.byte 0x00 "P9SEL0,Port 9 Function Selection Register"
|
|
bitfld.byte 0x00 7. " P9SEL7 ,Port function selection 7" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 6. " P9SEL6 ,Port function selection 6" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 5. " P9SEL5 ,Port function selection 5" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 4. " P9SEL4 ,Port function selection 4" "GPIO/Secondary,Primary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P9SEL3 ,Port function selection 3" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 2. " P9SEL2 ,Port function selection 2" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 1. " P9SEL1 ,Port function selection 1" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 0. " P9SEL0 ,Port function selection 0" "GPIO/Secondary,Primary/Tertiary"
|
|
group.byte (0x80+0x0C)++0x00
|
|
line.byte 0x00 "P9SEL1,Port 9 Function Selection Register"
|
|
bitfld.byte 0x00 7. " P9SEL7 ,Port function selection 7" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 6. " P9SEL6 ,Port function selection 6" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 5. " P9SEL5 ,Port function selection 5" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 4. " P9SEL4 ,Port function selection 4" "GPIO/Primary,Secondary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P9SEL3 ,Port function selection 3" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 2. " P9SEL2 ,Port function selection 2" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 1. " P9SEL1 ,Port function selection 1" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 0. " P9SEL0 ,Port function selection 0" "GPIO/Primary,Secondary/Tertiary"
|
|
group.byte (0x80+0x16)++0x00
|
|
line.byte 0x00 "P9SELC,Port 9 Complement Selection Register"
|
|
bitfld.byte 0x00 7. " P9SELC7 ,Port 9 Port selection complement 7" "0,1"
|
|
bitfld.byte 0x00 6. " P9SELC6 ,Port 9 Port selection complement 6" "0,1"
|
|
bitfld.byte 0x00 5. " P9SELC5 ,Port 9 Port selection complement 5" "0,1"
|
|
bitfld.byte 0x00 4. " P9SELC4 ,Port 9 Port selection complement 4" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P9SELC3 ,Port 9 Port selection complement 3" "0,1"
|
|
bitfld.byte 0x00 2. " P9SELC2 ,Port 9 Port selection complement 2" "0,1"
|
|
bitfld.byte 0x00 1. " P9SELC1 ,Port 9 Port selection complement 1" "0,1"
|
|
bitfld.byte 0x00 0. " P9SELC0 ,Port 9 Port selection complement 0" "0,1"
|
|
group.byte (0x80+0x18)++0x00
|
|
line.byte 0x00 "P9IES,Port 9 Interrupt Edge Select Register"
|
|
bitfld.byte 0x00 7. " P9IES7 ,Port 9 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 6. " P9IES6 ,Port 9 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 5. " P9IES5 ,Port 9 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 4. " P9IES4 ,Port 9 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P9IES3 ,Port 9 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 2. " P9IES2 ,Port 9 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 1. " P9IES1 ,Port 9 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 0. " P9IES0 ,Port 9 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
group.byte (0x80+0x1A)++0x00
|
|
line.byte 0x00 "P9IE,Port 9 Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " P9IE7 ,Port 9 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P9IE6 ,Port 9 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P9IE5 ,Port 9 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P9IE4 ,Port 9 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P9IE3 ,Port 9 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P9IE2 ,Port 9 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P9IE1 ,Port 9 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P9IE0 ,Port 9 interrupt enable" "Disabled,Enabled"
|
|
group.byte (0x80+0x1C)++0x00
|
|
line.byte 0x00 "P9IFG,Port 9 Interrupt Flag Register"
|
|
bitfld.byte 0x00 7. " P9IFG7 ,Port 9 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 6. " P9IFG6 ,Port 9 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 5. " P9IFG5 ,Port 9 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " P9IFG4 ,Port 9 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P9IFG3 ,Port 9 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " P9IFG2 ,Port 9 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " P9IFG1 ,Port 9 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " P9IFG0 ,Port 9 interrupt flag" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "PORT 10"
|
|
rgroup.byte (0x80+0x01)++0x00
|
|
line.byte 0x00 "P10IN,Port 10 Input Register"
|
|
bitfld.byte 0x00 5. " P10IN5 ,Port 10 input" "Low,High"
|
|
bitfld.byte 0x00 4. " P10IN4 ,Port 10 input" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P10IN3 ,Port 10 input" "Low,High"
|
|
bitfld.byte 0x00 2. " P10IN2 ,Port 10 input" "Low,High"
|
|
bitfld.byte 0x00 1. " P10IN1 ,Port 10 input" "Low,High"
|
|
bitfld.byte 0x00 0. " P10IN0 ,Port 10 input" "Low,High"
|
|
group.byte (0x80+0x03)++0x00
|
|
line.byte 0x00 "P10OUT,Port 10 Output Register"
|
|
bitfld.byte 0x00 5. " P10OUT5 ,Port 10 Output" "Low,High"
|
|
bitfld.byte 0x00 4. " P10OUT4 ,Port 10 Output" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P10OUT3 ,Port 10 Output" "Low,High"
|
|
bitfld.byte 0x00 2. " P10OUT2 ,Port 10 Output" "Low,High"
|
|
bitfld.byte 0x00 1. " P10OUT1 ,Port 10 Output" "Low,High"
|
|
bitfld.byte 0x00 0. " P10OUT0 ,Port 10 Output" "Low,High"
|
|
group.byte (0x80+0x05)++0x00
|
|
line.byte 0x00 "P10DIR,Port 10 Direction Register"
|
|
bitfld.byte 0x00 5. " P10DIR5 ,Port 10 direction" "Input,Output"
|
|
bitfld.byte 0x00 4. " P10DIR4 ,Port 10 direction" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P10DIR3 ,Port 10 direction" "Input,Output"
|
|
bitfld.byte 0x00 2. " P10DIR2 ,Port 10 direction" "Input,Output"
|
|
bitfld.byte 0x00 1. " P10DIR1 ,Port 10 direction" "Input,Output"
|
|
bitfld.byte 0x00 0. " P10DIR0 ,Port 10 direction" "Input,Output"
|
|
group.byte (0x80+0x07)++0x00
|
|
line.byte 0x00 "P10REN,Port 10 Pullup or Pulldown Resistor Enable Register"
|
|
bitfld.byte 0x00 5. " P10REN5 ,Port 10 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P10REN4 ,Port 10 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P10REN3 ,Port 10 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P10REN2 ,Port 10 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P10REN1 ,Port 10 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P10REN0 ,Port 10 pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
group.byte (0x80+0x09)++0x00
|
|
line.byte 0x00 "P10DS,Port 10 Drive Strength Selection Register"
|
|
bitfld.byte 0x00 5. " P10DS5 ,Port 10 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 4. " P10DS4 ,Port 10 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P10DS3 ,Port 10 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 2. " P10DS2 ,Port 10 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 1. " P10DS1 ,Port 10 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
bitfld.byte 0x00 0. " P10DS0 ,Port 10 drive strength selection (for high drive strength I/Os)" "Regular,High"
|
|
group.byte (0x80+0x0B)++0x00
|
|
line.byte 0x00 "P10SEL0,Port 10 Function Selection Register"
|
|
bitfld.byte 0x00 5. " P10SEL5 ,Port function selection 5" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 4. " P10SEL4 ,Port function selection 4" "GPIO/Secondary,Primary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P10SEL3 ,Port function selection 3" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 2. " P10SEL2 ,Port function selection 2" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 1. " P10SEL1 ,Port function selection 1" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 0. " P10SEL0 ,Port function selection 0" "GPIO/Secondary,Primary/Tertiary"
|
|
group.byte (0x80+0x0D)++0x00
|
|
line.byte 0x00 "P10SEL1,Port 10 Function Selection Register"
|
|
bitfld.byte 0x00 5. " P10SEL5 ,Port function selection 5" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 4. " P10SEL4 ,Port function selection 4" "GPIO/Primary,Secondary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P10SEL3 ,Port function selection 3" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 2. " P10SEL2 ,Port function selection 2" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 1. " P10SEL1 ,Port function selection 1" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 0. " P10SEL0 ,Port function selection 0" "GPIO/Primary,Secondary/Tertiary"
|
|
group.byte (0x80+0x17)++0x00
|
|
line.byte 0x00 "P10SELC,Port 10 Complement Selection Register"
|
|
bitfld.byte 0x00 5. " P10SELC5 ,Port 10 Port selection complement 5" "0,1"
|
|
bitfld.byte 0x00 4. " P10SELC4 ,Port 10 Port selection complement 4" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P10SELC3 ,Port 10 Port selection complement 3" "0,1"
|
|
bitfld.byte 0x00 2. " P10SELC2 ,Port 10 Port selection complement 2" "0,1"
|
|
bitfld.byte 0x00 1. " P10SELC1 ,Port 10 Port selection complement 1" "0,1"
|
|
bitfld.byte 0x00 0. " P10SELC0 ,Port 10 Port selection complement 0" "0,1"
|
|
group.byte (0x80+0x19)++0x00
|
|
line.byte 0x00 "P10IES,Port 10 Interrupt Edge Select Register"
|
|
bitfld.byte 0x00 5. " P10IES5 ,Port 10 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 4. " P10IES4 ,Port 10 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P10IES3 ,Port 10 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 2. " P10IES2 ,Port 10 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 1. " P10IES1 ,Port 10 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
bitfld.byte 0x00 0. " P10IES0 ,Port 10 interrupt Edge Select" "Low-to-high,High-to-low"
|
|
group.byte (0x80+0x1B)++0x00
|
|
line.byte 0x00 "P10IE,Port 10 Interrupt Enable Register"
|
|
bitfld.byte 0x00 5. " P10IE5 ,Port 10 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P10IE4 ,Port 10 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P10IE3 ,Port 10 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P10IE2 ,Port 10 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P10IE1 ,Port 10 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P10IE0 ,Port 10 interrupt enable" "Disabled,Enabled"
|
|
group.byte (0x80+0x1D)++0x00
|
|
line.byte 0x00 "P10IFG,Port 10 Interrupt Flag Register"
|
|
bitfld.byte 0x00 5. " P10IFG5 ,Port 10 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " P10IFG4 ,Port 10 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P10IFG3 ,Port 10 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " P10IFG2 ,Port 10 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " P10IFG1 ,Port 10 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " P10IFG0 ,Port 10 interrupt flag" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "PORT J"
|
|
rgroup.byte 0x120++0x00
|
|
line.byte 0x00 "PJIN,Port J Input Register"
|
|
bitfld.byte 0x00 5. " PJIN5 ,Port J input" "Low,High"
|
|
bitfld.byte 0x00 4. " PJIN4 ,Port J input" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PJIN3 ,Port J input" "Low,High"
|
|
bitfld.byte 0x00 2. " PJIN2 ,Port J input" "Low,High"
|
|
bitfld.byte 0x00 1. " PJIN1 ,Port J input" "Low,High"
|
|
bitfld.byte 0x00 0. " PJIN0 ,Port J input" "Low,High"
|
|
group.byte 0x122++0x00
|
|
line.byte 0x00 "PJOUT,Port J Output Register"
|
|
bitfld.byte 0x00 5. " PJIN5 ,Port J Output" "Low,High"
|
|
bitfld.byte 0x00 4. " PJIN4 ,Port J Output" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PJIN3 ,Port J Output" "Low,High"
|
|
bitfld.byte 0x00 2. " PJIN2 ,Port J Output" "Low,High"
|
|
bitfld.byte 0x00 1. " PJIN1 ,Port J Output" "Low,High"
|
|
bitfld.byte 0x00 0. " PJIN0 ,Port J Output" "Low,High"
|
|
group.byte 0x124++0x00
|
|
line.byte 0x00 "PJDIR,Port J Direction Register"
|
|
bitfld.byte 0x00 5. " PJDIR5 ,Port J direction" "Input,Output"
|
|
bitfld.byte 0x00 4. " PJDIR4 ,Port J direction" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PJDIR3 ,Port J direction" "Input,Output"
|
|
bitfld.byte 0x00 2. " PJDIR2 ,Port J direction" "Input,Output"
|
|
bitfld.byte 0x00 1. " PJDIR1 ,Port J direction" "Input,Output"
|
|
bitfld.byte 0x00 0. " PJDIR0 ,Port J direction" "Input,Output"
|
|
group.byte 0x126++0x00
|
|
line.byte 0x00 "PJREN,Port J Pullup or Pulldown Resistor Enable Register"
|
|
bitfld.byte 0x00 5. " PJREN5 ,Port J pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " PJREN4 ,Port J pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PJREN3 ,Port J pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " PJREN2 ,Port J pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " PJREN1 ,Port J pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " PJREN0 ,Port J pullup or pulldown resistor enable" "Disabled,Enabled"
|
|
group.byte 0x12A++0x00
|
|
line.byte 0x00 "PJSEL0,Port J Function Selection Register"
|
|
bitfld.byte 0x00 5. " P0SEL5 ,Port function selection 5" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 4. " P0SEL4 ,Port function selection 4" "GPIO/Secondary,Primary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P0SEL3 ,Port function selection 3" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 2. " P0SEL2 ,Port function selection 2" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 1. " P0SEL1 ,Port function selection 1" "GPIO/Secondary,Primary/Tertiary"
|
|
bitfld.byte 0x00 0. " P0SEL0 ,Port function selection 0" "GPIO/Secondary,Primary/Tertiary"
|
|
group.byte 0x12C++0x00
|
|
line.byte 0x00 "PJSEL1,Port J Function Selection Register"
|
|
bitfld.byte 0x00 5. " P1SEL5 ,Port function selection 5" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 4. " P1SEL4 ,Port function selection 4" "GPIO/Primary,Secondary/Tertiary"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P1SEL3 ,Port function selection 3" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 2. " P1SEL2 ,Port function selection 2" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 1. " P1SEL1 ,Port function selection 1" "GPIO/Primary,Secondary/Tertiary"
|
|
bitfld.byte 0x00 0. " P1SEL0 ,Port function selection 0" "GPIO/Primary,Secondary/Tertiary"
|
|
group.byte 0x136++0x00
|
|
line.byte 0x00 "PJSELC,Port J Complement Selection Register"
|
|
bitfld.byte 0x00 5. " PJSELC5 ,Port J Port selection complement 5" "0,1"
|
|
bitfld.byte 0x00 4. " PJSELC4 ,Port J Port selection complement 4" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PJSELC3 ,Port J Port selection complement 3" "0,1"
|
|
bitfld.byte 0x00 2. " PJSELC2 ,Port J Port selection complement 2" "0,1"
|
|
bitfld.byte 0x00 1. " PJSELC1 ,Port J Port selection complement 1" "0,1"
|
|
bitfld.byte 0x00 0. " PJSELC0 ,Port J Port selection complement 0" "0,1"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree "CAPTIO (Capacitive Touch I/O)"
|
|
base ad:0x40005400
|
|
width 12.
|
|
group.word 0x000++0x01
|
|
line.word 0x00 "CAPTIO0CTL,Capacitive Touch IO 0 Control Register"
|
|
bitfld.word 0x00 9. " CAPTIO ,Capacitive Touch IO state" "0,1"
|
|
bitfld.word 0x00 8. " CAPTIOEN ,Capacitive Touch IO enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4.--7. " CAPTIOPOSEL0 ,Capacitive Touch IO port select" "PJ,P1,P2,P3,P4,P5,P6,P7,P8,P9,P10,P11,P12,P13,P14,P15"
|
|
bitfld.word 0x00 1.--3. " CAPTIOPISEL0 ,Capacitive Touch IO pin select" "P0.0,P0.1,P0.2,P0.3,P0.4,P0.5,P0.6,P0.7"
|
|
width 0x0B
|
|
base ad:0x40005800
|
|
width 12.
|
|
group.word 0x000++0x01
|
|
line.word 0x00 "CAPTIO1CTL,Capacitive Touch IO 1 Control Register"
|
|
bitfld.word 0x00 9. " CAPTIO ,Capacitive Touch IO state" "0,1"
|
|
bitfld.word 0x00 8. " CAPTIOEN ,Capacitive Touch IO enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4.--7. " CAPTIOPOSEL1 ,Capacitive Touch IO port select" "PJ,P1,P2,P3,P4,P5,P6,P7,P8,P9,P10,P11,P12,P13,P14,P15"
|
|
bitfld.word 0x00 1.--3. " CAPTIOPISEL1 ,Capacitive Touch IO pin select" "P1.0,P1.1,P1.2,P1.3,P1.4,P1.5,P1.6,P1.7"
|
|
width 0x0B
|
|
tree.end
|
|
tree "CRC32 Module"
|
|
base ad:0x40004000
|
|
width 16.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "CRC32DI,Data Input for CRC32 Signature Computation Register"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "CRC32DIRB,Data In Reverse for CRC32 Computation Register"
|
|
group.word 0x08++0x09
|
|
line.word 0x00 "CRC32INIRES_LO,CRC32 Initialization and Result (Lower 16 Bits) Register"
|
|
line.word 0x02 "CRC32INIRES_HI,CRC32 Initialization and Result (Upper 16 Bits) Register"
|
|
line.word 0x04 "CRC32RESR_LO,CRC32 Result Reverse (Lower 16 Bits) Register"
|
|
line.word 0x06 "CRC32RESR_HI,CRC32 Result Reverse (Upper 16 Bits) Register"
|
|
line.word 0x08 "CRC16DI,Data Input for CRC16 Computation Register"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "CRC16DIRB,CRC16 Data In Reverse Register"
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "CRC16INIRES,CRC16 Initialization and Result Register"
|
|
group.word 0x1E++0x01
|
|
line.word 0x00 "CRC16RESR,CRC16 Result Reverse Register"
|
|
width 0x0B
|
|
tree.end
|
|
tree "AES256 Accelerator"
|
|
base ad:0x40003C00
|
|
width 10.
|
|
group.word 0x00++0x05
|
|
line.word 0x00 "AESACTL0,AES Accelerator Control Register 0"
|
|
bitfld.word 0x00 15. " AESCMEN ,Enables the support of the ciphermodes ECB, CBC, OFB and CFB together with the DMA" "Not generated,Generated"
|
|
bitfld.word 0x00 12. " AESRDYIE ,AES ready interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " AESERRFG ,AES error flag" "No error,Error"
|
|
bitfld.word 0x00 8. " AESRDYIFG ,AES ready interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 7. " AESSWRST ,AES software reset" "No reset,Reset"
|
|
bitfld.word 0x00 5.--6. " AESCM ,AES cipher mode select" "ECB,CBC,OFB,CFB"
|
|
bitfld.word 0x00 2.--3. " AESKL ,AES key length" "128 bit,192 bit,256 bit,?..."
|
|
bitfld.word 0x00 0.--1. " AESOP ,AES operation" "Encryption,Decryption,First round key,Decryption"
|
|
line.word 0x02 "AESACTL1,AES Accelerator Control Register 1"
|
|
hexmask.word.byte 0x02 0.--7. 1. " AESBLKCNT ,Cipher Block Counter"
|
|
line.word 0x04 "AESASTAT,AES Accelerator Status Register"
|
|
rbitfld.word 0x04 12.--15. " AESDOUTCNT ,Bytes read through AESADOUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.word 0x04 8.--11. " AESDINCNT ,Bytes written through AESADIN, AESAXDIN or AESAXIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.word 0x04 4.--7. " AESKEYCNT ,Bytes written through AESADIN, AESAXDIN or AESAXIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.word 0x04 3. " AESDOUTRD ,All 16 bytes read from AESADOUT" "Not all,All"
|
|
textline " "
|
|
bitfld.word 0x04 2. " AESDINWR ,All 16 bytes written to AESADIN, AESAXDIN or AESAXIN" "Not all,All"
|
|
bitfld.word 0x04 1. " AESKEYWR ,All 16 bytes written to AESAKEY" "Not all,All"
|
|
rbitfld.word 0x04 0. " AESBUSY ,AES accelerator module busy" "Not busy,Busy"
|
|
wgroup.word 0x06++0x03
|
|
line.word 0x00 "AESAKEY,AES Accelerator Key Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " AESKEY1 ,AES key byte n+1 when AESAKEY is written as half-word"
|
|
hexmask.word.byte 0x00 0.--7. 1. " AESKEY0 ,AES key byte n when AESAKEY is written as half-word"
|
|
line.word 0x02 "AESADIN,AES Accelerator Data In Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " AESDIN1 ,AES data in byte n+1 when AESADIN is written as half-word"
|
|
hexmask.word.byte 0x02 0.--7. 1. " AESDIN0 ,AES data in byte n when AESADIN is written as half-word"
|
|
hgroup.word 0x0A++0x01
|
|
hide.word 0x00 "AESADOUT,AES Accelerator Data Out Register"
|
|
in
|
|
wgroup.word 0x0C++0x03
|
|
line.word 0x00 "AESAXDIN,AES Accelerator XORed Data In Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " AESXDIN1 ,AES data in byte n+1 when AESAXDIN is written as half-word"
|
|
hexmask.word.byte 0x00 0.--7. 1. " AESXDIN0 ,AES data in byte n when AESAXDIN is written as half-word"
|
|
line.word 0x02 "AESAXIN,AES Accelerator XORed Data In Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " AESXIN1 ,AES data in byte n+1 when AESAXIN is written as half-word"
|
|
hexmask.word.byte 0x02 0.--7. 1. " AESXIN0 ,AES data in byte n when AESAXIN is written as half-word"
|
|
width 0x0B
|
|
tree.end
|
|
tree "PMAP (Port Mapping Controller)"
|
|
base ad:0x40005000
|
|
width 11.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PMAPKEYID,Port Mapping Key Register"
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "PMAPCTL,Port Mapping Control Register"
|
|
bitfld.word 0x00 1. " PMAPRECFG ,Port mapping reconfiguration control bit" "Only once,Allowed"
|
|
rbitfld.word 0x00 0. " PMAPLOCKED ,Port mapping lock bit" "Granted,Locked"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "P2MAP0,Port Mapping Register P2.0"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P2.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P2.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P2.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P2.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P2.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P2.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P2.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P2.0" "Not selected,Selected"
|
|
group.byte 0x11++0x00
|
|
line.byte 0x00 "P2MAP1,Port Mapping Register P2.1"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P2.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P2.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P2.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P2.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P2.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P2.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P2.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P2.0" "Not selected,Selected"
|
|
group.byte 0x12++0x00
|
|
line.byte 0x00 "P2MAP2,Port Mapping Register P2.2"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P2.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P2.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P2.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P2.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P2.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P2.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P2.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P2.0" "Not selected,Selected"
|
|
group.byte 0x13++0x00
|
|
line.byte 0x00 "P2MAP3,Port Mapping Register P2.3"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P2.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P2.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P2.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P2.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P2.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P2.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P2.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P2.0" "Not selected,Selected"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "P2MAP4,Port Mapping Register P2.4"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P2.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P2.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P2.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P2.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P2.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P2.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P2.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P2.0" "Not selected,Selected"
|
|
group.byte 0x15++0x00
|
|
line.byte 0x00 "P2MAP5,Port Mapping Register P2.5"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P2.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P2.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P2.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P2.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P2.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P2.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P2.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P2.0" "Not selected,Selected"
|
|
group.byte 0x16++0x00
|
|
line.byte 0x00 "P2MAP6,Port Mapping Register P2.6"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P2.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P2.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P2.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P2.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P2.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P2.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P2.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P2.0" "Not selected,Selected"
|
|
group.byte 0x17++0x00
|
|
line.byte 0x00 "P2MAP7,Port Mapping Register P2.7"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P2.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P2.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P2.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P2.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P2.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P2.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P2.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P2.0" "Not selected,Selected"
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "P3MAP0,Port Mapping Register P3.0"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P3.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P3.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P3.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P3.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P3.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P3.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P3.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P3.0" "Not selected,Selected"
|
|
group.byte 0x19++0x00
|
|
line.byte 0x00 "P3MAP1,Port Mapping Register P3.1"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P3.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P3.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P3.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P3.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P3.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P3.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P3.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P3.0" "Not selected,Selected"
|
|
group.byte 0x1A++0x00
|
|
line.byte 0x00 "P3MAP2,Port Mapping Register P3.2"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P3.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P3.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P3.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P3.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P3.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P3.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P3.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P3.0" "Not selected,Selected"
|
|
group.byte 0x1B++0x00
|
|
line.byte 0x00 "P3MAP3,Port Mapping Register P3.3"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P3.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P3.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P3.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P3.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P3.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P3.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P3.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P3.0" "Not selected,Selected"
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "P3MAP4,Port Mapping Register P3.4"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P3.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P3.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P3.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P3.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P3.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P3.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P3.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P3.0" "Not selected,Selected"
|
|
group.byte 0x1D++0x00
|
|
line.byte 0x00 "P3MAP5,Port Mapping Register P3.5"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P3.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P3.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P3.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P3.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P3.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P3.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P3.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P3.0" "Not selected,Selected"
|
|
group.byte 0x1E++0x00
|
|
line.byte 0x00 "P3MAP6,Port Mapping Register P3.6"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P3.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P3.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P3.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P3.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P3.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P3.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P3.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P3.0" "Not selected,Selected"
|
|
group.byte 0x1F++0x00
|
|
line.byte 0x00 "P3MAP7,Port Mapping Register P3.7"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P3.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P3.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P3.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P3.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P3.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P3.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P3.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P3.0" "Not selected,Selected"
|
|
group.byte 0x38++0x00
|
|
line.byte 0x00 "P7MAP0,Port Mapping Register P7.0"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P7.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P7.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P7.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P7.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P7.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P7.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P7.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P7.0" "Not selected,Selected"
|
|
group.byte 0x39++0x00
|
|
line.byte 0x00 "P7MAP1,Port Mapping Register P7.1"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P7.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P7.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P7.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P7.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P7.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P7.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P7.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P7.0" "Not selected,Selected"
|
|
group.byte 0x3A++0x00
|
|
line.byte 0x00 "P7MAP2,Port Mapping Register P7.2"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P7.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P7.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P7.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P7.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P7.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P7.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P7.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P7.0" "Not selected,Selected"
|
|
group.byte 0x3B++0x00
|
|
line.byte 0x00 "P7MAP3,Port Mapping Register P7.3"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P7.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P7.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P7.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P7.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P7.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P7.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P7.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P7.0" "Not selected,Selected"
|
|
group.byte 0x3C++0x00
|
|
line.byte 0x00 "P7MAP4,Port Mapping Register P7.4"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P7.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P7.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P7.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P7.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P7.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P7.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P7.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P7.0" "Not selected,Selected"
|
|
group.byte 0x3D++0x00
|
|
line.byte 0x00 "P7MAP5,Port Mapping Register P7.5"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P7.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P7.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P7.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P7.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P7.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P7.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P7.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P7.0" "Not selected,Selected"
|
|
group.byte 0x3E++0x00
|
|
line.byte 0x00 "P7MAP6,Port Mapping Register P7.6"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P7.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P7.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P7.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P7.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P7.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P7.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P7.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P7.0" "Not selected,Selected"
|
|
group.byte 0x3F++0x00
|
|
line.byte 0x00 "P7MAP7,Port Mapping Register P7.7"
|
|
bitfld.byte 0x00 7. " PMAP7 ,Selects secondary port function for P7.7" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " PMAP6 ,Selects secondary port function for P7.6" "Not selected,Selected"
|
|
bitfld.byte 0x00 5. " PMAP5 ,Selects secondary port function for P7.5" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " PMAP4 ,Selects secondary port function for P7.4" "Not selected,Selected"
|
|
bitfld.byte 0x00 3. " PMAP3 ,Selects secondary port function for P7.3" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " PMAP2 ,Selects secondary port function for P7.2" "Not selected,Selected"
|
|
bitfld.byte 0x00 1. " PMAP1 ,Selects secondary port function for P7.1" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " PMAP0 ,Selects secondary port function for P7.0" "Not selected,Selected"
|
|
width 0x0B
|
|
tree.end
|
|
tree "WDT_A (Watchdog Timer)"
|
|
base ad:0x40004800
|
|
width 8.
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "WDTCTL,Watchdog Timer Control Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " WDTPW ,Watchdog timer password"
|
|
bitfld.word 0x00 7. " WDTHOLD ,Watchdog timer hold" "Not stopped,Stopped"
|
|
bitfld.word 0x00 5.--6. " WDTSSEL ,Watchdog timer clock source select" "SMCLK,ACLK,VLOCLK,BCLK"
|
|
bitfld.word 0x00 4. " WDTTMSEL ,Watchdog timer mode select" "Watchdog,Interval timer"
|
|
textline " "
|
|
bitfld.word 0x00 3. " WDTCNTCL ,Watchdog timer counter clear" "No effect,Clear"
|
|
bitfld.word 0x00 0.--2. " WDTIS ,Watchdog timer interval select" "/2^31,/2^27,/2^23,/2^19,/2^15,/2^13,/2^9,/2^6"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Timer32"
|
|
base ad:0x4000C000
|
|
width 13.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "T32LOAD1,Timer1 Load Register"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "T32VALUE1,Timer 1 Current Value Register"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "T32CONTROL1,Timer 1 Timer Control Register"
|
|
bitfld.long 0x00 7. " ENABLE ,Enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " MODE ,Mode bit" "Free-running,Periodic"
|
|
bitfld.long 0x00 5. " IE ,Interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " PRESCALE ,Prescale bits" "/1,/16,/256,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1. " SIZE ,Selects 16 or 32 bit counter operation" "16-bit,32-bit"
|
|
bitfld.long 0x00 0. " ONESHOT ,Selects one-shot or wrapping counter mode" "Wrapping,One-shot"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "T32INTCLR1,Timer 1 Interrupt Clear Register"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "T32RIS1,Timer 1 Raw Interrupt Status Register"
|
|
bitfld.long 0x00 0. " RAW_IFG ,Raw interrupt status from the counter" "0,1"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "T32MIS1,Timer 1 Masked Interrupt Status Register"
|
|
bitfld.long 0x00 0. " IFG ,Enabled interrupt status from the counter" "Disabled,Enabled"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "T32BGLOAD1,Timer 1 Background Load Register"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "T32LOAD2,Timer2 Load Register"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "T32VALUE2,Timer 2 Current Value Register"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "T32CONTROL2,Timer 2 Timer Control Register"
|
|
bitfld.long 0x00 7. " ENABLE ,Enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " MODE ,Mode bit" "Free-running,Periodic"
|
|
bitfld.long 0x00 5. " IE ,Interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " PRESCALE ,Prescale bits" "/1,/16,/256,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1. " SIZE ,Selects 16 or 32 bit counter operation" "16-bit counter,32-bit counter"
|
|
bitfld.long 0x00 0. " ONESHOT ,Selects one-shot or wrapping counter mode" "Wrapping,One-shot"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "T32INTCLR2,Timer 2 Interrupt Clear Register"
|
|
rgroup.long 0x30++0x07
|
|
line.long 0x00 "T32RIS2,Timer 2 Raw Interrupt Status Register"
|
|
bitfld.long 0x00 0. " RAW_IFG ,Raw interrupt status from the counter" "0,1"
|
|
line.long 0x04 "T32MIS2,Timer 2 Masked Interrupt Status Register"
|
|
bitfld.long 0x04 0. " IFG ,Enabled interrupt status from the counter" "Disabled,Enabled"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "T32BGLOAD2,Timer 2 Background Load Register"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Timer_A"
|
|
tree "Timer_A0"
|
|
base ad:0x40000000
|
|
width 14.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "TA0CTL,Timer_A0 Control Register"
|
|
bitfld.word 0x00 8.--9. " TASSEL ,Timer_A clock source select" "TA0CLK,ACLK,SMCLK,INCLK"
|
|
bitfld.word 0x00 6.--7. " ID ,Input divider" "/1,/2,/4,/8"
|
|
bitfld.word 0x00 4.--5. " MC ,Mode control" "Stop,Up,Continuous,Up/down"
|
|
bitfld.word 0x00 2. " TACLR ,Timer_A clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TAIE ,Timer_A interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " TAIFG ,Timer_A interrupt flag" "No interrupt,Interrupt"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "TA0R,Timer_A0 Counter Register"
|
|
group.word 0x2++0x01
|
|
line.word 0x00 "TA0CCTL0,Capture/Compare Control 0 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI0A,CCI0B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0x2)++0x01
|
|
line.word 0x00 "TA0CCR0,Capture/Compare 0 Register"
|
|
group.word 0x4++0x01
|
|
line.word 0x00 "TA0CCTL1,Capture/Compare Control 1 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI1A,CCI1B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0x4)++0x01
|
|
line.word 0x00 "TA0CCR1,Capture/Compare 1 Register"
|
|
group.word 0x6++0x01
|
|
line.word 0x00 "TA0CCTL2,Capture/Compare Control 2 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI2A,CCI2B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0x6)++0x01
|
|
line.word 0x00 "TA0CCR2,Capture/Compare 2 Register"
|
|
group.word 0x8++0x01
|
|
line.word 0x00 "TA0CCTL3,Capture/Compare Control 3 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI3A,CCI3B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0x8)++0x01
|
|
line.word 0x00 "TA0CCR3,Capture/Compare 3 Register"
|
|
group.word 0xA++0x01
|
|
line.word 0x00 "TA0CCTL4,Capture/Compare Control 4 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI4A,CCI4B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0xA)++0x01
|
|
line.word 0x00 "TA0CCR4,Capture/Compare 4 Register"
|
|
rgroup.word 0x2E++0x01
|
|
line.word 0x00 "TA0IV,Interrupt Vector Register"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "TA0EX0,Expansion 0 Register"
|
|
bitfld.word 0x00 0.--2. " TAIDEX ,Input divider expansion" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Timer_A1"
|
|
base ad:0x40000400
|
|
width 14.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "TA1CTL,Timer_A1 Control Register"
|
|
bitfld.word 0x00 8.--9. " TASSEL ,Timer_A clock source select" "TA1CLK,ACLK,SMCLK,INCLK"
|
|
bitfld.word 0x00 6.--7. " ID ,Input divider" "/1,/2,/4,/8"
|
|
bitfld.word 0x00 4.--5. " MC ,Mode control" "Stop,Up,Continuous,Up/down"
|
|
bitfld.word 0x00 2. " TACLR ,Timer_A clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TAIE ,Timer_A interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " TAIFG ,Timer_A interrupt flag" "No interrupt,Interrupt"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "TA1R,Timer_A1 Counter Register"
|
|
group.word 0x2++0x01
|
|
line.word 0x00 "TA1CCTL0,Capture/Compare Control 0 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI0A,CCI0B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0x2)++0x01
|
|
line.word 0x00 "TA1CCR0,Capture/Compare 0 Register"
|
|
group.word 0x4++0x01
|
|
line.word 0x00 "TA1CCTL1,Capture/Compare Control 1 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI1A,CCI1B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0x4)++0x01
|
|
line.word 0x00 "TA1CCR1,Capture/Compare 1 Register"
|
|
group.word 0x6++0x01
|
|
line.word 0x00 "TA1CCTL2,Capture/Compare Control 2 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI2A,CCI2B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0x6)++0x01
|
|
line.word 0x00 "TA1CCR2,Capture/Compare 2 Register"
|
|
group.word 0x8++0x01
|
|
line.word 0x00 "TA1CCTL3,Capture/Compare Control 3 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI3A,CCI3B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0x8)++0x01
|
|
line.word 0x00 "TA1CCR3,Capture/Compare 3 Register"
|
|
group.word 0xA++0x01
|
|
line.word 0x00 "TA1CCTL4,Capture/Compare Control 4 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI4A,CCI4B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0xA)++0x01
|
|
line.word 0x00 "TA1CCR4,Capture/Compare 4 Register"
|
|
rgroup.word 0x2E++0x01
|
|
line.word 0x00 "TA1IV,Interrupt Vector Register"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "TA1EX0,Expansion 0 Register"
|
|
bitfld.word 0x00 0.--2. " TAIDEX ,Input divider expansion" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Timer_A2"
|
|
base ad:0x40000800
|
|
width 14.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "TA2CTL,Timer_A2 Control Register"
|
|
bitfld.word 0x00 8.--9. " TASSEL ,Timer_A clock source select" "TA2CLK,ACLK,SMCLK,INCLK"
|
|
bitfld.word 0x00 6.--7. " ID ,Input divider" "/1,/2,/4,/8"
|
|
bitfld.word 0x00 4.--5. " MC ,Mode control" "Stop,Up,Continuous,Up/down"
|
|
bitfld.word 0x00 2. " TACLR ,Timer_A clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TAIE ,Timer_A interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " TAIFG ,Timer_A interrupt flag" "No interrupt,Interrupt"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "TA2R,Timer_A2 Counter Register"
|
|
group.word 0x2++0x01
|
|
line.word 0x00 "TA2CCTL0,Capture/Compare Control 0 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI0A,CCI0B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0x2)++0x01
|
|
line.word 0x00 "TA2CCR0,Capture/Compare 0 Register"
|
|
group.word 0x4++0x01
|
|
line.word 0x00 "TA2CCTL1,Capture/Compare Control 1 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI1A,CCI1B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0x4)++0x01
|
|
line.word 0x00 "TA2CCR1,Capture/Compare 1 Register"
|
|
group.word 0x6++0x01
|
|
line.word 0x00 "TA2CCTL2,Capture/Compare Control 2 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI2A,CCI2B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0x6)++0x01
|
|
line.word 0x00 "TA2CCR2,Capture/Compare 2 Register"
|
|
group.word 0x8++0x01
|
|
line.word 0x00 "TA2CCTL3,Capture/Compare Control 3 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI3A,CCI3B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0x8)++0x01
|
|
line.word 0x00 "TA2CCR3,Capture/Compare 3 Register"
|
|
group.word 0xA++0x01
|
|
line.word 0x00 "TA2CCTL4,Capture/Compare Control 4 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI4A,CCI4B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0xA)++0x01
|
|
line.word 0x00 "TA2CCR4,Capture/Compare 4 Register"
|
|
rgroup.word 0x2E++0x01
|
|
line.word 0x00 "TA2IV,Interrupt Vector Register"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "TA2EX0,Expansion 0 Register"
|
|
bitfld.word 0x00 0.--2. " TAIDEX ,Input divider expansion" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Timer_A3"
|
|
base ad:0x40000C00
|
|
width 14.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "TA3CTL,Timer_A3 Control Register"
|
|
bitfld.word 0x00 8.--9. " TASSEL ,Timer_A clock source select" "TA3CLK,ACLK,SMCLK,INCLK"
|
|
bitfld.word 0x00 6.--7. " ID ,Input divider" "/1,/2,/4,/8"
|
|
bitfld.word 0x00 4.--5. " MC ,Mode control" "Stop,Up,Continuous,Up/down"
|
|
bitfld.word 0x00 2. " TACLR ,Timer_A clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TAIE ,Timer_A interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " TAIFG ,Timer_A interrupt flag" "No interrupt,Interrupt"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "TA3R,Timer_A3 Counter Register"
|
|
group.word 0x2++0x01
|
|
line.word 0x00 "TA3CCTL0,Capture/Compare Control 0 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI0A,CCI0B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0x2)++0x01
|
|
line.word 0x00 "TA3CCR0,Capture/Compare 0 Register"
|
|
group.word 0x4++0x01
|
|
line.word 0x00 "TA3CCTL1,Capture/Compare Control 1 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI1A,CCI1B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0x4)++0x01
|
|
line.word 0x00 "TA3CCR1,Capture/Compare 1 Register"
|
|
group.word 0x6++0x01
|
|
line.word 0x00 "TA3CCTL2,Capture/Compare Control 2 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI2A,CCI2B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0x6)++0x01
|
|
line.word 0x00 "TA3CCR2,Capture/Compare 2 Register"
|
|
group.word 0x8++0x01
|
|
line.word 0x00 "TA3CCTL3,Capture/Compare Control 3 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI3A,CCI3B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0x8)++0x01
|
|
line.word 0x00 "TA3CCR3,Capture/Compare 3 Register"
|
|
group.word 0xA++0x01
|
|
line.word 0x00 "TA3CCTL4,Capture/Compare Control 4 Register"
|
|
bitfld.word 0x00 14.--15. " CM ,Capture mode" "No capture,Rising edge,Falling edge,Both"
|
|
bitfld.word 0x00 12.--13. " CCIS ,Capture/compare input select" "CCI4A,CCI4B,GND,VCC"
|
|
bitfld.word 0x00 11. " SCS ,Synchronize capture source" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 10. " SCCI ,Synchronized capture/compare input" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CAP ,Capture mode" "Compare,Capture"
|
|
bitfld.word 0x00 5.--7. " OUTMOD ,Output mode" "OUT bit value,Set,Toggle/reset,Set/reset,Toggle,Reset,Toggle/set,Reset/set"
|
|
bitfld.word 0x00 4. " CCIE ,Capture/compare interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 3. " CCI ,Capture/compare input" "Capture,Compare"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OUT ,Output" "Low,High"
|
|
bitfld.word 0x00 1. " COV ,Capture overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 0. " CCIFG ,Capture/compare interrupt flag" "No interrupt,Interrupt"
|
|
group.word (0x10+0xA)++0x01
|
|
line.word 0x00 "TA3CCR4,Capture/Compare 4 Register"
|
|
rgroup.word 0x2E++0x01
|
|
line.word 0x00 "TA3IV,Interrupt Vector Register"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "TA3EX0,Expansion 0 Register"
|
|
bitfld.word 0x00 0.--2. " TAIDEX ,Input divider expansion" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "RTC (Real-Time Clock)"
|
|
base ad:0x40004400
|
|
width 15.
|
|
group.word 0x00++0x07
|
|
line.word 0x00 "RTCCTL0,Real-Time Clock Control 0 Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " RTCKEY ,Real-time clock key"
|
|
bitfld.word 0x00 7. " RTCOFIE ,32-kHz crystal oscillator fault interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " RTCTEVIE ,Real-time clock time event interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " RTCAIE ,Real-time clock alarm interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RTCRDYIE ,Real-time clock ready interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " RTCOFIFG ,32-kHz crystal oscillator fault interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 2. " RTCTEVIFG ,Real-time clock time event interrupt flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 1. " RTCAIFG ,Real-time clock alarm interrupt flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RTCRDYIFG ,Real-time clock ready interrupt flag" "Not ready,Ready"
|
|
line.word 0x02 "RTCCTL13,Real-Time Clock Control 1 3 Register"
|
|
bitfld.word 0x02 8.--9. " RTCCALF ,Real-time clock calibration frequency" "No frequency output,512 Hz,256 Hz,1 Hz"
|
|
bitfld.word 0x02 7. " RTCBCD ,Real-time clock BCD select" "Hexadecimal,BCD"
|
|
bitfld.word 0x02 6. " RTCHOLD ,Real-time clock hold" "Not holded,Holded"
|
|
rbitfld.word 0x02 5. " RTCMODE ,Real-time clock mode" ",Calendar mode"
|
|
textline " "
|
|
rbitfld.word 0x02 4. " RTCRDY ,Real-time clock ready" "Not ready,Ready"
|
|
bitfld.word 0x02 2.--3. " RTCSSEL ,Real-time clock source select" "BCLK,?..."
|
|
bitfld.word 0x02 0.--1. " RTCTEV ,Real-time clock time event" "Minute changed,Hour changed,Every day at midnight,Every day at noon"
|
|
line.word 0x04 "RTCOCAL,Real-Time Clock Offset Calibration Register"
|
|
bitfld.word 0x04 15. " RTCOCALS ,Real-time clock offset error calibration sign" "Down,Up"
|
|
hexmask.word.byte 0x04 0.--7. 1. " RTCOCAL ,Real-time clock offset error calibration"
|
|
line.word 0x06 "RTCTCMP,Real-Time Clock Temperature Compensation Register"
|
|
bitfld.word 0x06 15. " RTCTCMPS ,Real-time clock temperature compensation sign" "Down,Up"
|
|
rbitfld.word 0x06 14. " RTCTCRDY ,Real-time clock temperature compensation ready" "Not ready,Ready"
|
|
rbitfld.word 0x06 13. " RTCTCOK ,Real-time clock temperature compensation write OK" "Unsuccessful,Successful"
|
|
hexmask.word.byte 0x06 0.--7. 1. " RTCTCMP ,Real-time clock temperature compensation"
|
|
if (((per.w(ad:0x40004400+0x02))&0x80)==0x80)
|
|
group.word 0x10++0x0B
|
|
line.word 0x00 "RTCTIM0,Real-Time Clock Seconds & Minutes Register"
|
|
bitfld.word 0x00 12.--14. " TIME ,Minutes high digit (0 to 5)" "0,1,2,3,4,5,-,-"
|
|
bitfld.word 0x00 8.--11. ",Minutes low digit (0 to 9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x00 4.--6. ":,Seconds high digit (0 to 5)" "0,1,2,3,4,5,-,-"
|
|
bitfld.word 0x00 0.--3. ",Seconds low digit (0 to 9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
textline ""
|
|
if (((per.w(ad:0x40004400+0x12))&0x0020)==0x20)
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "RTCTIM1,Real-Time Clock Hour & Day of Week Register"
|
|
bitfld.word 0x00 8.--10. " DAY ,Day of week (0 to 6)" "1,2,3,4,5,6,7,-"
|
|
bitfld.word 0x00 4.--5. " HOUR ,Hours high digit (0 to 2)" "0,1,2,-"
|
|
bitfld.word 0x00 0.--3. ",Hours low digit (0 to 9)" "0,1,2,3,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
else
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "RTCTIM1,Real-Time Clock Hour & Day of Week Register"
|
|
bitfld.word 0x00 8.--10. " DAY ,Day of week (0 to 6)" "1,2,3,4,5,6,7,-"
|
|
bitfld.word 0x00 4.--5. " HOUR ,Hours high digit (0 to 2)" "0,1,2,-"
|
|
bitfld.word 0x00 0.--3. ",Hours low digit (0 to 9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
endif
|
|
textline ""
|
|
if (((per.w(ad:0x40004400+0x14))&0x1000)==(0x00))
|
|
// RTCDATE[DATE] == 0
|
|
if (((per.w(ad:0x40004400+0x14))&0x1F00)==(0x0100||0x0300||0x0500||0x0700||0x0800))&&(((per.w(ad:0x40004400+0x14))&0x0030)==0x30)
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "RTCDATE,Real-Time Clock Date Register"
|
|
bitfld.word 0x00 12. " DATE ,Month high digit (0 or 1)" "0,1"
|
|
bitfld.word 0x00 8.--11. ",Month low digit (0 to 9)" "-,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x00 4.--5. "/,Day of month high digit (0 to 3)" "0,1,2,3"
|
|
bitfld.word 0x00 0.--3. ",Day of month low digit (0 to 9)" "0,1,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
elif (((per.w(ad:0x40004400+0x14))&0x1F00)==(0x0100||0x0300||0x0500||0x0700||0x0800))&&(((per.w(ad:0x40004400+0x14))&0x30)!=0x30)
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "RTCDATE,Real-Time Clock Date Register"
|
|
bitfld.word 0x00 12. " DATE ,Month high digit (0 or 1)" "0,1"
|
|
bitfld.word 0x00 8.--11. ",Month low digit (0 to 9)" "-,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x00 4.--5. "/,Day of month high digit (0 to 3)" "0,1,2,3"
|
|
bitfld.word 0x00 0.--3. ",Day of month low digit (0 to 9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
elif (((per.w(ad:0x40004400+0x14))&0x1F00)==0x200)
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "RTCDATE,Real-Time Clock Date Register"
|
|
bitfld.word 0x00 12. " DATE ,Month high digit (0 or 1)" "0,1"
|
|
bitfld.word 0x00 8.--11. ",Month low digit (0 to 9)" "-,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x00 4.--5. "/,Day of month high digit (0 to 3)" "0,1,2,-"
|
|
bitfld.word 0x00 0.--3. ",Day of month low digit (0 to 9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
elif (((per.w(ad:0x40004400+0x14))&0x1F00)==(0x400||0x600||0x900))&&(((per.w(ad:0x40004400+0x14))&0x30)!=0x30)
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "RTCDATE,Real-Time Clock Date Register"
|
|
bitfld.word 0x00 12. " DATE ,Month high digit (0 or 1)" "0,1"
|
|
bitfld.word 0x00 8.--11. ",Month low digit (0 to 9)" "-,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x00 4.--5. "/,Day of month high digit (0 to 3)" "0,1,2,3"
|
|
bitfld.word 0x00 0.--3. ",Day of month low digit (0 to 9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
else
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "RTCDATE,Real-Time Clock Date Register"
|
|
bitfld.word 0x00 12. " DATE ,Month high digit (0 or 1)" "0,1"
|
|
bitfld.word 0x00 8.--11. ",Month low digit (0 to 9)" "-,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x00 4.--5. "/,Day of month high digit (0 to 3)" "0,1,2,3"
|
|
bitfld.word 0x00 0.--3. ",Day of month low digit (0 to 9)" "0,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
endif
|
|
else
|
|
// RTCDATE[DATE] == 1
|
|
if (((per.w(ad:0x40004400+0x14))&0x1F00)==(0x1000||0x1200))&&(((per.w(ad:0x40004400+0x14))&0x0030)==0x30)
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "RTCDATE,Real-Time Clock Date Register"
|
|
bitfld.word 0x00 12. " DATE ,Month high digit (0 or 1)" "0,1"
|
|
bitfld.word 0x00 8.--11. ",Month low digit (0 to 9)" "0,1,2,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.word 0x00 4.--5. "/,Day of month high digit (0 to 3)" "0,1,2,3"
|
|
bitfld.word 0x00 0.--3. ",Day of month low digit (0 to 9)" "0,1,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
elif (((per.w(ad:0x40004400+0x14))&0x1F00)==(0x1000||0x1100||0x1200))&&(((per.w(ad:0x40004400+0x14))&0x0030)!=0x30)
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "RTCDATE,Real-Time Clock Date Register"
|
|
bitfld.word 0x00 12. " DATE ,Month high digit (0 or 1)" "0,1"
|
|
bitfld.word 0x00 8.--11. ",Month low digit (0 to 9)" "0,1,2,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.word 0x00 4.--5. "/,Day of month high digit (0 to 3)" "0,1,2,3"
|
|
bitfld.word 0x00 0.--3. ",Day of month low digit (0 to 9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
else
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "RTCDATE,Real-Time Clock Date Register"
|
|
bitfld.word 0x00 12. " DATE ,Month high digit (0 or 1)" "0,1"
|
|
bitfld.word 0x00 8.--11. ",Month low digit (0 to 9)" "0,1,2,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.word 0x00 4.--5. "/,Day of month high digit (0 to 3)" "0,1,2,3"
|
|
bitfld.word 0x00 0.--3. ",Day of month low digit (0 to 9)" "0,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
endif
|
|
endif
|
|
textline ""
|
|
group.word 0x10++0x0B
|
|
line.word 0x06 "RTCYEAR,Real-Time Clock Year Register"
|
|
bitfld.word 0x06 12.--14. " YEAR ,Century high digit (0 to 4)" "0,1,2,3,4,-,-,-"
|
|
bitfld.word 0x06 8.--11. ",Century low digit (0 to 9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x06 4.--7. ",Decade (0 to 9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x06 0.--3. ",Year lowest digit (0 to 9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
line.word 0x08 "RTCAMINHR,Real-Time Clock Minutes & Hour Alarm Register"
|
|
bitfld.word 0x08 15. " AE_H ,Alarm hours enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 7. " AE_M ,Alarm minutes enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 12.--13. " HOUR ,Hours high digit (0 to 2)" "0,1,2,-"
|
|
bitfld.word 0x08 8.--11. ",Hours low digit (0 to 9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x08 4.--6. " MINUTES ,Minutes high digit (0 to 5)" "0,1,2,3,4,5,-,-"
|
|
bitfld.word 0x08 0.--3. ",Minutes low digit (0 to 9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
if (((per.w(ad:0x40004400+0x14))&0x1F00)==(0x0100||0x0300||0x0500||0x0700||0x0800||0x1000||0x1200))&&(((per.w(ad:0x40004400+0x1A))&0x3000)==0x3000)
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "RTCADOWDAY,Real-Time Clock Day of Week & Day of Month Alarm Register"
|
|
bitfld.word 0x00 15. " AE_M ,Alarm day of month enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " AE_W ,Alarm day of week enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--13. " DAY_M ,Day of month high digit (0 to 3)" "0,1,2,3"
|
|
bitfld.word 0x00 8.--11. ",Day of month low digit (0 to 9)" "0,1,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.word 0x00 0.--2. " DAY_W ,Day of week (0 to 6)" "1,2,3,4,5,6,7,-"
|
|
elif (((per.w(ad:0x40004400+0x14))&0x1F00)==(0x0100||0x0300||0x0500||0x0700||0x0800||0x1000||0x1200))&&(((per.w(ad:0x40004400+0x1A))&0x3000)!=0x3000)
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "RTCADOWDAY,Real-Time Clock Day of Week & Day of Month Alarm Register"
|
|
bitfld.word 0x00 15. " AE_M ,Alarm day of month enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " AE_W ,Alarm day of week enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--13. " DAY_M ,Day of month high digit (0 to 3)" "0,1,2,3"
|
|
bitfld.word 0x00 8.--11. ",Day of month low digit (0 to 9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x00 0.--2. " DAY_W ,Day of week (0 to 6)" "1,2,3,4,5,6,7,-"
|
|
elif (((per.w(ad:0x40004400+0x14))&0x1F00)==(0x0400||0x0600||0x0900||0x1100))&&(((per.w(ad:0x40004400+0x1A))&0x3000)==0x3000)
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "RTCADOWDAY,Real-Time Clock Day of Week & Day of Month Alarm Register"
|
|
bitfld.word 0x00 15. " AE_M ,Alarm day of month enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " AE_W ,Alarm day of week enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--13. " DAY_M ,Day of month high digit (0 to 3)" "0,1,2,3"
|
|
bitfld.word 0x00 8.--11. ",Day of month low digit (0 to 9)" "0,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.word 0x00 0.--2. " DAY_W ,Day of week (0 to 6)" "1,2,3,4,5,6,7,-"
|
|
elif (((per.w(ad:0x40004400+0x14))&0x1F00)==(0x0400||0x0600||0x0900||0x1100))&&(((per.w(ad:0x40004400+0x14))&0x3000)!=0x3000)
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "RTCADOWDAY,Real-Time Clock Day of Week & Day of Month Alarm Register"
|
|
bitfld.word 0x00 15. " AE_M ,Alarm day of month enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " AE_W ,Alarm day of week enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--13. " DAY_M ,Day of month high digit (0 to 3)" "0,1,2,3"
|
|
bitfld.word 0x00 8.--11. ",Day of month low digit (0 to 9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x00 0.--2. " DAY_W ,Day of week (0 to 6)" "1,2,3,4,5,6,7,-"
|
|
elif ((per.w(ad:0x40004400+0x14))&0x1F00)==0x0200
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "RTCADOWDAY,Real-Time Clock Day of Week & Day of Month Alarm Register"
|
|
bitfld.word 0x00 15. " AE_M ,Alarm day of month enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " AE_W ,Alarm day of week enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--13. " DAY_M ,Day of month high digit (0 to 3)" "0,1,2,-"
|
|
bitfld.word 0x00 8.--11. ",Day of month low digit (0 to 9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x00 0.--2. " DAY_W ,Day of week (0 to 6)" "1,2,3,4,5,6,7,-"
|
|
else
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "RTCADOWDAY,Real-Time Clock Day of Week & Day of Month Alarm Register"
|
|
bitfld.word 0x00 15. " AE_M ,Alarm day of month enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " AE_W ,Alarm day of week enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--13. " DAY_M ,Day of month high digit (0 to 3)" "0,1,2,3"
|
|
bitfld.word 0x00 8.--11. ",Day of month low digit (0 to 9)" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.word 0x00 0.--2. " DAY_W ,Day of week (0 to 6)" "1,2,3,4,5,6,7,-"
|
|
endif
|
|
else
|
|
group.word 0x10++0x0B
|
|
line.word 0x00 "RTCTIM0,Real-Time Clock Seconds & Minutes Register"
|
|
bitfld.word 0x00 8.--13. " TIME ,Minutes (0 to 59)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
bitfld.word 0x00 0.--5. ":,Seconds (0 to 59)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
textline ""
|
|
line.word 0x02 "RTCTIM1,,Real-Time Clock Hour & Day of Week Register"
|
|
bitfld.word 0x02 8.--10. " DAY ,Day of week (0 to 6)" "1,2,3,4,5,6,7,-"
|
|
bitfld.word 0x02 0.--4. " HOUR ,Hours (0 to 23)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,-,-,-"
|
|
textline ""
|
|
if (((per.w(ad:0x40004400+0x14))&0x1F00)==(0x0100||0x0300||0x0500||0x0700||0x0800||0x1000||0x1200))
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "RTCDATE,Real-Time Clock Date Register"
|
|
bitfld.word 0x00 8.--11. " DATE ,Month (1 to 12)" "-,1,2,3,4,5,6,7,8,9,10,11,12,-,-,-"
|
|
bitfld.word 0x00 0.--4. "/,Day of month (1 to 31)" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
elif (((per.w(ad:0x40004400+0x14))&0x1F00)==(0x0400||0x0600||0x0900||0x1100))
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "RTCDATE,Real-Time Clock Date Register"
|
|
bitfld.word 0x00 8.--11. " DATE ,Month (1 to 12)" "-,1,2,3,4,5,6,7,8,9,10,11,12,-,-,-"
|
|
bitfld.word 0x00 0.--4. "/,Day of month (1 to 30)" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,-"
|
|
elif ((per.w(ad:0x40004400+0x14))&0x1F00)==0x0200
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "RTCDATE,Real-Time Clock Date Register"
|
|
bitfld.word 0x00 8.--11. " DATE ,Month (1 to 12)" "-,1,2,3,4,5,6,7,8,9,10,11,12,-,-,-"
|
|
bitfld.word 0x00 0.--4. "/,Day of month (1 to 29)" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,-,-"
|
|
else
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "RTCDATE,Real-Time Clock Date Register"
|
|
bitfld.word 0x00 8.--11. " DATE ,Month (1 to 12)" "-,1,2,3,4,5,6,7,8,9,10,11,12,-,-,-"
|
|
bitfld.word 0x00 0.--4. "/,Day of month (1 to 31)" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.word 0x10++0x0B
|
|
line.word 0x06 "RTCYEAR,Real-Time Clock Year Register"
|
|
hexmask.word.byte 0x06 8.--11. 1. " YEAR ,Valid values for Year are 0 to 4095"
|
|
hexmask.word.byte 0x06 0.--7. 1. ",Valid values for Year are 0 to 4095"
|
|
line.word 0x08 "RTCAMINHR,Real-Time Clock Minutes & Hour Alarm Register"
|
|
bitfld.word 0x08 15. " AE_H ,Alarm hours enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 7. " AE_M ,Alarm minutes enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 8.--12. " HOURS ,Hours (0 to 23)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,-,-,"
|
|
bitfld.word 0x08 0.--5. " MINUTES ,Minutes (0 to 59)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,-,-,-,-"
|
|
if (((per.w(ad:0x40004400+0x14))&0x1F00)==(0x0100||0x0300||0x0500||0x0700||0x0800||0x1000||0x1200))
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "RTCADOWDAY,Real-Time Clock Day of Week & Day of Month Alarm Register"
|
|
bitfld.word 0x00 15. " AE_M ,Alarm day of month enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " AE_W ,Alarm day of week enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8.--12. " DAY_M ,Day of month (1 to 31)" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. " DAY_W ,Day of week (0 to 6)" "1,2,3,4,5,6,7,-"
|
|
elif (((per.w(ad:0x40004400+0x14))&0x1F00)==(0x0400||0x0600||0x0900||0x1100))
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "RTCADOWDAY,Real-Time Clock Day of Week & Day of Month Alarm Register"
|
|
bitfld.word 0x00 15. " AE_M ,Alarm day of month enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " AE_W ,Alarm day of week enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8.--12. " DAY_M ,Day of month (1 to 30)" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,-"
|
|
bitfld.word 0x00 0.--2. " DAY_W ,Day of week (0 to 6)" "1,2,3,4,5,6,7,-"
|
|
elif ((per.w(ad:0x40004400+0x14))&0x1F00)==0x0200
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "RTCADOWDAY,Real-Time Clock Day of Week & Day of Month Alarm Register"
|
|
bitfld.word 0x00 15. " AE_M ,Alarm day of month enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " AE_W ,Alarm day of week enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8.--12. " DAY_M ,Day of month (1 to 29)" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,-,-"
|
|
bitfld.word 0x00 0.--2. " DAY_W ,Day of week (0 to 6)" "1,2,3,4,5,6,7,-"
|
|
else
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "RTCADOWDAY,Real-Time Clock Day of Week & Day of Month Alarm Register"
|
|
bitfld.word 0x00 15. " AE_M ,Alarm day of month enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " AE_W ,Alarm day of week enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8.--12. " DAY_M ,Day of month (1 to 31)" "-,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 0.--2. " DAY_W ,Day of week (0 to 6)" "1,2,3,4,5,6,7,-"
|
|
endif
|
|
endif
|
|
textline ""
|
|
group.word 0x08++0x05
|
|
line.word 0x00 "RTCPS0CTL,Real-Time Prescale Timer 0 Control Register"
|
|
bitfld.word 0x00 2.--4. " RT0IP ,Prescale timer 0 interrupt interval" "/2,/4,/8,/16,/32,/64,/128,/256"
|
|
bitfld.word 0x00 1. " RT0PSIE ,Prescale timer 0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " RT0PSIFG ,Prescale timer 0 interrupt flag" "No occurred,Occurred"
|
|
line.word 0x02 "RTCPS1CTL,Real-Time Prescale Timer 1 Control Register"
|
|
bitfld.word 0x02 2.--4. " RT1IP ,Prescale timer 1 interrupt interval" "/2,/4,/8,/16,/32,/64,/128,/256"
|
|
bitfld.word 0x02 1. " RT1PSIE ,Prescale timer 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 0. " RT1PSIFG ,Prescale timer 1 interrupt flag" "No occurred,Occurred"
|
|
line.word 0x04 "RTCPS,Real-Time Prescale Timer 0 & 1 Counter Register"
|
|
hexmask.word.byte 0x04 8.--15. 1. " RT1PS ,Prescale timer 1 counter value"
|
|
hexmask.word.byte 0x04 0.--7. 1. " RT0PS ,Prescale timer 0 counter value"
|
|
rgroup.word 0x0E++0x01
|
|
line.word 0x00 "RTCIV,Real Time Clock Interrupt Vector Register"
|
|
group.word 0x1C++0x03
|
|
line.word 0x00 "RTCBIN2BCD,Binary-to-BCD Conversion"
|
|
line.word 0x02 "RTCBCD2BIN,BCD-to-Binary Conversion"
|
|
width 0x0B
|
|
tree.end
|
|
tree "REF_A (Reference Module)"
|
|
base ad:0x40003000
|
|
width 10.
|
|
if (((per.w(ad:0x40003000))&0x400)==0x400)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "REFCTL0,REF Control Register 0 Register"
|
|
rbitfld.word 0x00 13. " REFBGRDY ,Buffered bandgap voltage ready status" "Not ready,Ready"
|
|
rbitfld.word 0x00 12. " REFGENRDY ,Variable reference voltage ready status" "Not ready,Ready"
|
|
rbitfld.word 0x00 11. " BGMODE ,Bandgap mode" "Static,Sampled"
|
|
rbitfld.word 0x00 10. " REFGENBUSY ,Reference generator busy" "Not busy,Busy"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " REFBGACT ,Reference bandgap active" "Not active,Active"
|
|
rbitfld.word 0x00 8. " REFGENACT ,Reference generator active" "Not active,Active"
|
|
bitfld.word 0x00 7. " REFBGOT ,Bandgap and bandgap buffer one-time trigger" "Not triggered,Triggered"
|
|
bitfld.word 0x00 6. " REFGENOT ,Reference generator one-time trigger" "Not triggered,Triggered"
|
|
textline " "
|
|
rbitfld.word 0x00 4.--5. " REFVSEL ,Reference voltage level select" "1.2 V,1.45 V,,2.5 V"
|
|
rbitfld.word 0x00 3. " REFTCOFF ,Temperature sensor disabled" "On,Off"
|
|
rbitfld.word 0x00 1. " REFOUT ,Reference output buffer" "Not available,Available"
|
|
rbitfld.word 0x00 0. " REFOUT ,Reference enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "REFCTL0,REF Control Register 0 Register"
|
|
rbitfld.word 0x00 13. " REFBGRDY ,Buffered bandgap voltage ready status" "Not ready,Ready"
|
|
rbitfld.word 0x00 12. " REFGENRDY ,Variable reference voltage ready status" "Not ready,Ready"
|
|
rbitfld.word 0x00 11. " BGMODE ,Bandgap mode" "Static,Sampled"
|
|
rbitfld.word 0x00 10. " REFGENBUSY ,Reference generator busy" "Not busy,Busy"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " REFBGACT ,Reference bandgap active" "Not active,Active"
|
|
rbitfld.word 0x00 8. " REFGENACT ,Reference generator active" "Not active,Active"
|
|
bitfld.word 0x00 7. " REFBGOT ,Bandgap and bandgap buffer one-time trigger" "Not triggered,Triggered"
|
|
bitfld.word 0x00 6. " REFGENOT ,Reference generator one-time trigger" "Not triggered,Triggered"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " REFVSEL ,Reference voltage level select" "1.2 V,1.45 V,,2.5 V"
|
|
bitfld.word 0x00 3. " REFTCOFF ,Temperature sensor disabled" "On,Off"
|
|
bitfld.word 0x00 1. " REFOUT ,Reference output buffer" "Not available,Available"
|
|
bitfld.word 0x00 0. " REFOUT ,Reference enable" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "ADC14 (14-bit Analog-to-Digital Converter)"
|
|
base ad:0x40012000
|
|
width 15.
|
|
if ((per.w(ad:0x40012000)&0x02)==0x00)
|
|
group.long 0x00++0x17
|
|
line.long 0x00 "ADC14CTL0,ADC14 Control 0 Register"
|
|
bitfld.long 0x00 30.--31. " ADC14PDIV ,ADC14 predivider" "/1,/4,/32,/64"
|
|
bitfld.long 0x00 27.--29. " ADC14SHS ,ADC14 sample-and-hold source select" "ADC14SC,TA0_C1,TA0_C2,TA1_C1,TA1_C2,TA2_C1,TA2_C2,TA3_C1"
|
|
bitfld.long 0x00 26. " ADC14SHP ,ADC14 sample-and-hold pulse-mode select" "Sample-input signal,Sampling timer"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ADC14ISSH ,ADC14 invert signal sample-and-hold" "Not inverted,Inverted"
|
|
bitfld.long 0x00 22.--24. " ADC14DIV ,ADC14 clock divider" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
bitfld.long 0x00 19.--21. " ADC14SSEL ,ADC14 clock source select" "MODCLK,SYSCLK,ACLK,MCLK,SMCLK,HSMCLK,?..."
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " ADC14CONSEQ ,ADC14 conversion sequence mode select" "Single-channel,Sequence-of-channels,Repeat-single-channel,Repeat-sequence-of-channels"
|
|
rbitfld.long 0x00 16. " ADC14BUSY ,ADC14 busy" "Not active,Active"
|
|
bitfld.long 0x00 12.--15. " ADC14SHT1 ,ADC14 sample-and-hold time" "4,8,16,32,64,96,128,192,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14SHT0 ,ADC14 sample-and-hold time" "4,8,16,32,64,96,128,192,?..."
|
|
bitfld.long 0x00 7. " ADC14MSC ,ADC14 multiple sample and conversion" "0,1"
|
|
bitfld.long 0x00 4. " ADC14ON ,ADC14 on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ADC14ENC ,ADC14 enable conversion" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADC14SC ,ADC14 start conversion" "Not started,Started"
|
|
line.long 0x04 "ADC14CTL1,ADC14 Control 1 Register"
|
|
bitfld.long 0x04 27. " ADC14CH3MAP ,Controls internal channel 3 selection to ADC input channel MAX 5" "Not selected,Selected"
|
|
bitfld.long 0x04 26. " ADC14CH2MAP ,Controls internal channel 2 selection to ADC input channel MAX 4" "Not selected,Selected"
|
|
bitfld.long 0x04 25. " ADC14CH1MAP ,Controls internal channel 1 selection to ADC input channel MAX 3" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x04 24. " ADC14CH0MAP ,Controls internal channel 0 selection to ADC input channel MAX 2" "Not selected,Selected"
|
|
bitfld.long 0x04 23. " ADC14TCMAP ,Controls temperature sensor ADC input channel selection" "Not selected,Selected"
|
|
bitfld.long 0x04 22. " ADC14BATMAP ,Controls 1/2 AVCC ADC input channel selection" "Not selected,Selected"
|
|
textline " "
|
|
hexmask.long.tbyte 0x04 16.--20. 0x1 " ADC14CSTARTADD ,ADC14 conversion start address"
|
|
bitfld.long 0x04 4.--5. " ADC14RES ,ADC14 resolution" "8 bit,10 bit,12 bit,14 bit"
|
|
bitfld.long 0x04 3. " ADC14DF ,ADC14 data read-back format" "Binary unsigned,Signed binary"
|
|
textline " "
|
|
bitfld.long 0x04 2. " ADC14REFBURST ,ADC reference buffer burst" "Continuously,Sample-and-conversion"
|
|
bitfld.long 0x04 0.--1. " ADC14PWRMD ,ADC power modes" "Regular-power mode,,Low-power mode,?..."
|
|
line.long 0x08 "ADC14LO0,ADC14 Window Comparator Low Threshold 0 Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " ADC14LO0 ,ADC14 Low Threshold 0"
|
|
line.long 0x0C "ADC14HI0,ADC14 Window Comparator High Threshold 0 Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " ADC14LO0 ,High threshold 0"
|
|
line.long 0x10 "ADC14LO1,ADC14 Window Comparator Low Threshold 1 Register"
|
|
hexmask.long.word 0x10 0.--15. 1. " ADC14LO0 ,ADC14 Low Threshold 1"
|
|
line.long 0x14 "ADC14HI1,ADC14 Window Comparator High Threshold 1 Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " ADC14LO0 ,High threshold 1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "ADC14MCTL0,ADC14 Conversion Memory Control 0 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "ADC14MCTL1,ADC14 Conversion Memory Control 1 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "ADC14MCTL2,ADC14 Conversion Memory Control 2 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "ADC14MCTL3,ADC14 Conversion Memory Control 3 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "ADC14MCTL4,ADC14 Conversion Memory Control 4 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "ADC14MCTL5,ADC14 Conversion Memory Control 5 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "ADC14MCTL6,ADC14 Conversion Memory Control 6 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "ADC14MCTL7,ADC14 Conversion Memory Control 7 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "ADC14MCTL8,ADC14 Conversion Memory Control 8 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "ADC14MCTL9,ADC14 Conversion Memory Control 9 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "ADC14MCTL10,ADC14 Conversion Memory Control 10 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "ADC14MCTL11,ADC14 Conversion Memory Control 11 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "ADC14MCTL12,ADC14 Conversion Memory Control 12 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "ADC14MCTL13,ADC14 Conversion Memory Control 13 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "ADC14MCTL14,ADC14 Conversion Memory Control 14 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "ADC14MCTL15,ADC14 Conversion Memory Control 15 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "ADC14MCTL16,ADC14 Conversion Memory Control 16 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "ADC14MCTL17,ADC14 Conversion Memory Control 17 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "ADC14MCTL18,ADC14 Conversion Memory Control 18 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "ADC14MCTL19,ADC14 Conversion Memory Control 19 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "ADC14MCTL20,ADC14 Conversion Memory Control 20 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "ADC14MCTL21,ADC14 Conversion Memory Control 21 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "ADC14MCTL22,ADC14 Conversion Memory Control 22 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
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|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
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|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
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|
textline " "
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|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
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|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
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bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
group.long 0x74++0x03
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line.long 0x00 "ADC14MCTL23,ADC14 Conversion Memory Control 23 Register"
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|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
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|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
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|
textline " "
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bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
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bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
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bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
group.long 0x78++0x03
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|
line.long 0x00 "ADC14MCTL24,ADC14 Conversion Memory Control 24 Register"
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bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
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bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
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textline " "
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bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
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bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
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bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x7C++0x03
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line.long 0x00 "ADC14MCTL25,ADC14 Conversion Memory Control 25 Register"
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bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
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bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
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textline " "
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bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
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bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
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bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
group.long 0x80++0x03
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line.long 0x00 "ADC14MCTL26,ADC14 Conversion Memory Control 26 Register"
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bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
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bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
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textline " "
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bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
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bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
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bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
group.long 0x84++0x03
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line.long 0x00 "ADC14MCTL27,ADC14 Conversion Memory Control 27 Register"
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bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
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bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
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textline " "
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bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
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bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
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bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
group.long 0x88++0x03
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line.long 0x00 "ADC14MCTL28,ADC14 Conversion Memory Control 28 Register"
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bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
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bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
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textline " "
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bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
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bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
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bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x8C++0x03
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line.long 0x00 "ADC14MCTL29,ADC14 Conversion Memory Control 29 Register"
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bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
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bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
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bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
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bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
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bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
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bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
group.long 0x90++0x03
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line.long 0x00 "ADC14MCTL30,ADC14 Conversion Memory Control 30 Register"
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bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
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bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
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bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
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textline " "
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bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
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bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
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bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x94++0x03
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line.long 0x00 "ADC14MCTL31,ADC14 Conversion Memory Control 31 Register"
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bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
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bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
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textline " "
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bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,,,,,,,,,,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
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bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
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bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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else
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group.long 0x00++0x07
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line.long 0x00 "ADC14CTL0,ADC14 Control 0 Register"
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rbitfld.long 0x00 30.--31. " ADC14PDIV ,ADC14 predivider" "/1,/4,/32,/64"
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rbitfld.long 0x00 27.--29. " ADC14SHS ,ADC14 sample-and-hold source select" "ADC14SC,TA0_C1,TA0_C2,TA1_C1,TA1_C2,TA2_C1,TA2_C2,TA3_C1"
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rbitfld.long 0x00 26. " ADC14SHP ,ADC14 sample-and-hold pulse-mode select" "Sample-input signal,Sampling timer"
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textline " "
|
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rbitfld.long 0x00 25. " ADC14ISSH ,ADC14 invert signal sample-and-hold" "Not inverted,Inverted"
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rbitfld.long 0x00 22.--24. " ADC14DIV ,ADC14 clock divider" "/1,/2,/3,/4,/5,/6,/7,/8"
|
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rbitfld.long 0x00 19.--21. " ADC14SSEL ,ADC14 clock source select" "MODCLK,SYSCLK,ACLK,MCLK,SMCLK,HSMCLK,?..."
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textline " "
|
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rbitfld.long 0x00 17.--18. " ADC14CONSEQ ,ADC14 conversion sequence mode select" "Single-channel,Sequence-of-channels,Repeat-single-channel,Repeat-sequence-of-channels"
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rbitfld.long 0x00 16. " ADC14BUSY ,ADC14 busy" "Not active,Active"
|
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rbitfld.long 0x00 12.--15. " ADC14SHT1 ,ADC14 sample-and-hold time" "4,8,16,32,64,96,128,192,?..."
|
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textline " "
|
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rbitfld.long 0x00 8.--11. " ADC14SHT0 ,ADC14 sample-and-hold time" "4,8,16,32,64,96,128,192,?..."
|
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bitfld.long 0x00 7. " ADC14MSC ,ADC14 multiple sample and conversion" "0,1"
|
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bitfld.long 0x00 4. " ADC14ON ,ADC14 on" "Off,On"
|
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textline " "
|
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bitfld.long 0x00 1. " ADC14ENC ,ADC14 enable conversion" "Disabled,Enabled"
|
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bitfld.long 0x00 0. " ADC14SC ,ADC14 start conversion" "Not started,Started"
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line.long 0x04 "ADC14CTL1,ADC14 Control 1 Register"
|
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bitfld.long 0x04 27. " ADC14CH3MAP ,Controls internal channel 3 selection to ADC input channel MAX 5" "Not selected,Selected"
|
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bitfld.long 0x04 26. " ADC14CH2MAP ,Controls internal channel 2 selection to ADC input channel MAX 4" "Not selected,Selected"
|
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bitfld.long 0x04 25. " ADC14CH1MAP ,Controls internal channel 1 selection to ADC input channel MAX 3" "Not selected,Selected"
|
|
textline " "
|
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bitfld.long 0x04 24. " ADC14CH0MAP ,Controls internal channel 0 selection to ADC input channel MAX 2" "Not selected,Selected"
|
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bitfld.long 0x04 23. " ADC14TCMAP ,Controls temperature sensor ADC input channel selection" "Not selected,Selected"
|
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bitfld.long 0x04 22. " ADC14BATMAP ,Controls 1/2 AVCC ADC input channel selection" "Not selected,Selected"
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textline " "
|
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hexmask.long.tbyte 0x04 16.--20. 0x1 " ADC14CSTARTADD ,ADC14 conversion start address"
|
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rbitfld.long 0x04 4.--5. " ADC14RES ,ADC14 resolution" "8 bit,10 bit,12 bit,14 bit"
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bitfld.long 0x04 3. " ADC14DF ,ADC14 data read-back format" "Binary unsigned,Signed binary"
|
|
textline " "
|
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rbitfld.long 0x04 2. " ADC14REFBURST ,ADC reference buffer burst" "Continuously,Sample-and-conversion"
|
|
rbitfld.long 0x04 0.--1. " ADC14PWRMD ,ADC power modes" "Regular-power mode,,Low-power mode,?..."
|
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rgroup.long 0x08++0x0F
|
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line.long 0x00 "ADC14LO0,ADC14 Window Comparator Low Threshold 0 Register"
|
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hexmask.long.word 0x00 0.--15. 1. " ADC14LO0 ,ADC14 Low Threshold 0"
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line.long 0x04 "ADC14HI0,ADC14 Window Comparator High Threshold 0 Register"
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hexmask.long.word 0x04 0.--15. 1. " ADC14LO0 ,High threshold 0"
|
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line.long 0x08 "ADC14LO1,ADC14 Window Comparator Low Threshold 1 Register"
|
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hexmask.long.word 0x08 0.--15. 1. " ADC14LO0 ,ADC14 Low Threshold 1"
|
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line.long 0x0C "ADC14HI1,ADC14 Window Comparator High Threshold 1 Register"
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hexmask.long.word 0x0C 0.--15. 1. " ADC14LO0 ,High threshold 1"
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rgroup.long 0x18++0x03
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line.long 0x00 "ADC14MCTL0,ADC14 Conversion Memory Control 0 Register"
|
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bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
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bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
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bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
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bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
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bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x1C++0x03
|
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line.long 0x00 "ADC14MCTL1,ADC14 Conversion Memory Control 1 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
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bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
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bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "ADC14MCTL2,ADC14 Conversion Memory Control 2 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "ADC14MCTL3,ADC14 Conversion Memory Control 3 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "ADC14MCTL4,ADC14 Conversion Memory Control 4 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "ADC14MCTL5,ADC14 Conversion Memory Control 5 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "ADC14MCTL6,ADC14 Conversion Memory Control 6 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "ADC14MCTL7,ADC14 Conversion Memory Control 7 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "ADC14MCTL8,ADC14 Conversion Memory Control 8 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x3C++0x03
|
|
line.long 0x00 "ADC14MCTL9,ADC14 Conversion Memory Control 9 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "ADC14MCTL10,ADC14 Conversion Memory Control 10 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "ADC14MCTL11,ADC14 Conversion Memory Control 11 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "ADC14MCTL12,ADC14 Conversion Memory Control 12 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "ADC14MCTL13,ADC14 Conversion Memory Control 13 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x50++0x03
|
|
line.long 0x00 "ADC14MCTL14,ADC14 Conversion Memory Control 14 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x54++0x03
|
|
line.long 0x00 "ADC14MCTL15,ADC14 Conversion Memory Control 15 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "ADC14MCTL16,ADC14 Conversion Memory Control 16 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "ADC14MCTL17,ADC14 Conversion Memory Control 17 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "ADC14MCTL18,ADC14 Conversion Memory Control 18 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x64++0x03
|
|
line.long 0x00 "ADC14MCTL19,ADC14 Conversion Memory Control 19 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x68++0x03
|
|
line.long 0x00 "ADC14MCTL20,ADC14 Conversion Memory Control 20 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x6C++0x03
|
|
line.long 0x00 "ADC14MCTL21,ADC14 Conversion Memory Control 21 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "ADC14MCTL22,ADC14 Conversion Memory Control 22 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x74++0x03
|
|
line.long 0x00 "ADC14MCTL23,ADC14 Conversion Memory Control 23 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x78++0x03
|
|
line.long 0x00 "ADC14MCTL24,ADC14 Conversion Memory Control 24 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x7C++0x03
|
|
line.long 0x00 "ADC14MCTL25,ADC14 Conversion Memory Control 25 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x80++0x03
|
|
line.long 0x00 "ADC14MCTL26,ADC14 Conversion Memory Control 26 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x84++0x03
|
|
line.long 0x00 "ADC14MCTL27,ADC14 Conversion Memory Control 27 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x88++0x03
|
|
line.long 0x00 "ADC14MCTL28,ADC14 Conversion Memory Control 28 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x8C++0x03
|
|
line.long 0x00 "ADC14MCTL29,ADC14 Conversion Memory Control 29 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "ADC14MCTL30,ADC14 Conversion Memory Control 30 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x94++0x03
|
|
line.long 0x00 "ADC14MCTL31,ADC14 Conversion Memory Control 31 Register"
|
|
bitfld.long 0x00 15. " ADC14WINCTH ,Window comparator threshold register selection" "0,1"
|
|
bitfld.long 0x00 14. " ADC14WINC ,Comparator window enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADC14DIF ,Differential mode" "Single-ended,Differential"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ADC14VRSEL ,Selects combinations of V(R+) and V(R-) sources as well as the buffer selection and buffer on or off" "V(R+) = AVCC/V(R-) = AVSS,V(R+) = VREF buffered/V(R-) = AVSS,,V(R+) = VeREF+/V(R-) = VeREF-,V(R+) = VeREF+ buffered/V(R-) = VeREF,?..."
|
|
bitfld.long 0x00 7. " ADC14EOS ,End of sequence" "Not ended,Ended"
|
|
bitfld.long 0x00 0.--4. " ADC14INCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
hgroup.long 0x98++0x03
|
|
hide.long 0x00 "ADC14MEM0,ADC14 Conversion Memory 0 Register"
|
|
in
|
|
hgroup.long 0x9C++0x03
|
|
hide.long 0x00 "ADC14MEM1,ADC14 Conversion Memory 1 Register"
|
|
in
|
|
hgroup.long 0xA0++0x03
|
|
hide.long 0x00 "ADC14MEM2,ADC14 Conversion Memory 2 Register"
|
|
in
|
|
hgroup.long 0xA4++0x03
|
|
hide.long 0x00 "ADC14MEM3,ADC14 Conversion Memory 3 Register"
|
|
in
|
|
hgroup.long 0xA8++0x03
|
|
hide.long 0x00 "ADC14MEM4,ADC14 Conversion Memory 4 Register"
|
|
in
|
|
hgroup.long 0xAC++0x03
|
|
hide.long 0x00 "ADC14MEM5,ADC14 Conversion Memory 5 Register"
|
|
in
|
|
hgroup.long 0xB0++0x03
|
|
hide.long 0x00 "ADC14MEM6,ADC14 Conversion Memory 6 Register"
|
|
in
|
|
hgroup.long 0xB4++0x03
|
|
hide.long 0x00 "ADC14MEM7,ADC14 Conversion Memory 7 Register"
|
|
in
|
|
hgroup.long 0xB8++0x03
|
|
hide.long 0x00 "ADC14MEM8,ADC14 Conversion Memory 8 Register"
|
|
in
|
|
hgroup.long 0xBC++0x03
|
|
hide.long 0x00 "ADC14MEM9,ADC14 Conversion Memory 9 Register"
|
|
in
|
|
hgroup.long 0xC0++0x03
|
|
hide.long 0x00 "ADC14MEM10,ADC14 Conversion Memory 10 Register"
|
|
in
|
|
hgroup.long 0xC4++0x03
|
|
hide.long 0x00 "ADC14MEM11,ADC14 Conversion Memory 11 Register"
|
|
in
|
|
hgroup.long 0xC8++0x03
|
|
hide.long 0x00 "ADC14MEM12,ADC14 Conversion Memory 12 Register"
|
|
in
|
|
hgroup.long 0xCC++0x03
|
|
hide.long 0x00 "ADC14MEM13,ADC14 Conversion Memory 13 Register"
|
|
in
|
|
hgroup.long 0xD0++0x03
|
|
hide.long 0x00 "ADC14MEM14,ADC14 Conversion Memory 14 Register"
|
|
in
|
|
hgroup.long 0xD4++0x03
|
|
hide.long 0x00 "ADC14MEM15,ADC14 Conversion Memory 15 Register"
|
|
in
|
|
hgroup.long 0xD8++0x03
|
|
hide.long 0x00 "ADC14MEM16,ADC14 Conversion Memory 16 Register"
|
|
in
|
|
hgroup.long 0xDC++0x03
|
|
hide.long 0x00 "ADC14MEM17,ADC14 Conversion Memory 17 Register"
|
|
in
|
|
hgroup.long 0xE0++0x03
|
|
hide.long 0x00 "ADC14MEM18,ADC14 Conversion Memory 18 Register"
|
|
in
|
|
hgroup.long 0xE4++0x03
|
|
hide.long 0x00 "ADC14MEM19,ADC14 Conversion Memory 19 Register"
|
|
in
|
|
hgroup.long 0xE8++0x03
|
|
hide.long 0x00 "ADC14MEM20,ADC14 Conversion Memory 20 Register"
|
|
in
|
|
hgroup.long 0xEC++0x03
|
|
hide.long 0x00 "ADC14MEM21,ADC14 Conversion Memory 21 Register"
|
|
in
|
|
hgroup.long 0xF0++0x03
|
|
hide.long 0x00 "ADC14MEM22,ADC14 Conversion Memory 22 Register"
|
|
in
|
|
hgroup.long 0xF4++0x03
|
|
hide.long 0x00 "ADC14MEM23,ADC14 Conversion Memory 23 Register"
|
|
in
|
|
hgroup.long 0xF8++0x03
|
|
hide.long 0x00 "ADC14MEM24,ADC14 Conversion Memory 24 Register"
|
|
in
|
|
hgroup.long 0xFC++0x03
|
|
hide.long 0x00 "ADC14MEM25,ADC14 Conversion Memory 25 Register"
|
|
in
|
|
hgroup.long 0x100++0x03
|
|
hide.long 0x00 "ADC14MEM26,ADC14 Conversion Memory 26 Register"
|
|
in
|
|
hgroup.long 0x104++0x03
|
|
hide.long 0x00 "ADC14MEM27,ADC14 Conversion Memory 27 Register"
|
|
in
|
|
hgroup.long 0x108++0x03
|
|
hide.long 0x00 "ADC14MEM28,ADC14 Conversion Memory 28 Register"
|
|
in
|
|
hgroup.long 0x10C++0x03
|
|
hide.long 0x00 "ADC14MEM29,ADC14 Conversion Memory 29 Register"
|
|
in
|
|
hgroup.long 0x110++0x03
|
|
hide.long 0x00 "ADC14MEM30,ADC14 Conversion Memory 30 Register"
|
|
in
|
|
hgroup.long 0x114++0x03
|
|
hide.long 0x00 "ADC14MEM31,ADC14 Conversion Memory 31 Register"
|
|
in
|
|
group.long 0x13C++0x07
|
|
line.long 0x00 "ADC14IER0,ADC14 Interrupt Enable 0 Register"
|
|
bitfld.long 0x00 31. " ADC14IE31 ,Interrupt enable for the ADC14IFG31 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " ADC14IE30 ,Interrupt enable for the ADC14IFG30 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " ADC14IE29 ,Interrupt enable for the ADC14IFG29 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ADC14IE28 ,Interrupt enable for the ADC14IFG28 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " ADC14IE27 ,Interrupt enable for the ADC14IFG27 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " ADC14IE26 ,Interrupt enable for the ADC14IFG26 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ADC14IE25 ,Interrupt enable for the ADC14IFG25 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " ADC14IE24 ,Interrupt enable for the ADC14IFG24 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ADC14IE23 ,Interrupt enable for the ADC14IFG23 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ADC14IE22 ,Interrupt enable for the ADC14IFG22 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ADC14IE21 ,Interrupt enable for the ADC14IFG21 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ADC14IE20 ,Interrupt enable for the ADC14IFG20 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ADC14IE19 ,Interrupt enable for the ADC14IFG19 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " ADC14IE18 ,Interrupt enable for the ADC14IFG18 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " ADC14IE17 ,Interrupt enable for the ADC14IFG17 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ADC14IE16 ,Interrupt enable for the ADC14IFG16 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " ADC14IE15 ,Interrupt enable for the ADC14IFG15 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " ADC14IE14 ,Interrupt enable for the ADC14IFG14 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ADC14IE13 ,Interrupt enable for the ADC14IFG13 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " ADC14IE12 ,Interrupt enable for the ADC14IFG12 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " ADC14IE11 ,Interrupt enable for the ADC14IFG11 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ADC14IE10 ,Interrupt enable for the ADC14IFG10 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ADC14IE9 ,Interrupt enable for the ADC14IFG9 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ADC14IE8 ,Interrupt enable for the ADC14IFG8 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ADC14IE7 ,Interrupt enable for the ADC14IFG7 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " ADC14IE6 ,Interrupt enable for the ADC14IFG6 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ADC14IE5 ,Interrupt enable for the ADC14IFG5 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ADC14IE4 ,Interrupt enable for the ADC14IFG4 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ADC14IE3 ,Interrupt enable for the ADC14IFG3 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ADC14IE2 ,Interrupt enable for the ADC14IFG2 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ADC14IE1 ,Interrupt enable for the ADC14IFG1 bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADC14IE0 ,Interrupt enable for the ADC14IFG0 bit" "Disabled,Enabled"
|
|
line.long 0x04 "ADC14IER1,ADC14 Interrupt Enable 1 Register"
|
|
bitfld.long 0x04 6. " ADC14RDYIE ,ADC14 local buffered reference ready interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " ADC14TOVIE ,ADC14 conversion-time-overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " ADC14OVIE ,ADC14MEMx overflow-interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " ADC14HIIE ,Interrupt enable for the exceeding the upper limit interrupt of the window comparator for ADC14MEMx result register" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " ADC14LOIE ,Interrupt enable for the falling short of the lower limit interrupt of the window comparator for the ADC14MEMx result register" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " ADC14INIE ,Interrupt enable for the ADC14MEMx result register being greater than the ADC14LO threshold and below the ADC14HI threshold" "Disabled,Enabled"
|
|
rgroup.long 0x144++0x07
|
|
line.long 0x00 "ADC14IFGR0,ADC14 Interrupt Flag 0 Register"
|
|
bitfld.long 0x00 31. " ADC14IFG31 ,ADC14MEM31 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " ADC14IFG30 ,ADC14MEM30 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " ADC14IFG29 ,ADC14MEM29 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ADC14IFG28 ,ADC14MEM28 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 27. " ADC14IFG27 ,ADC14MEM27 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. " ADC14IFG26 ,ADC14MEM26 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ADC14IFG25 ,ADC14MEM25 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " ADC14IFG24 ,ADC14MEM24 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. " ADC14IFG23 ,ADC14MEM23 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ADC14IFG22 ,ADC14MEM22 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " ADC14IFG21 ,ADC14MEM21 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " ADC14IFG20 ,ADC14MEM20 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ADC14IFG19 ,ADC14MEM19 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " ADC14IFG18 ,ADC14MEM18 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " ADC14IFG17 ,ADC14MEM17 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ADC14IFG16 ,ADC14MEM16 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. " ADC14IFG15 ,ADC14MEM15 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " ADC14IFG14 ,ADC14MEM14 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ADC14IFG13 ,ADC14MEM13 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " ADC14IFG12 ,ADC14MEM12 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " ADC14IFG11 ,ADC14MEM11 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ADC14IFG10 ,ADC14MEM10 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " ADC14IFG9 ,ADC14MEM9 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " ADC14IFG8 ,ADC14MEM8 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ADC14IFG7 ,ADC14MEM7 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " ADC14IFG6 ,ADC14MEM6 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " ADC14IFG5 ,ADC14MEM5 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ADC14IFG4 ,ADC14MEM4 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " ADC14IFG3 ,ADC14MEM3 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " ADC14IFG2 ,ADC14MEM2 interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ADC14IFG1 ,ADC14MEM1 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " ADC14IFG0 ,ADC14MEM0 interrupt flag" "No interrupt,Interrupt"
|
|
line.long 0x04 "ADC14IFGR1,ADC14 Interrupt Flag 1 Register"
|
|
bitfld.long 0x04 6. " ADC14RDYIFG ,ADC14 local buffered reference ready interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " ADC14TOVIFG ,ADC14 conversion time overflow interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " ADC14OVIFG ,ADC14MEMx overflow interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 3. " ADC14HIIFG ,Interrupt flag for exceeding the upper limit interrupt of the window comparator for ADC14MEMx result register" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " ADC14LOIFG ,Interrupt flag for falling short of the lower limit interrupt of the window comparator for the ADC14MEMx result register" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " ADC14INIFG ,Interrupt flag for the ADC14MEMx result register being greater than the ADC14LO threshold and below the ADC14HI threshold" "No interrupt,Interrupt"
|
|
wgroup.long 0x14C++0x0B
|
|
line.long 0x00 "ADC14CLRIFGR0,ADC14 Clear Interrupt Flag 0 Register"
|
|
bitfld.long 0x00 31. " CLRADC14IFG31 ,Clear ADC14IFG31 bit" "No effect,Clear"
|
|
bitfld.long 0x00 30. " CLRADC14IFG30 ,Clear ADC14IFG30 bit" "No effect,Clear"
|
|
bitfld.long 0x00 29. " CLRADC14IFG29 ,Clear ADC14IFG29 bit" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 28. " CLRADC14IFG28 ,Clear ADC14IFG28 bit" "No effect,Clear"
|
|
bitfld.long 0x00 27. " CLRADC14IFG27 ,Clear ADC14IFG27 bit" "No effect,Clear"
|
|
bitfld.long 0x00 26. " CLRADC14IFG26 ,Clear ADC14IFG26 bit" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CLRADC14IFG25 ,Clear ADC14IFG25 bit" "No effect,Clear"
|
|
bitfld.long 0x00 24. " CLRADC14IFG24 ,Clear ADC14IFG24 bit" "No effect,Clear"
|
|
bitfld.long 0x00 23. " CLRADC14IFG23 ,Clear ADC14IFG23 bit" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CLRADC14IFG22 ,Clear ADC14IFG22 bit" "No effect,Clear"
|
|
bitfld.long 0x00 21. " CLRADC14IFG21 ,Clear ADC14IFG21 bit" "No effect,Clear"
|
|
bitfld.long 0x00 20. " CLRADC14IFG20 ,Clear ADC14IFG20 bit" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CLRADC14IFG19 ,Clear ADC14IFG19 bit" "No effect,Clear"
|
|
bitfld.long 0x00 18. " CLRADC14IFG18 ,Clear ADC14IFG18 bit" "No effect,Clear"
|
|
bitfld.long 0x00 17. " CLRADC14IFG17 ,Clear ADC14IFG17 bit" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CLRADC14IFG16 ,Clear ADC14IFG16 bit" "No effect,Clear"
|
|
bitfld.long 0x00 15. " CLRADC14IFG15 ,Clear ADC14IFG15 bit" "No effect,Clear"
|
|
bitfld.long 0x00 14. " CLRADC14IFG14 ,Clear ADC14IFG14 bit" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CLRADC14IFG13 ,Clear ADC14IFG13 bit" "No effect,Clear"
|
|
bitfld.long 0x00 12. " CLRADC14IFG12 ,Clear ADC14IFG12 bit" "No effect,Clear"
|
|
bitfld.long 0x00 11. " CLRADC14IFG11 ,Clear ADC14IFG11 bit" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CLRADC14IFG10 ,Clear ADC14IFG10 bit" "No effect,Clear"
|
|
bitfld.long 0x00 9. " CLRADC14IFG9 ,Clear ADC14IFG9 bit" "No effect,Clear"
|
|
bitfld.long 0x00 8. " CLRADC14IFG8 ,Clear ADC14IFG8 bit" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CLRADC14IFG7 ,Clear ADC14IFG7 bit" "No effect,Clear"
|
|
bitfld.long 0x00 6. " CLRADC14IFG6 ,Clear ADC14IFG6 bit" "No effect,Clear"
|
|
bitfld.long 0x00 5. " CLRADC14IFG5 ,Clear ADC14IFG5 bit" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLRADC14IFG4 ,Clear ADC14IFG4 bit" "No effect,Clear"
|
|
bitfld.long 0x00 3. " CLRADC14IFG3 ,Clear ADC14IFG3 bit" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CLRADC14IFG2 ,Clear ADC14IFG2 bit" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLRADC14IFG1 ,Clear ADC14IFG1 bit" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CLRADC14IFG0 ,Clear ADC14IFG0 bit" "No effect,Clear"
|
|
line.long 0x04 "ADC14CLRIFGR1,ADC14 Clear Interrupt Flag 1 Register"
|
|
bitfld.long 0x04 6. " CLRADC14RDYIFG ,Clear ADC14RDYIFG" "No effect,Clear"
|
|
bitfld.long 0x04 5. " CLRADC14TOVIFG ,Clear ADC14TOVIFG" "No effect,Clear"
|
|
bitfld.long 0x04 4. " CLRADC14OVIFG ,Clear ADC14OVIFG" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 3. " CLRADC14HIIFG ,Clear ADC14HIIFG" "No effect,Clear"
|
|
bitfld.long 0x04 2. " CLRADC14LOIFG ,Clear ADC14LOIFG" "No effect,Clear"
|
|
bitfld.long 0x04 1. " CLRADC14INIFG ,Clear ADC14INIFG" "No effect,Clear"
|
|
hgroup.long 0x154++0x03
|
|
hide.long 0x00 "ADC14IV,ADC14 Interrupt Vector Register"
|
|
in
|
|
width 0x0B
|
|
tree.end
|
|
tree "COMP_E (Comparator E module)"
|
|
tree "COMP_E0"
|
|
base ad:0x40003400
|
|
width 23.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "CE0CTL0,Comparator_E Control Register 0"
|
|
bitfld.word 0x00 15. " CEIMEN ,Channel input enable for the V- terminal of the comparator" "Disabled,Enabled"
|
|
bitfld.word 0x00 8.--11. " CEIMSEL ,Channel input selected for the V- terminal of the comparator" "0,1,2,3,4,5,6,7,?..."
|
|
bitfld.word 0x00 7. " CEIPEN ,Channel input enable for the V+ terminal of the comparator" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--3. " CEIPSEL ,Channel input selected for the V+ terminal of the comparator" "0,1,2,3,4,5,6,7,?..."
|
|
if ((per.w(ad:0x40003400+0x02)&0x1300)==(0x1000||0x1100))
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "CE0CTL1,Comparator_E Control Register 1"
|
|
bitfld.word 0x00 12. " CEMRVS ,Comparator output/CEMRVL selects between VREF0 or VREF1" "Comparator,CEMRVL"
|
|
bitfld.word 0x00 11. " CEMRVL ,Selects VREF0/VREF1" "VREF0,VREF1"
|
|
bitfld.word 0x00 10. " CEON ,Comparator on bit" "Off,On"
|
|
bitfld.word 0x00 8.--9. " CEPWRMD ,Power Mode" "High-speed,Normal,Ultra-low power,?..."
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " CEFDLY ,Filter delay" "500 ns,800 ns,1500 ns,3000 ns"
|
|
bitfld.word 0x00 5. " CEEX ,Exchange" "0,1"
|
|
bitfld.word 0x00 4. " CESHORT ,Input short" "Not shorted,Shorted"
|
|
bitfld.word 0x00 3. " CEIES ,Interrupt edge select for CEIIFG/CEIFG" "Rising/Falling,Falling/Rising"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CEF ,Output filter" "Not filtered,Filtered"
|
|
bitfld.word 0x00 1. " CEOUTPOL ,Output polarity" "Noninverted,Inverted"
|
|
bitfld.word 0x00 0. " CEOUT ,Output value" "0,1"
|
|
elif ((per.w(ad:0x40003400+0x02)&0x0300)==(0x1000||0x1100))
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "CE0CTL1,Comparator_E Control Register 1"
|
|
bitfld.word 0x00 12. " CEMRVS ,Comparator output/CEMRVL selects between VREF0 or VREF1" "Comparator,CEMRVL"
|
|
bitfld.word 0x00 10. " CEON ,Comparator on bit" "Off,On"
|
|
bitfld.word 0x00 8.--9. " CEPWRMD ,Power Mode" "High-speed,Normal,Ultra-low power,?..."
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " CEFDLY ,Filter delay" "500 ns,800 ns,1500 ns,3000 ns"
|
|
bitfld.word 0x00 5. " CEEX ,Exchange" "0,1"
|
|
bitfld.word 0x00 4. " CESHORT ,Input short" "Not shorted,Shorted"
|
|
bitfld.word 0x00 3. " CEIES ,Interrupt edge select for CEIIFG/CEIFG" "Rising/Falling,Falling/Rising"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CEF ,Output filter" "Not filtered,Filtered"
|
|
bitfld.word 0x00 1. " CEOUTPOL ,Output polarity" "Noninverted,Inverted"
|
|
bitfld.word 0x00 0. " CEOUT ,Output value" "0,1"
|
|
elif ((per.w(ad:0x40003400+0x02)&0x1300)==(0x1200||0x1300))
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "CE0CTL1,Comparator_E Control Register 1"
|
|
bitfld.word 0x00 12. " CEMRVS ,Comparator output/CEMRVL selects between VREF0 or VREF1" "Comparator,CEMRVL"
|
|
bitfld.word 0x00 11. " CEMRVL ,Selects VREF0/VREF1" "VREF0,VREF1"
|
|
bitfld.word 0x00 10. " CEON ,Comparator on bit" "Off,On"
|
|
bitfld.word 0x00 8.--9. " CEPWRMD ,Power Mode" "High-speed,Normal,Ultra-low power,?..."
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " CEFDLY ,Filter delay" "500 ns,800 ns,1500 ns,3000 ns"
|
|
bitfld.word 0x00 5. " CEEX ,Exchange" "0,1"
|
|
bitfld.word 0x00 4. " CESHORT ,Input short" "Not shorted,Shorted"
|
|
bitfld.word 0x00 3. " CEIES ,Interrupt edge select for CEIIFG/CEIFG" "Rising/Falling,Falling/Rising"
|
|
textline " "
|
|
bitfld.word 0x00 1. " CEOUTPOL ,Output polarity" "Noninverted,Inverted"
|
|
bitfld.word 0x00 0. " CEOUT ,Output value" "0,1"
|
|
else
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "CE0CTL1,Comparator_E Control Register 1"
|
|
bitfld.word 0x00 12. " CEMRVS ,Comparator output/CEMRVL selects between VREF0 or VREF1" "Comparator,CEMRVL"
|
|
bitfld.word 0x00 10. " CEON ,Comparator on bit" "Off,On"
|
|
bitfld.word 0x00 8.--9. " CEPWRMD ,Power Mode" "High-speed,Normal,Ultra-low power,?..."
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " CEFDLY ,Filter delay" "500 ns,800 ns,1500 ns,3000 ns"
|
|
bitfld.word 0x00 5. " CEEX ,Exchange" "0,1"
|
|
bitfld.word 0x00 4. " CESHORT ,Input short" "Not shorted,Shorted"
|
|
bitfld.word 0x00 3. " CEIES ,Interrupt edge select for CEIIFG/CEIFG" "Rising/Falling,Falling/Rising"
|
|
textline " "
|
|
bitfld.word 0x00 1. " CEOUTPOL ,Output polarity" "Noninverted,Inverted"
|
|
bitfld.word 0x00 0. " CEOUT ,Output value" "0,1"
|
|
endif
|
|
if (((per.w(ad:0x40003400))&0x20)==0x20)
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "CE0CTL2,Comparator_E Control Register 2"
|
|
bitfld.word 0x00 15. " CEREFACC ,Reference accuracy" "Static,Clocked"
|
|
bitfld.word 0x00 13.--14. " CEREFL ,Reference voltage level" "Disabled,1.2 V,2.0 V,2.5 V"
|
|
bitfld.word 0x00 8.--12. " CEREF1 ,Reference resistor tap 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 6.--7. " CERS ,Reference source" "No current,VCC applied,Resistor ladder on,Resistor ladder off"
|
|
textline " "
|
|
bitfld.word 0x00 5. " CERSEL ,Reference select" "V-,V+"
|
|
bitfld.word 0x00 0.--4. " CEREF0 ,Reference resistor tap 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "CE0CTL2,Comparator_E Control Register 2"
|
|
bitfld.word 0x00 15. " CEREFACC ,Reference accuracy" "Static,Clocked"
|
|
bitfld.word 0x00 13.--14. " CEREFL ,Reference voltage level" "Disabled,1.2 V,2.0 V,2.5 V"
|
|
bitfld.word 0x00 8.--12. " CEREF1 ,Reference resistor tap 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 6.--7. " CERS ,Reference source" "No current,VCC applied,Resistor ladder on,Resistor ladder off"
|
|
textline " "
|
|
bitfld.word 0x00 5. " CERSEL ,Reference select" "V+,V-"
|
|
bitfld.word 0x00 0.--4. " CEREF0 ,Reference resistor tap 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "CE0CTL3,Comparator_E Control Register 3"
|
|
bitfld.word 0x00 7. " CEPD7 ,Port disable" "No,Yes"
|
|
bitfld.word 0x00 6. " CEPD6 ,Port disable" "No,Yes"
|
|
bitfld.word 0x00 5. " CEPD5 ,Port disable" "No,Yes"
|
|
bitfld.word 0x00 4. " CEPD4 ,Port disable" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CEPD3 ,Port disable" "No,Yes"
|
|
bitfld.word 0x00 2. " CEPD2 ,Port disable" "No,Yes"
|
|
bitfld.word 0x00 1. " CEPD1 ,Port disable" "No,Yes"
|
|
bitfld.word 0x00 0. " CEPD0 ,Port disable" "No,Yes"
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "CE0INT,Comparator_E Interrupt Control Register"
|
|
bitfld.word 0x00 12. " CERDYIE ,Comparator ready interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " CEIIE ,Comparator output interrupt enable inverted polarity" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " CEIE ,Comparator output interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " CERDYIFG ,Comparator ready interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 1. " CEIIFG ,Comparator output inverted interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 0. " CEIFG ,Comparator output interrupt flag" "No interrupt,Interrupt"
|
|
hgroup.word 0x0E++0x01
|
|
hide.word 0x00 "CE0IV,Comparator_E Interrupt Vector Word Register"
|
|
in
|
|
width 0x0B
|
|
tree.end
|
|
tree "COMP_E1"
|
|
base ad:0x40003800
|
|
width 23.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "CE1CTL0,Comparator_E Control Register 0"
|
|
bitfld.word 0x00 15. " CEIMEN ,Channel input enable for the V- terminal of the comparator" "Disabled,Enabled"
|
|
bitfld.word 0x00 8.--11. " CEIMSEL ,Channel input selected for the V- terminal of the comparator" "0,1,2,3,4,5,6,7,?..."
|
|
bitfld.word 0x00 7. " CEIPEN ,Channel input enable for the V+ terminal of the comparator" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--3. " CEIPSEL ,Channel input selected for the V+ terminal of the comparator" "0,1,2,3,4,5,6,7,?..."
|
|
if ((per.w(ad:0x40003800+0x02)&0x1300)==(0x1000||0x1100))
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "CE1CTL1,Comparator_E Control Register 1"
|
|
bitfld.word 0x00 12. " CEMRVS ,Comparator output/CEMRVL selects between VREF0 or VREF1" "Comparator,CEMRVL"
|
|
bitfld.word 0x00 11. " CEMRVL ,Selects VREF0/VREF1" "VREF0,VREF1"
|
|
bitfld.word 0x00 10. " CEON ,Comparator on bit" "Off,On"
|
|
bitfld.word 0x00 8.--9. " CEPWRMD ,Power Mode" "High-speed,Normal,Ultra-low power,?..."
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " CEFDLY ,Filter delay" "500 ns,800 ns,1500 ns,3000 ns"
|
|
bitfld.word 0x00 5. " CEEX ,Exchange" "0,1"
|
|
bitfld.word 0x00 4. " CESHORT ,Input short" "Not shorted,Shorted"
|
|
bitfld.word 0x00 3. " CEIES ,Interrupt edge select for CEIIFG/CEIFG" "Rising/Falling,Falling/Rising"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CEF ,Output filter" "Not filtered,Filtered"
|
|
bitfld.word 0x00 1. " CEOUTPOL ,Output polarity" "Noninverted,Inverted"
|
|
bitfld.word 0x00 0. " CEOUT ,Output value" "0,1"
|
|
elif ((per.w(ad:0x40003800+0x02)&0x0300)==(0x1000||0x1100))
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "CE1CTL1,Comparator_E Control Register 1"
|
|
bitfld.word 0x00 12. " CEMRVS ,Comparator output/CEMRVL selects between VREF0 or VREF1" "Comparator,CEMRVL"
|
|
bitfld.word 0x00 10. " CEON ,Comparator on bit" "Off,On"
|
|
bitfld.word 0x00 8.--9. " CEPWRMD ,Power Mode" "High-speed,Normal,Ultra-low power,?..."
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " CEFDLY ,Filter delay" "500 ns,800 ns,1500 ns,3000 ns"
|
|
bitfld.word 0x00 5. " CEEX ,Exchange" "0,1"
|
|
bitfld.word 0x00 4. " CESHORT ,Input short" "Not shorted,Shorted"
|
|
bitfld.word 0x00 3. " CEIES ,Interrupt edge select for CEIIFG/CEIFG" "Rising/Falling,Falling/Rising"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CEF ,Output filter" "Not filtered,Filtered"
|
|
bitfld.word 0x00 1. " CEOUTPOL ,Output polarity" "Noninverted,Inverted"
|
|
bitfld.word 0x00 0. " CEOUT ,Output value" "0,1"
|
|
elif ((per.w(ad:0x40003800+0x02)&0x1300)==(0x1200||0x1300))
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "CE1CTL1,Comparator_E Control Register 1"
|
|
bitfld.word 0x00 12. " CEMRVS ,Comparator output/CEMRVL selects between VREF0 or VREF1" "Comparator,CEMRVL"
|
|
bitfld.word 0x00 11. " CEMRVL ,Selects VREF0/VREF1" "VREF0,VREF1"
|
|
bitfld.word 0x00 10. " CEON ,Comparator on bit" "Off,On"
|
|
bitfld.word 0x00 8.--9. " CEPWRMD ,Power Mode" "High-speed,Normal,Ultra-low power,?..."
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " CEFDLY ,Filter delay" "500 ns,800 ns,1500 ns,3000 ns"
|
|
bitfld.word 0x00 5. " CEEX ,Exchange" "0,1"
|
|
bitfld.word 0x00 4. " CESHORT ,Input short" "Not shorted,Shorted"
|
|
bitfld.word 0x00 3. " CEIES ,Interrupt edge select for CEIIFG/CEIFG" "Rising/Falling,Falling/Rising"
|
|
textline " "
|
|
bitfld.word 0x00 1. " CEOUTPOL ,Output polarity" "Noninverted,Inverted"
|
|
bitfld.word 0x00 0. " CEOUT ,Output value" "0,1"
|
|
else
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "CE1CTL1,Comparator_E Control Register 1"
|
|
bitfld.word 0x00 12. " CEMRVS ,Comparator output/CEMRVL selects between VREF0 or VREF1" "Comparator,CEMRVL"
|
|
bitfld.word 0x00 10. " CEON ,Comparator on bit" "Off,On"
|
|
bitfld.word 0x00 8.--9. " CEPWRMD ,Power Mode" "High-speed,Normal,Ultra-low power,?..."
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " CEFDLY ,Filter delay" "500 ns,800 ns,1500 ns,3000 ns"
|
|
bitfld.word 0x00 5. " CEEX ,Exchange" "0,1"
|
|
bitfld.word 0x00 4. " CESHORT ,Input short" "Not shorted,Shorted"
|
|
bitfld.word 0x00 3. " CEIES ,Interrupt edge select for CEIIFG/CEIFG" "Rising/Falling,Falling/Rising"
|
|
textline " "
|
|
bitfld.word 0x00 1. " CEOUTPOL ,Output polarity" "Noninverted,Inverted"
|
|
bitfld.word 0x00 0. " CEOUT ,Output value" "0,1"
|
|
endif
|
|
if (((per.w(ad:0x40003800))&0x20)==0x20)
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "CE1CTL2,Comparator_E Control Register 2"
|
|
bitfld.word 0x00 15. " CEREFACC ,Reference accuracy" "Static,Clocked"
|
|
bitfld.word 0x00 13.--14. " CEREFL ,Reference voltage level" "Disabled,1.2 V,2.0 V,2.5 V"
|
|
bitfld.word 0x00 8.--12. " CEREF1 ,Reference resistor tap 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 6.--7. " CERS ,Reference source" "No current,VCC applied,Resistor ladder on,Resistor ladder off"
|
|
textline " "
|
|
bitfld.word 0x00 5. " CERSEL ,Reference select" "V-,V+"
|
|
bitfld.word 0x00 0.--4. " CEREF0 ,Reference resistor tap 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "CE1CTL2,Comparator_E Control Register 2"
|
|
bitfld.word 0x00 15. " CEREFACC ,Reference accuracy" "Static,Clocked"
|
|
bitfld.word 0x00 13.--14. " CEREFL ,Reference voltage level" "Disabled,1.2 V,2.0 V,2.5 V"
|
|
bitfld.word 0x00 8.--12. " CEREF1 ,Reference resistor tap 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.word 0x00 6.--7. " CERS ,Reference source" "No current,VCC applied,Resistor ladder on,Resistor ladder off"
|
|
textline " "
|
|
bitfld.word 0x00 5. " CERSEL ,Reference select" "V+,V-"
|
|
bitfld.word 0x00 0.--4. " CEREF0 ,Reference resistor tap 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "CE1CTL3,Comparator_E Control Register 3"
|
|
bitfld.word 0x00 7. " CEPD7 ,Port disable" "No,Yes"
|
|
bitfld.word 0x00 6. " CEPD6 ,Port disable" "No,Yes"
|
|
bitfld.word 0x00 5. " CEPD5 ,Port disable" "No,Yes"
|
|
bitfld.word 0x00 4. " CEPD4 ,Port disable" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CEPD3 ,Port disable" "No,Yes"
|
|
bitfld.word 0x00 2. " CEPD2 ,Port disable" "No,Yes"
|
|
bitfld.word 0x00 1. " CEPD1 ,Port disable" "No,Yes"
|
|
bitfld.word 0x00 0. " CEPD0 ,Port disable" "No,Yes"
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "CE1INT,Comparator_E Interrupt Control Register"
|
|
bitfld.word 0x00 12. " CERDYIE ,Comparator ready interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " CEIIE ,Comparator output interrupt enable inverted polarity" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " CEIE ,Comparator output interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " CERDYIFG ,Comparator ready interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 1. " CEIIFG ,Comparator output inverted interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 0. " CEIFG ,Comparator output interrupt flag" "No interrupt,Interrupt"
|
|
hgroup.word 0x0E++0x01
|
|
hide.word 0x00 "CE1IV,Comparator_E Interrupt Vector Word Register"
|
|
in
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "eUSCI (Enhanced Universal Serial Communication)"
|
|
tree "eUSCI_A0"
|
|
base ad:0x40001000
|
|
width 11.
|
|
if ((per.w(ad:0x40001000)&0x100)==0x100)
|
|
width 17.
|
|
if (((per.w(ad:0x40001000))&0x01)==0x01)
|
|
if ((per.w(ad:0x40001000)&0x100)==0x100)
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCA0CTLW0,eUSCI_A0 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
bitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
bitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCA0CTLW0,eUSCI_A0 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
bitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "UCA0BRW,eUSCI_A0 Baud Rate Control Word Register"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA0STATW,eUSCI_A0 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Idle,Busy"
|
|
else
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCA0CTLW0,eUSCI_A0 Control Word Register 0"
|
|
rbitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
rbitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
rbitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
rbitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
rbitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
rbitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
rbitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
rgroup.word 0x06++0x01
|
|
line.word 0x00 "UCA0BRW,eUSCI_A0 Baud Rate Control Word Register"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA0STATW,eUSCI_A0 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Idle,Busy"
|
|
endif
|
|
hgroup.word 0x0C++0x01
|
|
hide.word 0x00 "UCA0RXBUF,eUSCI_A0 Receive Buffer Register"
|
|
in
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCA0TXBUF,eUSCI_A0 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUFx ,Transmit data buffer"
|
|
group.word 0x1A++0x03
|
|
line.word 0x00 "UCA0IE,eUSCI_A0 Interrupt Enable Register"
|
|
bitfld.word 0x00 1. " UCTXIE ,Transmit interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIE ,Receive interrupt enable bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCA0IFG,eUSCI_A0 Interrupt Flag Register"
|
|
bitfld.word 0x02 1. " UCTXIFG ,Transmit interrupt flag bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 0. " UCRXIFG ,Receive interrupt flag bit" "No interrupt,Interrupt"
|
|
rgroup.word 0x1E++0x01
|
|
line.word 0x00 "UCA0IV,eUSCI_A0 Interrupt Vector Register"
|
|
width 0x0B
|
|
else
|
|
width 14.
|
|
if (((per.w(ad:0x40001000))&0x01)==0x01)
|
|
group.word 0x00++0x01 "UART"
|
|
line.word 0x00 "UCA0CTLW0,eUSCI_A0 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCPEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " UCPAR ,Parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
bitfld.word 0x00 11. " UCSPB ,Stop bit select" "One,Two"
|
|
bitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "UART mode,Idle-line multiprocessor mode,Address-bit multiprocessor mode,UART mode with baud-rate detection"
|
|
textline " "
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" "UCLK,ACLK,SMCLK,SMCLK"
|
|
bitfld.word 0x00 5. " UCRXEIE ,Receive erroneous-character interrupt enable" "Rejected,Received"
|
|
bitfld.word 0x00 4. " UCBRKIE ,Receive break character interrupt enable" "Not set,Set"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCDORM ,Puts eUSCI_A into sleep mode" "Not dormant,Dormant"
|
|
bitfld.word 0x00 2. " UCTXADDR ,Transmit address" "Data,Address"
|
|
bitfld.word 0x00 1. " UCTXBRK ,Transmit break" "Not break,Break"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x00++0x01 "UART"
|
|
line.word 0x00 "UCA0CTLW0,eUSCI_A0 Control Word Register 0"
|
|
rbitfld.word 0x00 15. " UCPEN ,Parity enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " UCPAR ,Parity select" "Odd,Even"
|
|
textline " "
|
|
rbitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
rbitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
rbitfld.word 0x00 11. " UCSPB ,Stop bit select" "One,Two"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "UART mode,Idle-line multiprocessor mode,Address-bit multiprocessor mode,UART mode with baud-rate detection"
|
|
textline " "
|
|
rbitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
rbitfld.word 0x00 6.--7. " UCSSELx ,eUSCI_A clock source select" "UCLK,ACLK,SMCLK,SMCLK"
|
|
bitfld.word 0x00 5. " UCRXEIE ,Receive erroneous-character interrupt enable" "Rejected,Received"
|
|
bitfld.word 0x00 4. " UCBRKIE ,Receive break character interrupt enable" "Not set,Set"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCDORM ,Puts eUSCI_A into sleep mode" "Not dormant,Dormant"
|
|
bitfld.word 0x00 2. " UCTXADDR ,Transmit address" "Data,Address"
|
|
bitfld.word 0x00 1. " UCTXBRK ,Transmit break" "Not break,Break"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCA0CTLW1,eUSCI_A0 Control Word Register 1"
|
|
bitfld.word 0x00 0.--1. " UCGLIT ,Deglitch time" "5 ns,20 ns,30 ns,50 ns"
|
|
if (((per.w(ad:0x40001000))&0x01)==0x01)
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "UCA0BRW,eUSCI_A0 Baud Rate Control Word Register"
|
|
line.word 0x02 "UCA0MCTLW,eUSCI_A0 Modulation Control Word Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " UCBRS ,Second modulation stage select"
|
|
bitfld.word 0x02 4.--7. " UCBRF ,First modulation stage select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x02 0. " UCOS16 ,Oversampling mode enabled" "Disabled,Enabled"
|
|
if (((per.w(ad:0x40001000))&0x600)==0x200)
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA0STATW,eUSCI_A0 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
bitfld.word 0x00 1. " UCIDLE ,Idle line detected in idle-line multiprocessor mode" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
elif (((per.w(ad:0x40001000))&0x600)==0x400)
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA0STATW,eUSCI_A0 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
bitfld.word 0x00 1. " UCADDR ,Address received in address-bit multiprocessor mode" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
else
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA0STATW,eUSCI_A0 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
endif
|
|
else
|
|
rgroup.word 0x06++0x03
|
|
line.word 0x00 "UCA0BRW,eUSCI_A0 Baud Rate Control Word Register"
|
|
line.word 0x02 "UCA0MCTLW,eUSCI_A0 Modulation Control Word Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " UCBRS ,Second modulation stage select"
|
|
bitfld.word 0x02 4.--7. " UCBRF ,First modulation stage select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x02 0. " UCOS16 ,Oversampling mode enabled" "Disabled,Enabled"
|
|
if (((per.w(ad:0x40001000))&0x600)==0x200)
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA0STATW,eUSCI_A0 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
bitfld.word 0x00 1. " UCIDLE ,Idle line detected in idle-line multiprocessor mode" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
elif (((per.w(ad:0x40001000))&0x600)==0x400)
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA0STATW,eUSCI_A0 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
bitfld.word 0x00 1. " UCADDR ,Address received in address-bit multiprocessor mode" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
else
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA0STATW,eUSCI_A0 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
endif
|
|
endif
|
|
hgroup.word 0x0C++0x01
|
|
hide.word 0x00 "UCA0RXBUF,eUSCI_A0 Receive Buffer Register"
|
|
in
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCA0TXBUF,eUSCI_A0 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUF ,Transmit data buffer"
|
|
if (((per.w(ad:0x40001000))&0x01)==0x01)
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "UCA0ABCTL,eUSCI_A0 Auto Baud Rate Control Register"
|
|
bitfld.word 0x00 4.--5. " UCDELIMx ,Break/synch delimiter length bits" "1 bit time,2 bit times,3 bit times,4 bit times"
|
|
bitfld.word 0x00 3. " UCSTOE ,Synch field time out error" "No error,Error"
|
|
bitfld.word 0x00 2. " UCBTOE ,Break time out error" "No error,Error"
|
|
bitfld.word 0x00 0. " UCABDEN ,Automatic baud-rate detect enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "UCA0ABCTL,eUSCI_A0 Auto Baud Rate Control Register"
|
|
rbitfld.word 0x00 4.--5. " UCDELIMx ,Break/synch delimiter length bits" "1 bit time,2 bit times,3 bit times,4 bit times"
|
|
bitfld.word 0x00 3. " UCSTOE ,Synch field time out error" "No error,Error"
|
|
bitfld.word 0x00 2. " UCBTOE ,Break time out error" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCABDEN ,Automatic baud-rate detect enable" "Disabled,Enabled"
|
|
endif
|
|
if (((per.w(ad:0x40001000))&0x01)==0x01)
|
|
if ((per.w(ad:0x40001000+0x08)&0x01)==0x01)
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "UCA0IRCTL,eUSCI_A0 IrDA Control Word Register"
|
|
bitfld.word 0x00 10.--15. " UCIRRXFLx ,Receive filter length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 9. " UCIRRXPL ,IrDA receive input UCAxRXD polarity bit" "High,Low"
|
|
bitfld.word 0x00 8. " UCIRRXFE ,IrDA receive filter enabled bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--7. " UCIRTXPLx ,Transmit pulse length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCIRTXCLK ,IrDA transmit pulse clock select bit" "BRCLK,BITCLK16"
|
|
bitfld.word 0x00 0. " UCIREN ,IrDA encoder and decoder enable bit" "Disabled,Enabled"
|
|
else
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "UCA0IRCTL,eUSCI_A0 IrDA Control Word Register"
|
|
bitfld.word 0x00 10.--15. " UCIRRXFLx ,Receive filter length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 9. " UCIRRXPL ,IrDA receive input UCAxRXD polarity bit" "High,Low"
|
|
bitfld.word 0x00 8. " UCIRRXFE ,IrDA receive filter enabled bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--7. " UCIRTXPLx ,Transmit pulse length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCIRTXCLK ,IrDA transmit pulse clock select bit" "BRCLK,BRCLK"
|
|
bitfld.word 0x00 0. " UCIREN ,IrDA encoder and decoder enable bit" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if ((per.w(ad:0x40001000+0x08)&0x01)==0x01)
|
|
rgroup.word 0x12++0x01
|
|
line.word 0x00 "UCA0IRCTL,eUSCI_A0 IrDA Control Word Register"
|
|
bitfld.word 0x00 10.--15. " UCIRRXFLx ,Receive filter length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 9. " UCIRRXPL ,IrDA receive input UCAxRXD polarity bit" "High,Low"
|
|
bitfld.word 0x00 8. " UCIRRXFE ,IrDA receive filter enabled bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--7. " UCIRTXPLx ,Transmit pulse length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCIRTXCLK ,IrDA transmit pulse clock select bit" "BRCLK,BITCLK16"
|
|
bitfld.word 0x00 0. " UCIREN ,IrDA encoder and decoder enable bit" "Disabled,Enabled"
|
|
else
|
|
rgroup.word 0x12++0x01
|
|
line.word 0x00 "UCA0IRCTL,eUSCI_A0 IrDA Control Word Register"
|
|
bitfld.word 0x00 10.--15. " UCIRRXFLx ,Receive filter length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 9. " UCIRRXPL ,IrDA receive input UCAxRXD polarity bit" "High,Low"
|
|
bitfld.word 0x00 8. " UCIRRXFE ,IrDA receive filter enabled bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--7. " UCIRTXPLx ,Transmit pulse length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCIRTXCLK ,IrDA transmit pulse clock select bit" "BRCLK,BRCLK"
|
|
bitfld.word 0x00 0. " UCIREN ,IrDA encoder and decoder enable bit" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
group.word 0x1A++0x03
|
|
line.word 0x00 "UCA0IE,eUSCI_A0 Interrupt Enable Register"
|
|
bitfld.word 0x00 3. " UCTXCPTIE ,Transmit complete interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " UCSTTIE ,Start interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " UCTXIE ,Transmit interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIE ,Receive interrupt enable bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCA0IFG,eUSCI_A0 Interrupt Flag Register"
|
|
bitfld.word 0x02 3. " UCTXCPTIFG ,Transmit complete interrupt flag bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 2. " UCSTTIFG ,Start bit interrupt bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 1. " UCTXIFG ,Transmit interrupt flag bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 0. " UCRXIFG ,Receive interrupt flag bit" "No interrupt,Interrupt"
|
|
rgroup.word 0x1E++0x01
|
|
line.word 0x00 "UCA0IV,eUSCI_A0 Interrupt Vector Register"
|
|
width 0x0B
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "eUSCI_A1"
|
|
base ad:0x40001400
|
|
width 11.
|
|
if ((per.w(ad:0x40001400)&0x100)==0x100)
|
|
width 17.
|
|
if (((per.w(ad:0x40001400))&0x01)==0x01)
|
|
if ((per.w(ad:0x40001400)&0x100)==0x100)
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCA1CTLW0,eUSCI_A1 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
bitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
bitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCA1CTLW0,eUSCI_A1 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
bitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "UCA1BRW,eUSCI_A1 Baud Rate Control Word Register"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA1STATW,eUSCI_A1 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Idle,Busy"
|
|
else
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCA1CTLW0,eUSCI_A1 Control Word Register 0"
|
|
rbitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
rbitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
rbitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
rbitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
rbitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
rbitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
rbitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
rgroup.word 0x06++0x01
|
|
line.word 0x00 "UCA1BRW,eUSCI_A1 Baud Rate Control Word Register"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA1STATW,eUSCI_A1 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Idle,Busy"
|
|
endif
|
|
hgroup.word 0x0C++0x01
|
|
hide.word 0x00 "UCA1RXBUF,eUSCI_A1 Receive Buffer Register"
|
|
in
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCA1TXBUF,eUSCI_A1 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUFx ,Transmit data buffer"
|
|
group.word 0x1A++0x03
|
|
line.word 0x00 "UCA1IE,eUSCI_A1 Interrupt Enable Register"
|
|
bitfld.word 0x00 1. " UCTXIE ,Transmit interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIE ,Receive interrupt enable bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCA1IFG,eUSCI_A1 Interrupt Flag Register"
|
|
bitfld.word 0x02 1. " UCTXIFG ,Transmit interrupt flag bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 0. " UCRXIFG ,Receive interrupt flag bit" "No interrupt,Interrupt"
|
|
rgroup.word 0x1E++0x01
|
|
line.word 0x00 "UCA1IV,eUSCI_A1 Interrupt Vector Register"
|
|
width 0x0B
|
|
else
|
|
width 14.
|
|
if (((per.w(ad:0x40001400))&0x01)==0x01)
|
|
group.word 0x00++0x01 "UART"
|
|
line.word 0x00 "UCA1CTLW0,eUSCI_A1 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCPEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " UCPAR ,Parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
bitfld.word 0x00 11. " UCSPB ,Stop bit select" "One,Two"
|
|
bitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "UART mode,Idle-line multiprocessor mode,Address-bit multiprocessor mode,UART mode with baud-rate detection"
|
|
textline " "
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" "UCLK,ACLK,SMCLK,SMCLK"
|
|
bitfld.word 0x00 5. " UCRXEIE ,Receive erroneous-character interrupt enable" "Rejected,Received"
|
|
bitfld.word 0x00 4. " UCBRKIE ,Receive break character interrupt enable" "Not set,Set"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCDORM ,Puts eUSCI_A into sleep mode" "Not dormant,Dormant"
|
|
bitfld.word 0x00 2. " UCTXADDR ,Transmit address" "Data,Address"
|
|
bitfld.word 0x00 1. " UCTXBRK ,Transmit break" "Not break,Break"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x00++0x01 "UART"
|
|
line.word 0x00 "UCA1CTLW0,eUSCI_A1 Control Word Register 0"
|
|
rbitfld.word 0x00 15. " UCPEN ,Parity enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " UCPAR ,Parity select" "Odd,Even"
|
|
textline " "
|
|
rbitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
rbitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
rbitfld.word 0x00 11. " UCSPB ,Stop bit select" "One,Two"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "UART mode,Idle-line multiprocessor mode,Address-bit multiprocessor mode,UART mode with baud-rate detection"
|
|
textline " "
|
|
rbitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
rbitfld.word 0x00 6.--7. " UCSSELx ,eUSCI_A clock source select" "UCLK,ACLK,SMCLK,SMCLK"
|
|
bitfld.word 0x00 5. " UCRXEIE ,Receive erroneous-character interrupt enable" "Rejected,Received"
|
|
bitfld.word 0x00 4. " UCBRKIE ,Receive break character interrupt enable" "Not set,Set"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCDORM ,Puts eUSCI_A into sleep mode" "Not dormant,Dormant"
|
|
bitfld.word 0x00 2. " UCTXADDR ,Transmit address" "Data,Address"
|
|
bitfld.word 0x00 1. " UCTXBRK ,Transmit break" "Not break,Break"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCA1CTLW1,eUSCI_A1 Control Word Register 1"
|
|
bitfld.word 0x00 0.--1. " UCGLIT ,Deglitch time" "5 ns,20 ns,30 ns,50 ns"
|
|
if (((per.w(ad:0x40001400))&0x01)==0x01)
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "UCA1BRW,eUSCI_A1 Baud Rate Control Word Register"
|
|
line.word 0x02 "UCA1MCTLW,eUSCI_A1 Modulation Control Word Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " UCBRS ,Second modulation stage select"
|
|
bitfld.word 0x02 4.--7. " UCBRF ,First modulation stage select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x02 0. " UCOS16 ,Oversampling mode enabled" "Disabled,Enabled"
|
|
if (((per.w(ad:0x40001400))&0x600)==0x200)
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA1STATW,eUSCI_A1 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
bitfld.word 0x00 1. " UCIDLE ,Idle line detected in idle-line multiprocessor mode" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
elif (((per.w(ad:0x40001400))&0x600)==0x400)
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA1STATW,eUSCI_A1 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
bitfld.word 0x00 1. " UCADDR ,Address received in address-bit multiprocessor mode" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
else
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA1STATW,eUSCI_A1 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
endif
|
|
else
|
|
rgroup.word 0x06++0x03
|
|
line.word 0x00 "UCA1BRW,eUSCI_A1 Baud Rate Control Word Register"
|
|
line.word 0x02 "UCA1MCTLW,eUSCI_A1 Modulation Control Word Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " UCBRS ,Second modulation stage select"
|
|
bitfld.word 0x02 4.--7. " UCBRF ,First modulation stage select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x02 0. " UCOS16 ,Oversampling mode enabled" "Disabled,Enabled"
|
|
if (((per.w(ad:0x40001400))&0x600)==0x200)
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA1STATW,eUSCI_A1 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
bitfld.word 0x00 1. " UCIDLE ,Idle line detected in idle-line multiprocessor mode" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
elif (((per.w(ad:0x40001400))&0x600)==0x400)
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA1STATW,eUSCI_A1 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
bitfld.word 0x00 1. " UCADDR ,Address received in address-bit multiprocessor mode" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
else
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA1STATW,eUSCI_A1 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
endif
|
|
endif
|
|
hgroup.word 0x0C++0x01
|
|
hide.word 0x00 "UCA1RXBUF,eUSCI_A1 Receive Buffer Register"
|
|
in
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCA1TXBUF,eUSCI_A1 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUF ,Transmit data buffer"
|
|
if (((per.w(ad:0x40001400))&0x01)==0x01)
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "UCA1ABCTL,eUSCI_A1 Auto Baud Rate Control Register"
|
|
bitfld.word 0x00 4.--5. " UCDELIMx ,Break/synch delimiter length bits" "1 bit time,2 bit times,3 bit times,4 bit times"
|
|
bitfld.word 0x00 3. " UCSTOE ,Synch field time out error" "No error,Error"
|
|
bitfld.word 0x00 2. " UCBTOE ,Break time out error" "No error,Error"
|
|
bitfld.word 0x00 0. " UCABDEN ,Automatic baud-rate detect enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "UCA1ABCTL,eUSCI_A1 Auto Baud Rate Control Register"
|
|
rbitfld.word 0x00 4.--5. " UCDELIMx ,Break/synch delimiter length bits" "1 bit time,2 bit times,3 bit times,4 bit times"
|
|
bitfld.word 0x00 3. " UCSTOE ,Synch field time out error" "No error,Error"
|
|
bitfld.word 0x00 2. " UCBTOE ,Break time out error" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCABDEN ,Automatic baud-rate detect enable" "Disabled,Enabled"
|
|
endif
|
|
if (((per.w(ad:0x40001400))&0x01)==0x01)
|
|
if ((per.w(ad:0x40001400+0x08)&0x01)==0x01)
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "UCA1IRCTL,eUSCI_A1 IrDA Control Word Register"
|
|
bitfld.word 0x00 10.--15. " UCIRRXFLx ,Receive filter length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 9. " UCIRRXPL ,IrDA receive input UCAxRXD polarity bit" "High,Low"
|
|
bitfld.word 0x00 8. " UCIRRXFE ,IrDA receive filter enabled bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--7. " UCIRTXPLx ,Transmit pulse length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCIRTXCLK ,IrDA transmit pulse clock select bit" "BRCLK,BITCLK16"
|
|
bitfld.word 0x00 0. " UCIREN ,IrDA encoder and decoder enable bit" "Disabled,Enabled"
|
|
else
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "UCA1IRCTL,eUSCI_A1 IrDA Control Word Register"
|
|
bitfld.word 0x00 10.--15. " UCIRRXFLx ,Receive filter length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 9. " UCIRRXPL ,IrDA receive input UCAxRXD polarity bit" "High,Low"
|
|
bitfld.word 0x00 8. " UCIRRXFE ,IrDA receive filter enabled bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--7. " UCIRTXPLx ,Transmit pulse length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCIRTXCLK ,IrDA transmit pulse clock select bit" "BRCLK,BRCLK"
|
|
bitfld.word 0x00 0. " UCIREN ,IrDA encoder and decoder enable bit" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if ((per.w(ad:0x40001400+0x08)&0x01)==0x01)
|
|
rgroup.word 0x12++0x01
|
|
line.word 0x00 "UCA1IRCTL,eUSCI_A1 IrDA Control Word Register"
|
|
bitfld.word 0x00 10.--15. " UCIRRXFLx ,Receive filter length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 9. " UCIRRXPL ,IrDA receive input UCAxRXD polarity bit" "High,Low"
|
|
bitfld.word 0x00 8. " UCIRRXFE ,IrDA receive filter enabled bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--7. " UCIRTXPLx ,Transmit pulse length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCIRTXCLK ,IrDA transmit pulse clock select bit" "BRCLK,BITCLK16"
|
|
bitfld.word 0x00 0. " UCIREN ,IrDA encoder and decoder enable bit" "Disabled,Enabled"
|
|
else
|
|
rgroup.word 0x12++0x01
|
|
line.word 0x00 "UCA1IRCTL,eUSCI_A1 IrDA Control Word Register"
|
|
bitfld.word 0x00 10.--15. " UCIRRXFLx ,Receive filter length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 9. " UCIRRXPL ,IrDA receive input UCAxRXD polarity bit" "High,Low"
|
|
bitfld.word 0x00 8. " UCIRRXFE ,IrDA receive filter enabled bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--7. " UCIRTXPLx ,Transmit pulse length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCIRTXCLK ,IrDA transmit pulse clock select bit" "BRCLK,BRCLK"
|
|
bitfld.word 0x00 0. " UCIREN ,IrDA encoder and decoder enable bit" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
group.word 0x1A++0x03
|
|
line.word 0x00 "UCA1IE,eUSCI_A1 Interrupt Enable Register"
|
|
bitfld.word 0x00 3. " UCTXCPTIE ,Transmit complete interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " UCSTTIE ,Start interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " UCTXIE ,Transmit interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIE ,Receive interrupt enable bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCA1IFG,eUSCI_A1 Interrupt Flag Register"
|
|
bitfld.word 0x02 3. " UCTXCPTIFG ,Transmit complete interrupt flag bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 2. " UCSTTIFG ,Start bit interrupt bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 1. " UCTXIFG ,Transmit interrupt flag bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 0. " UCRXIFG ,Receive interrupt flag bit" "No interrupt,Interrupt"
|
|
rgroup.word 0x1E++0x01
|
|
line.word 0x00 "UCA1IV,eUSCI_A1 Interrupt Vector Register"
|
|
width 0x0B
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "eUSCI_A2"
|
|
base ad:0x40001800
|
|
width 11.
|
|
if ((per.w(ad:0x40001800)&0x100)==0x100)
|
|
width 17.
|
|
if (((per.w(ad:0x40001800))&0x01)==0x01)
|
|
if ((per.w(ad:0x40001800)&0x100)==0x100)
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCA2CTLW0,eUSCI_A2 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
bitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
bitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCA2CTLW0,eUSCI_A2 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
bitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "UCA2BRW,eUSCI_A2 Baud Rate Control Word Register"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA2STATW,eUSCI_A2 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Idle,Busy"
|
|
else
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCA2CTLW0,eUSCI_A2 Control Word Register 0"
|
|
rbitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
rbitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
rbitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
rbitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
rbitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
rbitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
rbitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
rgroup.word 0x06++0x01
|
|
line.word 0x00 "UCA2BRW,eUSCI_A2 Baud Rate Control Word Register"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA2STATW,eUSCI_A2 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Idle,Busy"
|
|
endif
|
|
hgroup.word 0x0C++0x01
|
|
hide.word 0x00 "UCA2RXBUF,eUSCI_A2 Receive Buffer Register"
|
|
in
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCA2TXBUF,eUSCI_A2 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUFx ,Transmit data buffer"
|
|
group.word 0x1A++0x03
|
|
line.word 0x00 "UCA2IE,eUSCI_A2 Interrupt Enable Register"
|
|
bitfld.word 0x00 1. " UCTXIE ,Transmit interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIE ,Receive interrupt enable bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCA2IFG,eUSCI_A2 Interrupt Flag Register"
|
|
bitfld.word 0x02 1. " UCTXIFG ,Transmit interrupt flag bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 0. " UCRXIFG ,Receive interrupt flag bit" "No interrupt,Interrupt"
|
|
rgroup.word 0x1E++0x01
|
|
line.word 0x00 "UCA2IV,eUSCI_A2 Interrupt Vector Register"
|
|
width 0x0B
|
|
else
|
|
width 14.
|
|
if (((per.w(ad:0x40001800))&0x01)==0x01)
|
|
group.word 0x00++0x01 "UART"
|
|
line.word 0x00 "UCA2CTLW0,eUSCI_A2 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCPEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " UCPAR ,Parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
bitfld.word 0x00 11. " UCSPB ,Stop bit select" "One,Two"
|
|
bitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "UART mode,Idle-line multiprocessor mode,Address-bit multiprocessor mode,UART mode with baud-rate detection"
|
|
textline " "
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" "UCLK,ACLK,SMCLK,SMCLK"
|
|
bitfld.word 0x00 5. " UCRXEIE ,Receive erroneous-character interrupt enable" "Rejected,Received"
|
|
bitfld.word 0x00 4. " UCBRKIE ,Receive break character interrupt enable" "Not set,Set"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCDORM ,Puts eUSCI_A into sleep mode" "Not dormant,Dormant"
|
|
bitfld.word 0x00 2. " UCTXADDR ,Transmit address" "Data,Address"
|
|
bitfld.word 0x00 1. " UCTXBRK ,Transmit break" "Not break,Break"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x00++0x01 "UART"
|
|
line.word 0x00 "UCA2CTLW0,eUSCI_A2 Control Word Register 0"
|
|
rbitfld.word 0x00 15. " UCPEN ,Parity enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " UCPAR ,Parity select" "Odd,Even"
|
|
textline " "
|
|
rbitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
rbitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
rbitfld.word 0x00 11. " UCSPB ,Stop bit select" "One,Two"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "UART mode,Idle-line multiprocessor mode,Address-bit multiprocessor mode,UART mode with baud-rate detection"
|
|
textline " "
|
|
rbitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
rbitfld.word 0x00 6.--7. " UCSSELx ,eUSCI_A clock source select" "UCLK,ACLK,SMCLK,SMCLK"
|
|
bitfld.word 0x00 5. " UCRXEIE ,Receive erroneous-character interrupt enable" "Rejected,Received"
|
|
bitfld.word 0x00 4. " UCBRKIE ,Receive break character interrupt enable" "Not set,Set"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCDORM ,Puts eUSCI_A into sleep mode" "Not dormant,Dormant"
|
|
bitfld.word 0x00 2. " UCTXADDR ,Transmit address" "Data,Address"
|
|
bitfld.word 0x00 1. " UCTXBRK ,Transmit break" "Not break,Break"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCA2CTLW1,eUSCI_A2 Control Word Register 1"
|
|
bitfld.word 0x00 0.--1. " UCGLIT ,Deglitch time" "5 ns,20 ns,30 ns,50 ns"
|
|
if (((per.w(ad:0x40001800))&0x01)==0x01)
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "UCA2BRW,eUSCI_A2 Baud Rate Control Word Register"
|
|
line.word 0x02 "UCA2MCTLW,eUSCI_A2 Modulation Control Word Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " UCBRS ,Second modulation stage select"
|
|
bitfld.word 0x02 4.--7. " UCBRF ,First modulation stage select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x02 0. " UCOS16 ,Oversampling mode enabled" "Disabled,Enabled"
|
|
if (((per.w(ad:0x40001800))&0x600)==0x200)
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA2STATW,eUSCI_A2 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
bitfld.word 0x00 1. " UCIDLE ,Idle line detected in idle-line multiprocessor mode" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
elif (((per.w(ad:0x40001800))&0x600)==0x400)
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA2STATW,eUSCI_A2 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
bitfld.word 0x00 1. " UCADDR ,Address received in address-bit multiprocessor mode" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
else
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA2STATW,eUSCI_A2 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
endif
|
|
else
|
|
rgroup.word 0x06++0x03
|
|
line.word 0x00 "UCA2BRW,eUSCI_A2 Baud Rate Control Word Register"
|
|
line.word 0x02 "UCA2MCTLW,eUSCI_A2 Modulation Control Word Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " UCBRS ,Second modulation stage select"
|
|
bitfld.word 0x02 4.--7. " UCBRF ,First modulation stage select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x02 0. " UCOS16 ,Oversampling mode enabled" "Disabled,Enabled"
|
|
if (((per.w(ad:0x40001800))&0x600)==0x200)
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA2STATW,eUSCI_A2 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
bitfld.word 0x00 1. " UCIDLE ,Idle line detected in idle-line multiprocessor mode" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
elif (((per.w(ad:0x40001800))&0x600)==0x400)
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA2STATW,eUSCI_A2 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
bitfld.word 0x00 1. " UCADDR ,Address received in address-bit multiprocessor mode" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
else
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA2STATW,eUSCI_A2 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
endif
|
|
endif
|
|
hgroup.word 0x0C++0x01
|
|
hide.word 0x00 "UCA2RXBUF,eUSCI_A2 Receive Buffer Register"
|
|
in
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCA2TXBUF,eUSCI_A2 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUF ,Transmit data buffer"
|
|
if (((per.w(ad:0x40001800))&0x01)==0x01)
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "UCA2ABCTL,eUSCI_A2 Auto Baud Rate Control Register"
|
|
bitfld.word 0x00 4.--5. " UCDELIMx ,Break/synch delimiter length bits" "1 bit time,2 bit times,3 bit times,4 bit times"
|
|
bitfld.word 0x00 3. " UCSTOE ,Synch field time out error" "No error,Error"
|
|
bitfld.word 0x00 2. " UCBTOE ,Break time out error" "No error,Error"
|
|
bitfld.word 0x00 0. " UCABDEN ,Automatic baud-rate detect enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "UCA2ABCTL,eUSCI_A2 Auto Baud Rate Control Register"
|
|
rbitfld.word 0x00 4.--5. " UCDELIMx ,Break/synch delimiter length bits" "1 bit time,2 bit times,3 bit times,4 bit times"
|
|
bitfld.word 0x00 3. " UCSTOE ,Synch field time out error" "No error,Error"
|
|
bitfld.word 0x00 2. " UCBTOE ,Break time out error" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCABDEN ,Automatic baud-rate detect enable" "Disabled,Enabled"
|
|
endif
|
|
if (((per.w(ad:0x40001800))&0x01)==0x01)
|
|
if ((per.w(ad:0x40001800+0x08)&0x01)==0x01)
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "UCA2IRCTL,eUSCI_A2 IrDA Control Word Register"
|
|
bitfld.word 0x00 10.--15. " UCIRRXFLx ,Receive filter length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 9. " UCIRRXPL ,IrDA receive input UCAxRXD polarity bit" "High,Low"
|
|
bitfld.word 0x00 8. " UCIRRXFE ,IrDA receive filter enabled bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--7. " UCIRTXPLx ,Transmit pulse length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCIRTXCLK ,IrDA transmit pulse clock select bit" "BRCLK,BITCLK16"
|
|
bitfld.word 0x00 0. " UCIREN ,IrDA encoder and decoder enable bit" "Disabled,Enabled"
|
|
else
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "UCA2IRCTL,eUSCI_A2 IrDA Control Word Register"
|
|
bitfld.word 0x00 10.--15. " UCIRRXFLx ,Receive filter length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 9. " UCIRRXPL ,IrDA receive input UCAxRXD polarity bit" "High,Low"
|
|
bitfld.word 0x00 8. " UCIRRXFE ,IrDA receive filter enabled bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--7. " UCIRTXPLx ,Transmit pulse length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCIRTXCLK ,IrDA transmit pulse clock select bit" "BRCLK,BRCLK"
|
|
bitfld.word 0x00 0. " UCIREN ,IrDA encoder and decoder enable bit" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if ((per.w(ad:0x40001800+0x08)&0x01)==0x01)
|
|
rgroup.word 0x12++0x01
|
|
line.word 0x00 "UCA2IRCTL,eUSCI_A2 IrDA Control Word Register"
|
|
bitfld.word 0x00 10.--15. " UCIRRXFLx ,Receive filter length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 9. " UCIRRXPL ,IrDA receive input UCAxRXD polarity bit" "High,Low"
|
|
bitfld.word 0x00 8. " UCIRRXFE ,IrDA receive filter enabled bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--7. " UCIRTXPLx ,Transmit pulse length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCIRTXCLK ,IrDA transmit pulse clock select bit" "BRCLK,BITCLK16"
|
|
bitfld.word 0x00 0. " UCIREN ,IrDA encoder and decoder enable bit" "Disabled,Enabled"
|
|
else
|
|
rgroup.word 0x12++0x01
|
|
line.word 0x00 "UCA2IRCTL,eUSCI_A2 IrDA Control Word Register"
|
|
bitfld.word 0x00 10.--15. " UCIRRXFLx ,Receive filter length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 9. " UCIRRXPL ,IrDA receive input UCAxRXD polarity bit" "High,Low"
|
|
bitfld.word 0x00 8. " UCIRRXFE ,IrDA receive filter enabled bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--7. " UCIRTXPLx ,Transmit pulse length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCIRTXCLK ,IrDA transmit pulse clock select bit" "BRCLK,BRCLK"
|
|
bitfld.word 0x00 0. " UCIREN ,IrDA encoder and decoder enable bit" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
group.word 0x1A++0x03
|
|
line.word 0x00 "UCA2IE,eUSCI_A2 Interrupt Enable Register"
|
|
bitfld.word 0x00 3. " UCTXCPTIE ,Transmit complete interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " UCSTTIE ,Start interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " UCTXIE ,Transmit interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIE ,Receive interrupt enable bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCA2IFG,eUSCI_A2 Interrupt Flag Register"
|
|
bitfld.word 0x02 3. " UCTXCPTIFG ,Transmit complete interrupt flag bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 2. " UCSTTIFG ,Start bit interrupt bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 1. " UCTXIFG ,Transmit interrupt flag bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 0. " UCRXIFG ,Receive interrupt flag bit" "No interrupt,Interrupt"
|
|
rgroup.word 0x1E++0x01
|
|
line.word 0x00 "UCA2IV,eUSCI_A2 Interrupt Vector Register"
|
|
width 0x0B
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "eUSCI_A3"
|
|
base ad:0x40001C00
|
|
width 11.
|
|
if ((per.w(ad:0x40001C00)&0x100)==0x100)
|
|
width 17.
|
|
if (((per.w(ad:0x40001C00))&0x01)==0x01)
|
|
if ((per.w(ad:0x40001C00)&0x100)==0x100)
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCA3CTLW0,eUSCI_A3 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
bitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
bitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCA3CTLW0,eUSCI_A3 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
bitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "UCA3BRW,eUSCI_A3 Baud Rate Control Word Register"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA3STATW,eUSCI_A3 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Idle,Busy"
|
|
else
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCA3CTLW0,eUSCI_A3 Control Word Register 0"
|
|
rbitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
rbitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
rbitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
rbitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
rbitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
rbitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
rbitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
rgroup.word 0x06++0x01
|
|
line.word 0x00 "UCA3BRW,eUSCI_A3 Baud Rate Control Word Register"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA3STATW,eUSCI_A3 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Idle,Busy"
|
|
endif
|
|
hgroup.word 0x0C++0x01
|
|
hide.word 0x00 "UCA3RXBUF,eUSCI_A3 Receive Buffer Register"
|
|
in
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCA3TXBUF,eUSCI_A3 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUFx ,Transmit data buffer"
|
|
group.word 0x1A++0x03
|
|
line.word 0x00 "UCA3IE,eUSCI_A3 Interrupt Enable Register"
|
|
bitfld.word 0x00 1. " UCTXIE ,Transmit interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIE ,Receive interrupt enable bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCA3IFG,eUSCI_A3 Interrupt Flag Register"
|
|
bitfld.word 0x02 1. " UCTXIFG ,Transmit interrupt flag bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 0. " UCRXIFG ,Receive interrupt flag bit" "No interrupt,Interrupt"
|
|
rgroup.word 0x1E++0x01
|
|
line.word 0x00 "UCA3IV,eUSCI_A3 Interrupt Vector Register"
|
|
width 0x0B
|
|
else
|
|
width 14.
|
|
if (((per.w(ad:0x40001C00))&0x01)==0x01)
|
|
group.word 0x00++0x01 "UART"
|
|
line.word 0x00 "UCA3CTLW0,eUSCI_A3 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCPEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " UCPAR ,Parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
bitfld.word 0x00 11. " UCSPB ,Stop bit select" "One,Two"
|
|
bitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "UART mode,Idle-line multiprocessor mode,Address-bit multiprocessor mode,UART mode with baud-rate detection"
|
|
textline " "
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" "UCLK,ACLK,SMCLK,SMCLK"
|
|
bitfld.word 0x00 5. " UCRXEIE ,Receive erroneous-character interrupt enable" "Rejected,Received"
|
|
bitfld.word 0x00 4. " UCBRKIE ,Receive break character interrupt enable" "Not set,Set"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCDORM ,Puts eUSCI_A into sleep mode" "Not dormant,Dormant"
|
|
bitfld.word 0x00 2. " UCTXADDR ,Transmit address" "Data,Address"
|
|
bitfld.word 0x00 1. " UCTXBRK ,Transmit break" "Not break,Break"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x00++0x01 "UART"
|
|
line.word 0x00 "UCA3CTLW0,eUSCI_A3 Control Word Register 0"
|
|
rbitfld.word 0x00 15. " UCPEN ,Parity enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 14. " UCPAR ,Parity select" "Odd,Even"
|
|
textline " "
|
|
rbitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
rbitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
rbitfld.word 0x00 11. " UCSPB ,Stop bit select" "One,Two"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "UART mode,Idle-line multiprocessor mode,Address-bit multiprocessor mode,UART mode with baud-rate detection"
|
|
textline " "
|
|
rbitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
rbitfld.word 0x00 6.--7. " UCSSELx ,eUSCI_A clock source select" "UCLK,ACLK,SMCLK,SMCLK"
|
|
bitfld.word 0x00 5. " UCRXEIE ,Receive erroneous-character interrupt enable" "Rejected,Received"
|
|
bitfld.word 0x00 4. " UCBRKIE ,Receive break character interrupt enable" "Not set,Set"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCDORM ,Puts eUSCI_A into sleep mode" "Not dormant,Dormant"
|
|
bitfld.word 0x00 2. " UCTXADDR ,Transmit address" "Data,Address"
|
|
bitfld.word 0x00 1. " UCTXBRK ,Transmit break" "Not break,Break"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCA3CTLW1,eUSCI_A3 Control Word Register 1"
|
|
bitfld.word 0x00 0.--1. " UCGLIT ,Deglitch time" "5 ns,20 ns,30 ns,50 ns"
|
|
if (((per.w(ad:0x40001C00))&0x01)==0x01)
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "UCA3BRW,eUSCI_A3 Baud Rate Control Word Register"
|
|
line.word 0x02 "UCA3MCTLW,eUSCI_A3 Modulation Control Word Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " UCBRS ,Second modulation stage select"
|
|
bitfld.word 0x02 4.--7. " UCBRF ,First modulation stage select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x02 0. " UCOS16 ,Oversampling mode enabled" "Disabled,Enabled"
|
|
if (((per.w(ad:0x40001C00))&0x600)==0x200)
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA3STATW,eUSCI_A3 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
bitfld.word 0x00 1. " UCIDLE ,Idle line detected in idle-line multiprocessor mode" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
elif (((per.w(ad:0x40001C00))&0x600)==0x400)
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA3STATW,eUSCI_A3 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
bitfld.word 0x00 1. " UCADDR ,Address received in address-bit multiprocessor mode" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
else
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA3STATW,eUSCI_A3 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
endif
|
|
else
|
|
rgroup.word 0x06++0x03
|
|
line.word 0x00 "UCA3BRW,eUSCI_A3 Baud Rate Control Word Register"
|
|
line.word 0x02 "UCA3MCTLW,eUSCI_A3 Modulation Control Word Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " UCBRS ,Second modulation stage select"
|
|
bitfld.word 0x02 4.--7. " UCBRF ,First modulation stage select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x02 0. " UCOS16 ,Oversampling mode enabled" "Disabled,Enabled"
|
|
if (((per.w(ad:0x40001C00))&0x600)==0x200)
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA3STATW,eUSCI_A3 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
bitfld.word 0x00 1. " UCIDLE ,Idle line detected in idle-line multiprocessor mode" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
elif (((per.w(ad:0x40001C00))&0x600)==0x400)
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA3STATW,eUSCI_A3 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
bitfld.word 0x00 1. " UCADDR ,Address received in address-bit multiprocessor mode" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
else
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCA3STATW,eUSCI_A3 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
bitfld.word 0x00 4. " UCPE ,Parity error flag bit" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " UCBRK ,Break detect flage bit" "No break,Break"
|
|
bitfld.word 0x00 2. " UCRXERR ,Receive error flag bit" "Not received,Received"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Inactive,Active"
|
|
endif
|
|
endif
|
|
hgroup.word 0x0C++0x01
|
|
hide.word 0x00 "UCA3RXBUF,eUSCI_A3 Receive Buffer Register"
|
|
in
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCA3TXBUF,eUSCI_A3 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUF ,Transmit data buffer"
|
|
if (((per.w(ad:0x40001C00))&0x01)==0x01)
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "UCA3ABCTL,eUSCI_A3 Auto Baud Rate Control Register"
|
|
bitfld.word 0x00 4.--5. " UCDELIMx ,Break/synch delimiter length bits" "1 bit time,2 bit times,3 bit times,4 bit times"
|
|
bitfld.word 0x00 3. " UCSTOE ,Synch field time out error" "No error,Error"
|
|
bitfld.word 0x00 2. " UCBTOE ,Break time out error" "No error,Error"
|
|
bitfld.word 0x00 0. " UCABDEN ,Automatic baud-rate detect enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "UCA3ABCTL,eUSCI_A3 Auto Baud Rate Control Register"
|
|
rbitfld.word 0x00 4.--5. " UCDELIMx ,Break/synch delimiter length bits" "1 bit time,2 bit times,3 bit times,4 bit times"
|
|
bitfld.word 0x00 3. " UCSTOE ,Synch field time out error" "No error,Error"
|
|
bitfld.word 0x00 2. " UCBTOE ,Break time out error" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCABDEN ,Automatic baud-rate detect enable" "Disabled,Enabled"
|
|
endif
|
|
if (((per.w(ad:0x40001C00))&0x01)==0x01)
|
|
if ((per.w(ad:0x40001C00+0x08)&0x01)==0x01)
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "UCA3IRCTL,eUSCI_A3 IrDA Control Word Register"
|
|
bitfld.word 0x00 10.--15. " UCIRRXFLx ,Receive filter length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 9. " UCIRRXPL ,IrDA receive input UCAxRXD polarity bit" "High,Low"
|
|
bitfld.word 0x00 8. " UCIRRXFE ,IrDA receive filter enabled bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--7. " UCIRTXPLx ,Transmit pulse length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCIRTXCLK ,IrDA transmit pulse clock select bit" "BRCLK,BITCLK16"
|
|
bitfld.word 0x00 0. " UCIREN ,IrDA encoder and decoder enable bit" "Disabled,Enabled"
|
|
else
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "UCA3IRCTL,eUSCI_A3 IrDA Control Word Register"
|
|
bitfld.word 0x00 10.--15. " UCIRRXFLx ,Receive filter length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 9. " UCIRRXPL ,IrDA receive input UCAxRXD polarity bit" "High,Low"
|
|
bitfld.word 0x00 8. " UCIRRXFE ,IrDA receive filter enabled bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--7. " UCIRTXPLx ,Transmit pulse length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCIRTXCLK ,IrDA transmit pulse clock select bit" "BRCLK,BRCLK"
|
|
bitfld.word 0x00 0. " UCIREN ,IrDA encoder and decoder enable bit" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if ((per.w(ad:0x40001C00+0x08)&0x01)==0x01)
|
|
rgroup.word 0x12++0x01
|
|
line.word 0x00 "UCA3IRCTL,eUSCI_A3 IrDA Control Word Register"
|
|
bitfld.word 0x00 10.--15. " UCIRRXFLx ,Receive filter length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 9. " UCIRRXPL ,IrDA receive input UCAxRXD polarity bit" "High,Low"
|
|
bitfld.word 0x00 8. " UCIRRXFE ,IrDA receive filter enabled bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--7. " UCIRTXPLx ,Transmit pulse length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCIRTXCLK ,IrDA transmit pulse clock select bit" "BRCLK,BITCLK16"
|
|
bitfld.word 0x00 0. " UCIREN ,IrDA encoder and decoder enable bit" "Disabled,Enabled"
|
|
else
|
|
rgroup.word 0x12++0x01
|
|
line.word 0x00 "UCA3IRCTL,eUSCI_A3 IrDA Control Word Register"
|
|
bitfld.word 0x00 10.--15. " UCIRRXFLx ,Receive filter length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.word 0x00 9. " UCIRRXPL ,IrDA receive input UCAxRXD polarity bit" "High,Low"
|
|
bitfld.word 0x00 8. " UCIRRXFE ,IrDA receive filter enabled bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--7. " UCIRTXPLx ,Transmit pulse length bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCIRTXCLK ,IrDA transmit pulse clock select bit" "BRCLK,BRCLK"
|
|
bitfld.word 0x00 0. " UCIREN ,IrDA encoder and decoder enable bit" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
group.word 0x1A++0x03
|
|
line.word 0x00 "UCA3IE,eUSCI_A3 Interrupt Enable Register"
|
|
bitfld.word 0x00 3. " UCTXCPTIE ,Transmit complete interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " UCSTTIE ,Start interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " UCTXIE ,Transmit interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIE ,Receive interrupt enable bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCA3IFG,eUSCI_A3 Interrupt Flag Register"
|
|
bitfld.word 0x02 3. " UCTXCPTIFG ,Transmit complete interrupt flag bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 2. " UCSTTIFG ,Start bit interrupt bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 1. " UCTXIFG ,Transmit interrupt flag bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 0. " UCRXIFG ,Receive interrupt flag bit" "No interrupt,Interrupt"
|
|
rgroup.word 0x1E++0x01
|
|
line.word 0x00 "UCA3IV,eUSCI_A3 Interrupt Vector Register"
|
|
width 0x0B
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "eUSCI_B0"
|
|
base ad:0x40002000
|
|
width 11.
|
|
if ((per.w(ad:0x40002000)&0x600)==0x600)
|
|
width 13.
|
|
if ((per.w(ad:0x40002000)&0x0001)==0x0001)
|
|
group.word 0x00++0x01 "I2C"
|
|
line.word 0x00 "UCB0CTLW0,eUSCI_B0 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCB10 ,Own addressing mode select bit" "7-bit,10-bit"
|
|
bitfld.word 0x00 14. " UCSLA10 ,Slave addressing mode select bit" "7-bit,10-bit"
|
|
bitfld.word 0x00 13. " UCMM ,Multi-master environment select" "Single master,Multi-master"
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
textline " "
|
|
bitfld.word 0x00 9.--10. " UCMODE ,eUSCI_B mode" "3-pin SPI,4-pin SPI,4-pin SPI,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_B clock source select" "UCLKI,ACLK,SMCLK,SMCLK"
|
|
bitfld.word 0x00 5. " UCTXACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
textline " "
|
|
bitfld.word 0x00 4. " UCTR ,Transmitter/receiver" "Receiver,Transmitter"
|
|
bitfld.word 0x00 3. " UCTXNACK ,Transmit a NACK" "ACK,NACK"
|
|
bitfld.word 0x00 2. " UCTXSTP ,Transmit STOP condition in master mode" "Not occurred,Occurred"
|
|
bitfld.word 0x00 1. " UCTXSTT ,Transmit START condition in master mode" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
if ((per.w(ad:0x40002000)&0x800)==0x00)
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCB0CTLW1,eUSCI_B0 Control Word Register 1"
|
|
bitfld.word 0x00 8. " UCETXINT ,Early UCTXIFG0" "Address match,Each START"
|
|
bitfld.word 0x00 6.--7. " UCCLTO ,Clock low timeout select" "Disabled,135 000 SYSCLK,150 000 SYSCLK,165 000 SYSCLK"
|
|
bitfld.word 0x00 5. " UCSTPNACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
bitfld.word 0x00 4. " UCSWACK , eUSCI_B module triggers the sending of the ACK of the address or if it is controlled by software" "NACK,ACK"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " UCBSTP ,Automatic STOP condition generation" "No automatic,UCBCNTIFG,Automatic,?..."
|
|
bitfld.word 0x00 0.--1. " UCGLITx ,Deglitch time" "50 ns,25 ns,12.5 ns,6.25 ns"
|
|
else
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCB0CTLW1,eUSCI_B0 Control Word Register 1"
|
|
bitfld.word 0x00 6.--7. " UCCLTO ,Clock low timeout select" "Disabled,135 000 SYSCLK,150 000 SYSCLK,165 000 SYSCLK"
|
|
bitfld.word 0x00 5. " UCSTPNACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
bitfld.word 0x00 4. " UCSWACK , eUSCI_B module triggers the sending of the ACK of the address or if it is controlled by software" "NACK,ACK"
|
|
bitfld.word 0x00 2.--3. " UCBSTP ,Automatic STOP condition generation" "No automatic,,Automatic,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " UCGLITx ,Deglitch time" "50 ns,25 ns,12.5 ns,6.25 ns"
|
|
endif
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "UCB0BRW,eUSCI_B0 Baud Rate Control Word Register"
|
|
rgroup.word 0x08++0x01
|
|
line.word 0x00 "UCB0STATW,eUSCI_B0 Status Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " UCBCNTx ,Hardware byte counter value"
|
|
bitfld.word 0x00 6. " UCSCLLOW ,SCL low" "Not held,Held"
|
|
bitfld.word 0x00 5. " UCGC ,General call address received" "No received,Received"
|
|
bitfld.word 0x00 4. " UCBBUSY ,Bus busy" "Inactive,Busy"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCB0TBCNT,eUSCI_B0 Byte Counter Threshold Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTBCNTx ,Byte counter threshold value"
|
|
rgroup.word 0x0C++0x01
|
|
line.word 0x00 "UCB0RXBUF,eUSCI_A0 Receive Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCRXBUFx ,Receive-data buffer"
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCB0TXBUF,eUSCI_A0 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUFx ,Transmit data buffer"
|
|
group.word 0x14++0x0D
|
|
line.word 0x00 "UCB0I2COA0,eUSCI_B0 I2C Own Address 0 Register"
|
|
bitfld.word 0x00 15. " UCGCEN ,General call response enable" "Not respond,Respond"
|
|
bitfld.word 0x00 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--9. 1. " I2COA0 ,I2C own address"
|
|
line.word 0x02 "UCB0I2COA1,eUSCI_B0 I2C Own Address 1 Register"
|
|
bitfld.word 0x02 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x02 0.--9. 1. " I2COA1 ,I2C own address"
|
|
line.word 0x04 "UCB0I2COA2,eUSCI_B0 I2C Own Address 2 Register"
|
|
bitfld.word 0x04 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x04 0.--9. 1. " I2COA2 ,I2C own address"
|
|
line.word 0x06 "UCB0I2COA3,eUSCI_B0 I2C Own Address 3 Register"
|
|
bitfld.word 0x06 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x06 0.--9. 1. " I2COA3 ,I2C own address"
|
|
line.word 0x08 "UCB0ADDRX,eUSCI_B0 I2C Received Address Register"
|
|
hexmask.word 0x08 0.--9. 1. " ADDRXx ,Received Address Register"
|
|
line.word 0x0A "UCB0ADDMASK,eUSCI_B0 I2C Address Mask Register"
|
|
hexmask.word 0x0A 0.--9. 1. " ADDMASKx ,Address Mask Register"
|
|
line.word 0x0C "UCB0I2CSA,eUSCI_B0 I2C Address Mask Register"
|
|
hexmask.word 0x0C 0.--9. 1. " I2CSAx ,I2C slave address"
|
|
group.word 0x2A++0x03
|
|
line.word 0x00 "UCB0IE,eUSCI_B0 Interrupt Enable Register"
|
|
bitfld.word 0x00 14. " UCBIT9IFG ,Bit position 9 interrupt flag" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " UCTXIFG3 ,Transmit interrupt flag 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " UCRXIFG3 ,Receive interrupt flag 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " UCTXIFG2 ,Transmit interrupt flag 2 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " UCRXIFG2 ,Receive interrupt flag 2 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " UCTXIFG1 ,Transmit interrupt flag 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " UCRXIFG1 ,Receive interrupt flag 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " UCCLTOIFG ,Clock low timeout interrupt flag bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " UCBCNTIFG ,Byte counter interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " UCNACKIFG ,Not-acknowledge interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " UCBLIFG ,Arbitration lost interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " UCSTPIFG ,STOP condition interrupt flag bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " UCSTTIFG ,START condition interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " UCTXIFG0 ,Transmit interrupt flag 0 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIFG0 ,Receive interrupt flag 0 bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCB0IFG,eUSCI_B0 Interrupt Flag Register"
|
|
bitfld.word 0x02 14. " UCBIT9IE ,Bit position 9 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 13. " UCTXIE3 ,Transmit interrupt enable 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 12. " UCRXIE3 ,Receive interrupt enable 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 11. " UCTXIE2 ,Transmit interrupt enable 2 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 10. " UCRXIE2 ,Receive interrupt enable 2 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 9. " UCTXIE1 ,Transmit interrupt enable 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 8. " UCRXIE1 ,Receive interrupt enable 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 7. " UCCLTOIE ,Clock low timeout interrupt enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 6. " UCBCNTIE ,Byte counter interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 5. " UCNACKIE ,Not-acknowledge interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 4. " UCBLIE ,Arbitration lost interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 3. " UCSTPIE ,STOP condition interrupt enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 2. " UCSTTIE ,START condition interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " UCTXIE0 ,Transmit interrupt enable 0 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 0. " UCRXIE0 ,Receive interrupt enable 0 bit" "Disabled,Enabled"
|
|
rgroup.word 0x2E++0x01
|
|
line.word 0x00 "UCB0IV,eUSCI_A0 Interrupt Vector Register"
|
|
else
|
|
group.word 0x00++0x03 "I2C"
|
|
line.word 0x00 "UCB0CTLW0,eUSCI_B0 Control Word Register 0"
|
|
rbitfld.word 0x00 15. " UCB10 ,Own addressing mode select bit" "7-bit,10-bit"
|
|
bitfld.word 0x00 14. " UCSLA10 ,Slave addressing mode select bit" "7-bit,10-bit"
|
|
rbitfld.word 0x00 13. " UCMM ,Multi-master environment select" "Single master,Multi-master"
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
textline " "
|
|
rbitfld.word 0x00 9.--10. " UCMODEx ,eUSCI_B mode" "3-pin SPI,4-pin SPI,4-pin SPI,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" ",Synchronous"
|
|
rbitfld.word 0x00 6.--7. " UCSSELx ,eUSCI_B clock source select" "UCLKI,ACLK,SMCLK,SMCLK"
|
|
bitfld.word 0x00 5. " UCTXACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
textline " "
|
|
bitfld.word 0x00 4. " UCTR ,Transmitter/receiver" "Receiver,Transmitter"
|
|
bitfld.word 0x00 3. " UCTXNACK ,Transmit a NACK" "ACK,NACK"
|
|
bitfld.word 0x00 2. " UCTXSTP ,Transmit STOP condition in master mode" "Not occurred,Occurred"
|
|
bitfld.word 0x00 1. " UCTXSTT ,Transmit START condition in master mode" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
if ((per.w(ad:0x40002000)&0x800)==0x00)
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCB0CTLW1,eUSCI_B0 Control Word Register 1"
|
|
bitfld.word 0x00 8. " UCETXINT ,Early UCTXIFG0" "Address match,Each START"
|
|
rbitfld.word 0x00 6.--7. " UCCLTO ,Clock low timeout select" "Disabled,135 000 SYSCLK cycles,150 000 SYSCLK cycles,165 000 SYSCLK cycles"
|
|
rbitfld.word 0x00 5. " UCSTPNACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
bitfld.word 0x00 4. " UCSWACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
textline " "
|
|
rbitfld.word 0x00 2.--3. " UCBSTPx ,Automatic STOP condition generation" "No automatic,UCBCNTIFG,Automatic,?..."
|
|
bitfld.word 0x00 0.--1. " UCGLITx ,Deglitch time" "50 ns,25 ns,12.5 ns,6.25 ns"
|
|
else
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCB0CTLW1,eUSCI_B0 Control Word Register 1"
|
|
rbitfld.word 0x00 6.--7. " UCCLTO ,Clock low timeout select" "Disabled,135 000 SYSCLK cycles,150 000 SYSCLK cycles,165 000 SYSCLK cycles"
|
|
rbitfld.word 0x00 5. " UCSTPNACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
bitfld.word 0x00 4. " UCSWACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
rbitfld.word 0x00 2.--3. " UCBSTPx ,Automatic STOP condition generation" "No automatic,,Automatic,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " UCGLITx ,Deglitch time" "50 ns,25 ns,12.5 ns,6.25 ns"
|
|
endif
|
|
rgroup.word 0x06++0x07
|
|
line.word 0x00 "UCB0BRW,eUSCI_B0 Baud Rate Control Word Register"
|
|
line.word 0x02 "UCB0STATW,eUSCI_B0 Status Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " UCBCNTx ,Hardware byte counter value"
|
|
bitfld.word 0x02 6. " UCSCLLOW ,SCL low" "Not held,Held"
|
|
bitfld.word 0x02 5. " UCGC ,General call address received" "No received,Received"
|
|
bitfld.word 0x02 4. " UCBBUSY ,Bus busy" "Inactive,Busy"
|
|
line.word 0x04 "UCB0TBCNT,eUSCI_B0 Byte Counter Threshold Register"
|
|
hexmask.word.byte 0x04 0.--7. 1. " UCTBCNTx ,Byte counter threshold value"
|
|
line.word 0x06 "UCB0RXBUF,eUSCI_A0 Receive Buffer Register"
|
|
hexmask.word.byte 0x06 0.--7. 1. " UCRXBUFx ,Receive-data buffer"
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCB0TXBUF,eUSCI_A0 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUFx ,Transmit data buffer"
|
|
rgroup.word 0x14++0x0B
|
|
line.word 0x00 "UCB0I2COA0,eUSCI_B0 I2C Own Address 0 Register"
|
|
bitfld.word 0x00 15. " UCGCEN ,General call response enable" "Not respond,Respond"
|
|
bitfld.word 0x00 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--9. 1. " I2COA0 ,I2C own address"
|
|
line.word 0x02 "UCB0I2COA1,eUSCI_B0 I2C Own Address 1 Register"
|
|
bitfld.word 0x02 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x02 0.--9. 1. " I2COA1 ,I2C own address"
|
|
line.word 0x04 "UCB0I2COA2,eUSCI_B0 I2C Own Address 2 Register"
|
|
bitfld.word 0x04 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x04 0.--9. 1. " I2COA2 ,I2C own address"
|
|
line.word 0x06 "UCB0I2COA3,eUSCI_B0 I2C Own Address 3 Register"
|
|
bitfld.word 0x06 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x06 0.--9. 1. " I2COA3 ,I2C own address"
|
|
line.word 0x08 "UCB0ADDRX,eUSCI_B0 I2C Received Address Register"
|
|
hexmask.word 0x08 0.--9. 1. " ADDRXx ,Received Address Register"
|
|
line.word 0x0A "UCB0ADDMASK,eUSCI_B0 I2C Address Mask Register"
|
|
hexmask.word 0x0A 0.--9. 1. " ADDMASKx ,Address Mask Register"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "UCB0I2CSA,eUSCI_B0 I2C Address Mask Register"
|
|
hexmask.word 0x00 0.--9. 1. " I2CSAx ,I2C slave address"
|
|
group.word 0x2A++0x03
|
|
line.word 0x00 "UCB0IE,eUSCI_B0 Interrupt Enable Register"
|
|
bitfld.word 0x00 14. " UCBIT9IFG ,Bit position 9 interrupt flag" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " UCTXIFG3 ,Transmit interrupt flag 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " UCRXIFG3 ,Receive interrupt flag 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " UCTXIFG2 ,Transmit interrupt flag 2 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " UCRXIFG2 ,Receive interrupt flag 2 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " UCTXIFG1 ,Transmit interrupt flag 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " UCRXIFG1 ,Receive interrupt flag 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " UCCLTOIFG ,Clock low timeout interrupt flag bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " UCBCNTIFG ,Byte counter interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " UCNACKIFG ,Not-acknowledge interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " UCBLIFG ,Arbitration lost interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " UCSTPIFG ,STOP condition interrupt flag bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " UCSTTIFG ,START condition interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " UCTXIFG0 ,Transmit interrupt flag 0 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIFG0 ,Receive interrupt flag 0 bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCB0IFG,eUSCI_B0 Interrupt Flag Register"
|
|
bitfld.word 0x02 14. " UCBIT9IE ,Bit position 9 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 13. " UCTXIE3 ,Transmit interrupt enable 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 12. " UCRXIE3 ,Receive interrupt enable 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 11. " UCTXIE2 ,Transmit interrupt enable 2 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 10. " UCRXIE2 ,Receive interrupt enable 2 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 9. " UCTXIE1 ,Transmit interrupt enable 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 8. " UCRXIE1 ,Receive interrupt enable 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 7. " UCCLTOIE ,Clock low timeout interrupt enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 6. " UCBCNTIE ,Byte counter interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 5. " UCNACKIE ,Not-acknowledge interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 4. " UCBLIE ,Arbitration lost interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 3. " UCSTPIE ,STOP condition interrupt enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 2. " UCSTTIE ,START condition interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " UCTXIE0 ,Transmit interrupt enable 0 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 0. " UCRXIE0 ,Receive interrupt enable 0 bit" "Disabled,Enabled"
|
|
rgroup.word 0x2E++0x01
|
|
line.word 0x00 "UCB0IV,eUSCI_A0 Interrupt Vector Register"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
width 17.
|
|
if (((per.w(ad:0x40002000))&0x01)==0x01)
|
|
if ((per.w(ad:0x40002000)&0x100)==0x100)
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCB0CTLW0,eUSCI_A0 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
bitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
bitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCB0CTLW0,eUSCI_A0 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
bitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "UCB0BRW,eUSCI_A0 Baud Rate Control Word Register"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCB0STATW,eUSCI_A0 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Idle,Busy"
|
|
else
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCB0CTLW0,eUSCI_A0 Control Word Register 0"
|
|
rbitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
rbitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
rbitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
rbitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
rbitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
rbitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
rbitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
rgroup.word 0x06++0x01
|
|
line.word 0x00 "UCB0BRW,eUSCI_A0 Baud Rate Control Word Register"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCB0STATW,eUSCI_A0 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Idle,Busy"
|
|
endif
|
|
hgroup.word 0x0C++0x01
|
|
hide.word 0x00 "UCB0RXBUF,eUSCI_A0 Receive Buffer Register"
|
|
in
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCB0TXBUF,eUSCI_A0 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUFx ,Transmit data buffer"
|
|
group.word 0x1A++0x03
|
|
line.word 0x00 "UCB0IE,eUSCI_A0 Interrupt Enable Register"
|
|
bitfld.word 0x00 1. " UCTXIE ,Transmit interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIE ,Receive interrupt enable bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCB0IFG,eUSCI_A0 Interrupt Flag Register"
|
|
bitfld.word 0x02 1. " UCTXIFG ,Transmit interrupt flag bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 0. " UCRXIFG ,Receive interrupt flag bit" "No interrupt,Interrupt"
|
|
rgroup.word 0x1E++0x01
|
|
line.word 0x00 "UCB0IV,eUSCI_A0 Interrupt Vector Register"
|
|
width 0x0B
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "eUSCI_B1"
|
|
base ad:0x40002400
|
|
width 11.
|
|
if ((per.w(ad:0x40002400)&0x600)==0x600)
|
|
width 13.
|
|
if ((per.w(ad:0x40002400)&0x0001)==0x0001)
|
|
group.word 0x00++0x01 "I2C"
|
|
line.word 0x00 "UCB1CTLW0,eUSCI_B1 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCB10 ,Own addressing mode select bit" "7-bit,10-bit"
|
|
bitfld.word 0x00 14. " UCSLA10 ,Slave addressing mode select bit" "7-bit,10-bit"
|
|
bitfld.word 0x00 13. " UCMM ,Multi-master environment select" "Single master,Multi-master"
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
textline " "
|
|
bitfld.word 0x00 9.--10. " UCMODE ,eUSCI_B mode" "3-pin SPI,4-pin SPI,4-pin SPI,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_B clock source select" "UCLKI,ACLK,SMCLK,SMCLK"
|
|
bitfld.word 0x00 5. " UCTXACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
textline " "
|
|
bitfld.word 0x00 4. " UCTR ,Transmitter/receiver" "Receiver,Transmitter"
|
|
bitfld.word 0x00 3. " UCTXNACK ,Transmit a NACK" "ACK,NACK"
|
|
bitfld.word 0x00 2. " UCTXSTP ,Transmit STOP condition in master mode" "Not occurred,Occurred"
|
|
bitfld.word 0x00 1. " UCTXSTT ,Transmit START condition in master mode" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
if ((per.w(ad:0x40002400)&0x800)==0x00)
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCB1CTLW1,eUSCI_B1 Control Word Register 1"
|
|
bitfld.word 0x00 8. " UCETXINT ,Early UCTXIFG0" "Address match,Each START"
|
|
bitfld.word 0x00 6.--7. " UCCLTO ,Clock low timeout select" "Disabled,135 000 SYSCLK,150 000 SYSCLK,165 000 SYSCLK"
|
|
bitfld.word 0x00 5. " UCSTPNACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
bitfld.word 0x00 4. " UCSWACK , eUSCI_B module triggers the sending of the ACK of the address or if it is controlled by software" "NACK,ACK"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " UCBSTP ,Automatic STOP condition generation" "No automatic,UCBCNTIFG,Automatic,?..."
|
|
bitfld.word 0x00 0.--1. " UCGLITx ,Deglitch time" "50 ns,25 ns,12.5 ns,6.25 ns"
|
|
else
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCB1CTLW1,eUSCI_B1 Control Word Register 1"
|
|
bitfld.word 0x00 6.--7. " UCCLTO ,Clock low timeout select" "Disabled,135 000 SYSCLK,150 000 SYSCLK,165 000 SYSCLK"
|
|
bitfld.word 0x00 5. " UCSTPNACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
bitfld.word 0x00 4. " UCSWACK , eUSCI_B module triggers the sending of the ACK of the address or if it is controlled by software" "NACK,ACK"
|
|
bitfld.word 0x00 2.--3. " UCBSTP ,Automatic STOP condition generation" "No automatic,,Automatic,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " UCGLITx ,Deglitch time" "50 ns,25 ns,12.5 ns,6.25 ns"
|
|
endif
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "UCB1BRW,eUSCI_B1 Baud Rate Control Word Register"
|
|
rgroup.word 0x08++0x01
|
|
line.word 0x00 "UCB1STATW,eUSCI_B1 Status Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " UCBCNTx ,Hardware byte counter value"
|
|
bitfld.word 0x00 6. " UCSCLLOW ,SCL low" "Not held,Held"
|
|
bitfld.word 0x00 5. " UCGC ,General call address received" "No received,Received"
|
|
bitfld.word 0x00 4. " UCBBUSY ,Bus busy" "Inactive,Busy"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCB1TBCNT,eUSCI_B1 Byte Counter Threshold Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTBCNTx ,Byte counter threshold value"
|
|
rgroup.word 0x0C++0x01
|
|
line.word 0x00 "UCB1RXBUF,eUSCI_A1 Receive Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCRXBUFx ,Receive-data buffer"
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCB1TXBUF,eUSCI_A1 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUFx ,Transmit data buffer"
|
|
group.word 0x14++0x0D
|
|
line.word 0x00 "UCB1I2COA0,eUSCI_B1 I2C Own Address 0 Register"
|
|
bitfld.word 0x00 15. " UCGCEN ,General call response enable" "Not respond,Respond"
|
|
bitfld.word 0x00 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--9. 1. " I2COA0 ,I2C own address"
|
|
line.word 0x02 "UCB1I2COA1,eUSCI_B1 I2C Own Address 1 Register"
|
|
bitfld.word 0x02 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x02 0.--9. 1. " I2COA1 ,I2C own address"
|
|
line.word 0x04 "UCB1I2COA2,eUSCI_B1 I2C Own Address 2 Register"
|
|
bitfld.word 0x04 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x04 0.--9. 1. " I2COA2 ,I2C own address"
|
|
line.word 0x06 "UCB1I2COA3,eUSCI_B1 I2C Own Address 3 Register"
|
|
bitfld.word 0x06 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x06 0.--9. 1. " I2COA3 ,I2C own address"
|
|
line.word 0x08 "UCB1ADDRX,eUSCI_B1 I2C Received Address Register"
|
|
hexmask.word 0x08 0.--9. 1. " ADDRXx ,Received Address Register"
|
|
line.word 0x0A "UCB1ADDMASK,eUSCI_B1 I2C Address Mask Register"
|
|
hexmask.word 0x0A 0.--9. 1. " ADDMASKx ,Address Mask Register"
|
|
line.word 0x0C "UCB1I2CSA,eUSCI_B1 I2C Address Mask Register"
|
|
hexmask.word 0x0C 0.--9. 1. " I2CSAx ,I2C slave address"
|
|
group.word 0x2A++0x03
|
|
line.word 0x00 "UCB1IE,eUSCI_B1 Interrupt Enable Register"
|
|
bitfld.word 0x00 14. " UCBIT9IFG ,Bit position 9 interrupt flag" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " UCTXIFG3 ,Transmit interrupt flag 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " UCRXIFG3 ,Receive interrupt flag 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " UCTXIFG2 ,Transmit interrupt flag 2 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " UCRXIFG2 ,Receive interrupt flag 2 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " UCTXIFG1 ,Transmit interrupt flag 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " UCRXIFG1 ,Receive interrupt flag 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " UCCLTOIFG ,Clock low timeout interrupt flag bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " UCBCNTIFG ,Byte counter interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " UCNACKIFG ,Not-acknowledge interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " UCBLIFG ,Arbitration lost interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " UCSTPIFG ,STOP condition interrupt flag bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " UCSTTIFG ,START condition interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " UCTXIFG0 ,Transmit interrupt flag 0 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIFG0 ,Receive interrupt flag 0 bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCB1IFG,eUSCI_B1 Interrupt Flag Register"
|
|
bitfld.word 0x02 14. " UCBIT9IE ,Bit position 9 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 13. " UCTXIE3 ,Transmit interrupt enable 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 12. " UCRXIE3 ,Receive interrupt enable 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 11. " UCTXIE2 ,Transmit interrupt enable 2 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 10. " UCRXIE2 ,Receive interrupt enable 2 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 9. " UCTXIE1 ,Transmit interrupt enable 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 8. " UCRXIE1 ,Receive interrupt enable 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 7. " UCCLTOIE ,Clock low timeout interrupt enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 6. " UCBCNTIE ,Byte counter interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 5. " UCNACKIE ,Not-acknowledge interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 4. " UCBLIE ,Arbitration lost interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 3. " UCSTPIE ,STOP condition interrupt enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 2. " UCSTTIE ,START condition interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " UCTXIE0 ,Transmit interrupt enable 0 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 0. " UCRXIE0 ,Receive interrupt enable 0 bit" "Disabled,Enabled"
|
|
rgroup.word 0x2E++0x01
|
|
line.word 0x00 "UCB1IV,eUSCI_A1 Interrupt Vector Register"
|
|
else
|
|
group.word 0x00++0x03 "I2C"
|
|
line.word 0x00 "UCB1CTLW0,eUSCI_B1 Control Word Register 0"
|
|
rbitfld.word 0x00 15. " UCB10 ,Own addressing mode select bit" "7-bit,10-bit"
|
|
bitfld.word 0x00 14. " UCSLA10 ,Slave addressing mode select bit" "7-bit,10-bit"
|
|
rbitfld.word 0x00 13. " UCMM ,Multi-master environment select" "Single master,Multi-master"
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
textline " "
|
|
rbitfld.word 0x00 9.--10. " UCMODEx ,eUSCI_B mode" "3-pin SPI,4-pin SPI,4-pin SPI,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" ",Synchronous"
|
|
rbitfld.word 0x00 6.--7. " UCSSELx ,eUSCI_B clock source select" "UCLKI,ACLK,SMCLK,SMCLK"
|
|
bitfld.word 0x00 5. " UCTXACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
textline " "
|
|
bitfld.word 0x00 4. " UCTR ,Transmitter/receiver" "Receiver,Transmitter"
|
|
bitfld.word 0x00 3. " UCTXNACK ,Transmit a NACK" "ACK,NACK"
|
|
bitfld.word 0x00 2. " UCTXSTP ,Transmit STOP condition in master mode" "Not occurred,Occurred"
|
|
bitfld.word 0x00 1. " UCTXSTT ,Transmit START condition in master mode" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
if ((per.w(ad:0x40002400)&0x800)==0x00)
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCB1CTLW1,eUSCI_B1 Control Word Register 1"
|
|
bitfld.word 0x00 8. " UCETXINT ,Early UCTXIFG0" "Address match,Each START"
|
|
rbitfld.word 0x00 6.--7. " UCCLTO ,Clock low timeout select" "Disabled,135 000 SYSCLK cycles,150 000 SYSCLK cycles,165 000 SYSCLK cycles"
|
|
rbitfld.word 0x00 5. " UCSTPNACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
bitfld.word 0x00 4. " UCSWACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
textline " "
|
|
rbitfld.word 0x00 2.--3. " UCBSTPx ,Automatic STOP condition generation" "No automatic,UCBCNTIFG,Automatic,?..."
|
|
bitfld.word 0x00 0.--1. " UCGLITx ,Deglitch time" "50 ns,25 ns,12.5 ns,6.25 ns"
|
|
else
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCB1CTLW1,eUSCI_B1 Control Word Register 1"
|
|
rbitfld.word 0x00 6.--7. " UCCLTO ,Clock low timeout select" "Disabled,135 000 SYSCLK cycles,150 000 SYSCLK cycles,165 000 SYSCLK cycles"
|
|
rbitfld.word 0x00 5. " UCSTPNACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
bitfld.word 0x00 4. " UCSWACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
rbitfld.word 0x00 2.--3. " UCBSTPx ,Automatic STOP condition generation" "No automatic,,Automatic,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " UCGLITx ,Deglitch time" "50 ns,25 ns,12.5 ns,6.25 ns"
|
|
endif
|
|
rgroup.word 0x06++0x07
|
|
line.word 0x00 "UCB1BRW,eUSCI_B1 Baud Rate Control Word Register"
|
|
line.word 0x02 "UCB1STATW,eUSCI_B1 Status Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " UCBCNTx ,Hardware byte counter value"
|
|
bitfld.word 0x02 6. " UCSCLLOW ,SCL low" "Not held,Held"
|
|
bitfld.word 0x02 5. " UCGC ,General call address received" "No received,Received"
|
|
bitfld.word 0x02 4. " UCBBUSY ,Bus busy" "Inactive,Busy"
|
|
line.word 0x04 "UCB1TBCNT,eUSCI_B1 Byte Counter Threshold Register"
|
|
hexmask.word.byte 0x04 0.--7. 1. " UCTBCNTx ,Byte counter threshold value"
|
|
line.word 0x06 "UCB1RXBUF,eUSCI_A1 Receive Buffer Register"
|
|
hexmask.word.byte 0x06 0.--7. 1. " UCRXBUFx ,Receive-data buffer"
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCB1TXBUF,eUSCI_A1 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUFx ,Transmit data buffer"
|
|
rgroup.word 0x14++0x0B
|
|
line.word 0x00 "UCB1I2COA0,eUSCI_B1 I2C Own Address 0 Register"
|
|
bitfld.word 0x00 15. " UCGCEN ,General call response enable" "Not respond,Respond"
|
|
bitfld.word 0x00 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--9. 1. " I2COA0 ,I2C own address"
|
|
line.word 0x02 "UCB1I2COA1,eUSCI_B1 I2C Own Address 1 Register"
|
|
bitfld.word 0x02 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x02 0.--9. 1. " I2COA1 ,I2C own address"
|
|
line.word 0x04 "UCB1I2COA2,eUSCI_B1 I2C Own Address 2 Register"
|
|
bitfld.word 0x04 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x04 0.--9. 1. " I2COA2 ,I2C own address"
|
|
line.word 0x06 "UCB1I2COA3,eUSCI_B1 I2C Own Address 3 Register"
|
|
bitfld.word 0x06 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x06 0.--9. 1. " I2COA3 ,I2C own address"
|
|
line.word 0x08 "UCB1ADDRX,eUSCI_B1 I2C Received Address Register"
|
|
hexmask.word 0x08 0.--9. 1. " ADDRXx ,Received Address Register"
|
|
line.word 0x0A "UCB1ADDMASK,eUSCI_B1 I2C Address Mask Register"
|
|
hexmask.word 0x0A 0.--9. 1. " ADDMASKx ,Address Mask Register"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "UCB1I2CSA,eUSCI_B1 I2C Address Mask Register"
|
|
hexmask.word 0x00 0.--9. 1. " I2CSAx ,I2C slave address"
|
|
group.word 0x2A++0x03
|
|
line.word 0x00 "UCB1IE,eUSCI_B1 Interrupt Enable Register"
|
|
bitfld.word 0x00 14. " UCBIT9IFG ,Bit position 9 interrupt flag" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " UCTXIFG3 ,Transmit interrupt flag 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " UCRXIFG3 ,Receive interrupt flag 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " UCTXIFG2 ,Transmit interrupt flag 2 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " UCRXIFG2 ,Receive interrupt flag 2 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " UCTXIFG1 ,Transmit interrupt flag 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " UCRXIFG1 ,Receive interrupt flag 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " UCCLTOIFG ,Clock low timeout interrupt flag bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " UCBCNTIFG ,Byte counter interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " UCNACKIFG ,Not-acknowledge interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " UCBLIFG ,Arbitration lost interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " UCSTPIFG ,STOP condition interrupt flag bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " UCSTTIFG ,START condition interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " UCTXIFG0 ,Transmit interrupt flag 0 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIFG0 ,Receive interrupt flag 0 bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCB1IFG,eUSCI_B1 Interrupt Flag Register"
|
|
bitfld.word 0x02 14. " UCBIT9IE ,Bit position 9 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 13. " UCTXIE3 ,Transmit interrupt enable 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 12. " UCRXIE3 ,Receive interrupt enable 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 11. " UCTXIE2 ,Transmit interrupt enable 2 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 10. " UCRXIE2 ,Receive interrupt enable 2 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 9. " UCTXIE1 ,Transmit interrupt enable 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 8. " UCRXIE1 ,Receive interrupt enable 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 7. " UCCLTOIE ,Clock low timeout interrupt enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 6. " UCBCNTIE ,Byte counter interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 5. " UCNACKIE ,Not-acknowledge interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 4. " UCBLIE ,Arbitration lost interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 3. " UCSTPIE ,STOP condition interrupt enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 2. " UCSTTIE ,START condition interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " UCTXIE0 ,Transmit interrupt enable 0 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 0. " UCRXIE0 ,Receive interrupt enable 0 bit" "Disabled,Enabled"
|
|
rgroup.word 0x2E++0x01
|
|
line.word 0x00 "UCB1IV,eUSCI_A1 Interrupt Vector Register"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
width 17.
|
|
if (((per.w(ad:0x40002400))&0x01)==0x01)
|
|
if ((per.w(ad:0x40002400)&0x100)==0x100)
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCB1CTLW0,eUSCI_A1 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
bitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
bitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCB1CTLW0,eUSCI_A1 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
bitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "UCB1BRW,eUSCI_A1 Baud Rate Control Word Register"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCB1STATW,eUSCI_A1 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Idle,Busy"
|
|
else
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCB1CTLW0,eUSCI_A1 Control Word Register 0"
|
|
rbitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
rbitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
rbitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
rbitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
rbitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
rbitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
rbitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
rgroup.word 0x06++0x01
|
|
line.word 0x00 "UCB1BRW,eUSCI_A1 Baud Rate Control Word Register"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCB1STATW,eUSCI_A1 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Idle,Busy"
|
|
endif
|
|
hgroup.word 0x0C++0x01
|
|
hide.word 0x00 "UCB1RXBUF,eUSCI_A1 Receive Buffer Register"
|
|
in
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCB1TXBUF,eUSCI_A1 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUFx ,Transmit data buffer"
|
|
group.word 0x1A++0x03
|
|
line.word 0x00 "UCB1IE,eUSCI_A1 Interrupt Enable Register"
|
|
bitfld.word 0x00 1. " UCTXIE ,Transmit interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIE ,Receive interrupt enable bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCB1IFG,eUSCI_A1 Interrupt Flag Register"
|
|
bitfld.word 0x02 1. " UCTXIFG ,Transmit interrupt flag bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 0. " UCRXIFG ,Receive interrupt flag bit" "No interrupt,Interrupt"
|
|
rgroup.word 0x1E++0x01
|
|
line.word 0x00 "UCB1IV,eUSCI_A1 Interrupt Vector Register"
|
|
width 0x0B
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "eUSCI_B2"
|
|
base ad:0x40002800
|
|
width 11.
|
|
if ((per.w(ad:0x40002800)&0x600)==0x600)
|
|
width 13.
|
|
if ((per.w(ad:0x40002800)&0x0001)==0x0001)
|
|
group.word 0x00++0x01 "I2C"
|
|
line.word 0x00 "UCB2CTLW0,eUSCI_B2 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCB10 ,Own addressing mode select bit" "7-bit,10-bit"
|
|
bitfld.word 0x00 14. " UCSLA10 ,Slave addressing mode select bit" "7-bit,10-bit"
|
|
bitfld.word 0x00 13. " UCMM ,Multi-master environment select" "Single master,Multi-master"
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
textline " "
|
|
bitfld.word 0x00 9.--10. " UCMODE ,eUSCI_B mode" "3-pin SPI,4-pin SPI,4-pin SPI,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_B clock source select" "UCLKI,ACLK,SMCLK,SMCLK"
|
|
bitfld.word 0x00 5. " UCTXACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
textline " "
|
|
bitfld.word 0x00 4. " UCTR ,Transmitter/receiver" "Receiver,Transmitter"
|
|
bitfld.word 0x00 3. " UCTXNACK ,Transmit a NACK" "ACK,NACK"
|
|
bitfld.word 0x00 2. " UCTXSTP ,Transmit STOP condition in master mode" "Not occurred,Occurred"
|
|
bitfld.word 0x00 1. " UCTXSTT ,Transmit START condition in master mode" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
if ((per.w(ad:0x40002800)&0x800)==0x00)
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCB2CTLW1,eUSCI_B2 Control Word Register 1"
|
|
bitfld.word 0x00 8. " UCETXINT ,Early UCTXIFG0" "Address match,Each START"
|
|
bitfld.word 0x00 6.--7. " UCCLTO ,Clock low timeout select" "Disabled,135 000 SYSCLK,150 000 SYSCLK,165 000 SYSCLK"
|
|
bitfld.word 0x00 5. " UCSTPNACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
bitfld.word 0x00 4. " UCSWACK , eUSCI_B module triggers the sending of the ACK of the address or if it is controlled by software" "NACK,ACK"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " UCBSTP ,Automatic STOP condition generation" "No automatic,UCBCNTIFG,Automatic,?..."
|
|
bitfld.word 0x00 0.--1. " UCGLITx ,Deglitch time" "50 ns,25 ns,12.5 ns,6.25 ns"
|
|
else
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCB2CTLW1,eUSCI_B2 Control Word Register 1"
|
|
bitfld.word 0x00 6.--7. " UCCLTO ,Clock low timeout select" "Disabled,135 000 SYSCLK,150 000 SYSCLK,165 000 SYSCLK"
|
|
bitfld.word 0x00 5. " UCSTPNACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
bitfld.word 0x00 4. " UCSWACK , eUSCI_B module triggers the sending of the ACK of the address or if it is controlled by software" "NACK,ACK"
|
|
bitfld.word 0x00 2.--3. " UCBSTP ,Automatic STOP condition generation" "No automatic,,Automatic,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " UCGLITx ,Deglitch time" "50 ns,25 ns,12.5 ns,6.25 ns"
|
|
endif
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "UCB2BRW,eUSCI_B2 Baud Rate Control Word Register"
|
|
rgroup.word 0x08++0x01
|
|
line.word 0x00 "UCB2STATW,eUSCI_B2 Status Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " UCBCNTx ,Hardware byte counter value"
|
|
bitfld.word 0x00 6. " UCSCLLOW ,SCL low" "Not held,Held"
|
|
bitfld.word 0x00 5. " UCGC ,General call address received" "No received,Received"
|
|
bitfld.word 0x00 4. " UCBBUSY ,Bus busy" "Inactive,Busy"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCB2TBCNT,eUSCI_B2 Byte Counter Threshold Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTBCNTx ,Byte counter threshold value"
|
|
rgroup.word 0x0C++0x01
|
|
line.word 0x00 "UCB2RXBUF,eUSCI_A2 Receive Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCRXBUFx ,Receive-data buffer"
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCB2TXBUF,eUSCI_A2 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUFx ,Transmit data buffer"
|
|
group.word 0x14++0x0D
|
|
line.word 0x00 "UCB2I2COA0,eUSCI_B2 I2C Own Address 0 Register"
|
|
bitfld.word 0x00 15. " UCGCEN ,General call response enable" "Not respond,Respond"
|
|
bitfld.word 0x00 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--9. 1. " I2COA0 ,I2C own address"
|
|
line.word 0x02 "UCB2I2COA1,eUSCI_B2 I2C Own Address 1 Register"
|
|
bitfld.word 0x02 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x02 0.--9. 1. " I2COA1 ,I2C own address"
|
|
line.word 0x04 "UCB2I2COA2,eUSCI_B2 I2C Own Address 2 Register"
|
|
bitfld.word 0x04 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x04 0.--9. 1. " I2COA2 ,I2C own address"
|
|
line.word 0x06 "UCB2I2COA3,eUSCI_B2 I2C Own Address 3 Register"
|
|
bitfld.word 0x06 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x06 0.--9. 1. " I2COA3 ,I2C own address"
|
|
line.word 0x08 "UCB2ADDRX,eUSCI_B2 I2C Received Address Register"
|
|
hexmask.word 0x08 0.--9. 1. " ADDRXx ,Received Address Register"
|
|
line.word 0x0A "UCB2ADDMASK,eUSCI_B2 I2C Address Mask Register"
|
|
hexmask.word 0x0A 0.--9. 1. " ADDMASKx ,Address Mask Register"
|
|
line.word 0x0C "UCB2I2CSA,eUSCI_B2 I2C Address Mask Register"
|
|
hexmask.word 0x0C 0.--9. 1. " I2CSAx ,I2C slave address"
|
|
group.word 0x2A++0x03
|
|
line.word 0x00 "UCB2IE,eUSCI_B2 Interrupt Enable Register"
|
|
bitfld.word 0x00 14. " UCBIT9IFG ,Bit position 9 interrupt flag" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " UCTXIFG3 ,Transmit interrupt flag 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " UCRXIFG3 ,Receive interrupt flag 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " UCTXIFG2 ,Transmit interrupt flag 2 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " UCRXIFG2 ,Receive interrupt flag 2 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " UCTXIFG1 ,Transmit interrupt flag 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " UCRXIFG1 ,Receive interrupt flag 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " UCCLTOIFG ,Clock low timeout interrupt flag bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " UCBCNTIFG ,Byte counter interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " UCNACKIFG ,Not-acknowledge interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " UCBLIFG ,Arbitration lost interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " UCSTPIFG ,STOP condition interrupt flag bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " UCSTTIFG ,START condition interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " UCTXIFG0 ,Transmit interrupt flag 0 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIFG0 ,Receive interrupt flag 0 bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCB2IFG,eUSCI_B2 Interrupt Flag Register"
|
|
bitfld.word 0x02 14. " UCBIT9IE ,Bit position 9 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 13. " UCTXIE3 ,Transmit interrupt enable 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 12. " UCRXIE3 ,Receive interrupt enable 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 11. " UCTXIE2 ,Transmit interrupt enable 2 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 10. " UCRXIE2 ,Receive interrupt enable 2 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 9. " UCTXIE1 ,Transmit interrupt enable 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 8. " UCRXIE1 ,Receive interrupt enable 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 7. " UCCLTOIE ,Clock low timeout interrupt enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 6. " UCBCNTIE ,Byte counter interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 5. " UCNACKIE ,Not-acknowledge interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 4. " UCBLIE ,Arbitration lost interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 3. " UCSTPIE ,STOP condition interrupt enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 2. " UCSTTIE ,START condition interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " UCTXIE0 ,Transmit interrupt enable 0 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 0. " UCRXIE0 ,Receive interrupt enable 0 bit" "Disabled,Enabled"
|
|
rgroup.word 0x2E++0x01
|
|
line.word 0x00 "UCB2IV,eUSCI_A2 Interrupt Vector Register"
|
|
else
|
|
group.word 0x00++0x03 "I2C"
|
|
line.word 0x00 "UCB2CTLW0,eUSCI_B2 Control Word Register 0"
|
|
rbitfld.word 0x00 15. " UCB10 ,Own addressing mode select bit" "7-bit,10-bit"
|
|
bitfld.word 0x00 14. " UCSLA10 ,Slave addressing mode select bit" "7-bit,10-bit"
|
|
rbitfld.word 0x00 13. " UCMM ,Multi-master environment select" "Single master,Multi-master"
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
textline " "
|
|
rbitfld.word 0x00 9.--10. " UCMODEx ,eUSCI_B mode" "3-pin SPI,4-pin SPI,4-pin SPI,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" ",Synchronous"
|
|
rbitfld.word 0x00 6.--7. " UCSSELx ,eUSCI_B clock source select" "UCLKI,ACLK,SMCLK,SMCLK"
|
|
bitfld.word 0x00 5. " UCTXACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
textline " "
|
|
bitfld.word 0x00 4. " UCTR ,Transmitter/receiver" "Receiver,Transmitter"
|
|
bitfld.word 0x00 3. " UCTXNACK ,Transmit a NACK" "ACK,NACK"
|
|
bitfld.word 0x00 2. " UCTXSTP ,Transmit STOP condition in master mode" "Not occurred,Occurred"
|
|
bitfld.word 0x00 1. " UCTXSTT ,Transmit START condition in master mode" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
if ((per.w(ad:0x40002800)&0x800)==0x00)
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCB2CTLW1,eUSCI_B2 Control Word Register 1"
|
|
bitfld.word 0x00 8. " UCETXINT ,Early UCTXIFG0" "Address match,Each START"
|
|
rbitfld.word 0x00 6.--7. " UCCLTO ,Clock low timeout select" "Disabled,135 000 SYSCLK cycles,150 000 SYSCLK cycles,165 000 SYSCLK cycles"
|
|
rbitfld.word 0x00 5. " UCSTPNACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
bitfld.word 0x00 4. " UCSWACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
textline " "
|
|
rbitfld.word 0x00 2.--3. " UCBSTPx ,Automatic STOP condition generation" "No automatic,UCBCNTIFG,Automatic,?..."
|
|
bitfld.word 0x00 0.--1. " UCGLITx ,Deglitch time" "50 ns,25 ns,12.5 ns,6.25 ns"
|
|
else
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCB2CTLW1,eUSCI_B2 Control Word Register 1"
|
|
rbitfld.word 0x00 6.--7. " UCCLTO ,Clock low timeout select" "Disabled,135 000 SYSCLK cycles,150 000 SYSCLK cycles,165 000 SYSCLK cycles"
|
|
rbitfld.word 0x00 5. " UCSTPNACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
bitfld.word 0x00 4. " UCSWACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
rbitfld.word 0x00 2.--3. " UCBSTPx ,Automatic STOP condition generation" "No automatic,,Automatic,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " UCGLITx ,Deglitch time" "50 ns,25 ns,12.5 ns,6.25 ns"
|
|
endif
|
|
rgroup.word 0x06++0x07
|
|
line.word 0x00 "UCB2BRW,eUSCI_B2 Baud Rate Control Word Register"
|
|
line.word 0x02 "UCB2STATW,eUSCI_B2 Status Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " UCBCNTx ,Hardware byte counter value"
|
|
bitfld.word 0x02 6. " UCSCLLOW ,SCL low" "Not held,Held"
|
|
bitfld.word 0x02 5. " UCGC ,General call address received" "No received,Received"
|
|
bitfld.word 0x02 4. " UCBBUSY ,Bus busy" "Inactive,Busy"
|
|
line.word 0x04 "UCB2TBCNT,eUSCI_B2 Byte Counter Threshold Register"
|
|
hexmask.word.byte 0x04 0.--7. 1. " UCTBCNTx ,Byte counter threshold value"
|
|
line.word 0x06 "UCB2RXBUF,eUSCI_A2 Receive Buffer Register"
|
|
hexmask.word.byte 0x06 0.--7. 1. " UCRXBUFx ,Receive-data buffer"
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCB2TXBUF,eUSCI_A2 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUFx ,Transmit data buffer"
|
|
rgroup.word 0x14++0x0B
|
|
line.word 0x00 "UCB2I2COA0,eUSCI_B2 I2C Own Address 0 Register"
|
|
bitfld.word 0x00 15. " UCGCEN ,General call response enable" "Not respond,Respond"
|
|
bitfld.word 0x00 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--9. 1. " I2COA0 ,I2C own address"
|
|
line.word 0x02 "UCB2I2COA1,eUSCI_B2 I2C Own Address 1 Register"
|
|
bitfld.word 0x02 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x02 0.--9. 1. " I2COA1 ,I2C own address"
|
|
line.word 0x04 "UCB2I2COA2,eUSCI_B2 I2C Own Address 2 Register"
|
|
bitfld.word 0x04 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x04 0.--9. 1. " I2COA2 ,I2C own address"
|
|
line.word 0x06 "UCB2I2COA3,eUSCI_B2 I2C Own Address 3 Register"
|
|
bitfld.word 0x06 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x06 0.--9. 1. " I2COA3 ,I2C own address"
|
|
line.word 0x08 "UCB2ADDRX,eUSCI_B2 I2C Received Address Register"
|
|
hexmask.word 0x08 0.--9. 1. " ADDRXx ,Received Address Register"
|
|
line.word 0x0A "UCB2ADDMASK,eUSCI_B2 I2C Address Mask Register"
|
|
hexmask.word 0x0A 0.--9. 1. " ADDMASKx ,Address Mask Register"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "UCB2I2CSA,eUSCI_B2 I2C Address Mask Register"
|
|
hexmask.word 0x00 0.--9. 1. " I2CSAx ,I2C slave address"
|
|
group.word 0x2A++0x03
|
|
line.word 0x00 "UCB2IE,eUSCI_B2 Interrupt Enable Register"
|
|
bitfld.word 0x00 14. " UCBIT9IFG ,Bit position 9 interrupt flag" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " UCTXIFG3 ,Transmit interrupt flag 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " UCRXIFG3 ,Receive interrupt flag 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " UCTXIFG2 ,Transmit interrupt flag 2 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " UCRXIFG2 ,Receive interrupt flag 2 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " UCTXIFG1 ,Transmit interrupt flag 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " UCRXIFG1 ,Receive interrupt flag 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " UCCLTOIFG ,Clock low timeout interrupt flag bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " UCBCNTIFG ,Byte counter interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " UCNACKIFG ,Not-acknowledge interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " UCBLIFG ,Arbitration lost interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " UCSTPIFG ,STOP condition interrupt flag bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " UCSTTIFG ,START condition interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " UCTXIFG0 ,Transmit interrupt flag 0 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIFG0 ,Receive interrupt flag 0 bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCB2IFG,eUSCI_B2 Interrupt Flag Register"
|
|
bitfld.word 0x02 14. " UCBIT9IE ,Bit position 9 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 13. " UCTXIE3 ,Transmit interrupt enable 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 12. " UCRXIE3 ,Receive interrupt enable 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 11. " UCTXIE2 ,Transmit interrupt enable 2 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 10. " UCRXIE2 ,Receive interrupt enable 2 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 9. " UCTXIE1 ,Transmit interrupt enable 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 8. " UCRXIE1 ,Receive interrupt enable 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 7. " UCCLTOIE ,Clock low timeout interrupt enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 6. " UCBCNTIE ,Byte counter interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 5. " UCNACKIE ,Not-acknowledge interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 4. " UCBLIE ,Arbitration lost interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 3. " UCSTPIE ,STOP condition interrupt enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 2. " UCSTTIE ,START condition interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " UCTXIE0 ,Transmit interrupt enable 0 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 0. " UCRXIE0 ,Receive interrupt enable 0 bit" "Disabled,Enabled"
|
|
rgroup.word 0x2E++0x01
|
|
line.word 0x00 "UCB2IV,eUSCI_A2 Interrupt Vector Register"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
width 17.
|
|
if (((per.w(ad:0x40002800))&0x01)==0x01)
|
|
if ((per.w(ad:0x40002800)&0x100)==0x100)
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCB2CTLW0,eUSCI_A2 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
bitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
bitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCB2CTLW0,eUSCI_A2 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
bitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "UCB2BRW,eUSCI_A2 Baud Rate Control Word Register"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCB2STATW,eUSCI_A2 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Idle,Busy"
|
|
else
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCB2CTLW0,eUSCI_A2 Control Word Register 0"
|
|
rbitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
rbitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
rbitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
rbitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
rbitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
rbitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
rbitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
rgroup.word 0x06++0x01
|
|
line.word 0x00 "UCB2BRW,eUSCI_A2 Baud Rate Control Word Register"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCB2STATW,eUSCI_A2 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Idle,Busy"
|
|
endif
|
|
hgroup.word 0x0C++0x01
|
|
hide.word 0x00 "UCB2RXBUF,eUSCI_A2 Receive Buffer Register"
|
|
in
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCB2TXBUF,eUSCI_A2 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUFx ,Transmit data buffer"
|
|
group.word 0x1A++0x03
|
|
line.word 0x00 "UCB2IE,eUSCI_A2 Interrupt Enable Register"
|
|
bitfld.word 0x00 1. " UCTXIE ,Transmit interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIE ,Receive interrupt enable bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCB2IFG,eUSCI_A2 Interrupt Flag Register"
|
|
bitfld.word 0x02 1. " UCTXIFG ,Transmit interrupt flag bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 0. " UCRXIFG ,Receive interrupt flag bit" "No interrupt,Interrupt"
|
|
rgroup.word 0x1E++0x01
|
|
line.word 0x00 "UCB2IV,eUSCI_A2 Interrupt Vector Register"
|
|
width 0x0B
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "eUSCI_B3"
|
|
base ad:0x40002C00
|
|
width 11.
|
|
if ((per.w(ad:0x40002C00)&0x600)==0x600)
|
|
width 13.
|
|
if ((per.w(ad:0x40002C00)&0x0001)==0x0001)
|
|
group.word 0x00++0x01 "I2C"
|
|
line.word 0x00 "UCB3CTLW0,eUSCI_B3 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCB10 ,Own addressing mode select bit" "7-bit,10-bit"
|
|
bitfld.word 0x00 14. " UCSLA10 ,Slave addressing mode select bit" "7-bit,10-bit"
|
|
bitfld.word 0x00 13. " UCMM ,Multi-master environment select" "Single master,Multi-master"
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
textline " "
|
|
bitfld.word 0x00 9.--10. " UCMODE ,eUSCI_B mode" "3-pin SPI,4-pin SPI,4-pin SPI,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_B clock source select" "UCLKI,ACLK,SMCLK,SMCLK"
|
|
bitfld.word 0x00 5. " UCTXACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
textline " "
|
|
bitfld.word 0x00 4. " UCTR ,Transmitter/receiver" "Receiver,Transmitter"
|
|
bitfld.word 0x00 3. " UCTXNACK ,Transmit a NACK" "ACK,NACK"
|
|
bitfld.word 0x00 2. " UCTXSTP ,Transmit STOP condition in master mode" "Not occurred,Occurred"
|
|
bitfld.word 0x00 1. " UCTXSTT ,Transmit START condition in master mode" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
if ((per.w(ad:0x40002C00)&0x800)==0x00)
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCB3CTLW1,eUSCI_B3 Control Word Register 1"
|
|
bitfld.word 0x00 8. " UCETXINT ,Early UCTXIFG0" "Address match,Each START"
|
|
bitfld.word 0x00 6.--7. " UCCLTO ,Clock low timeout select" "Disabled,135 000 SYSCLK,150 000 SYSCLK,165 000 SYSCLK"
|
|
bitfld.word 0x00 5. " UCSTPNACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
bitfld.word 0x00 4. " UCSWACK , eUSCI_B module triggers the sending of the ACK of the address or if it is controlled by software" "NACK,ACK"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " UCBSTP ,Automatic STOP condition generation" "No automatic,UCBCNTIFG,Automatic,?..."
|
|
bitfld.word 0x00 0.--1. " UCGLITx ,Deglitch time" "50 ns,25 ns,12.5 ns,6.25 ns"
|
|
else
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCB3CTLW1,eUSCI_B3 Control Word Register 1"
|
|
bitfld.word 0x00 6.--7. " UCCLTO ,Clock low timeout select" "Disabled,135 000 SYSCLK,150 000 SYSCLK,165 000 SYSCLK"
|
|
bitfld.word 0x00 5. " UCSTPNACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
bitfld.word 0x00 4. " UCSWACK , eUSCI_B module triggers the sending of the ACK of the address or if it is controlled by software" "NACK,ACK"
|
|
bitfld.word 0x00 2.--3. " UCBSTP ,Automatic STOP condition generation" "No automatic,,Automatic,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " UCGLITx ,Deglitch time" "50 ns,25 ns,12.5 ns,6.25 ns"
|
|
endif
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "UCB3BRW,eUSCI_B3 Baud Rate Control Word Register"
|
|
rgroup.word 0x08++0x01
|
|
line.word 0x00 "UCB3STATW,eUSCI_B3 Status Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " UCBCNTx ,Hardware byte counter value"
|
|
bitfld.word 0x00 6. " UCSCLLOW ,SCL low" "Not held,Held"
|
|
bitfld.word 0x00 5. " UCGC ,General call address received" "No received,Received"
|
|
bitfld.word 0x00 4. " UCBBUSY ,Bus busy" "Inactive,Busy"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCB3TBCNT,eUSCI_B3 Byte Counter Threshold Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTBCNTx ,Byte counter threshold value"
|
|
rgroup.word 0x0C++0x01
|
|
line.word 0x00 "UCB3RXBUF,eUSCI_A3 Receive Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCRXBUFx ,Receive-data buffer"
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCB3TXBUF,eUSCI_A3 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUFx ,Transmit data buffer"
|
|
group.word 0x14++0x0D
|
|
line.word 0x00 "UCB3I2COA0,eUSCI_B3 I2C Own Address 0 Register"
|
|
bitfld.word 0x00 15. " UCGCEN ,General call response enable" "Not respond,Respond"
|
|
bitfld.word 0x00 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--9. 1. " I2COA0 ,I2C own address"
|
|
line.word 0x02 "UCB3I2COA1,eUSCI_B3 I2C Own Address 1 Register"
|
|
bitfld.word 0x02 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x02 0.--9. 1. " I2COA1 ,I2C own address"
|
|
line.word 0x04 "UCB3I2COA2,eUSCI_B3 I2C Own Address 2 Register"
|
|
bitfld.word 0x04 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x04 0.--9. 1. " I2COA2 ,I2C own address"
|
|
line.word 0x06 "UCB3I2COA3,eUSCI_B3 I2C Own Address 3 Register"
|
|
bitfld.word 0x06 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x06 0.--9. 1. " I2COA3 ,I2C own address"
|
|
line.word 0x08 "UCB3ADDRX,eUSCI_B3 I2C Received Address Register"
|
|
hexmask.word 0x08 0.--9. 1. " ADDRXx ,Received Address Register"
|
|
line.word 0x0A "UCB3ADDMASK,eUSCI_B3 I2C Address Mask Register"
|
|
hexmask.word 0x0A 0.--9. 1. " ADDMASKx ,Address Mask Register"
|
|
line.word 0x0C "UCB3I2CSA,eUSCI_B3 I2C Address Mask Register"
|
|
hexmask.word 0x0C 0.--9. 1. " I2CSAx ,I2C slave address"
|
|
group.word 0x2A++0x03
|
|
line.word 0x00 "UCB3IE,eUSCI_B3 Interrupt Enable Register"
|
|
bitfld.word 0x00 14. " UCBIT9IFG ,Bit position 9 interrupt flag" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " UCTXIFG3 ,Transmit interrupt flag 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " UCRXIFG3 ,Receive interrupt flag 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " UCTXIFG2 ,Transmit interrupt flag 2 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " UCRXIFG2 ,Receive interrupt flag 2 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " UCTXIFG1 ,Transmit interrupt flag 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " UCRXIFG1 ,Receive interrupt flag 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " UCCLTOIFG ,Clock low timeout interrupt flag bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " UCBCNTIFG ,Byte counter interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " UCNACKIFG ,Not-acknowledge interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " UCBLIFG ,Arbitration lost interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " UCSTPIFG ,STOP condition interrupt flag bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " UCSTTIFG ,START condition interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " UCTXIFG0 ,Transmit interrupt flag 0 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIFG0 ,Receive interrupt flag 0 bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCB3IFG,eUSCI_B3 Interrupt Flag Register"
|
|
bitfld.word 0x02 14. " UCBIT9IE ,Bit position 9 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 13. " UCTXIE3 ,Transmit interrupt enable 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 12. " UCRXIE3 ,Receive interrupt enable 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 11. " UCTXIE2 ,Transmit interrupt enable 2 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 10. " UCRXIE2 ,Receive interrupt enable 2 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 9. " UCTXIE1 ,Transmit interrupt enable 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 8. " UCRXIE1 ,Receive interrupt enable 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 7. " UCCLTOIE ,Clock low timeout interrupt enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 6. " UCBCNTIE ,Byte counter interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 5. " UCNACKIE ,Not-acknowledge interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 4. " UCBLIE ,Arbitration lost interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 3. " UCSTPIE ,STOP condition interrupt enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 2. " UCSTTIE ,START condition interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " UCTXIE0 ,Transmit interrupt enable 0 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 0. " UCRXIE0 ,Receive interrupt enable 0 bit" "Disabled,Enabled"
|
|
rgroup.word 0x2E++0x01
|
|
line.word 0x00 "UCB3IV,eUSCI_A3 Interrupt Vector Register"
|
|
else
|
|
group.word 0x00++0x03 "I2C"
|
|
line.word 0x00 "UCB3CTLW0,eUSCI_B3 Control Word Register 0"
|
|
rbitfld.word 0x00 15. " UCB10 ,Own addressing mode select bit" "7-bit,10-bit"
|
|
bitfld.word 0x00 14. " UCSLA10 ,Slave addressing mode select bit" "7-bit,10-bit"
|
|
rbitfld.word 0x00 13. " UCMM ,Multi-master environment select" "Single master,Multi-master"
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
textline " "
|
|
rbitfld.word 0x00 9.--10. " UCMODEx ,eUSCI_B mode" "3-pin SPI,4-pin SPI,4-pin SPI,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" ",Synchronous"
|
|
rbitfld.word 0x00 6.--7. " UCSSELx ,eUSCI_B clock source select" "UCLKI,ACLK,SMCLK,SMCLK"
|
|
bitfld.word 0x00 5. " UCTXACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
textline " "
|
|
bitfld.word 0x00 4. " UCTR ,Transmitter/receiver" "Receiver,Transmitter"
|
|
bitfld.word 0x00 3. " UCTXNACK ,Transmit a NACK" "ACK,NACK"
|
|
bitfld.word 0x00 2. " UCTXSTP ,Transmit STOP condition in master mode" "Not occurred,Occurred"
|
|
bitfld.word 0x00 1. " UCTXSTT ,Transmit START condition in master mode" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
if ((per.w(ad:0x40002C00)&0x800)==0x00)
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCB3CTLW1,eUSCI_B3 Control Word Register 1"
|
|
bitfld.word 0x00 8. " UCETXINT ,Early UCTXIFG0" "Address match,Each START"
|
|
rbitfld.word 0x00 6.--7. " UCCLTO ,Clock low timeout select" "Disabled,135 000 SYSCLK cycles,150 000 SYSCLK cycles,165 000 SYSCLK cycles"
|
|
rbitfld.word 0x00 5. " UCSTPNACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
bitfld.word 0x00 4. " UCSWACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
textline " "
|
|
rbitfld.word 0x00 2.--3. " UCBSTPx ,Automatic STOP condition generation" "No automatic,UCBCNTIFG,Automatic,?..."
|
|
bitfld.word 0x00 0.--1. " UCGLITx ,Deglitch time" "50 ns,25 ns,12.5 ns,6.25 ns"
|
|
else
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "UCB3CTLW1,eUSCI_B3 Control Word Register 1"
|
|
rbitfld.word 0x00 6.--7. " UCCLTO ,Clock low timeout select" "Disabled,135 000 SYSCLK cycles,150 000 SYSCLK cycles,165 000 SYSCLK cycles"
|
|
rbitfld.word 0x00 5. " UCSTPNACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
bitfld.word 0x00 4. " UCSWACK ,Transmit ACK condition in slave mode with enabled address mask register" "NACK,ACK"
|
|
rbitfld.word 0x00 2.--3. " UCBSTPx ,Automatic STOP condition generation" "No automatic,,Automatic,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " UCGLITx ,Deglitch time" "50 ns,25 ns,12.5 ns,6.25 ns"
|
|
endif
|
|
rgroup.word 0x06++0x07
|
|
line.word 0x00 "UCB3BRW,eUSCI_B3 Baud Rate Control Word Register"
|
|
line.word 0x02 "UCB3STATW,eUSCI_B3 Status Register"
|
|
hexmask.word.byte 0x02 8.--15. 1. " UCBCNTx ,Hardware byte counter value"
|
|
bitfld.word 0x02 6. " UCSCLLOW ,SCL low" "Not held,Held"
|
|
bitfld.word 0x02 5. " UCGC ,General call address received" "No received,Received"
|
|
bitfld.word 0x02 4. " UCBBUSY ,Bus busy" "Inactive,Busy"
|
|
line.word 0x04 "UCB3TBCNT,eUSCI_B3 Byte Counter Threshold Register"
|
|
hexmask.word.byte 0x04 0.--7. 1. " UCTBCNTx ,Byte counter threshold value"
|
|
line.word 0x06 "UCB3RXBUF,eUSCI_A3 Receive Buffer Register"
|
|
hexmask.word.byte 0x06 0.--7. 1. " UCRXBUFx ,Receive-data buffer"
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCB3TXBUF,eUSCI_A3 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUFx ,Transmit data buffer"
|
|
rgroup.word 0x14++0x0B
|
|
line.word 0x00 "UCB3I2COA0,eUSCI_B3 I2C Own Address 0 Register"
|
|
bitfld.word 0x00 15. " UCGCEN ,General call response enable" "Not respond,Respond"
|
|
bitfld.word 0x00 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--9. 1. " I2COA0 ,I2C own address"
|
|
line.word 0x02 "UCB3I2COA1,eUSCI_B3 I2C Own Address 1 Register"
|
|
bitfld.word 0x02 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x02 0.--9. 1. " I2COA1 ,I2C own address"
|
|
line.word 0x04 "UCB3I2COA2,eUSCI_B3 I2C Own Address 2 Register"
|
|
bitfld.word 0x04 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x04 0.--9. 1. " I2COA2 ,I2C own address"
|
|
line.word 0x06 "UCB3I2COA3,eUSCI_B3 I2C Own Address 3 Register"
|
|
bitfld.word 0x06 10. " UCOAEN ,Own Address enable bit" "Disabled,Enabled"
|
|
hexmask.word 0x06 0.--9. 1. " I2COA3 ,I2C own address"
|
|
line.word 0x08 "UCB3ADDRX,eUSCI_B3 I2C Received Address Register"
|
|
hexmask.word 0x08 0.--9. 1. " ADDRXx ,Received Address Register"
|
|
line.word 0x0A "UCB3ADDMASK,eUSCI_B3 I2C Address Mask Register"
|
|
hexmask.word 0x0A 0.--9. 1. " ADDMASKx ,Address Mask Register"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "UCB3I2CSA,eUSCI_B3 I2C Address Mask Register"
|
|
hexmask.word 0x00 0.--9. 1. " I2CSAx ,I2C slave address"
|
|
group.word 0x2A++0x03
|
|
line.word 0x00 "UCB3IE,eUSCI_B3 Interrupt Enable Register"
|
|
bitfld.word 0x00 14. " UCBIT9IFG ,Bit position 9 interrupt flag" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " UCTXIFG3 ,Transmit interrupt flag 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " UCRXIFG3 ,Receive interrupt flag 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " UCTXIFG2 ,Transmit interrupt flag 2 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " UCRXIFG2 ,Receive interrupt flag 2 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " UCTXIFG1 ,Transmit interrupt flag 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " UCRXIFG1 ,Receive interrupt flag 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " UCCLTOIFG ,Clock low timeout interrupt flag bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " UCBCNTIFG ,Byte counter interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " UCNACKIFG ,Not-acknowledge interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " UCBLIFG ,Arbitration lost interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " UCSTPIFG ,STOP condition interrupt flag bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " UCSTTIFG ,START condition interrupt flag bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " UCTXIFG0 ,Transmit interrupt flag 0 bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIFG0 ,Receive interrupt flag 0 bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCB3IFG,eUSCI_B3 Interrupt Flag Register"
|
|
bitfld.word 0x02 14. " UCBIT9IE ,Bit position 9 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 13. " UCTXIE3 ,Transmit interrupt enable 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 12. " UCRXIE3 ,Receive interrupt enable 3 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 11. " UCTXIE2 ,Transmit interrupt enable 2 bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 10. " UCRXIE2 ,Receive interrupt enable 2 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 9. " UCTXIE1 ,Transmit interrupt enable 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 8. " UCRXIE1 ,Receive interrupt enable 1 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 7. " UCCLTOIE ,Clock low timeout interrupt enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 6. " UCBCNTIE ,Byte counter interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 5. " UCNACKIE ,Not-acknowledge interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 4. " UCBLIE ,Arbitration lost interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 3. " UCSTPIE ,STOP condition interrupt enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 2. " UCSTTIE ,START condition interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " UCTXIE0 ,Transmit interrupt enable 0 bit" "Disabled,Enabled"
|
|
bitfld.word 0x02 0. " UCRXIE0 ,Receive interrupt enable 0 bit" "Disabled,Enabled"
|
|
rgroup.word 0x2E++0x01
|
|
line.word 0x00 "UCB3IV,eUSCI_A3 Interrupt Vector Register"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
width 17.
|
|
if (((per.w(ad:0x40002C00))&0x01)==0x01)
|
|
if ((per.w(ad:0x40002C00)&0x100)==0x100)
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCB3CTLW0,eUSCI_A3 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
bitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
bitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCB3CTLW0,eUSCI_A3 Control Word Register 0"
|
|
bitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
bitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
bitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
bitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
bitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
bitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
bitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "UCB3BRW,eUSCI_A3 Baud Rate Control Word Register"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCB3STATW,eUSCI_A3 Status Register"
|
|
bitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Idle,Busy"
|
|
else
|
|
group.word 0x00++0x01 "SPI"
|
|
line.word 0x00 "UCB3CTLW0,eUSCI_A3 Control Word Register 0"
|
|
rbitfld.word 0x00 15. " UCCKPH ,Clock phase select" "Changed->Captured,Captured->Changed"
|
|
rbitfld.word 0x00 14. " UCCKPL ,Clock polarity select" "Low,High"
|
|
rbitfld.word 0x00 13. " UCMSB ,MSB first select" "LSB,MSB"
|
|
rbitfld.word 0x00 12. " UC7BIT ,Character length" "8-bit,7-bit"
|
|
textline " "
|
|
rbitfld.word 0x00 11. " UCMST ,Master mode select" "Slave,Master"
|
|
rbitfld.word 0x00 9.--10. " UCMODE ,eUSCI_A mode" "3-pin SPI,4-pin SPI with UCxSTE active high,4-pin SPI with UCxSTE active low,I2C mode"
|
|
rbitfld.word 0x00 8. " UCSYNC ,Synchronous mode enable" "Asynchronous,Synchronous"
|
|
rbitfld.word 0x00 6.--7. " UCSSEL ,eUSCI_A clock source select" ",ACLK,SMCLK,SMCLK"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " UCSTEM ,STE mode select in master mode" "Prevented conflicts,Generated enable signal"
|
|
bitfld.word 0x00 0. " UCSWRST ,Software reset enable" "Disabled,Enabled"
|
|
rgroup.word 0x06++0x01
|
|
line.word 0x00 "UCB3BRW,eUSCI_A3 Baud Rate Control Word Register"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "UCB3STATW,eUSCI_A3 Status Register"
|
|
rbitfld.word 0x00 7. " UCLISTEN ,Listen enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " UCFE ,Framing error flag bit" "No error,Error"
|
|
bitfld.word 0x00 5. " UCOE ,Overrun error flag bit" "No error,Error"
|
|
rbitfld.word 0x00 0. " UCBUSY ,eUSCI_A busy bit" "Idle,Busy"
|
|
endif
|
|
hgroup.word 0x0C++0x01
|
|
hide.word 0x00 "UCB3RXBUF,eUSCI_A3 Receive Buffer Register"
|
|
in
|
|
group.word 0x0E++0x01
|
|
line.word 0x00 "UCB3TXBUF,eUSCI_A3 Transmit Buffer Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " UCTXBUFx ,Transmit data buffer"
|
|
group.word 0x1A++0x03
|
|
line.word 0x00 "UCB3IE,eUSCI_A3 Interrupt Enable Register"
|
|
bitfld.word 0x00 1. " UCTXIE ,Transmit interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UCRXIE ,Receive interrupt enable bit" "Disabled,Enabled"
|
|
line.word 0x02 "UCB3IFG,eUSCI_A3 Interrupt Flag Register"
|
|
bitfld.word 0x02 1. " UCTXIFG ,Transmit interrupt flag bit" "No interrupt,Interrupt"
|
|
bitfld.word 0x02 0. " UCRXIFG ,Receive interrupt flag bit" "No interrupt,Interrupt"
|
|
rgroup.word 0x1E++0x01
|
|
line.word 0x00 "UCB3IV,eUSCI_A3 Interrupt Vector Register"
|
|
width 0x0B
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
textline ""
|