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Gen4_R-Car_Trace32/2_Trunk/perkira100.per
woody d411edd9b4 add Trace32 File
2025-10-14 09:52:32 +09:00

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; --------------------------------------------------------------------------------
; @Title: KIRA100 On-Chip Peripherals
; @Props: Released
; @Author: ETA
; @Changelog: 2007-08-28 ETA
; @Manufacturer: RARITAN - Raritan Inc.
; @Doc: KIRA100_RO2_DataSheet_V04_INDEXED.pdf (2006.06)
; @Core: FA526
; @Chip: KIRA100
; @Chiplist: KIRA100
; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: perkira100.per 6111 2015-04-02 13:31:19Z askoncej $
;Known problems
;The number of APB Bridge Registers on chapter 7.3.1 doesn't match the number of the same registers in chapter 7.3.2.1.
;26 APB slave/base registers implemented (offset 0x04~0x68)
;Adresses of SDRAM Controller Registers (chapter 9.4.1) don't match addresses of the same registers on Memory Map (chapter 3.2)
;Table 59 (chapter 9.4.1) implemented
config 16. 8.
tree "Power Management Unit"
base ad:0x98100000
width 12.
group.long 0x08++0x3
line.long 0x00 "OSCC,OSC Control Register"
bitfld.long 0x00 9. " OSCHSTABLE ,12.288Mhz Oscillator Status" "Not stable,Stable"
bitfld.long 0x00 8. " OSCHOFF ,12.288Mhz Oscillator Set" "Enabled,Disabled"
textline " "
bitfld.long 0x00 1. " OSCLSTABLE ,32.768kHz Oscillator Status" "Not stable,Stable"
group.long 0x0c++0x3
line.long 0x00 "PMODE,Power Mode Register"
bitfld.long 0x00 2. " FCS ,Frequency change sequence" "Do not enter,Enter"
bitfld.long 0x00 1. " MODE[1] ,Turbo mode" "Normal,Turbo"
textline " "
bitfld.long 0x00 0. " MODE[0] ,Sleep mode" "Normal,Sleep"
group.long 0x10++0x3
line.long 0x00 "PCR,Power Manage Control Register"
bitfld.long 0x00 19. " PWRLOWMSK ,X_POWERLOW_B pin mask bit" "Unmasked,Masked"
bitfld.long 0x00 18. " WAITPD ,Power Down State" "Wait for power down,Wait for zero"
textline " "
bitfld.long 0x00 17. " WDTCLR ,Reset Type with WRo" "No effect,Reset"
bitfld.long 0x00 16. " WERTC ,Wake up as RTC alarm" "Disabled,Enabled"
textline " "
bitfld.long 0x00 15. " WEGPIO15 ,Wake up as GPIO15" "Disabled,Enabled"
bitfld.long 0x00 14. " WEGPIO14 ,Wake up as GPIO14" "Disabled,Enabled"
textline " "
bitfld.long 0x00 13. " WEGPIO13 ,Wake up as GPIO13" "Disabled,Enabled"
bitfld.long 0x00 12. " WEGPIO12 ,Wake up as GPIO12" "Disabled,Enabled"
textline " "
bitfld.long 0x00 11. " WEGPIO11 ,Wake up as GPIO11" "Disabled,Enabled"
bitfld.long 0x00 10. " WEGPIO10 ,Wake up as GPIO10" "Disabled,Enabled"
textline " "
bitfld.long 0x00 9. " WEGPIO9 ,Wake up as GPIO9" "Disabled,Enabled"
bitfld.long 0x00 8. " WEGPIO8 ,Wake up as GPIO8" "Disabled,Enabled"
textline " "
bitfld.long 0x00 7. " WEGPIO7 ,Wake up as GPIO7" "Disabled,Enabled"
bitfld.long 0x00 6. " WEGPIO6 ,Wake up as GPIO6" "Disabled,Enabled"
textline " "
bitfld.long 0x00 5. " WEGPIO5 ,Wake up as GPIO5" "Disabled,Enabled"
bitfld.long 0x00 4. " WEGPIO4 ,Wake up as GPIO4" "Disabled,Enabled"
textline " "
bitfld.long 0x00 3. " WEGPIO3 ,Wake up as GPIO3" "Disabled,Enabled"
bitfld.long 0x00 2. " WEGPIO2 ,Wake up as GPIO2" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " WEGPIO1 ,Wake up as GPIO1" "Disabled,Enabled"
bitfld.long 0x00 0. " WEGPIO0 ,Wake up as GPIO0" "Disabled,Enabled"
group.long 0x14++0x3
line.long 0x00 "PED,Power Manager Edge Detect"
bitfld.long 0x00 31. " GPIORE15 ,Wake up as GPIO15 rising-edge detect" "Disabled,Enabled"
bitfld.long 0x00 30. " GPIORE14 ,Wake up as GPIO14 rising-edge detect" "Disabled,Enabled"
textline " "
bitfld.long 0x00 29. " GPIORE13 ,Wake up as GPIO13 rising-edge detect" "Disabled,Enabled"
bitfld.long 0x00 28. " GPIORE12 ,Wake up as GPIO12 rising-edge detect" "Disabled,Enabled"
textline " "
bitfld.long 0x00 27. " GPIORE11 ,Wake up as GPIO11 rising-edge detect" "Disabled,Enabled"
bitfld.long 0x00 26. " GPIORE10 ,Wake up as GPIO10 rising-edge detect" "Disabled,Enabled"
textline " "
bitfld.long 0x00 25. " GPIORE9 ,Wake up as GPIO9 rising-edge detect" "Disabled,Enabled"
bitfld.long 0x00 24. " GPIORE8 ,Wake up as GPIO8 rising-edge detect" "Disabled,Enabled"
textline " "
bitfld.long 0x00 23. " GPIORE7 ,Wake up as GPIO7 rising-edge detect" "Disabled,Enabled"
bitfld.long 0x00 22. " GPIORE6 ,Wake up as GPIO6 rising-edge detect" "Disabled,Enabled"
textline " "
bitfld.long 0x00 21. " GPIORE5 ,Wake up as GPIO5 rising-edge detect" "Disabled,Enabled"
bitfld.long 0x00 20. " GPIORE4 ,Wake up as GPIO4 rising-edge detect" "Disabled,Enabled"
textline " "
bitfld.long 0x00 19. " GPIORE3 ,Wake up as GPIO3 rising-edge detect" "Disabled,Enabled"
bitfld.long 0x00 18. " GPIORE2 ,Wake up as GPIO2 rising-edge detect" "Disabled,Enabled"
textline " "
bitfld.long 0x00 17. " GPIORE1 ,Wake up as GPIO1 rising-edge detect" "Disabled,Enabled"
bitfld.long 0x00 16. " GPIORE0 ,Wake up as GPIO0 rising-edge detect" "Disabled,Enabled"
textline " "
bitfld.long 0x00 15. " GPIOFE15 ,Wake up as GPIO15 falling-edge detect" "Disabled,Enabled"
bitfld.long 0x00 14. " GPIOFE14 ,Wake up as GPIO14 falling-edge detect" "Disabled,Enabled"
textline " "
bitfld.long 0x00 13. " GPIOFE13 ,Wake up as GPIO13 falling-edge detect" "Disabled,Enabled"
bitfld.long 0x00 12. " GPIOFE12 ,Wake up as GPIO12 falling-edge detect" "Disabled,Enabled"
textline " "
bitfld.long 0x00 11. " GPIOFE11 ,Wake up as GPIO11 falling-edge detect" "Disabled,Enabled"
bitfld.long 0x00 10. " GPIOFE10 ,Wake up as GPIO10 falling-edge detect" "Disabled,Enabled"
textline " "
bitfld.long 0x00 9. " GPIOFE9 ,Wake up as GPIO9 falling-edge detect" "Disabled,Enabled"
bitfld.long 0x00 8. " GPIOFE8 ,Wake up as GPIO8 falling-edge detect" "Disabled,Enabled"
textline " "
bitfld.long 0x00 7. " GPIOFE7 ,Wake up as GPIO7 falling-edge detect" "Disabled,Enabled"
bitfld.long 0x00 6. " GPIOFE6 ,Wake up as GPIO6 falling-edge detect" "Disabled,Enabled"
textline " "
bitfld.long 0x00 5. " GPIOFE5 ,Wake up as GPIO5 falling-edge detect" "Disabled,Enabled"
bitfld.long 0x00 4. " GPIOFE4 ,Wake up as GPIO4 falling-edge detect" "Disabled,Enabled"
textline " "
bitfld.long 0x00 3. " GPIOFE3 ,Wake up as GPIO3 falling-edge detect" "Disabled,Enabled"
bitfld.long 0x00 2. " GPIOFE2 ,Wake up as GPIO2 falling-edge detect" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " GPIOFE1 ,Wake up as GPIO1 falling-edge detect" "Disabled,Enabled"
bitfld.long 0x00 0. " GPIOFE0 ,Wake up as GPIO0 falling-edge detect" "Disabled,Enabled"
group.long 0x18++0x3
line.long 0x00 "PEDSR,Power Manager Edge Detect Status Register"
eventfld.long 0x00 15. " GPIOED15 ,Wake up as GPIO15" "Not detected,Detected"
eventfld.long 0x00 14. " GPIOED14 ,Wake up as GPIO14" "Not detected,Detected"
textline " "
eventfld.long 0x00 13. " GPIOED13 ,Wake up as GPIO13" "Not detected,Detected"
eventfld.long 0x00 12. " GPIOED12 ,Wake up as GPIO12" "Not detected,Detected"
textline " "
eventfld.long 0x00 11. " GPIOED11 ,Wake up as GPIO11" "Not detected,Detected"
eventfld.long 0x00 10. " GPIOED10 ,Wake up as GPIO10" "Not detected,Detected"
textline " "
eventfld.long 0x00 9. " GPIOED9 ,Wake up as GPIO9" "Not detected,Detected"
eventfld.long 0x00 8. " GPIOED8 ,Wake up as GPIO8" "Not detected,Detected"
textline " "
eventfld.long 0x00 7. " GPIOED7 ,Wake up as GPIO7" "Not detected,Detected"
eventfld.long 0x00 6. " GPIOED6 ,Wake up as GPIO6" "Not detected,Detected"
textline " "
eventfld.long 0x00 5. " GPIOED5 ,Wake up as GPIO5" "Not detected,Detected"
eventfld.long 0x00 4. " GPIOED4 ,Wake up as GPIO4" "Not detected,Detected"
textline " "
eventfld.long 0x00 3. " GPIOED3 ,Wake up as GPIO3" "Not detected,Detected"
eventfld.long 0x00 2. " GPIOED2 ,Wake up as GPIO2" "Not detected,Detected"
textline " "
eventfld.long 0x00 1. " GPIOED1 ,Wake up as GPIO1" "Not detected,Detected"
eventfld.long 0x00 0. " GPIOED0 ,Wake up as GPIO0" "Not detected,Detected"
group.long 0x20++0xb
line.long 0x0 "PSSR,Power Manager Status Register"
bitfld.long 0x0 19. " PwrLowSts ,Power low pin status" "High,Low"
eventfld.long 0x0 18. " IntPwrLow ,Interrupt status of power low detection" "No interrupt,Interrupt"
textline " "
eventfld.long 0x0 17. " IntFCS ,Interrupt status of completing frequency change" "No interrupt,Interrupt"
eventfld.long 0x0 16. " IntTurbo ,Interrupt status for completing turbo mode" "No interrupt,Interrupt"
textline " "
eventfld.long 0x0 10. " SMR ,Wake up from sleep mode" "Not occurred,Occurred"
eventfld.long 0x0 9. " WDT ,Reboot by watchdog reset" "Not occurred,Occurred"
textline " "
eventfld.long 0x0 8. " HWR ,Reboot by hardware reset" "Not occurred,Occurred"
eventfld.long 0x0 2. " RDH ,Read disable hold" "Configured,Disabled"
textline " "
eventfld.long 0x0 1. " PH ,GPIO[15:0] pins set" "Configured,Sleep mode"
eventfld.long 0x0 0. " CKEHLOW ,SDRAM clock enabled" "By SDRAM controller,Low state"
line.long 0x4 "PGSR,Power Manager GPIO Sleep State Register"
bitfld.long 0x4 16. " SS16 ,Output value of GPIO[15:0]" "Auto latch,Use SS[15:0]"
bitfld.long 0x4 15. " SS15 ,Pin status during sleep mode" "Driven low,Driven high"
textline " "
bitfld.long 0x4 14. " SS14 ,Pin status during sleep mode" "Driven low,Driven high"
bitfld.long 0x4 13. " SS13 ,Pin status during sleep mode" "Driven low,Driven high"
textline " "
bitfld.long 0x4 12. " SS12 ,Pin status during sleep mode" "Driven low,Driven high"
bitfld.long 0x4 11. " SS11 ,Pin status during sleep mode" "Driven low,Driven high"
textline " "
bitfld.long 0x4 10. " SS10 ,Pin status during sleep mode" "Driven low,Driven high"
bitfld.long 0x4 9. " SS9 ,Pin status during sleep mode" "Driven low,Driven high"
textline " "
bitfld.long 0x4 8. " SS8 ,Pin status during sleep mode" "Driven low,Driven high"
bitfld.long 0x4 7. " SS7 ,Pin status during sleep mode" "Driven low,Driven high"
textline " "
bitfld.long 0x4 6. " SS6 ,Pin status during sleep mode" "Driven low,Driven high"
bitfld.long 0x4 5. " SS5 ,Pin status during sleep mode" "Driven low,Driven high"
textline " "
bitfld.long 0x4 4. " SS4 ,Pin status during sleep mode" "Driven low,Driven high"
bitfld.long 0x4 3. " SS3 ,Pin status during sleep mode" "Driven low,Driven high"
textline " "
bitfld.long 0x4 2. " SS2 ,Pin status during sleep mode" "Driven low,Driven high"
bitfld.long 0x4 1. " SS1 ,Pin status during sleep mode" "Driven low,Driven high"
textline " "
bitfld.long 0x4 0. " SS0 ,Pin status during sleep mode" "Driven low,Driven high"
line.long 0x8 "MFPSR,Multi-Function Port Setting Register"
bitfld.long 0x8 28.--31. " dbg_sel ,Dbg group number selection" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Mpca_debug14,Mpca_debug15"
bitfld.long 0x8 3. " AC97PinSel ,X_I2Ssclkout or X_ac97_resetn pin multiplexer and the source of the main clock selection" "I2S selected,AC97 selected"
textline " "
bitfld.long 0x8 1. " dbgbysoft ,Debug group selection" "T_mpca_in[93:90],MFPSR[31:28]"
textline " "
bitfld.long 0x8 0. " Debug_enable ,Debug mode" "Normal,Sets pad and mpca"
group.long 0x2c++0xf
line.long 0x0 "MISC,Misc"
bitfld.long 0x0 28.--31. " PWMCLKDIV ,PWM clock generate" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x0 24.--27. " I2SCLKDIV ,I2S main clock" "2.048 MHz,2.8224 MHz,4.096 MHz,5.6448 MHz,8.192 MHz,11.2896 MHz,12.288 MHz,16.384 MHz,24.576 MHz,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
textline " "
bitfld.long 0x0 23. " ADCCLKSEL ,ADC main clock selection" "OSCH/5,OSCH/6"
hexmask.long.word 0x0 8.--22. 1. " PDCNT ,Power down counter"
line.long 0x4 "PDLLCR0,PLL/DLL Control Register 0"
bitfld.long 0x4 25. " DLL2DIS ,DLL2 status" "Enabled,Disabled"
bitfld.long 0x4 20. " DLLFRANG ,DLL output frequency range" "20 MHz - 100 MHz,100 MHz - 300 MHz"
textline " "
bitfld.long 0x4 19. " DLLSTSEL ,DLL stability selection" "Wait 1.22ms,Wait for signal"
bitfld.long 0x4 18. " DLLSTABLE ,DLL lock-in time stability" "Not stable,Stable"
textline " "
bitfld.long 0x4 17. " DLLDIS ,DLL disable" "Enabled,Disabled"
bitfld.long 0x4 15.--16. " PLL1FRANG ,PLL1 output frequency range" "20 MHz - 50 MHz,50 MHz - 90 MHz,90 MHz - 150 MHz,150 MHz - 300 MHz"
textline " "
hexmask.long.byte 0x4 9.--14. 1. " PLL1MS ,M value of embedded PLL1 to control the PLL1 frequency output"
hexmask.long.byte 0x4 3.--8. 1. " PLL1N ,N value of embedded PLL1 to control the PLL1 frequency output"
textline " "
bitfld.long 0x4 1. " PLL1STABLE ,Lock-in time stable signal" "Not stable,Stable"
bitfld.long 0x4 0. " PLL1DIS ,PLL1 disable" "Enabled,Disabled"
line.long 0x8 "PDLLCR1,PLL/DLL Control Register 1"
bitfld.long 0x8 28.--29. " PLL2FRANG ,PLL2 output frequency range" "20 MHz - 50 MHz,50 MHz - 90 MHz,90 MHz - 150 MHz,150 MHz - 300 MHz"
hexmask.long.byte 0x8 20.--25. 1. " PLL2MS ,M value of embedded PLL2 to control the PLL2 frequency output"
textline " "
hexmask.long.byte 0x8 12.--17. 1. " PLL2NS ,N value of embedded PLL2 to control the PLL2 frequency output"
bitfld.long 0x8 9. " PLL2STABLE ,PLL2 stable" "Not stable,Stable"
textline " "
bitfld.long 0x8 8. " PLL2DIS ,PLL2 disable" "Enabled,Disabled"
bitfld.long 0x8 1. " PLL3STABLE ,PLL3 stable" "Not stable,Stable"
textline " "
bitfld.long 0x8 0. " PLL3DIS ,PLL3 disable" "Enabled,Disabled"
line.long 0xc "AHBMCLKOFF,AHB Module Clock Off Control Register"
bitfld.long 0x0C 23. " MPCAAHB ,Turns off the CLKDIV clock" "No effect,Turned off"
bitfld.long 0x0C 22. " MPCAAHB ,Turns off the AHB bridge clock" "No effect,Turned off"
textline " "
bitfld.long 0x0C 21. " MPCAAHB ,Turns off the Register file clock" "No effect,Turned off"
bitfld.long 0x0C 19. " FOTGOFF ,Turns off the clock of USB OTG 2.0" "No effect,Turned off"
textline " "
bitfld.long 0x0C 18. " MPCAAHB ,Turns off the clock of the ISRAM" "No effect,Turned off"
bitfld.long 0x0C 16. " MPCAAHB ,Turns off the PCI clock" "No effect,Turned off"
textline " "
bitfld.long 0x0C 14. " USBDOFF ,Turns off the clock of the USB 2.0 device controller" "No effect,Turned off"
bitfld.long 0x0C 12. " MAC1OFF ,Turns off the clock of the Ethernet MAC controller" "No effect,Turned off"
textline " "
bitfld.long 0x0C 8. " AESOFF ,Turns off the clock of AES" "No effect,Turned off"
bitfld.long 0x0C 7. " DMAOFF ,Turns off the clock of the DMA controller" "No effect,Turned off"
textline " "
bitfld.long 0x0C 5. " SDRAMOFF ,Turns off the clock of the SDRAM controller" "No effect,Turned off"
bitfld.long 0x0C 3. " SMCOFF ,Turns off the clock of the SRAM controller" "No effect,Turned off"
textline " "
bitfld.long 0x0C 1. " APBBRGOFF ,Turns off the clock of the AHB to APB Bridge module" "No effect,Turned off"
group.long 0x3c++0xf
line.long 0x0 "APBMCLKOFF,APB Module Clock Off Control Register"
bitfld.long 0x00 25. " I2C2OFF ,Turns off the clock of the I2C(2)" "No effect,Turned off"
bitfld.long 0x00 23. " GPIOOFF ,Turns off the clock of the GPIO" "No effect,Turned off"
textline " "
bitfld.long 0x00 22. " I2C1OFF ,Turns off the clock of the I2C(1)" "No effect,Turned off"
bitfld.long 0x00 21. " INTCOFF ,Turns off the clock of the internal controller" "No effect,Turned off"
textline " "
bitfld.long 0x00 19. " RTCOFF ,Turns off the clock of the RTC module" "No effect,Turned off"
bitfld.long 0x00 18. " WDTOFF ,Turns off the clock of the WDT module" "No effect,Turned off"
textline " "
bitfld.long 0x00 17. " TIMEROFF ,Turns off the clock of the timer" "No effect,Turned off"
bitfld.long 0x00 13. " I2C5OFF ,Turns off the clock of the I2C(5)" "No effect,Turned off"
textline " "
bitfld.long 0x00 12. " I2C4OFF ,Turns off the clock of the I2C(4)" "No effect,Turned off"
bitfld.long 0x00 11. " I2C3OFF ,Turns off the clock of the I2C(3)" "No effect,Turned off"
textline " "
bitfld.long 0x00 8. " UART3OFF ,Turns off the clock of the UART controller III" "No effect,Turned off"
bitfld.long 0x00 7. " ADCOFF ,Turns off the clock of the ADC controller" "No effect,Turned off"
textline " "
bitfld.long 0x00 6. " SSPOFF ,Turns off the clock of the SSP controller" "No effect,Turned off"
bitfld.long 0x00 3. " UART1OFF ,Turns off the clock of the UART controller I" "No effect,Turned off"
line.long 0x4 "DCSRCR0,Driving Capability and Slew Rate Control Register 0"
bitfld.long 0x4 28.--31. " EBICTRL_DCSR ,Fine-tune the output driving capability of the X_MEMADDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x4 24.--27. " EBIDATA_DCSR ,Fine-tune the output driving capability of the X_MEMDATA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x4 20.--23. " SDRAMCS_DCSR ,Fine-tune the output driving capability of the SDRAMCs chip select pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x4 16.--19. " SDRAMCTL_DCSR ,Fine-tune the output driving capability of the SDRAMCs control pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x4 12.--15. " CKE_DCSR ,Fine-tune the output driving capability of the SDRAMCs CKE pin" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x4 8.--11. " DQM_DCSR ,Fine-tune the output driving capability of the SDRAMCs DQM pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x4 4.--7. " SDCLK_DCSR ,Fine-tune the output driving capability of the SDRAMCs clock output pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x4 3. " SRAM_DCSR3 ,Slew rate" "Fast,Slow"
textline " "
bitfld.long 0x4 1.--2. " SRAM_DCSR[2:1] ,Output driving capability" "4mA,8mA,12mA,16mA"
line.long 0x8 "DCSRCR1,Driving Capability and Slew Rate Control Register 1"
bitfld.long 0x8 19. " I2C_DCSR3 ,Slew rate" "Fast,Slow"
bitfld.long 0x8 17.--18. " I2C_DSCR[2:1] ,Output driving capability" "4mA,8mA,12mA,16mA"
textline " "
bitfld.long 0x8 15. " MAC_DCSR3 ,Slew rate" "Fast,Slow"
bitfld.long 0x8 13.--14. " MAC_DCSR[2:1] ,Output driving capability" "4mA,8mA,12mA,16mA"
textline " "
bitfld.long 0x8 7. " GPIO_DCSR3 ,Slew rate" "Fast,Slow"
bitfld.long 0x8 5.--6. " GPIO_DCSR[2:1] ,Output driving capability" "4mA,8mA,12mA,16mA"
line.long 0xc "DCSRCR2,Driving Capability and Slew Rate Control Register 2"
bitfld.long 0xc 23. " SSP_DCSR3 ,Slew rate" "Fast,Slow"
bitfld.long 0xc 21.--22. " SSP_DCSR[2:1] ,Output driving capability" "4mA,8mA,12mA,16mA"
textline " "
bitfld.long 0xc 19. " PMU_DCSR3 ,Slew rate" "Fast,Slow"
bitfld.long 0xc 17.--18. " PMU_DCSR[2:1] ,Output driving capability" "4mA,8mA,12mA,16mA"
textline " "
bitfld.long 0xc 15. " UART1_DCSR3 ,Slew rate" "Fast,Slow"
bitfld.long 0xc 13.--14. " UART1_DCSR[2:1] ,Output driving capability" "4mA,8mA,12mA,16mA"
textline " "
bitfld.long 0xc 3. " UART3_DCSR3 ,Slew rate" "Fast,Slow"
bitfld.long 0xc 1.--2. " UART3_DCSR[2:1] ,Output driving capability" "4mA,8mA,12mA,16mA"
group.long 0x4c++0x3
line.long 0x00 "SDRAMHTC,SDRAM Signal Hold Time Control"
bitfld.long 0x00 28.--31. " DLLDELSEL ,Delayed value of the DLL clock of X_HCLKOUT" "Fast 7 buffer,Fast 6 buffer,Fast 5 buffer,Fast 4 buffer,Fast 3 buffer,Fast 2 buffer,Fast 1 buffer,Default,Slow 1 buffer,Slow 2 buffer,Slow 3 buffer,Slow 4 buffer,Slow 5 buffer,Slow 6 buffer,Slow 7 buffer,Slow 8 buffer"
bitfld.long 0x00 24.--27. " DLL2DELSEL ,Delayed value of the DLL clock of X_HCLKOUT" "Fast 7 buffer,Fast 6 buffer,Fast 5 buffer,Fast 4 buffer,Fast 3 buffer,Fast 2 buffer,Fast 1 buffer,Default,Slow 1 buffer,Slow 2 buffer,Slow 3 buffer,Slow 4 buffer,Slow 5 buffer,Slow 6 buffer,Slow 7 buffer,Slow 8 buffer"
textline " "
bitfld.long 0x00 18. " EBICTRL_DCSR[4] ,Slew rate of the X_MEMADDR" "Fast,Slow"
bitfld.long 0x00 17. " EBIDATA_DCSR[4] ,Slew rate of the X_MEMDATA" "Fast,Slow"
textline " "
bitfld.long 0x00 16. " SDRAMCS_DCSR[4] ,Slew rate of the SDRAM chip select signal pins" "Fast,Slow"
bitfld.long 0x00 15. " SDRAMCTL_DCSR[4] ,Slew rate of the SDRAM control pins" "Fast,Slow"
textline " "
bitfld.long 0x00 14. " CKE_DCSR[4] ,Slew rate of the SDRAM CKE pin" "Fast,Slow"
bitfld.long 0x00 13. " DQM_DCSR[4] ,Slew rate of the SDRAM DQM pins" "Fast,Slow"
textline " "
bitfld.long 0x00 12. " SDCLK_DCSR[4] ,Slew rate of the SDRAM clock pins" "Fast,Slow"
group.long 0x50++0x3
line.long 0x00 "PSPR0,Power Manager Scratch Pad Register 0"
hexmask.long 0x00 0.--31. 1. " PSPR ,Scratch pad register"
group.long 0x54++0x3
line.long 0x00 "PSPR1,Power Manager Scratch Pad Register 1"
hexmask.long 0x00 0.--31. 1. " PSPR ,Scratch pad register"
group.long 0x58++0x3
line.long 0x00 "PSPR2,Power Manager Scratch Pad Register 2"
hexmask.long 0x00 0.--31. 1. " PSPR ,Scratch pad register"
group.long 0x5C++0x3
line.long 0x00 "PSPR3,Power Manager Scratch Pad Register 3"
hexmask.long 0x00 0.--31. 1. " PSPR ,Scratch pad register"
group.long 0x60++0x3
line.long 0x00 "PSPR4,Power Manager Scratch Pad Register 4"
hexmask.long 0x00 0.--31. 1. " PSPR ,Scratch pad register"
group.long 0x64++0x3
line.long 0x00 "PSPR5,Power Manager Scratch Pad Register 5"
hexmask.long 0x00 0.--31. 1. " PSPR ,Scratch pad register"
group.long 0x68++0x3
line.long 0x00 "PSPR6,Power Manager Scratch Pad Register 6"
hexmask.long 0x00 0.--31. 1. " PSPR ,Scratch pad register"
group.long 0x6C++0x3
line.long 0x00 "PSPR7,Power Manager Scratch Pad Register 7"
hexmask.long 0x00 0.--31. 1. " PSPR ,Scratch pad register"
group.long 0x70++0x3
line.long 0x00 "PSPR8,Power Manager Scratch Pad Register 8"
hexmask.long 0x00 0.--31. 1. " PSPR ,Scratch pad register"
group.long 0x74++0x3
line.long 0x00 "PSPR9,Power Manager Scratch Pad Register 9"
hexmask.long 0x00 0.--31. 1. " PSPR ,Scratch pad register"
group.long 0x78++0x3
line.long 0x00 "PSPR10,Power Manager Scratch Pad Register 10"
hexmask.long 0x00 0.--31. 1. " PSPR ,Scratch pad register"
group.long 0x7C++0x3
line.long 0x00 "PSPR11,Power Manager Scratch Pad Register 11"
hexmask.long 0x00 0.--31. 1. " PSPR ,Scratch pad register"
group.long 0x80++0x3
line.long 0x00 "PSPR12,Power Manager Scratch Pad Register 12"
hexmask.long 0x00 0.--31. 1. " PSPR ,Scratch pad register"
group.long 0x84++0x3
line.long 0x00 "PSPR13,Power Manager Scratch Pad Register 13"
hexmask.long 0x00 0.--31. 1. " PSPR ,Scratch pad register"
group.long 0x88++0x3
line.long 0x00 "PSPR14,Power Manager Scratch Pad Register 14"
hexmask.long 0x00 0.--31. 1. " PSPR ,Scratch pad register"
group.long 0x8C++0x3
line.long 0x00 "PSPR15,Power Manager Scratch Pad Register 15"
hexmask.long 0x00 0.--31. 1. " PSPR ,Scratch pad register"
group.long 0xA8++0x3
line.long 0x00 "RTCDMA0,Routing Control Register for DMA transfer 0"
bitfld.long 0x00 3. " DMAC ,DMAC selection" "APB bridge,AHB"
bitfld.long 0x00 0.--2. " Channel ,Channel of the AHB DMA" "0,1,2,3,4,5,6,7"
group.long 0xAC++0x3
line.long 0x00 "RTCDMA1,Routing Control Register for DMA transfer 1"
bitfld.long 0x00 3. " DMAC ,DMAC selection" "APB bridge,AHB"
bitfld.long 0x00 0.--2. " Channel ,Channel of the AHB DMA" "0,1,2,3,4,5,6,7"
group.long 0xB0++0x3
line.long 0x00 "RTCDMA2,Routing Control Register for DMA transfer 2"
bitfld.long 0x00 3. " DMAC ,DMAC selection" "APB bridge,AHB"
bitfld.long 0x00 0.--2. " Channel ,Channel of the AHB DMA" "0,1,2,3,4,5,6,7"
group.long 0xB4++0x3
line.long 0x00 "RTCDMA3,Routing Control Register for DMA transfer 3"
bitfld.long 0x00 3. " DMAC ,DMAC selection" "APB bridge,AHB"
bitfld.long 0x00 0.--2. " Channel ,Channel of the AHB DMA" "0,1,2,3,4,5,6,7"
group.long 0xB8++0x3
line.long 0x00 "RTCDMA4,Routing Control Register for DMA transfer 4"
bitfld.long 0x00 3. " DMAC ,DMAC selection" "APB bridge,AHB"
bitfld.long 0x00 0.--2. " Channel ,Channel of the AHB DMA" "0,1,2,3,4,5,6,7"
group.long 0xBC++0x3
line.long 0x00 "RTCDMA5,Routing Control Register for DMA transfer 5"
bitfld.long 0x00 3. " DMAC ,DMAC selection" "APB bridge,AHB"
bitfld.long 0x00 0.--2. " Channel ,Channel of the AHB DMA" "0,1,2,3,4,5,6,7"
group.long 0xC0++0x3
line.long 0x00 "RTCDMA6,Routing Control Register for DMA transfer 6"
bitfld.long 0x00 3. " DMAC ,DMAC selection" "APB bridge,AHB"
bitfld.long 0x00 0.--2. " Channel ,Channel of the AHB DMA" "0,1,2,3,4,5,6,7"
group.long 0xC4++0x3
line.long 0x00 "RTCDMA7,Routing Control Register for DMA transfer 7"
bitfld.long 0x00 3. " DMAC ,DMAC selection" "APB bridge,AHB"
bitfld.long 0x00 0.--2. " Channel ,Channel of the AHB DMA" "0,1,2,3,4,5,6,7"
group.long 0xC8++0x3
line.long 0x00 "RTCDMA8,Routing Control Register for DMA transfer 8"
bitfld.long 0x00 3. " DMAC ,DMAC selection" "APB bridge,AHB"
bitfld.long 0x00 0.--2. " Channel ,Channel of the AHB DMA" "0,1,2,3,4,5,6,7"
group.long 0xCC++0x3
line.long 0x00 "RTCDMA9,Routing Control Register for DMA transfer 9"
bitfld.long 0x00 3. " DMAC ,DMAC selection" "APB bridge,AHB"
bitfld.long 0x00 0.--2. " Channel ,Channel of the AHB DMA" "0,1,2,3,4,5,6,7"
rgroup.long 0x90++0x7
line.long 0x00 "ABHDMACCS1,AHB DMA Controller Channel Status I"
bitfld.long 0x00 25.--29. " CHANNEL7 ,Device DMA occupied channel 7" "Not occupied,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
bitfld.long 0x00 20.--24. " CHANNEL6 ,Device DMA occupied channel 6" "Not occupied,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
textline " "
bitfld.long 0x00 15.--19. " CHANNEL5 ,Device DMA occupied channel 5" "Not occupied,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
bitfld.long 0x00 10.--14. " CHANNEL4 ,Device DMA occupied channel 4" "Not occupied,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
textline " "
bitfld.long 0x00 5.--9. " CHANNEL3 ,Device DMA occupied channel 3" "Not occupied,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
bitfld.long 0x00 0.--4. " CHANNEL2 ,Device DMA occupied channel 2" "Not occupied,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
line.long 0x04 "ABHDMACCS2,AHB DMA Controller Channel Status II"
bitfld.long 0x04 5.--9. " CHANNEL1 ,Device DMA occupied channel 1" "Not occupied,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
bitfld.long 0x04 0.--4. " CHANNEL0 ,Device DMA occupied channel 0" "Not occupied,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
hgroup.long 0xcc++0x3
hide.long 0x00 "USBD_REQ,The USBD REQ/ACK Connection Configuration"
group.long 0x100++0x7
line.long 0x00 "MFPSR0,Multiplexed Port Control Register 0"
bitfld.long 0x00 31. " MFPSR0[31] ,Function select 31" "Normal,GPIO[31]"
bitfld.long 0x00 30. " MFPSR0[30] ,Function select 30" "Normal,GPIO[30]"
textline " "
bitfld.long 0x00 29. " MFPSR0[29] ,Function select 29" "Normal,GPIO[29]"
bitfld.long 0x00 28. " MFPSR0[28] ,Function select 28" "Normal,GPIO[28]"
textline " "
bitfld.long 0x00 27. " MFPSR0[27] ,Function select 27" "Normal,GPIO[27]"
bitfld.long 0x00 26. " MFPSR0[26] ,Function select 26" "Normal,GPIO[26]"
textline " "
bitfld.long 0x00 25. " MFPSR0[25] ,Function select 25" "Normal,GPIO[25]"
bitfld.long 0x00 24. " MFPSR0[24] ,Function select 24" "Normal,GPIO[24]"
textline " "
bitfld.long 0x00 23. " MFPSR0[23] ,Function select 23" "Normal,GPIO[23]"
bitfld.long 0x00 22. " MFPSR0[22] ,Function select 22" "Normal,GPIO[22]"
textline " "
bitfld.long 0x00 21. " MFPSR0[21] ,Function select 21" "Normal,GPIO[21]"
bitfld.long 0x00 20. " MFPSR0[20] ,Function select 20" "Normal,GPIO[20]"
textline " "
bitfld.long 0x00 19. " MFPSR0[19] ,Function select 19" "Normal,GPIO[19]"
bitfld.long 0x00 18. " MFPSR0[18] ,Function select 18" "Normal,GPIO[18]"
textline " "
bitfld.long 0x00 17. " MFPSR0[17] ,Function select 17" "Normal,GPIO[17]"
bitfld.long 0x00 16. " MFPSR0[16] ,Function select 16" "Normal,GPIO[16]"
line.long 0x04 "MFPSR1,Multiplexed Port Control Register 1"
bitfld.long 0x04 30. " MFPSR1[30] ,Function select 30" "X_EXT_INT3,GPIO2[30]"
bitfld.long 0x04 29. " MFPSR1[29] ,Function select 29" "X_EXT_INT2,GPIO2[29]"
textline " "
bitfld.long 0x04 28. " MFPSR1[28] ,Function select 28" "X_EXT_INT1,GPIO2[28]"
bitfld.long 0x04 27. " MFPSR1[27] ,Function select 27" "X_EXT_INT0,GPIO2[27]"
textline " "
bitfld.long 0x04 26. " MFPSR1[26] ,Function select 26" "X_I2C5_SDA,GPIO2[26]"
bitfld.long 0x04 25. " MFPSR1[25] ,Function select 25" "X_I2C5_SCL,GPIO2[25]"
textline " "
bitfld.long 0x04 24. " MFPSR1[24] ,Function select 24" "X_I2C4_SDA,GPIO2[24]"
bitfld.long 0x04 23. " MFPSR1[23] ,Function select 23" "X_I2C4_SCL,GPIO2[23]"
textline " "
bitfld.long 0x04 22. " MFPSR1[22] ,Function select 22" "X_I2C3_SDA,GPIO2[22]"
bitfld.long 0x04 21. " MFPSR1[21] ,Function select 21" "X_I2C3_SCL,GPIO2[21]"
textline " "
bitfld.long 0x04 20. " MFPSR1[20] ,Function select 20" "X_I2C2_SDA,GPIO2[20]"
bitfld.long 0x04 19. " MFPSR1[19] ,Function select 19" "X_I2C2_SCL,GPIO2[19]"
textline " "
bitfld.long 0x04 18. " MFPSR1[18] ,Function select 18" "X_I2C1_SDA,GPIO2[18]"
bitfld.long 0x04 17. " MFPSR1[17] ,Function select 17" "X_I2C1_SCL,GPIO2[17]"
textline " "
bitfld.long 0x04 16. " MFPSR1[16] ,Function select 16" "X_I2S_AC97CLK,GPIO2[16]"
bitfld.long 0x04 15. " MFPSR1[15] ,Function select 15" "X_AC97_RESETn,GPIO2[15]"
textline " "
bitfld.long 0x04 14. " MFPSR1[14] ,Function select 14" "X_I2S_FS,GPIO2[14]"
bitfld.long 0x04 13. " MFPSR1[13] ,Function select 13" "X_I2S_SCLK,GPIO2[13]"
textline " "
bitfld.long 0x04 12. " MFPSR1[12] ,Function select 12" "X_I2S_TXD,GPIO2[12]"
bitfld.long 0x04 11. " MFPSR1[11] ,Function select 11" "X_I2S_RXD,GPIO2[11]"
textline " "
bitfld.long 0x04 10. " MFPSR1[10] ,Function select 10" "X_UART3_RTSn,GPIO2[10]"
bitfld.long 0x04 9. " MFPSR1[9] ,Function select 9" "X_UART3_SOUT,GPIO2[9]"
textline " "
bitfld.long 0x04 8. " MFPSR1[8] ,Function select 8" "X_UART3_SIN,GPIO2[8]"
bitfld.long 0x04 7. " MFPSR1[7] ,Function select 7" "X_UART1_SOUT,GPIO2[7]"
textline " "
bitfld.long 0x04 6. " MFPSR1[6] ,Function select 6" "X_UART1_SIN,GPIO2[6]"
bitfld.long 0x04 5. " MFPSR1[5] ,Function select 5" "X_UART1_RTSn,GPIO2[5]"
textline " "
bitfld.long 0x04 4. " MFPSR1[4] ,Function select 4" "X_UART1_DTRn,GPIO2[4]"
bitfld.long 0x04 3. " MFPSR1[3] ,Function select 3" "X_UART1_RIn,GPIO2[3]"
textline " "
bitfld.long 0x04 2. " MFPSR1[2] ,Function select 2" "X_UART1_DSRn,GPIO2[2]"
bitfld.long 0x04 1. " MFPSR1[1] ,Function select 1" "X_UART1_DCDn,GPIO2[1]"
textline " "
bitfld.long 0x04 0. " MFPSR1[0] ,Function select 0" "X_UART1_CTSn,GPIO2[0]"
group.long 0x114++0xb
line.long 0x00 "MPCAIODCSR1,MPCA IO Driving Capability and Slew Rate Control Register1"
bitfld.long 0x0 30. " mpca_dcsr7[2] ,Slew rate" "Fast,Slow"
bitfld.long 0x0 28.--29. " mpca_dcsr7[1:0] ,Output driving capability" "4mA,8mA,12mA,16mA"
textline " "
bitfld.long 0x0 26. " mpca_dcsr6[2] ,Slew rate" "Fast,Slow"
bitfld.long 0x0 24.--25. " mpca_dcsr6[1:0] ,Output driving capability" "4mA,8mA,12mA,16mA"
textline " "
bitfld.long 0x0 22. " mpca_dcsr5[2] ,Slew rate" "Fast,Slow"
bitfld.long 0x0 20.--21. " mpca_dcsr5[1:0] ,Output driving capability" "4mA,8mA,12mA,16mA"
textline " "
bitfld.long 0x0 18. " mpca_dcsr4[2] ,Slew rate" "Fast,Slow"
bitfld.long 0x0 16.--17. " mpca_dcsr4[1:0] ,Output driving capability" "4mA,8mA,12mA,16mA"
textline " "
bitfld.long 0x0 14. " mpca_dcsr3[2] ,Slew rate" "Fast,Slow"
bitfld.long 0x0 12.--13. " mpca_dcsr3[1:0] ,Output driving capability" "4mA,8mA,12mA,16mA"
textline " "
bitfld.long 0x0 10. " mpca_dcsr2[2] ,Slew rate" "Fast,Slow"
bitfld.long 0x0 8.--9. " mpca_dcsr2[1:0] ,Output driving capability" "4mA,8mA,12mA,16mA"
textline " "
bitfld.long 0x0 6. " mpca_dcsr1[2] ,Slew rate" "Fast,Slow"
bitfld.long 0x0 4.--5. " mpca_dcsr1[1:0] ,Output driving capability" "4mA,8mA,12mA,16mA"
textline " "
bitfld.long 0x0 2. " mpca_dcsr0[2] ,Slew rate" "Fast,Slow"
bitfld.long 0x0 0.--1. " mpca_dcsr0[1:0] ,Output driving capability" "4mA,8mA,12mA,16mA"
line.long 0x04 "MPCAIODCSR2,MPCA IO Driving Capability and Slew Rate Control Register2"
bitfld.long 0x4 28. " mpca_sdram5[3] ,Slew rate" "Fast,Slow"
bitfld.long 0x4 25.--27. " mpca_sdram5[2:0] ,Output driving capability" "2mA,4mA,6mA,8mA,10mA,12mA,14mA,16mA"
textline " "
bitfld.long 0x4 23. " mpca_sdram4[3] ,Slew rate" "Fast,Slow"
bitfld.long 0x4 20.--22. " mpca_sdram4[2:0] ,Output driving capability" "2mA,4mA,6mA,8mA,10mA,12mA,14mA,16mA"
textline " "
bitfld.long 0x4 18. " mpca_sdram3[3] ,Slew rate" "Fast,Slow"
bitfld.long 0x4 15.--17. " mpca_sdram3[2:0] ,Output driving capability" "2mA,4mA,6mA,8mA,10mA,12mA,14mA,16mA"
textline " "
bitfld.long 0x4 13. " mpca_sdram2[3] ,Slew rate" "Fast,Slow"
bitfld.long 0x4 10.--12. " mpca_sdram2[2:0] ,Output driving capability" "2mA,4mA,6mA,8mA,10mA,12mA,14mA,16mA"
textline " "
bitfld.long 0x4 8. " mpca_sdram1[3] ,Slew rate" "Fast,Slow"
bitfld.long 0x4 5.--7. " mpca_sdram1[2:0] ,Output driving capability" "2mA,4mA,6mA,8mA,10mA,12mA,14mA,16mA"
textline " "
bitfld.long 0x4 3. " mpca_sdram0[3] ,Slew rate" "Fast,Slow"
bitfld.long 0x4 0.--2. " mpca_sdram0[2:0] ,Output driving capability" "2mA,4mA,6mA,8mA,10mA,12mA,14mA,16mA"
line.long 0x8 "MPCAIODCSR3,MPCA IO Driving Capability and Slew Rate Control Register3"
bitfld.long 0x8 8.--9. " mpca_pci0 ,Slew rate and driving capability of the MPCA output pins" "PCI 33 with fast slew,PCI 33,PCI 66,PCI 33 with high drive"
group.long 0x130++0x3
line.long 0x0 "USBD/OTG,USBD/OTG PHY Controller"
bitfld.long 0x00 30. " USBD_OS_COUTEN ,CLKOSCO clock output enable signal" "Inactive,Active"
bitfld.long 0x00 29. " USBD_XT_LSEL ,USBD XSCI input frequency selection" "12 MHz,30 MHz"
textline " "
bitfld.long 0x00 28. " USBD_PLL_ALIV ,USBD clock source enable signal" "Inactive,Active"
bitfld.long 0x00 27. " OTG_VDT_PD ,OTG VDT PD setting" "No power down,Power down"
textline " "
bitfld.long 0x00 26. " OTG_OSC_OUTEN ,OTG PHY CLKOSCO clock output enable signal" "Inactive,Active"
bitfld.long 0x00 25. " OTG_XTL_SEL ,OTG XSCI input frequency selection" "12 MHz,30 MHz"
textline " "
bitfld.long 0x00 24. " OTG_PLL_ALIV ,OTG Clock source enable signal" "Inactive,Active"
width 11.
tree.end
tree "AHB Controller"
base ad:0x90100000
width 12.
group.long 0x0++0x3
line.long 0x00 "AHBSSR[0],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[0] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[0] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x4++0x3
line.long 0x00 "AHBSSR[1],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[1] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[1] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x8++0x3
line.long 0x00 "AHBSSR[2],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[2] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[2] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0xC++0x3
line.long 0x00 "AHBSSR[3],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[3] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[3] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x10++0x3
line.long 0x00 "AHBSSR[4],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[4] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[4] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x14++0x3
line.long 0x00 "AHBSSR[5],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[5] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[5] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x18++0x3
line.long 0x00 "AHBSSR[6],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[6] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[6] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x1C++0x3
line.long 0x00 "AHBSSR[7],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[7] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[7] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x20++0x3
line.long 0x00 "AHBSSR[8],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[8] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[8] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x24++0x3
line.long 0x00 "AHBSSR[9],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[9] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[9] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x28++0x3
line.long 0x00 "AHBSSR[10],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[10] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[10] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x2C++0x3
line.long 0x00 "AHBSSR[11],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[11] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[11] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x30++0x3
line.long 0x00 "AHBSSR[12],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[12] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[12] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x34++0x3
line.long 0x00 "AHBSSR[13],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[13] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[13] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x38++0x3
line.long 0x00 "AHBSSR[14],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[14] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[14] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x3C++0x3
line.long 0x00 "AHBSSR[15],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[15] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[15] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x40++0x3
line.long 0x00 "AHBSSR[16],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[16] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[16] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x44++0x3
line.long 0x00 "AHBSSR[17],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[17] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[17] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x48++0x3
line.long 0x00 "AHBSSR[18],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[18] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[18] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x4C++0x3
line.long 0x00 "AHBSSR[19],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[19] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[19] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x50++0x3
line.long 0x00 "AHBSSR[20],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[20] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[20] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x54++0x3
line.long 0x00 "AHBSSR[21],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[21] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[21] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x58++0x3
line.long 0x00 "AHBSSR[22],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[22] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[22] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x5C++0x3
line.long 0x00 "AHBSSR[23],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[23] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[23] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x60++0x3
line.long 0x00 "AHBSSR[24],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[24] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[24] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x64++0x3
line.long 0x00 "AHBSSR[25],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[25] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[25] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x68++0x3
line.long 0x00 "AHBSSR[26],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[26] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[26] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x6C++0x3
line.long 0x00 "AHBSSR[27],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[27] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[27] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x70++0x3
line.long 0x00 "AHBSSR[28],AHB Slave Base/Size Register"
hexmask.long 0x00 20.--31. 0x100000 " BaseAddr[28] ,Base address [31:20]"
bitfld.long 0x00 16.--19. " SizeAddr[28] ,Size of address space [19:16]" "1M,2M,4M,8M,16M,32M,64M,128M,256M,512M,1G,2G,Reserved,Reserved,Reserved,Reserved"
group.long 0x80++0xb
line.long 0x00 "PCR,Priority Controller Register"
bitfld.long 0x00 9. " Plevel9 ,Level of master 9" "Lower,Higher"
bitfld.long 0x00 8. " Plevel8 ,Level of master 8" "Lower,Higher"
textline " "
bitfld.long 0x00 7. " Plevel7 ,Level of master 7" "Lower,Higher"
bitfld.long 0x00 6. " Plevel6 ,Level of master 6" "Lower,Higher"
textline " "
bitfld.long 0x00 5. " Plevel5 ,Level of master 5" "Lower,Higher"
bitfld.long 0x00 4. " Plevel4 ,Level of master 4" "Lower,Higher"
textline " "
bitfld.long 0x00 3. " Plevel3 ,Level of master 3" "Lower,Higher"
bitfld.long 0x00 2. " Plevel2 ,Level of master 2" "Lower,Higher"
textline " "
bitfld.long 0x00 1. " Plevel1 ,Level of master 1" "Lower,Higher"
line.long 0x04 "TCR,Transfer Control Register"
bitfld.long 0x04 1. " TransCtl ,Transfer interrupt" "Not always,Always"
line.long 0x08 "ICR,Interrupt Control Register"
bitfld.long 0x08 24. " IntrSts ,Interrupt status" "Not occurred,Occurred"
bitfld.long 0x08 20.--21. " Response ,Response status" "OK,Error,Retry,Split"
textline " "
bitfld.long 0x08 16. " IntsMask ,Interrupt mask" "Disabled,Enabled"
bitfld.long 0x08 0. " Remap ,Remap function" "No effect,AHB slaves interchanged"
width 11.
tree.end
tree "AHB-to-APB Bridge"
base ad:0x90500000
width 11.
group.long 0x4++0x3
line.long 0x00 "APBSSR1,APB Slave 1 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x8++0x3
line.long 0x00 "APBSSR2,APB Slave 2 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0xC++0x3
line.long 0x00 "APBSSR3,APB Slave 3 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x10++0x3
line.long 0x00 "APBSSR4,APB Slave 4 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x14++0x3
line.long 0x00 "APBSSR5,APB Slave 5 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x18++0x3
line.long 0x00 "APBSSR6,APB Slave 6 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x1C++0x3
line.long 0x00 "APBSSR7,APB Slave 7 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x20++0x3
line.long 0x00 "APBSSR8,APB Slave 8 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x24++0x3
line.long 0x00 "APBSSR9,APB Slave 9 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x28++0x3
line.long 0x00 "APBSSR10,APB Slave 10 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x2C++0x3
line.long 0x00 "APBSSR11,APB Slave 11 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x30++0x3
line.long 0x00 "APBSSR12,APB Slave 12 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x34++0x3
line.long 0x00 "APBSSR13,APB Slave 13 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x38++0x3
line.long 0x00 "APBSSR14,APB Slave 14 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x3C++0x3
line.long 0x00 "APBSSR15,APB Slave 15 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x40++0x3
line.long 0x00 "APBSSR16,APB Slave 16 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x44++0x3
line.long 0x00 "APBSSR17,APB Slave 17 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x48++0x3
line.long 0x00 "APBSSR18,APB Slave 18 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x4C++0x3
line.long 0x00 "APBSSR19,APB Slave 19 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x50++0x3
line.long 0x00 "APBSSR20,APB Slave 20 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x54++0x3
line.long 0x00 "APBSSR21,APB Slave 21 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x58++0x3
line.long 0x00 "APBSSR22,APB Slave 22 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x5C++0x3
line.long 0x00 "APBSSR23,APB Slave 23 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x60++0x3
line.long 0x00 "APBSSR24,APB Slave 24 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x64++0x3
line.long 0x00 "APBSSR25,APB Slave 25 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x68++0x3
line.long 0x00 "APBSSR26,APB Slave 26 Base/Size Register"
hexmask.long 0x00 20.--29. 0x100000 " Base ,Base address[29:20]"
bitfld.long 0x00 16.--19. " Size ,Size of address space" "1M,2M,4M,8M,16M,32M,64M,128M,256M,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
group.long 0x80++0xb "Channel A"
line.long 0x00 "SADMAA,Source Address of DMA Channel A"
line.long 0x04 "DESTAA,Destination Address of DMA Channel A"
line.long 0x08 "CycRDMAA,Cycles register of DMA Channel A"
hexmask.long 0x08 0.--23. 1. " Cyc ,DMA cycle"
if (((d.l(ad:(0x90500000+0x8C)))&0x8)==0x8)
group.long 0x8C++0x3
line.long 0x00 "ComRDMAA,Command register of DMA Channel A"
bitfld.long 0x00 20.--21. " DataWidth ,Data width of transfer" "Word,Half word,Byte,Reserved"
bitfld.long 0x00 19. " ReqSel[19] ,requested signal select of DMA hardware mode[19]" "Not requested,Requested"
textline " "
bitfld.long 0x00 18. " ReqSel[18] ,requested signal select of DMA hardware mode[18]" "Not requested,Requested"
bitfld.long 0x00 17. " ReqSel[17] ,requested signal select of DMA hardware mode[17]" "Not requested,Requested"
textline " "
bitfld.long 0x00 16. " ReqSel[16] ,requested signal select of DMA hardware mode[16]" "Not requested,Requested"
bitfld.long 0x00 12.--14. " DesAdrInc ,Destination address increment" "Not incremented,+4,+8,+16,Reserved,-1,-2,-4"
textline " "
bitfld.long 0x00 8.--10. " SrcAdr ,Source address increment" "Not incremented,+4,+8,+16,Reserved,-1,-2,-4"
bitfld.long 0x00 7. " DesAdrSel ,Destination address selection" "APB,AHB"
textline " "
bitfld.long 0x00 6. " SrcAdrSe ,Source address selection" "APB,AHB"
bitfld.long 0x00 5. " ErrIntEnb ,AHB slave error responde " "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " ErrIntSts ,Error response interrupt flag" "No interrupt,Interrupt"
bitfld.long 0x00 3. " BurMod ,Burst mode" "No burst,Burst"
textline " "
bitfld.long 0x00 2. " FinIntEnb ,Finished interrupt" "Disabled,Enabled"
bitfld.long 0x00 1. " FinIntSts ,Finishing interrupt flag" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " EnbDis ,DMA channel" "Disabled,Enabled"
else
group.long 0x8C++0x3
line.long 0x00 "ComRDMAA,Command register of DMA Channel A"
bitfld.long 0x00 20.--21. " DataWidth ,Data width of transfer" "Word,Half word,Byte,Reserved"
bitfld.long 0x00 19. " ReqSel[19] ,requested signal select of DMA hardware mode[19]" "Not requested,Requested"
textline " "
bitfld.long 0x00 18. " ReqSel[18] ,requested signal select of DMA hardware mode[18]" "Not requested,Requested"
bitfld.long 0x00 17. " ReqSel[17] ,requested signal select of DMA hardware mode[17]" "Not requested,Requested"
textline " "
bitfld.long 0x00 16. " ReqSel[16] ,requested signal select of DMA hardware mode[16]" "Not requested,Requested"
bitfld.long 0x00 12.--14. " DesAdrInc ,Destination address increment" "Not incremented,+1,+2,+4,Reserved,-1,-2,-4"
textline " "
bitfld.long 0x00 8.--10. " SrcAdr ,Source address increment" "Not incremented,+1,+2,+4,Reserved,-1,-2,-4"
bitfld.long 0x00 7. " DesAdrSel ,Destination address selection" "APB,AHB"
textline " "
bitfld.long 0x00 6. " SrcAdrSe ,Source address selection" "APB,AHB"
bitfld.long 0x00 5. " ErrIntEnb ,AHB slave error responde " "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " ErrIntSts ,Error response interrupt flag" "No interrupt,Interrupt"
bitfld.long 0x00 3. " BurMod ,Burst mode" "No burst,Burst"
textline " "
bitfld.long 0x00 2. " FinIntEnb ,Finished interrupt" "Disabled,Enabled"
bitfld.long 0x00 1. " FinIntSts ,Finishing interrupt flag" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " EnbDis ,DMA channel" "Disabled,Enabled"
endif
group.long 0x90++0xb "Channel B"
line.long 0x00 "SADMAB,Source Address of DMA Channel B"
line.long 0x04 "DESTAB,Destination Address of DMA Channel B"
line.long 0x08 "CycRDMAB,Cycles register of DMA Channel B"
hexmask.long 0x08 0.--23. 1. " Cyc ,DMA cycle"
if (((d.l(ad:(0x90500000+0x9C)))&0x8)==0x8)
group.long 0x9C++0x3
line.long 0x00 "ComRDMAB,Command register of DMA Channel B"
bitfld.long 0x00 20.--21. " DataWidth ,Data width of transfer" "Word,Half word,Byte,Reserved"
bitfld.long 0x00 19. " ReqSel[19] ,requested signal select of DMA hardware mode[19]" "Not requested,Requested"
textline " "
bitfld.long 0x00 18. " ReqSel[18] ,requested signal select of DMA hardware mode[18]" "Not requested,Requested"
bitfld.long 0x00 17. " ReqSel[17] ,requested signal select of DMA hardware mode[17]" "Not requested,Requested"
textline " "
bitfld.long 0x00 16. " ReqSel[16] ,requested signal select of DMA hardware mode[16]" "Not requested,Requested"
bitfld.long 0x00 12.--14. " DesAdrInc ,Destination address increment" "Not incremented,+4,+8,+16,Reserved,-1,-2,-4"
textline " "
bitfld.long 0x00 8.--10. " SrcAdr ,Source address increment" "Not incremented,+4,+8,+16,Reserved,-1,-2,-4"
bitfld.long 0x00 7. " DesAdrSel ,Destination address selection" "APB,AHB"
textline " "
bitfld.long 0x00 6. " SrcAdrSe ,Source address selection" "APB,AHB"
bitfld.long 0x00 5. " ErrIntEnb ,AHB slave error responde " "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " ErrIntSts ,Error response interrupt flag" "No interrupt,Interrupt"
bitfld.long 0x00 3. " BurMod ,Burst mode" "No burst,Burst"
textline " "
bitfld.long 0x00 2. " FinIntEnb ,Finished interrupt" "Disabled,Enabled"
bitfld.long 0x00 1. " FinIntSts ,Finishing interrupt flag" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " EnbDis ,DMA channel" "Disabled,Enabled"
else
group.long 0x9C++0x3
line.long 0x00 "ComRDMAB,Command register of DMA Channel B"
bitfld.long 0x00 20.--21. " DataWidth ,Data width of transfer" "Word,Half word,Byte,Reserved"
bitfld.long 0x00 19. " ReqSel[19] ,requested signal select of DMA hardware mode[19]" "Not requested,Requested"
textline " "
bitfld.long 0x00 18. " ReqSel[18] ,requested signal select of DMA hardware mode[18]" "Not requested,Requested"
bitfld.long 0x00 17. " ReqSel[17] ,requested signal select of DMA hardware mode[17]" "Not requested,Requested"
textline " "
bitfld.long 0x00 16. " ReqSel[16] ,requested signal select of DMA hardware mode[16]" "Not requested,Requested"
bitfld.long 0x00 12.--14. " DesAdrInc ,Destination address increment" "Not incremented,+1,+2,+4,Reserved,-1,-2,-4"
textline " "
bitfld.long 0x00 8.--10. " SrcAdr ,Source address increment" "Not incremented,+1,+2,+4,Reserved,-1,-2,-4"
bitfld.long 0x00 7. " DesAdrSel ,Destination address selection" "APB,AHB"
textline " "
bitfld.long 0x00 6. " SrcAdrSe ,Source address selection" "APB,AHB"
bitfld.long 0x00 5. " ErrIntEnb ,AHB slave error responde " "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " ErrIntSts ,Error response interrupt flag" "No interrupt,Interrupt"
bitfld.long 0x00 3. " BurMod ,Burst mode" "No burst,Burst"
textline " "
bitfld.long 0x00 2. " FinIntEnb ,Finished interrupt" "Disabled,Enabled"
bitfld.long 0x00 1. " FinIntSts ,Finishing interrupt flag" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " EnbDis ,DMA channel" "Disabled,Enabled"
endif
group.long 0xA0++0xb "Channel C"
line.long 0x00 "SADMAC,Source Address of DMA Channel C"
line.long 0x04 "DESTAC,Destination Address of DMA Channel C"
line.long 0x08 "CycRDMAC,Cycles register of DMA Channel C"
hexmask.long 0x08 0.--23. 1. " Cyc ,DMA cycle"
if (((d.l(ad:(0x90500000+0xAC)))&0x8)==0x8)
group.long 0xAC++0x3
line.long 0x00 "ComRDMAC,Command register of DMA Channel C"
bitfld.long 0x00 20.--21. " DataWidth ,Data width of transfer" "Word,Half word,Byte,Reserved"
bitfld.long 0x00 19. " ReqSel[19] ,requested signal select of DMA hardware mode[19]" "Not requested,Requested"
textline " "
bitfld.long 0x00 18. " ReqSel[18] ,requested signal select of DMA hardware mode[18]" "Not requested,Requested"
bitfld.long 0x00 17. " ReqSel[17] ,requested signal select of DMA hardware mode[17]" "Not requested,Requested"
textline " "
bitfld.long 0x00 16. " ReqSel[16] ,requested signal select of DMA hardware mode[16]" "Not requested,Requested"
bitfld.long 0x00 12.--14. " DesAdrInc ,Destination address increment" "Not incremented,+4,+8,+16,Reserved,-1,-2,-4"
textline " "
bitfld.long 0x00 8.--10. " SrcAdr ,Source address increment" "Not incremented,+4,+8,+16,Reserved,-1,-2,-4"
bitfld.long 0x00 7. " DesAdrSel ,Destination address selection" "APB,AHB"
textline " "
bitfld.long 0x00 6. " SrcAdrSe ,Source address selection" "APB,AHB"
bitfld.long 0x00 5. " ErrIntEnb ,AHB slave error responde " "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " ErrIntSts ,Error response interrupt flag" "No interrupt,Interrupt"
bitfld.long 0x00 3. " BurMod ,Burst mode" "No burst,Burst"
textline " "
bitfld.long 0x00 2. " FinIntEnb ,Finished interrupt" "Disabled,Enabled"
bitfld.long 0x00 1. " FinIntSts ,Finishing interrupt flag" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " EnbDis ,DMA channel" "Disabled,Enabled"
else
group.long 0xAC++0x3
line.long 0x00 "ComRDMAC,Command register of DMA Channel C"
bitfld.long 0x00 20.--21. " DataWidth ,Data width of transfer" "Word,Half word,Byte,Reserved"
bitfld.long 0x00 19. " ReqSel[19] ,requested signal select of DMA hardware mode[19]" "Not requested,Requested"
textline " "
bitfld.long 0x00 18. " ReqSel[18] ,requested signal select of DMA hardware mode[18]" "Not requested,Requested"
bitfld.long 0x00 17. " ReqSel[17] ,requested signal select of DMA hardware mode[17]" "Not requested,Requested"
textline " "
bitfld.long 0x00 16. " ReqSel[16] ,requested signal select of DMA hardware mode[16]" "Not requested,Requested"
bitfld.long 0x00 12.--14. " DesAdrInc ,Destination address increment" "Not incremented,+1,+2,+4,Reserved,-1,-2,-4"
textline " "
bitfld.long 0x00 8.--10. " SrcAdr ,Source address increment" "Not incremented,+1,+2,+4,Reserved,-1,-2,-4"
bitfld.long 0x00 7. " DesAdrSel ,Destination address selection" "APB,AHB"
textline " "
bitfld.long 0x00 6. " SrcAdrSe ,Source address selection" "APB,AHB"
bitfld.long 0x00 5. " ErrIntEnb ,AHB slave error responde " "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " ErrIntSts ,Error response interrupt flag" "No interrupt,Interrupt"
bitfld.long 0x00 3. " BurMod ,Burst mode" "No burst,Burst"
textline " "
bitfld.long 0x00 2. " FinIntEnb ,Finished interrupt" "Disabled,Enabled"
bitfld.long 0x00 1. " FinIntSts ,Finishing interrupt flag" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " EnbDis ,DMA channel" "Disabled,Enabled"
endif
group.long 0xB0++0xb "Channel D"
line.long 0x00 "SADMAD,Source Address of DMA Channel D"
line.long 0x04 "DESTAD,Destination Address of DMA Channel D"
line.long 0x08 "CycRDMAD,Cycles register of DMA Channel D"
hexmask.long 0x08 0.--23. 1. " Cyc ,DMA cycle"
if (((d.l(ad:(0x90500000+0xBC)))&0x8)==0x8)
group.long 0xBC++0x3
line.long 0x00 "ComRDMAD,Command register of DMA Channel D"
bitfld.long 0x00 20.--21. " DataWidth ,Data width of transfer" "Word,Half word,Byte,Reserved"
bitfld.long 0x00 19. " ReqSel[19] ,requested signal select of DMA hardware mode[19]" "Not requested,Requested"
textline " "
bitfld.long 0x00 18. " ReqSel[18] ,requested signal select of DMA hardware mode[18]" "Not requested,Requested"
bitfld.long 0x00 17. " ReqSel[17] ,requested signal select of DMA hardware mode[17]" "Not requested,Requested"
textline " "
bitfld.long 0x00 16. " ReqSel[16] ,requested signal select of DMA hardware mode[16]" "Not requested,Requested"
bitfld.long 0x00 12.--14. " DesAdrInc ,Destination address increment" "Not incremented,+4,+8,+16,Reserved,-1,-2,-4"
textline " "
bitfld.long 0x00 8.--10. " SrcAdr ,Source address increment" "Not incremented,+4,+8,+16,Reserved,-1,-2,-4"
bitfld.long 0x00 7. " DesAdrSel ,Destination address selection" "APB,AHB"
textline " "
bitfld.long 0x00 6. " SrcAdrSe ,Source address selection" "APB,AHB"
bitfld.long 0x00 5. " ErrIntEnb ,AHB slave error responde " "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " ErrIntSts ,Error response interrupt flag" "No interrupt,Interrupt"
bitfld.long 0x00 3. " BurMod ,Burst mode" "No burst,Burst"
textline " "
bitfld.long 0x00 2. " FinIntEnb ,Finished interrupt" "Disabled,Enabled"
bitfld.long 0x00 1. " FinIntSts ,Finishing interrupt flag" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " EnbDis ,DMA channel" "Disabled,Enabled"
else
group.long 0xBC++0x3
line.long 0x00 "ComRDMAD,Command register of DMA Channel D"
bitfld.long 0x00 20.--21. " DataWidth ,Data width of transfer" "Word,Half word,Byte,Reserved"
bitfld.long 0x00 19. " ReqSel[19] ,requested signal select of DMA hardware mode[19]" "Not requested,Requested"
textline " "
bitfld.long 0x00 18. " ReqSel[18] ,requested signal select of DMA hardware mode[18]" "Not requested,Requested"
bitfld.long 0x00 17. " ReqSel[17] ,requested signal select of DMA hardware mode[17]" "Not requested,Requested"
textline " "
bitfld.long 0x00 16. " ReqSel[16] ,requested signal select of DMA hardware mode[16]" "Not requested,Requested"
bitfld.long 0x00 12.--14. " DesAdrInc ,Destination address increment" "Not incremented,+1,+2,+4,Reserved,-1,-2,-4"
textline " "
bitfld.long 0x00 8.--10. " SrcAdr ,Source address increment" "Not incremented,+1,+2,+4,Reserved,-1,-2,-4"
bitfld.long 0x00 7. " DesAdrSel ,Destination address selection" "APB,AHB"
textline " "
bitfld.long 0x00 6. " SrcAdrSe ,Source address selection" "APB,AHB"
bitfld.long 0x00 5. " ErrIntEnb ,AHB slave error responde " "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " ErrIntSts ,Error response interrupt flag" "No interrupt,Interrupt"
bitfld.long 0x00 3. " BurMod ,Burst mode" "No burst,Burst"
textline " "
bitfld.long 0x00 2. " FinIntEnb ,Finished interrupt" "Disabled,Enabled"
bitfld.long 0x00 1. " FinIntSts ,Finishing interrupt flag" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " EnbDis ,DMA channel" "Disabled,Enabled"
endif
width 11.
tree.end
tree "Static Memory Controller"
base ad:0x90200000
width 11.
if (((d.l(ad:(0x90200000+0x0)))&0x400)==0x400)
group.long 0x0++0x3
line.long 0x00 "MBConfR0,Memory Bank 0 Configuration Register"
bitfld.long 0x00 28. " BNK_EN ,Bank enable flag" "Disabled,Enabled"
hexmask.long 0x00 15.--27. 0x8000000 " BNK_BASE ,Bank base address"
textline " "
bitfld.long 0x00 11. " BNK_WPROT ,Bank write enable" "Enabled,Disabled"
bitfld.long 0x00 10. " BNK_TYP1 ,Bank type 1 devices on the corresponding bank" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 9. " BNK_TYP2 ,Bank type 2 devices on the corresponding bank" "Non-pipelined,Pipelined"
bitfld.long 0x00 8. " BNK_TYP3 ,Bank type 3 - late-write enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 4.--7. " BNK_SIZE ,Bank size" "1MB,2MB,4MB,8MB,16MB,32MB,64MB,Reserved,Reserved,Reserved,Reserved,32kB,64kB,128kB,256kB,512kB"
bitfld.long 0x00 0.--1. " BNK_MBW ,Memory bus width" "8,16,32,Reserved"
else
group.long 0x0++0x3
line.long 0x00 "MBConfR0,Memory Bank 0 Configuration Register"
bitfld.long 0x00 28. " BNK_EN ,Bank enable flag" "Disabled,Enabled"
hexmask.long 0x00 15.--27. 0x8000000 " BNK_BASE ,Bank base address"
textline " "
bitfld.long 0x00 11. " BNK_WPROT ,Bank write enable" "Enabled,Disabled"
bitfld.long 0x00 10. " BNK_TYP1 ,Bank type 1 devices on the corresponding bank" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 9. " BNK_TYP2 ,Bank type 2 devices on the corresponding bank" "General device,Burst ROM"
textline " "
bitfld.long 0x00 4.--7. " BNK_SIZE ,Bank size" "1MB,2MB,4MB,8MB,16MB,32MB,64MB,Reserved,Reserved,Reserved,Reserved,32kB,64kB,128kB,256kB,512kB"
bitfld.long 0x00 0.--1. " BNK_MBW ,Memory bus width" "8,16,32,Reserved"
endif
if (((d.l(ad:(0x90200000+0x8)))&0x400)==0x400)
group.long 0x8++0x3
line.long 0x00 "MBConfR1,Memory Bank 1 Configuration Register"
bitfld.long 0x00 28. " BNK_EN ,Bank enable flag" "Disabled,Enabled"
hexmask.long 0x00 15.--27. 0x8000000 " BNK_BASE ,Bank base address"
textline " "
bitfld.long 0x00 11. " BNK_WPROT ,Bank write enable" "Enabled,Disabled"
bitfld.long 0x00 10. " BNK_TYP1 ,Bank type 1 devices on the corresponding bank" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 9. " BNK_TYP2 ,Bank type 2 devices on the corresponding bank" "Non-pipelined,Pipelined"
bitfld.long 0x00 8. " BNK_TYP3 ,Bank type 3 - late-write enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 4.--7. " BNK_SIZE ,Bank size" "1MB,2MB,4MB,8MB,16MB,32MB,64MB,Reserved,Reserved,Reserved,Reserved,32kB,64kB,128kB,256kB,512kB"
bitfld.long 0x00 0.--1. " BNK_MBW ,Memory bus width" "8,16,32,Reserved"
else
group.long 0x8++0x3
line.long 0x00 "MBConfR1,Memory Bank 1 Configuration Register"
bitfld.long 0x00 28. " BNK_EN ,Bank enable flag" "Disabled,Enabled"
hexmask.long 0x00 15.--27. 0x8000000 " BNK_BASE ,Bank base address"
textline " "
bitfld.long 0x00 11. " BNK_WPROT ,Bank write enable" "Enabled,Disabled"
bitfld.long 0x00 10. " BNK_TYP1 ,Bank type 1 devices on the corresponding bank" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 9. " BNK_TYP2 ,Bank type 2 devices on the corresponding bank" "General device,Burst ROM"
textline " "
bitfld.long 0x00 4.--7. " BNK_SIZE ,Bank size" "1MB,2MB,4MB,8MB,16MB,32MB,64MB,Reserved,Reserved,Reserved,Reserved,32kB,64kB,128kB,256kB,512kB"
bitfld.long 0x00 0.--1. " BNK_MBW ,Memory bus width" "8,16,32,Reserved"
endif
if (((d.l(ad:(0x90200000+0x10)))&0x400)==0x400)
group.long 0x10++0x3
line.long 0x00 "MBConfR2,Memory Bank 2 Configuration Register"
bitfld.long 0x00 28. " BNK_EN ,Bank enable flag" "Disabled,Enabled"
hexmask.long 0x00 15.--27. 0x8000000 " BNK_BASE ,Bank base address"
textline " "
bitfld.long 0x00 11. " BNK_WPROT ,Bank write enable" "Enabled,Disabled"
bitfld.long 0x00 10. " BNK_TYP1 ,Bank type 1 devices on the corresponding bank" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 9. " BNK_TYP2 ,Bank type 2 devices on the corresponding bank" "Non-pipelined,Pipelined"
bitfld.long 0x00 8. " BNK_TYP3 ,Bank type 3 - late-write enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 4.--7. " BNK_SIZE ,Bank size" "1MB,2MB,4MB,8MB,16MB,32MB,64MB,Reserved,Reserved,Reserved,Reserved,32kB,64kB,128kB,256kB,512kB"
bitfld.long 0x00 0.--1. " BNK_MBW ,Memory bus width" "8,16,32,Reserved"
else
group.long 0x10++0x3
line.long 0x00 "MBConfR2,Memory Bank 2 Configuration Register"
bitfld.long 0x00 28. " BNK_EN ,Bank enable flag" "Disabled,Enabled"
hexmask.long 0x00 15.--27. 0x8000000 " BNK_BASE ,Bank base address"
textline " "
bitfld.long 0x00 11. " BNK_WPROT ,Bank write enable" "Enabled,Disabled"
bitfld.long 0x00 10. " BNK_TYP1 ,Bank type 1 devices on the corresponding bank" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 9. " BNK_TYP2 ,Bank type 2 devices on the corresponding bank" "General device,Burst ROM"
textline " "
bitfld.long 0x00 4.--7. " BNK_SIZE ,Bank size" "1MB,2MB,4MB,8MB,16MB,32MB,64MB,Reserved,Reserved,Reserved,Reserved,32kB,64kB,128kB,256kB,512kB"
bitfld.long 0x00 0.--1. " BNK_MBW ,Memory bus width" "8,16,32,Reserved"
endif
if (((d.l(ad:(0x90200000+0x18)))&0x400)==0x400)
group.long 0x18++0x3
line.long 0x00 "MBConfR3,Memory Bank 3 Configuration Register"
bitfld.long 0x00 28. " BNK_EN ,Bank enable flag" "Disabled,Enabled"
hexmask.long 0x00 15.--27. 0x8000000 " BNK_BASE ,Bank base address"
textline " "
bitfld.long 0x00 11. " BNK_WPROT ,Bank write enable" "Enabled,Disabled"
bitfld.long 0x00 10. " BNK_TYP1 ,Bank type 1 devices on the corresponding bank" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 9. " BNK_TYP2 ,Bank type 2 devices on the corresponding bank" "Non-pipelined,Pipelined"
bitfld.long 0x00 8. " BNK_TYP3 ,Bank type 3 - late-write enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 4.--7. " BNK_SIZE ,Bank size" "1MB,2MB,4MB,8MB,16MB,32MB,64MB,Reserved,Reserved,Reserved,Reserved,32kB,64kB,128kB,256kB,512kB"
bitfld.long 0x00 0.--1. " BNK_MBW ,Memory bus width" "8,16,32,Reserved"
else
group.long 0x18++0x3
line.long 0x00 "MBConfR3,Memory Bank 3 Configuration Register"
bitfld.long 0x00 28. " BNK_EN ,Bank enable flag" "Disabled,Enabled"
hexmask.long 0x00 15.--27. 0x8000000 " BNK_BASE ,Bank base address"
textline " "
bitfld.long 0x00 11. " BNK_WPROT ,Bank write enable" "Enabled,Disabled"
bitfld.long 0x00 10. " BNK_TYP1 ,Bank type 1 devices on the corresponding bank" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 9. " BNK_TYP2 ,Bank type 2 devices on the corresponding bank" "General device,Burst ROM"
textline " "
bitfld.long 0x00 4.--7. " BNK_SIZE ,Bank size" "1MB,2MB,4MB,8MB,16MB,32MB,64MB,Reserved,Reserved,Reserved,Reserved,32kB,64kB,128kB,256kB,512kB"
bitfld.long 0x00 0.--1. " BNK_MBW ,Memory bus width" "8,16,32,Reserved"
endif
group.long 0x4++0x3
line.long 0x00 "MBTPR0,Memory Bank 0 Timing Parameter Register"
bitfld.long 0x00 28.--31. " ETRNA ,Extend turn-around time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. " EAT1 ,Extend access time 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 20. " RBE ,Read byte-enable" "Low for write,Low for read"
bitfld.long 0x00 18.--19. " AST ,Address setup time" "0,1,2,3"
textline " "
bitfld.long 0x00 16.--17. " CTW ,Chip-select to write-enable delay" "0,1,2,3"
bitfld.long 0x00 12.--15. " AT1 ,Access time 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 8.--9. " AT2 ,Access time 2" "0,1,2,3"
bitfld.long 0x00 6.--7. " WTC ,Write-enable to chip-select delay" "0,1,2,3"
textline " "
bitfld.long 0x00 4.--5. " AHT ,Address hold time" "0,1,2,3"
bitfld.long 0x00 0.--3. " TRNA ,Turn-around time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xC++0x3
line.long 0x00 "MBTPR1,Memory Bank 1 Timing Parameter Register"
bitfld.long 0x00 28.--31. " ETRNA ,Extend turn-around time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. " EAT1 ,Extend access time 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 20. " RBE ,Read byte-enable" "Low for write,Low for read"
bitfld.long 0x00 18.--19. " AST ,Address setup time" "0,1,2,3"
textline " "
bitfld.long 0x00 16.--17. " CTW ,Chip-select to write-enable delay" "0,1,2,3"
bitfld.long 0x00 12.--15. " AT1 ,Access time 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 8.--9. " AT2 ,Access time 2" "0,1,2,3"
bitfld.long 0x00 6.--7. " WTC ,Write-enable to chip-select delay" "0,1,2,3"
textline " "
bitfld.long 0x00 4.--5. " AHT ,Address hold time" "0,1,2,3"
bitfld.long 0x00 0.--3. " TRNA ,Turn-around time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x14++0x3
line.long 0x00 "MBTPR2,Memory Bank 2 Timing Parameter Register"
bitfld.long 0x00 28.--31. " ETRNA ,Extend turn-around time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. " EAT1 ,Extend access time 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 20. " RBE ,Read byte-enable" "Low for write,Low for read"
bitfld.long 0x00 18.--19. " AST ,Address setup time" "0,1,2,3"
textline " "
bitfld.long 0x00 16.--17. " CTW ,Chip-select to write-enable delay" "0,1,2,3"
bitfld.long 0x00 12.--15. " AT1 ,Access time 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 8.--9. " AT2 ,Access time 2" "0,1,2,3"
bitfld.long 0x00 6.--7. " WTC ,Write-enable to chip-select delay" "0,1,2,3"
textline " "
bitfld.long 0x00 4.--5. " AHT ,Address hold time" "0,1,2,3"
bitfld.long 0x00 0.--3. " TRNA ,Turn-around time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x1C++0x3
line.long 0x00 "MBTPR3,Memory Bank 3 Timing Parameter Register"
bitfld.long 0x00 28.--31. " ETRNA ,Extend turn-around time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. " EAT1 ,Extend access time 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 20. " RBE ,Read byte-enable" "Low for write,Low for read"
bitfld.long 0x00 18.--19. " AST ,Address setup time" "0,1,2,3"
textline " "
bitfld.long 0x00 16.--17. " CTW ,Chip-select to write-enable delay" "0,1,2,3"
bitfld.long 0x00 12.--15. " AT1 ,Access time 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 8.--9. " AT2 ,Access time 2" "0,1,2,3"
bitfld.long 0x00 6.--7. " WTC ,Write-enable to chip-select delay" "0,1,2,3"
textline " "
bitfld.long 0x00 4.--5. " AHT ,Address hold time" "0,1,2,3"
bitfld.long 0x00 0.--3. " TRNA ,Turn-around time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x40++0x3
line.long 0x00 "SSR,Shadow Status Register"
bitfld.long 0x00 8. " SSR_STS ,Shadow status" "No effect,Bank switch "
bitfld.long 0x00 5. " SSR_REQ ,Shadow request" "Not requested,Requested"
textline " "
bitfld.long 0x00 4. " SSR_REQM ,Shadow request mode" "Disabled,Enabled"
bitfld.long 0x00 0.--2. " SSR_BNKNUM ,Shadow bank number" "0,1,2,3,4,5,6,7"
rgroup.long 0x80++0x7
line.long 0x00 "RevR,Revision Register"
hexmask.long.byte 0x00 16.--23. 1. " MAJOR_VER ,Major version number of the static memory controller"
hexmask.long.byte 0x00 8.--15. 1. " MINOR_VER ,Minor version number of the static memory controller"
textline " "
hexmask.long.byte 0x00 0.--7. 1. " REL_VER ,Number of the current revision"
line.long 0x04 "FeatR,Feature Register"
bitfld.long 0x04 16. " ADC_SKM ,Configuration of address decoder" "Alignment,Non-alignment"
hexmask.long.byte 0x04 8.--15. 1. " FIFO_DEPTH ,Configuration of channel FIFO depth"
textline " "
hexmask.long.byte 0x04 0.--7. 1. " EBNK_CNT ,Configuration of the number of external banks"
width 11.
tree.end
tree "SDRAM Controller"
base ad:0x90300000
width 16.
group.long 0x00++0xf
line.long 0x00 "STP1,SDRAM Timing Parameter 1 Register"
bitfld.long 0x00 16.--19. " TRP ,Precharge cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--14. " TRCD ,RAS-to-CAS delay" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 8.--11. " TRF ,Auto-refresh cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--5. " TWR ,Write-recovery time" "0,1,2,3"
textline " "
bitfld.long 0x00 0.--1. " TCL ,CAS-latency" "Reserved,Reserved,2,3"
line.long 0x04 "STP2,SDRAM Timing Parameter 2 Register"
bitfld.long 0x04 20.--23. " INI_PREC ,Initial pre-charge times" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 16.--19. " INI_REFT ,Initial refresh times" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
hexmask.long.word 0x04 0.--15. 1. " REF_INTV ,Refresh interval"
line.long 0x08 "SCR1,SDRAM Configuration Register 1"
bitfld.long 0x08 16. " MA2T ,Double memory address cycle enable" "Disabled,Enabled"
bitfld.long 0x08 12.--13. " DDW ,SDRAM data width" "x4,x8,x16,x32"
textline " "
bitfld.long 0x08 8.--10. " DSZ ,SDRAM size" "16Mb,64Mb,128Mb,256Mb,512Mb,Reserved,Reserved,Reserved"
bitfld.long 0x08 4.--5. " MBW ,Memory bus width" "8,16,32,Reserved"
textline " "
bitfld.long 0x08 0.--3. " BNKSIZE ,Bank size" "Reserved,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
line.long 0x0c "SCR2,SDRAM Configuration Register 2"
bitfld.long 0x0C 4. " IPREC ,Initial pre-charge start flag" "No effect,Enabled"
bitfld.long 0x0C 3. " IREF ,Initial refresh start flag" "No effect,Enabled"
textline " "
bitfld.long 0x0C 2. " ISMR ,Start set-mode-register" "No effect,Enabled"
bitfld.long 0x0C 1. " PWDN ,Power-down operation mode" "No effect,Enabled"
textline " "
bitfld.long 0x0C 0. " SREF ,Self-refresh mode" "No effect,Enabled"
group.long 0x10++0x3
line.long 0x00 "EB0BSR,External Bank Configuration Register 0"
bitfld.long 0x00 12. " EN ,Bank enable flag" "Disabled,Enabled"
hexmask.long 0x00 0.--11. 1. " BASE ,12-bit base address of external bank"
group.long 0x14++0x3
line.long 0x00 "EB1BSR,External Bank Configuration Register 1"
bitfld.long 0x00 12. " EN ,Bank enable flag" "Disabled,Enabled"
hexmask.long 0x00 0.--11. 1. " BASE ,12-bit base address of external bank"
group.long 0x18++0x3
line.long 0x00 "EB2BSR,External Bank Configuration Register 2"
bitfld.long 0x00 12. " EN ,Bank enable flag" "Disabled,Enabled"
hexmask.long 0x00 0.--11. 1. " BASE ,12-bit base address of external bank"
group.long 0x1C++0x3
line.long 0x00 "EB3BSR,External Bank Configuration Register 3"
bitfld.long 0x00 12. " EN ,Bank enable flag" "Disabled,Enabled"
hexmask.long 0x00 0.--11. 1. " BASE ,12-bit base address of external bank"
group.long 0x30++0xb
line.long 0x00 "RAGR,Arbitration Grant Window Register"
bitfld.long 0x00 28.--31. " CH8GW ,Channel8 group value" "0,1,2,3,4,5,6,7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
bitfld.long 0x00 24.--27. " CH7GW ,Channel7 group value" "0,1,2,3,4,5,6,7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
textline " "
bitfld.long 0x00 20.--23. " CH6GW ,Channel6 group value" "0,1,2,3,4,5,6,7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
bitfld.long 0x00 16.--19. " CH5GW ,Channel5 group value" "0,1,2,3,4,5,6,7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
textline " "
bitfld.long 0x00 12.--15. " CH4GW ,Channel4 group value" "0,1,2,3,4,5,6,7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
bitfld.long 0x00 8.--11. " CH3GW ,Channel3 group value" "0,1,2,3,4,5,6,7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
textline " "
bitfld.long 0x00 4.--7. " CH2GW ,Channel2 group value" "0,1,2,3,4,5,6,7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
bitfld.long 0x00 0.--3. " CH1GW ,Channel1 group value" "0,1,2,3,4,5,6,7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
line.long 0x04 "FRR,Flush Request Register"
bitfld.long 0x04 3. " FLUSHCMPLT ,Flush request flag" "Not requested,Requested"
bitfld.long 0x04 0.--2. " FLUSHCHN ,Flush Channel Number" "1,2,3,4,5,6,7,8"
line.long 0x08 "ESR,External Bus Interface Support Register"
bitfld.long 0x08 14. " POSMR ,Post SMR flag" "Not issued,Issued"
bitfld.long 0x08 13. " POPREC ,Post SMR flag" "Not issued,Issued"
textline " "
bitfld.long 0x08 12. " PRSMR ,Pre-SMR flag" "Not issued,Issued"
hexmask.long.word 0x08 0.--11. 1. " MR ,Far-end mode register"
rgroup.long 0x100++0x7
line.long 0x00 "CRR,Controller Revision Register"
hexmask.long.byte 0x00 16.--23. 1. " MAJOR_VER ,Major version number"
hexmask.long.byte 0x00 8.--15. 1. " MINOR_VER ,Minor version number"
textline " "
hexmask.long.byte 0x00 0.--7. 1. " REV_VER ,Revision number"
line.long 0x04 "CFR,Controller Feature Register"
bitfld.long 0x04 16. " EBI ,External Bus Interface (EBI)" "Disabled,Enabled"
textline " "
bitfld.long 0x04 15. " CHN[8] ,AHB Channel 8 " "Not configured,Configured"
bitfld.long 0x04 14. " CHN[7] ,AHB Channel 7 " "Not configured,Configured"
textline " "
bitfld.long 0x04 13. " CHN[6] ,AHB Channel 6 " "Not configured,Configured"
bitfld.long 0x04 12. " CHN[5] ,AHB Channel 5 " "Not configured,Configured"
textline " "
bitfld.long 0x04 11. " CHN[4] ,AHB Channel 4 " "Not configured,Configured"
bitfld.long 0x04 10. " CHN[3] ,AHB Channel 3 " "Not configured,Configured"
textline " "
bitfld.long 0x04 9. " CHN[2] ,AHB Channel 2 " "Not configured,Configured"
bitfld.long 0x04 8. " CHN[1] ,AHB Channel 1 " "Not configured,Configured"
textline " "
bitfld.long 0x04 7. " EBNK[8] ,External map 8" "Not configured,Configured"
bitfld.long 0x04 6. " EBNK[7] ,External map 7" "Not configured,Configured"
textline " "
bitfld.long 0x04 5. " EBNK[6] ,External map 6" "Not configured,Configured"
bitfld.long 0x04 4. " EBNK[5] ,External map 5" "Not configured,Configured"
textline " "
bitfld.long 0x04 3. " EBNK[4] ,External map 4" "Not configured,Configured"
bitfld.long 0x04 2. " EBNK[3] ,External map 3" "Not configured,Configured"
textline " "
bitfld.long 0x04 1. " EBNK[2] ,External map 2" "Not configured,Configured"
bitfld.long 0x04 0. " EBNK[1] ,External map 1" "Not configured,Configured"
width 11.
tree.end
tree "DMA Controller"
base ad:0x90400000
width 13.
rgroup.byte 0x00++0x0
line.byte 0x00 "INT,INT Register"
bitfld.byte 0x00 7. " INT[7] ,Channel 7 status" "No interrupt,Interrupt"
bitfld.byte 0x00 6. " INT[6] ,Channel 6 status" "No interrupt,Interrupt"
textline " "
bitfld.byte 0x00 5. " INT[5] ,Channel 5 status" "No interrupt,Interrupt"
bitfld.byte 0x00 4. " INT[4] ,Channel 4 status" "No interrupt,Interrupt"
textline " "
bitfld.byte 0x00 3. " INT[3] ,Channel 3 status" "No interrupt,Interrupt"
bitfld.byte 0x00 2. " INT[2] ,Channel 2 status" "No interrupt,Interrupt"
textline " "
bitfld.byte 0x00 1. " INT[1] ,Channel 1 status" "No interrupt,Interrupt"
bitfld.byte 0x00 0. " INT[0] ,Channel 0 status" "No interrupt,Interrupt"
rgroup.byte 0x04++0x0
line.byte 0x00 "INT_TC,Terminal Count Interrupt Status Register"
bitfld.byte 0x00 7. " INT_TC[7] ,Channel 7 status" "No interrupt,Interrupt"
bitfld.byte 0x00 6. " INT_TC[6] ,Channel 6 status" "No interrupt,Interrupt"
textline " "
bitfld.byte 0x00 5. " INT_TC[5] ,Channel 5 status" "No interrupt,Interrupt"
bitfld.byte 0x00 4. " INT_TC[4] ,Channel 4 status" "No interrupt,Interrupt"
textline " "
bitfld.byte 0x00 3. " INT_TC[3] ,Channel 3 status" "No interrupt,Interrupt"
bitfld.byte 0x00 2. " INT_TC[2] ,Channel 2 status" "No interrupt,Interrupt"
textline " "
bitfld.byte 0x00 1. " INT_TC[1] ,Channel 1 status" "No interrupt,Interrupt"
bitfld.byte 0x00 0. " INT_TC[0] ,Channel 0 status" "No interrupt,Interrupt"
wgroup.byte 0x08++0x0
line.byte 0x00 "INT_TC_CLR,Terminal Count Interrupt Status Clear Register"
bitfld.byte 0x00 7. " INT_TC_CLR[7] ,Clear the INT_TC[7] and TC[7] status" "No effect,Cleared"
bitfld.byte 0x00 6. " INT_TC_CLR[6] ,Clear the INT_TC[6] and TC[6] status" "No effect,Cleared"
textline " "
bitfld.byte 0x00 5. " INT_TC_CLR[5] ,Clear the INT_TC[5] and TC[5] status" "No effect,Cleared"
bitfld.byte 0x00 4. " INT_TC_CLR[4] ,Clear the INT_TC[4] and TC[4] status" "No effect,Cleared"
textline " "
bitfld.byte 0x00 3. " INT_TC_CLR[3] ,Clear the INT_TC[3] and TC[3] status" "No effect,Cleared"
bitfld.byte 0x00 2. " INT_TC_CLR[2] ,Clear the INT_TC[2] and TC[2] status" "No effect,Cleared"
textline " "
bitfld.byte 0x00 1. " INT_TC_CLR[1] ,Clear the INT_TC[1] and TC[1] status" "No effect,Cleared"
bitfld.byte 0x00 0. " INT_TC_CLR[0] ,Clear the INT_TC[0] and TC[0] status" "No effect,Cleared"
rgroup.long 0x0c++0x3
line.long 0x00 "INT_ERR,Error/Abort Interrupt Status Register"
bitfld.long 0x00 23. " INT_ABT[7] ,Channel 7 abort status" "No interrupt,Interrupt"
bitfld.long 0x00 22. " INT_ABT[6] ,Channel 6 abort status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 21. " INT_ABT[5] ,Channel 5 abort status" "No interrupt,Interrupt"
bitfld.long 0x00 20. " INT_ABT[4] ,Channel 4 abort status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 19. " INT_ABT[3] ,Channel 3 abort status" "No interrupt,Interrupt"
bitfld.long 0x00 18. " INT_ABT[2] ,Channel 2 abort status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 17. " INT_ABT[1] ,Channel 1 abort status" "No interrupt,Interrupt"
bitfld.long 0x00 16. " INT_ABT[0] ,Channel 0 abort status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 7. " INT_ERR[7] ,Channel 7 error status" "No interrupt,Interrupt"
bitfld.long 0x00 6. " INT_ERR[6] ,Channel 6 error status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 5. " INT_ERR[5] ,Channel 5 error status" "No interrupt,Interrupt"
bitfld.long 0x00 4. " INT_ERR[4] ,Channel 4 error status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 3. " INT_ERR[3] ,Channel 3 error status" "No interrupt,Interrupt"
bitfld.long 0x00 2. " INT_ERR[2] ,Channel 2 error status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 1. " INT_ERR[1] ,Channel 1 error status" "No interrupt,Interrupt"
bitfld.long 0x00 0. " INT_ERR[0] ,Channel 0 error status" "No interrupt,Interrupt"
wgroup.long 0x10++0x3
line.long 0x00 "INT_ERR_CLR,Error/Abort Interrupt Status Register"
bitfld.long 0x00 23. " INT_ABT_CLR[7] ,Channel 7 abort status" "No effect,Cleared"
bitfld.long 0x00 22. " INT_ABT_CLR[6] ,Channel 6 abort status" "No effect,Cleared"
textline " "
bitfld.long 0x00 21. " INT_ABT_CLR[5] ,Channel 5 abort status" "No effect,Cleared"
bitfld.long 0x00 20. " INT_ABT_CLR[4] ,Channel 4 abort status" "No effect,Cleared"
textline " "
bitfld.long 0x00 19. " INT_ABT_CLR[3] ,Channel 3 abort status" "No effect,Cleared"
bitfld.long 0x00 18. " INT_ABT_CLR[2] ,Channel 2 abort status" "No effect,Cleared"
textline " "
bitfld.long 0x00 17. " INT_ABT_CLR[1] ,Channel 1 abort status" "No effect,Cleared"
bitfld.long 0x00 16. " INT_ABT_CLR[0] ,Channel 0 abort status" "No effect,Cleared"
textline " "
bitfld.long 0x00 7. " INT_ERR_CLR[7] ,Channel 7 error status" "No effect,Cleared"
bitfld.long 0x00 6. " INT_ERR_CLR[6] ,Channel 6 error status" "No effect,Cleared"
textline " "
bitfld.long 0x00 5. " INT_ERR_CLR[5] ,Channel 5 error status" "No effect,Cleared"
bitfld.long 0x00 4. " INT_ERR_CLR[4] ,Channel 4 error status" "No effect,Cleared"
textline " "
bitfld.long 0x00 3. " INT_ERR_CLR[3] ,Channel 3 error status" "No effect,Cleared"
bitfld.long 0x00 2. " INT_ERR_CLR[2] ,Channel 2 error status" "No effect,Cleared"
textline " "
bitfld.long 0x00 1. " INT_ERR_CLR[1] ,Channel 1 error status" "No effect,Cleared"
bitfld.long 0x00 0. " INT_ERR_CLR[0] ,Channel 0 error status" "No effect,Cleared"
rgroup.byte 0x14++0x0
line.byte 0x00 "TC,Terminal Count Status Register"
bitfld.byte 0x00 7. " TC[7] ,DMA Enabled count Channel l7" "Disabled,Enabled"
bitfld.byte 0x00 6. " TC[6] ,DMA Enabled count Channel l6" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " TC[5] ,DMA Enabled count Channel l5" "Disabled,Enabled"
bitfld.byte 0x00 4. " TC[4] ,DMA Enabled count Channel l4" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " TC[3] ,DMA Enabled count Channel l3" "Disabled,Enabled"
bitfld.byte 0x00 2. " TC[2] ,DMA Enabled count Channel l2" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " TC[1] ,DMA Enabled count Channel l1" "Disabled,Enabled"
bitfld.byte 0x00 0. " TC[0] ,DMA Enabled count Channel l0" "Disabled,Enabled"
rgroup.long 0x18++0x3
line.long 0x00 "ERR,Error/Abort Status Register"
bitfld.long 0x00 23. " ABT[7] ,Channel 7 abort status" "No abort,Abort"
bitfld.long 0x00 22. " ABT[6] ,Channel 6 abort status" "No abort,Abort"
textline " "
bitfld.long 0x00 21. " ABT[5] ,Channel 5 abort status" "No abort,Abort"
bitfld.long 0x00 20. " ABT[4] ,Channel 4 abort status" "No abort,Abort"
textline " "
bitfld.long 0x00 19. " ABT[3] ,Channel 3 abort status" "No abort,Abort"
bitfld.long 0x00 18. " ABT[2] ,Channel 2 abort status" "No abort,Abort"
textline " "
bitfld.long 0x00 17. " ABT[1] ,Channel 1 abort status" "No abort,Abort"
bitfld.long 0x00 16. " ABT[0] ,Channel 0 abort status" "No abort,Abort"
textline " "
bitfld.long 0x00 7. " ERR[7] ,Channel 7 error status" "No error,Error"
bitfld.long 0x00 6. " ERR[6] ,Channel 6 error status" "No error,Error"
textline " "
bitfld.long 0x00 5. " ERR[5] ,Channel 5 error status" "No error,Error"
bitfld.long 0x00 4. " ERR[4] ,Channel 4 error status" "No error,Error"
textline " "
bitfld.long 0x00 3. " ERR[3] ,Channel 3 error status" "No error,Error"
bitfld.long 0x00 2. " ERR[2] ,Channel 2 error status" "No error,Error"
textline " "
bitfld.long 0x00 1. " ERR[1] ,Channel 1 error status" "No error,Error"
bitfld.long 0x00 0. " ERR[0] ,Channel 0 error status" "No error,Error"
rgroup.byte 0x1c++0x0
line.byte 0x00 "CH_EN,Channel Enable Status Register"
bitfld.byte 0x00 7. " CH_EN[7] ,Status of the channel 7" "Low,High"
bitfld.byte 0x00 6. " CH_EN[6] ,Status of the channel 6" "Low,High"
textline " "
bitfld.byte 0x00 5. " CH_EN[5] ,Status of the channel 5" "Low,High"
bitfld.byte 0x00 4. " CH_EN[4] ,Status of the channel 4" "Low,High"
textline " "
bitfld.byte 0x00 3. " CH_EN[3] ,Status of the channel 3" "Low,High"
bitfld.byte 0x00 2. " CH_EN[2] ,Status of the channel 2" "Low,High"
textline " "
bitfld.byte 0x00 1. " CH_EN[1] ,Status of the channel 1" "Low,High"
bitfld.byte 0x00 0. " CH_EN[0] ,Status of the channel 0" "Low,High"
rgroup.byte 0x20++0x0
line.byte 0x00 "CH_BUSY,Channel Busy Status Register"
bitfld.byte 0x00 7. " CH_BUSY[7] ,Status fo the channel 7" "Low,High"
bitfld.byte 0x00 6. " CH_BUSY[6] ,Status fo the channel 6" "Low,High"
textline " "
bitfld.byte 0x00 5. " CH_BUSY[5] ,Status fo the channel 5" "Low,High"
bitfld.byte 0x00 4. " CH_BUSY[4] ,Status fo the channel 4" "Low,High"
textline " "
bitfld.byte 0x00 3. " CH_BUSY[3] ,Status fo the channel 3" "Low,High"
bitfld.byte 0x00 2. " CH_BUSY[2] ,Status fo the channel 2" "Low,High"
textline " "
bitfld.byte 0x00 1. " CH_BUSY[1] ,Status fo the channel 1" "Low,High"
bitfld.byte 0x00 0. " CH_BUSY[0] ,Status fo the channel 0" "Low,High"
group.byte 0x24++0x0
line.byte 0x00 "CSR,Main Configuration Status Register"
bitfld.byte 0x00 2. " M1ENDIAN ,AHB Master 1 endian configuration" "Little-endian,Big-endian"
bitfld.byte 0x00 1. " M0ENDIAN ,AHB Master 0 endian configuration" "Little-endian,Big-endian"
textline " "
bitfld.byte 0x00 0. " DMACEN ,DMA controller enable" "Disabled,Enabled"
group.byte 0x28++0x0
line.byte 0x00 "SYNC,Synchronization Register"
bitfld.byte 0x00 7. " SYNC[7] ,DMA synchronization logic enable for channel 7" "Disabled,Enabled"
bitfld.byte 0x00 6. " SYNC[6] ,DMA synchronization logic enable for channel 6" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " SYNC[5] ,DMA synchronization logic enable for channel 5" "Disabled,Enabled"
bitfld.byte 0x00 4. " SYNC[4] ,DMA synchronization logic enable for channel 4" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " SYNC[3] ,DMA synchronization logic enable for channel 3" "Disabled,Enabled"
bitfld.byte 0x00 2. " SYNC[2] ,DMA synchronization logic enable for channel 2" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " SYNC[1] ,DMA synchronization logic enable for channel 1" "Disabled,Enabled"
bitfld.byte 0x00 0. " SYNC[0] ,DMA synchronization logic enable for channel 0" "Disabled,Enabled"
width 11.
tree "Channel 0 Registers"
base ad:(0x90400000+0x100)
width 13.
group.long 0x00++0x17
line.long 0x00 "C0_CSR,Channel $1 Control Register"
bitfld.long 0x00 31. " TC_MSK ,Terminal count status mask" "Not masked,Masked"
bitfld.long 0x00 22.--23. " CHPRI ,Channel priority level" "Lowest,2,3,Highest"
textline " "
bitfld.long 0x00 21. " PROT3 ,Protection information for cacheability" "Not cacheable,Cacheable"
bitfld.long 0x00 20. " PROT2 ,Protection information for bufferablity" "Not bufferable,Bufferable"
textline " "
bitfld.long 0x00 19. " PROT1 ,Protection information for mode indication" "User mode,Privileged mode"
bitfld.long 0x00 16.--18. " SRC_SIZE ,Source burst size selection" "1,4,8,16,32,64,128,256"
textline " "
bitfld.long 0x00 15. " ABT ,Transaction abort" "No effect,Stop"
bitfld.long 0x00 11.--13. " SRC_WIDTH ,Source transfer width" "8,16,32,Reserved,Reserved,Reserved,Reserved,Reserved"
textline " "
bitfld.long 0x00 8.--10. " DST_WIDTH ,Destination transfer width" "8,16,32,Reserved,Reserved,Reserved,Reserved,Reserved"
bitfld.long 0x00 7. " MODE ,Mode" "Normal,Hardware Handshake"
textline " "
bitfld.long 0x00 5.--6. " SRCAD_CTL ,Source address control" "Increment,Decrement,Fixed,Reserved"
bitfld.long 0x00 3.--4. " DSTAD_CTL ,Destination address control" "Increment,Decrement,Fixed,Reserved"
textline " "
bitfld.long 0x00 2. " SRC_SEL ,Source selection" "AHB Master 0,AHB Master 1"
bitfld.long 0x00 1. " DST_SEL ,Destination selection" "AHB Master 0,AHB Master 1"
textline " "
bitfld.long 0x00 0. " CH_EN ,Channel Enable" "Disabled,Enabled"
line.long 0x04 "C0_CFG,Channel $1 Configuration Register"
bitfld.long 0x04 16.--19. " LLP_CNT ,Chain transfer counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8. " BUSY ,The DMA channel is busy" "Not busy,Busy"
textline " "
bitfld.long 0x04 2. " INT_ABT_MSK ,Channel abort interrupt mask" "Not masked,Masked"
bitfld.long 0x04 1. " INT_ERR_MSK ,Channel error interrupt " "Not masked,Masked"
textline " "
bitfld.long 0x04 0. " INT_TC_MSK ,Channel terminal count interrupt" "Not masked,Masked"
line.long 0x08 "C0_SrcAddr,Channel $1 Source Address Register"
line.long 0x0c "C0_DstAddr,Channel $1 Destination Address Register"
line.long 0x10 "C0_LLP,Linked List Descriptor Pointer"
hexmask.long 0x10 2.--31. 0x4 " LLDPAdd ,Linked List Descriptor Pointer Address"
bitfld.long 0x10 0. " MLLP ,Master for loading the next LLP" "AHB Master 0,AHB Master 1"
line.long 0x14 "C0_SIZE,Transfer Size Register"
hexmask.long.word 0x14 0.--11. 1. " TOT_SIZE ,Total transfer size"
width 11.
tree.end
tree "Channel 1 Registers"
base ad:(0x90400000+0x120)
width 13.
group.long 0x00++0x17
line.long 0x00 "C1_CSR,Channel $1 Control Register"
bitfld.long 0x00 31. " TC_MSK ,Terminal count status mask" "Not masked,Masked"
bitfld.long 0x00 22.--23. " CHPRI ,Channel priority level" "Lowest,2,3,Highest"
textline " "
bitfld.long 0x00 21. " PROT3 ,Protection information for cacheability" "Not cacheable,Cacheable"
bitfld.long 0x00 20. " PROT2 ,Protection information for bufferablity" "Not bufferable,Bufferable"
textline " "
bitfld.long 0x00 19. " PROT1 ,Protection information for mode indication" "User mode,Privileged mode"
bitfld.long 0x00 16.--18. " SRC_SIZE ,Source burst size selection" "1,4,8,16,32,64,128,256"
textline " "
bitfld.long 0x00 15. " ABT ,Transaction abort" "No effect,Stop"
bitfld.long 0x00 11.--13. " SRC_WIDTH ,Source transfer width" "8,16,32,Reserved,Reserved,Reserved,Reserved,Reserved"
textline " "
bitfld.long 0x00 8.--10. " DST_WIDTH ,Destination transfer width" "8,16,32,Reserved,Reserved,Reserved,Reserved,Reserved"
bitfld.long 0x00 7. " MODE ,Mode" "Normal,Hardware Handshake"
textline " "
bitfld.long 0x00 5.--6. " SRCAD_CTL ,Source address control" "Increment,Decrement,Fixed,Reserved"
bitfld.long 0x00 3.--4. " DSTAD_CTL ,Destination address control" "Increment,Decrement,Fixed,Reserved"
textline " "
bitfld.long 0x00 2. " SRC_SEL ,Source selection" "AHB Master 0,AHB Master 1"
bitfld.long 0x00 1. " DST_SEL ,Destination selection" "AHB Master 0,AHB Master 1"
textline " "
bitfld.long 0x00 0. " CH_EN ,Channel Enable" "Disabled,Enabled"
line.long 0x04 "C1_CFG,Channel $1 Configuration Register"
bitfld.long 0x04 16.--19. " LLP_CNT ,Chain transfer counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8. " BUSY ,The DMA channel is busy" "Not busy,Busy"
textline " "
bitfld.long 0x04 2. " INT_ABT_MSK ,Channel abort interrupt mask" "Not masked,Masked"
bitfld.long 0x04 1. " INT_ERR_MSK ,Channel error interrupt " "Not masked,Masked"
textline " "
bitfld.long 0x04 0. " INT_TC_MSK ,Channel terminal count interrupt" "Not masked,Masked"
line.long 0x08 "C1_SrcAddr,Channel $1 Source Address Register"
line.long 0x0c "C1_DstAddr,Channel $1 Destination Address Register"
line.long 0x10 "C1_LLP,Linked List Descriptor Pointer"
hexmask.long 0x10 2.--31. 0x4 " LLDPAdd ,Linked List Descriptor Pointer Address"
bitfld.long 0x10 0. " MLLP ,Master for loading the next LLP" "AHB Master 0,AHB Master 1"
line.long 0x14 "C1_SIZE,Transfer Size Register"
hexmask.long.word 0x14 0.--11. 1. " TOT_SIZE ,Total transfer size"
width 11.
tree.end
tree "Channel 2 Registers"
base ad:(0x90400000+0x140)
width 13.
group.long 0x00++0x17
line.long 0x00 "C2_CSR,Channel $1 Control Register"
bitfld.long 0x00 31. " TC_MSK ,Terminal count status mask" "Not masked,Masked"
bitfld.long 0x00 22.--23. " CHPRI ,Channel priority level" "Lowest,2,3,Highest"
textline " "
bitfld.long 0x00 21. " PROT3 ,Protection information for cacheability" "Not cacheable,Cacheable"
bitfld.long 0x00 20. " PROT2 ,Protection information for bufferablity" "Not bufferable,Bufferable"
textline " "
bitfld.long 0x00 19. " PROT1 ,Protection information for mode indication" "User mode,Privileged mode"
bitfld.long 0x00 16.--18. " SRC_SIZE ,Source burst size selection" "1,4,8,16,32,64,128,256"
textline " "
bitfld.long 0x00 15. " ABT ,Transaction abort" "No effect,Stop"
bitfld.long 0x00 11.--13. " SRC_WIDTH ,Source transfer width" "8,16,32,Reserved,Reserved,Reserved,Reserved,Reserved"
textline " "
bitfld.long 0x00 8.--10. " DST_WIDTH ,Destination transfer width" "8,16,32,Reserved,Reserved,Reserved,Reserved,Reserved"
bitfld.long 0x00 7. " MODE ,Mode" "Normal,Hardware Handshake"
textline " "
bitfld.long 0x00 5.--6. " SRCAD_CTL ,Source address control" "Increment,Decrement,Fixed,Reserved"
bitfld.long 0x00 3.--4. " DSTAD_CTL ,Destination address control" "Increment,Decrement,Fixed,Reserved"
textline " "
bitfld.long 0x00 2. " SRC_SEL ,Source selection" "AHB Master 0,AHB Master 1"
bitfld.long 0x00 1. " DST_SEL ,Destination selection" "AHB Master 0,AHB Master 1"
textline " "
bitfld.long 0x00 0. " CH_EN ,Channel Enable" "Disabled,Enabled"
line.long 0x04 "C2_CFG,Channel $1 Configuration Register"
bitfld.long 0x04 16.--19. " LLP_CNT ,Chain transfer counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8. " BUSY ,The DMA channel is busy" "Not busy,Busy"
textline " "
bitfld.long 0x04 2. " INT_ABT_MSK ,Channel abort interrupt mask" "Not masked,Masked"
bitfld.long 0x04 1. " INT_ERR_MSK ,Channel error interrupt " "Not masked,Masked"
textline " "
bitfld.long 0x04 0. " INT_TC_MSK ,Channel terminal count interrupt" "Not masked,Masked"
line.long 0x08 "C2_SrcAddr,Channel $1 Source Address Register"
line.long 0x0c "C2_DstAddr,Channel $1 Destination Address Register"
line.long 0x10 "C2_LLP,Linked List Descriptor Pointer"
hexmask.long 0x10 2.--31. 0x4 " LLDPAdd ,Linked List Descriptor Pointer Address"
bitfld.long 0x10 0. " MLLP ,Master for loading the next LLP" "AHB Master 0,AHB Master 1"
line.long 0x14 "C2_SIZE,Transfer Size Register"
hexmask.long.word 0x14 0.--11. 1. " TOT_SIZE ,Total transfer size"
width 11.
tree.end
tree "Channel 3 Registers"
base ad:(0x90400000+0x160)
width 13.
group.long 0x00++0x17
line.long 0x00 "C3_CSR,Channel $1 Control Register"
bitfld.long 0x00 31. " TC_MSK ,Terminal count status mask" "Not masked,Masked"
bitfld.long 0x00 22.--23. " CHPRI ,Channel priority level" "Lowest,2,3,Highest"
textline " "
bitfld.long 0x00 21. " PROT3 ,Protection information for cacheability" "Not cacheable,Cacheable"
bitfld.long 0x00 20. " PROT2 ,Protection information for bufferablity" "Not bufferable,Bufferable"
textline " "
bitfld.long 0x00 19. " PROT1 ,Protection information for mode indication" "User mode,Privileged mode"
bitfld.long 0x00 16.--18. " SRC_SIZE ,Source burst size selection" "1,4,8,16,32,64,128,256"
textline " "
bitfld.long 0x00 15. " ABT ,Transaction abort" "No effect,Stop"
bitfld.long 0x00 11.--13. " SRC_WIDTH ,Source transfer width" "8,16,32,Reserved,Reserved,Reserved,Reserved,Reserved"
textline " "
bitfld.long 0x00 8.--10. " DST_WIDTH ,Destination transfer width" "8,16,32,Reserved,Reserved,Reserved,Reserved,Reserved"
bitfld.long 0x00 7. " MODE ,Mode" "Normal,Hardware Handshake"
textline " "
bitfld.long 0x00 5.--6. " SRCAD_CTL ,Source address control" "Increment,Decrement,Fixed,Reserved"
bitfld.long 0x00 3.--4. " DSTAD_CTL ,Destination address control" "Increment,Decrement,Fixed,Reserved"
textline " "
bitfld.long 0x00 2. " SRC_SEL ,Source selection" "AHB Master 0,AHB Master 1"
bitfld.long 0x00 1. " DST_SEL ,Destination selection" "AHB Master 0,AHB Master 1"
textline " "
bitfld.long 0x00 0. " CH_EN ,Channel Enable" "Disabled,Enabled"
line.long 0x04 "C3_CFG,Channel $1 Configuration Register"
bitfld.long 0x04 16.--19. " LLP_CNT ,Chain transfer counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8. " BUSY ,The DMA channel is busy" "Not busy,Busy"
textline " "
bitfld.long 0x04 2. " INT_ABT_MSK ,Channel abort interrupt mask" "Not masked,Masked"
bitfld.long 0x04 1. " INT_ERR_MSK ,Channel error interrupt " "Not masked,Masked"
textline " "
bitfld.long 0x04 0. " INT_TC_MSK ,Channel terminal count interrupt" "Not masked,Masked"
line.long 0x08 "C3_SrcAddr,Channel $1 Source Address Register"
line.long 0x0c "C3_DstAddr,Channel $1 Destination Address Register"
line.long 0x10 "C3_LLP,Linked List Descriptor Pointer"
hexmask.long 0x10 2.--31. 0x4 " LLDPAdd ,Linked List Descriptor Pointer Address"
bitfld.long 0x10 0. " MLLP ,Master for loading the next LLP" "AHB Master 0,AHB Master 1"
line.long 0x14 "C3_SIZE,Transfer Size Register"
hexmask.long.word 0x14 0.--11. 1. " TOT_SIZE ,Total transfer size"
width 11.
tree.end
tree "Channel 4 Registers"
base ad:(0x90400000+0x180)
width 13.
group.long 0x00++0x17
line.long 0x00 "C4_CSR,Channel $1 Control Register"
bitfld.long 0x00 31. " TC_MSK ,Terminal count status mask" "Not masked,Masked"
bitfld.long 0x00 22.--23. " CHPRI ,Channel priority level" "Lowest,2,3,Highest"
textline " "
bitfld.long 0x00 21. " PROT3 ,Protection information for cacheability" "Not cacheable,Cacheable"
bitfld.long 0x00 20. " PROT2 ,Protection information for bufferablity" "Not bufferable,Bufferable"
textline " "
bitfld.long 0x00 19. " PROT1 ,Protection information for mode indication" "User mode,Privileged mode"
bitfld.long 0x00 16.--18. " SRC_SIZE ,Source burst size selection" "1,4,8,16,32,64,128,256"
textline " "
bitfld.long 0x00 15. " ABT ,Transaction abort" "No effect,Stop"
bitfld.long 0x00 11.--13. " SRC_WIDTH ,Source transfer width" "8,16,32,Reserved,Reserved,Reserved,Reserved,Reserved"
textline " "
bitfld.long 0x00 8.--10. " DST_WIDTH ,Destination transfer width" "8,16,32,Reserved,Reserved,Reserved,Reserved,Reserved"
bitfld.long 0x00 7. " MODE ,Mode" "Normal,Hardware Handshake"
textline " "
bitfld.long 0x00 5.--6. " SRCAD_CTL ,Source address control" "Increment,Decrement,Fixed,Reserved"
bitfld.long 0x00 3.--4. " DSTAD_CTL ,Destination address control" "Increment,Decrement,Fixed,Reserved"
textline " "
bitfld.long 0x00 2. " SRC_SEL ,Source selection" "AHB Master 0,AHB Master 1"
bitfld.long 0x00 1. " DST_SEL ,Destination selection" "AHB Master 0,AHB Master 1"
textline " "
bitfld.long 0x00 0. " CH_EN ,Channel Enable" "Disabled,Enabled"
line.long 0x04 "C4_CFG,Channel $1 Configuration Register"
bitfld.long 0x04 16.--19. " LLP_CNT ,Chain transfer counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8. " BUSY ,The DMA channel is busy" "Not busy,Busy"
textline " "
bitfld.long 0x04 2. " INT_ABT_MSK ,Channel abort interrupt mask" "Not masked,Masked"
bitfld.long 0x04 1. " INT_ERR_MSK ,Channel error interrupt " "Not masked,Masked"
textline " "
bitfld.long 0x04 0. " INT_TC_MSK ,Channel terminal count interrupt" "Not masked,Masked"
line.long 0x08 "C4_SrcAddr,Channel $1 Source Address Register"
line.long 0x0c "C4_DstAddr,Channel $1 Destination Address Register"
line.long 0x10 "C4_LLP,Linked List Descriptor Pointer"
hexmask.long 0x10 2.--31. 0x4 " LLDPAdd ,Linked List Descriptor Pointer Address"
bitfld.long 0x10 0. " MLLP ,Master for loading the next LLP" "AHB Master 0,AHB Master 1"
line.long 0x14 "C4_SIZE,Transfer Size Register"
hexmask.long.word 0x14 0.--11. 1. " TOT_SIZE ,Total transfer size"
width 11.
tree.end
tree "Channel 5 Registers"
base ad:(0x90400000+0x1A0)
width 13.
group.long 0x00++0x17
line.long 0x00 "C5_CSR,Channel $1 Control Register"
bitfld.long 0x00 31. " TC_MSK ,Terminal count status mask" "Not masked,Masked"
bitfld.long 0x00 22.--23. " CHPRI ,Channel priority level" "Lowest,2,3,Highest"
textline " "
bitfld.long 0x00 21. " PROT3 ,Protection information for cacheability" "Not cacheable,Cacheable"
bitfld.long 0x00 20. " PROT2 ,Protection information for bufferablity" "Not bufferable,Bufferable"
textline " "
bitfld.long 0x00 19. " PROT1 ,Protection information for mode indication" "User mode,Privileged mode"
bitfld.long 0x00 16.--18. " SRC_SIZE ,Source burst size selection" "1,4,8,16,32,64,128,256"
textline " "
bitfld.long 0x00 15. " ABT ,Transaction abort" "No effect,Stop"
bitfld.long 0x00 11.--13. " SRC_WIDTH ,Source transfer width" "8,16,32,Reserved,Reserved,Reserved,Reserved,Reserved"
textline " "
bitfld.long 0x00 8.--10. " DST_WIDTH ,Destination transfer width" "8,16,32,Reserved,Reserved,Reserved,Reserved,Reserved"
bitfld.long 0x00 7. " MODE ,Mode" "Normal,Hardware Handshake"
textline " "
bitfld.long 0x00 5.--6. " SRCAD_CTL ,Source address control" "Increment,Decrement,Fixed,Reserved"
bitfld.long 0x00 3.--4. " DSTAD_CTL ,Destination address control" "Increment,Decrement,Fixed,Reserved"
textline " "
bitfld.long 0x00 2. " SRC_SEL ,Source selection" "AHB Master 0,AHB Master 1"
bitfld.long 0x00 1. " DST_SEL ,Destination selection" "AHB Master 0,AHB Master 1"
textline " "
bitfld.long 0x00 0. " CH_EN ,Channel Enable" "Disabled,Enabled"
line.long 0x04 "C5_CFG,Channel $1 Configuration Register"
bitfld.long 0x04 16.--19. " LLP_CNT ,Chain transfer counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8. " BUSY ,The DMA channel is busy" "Not busy,Busy"
textline " "
bitfld.long 0x04 2. " INT_ABT_MSK ,Channel abort interrupt mask" "Not masked,Masked"
bitfld.long 0x04 1. " INT_ERR_MSK ,Channel error interrupt " "Not masked,Masked"
textline " "
bitfld.long 0x04 0. " INT_TC_MSK ,Channel terminal count interrupt" "Not masked,Masked"
line.long 0x08 "C5_SrcAddr,Channel $1 Source Address Register"
line.long 0x0c "C5_DstAddr,Channel $1 Destination Address Register"
line.long 0x10 "C5_LLP,Linked List Descriptor Pointer"
hexmask.long 0x10 2.--31. 0x4 " LLDPAdd ,Linked List Descriptor Pointer Address"
bitfld.long 0x10 0. " MLLP ,Master for loading the next LLP" "AHB Master 0,AHB Master 1"
line.long 0x14 "C5_SIZE,Transfer Size Register"
hexmask.long.word 0x14 0.--11. 1. " TOT_SIZE ,Total transfer size"
width 11.
tree.end
tree "Channel 6 Registers"
base ad:(0x90400000+0x1C0)
width 13.
group.long 0x00++0x17
line.long 0x00 "C6_CSR,Channel $1 Control Register"
bitfld.long 0x00 31. " TC_MSK ,Terminal count status mask" "Not masked,Masked"
bitfld.long 0x00 22.--23. " CHPRI ,Channel priority level" "Lowest,2,3,Highest"
textline " "
bitfld.long 0x00 21. " PROT3 ,Protection information for cacheability" "Not cacheable,Cacheable"
bitfld.long 0x00 20. " PROT2 ,Protection information for bufferablity" "Not bufferable,Bufferable"
textline " "
bitfld.long 0x00 19. " PROT1 ,Protection information for mode indication" "User mode,Privileged mode"
bitfld.long 0x00 16.--18. " SRC_SIZE ,Source burst size selection" "1,4,8,16,32,64,128,256"
textline " "
bitfld.long 0x00 15. " ABT ,Transaction abort" "No effect,Stop"
bitfld.long 0x00 11.--13. " SRC_WIDTH ,Source transfer width" "8,16,32,Reserved,Reserved,Reserved,Reserved,Reserved"
textline " "
bitfld.long 0x00 8.--10. " DST_WIDTH ,Destination transfer width" "8,16,32,Reserved,Reserved,Reserved,Reserved,Reserved"
bitfld.long 0x00 7. " MODE ,Mode" "Normal,Hardware Handshake"
textline " "
bitfld.long 0x00 5.--6. " SRCAD_CTL ,Source address control" "Increment,Decrement,Fixed,Reserved"
bitfld.long 0x00 3.--4. " DSTAD_CTL ,Destination address control" "Increment,Decrement,Fixed,Reserved"
textline " "
bitfld.long 0x00 2. " SRC_SEL ,Source selection" "AHB Master 0,AHB Master 1"
bitfld.long 0x00 1. " DST_SEL ,Destination selection" "AHB Master 0,AHB Master 1"
textline " "
bitfld.long 0x00 0. " CH_EN ,Channel Enable" "Disabled,Enabled"
line.long 0x04 "C6_CFG,Channel $1 Configuration Register"
bitfld.long 0x04 16.--19. " LLP_CNT ,Chain transfer counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8. " BUSY ,The DMA channel is busy" "Not busy,Busy"
textline " "
bitfld.long 0x04 2. " INT_ABT_MSK ,Channel abort interrupt mask" "Not masked,Masked"
bitfld.long 0x04 1. " INT_ERR_MSK ,Channel error interrupt " "Not masked,Masked"
textline " "
bitfld.long 0x04 0. " INT_TC_MSK ,Channel terminal count interrupt" "Not masked,Masked"
line.long 0x08 "C6_SrcAddr,Channel $1 Source Address Register"
line.long 0x0c "C6_DstAddr,Channel $1 Destination Address Register"
line.long 0x10 "C6_LLP,Linked List Descriptor Pointer"
hexmask.long 0x10 2.--31. 0x4 " LLDPAdd ,Linked List Descriptor Pointer Address"
bitfld.long 0x10 0. " MLLP ,Master for loading the next LLP" "AHB Master 0,AHB Master 1"
line.long 0x14 "C6_SIZE,Transfer Size Register"
hexmask.long.word 0x14 0.--11. 1. " TOT_SIZE ,Total transfer size"
width 11.
tree.end
tree "Channel 7 Registers"
base ad:(0x90400000+0x1E0)
width 13.
group.long 0x00++0x17
line.long 0x00 "C7_CSR,Channel $1 Control Register"
bitfld.long 0x00 31. " TC_MSK ,Terminal count status mask" "Not masked,Masked"
bitfld.long 0x00 22.--23. " CHPRI ,Channel priority level" "Lowest,2,3,Highest"
textline " "
bitfld.long 0x00 21. " PROT3 ,Protection information for cacheability" "Not cacheable,Cacheable"
bitfld.long 0x00 20. " PROT2 ,Protection information for bufferablity" "Not bufferable,Bufferable"
textline " "
bitfld.long 0x00 19. " PROT1 ,Protection information for mode indication" "User mode,Privileged mode"
bitfld.long 0x00 16.--18. " SRC_SIZE ,Source burst size selection" "1,4,8,16,32,64,128,256"
textline " "
bitfld.long 0x00 15. " ABT ,Transaction abort" "No effect,Stop"
bitfld.long 0x00 11.--13. " SRC_WIDTH ,Source transfer width" "8,16,32,Reserved,Reserved,Reserved,Reserved,Reserved"
textline " "
bitfld.long 0x00 8.--10. " DST_WIDTH ,Destination transfer width" "8,16,32,Reserved,Reserved,Reserved,Reserved,Reserved"
bitfld.long 0x00 7. " MODE ,Mode" "Normal,Hardware Handshake"
textline " "
bitfld.long 0x00 5.--6. " SRCAD_CTL ,Source address control" "Increment,Decrement,Fixed,Reserved"
bitfld.long 0x00 3.--4. " DSTAD_CTL ,Destination address control" "Increment,Decrement,Fixed,Reserved"
textline " "
bitfld.long 0x00 2. " SRC_SEL ,Source selection" "AHB Master 0,AHB Master 1"
bitfld.long 0x00 1. " DST_SEL ,Destination selection" "AHB Master 0,AHB Master 1"
textline " "
bitfld.long 0x00 0. " CH_EN ,Channel Enable" "Disabled,Enabled"
line.long 0x04 "C7_CFG,Channel $1 Configuration Register"
bitfld.long 0x04 16.--19. " LLP_CNT ,Chain transfer counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8. " BUSY ,The DMA channel is busy" "Not busy,Busy"
textline " "
bitfld.long 0x04 2. " INT_ABT_MSK ,Channel abort interrupt mask" "Not masked,Masked"
bitfld.long 0x04 1. " INT_ERR_MSK ,Channel error interrupt " "Not masked,Masked"
textline " "
bitfld.long 0x04 0. " INT_TC_MSK ,Channel terminal count interrupt" "Not masked,Masked"
line.long 0x08 "C7_SrcAddr,Channel $1 Source Address Register"
line.long 0x0c "C7_DstAddr,Channel $1 Destination Address Register"
line.long 0x10 "C7_LLP,Linked List Descriptor Pointer"
hexmask.long 0x10 2.--31. 0x4 " LLDPAdd ,Linked List Descriptor Pointer Address"
bitfld.long 0x10 0. " MLLP ,Master for loading the next LLP" "AHB Master 0,AHB Master 1"
line.long 0x14 "C7_SIZE,Transfer Size Register"
hexmask.long.word 0x14 0.--11. 1. " TOT_SIZE ,Total transfer size"
width 11.
tree.end
tree.end
tree.open "Ethernet Controller"
tree "EMAC1"
base ad:0x90900000
width 11.
hgroup.long 0x00++0x3
hide.long 0x00 "ISR1,Interrupt Status Register 1"
in
group.long 0x4++0x13
line.long 0x00 "IMR1,Interrupt Mask Register 1"
bitfld.long 0x00 9. " PHYSTS_CHG_M ,Interrupt of ISR [9]" "Not masked,Masked"
bitfld.long 0x00 8. " AHB_ERR_M ,Interrupt of ISR [8]" "Not masked,Masked"
textline " "
bitfld.long 0x00 7. " RPKT_LOST_M ,Interrupt of ISR [7]" "Not masked,Masked"
bitfld.long 0x00 6. " RPKT_SAV_M ,Interrupt of ISR [6]" "Not masked,Masked"
textline " "
bitfld.long 0x00 5. " XPKT_LOST_M ,Interrupt of ISR [5]" "Not masked,Masked"
bitfld.long 0x00 4. " XPKT_OK_M ,Interrupt of ISR [4]" "Not masked,Masked"
textline " "
bitfld.long 0x00 3. " NOTXBUF_M ,Interrupt of ISR [3]" "Not masked,Masked"
bitfld.long 0x00 2. " XPKT_FINISH_M ,Interrupt of ISR [2]" "Not masked,Masked"
textline " "
bitfld.long 0x00 1. " NORXBUF_M ,Interrupt of ISR [1]" "Not masked,Masked"
bitfld.long 0x00 0. " RPKT_FINISH_M ,Interrupt of ISR [0]" "Not masked,Masked"
line.long 0x04 "MAC_MADR1,MAC Most Significant Address Register 1"
hexmask.long.word 0x04 0.--15. 1. " MAC_MADR ,2 bytes of MAC address"
line.long 0x08 "MAC_LADR1,MAC Least Significant Address Register 1"
line.long 0x0c "MAHT0_1,Multicast Address Hash Table 0 Register 1"
line.long 0x10 "MAHT1_1,Multicast Address Hash Table 1 Register 1"
wgroup.long 0x18++0x7
line.long 0x0 "TXPD1,Transmit Poll Demand Register 1"
line.long 0x4 "RXPD1,Receive Poll Demand Register 1"
group.long 0x20++0x7
line.long 0x00 "TXR_BADR1,Transmit Ring Base Address Register 1"
line.long 0x04 "RXR_BADR1,Receive Ring Base Address Register 1"
if (((d.l(ad:(0x90900000+0x88)))&0x40000)==0x40000)
group.long 0x28++0x3
line.long 0x00 "ITC1,Interrupt Timer Control Register 1"
bitfld.long 0x00 15. " TXINT_TIME_SEL ,Period of TX cycle time" "5.12 us,81.92 us"
bitfld.long 0x00 12.--14. " TXINT_THR ,Maximum number of transmit interrupts" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 8.--11. " TXINT_CNT ,Maximum wait time to transmit interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 7. " RXINT_TIME_SEL ,Period of RX cycle time" "5.12 us,81.92 us"
textline " "
bitfld.long 0x00 4.--6. " RXINT_THR ,Maximum number of receive interrupts" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. " RXINT_CNT ,Maximum wait time to receive interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x2c++0x3
line.long 0x00 "APTC1,Automatic Polling Timer Control Register 1"
bitfld.long 0x00 12. " TXPOLL_TIME_SEL ,Period of TX poll time" "5.12 us,81.92 us"
bitfld.long 0x00 8.--11. " TXPOLL_CNT ,Period of transmit automatic polling time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 4. " RXPOLL_TIME_SEL ,Period of RX poll time" "5.12 us,81.92 us"
bitfld.long 0x00 0.--3. " RXPOLL_CNT ,Period of receive automatic" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x28++0x3
line.long 0x00 "ITC1,Interrupt Timer Control Register 1"
bitfld.long 0x00 15. " TXINT_TIME_SEL ,Period of TX cycle time" "51.2 us,819.2 us"
bitfld.long 0x00 12.--14. " TXINT_THR ,Maximum number of transmit interrupts" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 8.--11. " TXINT_CNT ,Maximum wait time to transmit interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 7. " RXINT_TIME_SEL ,Period of RX cycle time" "51.2 us,819.2 us"
textline " "
bitfld.long 0x00 4.--6. " RXINT_THR ,Maximum number of receive interrupts" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. " RXINT_CNT ,Maximum wait time to receive interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x2c++0x3
line.long 0x00 "APTC1,Automatic Polling Timer Control Register 1"
bitfld.long 0x00 12. " TXPOLL_TIME_SEL ,Period of TX poll time" "51.2 us,819.2 us"
bitfld.long 0x00 8.--11. " TXPOLL_CNT ,Period of transmit automatic polling time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 4. " RXPOLL_TIME_SEL ,Period of RX poll time" "51.2 us,819.2 us"
bitfld.long 0x00 0.--3. " RXPOLL_CNT ,Period of receive automatic" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0x30++0x3
line.long 0x00 "DBLAC1,DMA Burst Length and Arbitration Control Register 1"
bitfld.long 0x00 9. " RX_THR_EN ,Enable RX FIFO threshold arbitration" "Disabled,Enabled"
bitfld.long 0x00 6.--8. " RXFIFO_HTHR ,RX FIFO high threshold value" "0,256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes"
textline " "
bitfld.long 0x00 3.--5. " RXFIFO_LTHR ,RX FIFO low threshold value" "0,256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes"
bitfld.long 0x00 2. " INCR16_EN ,Use INCR16 burst command enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " INCR8_EN ,Use INCR8 burst command enable" "Disabled,Enabled"
bitfld.long 0x00 0. " INCR4_EN ,Use INCR4 burst command enable" "Disabled,Enabled"
group.long 0x88++0x3
line.long 0x00 "MACCR1,MAC Control Register 1"
bitfld.long 0x00 18. " SPEED_100 ,Speed mode" "10Mbps,100Mbps"
bitfld.long 0x00 17. " RX_BROADPKT ,Broadcast packet" "Not received,Received"
textline " "
bitfld.long 0x00 16. " RX_MULTIPKT ,Receives all multicast packets" "Not received,Received"
bitfld.long 0x00 15. " FULLDUP ,Full duplex" "Disabled,Enabled"
textline " "
bitfld.long 0x00 14. " CRC_APD ,CRC to transmitted packet" "Not appended,Appended"
bitfld.long 0x00 12. " RCV_ALL ,Incoming packet's destination address" "Checked,Not checked"
textline " "
bitfld.long 0x00 11. " RX_FTL ,Stores incoming packet even if its length is great than 1518 bytes" "Not stored,Stored"
bitfld.long 0x00 10. " RX_RUNT ,Stores incoming packet even if its length is less than 64 bytes" "Not stored ,Stored"
textline " "
bitfld.long 0x00 9. " HT_MULTI_EN ,Store incoming packet" "Disabled,Enabled"
bitfld.long 0x00 8. " RCV_EN ,Receiver" "Disabled,Enabled"
textline " "
bitfld.long 0x00 6. " ENRX_IN_HALFTX ,Packet reception" "Disabled,Enabled"
bitfld.long 0x00 5. " XMT_EN ,Transmitter" "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " CRC_DIS ,CRC check" "Disabled,Enabled"
bitfld.long 0x00 3. " LOOP_EN ,Internal loop-back" "Disabled,Enabled"
textline " "
bitfld.long 0x00 2. " SW_RST ,Software reset" "No reset,Reset"
bitfld.long 0x00 1. " RDMA_EN ,Receive DMA channel" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " XDMA_EN ,Transmit DMA channel" "Disabled,Enabled"
hgroup.long 0x8c++0x3
hide.long 0x00 "MACSR1,MAC Status Register 1"
in
group.long 0x90++0x7
line.long 0x00 "PHYCR1,PHY Control Register 1"
bitfld.long 0x00 27. " MIIWR ,Write sequence to PHY" "Disabled,Enabled"
bitfld.long 0x00 26. " MIIRD ,Read sequence to PHY" "Disabled,Enabled"
textline " "
bitfld.long 0x00 21.--25. " REGAD ,PHY register address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 16.--20. " PHYAD ,PHY address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline " "
hexmask.long.word 0x00 0.--15. 1. " MIIRDATA ,Read data from PHY"
line.long 0x04 "PHYWDATA1,PHY Write Data Register 1"
hexmask.long.word 0x04 0.--15. 1. " MIIWDATA ,Write data to PHY"
hgroup.long 0x98++0x3
hide.long 0x00 "FCR1,Flow Control Register 1"
in
group.long 0x9c++0x0f
line.long 0x00 "BPR1,Back Pressure Register 1"
bitfld.long 0x00 8.--11. " BK_LOW ,RX FIFO free space low threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. " BKJAM_LEN ,Back pressure jam length" "4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,1518 bytes,2048 bytes,4 bytes,4 bytes,4 bytes,4 bytes,4 bytes"
textline " "
bitfld.long 0x00 1. " BK_MODE ,Generate jam pattern" "Any packet,Packet address"
bitfld.long 0x00 0. " BK_EN ,Back pressure mode" "Disabled,Enabled"
line.long 0x04 "WOLCR1,Wake-On-LAN Control Register 1"
bitfld.long 0x04 24.--25. " WOL_TYPE ,WOL output signal type" "High,Low,Positive,Negative"
bitfld.long 0x04 18. " SW_PDNPHY ,Software power down PHY" "No effect,Power down"
textline " "
bitfld.long 0x04 16.--17. " WAKEUP_SEL ,Wake-up frame select" "1,2,3,4"
bitfld.long 0x04 14.--15. " POWER_STATE ,Power state" "D0,D1,D2,D3"
textline " "
bitfld.long 0x04 6. " WAKEUP4_EN ,Wake-up frame 4 event enabled" "Disabled,Enabled"
bitfld.long 0x04 5. " WAKEUP3_EN ,Wake-up frame 3event enabled" "Disabled,Enabled"
textline " "
bitfld.long 0x04 4. " WAKEUP2_EN ,Wake-up frame 2 event enabled" "Disabled,Enabled"
bitfld.long 0x04 3. " WAKEUP1_EN ,Wake-up frame 1 event enabled" "Disabled,Enabled"
textline " "
bitfld.long 0x04 2. " MAGICPKT_EN ,Magic packet " "Disabled,Enabled"
bitfld.long 0x04 1. " LINKCHG1_EN ,Link change to 1" "Disabled,Enabled"
textline " "
bitfld.long 0x04 0. " LINKCHG0_EN ,Link change to 0" "Disabled,Enabled"
line.long 0x08 "WOLSR1,Wake-On-LAN Status Register1"
eventfld.long 0x08 6. " WAKEUP4_STS ,Wake-up frame 4" "Low,High"
eventfld.long 0x08 5. " WAKEUP3_STS ,Wake-up frame 3" "Low,High"
textline " "
eventfld.long 0x08 4. " WAKEUP2_STS ,Wake-up frame 2" "Low,High"
eventfld.long 0x08 3. " WAKEUP1_STS ,Wake-up frame 1" "Low,High"
textline " "
eventfld.long 0x08 2. " MAGICPKT_STS ,Magic packet" "Low,High"
eventfld.long 0x08 1. " LINKCHG1_STS ,Link change to 1" "Low,High"
textline " "
eventfld.long 0x08 0. " LINKCHG0_STS ,Link change to 0" "Low,High"
line.long 0x0c "WFCRC1,Wake-up Frame CRC Register 1"
group.long 0xb0++0xf
line.long 0x00 "WFBM1_1,Wake-up Frame Byte Mask 1st Double Word Register 1"
bitfld.long 0x00 31. " WFBM1[32] ,Wake-up frame byte 32 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 30. " WFBM1[31] ,Wake-up frame byte 31 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 29. " WFBM1[30] ,Wake-up frame byte 30 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 28. " WFBM1[29] ,Wake-up frame byte 29 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 27. " WFBM1[28] ,Wake-up frame byte 28 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 26. " WFBM1[27] ,Wake-up frame byte 27 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 25. " WFBM1[26] ,Wake-up frame byte 26 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 24. " WFBM1[25] ,Wake-up frame byte 25 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 23. " WFBM1[24] ,Wake-up frame byte 24 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 22. " WFBM1[23] ,Wake-up frame byte 23 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 21. " WFBM1[22] ,Wake-up frame byte 22 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 20. " WFBM1[21] ,Wake-up frame byte 21 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 19. " WFBM1[20] ,Wake-up frame byte 20 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 18. " WFBM1[19] ,Wake-up frame byte 19 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 17. " WFBM1[18] ,Wake-up frame byte 18 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 16. " WFBM1[17] ,Wake-up frame byte 17 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 15. " WFBM1[16] ,Wake-up frame byte 16 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 14. " WFBM1[15] ,Wake-up frame byte 15 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 13. " WFBM1[14] ,Wake-up frame byte 14 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 12. " WFBM1[13] ,Wake-up frame byte 13 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 11. " WFBM1[12] ,Wake-up frame byte 12 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 10. " WFBM1[11] ,Wake-up frame byte 11 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 9. " WFBM1[10] ,Wake-up frame byte 10 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 8. " WFBM1[9] ,Wake-up frame byte 9 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 7. " WFBM1[8] ,Wake-up frame byte 8 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 6. " WFBM1[7] ,Wake-up frame byte 7 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 5. " WFBM1[6] ,Wake-up frame byte 6 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 4. " WFBM1[5] ,Wake-up frame byte 5 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 3. " WFBM1[4] ,Wake-up frame byte 4 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 2. " WFBM1[3] ,Wake-up frame byte 3 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 1. " WFBM1[2] ,Wake-up frame byte 2 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 0. " WFBM1[1] ,Wake-up frame byte 1 mask 1st double word" "Not masked,Masked"
line.long 0x04 "WFBM2_1,Wake-up Frame Byte Mask 2nd Double Word Register 1"
bitfld.long 0x04 31. " WFBM2[64] ,Wake-up frame byte 64 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 30. " WFBM2[63] ,Wake-up frame byte 63 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 29. " WFBM2[62] ,Wake-up frame byte 62 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 28. " WFBM2[61] ,Wake-up frame byte 61 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 27. " WFBM2[60] ,Wake-up frame byte 60 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 26. " WFBM2[59] ,Wake-up frame byte 59 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 25. " WFBM2[58] ,Wake-up frame byte 58 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 24. " WFBM2[57] ,Wake-up frame byte 57 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 23. " WFBM2[56] ,Wake-up frame byte 56 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 22. " WFBM2[55] ,Wake-up frame byte 55 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 21. " WFBM2[54] ,Wake-up frame byte 54 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 20. " WFBM2[53] ,Wake-up frame byte 53 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 19. " WFBM2[52] ,Wake-up frame byte 52 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 18. " WFBM2[51] ,Wake-up frame byte 51 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 17. " WFBM2[50] ,Wake-up frame byte 50 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 16. " WFBM2[49] ,Wake-up frame byte 49 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 15. " WFBM2[48] ,Wake-up frame byte 48 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 14. " WFBM2[47] ,Wake-up frame byte 47 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 13. " WFBM2[46] ,Wake-up frame byte 46 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 12. " WFBM2[45] ,Wake-up frame byte 45 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 11. " WFBM2[44] ,Wake-up frame byte 44 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 10. " WFBM2[43] ,Wake-up frame byte 43 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 9. " WFBM2[42] ,Wake-up frame byte 42 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 8. " WFBM2[41] ,Wake-up frame byte 41 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 7. " WFBM2[40] ,Wake-up frame byte 40 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 6. " WFBM2[39] ,Wake-up frame byte 39 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 5. " WFBM2[38] ,Wake-up frame byte 38 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 4. " WFBM2[37] ,Wake-up frame byte 37 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 3. " WFBM2[36] ,Wake-up frame byte 36 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 2. " WFBM2[35] ,Wake-up frame byte 35 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 1. " WFBM2[34] ,Wake-up frame byte 34 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 0. " WFBM2[33] ,Wake-up frame byte 33 mask 2st double word" "Not masked,Masked"
line.long 0x08 "WFBM3_1,Wake-up Frame Byte Mask 3rd Double Word Register 1"
bitfld.long 0x08 31. " WFBM3[96] ,Wake-up frame byte 96 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 30. " WFBM3[95] ,Wake-up frame byte 95 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 29. " WFBM3[94] ,Wake-up frame byte 94 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 28. " WFBM3[93] ,Wake-up frame byte 93 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 27. " WFBM3[92] ,Wake-up frame byte 92 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 26. " WFBM3[91] ,Wake-up frame byte 91 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 25. " WFBM3[90] ,Wake-up frame byte 90 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 24. " WFBM3[89] ,Wake-up frame byte 89 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 23. " WFBM3[88] ,Wake-up frame byte 88 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 22. " WFBM3[87] ,Wake-up frame byte 87 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 21. " WFBM3[86] ,Wake-up frame byte 86 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 20. " WFBM3[85] ,Wake-up frame byte 85 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 19. " WFBM3[84] ,Wake-up frame byte 84 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 18. " WFBM3[83] ,Wake-up frame byte 83 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 17. " WFBM3[82] ,Wake-up frame byte 82 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 16. " WFBM3[81] ,Wake-up frame byte 81 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 15. " WFBM3[80] ,Wake-up frame byte 80 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 14. " WFBM3[79] ,Wake-up frame byte 79 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 13. " WFBM3[78] ,Wake-up frame byte 78 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 12. " WFBM3[77] ,Wake-up frame byte 77 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 11. " WFBM3[76] ,Wake-up frame byte 76 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 10. " WFBM3[75] ,Wake-up frame byte 75 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 9. " WFBM3[74] ,Wake-up frame byte 74 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 8. " WFBM3[73] ,Wake-up frame byte 73 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 7. " WFBM3[72] ,Wake-up frame byte 72 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 6. " WFBM3[71] ,Wake-up frame byte 71 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 5. " WFBM3[70] ,Wake-up frame byte 70 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 4. " WFBM3[69] ,Wake-up frame byte 69 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 3. " WFBM3[68] ,Wake-up frame byte 68 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 2. " WFBM3[67] ,Wake-up frame byte 67 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 1. " WFBM3[66] ,Wake-up frame byte 66 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 0. " WFBM3[65] ,Wake-up frame byte 65 mask 3st double word" "Not masked,Masked"
line.long 0x0c "WFBM4_1,Wake-up Frame Byte Mask 4th Double Word Register 1"
bitfld.long 0x0c 31. " WFBM4[128] ,Wake-up frame byte 128 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 30. " WFBM4[127] ,Wake-up frame byte 127 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 29. " WFBM4[126] ,Wake-up frame byte 126 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 28. " WFBM4[125] ,Wake-up frame byte 125 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 27. " WFBM4[124] ,Wake-up frame byte 124 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 26. " WFBM4[123] ,Wake-up frame byte 123 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 25. " WFBM4[122] ,Wake-up frame byte 122 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 24. " WFBM4[121] ,Wake-up frame byte 121 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 23. " WFBM4[120] ,Wake-up frame byte 120 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 22. " WFBM4[119] ,Wake-up frame byte 119 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 21. " WFBM4[118] ,Wake-up frame byte 118 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 20. " WFBM4[117] ,Wake-up frame byte 117 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 19. " WFBM4[116] ,Wake-up frame byte 116 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 18. " WFBM4[115] ,Wake-up frame byte 115 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 17. " WFBM4[114] ,Wake-up frame byte 114 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 16. " WFBM4[113] ,Wake-up frame byte 113 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 15. " WFBM4[112] ,Wake-up frame byte 112 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 14. " WFBM4[111] ,Wake-up frame byte 111 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 13. " WFBM4[110] ,Wake-up frame byte 110 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 12. " WFBM4[109] ,Wake-up frame byte 109 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 11. " WFBM4[108] ,Wake-up frame byte 108 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 10. " WFBM4[107] ,Wake-up frame byte 107 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 9. " WFBM4[106] ,Wake-up frame byte 106 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 8. " WFBM4[105] ,Wake-up frame byte 105 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 7. " WFBM4[104] ,Wake-up frame byte 104 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 6. " WFBM4[103] ,Wake-up frame byte 103 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 5. " WFBM4[102] ,Wake-up frame byte 102 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 4. " WFBM4[101] ,Wake-up frame byte 101 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 3. " WFBM4[100] ,Wake-up frame byte 100 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 2. " WFBM4[99] ,Wake-up frame byte 99 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 1. " WFBM4[98] ,Wake-up frame byte 98 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 0. " WFBM4[97] ,Wake-up frame byte 97 mask 4st double word" "Not masked,Masked"
group.long 0xc4++0x3
line.long 0x00 "TS1,Test Seed Register 1"
hexmask.long.word 0x00 0.--13. 1. " Test_seed ,Test seed"
rgroup.long 0xc8++0x3
line.long 0x00 "DMAFIFOS1,DMA/FIFO State Register 1"
bitfld.long 0x00 31. " TXD_REQ ,TXDMA request" "Not requested,Requested"
bitfld.long 0x00 30. " RXD_REQ ,RXDMA request" "Not requested,Requested"
textline " "
bitfld.long 0x00 29. " DARB_TXGNT ,TXDMA grant" "Not granted,Granted"
bitfld.long 0x00 28. " DARB_RXGNT ,RXDMA grant" "Not granted,Granted"
textline " "
bitfld.long 0x00 27. " TXFIFO_EMPTY ,TX FIFO is empty" "Not empty,Empty"
bitfld.long 0x00 26. " RXFIFO_EMPTY ,RX FIFO is empty" "Not empty,Empty"
textline " "
bitfld.long 0x00 12.--14. " TXDMA2_SM ,TXDMA2_SM" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--11. " TXDMA1_SM ,TXDMA 1 state machine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 4.--6. " RXDMA2_SM ,RXDMA 2 state machine" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. " RXDMA1_SM ,RXDMA 1 state machine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xcc++0x3
line.long 0x00 "TM1,Test Mode Register 1"
bitfld.long 0x00 26. " SINGLE_PKT ,Single packet mode" "Disabled,Enabled"
bitfld.long 0x00 25. " PTIMER_TEST ,Automatic polling timer test mode" "Disabled,Enabled"
textline " "
bitfld.long 0x00 24. " ITIMER_TEST ,Interrupt timer test mode" "Disabled,Enabled"
bitfld.long 0x00 22. " TEST_SEED_SEL ,Test seed select" "Test_seed in TS used,14 bits of MAC_LADR used"
textline " "
bitfld.long 0x00 21. " SEED_SEL ,Seed select" "External data,Internal counter"
bitfld.long 0x00 20. " TEST_MODE ,Transmission test mode" "Disabled,Enabled"
textline " "
hexmask.long.word 0x00 10.--19. 1. " TEST_TIME ,Transmission back off time test"
bitfld.long 0x00 5.--9. " TEST_EXCEL ,Excessive collision test for transmission" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long 0xd4++0x27
line.long 0x00 "TX_MCOL1,TX_MCOL and TX_SCOL Counter Register"
hexmask.long.word 0x00 16.--31. 1. " TX_MCOL ,Packets transmitted OK with 2-15 collisions"
hexmask.long.word 0x00 0.--15. 1. " TX_SCOL ,Packets transmitted OK with single collision"
line.long 0x04 "RPF1,RPF and AEP Counter Register"
hexmask.long.word 0x04 16.--31. 1. " RPF ,Receive pause frame counter"
hexmask.long.word 0x04 0.--15. 1. " AEP ,Counter for counting packets with alignment error"
line.long 0x08 "XMPG1,XM and PG Counter Register"
hexmask.long.word 0x08 16.--31. 1. " XM ,Packets failed in transmission(late collision or collision count >=16)"
hexmask.long.word 0x08 0.--15. 1. " PG ,Packets failed in transmission(collision count >=16)"
line.long 0x0c "RUNT_CNT1,RUNT_CNT and TLCC Counter Register 1"
hexmask.long.word 0x0c 16.--31. 1. " RUNT_CNT ,Received runt packets"
hexmask.long.word 0x0c 0.--15. 1. " TLCC ,Late collision"
line.long 0x10 "CRCER_CNT1,CRCER_CNT and FTL_CNT Counter Register 1"
hexmask.long.word 0x10 16.--31. 1. " CRCER_CNT ,CRC error packet"
hexmask.long.word 0x10 0.--15. 1. " FTL_CNT ,Receive FTL packets"
line.long 0x14 "RLC1,RLC and RCC Counter Register 1"
hexmask.long.word 0x14 16.--31. 1. " RLC ,Loss of received packets"
hexmask.long.word 0x14 0.--15. 1. " RCC ,Receive collision"
line.long 0x18 "BROC1,BROC Counter Register 1"
line.long 0x1c "MULCA1,MULCA Counter Register 1"
line.long 0x20 "RP1,RP Counter Register 1"
line.long 0x24 "XP1,XP Counter Register 1"
width 11.
tree.end
tree "EMAC2"
base ad:0x90700000
width 11.
hgroup.long 0x00++0x3
hide.long 0x00 "ISR2,Interrupt Status Register 2"
in
group.long 0x4++0x13
line.long 0x00 "IMR2,Interrupt Mask Register 2"
bitfld.long 0x00 9. " PHYSTS_CHG_M ,Interrupt of ISR [9]" "Not masked,Masked"
bitfld.long 0x00 8. " AHB_ERR_M ,Interrupt of ISR [8]" "Not masked,Masked"
textline " "
bitfld.long 0x00 7. " RPKT_LOST_M ,Interrupt of ISR [7]" "Not masked,Masked"
bitfld.long 0x00 6. " RPKT_SAV_M ,Interrupt of ISR [6]" "Not masked,Masked"
textline " "
bitfld.long 0x00 5. " XPKT_LOST_M ,Interrupt of ISR [5]" "Not masked,Masked"
bitfld.long 0x00 4. " XPKT_OK_M ,Interrupt of ISR [4]" "Not masked,Masked"
textline " "
bitfld.long 0x00 3. " NOTXBUF_M ,Interrupt of ISR [3]" "Not masked,Masked"
bitfld.long 0x00 2. " XPKT_FINISH_M ,Interrupt of ISR [2]" "Not masked,Masked"
textline " "
bitfld.long 0x00 1. " NORXBUF_M ,Interrupt of ISR [1]" "Not masked,Masked"
bitfld.long 0x00 0. " RPKT_FINISH_M ,Interrupt of ISR [0]" "Not masked,Masked"
line.long 0x04 "MAC_MADR2,MAC Most Significant Address Register 2"
hexmask.long.word 0x04 0.--15. 1. " MAC_MADR ,2 bytes of MAC address"
line.long 0x08 "MAC_LADR2,MAC Least Significant Address Register 2"
line.long 0x0c "MAHT0_2,Multicast Address Hash Table 0 Register 2"
line.long 0x10 "MAHT1_2,Multicast Address Hash Table 1 Register 2"
wgroup.long 0x18++0x7
line.long 0x0 "TXPD2,Transmit Poll Demand Register 2"
line.long 0x4 "RXPD2,Receive Poll Demand Register 2"
group.long 0x20++0x7
line.long 0x00 "TXR_BADR2,Transmit Ring Base Address Register 2"
line.long 0x04 "RXR_BADR2,Receive Ring Base Address Register 2"
if (((d.l(ad:(0x90700000+0x88)))&0x40000)==0x40000)
group.long 0x28++0x3
line.long 0x00 "ITC2,Interrupt Timer Control Register 2"
bitfld.long 0x00 15. " TXINT_TIME_SEL ,Period of TX cycle time" "5.12 us,81.92 us"
bitfld.long 0x00 12.--14. " TXINT_THR ,Maximum number of transmit interrupts" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 8.--11. " TXINT_CNT ,Maximum wait time to transmit interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 7. " RXINT_TIME_SEL ,Period of RX cycle time" "5.12 us,81.92 us"
textline " "
bitfld.long 0x00 4.--6. " RXINT_THR ,Maximum number of receive interrupts" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. " RXINT_CNT ,Maximum wait time to receive interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x2c++0x3
line.long 0x00 "APTC2,Automatic Polling Timer Control Register 2"
bitfld.long 0x00 12. " TXPOLL_TIME_SEL ,Period of TX poll time" "5.12 us,81.92 us"
bitfld.long 0x00 8.--11. " TXPOLL_CNT ,Period of transmit automatic polling time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 4. " RXPOLL_TIME_SEL ,Period of RX poll time" "5.12 us,81.92 us"
bitfld.long 0x00 0.--3. " RXPOLL_CNT ,Period of receive automatic" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x28++0x3
line.long 0x00 "ITC2,Interrupt Timer Control Register 2"
bitfld.long 0x00 15. " TXINT_TIME_SEL ,Period of TX cycle time" "51.2 us,819.2 us"
bitfld.long 0x00 12.--14. " TXINT_THR ,Maximum number of transmit interrupts" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 8.--11. " TXINT_CNT ,Maximum wait time to transmit interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 7. " RXINT_TIME_SEL ,Period of RX cycle time" "51.2 us,819.2 us"
textline " "
bitfld.long 0x00 4.--6. " RXINT_THR ,Maximum number of receive interrupts" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. " RXINT_CNT ,Maximum wait time to receive interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x2c++0x3
line.long 0x00 "APTC2,Automatic Polling Timer Control Register 2"
bitfld.long 0x00 12. " TXPOLL_TIME_SEL ,Period of TX poll time" "51.2 us,819.2 us"
bitfld.long 0x00 8.--11. " TXPOLL_CNT ,Period of transmit automatic polling time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 4. " RXPOLL_TIME_SEL ,Period of RX poll time" "51.2 us,819.2 us"
bitfld.long 0x00 0.--3. " RXPOLL_CNT ,Period of receive automatic" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0x30++0x3
line.long 0x00 "DBLAC2,DMA Burst Length and Arbitration Control Register 2"
bitfld.long 0x00 9. " RX_THR_EN ,Enable RX FIFO threshold arbitration" "Disabled,Enabled"
bitfld.long 0x00 6.--8. " RXFIFO_HTHR ,RX FIFO high threshold value" "0,256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes"
textline " "
bitfld.long 0x00 3.--5. " RXFIFO_LTHR ,RX FIFO low threshold value" "0,256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes"
bitfld.long 0x00 2. " INCR16_EN ,Use INCR16 burst command enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " INCR8_EN ,Use INCR8 burst command enable" "Disabled,Enabled"
bitfld.long 0x00 0. " INCR4_EN ,Use INCR4 burst command enable" "Disabled,Enabled"
group.long 0x88++0x3
line.long 0x00 "MACCR2,MAC Control Register 2"
bitfld.long 0x00 18. " SPEED_100 ,Speed mode" "10Mbps,100Mbps"
bitfld.long 0x00 17. " RX_BROADPKT ,Broadcast packet" "Not received,Received"
textline " "
bitfld.long 0x00 16. " RX_MULTIPKT ,Receives all multicast packets" "Not received,Received"
bitfld.long 0x00 15. " FULLDUP ,Full duplex" "Disabled,Enabled"
textline " "
bitfld.long 0x00 14. " CRC_APD ,CRC to transmitted packet" "Not appended,Appended"
bitfld.long 0x00 12. " RCV_ALL ,Incoming packet's destination address" "Checked,Not checked"
textline " "
bitfld.long 0x00 11. " RX_FTL ,Stores incoming packet even if its length is great than 1518 bytes" "Not stored,Stored"
bitfld.long 0x00 10. " RX_RUNT ,Stores incoming packet even if its length is less than 64 bytes" "Not stored ,Stored"
textline " "
bitfld.long 0x00 9. " HT_MULTI_EN ,Store incoming packet" "Disabled,Enabled"
bitfld.long 0x00 8. " RCV_EN ,Receiver" "Disabled,Enabled"
textline " "
bitfld.long 0x00 6. " ENRX_IN_HALFTX ,Packet reception" "Disabled,Enabled"
bitfld.long 0x00 5. " XMT_EN ,Transmitter" "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " CRC_DIS ,CRC check" "Disabled,Enabled"
bitfld.long 0x00 3. " LOOP_EN ,Internal loop-back" "Disabled,Enabled"
textline " "
bitfld.long 0x00 2. " SW_RST ,Software reset" "No reset,Reset"
bitfld.long 0x00 1. " RDMA_EN ,Receive DMA channel" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " XDMA_EN ,Transmit DMA channel" "Disabled,Enabled"
hgroup.long 0x8c++0x3
hide.long 0x00 "MACSR2,MAC Status Register 2"
in
group.long 0x90++0x7
line.long 0x00 "PHYCR2,PHY Control Register 2"
bitfld.long 0x00 27. " MIIWR ,Write sequence to PHY" "Disabled,Enabled"
bitfld.long 0x00 26. " MIIRD ,Read sequence to PHY" "Disabled,Enabled"
textline " "
bitfld.long 0x00 21.--25. " REGAD ,PHY register address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 16.--20. " PHYAD ,PHY address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline " "
hexmask.long.word 0x00 0.--15. 1. " MIIRDATA ,Read data from PHY"
line.long 0x04 "PHYWDATA2,PHY Write Data Register 2"
hexmask.long.word 0x04 0.--15. 1. " MIIWDATA ,Write data to PHY"
hgroup.long 0x98++0x3
hide.long 0x00 "FCR2,Flow Control Register 2"
in
group.long 0x9c++0x0f
line.long 0x00 "BPR2,Back Pressure Register 2"
bitfld.long 0x00 8.--11. " BK_LOW ,RX FIFO free space low threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. " BKJAM_LEN ,Back pressure jam length" "4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,1518 bytes,2048 bytes,4 bytes,4 bytes,4 bytes,4 bytes,4 bytes"
textline " "
bitfld.long 0x00 1. " BK_MODE ,Generate jam pattern" "Any packet,Packet address"
bitfld.long 0x00 0. " BK_EN ,Back pressure mode" "Disabled,Enabled"
line.long 0x04 "WOLCR2,Wake-On-LAN Control Register 2"
bitfld.long 0x04 24.--25. " WOL_TYPE ,WOL output signal type" "High,Low,Positive,Negative"
bitfld.long 0x04 18. " SW_PDNPHY ,Software power down PHY" "No effect,Power down"
textline " "
bitfld.long 0x04 16.--17. " WAKEUP_SEL ,Wake-up frame select" "1,2,3,4"
bitfld.long 0x04 14.--15. " POWER_STATE ,Power state" "D0,D1,D2,D3"
textline " "
bitfld.long 0x04 6. " WAKEUP4_EN ,Wake-up frame 4 event enabled" "Disabled,Enabled"
bitfld.long 0x04 5. " WAKEUP3_EN ,Wake-up frame 3event enabled" "Disabled,Enabled"
textline " "
bitfld.long 0x04 4. " WAKEUP2_EN ,Wake-up frame 2 event enabled" "Disabled,Enabled"
bitfld.long 0x04 3. " WAKEUP1_EN ,Wake-up frame 1 event enabled" "Disabled,Enabled"
textline " "
bitfld.long 0x04 2. " MAGICPKT_EN ,Magic packet " "Disabled,Enabled"
bitfld.long 0x04 1. " LINKCHG1_EN ,Link change to 1" "Disabled,Enabled"
textline " "
bitfld.long 0x04 0. " LINKCHG0_EN ,Link change to 0" "Disabled,Enabled"
line.long 0x08 "WOLSR2,Wake-On-LAN Status Register2"
eventfld.long 0x08 6. " WAKEUP4_STS ,Wake-up frame 4" "Low,High"
eventfld.long 0x08 5. " WAKEUP3_STS ,Wake-up frame 3" "Low,High"
textline " "
eventfld.long 0x08 4. " WAKEUP2_STS ,Wake-up frame 2" "Low,High"
eventfld.long 0x08 3. " WAKEUP1_STS ,Wake-up frame 1" "Low,High"
textline " "
eventfld.long 0x08 2. " MAGICPKT_STS ,Magic packet" "Low,High"
eventfld.long 0x08 1. " LINKCHG1_STS ,Link change to 1" "Low,High"
textline " "
eventfld.long 0x08 0. " LINKCHG0_STS ,Link change to 0" "Low,High"
line.long 0x0c "WFCRC2,Wake-up Frame CRC Register 2"
group.long 0xb0++0xf
line.long 0x00 "WFBM1_2,Wake-up Frame Byte Mask 1st Double Word Register 2"
bitfld.long 0x00 31. " WFBM1[32] ,Wake-up frame byte 32 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 30. " WFBM1[31] ,Wake-up frame byte 31 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 29. " WFBM1[30] ,Wake-up frame byte 30 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 28. " WFBM1[29] ,Wake-up frame byte 29 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 27. " WFBM1[28] ,Wake-up frame byte 28 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 26. " WFBM1[27] ,Wake-up frame byte 27 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 25. " WFBM1[26] ,Wake-up frame byte 26 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 24. " WFBM1[25] ,Wake-up frame byte 25 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 23. " WFBM1[24] ,Wake-up frame byte 24 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 22. " WFBM1[23] ,Wake-up frame byte 23 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 21. " WFBM1[22] ,Wake-up frame byte 22 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 20. " WFBM1[21] ,Wake-up frame byte 21 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 19. " WFBM1[20] ,Wake-up frame byte 20 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 18. " WFBM1[19] ,Wake-up frame byte 19 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 17. " WFBM1[18] ,Wake-up frame byte 18 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 16. " WFBM1[17] ,Wake-up frame byte 17 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 15. " WFBM1[16] ,Wake-up frame byte 16 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 14. " WFBM1[15] ,Wake-up frame byte 15 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 13. " WFBM1[14] ,Wake-up frame byte 14 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 12. " WFBM1[13] ,Wake-up frame byte 13 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 11. " WFBM1[12] ,Wake-up frame byte 12 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 10. " WFBM1[11] ,Wake-up frame byte 11 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 9. " WFBM1[10] ,Wake-up frame byte 10 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 8. " WFBM1[9] ,Wake-up frame byte 9 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 7. " WFBM1[8] ,Wake-up frame byte 8 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 6. " WFBM1[7] ,Wake-up frame byte 7 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 5. " WFBM1[6] ,Wake-up frame byte 6 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 4. " WFBM1[5] ,Wake-up frame byte 5 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 3. " WFBM1[4] ,Wake-up frame byte 4 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 2. " WFBM1[3] ,Wake-up frame byte 3 mask 1st double word" "Not masked,Masked"
textline " "
bitfld.long 0x00 1. " WFBM1[2] ,Wake-up frame byte 2 mask 1st double word" "Not masked,Masked"
bitfld.long 0x00 0. " WFBM1[1] ,Wake-up frame byte 1 mask 1st double word" "Not masked,Masked"
line.long 0x04 "WFBM2_2,Wake-up Frame Byte Mask 2nd Double Word Register 2"
bitfld.long 0x04 31. " WFBM2[64] ,Wake-up frame byte 64 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 30. " WFBM2[63] ,Wake-up frame byte 63 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 29. " WFBM2[62] ,Wake-up frame byte 62 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 28. " WFBM2[61] ,Wake-up frame byte 61 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 27. " WFBM2[60] ,Wake-up frame byte 60 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 26. " WFBM2[59] ,Wake-up frame byte 59 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 25. " WFBM2[58] ,Wake-up frame byte 58 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 24. " WFBM2[57] ,Wake-up frame byte 57 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 23. " WFBM2[56] ,Wake-up frame byte 56 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 22. " WFBM2[55] ,Wake-up frame byte 55 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 21. " WFBM2[54] ,Wake-up frame byte 54 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 20. " WFBM2[53] ,Wake-up frame byte 53 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 19. " WFBM2[52] ,Wake-up frame byte 52 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 18. " WFBM2[51] ,Wake-up frame byte 51 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 17. " WFBM2[50] ,Wake-up frame byte 50 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 16. " WFBM2[49] ,Wake-up frame byte 49 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 15. " WFBM2[48] ,Wake-up frame byte 48 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 14. " WFBM2[47] ,Wake-up frame byte 47 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 13. " WFBM2[46] ,Wake-up frame byte 46 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 12. " WFBM2[45] ,Wake-up frame byte 45 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 11. " WFBM2[44] ,Wake-up frame byte 44 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 10. " WFBM2[43] ,Wake-up frame byte 43 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 9. " WFBM2[42] ,Wake-up frame byte 42 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 8. " WFBM2[41] ,Wake-up frame byte 41 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 7. " WFBM2[40] ,Wake-up frame byte 40 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 6. " WFBM2[39] ,Wake-up frame byte 39 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 5. " WFBM2[38] ,Wake-up frame byte 38 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 4. " WFBM2[37] ,Wake-up frame byte 37 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 3. " WFBM2[36] ,Wake-up frame byte 36 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 2. " WFBM2[35] ,Wake-up frame byte 35 mask 2st double word" "Not masked,Masked"
textline " "
bitfld.long 0x04 1. " WFBM2[34] ,Wake-up frame byte 34 mask 2st double word" "Not masked,Masked"
bitfld.long 0x04 0. " WFBM2[33] ,Wake-up frame byte 33 mask 2st double word" "Not masked,Masked"
line.long 0x08 "WFBM3_2,Wake-up Frame Byte Mask 3rd Double Word Register 2"
bitfld.long 0x08 31. " WFBM3[96] ,Wake-up frame byte 96 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 30. " WFBM3[95] ,Wake-up frame byte 95 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 29. " WFBM3[94] ,Wake-up frame byte 94 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 28. " WFBM3[93] ,Wake-up frame byte 93 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 27. " WFBM3[92] ,Wake-up frame byte 92 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 26. " WFBM3[91] ,Wake-up frame byte 91 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 25. " WFBM3[90] ,Wake-up frame byte 90 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 24. " WFBM3[89] ,Wake-up frame byte 89 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 23. " WFBM3[88] ,Wake-up frame byte 88 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 22. " WFBM3[87] ,Wake-up frame byte 87 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 21. " WFBM3[86] ,Wake-up frame byte 86 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 20. " WFBM3[85] ,Wake-up frame byte 85 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 19. " WFBM3[84] ,Wake-up frame byte 84 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 18. " WFBM3[83] ,Wake-up frame byte 83 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 17. " WFBM3[82] ,Wake-up frame byte 82 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 16. " WFBM3[81] ,Wake-up frame byte 81 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 15. " WFBM3[80] ,Wake-up frame byte 80 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 14. " WFBM3[79] ,Wake-up frame byte 79 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 13. " WFBM3[78] ,Wake-up frame byte 78 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 12. " WFBM3[77] ,Wake-up frame byte 77 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 11. " WFBM3[76] ,Wake-up frame byte 76 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 10. " WFBM3[75] ,Wake-up frame byte 75 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 9. " WFBM3[74] ,Wake-up frame byte 74 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 8. " WFBM3[73] ,Wake-up frame byte 73 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 7. " WFBM3[72] ,Wake-up frame byte 72 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 6. " WFBM3[71] ,Wake-up frame byte 71 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 5. " WFBM3[70] ,Wake-up frame byte 70 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 4. " WFBM3[69] ,Wake-up frame byte 69 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 3. " WFBM3[68] ,Wake-up frame byte 68 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 2. " WFBM3[67] ,Wake-up frame byte 67 mask 3st double word" "Not masked,Masked"
textline " "
bitfld.long 0x08 1. " WFBM3[66] ,Wake-up frame byte 66 mask 3st double word" "Not masked,Masked"
bitfld.long 0x08 0. " WFBM3[65] ,Wake-up frame byte 65 mask 3st double word" "Not masked,Masked"
line.long 0x0c "WFBM4_2,Wake-up Frame Byte Mask 4th Double Word Register 2"
bitfld.long 0x0c 31. " WFBM4[128] ,Wake-up frame byte 128 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 30. " WFBM4[127] ,Wake-up frame byte 127 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 29. " WFBM4[126] ,Wake-up frame byte 126 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 28. " WFBM4[125] ,Wake-up frame byte 125 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 27. " WFBM4[124] ,Wake-up frame byte 124 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 26. " WFBM4[123] ,Wake-up frame byte 123 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 25. " WFBM4[122] ,Wake-up frame byte 122 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 24. " WFBM4[121] ,Wake-up frame byte 121 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 23. " WFBM4[120] ,Wake-up frame byte 120 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 22. " WFBM4[119] ,Wake-up frame byte 119 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 21. " WFBM4[118] ,Wake-up frame byte 118 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 20. " WFBM4[117] ,Wake-up frame byte 117 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 19. " WFBM4[116] ,Wake-up frame byte 116 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 18. " WFBM4[115] ,Wake-up frame byte 115 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 17. " WFBM4[114] ,Wake-up frame byte 114 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 16. " WFBM4[113] ,Wake-up frame byte 113 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 15. " WFBM4[112] ,Wake-up frame byte 112 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 14. " WFBM4[111] ,Wake-up frame byte 111 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 13. " WFBM4[110] ,Wake-up frame byte 110 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 12. " WFBM4[109] ,Wake-up frame byte 109 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 11. " WFBM4[108] ,Wake-up frame byte 108 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 10. " WFBM4[107] ,Wake-up frame byte 107 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 9. " WFBM4[106] ,Wake-up frame byte 106 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 8. " WFBM4[105] ,Wake-up frame byte 105 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 7. " WFBM4[104] ,Wake-up frame byte 104 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 6. " WFBM4[103] ,Wake-up frame byte 103 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 5. " WFBM4[102] ,Wake-up frame byte 102 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 4. " WFBM4[101] ,Wake-up frame byte 101 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 3. " WFBM4[100] ,Wake-up frame byte 100 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 2. " WFBM4[99] ,Wake-up frame byte 99 mask 4st double word" "Not masked,Masked"
textline " "
bitfld.long 0x0c 1. " WFBM4[98] ,Wake-up frame byte 98 mask 4st double word" "Not masked,Masked"
bitfld.long 0x0c 0. " WFBM4[97] ,Wake-up frame byte 97 mask 4st double word" "Not masked,Masked"
group.long 0xc4++0x3
line.long 0x00 "TS2,Test Seed Register 2"
hexmask.long.word 0x00 0.--13. 1. " Test_seed ,Test seed"
rgroup.long 0xc8++0x3
line.long 0x00 "DMAFIFOS2,DMA/FIFO State Register 2"
bitfld.long 0x00 31. " TXD_REQ ,TXDMA request" "Not requested,Requested"
bitfld.long 0x00 30. " RXD_REQ ,RXDMA request" "Not requested,Requested"
textline " "
bitfld.long 0x00 29. " DARB_TXGNT ,TXDMA grant" "Not granted,Granted"
bitfld.long 0x00 28. " DARB_RXGNT ,RXDMA grant" "Not granted,Granted"
textline " "
bitfld.long 0x00 27. " TXFIFO_EMPTY ,TX FIFO is empty" "Not empty,Empty"
bitfld.long 0x00 26. " RXFIFO_EMPTY ,RX FIFO is empty" "Not empty,Empty"
textline " "
bitfld.long 0x00 12.--14. " TXDMA2_SM ,TXDMA2_SM" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--11. " TXDMA1_SM ,TXDMA 1 state machine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 4.--6. " RXDMA2_SM ,RXDMA 2 state machine" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. " RXDMA1_SM ,RXDMA 1 state machine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xcc++0x3
line.long 0x00 "TM2,Test Mode Register 2"
bitfld.long 0x00 26. " SINGLE_PKT ,Single packet mode" "Disabled,Enabled"
bitfld.long 0x00 25. " PTIMER_TEST ,Automatic polling timer test mode" "Disabled,Enabled"
textline " "
bitfld.long 0x00 24. " ITIMER_TEST ,Interrupt timer test mode" "Disabled,Enabled"
bitfld.long 0x00 22. " TEST_SEED_SEL ,Test seed select" "Test_seed in TS used,14 bits of MAC_LADR used"
textline " "
bitfld.long 0x00 21. " SEED_SEL ,Seed select" "External data,Internal counter"
bitfld.long 0x00 20. " TEST_MODE ,Transmission test mode" "Disabled,Enabled"
textline " "
hexmask.long.word 0x00 10.--19. 1. " TEST_TIME ,Transmission back off time test"
bitfld.long 0x00 5.--9. " TEST_EXCEL ,Excessive collision test for transmission" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long 0xd4++0x27
line.long 0x00 "TX_MCOL2,TX_MCOL and TX_SCOL Counter Register"
hexmask.long.word 0x00 16.--31. 1. " TX_MCOL ,Packets transmitted OK with 2-15 collisions"
hexmask.long.word 0x00 0.--15. 1. " TX_SCOL ,Packets transmitted OK with single collision"
line.long 0x04 "RPF2,RPF and AEP Counter Register"
hexmask.long.word 0x04 16.--31. 1. " RPF ,Receive pause frame counter"
hexmask.long.word 0x04 0.--15. 1. " AEP ,Counter for counting packets with alignment error"
line.long 0x08 "XMPG2,XM and PG Counter Register"
hexmask.long.word 0x08 16.--31. 1. " XM ,Packets failed in transmission(late collision or collision count >=16)"
hexmask.long.word 0x08 0.--15. 1. " PG ,Packets failed in transmission(collision count >=16)"
line.long 0x0c "RUNT_CNT2,RUNT_CNT and TLCC Counter Register 2"
hexmask.long.word 0x0c 16.--31. 1. " RUNT_CNT ,Received runt packets"
hexmask.long.word 0x0c 0.--15. 1. " TLCC ,Late collision"
line.long 0x10 "CRCER_CNT2,CRCER_CNT and FTL_CNT Counter Register 2"
hexmask.long.word 0x10 16.--31. 1. " CRCER_CNT ,CRC error packet"
hexmask.long.word 0x10 0.--15. 1. " FTL_CNT ,Receive FTL packets"
line.long 0x14 "RLC2,RLC and RCC Counter Register 2"
hexmask.long.word 0x14 16.--31. 1. " RLC ,Loss of received packets"
hexmask.long.word 0x14 0.--15. 1. " RCC ,Receive collision"
line.long 0x18 "BROC2,BROC Counter Register 2"
line.long 0x1c "MULCA2,MULCA Counter Register 2"
line.long 0x20 "RP2,RP Counter Register 2"
line.long 0x24 "XP2,XP Counter Register 2"
width 11.
tree.end
tree.end
tree.open "USB OTG 2.0 Controller"
tree "Host Controller Registers"
base ad:0x91300000
width 14.
rgroup.long 0x00++0xb
line.long 0x00 "HCCR,HC Capability Register"
hexmask.long.word 0x00 16.--31. 1. " HCIVERSION ,Host controller interface version number"
hexmask.long.byte 0x00 0.--7. 1. " CAPLENGTH ,Capability register length"
line.long 0x04 "HCSPARAMS,HC Structural Parameters"
bitfld.long 0x04 0.--3. " N_PORTS ,Number of ports" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "HCCPARAMS,HC Capability Parameters"
bitfld.long 0x08 2. " ASYN_SCH_PARK_CAP ,Asynchronous schedule park capability" "Disabled,Enabled"
bitfld.long 0x08 1. " PROG_FR_LIST_FLAG ,Programmable frame list flag" "Low,High"
group.long 0x10++0x3
line.long 0x00 "USBCMD,HC USB Command Register"
hexmask.long.byte 0x00 16.--23. 1. " INT_THRC ,Interrupt threshold control"
bitfld.long 0x00 11. " ASYN_PK_EN ,Asynchronous schedule park mode enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 8.--9. " ASYN_PK_CN ,Asynchronous schedule park mode count" "0,1,2,3"
bitfld.long 0x00 6. " INT_OAAD ,Interrupt on asynchronous advance doorbell" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 5. " ASCH_EN ,Asynchronous schedule enable" "Disabled,Enabled"
bitfld.long 0x00 4. " PSCH_EN ,Periodic schedule enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 2.--3. " FRL_SIZE ,Frame list size:" "1024,512,256,Reserved"
bitfld.long 0x00 1. " HC_RESET ,Host controller reset:" "No reset,Reset"
textline " "
bitfld.long 0x00 0. " RS ,Run / Stop" "Stop,Run"
group.long 0x14++0x3
line.long 0x00 "USBSTS,HC USB Status Register"
bitfld.long 0x00 15. " ASCH_STS ,Asynchronous schedule status" "Low,High"
bitfld.long 0x00 14. " PSCH_STS ,Periodic schedule status:" "Low,High"
textline " "
bitfld.long 0x00 13. " Reclamation ,Reclamation" "Not empty,Empty"
bitfld.long 0x00 12. " HCHalted ,Host controller halted" "Not halted,Halted"
textline " "
eventfld.long 0x00 5. " INT_OAA ,Interrupt on Async Advance" "No interrupt,Interrupt"
eventfld.long 0x00 4. " H_SYSERR ,Host system error" "No error,Error"
textline " "
eventfld.long 0x00 3. " FRL_ROL ,Frame list rollover " "Disabled,Enabled"
eventfld.long 0x00 2. " PO_CHG_DE ,Port change detect" "Not changed,Changed"
textline " "
eventfld.long 0x00 1. " USBERR_INT ,USB error interrupt" "No error,Error"
eventfld.long 0x00 0. " USB_INT ,USB interrupt" "No interrupt,Interrupt"
group.long 0x18++0x7
line.long 0x00 "USBINTR,HC USB Interrupt Enable Register"
bitfld.long 0x00 5. " INT_OAA_EN ,Interrupt on async advance enable" "Disabled,Enabled"
bitfld.long 0x00 4. " H_SYSERR_EN ,Host system error enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 3. " FRL_ROL_EN ,Frame list rollover enable" "Disabled,Enabled"
bitfld.long 0x00 2. " PO_CHG_INT_EN ,Port change interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " USBERR_INT_EN ,USB error interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. " USB_INT_EN ,USB interrupt enable:" "Disabled,Enabled"
line.long 0x04 "FRINDEX,HC Frame Index Register"
hexmask.long.word 0x04 0.--13. 1. " FRINDEX ,Frame index"
group.long 0x24++0x7
line.long 0x00 "PERIODICBASE,HC Periodic Frame List Base Address Register"
hexmask.long 0x00 12.--31. 0x1000 " PERI_BASADR ,Periodic frame list base address"
line.long 0x04 "ASYNCLISTADDR,HC Current Asynchronous List Address Register"
hexmask.long 0x04 5.--31. 0x20 " Async_ladr ,Current asynchronous list address"
group.long 0x30++0x03
line.long 0x00 "PORTSC,HC Port Status and Control Register"
bitfld.long 0x00 16. " TST_FORCEEN ,Downstream facing port enable" "Disabled,Enabled"
bitfld.long 0x00 10.--11. " LINE_STS ,Line status" "0,1,2,3"
textline " "
bitfld.long 0x00 8. " PO_RESET ,Port reset:" "No reset,Reset"
bitfld.long 0x00 7. " PO_SUSP ,Port suspend" "Not suspended,Suspended"
textline " "
bitfld.long 0x00 6. " F_PO_RESM ,Force port resume" "Not resumed,Resumed"
eventfld.long 0x00 3. " PO_EN_CHG ,Port enable/disable change" "Not changed,Changed"
textline " "
bitfld.long 0x00 2. " PO_EN ,Port enable/disable" "Disabled,Enabled"
eventfld.long 0x00 1. " CONN_CHG ,Connect status change" "Not changed,Changed"
textline " "
bitfld.long 0x00 0. " CONN_STS ,Current Connect Status" "Not connected,Connected"
if (((d.l(ad:(0x91300000+0x80)))&0xc00000)==0x000000)
group.long 0x40++0x3
line.long 0x00 "MR,Miscellaneous Register"
bitfld.long 0x00 4.--5. " EOF2_Time ,EOF 2 timing points" "20 clocks,40 clocks,80 clocks,160 clocks"
bitfld.long 0x00 2.--3. " EOF1_Time ,EOF 1 timing points" "1600 clocks,1400 clocks,1200 clocks,21000 clocks"
textline " "
bitfld.long 0x00 0.--1. " ASYN_SCH_SLPT ,Asynchronous schedule sleep timer" "5 us,10 us,15 us,20 us"
elif (((d.l(ad:(0x91300000+0x80)))&0xc00000)==0x400000)
group.long 0x40++0x3
line.long 0x00 "MR,Miscellaneous Register"
bitfld.long 0x00 4.--5. " EOF2_Time ,EOF 2 timing points" "40 clocks,80 clocks,160 clocks,320 clocks"
bitfld.long 0x00 2.--3. " EOF1_Time ,EOF 1 timing points" "3750 clocks,3500 clocks,3250 clocks,4000 clocks"
textline " "
bitfld.long 0x00 0.--1. " ASYN_SCH_SLPT ,Asynchronous schedule sleep timer" "5 us,10 us,15 us,20 us"
elif (((d.l(ad:(0x91300000+0x80)))&0xc00000)==0x800000)
group.long 0x40++0x3
line.long 0x00 "MR,Miscellaneous Register"
bitfld.long 0x00 4.--5. " EOF2_Time ,EOF 2 timing points" "2 clocks,4 clocks,8 clocks,16 clocks"
bitfld.long 0x00 2.--3. " EOF1_Time ,EOF 1 timing points" "540 clocks,360 clocks,180 clocks,720 clocks"
textline " "
bitfld.long 0x00 0.--1. " ASYN_SCH_SLPT ,Asynchronous schedule sleep timer" "5 us,10 us,15 us,20 us"
endif
width 11.
tree.end
tree "On-The-Go Controller Registers"
base ad:0x91300000
width 14.
group.long 0x80++0xb
line.long 0x00 "OTGCSR,OTG Control/Status Register"
bitfld.long 0x00 22.--23. " HOST_SPD_TYP ,Host speed type" "Full,Low,High,Reserved"
bitfld.long 0x00 21. " ID ,Current ID" "A-Device,B-Device"
textline " "
bitfld.long 0x00 20. " CROLE ,Current role" "Host,Device"
bitfld.long 0x00 19. " VBUS_VLD ,A-Device VBUS valid" "Not above,Above"
textline " "
bitfld.long 0x00 18. " A_SESS_VLD ,A-Device session valid" "Not above,Above"
bitfld.long 0x00 17. " B_SESS_VLD ,B-Device session valid" "Not below,Below"
textline " "
bitfld.long 0x00 16. " B_SESS_END ,B-Device session end" "Not below,Below"
bitfld.long 0x00 11. " HDISCON_FLT_SEL ,Timer to filter out noise of HDISCON" "135 us,270 us"
textline " "
bitfld.long 0x00 10. " VBUS_FLT_SEL ,Timer to filter out noise of VBUS_VLD" "135 us,472 us"
bitfld.long 0x00 9. " ID_FLT_SEL ,Timer to filter out noise of ID" "3 ms,4 ms"
textline " "
bitfld.long 0x00 8. " A_SRP_RESP_TYP ,SRP response type" "Vbus pulsing,Data-line pulsing"
bitfld.long 0x00 7. " A_SRP_DET_EN ,A-Device SRP detection enable:" "Disabled,Enabled"
textline " "
bitfld.long 0x00 6. " A_SET_B_HNP_EN ,HNP function of B-device enable" "No effect,Enabled"
bitfld.long 0x00 5. " A_BUS_DROP ,A-device bus drop" "No effect,BUS_REQ cleared"
textline " "
bitfld.long 0x00 4. " A_BUS_REQ ,A-device bus request" "Not requested,Requested"
bitfld.long 0x00 2. " B_DSCHRG_VBUS ,B-device discharges VBUS" "Not discharged,Discharged"
textline " "
bitfld.long 0x00 1. " B_HNP_EN ,B-device to perform HNP enable" "Disabled,Enabled"
bitfld.long 0x00 0. " B_BUS_REQ ,B-device bus request" "Not requested,Requested"
line.long 0x04 "OTGISR,OTG Interrupt Status Register"
eventfld.long 0x04 12. " APLGRMV ,Mini-A Plug remove" "No effect,Removed"
eventfld.long 0x04 11. " BPLGRMV ,Mini-B Plug remove" "No effect,Removed"
textline " "
eventfld.long 0x04 10. " OVC ,Over current detection" "No effect,Not reached"
eventfld.long 0x04 9. " IDCHG ,ID change" "No effect,Changed"
textline " "
eventfld.long 0x04 8. " RLCHG ,Role change" "No effect,Changed"
eventfld.long 0x04 5. " A_VBUS_ERR ,A-Device VBUS error" "No effect,Error"
textline " "
eventfld.long 0x04 4. " A_SRP_DET ,A-Device detects SRP from B-Device:" "No effect,Detected"
eventfld.long 0x04 0. " B_SRP_DN ,B-Device SRP done" "No effect,Done"
line.long 0x08 "OTGIER,OTG Interrupt Enable Register"
bitfld.long 0x08 12. " APLGRMV_EN ,APLGRMV interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 11. " BPLGRMV_EN ,BPLGRMV interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 10. " OVC_EN ,OVC interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 9. " IDCHG_EN ,IDCHG interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 8. " RLCHG_EN ,RLCHG interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 5. " A_VBUS_ERR_EN ,A_VBUS_ERR interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 4. " A_SRP_DET_EN ,A_SRP_DET interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 0. " B_SRP_DN_EN ,B_SRP_DN interrupt enable" "Disabled,Enabled"
width 11.
tree.end
tree "Global Controller Registers"
base ad:0x91300000
width 14.
group.long 0xc0++0x7
line.long 0x00 "HCOTGDEV,HC/OTG/DEV Interrupt Status Register"
eventfld.long 0x00 2. " HC_INT ,HC interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 1. " OTG_INT ,OTG interrupt" "No interrupt,Interrupt"
textline " "
eventfld.long 0x00 0. " DEV_INT ,Device interrupt" "No interrupt,Interrupt"
line.long 0x04 "MHCOTGDEV,Mask of HC/OTG/DEV Interrupt"
bitfld.long 0x04 3. " INT_POLARITY ,Polarity of system interrupt signal" "Low,High"
bitfld.long 0x04 2. " MHC_INT ,Mask the interrupt bits of the HC Interrupt" "Enabled,Disabled"
textline " "
bitfld.long 0x04 1. " MOTG_INT ,Mask the interrupt bits of the OTG Interrupt" "Enabled,Disabled"
bitfld.long 0x04 0. " MDEV_INT ,Mask the interrupt bits of the Device Interrupt" "Enabled,Disabled"
width 11.
tree.end
tree "Device Controller Registers"
base ad:0x91300000
width 14.
group.long 0x100++0xb
line.long 0x00 "MCR,Main Control Register"
bitfld.long 0x00 7. " RISC51_INF ,RISC51 interface enable" "32-bit interface,RISC51 interface"
bitfld.long 0x00 6. " HS_EN ,High speed status" "Full,High"
textline " "
bitfld.long 0x00 5. " CHIP_EN ,Chip enable" "Disabled,Enabled"
bitfld.long 0x00 4. " SFRST ,Device software reset" "No reset,Reset"
textline " "
bitfld.long 0x00 3. " GOSUSP ,Go suspend" "Not activated,Activated"
bitfld.long 0x00 2. " GLINT_EN ,Global interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " HALF_SPEED ,Half speed enable" "Disabled,Enabled"
bitfld.long 0x00 0. " CAP_RMWAKUP ,Capability of remote wakeup" "Not capable,Capable"
line.long 0x04 "DAR,Device Address Register"
bitfld.long 0x04 7. " AFT_CONF ,After set configuration" "No effect,Executed"
hexmask.long.byte 0x04 0.--6. 1. " DEVADR ,Device address"
line.long 0x08 "TR,Test Register"
bitfld.long 0x08 6. " DISGENSOF ,Disable generation of SOF" "No effect,Disabled"
bitfld.long 0x08 5. " TST_MOD ,Test mode" "No effect,Mode on"
textline " "
bitfld.long 0x08 4. " TST_DISTOG ,Disable toggle sequence" "No effect,Disabled"
bitfld.long 0x08 3. " TST_DISCRC ,Disable CRC" "No effect,Disabled"
textline " "
bitfld.long 0x08 2. " TST_CLREA ,Clear external side address" "No effect,Cleared"
bitfld.long 0x08 1. " TST_LPCX ,Loop back test for control endpoint" "No effect,Test"
textline " "
bitfld.long 0x08 0. " TST_CLRFF ,Clear FIFO" "No effect,Cleared"
rgroup.long 0x10c++0x3
line.long 0x00 "SOFFNR,SOF Frame Number Register"
bitfld.long 0x00 11.--13. " USOFN ,SOF micro frame number bits [2:0]" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--10. 1. " SOFN ,SOF frame number bits [10:0]"
group.long 0x110++0xb
line.long 0x00 "SOFMTR,Mask Timer Register"
hexmask.long.word 0x00 0.--15. 1. " SOFTM ,SOF mask timer"
line.long 0x04 "PHTTMSR,PHY Test Mode Selector Register"
bitfld.long 0x04 4. " TST_PKT ,Test mode for packet" "No effect,Test mode"
bitfld.long 0x04 3. " TST_SE0NAK ,D+/D- lines set" "No effect,Set to the HS"
textline " "
bitfld.long 0x04 2. " TST_KSTA ,D+/D- lines set" "No effect,K state"
bitfld.long 0x04 1. " TST_JSTA ,D+/D- lines set" "No effect,J state"
textline " "
bitfld.long 0x04 0. " UNPLUG ,UNPLUG set" "No effect,Non-Driving mode"
line.long 0x08 "VSIOCR,Vendor Specific IO Control Register"
bitfld.long 0x08 5. " VCTLOAD_N ,Vendor-specific test mode control load" "Low,High"
bitfld.long 0x08 0.--4. " VCTL ,Vendor-specific test mode control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long 0x11c++0x3
line.long 0x00 "CXCSR,CX Configuration and Status Register"
hexmask.long.byte 0x00 0.--7. 1. " VSTA ,Vendor-specific test mode status"
group.long 0x120++0x7
line.long 0x00 "CXCFESR,CX Configuration and FIFO Empty Status Register"
hexmask.long.byte 0x00 24.--30. 1. " CX_FNT ,CX FIFO byte count"
bitfld.long 0x00 8.--11. " F_EMP ,FIFO empty" "Full,14,13,12,11,10,9,8,7,6,5,4,3,2,1,Empty"
textline " "
bitfld.long 0x00 5. " CX_EMP ,CX FIFO empty" "Not empty,Empty"
bitfld.long 0x00 4. " CX_FUL ,CX FIFO full" "Not full,Full"
textline " "
bitfld.long 0x00 3. " CX_CLR ,Clear CX FIFO data" "Not cleared,Cleared"
bitfld.long 0x00 2. " CX_STL ,Stall CX" "Not stalled,Stalled"
textline " "
bitfld.long 0x00 1. " TST_PKDONE ,Data transfer is done for test packet" "Not done,Done"
bitfld.long 0x00 0. " CX_DONE ,Data transfer is done for CX" "Not done,Done"
line.long 0x04 "ICR,Idle Counter Register"
bitfld.long 0x04 0.--2. " IDLE_CNT ,Timing delay" "0ms,1ms,2ms,3ms,4ms,5ms,6ms,7ms"
group.long 0x130++0xf
line.long 0x00 "MIGR,Mask of Interrupt Group Register"
bitfld.long 0x00 2. " MINT_G2 ,Mask of interrupt of source group 2" "Not masked,Masked"
bitfld.long 0x00 1. " MINT_G1 ,Mask of interrupt of source group 1" "Not masked,Masked"
textline " "
bitfld.long 0x00 0. " MINT_G0 ,Mask of interrupt of source group 0" "Not masked,Masked"
line.long 0x04 "MISG0,Mask of Interrupt Source Group 0 Register"
bitfld.long 0x04 5. " MCX_COMABORT_INT ,Mask interrupt of control transfer command abort" "Not masked,Masked"
bitfld.long 0x04 4. " MCX_COMFAIL_INT ,Mask interrupt of host emits extra IN or OUT data interrupt bit" "Not masked,Masked"
textline " "
bitfld.long 0x04 3. " MCX_COMEND ,Mask the host end of command interrupt bit" "Not masked,Masked"
bitfld.long 0x04 2. " MCX_OUT_INT ,Mask the interrupt bits of endpoint 0 for OUT" "Not masked,Masked"
textline " "
bitfld.long 0x04 1. " MCX_IN_INT ,Mask the interrupt bits of endpoint 0 for IN" "Not masked,Masked"
bitfld.long 0x04 0. " MCX_SETUP_INT ,Mask endpoint 0 setup data received interrupt bit" "Not masked,Masked"
line.long 0x08 "MISG1,Mask of Interrupt Source Group 1 Register"
bitfld.long 0x08 19. " MF3_IN_INT ,Mask the IN interrupt bits of FIFO 3" "Not masked,Masked"
bitfld.long 0x08 18. " MF2_IN_INT ,Mask the IN interrupt bits of FIFO 2" "Not masked,Masked"
textline " "
bitfld.long 0x08 17. " MF1_IN_INT ,Mask the IN interrupt bits of FIFO 1" "Not masked,Masked"
bitfld.long 0x08 16. " MF0_IN_INT ,Mask the IN interrupt bits of FIFO 0" "Not masked,Masked"
textline " "
bitfld.long 0x08 7. " MF3_SPK_INT ,Mask the Short Packet interrupt of FIFO 3" "Not masked,Masked"
bitfld.long 0x08 6. " MF3_OUT_INT ,Mask the OUT interrupt of FIFO 3" "Not masked,Masked"
textline " "
bitfld.long 0x08 5. " MF2_SPK_INT ,Mask the Short Packet interrupt of FIFO 2" "Not masked,Masked"
bitfld.long 0x08 4. " MF2_OUT_INT ,Mask the OUT interrupt of FIFO 2" "Not masked,Masked"
textline " "
bitfld.long 0x08 3. " MF1_SPK_INT ,Mask the Short Packet interrupt of FIFO 1" "Not masked,Masked"
bitfld.long 0x08 2. " MF1_OUT_INT ,Mask the OUT interrupt of FIFO 1" "Not masked,Masked"
textline " "
bitfld.long 0x08 1. " MF0_SPK_INT ,Mask the Short Packet interrupt of FIFO 0" "Not masked,Masked"
bitfld.long 0x08 0. " MF0_OUT_INT ,Mask the OUT interrupt of FIFO 0" "Not masked,Masked"
line.long 0x0c "MISG2,Mask of Interrupt Source Group 2 Register"
bitfld.long 0x0C 8. " MDMA_ERROR ,Mask DMA error interrupt" "Not masked,Masked"
bitfld.long 0x0C 7. " MDMA_CMPLT ,Mask DMA completion interrupt" "Not masked,Masked"
textline " "
bitfld.long 0x0C 6. " MRX0BYTE_INT ,Mask Received Zero-length data packet interrupt" "Not masked,Masked"
bitfld.long 0x0C 5. " MTX0BYTE_INT ,Mask Transferred Zero-length data packet interrupt" "Not masked,Masked"
textline " "
bitfld.long 0x0C 4. " MSEQ_ABORT_INT ,Mask ISO sequential abort interrupt" "Not masked,Masked"
bitfld.long 0x0C 3. " MSEQ_ERR_INT ,Mask ISO sequential error interrupt" "Not masked,Masked"
textline " "
bitfld.long 0x0C 2. " MRESM_INT ,Mask resume interrupt" "Not masked,Masked"
bitfld.long 0x0C 1. " MSUSP_INT ,Mask suspend interrupt" "Not masked,Masked"
textline " "
bitfld.long 0x0C 0. " MUSBRST_INT ,Mask USB reset interrupt" "Not masked,Masked"
rgroup.long 0x140++0x3
line.long 0x00 "IGR,Interrupt Group Register"
bitfld.long 0x00 2. " INT_G2 ,Interrupts in Group 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. " INT_G1 ,Interrupts in Group 1" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " INT_G0 ,Interrupts in Group 0" "No interrupt,Interrupt"
group.long 0x144++0x3
line.long 0x00 "ISG0,Interrupt Source Group 0 Register"
bitfld.long 0x00 5. " CX_COMABT_INT ,Command abort event" "0,1"
bitfld.long 0x00 4. " CX_COMFAIL_INT ,Extra IN/OUT token receive" "No effect,Received"
textline " "
bitfld.long 0x00 3. " CX_COMEND_INT ,Control transfer -status stage" "No effect,Entered"
bitfld.long 0x00 2. " CX_OUT_INT ,Control transfer- valid data" "No effect,Contained"
textline " "
bitfld.long 0x00 1. " CX_IN_INT ,Data for control-read transfer" "No effect,Written"
bitfld.long 0x00 0. " CX_SETUP_INT ,Firmware starts to read data" "No effect,Read"
rgroup.long 0x148++0x3
line.long 0x00 "ISG1,Interrupt Source Group 1 Register"
bitfld.long 0x00 19. " F3_IN_INT ,FIFO 3 is ready to be written" "Not ready,Ready"
bitfld.long 0x00 18. " F2_IN_INT ,FIFO 2 is ready to be written" "Not ready,Ready"
textline " "
bitfld.long 0x00 17. " F1_IN_INT ,FIFO 1 is ready to be written" "Not ready,Ready"
bitfld.long 0x00 16. " F0_IN_INT ,FIFO 0 is ready to be written" "Not ready,Ready"
textline " "
bitfld.long 0x00 7. " F3_SPK_INT ,FIFO 3 receive short packed data" "DMA read FIFO 3,Received"
bitfld.long 0x00 6. " F3_OUT_INT ,FIFO 3 is ready to be read" "Read out,Ready"
textline " "
bitfld.long 0x00 5. " F2_SPK_INT ,FIFO 2 receive short packed data" "DMA read FIFO 2,Received"
bitfld.long 0x00 4. " F2_OUT_INT ,FIFO 2 is ready to be read" "Read out,Ready"
textline " "
bitfld.long 0x00 3. " F1_SPK_INT ,FIFO 1 receive short packed data" "DMA read FIFO 1,Received"
bitfld.long 0x00 2. " F1_OUT_INT ,FIFO 1 is ready to be read" "Read out,Ready"
textline " "
bitfld.long 0x00 1. " F0_SPK_INT ,FIFO 0 receive short packed data" "DMA read FIFO 0,Received"
bitfld.long 0x00 0. " F0_OUT_INT ,FIFO 0 is ready to be read" "Read out,Ready"
group.long 0x14c++0xf
line.long 0x00 "ISG2,Interrupt Source Group 2 Register"
bitfld.long 0x00 8. " DMA_ERROR ,DMA error interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. " DMA_CMPLT ,DMA completion interrupt:" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 6. " RX0BYTE_INT ,Received zero-length data packet interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. " TX0BYTE_INT ,Transferred zero-length data packet interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 4. " ISO_SEQ_ABORT_INT ,ISO sequential abort interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. " ISO_SEQ_ERR_INT ,ISO sequential error interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 2. " RESM_INT ,Resume interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. " SUSP_INT ,Suspend interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " USBRST_INT ,USB reset interrupt" "No interrupt,Interrupt"
line.long 0x04 "RZLDP,Receive Zero-Length Data Packet Register"
bitfld.long 0x04 7. " RX0BYTE_EP8 ,Endpoint 8 receives a zero-length data packet" "Not received,Received"
bitfld.long 0x04 6. " RX0BYTE_EP7 ,Endpoint 7 receives a zero-length data packet" "Not received,Received"
textline " "
bitfld.long 0x04 5. " RX0BYTE_EP6 ,Endpoint 6 receives a zero-length data packet" "Not received,Received"
bitfld.long 0x04 4. " RX0BYTE_EP5 ,Endpoint 5 receives a zero-length data packet" "Not received,Received"
textline " "
bitfld.long 0x04 3. " RX0BYTE_EP4 ,Endpoint 4 receives a zero-length data packet" "Not received,Received"
bitfld.long 0x04 2. " RX0BYTE_EP3 ,Endpoint 3 receives a zero-length data packet" "Not received,Received"
textline " "
bitfld.long 0x04 1. " RX0BYTE_EP2 ,Endpoint 2 receives a zero-length data packet" "Not received,Received"
bitfld.long 0x04 0. " RX0BYTE_EP1 ,Endpoint 1 receives a zero-length data packet" "Not received,Received"
line.long 0x08 "TZLDP,Transfer Zero-length Data Packet Register"
bitfld.long 0x08 7. " TX0BYTE_EP8 ,Endpoint 8 transfers zero-length data packet" "Not transferred,transferred"
bitfld.long 0x08 6. " TX0BYTE_EP7 ,Endpoint 7 transfers zero-length data packet" "Not transferred,transferred"
textline " "
bitfld.long 0x08 5. " TX0BYTE_EP6 ,Endpoint 6 transfers zero-length data packet" "Not transferred,transferred"
bitfld.long 0x08 4. " TX0BYTE_EP5 ,Endpoint 5 transfers zero-length data packet" "Not transferred,transferred"
textline " "
bitfld.long 0x08 3. " TX0BYTE_EP4 ,Endpoint 4 transfers zero-length data packet" "Not transferred,transferred"
bitfld.long 0x08 2. " TX0BYTE_EP3 ,Endpoint 3 transfers zero-length data packet" "Not transferred,transferred"
textline " "
bitfld.long 0x08 1. " TX0BYTE_EP2 ,Endpoint 2 transfers zero-length data packet" "Not transferred,transferred"
bitfld.long 0x08 0. " TX0BYTE_EP1 ,Endpoint 1 transfers zero-length data packet" "Not transferred,transferred"
line.long 0x0c "ISEA,Isochronous Sequential Error/Abort Register"
bitfld.long 0x0c 23. " ISO_SEQ_ERR_EP8 ,Endpoint 8 encounters an isochronous sequential error" "No error,Error"
bitfld.long 0x0c 22. " ISO_SEQ_ERR_EP7 ,Endpoint 7 encounters an isochronous sequential error" "No error,Error"
textline " "
bitfld.long 0x0c 21. " ISO_SEQ_ERR_EP6 ,Endpoint 6 encounters an isochronous sequential error" "No error,Error"
bitfld.long 0x0c 20. " ISO_SEQ_ERR_EP5 ,Endpoint 5 encounters an isochronous sequential error" "No error,Error"
textline " "
bitfld.long 0x0c 19. " ISO_SEQ_ERR_EP4 ,Endpoint 4 encounters an isochronous sequential error" "No error,Error"
bitfld.long 0x0c 18. " ISO_SEQ_ERR_EP3 ,Endpoint 3 encounters an isochronous sequential error" "No error,Error"
textline " "
bitfld.long 0x0c 17. " ISO_SEQ_ERR_EP2 ,Endpoint 2 encounters an isochronous sequential error" "No error,Error"
bitfld.long 0x0c 16. " ISO_SEQ_ERR_EP1 ,Endpoint 1 encounters an isochronous sequential error" "No error,Error"
textline " "
bitfld.long 0x0c 7. " ISO_ABT_ERR_EP8 ,Endpoint 8 encounters an isochronous sequential abort" "No abort,Abort"
bitfld.long 0x0c 6. " ISO_ABT_ERR_EP7 ,Endpoint 7 encounters an isochronous sequential abort" "No abort,Abort"
textline " "
bitfld.long 0x0c 5. " ISO_ABT_ERR_EP6 ,Endpoint 6 encounters an isochronous sequential abort" "No abort,Abort"
bitfld.long 0x0c 4. " ISO_ABT_ERR_EP5 ,Endpoint 5 encounters an isochronous sequential abort" "No abort,Abort"
textline " "
bitfld.long 0x0c 3. " ISO_ABT_ERR_EP4 ,Endpoint 4 encounters an isochronous sequential abort" "No abort,Abort"
bitfld.long 0x0c 2. " ISO_ABT_ERR_EP3 ,Endpoint 3 encounters an isochronous sequential abort" "No abort,Abort"
textline " "
bitfld.long 0x0c 1. " ISO_ABT_ERR_EP2 ,Endpoint 2 encounters an isochronous sequential abort" "No abort,Abort"
bitfld.long 0x0c 0. " ISO_ABT_ERR_EP1 ,Endpoint 1 encounters an isochronous sequential abort" "No abort,Abort"
group.long 0x160++0x3
line.long 0x00 "INE1MPS,IN Endpoint 1 MaxPacketSize Register"
bitfld.long 0x00 15. " TX0BYTE_IEP1 ,Transfer a zero-length data packet from endpoint 1 to USB host" "No effect,Transferred"
bitfld.long 0x00 13.--14. " TX_NUM_HBW_IEP1 ,Transaction number for high bandwidth endpoint 1" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.long 0x00 12. " RSTG_IEP1 ,Reset toggle sequence for IN endpoint 1" "No reset,Reset"
bitfld.long 0x00 11. " STL_IEP1 ,Stall IN endpoint 1" "Not stalled,Stalled"
textline " "
hexmask.long.word 0x00 0.--10. 1. " MAXPS_IEP1 ,Max packet size of IN endpoint 1"
group.long 0x164++0x3
line.long 0x00 "INE2MPS,IN Endpoint 2 MaxPacketSize Register"
bitfld.long 0x00 15. " TX0BYTE_IEP2 ,Transfer a zero-length data packet from endpoint 2 to USB host" "No effect,Transferred"
bitfld.long 0x00 13.--14. " TX_NUM_HBW_IEP2 ,Transaction number for high bandwidth endpoint 2" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.long 0x00 12. " RSTG_IEP2 ,Reset toggle sequence for IN endpoint 2" "No reset,Reset"
bitfld.long 0x00 11. " STL_IEP2 ,Stall IN endpoint 2" "Not stalled,Stalled"
textline " "
hexmask.long.word 0x00 0.--10. 1. " MAXPS_IEP2 ,Max packet size of IN endpoint 2"
group.long 0x168++0x3
line.long 0x00 "INE3MPS,IN Endpoint 3 MaxPacketSize Register"
bitfld.long 0x00 15. " TX0BYTE_IEP3 ,Transfer a zero-length data packet from endpoint 3 to USB host" "No effect,Transferred"
bitfld.long 0x00 13.--14. " TX_NUM_HBW_IEP3 ,Transaction number for high bandwidth endpoint 3" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.long 0x00 12. " RSTG_IEP3 ,Reset toggle sequence for IN endpoint 3" "No reset,Reset"
bitfld.long 0x00 11. " STL_IEP3 ,Stall IN endpoint 3" "Not stalled,Stalled"
textline " "
hexmask.long.word 0x00 0.--10. 1. " MAXPS_IEP3 ,Max packet size of IN endpoint 3"
group.long 0x16C++0x3
line.long 0x00 "INE4MPS,IN Endpoint 4 MaxPacketSize Register"
bitfld.long 0x00 15. " TX0BYTE_IEP4 ,Transfer a zero-length data packet from endpoint 4 to USB host" "No effect,Transferred"
bitfld.long 0x00 13.--14. " TX_NUM_HBW_IEP4 ,Transaction number for high bandwidth endpoint 4" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.long 0x00 12. " RSTG_IEP4 ,Reset toggle sequence for IN endpoint 4" "No reset,Reset"
bitfld.long 0x00 11. " STL_IEP4 ,Stall IN endpoint 4" "Not stalled,Stalled"
textline " "
hexmask.long.word 0x00 0.--10. 1. " MAXPS_IEP4 ,Max packet size of IN endpoint 4"
group.long 0x170++0x3
line.long 0x00 "INE5MPS,IN Endpoint 5 MaxPacketSize Register"
bitfld.long 0x00 15. " TX0BYTE_IEP5 ,Transfer a zero-length data packet from endpoint 5 to USB host" "No effect,Transferred"
bitfld.long 0x00 13.--14. " TX_NUM_HBW_IEP5 ,Transaction number for high bandwidth endpoint 5" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.long 0x00 12. " RSTG_IEP5 ,Reset toggle sequence for IN endpoint 5" "No reset,Reset"
bitfld.long 0x00 11. " STL_IEP5 ,Stall IN endpoint 5" "Not stalled,Stalled"
textline " "
hexmask.long.word 0x00 0.--10. 1. " MAXPS_IEP5 ,Max packet size of IN endpoint 5"
group.long 0x174++0x3
line.long 0x00 "INE6MPS,IN Endpoint 6 MaxPacketSize Register"
bitfld.long 0x00 15. " TX0BYTE_IEP6 ,Transfer a zero-length data packet from endpoint 6 to USB host" "No effect,Transferred"
bitfld.long 0x00 13.--14. " TX_NUM_HBW_IEP6 ,Transaction number for high bandwidth endpoint 6" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.long 0x00 12. " RSTG_IEP6 ,Reset toggle sequence for IN endpoint 6" "No reset,Reset"
bitfld.long 0x00 11. " STL_IEP6 ,Stall IN endpoint 6" "Not stalled,Stalled"
textline " "
hexmask.long.word 0x00 0.--10. 1. " MAXPS_IEP6 ,Max packet size of IN endpoint 6"
group.long 0x178++0x3
line.long 0x00 "INE7MPS,IN Endpoint 7 MaxPacketSize Register"
bitfld.long 0x00 15. " TX0BYTE_IEP7 ,Transfer a zero-length data packet from endpoint 7 to USB host" "No effect,Transferred"
bitfld.long 0x00 13.--14. " TX_NUM_HBW_IEP7 ,Transaction number for high bandwidth endpoint 7" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.long 0x00 12. " RSTG_IEP7 ,Reset toggle sequence for IN endpoint 7" "No reset,Reset"
bitfld.long 0x00 11. " STL_IEP7 ,Stall IN endpoint 7" "Not stalled,Stalled"
textline " "
hexmask.long.word 0x00 0.--10. 1. " MAXPS_IEP7 ,Max packet size of IN endpoint 7"
group.long 0x17C++0x3
line.long 0x00 "INE8MPS,IN Endpoint 8 MaxPacketSize Register"
bitfld.long 0x00 15. " TX0BYTE_IEP8 ,Transfer a zero-length data packet from endpoint 8 to USB host" "No effect,Transferred"
bitfld.long 0x00 13.--14. " TX_NUM_HBW_IEP8 ,Transaction number for high bandwidth endpoint 8" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.long 0x00 12. " RSTG_IEP8 ,Reset toggle sequence for IN endpoint 8" "No reset,Reset"
bitfld.long 0x00 11. " STL_IEP8 ,Stall IN endpoint 8" "Not stalled,Stalled"
textline " "
hexmask.long.word 0x00 0.--10. 1. " MAXPS_IEP8 ,Max packet size of IN endpoint 8"
group.long 0x180++0x3
line.long 0x00 "OUTE1MPS,OUT Endpoint 1 MaxPacketSize Register"
bitfld.long 0x00 12. " RSTG_OEP1 ,Reset toggle sequence for OUT endpoint 1" "No reset,Reset"
bitfld.long 0x00 11. " STL_OEP1 ,Stall OUT Endpoint 1" "Not stalled,Stalled"
textline " "
hexmask.long.word 0x00 0.--10. 1. " MAXPS_OEP1 ,Max packet size of OUT endpoint 1"
group.long 0x184++0x3
line.long 0x00 "OUTE2MPS,OUT Endpoint 2 MaxPacketSize Register"
bitfld.long 0x00 12. " RSTG_OEP2 ,Reset toggle sequence for OUT endpoint 2" "No reset,Reset"
bitfld.long 0x00 11. " STL_OEP2 ,Stall OUT Endpoint 2" "Not stalled,Stalled"
textline " "
hexmask.long.word 0x00 0.--10. 1. " MAXPS_OEP2 ,Max packet size of OUT endpoint 2"
group.long 0x188++0x3
line.long 0x00 "OUTE3MPS,OUT Endpoint 3 MaxPacketSize Register"
bitfld.long 0x00 12. " RSTG_OEP3 ,Reset toggle sequence for OUT endpoint 3" "No reset,Reset"
bitfld.long 0x00 11. " STL_OEP3 ,Stall OUT Endpoint 3" "Not stalled,Stalled"
textline " "
hexmask.long.word 0x00 0.--10. 1. " MAXPS_OEP3 ,Max packet size of OUT endpoint 3"
group.long 0x18C++0x3
line.long 0x00 "OUTE4MPS,OUT Endpoint 4 MaxPacketSize Register"
bitfld.long 0x00 12. " RSTG_OEP4 ,Reset toggle sequence for OUT endpoint 4" "No reset,Reset"
bitfld.long 0x00 11. " STL_OEP4 ,Stall OUT Endpoint 4" "Not stalled,Stalled"
textline " "
hexmask.long.word 0x00 0.--10. 1. " MAXPS_OEP4 ,Max packet size of OUT endpoint 4"
group.long 0x190++0x3
line.long 0x00 "OUTE5MPS,OUT Endpoint 5 MaxPacketSize Register"
bitfld.long 0x00 12. " RSTG_OEP5 ,Reset toggle sequence for OUT endpoint 5" "No reset,Reset"
bitfld.long 0x00 11. " STL_OEP5 ,Stall OUT Endpoint 5" "Not stalled,Stalled"
textline " "
hexmask.long.word 0x00 0.--10. 1. " MAXPS_OEP5 ,Max packet size of OUT endpoint 5"
group.long 0x194++0x3
line.long 0x00 "OUTE6MPS,OUT Endpoint 6 MaxPacketSize Register"
bitfld.long 0x00 12. " RSTG_OEP6 ,Reset toggle sequence for OUT endpoint 6" "No reset,Reset"
bitfld.long 0x00 11. " STL_OEP6 ,Stall OUT Endpoint 6" "Not stalled,Stalled"
textline " "
hexmask.long.word 0x00 0.--10. 1. " MAXPS_OEP6 ,Max packet size of OUT endpoint 6"
group.long 0x198++0x3
line.long 0x00 "OUTE7MPS,OUT Endpoint 7 MaxPacketSize Register"
bitfld.long 0x00 12. " RSTG_OEP7 ,Reset toggle sequence for OUT endpoint 7" "No reset,Reset"
bitfld.long 0x00 11. " STL_OEP7 ,Stall OUT Endpoint 7" "Not stalled,Stalled"
textline " "
hexmask.long.word 0x00 0.--10. 1. " MAXPS_OEP7 ,Max packet size of OUT endpoint 7"
group.long 0x19C++0x3
line.long 0x00 "OUTE8MPS,OUT Endpoint 8 MaxPacketSize Register"
bitfld.long 0x00 12. " RSTG_OEP8 ,Reset toggle sequence for OUT endpoint 8" "No reset,Reset"
bitfld.long 0x00 11. " STL_OEP8 ,Stall OUT Endpoint 8" "Not stalled,Stalled"
textline " "
hexmask.long.word 0x00 0.--10. 1. " MAXPS_OEP8 ,Max packet size of OUT endpoint 8"
group.long 0x1a0++0xf
line.long 0x00 "EMR,Endpoint map register"
bitfld.long 0x00 28.--29. " FNO_OEP4 ,FIFO number for OUT endpoint 4" "0,1,2,3"
bitfld.long 0x00 24.--25. " FNO_IEP4 ,FIFO number for IN endpoint 4" "0,1,2,3"
textline " "
bitfld.long 0x00 20.--21. " FNO_OEP3 ,FIFO number for OUT endpoint 3" "0,1,2,3"
bitfld.long 0x00 16.--17. " FNO_IEP3 ,FIFO number for IN endpoint 3" "0,1,2,3"
textline " "
bitfld.long 0x00 12.--13. " FNO_OEP2 ,FIFO number for OUT endpoint 2" "0,1,2,3"
bitfld.long 0x00 8.--9. " FNO_IEP2 ,FIFO number for IN endpoint 2" "0,1,2,3"
textline " "
bitfld.long 0x00 4.--5. " FNO_OEP1 ,FIFO number for OUT endpoint 1" "0,1,2,3"
bitfld.long 0x00 0.--1. " FNO_IEP1 ,FIFO number for IN endpoint 1" "0,1,2,3"
line.long 0x04 "EMR,Endpoint map register"
bitfld.long 0x04 28.--29. " FNO_OEP8 ,FIFO number for OUT endpoint 8" "0,1,2,3"
bitfld.long 0x04 24.--25. " FNO_IEP8 ,FIFO number for IN endpoint 8" "0,1,2,3"
textline " "
bitfld.long 0x04 20.--21. " FNO_OEP7 ,FIFO number for OUT endpoint 7" "0,1,2,3"
bitfld.long 0x04 16.--17. " FNO_IEP7 ,FIFO number for IN endpoint 7" "0,1,2,3"
textline " "
bitfld.long 0x04 12.--13. " FNO_OEP6 ,FIFO number for OUT endpoint 6" "0,1,2,3"
bitfld.long 0x04 8.--9. " FNO_IEP6 ,FIFO number for IN endpoint 6" "0,1,2,3"
textline " "
bitfld.long 0x04 4.--5. " FNO_OEP5 ,FIFO number for OUT endpoint 5" "0,1,2,3"
bitfld.long 0x04 0.--1. " FNO_IEP5 ,FIFO number for IN endpoint 5" "0,1,2,3"
line.long 0x08 "FMR,FIFO Map Register"
bitfld.long 0x08 28.--29. " Dir_FIFO3 ,Data transfer direction" "OUT,IN,Bi-direction,Not allowed"
bitfld.long 0x08 24.--27. " EPNO_FIFO3 ,Endpoint number for FIFO 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x08 20.--21. " Dir_FIFO2 ,Data transfer direction" "OUT,IN,Bi-direction,Not allowed"
bitfld.long 0x08 16.--19. " EPNO_FIFO2 ,Endpoint number for FIFO 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x08 12.--13. " Dir_FIFO1 ,Data transfer direction" "OUT,IN,Bi-direction,Not allowed"
bitfld.long 0x08 8.--11. " EPNO_FIFO1 ,Endpoint number for FIFO 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x08 4.--5. " Dir_FIFO0 ,Data transfer direction" "OUT,IN,Bi-direction,Not allowed"
bitfld.long 0x08 0.--3. " EPNO_FIFO0 ,Endpoint number for FIFO 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0c "FIFOC,FIFO Configuration"
bitfld.long 0x0C 29. " EN_F3 ,Enable FIFO 3" "Disabled,Enabled"
bitfld.long 0x0C 28. " BLKSZ_F3 ,Block size of FIFO 3" "Smaller,Bigger"
textline " "
bitfld.long 0x0C 26.--27. " BLKNO_F3 ,Block number of FIFO 3" "Single,Double,Triple,Reserved"
bitfld.long 0x0C 24.--25. " BLK_TYP_F3 ,Transfer type of FIFO 3" "Reserved,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x0C 21. " EN_F2 ,Enable FIFO 2" "Disabled,Enabled"
bitfld.long 0x0C 20. " BLKSZ_F2 ,Block size of FIFO 2" "Smaller,Bigger"
textline " "
bitfld.long 0x0C 18.--19. " BLKNO_F2 ,Block number of FIFO 2" "Single,Double,Triple,Reserved"
bitfld.long 0x0C 16.--17. " BLK_TYP_F3 ,Transfer type of FIFO 2" "Reserved,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x0C 13. " EN_F1 ,Enable FIFO 1" "Disabled,Enabled"
bitfld.long 0x0C 12. " BLKSZ_F1 ,Block size of FIFO 1" "Smaller,Bigger"
textline " "
bitfld.long 0x0C 10.--11. " BLKNO_F1 ,Block number of FIFO 1" "Single,Double,Triple,Reserved"
bitfld.long 0x0C 8.--9. " BLK_TYP_F1 ,Transfer type of FIFO 1" "Reserved,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x0C 5. " EN_F0 ,Enable FIFO 0" "Disabled,Enabled"
bitfld.long 0x0C 4. " BLKSZ_F0 ,Block size of FIFO 0" "Smaller,Bigger"
textline " "
bitfld.long 0x0C 2.--3. " BLKNO_F0 ,Block number of FIFO 0" "Single,Double,Triple,Reserved"
bitfld.long 0x0C 0.--1. " BLK_TYP_F0 ,Transfer type of FIFO 0" "Reserved,Isochronous,Bulk,Interrupt"
group.long 0x1B0++0x3
line.long 0x00 "FIFOIBC0,FIFO 0 Instruction and Byte Count Register"
bitfld.long 0x00 12. " FFRST ,FIFO 0 reset" "No reset,Reset"
hexmask.long.word 0x00 0.--10. 1. " BC_F0 ,OUT FIFO 0 byte count"
group.long 0x1B4++0x3
line.long 0x00 "FIFOIBC1,FIFO 1 Instruction and Byte Count Register"
bitfld.long 0x00 12. " FFRST ,FIFO 1 reset" "No reset,Reset"
hexmask.long.word 0x00 0.--10. 1. " BC_F1 ,OUT FIFO 1 byte count"
group.long 0x1B8++0x3
line.long 0x00 "FIFOIBC2,FIFO 2 Instruction and Byte Count Register"
bitfld.long 0x00 12. " FFRST ,FIFO 2 reset" "No reset,Reset"
hexmask.long.word 0x00 0.--10. 1. " BC_F2 ,OUT FIFO 2 byte count"
group.long 0x1BC++0x3
line.long 0x00 "FIFOIBC3,FIFO 3 Instruction and Byte Count Register"
bitfld.long 0x00 12. " FFRST ,FIFO 3 reset" "No reset,Reset"
hexmask.long.word 0x00 0.--10. 1. " BC_F3 ,OUT FIFO 3 byte count"
group.long 0x1c0++0x3
line.long 0x00 "DMATFIFON,DMA Target FIFO Number Register"
bitfld.long 0x00 4. " ACC_CXF ,Control Transfer FIFO" "No effect,Access"
bitfld.long 0x00 3. " ACC_F3 ,FIFO3" "No effect,Access"
textline " "
bitfld.long 0x00 2. " ACC_F2 ,FIFO2" "No effect,Access"
bitfld.long 0x00 1. " ACC_F1 ,FIFO1" "No effect,Access"
textline " "
bitfld.long 0x00 0. " ACC_F0 ,FIFO0" "No effect,Access"
group.long 0x1c8++0x7
line.long 0x00 "DMACPS1,DMA Controller Parameter Setting 1 Register"
hexmask.long.tbyte 0x00 8.--24. 1. " DMA_LEN ,DMA length"
bitfld.long 0x00 3. " DMA_IO ,DMA I/O to I/O" "No effect,Forced"
textline " "
bitfld.long 0x00 1. " DMA_TYPE ,DMA type" "FIFO to memory,Memory to FIFO"
bitfld.long 0x00 0. " DMA_START ,DMA start" "Completed,Started"
line.long 0x04 "DMACPS2,DMA Controller Parameter Setting 2 Register"
rgroup.long 0x1d0++0x3
line.long 0x00 "DMACPS3,DMA Controller Parameter Setting 3 Register"
width 11.
tree.end
tree.end
tree.open "USB 2.0 Device Controller"
tree "General Registers"
base ad:0x90b00000
width 16.
group.byte 0x00++0x2
line.byte 0x00 "main_ctl,Main Control Register"
bitfld.byte 0x00 7. " AHB_RST ,AHB software reset" "No reset,Reset"
bitfld.byte 0x00 6. " HS_EN ,High speed enable" "Full speed,High speed"
textline " "
bitfld.byte 0x00 5. " CHIP_EN ,Chip enable" "Disabled,Enabled"
bitfld.byte 0x00 4. " SFRST ,Software reset" "No reset,Reset"
textline " "
bitfld.byte 0x00 3. " GOSUSP ,Go suspend" "Not activated,Activated"
bitfld.byte 0x00 2. " GLINT_EN ,Global interrupt enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " FLUSH_HBF ,Flush HBF" "Not flushed,Flushed"
bitfld.byte 0x00 0. " CAP_RMWKUP ,Capability of remote wake-up" "Not capable,Capable"
line.byte 0x01 "dev_adr,Device Address Register"
bitfld.byte 0x01 7. " AFT_CONF ,After set-configuration" "Not executed,Executed"
hexmask.byte 0x01 0.--6. 1. " ,Device address"
line.byte 0x02 "tst_ep,Test Register"
bitfld.byte 0x02 7. " TST_HALF_SPEED ,Set half-speed" "Not set,Set"
bitfld.byte 0x02 6. " Force_FS/TST_MOD ,Force FS" "Not forced,Forced"
textline " "
bitfld.byte 0x02 5. " TST_DISTOG ,Disable toggle sequence" "Enabled,Disabled"
bitfld.byte 0x02 4. " TST_DISCRC ,Disable CRC" "Enabled,Disabled"
textline " "
bitfld.byte 0x02 3. " TST_DISGENSOF ,Disable self generation of SOF" "Enabled,Disabled"
bitfld.byte 0x02 2. " TST_CLREA ,Clear external side address" "Not cleared,Cleared"
textline " "
bitfld.byte 0x02 1. " TST_LPCX ,Loop back test for CX" "No test,Test"
bitfld.byte 0x02 0. " TST_CLRFF ,Clear FIFO" "Not cleared,Cleared"
rgroup.byte 0x04++0x1
line.byte 0x00 "frm_numb0,Frame Number Register Byte 0"
line.byte 0x01 "frm_numb1,Frame Number Register Byte 1"
bitfld.byte 0x1 3.--5. " USOFN[2:0] ,SOF microframe number bits [2:0]" "0,1,2,3,4,5,6,7"
bitfld.byte 0x1 0.--2. " SOFN[10:8] ,SOF microframe number bits [2:0]" "0,1,2,3,4,5,6,7"
group.byte 0x06++0x1
line.byte 0x00 "sof_tmskb0,SOF Mask Timer Register Byte 0"
line.byte 0x01 "sof_tmskb1,SOF Mask Timer Register Byte 1"
group.long 0x08++0x1 "Test registers"
line.byte 0x00 "phy_tms,PHY Test Mode Selector Register"
bitfld.byte 0x00 4. " TST_PKT ,Test mode for packet" "No test,Test"
bitfld.byte 0x00 3. " TST_SE0NAK ,D+/D- lines set" "No effect,HS"
textline " "
bitfld.byte 0x00 2. " TST_KSTA ,D+/D- lines set" "No effect,K state"
bitfld.byte 0x00 1. " TST_JSTA ,D+/D- lines set" "No effect,J state"
textline " "
bitfld.byte 0x00 0. " UNPLUG ,Drive mode" "Enabled,Disabled"
line.byte 0x01 "vnd_ctl,Vendor Specific IO Control Register"
bitfld.byte 0x01 4. " VCTLOAD_N ,u_vctload_n output" "0,1"
bitfld.byte 0x01 0.--3. " VCTL[3:0] ,Vendor-specific test mode control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.byte 0x0a++0x00
line.byte 0x00 "vnd_sta,Vendor Specific IO Status Register"
group.byte 0x0b++0x1
line.byte 0x00 "cx_csr,Configuration and Status Register"
bitfld.byte 0x00 5. " CX_EMP ,CX FIFO empty" "Not empty,Empty"
bitfld.byte 0x00 4. " CX_FUL ,CX FIFO full" "Not full,Full"
textline " "
bitfld.byte 0x00 3. " CX_CLR ,Clear CX FIFO data" "Not cleared,Cleared"
bitfld.byte 0x00 2. " CX_STL ,Stall CX" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 1. " TST_PKDONE ,Data transfer is done for test packet" "Not done,Done"
bitfld.byte 0x00 0. " CX_DONE ,Data transfer is done for CX" "Not done,Done"
line.byte 0x01 "ep0_dp,Endpoint 0 Data Port Register Byte 0"
width 11.
tree.end
tree "Interrupt Mask Registers"
base ad:0x90b00000
width 16.
group.byte 0x10++0xa
line.byte 0x00 "int_mgrp,Interrupt Group Mask Register"
bitfld.byte 0x00 7. " MINT_SCR7 ,Mask all the interrupt bits of Interrupt Source Register Byte 7" "Not masked,Masked"
bitfld.byte 0x00 6. " MINT_SCR6 ,Mask all the interrupt bits of Interrupt Source Register Byte 6" "Not masked,Masked"
textline " "
bitfld.byte 0x00 5. " MINT_SCR5 ,Mask all the interrupt bits of Interrupt Source Register Byte 5" "Not masked,Masked"
bitfld.byte 0x00 4. " MINT_SCR4 ,Mask all the interrupt bits of Interrupt Source Register Byte 4" "Not masked,Masked"
textline " "
bitfld.byte 0x00 3. " MINT_SCR3 ,Mask all the interrupt bits of Interrupt Source Register Byte 3" "Not masked,Masked"
bitfld.byte 0x00 2. " MINT_SCR2 ,Mask all the interrupt bits of Interrupt Source Register Byte 2" "Not masked,Masked"
textline " "
bitfld.byte 0x00 1. " MINT_SCR1 ,Mask all the interrupt bits of Interrupt Source Register Byte 1" "Not masked,Masked"
bitfld.byte 0x00 0. " MINT_SCR0 ,Mask all the interrupt bits of Interrupt Source Register Byte 0" "Not masked,Masked"
line.byte 0x01 "int_mskb0,Interrupt Mask Register Byte 0"
bitfld.byte 0x01 7. " MR_COM_ABORT ,Mask command abort interrupt" "Not masked,Masked"
bitfld.byte 0x01 5. " MRBUF_ERR ,Mask the read HBF error interrupt bit" "Not masked,Masked"
textline " "
bitfld.byte 0x01 4. " MCX_COMFAIL_INT ,Mask the interrupt caused by the host emitting extra IN or OUT data" "Not masked,Masked"
bitfld.byte 0x01 3. " MCX_COMEND_INT ,Mask the host end of command (entering status stage) interrupt bit" "Not masked,Masked"
textline " "
bitfld.byte 0x01 2. " MCX_OUT_INT ,Mask the interrupt bits of endpoint 0 for OUT" "Not masked,Masked"
bitfld.byte 0x01 1. " MCX_IN_INT ,Mask the interrupt bits of endpoint 0 for IN" "Not masked,Masked"
textline " "
bitfld.byte 0x01 0. " MCX_SETUP_INT ,Mask endpoint 0 setup data received interrupt bit" "Not masked ,Masked"
line.byte 0x02 "int_mskb1,Interrupt Mask Register Byte 1"
bitfld.byte 0x02 7. " MF3_SPK_INT ,Mask the short packet interrupt of FIFO 3" "Not masked,Masked"
bitfld.byte 0x02 6. " MF3_OUT_INT ,Mask the OUT interrupt of FIFO 3" "Not masked,Masked"
textline " "
bitfld.byte 0x02 5. " MF2_SPK_INT ,Mask the short packet interrupt of FIFO 2" "Not masked,Masked"
bitfld.byte 0x02 4. " MF2_OUT_INT ,Mask the OUT interrupt of FIFO 2" "Not masked,Masked"
textline " "
bitfld.byte 0x02 3. " MF1_SPK_INT ,Mask the short packet interrupt of FIFO 1" "Not masked,Masked"
bitfld.byte 0x02 2. " MF1_OUT_INT ,Mask the OUT interrupt of FIFO 1" "Not masked,Masked"
textline " "
bitfld.byte 0x02 1. " MF0_SPK_IN ,Mask the short packet interrupt of FIFO 0" "Not masked,Masked"
bitfld.byte 0x02 0. " MF0_OUT_INT ,Mask the OUT interrupt of FIFO 0" "Not masked,Masked"
line.byte 0x03 "int_mskb2,Interrupt Mask Register Byte 2"
bitfld.byte 0x03 7. " MF7_SPK_INT ,Mask the short packet interrupt of FIFO 7" "Not masked,Masked"
bitfld.byte 0x03 6. " MF7_OUT_INT ,Mask the OUT interrupt of FIFO 7" "Not masked,Masked"
textline " "
bitfld.byte 0x03 5. " MF6_SPK_INT ,Mask the short packet interrupt of FIFO 6" "Not masked,Masked"
bitfld.byte 0x03 4. " MF6_OUT_INT ,Mask the OUT interrupt of FIFO 6" "Not masked,Masked"
textline " "
bitfld.byte 0x03 3. " MF5_SPK_INT ,Mask the short packet interrupt of FIFO 5" "Not masked,Masked"
bitfld.byte 0x03 2. " MF5_OUT_INT ,Mask the OUT interrupt of FIFO 5" "Not masked,Masked"
textline " "
bitfld.byte 0x03 1. " MF4_SPK_IN ,Mask the short packet interrupt of FIFO 4" "Not masked,Masked"
bitfld.byte 0x03 0. " MF4_OUT_INT ,Mask the OUT interrupt of FIFO 4" "Not masked,Masked"
line.byte 0x04 "int_mskb3,Interrupt Mask Register Byte 3"
bitfld.byte 0x04 7. " MF11_SPK_INT ,Mask the short packet interrupt of FIFO 11" "Not masked,Masked"
bitfld.byte 0x04 6. " MF11_OUT_INT ,Mask the OUT interrupt of FIFO 11" "Not masked,Masked"
textline " "
bitfld.byte 0x04 5. " MF10_SPK_INT ,Mask the short packet interrupt of FIFO 10" "Not masked,Masked"
bitfld.byte 0x04 4. " MF10_OUT_INT ,Mask the OUT interrupt of FIFO 10" "Not masked,Masked"
textline " "
bitfld.byte 0x04 3. " MF9_SPK_INT ,Mask the short packet interrupt of FIFO 9" "Not masked,Masked"
bitfld.byte 0x04 2. " MF9_OUT_INT ,Mask the OUT interrupt of FIFO 9" "Not masked,Masked"
textline " "
bitfld.byte 0x04 1. " MF8_SPK_IN ,Mask the short packet interrupt of FIFO 8" "Not masked,Masked"
bitfld.byte 0x04 0. " MF8_OUT_INT ,Mask the OUT interrupt of FIFO 8" "Not masked,Masked"
line.byte 0x05 "int_mskb4,Interrupt Mask Register Byte 4"
bitfld.byte 0x05 7. " MF15_SPK_INT ,Mask the short packet interrupt of FIFO 15" "Not masked,Masked"
bitfld.byte 0x05 6. " MF15_OUT_INT ,Mask the OUT interrupt of FIFO 15" "Not masked,Masked"
textline " "
bitfld.byte 0x05 5. " MF14_SPK_INT ,Mask the short packet interrupt of FIFO 14" "Not masked,Masked"
bitfld.byte 0x05 4. " MF14_OUT_INT ,Mask the OUT interrupt of FIFO 14" "Not masked,Masked"
textline " "
bitfld.byte 0x05 3. " MF13_SPK_INT ,Mask the short packet interrupt of FIFO 13" "Not masked,Masked"
bitfld.byte 0x05 2. " MF13_OUT_INT ,Mask the OUT interrupt of FIFO 13" "Not masked,Masked"
textline " "
bitfld.byte 0x05 1. " MF12_SPK_IN ,Mask the short packet interrupt of FIFO 12" "Not masked,Masked"
bitfld.byte 0x05 0. " MF12_OUT_INT ,Mask the OUT interrupt of FIFO 12" "Not masked,Masked"
line.byte 0x06 "int_mskb5,Interrupt Mask Register Byte 5"
bitfld.byte 0x06 7. " MF7_IN_INT ,Mask the IN interrupt bits of FIFO 7" "Not masked,Masked"
bitfld.byte 0x06 6. " MF6_IN_INT ,Mask the IN interrupt bits of FIFO 6" "Not masked,Masked"
textline " "
bitfld.byte 0x06 5. " MF5_IN_INT ,Mask the IN interrupt bits of FIFO 5" "Not masked,Masked"
bitfld.byte 0x06 4. " MF4_IN_INT ,Mask the IN interrupt bits of FIFO 4" "Not masked,Masked"
textline " "
bitfld.byte 0x06 3. " MF3_IN_INT ,Mask the IN interrupt bits of FIFO 3" "Not masked,Masked"
bitfld.byte 0x06 2. " MF2_IN_INT ,Mask the IN interrupt bits of FIFO 2" "Not masked,Masked"
textline " "
bitfld.byte 0x06 1. " MF1_IN_INT ,Mask the IN interrupt bits of FIFO 1" "Not masked,Masked"
bitfld.byte 0x06 0. " MF0_IN_INT ,Mask the IN interrupt bits of FIFO 0" "Not masked,Masked"
line.byte 0x07 "int_mskb6,Interrupt Mask Register Byte 6"
bitfld.byte 0x07 7. " MF15_IN_INT ,Mask the IN interrupt bits of FIFO 15" "Not masked,Masked"
bitfld.byte 0x07 6. " MF14_IN_INT ,Mask the IN interrupt bits of FIFO 14" "Not masked,Masked"
textline " "
bitfld.byte 0x07 5. " MF13_IN_INT ,Mask the IN interrupt bits of FIFO 13" "Not masked,Masked"
bitfld.byte 0x07 4. " MF12_IN_INT ,Mask the IN interrupt bits of FIFO 12" "Not masked,Masked"
textline " "
bitfld.byte 0x07 3. " MF11_IN_INT ,Mask the IN interrupt bits of FIFO 11" "Not masked,Masked"
bitfld.byte 0x07 2. " MF10_IN_INT ,Mask the IN interrupt bits of FIFO 10" "Not masked,Masked"
textline " "
bitfld.byte 0x07 1. " MF9_IN_INT ,Mask the IN interrupt bits of FIFO 9" "Not masked,Masked"
bitfld.byte 0x07 0. " MF8_IN_INT ,Mask the IN interrupt bits of FIFO 8" "Not masked,Masked"
line.byte 0x8 "int_mskb7,Interrupt Mask Register Byte 7"
bitfld.byte 0x08 7. " MRX0BYTE_INT ,Mask received zero-length data packet interrupt" "Not masked,Masked"
bitfld.byte 0x08 6. " MTX0BYTE_INT ,Mask transferred zero-length data packet interrupt" "Not masked,Masked"
textline " "
bitfld.byte 0x08 5. " MISO_SEQ_ABORT_INT ,Mask ISO sequential abort interrupt" "Not masked,Masked"
bitfld.byte 0x08 4. " MISO_SEQ_ERR_INT ,Mask ISO sequential error interrupt" "Not masked,Masked"
textline " "
bitfld.byte 0x08 3. " MRESM_INT ,Mask resume interrupt" "Not masked,Masked"
bitfld.byte 0x08 2. " MSUSP_INT ,Mask suspend interrupt" "Not masked,Masked"
textline " "
bitfld.byte 0x08 1. " MUSBRST_INT ,Mask USB reset interrupt" "Not masked,Masked"
bitfld.byte 0x08 0. " MHBF_EMPTY_INT ,Mask HBF empty interrupt" "Not masked ,Masked"
line.byte 0x9 "rx0byte_epb0,Receive Zero-length Data Packet Register Byte 0"
bitfld.byte 0x09 7. " rx0byte_ep7 ,Endpoint 7 receives a zero-length data packet" "Not received,Received"
bitfld.byte 0x09 6. " rx0byte_ep6 ,Endpoint 6 receives a zero-length data packet" "Not received,Received"
textline " "
bitfld.byte 0x09 5. " rx0byte_ep5 ,Endpoint 5 receives a zero-length data packet" "Not received,Received"
bitfld.byte 0x09 4. " rx0byte_ep4 ,Endpoint 4 receives a zero-length data packet" "Not received,Received"
textline " "
bitfld.byte 0x09 3. " rx0byte_ep3 ,Endpoint 3 receives a zero-length data packet" "Not received,Received"
bitfld.byte 0x09 2. " rx0byte_ep2 ,Endpoint 2 receives a zero-length data packet" "Not received,Received"
textline " "
bitfld.byte 0x09 1. " rx0byte_ep1 ,Endpoint 1 receives a zero-length data packet" "Not received,Received"
line.byte 0xa "rx0byte_epb1,Receive Zero-length Data Packet Register Byte 1"
bitfld.byte 0x0a 7. " rx0byte_ep15 ,Endpoint 15 receives a zero-length data packet" "Not received,Received"
bitfld.byte 0x0a 6. " rx0byte_ep14 ,Endpoint 14 receives a zero-length data packet" "Not received,Received"
textline " "
bitfld.byte 0x0a 5. " rx0byte_ep13 ,Endpoint 13 receives a zero-length data packet" "Not received,Received"
bitfld.byte 0x0a 4. " rx0byte_ep12 ,Endpoint 12 receives a zero-length data packet" "Not received,Received"
textline " "
bitfld.byte 0x0a 3. " rx0byte_ep11 ,Endpoint 11 receives a zero-length data packet" "Not received,Received"
bitfld.byte 0x0a 2. " rx0byte_ep10 ,Endpoint 10 receives a zero-length data packet" "Not received,Received"
textline " "
bitfld.byte 0x0a 1. " rx0byte_ep9 ,Endpoint 9 receives a zero-length data packet" "Not received,Received"
bitfld.byte 0x0a 0. " rx0byte_ep8 ,Endpoint 8 receives a zero-length data packet" "Not received,Received"
rgroup.byte 0x1c++0x7
line.byte 0x00 "fempt_b0,FIFO Empty Byte 0"
bitfld.byte 0x00 7. " fempt_f7 ,FIFO 7 empty" "Not empty,Empty"
bitfld.byte 0x00 6. " fempt_f6 ,FIFO 6 empty" "Not empty,Empty"
textline " "
bitfld.byte 0x00 5. " fempt_f5 ,FIFO 5 empty" "Not empty,Empty"
bitfld.byte 0x00 4. " fempt_f4 ,FIFO 4 empty" "Not empty,Empty"
textline " "
bitfld.byte 0x00 3. " fempt_f3 ,FIFO 3 empty" "Not empty,Empty"
bitfld.byte 0x00 2. " fempt_f2 ,FIFO 2 empty" "Not empty,Empty"
textline " "
bitfld.byte 0x00 1. " fempt_f1 ,FIFO 1 empty" "Not empty,Empty"
bitfld.byte 0x00 0. " fempt_f0 ,FIFO 0 empty" "Not empty,Empty"
line.byte 0x01 "fempt_b1,FIFO Empty Byte 1"
bitfld.byte 0x00 7. " fempt_f15 ,FIFO 15 empty" "Not empty,Empty"
bitfld.byte 0x00 6. " fempt_f14 ,FIFO 14 empty" "Not empty,Empty"
textline " "
bitfld.byte 0x00 5. " fempt_f13 ,FIFO 13 empty" "Not empty,Empty"
bitfld.byte 0x00 4. " fempt_f12 ,FIFO 12 empty" "Not empty,Empty"
textline " "
bitfld.byte 0x00 3. " fempt_f11 ,FIFO 11 empty" "Not empty,Empty"
bitfld.byte 0x00 2. " fempt_f10 ,FIFO 10 empty" "Not empty,Empty"
textline " "
bitfld.byte 0x00 1. " fempt_f9 ,FIFO 9 empty" "Not empty,Empty"
bitfld.byte 0x00 0. " fempt_f8 ,FIFO 8 empty" "Not empty,Empty"
width 11.
tree.end
tree "Interrupt Source Registers"
base ad:0x90b00000
width 16.
rgroup.byte 0x20++0x0
line.byte 0x00 "int_grp,Interrupt Group Register"
bitfld.byte 0x00 7. " INT_SCR7 ,Interrupts in Interrupt Source Register Byte 7" "No interrupt,Interrupt"
bitfld.byte 0x00 6. " INT_SCR6 ,Interrupts in Interrupt Source Register Byte 6" "No interrupt,Interrupt"
textline " "
bitfld.byte 0x00 5. " INT_SCR5 ,Interrupts in Interrupt Source Register Byte 5" "No interrupt,Interrupt"
bitfld.byte 0x00 4. " INT_SCR4 ,Interrupts in Interrupt Source Register Byte 4" "No interrupt,Interrupt"
textline " "
bitfld.byte 0x00 3. " INT_SCR3 ,Interrupts in Interrupt Source Register Byte 3" "No interrupt,Interrupt"
bitfld.byte 0x00 2. " INT_SCR2 ,Interrupts in Interrupt Source Register Byte 2" "No interrupt,Interrupt"
textline " "
bitfld.byte 0x00 1. " INT_SCR1 ,Interrupts in Interrupt Source Register Byte 1" "No interrupt,Interrupt"
bitfld.byte 0x00 0. " INT_SCR0 ,Interrupts in Interrupt Source Register Byte 0" "No interrupt,Interrupt"
group.byte 0x21++0x0
line.byte 0x00 "int_srcb0,Interrupt Source Register Byte 0"
bitfld.byte 0x00 7. " CX_COMABT_INT ,Command abort event" "No effect,Occurred"
bitfld.byte 0x00 5. " RBUF_ERR ,AP reads an empty FIFO" "Not read,Read"
textline " "
bitfld.byte 0x00 4. " CX_COMFAIL_INT ,Control transfer terminate" "No effect,Abnormally"
bitfld.byte 0x00 3. " CX_COMEND_INT ,Control transfer enter the status stage" "Not entered,Entered"
textline " "
bitfld.byte 0x00 2. " CX_OUT_INT ,Control transfer contains valid data" "Not contained,Contained"
bitfld.byte 0x00 1. " CX_IN_INT ,Firmware should write data for the control-read transfer" "No effect,Write"
textline " "
bitfld.byte 0x00 0. " CX_SETUP_INT ,Firmware starts to read data from the FUSB220's" "Not read,Read"
rgroup.byte 0x22++0x5
line.byte 0x00 "int_srcb1,Interrupt Source Register Byte 1"
bitfld.byte 0x00 7. " F3_SPK_INT ,Short packet data received in FIFO 3" "Not received,Received"
bitfld.byte 0x00 6. " F3_OUT_INT ,FIFO3 ready to be read" "Not ready,Ready"
textline " "
bitfld.byte 0x00 5. " F2_SPK_INT ,Short packet data received in FIFO 2" "Not received,Received"
bitfld.byte 0x00 4. " F2_OUT_INT ,FIFO2 ready to be read" "Not ready,Ready"
textline " "
bitfld.byte 0x00 3. " F1_SPK_INT ,Short packet data received in FIFO 1" "Not received,Received"
bitfld.byte 0x00 2. " F1_OUT_INT ,FIFO1 ready to be read" "Not ready,Ready"
textline " "
bitfld.byte 0x00 1. " F0_SPK_INT ,Short packet data received in FIFO 0" "Not received,Received"
bitfld.byte 0x00 0. " F0_OUT_INT ,FIFO0 ready to be read" "Not ready,Ready"
line.byte 0x01 "int_srcb2,Interrupt Source Register Byte 2"
bitfld.byte 0x01 7. " F7_SPK_INT ,Short packet data received in FIFO 7" "Not received,Received"
bitfld.byte 0x01 6. " F7_OUT_INT ,FIFO7 ready to be read" "Not ready,Ready"
textline " "
bitfld.byte 0x01 5. " F6_SPK_INT ,Short packet data received in FIFO 6" "Not received,Received"
bitfld.byte 0x01 4. " F6_OUT_INT ,FIFO6 ready to be read" "Not ready,Ready"
textline " "
bitfld.byte 0x01 3. " F5_SPK_INT ,Short packet data received in FIFO 5" "Not received,Received"
bitfld.byte 0x01 2. " F5_OUT_INT ,FIFO5 ready to be read" "Not ready,Ready"
textline " "
bitfld.byte 0x01 1. " F4_SPK_INT ,Short packet data received in FIFO 4" "Not received,Received"
bitfld.byte 0x01 0. " F4_OUT_INT ,FIFO4 ready to be read" "Not ready,Ready"
line.byte 0x02 "int_srcb3,Interrupt Source Register Byte 3"
bitfld.byte 0x02 7. " F11_SPK_INT ,Short packet data received in FIFO 11" "Not received,Received"
bitfld.byte 0x02 6. " F11_OUT_INT ,FIFO11 ready to be read" "Not ready,Ready"
textline " "
bitfld.byte 0x02 5. " F10_SPK_INT ,Short packet data received in FIFO 10" "Not received,Received"
bitfld.byte 0x02 4. " F10_OUT_INT ,FIFO10 ready to be read" "Not ready,Ready"
textline " "
bitfld.byte 0x02 3. " F9_SPK_INT ,Short packet data received in FIFO 9" "Not received,Received"
bitfld.byte 0x02 2. " F9_OUT_INT ,FIFO9 ready to be read" "Not ready,Ready"
textline " "
bitfld.byte 0x02 1. " F8_SPK_INT ,Short packet data received in FIFO 8" "Not received,Received"
bitfld.byte 0x02 0. " F8_OUT_INT ,FIFO8 ready to be read" "Not ready,Ready"
line.byte 0x03 "int_srcb4,Interrupt Source Register Byte 4"
bitfld.byte 0x03 7. " F15_SPK_INT ,Short packet data received in FIFO 15" "Not received,Received"
bitfld.byte 0x03 6. " F15_OUT_INT ,FIFO15 ready to be read" "Not ready,Ready"
textline " "
bitfld.byte 0x03 5. " F14_SPK_INT ,Short packet data received in FIFO 14" "Not received,Received"
bitfld.byte 0x03 4. " F14_OUT_INT ,FIFO14 ready to be read" "Not ready,Ready"
textline " "
bitfld.byte 0x03 3. " F13_SPK_INT ,Short packet data received in FIFO 13" "Not received,Received"
bitfld.byte 0x03 2. " F13_OUT_INT ,FIFO13 ready to be read" "Not ready,Ready"
textline " "
bitfld.byte 0x03 1. " F12_SPK_INT ,Short packet data received in FIFO 12" "Not received,Received"
bitfld.byte 0x03 0. " F12_OUT_INT ,FIFO12 ready to be read" "Not ready,Ready"
line.byte 0x04 "int_srcb5,Interrupt Source Register Byte 5"
bitfld.byte 0x04 7. " F7_IN_INT ,FIFO 7 ready to be written" "Not ready,Ready"
bitfld.byte 0x04 6. " F6_IN_INT ,FIFO 6 ready to be written" "Not ready,Ready"
textline " "
bitfld.byte 0x04 5. " F5_IN_INT ,FIFO 5 ready to be written" "Not ready,Ready"
bitfld.byte 0x04 4. " F4_IN_INT ,FIFO 4 ready to be written" "Not ready,Ready"
textline " "
bitfld.byte 0x04 3. " F3_IN_INT ,FIFO 3 ready to be written" "Not ready,Ready"
bitfld.byte 0x04 2. " F2_IN_INT ,FIFO 2 ready to be written" "Not ready,Ready"
textline " "
bitfld.byte 0x04 1. " F1_IN_INT ,FIFO 1 ready to be written" "Not ready,Ready"
bitfld.byte 0x04 0. " F0_IN_INT ,FIFO 0 ready to be written" "Not ready,Ready"
line.byte 0x05 "int_srcb6,Interrupt Source Register Byte 6"
bitfld.byte 0x05 7. " F15_IN_INT ,FIFO 15 ready to be written" "Not ready,Ready"
bitfld.byte 0x05 6. " F14_IN_INT ,FIFO 14 ready to be written" "Not ready,Ready"
textline " "
bitfld.byte 0x05 5. " F13_IN_INT ,FIFO 13 ready to be written" "Not ready,Ready"
bitfld.byte 0x05 4. " F12_IN_INT ,FIFO 12 ready to be written" "Not ready,Ready"
textline " "
bitfld.byte 0x05 3. " F11_IN_INT ,FIFO 11 ready to be written" "Not ready,Ready"
bitfld.byte 0x05 2. " F10_IN_INT ,FIFO 10 ready to be written" "Not ready,Ready"
textline " "
bitfld.byte 0x05 1. " F9_IN_INT ,FIFO 9 ready to be written" "Not ready,Ready"
bitfld.byte 0x05 0. " F8_IN_INT ,FIFO 8 ready to be written" "Not ready,Ready"
group.byte 0x28++0x06
line.byte 0x00 "int_srcb7,Interrupt Source Register Byte 7"
bitfld.long 0x00 7. " RX0BYTE_INT ,Received zero-length data packet interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. " TX0BYTE_INT ,Transferred zero-length data packet interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 5. " ISO_SEQ_ABORT_INT ,ISO sequential abort interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. " ISO_SEQ_ERR_INT ,ISO sequential error interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 3. " RESM_INT ,Resume interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. " SUSP_INT ,Suspend interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 1. " USBRST_INT ,USB reset interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. " HBF_EMPTY_INT ,HBF empty interrupt" "No interrupt,Interrupt"
line.byte 0x01 "iso_seq_errb0,Isochronous Sequential Error Register Byte 0"
bitfld.byte 0x01 7. " iso_seq_err_ep7 ,Endpoint 7 receives an isochronous sequential error" "No error,Error"
bitfld.byte 0x01 6. " iso_seq_err_ep6 ,Endpoint 6 receives an isochronous sequential error" "No error,Error"
textline " "
bitfld.byte 0x01 5. " iso_seq_err_ep5 ,Endpoint 5 receives an isochronous sequential error" "No error,Error"
bitfld.byte 0x01 4. " iso_seq_err_ep4 ,Endpoint 4 receives an isochronous sequential error" "No error,Error"
textline " "
bitfld.byte 0x01 3. " iso_seq_err_ep3 ,Endpoint 3 receives an isochronous sequential error" "No error,Error"
bitfld.byte 0x01 2. " iso_seq_err_ep2 ,Endpoint 2 receives an isochronous sequential error" "No error,Error"
textline " "
bitfld.byte 0x01 1. " iso_seq_err_ep1 ,Endpoint 1 receives an isochronous sequential error" "No error,Error"
line.byte 0x02 "iso_seq_errb1,Isochronous Sequential Error Register Byte 1"
bitfld.byte 0x02 7. " iso_seq_err_ep15 ,Endpoint 15 receives an isochronous sequential error" "No error,Error"
bitfld.byte 0x02 6. " iso_seq_err_ep14 ,Endpoint 14 receives an isochronous sequential error" "No error,Error"
textline " "
bitfld.byte 0x02 5. " iso_seq_err_ep13 ,Endpoint 13 receives an isochronous sequential error" "No error,Error"
bitfld.byte 0x02 4. " iso_seq_err_ep12 ,Endpoint 12 receives an isochronous sequential error" "No error,Error"
textline " "
bitfld.byte 0x02 3. " iso_seq_err_ep11 ,Endpoint 11 receives an isochronous sequential error" "No error,Error"
bitfld.byte 0x02 2. " iso_seq_err_ep10 ,Endpoint 10 receives an isochronous sequential error" "No error,Error"
textline " "
bitfld.byte 0x02 1. " iso_seq_err_ep9 ,Endpoint 9 receives an isochronous sequential error" "No error,Error"
bitfld.byte 0x02 0. " iso_seq_err_ep8 ,Endpoint 8 receives an isochronous sequential error" "No error,Error"
line.byte 0x03 "iso_seq_abtb0,Isochronous Sequential Abort Register Byte 0"
bitfld.byte 0x03 7. " iso_seq_abt_ep7 ,Endpoint 7 receives an isochronous sequential abort" "No abort,Abort"
bitfld.byte 0x03 6. " iso_seq_abt_ep6 ,Endpoint 6 receives an isochronous sequential abort" "No abort,Abort"
textline " "
bitfld.byte 0x03 5. " iso_seq_abt_ep5 ,Endpoint 5 receives an isochronous sequential abort" "No abort,Abort"
bitfld.byte 0x03 4. " iso_seq_abt_ep4 ,Endpoint 4 receives an isochronous sequential abort" "No abort,Abort"
textline " "
bitfld.byte 0x03 3. " iso_seq_abt_ep3 ,Endpoint 3 receives an isochronous sequential abort" "No abort,Abort"
bitfld.byte 0x03 2. " iso_seq_abt_ep2 ,Endpoint 2 receives an isochronous sequential abort" "No abort,Abort"
textline " "
bitfld.byte 0x03 1. " iso_seq_abt_ep1 ,Endpoint 1 receives an isochronous sequential abort" "No abort,Abort"
line.byte 0x04 "iso_seq_abtb1,Isochronous Sequential Abort Register Byte 1"
bitfld.byte 0x04 7. " iso_seq_abt_ep15 ,Endpoint 15 receives an isochronous sequential abort" "No abort,Abort"
bitfld.byte 0x04 6. " iso_seq_abt_ep14 ,Endpoint 14 receives an isochronous sequential abort" "No abort,Abort"
textline " "
bitfld.byte 0x04 5. " iso_seq_abt_ep13 ,Endpoint 13 receives an isochronous sequential abort" "No abort,Abort"
bitfld.byte 0x04 4. " iso_seq_abt_ep12 ,Endpoint 12 receives an isochronous sequential abort" "No abort,Abort"
textline " "
bitfld.byte 0x04 3. " iso_seq_abt_ep11 ,Endpoint 11 receives an isochronous sequential abort" "No abort,Abort"
bitfld.byte 0x04 2. " iso_seq_abt_ep10 ,Endpoint 10 receives an isochronous sequential abort" "No abort,Abort"
textline " "
bitfld.byte 0x04 1. " iso_seq_abt_ep9 ,Endpoint 9 receives an isochronous sequential abort" "No abort,Abort"
bitfld.byte 0x04 0. " iso_seq_abt_ep8 ,Endpoint 8 receives an isochronous sequential abort" "No abort,Abort"
line.byte 0x05 "tx0byteb0,Transferred Zero-length Register Byte 0"
bitfld.byte 0x5 7. " tx0byte_ep7 ,Endpoint 7 transfers a zero-length data packet" "Not transferred,Transferred"
bitfld.byte 0x5 6. " tx0byte_ep6 ,Endpoint 6 transfers a zero-length data packet" "Not transferred,Transferred"
textline " "
bitfld.byte 0x5 5. " tx0byte_ep5 ,Endpoint 5 transfers a zero-length data packet" "Not transferred,Transferred"
bitfld.byte 0x5 4. " tx0byte_ep4 ,Endpoint 4 transfers a zero-length data packet" "Not transferred,Transferred"
textline " "
bitfld.byte 0x5 3. " tx0byte_ep3 ,Endpoint 3 transfers a zero-length data packet" "Not transferred,Transferred"
bitfld.byte 0x5 2. " tx0byte_ep2 ,Endpoint 2 transfers a zero-length data packet" "Not transferred,Transferred"
textline " "
bitfld.byte 0x5 1. " tx0byte_ep1 ,Endpoint 1 transfers a zero-length data packet" "Not transferred,Transferred"
bitfld.byte 0x5 0. " tx0byte_ep0 ,Endpoint 0 transfers a zero-length data packet" "Not transferred,Transferred"
line.byte 0x06 "tx0byteb1,Transferred Zero-length Register Byte 1"
bitfld.byte 0x6 7. " tx0byte_ep15 ,Endpoint 15 transfers a zero-length data packet" "Not transferred,Transferred"
bitfld.byte 0x6 6. " tx0byte_ep14 ,Endpoint 14 transfers a zero-length data packet" "Not transferred,Transferred"
textline " "
bitfld.byte 0x6 5. " tx0byte_ep13 ,Endpoint 13 transfers a zero-length data packet" "Not transferred,Transferred"
bitfld.byte 0x6 4. " tx0byte_ep12 ,Endpoint 12 transfers a zero-length data packet" "Not transferred,Transferred"
textline " "
bitfld.byte 0x6 3. " tx0byte_ep11 ,Endpoint 11 transfers a zero-length data packet" "Not transferred,Transferred"
bitfld.byte 0x6 2. " tx0byte_ep10 ,Endpoint 10 transfers a zero-length data packet" "Not transferred,Transferred"
textline " "
bitfld.byte 0x6 1. " tx0byte_ep9 ,Endpoint 9 transfers a zero-length data packet" "Not transferred,Transferred"
bitfld.byte 0x6 0. " tx0byte_ep8 ,Endpoint 8 transfers a zero-length data packet" "Not transferred,Transferred"
width 11.
tree.end
tree "Miscellaneous Register"
base ad:0x90b00000
width 16.
group.byte 0x2f++0x00
line.byte 0x00 "idle_cnt,Idle Counter"
bitfld.byte 0x00 0.--2. " IDLE_CNT ,Timing delay" "0ms,1ms,2ms,3ms,4ms,5ms,6ms,7ms"
width 11.
tree.end
tree "Endpoint Configuration and Status Registers"
base ad:0x90b00000
width 16.
group.byte 0x30++0x9
line.byte 0x0 "ep1_map,Endpoint 1 Map Register"
bitfld.byte 0x0 4.--7. " FNO_OEP1[3:0] ,FIFO number for OUT endpoint 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x0 0.--3. " FNO_IEP1[3:0] ,FIFO number for IN endpoint 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.byte 0x1 "ep2_map,Endpoint 2 Map Register"
bitfld.byte 0x1 4.--7. " FNO_OEP2[3:0] ,FIFO number for OUT endpoint 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x1 0.--3. " FNO_IEP2[3:0] ,FIFO number for IN endpoint 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.byte 0x2 "ep3_map,Endpoint 3 Map Register"
bitfld.byte 0x2 4.--7. " FNO_OEP3[3:0] ,FIFO number for OUT endpoint 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x2 0.--3. " FNO_IEP3[3:0] ,FIFO number for IN endpoint 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.byte 0x3 "ep4_map,Endpoint 4 Map Register"
bitfld.byte 0x3 4.--7. " FNO_OEP4[3:0] ,FIFO number for OUT endpoint 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x3 0.--3. " FNO_IEP4[3:0] ,FIFO number for IN endpoint 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.byte 0x4 "ep5_map,Endpoint 5 Map Register"
bitfld.byte 0x4 4.--7. " FNO_OEP5[3:0] ,FIFO number for OUT endpoint 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x4 0.--3. " FNO_IEP5[3:0] ,FIFO number for IN endpoint 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.byte 0x5 "ep6_map,Endpoint 6 Map Register"
bitfld.byte 0x5 4.--7. " FNO_OEP6[3:0] ,FIFO number for OUT endpoint 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x5 0.--3. " FNO_IEP6[3:0] ,FIFO number for IN endpoint 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.byte 0x6 "ep7_map,Endpoint 7 Map Register"
bitfld.byte 0x6 4.--7. " FNO_OEP7[3:0] ,FIFO number for OUT endpoint 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x6 0.--3. " FNO_IEP7[3:0] ,FIFO number for IN endpoint 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.byte 0x7 "ep8_map,Endpoint 8 Map Register"
bitfld.byte 0x7 4.--7. " FNO_OEP8[3:0] ,FIFO number for OUT endpoint 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x7 0.--3. " FNO_IEP8[3:0] ,FIFO number for IN endpoint 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.byte 0x8 "ep9_map,Endpoint 9 Map Register"
bitfld.byte 0x8 4.--7. " FNO_OEP9[3:0] ,FIFO number for OUT endpoint 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x8 0.--3. " FNO_IEP9[3:0] ,FIFO number for IN endpoint 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.byte 0x39++0x6
line.byte 0x0 "ep10_map,Endpoint 10 Map Register"
bitfld.byte 0x0 4.--7. " FNO_OEP10[3:0] ,FIFO number for OUT endpoint 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x0 0.--3. " FNO_IEP10[3:0] ,FIFO number for IN endpoint 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.byte 0x1 "ep11_map,Endpoint 11 Map Register"
bitfld.byte 0x1 4.--7. " FNO_OEP11[3:0] ,FIFO number for OUT endpoint 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x1 0.--3. " FNO_IEP11[3:0] ,FIFO number for IN endpoint 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.byte 0x2 "ep12_map,Endpoint 12 Map Register"
bitfld.byte 0x2 4.--7. " FNO_OEP12[3:0] ,FIFO number for OUT endpoint 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x2 0.--3. " FNO_IEP12[3:0] ,FIFO number for IN endpoint 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.byte 0x3 "ep13_map,Endpoint 13 Map Register"
bitfld.byte 0x3 4.--7. " FNO_OEP13[3:0] ,FIFO number for OUT endpoint 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x3 0.--3. " FNO_IEP13[3:0] ,FIFO number for IN endpoint 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.byte 0x4 "ep14_map,Endpoint 14 Map Register"
bitfld.byte 0x4 4.--7. " FNO_OEP14[3:0] ,FIFO number for OUT endpoint 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x4 0.--3. " FNO_IEP14[3:0] ,FIFO number for IN endpoint 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.byte 0x5 "ep15_map,Endpoint 15 Map Register"
bitfld.byte 0x5 4.--7. " FNO_OEP15[3:0] ,FIFO number for OUT endpoint 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x5 0.--3. " FNO_IEP15[3:0] ,FIFO number for IN endpoint 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.byte 0x3f++0x0
line.byte 0x00 "hbf_cnt,HBF Data Byte Count"
bitfld.byte 0x00 0.--4. " HBF_CNT[4:0] ,HBF data byte count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.byte 0x40++0x1
line.byte 0x00 "iep1_xpsz ,IN endpoint 1 MaxPacketSize register low byte "
hexmask.byte 0x00 0.--7. 1. " MAXPS_IEP1[7:0] ,Max packet size of IN endpoint 1"
group.byte 0x42++0x1
line.byte 0x00 "iep2_xpsz ,IN endpoint 2 MaxPacketSize register low byte "
hexmask.byte 0x00 0.--7. 1. " MAXPS_IEP2[7:0] ,Max packet size of IN endpoint 2"
group.byte 0x44++0x1
line.byte 0x00 "iep3_xpsz ,IN endpoint 3 MaxPacketSize register low byte "
hexmask.byte 0x00 0.--7. 1. " MAXPS_IEP3[7:0] ,Max packet size of IN endpoint 3"
group.byte 0x46++0x1
line.byte 0x00 "iep4_xpsz ,IN endpoint 4 MaxPacketSize register low byte "
hexmask.byte 0x00 0.--7. 1. " MAXPS_IEP4[7:0] ,Max packet size of IN endpoint 4"
group.byte 0x48++0x1
line.byte 0x00 "iep5_xpsz ,IN endpoint 5 MaxPacketSize register low byte "
hexmask.byte 0x00 0.--7. 1. " MAXPS_IEP5[7:0] ,Max packet size of IN endpoint 5"
group.byte 0x4A++0x1
line.byte 0x00 "iep6_xpsz ,IN endpoint 6 MaxPacketSize register low byte "
hexmask.byte 0x00 0.--7. 1. " MAXPS_IEP6[7:0] ,Max packet size of IN endpoint 6"
group.byte 0x4C++0x1
line.byte 0x00 "iep7_xpsz ,IN endpoint 7 MaxPacketSize register low byte "
hexmask.byte 0x00 0.--7. 1. " MAXPS_IEP7[7:0] ,Max packet size of IN endpoint 7"
group.byte 0x4E++0x1
line.byte 0x00 "iep8_xpsz ,IN endpoint 8 MaxPacketSize register low byte "
hexmask.byte 0x00 0.--7. 1. " MAXPS_IEP8[7:0] ,Max packet size of IN endpoint 8"
group.byte 0x50++0x1
line.byte 0x00 "iep9_xpsz ,IN endpoint 9 MaxPacketSize register low byte "
hexmask.byte 0x00 0.--7. 1. " MAXPS_IEP9[7:0] ,Max packet size of IN endpoint 9"
group.byte 0x52++0x1
line.byte 0x00 "iep10_xpsz ,IN endpoint 10 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_IEP10[7:0] ,Max packet size of IN endpoint 10"
group.byte 0x54++0x1
line.byte 0x00 "iep11_xpsz ,IN endpoint 11 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_IEP11[7:0] ,Max packet size of IN endpoint 11"
group.byte 0x56++0x1
line.byte 0x00 "iep12_xpsz ,IN endpoint 12 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_IEP12[7:0] ,Max packet size of IN endpoint 12"
group.byte 0x58++0x1
line.byte 0x00 "iep13_xpsz ,IN endpoint 13 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_IEP13[7:0] ,Max packet size of IN endpoint 13"
group.byte 0x5A++0x1
line.byte 0x00 "iep14_xpsz ,IN endpoint 14 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_IEP14[7:0] ,Max packet size of IN endpoint 14"
group.byte 0x5C++0x1
line.byte 0x00 "iep15_xpsz ,IN endpoint 15 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_IEP15[7:0] ,Max packet size of IN endpoint 15"
group.byte 0x41++0x1
line.byte 0x00 "iep1_ypsz ,IN endpoint 1 MaxPacketSize register high byte"
bitfld.byte 0x00 7. " TX0BYTE_IEP1 ,Transfer a zero-length data packet from endpoint 1 to USB host" "Not transferred,Transferred"
bitfld.byte 0x00 5.--6. " TX_NUM_HBW_IEP1 ,Transaction number for high bandwidth endpoint 1" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.byte 0x00 4. " RSTG_IEP1 ,Reset toggle sequence for IN endpoint 1" "No reset,Reset"
bitfld.byte 0x00 3. " STL_IEP1 ,Stall IN endpoint 1" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_IEP1[10:8] ,Max packet size of IN Endpoint 1:" "0,1,2,3,4,5,6,7"
group.byte 0x43++0x1
line.byte 0x00 "iep2_ypsz ,IN endpoint 2 MaxPacketSize register high byte"
bitfld.byte 0x00 7. " TX0BYTE_IEP2 ,Transfer a zero-length data packet from endpoint 2 to USB host" "Not transferred,Transferred"
bitfld.byte 0x00 5.--6. " TX_NUM_HBW_IEP2 ,Transaction number for high bandwidth endpoint 2" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.byte 0x00 4. " RSTG_IEP2 ,Reset toggle sequence for IN endpoint 2" "No reset,Reset"
bitfld.byte 0x00 3. " STL_IEP2 ,Stall IN endpoint 2" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_IEP2[10:8] ,Max packet size of IN Endpoint 2:" "0,1,2,3,4,5,6,7"
group.byte 0x45++0x1
line.byte 0x00 "iep3_ypsz ,IN endpoint 3 MaxPacketSize register high byte"
bitfld.byte 0x00 7. " TX0BYTE_IEP3 ,Transfer a zero-length data packet from endpoint 3 to USB host" "Not transferred,Transferred"
bitfld.byte 0x00 5.--6. " TX_NUM_HBW_IEP3 ,Transaction number for high bandwidth endpoint 3" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.byte 0x00 4. " RSTG_IEP3 ,Reset toggle sequence for IN endpoint 3" "No reset,Reset"
bitfld.byte 0x00 3. " STL_IEP3 ,Stall IN endpoint 3" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_IEP3[10:8] ,Max packet size of IN Endpoint 3:" "0,1,2,3,4,5,6,7"
group.byte 0x47++0x1
line.byte 0x00 "iep4_ypsz ,IN endpoint 4 MaxPacketSize register high byte"
bitfld.byte 0x00 7. " TX0BYTE_IEP4 ,Transfer a zero-length data packet from endpoint 4 to USB host" "Not transferred,Transferred"
bitfld.byte 0x00 5.--6. " TX_NUM_HBW_IEP4 ,Transaction number for high bandwidth endpoint 4" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.byte 0x00 4. " RSTG_IEP4 ,Reset toggle sequence for IN endpoint 4" "No reset,Reset"
bitfld.byte 0x00 3. " STL_IEP4 ,Stall IN endpoint 4" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_IEP4[10:8] ,Max packet size of IN Endpoint 4:" "0,1,2,3,4,5,6,7"
group.byte 0x49++0x1
line.byte 0x00 "iep5_ypsz ,IN endpoint 5 MaxPacketSize register high byte"
bitfld.byte 0x00 7. " TX0BYTE_IEP5 ,Transfer a zero-length data packet from endpoint 5 to USB host" "Not transferred,Transferred"
bitfld.byte 0x00 5.--6. " TX_NUM_HBW_IEP5 ,Transaction number for high bandwidth endpoint 5" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.byte 0x00 4. " RSTG_IEP5 ,Reset toggle sequence for IN endpoint 5" "No reset,Reset"
bitfld.byte 0x00 3. " STL_IEP5 ,Stall IN endpoint 5" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_IEP5[10:8] ,Max packet size of IN Endpoint 5:" "0,1,2,3,4,5,6,7"
group.byte 0x4B++0x1
line.byte 0x00 "iep6_ypsz ,IN endpoint 6 MaxPacketSize register high byte"
bitfld.byte 0x00 7. " TX0BYTE_IEP6 ,Transfer a zero-length data packet from endpoint 6 to USB host" "Not transferred,Transferred"
bitfld.byte 0x00 5.--6. " TX_NUM_HBW_IEP6 ,Transaction number for high bandwidth endpoint 6" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.byte 0x00 4. " RSTG_IEP6 ,Reset toggle sequence for IN endpoint 6" "No reset,Reset"
bitfld.byte 0x00 3. " STL_IEP6 ,Stall IN endpoint 6" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_IEP6[10:8] ,Max packet size of IN Endpoint 6:" "0,1,2,3,4,5,6,7"
group.byte 0x4D++0x1
line.byte 0x00 "iep7_ypsz ,IN endpoint 7 MaxPacketSize register high byte"
bitfld.byte 0x00 7. " TX0BYTE_IEP7 ,Transfer a zero-length data packet from endpoint 7 to USB host" "Not transferred,Transferred"
bitfld.byte 0x00 5.--6. " TX_NUM_HBW_IEP7 ,Transaction number for high bandwidth endpoint 7" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.byte 0x00 4. " RSTG_IEP7 ,Reset toggle sequence for IN endpoint 7" "No reset,Reset"
bitfld.byte 0x00 3. " STL_IEP7 ,Stall IN endpoint 7" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_IEP7[10:8] ,Max packet size of IN Endpoint 7:" "0,1,2,3,4,5,6,7"
group.byte 0x4F++0x1
line.byte 0x00 "iep8_ypsz ,IN endpoint 8 MaxPacketSize register high byte"
bitfld.byte 0x00 7. " TX0BYTE_IEP8 ,Transfer a zero-length data packet from endpoint 8 to USB host" "Not transferred,Transferred"
bitfld.byte 0x00 5.--6. " TX_NUM_HBW_IEP8 ,Transaction number for high bandwidth endpoint 8" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.byte 0x00 4. " RSTG_IEP8 ,Reset toggle sequence for IN endpoint 8" "No reset,Reset"
bitfld.byte 0x00 3. " STL_IEP8 ,Stall IN endpoint 8" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_IEP8[10:8] ,Max packet size of IN Endpoint 8:" "0,1,2,3,4,5,6,7"
group.byte 0x51++0x1
line.byte 0x00 "iep9_ypsz ,IN endpoint 9 MaxPacketSize register high byte"
bitfld.byte 0x00 7. " TX0BYTE_IEP9 ,Transfer a zero-length data packet from endpoint 9 to USB host" "Not transferred,Transferred"
bitfld.byte 0x00 5.--6. " TX_NUM_HBW_IEP9 ,Transaction number for high bandwidth endpoint 9" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.byte 0x00 4. " RSTG_IEP9 ,Reset toggle sequence for IN endpoint 9" "No reset,Reset"
bitfld.byte 0x00 3. " STL_IEP9 ,Stall IN endpoint 9" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_IEP9[10:8] ,Max packet size of IN Endpoint 9:" "0,1,2,3,4,5,6,7"
group.byte 0x53++0x1
line.byte 0x00 "iep10_ypsz ,IN endpoint 10 MaxPacketSize register high byte"
bitfld.byte 0x00 7. " TX0BYTE_IEP10 ,Transfer a zero-length data packet from endpoint 10 to USB host" "Not transferred,Transferred"
bitfld.byte 0x00 5.--6. " TX_NUM_HBW_IEP10,Transaction number for high bandwidth endpoint 10" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.byte 0x00 4. " RSTG_IEP10 ,Reset toggle sequence for IN endpoint 10" "No reset,Reset"
bitfld.byte 0x00 3. " STL_IEP10 ,Stall IN endpoint 10" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_IEP10[10:8] ,Max packet size of IN Endpoint 10:" "0,1,2,3,4,5,6,7"
group.byte 0x55++0x1
line.byte 0x00 "iep11_ypsz ,IN endpoint 11 MaxPacketSize register high byte"
bitfld.byte 0x00 7. " TX0BYTE_IEP11 ,Transfer a zero-length data packet from endpoint 11 to USB host" "Not transferred,Transferred"
bitfld.byte 0x00 5.--6. " TX_NUM_HBW_IEP11,Transaction number for high bandwidth endpoint 11" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.byte 0x00 4. " RSTG_IEP11 ,Reset toggle sequence for IN endpoint 11" "No reset,Reset"
bitfld.byte 0x00 3. " STL_IEP11 ,Stall IN endpoint 11" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_IEP11[10:8] ,Max packet size of IN Endpoint 11:" "0,1,2,3,4,5,6,7"
group.byte 0x57++0x1
line.byte 0x00 "iep12_ypsz ,IN endpoint 12 MaxPacketSize register high byte"
bitfld.byte 0x00 7. " TX0BYTE_IEP12 ,Transfer a zero-length data packet from endpoint 12 to USB host" "Not transferred,Transferred"
bitfld.byte 0x00 5.--6. " TX_NUM_HBW_IEP12,Transaction number for high bandwidth endpoint 12" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.byte 0x00 4. " RSTG_IEP12 ,Reset toggle sequence for IN endpoint 12" "No reset,Reset"
bitfld.byte 0x00 3. " STL_IEP12 ,Stall IN endpoint 12" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_IEP12[10:8] ,Max packet size of IN Endpoint 12:" "0,1,2,3,4,5,6,7"
group.byte 0x59++0x1
line.byte 0x00 "iep13_ypsz ,IN endpoint 13 MaxPacketSize register high byte"
bitfld.byte 0x00 7. " TX0BYTE_IEP13 ,Transfer a zero-length data packet from endpoint 13 to USB host" "Not transferred,Transferred"
bitfld.byte 0x00 5.--6. " TX_NUM_HBW_IEP13,Transaction number for high bandwidth endpoint 13" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.byte 0x00 4. " RSTG_IEP13 ,Reset toggle sequence for IN endpoint 13" "No reset,Reset"
bitfld.byte 0x00 3. " STL_IEP13 ,Stall IN endpoint 13" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_IEP13[10:8] ,Max packet size of IN Endpoint 13:" "0,1,2,3,4,5,6,7"
group.byte 0x5B++0x1
line.byte 0x00 "iep14_ypsz ,IN endpoint 14 MaxPacketSize register high byte"
bitfld.byte 0x00 7. " TX0BYTE_IEP14 ,Transfer a zero-length data packet from endpoint 14 to USB host" "Not transferred,Transferred"
bitfld.byte 0x00 5.--6. " TX_NUM_HBW_IEP14,Transaction number for high bandwidth endpoint 14" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.byte 0x00 4. " RSTG_IEP14 ,Reset toggle sequence for IN endpoint 14" "No reset,Reset"
bitfld.byte 0x00 3. " STL_IEP14 ,Stall IN endpoint 14" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_IEP14[10:8] ,Max packet size of IN Endpoint 14:" "0,1,2,3,4,5,6,7"
group.byte 0x5D++0x1
line.byte 0x00 "iep15_ypsz ,IN endpoint 15 MaxPacketSize register high byte"
bitfld.byte 0x00 7. " TX0BYTE_IEP15 ,Transfer a zero-length data packet from endpoint 15 to USB host" "Not transferred,Transferred"
bitfld.byte 0x00 5.--6. " TX_NUM_HBW_IEP15,Transaction number for high bandwidth endpoint 15" "Non-high-bandwidth,Non-high-bandwidth,Two,Three"
textline " "
bitfld.byte 0x00 4. " RSTG_IEP15 ,Reset toggle sequence for IN endpoint 15" "No reset,Reset"
bitfld.byte 0x00 3. " STL_IEP15 ,Stall IN endpoint 15" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_IEP15[10:8] ,Max packet size of IN Endpoint 15:" "0,1,2,3,4,5,6,7"
group.byte 0x60++0x1
line.byte 0x00 "oep1_xpsz,OUT endpoint 1 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_OEP1[7:0] ,Max packet size of IN endpoint 1"
group.byte 0x62++0x1
line.byte 0x00 "oep2_xpsz,OUT endpoint 2 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_OEP2[7:0] ,Max packet size of IN endpoint 2"
group.byte 0x64++0x1
line.byte 0x00 "oep3_xpsz,OUT endpoint 3 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_OEP3[7:0] ,Max packet size of IN endpoint 3"
group.byte 0x66++0x1
line.byte 0x00 "oep4_xpsz,OUT endpoint 4 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_OEP4[7:0] ,Max packet size of IN endpoint 4"
group.byte 0x68++0x1
line.byte 0x00 "oep5_xpsz,OUT endpoint 5 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_OEP5[7:0] ,Max packet size of IN endpoint 5"
group.byte 0x6A++0x1
line.byte 0x00 "oep6_xpsz,OUT endpoint 6 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_OEP6[7:0] ,Max packet size of IN endpoint 6"
group.byte 0x6C++0x1
line.byte 0x00 "oep7_xpsz,OUT endpoint 7 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_OEP7[7:0] ,Max packet size of IN endpoint 7"
group.byte 0x6E++0x1
line.byte 0x00 "oep8_xpsz,OUT endpoint 8 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_OEP8[7:0] ,Max packet size of IN endpoint 8"
group.byte 0x70++0x1
line.byte 0x00 "oep9_xpsz,OUT endpoint 9 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_OEP9[7:0] ,Max packet size of IN endpoint 9"
group.byte 0x72++0x1
line.byte 0x00 "oep10_xpsz,OUT endpoint 10 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_OEP10[7:0] ,Max packet size of IN endpoint 10"
group.byte 0x74++0x1
line.byte 0x00 "oep11_xpsz,OUT endpoint 11 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_OEP11[7:0] ,Max packet size of IN endpoint 11"
group.byte 0x76++0x1
line.byte 0x00 "oep12_xpsz,OUT endpoint 12 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_OEP12[7:0] ,Max packet size of IN endpoint 12"
group.byte 0x78++0x1
line.byte 0x00 "oep13_xpsz,OUT endpoint 13 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_OEP13[7:0] ,Max packet size of IN endpoint 13"
group.byte 0x7A++0x1
line.byte 0x00 "oep14_xpsz,OUT endpoint 14 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_OEP14[7:0] ,Max packet size of IN endpoint 14"
group.byte 0x7C++0x1
line.byte 0x00 "oep15_xpsz,OUT endpoint 15 MaxPacketSize register low byte"
hexmask.byte 0x00 0.--7. 1. " MAXPS_OEP15[7:0] ,Max packet size of IN endpoint 15"
group.byte 0x61++0x1
line.byte 0x00 "oep1_ypsz,OUT endpoint 1 MaxPacketSize register high byte"
bitfld.byte 0x00 4. " RSTG_OEP1 ,Reset toggle sequence for OUT endpoint 1" "No reset,Reset"
bitfld.byte 0x00 3. " STL_OEP1 ,Stall OUT endpoint 1" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_OEP1[10:8] ,Max packet size of OUT endpoint 1" "0,1,2,3,4,5,6,7"
group.byte 0x63++0x1
line.byte 0x00 "oep2_ypsz,OUT endpoint 2 MaxPacketSize register high byte"
bitfld.byte 0x00 4. " RSTG_OEP2 ,Reset toggle sequence for OUT endpoint 2" "No reset,Reset"
bitfld.byte 0x00 3. " STL_OEP2 ,Stall OUT endpoint 2" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_OEP2[10:8] ,Max packet size of OUT endpoint 2" "0,1,2,3,4,5,6,7"
group.byte 0x65++0x1
line.byte 0x00 "oep3_ypsz,OUT endpoint 3 MaxPacketSize register high byte"
bitfld.byte 0x00 4. " RSTG_OEP3 ,Reset toggle sequence for OUT endpoint 3" "No reset,Reset"
bitfld.byte 0x00 3. " STL_OEP3 ,Stall OUT endpoint 3" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_OEP3[10:8] ,Max packet size of OUT endpoint 3" "0,1,2,3,4,5,6,7"
group.byte 0x67++0x1
line.byte 0x00 "oep4_ypsz,OUT endpoint 4 MaxPacketSize register high byte"
bitfld.byte 0x00 4. " RSTG_OEP4 ,Reset toggle sequence for OUT endpoint 4" "No reset,Reset"
bitfld.byte 0x00 3. " STL_OEP4 ,Stall OUT endpoint 4" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_OEP4[10:8] ,Max packet size of OUT endpoint 4" "0,1,2,3,4,5,6,7"
group.byte 0x69++0x1
line.byte 0x00 "oep5_ypsz,OUT endpoint 5 MaxPacketSize register high byte"
bitfld.byte 0x00 4. " RSTG_OEP5 ,Reset toggle sequence for OUT endpoint 5" "No reset,Reset"
bitfld.byte 0x00 3. " STL_OEP5 ,Stall OUT endpoint 5" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_OEP5[10:8] ,Max packet size of OUT endpoint 5" "0,1,2,3,4,5,6,7"
group.byte 0x6B++0x1
line.byte 0x00 "oep6_ypsz,OUT endpoint 6 MaxPacketSize register high byte"
bitfld.byte 0x00 4. " RSTG_OEP6 ,Reset toggle sequence for OUT endpoint 6" "No reset,Reset"
bitfld.byte 0x00 3. " STL_OEP6 ,Stall OUT endpoint 6" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_OEP6[10:8] ,Max packet size of OUT endpoint 6" "0,1,2,3,4,5,6,7"
group.byte 0x6D++0x1
line.byte 0x00 "oep7_ypsz,OUT endpoint 7 MaxPacketSize register high byte"
bitfld.byte 0x00 4. " RSTG_OEP7 ,Reset toggle sequence for OUT endpoint 7" "No reset,Reset"
bitfld.byte 0x00 3. " STL_OEP7 ,Stall OUT endpoint 7" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_OEP7[10:8] ,Max packet size of OUT endpoint 7" "0,1,2,3,4,5,6,7"
group.byte 0x6F++0x1
line.byte 0x00 "oep8_ypsz,OUT endpoint 8 MaxPacketSize register high byte"
bitfld.byte 0x00 4. " RSTG_OEP8 ,Reset toggle sequence for OUT endpoint 8" "No reset,Reset"
bitfld.byte 0x00 3. " STL_OEP8 ,Stall OUT endpoint 8" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_OEP8[10:8] ,Max packet size of OUT endpoint 8" "0,1,2,3,4,5,6,7"
group.byte 0x71++0x1
line.byte 0x00 "oep9_ypsz,OUT endpoint 9 MaxPacketSize register high byte"
bitfld.byte 0x00 4. " RSTG_OEP9 ,Reset toggle sequence for OUT endpoint 9" "No reset,Reset"
bitfld.byte 0x00 3. " STL_OEP9 ,Stall OUT endpoint 9" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_OEP9[10:8] ,Max packet size of OUT endpoint 9" "0,1,2,3,4,5,6,7"
group.byte 0x73++0x1
line.byte 0x00 "oep10_ypsz,OUT endpoint 10 MaxPacketSize register high byte"
bitfld.byte 0x00 4. " RSTG_OEP10 ,Reset toggle sequence for OUT endpoint 10" "No reset,Reset"
bitfld.byte 0x00 3. " STL_OEP10 ,Stall OUT endpoint 10" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_OEP10[10:8] ,Max packet size of OUT endpoint 10" "0,1,2,3,4,5,6,7"
group.byte 0x75++0x1
line.byte 0x00 "oep11_ypsz,OUT endpoint 11 MaxPacketSize register high byte"
bitfld.byte 0x00 4. " RSTG_OEP11 ,Reset toggle sequence for OUT endpoint 11" "No reset,Reset"
bitfld.byte 0x00 3. " STL_OEP11 ,Stall OUT endpoint 11" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_OEP11[10:8] ,Max packet size of OUT endpoint 11" "0,1,2,3,4,5,6,7"
group.byte 0x77++0x1
line.byte 0x00 "oep12_ypsz,OUT endpoint 12 MaxPacketSize register high byte"
bitfld.byte 0x00 4. " RSTG_OEP12 ,Reset toggle sequence for OUT endpoint 12" "No reset,Reset"
bitfld.byte 0x00 3. " STL_OEP12 ,Stall OUT endpoint 12" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_OEP12[10:8] ,Max packet size of OUT endpoint 12" "0,1,2,3,4,5,6,7"
group.byte 0x79++0x1
line.byte 0x00 "oep13_ypsz,OUT endpoint 13 MaxPacketSize register high byte"
bitfld.byte 0x00 4. " RSTG_OEP13 ,Reset toggle sequence for OUT endpoint 13" "No reset,Reset"
bitfld.byte 0x00 3. " STL_OEP13 ,Stall OUT endpoint 13" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_OEP13[10:8] ,Max packet size of OUT endpoint 13" "0,1,2,3,4,5,6,7"
group.byte 0x7B++0x1
line.byte 0x00 "oep14_ypsz,OUT endpoint 14 MaxPacketSize register high byte"
bitfld.byte 0x00 4. " RSTG_OEP14 ,Reset toggle sequence for OUT endpoint 14" "No reset,Reset"
bitfld.byte 0x00 3. " STL_OEP14 ,Stall OUT endpoint 14" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_OEP14[10:8] ,Max packet size of OUT endpoint 14" "0,1,2,3,4,5,6,7"
group.byte 0x7D++0x1
line.byte 0x00 "oep15_ypsz,OUT endpoint 15 MaxPacketSize register high byte"
bitfld.byte 0x00 4. " RSTG_OEP15 ,Reset toggle sequence for OUT endpoint 15" "No reset,Reset"
bitfld.byte 0x00 3. " STL_OEP15 ,Stall OUT endpoint 15" "Not stalled,Stalled"
textline " "
bitfld.byte 0x00 0.--2. " MAXPS_OEP15[10:8] ,Max packet size of OUT endpoint 15" "0,1,2,3,4,5,6,7"
group.byte 0x7e++0x1
line.byte 0x00 "fifodma_enlb,DMA Mode Enable Register Low Byte"
line.byte 0x01 "fifofma_enhb,DMA Mode Enable Register High Byte"
width 11.
tree.end
tree "FIFO Configuration and Status Register"
base ad:0x90b00000
width 16.
group.byte 0x80++0x0
line.byte 0x00 "fifo0_map,FIFO0 Map Register"
bitfld.byte 0x00 4. " Dir_Fx ,FIFO direction" "OUT,IN"
bitfld.byte 0x00 0.--3. " EP_FIFO0[3:0] ,Endpoint number for FIFO 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.byte 0x81++0x0
line.byte 0x00 "fifo1_map,FIFO1 Map Register"
bitfld.byte 0x00 4. " Dir_Fx ,FIFO direction" "OUT,IN"
bitfld.byte 0x00 0.--3. " EP_FIFO1[3:0] ,Endpoint number for FIFO 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.byte 0x82++0x0
line.byte 0x00 "fifo2_map,FIFO2 Map Register"
bitfld.byte 0x00 4. " Dir_Fx ,FIFO direction" "OUT,IN"
bitfld.byte 0x00 0.--3. " EP_FIFO2[3:0] ,Endpoint number for FIFO 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.byte 0x83++0x0
line.byte 0x00 "fifo3_map,FIFO3 Map Register"
bitfld.byte 0x00 4. " Dir_Fx ,FIFO direction" "OUT,IN"
bitfld.byte 0x00 0.--3. " EP_FIFO3[3:0] ,Endpoint number for FIFO 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.byte 0x84++0x0
line.byte 0x00 "fifo4_map,FIFO4 Map Register"
bitfld.byte 0x00 4. " Dir_Fx ,FIFO direction" "OUT,IN"
bitfld.byte 0x00 0.--3. " EP_FIFO4[3:0] ,Endpoint number for FIFO 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.byte 0x85++0x0
line.byte 0x00 "fifo5_map,FIFO5 Map Register"
bitfld.byte 0x00 4. " Dir_Fx ,FIFO direction" "OUT,IN"
bitfld.byte 0x00 0.--3. " EP_FIFO5[3:0] ,Endpoint number for FIFO 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.byte 0x86++0x0
line.byte 0x00 "fifo6_map,FIFO6 Map Register"
bitfld.byte 0x00 4. " Dir_Fx ,FIFO direction" "OUT,IN"
bitfld.byte 0x00 0.--3. " EP_FIFO6[3:0] ,Endpoint number for FIFO 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.byte 0x87++0x0
line.byte 0x00 "fifo7_map,FIFO7 Map Register"
bitfld.byte 0x00 4. " Dir_Fx ,FIFO direction" "OUT,IN"
bitfld.byte 0x00 0.--3. " EP_FIFO7[3:0] ,Endpoint number for FIFO 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.byte 0x88++0x0
line.byte 0x00 "fifo8_map,FIFO8 Map Register"
bitfld.byte 0x00 4. " Dir_Fx ,FIFO direction" "OUT,IN"
bitfld.byte 0x00 0.--3. " EP_FIFO8[3:0] ,Endpoint number for FIFO 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.byte 0x89++0x0
line.byte 0x00 "fifo9_map,FIFO9 Map Register"
bitfld.byte 0x00 4. " Dir_Fx ,FIFO direction" "OUT,IN"
bitfld.byte 0x00 0.--3. " EP_FIFO9[3:0] ,Endpoint number for FIFO 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.byte 0x8A++0x0
line.byte 0x00 "fifo10_map,FIFO10 Map Register"
bitfld.byte 0x00 4. " Dir_Fx ,FIFO direction" "OUT,IN"
bitfld.byte 0x00 0.--3. " EP_FIFO10[3:0] ,Endpoint number for FIFO 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.byte 0x8B++0x0
line.byte 0x00 "fifo11_map,FIFO11 Map Register"
bitfld.byte 0x00 4. " Dir_Fx ,FIFO direction" "OUT,IN"
bitfld.byte 0x00 0.--3. " EP_FIFO11[3:0] ,Endpoint number for FIFO 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.byte 0x8C++0x0
line.byte 0x00 "fifo12_map,FIFO12 Map Register"
bitfld.byte 0x00 4. " Dir_Fx ,FIFO direction" "OUT,IN"
bitfld.byte 0x00 0.--3. " EP_FIFO12[3:0] ,Endpoint number for FIFO 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.byte 0x8D++0x0
line.byte 0x00 "fifo13_map,FIFO13 Map Register"
bitfld.byte 0x00 4. " Dir_Fx ,FIFO direction" "OUT,IN"
bitfld.byte 0x00 0.--3. " EP_FIFO13[3:0] ,Endpoint number for FIFO 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.byte 0x8E++0x0
line.byte 0x00 "fifo14_map,FIFO14 Map Register"
bitfld.byte 0x00 4. " Dir_Fx ,FIFO direction" "OUT,IN"
bitfld.byte 0x00 0.--3. " EP_FIFO14[3:0] ,Endpoint number for FIFO 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.byte 0x8F++0x0
line.byte 0x00 "fifo15_map,FIFO15 Map Register"
bitfld.byte 0x00 4. " Dir_Fx ,FIFO direction" "OUT,IN"
bitfld.byte 0x00 0.--3. " EP_FIFO15[3:0] ,Endpoint number for FIFO 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.byte 0x90++0x0
line.byte 0x00 "fifo0_config,FIFO0 Configuration Register"
bitfld.byte 0x00 7. " EN_F0 ,Enable FIFO 0" "Disabled,Enabled"
bitfld.byte 0x00 4. " BLKSZ_F0 ,Block size of FIFO 0" "Smaller,Bigger"
textline " "
bitfld.byte 0x00 2.--3. " BLKNO_F0[1:0] ,Block number of FIFO 0" "Single,Double,Triple,Reserved"
bitfld.byte 0x00 0.--1. " BLK_TYP_F0[1:0] ,Transfer type of FIFO 0" "Reserved,Isochronous,Bulk,Interrupt"
group.byte 0x91++0x0
line.byte 0x00 "fifo1_config,FIFO1 Configuration Register"
bitfld.byte 0x00 7. " EN_F1 ,Enable FIFO 1" "Disabled,Enabled"
bitfld.byte 0x00 4. " BLKSZ_F1 ,Block size of FIFO 1" "Smaller,Bigger"
textline " "
bitfld.byte 0x00 2.--3. " BLKNO_F1[1:0] ,Block number of FIFO 1" "Single,Double,Triple,Reserved"
bitfld.byte 0x00 0.--1. " BLK_TYP_F1[1:0] ,Transfer type of FIFO 1" "Reserved,Isochronous,Bulk,Interrupt"
group.byte 0x92++0x0
line.byte 0x00 "fifo2_config,FIFO2 Configuration Register"
bitfld.byte 0x00 7. " EN_F2 ,Enable FIFO 2" "Disabled,Enabled"
bitfld.byte 0x00 4. " BLKSZ_F2 ,Block size of FIFO 2" "Smaller,Bigger"
textline " "
bitfld.byte 0x00 2.--3. " BLKNO_F2[1:0] ,Block number of FIFO 2" "Single,Double,Triple,Reserved"
bitfld.byte 0x00 0.--1. " BLK_TYP_F2[1:0] ,Transfer type of FIFO 2" "Reserved,Isochronous,Bulk,Interrupt"
group.byte 0x93++0x0
line.byte 0x00 "fifo3_config,FIFO3 Configuration Register"
bitfld.byte 0x00 7. " EN_F3 ,Enable FIFO 3" "Disabled,Enabled"
bitfld.byte 0x00 4. " BLKSZ_F3 ,Block size of FIFO 3" "Smaller,Bigger"
textline " "
bitfld.byte 0x00 2.--3. " BLKNO_F3[1:0] ,Block number of FIFO 3" "Single,Double,Triple,Reserved"
bitfld.byte 0x00 0.--1. " BLK_TYP_F3[1:0] ,Transfer type of FIFO 3" "Reserved,Isochronous,Bulk,Interrupt"
group.byte 0x94++0x0
line.byte 0x00 "fifo4_config,FIFO4 Configuration Register"
bitfld.byte 0x00 7. " EN_F4 ,Enable FIFO 4" "Disabled,Enabled"
bitfld.byte 0x00 4. " BLKSZ_F4 ,Block size of FIFO 4" "Smaller,Bigger"
textline " "
bitfld.byte 0x00 2.--3. " BLKNO_F4[1:0] ,Block number of FIFO 4" "Single,Double,Triple,Reserved"
bitfld.byte 0x00 0.--1. " BLK_TYP_F4[1:0] ,Transfer type of FIFO 4" "Reserved,Isochronous,Bulk,Interrupt"
group.byte 0x95++0x0
line.byte 0x00 "fifo5_config,FIFO5 Configuration Register"
bitfld.byte 0x00 7. " EN_F5 ,Enable FIFO 5" "Disabled,Enabled"
bitfld.byte 0x00 4. " BLKSZ_F5 ,Block size of FIFO 5" "Smaller,Bigger"
textline " "
bitfld.byte 0x00 2.--3. " BLKNO_F5[1:0] ,Block number of FIFO 5" "Single,Double,Triple,Reserved"
bitfld.byte 0x00 0.--1. " BLK_TYP_F5[1:0] ,Transfer type of FIFO 5" "Reserved,Isochronous,Bulk,Interrupt"
group.byte 0x96++0x0
line.byte 0x00 "fifo6_config,FIFO6 Configuration Register"
bitfld.byte 0x00 7. " EN_F6 ,Enable FIFO 6" "Disabled,Enabled"
bitfld.byte 0x00 4. " BLKSZ_F6 ,Block size of FIFO 6" "Smaller,Bigger"
textline " "
bitfld.byte 0x00 2.--3. " BLKNO_F6[1:0] ,Block number of FIFO 6" "Single,Double,Triple,Reserved"
bitfld.byte 0x00 0.--1. " BLK_TYP_F6[1:0] ,Transfer type of FIFO 6" "Reserved,Isochronous,Bulk,Interrupt"
group.byte 0x97++0x0
line.byte 0x00 "fifo7_config,FIFO7 Configuration Register"
bitfld.byte 0x00 7. " EN_F7 ,Enable FIFO 7" "Disabled,Enabled"
bitfld.byte 0x00 4. " BLKSZ_F7 ,Block size of FIFO 7" "Smaller,Bigger"
textline " "
bitfld.byte 0x00 2.--3. " BLKNO_F7[1:0] ,Block number of FIFO 7" "Single,Double,Triple,Reserved"
bitfld.byte 0x00 0.--1. " BLK_TYP_F7[1:0] ,Transfer type of FIFO 7" "Reserved,Isochronous,Bulk,Interrupt"
group.byte 0x98++0x0
line.byte 0x00 "fifo8_config,FIFO8 Configuration Register"
bitfld.byte 0x00 7. " EN_F8 ,Enable FIFO 8" "Disabled,Enabled"
bitfld.byte 0x00 4. " BLKSZ_F8 ,Block size of FIFO 8" "Smaller,Bigger"
textline " "
bitfld.byte 0x00 2.--3. " BLKNO_F8[1:0] ,Block number of FIFO 8" "Single,Double,Triple,Reserved"
bitfld.byte 0x00 0.--1. " BLK_TYP_F8[1:0] ,Transfer type of FIFO 8" "Reserved,Isochronous,Bulk,Interrupt"
group.byte 0x99++0x0
line.byte 0x00 "fifo9_config,FIFO9 Configuration Register"
bitfld.byte 0x00 7. " EN_F9 ,Enable FIFO 9" "Disabled,Enabled"
bitfld.byte 0x00 4. " BLKSZ_F9 ,Block size of FIFO 9" "Smaller,Bigger"
textline " "
bitfld.byte 0x00 2.--3. " BLKNO_F9[1:0] ,Block number of FIFO 9" "Single,Double,Triple,Reserved"
bitfld.byte 0x00 0.--1. " BLK_TYP_F9[1:0] ,Transfer type of FIFO 9" "Reserved,Isochronous,Bulk,Interrupt"
group.byte 0x9A++0x0
line.byte 0x00 "fifo10_config,FIFO10 Configuration Register"
bitfld.byte 0x00 7. " EN_F10 ,Enable FIFO 10" "Disabled,Enabled"
bitfld.byte 0x00 4. " BLKSZ_F10 ,Block size of FIFO 10" "Smaller,Bigger"
textline " "
bitfld.byte 0x00 2.--3. " BLKNO_F10[1:0] ,Block number of FIFO 10" "Single,Double,Triple,Reserved"
bitfld.byte 0x00 0.--1. " BLK_TYP_F10[1:0],Transfer type of FIFO 10" "Reserved,Isochronous,Bulk,Interrupt"
group.byte 0x9B++0x0
line.byte 0x00 "fifo11_config,FIFO11 Configuration Register"
bitfld.byte 0x00 7. " EN_F11 ,Enable FIFO 11" "Disabled,Enabled"
bitfld.byte 0x00 4. " BLKSZ_F11 ,Block size of FIFO 11" "Smaller,Bigger"
textline " "
bitfld.byte 0x00 2.--3. " BLKNO_F11[1:0] ,Block number of FIFO 11" "Single,Double,Triple,Reserved"
bitfld.byte 0x00 0.--1. " BLK_TYP_F11[1:0],Transfer type of FIFO 11" "Reserved,Isochronous,Bulk,Interrupt"
group.byte 0x9C++0x0
line.byte 0x00 "fifo12_config,FIFO12 Configuration Register"
bitfld.byte 0x00 7. " EN_F12 ,Enable FIFO 12" "Disabled,Enabled"
bitfld.byte 0x00 4. " BLKSZ_F12 ,Block size of FIFO 12" "Smaller,Bigger"
textline " "
bitfld.byte 0x00 2.--3. " BLKNO_F12[1:0] ,Block number of FIFO 12" "Single,Double,Triple,Reserved"
bitfld.byte 0x00 0.--1. " BLK_TYP_F12[1:0],Transfer type of FIFO 12" "Reserved,Isochronous,Bulk,Interrupt"
group.byte 0x9D++0x0
line.byte 0x00 "fifo13_config,FIFO13 Configuration Register"
bitfld.byte 0x00 7. " EN_F13 ,Enable FIFO 13" "Disabled,Enabled"
bitfld.byte 0x00 4. " BLKSZ_F13 ,Block size of FIFO 13" "Smaller,Bigger"
textline " "
bitfld.byte 0x00 2.--3. " BLKNO_F13[1:0] ,Block number of FIFO 13" "Single,Double,Triple,Reserved"
bitfld.byte 0x00 0.--1. " BLK_TYP_F13[1:0],Transfer type of FIFO 13" "Reserved,Isochronous,Bulk,Interrupt"
group.byte 0x9E++0x0
line.byte 0x00 "fifo14_config,FIFO14 Configuration Register"
bitfld.byte 0x00 7. " EN_F14 ,Enable FIFO 14" "Disabled,Enabled"
bitfld.byte 0x00 4. " BLKSZ_F14 ,Block size of FIFO 14" "Smaller,Bigger"
textline " "
bitfld.byte 0x00 2.--3. " BLKNO_F14[1:0] ,Block number of FIFO 14" "Single,Double,Triple,Reserved"
bitfld.byte 0x00 0.--1. " BLK_TYP_F14[1:0],Transfer type of FIFO 14" "Reserved,Isochronous,Bulk,Interrupt"
group.byte 0x9F++0x0
line.byte 0x00 "fifo15_config,FIFO15 Configuration Register"
bitfld.byte 0x00 7. " EN_F15 ,Enable FIFO 15" "Disabled,Enabled"
bitfld.byte 0x00 4. " BLKSZ_F15 ,Block size of FIFO 15" "Smaller,Bigger"
textline " "
bitfld.byte 0x00 2.--3. " BLKNO_F15[1:0] ,Block number of FIFO 15" "Single,Double,Triple,Reserved"
bitfld.byte 0x00 0.--1. " BLK_TYP_F15[1:0],Transfer type of FIFO 15" "Reserved,Isochronous,Bulk,Interrupt"
group.byte 0xA0++0x0
line.byte 0x00 "fifo0_bc,FIFO0 Instruction Register"
bitfld.byte 0x00 4. " FFRST ,FIFO 0 reset:" "No reset,Reset"
bitfld.byte 0x00 3. " DONE_F0 ,Data transfer is done for IN FIFO 0" "Not done,Done"
textline " "
bitfld.byte 0x00 0.--2. " BC_F0[10:8] ,OUT FIFO 0 byte count" "0,1,2,3,4,5,6,7"
group.byte 0xA1++0x0
line.byte 0x00 "fifo1_bc,FIFO1 Instruction Register"
bitfld.byte 0x00 4. " FFRST ,FIFO 1 reset:" "No reset,Reset"
bitfld.byte 0x00 3. " DONE_F1 ,Data transfer is done for IN FIFO 1" "Not done,Done"
textline " "
bitfld.byte 0x00 0.--2. " BC_F1[10:8] ,OUT FIFO 1 byte count" "0,1,2,3,4,5,6,7"
group.byte 0xA2++0x0
line.byte 0x00 "fifo2_bc,FIFO2 Instruction Register"
bitfld.byte 0x00 4. " FFRST ,FIFO 2 reset:" "No reset,Reset"
bitfld.byte 0x00 3. " DONE_F2 ,Data transfer is done for IN FIFO 2" "Not done,Done"
textline " "
bitfld.byte 0x00 0.--2. " BC_F2[10:8] ,OUT FIFO 2 byte count" "0,1,2,3,4,5,6,7"
group.byte 0xA3++0x0
line.byte 0x00 "fifo3_bc,FIFO3 Instruction Register"
bitfld.byte 0x00 4. " FFRST ,FIFO 3 reset:" "No reset,Reset"
bitfld.byte 0x00 3. " DONE_F3 ,Data transfer is done for IN FIFO 3" "Not done,Done"
textline " "
bitfld.byte 0x00 0.--2. " BC_F3[10:8] ,OUT FIFO 3 byte count" "0,1,2,3,4,5,6,7"
group.byte 0xA4++0x0
line.byte 0x00 "fifo4_bc,FIFO4 Instruction Register"
bitfld.byte 0x00 4. " FFRST ,FIFO 4 reset:" "No reset,Reset"
bitfld.byte 0x00 3. " DONE_F4 ,Data transfer is done for IN FIFO 4" "Not done,Done"
textline " "
bitfld.byte 0x00 0.--2. " BC_F4[10:8] ,OUT FIFO 4 byte count" "0,1,2,3,4,5,6,7"
group.byte 0xA5++0x0
line.byte 0x00 "fifo5_bc,FIFO5 Instruction Register"
bitfld.byte 0x00 4. " FFRST ,FIFO 5 reset:" "No reset,Reset"
bitfld.byte 0x00 3. " DONE_F5 ,Data transfer is done for IN FIFO 5" "Not done,Done"
textline " "
bitfld.byte 0x00 0.--2. " BC_F5[10:8] ,OUT FIFO 5 byte count" "0,1,2,3,4,5,6,7"
group.byte 0xA6++0x0
line.byte 0x00 "fifo6_bc,FIFO6 Instruction Register"
bitfld.byte 0x00 4. " FFRST ,FIFO 6 reset:" "No reset,Reset"
bitfld.byte 0x00 3. " DONE_F6 ,Data transfer is done for IN FIFO 6" "Not done,Done"
textline " "
bitfld.byte 0x00 0.--2. " BC_F6[10:8] ,OUT FIFO 6 byte count" "0,1,2,3,4,5,6,7"
group.byte 0xA7++0x0
line.byte 0x00 "fifo7_bc,FIFO7 Instruction Register"
bitfld.byte 0x00 4. " FFRST ,FIFO 7 reset:" "No reset,Reset"
bitfld.byte 0x00 3. " DONE_F7 ,Data transfer is done for IN FIFO 7" "Not done,Done"
textline " "
bitfld.byte 0x00 0.--2. " BC_F7[10:8] ,OUT FIFO 7 byte count" "0,1,2,3,4,5,6,7"
group.byte 0xA8++0x0
line.byte 0x00 "fifo8_bc,FIFO8 Instruction Register"
bitfld.byte 0x00 4. " FFRST ,FIFO 8 reset:" "No reset,Reset"
bitfld.byte 0x00 3. " DONE_F8 ,Data transfer is done for IN FIFO 8" "Not done,Done"
textline " "
bitfld.byte 0x00 0.--2. " BC_F8[10:8] ,OUT FIFO 8 byte count" "0,1,2,3,4,5,6,7"
group.byte 0xA9++0x0
line.byte 0x00 "fifo9_bc,FIFO9 Instruction Register"
bitfld.byte 0x00 4. " FFRST ,FIFO 9 reset:" "No reset,Reset"
bitfld.byte 0x00 3. " DONE_F9 ,Data transfer is done for IN FIFO 9" "Not done,Done"
textline " "
bitfld.byte 0x00 0.--2. " BC_F9[10:8] ,OUT FIFO 9 byte count" "0,1,2,3,4,5,6,7"
group.byte 0xAA++0x0
line.byte 0x00 "fifo10_bc,FIFO10 Instruction Register"
bitfld.byte 0x00 4. " FFRST ,FIFO 10 reset:" "No reset,Reset"
textline " "
bitfld.byte 0x00 3. " DONE_F10 ,Data transfer is done for IN FIFO 10" "Not done,Done"
bitfld.byte 0x00 0.--2. " BC_F10[10:8] ,OUT FIFO 10 byte count" "0,1,2,3,4,5,6,7"
group.byte 0xAB++0x0
line.byte 0x00 "fifo11_bc,FIFO11 Instruction Register"
bitfld.byte 0x00 4. " FFRST ,FIFO 11 reset:" "No reset,Reset"
textline " "
bitfld.byte 0x00 3. " DONE_F11 ,Data transfer is done for IN FIFO 11" "Not done,Done"
bitfld.byte 0x00 0.--2. " BC_F11[10:8] ,OUT FIFO 11 byte count" "0,1,2,3,4,5,6,7"
group.byte 0xAC++0x0
line.byte 0x00 "fifo12_bc,FIFO12 Instruction Register"
bitfld.byte 0x00 4. " FFRST ,FIFO 12 reset:" "No reset,Reset"
textline " "
bitfld.byte 0x00 3. " DONE_F12 ,Data transfer is done for IN FIFO 12" "Not done,Done"
bitfld.byte 0x00 0.--2. " BC_F12[10:8] ,OUT FIFO 12 byte count" "0,1,2,3,4,5,6,7"
group.byte 0xAD++0x0
line.byte 0x00 "fifo13_bc,FIFO13 Instruction Register"
bitfld.byte 0x00 4. " FFRST ,FIFO 13 reset:" "No reset,Reset"
textline " "
bitfld.byte 0x00 3. " DONE_F13 ,Data transfer is done for IN FIFO 13" "Not done,Done"
bitfld.byte 0x00 0.--2. " BC_F13[10:8] ,OUT FIFO 13 byte count" "0,1,2,3,4,5,6,7"
group.byte 0xAE++0x0
line.byte 0x00 "fifo14_bc,FIFO14 Instruction Register"
bitfld.byte 0x00 4. " FFRST ,FIFO 14 reset:" "No reset,Reset"
textline " "
bitfld.byte 0x00 3. " DONE_F14 ,Data transfer is done for IN FIFO 14" "Not done,Done"
bitfld.byte 0x00 0.--2. " BC_F14[10:8] ,OUT FIFO 14 byte count" "0,1,2,3,4,5,6,7"
group.byte 0xAF++0x0
line.byte 0x00 "fifo15_bc,FIFO15 Instruction Register"
bitfld.byte 0x00 4. " FFRST ,FIFO 15 reset:" "No reset,Reset"
textline " "
bitfld.byte 0x00 3. " DONE_F15 ,Data transfer is done for IN FIFO 15" "Not done,Done"
bitfld.byte 0x00 0.--2. " BC_F15[10:8] ,OUT FIFO 15 byte count" "0,1,2,3,4,5,6,7"
rgroup.byte 0xB0++0x0
line.byte 0x00 "fifo0_inst,FIFO0 Byte-Count Register Low Byte"
rgroup.byte 0xB1++0x0
line.byte 0x00 "fifo1_inst,FIFO1 Byte-Count Register Low Byte"
rgroup.byte 0xB2++0x0
line.byte 0x00 "fifo2_inst,FIFO2 Byte-Count Register Low Byte"
rgroup.byte 0xB3++0x0
line.byte 0x00 "fifo3_inst,FIFO3 Byte-Count Register Low Byte"
rgroup.byte 0xB4++0x0
line.byte 0x00 "fifo4_inst,FIFO4 Byte-Count Register Low Byte"
rgroup.byte 0xB5++0x0
line.byte 0x00 "fifo5_inst,FIFO5 Byte-Count Register Low Byte"
rgroup.byte 0xB6++0x0
line.byte 0x00 "fifo6_inst,FIFO6 Byte-Count Register Low Byte"
rgroup.byte 0xB7++0x0
line.byte 0x00 "fifo7_inst,FIFO7 Byte-Count Register Low Byte"
rgroup.byte 0xB8++0x0
line.byte 0x00 "fifo8_inst,FIFO8 Byte-Count Register Low Byte"
rgroup.byte 0xB9++0x0
line.byte 0x00 "fifo9_inst,FIFO9 Byte-Count Register Low Byte"
rgroup.byte 0xBA++0x0
line.byte 0x00 "fifo10_inst,FIFO10 Byte-Count Register Low Byte"
rgroup.byte 0xBB++0x0
line.byte 0x00 "fifo11_inst,FIFO11 Byte-Count Register Low Byte"
rgroup.byte 0xBC++0x0
line.byte 0x00 "fifo12_inst,FIFO12 Byte-Count Register Low Byte"
rgroup.byte 0xBD++0x0
line.byte 0x00 "fifo13_inst,FIFO13 Byte-Count Register Low Byte"
rgroup.byte 0xBE++0x0
line.byte 0x00 "fifo14_inst,FIFO14 Byte-Count Register Low Byte"
rgroup.byte 0xBF++0x0
line.byte 0x00 "fifo15_inst,FIFO15 Byte-Count Register Low Byte"
hgroup.long 0xC0++0x3
hide.long 0x00 "fifo0_dp,Data Port Register"
in
hgroup.long 0xC4++0x3
hide.long 0x00 "fifo1_dp,Data Port Register"
in
hgroup.long 0xC8++0x3
hide.long 0x00 "fifo2_dp,Data Port Register"
in
hgroup.long 0xCC++0x3
hide.long 0x00 "fifo3_dp,Data Port Register"
in
hgroup.long 0xD0++0x3
hide.long 0x00 "fifo4_dp,Data Port Register"
in
hgroup.long 0xD4++0x3
hide.long 0x00 "fifo5_dp,Data Port Register"
in
hgroup.long 0xD8++0x3
hide.long 0x00 "fifo6_dp,Data Port Register"
in
hgroup.long 0xDC++0x3
hide.long 0x00 "fifo7_dp,Data Port Register"
in
hgroup.long 0xE0++0x3
hide.long 0x00 "fifo8_dp,Data Port Register"
in
hgroup.long 0xE4++0x3
hide.long 0x00 "fifo9_dp,Data Port Register"
in
hgroup.long 0xE8++0x3
hide.long 0x00 "fifo10_dp,Data Port Register"
in
hgroup.long 0xEC++0x3
hide.long 0x00 "fifo11_dp,Data Port Register"
in
hgroup.long 0xF0++0x3
hide.long 0x00 "fifo12_dp,Data Port Register"
in
hgroup.long 0xF4++0x3
hide.long 0x00 "fifo13_dp,Data Port Register"
in
hgroup.long 0xF8++0x3
hide.long 0x00 "fifo14_dp,Data Port Register"
in
hgroup.long 0xFC++0x3
hide.long 0x00 "fifo15_dp,Data Port Register"
in
width 11.
tree.end
tree.end
tree "AES-DES Cipher Coprocessor"
base ad:0x90a00000
width 18.
group.long 0x00++0x3
line.long 0x00 "EncryptControl,Encryption Control Register"
bitfld.long 0x00 8. " pchk ,Parity check bit" "Disabled,Enabled"
bitfld.long 0x00 7. " first ,Specifies the first data block" "Non-first,First"
textline " "
bitfld.long 0x00 4.--6. " emode ,Operation mode select" "ECB,CBC,CTR,Reserved,CFB8,OFB,Reserved,Reserved"
bitfld.long 0x00 1.--3. " method ,Encryption algorithm select" "DES,Triple-DES,Reserved,Reserved,AES-128,AES-192,AES-256,Reserved"
textline " "
bitfld.long 0x00 0. " decrypt ,Decryption or encryption stage" "Encryption,Decryption"
rgroup.long 0x08++0x27
line.long 0x00 "FIFOStatus,FIFO Status Register"
hexmask.long.byte 0x00 24.--31. 1. " of_entity ,OUT FIFO entity count"
hexmask.long.byte 0x00 16.--23. 1. " If_entity ,IN FIFO entity count"
textline " "
bitfld.long 0x00 3. " Offull ,OUT FIFO is full" "Not full,Full"
bitfld.long 0x00 2. " ofempty ,OUT FIFO is empty" "Not empty,Empty"
textline " "
bitfld.long 0x00 1. " Iffull ,IN FIFO is full" "Not full,Full"
bitfld.long 0x00 0. " ifempty ,IN FIOF is empty" "Not empty,Empty"
line.long 0x04 "PErrStatus,Parity Error Register"
bitfld.long 0x04 31. " perr ,Parity error" "No error,Error"
hexmask.long.tbyte 0x04 0.--23. 1. " perrb ,Parity error bits of each byte of DES Keys"
line.long 0x8 "Key0,Security Key 0 Register"
line.long 0xC "Key1,Security Key 1 Register"
line.long 0x10 "Key2,Security Key 2 Register"
line.long 0x14 "Key3,Security Key 3 Register"
line.long 0x18 "Key4,Security Key 4 Register"
line.long 0x1C "Key5,Security Key 5 Register"
line.long 0x20 "Key6,Security Key 6 Register"
line.long 0x24 "Key7,Security Key 7 Register"
group.long 0x30++0x3
line.long 0x00 "IV0,Initial Vector 0 Register"
group.long 0x34++0x3
line.long 0x00 "IV1,Initial Vector 1 Register"
group.long 0x38++0x3
line.long 0x00 "IV2,Initial Vector 2 Register"
group.long 0x3C++0x3
line.long 0x00 "IV3,Initial Vector 3 Register"
group.long 0x48++0x17
line.long 0x00 "DMASrc,Source address of DMA"
line.long 0x04 "DMADes,DMA Destination Address Register"
line.long 0x08 "DMATrasSize,DMA Transfer Size Register"
hexmask.long.word 0x08 0.--11. 1. " TranSize ,Total byte sizes of DMA transfer"
line.long 0x0c "DMACtrl,DMA Control Register"
bitfld.long 0x0C 0. " DmaEn ,Enable DMA" "Disabled,Enabled"
line.long 0x10 "FIFOThold,FIFO Threshold Register"
hexmask.long.byte 0x10 8.--15. 1. " OUTFIFOThold ,Water mark of OUTFIFO data count"
hexmask.long.byte 0x10 0.--7. 1. " INFIFOThold ,Water mark of INFIFO data count"
line.long 0x14 "IntrEnable,Interrupt Enable Register"
bitfld.long 0x14 1. " ErrIntrEn ,DMA receives hresp error interrupt source" "Disabled,Enabled"
bitfld.long 0x14 0. " DoneIntrEn ,DMA transfer done interrupt source" "Disabled,Enabled"
rgroup.long 0x60++0x7
line.long 0x00 "IntrSrc,Interrupt Source Register"
bitfld.long 0x00 1. " ErrIntr ,DMA receives hresp error interrupt source before masked" "Not received,Received"
bitfld.long 0x00 0. " DoneIntr ,DMA transfer done interrupt source before masked" "Not transferred,Transferred"
line.long 0x04 "MaskedIntrStatus,Masked Interrupt Status"
bitfld.long 0x04 1. " ErrIntrMsk ,DMA receives hresp error after masked" "Not received,Received"
bitfld.long 0x04 0. " DoneIntrMsk ,DMA transfer done interrupt after masked" "Not transferred,Transferred"
wgroup.long 0x68++0x3
line.long 0x00 "IntrClr,Interrupt Clear Register"
bitfld.long 0x00 1. " ClrErrIntr ,Clear DMA receives hresp error interrupt" "No effect,Cleared"
bitfld.long 0x00 0. " ClrDoneIntr ,Clear DMA transfer done interrupt" "No effect,Cleared"
rgroup.long 0x70++0x7
line.long 0x00 "REVSION,Version Register"
line.long 0x04 "FEATURE,Feature Register"
rgroup.long 0x80++0xf
line.long 0x00 "LAST_IV0,Last Block IV Output Register"
rgroup.long 0x84++0xf
line.long 0x00 "LAST_IV1,Last Block IV Output Register"
rgroup.long 0x88++0xf
line.long 0x00 "LAST_IV2,Last Block IV Output Register"
rgroup.long 0x8C++0xf
line.long 0x00 "LAST_IV3,Last Block IV Output Register"
width 11.
tree.end
tree "Synchronous Serial Port Controller"
base ad:0x99400000
width 11.
group.long 0x00++0xb
line.long 0x00 "SSPCR0,SSP Control Register 0"
bitfld.long 0x00 12.--14. " FFMT ,Frame format" "SSP,SPI,MICROWIRE,Philips IIS,Intel AC-link,Reserved,Reserved,Reserved"
bitfld.long 0x00 8.--9. " FSDIST ,Frame/sync and data distance (IIS frame format)" "First bit,1,2,3"
textline " "
bitfld.long 0x00 7. " LBM ,Loop back mode" "Normal,Loop back"
bitfld.long 0x00 6. " LSB ,Bit sequence indicator" "MSB,LSB"
textline " "
bitfld.long 0x00 5. " FSPO ,Frame/sync polarity" "High,Low"
bitfld.long 0x00 4. " FSJSTFY ,Data justify" "Back,Front"
textline " "
bitfld.long 0x00 2.--3. " OPM ,Operation mode" "Slave,Slave,Master,Master"
bitfld.long 0x00 1. " SCLKPO ,SCLK polarity" "Low,High"
textline " "
bitfld.long 0x00 0. " SCLKPH ,SCLK phase" "1 cycle,0.5 cycles"
line.long 0x04 "SSPCR1,SSP Control Register 1"
hexmask.long.byte 0x04 24.--31. 1. " PDL ,Padding data length"
bitfld.long 0x04 16.--20. " SDL ,Serial data length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline " "
hexmask.long.word 0x04 0.--15. 1. " SCLKDIV ,SCLK divider"
line.long 0x08 "SSPCR2,SSP Control Register 2"
bitfld.long 0x08 6. " SSPRST ,SSP reset" "No effect,Reset"
bitfld.long 0x08 5. " ACCRST ,AC-link cold reset enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 4. " ACWRST ,AC-link warm reset enable" "Disabled,Enabled"
bitfld.long 0x08 3. " TXFCLR ,Transmit FIFO clear" "No effect,Cleared"
textline " "
bitfld.long 0x08 2. " RXFCLR ,Receive FIFO clear" "No effect,Cleared"
bitfld.long 0x08 1. " TXDOE ,Transmit data output enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 0. " SSPEN ,SSP enable" "Disabled,Enabled"
rgroup.long 0x0c++0x3
line.long 0x00 "SSPSR,SSP Status Register"
bitfld.long 0x00 12.--16. " TFVE ,Transmit FIFO valid entries" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 4.--8. " RFVE ,Receive FIFO valid entries" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline " "
bitfld.long 0x00 2. " BUSY ,Busy indicator" "Not busy,Busy"
bitfld.long 0x00 1. " TFNF ,Transmit FIFO not full" "Full,Not full"
textline " "
bitfld.long 0x00 0. " RFF ,Receive FIFO full" "Not full,Full"
group.long 0x10++0x3
line.long 0x00 "ICR,Interrupt Control Register"
bitfld.long 0x00 12.--15. " TFTHOD ,Transmit FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. " RFTHOD ,Receive FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 6. " AC97FCEN ,AC97 frame complete" "No interrupt,Interrupt"
bitfld.long 0x00 5. " TFDMAEN ,Transmit DMA request enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " RFDMAEN ,Receive DMA request enable" "Disabled,Enabled"
bitfld.long 0x00 3. " TFTHIEN ,Transmit FIFO threshold interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 2. " RFTHIEN ,Receive FIFO threshold interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 1. " TFURIEN ,Transmit FIFO underrun interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " RFORIEN ,Receive FIFO overrun interrupt enable" "Disabled,Enabled"
hgroup.long 0x14++0x3
hide.long 0x00 "ISR,Interrupt Status Register"
in
hgroup.long 0x18++0x3
hide.long 0x00 "SSRTR,SSP Transmit/Receive Data Register"
in
group.long 0x20++0x3
line.long 0x00 "ACSVR,AC-Link Slot Valid Register"
bitfld.long 0x00 14. " SLOT1V ,First slot is valid" "Not valid,Valid"
bitfld.long 0x00 13. " SLOT2V ,Second slot is valid" "Not valid,Valid"
textline " "
bitfld.long 0x00 12. " SLOT3V ,Third slot is valid" "Not valid,Valid"
bitfld.long 0x00 11. " SLOT4V ,Fourth slot is valid" "Not valid,Valid"
textline " "
bitfld.long 0x00 10. " SLOT5V ,Fifth slot is valid" "Not valid,Valid"
bitfld.long 0x00 9. " SLOT6V ,Sixth slot is valid" "Not valid,Valid"
textline " "
bitfld.long 0x00 8. " SLOT7V ,Seventh slot is valid" "Not valid,Valid"
bitfld.long 0x00 7. " SLOT8V ,Eighth slot is valid" "Not valid,Valid"
textline " "
bitfld.long 0x00 6. " SLOT9V ,Ninth slot is valid" "Not valid,Valid"
bitfld.long 0x00 5. " SLOT10V ,Tenth slot is valid" "Not valid,Valid"
textline " "
bitfld.long 0x00 4. " SLOT11V ,Eleventh slot is valid" "Not valid,Valid"
bitfld.long 0x00 3. " SLOT12V ,Twelfth slot is valid" "Not valid,Valid"
textline " "
bitfld.long 0x00 0.--1. " CODECID ,CODEC ID shifted out at TAG slot" "0,1,2,3"
rgroup.long 0x40++0x7
line.long 0x00 "SSPRR,SSP Revision Register"
hexmask.long.byte 0x00 16.--23. 1. " MAJOR_REV ,Major revision number"
hexmask.long.byte 0x00 8.--15. 1. " MINOR_REV ,Minor revision number"
textline " "
hexmask.long.byte 0x00 0.--7. 1. " REL_REV ,Release number"
line.long 0x04 "SSPFR,SSP Feature Register"
bitfld.long 0x04 27. " SSP_FCFG ,TI's SSP function configuration" "0,1"
bitfld.long 0x04 26. " SPIMWR_FCFG ,Motorola SPI and National Semiconductor MICROWIRE function configurations" "0,1"
textline " "
bitfld.long 0x04 25. " I2S_FCFG ,Philip I2S function configuration" "0,1"
bitfld.long 0x04 24. " AC97_FCFG ,Intel AC-link function configuration" "0,1"
textline " "
hexmask.long.byte 0x04 16.--23. 1. " TXFIFO_DEPTH ,Transmit FIFO size configuration"
hexmask.long.byte 0x04 8.--15. 1. " RXFIFO_DEPTH ,Receive FIFO size configuration"
textline " "
hexmask.long.byte 0x04 0.--7. 1. " FIFO_WIDTH ,Transmit/receive FIFO width"
width 11.
tree.end
tree.open "UART Controller"
tree "UART1"
base ad:0x98200000
width 11.
if (((d.b(ad:(0x98200000+0x0c)))&0x80)==0x00)
;DLAB=0
hgroup.byte 0x00++0x00
hide.byte 0x00 "RBR/THR1,Receiver/transmitter register"
in
group.byte 0x04++0x0
line.byte 0x00 "IER1,Interrupt Enable Register"
bitfld.byte 0x00 3. " MS ,Enables the modem status interrupt" "Disabled,Enabled"
bitfld.byte 0x00 2. " RLS ,Enables the receiver line status interrupt" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " THRE ,Enables the transmitter holding register empty interrupt" "Disabled,Enabled"
bitfld.byte 0x00 0. " RDA ,Enables the received data available interrupt" "Disabled,Enabled"
rgroup.byte 0x08++0x0
line.byte 0x00 "IIR1,Interrupt Identification Register 1"
bitfld.byte 0x00 6.--7. " FEn ,FIFO mode enable" "00,01,10,11"
bitfld.byte 0x00 4. " FF ,TX FIFO full" "Not full,Full"
textline " "
bitfld.byte 0x00 3. " FO ,FIFO mode only" "Disabled,Enabled"
bitfld.byte 0x00 1.--2. " IIC ,Interrupt Identification Code" "Fourth,Third,Second,Highest"
textline " "
bitfld.byte 0x00 0. " IP ,Interrupt Pending" "Enabled,Disabled"
wgroup.byte 0x08++0x0
line.byte 0x00 "FCR1,FIFO Controller Register 1"
bitfld.byte 0x00 6.--7. " RXFIFO_TRGL ,Set the trigger level of the RX FIFO interrupt (16-byte/32-byte/64-byte/128-byte FIFO)" "1,4/8/16/32,8/16/32/64,14/28/56/120"
bitfld.byte 0x00 4.--5. " TXFIFO_TRGL ,Set the trigger level of the TX FIFO interrupt (16-byte/32-byte/64-byte/128-byte FIFO)" "1,3/6/16/32,9/18/32/64,13/26/56/120"
textline " "
bitfld.byte 0x00 3. " DMAM ,DMA Mode" "Disabled,Enabled"
bitfld.byte 0x00 2. " TXR ,TX FIFO Reset" "No reset,Reset"
textline " "
bitfld.byte 0x00 1. " RXR ,RX FIFO Reset" "No reset,Reset"
bitfld.byte 0x00 0. " FEn ,FIFO Enable" "Disabled,Enabled"
else
group.byte 0x00++0x0
line.byte 0x00 "DLL1,Baud Rate Divisor Latch LSB"
group.byte 0x04++0x0
line.byte 0x00 "DLM1,Baud Rate Divisor Latch MSB"
group.byte 0x08++0x0
line.byte 0x00 "PSR1,Prescaler Register"
bitfld.byte 0x00 0.--4. " PSR ,Prescaler value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
if (((d.b(ad:(0x98200000+0xc)))&0x3)==0x0)
group.byte 0x0c++0x00
line.byte 0x00 "LCR1,Line Control Register 1"
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "No access,Access"
bitfld.byte 0x00 6. " SB ,Breaks the transmission to the receiving UART" "No break,Break"
textline " "
bitfld.byte 0x00 5. " SP ,Stick Parity" "Disabled,Enabled"
bitfld.byte 0x00 4. " EP ,Even parity select bit" "Odd,Even"
textline " "
bitfld.byte 0x00 3. " PEn ,Parity enable bit" "Disabled,Enabled"
bitfld.byte 0x00 2. " Stop ,The number of stop bits to be transmitted" "1,1.5"
textline " "
bitfld.byte 0x00 0.--1. " WL[1:0] ,Word length of the data being transmitted and received" "5 bits,6 bits,7 bits,8 bits"
else
group.byte 0x0c++0x00
line.byte 0x00 "LCR1,Line Control Register 1"
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "No access,Access"
bitfld.byte 0x00 6. " SB ,Breaks the transmission to the receiving UART" "No break,Break"
textline " "
bitfld.byte 0x00 5. " SP ,Stick Parity" "Disabled,Enabled"
bitfld.byte 0x00 4. " EP ,Even parity select bit" "Odd,Even"
textline " "
bitfld.byte 0x00 3. " PEn ,Parity enable bit" "Disabled,Enabled"
bitfld.byte 0x00 2. " Stop ,The number of stop bits to be transmitted" "1,2"
textline " "
bitfld.byte 0x00 0.--1. " WL[1:0] ,Word length of the data being transmitted and received" "5 bits,6 bits,7 bits,8 bits"
endif
group.byte 0x10++0x0
line.byte 0x00 "MCR1,Modem Controller Register 1"
bitfld.byte 0x00 6. " Out3 ,General purpose output io_irda_nout3" "Low,High"
bitfld.byte 0x00 5. " DMAMmode2 ,UART/SIR DMA mode" "Low,High"
textline " "
bitfld.byte 0x00 4. " Loop ,Loopback mode control bit" "Low,High"
bitfld.byte 0x00 3. " Out2 ,General purpose, active low, output io_irda_nout2" "Low,High"
textline " "
bitfld.byte 0x00 2. " Out1 ,General purpose, active low, output io_irda_nout1" "Low,High"
bitfld.byte 0x00 1. " RTS ,'Request to send' active low output" "Low,High"
textline " "
bitfld.byte 0x00 0. " DTR ,'Data terminal ready' active low output io_irda_ndtr" "Low,High"
hgroup.byte 0x14++0x0
hide.byte 0x00 "LSR1,Line Status Register 1"
in
wgroup.byte 0x14++0x0
line.byte 0x00 "TST1,Testing Register 1"
bitfld.byte 0x00 4. " TEST_CRC_ERR ,Incorrect CRC during FIR transmission" "No test,Test"
bitfld.byte 0x00 3. " TEST_PHY_ERR ,Incorrect 4PPM encoding chips during FIR transmission" "No test,Test"
textline " "
bitfld.byte 0x00 2. " TEST_BAUDGEN ,Improve baud generator toggle rate" "No test,Test"
bitfld.byte 0x00 1. " TEST_FRM_ERR ,Logic 0 STOP bit during UART transmission" "No test,Test"
textline " "
bitfld.byte 0x00 0. " TEST_PAR_ERR ,Incorrect parity during UART transmission" "No test,Test"
rgroup.byte 0x18++0x0
line.byte 0x00 "MSR1,Modem Status Register 1"
bitfld.byte 0x00 7. " DCD ,Data Carrier Detect" "Not occurred,Occurred"
bitfld.byte 0x00 6. " RI ,Ring Indicator" "Not occurred,Occurred"
textline " "
bitfld.byte 0x00 5. " DSR ,Data Set Ready" "Not occurred,Occurred"
bitfld.byte 0x00 4. " CTS ,Clear To Send" "Not occurred,Occurred"
textline " "
bitfld.byte 0x00 3. " DeltaDCD ,The delta-DCD flag" "Not changed,Changed"
bitfld.byte 0x00 2. " TE ,Trailing edge R1" "Not detected,Detected"
textline " "
bitfld.byte 0x00 1. " DDSR ,Delta DSR" "Not changed,Changed"
bitfld.byte 0x00 0. " DCTS ,Delta CTS" "Not changed,Changed"
group.byte 0x1c++0x0
line.byte 0x00 "SPR1,Scratch Pad Register 1"
hexmask.byte 0x00 1.--7. 1. " UD ,User Data"
bitfld.byte 0x00 0. " RS485En ,RS485 RTS Enable" "Disabled,Enabled"
width 11.
tree.end
tree "UART2"
base ad:0x99600000
width 11.
if (((d.b(ad:(0x98200000+0x0c)))&0x80)==0x00)
;DLAB=0
hgroup.byte 0x00++0x00
hide.byte 0x00 "RBR/THR2,Receiver/transmitter register"
in
group.byte 0x04++0x0
line.byte 0x00 "IER2,Interrupt Enable Register"
bitfld.byte 0x00 3. " MS ,Enables the modem status interrupt" "Disabled,Enabled"
bitfld.byte 0x00 2. " RLS ,Enables the receiver line status interrupt" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " THRE ,Enables the transmitter holding register empty interrupt" "Disabled,Enabled"
bitfld.byte 0x00 0. " RDA ,Enables the received data available interrupt" "Disabled,Enabled"
rgroup.byte 0x08++0x0
line.byte 0x00 "IIR2,Interrupt Identification Register 2"
bitfld.byte 0x00 6.--7. " FEn ,FIFO mode enable" "00,01,10,11"
bitfld.byte 0x00 4. " FF ,TX FIFO full" "Not full,Full"
textline " "
bitfld.byte 0x00 3. " FO ,FIFO mode only" "Disabled,Enabled"
bitfld.byte 0x00 1.--2. " IIC ,Interrupt Identification Code" "Fourth,Third,Second,Highest"
textline " "
bitfld.byte 0x00 0. " IP ,Interrupt Pending" "Enabled,Disabled"
wgroup.byte 0x08++0x0
line.byte 0x00 "FCR2,FIFO Controller Register 2"
bitfld.byte 0x00 6.--7. " RXFIFO_TRGL ,Set the trigger level of the RX FIFO interrupt (16-byte/32-byte/64-byte/128-byte FIFO)" "1,4/8/16/32,8/16/32/64,14/28/56/120"
bitfld.byte 0x00 4.--5. " TXFIFO_TRGL ,Set the trigger level of the TX FIFO interrupt (16-byte/32-byte/64-byte/128-byte FIFO)" "1,3/6/16/32,9/18/32/64,13/26/56/120"
textline " "
bitfld.byte 0x00 3. " DMAM ,DMA Mode" "Disabled,Enabled"
bitfld.byte 0x00 2. " TXR ,TX FIFO Reset" "No reset,Reset"
textline " "
bitfld.byte 0x00 1. " RXR ,RX FIFO Reset" "No reset,Reset"
bitfld.byte 0x00 0. " FEn ,FIFO Enable" "Disabled,Enabled"
else
group.byte 0x00++0x0
line.byte 0x00 "DLL2,Baud Rate Divisor Latch LSB"
group.byte 0x04++0x0
line.byte 0x00 "DLM2,Baud Rate Divisor Latch MSB"
group.byte 0x08++0x0
line.byte 0x00 "PSR2,Prescaler Register"
bitfld.byte 0x00 0.--4. " PSR ,Prescaler value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
if (((d.b(ad:(0x99600000+0xc)))&0x3)==0x0)
group.byte 0x0c++0x00
line.byte 0x00 "LCR2,Line Control Register 2"
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "No access,Access"
bitfld.byte 0x00 6. " SB ,Breaks the transmission to the receiving UART" "No break,Break"
textline " "
bitfld.byte 0x00 5. " SP ,Stick Parity" "Disabled,Enabled"
bitfld.byte 0x00 4. " EP ,Even parity select bit" "Odd,Even"
textline " "
bitfld.byte 0x00 3. " PEn ,Parity enable bit" "Disabled,Enabled"
bitfld.byte 0x00 2. " Stop ,The number of stop bits to be transmitted" "1,1.5"
textline " "
bitfld.byte 0x00 0.--1. " WL[1:0] ,Word length of the data being transmitted and received" "5 bits,6 bits,7 bits,8 bits"
else
group.byte 0x0c++0x00
line.byte 0x00 "LCR2,Line Control Register 2"
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "No access,Access"
bitfld.byte 0x00 6. " SB ,Breaks the transmission to the receiving UART" "No break,Break"
textline " "
bitfld.byte 0x00 5. " SP ,Stick Parity" "Disabled,Enabled"
bitfld.byte 0x00 4. " EP ,Even parity select bit" "Odd,Even"
textline " "
bitfld.byte 0x00 3. " PEn ,Parity enable bit" "Disabled,Enabled"
bitfld.byte 0x00 2. " Stop ,The number of stop bits to be transmitted" "1,2"
textline " "
bitfld.byte 0x00 0.--1. " WL[1:0] ,Word length of the data being transmitted and received" "5 bits,6 bits,7 bits,8 bits"
endif
group.byte 0x10++0x0
line.byte 0x00 "MCR2,Modem Controller Register 2"
bitfld.byte 0x00 6. " Out3 ,General purpose output io_irda_nout3" "Low,High"
bitfld.byte 0x00 5. " DMAMmode2 ,UART/SIR DMA mode" "Low,High"
textline " "
bitfld.byte 0x00 4. " Loop ,Loopback mode control bit" "Low,High"
bitfld.byte 0x00 3. " Out2 ,General purpose, active low, output io_irda_nout2" "Low,High"
textline " "
bitfld.byte 0x00 2. " Out1 ,General purpose, active low, output io_irda_nout1" "Low,High"
bitfld.byte 0x00 1. " RTS ,'Request to send' active low output" "Low,High"
textline " "
bitfld.byte 0x00 0. " DTR ,'Data terminal ready' active low output io_irda_ndtr" "Low,High"
hgroup.byte 0x14++0x0
hide.byte 0x00 "LSR2,Line Status Register 2"
in
wgroup.byte 0x14++0x0
line.byte 0x00 "TST2,Testing Register 2"
bitfld.byte 0x00 4. " TEST_CRC_ERR ,Incorrect CRC during FIR transmission" "No test,Test"
bitfld.byte 0x00 3. " TEST_PHY_ERR ,Incorrect 4PPM encoding chips during FIR transmission" "No test,Test"
textline " "
bitfld.byte 0x00 2. " TEST_BAUDGEN ,Improve baud generator toggle rate" "No test,Test"
bitfld.byte 0x00 1. " TEST_FRM_ERR ,Logic 0 STOP bit during UART transmission" "No test,Test"
textline " "
bitfld.byte 0x00 0. " TEST_PAR_ERR ,Incorrect parity during UART transmission" "No test,Test"
rgroup.byte 0x18++0x0
line.byte 0x00 "MSR2,Modem Status Register 2"
bitfld.byte 0x00 7. " DCD ,Data Carrier Detect" "Not occurred,Occurred"
bitfld.byte 0x00 6. " RI ,Ring Indicator" "Not occurred,Occurred"
textline " "
bitfld.byte 0x00 5. " DSR ,Data Set Ready" "Not occurred,Occurred"
bitfld.byte 0x00 4. " CTS ,Clear To Send" "Not occurred,Occurred"
textline " "
bitfld.byte 0x00 3. " DeltaDCD ,The delta-DCD flag" "Not changed,Changed"
bitfld.byte 0x00 2. " TE ,Trailing edge R1" "Not detected,Detected"
textline " "
bitfld.byte 0x00 1. " DDSR ,Delta DSR" "Not changed,Changed"
bitfld.byte 0x00 0. " DCTS ,Delta CTS" "Not changed,Changed"
group.byte 0x1c++0x0
line.byte 0x00 "SPR2,Scratch Pad Register 2"
hexmask.byte 0x00 1.--7. 1. " UD ,User Data"
bitfld.byte 0x00 0. " RS485En ,RS485 RTS Enable" "Disabled,Enabled"
width 11.
tree.end
tree.end
tree "General Purpose I/O"
base ad:0x98700000
width 22.
group.long 0x00++0x3
line.long 0x00 "GpioDataOut,The GPIO Data Output Register"
setclrfld.long 0x00 31. 0x10 31. 0x14 31. " GpioDataOut[31]_set/slr ,The GPIO data out pin 31" "Low,High"
setclrfld.long 0x00 30. 0x10 30. 0x14 30. " GpioDataOut[30]_set/clr ,The GPIO data out pin 30" "Low,High"
textline " "
setclrfld.long 0x00 29. 0x10 29. 0x14 29. " GpioDataOut[29]_set/clr ,The GPIO data out pin 29" "Low,High"
setclrfld.long 0x00 28. 0x10 28. 0x14 28. " GpioDataOut[28]_set/clr ,The GPIO data out pin 28" "Low,High"
textline " "
setclrfld.long 0x00 27. 0x10 27. 0x14 27. " GpioDataOut[27]_set/clr ,The GPIO data out pin 27" "Low,High"
setclrfld.long 0x00 26. 0x10 26. 0x14 26. " GpioDataOut[26]_set/clr ,The GPIO data out pin 26" "Low,High"
textline " "
setclrfld.long 0x00 25. 0x10 25. 0x14 25. " GpioDataOut[25]_set/clr ,The GPIO data out pin 25" "Low,High"
setclrfld.long 0x00 24. 0x10 24. 0x14 24. " GpioDataOut[24]_set/clr ,The GPIO data out pin 24" "Low,High"
textline " "
setclrfld.long 0x00 23. 0x10 23. 0x14 23. " GpioDataOut[23]_set/clr ,The GPIO data out pin 23" "Low,High"
setclrfld.long 0x00 22. 0x10 22. 0x14 22. " GpioDataOut[22]_set/clr ,The GPIO data out pin 22" "Low,High"
textline " "
setclrfld.long 0x00 21. 0x10 21. 0x14 21. " GpioDataOut[21]_set/clr ,The GPIO data out pin 21" "Low,High"
setclrfld.long 0x00 20. 0x10 20. 0x14 20. " GpioDataOut[20]_set/clr ,The GPIO data out pin 20" "Low,High"
textline " "
setclrfld.long 0x00 19. 0x10 19. 0x14 19. " GpioDataOut[19]_set/clr ,The GPIO data out pin 19" "Low,High"
setclrfld.long 0x00 18. 0x10 18. 0x14 18. " GpioDataOut[18]_set/clr ,The GPIO data out pin 18" "Low,High"
textline " "
setclrfld.long 0x00 17. 0x10 17. 0x14 17. " GpioDataOut[17]_set/clr ,The GPIO data out pin 17" "Low,High"
setclrfld.long 0x00 16. 0x10 16. 0x14 16. " GpioDataOut[16]_set/clr ,The GPIO data out pin 16" "Low,High"
textline " "
setclrfld.long 0x00 15. 0x10 15. 0x14 15. " GpioDataOut[15]_set/clr ,The GPIO data out pin 15" "Low,High"
setclrfld.long 0x00 14. 0x10 14. 0x14 14. " GpioDataOut[14]_set/clr ,The GPIO data out pin 14" "Low,High"
textline " "
setclrfld.long 0x00 13. 0x10 13. 0x14 13. " GpioDataOut[13]_set/clr ,The GPIO data out pin 13" "Low,High"
setclrfld.long 0x00 12. 0x10 12. 0x14 12. " GpioDataOut[12]_set/clr ,The GPIO data out pin 12" "Low,High"
textline " "
setclrfld.long 0x00 11. 0x10 11. 0x14 11. " GpioDataOut[11]_set/clr ,The GPIO data out pin 11" "Low,High"
setclrfld.long 0x00 10. 0x10 10. 0x14 10. " GpioDataOut[10]_set/clr ,The GPIO data out pin 10" "Low,High"
textline " "
setclrfld.long 0x00 9. 0x10 9. 0x14 9. " GpioDataOut[9]_set/clr ,The GPIO data out pin 9" "Low,High"
setclrfld.long 0x00 8. 0x10 8. 0x14 8. " GpioDataOut[8]_set/clr ,The GPIO data out pin 8" "Low,High"
textline " "
setclrfld.long 0x00 7. 0x10 7. 0x14 7. " GpioDataOut[7]_set/clr ,The GPIO data out pin 7" "Low,High"
setclrfld.long 0x00 6. 0x10 6. 0x14 6. " GpioDataOut[6]_set/clr ,The GPIO data out pin 6" "Low,High"
textline " "
setclrfld.long 0x00 5. 0x10 5. 0x14 5. " GpioDataOut[5]_set/clr ,The GPIO data out pin 5" "Low,High"
setclrfld.long 0x00 4. 0x10 4. 0x14 4. " GpioDataOut[4]_set/clr ,The GPIO data out pin 4" "Low,High"
textline " "
setclrfld.long 0x00 3. 0x10 3. 0x14 3. " GpioDataOut[3]_set/clr ,The GPIO data out pin 3" "Low,High"
setclrfld.long 0x00 2. 0x10 2. 0x14 2. " GpioDataOut[2]_set/clr ,The GPIO data out pin 2" "Low,High"
textline " "
setclrfld.long 0x00 1. 0x10 1. 0x14 1. " GpioDataOut[1]_set/clr ,The GPIO data out pin 1" "Low,High"
setclrfld.long 0x00 0. 0x10 0. 0x14 0. " GpioDataOut[0]_set/clr ,The GPIO data out pin 0" "Low,High"
rgroup.long 0x04++0x3
line.long 0x00 "GpioDataIn,The GPIO Data Input Register"
bitfld.long 0x00 31. " GpioDataIn[31] ,The GPIO data in pin 31" "Low,High"
bitfld.long 0x00 30. " GpioDataIn[30] ,The GPIO data in pin 30" "Low,High"
textline " "
bitfld.long 0x00 29. " GpioDataIn[29] ,The GPIO data in pin 29" "Low,High"
bitfld.long 0x00 28. " GpioDataIn[28] ,The GPIO data in pin 28" "Low,High"
textline " "
bitfld.long 0x00 27. " GpioDataIn[27] ,The GPIO data in pin 27" "Low,High"
bitfld.long 0x00 26. " GpioDataIn[26] ,The GPIO data in pin 26" "Low,High"
textline " "
bitfld.long 0x00 25. " GpioDataIn[25] ,The GPIO data in pin 25" "Low,High"
bitfld.long 0x00 24. " GpioDataIn[24] ,The GPIO data in pin 24" "Low,High"
textline " "
bitfld.long 0x00 23. " GpioDataIn[23] ,The GPIO data in pin 23" "Low,High"
bitfld.long 0x00 22. " GpioDataIn[22] ,The GPIO data in pin 22" "Low,High"
textline " "
bitfld.long 0x00 21. " GpioDataIn[21] ,The GPIO data in pin 21" "Low,High"
bitfld.long 0x00 20. " GpioDataIn[20] ,The GPIO data in pin 20" "Low,High"
textline " "
bitfld.long 0x00 19. " GpioDataIn[19] ,The GPIO data in pin 19" "Low,High"
bitfld.long 0x00 18. " GpioDataIn[18] ,The GPIO data in pin 18" "Low,High"
textline " "
bitfld.long 0x00 17. " GpioDataIn[17] ,The GPIO data in pin 17" "Low,High"
bitfld.long 0x00 16. " GpioDataIn[16] ,The GPIO data in pin 16" "Low,High"
textline " "
bitfld.long 0x00 15. " GpioDataIn[15] ,The GPIO data in pin 15" "Low,High"
bitfld.long 0x00 14. " GpioDataIn[14] ,The GPIO data in pin 14" "Low,High"
textline " "
bitfld.long 0x00 13. " GpioDataIn[13] ,The GPIO data in pin 13" "Low,High"
bitfld.long 0x00 12. " GpioDataIn[12] ,The GPIO data in pin 12" "Low,High"
textline " "
bitfld.long 0x00 11. " GpioDataIn[11] ,The GPIO data in pin 11" "Low,High"
bitfld.long 0x00 10. " GpioDataIn[10] ,The GPIO data in pin 10" "Low,High"
textline " "
bitfld.long 0x00 9. " GpioDataIn[9] ,The GPIO data in pin 9" "Low,High"
bitfld.long 0x00 8. " GpioDataIn[8] ,The GPIO data in pin 8" "Low,High"
textline " "
bitfld.long 0x00 7. " GpioDataIn[7] ,The GPIO data in pin 7" "Low,High"
bitfld.long 0x00 6. " GpioDataIn[6] ,The GPIO data in pin 6" "Low,High"
textline " "
bitfld.long 0x00 5. " GpioDataIn[5] ,The GPIO data in pin 5" "Low,High"
bitfld.long 0x00 4. " GpioDataIn[4] ,The GPIO data in pin 4" "Low,High"
textline " "
bitfld.long 0x00 3. " GpioDataIn[3] ,The GPIO data in pin 3" "Low,High"
bitfld.long 0x00 2. " GpioDataIn[2] ,The GPIO data in pin 2" "Low,High"
textline " "
bitfld.long 0x00 1. " GpioDataIn[1] ,The GPIO data in pin 1" "Low,High"
bitfld.long 0x00 0. " GpioDataIn[0] ,The GPIO data in pin 0" "Low,High"
group.long 0x08++0x7
line.long 0x00 "PinDir,GPIO Direction Register"
bitfld.long 0x00 31. " PinDir[31] ,GPIO direction pin 31" "Input,Output"
bitfld.long 0x00 30. " PinDir[30] ,GPIO direction pin 30" "Input,Output"
textline " "
bitfld.long 0x00 29. " PinDir[29] ,GPIO direction pin 29" "Input,Output"
bitfld.long 0x00 28. " PinDir[28] ,GPIO direction pin 28" "Input,Output"
textline " "
bitfld.long 0x00 27. " PinDir[27] ,GPIO direction pin 27" "Input,Output"
bitfld.long 0x00 26. " PinDir[26] ,GPIO direction pin 26" "Input,Output"
textline " "
bitfld.long 0x00 25. " PinDir[25] ,GPIO direction pin 25" "Input,Output"
bitfld.long 0x00 24. " PinDir[24] ,GPIO direction pin 24" "Input,Output"
textline " "
bitfld.long 0x00 23. " PinDir[23] ,GPIO direction pin 23" "Input,Output"
bitfld.long 0x00 22. " PinDir[22] ,GPIO direction pin 22" "Input,Output"
textline " "
bitfld.long 0x00 21. " PinDir[21] ,GPIO direction pin 21" "Input,Output"
bitfld.long 0x00 20. " PinDir[20] ,GPIO direction pin 20" "Input,Output"
textline " "
bitfld.long 0x00 19. " PinDir[19] ,GPIO direction pin 19" "Input,Output"
bitfld.long 0x00 18. " PinDir[18] ,GPIO direction pin 18" "Input,Output"
textline " "
bitfld.long 0x00 17. " PinDir[17] ,GPIO direction pin 17" "Input,Output"
bitfld.long 0x00 16. " PinDir[16] ,GPIO direction pin 16" "Input,Output"
textline " "
bitfld.long 0x00 15. " PinDir[15] ,GPIO direction pin 15" "Input,Output"
bitfld.long 0x00 14. " PinDir[14] ,GPIO direction pin 14" "Input,Output"
textline " "
bitfld.long 0x00 13. " PinDir[13] ,GPIO direction pin 13" "Input,Output"
bitfld.long 0x00 12. " PinDir[12] ,GPIO direction pin 12" "Input,Output"
textline " "
bitfld.long 0x00 11. " PinDir[11] ,GPIO direction pin 11" "Input,Output"
bitfld.long 0x00 10. " PinDir[10] ,GPIO direction pin 10" "Input,Output"
textline " "
bitfld.long 0x00 9. " PinDir[9] ,GPIO direction pin 9" "Input,Output"
bitfld.long 0x00 8. " PinDir[8] ,GPIO direction pin 8" "Input,Output"
textline " "
bitfld.long 0x00 7. " PinDir[7] ,GPIO direction pin 7" "Input,Output"
bitfld.long 0x00 6. " PinDir[6] ,GPIO direction pin 6" "Input,Output"
textline " "
bitfld.long 0x00 5. " PinDir[5] ,GPIO direction pin 5" "Input,Output"
bitfld.long 0x00 4. " PinDir[4] ,GPIO direction pin 4" "Input,Output"
textline " "
bitfld.long 0x00 3. " PinDir[3] ,GPIO direction pin 3" "Input,Output"
bitfld.long 0x00 2. " PinDir[2] ,GPIO direction pin 2" "Input,Output"
textline " "
bitfld.long 0x00 1. " PinDir[1] ,GPIO direction pin 1" "Input,Output"
bitfld.long 0x00 0. " PinDir[0] ,GPIO direction pin 0" "Input,Output"
line.long 0x04 "PinBypass,GPIO Bypass Register"
bitfld.long 0x04 31. " PinBypass[31] ,The bypass mode pin 31" "Normal,Bypassed"
bitfld.long 0x04 30. " PinBypass[30] ,The bypass mode pin 30" "Normal,Bypassed"
textline " "
bitfld.long 0x04 29. " PinBypass[29] ,The bypass mode pin 29" "Normal,Bypassed"
bitfld.long 0x04 28. " PinBypass[28] ,The bypass mode pin 28" "Normal,Bypassed"
textline " "
bitfld.long 0x04 27. " PinBypass[27] ,The bypass mode pin 27" "Normal,Bypassed"
bitfld.long 0x04 26. " PinBypass[26] ,The bypass mode pin 26" "Normal,Bypassed"
textline " "
bitfld.long 0x04 25. " PinBypass[25] ,The bypass mode pin 25" "Normal,Bypassed"
bitfld.long 0x04 24. " PinBypass[24] ,The bypass mode pin 24" "Normal,Bypassed"
textline " "
bitfld.long 0x04 23. " PinBypass[23] ,The bypass mode pin 23" "Normal,Bypassed"
bitfld.long 0x04 22. " PinBypass[22] ,The bypass mode pin 22" "Normal,Bypassed"
textline " "
bitfld.long 0x04 21. " PinBypass[21] ,The bypass mode pin 21" "Normal,Bypassed"
bitfld.long 0x04 20. " PinBypass[20] ,The bypass mode pin 20" "Normal,Bypassed"
textline " "
bitfld.long 0x04 19. " PinBypass[19] ,The bypass mode pin 19" "Normal,Bypassed"
bitfld.long 0x04 18. " PinBypass[18] ,The bypass mode pin 18" "Normal,Bypassed"
textline " "
bitfld.long 0x04 17. " PinBypass[17] ,The bypass mode pin 17" "Normal,Bypassed"
bitfld.long 0x04 16. " PinBypass[16] ,The bypass mode pin 16" "Normal,Bypassed"
textline " "
bitfld.long 0x04 15. " PinBypass[15] ,The bypass mode pin 15" "Normal,Bypassed"
bitfld.long 0x04 14. " PinBypass[14] ,The bypass mode pin 14" "Normal,Bypassed"
textline " "
bitfld.long 0x04 13. " PinBypass[13] ,The bypass mode pin 13" "Normal,Bypassed"
bitfld.long 0x04 12. " PinBypass[12] ,The bypass mode pin 12" "Normal,Bypassed"
textline " "
bitfld.long 0x04 11. " PinBypass[11] ,The bypass mode pin 11" "Normal,Bypassed"
bitfld.long 0x04 10. " PinBypass[10] ,The bypass mode pin 10" "Normal,Bypassed"
textline " "
bitfld.long 0x04 9. " PinBypass[9] ,The bypass mode pin 9" "Normal,Bypassed"
bitfld.long 0x04 8. " PinBypass[8] ,The bypass mode pin 8" "Normal,Bypassed"
textline " "
bitfld.long 0x04 7. " PinBypass[7] ,The bypass mode pin 7" "Normal,Bypassed"
bitfld.long 0x04 6. " PinBypass[6] ,The bypass mode pin 6" "Normal,Bypassed"
textline " "
bitfld.long 0x04 5. " PinBypass[5] ,The bypass mode pin 5" "Normal,Bypassed"
bitfld.long 0x04 4. " PinBypass[4] ,The bypass mode pin 4" "Normal,Bypassed"
textline " "
bitfld.long 0x04 3. " PinBypass[3] ,The bypass mode pin 3" "Normal,Bypassed"
bitfld.long 0x04 2. " PinBypass[2] ,The bypass mode pin 2" "Normal,Bypassed"
textline " "
bitfld.long 0x04 1. " PinBypass[1] ,The bypass mode pin 1" "Normal,Bypassed"
bitfld.long 0x04 0. " PinBypass[0] ,The bypass mode pin 0" "Normal,Bypassed"
group.long 0x18++0xb
line.long 0x00 "PinPullEnable,GPIO Pull Up Register"
bitfld.long 0x00 31. " PinPullEnable[31] ,Pull up enable pin 31" "Enabled,Disabled"
bitfld.long 0x00 30. " PinPullEnable[30] ,Pull up enable pin 30" "Enabled,Disabled"
textline " "
bitfld.long 0x00 29. " PinPullEnable[29] ,Pull up enable pin 29" "Enabled,Disabled"
bitfld.long 0x00 28. " PinPullEnable[28] ,Pull up enable pin 28" "Enabled,Disabled"
textline " "
bitfld.long 0x00 27. " PinPullEnable[27] ,Pull up enable pin 27" "Enabled,Disabled"
bitfld.long 0x00 26. " PinPullEnable[26] ,Pull up enable pin 26" "Enabled,Disabled"
textline " "
bitfld.long 0x00 25. " PinPullEnable[25] ,Pull up enable pin 25" "Enabled,Disabled"
bitfld.long 0x00 24. " PinPullEnable[24] ,Pull up enable pin 24" "Enabled,Disabled"
textline " "
bitfld.long 0x00 23. " PinPullEnable[23] ,Pull up enable pin 23" "Enabled,Disabled"
bitfld.long 0x00 22. " PinPullEnable[22] ,Pull up enable pin 22" "Enabled,Disabled"
textline " "
bitfld.long 0x00 21. " PinPullEnable[21] ,Pull up enable pin 21" "Enabled,Disabled"
bitfld.long 0x00 20. " PinPullEnable[20] ,Pull up enable pin 20" "Enabled,Disabled"
textline " "
bitfld.long 0x00 19. " PinPullEnable[19] ,Pull up enable pin 19" "Enabled,Disabled"
bitfld.long 0x00 18. " PinPullEnable[18] ,Pull up enable pin 18" "Enabled,Disabled"
textline " "
bitfld.long 0x00 17. " PinPullEnable[17] ,Pull up enable pin 17" "Enabled,Disabled"
bitfld.long 0x00 16. " PinPullEnable[16] ,Pull up enable pin 16" "Enabled,Disabled"
textline " "
bitfld.long 0x00 15. " PinPullEnable[15] ,Pull up enable pin 15" "Enabled,Disabled"
bitfld.long 0x00 14. " PinPullEnable[14] ,Pull up enable pin 14" "Enabled,Disabled"
textline " "
bitfld.long 0x00 13. " PinPullEnable[13] ,Pull up enable pin 13" "Enabled,Disabled"
bitfld.long 0x00 12. " PinPullEnable[12] ,Pull up enable pin 12" "Enabled,Disabled"
textline " "
bitfld.long 0x00 11. " PinPullEnable[11] ,Pull up enable pin 11" "Enabled,Disabled"
bitfld.long 0x00 10. " PinPullEnable[10] ,Pull up enable pin 10" "Enabled,Disabled"
textline " "
bitfld.long 0x00 9. " PinPullEnable[9] ,Pull up enable pin 9" "Enabled,Disabled"
bitfld.long 0x00 8. " PinPullEnable[8] ,Pull up enable pin 8" "Enabled,Disabled"
textline " "
bitfld.long 0x00 7. " PinPullEnable[7] ,Pull up enable pin 7" "Enabled,Disabled"
bitfld.long 0x00 6. " PinPullEnable[6] ,Pull up enable pin 6" "Enabled,Disabled"
textline " "
bitfld.long 0x00 5. " PinPullEnable[5] ,Pull up enable pin 5" "Enabled,Disabled"
bitfld.long 0x00 4. " PinPullEnable[4] ,Pull up enable pin 4" "Enabled,Disabled"
textline " "
bitfld.long 0x00 3. " PinPullEnable[3] ,Pull up enable pin 3" "Enabled,Disabled"
bitfld.long 0x00 2. " PinPullEnable[2] ,Pull up enable pin 2" "Enabled,Disabled"
textline " "
bitfld.long 0x00 1. " PinPullEnable[1] ,Pull up enable pin 1" "Enabled,Disabled"
bitfld.long 0x00 0. " PinPullEnable[0] ,Pull up enable pin 0" "Enabled,Disabled"
line.long 0x04 "PinPullType,GPIO Pull-High/Pull-Low Register"
bitfld.long 0x04 31. " PinPullType[31] ,Pull up type pin 31" "Low,High"
bitfld.long 0x04 30. " PinPullType[30] ,Pull up type pin 30" "Low,High"
textline " "
bitfld.long 0x04 29. " PinPullType[29] ,Pull up type pin 29" "Low,High"
bitfld.long 0x04 28. " PinPullType[28] ,Pull up type pin 28" "Low,High"
textline " "
bitfld.long 0x04 27. " PinPullType[27] ,Pull up type pin 27" "Low,High"
bitfld.long 0x04 26. " PinPullType[26] ,Pull up type pin 26" "Low,High"
textline " "
bitfld.long 0x04 25. " PinPullType[25] ,Pull up type pin 25" "Low,High"
bitfld.long 0x04 24. " PinPullType[24] ,Pull up type pin 24" "Low,High"
textline " "
bitfld.long 0x04 23. " PinPullType[23] ,Pull up type pin 23" "Low,High"
bitfld.long 0x04 22. " PinPullType[22] ,Pull up type pin 22" "Low,High"
textline " "
bitfld.long 0x04 21. " PinPullType[21] ,Pull up type pin 21" "Low,High"
bitfld.long 0x04 20. " PinPullType[20] ,Pull up type pin 20" "Low,High"
textline " "
bitfld.long 0x04 19. " PinPullType[19] ,Pull up type pin 19" "Low,High"
bitfld.long 0x04 18. " PinPullType[18] ,Pull up type pin 18" "Low,High"
textline " "
bitfld.long 0x04 17. " PinPullType[17] ,Pull up type pin 17" "Low,High"
bitfld.long 0x04 16. " PinPullType[16] ,Pull up type pin 16" "Low,High"
textline " "
bitfld.long 0x04 15. " PinPullType[15] ,Pull up type pin 15" "Low,High"
bitfld.long 0x04 14. " PinPullType[14] ,Pull up type pin 14" "Low,High"
textline " "
bitfld.long 0x04 13. " PinPullType[13] ,Pull up type pin 13" "Low,High"
bitfld.long 0x04 12. " PinPullType[12] ,Pull up type pin 12" "Low,High"
textline " "
bitfld.long 0x04 11. " PinPullType[11] ,Pull up type pin 11" "Low,High"
bitfld.long 0x04 10. " PinPullType[10] ,Pull up type pin 10" "Low,High"
textline " "
bitfld.long 0x04 9. " PinPullType[9] ,Pull up type pin 9" "Low,High"
bitfld.long 0x04 8. " PinPullType[8] ,Pull up type pin 8" "Low,High"
textline " "
bitfld.long 0x04 7. " PinPullType[7] ,Pull up type pin 7" "Low,High"
bitfld.long 0x04 6. " PinPullType[6] ,Pull up type pin 6" "Low,High"
textline " "
bitfld.long 0x04 5. " PinPullType[5] ,Pull up type pin 5" "Low,High"
bitfld.long 0x04 4. " PinPullType[4] ,Pull up type pin 4" "Low,High"
textline " "
bitfld.long 0x04 3. " PinPullType[3] ,Pull up type pin 3" "Low,High"
bitfld.long 0x04 2. " PinPullType[2] ,Pull up type pin 2" "Low,High"
textline " "
bitfld.long 0x04 1. " PinPullType[1] ,Pull up type pin 1" "Low,High"
bitfld.long 0x04 0. " PinPullType[0] ,Pull up type pin 0" "Low,High"
line.long 0x08 "IntrEnable,GPIO Interrupt Enable Register"
bitfld.long 0x08 31. " IntrEnable[31] ,Interrupt enable pin 31" "Disabled,Enabled"
bitfld.long 0x08 30. " IntrEnable[30] ,Interrupt enable pin 30" "Disabled,Enabled"
textline " "
bitfld.long 0x08 29. " IntrEnable[29] ,Interrupt enable pin 29" "Disabled,Enabled"
bitfld.long 0x08 28. " IntrEnable[28] ,Interrupt enable pin 28" "Disabled,Enabled"
textline " "
bitfld.long 0x08 27. " IntrEnable[27] ,Interrupt enable pin 27" "Disabled,Enabled"
bitfld.long 0x08 26. " IntrEnable[26] ,Interrupt enable pin 26" "Disabled,Enabled"
textline " "
bitfld.long 0x08 25. " IntrEnable[25] ,Interrupt enable pin 25" "Disabled,Enabled"
bitfld.long 0x08 24. " IntrEnable[24] ,Interrupt enable pin 24" "Disabled,Enabled"
textline " "
bitfld.long 0x08 23. " IntrEnable[23] ,Interrupt enable pin 23" "Disabled,Enabled"
bitfld.long 0x08 22. " IntrEnable[22] ,Interrupt enable pin 22" "Disabled,Enabled"
textline " "
bitfld.long 0x08 21. " IntrEnable[21] ,Interrupt enable pin 21" "Disabled,Enabled"
bitfld.long 0x08 20. " IntrEnable[20] ,Interrupt enable pin 20" "Disabled,Enabled"
textline " "
bitfld.long 0x08 19. " IntrEnable[19] ,Interrupt enable pin 19" "Disabled,Enabled"
bitfld.long 0x08 18. " IntrEnable[18] ,Interrupt enable pin 18" "Disabled,Enabled"
textline " "
bitfld.long 0x08 17. " IntrEnable[17] ,Interrupt enable pin 17" "Disabled,Enabled"
bitfld.long 0x08 16. " IntrEnable[16] ,Interrupt enable pin 16" "Disabled,Enabled"
textline " "
bitfld.long 0x08 15. " IntrEnable[15] ,Interrupt enable pin 15" "Disabled,Enabled"
bitfld.long 0x08 14. " IntrEnable[14] ,Interrupt enable pin 14" "Disabled,Enabled"
textline " "
bitfld.long 0x08 13. " IntrEnable[13] ,Interrupt enable pin 13" "Disabled,Enabled"
bitfld.long 0x08 12. " IntrEnable[12] ,Interrupt enable pin 12" "Disabled,Enabled"
textline " "
bitfld.long 0x08 11. " IntrEnable[11] ,Interrupt enable pin 11" "Disabled,Enabled"
bitfld.long 0x08 10. " IntrEnable[10] ,Interrupt enable pin 10" "Disabled,Enabled"
textline " "
bitfld.long 0x08 9. " IntrEnable[9] ,Interrupt enable pin 9" "Disabled,Enabled"
bitfld.long 0x08 8. " IntrEnable[8] ,Interrupt enable pin 8" "Disabled,Enabled"
textline " "
bitfld.long 0x08 7. " IntrEnable[7] ,Interrupt enable pin 7" "Disabled,Enabled"
bitfld.long 0x08 6. " IntrEnable[6] ,Interrupt enable pin 6" "Disabled,Enabled"
textline " "
bitfld.long 0x08 5. " IntrEnable[5] ,Interrupt enable pin 5" "Disabled,Enabled"
bitfld.long 0x08 4. " IntrEnable[4] ,Interrupt enable pin 4" "Disabled,Enabled"
textline " "
bitfld.long 0x08 3. " IntrEnable[3] ,Interrupt enable pin 3" "Disabled,Enabled"
bitfld.long 0x08 2. " IntrEnable[2] ,Interrupt enable pin 2" "Disabled,Enabled"
textline " "
bitfld.long 0x08 1. " IntrEnable[1] ,Interrupt enable pin 1" "Disabled,Enabled"
bitfld.long 0x08 0. " IntrEnable[0] ,Interrupt enable pin 0" "Disabled,Enabled"
rgroup.long 0x24++0x7
line.long 0x00 "IntrRawState,GPIO Interrupt Raw Status Register"
bitfld.long 0x00 31. " IntrRawState[31] ,Interrupt raw status pin 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. " IntrRawState[30] ,Interrupt raw status pin 30" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 29. " IntrRawState[29] ,Interrupt raw status pin 29" "No interrupt,Interrupt"
bitfld.long 0x00 28. " IntrRawState[28] ,Interrupt raw status pin 28" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 27. " IntrRawState[27] ,Interrupt raw status pin 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. " IntrRawState[26] ,Interrupt raw status pin 26" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 25. " IntrRawState[25] ,Interrupt raw status pin 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. " IntrRawState[24] ,Interrupt raw status pin 24" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 23. " IntrRawState[23] ,Interrupt raw status pin 23" "No interrupt,Interrupt"
bitfld.long 0x00 22. " IntrRawState[22] ,Interrupt raw status pin 22" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 21. " IntrRawState[21] ,Interrupt raw status pin 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. " IntrRawState[20] ,Interrupt raw status pin 20" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 19. " IntrRawState[19] ,Interrupt raw status pin 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. " IntrRawState[18] ,Interrupt raw status pin 18" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 17. " IntrRawState[17] ,Interrupt raw status pin 17" "No interrupt,Interrupt"
bitfld.long 0x00 16. " IntrRawState[16] ,Interrupt raw status pin 16" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 15. " IntrRawState[15] ,Interrupt raw status pin 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. " IntrRawState[14] ,Interrupt raw status pin 14" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 13. " IntrRawState[13] ,Interrupt raw status pin 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. " IntrRawState[12] ,Interrupt raw status pin 12" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 11. " IntrRawState[11] ,Interrupt raw status pin 11" "No interrupt,Interrupt"
bitfld.long 0x00 10. " IntrRawState[10] ,Interrupt raw status pin 10" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 9. " IntrRawState[9] ,Interrupt raw status pin 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. " IntrRawState[8] ,Interrupt raw status pin 8" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 7. " IntrRawState[7] ,Interrupt raw status pin 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. " IntrRawState[6] ,Interrupt raw status pin 6" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 5. " IntrRawState[5] ,Interrupt raw status pin 5" "No interrupt,Interrupt"
bitfld.long 0x00 4. " IntrRawState[4] ,Interrupt raw status pin 4" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 3. " IntrRawState[3] ,Interrupt raw status pin 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. " IntrRawState[2] ,Interrupt raw status pin 2" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 1. " IntrRawState[1] ,Interrupt raw status pin 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. " IntrRawState[0] ,Interrupt raw status pin 0" "No interrupt,Interrupt"
line.long 0x04 "IntrMaskedState,GPIO Interrupt Masked Status Register"
bitfld.long 0x04 31. " IntrMaskedState[31] ,Interrupt masked status pin 31" "No interrupt,Interrupt"
bitfld.long 0x04 30. " IntrMaskedState[30] ,Interrupt masked status pin 30" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 29. " IntrMaskedState[29] ,Interrupt masked status pin 29" "No interrupt,Interrupt"
bitfld.long 0x04 28. " IntrMaskedState[28] ,Interrupt masked status pin 28" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 27. " IntrMaskedState[27] ,Interrupt masked status pin 27" "No interrupt,Interrupt"
bitfld.long 0x04 26. " IntrMaskedState[26] ,Interrupt masked status pin 26" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 25. " IntrMaskedState[25] ,Interrupt masked status pin 25" "No interrupt,Interrupt"
bitfld.long 0x04 24. " IntrMaskedState[24] ,Interrupt masked status pin 24" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 23. " IntrMaskedState[23] ,Interrupt masked status pin 23" "No interrupt,Interrupt"
bitfld.long 0x04 22. " IntrMaskedState[22] ,Interrupt masked status pin 22" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 21. " IntrMaskedState[21] ,Interrupt masked status pin 21" "No interrupt,Interrupt"
bitfld.long 0x04 20. " IntrMaskedState[20] ,Interrupt masked status pin 20" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 19. " IntrMaskedState[19] ,Interrupt masked status pin 19" "No interrupt,Interrupt"
bitfld.long 0x04 18. " IntrMaskedState[18] ,Interrupt masked status pin 18" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 17. " IntrMaskedState[17] ,Interrupt masked status pin 17" "No interrupt,Interrupt"
bitfld.long 0x04 16. " IntrMaskedState[16] ,Interrupt masked status pin 16" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 15. " IntrMaskedState[15] ,Interrupt masked status pin 15" "No interrupt,Interrupt"
bitfld.long 0x04 14. " IntrMaskedState[14] ,Interrupt masked status pin 14" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 13. " IntrMaskedState[13] ,Interrupt masked status pin 13" "No interrupt,Interrupt"
bitfld.long 0x04 12. " IntrMaskedState[12] ,Interrupt masked status pin 12" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 11. " IntrMaskedState[11] ,Interrupt masked status pin 11" "No interrupt,Interrupt"
bitfld.long 0x04 10. " IntrMaskedState[10] ,Interrupt masked status pin 10" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 9. " IntrMaskedState[9] ,Interrupt masked status pin 9" "No interrupt,Interrupt"
bitfld.long 0x04 8. " IntrMaskedState[8] ,Interrupt masked status pin 8" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 7. " IntrMaskedState[7] ,Interrupt masked status pin 7" "No interrupt,Interrupt"
bitfld.long 0x04 6. " IntrMaskedState[6] ,Interrupt masked status pin 6" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 5. " IntrMaskedState[5] ,Interrupt masked status pin 5" "No interrupt,Interrupt"
bitfld.long 0x04 4. " IntrMaskedState[4] ,Interrupt masked status pin 4" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 3. " IntrMaskedState[3] ,Interrupt masked status pin 3" "No interrupt,Interrupt"
bitfld.long 0x04 2. " IntrMaskedState[2] ,Interrupt masked status pin 2" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 1. " IntrMaskedState[1] ,Interrupt masked status pin 1" "No interrupt,Interrupt"
bitfld.long 0x04 0. " IntrMaskedState[0] ,Interrupt masked status pin 0" "No interrupt,Interrupt"
group.long 0x2c++0x3
line.long 0x00 "IntrMask,GPIO Interrupt Mask Register"
bitfld.long 0x00 31. " IntrMask[31] ,Interrupt mask enable pin 31" "Not masked,Masked"
bitfld.long 0x00 30. " IntrMask[30] ,Interrupt mask enable pin 30" "Not masked,Masked"
textline " "
bitfld.long 0x00 29. " IntrMask[29] ,Interrupt mask enable pin 29" "Not masked,Masked"
bitfld.long 0x00 28. " IntrMask[28] ,Interrupt mask enable pin 28" "Not masked,Masked"
textline " "
bitfld.long 0x00 27. " IntrMask[27] ,Interrupt mask enable pin 27" "Not masked,Masked"
bitfld.long 0x00 26. " IntrMask[26] ,Interrupt mask enable pin 26" "Not masked,Masked"
textline " "
bitfld.long 0x00 25. " IntrMask[25] ,Interrupt mask enable pin 25" "Not masked,Masked"
bitfld.long 0x00 24. " IntrMask[24] ,Interrupt mask enable pin 24" "Not masked,Masked"
textline " "
bitfld.long 0x00 23. " IntrMask[23] ,Interrupt mask enable pin 23" "Not masked,Masked"
bitfld.long 0x00 22. " IntrMask[22] ,Interrupt mask enable pin 22" "Not masked,Masked"
textline " "
bitfld.long 0x00 21. " IntrMask[21] ,Interrupt mask enable pin 21" "Not masked,Masked"
bitfld.long 0x00 20. " IntrMask[20] ,Interrupt mask enable pin 20" "Not masked,Masked"
textline " "
bitfld.long 0x00 19. " IntrMask[19] ,Interrupt mask enable pin 19" "Not masked,Masked"
bitfld.long 0x00 18. " IntrMask[18] ,Interrupt mask enable pin 18" "Not masked,Masked"
textline " "
bitfld.long 0x00 17. " IntrMask[17] ,Interrupt mask enable pin 17" "Not masked,Masked"
bitfld.long 0x00 16. " IntrMask[16] ,Interrupt mask enable pin 16" "Not masked,Masked"
textline " "
bitfld.long 0x00 15. " IntrMask[15] ,Interrupt mask enable pin 15" "Not masked,Masked"
bitfld.long 0x00 14. " IntrMask[14] ,Interrupt mask enable pin 14" "Not masked,Masked"
textline " "
bitfld.long 0x00 13. " IntrMask[13] ,Interrupt mask enable pin 13" "Not masked,Masked"
bitfld.long 0x00 12. " IntrMask[12] ,Interrupt mask enable pin 12" "Not masked,Masked"
textline " "
bitfld.long 0x00 11. " IntrMask[11] ,Interrupt mask enable pin 11" "Not masked,Masked"
bitfld.long 0x00 10. " IntrMask[10] ,Interrupt mask enable pin 10" "Not masked,Masked"
textline " "
bitfld.long 0x00 9. " IntrMask[9] ,Interrupt mask enable pin 9" "Not masked,Masked"
bitfld.long 0x00 8. " IntrMask[8] ,Interrupt mask enable pin 8" "Not masked,Masked"
textline " "
bitfld.long 0x00 7. " IntrMask[7] ,Interrupt mask enable pin 7" "Not masked,Masked"
bitfld.long 0x00 6. " IntrMask[6] ,Interrupt mask enable pin 6" "Not masked,Masked"
textline " "
bitfld.long 0x00 5. " IntrMask[5] ,Interrupt mask enable pin 5" "Not masked,Masked"
bitfld.long 0x00 4. " IntrMask[4] ,Interrupt mask enable pin 4" "Not masked,Masked"
textline " "
bitfld.long 0x00 3. " IntrMask[3] ,Interrupt mask enable pin 3" "Not masked,Masked"
bitfld.long 0x00 2. " IntrMask[2] ,Interrupt mask enable pin 2" "Not masked,Masked"
textline " "
bitfld.long 0x00 1. " IntrMask[1] ,Interrupt mask enable pin 1" "Not masked,Masked"
bitfld.long 0x00 0. " IntrMask[0] ,Interrupt mask enable pin 0" "Not masked,Masked"
wgroup.long 0x30++0x3
line.long 0x00 "IntrClear,GPIO Interrupt Clear"
bitfld.long 0x00 31. " IntrClear[31] ,Interrupt clear pin 31" "No effect,Cleared"
bitfld.long 0x00 30. " IntrClear[30] ,Interrupt clear pin 30" "No effect,Cleared"
textline " "
bitfld.long 0x00 29. " IntrClear[29] ,Interrupt clear pin 29" "No effect,Cleared"
bitfld.long 0x00 28. " IntrClear[n28] ,Interrupt clear pin 28" "No effect,Cleared"
textline " "
bitfld.long 0x00 27. " IntrClear[27] ,Interrupt clear pin 27" "No effect,Cleared"
bitfld.long 0x00 26. " IntrClear[26] ,Interrupt clear pin 26" "No effect,Cleared"
textline " "
bitfld.long 0x00 25. " IntrClear[25] ,Interrupt clear pin 25" "No effect,Cleared"
bitfld.long 0x00 24. " IntrClear[24] ,Interrupt clear pin 24" "No effect,Cleared"
textline " "
bitfld.long 0x00 23. " IntrClear[23] ,Interrupt clear pin 23" "No effect,Cleared"
bitfld.long 0x00 22. " IntrClear[22] ,Interrupt clear pin 22" "No effect,Cleared"
textline " "
bitfld.long 0x00 21. " IntrClear[21] ,Interrupt clear pin 21" "No effect,Cleared"
bitfld.long 0x00 20. " IntrClear[20] ,Interrupt clear pin 20" "No effect,Cleared"
textline " "
bitfld.long 0x00 19. " IntrClear[19] ,Interrupt clear pin 19" "No effect,Cleared"
bitfld.long 0x00 18. " IntrClear[18] ,Interrupt clear pin 18" "No effect,Cleared"
textline " "
bitfld.long 0x00 17. " IntrClear[17] ,Interrupt clear pin 17" "No effect,Cleared"
bitfld.long 0x00 16. " IntrClear[16] ,Interrupt clear pin 16" "No effect,Cleared"
textline " "
bitfld.long 0x00 15. " IntrClear[15] ,Interrupt clear pin 15" "No effect,Cleared"
bitfld.long 0x00 14. " IntrClear[14] ,Interrupt clear pin Pin 14" "No effect,Cleared"
textline " "
bitfld.long 0x00 13. " IntrClear[13] ,Interrupt clear pin 13" "No effect,Cleared"
bitfld.long 0x00 12. " IntrClear[12] ,Interrupt clear pin 12" "No effect,Cleared"
textline " "
bitfld.long 0x00 11. " IntrClear[11] ,Interrupt clear pin 11" "No effect,Cleared"
bitfld.long 0x00 10. " IntrClear[10] ,Interrupt clear pin 10" "No effect,Cleared"
textline " "
bitfld.long 0x00 9. " IntrClear[9] ,Interrupt clear pin 9" "No effect,Cleared"
bitfld.long 0x00 8. " IntrClear[8] ,Interrupt clear pin 8" "No effect,Cleared"
textline " "
bitfld.long 0x00 7. " IntrClear[7] ,Interrupt clear pin 7" "No effect,Cleared"
bitfld.long 0x00 6. " IntrClear[6] ,Interrupt clear pin 6" "No effect,Cleared"
textline " "
bitfld.long 0x00 5. " IntrClear[5] ,Interrupt clear pin 5" "No effect,Cleared"
bitfld.long 0x00 4. " IntrClear[4] ,Interrupt clear pin 4" "No effect,Cleared"
textline " "
bitfld.long 0x00 3. " IntrClear[3] ,Interrupt clear pin 3" "No effect,Cleared"
bitfld.long 0x00 2. " IntrClear[2] ,Interrupt clear pin 2" "No effect,Cleared"
textline " "
bitfld.long 0x00 1. " IntrClear[1] ,Interrupt clear pin 1" "No effect,Cleared"
bitfld.long 0x00 0. " IntrClear[0] ,Interrupt clear pin 0" "No effect,Cleared"
group.long 0x34++0x13
line.long 0x00 "IntrTrigger,GPIO Interrupt Trigger Method Register"
bitfld.long 0x00 31. " IntrTrigger[31] ,Interrupt trigger method pin 31" "Edge,Level"
bitfld.long 0x00 30. " IntrTrigger[30] ,Interrupt trigger method pin 30" "Edge,Level"
textline " "
bitfld.long 0x00 29. " IntrTrigger[29] ,Interrupt trigger method pin 29" "Edge,Level"
bitfld.long 0x00 28. " IntrTrigger[28] ,Interrupt trigger method pin 28" "Edge,Level"
textline " "
bitfld.long 0x00 27. " IntrTrigger[27] ,Interrupt trigger method pin 27" "Edge,Level"
bitfld.long 0x00 26. " IntrTrigger[26] ,Interrupt trigger method pin 26" "Edge,Level"
textline " "
bitfld.long 0x00 25. " IntrTrigger[25] ,Interrupt trigger method pin 25" "Edge,Level"
bitfld.long 0x00 24. " IntrTrigger[24] ,Interrupt trigger method pin 24" "Edge,Level"
textline " "
bitfld.long 0x00 23. " IntrTrigger[23] ,Interrupt trigger method pin 23" "Edge,Level"
bitfld.long 0x00 22. " IntrTrigger[22] ,Interrupt trigger method pin 22" "Edge,Level"
textline " "
bitfld.long 0x00 21. " IntrTrigger[21] ,Interrupt trigger method pin 21" "Edge,Level"
bitfld.long 0x00 20. " IntrTrigger[20] ,Interrupt trigger method pin 20" "Edge,Level"
textline " "
bitfld.long 0x00 19. " IntrTrigger[19] ,Interrupt trigger method pin 19" "Edge,Level"
bitfld.long 0x00 18. " IntrTrigger[18] ,Interrupt trigger method pin 18" "Edge,Level"
textline " "
bitfld.long 0x00 17. " IntrTrigger[17] ,Interrupt trigger method pin 17" "Edge,Level"
bitfld.long 0x00 16. " IntrTrigger[16] ,Interrupt trigger method pin 16" "Edge,Level"
textline " "
bitfld.long 0x00 15. " IntrTrigger[15] ,Interrupt trigger method pin 15" "Edge,Level"
bitfld.long 0x00 14. " IntrTrigger[14] ,Interrupt trigger method pin 14" "Edge,Level"
textline " "
bitfld.long 0x00 13. " IntrTrigger[13] ,Interrupt trigger method pin 13" "Edge,Level"
bitfld.long 0x00 12. " IntrTrigger[12] ,Interrupt trigger method pin 12" "Edge,Level"
textline " "
bitfld.long 0x00 11. " IntrTrigger[11] ,Interrupt trigger method pin 11" "Edge,Level"
bitfld.long 0x00 10. " IntrTrigger[10] ,Interrupt trigger method pin 10" "Edge,Level"
textline " "
bitfld.long 0x00 9. " IntrTrigger[9] ,Interrupt trigger method pin 9" "Edge,Level"
bitfld.long 0x00 8. " IntrTrigger[8] ,Interrupt trigger method pin 8" "Edge,Level"
textline " "
bitfld.long 0x00 7. " IntrTrigger[7] ,Interrupt trigger method pin 7" "Edge,Level"
bitfld.long 0x00 6. " IntrTrigger[6] ,Interrupt trigger method pin 6" "Edge,Level"
textline " "
bitfld.long 0x00 5. " IntrTrigger[5] ,Interrupt trigger method pin 5" "Edge,Level"
bitfld.long 0x00 4. " IntrTrigger[4] ,Interrupt trigger method pin 4" "Edge,Level"
textline " "
bitfld.long 0x00 3. " IntrTrigger[3] ,Interrupt trigger method pin 3" "Edge,Level"
bitfld.long 0x00 2. " IntrTrigger[2] ,Interrupt trigger method pin 2" "Edge,Level"
textline " "
bitfld.long 0x00 1. " IntrTrigger[1] ,Interrupt trigger method pin 1" "Edge,Level"
bitfld.long 0x00 0. " IntrTrigger[0] ,Interrupt trigger method pin 0" "Edge,Level"
line.long 0x04 "IntrBoth,GPIO Interrupt Edge Triggered by Single or Both Edges Register"
bitfld.long 0x04 31. " IntrBoth[31] ,Interrupt edge trigger pin 31" "Single edge,Both edges"
bitfld.long 0x04 30. " IntrBoth[30] ,Interrupt edge trigger pin 30" "Single edge,Both edges"
textline " "
bitfld.long 0x04 29. " IntrBoth[29] ,Interrupt edge trigger pin 29" "Single edge,Both edges"
bitfld.long 0x04 28. " IntrBoth[28] ,Interrupt edge trigger pin 28" "Single edge,Both edges"
textline " "
bitfld.long 0x04 27. " IntrBoth[27] ,Interrupt edge trigger pin 27" "Single edge,Both edges"
bitfld.long 0x04 26. " IntrBoth[26] ,Interrupt edge trigger pin 26" "Single edge,Both edges"
textline " "
bitfld.long 0x04 25. " IntrBoth[25] ,Interrupt edge trigger pin 25" "Single edge,Both edges"
bitfld.long 0x04 24. " IntrBoth[24] ,Interrupt edge trigger pin 24" "Single edge,Both edges"
textline " "
bitfld.long 0x04 23. " IntrBoth[23] ,Interrupt edge trigger pin 23" "Single edge,Both edges"
bitfld.long 0x04 22. " IntrBoth[22] ,Interrupt edge trigger pin 22" "Single edge,Both edges"
textline " "
bitfld.long 0x04 21. " IntrBoth[21] ,Interrupt edge trigger pin 21" "Single edge,Both edges"
bitfld.long 0x04 20. " IntrBoth[20] ,Interrupt edge trigger pin 20" "Single edge,Both edges"
textline " "
bitfld.long 0x04 19. " IntrBoth[19] ,Interrupt edge trigger pin 19" "Single edge,Both edges"
bitfld.long 0x04 18. " IntrBoth[18] ,Interrupt edge trigger pin 18" "Single edge,Both edges"
textline " "
bitfld.long 0x04 17. " IntrBoth[17] ,Interrupt edge trigger pin 17" "Single edge,Both edges"
bitfld.long 0x04 16. " IntrBoth[16] ,Interrupt edge trigger pin 16" "Single edge,Both edges"
textline " "
bitfld.long 0x04 15. " IntrBoth[15] ,Interrupt edge trigger pin 15" "Single edge,Both edges"
bitfld.long 0x04 14. " IntrBoth[14] ,Interrupt edge trigger pin 14" "Single edge,Both edges"
textline " "
bitfld.long 0x04 13. " IntrBoth[13] ,Interrupt edge trigger pin 13" "Single edge,Both edges"
bitfld.long 0x04 12. " IntrBoth[12] ,Interrupt edge trigger pin 12" "Single edge,Both edges"
textline " "
bitfld.long 0x04 11. " IntrBoth[11] ,Interrupt edge trigger pin 11" "Single edge,Both edges"
bitfld.long 0x04 10. " IntrBoth[10] ,Interrupt edge trigger pin 10" "Single edge,Both edges"
textline " "
bitfld.long 0x04 9. " IntrBoth[9] ,Interrupt edge trigger pin 9" "Single edge,Both edges"
bitfld.long 0x04 8. " IntrBoth[8] ,Interrupt edge trigger pin 8" "Single edge,Both edges"
textline " "
bitfld.long 0x04 7. " IntrBoth[7] ,Interrupt edge trigger pin 7" "Single edge,Both edges"
bitfld.long 0x04 6. " IntrBoth[6] ,Interrupt edge trigger pin 6" "Single edge,Both edges"
textline " "
bitfld.long 0x04 5. " IntrBoth[5] ,Interrupt edge trigger pin 5" "Single edge,Both edges"
bitfld.long 0x04 4. " IntrBoth[4] ,Interrupt edge trigger pin 4" "Single edge,Both edges"
textline " "
bitfld.long 0x04 3. " IntrBoth[3] ,Interrupt edge trigger pin 3" "Single edge,Both edges"
bitfld.long 0x04 2. " IntrBoth[2] ,Interrupt edge trigger pin 2" "Single edge,Both edges"
textline " "
bitfld.long 0x04 1. " IntrBoth[1] ,Interrupt edge trigger pin 1" "Single edge,Both edges"
bitfld.long 0x04 0. " IntrBoth[0] ,Interrupt edge trigger pin 0" "Single edge,Both edges"
line.long 0x08 "IntrRiseNeg,GPIO Interrupt Trigger Register"
bitfld.long 0x08 31. " IntrRiseNeg[31] ,Interrupt trigger pin 31" "Rising/High,Falling/Low"
bitfld.long 0x08 30. " IntrRiseNeg[30] ,Interrupt trigger pin 30" "Rising/High,Falling/Low"
textline " "
bitfld.long 0x08 29. " IntrRiseNeg[29] ,Interrupt trigger pin 29" "Rising/High,Falling/Low"
bitfld.long 0x08 28. " IntrRiseNeg[28] ,Interrupt trigger pin 28" "Rising/High,Falling/Low"
textline " "
bitfld.long 0x08 27. " IntrRiseNeg[27] ,Interrupt trigger pin 27" "Rising/High,Falling/Low"
bitfld.long 0x08 26. " IntrRiseNeg[26] ,Interrupt trigger pin 26" "Rising/High,Falling/Low"
textline " "
bitfld.long 0x08 25. " IntrRiseNeg[25] ,Interrupt trigger pin 25" "Rising/High,Falling/Low"
bitfld.long 0x08 24. " IntrRiseNeg[24] ,Interrupt trigger pin 24" "Rising/High,Falling/Low"
textline " "
bitfld.long 0x08 23. " IntrRiseNeg[23] ,Interrupt trigger pin 23" "Rising/High,Falling/Low"
bitfld.long 0x08 22. " IntrRiseNeg[22] ,Interrupt trigger pin 22" "Rising/High,Falling/Low"
textline " "
bitfld.long 0x08 21. " IntrRiseNeg[21] ,Interrupt trigger pin 21" "Rising/High,Falling/Low"
bitfld.long 0x08 20. " IntrRiseNeg[20] ,Interrupt trigger pin 20" "Rising/High,Falling/Low"
textline " "
bitfld.long 0x08 19. " IntrRiseNeg[19] ,Interrupt trigger pin 19" "Rising/High,Falling/Low"
bitfld.long 0x08 18. " IntrRiseNeg[18] ,Interrupt trigger pin 18" "Rising/High,Falling/Low"
textline " "
bitfld.long 0x08 17. " IntrRiseNeg[17] ,Interrupt trigger pin 17" "Rising/High,Falling/Low"
bitfld.long 0x08 16. " IntrRiseNeg[16] ,Interrupt trigger pin 16" "Rising/High,Falling/Low"
textline " "
bitfld.long 0x08 15. " IntrRiseNeg[15] ,Interrupt trigger pin 15" "Rising/High,Falling/Low"
bitfld.long 0x08 14. " IntrRiseNeg[14] ,Interrupt trigger pin 14" "Rising/High,Falling/Low"
textline " "
bitfld.long 0x08 13. " IntrRiseNeg[13] ,Interrupt trigger pin 13" "Rising/High,Falling/Low"
bitfld.long 0x08 12. " IntrRiseNeg[12] ,Interrupt trigger pin 12" "Rising/High,Falling/Low"
textline " "
bitfld.long 0x08 11. " IntrRiseNeg[11] ,Interrupt trigger pin 11" "Rising/High,Falling/Low"
bitfld.long 0x08 10. " IntrRiseNeg[10] ,Interrupt trigger pin 10" "Rising/High,Falling/Low"
textline " "
bitfld.long 0x08 9. " IntrRiseNeg[9] ,Interrupt trigger pin 9" "Rising/High,Falling/Low"
bitfld.long 0x08 8. " IntrRiseNeg[8] ,Interrupt trigger pin 8" "Rising/High,Falling/Low"
textline " "
bitfld.long 0x08 7. " IntrRiseNeg[7] ,Interrupt trigger pin 7" "Rising/High,Falling/Low"
bitfld.long 0x08 6. " IntrRiseNeg[6] ,Interrupt trigger pin 6" "Rising/High,Falling/Low"
textline " "
bitfld.long 0x08 5. " IntrRiseNeg[5] ,Interrupt trigger pin 5" "Rising/High,Falling/Low"
bitfld.long 0x08 4. " IntrRiseNeg[4] ,Interrupt trigger pin 4" "Rising/High,Falling/Low"
textline " "
bitfld.long 0x08 3. " IntrRiseNeg[3] ,Interrupt trigger pin 3" "Rising/High,Falling/Low"
bitfld.long 0x08 2. " IntrRiseNeg[2] ,Interrupt trigger pin 2" "Rising/High,Falling/Low"
textline " "
bitfld.long 0x08 1. " IntrRiseNeg[1] ,Interrupt trigger pin 1" "Rising/High,Falling/Low"
bitfld.long 0x08 0. " IntrRiseNeg[0] ,Interrupt trigger pin 0" "Rising/High,Falling/Low"
line.long 0x0c "BounceEnable,GPIO Pre-Scale Clock Enable Register"
bitfld.long 0x0c 31. " BounceEnable[31] ,Bounce enable pin 31" "Disabled,Enabled"
bitfld.long 0x0c 30. " BounceEnable[30] ,Bounce enable pin 30" "Disabled,Enabled"
textline " "
bitfld.long 0x0c 29. " BounceEnable[29] ,Bounce enable pin 29" "Disabled,Enabled"
bitfld.long 0x0c 28. " BounceEnable[28] ,Bounce enable pin 28" "Disabled,Enabled"
textline " "
bitfld.long 0x0c 27. " BounceEnable[27] ,Bounce enable pin 27" "Disabled,Enabled"
bitfld.long 0x0c 26. " BounceEnable[26] ,Bounce enable pin 26" "Disabled,Enabled"
textline " "
bitfld.long 0x0c 25. " BounceEnable[25] ,Bounce enable pin 25" "Disabled,Enabled"
bitfld.long 0x0c 24. " BounceEnable[24] ,Bounce enable pin 24" "Disabled,Enabled"
textline " "
bitfld.long 0x0c 23. " BounceEnable[23] ,Bounce enable pin 23" "Disabled,Enabled"
bitfld.long 0x0c 22. " BounceEnable[22] ,Bounce enable pin 22" "Disabled,Enabled"
textline " "
bitfld.long 0x0c 21. " BounceEnable[21] ,Bounce enable pin 21" "Disabled,Enabled"
bitfld.long 0x0c 20. " BounceEnable[20] ,Bounce enable pin 20" "Disabled,Enabled"
textline " "
bitfld.long 0x0c 19. " BounceEnable[19] ,Bounce enable pin 19" "Disabled,Enabled"
bitfld.long 0x0c 18. " BounceEnable[18] ,Bounce enable pin 18" "Disabled,Enabled"
textline " "
bitfld.long 0x0c 17. " BounceEnable[17] ,Bounce enable pin 17" "Disabled,Enabled"
bitfld.long 0x0c 16. " BounceEnable[16] ,Bounce enable pin 16" "Disabled,Enabled"
textline " "
bitfld.long 0x0c 15. " BounceEnable[15] ,Bounce enable pin 15" "Disabled,Enabled"
bitfld.long 0x0c 14. " BounceEnable[14] ,Bounce enable pin 14" "Disabled,Enabled"
textline " "
bitfld.long 0x0c 13. " BounceEnable[13] ,Bounce enable pin 13" "Disabled,Enabled"
bitfld.long 0x0c 12. " BounceEnable[12] ,Bounce enable pin 12" "Disabled,Enabled"
textline " "
bitfld.long 0x0c 11. " BounceEnable[11] ,Bounce enable pin 11" "Disabled,Enabled"
bitfld.long 0x0c 10. " BounceEnable[10] ,Bounce enable pin 10" "Disabled,Enabled"
textline " "
bitfld.long 0x0c 9. " BounceEnable[9] ,Bounce enable pin 9" "Disabled,Enabled"
bitfld.long 0x0c 8. " BounceEnable[8] ,Bounce enable pin 8" "Disabled,Enabled"
textline " "
bitfld.long 0x0c 7. " BounceEnable[7] ,Bounce enable pin 7" "Disabled,Enabled"
bitfld.long 0x0c 6. " BounceEnable[6] ,Bounce enable pin 6" "Disabled,Enabled"
textline " "
bitfld.long 0x0c 5. " BounceEnable[5] ,Bounce enable pin 5" "Disabled,Enabled"
bitfld.long 0x0c 4. " BounceEnable[4] ,Bounce enable pin 4" "Disabled,Enabled"
textline " "
bitfld.long 0x0c 3. " BounceEnable[3] ,Bounce enable pin 3" "Disabled,Enabled"
bitfld.long 0x0c 2. " BounceEnable[2] ,Bounce enable pin 2" "Disabled,Enabled"
textline " "
bitfld.long 0x0c 1. " BounceEnable[1] ,Bounce enable pin 1" "Disabled,Enabled"
bitfld.long 0x0c 0. " BounceEnable[0] ,Bounce enable pin 0" "Disabled,Enabled"
line.long 0x10 "BouncePreScale,GPIO Pre-scale Register"
hexmask.long 0x10 0.--23. 1. " BouncePreScale ,Auto-reload register dedicated for the bounce timer"
width 11.
tree.end
tree "Timer"
base ad:0x98400000
width 11.
group.long 0x0++0xf "Timer 1"
line.long 0x00 "Tm1Counter,Timer 1 Counter"
line.long 0x04 "Tm1Load,Timer 1 Load"
line.long 0x08 "Tm1Match1,Timer 1 Match 1"
line.long 0x0c "Tm1Match2,Timer 1 Match 2"
group.long 0x10++0xf "Timer 2"
line.long 0x00 "Tm2Counter,Timer 2 Counter"
line.long 0x04 "Tm2Load,Timer 2 Load"
line.long 0x08 "Tm2Match1,Timer 2 Match 1"
line.long 0x0c "Tm2Match2,Timer 2 Match 2"
group.long 0x20++0xf "Timer 3"
line.long 0x00 "Tm3Counter,Timer 3 Counter"
line.long 0x04 "Tm3Load,Timer 3 Load"
line.long 0x08 "Tm3Match1,Timer 3 Match 1"
line.long 0x0c "Tm3Match2,Timer 3 Match 2"
group.long 0x30++0xb "Timers Control Registers"
line.long 0x00 "TmCR,Timer Control Register"
bitfld.long 0x00 11. " Tm3UpDown ,Timer3 up or down count" "Down,Up"
bitfld.long 0x00 10. " Tm2UpDown ,Timer2 up or down count" "Down,Up"
textline " "
bitfld.long 0x00 9. " Tm1UpDown ,Timer1 up or down count" "Down,Up"
bitfld.long 0x00 8. " Tm3OFEnable ,Timer3 overflow interrupt enable bit" "Disabled,Enabled"
textline " "
bitfld.long 0x00 7. " Tm3Clock ,Timer3 clock source" "PCLK,EXT3CLK"
bitfld.long 0x00 6. " Tm3Enable ,Timer3 enable bit" "Disabled,Enabled"
textline " "
bitfld.long 0x00 5. " Tm2OFEnable ,Timer2 overflow interrupt enable bit" "Disabled,Enabled"
bitfld.long 0x00 4. " Tm2Clock ,Timer2 clock source" "PCLK,EXT2CLK"
textline " "
bitfld.long 0x00 3. " Tm2Enable ,Timer2 enable bit" "Disabled,Enabled"
bitfld.long 0x00 2. " Tm1OFEnable ,Timer1 overflow interrupt enable bit" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " Tm1Clock ,Timer1 clock source" "PCLK,EXT1CLK"
bitfld.long 0x00 0. " Tm1Enable ,Timer1 enable bit" "Disabled,Enabled"
line.long 0x04 "IntrState,Interrupt State Register"
bitfld.long 0x04 8. " Tm3Overflow ,Tm3Overflow interrupt" "No effect,Interrupt"
bitfld.long 0x04 7. " Tm3Match2 ,Tm3Match2 interrupt" "No effect,Interrupt"
textline " "
bitfld.long 0x04 6. " Tm3Match1 ,Tm3Match1 interrupt" "No effect,Interrupt"
bitfld.long 0x04 5. " Tm2Overflow ,Tm2Overflow interrupt" "No effect,Interrupt"
textline " "
bitfld.long 0x04 4. " Tm2Match2 ,Tm2Match2 interrupt" "No effect,Interrupt"
bitfld.long 0x04 3. " Tm2Match1 ,Tm2Match1 interrupt" "No effect,Interrupt"
textline " "
bitfld.long 0x04 2. " Tm1Overflow ,Tm1Overflow interrupt" "No effect,Interrupt"
bitfld.long 0x04 1. " Tm1Match2 ,Tm1Match2 interrupt" "No effect,Interrupt"
textline " "
bitfld.long 0x04 0. " Tm1Match1 ,Tm1Match1 interrupt" "No effect,Interrupt"
line.long 0x08 "IntrMask,Interrupt Mask Register"
bitfld.long 0x08 8. " MTm3Overflow ,Mask Tm3Overflow interrupt" "No effect,Masked"
bitfld.long 0x08 7. " MTm3Match2 ,Mask Tm3Match2 interrupt" "No effect,Masked"
textline " "
bitfld.long 0x08 6. " MTm3Match1 ,Mask Tm3Match1 interrupt" "No effect,Masked"
bitfld.long 0x08 5. " MTm2Overflow ,Mask Tm2Overflow interrupt" "No effect,Masked"
textline " "
bitfld.long 0x08 4. " MTm2Match2 ,Mask Tm2Match2 interrupt" "No effect,Masked"
bitfld.long 0x08 3. " MTm2Match1 ,Mask Tm2Match1 interrupt" "No effect,Masked"
textline " "
bitfld.long 0x08 2. " MTm1Overflow ,Mask Tm1Overflow interrupt" "No effect,Masked"
bitfld.long 0x08 1. " MTm1Match2 ,Mask Tm1Match2 interrupt" "No effect,Masked"
textline " "
bitfld.long 0x08 0. " MTm1Match1 ,Mask Tm1Match1 interrupt" "No effect,Masked"
width 11.
tree.end
tree "Watch Dog Timer"
base ad:0x98500000
width 13.
rgroup.long 0x00++0x3
line.long 0x00 "WdCounter,WdCounter Register"
group.long 0x04++0x3
line.long 0x00 "WdLoad,WdLoad Register"
wgroup.long 0x08++0x3
line.long 0x00 "WdRestart,WdRestart Register"
hexmask.long.word 0x00 0.--15. 1. " WdRestart ,WdRestart Register"
group.long 0x0c++0x3
line.long 0x00 "WdCR,WdCR Register"
bitfld.long 0x00 4. " WdClock ,Watch Dog timer clock source" "Disabled,Enabled"
bitfld.long 0x00 3. " WdExt ,Watch Dog timer external signal enable bit" "Disabled,Enabled"
textline " "
bitfld.long 0x00 2. " WdIntr ,Watch Dog timer system interrupt enable bit" "Disabled,Enabled"
bitfld.long 0x00 1. " WdRst ,Watch Dog timer system reset enable bit" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " WdEnable ,Watch Dog timer enable bit" "Disabled,Enabled"
rgroup.long 0x10++0x3
line.long 0x00 "WdStatus,WdStatus Register"
bitfld.long 0x00 1. " WdStatus ,WdStatus" "Not reached,Reached"
wgroup.long 0x14++0x3
line.long 0x00 "WdClear,WdClear Register"
bitfld.long 0x00 1. " WdClear ,WdClear" "No effect,Cleared"
group.long 0x18++0x3
line.long 0x00 "WdIntrCter,WdIntrCter Register"
hexmask.long.word 0x00 0.--15. 1. " WdIntrCter ,Duration of wd_rst, wd_intr, and wd_ext signals"
width 11.
tree.end
tree "Real Time Clock"
base ad:0x98600000
width 13.
rgroup.long 0x00++0xf
line.long 0x00 "RtcSecond,RtcSecond Register"
bitfld.long 0x00 0.--5. " RtcSecond ,RTC second-counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,-,-,-"
line.long 0x04 "RtcMinute,RtcMinute Register"
bitfld.long 0x04 0.--5. " RtcMinute ,RTC minute-counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,-,-,-"
line.long 0x08 "RtcHour,RtcHour Register"
bitfld.long 0x08 0.--4. " RtcHour ,RtcHour Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,-,-,-"
line.long 0x0c "RtcDay,RtcDay Register"
hexmask.long.word 0x0c 0.--15. 1. " RtcDay ,RTC day-counter"
group.long 0x10++0x2b
line.long 0x00 "AlarmSecond,AlarmSecond Register"
bitfld.long 0x00 0.--5. " AlarmSecond ,RTC second-alarm" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,-,-,-"
line.long 0x04 "AlarmMinute,AlarmMinute Register"
bitfld.long 0x04 0.--5. " AlarmMinute ,RTC minute-alarm" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,-,-,-"
line.long 0x08 "AlarmHour,AlarmHour Register"
bitfld.long 0x08 0.--5. " AlarmHour ,RTC hour-alarm" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
line.long 0x0c "RtcRecord,RtcRecord Register"
line.long 0x10 "RtcCR,RTC Control Register"
bitfld.long 0x10 6. " RTCCL ,RTC counter load" "Disabled,Load"
bitfld.long 0x10 5. " RTCAInt ,RTC alarm interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x10 4. " RTCIntDay ,RTC interrupt per day" "Disabled,Enabled"
bitfld.long 0x10 3. " RTCIntHour ,RTC interrupt per hour" "Disabled,Enabled"
textline " "
bitfld.long 0x10 2. " RTCIntMin ,RTC interrupt per minute" "Disabled,Enabled"
bitfld.long 0x10 1. " RTCIntSec ,RTC interrupt per second" "Disabled,Enabled"
textline " "
bitfld.long 0x10 0. " RTCEn ,RTC interrupt enable" "Disabled,Enabled"
line.long 0x14 "WRtcSecond,WRtcSecond Register"
bitfld.long 0x14 6. " WRtcSecond ,Port to write RtcSecond counter" "0,1"
line.long 0x18 "WRtcMinute,WRtcMinute Register"
bitfld.long 0x18 6. " WRtcMinute ,Port to write the RtcMinute counter" "0,1"
line.long 0x1c "WRtcHour,WRtcHour Register"
bitfld.long 0x1c 5. " WRtcHour ,Port to write the RtcHour counter" "0,1"
line.long 0x20 "WRtcDay,WRtcDay Register"
bitfld.long 0x20 16. " WRtcDay ,Port to write the RtcDays counter" "0,1"
line.long 0x24 "IntrState,IntrState Register"
bitfld.long 0x24 4. " rtc_alarm ,rtc_alarm interrupt" "No interrupt,Interrupt"
bitfld.long 0x24 3. " rtc_day ,rtc_day interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x24 2. " rtc_hour ,rtc_hour interrupt" "No interrupt,Interrupt"
bitfld.long 0x24 1. " rtc_min ,rtc_min interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x24 0. " rtc_sec ,rtc_sec interrupt" "No interrupt,Interrupt"
line.long 0x28 "RtcDivide,RtcDivide"
bitfld.long 0x28 31. " DividerEnable ,Enable bit" "Disabled,Enabled"
hexmask.long 0x28 0.--30. 1. " DividerCycle ,Cycle number divide"
rgroup.long 0x3c++0x3
line.long 0x00 "RtcRevision,RTC revision register"
width 11.
tree.end
tree "Interrupt Controller"
base ad:0x98800000
width 11.
rgroup.long 0x00++0x3
line.long 0x00 "IRQSR,IRQ Source Register"
bitfld.long 0x00 30. " Irqsrcreg[30] ,Status of the GPIO interrupt" "Not asserted,Asserted"
bitfld.long 0x00 29. " Irqsrcreg[29] ,Status of I2C(6) interrupt" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 25. " Irqsrcreg[25] ,Status of the external interrupt (X_EXT_INT3)" "Not asserted,Asserted"
bitfld.long 0x00 24. " Irqsrcreg[24] ,Status of the external interrupt (X_EXT_INT2)" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 23. " Irqsrcreg[23] ,Status of the external interrupt (X_EXT_INT1)" "Not asserted,Asserted"
bitfld.long 0x00 22. " Irqsrcreg[22] ,Status of the external interrupt (X_EXT_INT0)" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 21. " Irqsrcreg[21] ,Status of the AES interrupt" "Not asserted,Asserted"
bitfld.long 0x00 20. " Irqsrcreg[20] ,Status of the I2C(2) interrupt" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 19. " Irqsrcreg[19] ,Status of the MAC(1) interrupt" "Not asserted,Asserted"
bitfld.long 0x00 18. " Irqsrcreg[18] ,USBD 2.0 suspend mode" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 17. " Irqsrcreg[17] ,USBD 2.0 occurrence of interrupts" "Not asserted,Asserted"
bitfld.long 0x00 16. " Irqsrcreg[16] ,Status of the WDT interrupt" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 15. " Irqsrcreg[15] ,Status of the I2C(3) interrupt" "Not asserted,Asserted"
bitfld.long 0x00 14. " Irqsrcreg[14] ,Status of the TIMER interrupt" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 12. " Irqsrcreg[12] ,Status of the RTC interrupt" "Not asserted,Asserted"
bitfld.long 0x00 11. " Irqsrcreg[11] ,Status of the I2C(5) interrupt" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 10. " Irqsrcreg[10] ,Status of the UART1 interrupt" "Not asserted,Asserted"
bitfld.long 0x00 9. " Irqsrcreg[9] ,Status of the I2C(4) interrupt" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 8. " Irqsrcreg[8] ,Status of the PMU interrupt" "Not asserted,Asserted"
bitfld.long 0x00 7. " Irqsrcreg[7] ,Status of the UART3 interrupt" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 6. " Irqsrcreg[6] ,Status of the SSP controller interrupt" "Not asserted,Asserted"
bitfld.long 0x00 5. " Irqsrcreg[5] ,Status of the OTG interrupt" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 3. " Irqsrcreg[3] ,Status of the I2C(1) interrupt" "Not asserted,Asserted"
bitfld.long 0x00 2. " Irqsrcreg[2] ,Status of the bridge interrupt" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 1. " Irqsrcreg[1] ,Status of the DMAC interrupt" "Not asserted,Asserted"
bitfld.long 0x00 0. " Irqsrcreg[0] ,Status of the AHB controller interrupt" "Not asserted,Asserted"
group.long 0x04++0x3
line.long 0x00 "IRQER,IRQ Enable Register"
bitfld.long 0x00 30. " enIRQint[30] ,Enable GPIO interrupt" "Disabled,Enabled"
bitfld.long 0x00 29. " enIRQint[29] ,I2C(6) interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 25. " enIRQint[25] ,Enable external interrupt (X_EXT_INT3)" "Disabled,Enabled"
bitfld.long 0x00 24. " enIRQint[24] ,Enable external interrupt (X_EXT_INT2)" "Disabled,Enabled"
textline " "
bitfld.long 0x00 23. " enIRQint[23] ,Enable external interrupt (X_EXT_INT1)" "Disabled,Enabled"
bitfld.long 0x00 22. " enIRQint[22] ,Enable external interrupt (X_EXT_INT0)" "Disabled,Enabled"
textline " "
bitfld.long 0x00 21. " enIRQint[21] ,Enable AES interrupt" "Disabled,Enabled"
bitfld.long 0x00 20. " enIRQint[20] ,Enable I2C(2) interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 19. " enIRQint[19] ,Enable MAC(1) interrupt" "Disabled,Enabled"
bitfld.long 0x00 18. " enIRQint[18] ,USBD 2.0 suspend mode" "Disabled,Enabled"
textline " "
bitfld.long 0x00 17. " enIRQint[17] ,USBD 2.0 occurrence of interrupts" "Disabled,Enabled"
bitfld.long 0x00 16. " enIRQint[16] ,Enable WDT interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 15. " enIRQint[15] ,Enable I2C(3) interrupt" "Disabled,Enabled"
bitfld.long 0x00 14. " enIRQint[14] ,Enable TIMER interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 12. " enIRQint[12] ,Enable RTC interrupt" "Disabled,Enabled"
bitfld.long 0x00 11. " enIRQint[11] ,Enable I2C(5) interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 10. " enIRQint[10] ,Enable UART1 interrupt" "Disabled,Enabled"
bitfld.long 0x00 9. " enIRQint[9] ,Enable I2C(4) interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 8. " enIRQint[8] ,Enable PMU interrupt" "Disabled,Enabled"
bitfld.long 0x00 7. " enIRQint[7] ,Enable UART3 interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 6. " enIRQint[6] ,Enable SSP controller interrupt" "Disabled,Enabled"
bitfld.long 0x00 5. " enIRQint[5] ,Enable OTG interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 3. " enIRQint[3] ,Enable I2C(1) interrupt" "Disabled,Enabled"
bitfld.long 0x00 2. " enIRQint[2] ,Enable bridge interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " enIRQint[1] ,Enable DMAC interrupt" "Disabled,Enabled"
bitfld.long 0x00 0. " enIRQint[0] ,Enable AHB controller interrupt" "Disabled,Enabled"
wgroup.long 0x08++0x3
line.long 0x00 "IRQICR,IRQ Interrupt Clear Register"
bitfld.long 0x00 30. " irqclear[30] ,GPIO interrupt clear" "No effect,Cleared"
bitfld.long 0x00 29. " irqclear[29] ,I2C(6) interrupt clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 25. " irqclear[25] ,External interrupt (X_EXT_INT3) clear" "No effect,Cleared"
bitfld.long 0x00 24. " irqclear[24] ,External interrupt (X_EXT_INT2) clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 23. " irqclear[23] ,External interrupt (X_EXT_INT1) clear" "No effect,Cleared"
bitfld.long 0x00 22. " irqclear[22] ,External interrupt (X_EXT_INT0) clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 21. " irqclear[21] ,AES interrupt clear" "No effect,Cleared"
bitfld.long 0x00 20. " irqclear[20] ,I2C(2) interrupt clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 19. " irqclear[19] ,MAC(1) interrupt clear" "No effect,Cleared"
bitfld.long 0x00 18. " irqclear[18] ,USBD 2.0 suspend mode" "No effect,Cleared"
textline " "
bitfld.long 0x00 17. " irqclear[17] ,USBD 2.0 occurrence of interrupts" "No effect,Cleared"
bitfld.long 0x00 16. " irqclear[16] ,WDT interrupt clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 15. " irqclear[15] ,I2C(3) interrupt clear" "No effect,Cleared"
bitfld.long 0x00 14. " irqclear[14] ,TIMER interrupt clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 12. " irqclear[12] ,RTC interrupt clear" "No effect,Cleared"
bitfld.long 0x00 11. " irqclear[11] ,I2C(5) interrupt clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 10. " irqclear[10] ,UART1 interrupt clear" "No effect,Cleared"
bitfld.long 0x00 9. " irqclear[9] ,I2C(4) interrupt clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 8. " irqclear[8] ,PMU interrupt clear" "No effect,Cleared"
bitfld.long 0x00 7. " irqclear[7] ,UART3 interrupt clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 6. " irqclear[6] ,SSP controller interrupt clear" "No effect,Cleared"
bitfld.long 0x00 5. " irqclear[5] ,OTG interrupt clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 3. " irqclear[3] ,I2C(1) interrupt clear" "No effect,Cleared"
bitfld.long 0x00 2. " irqclear[2] ,Bridge interrupt clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 1. " irqclear[1] ,DMAC interrupt clear" "No effect,Cleared"
bitfld.long 0x00 0. " irqclear[0] ,AHB controller interrupt clear" "No effect,Cleared"
group.long 0x0c++0x7
line.long 0x00 "IRQTMR,IRQ Trigger Mode Register"
bitfld.long 0x00 30. " irqtrigmode[30] ,GPIO interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 29. " irqtrigmode[29] ,I2C(6) interrupt trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 25. " irqtrigmode[25] ,External interrupt (X_EXT_INT3) trigger mode" "Level,Edge"
bitfld.long 0x00 24. " irqtrigmode[24] ,External interrupt (X_EXT_INT2) trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 23. " irqtrigmode[23] ,External interrupt (X_EXT_INT1) trigger mode" "Level,Edge"
bitfld.long 0x00 22. " irqtrigmode[22] ,External interrupt (X_EXT_INT0) trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 21. " irqtrigmode[21] ,AES interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 20. " irqtrigmode[20] ,I2C(2) interrupt trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 19. " irqtrigmode[19] ,MAC(1) interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 18. " irqtrigmode[18] ,USBD 2.0 suspend mode" "Level,Edge"
textline " "
bitfld.long 0x00 17. " irqtrigmode[17] ,USBD 2.0 occurrence of interrupts" "Level,Edge"
bitfld.long 0x00 16. " irqtrigmode[16] ,WDT interrupt trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 15. " irqtrigmode[15] ,I2C(3) interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 14. " irqtrigmode[14] ,TIMER interrupt trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 12. " irqtrigmode[12] ,RTC interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 11. " irqtrigmode[11] ,I2C(5) interrupt trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 10. " irqtrigmode[10] ,UART1 interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 9. " irqtrigmode[9] ,I2C(4) interrupt trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 8. " irqtrigmode[8] ,PMU interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 7. " irqtrigmode[7] ,UART3 interrupt trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 6. " irqtrigmode[6] ,SSP controller interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 5. " irqtrigmode[5] ,OTG interrupt trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 3. " irqtrigmode[3] ,I2C(1) interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 2. " irqtrigmode[2] ,Bridge interrupt trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 1. " irqtrigmode[1] ,DMAC interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 0. " irqtrigmode[0] ,AHB controller interrupt trigger mode" "Level,Edge"
line.long 0x04 "IRQTLR,IRQ Trigger Level Register"
bitfld.long 0x04 30. " irqtriglevel[30] ,GPIO interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 29. " irqtriglevel[29] ,I2C(6) interrupt trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 25. " irqtriglevel[25] ,External interrupt (X_EXT_INT3) trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 24. " irqtriglevel[24] ,External interrupt (X_EXT_INT2) trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 23. " irqtriglevel[23] ,External interrupt (X_EXT_INT1) trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 22. " irqtriglevel[22] ,External interrupt (X_EXT_INT0) trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 21. " irqtriglevel[21] ,AES interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 20. " irqtriglevel[20] ,I2C(2) interrupt trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 19. " irqtriglevel[19] ,MAC(1) interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 18. " irqtriglevel[18] ,USBD 2.0 suspend mode" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 17. " irqtriglevel[17] ,USBD 2.0 occurrence of interrupts" "High/Rising,Low/Falling"
bitfld.long 0x04 16. " irqtriglevel[16] ,WDT interrupt trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 15. " irqtriglevel[15] ,I2C(3) interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 14. " irqtriglevel[14] ,TIMER interrupt trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 12. " irqtriglevel[12] ,RTC interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 11. " irqtriglevel[11] ,I2C(5) interrupt trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 10. " irqtriglevel[10] ,UART1 interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 9. " irqtriglevel[9] ,I2C(4) interrupt trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 8. " irqtriglevel[8] ,PMU interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 7. " irqtriglevel[7] ,UART3 interrupt trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 6. " irqtriglevel[6] ,SSP controller interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 5. " irqtriglevel[5] ,OTG interrupt trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 3. " irqtriglevel[3] ,I2C(1) interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 2. " irqtriglevel[2] ,Bridge interrupt trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 1. " irqtriglevel[1] ,DMAC interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 0. " irqtriglevel[0] ,AHB controller interrupt trigger level" "High/Rising,Low/Falling"
rgroup.long 0x14++0x3
line.long 0x00 "IRQSR,IRQ Status Register"
bitfld.long 0x00 30. " irqstatus[30] ,Status of the GPIO interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. " irqstatus[29] ,Status of I2C(6) interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 25. " irqstatus[25] ,Status of the external interrupt (X_EXT_INT3)" "No interrupt,Interrupt"
bitfld.long 0x00 24. " irqstatus[24] ,Status of the external interrupt (X_EXT_INT2)" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 23. " irqstatus[23] ,Status of the external interrupt (X_EXT_INT1)" "No interrupt,Interrupt"
bitfld.long 0x00 22. " irqstatus[22] ,Status of the external interrupt (X_EXT_INT0)" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 21. " irqstatus[21] ,Status of the AES interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. " irqstatus[20] ,Status of the I2C(2) interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 19. " irqstatus[19] ,Status of the MAC(1) interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. " irqstatus[18] ,USBD 2.0 suspend mode" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 17. " irqstatus[17] ,USBD 2.0 occurrence of interrupts" "No interrupt,Interrupt"
bitfld.long 0x00 16. " irqstatus[16] ,Status of the WDT interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 15. " irqstatus[15] ,Status of the I2C(3) interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. " irqstatus[14] ,Status of the TIMER interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 12. " irqstatus[12] ,Status of the RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. " irqstatus[11] ,Status of the I2C(5) interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 10. " irqstatus[10] ,Status of the UART1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. " irqstatus[9] ,Status of the I2C(4) interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 8. " irqstatus[8] ,Status of the PMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. " irqstatus[7] ,Status of the UART3 interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 6. " irqstatus[6] ,Status of the SSP controller interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. " irqstatus[5] ,Status of the OTG interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 3. " irqstatus[3] ,Status of the I2C(1) interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. " irqstatus[2] ,Status of the bridge interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 1. " irqstatus[1] ,Status of the DMAC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. " irqstatus[0] ,Status of the AHB controller interrupt" "No interrupt,Interrupt"
rgroup.long 0x20++0x3
line.long 0x00 "FIQSR,FIQ Source Register"
bitfld.long 0x00 30. " fiqsrcreg[30] ,Status of the GPIO interrupt" "Not asserted,Asserted"
bitfld.long 0x00 29. " fiqsrcreg[29] ,Status of I2C(6) interrupt" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 25. " fiqsrcreg[25] ,Status of the external interrupt (X_EXT_INT3)" "Not asserted,Asserted"
bitfld.long 0x00 24. " fiqsrcreg[24] ,Status of the external interrupt (X_EXT_INT2)" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 23. " fiqsrcreg[23] ,Status of the external interrupt (X_EXT_INT1)" "Not asserted,Asserted"
bitfld.long 0x00 22. " fiqsrcreg[22] ,Status of the external interrupt (X_EXT_INT0)" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 21. " fiqsrcreg[21] ,Status of the AES interrupt" "Not asserted,Asserted"
bitfld.long 0x00 20. " fiqsrcreg[20] ,Status of the I2C(2) interrupt" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 19. " fiqsrcreg[19] ,Status of the MAC(1) interrupt" "Not asserted,Asserted"
bitfld.long 0x00 18. " fiqsrcreg[18] ,USBD 2.0 suspend mode" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 17. " fiqsrcreg[17] ,USBD 2.0 occurrence of interrupts" "Not asserted,Asserted"
bitfld.long 0x00 16. " fiqsrcreg[16] ,Status of the WDT interrupt" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 15. " fiqsrcreg[15] ,Status of the I2C(3) interrupt" "Not asserted,Asserted"
bitfld.long 0x00 14. " fiqsrcreg[14] ,Status of the TIMER interrupt" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 12. " fiqsrcreg[12] ,Status of the RTC interrupt" "Not asserted,Asserted"
bitfld.long 0x00 11. " fiqsrcreg[11] ,Status of the I2C(5) interrupt" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 10. " fiqsrcreg[10] ,Status of the UART1 interrupt" "Not asserted,Asserted"
bitfld.long 0x00 9. " fiqsrcreg[9] ,Status of the I2C(4) interrupt" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 8. " fiqsrcreg[8] ,Status of the PMU interrupt" "Not asserted,Asserted"
bitfld.long 0x00 7. " fiqsrcreg[7] ,Status of the UART3 interrupt" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 6. " fiqsrcreg[6] ,Status of the SSP controller interrupt" "Not asserted,Asserted"
bitfld.long 0x00 5. " fiqsrcreg[5] ,Status of the OTG interrupt" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 3. " fiqsrcreg[3] ,Status of the I2C(1) interrupt" "Not asserted,Asserted"
bitfld.long 0x00 2. " fiqsrcreg[2] ,Status of the bridge interrupt" "Not asserted,Asserted"
textline " "
bitfld.long 0x00 1. " fiqsrcreg[1] ,Status of the DMAC interrupt" "Not asserted,Asserted"
bitfld.long 0x00 0. " fiqsrcreg[0] ,Status of the AHB controller interrupt" "Not asserted,Asserted"
group.long 0x24++0x3
line.long 0x00 "FIQER,FIQ Enable Register"
bitfld.long 0x00 30. " enFIQint[30] ,Enable GPIO interrupt" "Disabled,Enabled"
bitfld.long 0x00 29. " enFIQint[29] ,I2C(6) interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 25. " enFIQint[25] ,Enable external interrupt (X_EXT_INT3)" "Disabled,Enabled"
bitfld.long 0x00 24. " enFIQint[24] ,Enable external interrupt (X_EXT_INT2)" "Disabled,Enabled"
textline " "
bitfld.long 0x00 23. " enFIQint[23] ,Enable external interrupt (X_EXT_INT1)" "Disabled,Enabled"
bitfld.long 0x00 22. " enFIQint[22] ,Enable external interrupt (X_EXT_INT0)" "Disabled,Enabled"
textline " "
bitfld.long 0x00 21. " enFIQint[21] ,Enable AES interrupt" "Disabled,Enabled"
bitfld.long 0x00 20. " enFIQint[20] ,Enable I2C(2) interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 19. " enFIQint[19] ,Enable MAC(1) interrupt" "Disabled,Enabled"
bitfld.long 0x00 18. " enFIQint[18] ,USBD 2.0 suspend mode" "Disabled,Enabled"
textline " "
bitfld.long 0x00 17. " enFIQint[17] ,USBD 2.0 occurrence of interrupts" "Disabled,Enabled"
bitfld.long 0x00 16. " enFIQint[16] ,Enable WDT interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 15. " enFIQint[15] ,Enable I2C(3) interrupt" "Disabled,Enabled"
bitfld.long 0x00 14. " enFIQint[14] ,Enable TIMER interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 12. " enFIQint[12] ,Enable RTC interrupt" "Disabled,Enabled"
bitfld.long 0x00 11. " enFIQint[11] ,Enable I2C(5) interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 10. " enFIQint[10] ,Enable UART1 interrupt" "Disabled,Enabled"
bitfld.long 0x00 9. " enFIQint[9] ,Enable I2C(4) interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 8. " enFIQint[8] ,Enable PMU interrupt" "Disabled,Enabled"
bitfld.long 0x00 7. " enFIQint[7] ,Enable UART3 interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 6. " enFIQint[6] ,Enable SSP controller interrupt" "Disabled,Enabled"
bitfld.long 0x00 5. " enFIQint[5] ,Enable OTG interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 3. " enFIQint[3] ,Enable I2C(1) interrupt" "Disabled,Enabled"
bitfld.long 0x00 2. " enFIQint[2] ,Enable bridge interrupt" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " enFIQint[1] ,Enable DMAC interrupt" "Disabled,Enabled"
bitfld.long 0x00 0. " enFIQint[0] ,Enable AHB controller interrupt" "Disabled,Enabled"
wgroup.long 0x28++0x3
line.long 0x00 "FIQICR,FIQ Interrupt Clear Register"
bitfld.long 0x00 30. " fiqclear[30] ,GPIO interrupt clear" "No effect,Cleared"
bitfld.long 0x00 29. " fiqclear[29] ,I2C(6) interrupt clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 25. " fiqclear[25] ,External interrupt (X_EXT_INT3) clear" "No effect,Cleared"
bitfld.long 0x00 24. " fiqclear[24] ,External interrupt (X_EXT_INT2) clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 23. " fiqclear[23] ,External interrupt (X_EXT_INT1) clear" "No effect,Cleared"
bitfld.long 0x00 22. " fiqclear[22] ,External interrupt (X_EXT_INT0) clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 21. " fiqclear[21] ,AES interrupt clear" "No effect,Cleared"
bitfld.long 0x00 20. " fiqclear[20] ,I2C(2) interrupt clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 19. " fiqclear[19] ,MAC(1) interrupt clear" "No effect,Cleared"
bitfld.long 0x00 18. " fiqclear[18] ,USBD 2.0 suspend mode" "No effect,Cleared"
textline " "
bitfld.long 0x00 17. " fiqclear[17] ,USBD 2.0 occurrence of interrupts" "No effect,Cleared"
bitfld.long 0x00 16. " fiqclear[16] ,WDT interrupt clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 15. " fiqclear[15] ,I2C(3) interrupt clear" "No effect,Cleared"
bitfld.long 0x00 14. " fiqclear[14] ,TIMER interrupt clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 12. " fiqclear[12] ,RTC interrupt clear" "No effect,Cleared"
bitfld.long 0x00 11. " fiqclear[11] ,I2C(5) interrupt clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 10. " fiqclear[10] ,UART1 interrupt clear" "No effect,Cleared"
bitfld.long 0x00 9. " fiqclear[9] ,I2C(4) interrupt clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 8. " fiqclear[8] ,PMU interrupt clear" "No effect,Cleared"
bitfld.long 0x00 7. " fiqclear[7] ,UART3 interrupt clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 6. " fiqclear[6] ,SSP controller interrupt clear" "No effect,Cleared"
bitfld.long 0x00 5. " fiqclear[5] ,OTG interrupt clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 3. " fiqclear[3] ,I2C(1) interrupt clear" "No effect,Cleared"
bitfld.long 0x00 2. " fiqclear[2] ,Bridge interrupt clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 1. " fiqclear[1] ,DMAC interrupt clear" "No effect,Cleared"
bitfld.long 0x00 0. " fiqclear[0] ,AHB controller interrupt clear" "No effect,Cleared"
group.long 0x2c++0x7
line.long 0x00 "FIQTMR,Trigger Mode Register"
bitfld.long 0x00 30. " fiqtrigmode[30] ,GPIO interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 29. " fiqtrigmode[29] ,I2C(6) interrupt trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 25. " fiqtrigmode[25] ,External interrupt (X_EXT_INT3) trigger mode" "Level,Edge"
bitfld.long 0x00 24. " fiqtrigmode[24] ,External interrupt (X_EXT_INT2) trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 23. " fiqtrigmode[23] ,External interrupt (X_EXT_INT1) trigger mode" "Level,Edge"
bitfld.long 0x00 22. " fiqtrigmode[22] ,External interrupt (X_EXT_INT0) trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 21. " fiqtrigmode[21] ,AES interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 20. " fiqtrigmode[20] ,I2C(2) interrupt trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 19. " fiqtrigmode[19] ,MAC(1) interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 18. " fiqtrigmode[18] ,USBD 2.0 suspend mode" "Level,Edge"
textline " "
bitfld.long 0x00 17. " fiqtrigmode[17] ,USBD 2.0 occurrence of interrupts" "Level,Edge"
bitfld.long 0x00 16. " fiqtrigmode[16] ,WDT interrupt trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 15. " fiqtrigmode[15] ,I2C(3) interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 14. " fiqtrigmode[14] ,TIMER interrupt trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 12. " fiqtrigmode[12] ,RTC interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 11. " fiqtrigmode[11] ,I2C(5) interrupt trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 10. " fiqtrigmode[10] ,UART1 interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 9. " fiqtrigmode[9] ,I2C(4) interrupt trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 8. " fiqtrigmode[8] ,PMU interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 7. " fiqtrigmode[7] ,UART3 interrupt trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 6. " fiqtrigmode[6] ,SSP controller interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 5. " fiqtrigmode[5] ,OTG interrupt trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 3. " fiqtrigmode[3] ,I2C(1) interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 2. " fiqtrigmode[2] ,Bridge interrupt trigger mode" "Level,Edge"
textline " "
bitfld.long 0x00 1. " fiqtrigmode[1] ,DMAC interrupt trigger mode" "Level,Edge"
bitfld.long 0x00 0. " fiqtrigmode[0] ,AHB controller interrupt trigger mode" "Level,Edge"
line.long 0x04 "FIQTLR,FIQ Trigger Level Register"
bitfld.long 0x04 30. " fiqtriglevel[30] ,GPIO interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 29. " fiqtriglevel[29] ,I2C(6) interrupt trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 25. " fiqtriglevel[25] ,External interrupt (X_EXT_INT3) trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 24. " fiqtriglevel[24] ,External interrupt (X_EXT_INT2) trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 23. " fiqtriglevel[23] ,External interrupt (X_EXT_INT1) trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 22. " fiqtriglevel[22] ,External interrupt (X_EXT_INT0) trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 21. " fiqtriglevel[21] ,AES interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 20. " fiqtriglevel[20] ,I2C(2) interrupt trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 19. " fiqtriglevel[19] ,MAC(1) interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 18. " fiqtriglevel[18] ,USBD 2.0 suspend mode" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 17. " fiqtriglevel[17] ,USBD 2.0 occurrence of interrupts" "High/Rising,Low/Falling"
bitfld.long 0x04 16. " fiqtriglevel[16] ,WDT interrupt trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 15. " fiqtriglevel[15] ,I2C(3) interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 14. " fiqtriglevel[14] ,TIMER interrupt trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 12. " fiqtriglevel[12] ,RTC interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 11. " fiqtriglevel[11] ,I2C(5) interrupt trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 10. " fiqtriglevel[10] ,UART1 interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 9. " fiqtriglevel[9] ,I2C(4) interrupt trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 8. " fiqtriglevel[8] ,PMU interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 7. " fiqtriglevel[7] ,UART3 interrupt trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 6. " fiqtriglevel[6] ,SSP controller interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 5. " fiqtriglevel[5] ,OTG interrupt trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 3. " fiqtriglevel[3] ,I2C(1) interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 2. " fiqtriglevel[2] ,Bridge interrupt trigger level" "High/Rising,Low/Falling"
textline " "
bitfld.long 0x04 1. " fiqtriglevel[1] ,DMAC interrupt trigger level" "High/Rising,Low/Falling"
bitfld.long 0x04 0. " fiqtriglevel[0] ,AHB controller interrupt trigger level" "High/Rising,Low/Falling"
rgroup.long 0x34++0x3
line.long 0x0 "FIQSR,FIQ Status Register"
bitfld.long 0x00 30. " fiqstatus[30] ,Status of the GPIO interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. " fiqstatus[29] ,Status of I2C(6) interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 25. " fiqstatus[25] ,Status of the external interrupt (X_EXT_INT3)" "No interrupt,Interrupt"
bitfld.long 0x00 24. " fiqstatus[24] ,Status of the external interrupt (X_EXT_INT2)" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 23. " fiqstatus[23] ,Status of the external interrupt (X_EXT_INT1)" "No interrupt,Interrupt"
bitfld.long 0x00 22. " fiqstatus[22] ,Status of the external interrupt (X_EXT_INT0)" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 21. " fiqstatus[21] ,Status of the AES interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. " fiqstatus[20] ,Status of the I2C(2) interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 19. " fiqstatus[19] ,Status of the MAC(1) interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. " fiqstatus[18] ,USBD 2.0 suspend mode" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 17. " fiqstatus[17] ,USBD 2.0 occurrence of interrupts" "No interrupt,Interrupt"
bitfld.long 0x00 16. " fiqstatus[16] ,Status of the WDT interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 15. " fiqstatus[15] ,Status of the I2C(3) interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. " fiqstatus[14] ,Status of the TIMER interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 12. " fiqstatus[12] ,Status of the RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. " fiqstatus[11] ,Status of the I2C(5) interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 10. " fiqstatus[10] ,Status of the UART1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. " fiqstatus[9] ,Status of the I2C(4) interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 8. " fiqstatus[8] ,Status of the PMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. " fiqstatus[7] ,Status of the UART3 interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 6. " fiqstatus[6] ,Status of the SSP controller interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. " fiqstatus[5] ,Status of the OTG interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 3. " fiqstatus[3] ,Status of the I2C(1) interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. " fiqstatus[2] ,Status of the bridge interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 1. " fiqstatus[1] ,Status of the DMAC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. " fiqstatus[0] ,Status of the AHB controller interrupt" "No interrupt,Interrupt"
rgroup.long 0x50++0x7
line.long 0x0 "RR,The Revision Register"
line.long 0x04 "FRIN,Feature Register for Input Number"
rgroup.long 0x58++0x7
line.long 0x0 "FRIRQ,Feature Register for IRQ De-Bounce Location"
line.long 0x4 "FRFIQ,Feature Register for FIQ De-Bounce Location"
width 11.
tree.end
tree.open "I2C Bus Interface Controller"
tree "I2C1"
base ad:0x98a00000
width 9.
group.long 0x00++0x3
line.long 0x00 "CR,I2C Control Register"
bitfld.long 0x00 17. " Test_bi ,Test mode" "Low,High"
bitfld.long 0x00 16. " SDA_LOW ,SDA_LOW" "No effect,SDAout tied to 0"
textline " "
bitfld.long 0x00 15. " SCL_LOW ,SCL_LOW" "No effect,SCLout tied to 0"
bitfld.long 0x00 14. " STARTI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 13. " ALI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 12. " SAMI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 11. " STOPI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 10. " BERRI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 9. " DRI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 8. " DTI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 7. " TB_EN ,Transfer byte enable" "Wait state,Ready"
bitfld.long 0x00 6. " ACK ,The acknowledge signal" "ACK,NACK"
textline " "
bitfld.long 0x00 5. " STOP ,Stop condition" "No effect,Stop"
bitfld.long 0x00 4. " START ,Start condition" "No effect,Start"
textline " "
bitfld.long 0x00 3. " GC_EN ,I2C controller to respond enable" "Disabled,Enabled"
bitfld.long 0x00 2. " SCL_EN ,I2C controller clock output enable" "Disbaled,Enabled"
textline " "
bitfld.long 0x00 1. " I2C_EN ,The I2C bus interface controller enable" "Disabled,Enabled"
bitfld.long 0x00 0. " I2C_RST ,The I2C controller reset" "No reset,Reset"
hgroup.long 0x04++0x3
hide.long 0x00 "SR,I2C Status Register"
in
group.long 0x08++0x7
line.long 0x00 "CDR,Clock Divided Register"
hexmask.long.word 0x00 0.--9. 1. " COUNT ,Counter value"
line.long 0x04 "DR,I2C Data Register"
hexmask.long.byte 0x04 0.--7. 1. " DR ,Buffer for I2C bus data transmission and reception"
if (((d.l(ad:(0x98a00000+0x10)))&0x80000000)==0x80000000)
group.long 0x10++0x3
line.long 0x00 "SAR,I2C Slave Address Register"
bitfld.long 0x00 31. " EN10 ,10-bit addressing mode enable bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. " SAR[9:0] ,The 10-bit address"
else
group.long 0x10++0x3
line.long 0x00 "SAR,I2C Slave Address Register"
bitfld.long 0x00 31. " EN10 ,10-bit addressing mode enable bit" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. " SAR[6:0] ,The 7-bit address"
endif
group.long 0x14++0x3
line.long 0x00 "TGSR,I2C Set/Hold Time Glitch Suppression Setting Register"
bitfld.long 0x00 10.--12. " GSR ,The value of PCLK clock period" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--9. 1. " TSR ,The delay value of PCLK clock cycles"
rgroup.long 0x18++0x3
line.long 0x00 "BMR,I2C Bus Monitor Register"
bitfld.long 0x00 1. " SCLin ,Value of SCLin pin" "Low,High"
bitfld.long 0x00 0. " SDAin ,Value of SDAin pin" "Low,High"
rgroup.long 0x30++0x7
line.long 0x00 "RevR,Revision Register"
line.long 0x04 "FeatR,Feature Register"
width 11.
tree.end
tree "I2C2"
base ad:0x99300000
width 9.
group.long 0x00++0x3
line.long 0x00 "CR,I2C Control Register"
bitfld.long 0x00 17. " Test_bi ,Test mode" "Low,High"
bitfld.long 0x00 16. " SDA_LOW ,SDA_LOW" "No effect,SDAout tied to 0"
textline " "
bitfld.long 0x00 15. " SCL_LOW ,SCL_LOW" "No effect,SCLout tied to 0"
bitfld.long 0x00 14. " STARTI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 13. " ALI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 12. " SAMI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 11. " STOPI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 10. " BERRI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 9. " DRI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 8. " DTI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 7. " TB_EN ,Transfer byte enable" "Wait state,Ready"
bitfld.long 0x00 6. " ACK ,The acknowledge signal" "ACK,NACK"
textline " "
bitfld.long 0x00 5. " STOP ,Stop condition" "No effect,Stop"
bitfld.long 0x00 4. " START ,Start condition" "No effect,Start"
textline " "
bitfld.long 0x00 3. " GC_EN ,I2C controller to respond enable" "Disabled,Enabled"
bitfld.long 0x00 2. " SCL_EN ,I2C controller clock output enable" "Disbaled,Enabled"
textline " "
bitfld.long 0x00 1. " I2C_EN ,The I2C bus interface controller enable" "Disabled,Enabled"
bitfld.long 0x00 0. " I2C_RST ,The I2C controller reset" "No reset,Reset"
hgroup.long 0x04++0x3
hide.long 0x00 "SR,I2C Status Register"
in
group.long 0x08++0x7
line.long 0x00 "CDR,Clock Divided Register"
hexmask.long.word 0x00 0.--9. 1. " COUNT ,Counter value"
line.long 0x04 "DR,I2C Data Register"
hexmask.long.byte 0x04 0.--7. 1. " DR ,Buffer for I2C bus data transmission and reception"
if (((d.l(ad:(0x99300000+0x10)))&0x80000000)==0x80000000)
group.long 0x10++0x3
line.long 0x00 "SAR,I2C Slave Address Register"
bitfld.long 0x00 31. " EN10 ,10-bit addressing mode enable bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. " SAR[9:0] ,The 10-bit address"
else
group.long 0x10++0x3
line.long 0x00 "SAR,I2C Slave Address Register"
bitfld.long 0x00 31. " EN10 ,10-bit addressing mode enable bit" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. " SAR[6:0] ,The 7-bit address"
endif
group.long 0x14++0x3
line.long 0x00 "TGSR,I2C Set/Hold Time Glitch Suppression Setting Register"
bitfld.long 0x00 10.--12. " GSR ,The value of PCLK clock period" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--9. 1. " TSR ,The delay value of PCLK clock cycles"
rgroup.long 0x18++0x3
line.long 0x00 "BMR,I2C Bus Monitor Register"
bitfld.long 0x00 1. " SCLin ,Value of SCLin pin" "Low,High"
bitfld.long 0x00 0. " SDAin ,Value of SDAin pin" "Low,High"
rgroup.long 0x30++0x7
line.long 0x00 "RevR,Revision Register"
line.long 0x04 "FeatR,Feature Register"
width 11.
tree.end
tree "I2C3"
base ad:0x99000000
width 9.
group.long 0x00++0x3
line.long 0x00 "CR,I2C Control Register"
bitfld.long 0x00 17. " Test_bi ,Test mode" "Low,High"
bitfld.long 0x00 16. " SDA_LOW ,SDA_LOW" "No effect,SDAout tied to 0"
textline " "
bitfld.long 0x00 15. " SCL_LOW ,SCL_LOW" "No effect,SCLout tied to 0"
bitfld.long 0x00 14. " STARTI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 13. " ALI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 12. " SAMI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 11. " STOPI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 10. " BERRI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 9. " DRI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 8. " DTI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 7. " TB_EN ,Transfer byte enable" "Wait state,Ready"
bitfld.long 0x00 6. " ACK ,The acknowledge signal" "ACK,NACK"
textline " "
bitfld.long 0x00 5. " STOP ,Stop condition" "No effect,Stop"
bitfld.long 0x00 4. " START ,Start condition" "No effect,Start"
textline " "
bitfld.long 0x00 3. " GC_EN ,I2C controller to respond enable" "Disabled,Enabled"
bitfld.long 0x00 2. " SCL_EN ,I2C controller clock output enable" "Disbaled,Enabled"
textline " "
bitfld.long 0x00 1. " I2C_EN ,The I2C bus interface controller enable" "Disabled,Enabled"
bitfld.long 0x00 0. " I2C_RST ,The I2C controller reset" "No reset,Reset"
hgroup.long 0x04++0x3
hide.long 0x00 "SR,I2C Status Register"
in
group.long 0x08++0x7
line.long 0x00 "CDR,Clock Divided Register"
hexmask.long.word 0x00 0.--9. 1. " COUNT ,Counter value"
line.long 0x04 "DR,I2C Data Register"
hexmask.long.byte 0x04 0.--7. 1. " DR ,Buffer for I2C bus data transmission and reception"
if (((d.l(ad:(0x99000000+0x10)))&0x80000000)==0x80000000)
group.long 0x10++0x3
line.long 0x00 "SAR,I2C Slave Address Register"
bitfld.long 0x00 31. " EN10 ,10-bit addressing mode enable bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. " SAR[9:0] ,The 10-bit address"
else
group.long 0x10++0x3
line.long 0x00 "SAR,I2C Slave Address Register"
bitfld.long 0x00 31. " EN10 ,10-bit addressing mode enable bit" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. " SAR[6:0] ,The 7-bit address"
endif
group.long 0x14++0x3
line.long 0x00 "TGSR,I2C Set/Hold Time Glitch Suppression Setting Register"
bitfld.long 0x00 10.--12. " GSR ,The value of PCLK clock period" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--9. 1. " TSR ,The delay value of PCLK clock cycles"
rgroup.long 0x18++0x3
line.long 0x00 "BMR,I2C Bus Monitor Register"
bitfld.long 0x00 1. " SCLin ,Value of SCLin pin" "Low,High"
bitfld.long 0x00 0. " SDAin ,Value of SDAin pin" "Low,High"
rgroup.long 0x30++0x7
line.long 0x00 "RevR,Revision Register"
line.long 0x04 "FeatR,Feature Register"
width 11.
tree.end
tree "I2C4"
base ad:0x98c00000
width 9.
group.long 0x00++0x3
line.long 0x00 "CR,I2C Control Register"
bitfld.long 0x00 17. " Test_bi ,Test mode" "Low,High"
bitfld.long 0x00 16. " SDA_LOW ,SDA_LOW" "No effect,SDAout tied to 0"
textline " "
bitfld.long 0x00 15. " SCL_LOW ,SCL_LOW" "No effect,SCLout tied to 0"
bitfld.long 0x00 14. " STARTI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 13. " ALI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 12. " SAMI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 11. " STOPI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 10. " BERRI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 9. " DRI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 8. " DTI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 7. " TB_EN ,Transfer byte enable" "Wait state,Ready"
bitfld.long 0x00 6. " ACK ,The acknowledge signal" "ACK,NACK"
textline " "
bitfld.long 0x00 5. " STOP ,Stop condition" "No effect,Stop"
bitfld.long 0x00 4. " START ,Start condition" "No effect,Start"
textline " "
bitfld.long 0x00 3. " GC_EN ,I2C controller to respond enable" "Disabled,Enabled"
bitfld.long 0x00 2. " SCL_EN ,I2C controller clock output enable" "Disbaled,Enabled"
textline " "
bitfld.long 0x00 1. " I2C_EN ,The I2C bus interface controller enable" "Disabled,Enabled"
bitfld.long 0x00 0. " I2C_RST ,The I2C controller reset" "No reset,Reset"
hgroup.long 0x04++0x3
hide.long 0x00 "SR,I2C Status Register"
in
group.long 0x08++0x7
line.long 0x00 "CDR,Clock Divided Register"
hexmask.long.word 0x00 0.--9. 1. " COUNT ,Counter value"
line.long 0x04 "DR,I2C Data Register"
hexmask.long.byte 0x04 0.--7. 1. " DR ,Buffer for I2C bus data transmission and reception"
if (((d.l(ad:(0x98c00000+0x10)))&0x80000000)==0x80000000)
group.long 0x10++0x3
line.long 0x00 "SAR,I2C Slave Address Register"
bitfld.long 0x00 31. " EN10 ,10-bit addressing mode enable bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. " SAR[9:0] ,The 10-bit address"
else
group.long 0x10++0x3
line.long 0x00 "SAR,I2C Slave Address Register"
bitfld.long 0x00 31. " EN10 ,10-bit addressing mode enable bit" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. " SAR[6:0] ,The 7-bit address"
endif
group.long 0x14++0x3
line.long 0x00 "TGSR,I2C Set/Hold Time Glitch Suppression Setting Register"
bitfld.long 0x00 10.--12. " GSR ,The value of PCLK clock period" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--9. 1. " TSR ,The delay value of PCLK clock cycles"
rgroup.long 0x18++0x3
line.long 0x00 "BMR,I2C Bus Monitor Register"
bitfld.long 0x00 1. " SCLin ,Value of SCLin pin" "Low,High"
bitfld.long 0x00 0. " SDAin ,Value of SDAin pin" "Low,High"
rgroup.long 0x30++0x7
line.long 0x00 "RevR,Revision Register"
line.long 0x04 "FeatR,Feature Register"
width 11.
tree.end
tree "I2C5"
base ad:0x98900000
width 9.
group.long 0x00++0x3
line.long 0x00 "CR,I2C Control Register"
bitfld.long 0x00 17. " Test_bi ,Test mode" "Low,High"
bitfld.long 0x00 16. " SDA_LOW ,SDA_LOW" "No effect,SDAout tied to 0"
textline " "
bitfld.long 0x00 15. " SCL_LOW ,SCL_LOW" "No effect,SCLout tied to 0"
bitfld.long 0x00 14. " STARTI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 13. " ALI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 12. " SAMI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 11. " STOPI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 10. " BERRI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 9. " DRI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 8. " DTI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 7. " TB_EN ,Transfer byte enable" "Wait state,Ready"
bitfld.long 0x00 6. " ACK ,The acknowledge signal" "ACK,NACK"
textline " "
bitfld.long 0x00 5. " STOP ,Stop condition" "No effect,Stop"
bitfld.long 0x00 4. " START ,Start condition" "No effect,Start"
textline " "
bitfld.long 0x00 3. " GC_EN ,I2C controller to respond enable" "Disabled,Enabled"
bitfld.long 0x00 2. " SCL_EN ,I2C controller clock output enable" "Disbaled,Enabled"
textline " "
bitfld.long 0x00 1. " I2C_EN ,The I2C bus interface controller enable" "Disabled,Enabled"
bitfld.long 0x00 0. " I2C_RST ,The I2C controller reset" "No reset,Reset"
hgroup.long 0x04++0x3
hide.long 0x00 "SR,I2C Status Register"
in
group.long 0x08++0x7
line.long 0x00 "CDR,Clock Divided Register"
hexmask.long.word 0x00 0.--9. 1. " COUNT ,Counter value"
line.long 0x04 "DR,I2C Data Register"
hexmask.long.byte 0x04 0.--7. 1. " DR ,Buffer for I2C bus data transmission and reception"
if (((d.l(ad:(0x98900000+0x10)))&0x80000000)==0x80000000)
group.long 0x10++0x3
line.long 0x00 "SAR,I2C Slave Address Register"
bitfld.long 0x00 31. " EN10 ,10-bit addressing mode enable bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. " SAR[9:0] ,The 10-bit address"
else
group.long 0x10++0x3
line.long 0x00 "SAR,I2C Slave Address Register"
bitfld.long 0x00 31. " EN10 ,10-bit addressing mode enable bit" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. " SAR[6:0] ,The 7-bit address"
endif
group.long 0x14++0x3
line.long 0x00 "TGSR,I2C Set/Hold Time Glitch Suppression Setting Register"
bitfld.long 0x00 10.--12. " GSR ,The value of PCLK clock period" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--9. 1. " TSR ,The delay value of PCLK clock cycles"
rgroup.long 0x18++0x3
line.long 0x00 "BMR,I2C Bus Monitor Register"
bitfld.long 0x00 1. " SCLin ,Value of SCLin pin" "Low,High"
bitfld.long 0x00 0. " SDAin ,Value of SDAin pin" "Low,High"
rgroup.long 0x30++0x7
line.long 0x00 "RevR,Revision Register"
line.long 0x04 "FeatR,Feature Register"
width 11.
tree.end
tree "I2C6"
base ad:0x99500000
width 9.
group.long 0x00++0x3
line.long 0x00 "CR,I2C Control Register"
bitfld.long 0x00 17. " Test_bi ,Test mode" "Low,High"
bitfld.long 0x00 16. " SDA_LOW ,SDA_LOW" "No effect,SDAout tied to 0"
textline " "
bitfld.long 0x00 15. " SCL_LOW ,SCL_LOW" "No effect,SCLout tied to 0"
bitfld.long 0x00 14. " STARTI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 13. " ALI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 12. " SAMI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 11. " STOPI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 10. " BERRI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 9. " DRI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 8. " DTI_EN ,I2C controller to interrupt enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 7. " TB_EN ,Transfer byte enable" "Wait state,Ready"
bitfld.long 0x00 6. " ACK ,The acknowledge signal" "ACK,NACK"
textline " "
bitfld.long 0x00 5. " STOP ,Stop condition" "No effect,Stop"
bitfld.long 0x00 4. " START ,Start condition" "No effect,Start"
textline " "
bitfld.long 0x00 3. " GC_EN ,I2C controller to respond enable" "Disabled,Enabled"
bitfld.long 0x00 2. " SCL_EN ,I2C controller clock output enable" "Disbaled,Enabled"
textline " "
bitfld.long 0x00 1. " I2C_EN ,The I2C bus interface controller enable" "Disabled,Enabled"
bitfld.long 0x00 0. " I2C_RST ,The I2C controller reset" "No reset,Reset"
hgroup.long 0x04++0x3
hide.long 0x00 "SR,I2C Status Register"
in
group.long 0x08++0x7
line.long 0x00 "CDR,Clock Divided Register"
hexmask.long.word 0x00 0.--9. 1. " COUNT ,Counter value"
line.long 0x04 "DR,I2C Data Register"
hexmask.long.byte 0x04 0.--7. 1. " DR ,Buffer for I2C bus data transmission and reception"
if (((d.l(ad:(0x99500000+0x10)))&0x80000000)==0x80000000)
group.long 0x10++0x3
line.long 0x00 "SAR,I2C Slave Address Register"
bitfld.long 0x00 31. " EN10 ,10-bit addressing mode enable bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. " SAR[9:0] ,The 10-bit address"
else
group.long 0x10++0x3
line.long 0x00 "SAR,I2C Slave Address Register"
bitfld.long 0x00 31. " EN10 ,10-bit addressing mode enable bit" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. " SAR[6:0] ,The 7-bit address"
endif
group.long 0x14++0x3
line.long 0x00 "TGSR,I2C Set/Hold Time Glitch Suppression Setting Register"
bitfld.long 0x00 10.--12. " GSR ,The value of PCLK clock period" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--9. 1. " TSR ,The delay value of PCLK clock cycles"
rgroup.long 0x18++0x3
line.long 0x00 "BMR,I2C Bus Monitor Register"
bitfld.long 0x00 1. " SCLin ,Value of SCLin pin" "Low,High"
bitfld.long 0x00 0. " SDAin ,Value of SDAin pin" "Low,High"
rgroup.long 0x30++0x7
line.long 0x00 "RevR,Revision Register"
line.long 0x04 "FeatR,Feature Register"
width 11.
tree.end
tree.end
tree "ADC Controller"
base ad:0x99900000
width 12.
group.long 0x00++0x3
line.long 0x00 "ADCCtrl,Control Register"
bitfld.long 0x00 8. " XPWDB ,Power-down analog/digital converter" "Power-down mode,Normal mode"
bitfld.long 0x00 7. " ADCCtr7 ,Channel 7 select" "Not selected,Selected"
textline " "
bitfld.long 0x00 6. " ADCCtr6 ,Channel 6 select" "Not selected,Selected"
bitfld.long 0x00 5. " ADCCtr5 ,Channel 5 select" "Not selected,Selected"
textline " "
bitfld.long 0x00 4. " ADCCtr4 ,Channel 4 select" "Not selected,Selected"
bitfld.long 0x00 3. " ADCCtr3 ,Channel 3 select" "Not selected,Selected"
textline " "
bitfld.long 0x00 2. " ADCCtr2 ,Channel 2 select" "Not selected,Selected"
bitfld.long 0x00 1. " ADCCtr1 ,Channel 1 select" "Not selected,Selected"
textline " "
bitfld.long 0x00 0. " ADCCtr0 ,Channel 0 select" "Not selected,Selected"
rgroup.long 0x04++0x23
line.long 0x00 "ADCDataVal,Data Valid Register"
bitfld.long 0x0 0. " ADCDatValSel ,ADC data valid" "Invalid,Valid"
line.long 0x4 "ADCData0,ADC Data Channel 0"
hexmask.long.word 0x4 0.--9. 1. " ADCDat0 ,ADC data 0"
line.long 0x8 "ADCData1,ADC Data Channel 1"
hexmask.long.word 0x8 0.--9. 1. " ADCDat1 ,ADC data 1"
line.long 0xC "ADCData2,ADC Data Channel 2"
hexmask.long.word 0xC 0.--9. 1. " ADCDat2 ,ADC data 2"
line.long 0x10 "ADCData3,ADC Data Channel 3"
hexmask.long.word 0x10 0.--9. 1. " ADCDat3 ,ADC data 3"
line.long 0x14 "ADCData4,ADC Data Channel 4"
hexmask.long.word 0x14 0.--9. 1. " ADCDat4 ,ADC data 4"
line.long 0x18 "ADCData5,ADC Data Channel 5"
hexmask.long.word 0x18 0.--9. 1. " ADCDat5 ,ADC data 5"
line.long 0x1C "ADCData6,ADC Data Channel 6"
hexmask.long.word 0x1C 0.--9. 1. " ADCDat6 ,ADC data 6"
line.long 0x20 "ADCData7,ADC Data Channel 7"
hexmask.long.word 0x20 0.--9. 1. " ADCDat7 ,ADC data 7"
width 11.
tree.end
tree "Pulse Width Modulator"
base ad:0x98300000
width 9.
group.long 0x0++0xb "PWM 0 Control Registers"
line.long 0x00 "PWMCtrl0,PWM 0 Control Register"
hexmask.long.byte 0x00 0.--5. 1. " Prescale ,PWM pre-scale divisor"
line.long 0x04 "PWMDuty0,PWM 0 DUTY Register"
bitfld.long 0x04 10. " FDCYCLE ,PWMn full duty cycle" "DCYCLE,PWM_OUTn high"
hexmask.long.word 0x04 0.--9. 1. " DCYCLE ,PWMn duty cycle"
line.long 0x08 "PWMPERV0,PWM 0 PERVAL Register"
hexmask.long.word 0x08 0.--9. 1. " PWM_PERVAL ,PWMn period control"
group.long 0x10++0xb "PWM 1 Control Registers"
line.long 0x00 "PWMCtrl1,PWM 1 Control Register"
hexmask.long.byte 0x00 0.--5. 1. " Prescale ,PWM pre-scale divisor"
line.long 0x04 "PWMDuty1,PWM 1 DUTY Register"
bitfld.long 0x04 10. " FDCYCLE ,PWMn full duty cycle" "DCYCLE,PWM_OUTn high"
hexmask.long.word 0x04 0.--9. 1. " DCYCLE ,PWMn duty cycle"
line.long 0x08 "PWMPERV1,PWM 1 PERVAL Register"
hexmask.long.word 0x08 0.--9. 1. " PWM_PERVAL ,PWMn period control"
group.long 0x20++0xb "PWM 2 Control Registers"
line.long 0x00 "PWMCtrl2,PWM 2 Control Register"
hexmask.long.byte 0x00 0.--5. 1. " Prescale ,PWM pre-scale divisor"
line.long 0x04 "PWMDuty2,PWM 2 DUTY Register"
bitfld.long 0x04 10. " FDCYCLE ,PWMn full duty cycle" "DCYCLE,PWM_OUTn high"
hexmask.long.word 0x04 0.--9. 1. " DCYCLE ,PWMn duty cycle"
line.long 0x08 "PWMPERV2,PWM 2 PERVAL Register"
hexmask.long.word 0x08 0.--9. 1. " PWM_PERVAL ,PWMn period control"
group.long 0x30++0xb "PWM 3 Control Registers"
line.long 0x00 "PWMCtrl3,PWM 3 Control Register"
hexmask.long.byte 0x00 0.--5. 1. " Prescale ,PWM pre-scale divisor"
line.long 0x04 "PWMDuty3,PWM 3 DUTY Register"
bitfld.long 0x04 10. " FDCYCLE ,PWMn full duty cycle" "DCYCLE,PWM_OUTn high"
hexmask.long.word 0x04 0.--9. 1. " DCYCLE ,PWMn duty cycle"
line.long 0x08 "PWMPERV3,PWM 3 PERVAL Register"
hexmask.long.word 0x08 0.--9. 1. " PWM_PERVAL ,PWMn period control"
group.long 0x40++0xb "PWM 4 Control Registers"
line.long 0x00 "PWMCtrl4,PWM 4 Control Register"
hexmask.long.byte 0x00 0.--5. 1. " Prescale ,PWM pre-scale divisor"
line.long 0x04 "PWMDuty4,PWM 4 DUTY Register"
bitfld.long 0x04 10. " FDCYCLE ,PWMn full duty cycle" "DCYCLE,PWM_OUTn high"
hexmask.long.word 0x04 0.--9. 1. " DCYCLE ,PWMn duty cycle"
line.long 0x08 "PWMPERV4,PWM 4 PERVAL Register"
hexmask.long.word 0x08 0.--9. 1. " PWM_PERVAL ,PWMn period control"
group.long 0x50++0xb "PWM 5 Control Registers"
line.long 0x00 "PWMCtrl5,PWM 5 Control Register"
hexmask.long.byte 0x00 0.--5. 1. " Prescale ,PWM pre-scale divisor"
line.long 0x04 "PWMDuty5,PWM 5 DUTY Register"
bitfld.long 0x04 10. " FDCYCLE ,PWMn full duty cycle" "DCYCLE,PWM_OUTn high"
hexmask.long.word 0x04 0.--9. 1. " DCYCLE ,PWMn duty cycle"
line.long 0x08 "PWMPERV5,PWM 5 PERVAL Register"
hexmask.long.word 0x08 0.--9. 1. " PWM_PERVAL ,PWMn period control"
group.long 0x60++0xb "PWM 6 Control Registers"
line.long 0x00 "PWMCtrl6,PWM 6 Control Register"
hexmask.long.byte 0x00 0.--5. 1. " Prescale ,PWM pre-scale divisor"
line.long 0x04 "PWMDuty6,PWM 6 DUTY Register"
bitfld.long 0x04 10. " FDCYCLE ,PWMn full duty cycle" "DCYCLE,PWM_OUTn high"
hexmask.long.word 0x04 0.--9. 1. " DCYCLE ,PWMn duty cycle"
line.long 0x08 "PWMPERV6,PWM 6 PERVAL Register"
hexmask.long.word 0x08 0.--9. 1. " PWM_PERVAL ,PWMn period control"
group.long 0x70++0xb "PWM 7 Control Registers"
line.long 0x00 "PWMCtrl7,PWM 7 Control Register"
hexmask.long.byte 0x00 0.--5. 1. " Prescale ,PWM pre-scale divisor"
line.long 0x04 "PWMDuty7,PWM 7 DUTY Register"
bitfld.long 0x04 10. " FDCYCLE ,PWMn full duty cycle" "DCYCLE,PWM_OUTn high"
hexmask.long.word 0x04 0.--9. 1. " DCYCLE ,PWMn duty cycle"
line.long 0x08 "PWMPERV7,PWM 7 PERVAL Register"
hexmask.long.word 0x08 0.--9. 1. " PWM_PERVAL ,PWMn period control"
width 11.
tree.end
tree "Tachometer"
base ad:0x98e00000
width 11.
group.long 0x00++0x7
line.long 0x00 "Control,Control Register"
bitfld.long 0x00 23. " Al_En7 ,Channel 7 alert enable" "Disabled,Enabled"
bitfld.long 0x00 22. " Al_En6 ,Channel 6 alert enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 21. " Al_En5 ,Channel 5 alert enable" "Disabled,Enabled"
bitfld.long 0x00 20. " Al_En4 ,Channel 4 alert enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 19. " Al_En3 ,Channel 3 alert enable" "Disabled,Enabled"
bitfld.long 0x00 18. " Al_En2 ,Channel 2 alert enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 17. " Al_En1 ,Channel 1 alert enable" "Disabled,Enabled"
bitfld.long 0x00 16. " Al_En0 ,Channel 0 alert enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 7. " Chan_En7 ,Channel 7 counter enable" "Disabled,Enabled"
bitfld.long 0x00 6. " Chan_En6 ,Channel 6 counter enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 5. " Chan_En5 ,Channel 5 counter enable" "Disabled,Enabled"
bitfld.long 0x00 4. " Chan_En4 ,Channel 4 counter enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 3. " Chan_En3 ,Channel 3 counter enable" "Disabled,Enabled"
bitfld.long 0x00 2. " Chan_En2 ,Channel 2 counter enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " Chan_En1 ,Channel 1 counter enable" "Disabled,Enabled"
bitfld.long 0x00 0. " Chan_En0 ,Channel 0 counter enable" "Disabled,Enabled"
line.long 0x04 "Timer,Timer Register"
hexmask.long 0x04 0.--25. 1. " Timer_Init ,Timer initial"
rgroup.long 0x08++0x3
line.long 0x00 "Status,Status Register"
bitfld.long 0x00 23. " Alt_Flag7 ,Channel 7 alert enable" "No alert,Alert"
bitfld.long 0x00 22. " Alt_Flag6 ,Channel 6 alert enable" "No alert,Alert"
textline " "
bitfld.long 0x00 21. " Alt_Flag5 ,Channel 5 alert enable" "No alert,Alert"
bitfld.long 0x00 20. " Alt_Flag4 ,Channel 4 alert enable" "No alert,Alert"
textline " "
bitfld.long 0x00 19. " Alt_Flag3 ,Channel 3 alert enable" "No alert,Alert"
bitfld.long 0x00 18. " Alt_Flag2 ,Channel 2 alert enable" "No alert,Alert"
textline " "
bitfld.long 0x00 17. " Alt_Flag1 ,Channel 1 alert enable" "No alert,Alert"
bitfld.long 0x00 16. " Alt_Flag0 ,Channel 0 alert enable" "No alert,Alert"
textline " "
bitfld.long 0x00 7. " Count_Over7 ,Channel 7 overflow flag enable" "No overflow,Overflow"
bitfld.long 0x00 6. " Count_Over6 ,Channel 6 overflow flag enable" "No overflow,Overflow"
textline " "
bitfld.long 0x00 5. " Count_Over5 ,Channel 5 overflow flag enable" "No overflow,Overflow"
bitfld.long 0x00 4. " Count_Over4 ,Channel 4 overflow flag enable" "No overflow,Overflow"
textline " "
bitfld.long 0x00 3. " Count_Over3 ,Channel 3 overflow flag enable" "No overflow,Overflow"
bitfld.long 0x00 2. " Count_Over2 ,Channel 2 overflow flag enable" "No overflow,Overflow"
textline " "
bitfld.long 0x00 1. " Count_Over1 ,Channel 1 overflow flag enable" "No overflow,Overflow"
bitfld.long 0x00 0. " Count_Over0 ,Channel 0 overflow flag enable" "No overflow,Overflow"
rgroup.long 0x10++0x3
line.long 0x00 "Ch0AF,Channel 0 Alert Flag"
hexmask.long 0x00 0.--19. 1. " Ch0_count ,Channel 0 counter"
rgroup.long 0x18++0x3
line.long 0x00 "Ch1AF,Channel 1 Alert Flag"
hexmask.long 0x00 0.--19. 1. " Ch1_count ,Channel 1 counter"
rgroup.long 0x20++0x3
line.long 0x00 "Ch2AF,Channel 2 Alert Flag"
hexmask.long 0x00 0.--19. 1. " Ch2_count ,Channel 2 counter"
rgroup.long 0x28++0x3
line.long 0x00 "Ch3AF,Channel 3 Alert Flag"
hexmask.long 0x00 0.--19. 1. " Ch3_count ,Channel 3 counter"
rgroup.long 0x30++0x3
line.long 0x00 "Ch4AF,Channel 4 Alert Flag"
hexmask.long 0x00 0.--19. 1. " Ch4_count ,Channel 4 counter"
rgroup.long 0x38++0x3
line.long 0x00 "Ch5AF,Channel 5 Alert Flag"
hexmask.long 0x00 0.--19. 1. " Ch5_count ,Channel 5 counter"
rgroup.long 0x40++0x3
line.long 0x00 "Ch6AF,Channel 6 Alert Flag"
hexmask.long 0x00 0.--19. 1. " Ch6_count ,Channel 6 counter"
rgroup.long 0x48++0x3
line.long 0x00 "Ch7AF,Channel 7 Alert Flag"
hexmask.long 0x00 0.--19. 1. " Ch7_count ,Channel 7 counter"
group.long 0x14++0x3
line.long 0x00 "Ch0Al,Channel 0 Alert"
hexmask.long.byte 0x00 8.--15. 1. " Ch0_alert_h ,Ch0 alert high level"
hexmask.long.byte 0x00 0.--7. 1. " Ch0_alert_l , Ch0 alert low level"
group.long 0x1C++0x3
line.long 0x00 "Ch1Al,Channel 1 Alert"
hexmask.long.byte 0x00 8.--15. 1. " Ch1_alert_h ,Ch1 alert high level"
hexmask.long.byte 0x00 0.--7. 1. " Ch1_alert_l , Ch1 alert low level"
group.long 0x24++0x3
line.long 0x00 "Ch2Al,Channel 2 Alert"
hexmask.long.byte 0x00 8.--15. 1. " Ch2_alert_h ,Ch2 alert high level"
hexmask.long.byte 0x00 0.--7. 1. " Ch2_alert_l , Ch2 alert low level"
group.long 0x2C++0x3
line.long 0x00 "Ch3Al,Channel 3 Alert"
hexmask.long.byte 0x00 8.--15. 1. " Ch3_alert_h ,Ch3 alert high level"
hexmask.long.byte 0x00 0.--7. 1. " Ch3_alert_l , Ch3 alert low level"
group.long 0x34++0x3
line.long 0x00 "Ch4Al,Channel 4 Alert"
hexmask.long.byte 0x00 8.--15. 1. " Ch4_alert_h ,Ch4 alert high level"
hexmask.long.byte 0x00 0.--7. 1. " Ch4_alert_l , Ch4 alert low level"
group.long 0x3C++0x3
line.long 0x00 "Ch5Al,Channel 5 Alert"
hexmask.long.byte 0x00 8.--15. 1. " Ch5_alert_h ,Ch5 alert high level"
hexmask.long.byte 0x00 0.--7. 1. " Ch5_alert_l , Ch5 alert low level"
group.long 0x44++0x3
line.long 0x00 "Ch6Al,Channel 6 Alert"
hexmask.long.byte 0x00 8.--15. 1. " Ch6_alert_h ,Ch6 alert high level"
hexmask.long.byte 0x00 0.--7. 1. " Ch6_alert_l , Ch6 alert low level"
group.long 0x4C++0x3
line.long 0x00 "Ch7Al,Channel 7 Alert"
hexmask.long.byte 0x00 8.--15. 1. " Ch7_alert_h ,Ch7 alert high level"
hexmask.long.byte 0x00 0.--7. 1. " Ch7_alert_l , Ch7 alert low level"
width 11.
tree.end
tree "Video Sampling Controller 2.0"
base ad:0xa0000000
width 11.
rgroup.long 0x00++0x7
line.long 0x00 "VR,Version"
bitfld.long 0x00 31. " LRLE ,LRLE support" "Not supported,Supported"
bitfld.long 0x00 30. " DS ,Downsampling support" "Not supported,Supported"
textline " "
bitfld.long 0x00 28. " BS ,Busmaster support" "Not supported,Supported"
hexmask.long.byte 0x00 4.--7. 1. " MinorVN ,Minor version number"
textline " "
hexmask.long.byte 0x00 0.--3. 1. " MajorVN ,Major version number"
line.long 0x04 "SR,Status"
bitfld.long 0x04 0.--2. " CS ,Current main state machine state" "IDLE,SAMPLE,PROC,TRANS,COPY,DONE,Reserved,RESET"
group.long 0x08++0x3
line.long 0x00 "CR,Control"
bitfld.long 0x00 6. " PC ,Path from COPY" "DONE,SAMPLE"
bitfld.long 0x00 5. " PT ,Path from TRANS" "DONE,SAMPLE"
textline " "
bitfld.long 0x00 4. " PP ,Path from PROC" "DONE,SAMPLE"
bitfld.long 0x00 3. " PS ,Path from SAMPLE" "DONE,PROC"
textline " "
bitfld.long 0x00 0.--2. " PI ,Path from IDLE" "IDLE,SAMPLE,PROC,TRANS,COPY,Reserved,Reserved,Reserved"
group.long 0x0c++0x3
line.long 0x00 "MR,Mode"
bitfld.long 0x00 23. " VS ,Vsync ADC/VGA input multiplexer for sync irq" "Disabled,Enabled"
bitfld.long 0x00 22. " HS ,Hsync ADC/VGA input multiplexer for sync irq" "Disabled,Enabled"
textline " "
bitfld.long 0x00 21. " VM ,Vsync ADC/VGA input multiplexer for measurement registers" "Disabled,Enabled"
bitfld.long 0x00 20. " HM ,Hsync ADC/VGA input multiplexer for measurement registers" "Disabled,Enabled"
textline " "
bitfld.long 0x00 19. " ExtEn ,Enable extended sync switching" "Disabled,Enabled"
bitfld.long 0x00 18. " SPIL ,Swap pixel input lanes" "Not swapped,Swapped"
textline " "
bitfld.long 0x00 17. " FE ,Force error in virtual test picture" "Not forced,Forced"
bitfld.long 0x00 16. " GT ,Generate virtual test picture" "Not generated,Generated"
textline " "
bitfld.long 0x00 12.--15. " ED ,Enable delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. " IIM ,Input interface mode" "Single ADC,Double ADC,Single DVI,Double DVI,Single Dual Data Rate DVI,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
textline " "
bitfld.long 0x00 7. " DMAEn ,Enable DMA mode" "Disabled,Enabled"
bitfld.long 0x00 6. " VFR ,Video fifo reset" "No reset,Reset"
textline " "
bitfld.long 0x00 5. " VSCMR ,VSC master reset" "No reset,Reset"
bitfld.long 0x00 4. " GPIOADC ,GPIO for ADC clock invert pin" "Not inverted,Inverted"
textline " "
bitfld.long 0x00 3. " VsyncChange ,Vsync ADC/VGA input multiplexer for sync change IRQ, registers and sampling" "VGA,ADC"
bitfld.long 0x00 2. " HsyncChange ,Hsync ADC/VGA input multiplexer for sync change IRQ, registers and sampling" "VGA,ADC"
textline " "
bitfld.long 0x00 1. " AVDis ,Set pin to disable analog video" "Enabled,Disabled"
bitfld.long 0x00 0. " GPIOPixSamp ,GPIO for adc alternate pixel sampling mode" "Low,High"
rgroup.long 0x10++0x3
line.long 0x00 "ISR,Interrupt Status"
bitfld.long 0x00 7. " ICDR ,Input clock domain reset done" "Not done,Done"
bitfld.long 0x00 6. " DRI ,Data ready interrupt" "Not ready,Ready"
textline " "
bitfld.long 0x00 5. " FIFOErr ,Video FIFO error" "No error,Error"
bitfld.long 0x00 4. " VSS ,Vertical sync slow" "No overflow,Overflow"
textline " "
bitfld.long 0x00 3. " HSS ,Horizontal sync slow" "No overflow,Overflow"
bitfld.long 0x00 2. " HMD ,Horizontal measurement done" "Not done,Done"
textline " "
bitfld.long 0x00 1. " SFC ,Sync frequency changed" "Not changed,Changed"
bitfld.long 0x00 0. " EoP ,End of processing" "Not done,Done"
group.long 0x14++0x3
line.long 0x00 "IMR,Interrupt Mask"
bitfld.long 0x00 7. " ICDR ,Input clock domain reset done" "Masked,Not masked"
bitfld.long 0x00 6. " DRI ,Data ready interrupt" "Masked,Not masked"
textline " "
bitfld.long 0x00 5. " FIFOErr ,Video FIFO error" "Masked,Not masked"
bitfld.long 0x00 4. " VSS ,Vertical sync slow" "Masked,Not masked"
textline " "
bitfld.long 0x00 3. " HSS ,Horizontal sync slow" "Masked,Not masked"
bitfld.long 0x00 2. " HMD ,Horizontal measurement done" "Masked,Not masked"
textline " "
bitfld.long 0x00 1. " SFC ,Sync frequency changed" "Masked,Not masked"
bitfld.long 0x00 0. " EoP ,End of processing" "Masked,Not masked"
rgroup.long 0x18++0x37
line.long 0x00 "BPV,Black Pixel Value"
hexmask.long.word 0x00 0.--15. 1. " SingleRGB565 ,A single RGB565 format pixel sample during the retrace"
line.long 0x04 "MVT,Measured Vertical Total"
hexmask.long.word 0x04 0.--10. 1. " LinesNo ,Number of lines between vertical sync signals"
line.long 0x08 "HO,H Offset"
hexmask.long.word 0x08 0.--10. 1. " PixNo ,Number of pixels to skip after the hsync before starting to sample"
line.long 0x0c "HL,H Length"
hexmask.long.word 0x0c 1.--11. 1. " PixLine ,Number of pixels to sample per line"
line.long 0x10 "VO,V Offset"
hexmask.long.word 0x10 0.--10. 1. " LineNoSkip ,Number of lines to skip after the ysync before starting to sample"
line.long 0x14 "VL,V Length"
hexmask.long.word 0x14 0.--10. 1. " LineNoSamp ,Number of lines to sample per frame"
line.long 0x18 "MHO,Measurement H Offset"
hexmask.long.word 0x18 0.--11. 1. " SizeB ,Size of the horizontal blanking area"
line.long 0x1c "MHL,Measured H Length"
hexmask.long.word 0x1c 0.--11. 1. " SizeA ,Size of the horizontal active area"
line.long 0x20 "MVO,Measured V Offset"
hexmask.long.word 0x20 0.--9. 1. " SizeVB ,Size of the vertical blanking area"
line.long 0x24 "MVL,Measured V Length"
hexmask.long.word 0x24 0.--10. 1. " SizeVA ,Size of the vertical active area"
line.long 0x28 "HHT,Hsync High Time"
hexmask.long.word 0x28 0.--13. 1. " HsyncCNoH ,Number of pixel clocks where the hsync input is high"
line.long 0x2c "HLT,Hsync Low Time"
hexmask.long.word 0x2c 0.--13. 1. " HsyncCNoL ,Number of hsync periods where the hsync input is low"
line.long 0x30 "VHT,Vsync High Time"
hexmask.long.word 0x30 0.--13. 1. " VsyncPNoH ,Number of hsync periods where the vsync input is high"
line.long 0x34 "VLT,Vsync Low Time"
hexmask.long.word 0x34 0.--13. 1. " HsyncPNoL ,Number of hsync periods where the vsync input is low"
wgroup.long 0x50++0x7
line.long 0x00 "HSD,Horizontal Sync Delta"
hexmask.long.byte 0x00 0.--7. 1. " PixCNoH ,Number of pixel clocks the high or the low hsync period"
line.long 0x04 "VSD,Vertical Sync Delta"
hexmask.long.byte 0x04 0.--7. 1. " PixCNoV ,Number of pixel clocks the high or the low vsync period"
rgroup.long 0x58++0x3
line.long 0x00 "VMA,Video Memory Access"
wgroup.long 0x5c++0x17
line.long 0x00 "BTA,Block Transfer Address"
hexmask.long 0x00 1.--20. 0x01 " SA ,Start address into the framebuffer"
line.long 0x04 "BTS,Block Transfer Size"
hexmask.long.word 0x04 1.--15. 1. " BW ,Block width in double pixel"
line.long 0x08 "BTF,Block Transfer Field"
hexmask.long.byte 0x08 8.--15. 1. " ColNo ,Number of columns in a field"
hexmask.long.byte 0x08 0.--7. 1. " RowNo ,Number of rows in a field"
line.long 0x0c "BCO,Block Column Offset"
hexmask.long 0x0c 1.--21. 1. " OffV ,Offset value in double pixels"
line.long 0x10 "BRO,Block Row Offset"
hexmask.long 0x10 1.--21. 1. " Offv ,Offset value in double pixels"
line.long 0x14 "LFH,Line for H Offset Measure"
hexmask.long.word 0x14 0.--10. 1. " HML ,Line for horizontal measurements"
group.long 0x74++0x3
line.long 0x00 "BPT,Black Pixel Threshold"
hexmask.long.word 0x00 0.--10. 1. " BPT ,Black pixel threshold sum for 3 channels R,G,B"
rgroup.long 0x78++0x3
line.long 0x00 "IRE,Image Rescan Error"
hexmask.long 0x00 0.--27. 1. " IRE ,Image rescan error"
wgroup.long 0x7c++0x3
line.long 0x00 "DTH,Diff Threshold"
bitfld.long 0x00 0.--4. " DT ,Diff threshold for a single channel of a pixel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x80++0x3
line.long 0x00 "FTL,FIFO Fill Threshold Level"
hexmask.long.word 0x00 0.--8. 1. " FIFOTFill ,Fifo fill level"
rgroup.long 0x84++0x3
line.long 0x00 "FFL,FIFO Fill Level"
hexmask.long.word 0x00 0.--9. 1. " FIFOFill ,Fifo fill level"
group.long 0x88++0x3
line.long 0x00 "CCR,Compression Control"
bitfld.long 0x00 25.--29. " RL ,Runlength limit during reaccumulation stage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20. " LMG ,Linecopy margin for green channels" "Disabled,Enabled"
textline " "
bitfld.long 0x00 19. " LMRB ,Linecopy margin for red and blue channels" "Disabled,Enabled"
bitfld.long 0x00 15.--18. " CRM ,Color reduction mode" "1 bit black/white,2 bit grey,3 bit grey,4 bit grey,5 bit grey,6 bit grey,7 bit grey,8 bit grey,15 bit color,7 bit color,4 bit palette,Reserved,Reserved,Reserved,Reserved,Reserved"
textline " "
bitfld.long 0x00 14. " GCDis ,Disable grey compression" "Enabled,Disabled"
bitfld.long 0x00 13. " GCForc ,Force grey compression" "Not forced,Forced"
textline " "
bitfld.long 0x00 9.--12. " GCDM ,Grey compression pixel diff margin" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8. " LCEn ,Enable line copies" "Disabled,Enabled"
textline " "
bitfld.long 0x00 3.--7. " RLL ,Run length limit in LRLE stage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 2. " GGM ,Green grey mode" "Not used,Used"
textline " "
bitfld.long 0x00 1. " PixDiffG ,Pixel diff margin for green channels" "No difference,Difference"
bitfld.long 0x00 0. " PixDiffRB ,Pixel diff margin for red and blue channels" "No difference,Difference"
rgroup.long 0x8c++0x3
line.long 0x00 "CST,Compression Status"
hexmask.long.byte 0x00 0.--7. 1. " VB ,Number of valid bits in the last word"
group.long 0x90++0x3
line.long 0x00 "DMABASE,Dma Target Address"
rgroup.long 0x94++0x3
line.long 0x00 "DMACOUNT,Dma Transferred Data"
group.long 0x98++0x3
line.long 0x00 "DMALEN,Dma Burst Length"
hexmask.long.byte 0x00 0.--5. 1. " DMANo ,Number of transferred bytes during DMA"
group.long 0xa0++0x3
line.long 0x00 "SDR,SDRAM Initialization Word"
rgroup.long 0xc0++0x3
line.long 0x00 "GPIO_IN,VSC GPIO Input"
bitfld.long 0x00 18. " GPIOIn18 ,GPIO 18 input level" "Low,High"
bitfld.long 0x00 17. " GPIOIn17 ,GPIO 17 input level" "Low,High"
textline " "
bitfld.long 0x00 16. " GPIOIn16 ,GPIO 16 input level" "Low,High"
bitfld.long 0x00 15. " GPIOIn15 ,GPIO 15 input level" "Low,High"
textline " "
bitfld.long 0x00 14. " GPIOIn14 ,GPIO 14 input level" "Low,High"
bitfld.long 0x00 13. " GPIOIn13 ,GPIO 13 input level" "Low,High"
textline " "
bitfld.long 0x00 12. " GPIOIn12 ,GPIO 12 input level" "Low,High"
bitfld.long 0x00 11. " GPIOIn11 ,GPIO 11 input level" "Low,High"
textline " "
bitfld.long 0x00 10. " GPIOIn10 ,GPIO 10 input level" "Low,High"
bitfld.long 0x00 9. " GPIOIn9 ,GPIO 9 input level" "Low,High"
textline " "
bitfld.long 0x00 8. " GPIOIn8 ,GPIO 8 input level" "Low,High"
bitfld.long 0x00 7. " GPIOIn7 ,GPIO 7 input level" "Low,High"
textline " "
bitfld.long 0x00 6. " GPIOIn6 ,GPIO 6 input level" "Low,High"
bitfld.long 0x00 5. " GPIOIn5 ,GPIO 5 input level" "Low,High"
textline " "
bitfld.long 0x00 4. " GPIOIn4 ,GPIO 4 input level" "Low,High"
bitfld.long 0x00 3. " GPIOIn3 ,GPIO 3 input level" "Low,High"
textline " "
bitfld.long 0x00 2. " GPIOIn2 ,GPIO 2 input level" "Low,High"
bitfld.long 0x00 1. " GPIOIn1 ,GPIO 1 input level" "Low,High"
textline " "
bitfld.long 0x00 0. " GPIOIn0 ,GPIO 0 input level" "Low,High"
group.long 0xc4++0xb
line.long 0x00 "GPIO_OUT,VSC GPIO Output"
bitfld.long 0x00 18. " GPIOOut18 ,GPIO 18 output level" "Low,High"
bitfld.long 0x00 17. " GPIOOut17 ,GPIO 17 output level" "Low,High"
textline " "
bitfld.long 0x00 16. " GPIOOut16 ,GPIO 16 output level" "Low,High"
bitfld.long 0x00 15. " GPIOOut15 ,GPIO 15 output level" "Low,High"
textline " "
bitfld.long 0x00 14. " GPIOOut14 ,GPIO 14 output level" "Low,High"
bitfld.long 0x00 13. " GPIOOut13 ,GPIO 13 output level" "Low,High"
textline " "
bitfld.long 0x00 12. " GPIOOut12 ,GPIO 12 output level" "Low,High"
bitfld.long 0x00 11. " GPIOOut11 ,GPIO 11 output level" "Low,High"
textline " "
bitfld.long 0x00 10. " GPIOOut10 ,GPIO 10 output level" "Low,High"
bitfld.long 0x00 9. " GPIOOut9 ,GPIO 9 output level" "Low,High"
textline " "
bitfld.long 0x00 8. " GPIOOut8 ,GPIO 8 output level" "Low,High"
bitfld.long 0x00 7. " GPIOOut7 ,GPIO 7 output level" "Low,High"
textline " "
bitfld.long 0x00 6. " GPIOOut6 ,GPIO 6 output level" "Low,High"
bitfld.long 0x00 5. " GPIOOut5 ,GPIO 5 output level" "Low,High"
textline " "
bitfld.long 0x00 4. " GPIOOut4 ,GPIO 4 output level" "Low,High"
bitfld.long 0x00 3. " GPIOOut3 ,GPIO 3 output level" "Low,High"
textline " "
bitfld.long 0x00 2. " GPIOOut2 ,GPIO 2 output level" "Low,High"
bitfld.long 0x00 1. " GPIOOut1 ,GPIO 1 output level" "Low,High"
textline " "
bitfld.long 0x00 0. " GPIOOut0 ,GPIO 0 output level" "Low,High"
line.long 0x04 "GPIO_OE,VSC GPIO Output Enable"
bitfld.long 0x04 18. " GPIOOutEn18 ,GPIO 18 output enable" "Disabled,Enabled"
bitfld.long 0x04 17. " GPIOOutEn17 ,GPIO 17 output enable" "Disabled,Enabled"
textline " "
bitfld.long 0x04 16. " GPIOOutEn16 ,GPIO 16 output enable" "Disabled,Enabled"
bitfld.long 0x04 15. " GPIOOutEn15 ,GPIO 15 output enable" "Disabled,Enabled"
textline " "
bitfld.long 0x04 14. " GPIOOutEn14 ,GPIO 14 output enable" "Disabled,Enabled"
bitfld.long 0x04 13. " GPIOOutEn13 ,GPIO 13 output enable" "Disabled,Enabled"
textline " "
bitfld.long 0x04 12. " GPIOOutEn12 ,GPIO 12 output enable" "Disabled,Enabled"
bitfld.long 0x04 11. " GPIOOutEn11 ,GPIO 11 output enable" "Disabled,Enabled"
textline " "
bitfld.long 0x04 10. " GPIOOutEn10 ,GPIO 10 output enable" "Disabled,Enabled"
bitfld.long 0x04 9. " GPIOOutEn9 ,GPIO 9 output enable" "Disabled,Enabled"
textline " "
bitfld.long 0x04 8. " GPIOOutEn8 ,GPIO 8 output enable" "Disabled,Enabled"
bitfld.long 0x04 7. " GPIOOutEn7 ,GPIO 7 output enable" "Disabled,Enabled"
textline " "
bitfld.long 0x04 6. " GPIOOutEn6 ,GPIO 6 output enable" "Disabled,Enabled"
bitfld.long 0x04 5. " GPIOOutEn5 ,GPIO 5 output enable" "Disabled,Enabled"
textline " "
bitfld.long 0x04 4. " GPIOOutEn4 ,GPIO 4 output enable" "Disabled,Enabled"
bitfld.long 0x04 3. " GPIOOutEn3 ,GPIO 3 output enable" "Disabled,Enabled"
textline " "
bitfld.long 0x04 2. " GPIOOutEn2 ,GPIO 2 output enable" "Disabled,Enabled"
bitfld.long 0x04 1. " GPIOOutEn1 ,GPIO 1 output enable" "Disabled,Enabled"
textline " "
bitfld.long 0x04 0. " GPIOOutEn0 ,GPIO 0 output enable" "Disabled,Enabled"
line.long 0x08 "GPIO_TRIG,VSC GPIO IRQ Trigger"
bitfld.long 0x08 18. " GPIOTrig18 ,GPIO 18 irq trigger" "Falling edge,Rising edge"
bitfld.long 0x08 17. " GPIOTrig17 ,GPIO 17 irq trigger" "Falling edge,Rising edge"
textline " "
bitfld.long 0x08 16. " GPIOTrig16 ,GPIO 16 irq trigger" "Falling edge,Rising edge"
bitfld.long 0x08 15. " GPIOTrig15 ,GPIO 15 irq trigger" "Falling edge,Rising edge"
textline " "
bitfld.long 0x08 14. " GPIOTrig14 ,GPIO 14 irq trigger" "Falling edge,Rising edge"
bitfld.long 0x08 13. " GPIOTrig13 ,GPIO 13 irq trigger" "Falling edge,Rising edge"
textline " "
bitfld.long 0x08 12. " GPIOTrig12 ,GPIO 12 irq trigger" "Falling edge,Rising edge"
bitfld.long 0x08 11. " GPIOTrig11 ,GPIO 11 irq trigger" "Falling edge,Rising edge"
textline " "
bitfld.long 0x08 10. " GPIOTrig10 ,GPIO 10 irq trigger" "Falling edge,Rising edge"
bitfld.long 0x08 9. " GPIOTrig9 ,GPIO 9 irq trigger" "Falling edge,Rising edge"
textline " "
bitfld.long 0x08 8. " GPIOTrig8 ,GPIO 8 irq trigger" "Falling edge,Rising edge"
bitfld.long 0x08 7. " GPIOTrig7 ,GPIO 7 irq trigger" "Falling edge,Rising edge"
textline " "
bitfld.long 0x08 6. " GPIOTrig6 ,GPIO 6 irq trigger" "Falling edge,Rising edge"
bitfld.long 0x08 5. " GPIOTrig5 ,GPIO 5 irq trigger" "Falling edge,Rising edge"
textline " "
bitfld.long 0x08 4. " GPIOTrig4 ,GPIO 4 irq trigger" "Falling edge,Rising edge"
bitfld.long 0x08 3. " GPIOTrig3 ,GPIO 3 irq trigger" "Falling edge,Rising edge"
textline " "
bitfld.long 0x08 2. " GPIOTrig2 ,GPIO 2 irq trigger" "Falling edge,Rising edge"
bitfld.long 0x08 1. " GPIOTrig1 ,GPIO 1 irq trigger" "Falling edge,Rising edge"
textline " "
bitfld.long 0x08 0. " GPIOTrig0 ,GPIO 0 irq trigger" "Falling edge,Rising edge"
hgroup.long 0xd0++0x3
hide.long 0x00 "GPIO_INTS,VSC GPIO IRQ Status"
in
group.long 0xd4++0x3
line.long 0x00 "GPIO_INTE,VSC GPIO IRQ Enable"
bitfld.long 0x00 18. " GPIOIrqEn18 ,GPIO 18 irq enable" "Disabled,Enabled"
bitfld.long 0x00 17. " GPIOIrqEn17 ,GPIO 17 irq enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16. " GPIOIrqEn16 ,GPIO 16 irq enable" "Disabled,Enabled"
bitfld.long 0x00 15. " GPIOIrqEn15 ,GPIO 15 irq enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 14. " GPIOIrqEn14 ,GPIO 14 irq enable" "Disabled,Enabled"
bitfld.long 0x00 13. " GPIOIrqEn13 ,GPIO 13 irq enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 12. " GPIOIrqEn12 ,GPIO 12 irq enable" "Disabled,Enabled"
bitfld.long 0x00 11. " GPIOIrqEn11 ,GPIO 11 irq enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 10. " GPIOIrqEn10 ,GPIO 10 irq enable" "Disabled,Enabled"
bitfld.long 0x00 9. " GPIOIrqEn9 ,GPIO 9 irq enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 8. " GPIOIrqEn8 ,GPIO 8 irq enable" "Disabled,Enabled"
bitfld.long 0x00 7. " GPIOIrqEn7 ,GPIO 7 irq enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 6. " GPIOIrqEn6 ,GPIO 6 irq enable" "Disabled,Enabled"
bitfld.long 0x00 5. " GPIOIrqEn5 ,GPIO 5 irq enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " GPIOIrqEn4 ,GPIO 4 irq enable" "Disabled,Enabled"
bitfld.long 0x00 3. " GPIOIrqEn3 ,GPIO 3 irq enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 2. " GPIOIrqEn2 ,GPIO 2 irq enable" "Disabled,Enabled"
bitfld.long 0x00 1. " GPIOIrqEn1 ,GPIO 1 irq enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " GPIOIrqEn0 ,GPIO 0 irq enable" "Disabled,Enabled"
width 11.
tree.end
tree.open "Low Pin Count Bus"
tree "LPC Core Registers"
base ad:0x91000000
width 11.
group.byte 0xc0++0x0
line.byte 0x00 "HICR0,Host Interface Control Register 0"
bitfld.byte 0x00 7. " LPC3E ,LPC channel 3 enable" "Disabled,Enabled"
bitfld.byte 0x00 6. " LPC2E ,LPC channel 2 enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " LPC1E ,LPC channel 1 enable" "Disabled,Enabled"
bitfld.byte 0x00 4. " GPIOOE ,GPIO output enable" "Not used,Used"
textline " "
bitfld.byte 0x00 2. " PMEE ,PME output enable" "Disabled,Enabled"
bitfld.byte 0x00 1. " LSMIE ,LSMI output enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 0. " LSCIE ,LSCI output enable" "Disabled,Enabled"
group.byte 0xc4++0x0
line.byte 0x00 "HICR1,Host Interface Control Register 1"
bitfld.byte 0x00 7. " LPCBSY ,LPC busy" "Not busy,Busy"
bitfld.byte 0x00 5. " IRQBSY ,SERIRQ busy" "Not busy,Busy"
textline " "
bitfld.byte 0x00 4. " LRSTB ,LPC software reset bit" "No reset,Reset"
bitfld.byte 0x00 2. " PMEB ,PME output enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " LSMIB ,LSMI output enable" "Disabled,Enabled"
bitfld.byte 0x00 0. " LSCIB ,LSCI output enable" "Disabled,Enabled"
group.byte 0xc8++0x0
line.byte 0x00 "HICR2,Host Interface Control Register 2"
bitfld.byte 0x00 6. " LRST ,LPC reset interrupt flag" "No interrupt,Interrupt"
bitfld.byte 0x00 5. " SDWN ,LPC shutdown interrupt flag" "No interrupt,Interrupt"
textline " "
bitfld.byte 0x00 4. " ABRT ,LPC abort interrupt flag" "No interrupt,Interrupt"
bitfld.byte 0x00 3. " IBFIE3 ,IBFI3 interrupt enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 2. " PMEB ,PME output enable" "Disabled,Enabled"
bitfld.byte 0x00 1. " LSMIB ,LSMI output enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 0. " LSCIB ,LSCI output enable" "Disabled,Enabled"
rgroup.byte 0xcc++0x0
line.byte 0x00 "HICR3,Host Interface Control Register 3"
bitfld.byte 0x00 7. " LFRAME ,/LFRAME pin monitor" "Low,High"
bitfld.byte 0x00 5. " SERIRQ ,SERIRQ pin monitor" "Low,High"
textline " "
bitfld.byte 0x00 4. " LRESET ,/LRESET pin monitor" "Low,High"
bitfld.byte 0x00 3. " LPCPD ,LPCPD pin monitor" "Low,High"
textline " "
bitfld.byte 0x00 2. " PME ,PME pin monitor" "Low,High"
bitfld.byte 0x00 1. " LSMI ,LSMI pin monitor" "Low,High"
textline " "
bitfld.byte 0x00 0. " LSCI ,LSCI pin monitor" "Low,High"
group.byte 0x00++0x0
line.byte 0x00 "HICR4,Host Interface Control Register 4"
bitfld.byte 0x00 7. " LADR12SEL ,Switches the access channel for LADR12H/L" "LADR1,LADR2"
bitfld.byte 0x00 5. " KCSENBL1 ,Enables or disables the KCS interface on channel 1" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 4. " KCSENBL2 ,Enables or disables the KCS interface on channel 2" "Disabled,Enabled"
bitfld.byte 0x00 3. " SWENBL ,Wait duration switch" "Short wait,Long wait"
textline " "
bitfld.byte 0x00 2. " KCSENBL3 ,Enables or disables the KCS interface on channel 3" "Disabled,Enabled"
bitfld.byte 0x00 1. " SMICENBL ,Enables or disables the SMIC interface on channel 3" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 0. " BTENBL ,Enables or disables the BT interface on channel 3" "Disabled,Enabled"
group.byte 0xe0++0x0
line.byte 0x00 "LADR12H,LPC Channel 1,2 Address Register H"
group.byte 0xe4++0x0
line.byte 0x00 "LADR12L,LPC Channel 1,2 Address Register L"
group.byte 0x90++0x0
line.byte 0x00 "LADR3H,LPC Channel 3 Address Register H"
group.byte 0x94++0x0
line.byte 0x00 "LADR3L,LPC Channel 3 Address Register L"
hexmask.byte 0x00 1.--7. 1. " LADR3L ,Channel 3 address bits 7 to 1"
bitfld.byte 0x00 0. " TWRE ,Bidirectional data register enable" "Disabled,Enabled"
rgroup.byte 0xa0++0x0
line.byte 0x00 "IDR1,Input Data Register 1"
rgroup.byte 0xb0++0x0
line.byte 0x00 "IDR2,Input Data Register 2"
rgroup.byte 0x80++0x0
line.byte 0x00 "IDR3,Input Data Register 3"
group.byte 0xa4++0x0
line.byte 0x00 "ODR1,Output Data Register 1"
group.byte 0xb4++0x0
line.byte 0x00 "ODR2,Output Data Register 2"
group.byte 0x84++0x0
line.byte 0x00 "ODR3,Output Data Register 3"
group.byte 0xa8++0x0
line.byte 0x00 "STR1,Status Register 1"
bitfld.byte 0x00 7. " DBU17 ,Defined by user" "Low,High"
bitfld.byte 0x00 6. " DBU16 ,Defined by user" "Low,High"
textline " "
bitfld.byte 0x00 5. " DBU15 ,Defined by user" "Low,High"
bitfld.byte 0x00 4. " DBU14 ,Defined by user" "Low,High"
textline " "
bitfld.byte 0x00 3. " C/D1 ,Command/data" "Data,Command"
bitfld.byte 0x00 2. " DBU12 ,Defined by user" "Low,High"
textline " "
bitfld.byte 0x00 1. " IBF1 ,Input data register full" "No data,Data"
bitfld.byte 0x00 0. " OBF1 ,Output data register full" "No data,Data"
group.byte 0xb8++0x0
line.byte 0x00 "STR2,Status Register 2"
bitfld.byte 0x00 7. " DBU27 ,Defined by user" "Low,High"
bitfld.byte 0x00 6. " DBU26 ,Defined by user" "Low,High"
textline " "
bitfld.byte 0x00 5. " DBU25 ,Defined by user" "Low,High"
bitfld.byte 0x00 4. " DBU24 ,Defined by user" "Low,High"
textline " "
bitfld.byte 0x00 3. " C/D2 ,Command/data" "Data,Command"
bitfld.byte 0x00 2. " DBU22 ,Defined by user" "Low,High"
textline " "
bitfld.byte 0x00 1. " IBF2 ,Input data register full" "No data,Data"
bitfld.byte 0x00 0. " OBF2 ,Output data register full" "No data,Data"
if ((((d.b(ad:(3+0x94)))&0x01)==0x1)||(((d.b(ad:(3+0xbc)))&0x80)==0x0))
;TWRE==1||SELSTR3==0
group.byte 0x88++0x0
line.byte 0x00 "STR3,Status Register 3"
bitfld.byte 0x00 7. " IBF3B ,Receive data in TWR15" "No data,Data"
bitfld.byte 0x00 6. " OBF3B ,Transmit data in TWR15" "No data,Data"
textline " "
bitfld.byte 0x00 5. " MWMF ,Master write mode flag" "Not entered,Entered"
bitfld.byte 0x00 4. " SWMF ,Slave write mode flag" "Not entered,Entered"
textline " "
bitfld.byte 0x00 3. " C/D3 ,Command/data" "Data,Command"
bitfld.byte 0x00 2. " DBU32 ,Defined by user" "Low,High"
textline " "
bitfld.byte 0x00 1. " IBF3A ,Input data register full" "No data,Data"
bitfld.byte 0x00 0. " OBF3A ,Output data register full" "No data,Data"
elif ((((d.b(ad:(3+0x94)))&0x01)==0x0)&&(((d.b(ad:(3+0xbc)))&0x80)==0x01))
;TWRE==0&&SELSTR3==1
group.byte 0x88++0x0
line.byte 0x00 "STR3,Status Register 3"
bitfld.byte 0x00 7. " DBU37 ,Defined by user" "Low,High"
bitfld.byte 0x00 6. " DBU36 ,Defined by user" "Low,High"
textline " "
bitfld.byte 0x00 5. " DBU35 ,Defined by user" "Low,High"
bitfld.byte 0x00 4. " DBU34 ,Defined by user" "Low,High"
textline " "
bitfld.byte 0x00 3. " C/D3 ,Command/data" "Data,Command"
bitfld.byte 0x00 2. " DBU32 ,Defined by user" "Low,High"
textline " "
bitfld.byte 0x00 1. " IBF3A ,Input data register full" "No data,Data"
bitfld.byte 0x00 0. " OBF3A ,Output data register full" "No data,Data"
else
group.byte 0x88++0x0
line.byte 0x00 "STR3,Status Register 3"
endif
group.byte 0x40++0x0
line.byte 0x0 "TWR0,Two-Way Data Registers 0"
group.byte 0x44++0x0
line.byte 0x0 "TWR1,Two-Way Data Registers 1"
group.byte 0x48++0x0
line.byte 0x0 "TWR2,Two-Way Data Registers 2"
group.byte 0x4C++0x0
line.byte 0x0 "TWR3,Two-Way Data Registers 3"
group.byte 0x50++0x0
line.byte 0x0 "TWR4,Two-Way Data Registers 4"
group.byte 0x54++0x0
line.byte 0x0 "TWR5,Two-Way Data Registers 5"
group.byte 0x58++0x0
line.byte 0x0 "TWR6,Two-Way Data Registers 6"
group.byte 0x5C++0x0
line.byte 0x0 "TWR7,Two-Way Data Registers 7"
group.byte 0x60++0x0
line.byte 0x0 "TWR8,Two-Way Data Registers 8"
group.byte 0x64++0x0
line.byte 0x0 "TWR9,Two-Way Data Registers 9"
group.byte 0x68++0x0
line.byte 0x0 "TWR10,Two-Way Data Registers 10"
group.byte 0x6C++0x0
line.byte 0x0 "TWR11,Two-Way Data Registers 11"
group.byte 0x70++0x0
line.byte 0x0 "TWR12,Two-Way Data Registers 12"
group.byte 0x74++0x0
line.byte 0x0 "TWR13,Two-Way Data Registers 13"
group.byte 0x78++0x0
line.byte 0x0 "TWR14,Two-Way Data Registers 14"
group.byte 0x7C++0x0
line.byte 0x0 "TWR15,Two-Way Data Registers 15"
group.byte 0x98++0x0
line.byte 0x00 "SIRQCR0,SERIRQ Control Register 0"
bitfld.byte 0x00 7. " Q/C ,Quiet/continuous mode flag" "Continuous,Quiet"
bitfld.byte 0x00 6. " SELREQ ,Start frame initiation request select" "All interrupts cleared,At least one cleared"
textline " "
bitfld.byte 0x00 5. " IEDIR ,Interrupt enable direct mode" "Conditional on OBF,Controlled by host"
bitfld.byte 0x00 4. " SMIE3B ,Host SMI interrupt enable 3B" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " SMIE3A ,Host SMI interrupt enable 3A" "Disabled,Enabled"
bitfld.byte 0x00 2. " SMIE2 ,Host SMI interrupt enable 2" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " IRQ12E1 ,Host IRQ12 interrupt enable 1" "Disabled,Enabled"
bitfld.byte 0x00 0. " IRQ1E1 ,Host IRQ1 interrupt enable 1" "Disabled,Enabled"
group.byte 0x9c++0x0
line.byte 0x00 "SIRQCR1,SERIRQ Control Register 1"
bitfld.byte 0x00 7. " IRQ11E3 ,Host IRQ11 interrupt enable 3" "Disabled,Enabled"
bitfld.byte 0x00 6. " IRQ10E3 ,Host IRQ10 interrupt enable 3" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " IRQ9E3 ,Host IRQ9 interrupt enable 3" "Disabled,Enabled"
bitfld.byte 0x00 4. " IRQ6E3 ,Host IRQ6 interrupt enable 3" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " IRQ11E2 ,Host IRQ11 interrupt enable 2" "Disabled,Enabled"
bitfld.byte 0x00 2. " IRQ10E2 ,Host IRQ10 interrupt enable 2" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " IRQ9E2 ,Host IRQ9 interrupt enable 2" "Disabled,Enabled"
bitfld.byte 0x00 0. " IRQ6E2 ,Host IRQ6 interrupt enable 2" "Disabled,Enabled"
group.byte 0xd0++0x0
line.byte 0x00 "SIRQCR2,SERIRQ Control Register 2"
bitfld.byte 0x00 7. " IEDIR3 ,Interrupt enable direct mode 3" "OBF depended,Enabled"
group.byte 0xbc++0x0
line.byte 0x00 "HISEL,Host Interface Select Register"
bitfld.byte 0x00 7. " SELSTR3 ,STR3 register function select 3" "Low,High"
bitfld.byte 0x00 6. " SELIRQ11 ,SERIRQ output select" "Low,High"
textline " "
bitfld.byte 0x00 5. " SELIRQ10 ,SERIRQ output select" "Low,High"
bitfld.byte 0x00 4. " SELIRQ9 ,SERIRQ output select" "Low,High"
textline " "
bitfld.byte 0x00 3. " SELIRQ6 ,SERIRQ output select" "Low,High"
bitfld.byte 0x00 2. " SELSMI ,SERIRQ output select" "Low,High"
textline " "
bitfld.byte 0x00 1. " SELIRQ12 ,SERIRQ output select" "Low,High"
bitfld.byte 0x00 0. " SELIRQ1 ,SERIRQ output select" "Low,High"
width 11.
tree.end
tree "BT Mode Registers"
base ad:0x91000000
width 11.
group.byte 0x08++0x0
line.byte 0x00 "BTSR0,BT Status Register 0"
bitfld.byte 0x00 4. " FRDI ,FIFO read request interrupt" "No interrupt,Interrupt"
bitfld.byte 0x00 3. " HRDI ,BT host read interrupt" "No interrupt,Interrupt"
textline " "
bitfld.byte 0x00 2. " HWRI ,BT host write interrupt" "No interrupt,Interrupt"
bitfld.byte 0x00 1. " HBTWI ,BT host read interrupt" "No interrupt,Interrupt"
textline " "
bitfld.byte 0x00 0. " HBTRI ,BT host read end interrupt" "No interrupt,Interrupt"
group.byte 0x0c++0x0
line.byte 0x00 "BTSR1,BT Status Register 1"
bitfld.byte 0x00 6. " HRSTI ,BT reset interrupt" "No interrupt,Interrupt"
bitfld.byte 0x00 5. " IRQCRI ,B2H_IRQ clear interrupt" "No interrupt,Interrupt"
textline " "
bitfld.byte 0x00 4. " BEVTI ,BEVT_AVN clear interrupt" "No interrupt,Interrupt"
bitfld.byte 0x00 3. " B2HI ,Read end interrupt" "No interrupt,Interrupt"
textline " "
bitfld.byte 0x00 2. " H2BI ,Write end interrupt" "No interrupt,Interrupt"
bitfld.byte 0x00 1. " CRRPI ,Read pointer clear interrupt" "No interrupt,Interrupt"
textline " "
bitfld.byte 0x00 0. " CRWPI ,Write pointer clear interrupt" "No interrupt,Interrupt"
group.byte 0x10++0x0
line.byte 0x00 "BTCSR0,BT Control Status Register 0"
bitfld.byte 0x00 4. " FRDIE ,FIFO read request interrupt enable" "Disabled,Enabled"
bitfld.byte 0x00 3. " HRDIE ,BT host read interrupt enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 2. " HWRIE ,BT host write interrupt enable" "Disabled,Enabled"
bitfld.byte 0x00 1. " HBTWIE ,BTDTR host write start interrupt enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 0. " HBTRIE ,BT host read end interrupt enable" "Disabled,Enabled"
group.byte 0x14++0x0
line.byte 0x00 "BTCSR1,BT Control Status Register 1"
bitfld.byte 0x00 7. " RSTRENBL ,Slave reset read enable" "Enabled,Disabled"
bitfld.byte 0x00 6. " HRSTIE ,BT reset interrupt enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " IRQCRIE ,B2H_IRQ clear interrupt enable" "Disabled,Enabled"
bitfld.byte 0x00 4. " BEVTIE ,BEVT_ATN clear interrupt enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " B2HIE ,Read end interrupt enable" "Disabled,Enabled"
bitfld.byte 0x00 2. " H2BIE ,Write end interrupt enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " CRRPIE ,Read pointer clear interrupt enable" "Disabled,Enabled"
bitfld.byte 0x00 0. " CRWPIE ,Write pointer clear interrupt enable" "Disabled,Enabled"
group.byte 0x18++0x0
line.byte 0x00 "BTCR,BT Control Register"
bitfld.byte 0x00 7. " B_BUSY ,BT write transfer busy flag" "Not used,Used"
bitfld.byte 0x00 6. " H_BUSY ,BT read transfer busy flag" "Not used,Used"
textline " "
bitfld.byte 0x00 5. " OEM0 ,User defined" "Low,HIgh"
bitfld.byte 0x00 4. " BEVT_ATN ,Event interrupt" "No interrupt,Interrupt"
textline " "
bitfld.byte 0x00 3. " B2H_ATN ,Slave buffer write end indication flag" "Not finished,Finished"
bitfld.byte 0x00 2. " H2B_ATN ,Host buffer write end indication flag" "Not finished,Finished"
textline " "
bitfld.byte 0x00 1. " CLR_RD_PTR ,Read pointer clear" "Not cleared,Cleared"
bitfld.byte 0x00 0. " CLR_WR_PTR ,Write pointer clear" "Not cleared,Cleared"
group.byte 0x1c++0x0
line.byte 0x00 "BTIMSR,BT Interrupt Mask Register"
bitfld.byte 0x00 7. " BMC_HWRST ,Slave reset" "No reset,Reset"
bitfld.byte 0x00 4. " OEM3 ,User-defined bit" "Low,High"
textline " "
bitfld.byte 0x00 3. " OEM2 ,User-defined bit" "Low,High"
bitfld.byte 0x00 2. " OEM1 ,User-defined bit" "Low,High"
textline " "
bitfld.byte 0x00 1. " B2H_IRQ ,BMC to host interrupt" "No interrupt,Interrupt"
bitfld.byte 0x00 0. " B2H_IRQ_EN ,BMC to host interrupt enable" "Disabled,Enabled"
group.byte 0xd4++0x0
line.byte 0x00 "BTDTR,BT Data Buffer"
rgroup.byte 0xd8++0x0
line.byte 0x00 "BTFVSR0,BT FIFO Valid Size Register 0"
rgroup.byte 0xdc++0x0
line.byte 0x00 "BTFVSR1,BT FIFO Valid Size Register 1"
width 11.
tree.end
tree "SMIC Mode Registers"
base ad:0x91000000
width 11.
group.byte 0x20++0x0
line.byte 0x00 "SMICFLG,SMIC Flag Register"
bitfld.byte 0x00 7. " RX_DATA_RDY ,Read transfer ready" "Not ready,Ready"
bitfld.byte 0x00 6. " TX_DATA_RDY ,Write transfer ready" "Not ready,Ready"
textline " "
bitfld.byte 0x00 4. " SMI ,SMI flag" "Not asserted,Asserted"
bitfld.byte 0x00 3. " SEVT_ATN ,Event flag" "Not detected,Detected"
textline " "
bitfld.byte 0x00 2. " SMS_ATN ,SMS flag" "No message,Message"
bitfld.byte 0x00 0. " BUSY ,SMIC busy" "Not busy,Busy"
group.byte 0x28++0x0
line.byte 0x00 "SMICCSR,SMIC Control Status Register"
group.byte 0x2c++0x0
line.byte 0x00 "SMICDTR,SMIC Data Register"
group.byte 0x30++0x0
line.byte 0x00 "SMICIR0,SMIC Interrupt Register 0"
bitfld.byte 0x00 4. " HDTWI ,Transfer data transmission end interrupt" "No interrupt,Interrupt"
bitfld.byte 0x00 3. " HDTRI ,Transfer data receive end interrupt" "No interrupt,Interrupt"
textline " "
bitfld.byte 0x00 2. " STARI ,Status code receive end interrupt" "No interrupt,Interrupt"
bitfld.byte 0x00 1. " CTLWI ,Control code transmission end interrupt" "No interrupt,Interrupt"
textline " "
bitfld.byte 0x00 0. " BUSYI ,Transfer start interrupt" "No interrupt,Interrupt"
group.byte 0x34++0x0
line.byte 0x00 "SMICIR1,SMIC Interrupt Register 1"
bitfld.byte 0x00 4. " HDTWIE ,Transfer data transmission end interrupt enable" "Disabled,Enabled"
bitfld.byte 0x00 3. " HDTRIE ,Transfer data receive end interrupt enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 2. " STARIE ,Status code receive end interrupt enable" "Disabled,Enabled"
bitfld.byte 0x00 1. " CTLWIE ,Control code transmission end interrupt enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 0. " BUSYIE ,Transfer start interrupt enable" "Disabled,Enabled"
width 11.
tree.end
tree "POST Code Snooping Registers"
base ad:0x91000000
width 11.
group.byte 0x100++0x0
line.byte 0x00 "POST_ADDRH,POST Code Snooping Address Register H"
group.byte 0x104++0x0
line.byte 0x00 "POST_ADDRL,POST Code Snooping Address Register L"
rgroup.byte 0x108++0x0
line.byte 0x00 "POST_FIFO,POST Code Snooping Data Buffer"
width 11.
tree.end
tree "LPC Host Mode Registers"
base ad:0x91000000
width 11.
group.byte 0x10c++0x0
line.byte 0x00 "HOST_DOUT,LPC Host Data Output Register"
group.byte 0x110++0x0
line.byte 0x00 "HOST_ADDR3,LPC Host Address Register 3"
group.byte 0x114++0x0
line.byte 0x00 "HOST_ADDR2,LPC Host Address Register 2"
group.byte 0x118++0x0
line.byte 0x00 "HOST_ADDR1,LPC Host Address Register 1"
group.byte 0x11c++0x0
line.byte 0x00 "HOST_ADDR0,LPC Host Address Register 0"
rgroup.byte 0x120++0x0
line.byte 0x00 "HOST_DIN,LPC Host Data Input Register"
group.byte 0x124++0x0
line.byte 0x00 "HOST_CMD,LPC Host Command Register"
bitfld.byte 0x00 7. " LPCHEn ,LPC host enable" "Disabled,Enabled"
bitfld.byte 0x00 5. " Go ,Start the actual transfer" "Not ready,Started"
textline " "
bitfld.byte 0x00 4. " Read/Write ,Direction of the LPC host transfer" "Write,Read"
rgroup.byte 0x128++0x0
line.byte 0x00 "HOST_STS,LPC Host Status Register"
bitfld.byte 0x00 7. " BP ,BIOS POST code snooper FIFO empty" "Not empty,Empty"
bitfld.byte 0x00 2. " BV ,Busy valid" "Busy,Not busy"
textline " "
bitfld.byte 0x00 1. " ERR ,Error" "No error,Error"
bitfld.byte 0x00 0. " BSY ,LPC host transfer busy" "Not busy,Busy"
width 11.
tree.end
tree "Virtual UART1"
base ad:0x91000140
width 18.
if (((d.b(ad:(0x91000140+0xc)))&0x80)==0x0)
;DLAB==0
hgroup.byte 0x00++0x00
hide.byte 0x00 "RBR1,Receiver buffer register"
in
group.byte 0x04++0x0
line.byte 0x00 "IER1,Interrupt Enable Register"
bitfld.byte 0x00 3. " MODEMStatus ,Enables the modem status interrupt" "Disabled,Enabled"
bitfld.byte 0x00 2. " ReceiverLineStatus ,Enables the receiver line status interrupt" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " THREmpty ,Enables the transmitter holding register empty interrupt" "Disabled,Enabled"
bitfld.byte 0x00 0. " ReceiverDataAvailable ,Enables the received data available interrupt" "Disabled,Enabled"
group.byte 0x08++0x0
line.byte 0x00 "IIR1,Interrupt Identification Register"
bitfld.byte 0x00 6.--7. " FMEn ,FIFO mode enable" "00,01,10,11"
bitfld.byte 0x00 4. " FF ,TX FIFO full" "Not full,Full"
textline " "
bitfld.byte 0x00 3. " FO ,FIFO mode only" "Disabled,Enabled"
bitfld.byte 0x00 1.--2. " IIC ,Interrupt Identification Code" "Fourth,Third,Second,Highest"
textline " "
bitfld.byte 0x00 0. " IP ,Interrupt Pending" "Enabled,Disabled"
else
group.byte 0x00++0x0
line.byte 0x00 "DLL1,Baud Rate Divisor Latch LSB"
group.byte 0x04++0x0
line.byte 0x00 "DLM1,Baud Rate Divisor Latch MSB"
group.byte 0x08++0x0
line.byte 0x00 "PSR,Prescaler Register"
bitfld.byte 0x00 0.--4. " PSR ,Prescaler value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
if (((d.b(ad:(0x91000140+0xc)))&0x3)==0x0)
group.byte 0x0c++0x00
line.byte 0x00 "LCR1,Line Control Register 1"
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "No access,Access"
bitfld.byte 0x00 6. " SB ,Breaks the transmission to the receiving UART" "No break,Break"
textline " "
bitfld.byte 0x00 5. " SP ,Stick Parity" "Disabled,Enabled"
bitfld.byte 0x00 4. " EP ,Even parity select bit" "Odd,Even"
textline " "
bitfld.byte 0x00 3. " PEn ,Parity enable bit" "Disabled,Enabled"
bitfld.byte 0x00 2. " Stop ,The number of stop bits to be transmitted" "1,1.5"
textline " "
bitfld.byte 0x00 0.--1. " WL[1:0] ,Word length of the data being transmitted and received" "5 bits,6 bits,7 bits,8 bits"
else
group.byte 0x0c++0x00
line.byte 0x00 "LCR1,Line Control Register 1"
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "No access,Access"
bitfld.byte 0x00 6. " SB ,Breaks the transmission to the receiving UART" "No break,Break"
textline " "
bitfld.byte 0x00 5. " SP ,Stick Parity" "Disabled,Enabled"
bitfld.byte 0x00 4. " EP ,Even parity select bit" "Odd,Even"
textline " "
bitfld.byte 0x00 3. " PEn ,Parity enable bit" "Disabled,Enabled"
bitfld.byte 0x00 2. " Stop ,The number of stop bits to be transmitted" "1,2"
textline " "
bitfld.byte 0x00 0.--1. " WL[1:0] ,Word length of the data being transmitted and received" "5 bits,6 bits,7 bits,8 bits"
endif
group.byte 0x10++0x0
line.byte 0x00 "MCR1,Modem Controller Register 1"
bitfld.byte 0x00 6. " Out3 ,General purpose output io_irda_nout3" "Low,High"
bitfld.byte 0x00 5. " DM2 ,UART/SIR DMA mode" "Low,High"
textline " "
bitfld.byte 0x00 4. " Loop ,Loopback mode control bit" "Low,High"
bitfld.byte 0x00 3. " Out2 ,General purpose, active low, output io_irda_nout2" "Low,High"
textline " "
bitfld.byte 0x00 2. " Out1 ,General purpose, active low, output io_irda_nout1" "Low,High"
bitfld.byte 0x00 1. " RTS ,'Request to send' active low output" "Low,High"
textline " "
bitfld.byte 0x00 0. " DTR ,'Data terminal ready' active low output io_irda_ndtr" "Low,High"
hgroup.byte 0x14++0x0
hide.byte 0x00 "LSR1,Line Status Register 1"
in
wgroup.byte 0x14++0x0
line.byte 0x00 "TST1,Testing Register 1"
bitfld.byte 0x00 4. " TEST_CRC_ERR ,Incorrect CRC during FIR transmission" "No test,Test"
bitfld.byte 0x00 3. " TEST_PHY_ERR ,Incorrect 4PPM encoding chips during FIR transmission" "No test,Test"
textline " "
bitfld.byte 0x00 2. " TEST_BAUDGEN ,Improve baud generator toggle rate" "No test,Test"
bitfld.byte 0x00 1. " TEST_FRM_ERR ,Logic 0 STOP bit during UART transmission" "No test,Test"
textline " "
bitfld.byte 0x00 0. " TEST_PAR_ERR ,Incorrect parity during UART transmission" "No test,Test"
rgroup.byte 0x18++0x0
line.byte 0x00 "MSR1,Modem Status Register 1"
bitfld.byte 0x00 7. " DCD ,Data Carrier Detect" "Not occurred,Occurred"
bitfld.byte 0x00 6. " RI ,Ring Indicator" "Not occurred,Occurred"
textline " "
bitfld.byte 0x00 5. " DSR ,Data Set Ready" "Not occurred,Occurred"
bitfld.byte 0x00 4. " CTS ,Clear To Send" "Not occurred,Occurred"
textline " "
bitfld.byte 0x00 3. " DDCD ,The delta-DCD flag" "Not changed,Changed"
bitfld.byte 0x00 2. " TE ,Trailing edge R1" "Not detected,Detected"
textline " "
bitfld.byte 0x00 1. " DDSR ,Delta DSR" "Not changed,Changed"
bitfld.byte 0x00 0. " DCTS ,Delta CTS" "Not changed,Changed"
group.byte 0x1c++0x0
line.byte 0x00 "SPR1,Scratch Pad Register 1"
hexmask.byte 0x00 1.--7. 1. " UD ,User Data"
bitfld.byte 0x00 0. " RS485En ,RS485 RTS Enable" "Disabled,Enabled"
group.byte 0x40++0x0
line.byte 0x00 "UART1H,UART1 LPC Base Address Register H"
group.byte 0x44++0x0
line.byte 0x00 "UART1L,UART1 LPC Base Address Register L"
group.byte 0x48++0x0
line.byte 0x00 "UART1_SIRQ_SELH,LPC Virtual UART1 SERIRQ Select H"
bitfld.byte 0x00 7. " IRQ15En ,UART1 IRQ 15 enable" "Disabled,Enabled"
bitfld.byte 0x00 6. " IRQ14En ,UART1 IRQ 14 enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " IRQ13En ,UART1 IRQ 13 enable" "Disabled,Enabled"
bitfld.byte 0x00 4. " IRQ12En ,UART1 IRQ 12 enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " IRQ11En ,UART1 IRQ 11 enable" "Disabled,Enabled"
bitfld.byte 0x00 2. " IRQ10En ,UART1 IRQ 10 enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " IRQ9En ,UART1 IRQ 9 enable" "Disabled,Enabled"
bitfld.byte 0x00 0. " IRQ8En ,UART1 IRQ 8 enable" "Disabled,Enabled"
group.byte 0x4c++0x0
line.byte 0x00 "UART1_SIRQ_SELL,LPC Virtual UART1 SERIRQ Select L"
bitfld.byte 0x00 7. " IRQ7En ,UART1 IRQ 7 enable" "Disabled,Enabled"
bitfld.byte 0x00 6. " IRQ6En ,UART1 IRQ 6 enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " IRQ5En ,UART1 IRQ 5 enable" "Disabled,Enabled"
bitfld.byte 0x00 4. " IRQ4En ,UART1 IRQ 4 enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " IRQ3En ,UART1 IRQ 3 enable" "Disabled,Enabled"
bitfld.byte 0x00 2. " IRQ2En ,UART1 IRQ 2 enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " IRQ1En ,UART1 IRQ 1 enable" "Disabled,Enabled"
bitfld.byte 0x00 0. " IRQ0En ,UART1 IRQ 0 enable" "Disabled,Enabled"
width 11.
tree.end
tree "Virtual UART2"
base ad:0x910001c0
width 18.
if (((d.b(ad:(0x910001c0+0xc)))&0x80)==0x0)
;DLAB==0
hgroup.byte 0x00++0x00
hide.byte 0x00 "RBR2,Receiver buffer register"
in
group.byte 0x04++0x0
line.byte 0x00 "IER2,Interrupt Enable Register"
bitfld.byte 0x00 3. " MODEMStatus ,Enables the modem status interrupt" "Disabled,Enabled"
bitfld.byte 0x00 2. " ReceiverLineStatus ,Enables the receiver line status interrupt" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " THREmpty ,Enables the transmitter holding register empty interrupt" "Disabled,Enabled"
bitfld.byte 0x00 0. " ReceiverDataAvailable ,Enables the received data available interrupt" "Disabled,Enabled"
group.byte 0x08++0x0
line.byte 0x00 "IIR2,Interrupt Identification Register"
bitfld.byte 0x00 6.--7. " FMEn ,FIFO mode enable" "00,01,10,11"
bitfld.byte 0x00 4. " FF ,TX FIFO full" "Not full,Full"
textline " "
bitfld.byte 0x00 3. " FO ,FIFO mode only" "Disabled,Enabled"
bitfld.byte 0x00 1.--2. " IIC ,Interrupt Identification Code" "Fourth,Third,Second,Highest"
textline " "
bitfld.byte 0x00 0. " IP ,Interrupt Pending" "Enabled,Disabled"
else
group.byte 0x00++0x0
line.byte 0x00 "DLL2,Baud Rate Divisor Latch LSB"
group.byte 0x04++0x0
line.byte 0x00 "DLM2,Baud Rate Divisor Latch MSB"
group.byte 0x08++0x0
line.byte 0x00 "PSR,Prescaler Register"
bitfld.byte 0x00 0.--4. " PSR ,Prescaler value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
if (((d.b(ad:(0x910001c0+0xc)))&0x3)==0x0)
group.byte 0x0c++0x00
line.byte 0x00 "LCR2,Line Control Register 2"
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "No access,Access"
bitfld.byte 0x00 6. " SB ,Breaks the transmission to the receiving UART" "No break,Break"
textline " "
bitfld.byte 0x00 5. " SP ,Stick Parity" "Disabled,Enabled"
bitfld.byte 0x00 4. " EP ,Even parity select bit" "Odd,Even"
textline " "
bitfld.byte 0x00 3. " PEn ,Parity enable bit" "Disabled,Enabled"
bitfld.byte 0x00 2. " Stop ,The number of stop bits to be transmitted" "1,1.5"
textline " "
bitfld.byte 0x00 0.--1. " WL[1:0] ,Word length of the data being transmitted and received" "5 bits,6 bits,7 bits,8 bits"
else
group.byte 0x0c++0x00
line.byte 0x00 "LCR2,Line Control Register 2"
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "No access,Access"
bitfld.byte 0x00 6. " SB ,Breaks the transmission to the receiving UART" "No break,Break"
textline " "
bitfld.byte 0x00 5. " SP ,Stick Parity" "Disabled,Enabled"
bitfld.byte 0x00 4. " EP ,Even parity select bit" "Odd,Even"
textline " "
bitfld.byte 0x00 3. " PEn ,Parity enable bit" "Disabled,Enabled"
bitfld.byte 0x00 2. " Stop ,The number of stop bits to be transmitted" "1,2"
textline " "
bitfld.byte 0x00 0.--1. " WL[1:0] ,Word length of the data being transmitted and received" "5 bits,6 bits,7 bits,8 bits"
endif
group.byte 0x10++0x0
line.byte 0x00 "MCR2,Modem Controller Register 2"
bitfld.byte 0x00 6. " Out3 ,General purpose output io_irda_nout3" "Low,High"
bitfld.byte 0x00 5. " DM2 ,UART/SIR DMA mode" "Low,High"
textline " "
bitfld.byte 0x00 4. " Loop ,Loopback mode control bit" "Low,High"
bitfld.byte 0x00 3. " Out2 ,General purpose, active low, output io_irda_nout2" "Low,High"
textline " "
bitfld.byte 0x00 2. " Out1 ,General purpose, active low, output io_irda_nout1" "Low,High"
bitfld.byte 0x00 1. " RTS ,'Request to send' active low output" "Low,High"
textline " "
bitfld.byte 0x00 0. " DTR ,'Data terminal ready' active low output io_irda_ndtr" "Low,High"
hgroup.byte 0x14++0x0
hide.byte 0x00 "LSR2,Line Status Register 2"
in
wgroup.byte 0x14++0x0
line.byte 0x00 "TST2,Testing Register 2"
bitfld.byte 0x00 4. " TEST_CRC_ERR ,Incorrect CRC during FIR transmission" "No test,Test"
bitfld.byte 0x00 3. " TEST_PHY_ERR ,Incorrect 4PPM encoding chips during FIR transmission" "No test,Test"
textline " "
bitfld.byte 0x00 2. " TEST_BAUDGEN ,Improve baud generator toggle rate" "No test,Test"
bitfld.byte 0x00 1. " TEST_FRM_ERR ,Logic 0 STOP bit during UART transmission" "No test,Test"
textline " "
bitfld.byte 0x00 0. " TEST_PAR_ERR ,Incorrect parity during UART transmission" "No test,Test"
rgroup.byte 0x18++0x0
line.byte 0x00 "MSR2,Modem Status Register 2"
bitfld.byte 0x00 7. " DCD ,Data Carrier Detect" "Not occurred,Occurred"
bitfld.byte 0x00 6. " RI ,Ring Indicator" "Not occurred,Occurred"
textline " "
bitfld.byte 0x00 5. " DSR ,Data Set Ready" "Not occurred,Occurred"
bitfld.byte 0x00 4. " CTS ,Clear To Send" "Not occurred,Occurred"
textline " "
bitfld.byte 0x00 3. " DDCD ,The delta-DCD flag" "Not changed,Changed"
bitfld.byte 0x00 2. " TE ,Trailing edge R1" "Not detected,Detected"
textline " "
bitfld.byte 0x00 1. " DDSR ,Delta DSR" "Not changed,Changed"
bitfld.byte 0x00 0. " DCTS ,Delta CTS" "Not changed,Changed"
group.byte 0x1c++0x0
line.byte 0x00 "SPR2,Scratch Pad Register 2"
hexmask.byte 0x00 1.--7. 1. " UD ,User Data"
bitfld.byte 0x00 0. " RS485En ,RS485 RTS Enable" "Disabled,Enabled"
group.byte 0x40++0x0
line.byte 0x00 "UART2H,UART2 LPC Base Address Register H"
group.byte 0x44++0x0
line.byte 0x00 "UART2L,UART2 LPC Base Address Register L"
group.byte 0x48++0x0
line.byte 0x00 "UART2_SIRQ_SELH,LPC Virtual UART2 SERIRQ Select H"
bitfld.byte 0x00 7. " IRQ15En ,UART2 IRQ 15 enable" "Disabled,Enabled"
bitfld.byte 0x00 6. " IRQ14En ,UART2 IRQ 14 enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " IRQ13En ,UART2 IRQ 13 enable" "Disabled,Enabled"
bitfld.byte 0x00 4. " IRQ12En ,UART2 IRQ 12 enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " IRQ11En ,UART2 IRQ 11 enable" "Disabled,Enabled"
bitfld.byte 0x00 2. " IRQ10En ,UART2 IRQ 10 enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " IRQ9En ,UART2 IRQ 9 enable" "Disabled,Enabled"
bitfld.byte 0x00 0. " IRQ8En ,UART2 IRQ 8 enable" "Disabled,Enabled"
group.byte 0x4c++0x0
line.byte 0x00 "UART2_SIRQ_SELL,LPC Virtual UART2 SERIRQ Select L"
bitfld.byte 0x00 7. " IRQ7En ,UART2 IRQ 7 enable" "Disabled,Enabled"
bitfld.byte 0x00 6. " IRQ6En ,UART2 IRQ 6 enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 5. " IRQ5En ,UART2 IRQ 5 enable" "Disabled,Enabled"
bitfld.byte 0x00 4. " IRQ4En ,UART2 IRQ 4 enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 3. " IRQ3En ,UART2 IRQ 3 enable" "Disabled,Enabled"
bitfld.byte 0x00 2. " IRQ2En ,UART2 IRQ 2 enable" "Disabled,Enabled"
textline " "
bitfld.byte 0x00 1. " IRQ1En ,UART2 IRQ 1 enable" "Disabled,Enabled"
bitfld.byte 0x00 0. " IRQ0En ,UART2 IRQ 0 enable" "Disabled,Enabled"
width 11.
tree.end
tree.end
textline ""
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