8767 lines
569 KiB
Plaintext
8767 lines
569 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: IXP2800 with XScale-Core On chip peripherals
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; @Props:
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; @Author: -
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; @Changelog:
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; @Manufacturer:
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; @Doc:
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; @Core:
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; @Chip:
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; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: peri2800.per 16518 2023-08-17 13:49:43Z kwisniewski $
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config 16. 8.
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width 8.
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;begin include file xscale/cp15.ph
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;parameters:
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; --------------------------------------------------------------------------------
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; 80200, 80321, IXP2400, IXP2800, PXA210, PXA250, PXA800F
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; not impl.: IXP425, IXP2850, IXC1100, Bulverde
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tree "CP15"
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; State: ok
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; --------------------------------------------------------------------------------
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; --------------------------------------------------------------------------------
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; *** Intel 80200 ***
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; --------------------------------------------------------------------------------
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if (d.l(c15:0x0)&0xffffe3f0)==0x69052000
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "80200,80200"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,A-1,B-0,C-0,D-0,res,res,res,res,res,res,res,res,res,res,res"
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; --------------------------------------------------------------------------------
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; *** Intel 80321 or IOP321 (Verde) ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69052020||(d.l(c15:0x0)&0xffffe3f0)==0x69052030
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "80321 (400MHz),80321 (600MHz)"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,B-0,B-1,res,res,res,res,res,res,res,res,res,res,res,res,res"
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; --------------------------------------------------------------------------------
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; *** Intel 80331 or IOP331 (Dobson) ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69054090
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "80331,80331"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-1,res,res,res,B-0,res,C-0,C-1,res,res,D-0,res,res,res,res,res"
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; --------------------------------------------------------------------------------
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; *** Intel 80332 or IOP332 ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69054010
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "80332,80332"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-1/A-2,res,res,res,B-0,res,C-0,C-1,res,res,D-0,res,res,res,res,res"
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; --------------------------------------------------------------------------------
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; *** Intel PXA210 (Sabinal), PXA250 (Cotulla) ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100||(d.l(c15:0x0)&0xffffe3f0)==0x69052120
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 5.--5. "ProdNum ,Product Number" "PXA250,PXA210"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,A-1,B-0,B-1,B-2,C-0,res,res,res,res,res,res,res,res,res,res"
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; --------------------------------------------------------------------------------
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; *** Intel PXA27x (Bulverde) ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69054110
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 5.--5. "ProdNum ,Product Number" "PXA27x,PXA27x"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,A-1,B-0,B-1,C-0,res,res,C-5,res,res,res,res,res,res,res,res"
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; --------------------------------------------------------------------------------
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; *** Intel IXP2400 (Sausolito), IXP2800 (Castine) ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x69054190||(d.l(c15:0x0)&0xffffe3f0)==0x690541a0
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 12.--15. "CoreGen ,Core Generation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 8.--11. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
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textline " "
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bitfld.long 0x0 4.--7. "ProdNum ,Product Number" "res,res,res,res,res,res,res,res,res,IXP2400,IXP2800,res,res,res,res,res"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
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; --------------------------------------------------------------------------------
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; *** Intel PXA800F (Manitoba) ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x690540a0
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 5.--5. "ProdNum ,Product Number" "PXA800F,PXA800F"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res"
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; --------------------------------------------------------------------------------
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; *** Intel IXP4xx, IXC1100 ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe3f0)==0x690541f0
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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bitfld.long 0x0 5.--5. "ProdNum ,Product Number" "IXP4xx/IXC1100,IXP4xx/IXC1100"
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bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res"
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; --------------------------------------------------------------------------------
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; *** other Intel XScale V5TE ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe000)==0x69052000
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--23. " Arch ,Architecture Version" ",V4,V4T,V5,V5T,V5TE,?..."
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textline " "
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bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
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textline " "
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hexmask.long 0x0 4.--9. 1. "ProdNum ,Product Number"
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hexmask.long 0x0 0.--3. 1. " ProdRev ,Product Revision"
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; --------------------------------------------------------------------------------
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; *** other Intel XScale V5TE ***
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; --------------------------------------------------------------------------------
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elif (d.l(c15:0x0)&0xffffe000)==0x69054000
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
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bitfld.long 0x0 16.--23. " Arch ,Architecture Version" ",V4,V4T,V5,V5T,V5TE,?..."
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textline " "
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bitfld.long 0x0 12.--12. "CoreGen ,Core Generation" "XScale,XScale"
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bitfld.long 0x0 8.--11. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
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textline " "
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hexmask.long 0x0 4.--7. 1. "ProdNum ,Product Number"
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hexmask.long 0x0 0.--3. 1. " ProdRev ,Product Revision"
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; --------------------------------------------------------------------------------
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; *** any else ***
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; --------------------------------------------------------------------------------
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else
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group c15:0x0--0x0
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line.long 0x0 "ID,ID Register (read only)"
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; 0x41 = ARM, 0x44 = Digital, 0x69 = Intel
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hexmask.long 0x0 24.--31. 1. "Implementor ,Implementation Trademark"
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hexmask.long 0x0 20.--23. 1. " Variant ,Implementation defined variant number"
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textline " "
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hexmask.long 0x0 16.--19. 1. "Architecture ,Architecture Version Code"
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hexmask.long 0x0 13.--15. 1. " Primary part number ,Core Generation"
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textline " "
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hexmask.long 0x0 0.--3. 1. "Revision ,Product Revision"
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endif
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; --------------------------------------------------------------------------------
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group c15:0x100--0x100
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line.long 0x0 "CTYPE,Cache Type Register (read only)"
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bitfld.long 0x0 25.--28. "CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
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bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes"
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textline " "
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bitfld.long 0x0 18.--20. "DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k"
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bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128"
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bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16"
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textline " "
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bitfld.long 0x0 6.--8. "ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k"
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bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128"
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bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16"
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group c15:0x1--0x1
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line.long 0x0 "CR,Control Register"
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bitfld.long 0x0 13. "V ,Exception Vector Relocation" "0x00000000,0xffff0000"
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bitfld.long 0x0 12. " I ,Instruction Cache" "disable,enable"
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bitfld.long 0x0 11. " Z ,Branch Target Buffer" "disable,enable"
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bitfld.long 0x0 9. " R ,ROM Protection" "off,on"
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bitfld.long 0x0 8. " S ,System Protection" "off,on"
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textline " "
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bitfld.long 0x0 7. "B ,Endianism" "little,big"
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bitfld.long 0x0 2. " C ,Data Cache" "disable,enable"
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bitfld.long 0x0 1. " A ,Alignment Fault" "disable,enable"
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bitfld.long 0x0 0. " M ,Memory Management Unit" "disable,enable"
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group c15:0x101--0x101
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line.long 0x0 "AuxCR,Auxiliary Control Register"
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bitfld.long 0x0 4.--5. "MD ,Mini Data Cache Attributes" "write back - read allocate,write back - read/write allocate,write through - read allocate,unpredictable"
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bitfld.long 0x0 1. " P ,Page Table Memory Attribute" "0,1"
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bitfld.long 0x0 0. " K ,Write Buffer Coalescing Disable" "enable,disable"
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group c15:0x2--0x2
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line.long 0x0 "TTB,Translation Table Base Register"
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hexmask.long 0x0 14.--31. 0x4000 "TTBA ,Translation Table Base Address"
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group c15:0x3--0x3
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line.long 0x0 "DAC,Domain Access Control Register"
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bitfld.long 0x0 30.--31. "D15 ,Domain Access 15" "no access,client,reserved,manager"
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bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "no access,client,reserved,manager"
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bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "no access,client,reserved,manager"
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bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "no access,client,reserved,manager"
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textline " "
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bitfld.long 0x0 22.--23. "D11 ,Domain Access 11" "no access,client,reserved,manager"
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bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "no access,client,reserved,manager"
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bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "no access,client,reserved,manager"
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bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "no access,client,reserved,manager"
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textline " "
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bitfld.long 0x0 14.--15. "D7 ,Domain Access 7" "no access,client,reserved,manager"
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bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "no access,client,reserved,manager"
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bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "no access,client,reserved,manager"
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bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "no access,client,reserved,manager"
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textline " "
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bitfld.long 0x0 6.--7. "D3 ,Domain Access 3" "no access,client,reserved,manager"
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bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "no access,client,reserved,manager"
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bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "no access,client,reserved,manager"
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bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "no access,client,reserved,manager"
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group c15:0x5--0x5
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line.long 0x0 "FSR,Fault Status Register"
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bitfld.long 0x0 10. "X ,Status Field Extension" "0,1"
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bitfld.long 0x0 9. " D ,Debug event" "no,yes"
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bitfld.long 0x0 4.--7. " Domain ,Domain for Data Abort" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0.--3. " Status ,Status X=0/X=1" "reserved/IMMU Exception,alignment/reserved,reserved,alignment/reserved,reserved/lock abort,transl_sect/reserved,reserved/external,transl_page,reserved/cache parity,domain_sect/reserved,reserved,domain_page,trans_lev_1/reserved,permission_sect/reserved,trans_lev_2/reserved,permission_page"
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group c15:0x6--0x6
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line.long 0x0 "FAR,Fault Address Registerr"
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group c15:0x29--0x29
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line.long 0x0 "DCLR, Data Cache Lock Register"
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bitfld.long 0x0 0. "L ,Data Cache Lock Register" "no locking,fill with lock"
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group c15:0xd--0xd
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line.long 0x0 "PID,Process Identifier"
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hexmask.long 0x0 25.--31. 0x2000000 "PID ,Process Identifier"
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group c15:0x8e--0x8e
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line.long 0x0 "IBCR0,Inctruction Breakpoint Register 0"
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hexmask.long 0x0 1.--31. 2. "MVA ,Instruction Breakpoint MVA"
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bitfld.long 0x0 0. " E ,Breakpoint Enable" "disable,enable"
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group c15:0x9e--0x9e
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line.long 0x0 "IBCR1,Inctruction Breakpoint Register 1"
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hexmask.long 0x0 1.--31. 2. "MVA ,Instruction Breakpoint MVA"
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bitfld.long 0x0 0. " E ,Breakpoint Enable" "disable,enable"
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group c15:0x0e--0x0e
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line.long 0x0 "DBR0,Data Breakpoint Register 0"
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group c15:0x3e--0x3e
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line.long 0x0 "DBR1,Data Breakpoint Register 1"
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group c15:0x4e--0x4e
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line.long 0x0 "DBCON,Data Breakpoint Configuration Register"
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bitfld.long 0x0 8. "M ,DBR1 Mode" "Data Breakpoint Address,Data Address Mask"
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bitfld.long 0x0 2.--3. " E1 ,DBR1 Breakpoint Enable" "disable,enable store,enable load/store,enable load"
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bitfld.long 0x0 0.--1. " E0 ,DBR0 Enable" "disable,enable store,enable load/store,enable load"
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; --------------------------------------------------------------------------------
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; *** Intel 80200 ***
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; --------------------------------------------------------------------------------
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if (d.l(c15:0x0)&0xffffe3f0)==0x69052000
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group c15:0x1f--0x1f
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line.long 0x0 "CPAR,Coprocessor Access Register"
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bitfld.long 0x0 13. "CP13 ,Coprocessor Access Rights" "denied,allowed"
|
|
bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel 80321 (IOP321) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052020||(d.l(c15:0x0)&0xffffe3f0)==0x69052030
|
|
group c15:0x1f--0x1f
|
|
line.long 0x0 "CPAR,Coprocessor Access Register"
|
|
bitfld.long 0x0 13. "CP13 ,Coprocessor Access Rights" "denied,allowed"
|
|
bitfld.long 0x0 7. " CP7 ,Coprocessor Access Rights" "denied,allowed"
|
|
bitfld.long 0x0 6. " CP6 ,Coprocessor Access Rights" "denied,allowed"
|
|
bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel PXA210, PXA250 (Sabinal, Cotulla) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100||(d.l(c15:0x0)&0xffffe3f0)==0x69052120
|
|
group c15:0x1f--0x1f
|
|
line.long 0x0 "CPAR,Coprocessor Access Register"
|
|
bitfld.long 0x0 7. "CP7 ,Coprocessor Access Rights" "denied,allowed"
|
|
bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel PXA27x (Bulverde) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69054110
|
|
group c15:0x1f--0x1f
|
|
line.long 0x0 "CPAR,Coprocessor Access Register"
|
|
bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
bitfld.long 0x0 1. "CP1 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel (Manitoba) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x690540a0
|
|
group c15:0x1f--0x1f
|
|
line.long 0x0 "CPAR,Coprocessor Access Register"
|
|
bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel IXP2400, IXP2800 (Sausolito, Castine) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69054190||(d.l(c15:0x0)&0xffff41a0)==0x69052120
|
|
group c15:0x1f--0x1f
|
|
line.long 0x0 "CPAR,Coprocessor Access Register"
|
|
bitfld.long 0x0 7. "CP7 ,Coprocessor Access Rights" "denied,allowed"
|
|
bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
; *** other Intel XScale V5TE ***
|
|
; *** includes XScale IXP425, because no product ID is available now ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe000)==0x69054000
|
|
group c15:0x1f--0x1f
|
|
line.long 0x0 "CPAR,Coprocessor Access Register"
|
|
bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
; *** other Intel XScale V5TE ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe000)==0x69052000
|
|
group c15:0x1f--0x1f
|
|
line.long 0x0 "CPAR,Coprocessor Access Register"
|
|
bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
; *** any else ***
|
|
; --------------------------------------------------------------------------------
|
|
else
|
|
group c15:0x1f--0x1f
|
|
line.long 0x0 "CPAR,Coprocessor Access Register"
|
|
bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
|
|
; --------------------------------------------------------------------------------
|
|
endif
|
|
tree.end
|
|
;end include file xscale/cp15.ph
|
|
;begin include file xscale/cp14.ph
|
|
;parameters:
|
|
; --------------------------------------------------------------------------------
|
|
; 80200, PXA210, PXA250
|
|
; not impl.: 80321, IXP425, IXP2400, IXP2800, Bulverde, Manitoba
|
|
tree "CP14"
|
|
; State: preliminary
|
|
; --------------------------------------------------------------------------------
|
|
group c14:0x00--0x03 "Performance Monitoring"
|
|
line.long 4*0x00 "PMNC, Performance Monitor control Register"
|
|
bitfld.long 4*0x00 20.--27. "EvtCnt1 ,Source of Events that PMN1 counts" "IC miss ext,IC no inst,Data stall,ITLB miss,DTLB miss,Branch,Branch mispr,Inst exec,DC full every,DC full once,DC acc,DC miss,DC wback,SW changed PC,res,res,BCU requ,BCU que full,BCU que drain,res,unlogged ECC,BCU 1-bit err,RMW,?..."
|
|
bitfld.long 4*0x00 12.--19. " EvtCnt0 ,Source of Events that PMN0 counts" "IC miss ext,IC no inst,Data stall,ITLB miss,DTLB miss,Branch,Branch mispr,Inst exec,DC full every,DC full once,DC acc,DC miss,DC wback,SW changed PC,res,res,BCU requ,BCU que full,BCU que drain,res,unlogged ECC,BCU 1-bit err,RMW,?..."
|
|
textline " "
|
|
bitfld.long 4*0x00 10. "CCNT-OV ,Clock Counter Overflow Flag" "no,yes"
|
|
bitfld.long 4*0x00 9. " PMN1-OV ,Performace Counter 1 Overflow Flag" "no,yes"
|
|
bitfld.long 4*0x00 8. " PMN0-OV ,Performace Counter 0 Overflow Flag" "no,yes"
|
|
textline " "
|
|
bitfld.long 4*0x00 6. "CCNT-IE ,Clock Counter Interrupt" "disable,enable"
|
|
bitfld.long 4*0x00 5. " PMN1-IE ,Performace Counter 1 Interrupt" "disable,enable"
|
|
bitfld.long 4*0x00 4. " PMN0-IE ,Performace Counter 0 Interrupt" "disable,enable"
|
|
textline " "
|
|
bitfld.long 4*0x00 3. "D ,Clock Count Divider" "1,64"
|
|
bitfld.long 4*0x00 2. " C ,Clock Counter Reset" "no action,reset to 0"
|
|
bitfld.long 4*0x00 1. " P ,Performace Counter Reset (both)" "no action,reset to 0"
|
|
bitfld.long 4*0x00 0. " E ,Enable all 3 Counters" "disable,enable"
|
|
line.long 4*0x01 "CCNT, 32-bit clock counter"
|
|
line.long 4*0x02 "PMN0, 32-bit event counter"
|
|
line.long 4*0x03 "PMN1, 32-bit event counter"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel 80200 ***
|
|
; --------------------------------------------------------------------------------
|
|
if (d.l(c15:0x0)&0xffffe3f0)==0x69052000
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
bitfld.long 4*0x00 0.--3. "CCLKCFG ,Core Clock Configuration" "res,3,4,5,6,7,8,9,res,res,res,res,res,res,res,res"
|
|
line.long 4*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,IDLE,res,SLEEP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel 80321 or IOP321 (Verde) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052020||(d.l(c15:0x0)&0xffffe3f0)==0x69052030
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel PXA210, PXA250 (Sabinal, Cotulla) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100||(d.l(c15:0x0)&0xffffe3f0)==0x69052120
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
bitfld.long 4*0x00 1.--1. "FCS ,Frequency Change Sequence" "do not enter,enter"
|
|
bitfld.long 4*0x00 0.--0. " TURBO ,Turbo Mode" "exit,enter"
|
|
line.long 4*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4*0x01 0.--1. "M ,Mode" "Run/Turbo,Idle,res,Sleep/Deep Sleep"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel (Bulverde) ***
|
|
; --------------------------------------------------------------------------------
|
|
; wrong Product ID in developer's manual revision 0.1 (ID of PXA250!!!)
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel IXP2400, IXP2800 (Sausolito, Castine) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x69054190||(d.l(c15:0x0)&0xffffe3f0)==0x690541a0
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Intel (Manitoba) ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe3f0)==0x690540a0
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** other Intel XScale V5TE ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe000)==0x69052000
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** other Intel XScale V5TE ***
|
|
; *** includes XScale IXP425 ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(c15:0x0)&0xffffe000)==0x69054000
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
; --------------------------------------------------------------------------------
|
|
; *** any other XScale ***
|
|
; --------------------------------------------------------------------------------
|
|
else
|
|
group c14:0x06--0x07 "Clock and Power Management"
|
|
line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register"
|
|
line.long 4*0x01 "PWRMODE,Power Management Register"
|
|
bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
|
|
endif
|
|
group c14:0x08--0x0d "Software Debug"
|
|
line.long 4*0x02 "DCSR,Debug Control and Status Register"
|
|
bitfld.long 4*0x02 31. "GE ,Global Enable" "disable,enable"
|
|
bitfld.long 4*0x02 30. " H ,Halt Mode" "Monitor Mode,Halt Mode"
|
|
textline " "
|
|
bitfld.long 4*0x02 23. "TF ,Trap FIQ" "disable,enable"
|
|
bitfld.long 4*0x02 22. " TI ,Trap IRQ" "disable,enable"
|
|
bitfld.long 4*0x02 20. " TD ,Trap Data Abort" "disable,enable"
|
|
textline " "
|
|
bitfld.long 4*0x02 19. "TA ,Trap Prefetch Abort" "disable,enable"
|
|
bitfld.long 4*0x02 18. " TS ,Trap Software Interrupt" "disable,enable"
|
|
bitfld.long 4*0x02 17. " TU ,Trap Undefined Instruction" "disable,enable"
|
|
bitfld.long 4*0x02 16. " TR ,Trap Reset" "disable,enable"
|
|
textline " "
|
|
bitfld.long 4*0x02 5. "SA ,Sticky Abort" "no,yes"
|
|
bitfld.long 4*0x02 2.--4. " MOE ,Method of Entry" "Reset,Inst Bkpt, Data Bkpt, BKPT Inst, Ext Debug Event, Vector Trap, Trace Buffer full, reserved"
|
|
bitfld.long 4*0x02 1. " M ,Trace Buffer Mode" "wrap around,fill-once"
|
|
bitfld.long 4*0x02 0. " E ,Trace Buffer Enable" "no,yes"
|
|
line.long 4*0x04 "CHKPT0,Checkpoint 0 Register"
|
|
line.long 4*0x05 "CHKPT1,Checkpoint 1 Register"
|
|
tree.end
|
|
;end include file xscale/cp14.ph
|
|
;begin include file xscale/ixp2800-dram.ph
|
|
;parameters: 0xd0090000 0
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2800
|
|
; State: not complete
|
|
;
|
|
; IXP2800-DRAM %1
|
|
;
|
|
; %1 base address
|
|
; %2 base address
|
|
; --------------------------------------------------------------------------------
|
|
tree "RDR DRAM Channel 0"
|
|
; --------------------------------------------------------------------------------
|
|
width 20.
|
|
group asd:(0xd0090000+0x00)++0x03
|
|
line.long 0x00 "RDRAM_CONTROL_0,RDRAM Controller Control Register"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2800-dram.ph
|
|
;begin include file xscale/ixp2800-dram.ph
|
|
;parameters: 0xd00a0000 1
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2800
|
|
; State: not complete
|
|
;
|
|
; IXP2800-DRAM %1
|
|
;
|
|
; %1 base address
|
|
; %2 base address
|
|
; --------------------------------------------------------------------------------
|
|
tree "RDR DRAM Channel 1"
|
|
; --------------------------------------------------------------------------------
|
|
width 20.
|
|
group asd:(0xd00a0000+0x00)++0x03
|
|
line.long 0x00 "RDRAM_CONTROL_1,RDRAM Controller Control Register"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2800-dram.ph
|
|
;begin include file xscale/ixp2800-dram.ph
|
|
;parameters: 0xd00b0000 2
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2800
|
|
; State: not complete
|
|
;
|
|
; IXP2800-DRAM %1
|
|
;
|
|
; %1 base address
|
|
; %2 base address
|
|
; --------------------------------------------------------------------------------
|
|
tree "RDR DRAM Channel 2"
|
|
; --------------------------------------------------------------------------------
|
|
width 20.
|
|
group asd:(0xd00b0000+0x00)++0x03
|
|
line.long 0x00 "RDRAM_CONTROL_2,RDRAM Controller Control Register"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2800-dram.ph
|
|
;begin include file xscale/ixp2400-sram.ph
|
|
;parameters: 0xcc010000 0
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400, IXP2800
|
|
; State: ok
|
|
;
|
|
; IXP2400-SRAM %1 %2
|
|
;
|
|
; %1 base Address
|
|
; %2 channel number
|
|
;
|
|
; --------------------------------------------------------------------------------
|
|
tree "SRAM Channel 0"
|
|
; --------------------------------------------------------------------------------
|
|
width 28.
|
|
group asd:(0xcc010000+0x00)++0x03
|
|
line.long 0x00 "SRAM_CONTROL,SRAM Controller configuration"
|
|
bitfld.long 0x00 17. "QDR_SIZZLE ,Sizzel the QDR read data bits" "no change,swap"
|
|
bitfld.long 0x00 14. " QC_IGN_EOP ,Queue Controller Ignore EOP" "always,EOP set"
|
|
textline " "
|
|
bitfld.long 0x00 13. " QC_IGN_SEG_CNT ,Queue Controller Ignore Segment Count" "always,if zero"
|
|
bitfld.long 0x00 10.--12. " PIPELINE ,Indicates number of external pipeline delays" "0 cyc,1 cyc,2 cyc,3 cyc,4 cyc,5 cyc,6 cyc,7 cyc"
|
|
textline " "
|
|
bitfld.long 0x00 7.--9. " SRAM_SIZE ,Indicates the Size of each SRAM chip" "512KB x 18,1MB x 18,2MB x 18,4MB x 18,8MB x 18,16MB x 18,32MB x 18,ext port ena"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PORT_CTL address[23:22] ,Usage of Port Controller address [23:22]" "address,R/WPE_L[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PORT_CTL address[21:20] ,Usage of Port Controller address [21:20]" "address,R/WPE_L[3]"
|
|
bitfld.long 0x00 3. " PAR_EN ,Parity" "no,yes"
|
|
group asd:(0xcc010000+0x04)++0x03
|
|
line.long 0x00 "SRAM_PARITY_STATUS_1,Parity Control and recording of last faulty Address"
|
|
bitfld.long 0x00 31. "WW_PAR byte3 ,Write Wrong Parity for byte 3" "correct,incorrect"
|
|
bitfld.long 0x00 30. " byte2 ,Write Wrong Parity for byte 2" "correct,incorrect"
|
|
textline " "
|
|
bitfld.long 0x00 29. " WW_PAR byte1 ,Write Wrong Parity for byte 1" "correct,incorrect"
|
|
bitfld.long 0x00 28. " byte0 ,Write Wrong Parity for byte 0" "correct,incorrect"
|
|
textline " "
|
|
hexmask.long 0x00 0.--23. 0x01 " ADDRRESS ,Records the address which has a perity error"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Error by Microengine ***
|
|
; --------------------------------------------------------------------------------
|
|
if (d.l(asd:(0xcc010000+0x08))&0x00010000)==0x00010000
|
|
group asd:(0xcc010000+0x08)++0x03
|
|
line.long 0x00 "SRAM_PARITY_STATUS_2,Recording of source or request which generated parity error"
|
|
bitfld.long 0x00 31. "MULT_ERR ,Multiple Errors" "no,yes"
|
|
bitfld.long 0x00 20.--24. " ME ,Indicates which Microengine was the originator" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 17.--19. " THD ,Indicates which Thread was the originator" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16. " SRC ,Source" "XScale/PCI,ME"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ERR byte3 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 2. " byte2 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 1. " byte1 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 0. " byte0 ,Indictaes error on a read" "no,yes"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Error by XScale/PCI ***
|
|
; --------------------------------------------------------------------------------
|
|
else
|
|
group asd:(0xcc010000+0x08)++0x03
|
|
line.long 0x00 "SRAM_PARITY_STATUS_2,Recording of source or request which generated parity error"
|
|
bitfld.long 0x00 31. "MULT_ERR ,Multiple Errors" "no,yes"
|
|
bitfld.long 0x00 20.--24. " ME ,Indicates which Microengine was the originator" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 17.--19. " THD ,Indicates which Source was the originator" "XScale,PCI,res,res,res,res,res,res"
|
|
bitfld.long 0x00 16. " SRC ,Source" "XScale/PCI,ME"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ERR byte3 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 2. " byte2 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 1. " byte1 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 0. " byte0 ,Indictaes error on a read" "no,yes"
|
|
endif
|
|
group asd:(0xcc010000+0x0c)++0x03
|
|
line.long 0x00 "SPARE,Reserved"
|
|
group asd:(0xcc010000+0x240)++0x03
|
|
line.long 0x00 "QDR_Rd_Ptr_Offset,Register for Configuration of QDR I vs. QDR II interface"
|
|
bitfld.long 0x00 2. "QDRn_Rx_Descramble ,Adjusts the 1/2 clock incrementing of the read pointer" "QDR I,QDR II"
|
|
bitfld.long 0x00 0.--1. " Rd_Wr_Ptr_Offset_sel ,Selects the offset between the write & read pointers" "0,1,2,3"
|
|
group asd:(0xcc010000+0x300)++0x03
|
|
line.long 0x00 "SETUP_CONTROL,QDR RCOMP Setup and Control Register"
|
|
bitfld.long 0x00 17. "SLEW_INDEX_SELECT ,Use to select either RComp[6:3] or [5:2] to be the index to slew rate" "RComp[6:3],RComp[5:2]"
|
|
bitfld.long 0x00 16. " INC_DEC_INVERT ,Invert the inc/dec signal from the pads" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ARSOS ,Address RCOMP and SCOMP Override Select" "no,yes"
|
|
bitfld.long 0x00 14. " DRSOS ,Data RCOMP and SCOMP Override Select" "no,yes"
|
|
bitfld.long 0x00 13. " KCSOS ,K Clock RCOMP and SCOMP Override Select" "no,yes"
|
|
bitfld.long 0x00 12. " DQDRSOS ,DQ Data RCOMP and SCOMP Override Select" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RCOMP_LOCK ,RCOMP Lock Bit" "unlocked,locked"
|
|
bitfld.long 0x00 10. " SLEW_RATE_TABLES ,Slew Rate Tables Programmed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " DIGITAL_FILTER_SELECT ,Selects the amount of digital filtering to be apllied to each SM RCOMP measurement cycle" "disabled,1 change/cycle,2 change/cycle,4 change/cycle"
|
|
bitfld.long 0x00 5.--7. " RCOMPPRD ,RCOMP Period (values are cvalid at 250MHz" "16ms,8ms,4ms,2ms,1ms,0.5ms,0.25ms,256 clk"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BLOCK_RCOMP_UPDATES ,Block RCOMP Updates" "normal,DRrcomp_pad_update"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RCOMP_SM_DISABLE ,RComp State Machine Disable" "normal,stall at WAIT"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FRCOMP ,Force RComp operation " "-,perform"
|
|
bitfld.long 0x00 1. " ROE_NMOS ,RCOMP Override Enable for NMOS" "dis,ena"
|
|
bitfld.long 0x00 0. " ROE_PMOS ,RCOMP Override Enable for PMOS" "dis,ena"
|
|
group asd:(0xcc010000+0x304)++0x03
|
|
line.long 0x00 "PMOS_MEASURED,8-bit RCOMP value for the PMOS drivers"
|
|
bitfld.long 0x00 8. "INC_DEC_SIGNAL ,Inc/dec signal in PMOS Eval block" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " PMOS_RCOMP_MEASURED_VALUE ,PMOS RCOMP Measured Value"
|
|
group asd:(0xcc010000+0x308)++0x03
|
|
line.long 0x00 "NMOS_MEASURED,8-bit RCOMP value for the NMOS drivers"
|
|
bitfld.long 0x00 8. "INC_DEC_SIGNAL ,Inc/dec signal in NMOS Eval block" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " NMOS_RCOMP_MEASURED_VALUE ,NMOS RCOMP Measured Value"
|
|
group asd:(0xcc010000+0x30C)++0x03
|
|
line.long 0x00 "PMOS_OVERRIDE,8-bit RCOMP value for the PMOS drivers"
|
|
hexmask.long 0x00 24.--31. 0x01 "ADDRESS ,Address PMOS RCOMP Override Value"
|
|
hexmask.long 0x00 16.--23. 0x01 " DATA ,Data PMOS RCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 8.--15. 0x01 " K_CLOCK ,K Clock PMOS RCOMP Override Value"
|
|
hexmask.long 0x00 0.--7. 0x01 " DQ_DATA ,DQ Data PMOS RCOMP Override Value"
|
|
group asd:(0xcc010000+0x310)++0x03
|
|
line.long 0x00 "NMOS_OVERRIDE,8-bit RCOMP value for the NMOS drivers"
|
|
hexmask.long 0x00 24.--31. 0x01 "ADDRESS ,Address NMOS RCOMP Override Value"
|
|
hexmask.long 0x00 16.--23. 0x01 " DATA ,Data NMOS RCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 8.--15. 0x01 " K_CLOCK ,K Clock NMOS RCOMP Override Value"
|
|
hexmask.long 0x00 0.--7. 0x01 " DQ_DATA ,DQ Data NMOS RCOMP Override Value"
|
|
group asd:(0xcc010000+0x314)++0x03
|
|
line.long 0x00 "PMOS_NMOS_SCOMP_OVERRIDE,8-bit override values for PMOS/NMOS SComp drivers"
|
|
hexmask.long 0x00 28.--31. 0x01 "ADDR_PMOS ,Address PMOS SCOMP Override Value"
|
|
hexmask.long 0x00 24.--27. 0x01 " ADDR_NMOS ,Address NMOS SCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 20.--23. 0x01 " D_PMOS ,Data PMOS SCOMP Override Value"
|
|
hexmask.long 0x00 16.--19. 0x01 " D_NMOS ,Data NMOS SCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 12.--15. 0x01 " K_CLOCK_PMOS ,K Clock PMOS SCOMP Override Value"
|
|
hexmask.long 0x00 8.--11. 0x01 " K_CLOCK_NMOS ,K Clock NMOS SCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DQ_DATA_PMOS ,DQ Data PMOS SCOMP Override Value"
|
|
hexmask.long 0x00 0.--3. 0x01 " DQ_DATA_NMOS ,DQ Data NMOS SCOMP Override Value"
|
|
group asd:(0xcc010000+0x318)++0x03
|
|
line.long 0x00 "STREGTH_SLEW_INDEX_SEL,"
|
|
bitfld.long 0x00 19. "ADDR_SLEW_RATE_IDX ,ADDR SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena"
|
|
bitfld.long 0x00 15.--18. " ADDR_STRENGTH_CTL ,Address strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DATA_SLEW_RATE_IDX ,DATA SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena"
|
|
bitfld.long 0x00 10.--13. " DATA_STRENGTH_CTL ,Data strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00"
|
|
textline " "
|
|
bitfld.long 0x00 9. " K_CLOCK_SLEW_RATE_IDX ,K CLOCK SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena"
|
|
bitfld.long 0x00 5.--8. " K_CLOCK_STRENGTH_CTL ,K Clock strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DQ_DATA_SLEW_RATE_IDX ,DQ DATA SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--3. " DQ_DATA_STRENGTH_CTL ,DQ Data strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00"
|
|
group asd:(0xcc010000+0x31C)++0x03
|
|
line.long 0x00 "ADDR_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for address signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "ADDR_PMOS_OFFSET ,Signed 8-bit offset applied to PMOS drive strength"
|
|
group asd:(0xcc010000+0x320)++0x03
|
|
line.long 0x00 "ADDR_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for address signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "ADDR_NMOS_OFFSET ,Signed 8-bit offset applied to NMOS drive strength"
|
|
group asd:(0xcc010000+0x324)++0x03
|
|
line.long 0x00 "DATA_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for Data signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "DATA_PMOS_OFFSET ,Signed 8-bit offset applied to PMOS drive strength"
|
|
group asd:(0xcc010000+0x328)++0x03
|
|
line.long 0x00 "DATA_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for Data signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "DATA_NMOS_OFFSET ,Signed 8-bit offset applied to NMOS drive strength"
|
|
group asd:(0xcc010000+0x32C)++0x03
|
|
line.long 0x00 "K_CLK_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for K Clock signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "K_CLK_PMOS_OFFSET ,Signed 8-bit offset applied to PMOS drive strength"
|
|
group asd:(0xcc010000+0x330)++0x03
|
|
line.long 0x00 "K_CLK_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for K Clock signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "K_CLK_NMOS_OFFSET ,Signed 8-bit offset applied to NMOS drive strength"
|
|
group asd:(0xcc010000+0x334)++0x03
|
|
line.long 0x00 "DQ_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for DQ signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "DQ_PMOS_OFFSET ,Signed 8-bit offset applied to PMOS drive strength"
|
|
group asd:(0xcc010000+0x338)++0x03
|
|
line.long 0x00 "DQ_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for DQ signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "DQ_NMOS_OFFSET ,Signed 8-bit offset applied to NMOS drive strength"
|
|
group asd:(0xcc010000+0x33C)++0x03
|
|
line.long 0x00 "PMOS_NMOS_VERT_OVERRIDE,"
|
|
hexmask.long 0x00 8.--15. 0x01 "NMOS_RCOMP_OVERRIDE ,Signed 8-bit offset"
|
|
textline " "
|
|
hexmask.long 0x00 0.--7. 0x01 " PMOS_RCOMP_OVERRIDE ,Signed 8-bit offset"
|
|
group asd:(0xcc010000+0x340)++0x0f
|
|
line.long 0x00 "ADDR_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "ADDR_PMOS_3 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " ADDR_PMOS_2 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " ADDR_PMOS_1 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " ADDR_PMOS_0 ,Slew-rate for Address signal group"
|
|
line.long 0x4 "ADDR_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "ADDR_PMOS_7 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " ADDR_PMOS_6 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " ADDR_PMOS_5 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " ADDR_PMOS_4 ,Slew-rate for Address signal group"
|
|
line.long 0x8 "ADDR_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "ADDR_PMOS_11 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " ADDR_PMOS_10 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " ADDR_PMOS_9 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " ADDR_PMOS_8 ,Slew-rate for Address signal group"
|
|
line.long 0xc "ADDR_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "ADDR_PMOS_15 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " ADDR_PMOS_14 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " ADDR_PMOS_13 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " ADDR_PMOS_12 ,Slew-rate for Address signal group"
|
|
group asd:(0xcc010000+0x350)++0x0f
|
|
line.long 0x00 "ADDR_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "ADDR_NMOS_3 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " ADDR_NMOS_2 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " ADDR_NMOS_1 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " ADDR_NMOS_0 ,Slew-rate for Address signal group"
|
|
line.long 0x4 "ADDR_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "ADDR_NMOS_7 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " ADDR_NMOS_6 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " ADDR_NMOS_5 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " ADDR_NMOS_4 ,Slew-rate for Address signal group"
|
|
line.long 0x8 "ADDR_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "ADDR_NMOS_11 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " ADDR_NMOS_10 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " ADDR_NMOS_9 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " ADDR_NMOS_8 ,Slew-rate for Address signal group"
|
|
line.long 0xc "ADDR_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "ADDR_NMOS_15 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " ADDR_NMOS_14 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " ADDR_NMOS_13 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " ADDR_NMOS_12 ,Slew-rate for Address signal group"
|
|
group asd:(0xcc010000+0x360)++0x0f
|
|
line.long 0x00 "DATA_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "DATA_PMOS_3 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " DATA_PMOS_2 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DATA_PMOS_1 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " DATA_PMOS_0 ,Slew-rate for Data signal group"
|
|
line.long 0x4 "DATA_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "DATA_PMOS_7 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " DATA_PMOS_6 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " DATA_PMOS_5 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " DATA_PMOS_4 ,Slew-rate for Data signal group"
|
|
line.long 0x8 "DATA_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "DATA_PMOS_11 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " DATA_PMOS_10 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " DATA_PMOS_9 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " DATA_PMOS_8 ,Slew-rate for Data signal group"
|
|
line.long 0xc "DATA_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "DATA_PMOS_15 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " DATA_PMOS_14 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " DATA_PMOS_13 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " DATA_PMOS_12 ,Slew-rate for Data signal group"
|
|
group asd:(0xcc010000+0x370)++0x0f
|
|
line.long 0x00 "DATA_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "DATA_NMOS_3 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " DATA_NMOS_2 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DATA_NMOS_1 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " DATA_NMOS_0 ,Slew-rate for Data signal group"
|
|
line.long 0x4 "DATA_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "DATA_NMOS_7 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " DATA_NMOS_6 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " DATA_NMOS_5 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " DATA_NMOS_4 ,Slew-rate for Data signal group"
|
|
line.long 0x8 "DATA_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "DATA_NMOS_11 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " DATA_NMOS_10 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " DATA_NMOS_9 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " DATA_NMOS_8 ,Slew-rate for Data signal group"
|
|
line.long 0xc "DATA_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "DATA_NMOS_15 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " DATA_NMOS_14 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " DATA_NMOS_13 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " DATA_NMOS_12 ,Slew-rate for Data signal group"
|
|
group asd:(0xcc010000+0x380)++0x0f
|
|
line.long 0x00 "K_CLK_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "K_CLK_PMOS_3 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " K_CLK_PMOS_2 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " K_CLK_PMOS_1 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " K_CLK_PMOS_0 ,Slew-rate for K Clock signal group"
|
|
line.long 0x4 "K_CLK_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "K_CLK_PMOS_7 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " K_CLK_PMOS_6 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " K_CLK_PMOS_5 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " K_CLK_PMOS_4 ,Slew-rate for K Clock signal group"
|
|
line.long 0x8 "K_CLK_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "K_CLK_PMOS_11 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " K_CLK_PMOS_10 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " K_CLK_PMOS_9 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " K_CLK_PMOS_8 ,Slew-rate for K Clock signal group"
|
|
line.long 0xc "K_CLK_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "K_CLK_PMOS_15 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " K_CLK_PMOS_14 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " K_CLK_PMOS_13 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " K_CLK_PMOS_12 ,Slew-rate for K Clock signal group"
|
|
group asd:(0xcc010000+0x390)++0x0f
|
|
line.long 0x00 "K_CLK_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "K_CLK_NMOS_3 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " K_CLK_NMOS_2 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " K_CLK_NMOS_1 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " K_CLK_NMOS_0 ,Slew-rate for K Clock signal group"
|
|
line.long 0x4 "K_CLK_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "K_CLK_NMOS_7 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " K_CLK_NMOS_6 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " K_CLK_NMOS_5 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " K_CLK_NMOS_4 ,Slew-rate for K Clock signal group"
|
|
line.long 0x8 "K_CLK_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "K_CLK_NMOS_11 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " K_CLK_NMOS_10 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " K_CLK_NMOS_9 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " K_CLK_NMOS_8 ,Slew-rate for K Clock signal group"
|
|
line.long 0xc "K_CLK_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "K_CLK_NMOS_15 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " K_CLK_NMOS_14 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " K_CLK_NMOS_13 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " K_CLK_NMOS_12 ,Slew-rate for K Clock signal group"
|
|
group asd:(0xcc010000+0x3A0)++0x0f
|
|
line.long 0x00 "DQ_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "DQ_PMOS_3 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " DQ_PMOS_2 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DQ_PMOS_1 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " DQ_PMOS_0 ,Slew-rate for DQ signal group"
|
|
line.long 0x4 "DQ_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "DQ_PMOS_7 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " DQ_PMOS_6 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " DQ_PMOS_5 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " DQ_PMOS_4 ,Slew-rate for DQ signal group"
|
|
line.long 0x8 "DQ_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "DQ_PMOS_11 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " DQ_PMOS_10 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " DQ_PMOS_9 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " DQ_PMOS_8 ,Slew-rate for DQ signal group"
|
|
line.long 0xc "DQ_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "DQ_PMOS_15 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " DQ_PMOS_14 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " DQ_PMOS_13 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " DQ_PMOS_12 ,Slew-rate for DQ signal group"
|
|
group asd:(0xcc010000+0x3B0)++0x0f
|
|
line.long 0x00 "DQ_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "DQ_NMOS_3 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " DQ_NMOS_2 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DQ_NMOS_1 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " DQ_NMOS_0 ,Slew-rate for DQ signal group"
|
|
line.long 0x4 "DQ_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "DQ_NMOS_7 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " DQ_NMOS_6 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " DQ_NMOS_5 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " DQ_NMOS_4 ,Slew-rate for DQ signal group"
|
|
line.long 0x8 "DQ_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "DQ_NMOS_11 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " DQ_NMOS_10 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " DQ_NMOS_9 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " DQ_NMOS_8 ,Slew-rate for DQ signal group"
|
|
line.long 0xc "DQ_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "DQ_NMOS_15 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " DQ_NMOS_14 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " DQ_NMOS_13 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " DQ_NMOS_12 ,Slew-rate for DQ signal group"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-sram.ph
|
|
;begin include file xscale/ixp2400-sram.ph
|
|
;parameters: 0xcc410000 1
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400, IXP2800
|
|
; State: ok
|
|
;
|
|
; IXP2400-SRAM %1 %2
|
|
;
|
|
; %1 base Address
|
|
; %2 channel number
|
|
;
|
|
; --------------------------------------------------------------------------------
|
|
tree "SRAM Channel 1"
|
|
; --------------------------------------------------------------------------------
|
|
width 28.
|
|
group asd:(0xcc410000+0x00)++0x03
|
|
line.long 0x00 "SRAM_CONTROL,SRAM Controller configuration"
|
|
bitfld.long 0x00 17. "QDR_SIZZLE ,Sizzel the QDR read data bits" "no change,swap"
|
|
bitfld.long 0x00 14. " QC_IGN_EOP ,Queue Controller Ignore EOP" "always,EOP set"
|
|
textline " "
|
|
bitfld.long 0x00 13. " QC_IGN_SEG_CNT ,Queue Controller Ignore Segment Count" "always,if zero"
|
|
bitfld.long 0x00 10.--12. " PIPELINE ,Indicates number of external pipeline delays" "0 cyc,1 cyc,2 cyc,3 cyc,4 cyc,5 cyc,6 cyc,7 cyc"
|
|
textline " "
|
|
bitfld.long 0x00 7.--9. " SRAM_SIZE ,Indicates the Size of each SRAM chip" "512KB x 18,1MB x 18,2MB x 18,4MB x 18,8MB x 18,16MB x 18,32MB x 18,ext port ena"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PORT_CTL address[23:22] ,Usage of Port Controller address [23:22]" "address,R/WPE_L[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PORT_CTL address[21:20] ,Usage of Port Controller address [21:20]" "address,R/WPE_L[3]"
|
|
bitfld.long 0x00 3. " PAR_EN ,Parity" "no,yes"
|
|
group asd:(0xcc410000+0x04)++0x03
|
|
line.long 0x00 "SRAM_PARITY_STATUS_1,Parity Control and recording of last faulty Address"
|
|
bitfld.long 0x00 31. "WW_PAR byte3 ,Write Wrong Parity for byte 3" "correct,incorrect"
|
|
bitfld.long 0x00 30. " byte2 ,Write Wrong Parity for byte 2" "correct,incorrect"
|
|
textline " "
|
|
bitfld.long 0x00 29. " WW_PAR byte1 ,Write Wrong Parity for byte 1" "correct,incorrect"
|
|
bitfld.long 0x00 28. " byte0 ,Write Wrong Parity for byte 0" "correct,incorrect"
|
|
textline " "
|
|
hexmask.long 0x00 0.--23. 0x01 " ADDRRESS ,Records the address which has a perity error"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Error by Microengine ***
|
|
; --------------------------------------------------------------------------------
|
|
if (d.l(asd:(0xcc410000+0x08))&0x00010000)==0x00010000
|
|
group asd:(0xcc410000+0x08)++0x03
|
|
line.long 0x00 "SRAM_PARITY_STATUS_2,Recording of source or request which generated parity error"
|
|
bitfld.long 0x00 31. "MULT_ERR ,Multiple Errors" "no,yes"
|
|
bitfld.long 0x00 20.--24. " ME ,Indicates which Microengine was the originator" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 17.--19. " THD ,Indicates which Thread was the originator" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16. " SRC ,Source" "XScale/PCI,ME"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ERR byte3 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 2. " byte2 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 1. " byte1 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 0. " byte0 ,Indictaes error on a read" "no,yes"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Error by XScale/PCI ***
|
|
; --------------------------------------------------------------------------------
|
|
else
|
|
group asd:(0xcc410000+0x08)++0x03
|
|
line.long 0x00 "SRAM_PARITY_STATUS_2,Recording of source or request which generated parity error"
|
|
bitfld.long 0x00 31. "MULT_ERR ,Multiple Errors" "no,yes"
|
|
bitfld.long 0x00 20.--24. " ME ,Indicates which Microengine was the originator" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 17.--19. " THD ,Indicates which Source was the originator" "XScale,PCI,res,res,res,res,res,res"
|
|
bitfld.long 0x00 16. " SRC ,Source" "XScale/PCI,ME"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ERR byte3 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 2. " byte2 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 1. " byte1 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 0. " byte0 ,Indictaes error on a read" "no,yes"
|
|
endif
|
|
group asd:(0xcc410000+0x0c)++0x03
|
|
line.long 0x00 "SPARE,Reserved"
|
|
group asd:(0xcc410000+0x240)++0x03
|
|
line.long 0x00 "QDR_Rd_Ptr_Offset,Register for Configuration of QDR I vs. QDR II interface"
|
|
bitfld.long 0x00 2. "QDRn_Rx_Descramble ,Adjusts the 1/2 clock incrementing of the read pointer" "QDR I,QDR II"
|
|
bitfld.long 0x00 0.--1. " Rd_Wr_Ptr_Offset_sel ,Selects the offset between the write & read pointers" "0,1,2,3"
|
|
group asd:(0xcc410000+0x300)++0x03
|
|
line.long 0x00 "SETUP_CONTROL,QDR RCOMP Setup and Control Register"
|
|
bitfld.long 0x00 17. "SLEW_INDEX_SELECT ,Use to select either RComp[6:3] or [5:2] to be the index to slew rate" "RComp[6:3],RComp[5:2]"
|
|
bitfld.long 0x00 16. " INC_DEC_INVERT ,Invert the inc/dec signal from the pads" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ARSOS ,Address RCOMP and SCOMP Override Select" "no,yes"
|
|
bitfld.long 0x00 14. " DRSOS ,Data RCOMP and SCOMP Override Select" "no,yes"
|
|
bitfld.long 0x00 13. " KCSOS ,K Clock RCOMP and SCOMP Override Select" "no,yes"
|
|
bitfld.long 0x00 12. " DQDRSOS ,DQ Data RCOMP and SCOMP Override Select" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RCOMP_LOCK ,RCOMP Lock Bit" "unlocked,locked"
|
|
bitfld.long 0x00 10. " SLEW_RATE_TABLES ,Slew Rate Tables Programmed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " DIGITAL_FILTER_SELECT ,Selects the amount of digital filtering to be apllied to each SM RCOMP measurement cycle" "disabled,1 change/cycle,2 change/cycle,4 change/cycle"
|
|
bitfld.long 0x00 5.--7. " RCOMPPRD ,RCOMP Period (values are cvalid at 250MHz" "16ms,8ms,4ms,2ms,1ms,0.5ms,0.25ms,256 clk"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BLOCK_RCOMP_UPDATES ,Block RCOMP Updates" "normal,DRrcomp_pad_update"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RCOMP_SM_DISABLE ,RComp State Machine Disable" "normal,stall at WAIT"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FRCOMP ,Force RComp operation " "-,perform"
|
|
bitfld.long 0x00 1. " ROE_NMOS ,RCOMP Override Enable for NMOS" "dis,ena"
|
|
bitfld.long 0x00 0. " ROE_PMOS ,RCOMP Override Enable for PMOS" "dis,ena"
|
|
group asd:(0xcc410000+0x304)++0x03
|
|
line.long 0x00 "PMOS_MEASURED,8-bit RCOMP value for the PMOS drivers"
|
|
bitfld.long 0x00 8. "INC_DEC_SIGNAL ,Inc/dec signal in PMOS Eval block" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " PMOS_RCOMP_MEASURED_VALUE ,PMOS RCOMP Measured Value"
|
|
group asd:(0xcc410000+0x308)++0x03
|
|
line.long 0x00 "NMOS_MEASURED,8-bit RCOMP value for the NMOS drivers"
|
|
bitfld.long 0x00 8. "INC_DEC_SIGNAL ,Inc/dec signal in NMOS Eval block" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " NMOS_RCOMP_MEASURED_VALUE ,NMOS RCOMP Measured Value"
|
|
group asd:(0xcc410000+0x30C)++0x03
|
|
line.long 0x00 "PMOS_OVERRIDE,8-bit RCOMP value for the PMOS drivers"
|
|
hexmask.long 0x00 24.--31. 0x01 "ADDRESS ,Address PMOS RCOMP Override Value"
|
|
hexmask.long 0x00 16.--23. 0x01 " DATA ,Data PMOS RCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 8.--15. 0x01 " K_CLOCK ,K Clock PMOS RCOMP Override Value"
|
|
hexmask.long 0x00 0.--7. 0x01 " DQ_DATA ,DQ Data PMOS RCOMP Override Value"
|
|
group asd:(0xcc410000+0x310)++0x03
|
|
line.long 0x00 "NMOS_OVERRIDE,8-bit RCOMP value for the NMOS drivers"
|
|
hexmask.long 0x00 24.--31. 0x01 "ADDRESS ,Address NMOS RCOMP Override Value"
|
|
hexmask.long 0x00 16.--23. 0x01 " DATA ,Data NMOS RCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 8.--15. 0x01 " K_CLOCK ,K Clock NMOS RCOMP Override Value"
|
|
hexmask.long 0x00 0.--7. 0x01 " DQ_DATA ,DQ Data NMOS RCOMP Override Value"
|
|
group asd:(0xcc410000+0x314)++0x03
|
|
line.long 0x00 "PMOS_NMOS_SCOMP_OVERRIDE,8-bit override values for PMOS/NMOS SComp drivers"
|
|
hexmask.long 0x00 28.--31. 0x01 "ADDR_PMOS ,Address PMOS SCOMP Override Value"
|
|
hexmask.long 0x00 24.--27. 0x01 " ADDR_NMOS ,Address NMOS SCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 20.--23. 0x01 " D_PMOS ,Data PMOS SCOMP Override Value"
|
|
hexmask.long 0x00 16.--19. 0x01 " D_NMOS ,Data NMOS SCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 12.--15. 0x01 " K_CLOCK_PMOS ,K Clock PMOS SCOMP Override Value"
|
|
hexmask.long 0x00 8.--11. 0x01 " K_CLOCK_NMOS ,K Clock NMOS SCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DQ_DATA_PMOS ,DQ Data PMOS SCOMP Override Value"
|
|
hexmask.long 0x00 0.--3. 0x01 " DQ_DATA_NMOS ,DQ Data NMOS SCOMP Override Value"
|
|
group asd:(0xcc410000+0x318)++0x03
|
|
line.long 0x00 "STREGTH_SLEW_INDEX_SEL,"
|
|
bitfld.long 0x00 19. "ADDR_SLEW_RATE_IDX ,ADDR SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena"
|
|
bitfld.long 0x00 15.--18. " ADDR_STRENGTH_CTL ,Address strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DATA_SLEW_RATE_IDX ,DATA SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena"
|
|
bitfld.long 0x00 10.--13. " DATA_STRENGTH_CTL ,Data strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00"
|
|
textline " "
|
|
bitfld.long 0x00 9. " K_CLOCK_SLEW_RATE_IDX ,K CLOCK SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena"
|
|
bitfld.long 0x00 5.--8. " K_CLOCK_STRENGTH_CTL ,K Clock strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DQ_DATA_SLEW_RATE_IDX ,DQ DATA SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--3. " DQ_DATA_STRENGTH_CTL ,DQ Data strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00"
|
|
group asd:(0xcc410000+0x31C)++0x03
|
|
line.long 0x00 "ADDR_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for address signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "ADDR_PMOS_OFFSET ,Signed 8-bit offset applied to PMOS drive strength"
|
|
group asd:(0xcc410000+0x320)++0x03
|
|
line.long 0x00 "ADDR_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for address signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "ADDR_NMOS_OFFSET ,Signed 8-bit offset applied to NMOS drive strength"
|
|
group asd:(0xcc410000+0x324)++0x03
|
|
line.long 0x00 "DATA_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for Data signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "DATA_PMOS_OFFSET ,Signed 8-bit offset applied to PMOS drive strength"
|
|
group asd:(0xcc410000+0x328)++0x03
|
|
line.long 0x00 "DATA_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for Data signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "DATA_NMOS_OFFSET ,Signed 8-bit offset applied to NMOS drive strength"
|
|
group asd:(0xcc410000+0x32C)++0x03
|
|
line.long 0x00 "K_CLK_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for K Clock signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "K_CLK_PMOS_OFFSET ,Signed 8-bit offset applied to PMOS drive strength"
|
|
group asd:(0xcc410000+0x330)++0x03
|
|
line.long 0x00 "K_CLK_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for K Clock signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "K_CLK_NMOS_OFFSET ,Signed 8-bit offset applied to NMOS drive strength"
|
|
group asd:(0xcc410000+0x334)++0x03
|
|
line.long 0x00 "DQ_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for DQ signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "DQ_PMOS_OFFSET ,Signed 8-bit offset applied to PMOS drive strength"
|
|
group asd:(0xcc410000+0x338)++0x03
|
|
line.long 0x00 "DQ_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for DQ signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "DQ_NMOS_OFFSET ,Signed 8-bit offset applied to NMOS drive strength"
|
|
group asd:(0xcc410000+0x33C)++0x03
|
|
line.long 0x00 "PMOS_NMOS_VERT_OVERRIDE,"
|
|
hexmask.long 0x00 8.--15. 0x01 "NMOS_RCOMP_OVERRIDE ,Signed 8-bit offset"
|
|
textline " "
|
|
hexmask.long 0x00 0.--7. 0x01 " PMOS_RCOMP_OVERRIDE ,Signed 8-bit offset"
|
|
group asd:(0xcc410000+0x340)++0x0f
|
|
line.long 0x00 "ADDR_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "ADDR_PMOS_3 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " ADDR_PMOS_2 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " ADDR_PMOS_1 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " ADDR_PMOS_0 ,Slew-rate for Address signal group"
|
|
line.long 0x4 "ADDR_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "ADDR_PMOS_7 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " ADDR_PMOS_6 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " ADDR_PMOS_5 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " ADDR_PMOS_4 ,Slew-rate for Address signal group"
|
|
line.long 0x8 "ADDR_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "ADDR_PMOS_11 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " ADDR_PMOS_10 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " ADDR_PMOS_9 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " ADDR_PMOS_8 ,Slew-rate for Address signal group"
|
|
line.long 0xc "ADDR_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "ADDR_PMOS_15 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " ADDR_PMOS_14 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " ADDR_PMOS_13 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " ADDR_PMOS_12 ,Slew-rate for Address signal group"
|
|
group asd:(0xcc410000+0x350)++0x0f
|
|
line.long 0x00 "ADDR_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "ADDR_NMOS_3 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " ADDR_NMOS_2 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " ADDR_NMOS_1 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " ADDR_NMOS_0 ,Slew-rate for Address signal group"
|
|
line.long 0x4 "ADDR_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "ADDR_NMOS_7 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " ADDR_NMOS_6 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " ADDR_NMOS_5 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " ADDR_NMOS_4 ,Slew-rate for Address signal group"
|
|
line.long 0x8 "ADDR_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "ADDR_NMOS_11 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " ADDR_NMOS_10 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " ADDR_NMOS_9 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " ADDR_NMOS_8 ,Slew-rate for Address signal group"
|
|
line.long 0xc "ADDR_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "ADDR_NMOS_15 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " ADDR_NMOS_14 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " ADDR_NMOS_13 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " ADDR_NMOS_12 ,Slew-rate for Address signal group"
|
|
group asd:(0xcc410000+0x360)++0x0f
|
|
line.long 0x00 "DATA_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "DATA_PMOS_3 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " DATA_PMOS_2 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DATA_PMOS_1 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " DATA_PMOS_0 ,Slew-rate for Data signal group"
|
|
line.long 0x4 "DATA_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "DATA_PMOS_7 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " DATA_PMOS_6 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " DATA_PMOS_5 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " DATA_PMOS_4 ,Slew-rate for Data signal group"
|
|
line.long 0x8 "DATA_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "DATA_PMOS_11 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " DATA_PMOS_10 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " DATA_PMOS_9 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " DATA_PMOS_8 ,Slew-rate for Data signal group"
|
|
line.long 0xc "DATA_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "DATA_PMOS_15 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " DATA_PMOS_14 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " DATA_PMOS_13 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " DATA_PMOS_12 ,Slew-rate for Data signal group"
|
|
group asd:(0xcc410000+0x370)++0x0f
|
|
line.long 0x00 "DATA_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "DATA_NMOS_3 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " DATA_NMOS_2 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DATA_NMOS_1 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " DATA_NMOS_0 ,Slew-rate for Data signal group"
|
|
line.long 0x4 "DATA_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "DATA_NMOS_7 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " DATA_NMOS_6 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " DATA_NMOS_5 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " DATA_NMOS_4 ,Slew-rate for Data signal group"
|
|
line.long 0x8 "DATA_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "DATA_NMOS_11 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " DATA_NMOS_10 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " DATA_NMOS_9 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " DATA_NMOS_8 ,Slew-rate for Data signal group"
|
|
line.long 0xc "DATA_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "DATA_NMOS_15 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " DATA_NMOS_14 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " DATA_NMOS_13 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " DATA_NMOS_12 ,Slew-rate for Data signal group"
|
|
group asd:(0xcc410000+0x380)++0x0f
|
|
line.long 0x00 "K_CLK_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "K_CLK_PMOS_3 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " K_CLK_PMOS_2 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " K_CLK_PMOS_1 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " K_CLK_PMOS_0 ,Slew-rate for K Clock signal group"
|
|
line.long 0x4 "K_CLK_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "K_CLK_PMOS_7 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " K_CLK_PMOS_6 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " K_CLK_PMOS_5 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " K_CLK_PMOS_4 ,Slew-rate for K Clock signal group"
|
|
line.long 0x8 "K_CLK_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "K_CLK_PMOS_11 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " K_CLK_PMOS_10 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " K_CLK_PMOS_9 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " K_CLK_PMOS_8 ,Slew-rate for K Clock signal group"
|
|
line.long 0xc "K_CLK_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "K_CLK_PMOS_15 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " K_CLK_PMOS_14 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " K_CLK_PMOS_13 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " K_CLK_PMOS_12 ,Slew-rate for K Clock signal group"
|
|
group asd:(0xcc410000+0x390)++0x0f
|
|
line.long 0x00 "K_CLK_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "K_CLK_NMOS_3 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " K_CLK_NMOS_2 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " K_CLK_NMOS_1 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " K_CLK_NMOS_0 ,Slew-rate for K Clock signal group"
|
|
line.long 0x4 "K_CLK_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "K_CLK_NMOS_7 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " K_CLK_NMOS_6 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " K_CLK_NMOS_5 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " K_CLK_NMOS_4 ,Slew-rate for K Clock signal group"
|
|
line.long 0x8 "K_CLK_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "K_CLK_NMOS_11 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " K_CLK_NMOS_10 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " K_CLK_NMOS_9 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " K_CLK_NMOS_8 ,Slew-rate for K Clock signal group"
|
|
line.long 0xc "K_CLK_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "K_CLK_NMOS_15 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " K_CLK_NMOS_14 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " K_CLK_NMOS_13 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " K_CLK_NMOS_12 ,Slew-rate for K Clock signal group"
|
|
group asd:(0xcc410000+0x3A0)++0x0f
|
|
line.long 0x00 "DQ_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "DQ_PMOS_3 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " DQ_PMOS_2 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DQ_PMOS_1 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " DQ_PMOS_0 ,Slew-rate for DQ signal group"
|
|
line.long 0x4 "DQ_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "DQ_PMOS_7 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " DQ_PMOS_6 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " DQ_PMOS_5 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " DQ_PMOS_4 ,Slew-rate for DQ signal group"
|
|
line.long 0x8 "DQ_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "DQ_PMOS_11 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " DQ_PMOS_10 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " DQ_PMOS_9 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " DQ_PMOS_8 ,Slew-rate for DQ signal group"
|
|
line.long 0xc "DQ_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "DQ_PMOS_15 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " DQ_PMOS_14 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " DQ_PMOS_13 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " DQ_PMOS_12 ,Slew-rate for DQ signal group"
|
|
group asd:(0xcc410000+0x3B0)++0x0f
|
|
line.long 0x00 "DQ_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "DQ_NMOS_3 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " DQ_NMOS_2 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DQ_NMOS_1 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " DQ_NMOS_0 ,Slew-rate for DQ signal group"
|
|
line.long 0x4 "DQ_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "DQ_NMOS_7 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " DQ_NMOS_6 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " DQ_NMOS_5 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " DQ_NMOS_4 ,Slew-rate for DQ signal group"
|
|
line.long 0x8 "DQ_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "DQ_NMOS_11 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " DQ_NMOS_10 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " DQ_NMOS_9 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " DQ_NMOS_8 ,Slew-rate for DQ signal group"
|
|
line.long 0xc "DQ_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "DQ_NMOS_15 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " DQ_NMOS_14 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " DQ_NMOS_13 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " DQ_NMOS_12 ,Slew-rate for DQ signal group"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-sram.ph
|
|
;begin include file xscale/ixp2400-sram.ph
|
|
;parameters: 0xcc810000 2
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400, IXP2800
|
|
; State: ok
|
|
;
|
|
; IXP2400-SRAM %1 %2
|
|
;
|
|
; %1 base Address
|
|
; %2 channel number
|
|
;
|
|
; --------------------------------------------------------------------------------
|
|
tree "SRAM Channel 2"
|
|
; --------------------------------------------------------------------------------
|
|
width 28.
|
|
group asd:(0xcc810000+0x00)++0x03
|
|
line.long 0x00 "SRAM_CONTROL,SRAM Controller configuration"
|
|
bitfld.long 0x00 17. "QDR_SIZZLE ,Sizzel the QDR read data bits" "no change,swap"
|
|
bitfld.long 0x00 14. " QC_IGN_EOP ,Queue Controller Ignore EOP" "always,EOP set"
|
|
textline " "
|
|
bitfld.long 0x00 13. " QC_IGN_SEG_CNT ,Queue Controller Ignore Segment Count" "always,if zero"
|
|
bitfld.long 0x00 10.--12. " PIPELINE ,Indicates number of external pipeline delays" "0 cyc,1 cyc,2 cyc,3 cyc,4 cyc,5 cyc,6 cyc,7 cyc"
|
|
textline " "
|
|
bitfld.long 0x00 7.--9. " SRAM_SIZE ,Indicates the Size of each SRAM chip" "512KB x 18,1MB x 18,2MB x 18,4MB x 18,8MB x 18,16MB x 18,32MB x 18,ext port ena"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PORT_CTL address[23:22] ,Usage of Port Controller address [23:22]" "address,R/WPE_L[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PORT_CTL address[21:20] ,Usage of Port Controller address [21:20]" "address,R/WPE_L[3]"
|
|
bitfld.long 0x00 3. " PAR_EN ,Parity" "no,yes"
|
|
group asd:(0xcc810000+0x04)++0x03
|
|
line.long 0x00 "SRAM_PARITY_STATUS_1,Parity Control and recording of last faulty Address"
|
|
bitfld.long 0x00 31. "WW_PAR byte3 ,Write Wrong Parity for byte 3" "correct,incorrect"
|
|
bitfld.long 0x00 30. " byte2 ,Write Wrong Parity for byte 2" "correct,incorrect"
|
|
textline " "
|
|
bitfld.long 0x00 29. " WW_PAR byte1 ,Write Wrong Parity for byte 1" "correct,incorrect"
|
|
bitfld.long 0x00 28. " byte0 ,Write Wrong Parity for byte 0" "correct,incorrect"
|
|
textline " "
|
|
hexmask.long 0x00 0.--23. 0x01 " ADDRRESS ,Records the address which has a perity error"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Error by Microengine ***
|
|
; --------------------------------------------------------------------------------
|
|
if (d.l(asd:(0xcc810000+0x08))&0x00010000)==0x00010000
|
|
group asd:(0xcc810000+0x08)++0x03
|
|
line.long 0x00 "SRAM_PARITY_STATUS_2,Recording of source or request which generated parity error"
|
|
bitfld.long 0x00 31. "MULT_ERR ,Multiple Errors" "no,yes"
|
|
bitfld.long 0x00 20.--24. " ME ,Indicates which Microengine was the originator" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 17.--19. " THD ,Indicates which Thread was the originator" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16. " SRC ,Source" "XScale/PCI,ME"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ERR byte3 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 2. " byte2 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 1. " byte1 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 0. " byte0 ,Indictaes error on a read" "no,yes"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Error by XScale/PCI ***
|
|
; --------------------------------------------------------------------------------
|
|
else
|
|
group asd:(0xcc810000+0x08)++0x03
|
|
line.long 0x00 "SRAM_PARITY_STATUS_2,Recording of source or request which generated parity error"
|
|
bitfld.long 0x00 31. "MULT_ERR ,Multiple Errors" "no,yes"
|
|
bitfld.long 0x00 20.--24. " ME ,Indicates which Microengine was the originator" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 17.--19. " THD ,Indicates which Source was the originator" "XScale,PCI,res,res,res,res,res,res"
|
|
bitfld.long 0x00 16. " SRC ,Source" "XScale/PCI,ME"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ERR byte3 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 2. " byte2 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 1. " byte1 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 0. " byte0 ,Indictaes error on a read" "no,yes"
|
|
endif
|
|
group asd:(0xcc810000+0x0c)++0x03
|
|
line.long 0x00 "SPARE,Reserved"
|
|
group asd:(0xcc810000+0x240)++0x03
|
|
line.long 0x00 "QDR_Rd_Ptr_Offset,Register for Configuration of QDR I vs. QDR II interface"
|
|
bitfld.long 0x00 2. "QDRn_Rx_Descramble ,Adjusts the 1/2 clock incrementing of the read pointer" "QDR I,QDR II"
|
|
bitfld.long 0x00 0.--1. " Rd_Wr_Ptr_Offset_sel ,Selects the offset between the write & read pointers" "0,1,2,3"
|
|
group asd:(0xcc810000+0x300)++0x03
|
|
line.long 0x00 "SETUP_CONTROL,QDR RCOMP Setup and Control Register"
|
|
bitfld.long 0x00 17. "SLEW_INDEX_SELECT ,Use to select either RComp[6:3] or [5:2] to be the index to slew rate" "RComp[6:3],RComp[5:2]"
|
|
bitfld.long 0x00 16. " INC_DEC_INVERT ,Invert the inc/dec signal from the pads" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ARSOS ,Address RCOMP and SCOMP Override Select" "no,yes"
|
|
bitfld.long 0x00 14. " DRSOS ,Data RCOMP and SCOMP Override Select" "no,yes"
|
|
bitfld.long 0x00 13. " KCSOS ,K Clock RCOMP and SCOMP Override Select" "no,yes"
|
|
bitfld.long 0x00 12. " DQDRSOS ,DQ Data RCOMP and SCOMP Override Select" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RCOMP_LOCK ,RCOMP Lock Bit" "unlocked,locked"
|
|
bitfld.long 0x00 10. " SLEW_RATE_TABLES ,Slew Rate Tables Programmed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " DIGITAL_FILTER_SELECT ,Selects the amount of digital filtering to be apllied to each SM RCOMP measurement cycle" "disabled,1 change/cycle,2 change/cycle,4 change/cycle"
|
|
bitfld.long 0x00 5.--7. " RCOMPPRD ,RCOMP Period (values are cvalid at 250MHz" "16ms,8ms,4ms,2ms,1ms,0.5ms,0.25ms,256 clk"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BLOCK_RCOMP_UPDATES ,Block RCOMP Updates" "normal,DRrcomp_pad_update"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RCOMP_SM_DISABLE ,RComp State Machine Disable" "normal,stall at WAIT"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FRCOMP ,Force RComp operation " "-,perform"
|
|
bitfld.long 0x00 1. " ROE_NMOS ,RCOMP Override Enable for NMOS" "dis,ena"
|
|
bitfld.long 0x00 0. " ROE_PMOS ,RCOMP Override Enable for PMOS" "dis,ena"
|
|
group asd:(0xcc810000+0x304)++0x03
|
|
line.long 0x00 "PMOS_MEASURED,8-bit RCOMP value for the PMOS drivers"
|
|
bitfld.long 0x00 8. "INC_DEC_SIGNAL ,Inc/dec signal in PMOS Eval block" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " PMOS_RCOMP_MEASURED_VALUE ,PMOS RCOMP Measured Value"
|
|
group asd:(0xcc810000+0x308)++0x03
|
|
line.long 0x00 "NMOS_MEASURED,8-bit RCOMP value for the NMOS drivers"
|
|
bitfld.long 0x00 8. "INC_DEC_SIGNAL ,Inc/dec signal in NMOS Eval block" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " NMOS_RCOMP_MEASURED_VALUE ,NMOS RCOMP Measured Value"
|
|
group asd:(0xcc810000+0x30C)++0x03
|
|
line.long 0x00 "PMOS_OVERRIDE,8-bit RCOMP value for the PMOS drivers"
|
|
hexmask.long 0x00 24.--31. 0x01 "ADDRESS ,Address PMOS RCOMP Override Value"
|
|
hexmask.long 0x00 16.--23. 0x01 " DATA ,Data PMOS RCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 8.--15. 0x01 " K_CLOCK ,K Clock PMOS RCOMP Override Value"
|
|
hexmask.long 0x00 0.--7. 0x01 " DQ_DATA ,DQ Data PMOS RCOMP Override Value"
|
|
group asd:(0xcc810000+0x310)++0x03
|
|
line.long 0x00 "NMOS_OVERRIDE,8-bit RCOMP value for the NMOS drivers"
|
|
hexmask.long 0x00 24.--31. 0x01 "ADDRESS ,Address NMOS RCOMP Override Value"
|
|
hexmask.long 0x00 16.--23. 0x01 " DATA ,Data NMOS RCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 8.--15. 0x01 " K_CLOCK ,K Clock NMOS RCOMP Override Value"
|
|
hexmask.long 0x00 0.--7. 0x01 " DQ_DATA ,DQ Data NMOS RCOMP Override Value"
|
|
group asd:(0xcc810000+0x314)++0x03
|
|
line.long 0x00 "PMOS_NMOS_SCOMP_OVERRIDE,8-bit override values for PMOS/NMOS SComp drivers"
|
|
hexmask.long 0x00 28.--31. 0x01 "ADDR_PMOS ,Address PMOS SCOMP Override Value"
|
|
hexmask.long 0x00 24.--27. 0x01 " ADDR_NMOS ,Address NMOS SCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 20.--23. 0x01 " D_PMOS ,Data PMOS SCOMP Override Value"
|
|
hexmask.long 0x00 16.--19. 0x01 " D_NMOS ,Data NMOS SCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 12.--15. 0x01 " K_CLOCK_PMOS ,K Clock PMOS SCOMP Override Value"
|
|
hexmask.long 0x00 8.--11. 0x01 " K_CLOCK_NMOS ,K Clock NMOS SCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DQ_DATA_PMOS ,DQ Data PMOS SCOMP Override Value"
|
|
hexmask.long 0x00 0.--3. 0x01 " DQ_DATA_NMOS ,DQ Data NMOS SCOMP Override Value"
|
|
group asd:(0xcc810000+0x318)++0x03
|
|
line.long 0x00 "STREGTH_SLEW_INDEX_SEL,"
|
|
bitfld.long 0x00 19. "ADDR_SLEW_RATE_IDX ,ADDR SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena"
|
|
bitfld.long 0x00 15.--18. " ADDR_STRENGTH_CTL ,Address strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DATA_SLEW_RATE_IDX ,DATA SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena"
|
|
bitfld.long 0x00 10.--13. " DATA_STRENGTH_CTL ,Data strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00"
|
|
textline " "
|
|
bitfld.long 0x00 9. " K_CLOCK_SLEW_RATE_IDX ,K CLOCK SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena"
|
|
bitfld.long 0x00 5.--8. " K_CLOCK_STRENGTH_CTL ,K Clock strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DQ_DATA_SLEW_RATE_IDX ,DQ DATA SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--3. " DQ_DATA_STRENGTH_CTL ,DQ Data strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00"
|
|
group asd:(0xcc810000+0x31C)++0x03
|
|
line.long 0x00 "ADDR_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for address signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "ADDR_PMOS_OFFSET ,Signed 8-bit offset applied to PMOS drive strength"
|
|
group asd:(0xcc810000+0x320)++0x03
|
|
line.long 0x00 "ADDR_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for address signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "ADDR_NMOS_OFFSET ,Signed 8-bit offset applied to NMOS drive strength"
|
|
group asd:(0xcc810000+0x324)++0x03
|
|
line.long 0x00 "DATA_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for Data signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "DATA_PMOS_OFFSET ,Signed 8-bit offset applied to PMOS drive strength"
|
|
group asd:(0xcc810000+0x328)++0x03
|
|
line.long 0x00 "DATA_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for Data signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "DATA_NMOS_OFFSET ,Signed 8-bit offset applied to NMOS drive strength"
|
|
group asd:(0xcc810000+0x32C)++0x03
|
|
line.long 0x00 "K_CLK_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for K Clock signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "K_CLK_PMOS_OFFSET ,Signed 8-bit offset applied to PMOS drive strength"
|
|
group asd:(0xcc810000+0x330)++0x03
|
|
line.long 0x00 "K_CLK_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for K Clock signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "K_CLK_NMOS_OFFSET ,Signed 8-bit offset applied to NMOS drive strength"
|
|
group asd:(0xcc810000+0x334)++0x03
|
|
line.long 0x00 "DQ_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for DQ signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "DQ_PMOS_OFFSET ,Signed 8-bit offset applied to PMOS drive strength"
|
|
group asd:(0xcc810000+0x338)++0x03
|
|
line.long 0x00 "DQ_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for DQ signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "DQ_NMOS_OFFSET ,Signed 8-bit offset applied to NMOS drive strength"
|
|
group asd:(0xcc810000+0x33C)++0x03
|
|
line.long 0x00 "PMOS_NMOS_VERT_OVERRIDE,"
|
|
hexmask.long 0x00 8.--15. 0x01 "NMOS_RCOMP_OVERRIDE ,Signed 8-bit offset"
|
|
textline " "
|
|
hexmask.long 0x00 0.--7. 0x01 " PMOS_RCOMP_OVERRIDE ,Signed 8-bit offset"
|
|
group asd:(0xcc810000+0x340)++0x0f
|
|
line.long 0x00 "ADDR_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "ADDR_PMOS_3 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " ADDR_PMOS_2 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " ADDR_PMOS_1 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " ADDR_PMOS_0 ,Slew-rate for Address signal group"
|
|
line.long 0x4 "ADDR_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "ADDR_PMOS_7 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " ADDR_PMOS_6 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " ADDR_PMOS_5 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " ADDR_PMOS_4 ,Slew-rate for Address signal group"
|
|
line.long 0x8 "ADDR_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "ADDR_PMOS_11 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " ADDR_PMOS_10 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " ADDR_PMOS_9 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " ADDR_PMOS_8 ,Slew-rate for Address signal group"
|
|
line.long 0xc "ADDR_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "ADDR_PMOS_15 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " ADDR_PMOS_14 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " ADDR_PMOS_13 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " ADDR_PMOS_12 ,Slew-rate for Address signal group"
|
|
group asd:(0xcc810000+0x350)++0x0f
|
|
line.long 0x00 "ADDR_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "ADDR_NMOS_3 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " ADDR_NMOS_2 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " ADDR_NMOS_1 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " ADDR_NMOS_0 ,Slew-rate for Address signal group"
|
|
line.long 0x4 "ADDR_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "ADDR_NMOS_7 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " ADDR_NMOS_6 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " ADDR_NMOS_5 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " ADDR_NMOS_4 ,Slew-rate for Address signal group"
|
|
line.long 0x8 "ADDR_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "ADDR_NMOS_11 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " ADDR_NMOS_10 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " ADDR_NMOS_9 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " ADDR_NMOS_8 ,Slew-rate for Address signal group"
|
|
line.long 0xc "ADDR_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "ADDR_NMOS_15 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " ADDR_NMOS_14 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " ADDR_NMOS_13 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " ADDR_NMOS_12 ,Slew-rate for Address signal group"
|
|
group asd:(0xcc810000+0x360)++0x0f
|
|
line.long 0x00 "DATA_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "DATA_PMOS_3 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " DATA_PMOS_2 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DATA_PMOS_1 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " DATA_PMOS_0 ,Slew-rate for Data signal group"
|
|
line.long 0x4 "DATA_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "DATA_PMOS_7 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " DATA_PMOS_6 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " DATA_PMOS_5 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " DATA_PMOS_4 ,Slew-rate for Data signal group"
|
|
line.long 0x8 "DATA_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "DATA_PMOS_11 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " DATA_PMOS_10 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " DATA_PMOS_9 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " DATA_PMOS_8 ,Slew-rate for Data signal group"
|
|
line.long 0xc "DATA_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "DATA_PMOS_15 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " DATA_PMOS_14 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " DATA_PMOS_13 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " DATA_PMOS_12 ,Slew-rate for Data signal group"
|
|
group asd:(0xcc810000+0x370)++0x0f
|
|
line.long 0x00 "DATA_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "DATA_NMOS_3 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " DATA_NMOS_2 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DATA_NMOS_1 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " DATA_NMOS_0 ,Slew-rate for Data signal group"
|
|
line.long 0x4 "DATA_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "DATA_NMOS_7 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " DATA_NMOS_6 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " DATA_NMOS_5 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " DATA_NMOS_4 ,Slew-rate for Data signal group"
|
|
line.long 0x8 "DATA_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "DATA_NMOS_11 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " DATA_NMOS_10 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " DATA_NMOS_9 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " DATA_NMOS_8 ,Slew-rate for Data signal group"
|
|
line.long 0xc "DATA_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "DATA_NMOS_15 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " DATA_NMOS_14 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " DATA_NMOS_13 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " DATA_NMOS_12 ,Slew-rate for Data signal group"
|
|
group asd:(0xcc810000+0x380)++0x0f
|
|
line.long 0x00 "K_CLK_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "K_CLK_PMOS_3 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " K_CLK_PMOS_2 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " K_CLK_PMOS_1 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " K_CLK_PMOS_0 ,Slew-rate for K Clock signal group"
|
|
line.long 0x4 "K_CLK_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "K_CLK_PMOS_7 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " K_CLK_PMOS_6 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " K_CLK_PMOS_5 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " K_CLK_PMOS_4 ,Slew-rate for K Clock signal group"
|
|
line.long 0x8 "K_CLK_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "K_CLK_PMOS_11 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " K_CLK_PMOS_10 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " K_CLK_PMOS_9 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " K_CLK_PMOS_8 ,Slew-rate for K Clock signal group"
|
|
line.long 0xc "K_CLK_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "K_CLK_PMOS_15 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " K_CLK_PMOS_14 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " K_CLK_PMOS_13 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " K_CLK_PMOS_12 ,Slew-rate for K Clock signal group"
|
|
group asd:(0xcc810000+0x390)++0x0f
|
|
line.long 0x00 "K_CLK_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "K_CLK_NMOS_3 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " K_CLK_NMOS_2 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " K_CLK_NMOS_1 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " K_CLK_NMOS_0 ,Slew-rate for K Clock signal group"
|
|
line.long 0x4 "K_CLK_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "K_CLK_NMOS_7 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " K_CLK_NMOS_6 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " K_CLK_NMOS_5 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " K_CLK_NMOS_4 ,Slew-rate for K Clock signal group"
|
|
line.long 0x8 "K_CLK_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "K_CLK_NMOS_11 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " K_CLK_NMOS_10 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " K_CLK_NMOS_9 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " K_CLK_NMOS_8 ,Slew-rate for K Clock signal group"
|
|
line.long 0xc "K_CLK_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "K_CLK_NMOS_15 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " K_CLK_NMOS_14 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " K_CLK_NMOS_13 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " K_CLK_NMOS_12 ,Slew-rate for K Clock signal group"
|
|
group asd:(0xcc810000+0x3A0)++0x0f
|
|
line.long 0x00 "DQ_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "DQ_PMOS_3 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " DQ_PMOS_2 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DQ_PMOS_1 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " DQ_PMOS_0 ,Slew-rate for DQ signal group"
|
|
line.long 0x4 "DQ_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "DQ_PMOS_7 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " DQ_PMOS_6 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " DQ_PMOS_5 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " DQ_PMOS_4 ,Slew-rate for DQ signal group"
|
|
line.long 0x8 "DQ_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "DQ_PMOS_11 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " DQ_PMOS_10 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " DQ_PMOS_9 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " DQ_PMOS_8 ,Slew-rate for DQ signal group"
|
|
line.long 0xc "DQ_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "DQ_PMOS_15 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " DQ_PMOS_14 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " DQ_PMOS_13 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " DQ_PMOS_12 ,Slew-rate for DQ signal group"
|
|
group asd:(0xcc810000+0x3B0)++0x0f
|
|
line.long 0x00 "DQ_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "DQ_NMOS_3 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " DQ_NMOS_2 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DQ_NMOS_1 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " DQ_NMOS_0 ,Slew-rate for DQ signal group"
|
|
line.long 0x4 "DQ_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "DQ_NMOS_7 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " DQ_NMOS_6 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " DQ_NMOS_5 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " DQ_NMOS_4 ,Slew-rate for DQ signal group"
|
|
line.long 0x8 "DQ_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "DQ_NMOS_11 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " DQ_NMOS_10 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " DQ_NMOS_9 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " DQ_NMOS_8 ,Slew-rate for DQ signal group"
|
|
line.long 0xc "DQ_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "DQ_NMOS_15 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " DQ_NMOS_14 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " DQ_NMOS_13 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " DQ_NMOS_12 ,Slew-rate for DQ signal group"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-sram.ph
|
|
;begin include file xscale/ixp2400-sram.ph
|
|
;parameters: 0xccc10000 3
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400, IXP2800
|
|
; State: ok
|
|
;
|
|
; IXP2400-SRAM %1 %2
|
|
;
|
|
; %1 base Address
|
|
; %2 channel number
|
|
;
|
|
; --------------------------------------------------------------------------------
|
|
tree "SRAM Channel 3"
|
|
; --------------------------------------------------------------------------------
|
|
width 28.
|
|
group asd:(0xccc10000+0x00)++0x03
|
|
line.long 0x00 "SRAM_CONTROL,SRAM Controller configuration"
|
|
bitfld.long 0x00 17. "QDR_SIZZLE ,Sizzel the QDR read data bits" "no change,swap"
|
|
bitfld.long 0x00 14. " QC_IGN_EOP ,Queue Controller Ignore EOP" "always,EOP set"
|
|
textline " "
|
|
bitfld.long 0x00 13. " QC_IGN_SEG_CNT ,Queue Controller Ignore Segment Count" "always,if zero"
|
|
bitfld.long 0x00 10.--12. " PIPELINE ,Indicates number of external pipeline delays" "0 cyc,1 cyc,2 cyc,3 cyc,4 cyc,5 cyc,6 cyc,7 cyc"
|
|
textline " "
|
|
bitfld.long 0x00 7.--9. " SRAM_SIZE ,Indicates the Size of each SRAM chip" "512KB x 18,1MB x 18,2MB x 18,4MB x 18,8MB x 18,16MB x 18,32MB x 18,ext port ena"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PORT_CTL address[23:22] ,Usage of Port Controller address [23:22]" "address,R/WPE_L[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PORT_CTL address[21:20] ,Usage of Port Controller address [21:20]" "address,R/WPE_L[3]"
|
|
bitfld.long 0x00 3. " PAR_EN ,Parity" "no,yes"
|
|
group asd:(0xccc10000+0x04)++0x03
|
|
line.long 0x00 "SRAM_PARITY_STATUS_1,Parity Control and recording of last faulty Address"
|
|
bitfld.long 0x00 31. "WW_PAR byte3 ,Write Wrong Parity for byte 3" "correct,incorrect"
|
|
bitfld.long 0x00 30. " byte2 ,Write Wrong Parity for byte 2" "correct,incorrect"
|
|
textline " "
|
|
bitfld.long 0x00 29. " WW_PAR byte1 ,Write Wrong Parity for byte 1" "correct,incorrect"
|
|
bitfld.long 0x00 28. " byte0 ,Write Wrong Parity for byte 0" "correct,incorrect"
|
|
textline " "
|
|
hexmask.long 0x00 0.--23. 0x01 " ADDRRESS ,Records the address which has a perity error"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Error by Microengine ***
|
|
; --------------------------------------------------------------------------------
|
|
if (d.l(asd:(0xccc10000+0x08))&0x00010000)==0x00010000
|
|
group asd:(0xccc10000+0x08)++0x03
|
|
line.long 0x00 "SRAM_PARITY_STATUS_2,Recording of source or request which generated parity error"
|
|
bitfld.long 0x00 31. "MULT_ERR ,Multiple Errors" "no,yes"
|
|
bitfld.long 0x00 20.--24. " ME ,Indicates which Microengine was the originator" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 17.--19. " THD ,Indicates which Thread was the originator" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16. " SRC ,Source" "XScale/PCI,ME"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ERR byte3 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 2. " byte2 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 1. " byte1 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 0. " byte0 ,Indictaes error on a read" "no,yes"
|
|
; --------------------------------------------------------------------------------
|
|
; *** Error by XScale/PCI ***
|
|
; --------------------------------------------------------------------------------
|
|
else
|
|
group asd:(0xccc10000+0x08)++0x03
|
|
line.long 0x00 "SRAM_PARITY_STATUS_2,Recording of source or request which generated parity error"
|
|
bitfld.long 0x00 31. "MULT_ERR ,Multiple Errors" "no,yes"
|
|
bitfld.long 0x00 20.--24. " ME ,Indicates which Microengine was the originator" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 17.--19. " THD ,Indicates which Source was the originator" "XScale,PCI,res,res,res,res,res,res"
|
|
bitfld.long 0x00 16. " SRC ,Source" "XScale/PCI,ME"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ERR byte3 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 2. " byte2 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 1. " byte1 ,Indictaes error on a read" "no,yes"
|
|
bitfld.long 0x00 0. " byte0 ,Indictaes error on a read" "no,yes"
|
|
endif
|
|
group asd:(0xccc10000+0x0c)++0x03
|
|
line.long 0x00 "SPARE,Reserved"
|
|
group asd:(0xccc10000+0x240)++0x03
|
|
line.long 0x00 "QDR_Rd_Ptr_Offset,Register for Configuration of QDR I vs. QDR II interface"
|
|
bitfld.long 0x00 2. "QDRn_Rx_Descramble ,Adjusts the 1/2 clock incrementing of the read pointer" "QDR I,QDR II"
|
|
bitfld.long 0x00 0.--1. " Rd_Wr_Ptr_Offset_sel ,Selects the offset between the write & read pointers" "0,1,2,3"
|
|
group asd:(0xccc10000+0x300)++0x03
|
|
line.long 0x00 "SETUP_CONTROL,QDR RCOMP Setup and Control Register"
|
|
bitfld.long 0x00 17. "SLEW_INDEX_SELECT ,Use to select either RComp[6:3] or [5:2] to be the index to slew rate" "RComp[6:3],RComp[5:2]"
|
|
bitfld.long 0x00 16. " INC_DEC_INVERT ,Invert the inc/dec signal from the pads" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ARSOS ,Address RCOMP and SCOMP Override Select" "no,yes"
|
|
bitfld.long 0x00 14. " DRSOS ,Data RCOMP and SCOMP Override Select" "no,yes"
|
|
bitfld.long 0x00 13. " KCSOS ,K Clock RCOMP and SCOMP Override Select" "no,yes"
|
|
bitfld.long 0x00 12. " DQDRSOS ,DQ Data RCOMP and SCOMP Override Select" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RCOMP_LOCK ,RCOMP Lock Bit" "unlocked,locked"
|
|
bitfld.long 0x00 10. " SLEW_RATE_TABLES ,Slew Rate Tables Programmed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " DIGITAL_FILTER_SELECT ,Selects the amount of digital filtering to be apllied to each SM RCOMP measurement cycle" "disabled,1 change/cycle,2 change/cycle,4 change/cycle"
|
|
bitfld.long 0x00 5.--7. " RCOMPPRD ,RCOMP Period (values are cvalid at 250MHz" "16ms,8ms,4ms,2ms,1ms,0.5ms,0.25ms,256 clk"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BLOCK_RCOMP_UPDATES ,Block RCOMP Updates" "normal,DRrcomp_pad_update"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RCOMP_SM_DISABLE ,RComp State Machine Disable" "normal,stall at WAIT"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FRCOMP ,Force RComp operation " "-,perform"
|
|
bitfld.long 0x00 1. " ROE_NMOS ,RCOMP Override Enable for NMOS" "dis,ena"
|
|
bitfld.long 0x00 0. " ROE_PMOS ,RCOMP Override Enable for PMOS" "dis,ena"
|
|
group asd:(0xccc10000+0x304)++0x03
|
|
line.long 0x00 "PMOS_MEASURED,8-bit RCOMP value for the PMOS drivers"
|
|
bitfld.long 0x00 8. "INC_DEC_SIGNAL ,Inc/dec signal in PMOS Eval block" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " PMOS_RCOMP_MEASURED_VALUE ,PMOS RCOMP Measured Value"
|
|
group asd:(0xccc10000+0x308)++0x03
|
|
line.long 0x00 "NMOS_MEASURED,8-bit RCOMP value for the NMOS drivers"
|
|
bitfld.long 0x00 8. "INC_DEC_SIGNAL ,Inc/dec signal in NMOS Eval block" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " NMOS_RCOMP_MEASURED_VALUE ,NMOS RCOMP Measured Value"
|
|
group asd:(0xccc10000+0x30C)++0x03
|
|
line.long 0x00 "PMOS_OVERRIDE,8-bit RCOMP value for the PMOS drivers"
|
|
hexmask.long 0x00 24.--31. 0x01 "ADDRESS ,Address PMOS RCOMP Override Value"
|
|
hexmask.long 0x00 16.--23. 0x01 " DATA ,Data PMOS RCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 8.--15. 0x01 " K_CLOCK ,K Clock PMOS RCOMP Override Value"
|
|
hexmask.long 0x00 0.--7. 0x01 " DQ_DATA ,DQ Data PMOS RCOMP Override Value"
|
|
group asd:(0xccc10000+0x310)++0x03
|
|
line.long 0x00 "NMOS_OVERRIDE,8-bit RCOMP value for the NMOS drivers"
|
|
hexmask.long 0x00 24.--31. 0x01 "ADDRESS ,Address NMOS RCOMP Override Value"
|
|
hexmask.long 0x00 16.--23. 0x01 " DATA ,Data NMOS RCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 8.--15. 0x01 " K_CLOCK ,K Clock NMOS RCOMP Override Value"
|
|
hexmask.long 0x00 0.--7. 0x01 " DQ_DATA ,DQ Data NMOS RCOMP Override Value"
|
|
group asd:(0xccc10000+0x314)++0x03
|
|
line.long 0x00 "PMOS_NMOS_SCOMP_OVERRIDE,8-bit override values for PMOS/NMOS SComp drivers"
|
|
hexmask.long 0x00 28.--31. 0x01 "ADDR_PMOS ,Address PMOS SCOMP Override Value"
|
|
hexmask.long 0x00 24.--27. 0x01 " ADDR_NMOS ,Address NMOS SCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 20.--23. 0x01 " D_PMOS ,Data PMOS SCOMP Override Value"
|
|
hexmask.long 0x00 16.--19. 0x01 " D_NMOS ,Data NMOS SCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 12.--15. 0x01 " K_CLOCK_PMOS ,K Clock PMOS SCOMP Override Value"
|
|
hexmask.long 0x00 8.--11. 0x01 " K_CLOCK_NMOS ,K Clock NMOS SCOMP Override Value"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DQ_DATA_PMOS ,DQ Data PMOS SCOMP Override Value"
|
|
hexmask.long 0x00 0.--3. 0x01 " DQ_DATA_NMOS ,DQ Data NMOS SCOMP Override Value"
|
|
group asd:(0xccc10000+0x318)++0x03
|
|
line.long 0x00 "STREGTH_SLEW_INDEX_SEL,"
|
|
bitfld.long 0x00 19. "ADDR_SLEW_RATE_IDX ,ADDR SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena"
|
|
bitfld.long 0x00 15.--18. " ADDR_STRENGTH_CTL ,Address strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DATA_SLEW_RATE_IDX ,DATA SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena"
|
|
bitfld.long 0x00 10.--13. " DATA_STRENGTH_CTL ,Data strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00"
|
|
textline " "
|
|
bitfld.long 0x00 9. " K_CLOCK_SLEW_RATE_IDX ,K CLOCK SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena"
|
|
bitfld.long 0x00 5.--8. " K_CLOCK_STRENGTH_CTL ,K Clock strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DQ_DATA_SLEW_RATE_IDX ,DQ DATA SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--3. " DQ_DATA_STRENGTH_CTL ,DQ Data strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00"
|
|
group asd:(0xccc10000+0x31C)++0x03
|
|
line.long 0x00 "ADDR_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for address signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "ADDR_PMOS_OFFSET ,Signed 8-bit offset applied to PMOS drive strength"
|
|
group asd:(0xccc10000+0x320)++0x03
|
|
line.long 0x00 "ADDR_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for address signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "ADDR_NMOS_OFFSET ,Signed 8-bit offset applied to NMOS drive strength"
|
|
group asd:(0xccc10000+0x324)++0x03
|
|
line.long 0x00 "DATA_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for Data signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "DATA_PMOS_OFFSET ,Signed 8-bit offset applied to PMOS drive strength"
|
|
group asd:(0xccc10000+0x328)++0x03
|
|
line.long 0x00 "DATA_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for Data signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "DATA_NMOS_OFFSET ,Signed 8-bit offset applied to NMOS drive strength"
|
|
group asd:(0xccc10000+0x32C)++0x03
|
|
line.long 0x00 "K_CLK_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for K Clock signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "K_CLK_PMOS_OFFSET ,Signed 8-bit offset applied to PMOS drive strength"
|
|
group asd:(0xccc10000+0x330)++0x03
|
|
line.long 0x00 "K_CLK_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for K Clock signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "K_CLK_NMOS_OFFSET ,Signed 8-bit offset applied to NMOS drive strength"
|
|
group asd:(0xccc10000+0x334)++0x03
|
|
line.long 0x00 "DQ_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for DQ signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "DQ_PMOS_OFFSET ,Signed 8-bit offset applied to PMOS drive strength"
|
|
group asd:(0xccc10000+0x338)++0x03
|
|
line.long 0x00 "DQ_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for DQ signal group"
|
|
hexmask.long 0x00 0.--7. 0x01 "DQ_NMOS_OFFSET ,Signed 8-bit offset applied to NMOS drive strength"
|
|
group asd:(0xccc10000+0x33C)++0x03
|
|
line.long 0x00 "PMOS_NMOS_VERT_OVERRIDE,"
|
|
hexmask.long 0x00 8.--15. 0x01 "NMOS_RCOMP_OVERRIDE ,Signed 8-bit offset"
|
|
textline " "
|
|
hexmask.long 0x00 0.--7. 0x01 " PMOS_RCOMP_OVERRIDE ,Signed 8-bit offset"
|
|
group asd:(0xccc10000+0x340)++0x0f
|
|
line.long 0x00 "ADDR_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "ADDR_PMOS_3 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " ADDR_PMOS_2 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " ADDR_PMOS_1 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " ADDR_PMOS_0 ,Slew-rate for Address signal group"
|
|
line.long 0x4 "ADDR_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "ADDR_PMOS_7 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " ADDR_PMOS_6 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " ADDR_PMOS_5 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " ADDR_PMOS_4 ,Slew-rate for Address signal group"
|
|
line.long 0x8 "ADDR_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "ADDR_PMOS_11 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " ADDR_PMOS_10 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " ADDR_PMOS_9 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " ADDR_PMOS_8 ,Slew-rate for Address signal group"
|
|
line.long 0xc "ADDR_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "ADDR_PMOS_15 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " ADDR_PMOS_14 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " ADDR_PMOS_13 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " ADDR_PMOS_12 ,Slew-rate for Address signal group"
|
|
group asd:(0xccc10000+0x350)++0x0f
|
|
line.long 0x00 "ADDR_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "ADDR_NMOS_3 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " ADDR_NMOS_2 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " ADDR_NMOS_1 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " ADDR_NMOS_0 ,Slew-rate for Address signal group"
|
|
line.long 0x4 "ADDR_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "ADDR_NMOS_7 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " ADDR_NMOS_6 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " ADDR_NMOS_5 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " ADDR_NMOS_4 ,Slew-rate for Address signal group"
|
|
line.long 0x8 "ADDR_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "ADDR_NMOS_11 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " ADDR_NMOS_10 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " ADDR_NMOS_9 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " ADDR_NMOS_8 ,Slew-rate for Address signal group"
|
|
line.long 0xc "ADDR_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for Address Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "ADDR_NMOS_15 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " ADDR_NMOS_14 ,Slew-rate for Address signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " ADDR_NMOS_13 ,Slew-rate for Address signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " ADDR_NMOS_12 ,Slew-rate for Address signal group"
|
|
group asd:(0xccc10000+0x360)++0x0f
|
|
line.long 0x00 "DATA_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "DATA_PMOS_3 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " DATA_PMOS_2 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DATA_PMOS_1 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " DATA_PMOS_0 ,Slew-rate for Data signal group"
|
|
line.long 0x4 "DATA_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "DATA_PMOS_7 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " DATA_PMOS_6 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " DATA_PMOS_5 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " DATA_PMOS_4 ,Slew-rate for Data signal group"
|
|
line.long 0x8 "DATA_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "DATA_PMOS_11 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " DATA_PMOS_10 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " DATA_PMOS_9 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " DATA_PMOS_8 ,Slew-rate for Data signal group"
|
|
line.long 0xc "DATA_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "DATA_PMOS_15 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " DATA_PMOS_14 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " DATA_PMOS_13 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " DATA_PMOS_12 ,Slew-rate for Data signal group"
|
|
group asd:(0xccc10000+0x370)++0x0f
|
|
line.long 0x00 "DATA_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "DATA_NMOS_3 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " DATA_NMOS_2 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DATA_NMOS_1 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " DATA_NMOS_0 ,Slew-rate for Data signal group"
|
|
line.long 0x4 "DATA_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "DATA_NMOS_7 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " DATA_NMOS_6 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " DATA_NMOS_5 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " DATA_NMOS_4 ,Slew-rate for Data signal group"
|
|
line.long 0x8 "DATA_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "DATA_NMOS_11 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " DATA_NMOS_10 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " DATA_NMOS_9 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " DATA_NMOS_8 ,Slew-rate for Data signal group"
|
|
line.long 0xc "DATA_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for Data Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "DATA_NMOS_15 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " DATA_NMOS_14 ,Slew-rate for Data signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " DATA_NMOS_13 ,Slew-rate for Data signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " DATA_NMOS_12 ,Slew-rate for Data signal group"
|
|
group asd:(0xccc10000+0x380)++0x0f
|
|
line.long 0x00 "K_CLK_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "K_CLK_PMOS_3 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " K_CLK_PMOS_2 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " K_CLK_PMOS_1 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " K_CLK_PMOS_0 ,Slew-rate for K Clock signal group"
|
|
line.long 0x4 "K_CLK_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "K_CLK_PMOS_7 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " K_CLK_PMOS_6 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " K_CLK_PMOS_5 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " K_CLK_PMOS_4 ,Slew-rate for K Clock signal group"
|
|
line.long 0x8 "K_CLK_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "K_CLK_PMOS_11 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " K_CLK_PMOS_10 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " K_CLK_PMOS_9 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " K_CLK_PMOS_8 ,Slew-rate for K Clock signal group"
|
|
line.long 0xc "K_CLK_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "K_CLK_PMOS_15 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " K_CLK_PMOS_14 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " K_CLK_PMOS_13 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " K_CLK_PMOS_12 ,Slew-rate for K Clock signal group"
|
|
group asd:(0xccc10000+0x390)++0x0f
|
|
line.long 0x00 "K_CLK_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "K_CLK_NMOS_3 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " K_CLK_NMOS_2 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " K_CLK_NMOS_1 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " K_CLK_NMOS_0 ,Slew-rate for K Clock signal group"
|
|
line.long 0x4 "K_CLK_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "K_CLK_NMOS_7 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " K_CLK_NMOS_6 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " K_CLK_NMOS_5 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " K_CLK_NMOS_4 ,Slew-rate for K Clock signal group"
|
|
line.long 0x8 "K_CLK_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "K_CLK_NMOS_11 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " K_CLK_NMOS_10 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " K_CLK_NMOS_9 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " K_CLK_NMOS_8 ,Slew-rate for K Clock signal group"
|
|
line.long 0xc "K_CLK_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for K Clock Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "K_CLK_NMOS_15 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " K_CLK_NMOS_14 ,Slew-rate for K Clock signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " K_CLK_NMOS_13 ,Slew-rate for K Clock signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " K_CLK_NMOS_12 ,Slew-rate for K Clock signal group"
|
|
group asd:(0xccc10000+0x3A0)++0x0f
|
|
line.long 0x00 "DQ_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "DQ_PMOS_3 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " DQ_PMOS_2 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DQ_PMOS_1 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " DQ_PMOS_0 ,Slew-rate for DQ signal group"
|
|
line.long 0x4 "DQ_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "DQ_PMOS_7 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " DQ_PMOS_6 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " DQ_PMOS_5 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " DQ_PMOS_4 ,Slew-rate for DQ signal group"
|
|
line.long 0x8 "DQ_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "DQ_PMOS_11 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " DQ_PMOS_10 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " DQ_PMOS_9 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " DQ_PMOS_8 ,Slew-rate for DQ signal group"
|
|
line.long 0xc "DQ_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "DQ_PMOS_15 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " DQ_PMOS_14 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " DQ_PMOS_13 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " DQ_PMOS_12 ,Slew-rate for DQ signal group"
|
|
group asd:(0xccc10000+0x3B0)++0x0f
|
|
line.long 0x00 "DQ_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x00 12.--15. 0x01 "DQ_NMOS_3 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x00 8.--11. 0x01 " DQ_NMOS_2 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x00 4.--7. 0x01 " DQ_NMOS_1 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x00 0.--3. 0x01 " DQ_NMOS_0 ,Slew-rate for DQ signal group"
|
|
line.long 0x4 "DQ_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x04 12.--15. 0x01 "DQ_NMOS_7 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x04 8.--11. 0x01 " DQ_NMOS_6 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x04 4.--7. 0x01 " DQ_NMOS_5 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x04 0.--3. 0x01 " DQ_NMOS_4 ,Slew-rate for DQ signal group"
|
|
line.long 0x8 "DQ_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x08 12.--15. 0x01 "DQ_NMOS_11 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x08 8.--11. 0x01 " DQ_NMOS_10 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x08 4.--7. 0x01 " DQ_NMOS_9 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x08 0.--3. 0x01 " DQ_NMOS_8 ,Slew-rate for DQ signal group"
|
|
line.long 0xc "DQ_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for DQ Signal group"
|
|
hexmask.long 0x0c 12.--15. 0x01 "DQ_NMOS_15 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x0c 8.--11. 0x01 " DQ_NMOS_14 ,Slew-rate for DQ signal group"
|
|
textline " "
|
|
hexmask.long 0x0c 4.--7. 0x01 " DQ_NMOS_13 ,Slew-rate for DQ signal group"
|
|
hexmask.long 0x0c 0.--3. 0x01 " DQ_NMOS_12 ,Slew-rate for DQ signal group"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-sram.ph
|
|
;begin include file xscale/ixp2400-scratchpad.ph
|
|
;parameters:
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400
|
|
; State: ok
|
|
;
|
|
; --------------------------------------------------------------------------------
|
|
tree "Scratchpad Memory"
|
|
; --------------------------------------------------------------------------------
|
|
width 20.
|
|
group asd:(0xd6000058)++0x03
|
|
line.long 0x00 "SCRATCH_RING_STATUS,Scratch ring full status"
|
|
bitfld.long 0x00 15.--15. "Ring15 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 14.--14. " Ring14 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 13.--13. " Ring13 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 12.--12. " Ring12 ,Scratch ring full indicator" "free,full"
|
|
textline " "
|
|
bitfld.long 0x00 11.--11. "Ring11 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 10.--10. " Ring10 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 9.--9. " Ring9 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 8.--8. " Ring8 ,Scratch ring full indicator" "free,full"
|
|
textline " "
|
|
bitfld.long 0x00 7.--7. "Ring7 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 6.--6. " Ring6 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 5.--5. " Ring5 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 4.--4. " Ring4 ,Scratch ring full indicator" "free,full"
|
|
textline " "
|
|
bitfld.long 0x00 3.--3. "Ring3 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 2.--2. " Ring2 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 1.--1. " Ring1 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 0.--0. " Ring0 ,Scratch ring full indicator" "free,full"
|
|
width 12.
|
|
group asd:(0xc0004800)++0x0b "Ring 0"
|
|
line.long 0x00 "RING_BASE,Base address of the Ring"
|
|
bitfld.long 0x00 30.--31. "SIZE ,Size of ring in 32-bit words" "128,256,512,1024"
|
|
hexmask.long 0x00 9.--13. 0x200 " BASE ,Ring base Address"
|
|
line.long 0x04 "RING_HEAD,Offset of Head entry from Base"
|
|
hexmask.long 0x04 2.--11. 0x4 "OFFSET ,Next address to be read on a get"
|
|
line.long 0x08 "RING_TAIL,Offset of Tail entry from Base"
|
|
hexmask.long 0x08 2.--11. 0x4 "OFFSET ,Next address to be write on a put"
|
|
group asd:(0xc0004810)++0x0b "Ring 1"
|
|
copy
|
|
group asd:(0xc0004820)++0x0b "Ring 2"
|
|
copy
|
|
group asd:(0xc0004830)++0x0b "Ring 3"
|
|
copy
|
|
group asd:(0xc0004840)++0x0b "Ring 4"
|
|
copy
|
|
group asd:(0xc0004850)++0x0b "Ring 5"
|
|
copy
|
|
group asd:(0xc0004860)++0x0b "Ring 6"
|
|
copy
|
|
group asd:(0xc0004870)++0x0b "Ring 7"
|
|
copy
|
|
group asd:(0xc0004880)++0x0b "Ring 8"
|
|
copy
|
|
group asd:(0xc0004890)++0x0b "Ring 9"
|
|
copy
|
|
group asd:(0xc00048a0)++0x0b "Ring 10"
|
|
copy
|
|
group asd:(0xc00048b0)++0x0b "Ring 11"
|
|
copy
|
|
group asd:(0xc00048c0)++0x0b "Ring 12"
|
|
copy
|
|
group asd:(0xc00048d0)++0x0b "Ring 13"
|
|
copy
|
|
group asd:(0xc00048e0)++0x0b "Ring 14"
|
|
copy
|
|
group asd:(0xc00048f0)++0x0b "Ring 15"
|
|
copy
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-scratchpad.ph
|
|
;begin include file xscale/ixp2400-hash.ph
|
|
;parameters:
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400, IXP2800
|
|
; State: ok
|
|
; addresses have to be checked against newer documentation than 0.4
|
|
;
|
|
; --------------------------------------------------------------------------------
|
|
tree "Hash Unit"
|
|
; --------------------------------------------------------------------------------
|
|
width 24.
|
|
group asd:0xc0004900++0x07
|
|
line.long 0x00 "HASH_MULTIPLIER_48_0,Least significant 32 bits of 48-bit Hash Multiplier"
|
|
line.long 0x04 "HASH_MULTIPLIER_48_1,Most significant 16 bits of 48-bit Hash Multiplier"
|
|
group asd:0xc0004908++0x07
|
|
line.long 0x00 "HASH_MULTIPLIER_64_0,Least significant 32 bits of 64-bit Hash Multiplier"
|
|
line.long 0x04 "HASH_MULTIPLIER_64_1,Most significant 32 bits of 64-bit Hash Multiplier"
|
|
group asd:0xc0004910++0x0f
|
|
line.long 0x00 "HASH_MULTIPLIER_128_0,Least significant 32 bits of 128-bit Hash Multiplier"
|
|
line.long 0x04 "HASH_MULTIPLIER_128_1,Bits 32 to 63 of the 128-bit Hash Multiplier"
|
|
line.long 0x08 "HASH_MULTIPLIER_128_2,Bits 64 to 95 of the 128-bit Hash Multiplier"
|
|
line.long 0x0c "HASH_MULTIPLIER_128_3,Most significant 32 bits of 128-bit Hash Multiplier"
|
|
group asd:0xd7000000++0x07
|
|
line.long 0x00 "HASH_OP_48_0,Least significant 32 bits of 48-bit Hash Operand/Result"
|
|
line.long 0x04 "HASH_OP_48_1,Most significant 16 bits of 48-bit Hash Operand/Result"
|
|
group asd:0xd7000010++0x07
|
|
line.long 0x00 "HASH_OP_64_0,Least significant 32 bits of 64-bit Hash Operand/Result"
|
|
line.long 0x04 "HASH_OP_64_1,Most significant 32 bits of 64-bit Hash Operand/Result"
|
|
group asd:0xd7000020++0x0f
|
|
line.long 0x00 "HASH_OP_128_0,Least significant 32 bits of 128-bit Hash Operand/Result"
|
|
line.long 0x04 "HASH_OP_128_1,Bits 32 to 63 of the 128-bit Hash Operand/Result"
|
|
line.long 0x08 "HASH_OP_128_2,Bits 64 to 95 of the 128-bit Hash Operand/Result"
|
|
line.long 0x0c "HASH_OP_128_3,Most significant 32 bits of 128-bit Hash Operand/Result"
|
|
group asd:0xd7000030++0x07
|
|
line.long 0x00 "HASH_DONE,Done flag for Hash Operation"
|
|
bitfld.long 0x0 0. " DONE ,Hash result valid" "no,yes"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-hash.ph
|
|
;begin include file xscale/ixp2400-timer.ph
|
|
;parameters:
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400, IXP2800
|
|
; State: ok
|
|
;
|
|
; --------------------------------------------------------------------------------
|
|
tree "Timer"
|
|
; --------------------------------------------------------------------------------
|
|
group asd:0xc0020000++0x33 "Timer 1"
|
|
line.long 0x00 "T_CTL,Timer Control Register"
|
|
bitfld.long 0x00 7.--7. "ACT ,Activate the Timer" "no,yes"
|
|
bitfld.long 0x00 2.--3. " PSS ,Selct the pre-scaler" "clock,clock/16,clock/256,GPIO"
|
|
line.long 0x10 "T_CLD,Timer Counter Loading Register, Counter initial value"
|
|
line.long 0x20 "T_CSR,Timer Counter Status Register, Current counter value"
|
|
line.long 0x30 "T_CLR,Timer Counter Clear Register"
|
|
bitfld.long 0x30 0.--0. "ICL ,Interrupt clear" "no,yes"
|
|
group asd:0xc0020004++0x2f "Timer 2"
|
|
copy
|
|
group asd:0xc0020008++0x2b "Timer 3"
|
|
copy
|
|
group asd:0xc002000c++0x27 "Timer 4"
|
|
copy
|
|
group asd:0xc0020040++0x03
|
|
line.long 0x00 "TWDE,Timer Watchdog Enable Register"
|
|
bitfld.long 0x00 0.--0. "WDE ,Watchdog Enable" "dis,ena"
|
|
tree.end
|
|
;end include file xscale/ixp2400-timer.ph
|
|
;begin include file xscale/ixp2400-gpio.ph
|
|
;parameters:
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400, IXP2800
|
|
; State: ok
|
|
;
|
|
; --------------------------------------------------------------------------------
|
|
tree "GPIO"
|
|
; --------------------------------------------------------------------------------
|
|
width 12.
|
|
group asd:0xc0010000++0x03
|
|
line.long 0x00 "GPIO_PLR,GPIO Pin-Level Register"
|
|
bitfld.long 0x00 7.--7. "PL7 ,GP7 Pin State" "L,H"
|
|
bitfld.long 0x00 6.--6. " PL6 ,GP6 Pin State" "L,H"
|
|
bitfld.long 0x00 5.--5. " PL5 ,GP5 Pin State" "L,H"
|
|
bitfld.long 0x00 4.--4. " PL4 ,GP4 Pin State" "L,H"
|
|
bitfld.long 0x00 3.--3. " PL3 ,GP3 Pin State" "L,H"
|
|
bitfld.long 0x00 2.--2. " PL2 ,GP2 Pin State" "L,H"
|
|
bitfld.long 0x00 1.--1. " PL1 ,GP1 Pin State" "L,H"
|
|
bitfld.long 0x00 0.--0. " PL0 ,GP0 Pin State" "L,H"
|
|
group asd:0xc0010004++0x03
|
|
line.long 0x00 "GPIO_PDPR,GPIO Pin Direction Programmable Register"
|
|
bitfld.long 0x00 7.--7. "PDP7 ,GP7 Pin Direction" "I,O"
|
|
bitfld.long 0x00 6.--6. " PDP6 ,GP6 Pin Direction" "I,O"
|
|
bitfld.long 0x00 5.--5. " PDP5 ,GP5 Pin Direction" "I,O"
|
|
bitfld.long 0x00 4.--4. " PDP4 ,GP4 Pin Direction" "I,O"
|
|
bitfld.long 0x00 3.--3. " PDP3 ,GP3 Pin Direction" "I,O"
|
|
bitfld.long 0x00 2.--2. " PDP2 ,GP2 Pin Direction" "I,O"
|
|
bitfld.long 0x00 1.--1. " PDP1 ,GP1 Pin Direction" "I,O"
|
|
bitfld.long 0x00 0.--0. " PDP0 ,GP0 Pin Direction" "I,O"
|
|
group asd:0xc0010008++0x03
|
|
line.long 0x00 "GPIO_PDSR,GPIO Pin Direction Set Register"
|
|
bitfld.long 0x00 7.--7. "PDS7 ,GP7 Pin Output Direction set" "-,O"
|
|
bitfld.long 0x00 6.--6. " PDS6 ,GP6 Pin Output Direction set" "-,O"
|
|
bitfld.long 0x00 5.--5. " PDS5 ,GP5 Pin Output Direction set" "-,O"
|
|
bitfld.long 0x00 4.--4. " PDS4 ,GP4 Pin Output Direction set" "-,O"
|
|
bitfld.long 0x00 3.--3. " PDS3 ,GP3 Pin Output Direction set" "-,O"
|
|
bitfld.long 0x00 2.--2. " PDS2 ,GP2 Pin Output Direction set" "-,O"
|
|
bitfld.long 0x00 1.--1. " PDS1 ,GP1 Pin Output Direction set" "-,O"
|
|
bitfld.long 0x00 0.--0. " PDS0 ,GP0 Pin Output Direction set" "-,O"
|
|
group asd:0xc001000c++0x03
|
|
line.long 0x00 "GPIO_PDCR,GPIO Pin Direction Clear Register"
|
|
bitfld.long 0x00 7.--7. "PDC7 ,GP7 Pin Input Direction set" "-,I"
|
|
bitfld.long 0x00 6.--6. " PDC6 ,GP6 Pin Input Direction set" "-,I"
|
|
bitfld.long 0x00 5.--5. " PDC5 ,GP5 Pin Input Direction set" "-,I"
|
|
bitfld.long 0x00 4.--4. " PDC4 ,GP4 Pin Input Direction set" "-,I"
|
|
bitfld.long 0x00 3.--3. " PDC3 ,GP3 Pin Input Direction set" "-,I"
|
|
bitfld.long 0x00 2.--2. " PDC2 ,GP2 Pin Input Direction set" "-,I"
|
|
bitfld.long 0x00 1.--1. " PDC1 ,GP1 Pin Input Direction set" "-,I"
|
|
bitfld.long 0x00 0.--0. " PDC0 ,GP0 Pin Input Direction set" "-,I"
|
|
group asd:0xc0010010++0x03
|
|
line.long 0x00 "GPIO_POPR,GPIO Output Data Programmable Register"
|
|
bitfld.long 0x00 7.--7. "POP7 ,GP7 Output Pin Set" "L,H"
|
|
bitfld.long 0x00 6.--6. " POP6 ,GP6 Output Pin Set" "L,H"
|
|
bitfld.long 0x00 5.--5. " POP5 ,GP5 Output Pin Set" "L,H"
|
|
bitfld.long 0x00 4.--4. " POP4 ,GP4 Output Pin Set" "L,H"
|
|
bitfld.long 0x00 3.--3. " POP3 ,GP3 Output Pin Set" "L,H"
|
|
bitfld.long 0x00 2.--2. " POP2 ,GP2 Output Pin Set" "L,H"
|
|
bitfld.long 0x00 1.--1. " POP1 ,GP1 Output Pin Set" "L,H"
|
|
bitfld.long 0x00 0.--0. " POP0 ,GP0 Output Pin Set" "L,H"
|
|
group asd:0xc0010014++0x03
|
|
line.long 0x00 "GPIO_POSR,GPIO Output Data Set Register"
|
|
bitfld.long 0x00 7.--7. "PS7 ,GP7 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 6.--6. " PS6 ,GP6 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 5.--5. " PS5 ,GP5 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 4.--4. " PS4 ,GP4 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 3.--3. " PS3 ,GP3 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 2.--2. " PS2 ,GP2 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 1.--1. " PS1 ,GP1 Output Pin Set" "-,H"
|
|
bitfld.long 0x00 0.--0. " PS0 ,GP0 Output Pin Set" "-,H"
|
|
group asd:0xc0010018++0x03
|
|
line.long 0x00 "GPIO_POCR,GPIO Output Data Clear Register"
|
|
bitfld.long 0x00 7.--7. "PC7 ,GP7 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 6.--6. " PC6 ,GP6 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 5.--5. " PC5 ,GP5 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 4.--4. " PC4 ,GP4 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 3.--3. " PC3 ,GP3 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 2.--2. " PC2 ,GP2 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 1.--1. " PC1 ,GP1 Output Pin Clear" "-,L"
|
|
bitfld.long 0x00 0.--0. " PC0 ,GP0 Output Pin Clear" "-,L"
|
|
group asd:0xc001001c++0x03
|
|
line.long 0x00 "GPIO_REDR,GPIO Rising-Edge Detect Enable Register"
|
|
bitfld.long 0x00 7.--7. "PRE7 ,GP7 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 6.--6. " PRE6 ,GP6 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 5.--5. " PRE5 ,GP5 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 4.--4. " PRE4 ,GP4 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 3.--3. " PRE3 ,GP3 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 2.--2. " PRE2 ,GP2 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 1.--1. " PRE1 ,GP1 Rising Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 0.--0. " PRE0 ,GP0 Rising Edge Detect" "dis,ena"
|
|
group asd:0xc0010020++0x03
|
|
line.long 0x00 "GPIO_FEDR,GPIO Falling-Edge Detect Enable Register"
|
|
bitfld.long 0x00 7.--7. "PFE7 ,GP7 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 6.--6. " PFE6 ,GP6 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 5.--5. " PFE5 ,GP5 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 4.--4. " PFE4 ,GP4 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 3.--3. " PFE3 ,GP3 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 2.--2. " PFE2 ,GP2 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 1.--1. " PFE1 ,GP1 Falling Edge Detect" "dis,ena"
|
|
bitfld.long 0x00 0.--0. " PFE0 ,GP0 Falling Edge Detect" "dis,ena"
|
|
group asd:0xc0010024++0x03
|
|
line.long 0x00 "GPIO_EDSR,GPIO Edge Detect Status Register"
|
|
bitfld.long 0x00 7.--7. "PSR7 ,GP7 Edge Detect occured" "no,yes"
|
|
bitfld.long 0x00 6.--6. " PSR6 ,GP6 Edge Detect occured" "no,yes"
|
|
bitfld.long 0x00 5.--5. " PSR5 ,GP5 Edge Detect occured" "no,yes"
|
|
bitfld.long 0x00 4.--4. " PSR4 ,GP4 Edge Detect occured" "no,yes"
|
|
bitfld.long 0x00 3.--3. " PSR3 ,GP3 Edge Detect occured" "no,yes"
|
|
bitfld.long 0x00 2.--2. " PSR2 ,GP2 Edge Detect occured" "no,yes"
|
|
bitfld.long 0x00 1.--1. " PSR1 ,GP1 Edge Detect occured" "no,yes"
|
|
bitfld.long 0x00 0.--0. " PSR0 ,GP0 Edge Detect occured" "no,yes"
|
|
group asd:0xc0010028++0x03
|
|
line.long 0x00 "GPIO_LSHR,GPIO Level Sensitive High Enable Register"
|
|
bitfld.long 0x00 7.--7. "PLH7 ,GP7 Level Sensitive High Detect Enable" "dis,ena"
|
|
bitfld.long 0x00 6.--6. " PLH6 ,GP6 Level Sensitive High Detect Enable" "dis,ena"
|
|
bitfld.long 0x00 5.--5. " PLH5 ,GP5 Level Sensitive High Detect Enable" "dis,ena"
|
|
bitfld.long 0x00 4.--4. " PLH4 ,GP4 Level Sensitive High Detect Enable" "dis,ena"
|
|
bitfld.long 0x00 3.--3. " PLH3 ,GP3 Level Sensitive High Detect Enable" "dis,ena"
|
|
bitfld.long 0x00 2.--2. " PLH2 ,GP2 Level Sensitive High Detect Enable" "dis,ena"
|
|
bitfld.long 0x00 1.--1. " PLH1 ,GP1 Level Sensitive High Detect Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--0. " PLH0 ,GP0 Level Sensitive High Detect Enable" "dis,ena"
|
|
group asd:0xc001002c++0x03
|
|
line.long 0x00 "GPIO_LSLR,GPIO Level Sensitive Low Enable Register"
|
|
bitfld.long 0x00 7.--7. "PLL7 ,GP7 Level Sensitive Low Detect Enable" "dis,ena"
|
|
bitfld.long 0x00 6.--6. " PLL6 ,GP6 Level Sensitive Low Detect Enable" "dis,ena"
|
|
bitfld.long 0x00 5.--5. " PLL5 ,GP5 Level Sensitive Low Detect Enable" "dis,ena"
|
|
bitfld.long 0x00 4.--4. " PLL4 ,GP4 Level Sensitive Low Detect Enable" "dis,ena"
|
|
bitfld.long 0x00 3.--3. " PLL3 ,GP3 Level Sensitive Low Detect Enable" "dis,ena"
|
|
bitfld.long 0x00 2.--2. " PLL2 ,GP2 Level Sensitive Low Detect Enable" "dis,ena"
|
|
bitfld.long 0x00 1.--1. " PLL1 ,GP1 Level Sensitive Low Detect Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--0. " PLL0 ,GP0 Level Sensitive Low Detect Enable" "dis,ena"
|
|
group asd:0xc0010030++0x03
|
|
line.long 0x00 "GPIO_LDSR,GPIO Level Detect status Register"
|
|
bitfld.long 0x00 7.--7. "PSR7 ,GP7 Edge Detect Status" "no,yes"
|
|
bitfld.long 0x00 6.--6. " PSR6 ,GP6 Edge Detect Status" "no,yes"
|
|
bitfld.long 0x00 5.--5. " PSR5 ,GP5 Edge Detect Status" "no,yes"
|
|
bitfld.long 0x00 4.--4. " PSR4 ,GP4 Edge Detect Status" "no,yes"
|
|
bitfld.long 0x00 3.--3. " PSR3 ,GP3 Edge Detect Status" "no,yes"
|
|
bitfld.long 0x00 2.--2. " PSR2 ,GP2 Edge Detect Status" "no,yes"
|
|
bitfld.long 0x00 1.--1. " PSR1 ,GP1 Edge Detect Status" "no,yes"
|
|
bitfld.long 0x00 0.--0. " PSR0 ,GP0 Edge Detect Status" "no,yes"
|
|
group asd:0xc0010034++0x03
|
|
line.long 0x00 "GPIO_INER,GPIO Interrupt Enable Register"
|
|
bitfld.long 0x00 7.--7. "IER7 ,GP7 Output pin set" "dis,ena"
|
|
bitfld.long 0x00 6.--6. " IER6 ,GP6 Output pin set" "dis,ena"
|
|
bitfld.long 0x00 5.--5. " IER5 ,GP5 Output pin set" "dis,ena"
|
|
bitfld.long 0x00 4.--4. " IER4 ,GP4 Output pin set" "dis,ena"
|
|
bitfld.long 0x00 3.--3. " IER3 ,GP3 Output pin set" "dis,ena"
|
|
bitfld.long 0x00 2.--2. " IER2 ,GP2 Output pin set" "dis,ena"
|
|
bitfld.long 0x00 1.--1. " IER1 ,GP1 Output pin set" "dis,ena"
|
|
bitfld.long 0x00 0.--0. " IER0 ,GP0 Output pin set" "dis,ena"
|
|
group asd:0xc0010038++0x03
|
|
line.long 0x00 "GPIO_INSR,GPIO Interrupt Set Register"
|
|
bitfld.long 0x00 7.--7. "IS7 ,GP7 Output pin set" "-,ena"
|
|
bitfld.long 0x00 6.--6. " IS6 ,GP6 Output pin set" "-,ena"
|
|
bitfld.long 0x00 5.--5. " IS5 ,GP5 Output pin set" "-,ena"
|
|
bitfld.long 0x00 4.--4. " IS4 ,GP4 Output pin set" "-,ena"
|
|
bitfld.long 0x00 3.--3. " IS3 ,GP3 Output pin set" "-,ena"
|
|
bitfld.long 0x00 2.--2. " IS2 ,GP2 Output pin set" "-,ena"
|
|
bitfld.long 0x00 1.--1. " IS1 ,GP1 Output pin set" "-,ena"
|
|
bitfld.long 0x00 0.--0. " IS0 ,GP0 Output pin set" "-,ena"
|
|
group asd:0xc001003c++0x03
|
|
line.long 0x00 "GPIO_INCR,GPIO Interrupt Reset Register"
|
|
bitfld.long 0x00 7.--7. "IC7 ,GP7 Interrupt Status Registers" "-,dis"
|
|
bitfld.long 0x00 6.--6. " IC6 ,GP6 Interrupt Status Registers" "-,dis"
|
|
bitfld.long 0x00 5.--5. " IC5 ,GP5 Interrupt Status Registers" "-,dis"
|
|
bitfld.long 0x00 4.--4. " IC4 ,GP4 Interrupt Status Registers" "-,dis"
|
|
bitfld.long 0x00 3.--3. " IC3 ,GP3 Interrupt Status Registers" "-,dis"
|
|
bitfld.long 0x00 2.--2. " IC2 ,GP2 Interrupt Status Registers" "-,dis"
|
|
bitfld.long 0x00 1.--1. " IC1 ,GP1 Interrupt Status Registers" "-,dis"
|
|
bitfld.long 0x00 0.--0. " IC0 ,GP0 Interrupt Status Registers" "-,dis"
|
|
group asd:0xc0010040++0x03
|
|
line.long 0x00 "GPIO_INST,GPIO Interrupt Status Register"
|
|
bitfld.long 0x00 7.--7. "IST7 ,GP7 Interrupt Status Registers" "no,yes"
|
|
bitfld.long 0x00 6.--6. " IST6 ,GP6 Interrupt Status Registers" "no,yes"
|
|
bitfld.long 0x00 5.--5. " IST5 ,GP5 Interrupt Status Registers" "no,yes"
|
|
bitfld.long 0x00 4.--4. " IST4 ,GP4 Interrupt Status Registers" "no,yes"
|
|
bitfld.long 0x00 3.--3. " IST3 ,GP3 Interrupt Status Registers" "no,yes"
|
|
bitfld.long 0x00 2.--2. " IST2 ,GP2 Interrupt Status Registers" "no,yes"
|
|
bitfld.long 0x00 1.--1. " IST1 ,GP1 Interrupt Status Registers" "no,yes"
|
|
bitfld.long 0x00 0.--0. " IST0 ,GP0 Interrupt Status Registers" "no,yes"
|
|
tree.end
|
|
;end include file xscale/ixp2400-gpio.ph
|
|
;begin include file xscale/ixp2400-uart.ph
|
|
;parameters: 0xc0030000 UART_ "UART"
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400, IXP2800
|
|
; State: ok
|
|
; Compare: PXA210, PXA250
|
|
;
|
|
; UART %1 %2 %3
|
|
;
|
|
; %1 Base Address
|
|
; %2 UART Abbreviation
|
|
; %3 UART Full Name
|
|
; --------------------------------------------------------------------------------
|
|
tree "UART"
|
|
; --------------------------------------------------------------------------------
|
|
width 12.
|
|
; --------------------------------------------------------------------------------
|
|
; *** DLAB == 1 ***
|
|
; --------------------------------------------------------------------------------
|
|
if (d.l(asd:0xc0030000+0x0c)&0x80)==0x80
|
|
group asd:(0xc0030000+0x00)++0x03
|
|
line.long 0x00 "UART_DLRL,Divisor Latch Low Register"
|
|
hexmask.long 0x00 0.--7. 0x01 "DLL ,Divisor Latch Register Low"
|
|
group asd:(0xc0030000+0x04)++0x03
|
|
line.long 0x00 "UART_DLRH,Divisor Latch High Register"
|
|
hexmask.long 0x00 0.--7. 0x100 "DLH ,Divisor Latch Register High"
|
|
; --------------------------------------------------------------------------------
|
|
; *** DLAB == 0 ***
|
|
; --------------------------------------------------------------------------------
|
|
else
|
|
; group asd:(%1+0x00)++0x03
|
|
; line.long 0x00 "%2RBR(r)/%2THR(w),read: Receive Buffer Register / write: Transmit Holding Register"
|
|
; hexmask.long 0x00 0.--7. 0x01 "RBR/THR ,Data byte received/transmitted"
|
|
rgroup asd:(0xc0030000+0x08)++0x03
|
|
hide.long -8. "UART_RBR,Receive Buffer Register"
|
|
IN
|
|
wgroup asd:(0xc0030000+0x00)++0x03
|
|
line.long 0x00 "UART_THR,Transmit Holding Register"
|
|
group asd:(0xc0030000+0x04)++0x03
|
|
line.long 0x00 "UART_IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 6.--6. "UUE ,UART Unit Enable" "dis,ena"
|
|
bitfld.long 0x00 4.--4. " RTOIE ,Receiver Time Out Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 2.--2. " RLSE ,Receiver Line Status Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 1.--1. " TIE ,Tranmit Data Request Interrupt Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--0. " RAVIE ,Receiver Data Available Interrupt Enable" "dis,ena"
|
|
endif
|
|
; --------------------------------------------------------------------------------
|
|
;width 24.
|
|
;group asd:(%1+0x08)++0x03
|
|
; line.long 0x00 "%2IIR(r)/%2FCR(w),read: Interrupt ID Register / write: FIFO Control Register"
|
|
; textline " "
|
|
; bitfld.long 0x00 6.--7. "%2IIR(read-only): FIFOES ,FIFO Mode Enable Status" "Non-FIFO Mode,res,res,FIFO Mode"
|
|
; bitfld.long 0x00 3.--3. " TOD ,Time Out Detected" "no,yes"
|
|
; textline " "
|
|
; bitfld.long 0x00 1.--2. "IID ,Interrupt Source" "not used,Transmit FIFO request data,Received data available,Receive error"
|
|
; bitfld.long 0x00 0.--0. " IP ,Interrupt Pending" "yes,no"
|
|
; textline " "
|
|
; bitfld.long 0x00 6.--7. "%2FCR(write-only): ITL ,Interrupt Trigger Level" "1 byte,8 bytes,16 bytes,32 bytes"
|
|
; bitfld.long 0x00 2.--2. " RESETTF ,Reset Transmitter FIFO" "-,clear"
|
|
; bitfld.long 0x00 1.--1. " RESETRF ,Reset Receive FIFO" "-,clear"
|
|
; bitfld.long 0x00 0.--0. " TRFIFOE ,Transmitter and Receive FIFO Enable" "dis,ena"
|
|
;width 12.
|
|
rgroup asd:(0xc0030000+0x08)++0x03
|
|
line.long 0x00 "UART_IIR,Interrupt ID Register"
|
|
bitfld.long 0x00 6.--7. "FIFOES ,FIFO Mode Enable Status" "Non-FIFO Mode,res,res,FIFO Mode"
|
|
bitfld.long 0x00 3.--3. " TOD ,Time Out Detected" "no,yes"
|
|
bitfld.long 0x00 1.--2. " IID ,Interrupt Source" "not used,Transmit FIFO request data,Received data available,Receive error"
|
|
bitfld.long 0x00 0.--0. " IP ,Interrupt Pending" "yes,no"
|
|
wgroup asd:(0xc0030000+0x08)++0x03
|
|
line.long 0x00 "UART_FCR,FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. "ITL ,Interrupt Trigger Level" "1 byte,8 bytes,16 bytes,32 bytes"
|
|
bitfld.long 0x00 2.--2. " RESETTF ,Reset Transmitter FIFO" "-,clear"
|
|
bitfld.long 0x00 1.--1. " RESETRF ,Reset Receive FIFO" "-,clear"
|
|
bitfld.long 0x00 0.--0. " TRFIFOE ,Transmitter and Receive FIFO Enable" "dis,ena"
|
|
group asd:(0xc0030000+0x0c)++0x03
|
|
line.long 0x00 "UART_LCR,Line Control Register"
|
|
bitfld.long 0x00 7.--7. "DLAB ,Divisor Latch Access Bit" "THR-RBR-IER,DLL-DLH"
|
|
bitfld.long 0x00 6.--6. " SB ,Set Break" "no effect,TXD out to 0"
|
|
bitfld.long 0x00 5.--5. " STKYP ,Sticky Parity" "no effect,opposite of EPS"
|
|
textline " "
|
|
bitfld.long 0x00 4.--4. "EPS ,Even Parity Select" "odd,even"
|
|
bitfld.long 0x00 3.--3. " PEN ,Parity Enable" "dis,ena"
|
|
bitfld.long 0x00 2.--2. " STB ,Stop Bits" "1,2"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit"
|
|
rgroup asd:(0xc0030000+0x14)++0x03
|
|
line.long 0x00 "UART_LSR,Line Status Register"
|
|
bitfld.long 0x00 7.--7. "FIFOE ,FIFO Error Status" "no,yes"
|
|
bitfld.long 0x00 6.--6. " TEMT ,Transmitter Empty" "no,yes"
|
|
bitfld.long 0x00 5.--5. " TDRQ ,Transmit Data Request" "no,yes"
|
|
bitfld.long 0x00 4.--4. " BI ,Break Interrupt" "no,yes"
|
|
bitfld.long 0x00 3.--3. " FE ,Framing Error" "no,yes"
|
|
bitfld.long 0x00 2.--2. " PE ,Parity Error" "no,yes"
|
|
bitfld.long 0x00 1.--1. " OE ,Overrun Error" "no,yes"
|
|
bitfld.long 0x00 0.--0. " DR ,Data Ready" "no,yes"
|
|
group asd:(0xc0030000+0x1c)++0x03
|
|
line.long 0x00 "UART_SPR,Scratch Pad Register"
|
|
hexmask.long 0x00 0.--7. 0x01 "SP ,Scratch Pad"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-uart.ph
|
|
;begin include file xscale/ixp2400-slowport.ph
|
|
;parameters:
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400, IXP2800
|
|
; State: ok
|
|
;
|
|
; --------------------------------------------------------------------------------
|
|
tree "SlowPort"
|
|
; --------------------------------------------------------------------------------
|
|
group asd:(0xc0080000)++0x03
|
|
line.long 0x00 "SP_CCR,Clock Configuration Register"
|
|
bitfld.long 0x00 0.--3. "DIVISOR ,Clock divider" "1,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30"
|
|
group asd:(0xc0080004)++0x07
|
|
line.long 0x00 "SP_WTC1,Write timing Control Register 1"
|
|
bitfld.long 0x00 6.--9. "ADDR_STROBE_DELAY ,Address strobe delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--5. " DATA_STROBE_WIDTH ,Data strobe width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--1. " DATA_HOLD ,Hold Time" "0,1,2,3"
|
|
line.long 0x04 "SP_WTC2,Write timing Control Register 2"
|
|
bitfld.long 0x04 6.--9. "ADDR_STROBE_DELAY ,Address strobe delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 2.--5. " DATA_STROBE_WIDTH ,Data strobe width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--1. " DATA_HOLD ,Hold Time" "0,1,2,3"
|
|
group asd:(0xc008000c)++0x07
|
|
line.long 0x00 "SP_RTC1,Read timing Control Register 1"
|
|
bitfld.long 0x00 6.--9. "ADDR_STROBE_DELAY ,Address strobe delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--5. " DATA_STROBE_WIDTH ,Data strobe width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--1. " DATA_HOLD ,Hold Time" "0,1,2,3"
|
|
line.long 0x04 "SP_RTC2,Read timing Control Register 2"
|
|
bitfld.long 0x04 6.--9. "ADDR_STROBE_DELAY ,Address strobe delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 2.--5. " DATA_STROBE_WIDTH ,Data strobe width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--1. " DATA_HOLD ,Hold Time" "0,1,2,3"
|
|
group asd:(0xc0080014)++0x03
|
|
line.long 0x00 "SP_FSR,Fault Status Register"
|
|
bitfld.long 0x00 4. "FIN ,Interrupt from external farmer divice 2" "no,yes"
|
|
bitfld.long 0x00 3. " TOW2 ,Write transaction ttime-out for device 2" "no,yes"
|
|
bitfld.long 0x00 2. " TOR2 ,Read transaction ttime-out for device 2" "no,yes"
|
|
bitfld.long 0x00 1. " TOW1 ,Write transaction ttime-out for device 1" "no,yes"
|
|
bitfld.long 0x00 0. " TOR1 ,Read transaction ttime-out for device 1" "no,yes"
|
|
group asd:(0xc0080018)++0x03
|
|
line.long 0x00 "SP_PCR,Protocol Control Register"
|
|
bitfld.long 0x00 0.--2. "MIC ,microprozessor interface" "mode 0,mode 1,mode 2,mode 3,mode 4,res,res,res"
|
|
group asd:(0xc008001c)++0x03
|
|
line.long 0x00 "SP_ADC,Address Size/Data Width Control Register"
|
|
bitfld.long 0x00 4.--5. "DW ,Data width" "8,16,24,32"
|
|
bitfld.long 0x00 0.--1. " AS ,Address width" "8,16,24,32"
|
|
group asd:(0xc0080020)++0x03
|
|
line.long 0x00 "SP_FAC,Flash Memory Address Size Register"
|
|
bitfld.long 0x00 0.--1. "FAS ,Flash memory address space" "8,16,24,32"
|
|
group asd:(0xc0080024)++0x03
|
|
line.long 0x00 "SP_FRM,Flash Memory Read Mode Register"
|
|
bitfld.long 0x00 0. "FRM ,Flash memory read" "32,8"
|
|
group asd:(0xc0080028)++0x03
|
|
line.long 0x00 "SP_FIN,Framer interrupt Enable Register"
|
|
bitfld.long 0x00 0. "FIN ,Framer Interrupt Enable" "dis,ena"
|
|
tree.end
|
|
;end include file xscale/ixp2400-slowport.ph
|
|
;begin include file xscale/ixp2800-fastwrite.ph
|
|
;parameters:
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2x00 Master File for IXP2400, IXP2800
|
|
; State: OK
|
|
; see also: IXP2400, IXP2800
|
|
;
|
|
; IXP2400: s/;***IXP2400*** //
|
|
; IXP2800: s///
|
|
;
|
|
; --------------------------------------------------------------------------------
|
|
tree "Fast Write"
|
|
; --------------------------------------------------------------------------------
|
|
width 20.
|
|
group asd:0xc0004000++0x03
|
|
line.long 0x00 "THD_MSG,Thread Message"
|
|
hexmask.long 0x00 0.--7. 0x01 "THD_MESSAGE ,Thread status"
|
|
group asd:0xc0004004++0x03
|
|
line.long 0x00 "THD_MSG_SUMMARY_0_0,Indication of new messages for ME cluster 0 register 0"
|
|
hexmask.long 0x00 24.--31. 0x01 "THD_MSG_VALID ME_0_3 ,Thread message valid status for ME_0_3"
|
|
hexmask.long 0x00 16.--23. 0x01 " THD_MSG_VALID ME_0_2 ,Thread message valid status for ME_0_2"
|
|
textline " "
|
|
hexmask.long 0x00 8.--15. 0x01 " THD_MSG_VALID ME_0_1 ,Thread message valid status for ME_0_1"
|
|
hexmask.long 0x00 0.--7. 0x01 " THD_MSG_VALID ME_0_0 ,Thread message valid status for ME_0_0"
|
|
group asd:0xc0004008++0x03
|
|
line.long 0x00 "THD_MSG_SUMMARY_0_1,Indication of new messages for ME cluster 0 register 1"
|
|
hexmask.long 0x00 24.--31. 0x01 "THD_MSG_VALID ME_0_7 ,Thread message valid status for ME_0_7"
|
|
hexmask.long 0x00 16.--23. 0x01 " THD_MSG_VALID ME_0_6 ,Thread message valid status for ME_0_6"
|
|
textline " "
|
|
hexmask.long 0x00 8.--15. 0x01 " THD_MSG_VALID ME_0_5 ,Thread message valid status for ME_0_5"
|
|
hexmask.long 0x00 0.--7. 0x01 " THD_MSG_VALID ME_0_4 ,Thread message valid status for ME_0_4"
|
|
group asd:0xc000400c++0x03
|
|
line.long 0x00 "THD_MSG_SUMMARY_1_0,Indication of new messages for ME cluster 1 register 0"
|
|
hexmask.long 0x00 24.--31. 0x01 "THD_MSG_VALID ME_1_3 ,Thread message valid status for ME_1_3"
|
|
hexmask.long 0x00 16.--23. 0x01 " THD_MSG_VALID ME_1_2 ,Thread message valid status for ME_1_2"
|
|
textline " "
|
|
hexmask.long 0x00 8.--15. 0x01 " THD_MSG_VALID ME_1_1 ,Thread message valid status for ME_1_1"
|
|
hexmask.long 0x00 0.--7. 0x01 " THD_MSG_VALID ME_1_0 ,Thread message valid status for ME_1_0"
|
|
group asd:0xc0004010++0x03
|
|
line.long 0x00 "THD_MSG_SUMMARY_0_1,Indication of new messages for ME cluster 1 register 1"
|
|
hexmask.long 0x00 24.--31. 0x01 "THD_MSG_VALID ME_1_7 ,Thread message valid status for ME_1_7"
|
|
hexmask.long 0x00 16.--23. 0x01 " THD_MSG_VALID ME_1_6 ,Thread message valid status for ME_1_6"
|
|
textline " "
|
|
hexmask.long 0x00 8.--15. 0x01 " THD_MSG_VALID ME_1_5 ,Thread message valid status for ME_1_5"
|
|
hexmask.long 0x00 0.--7. 0x01 " THD_MSG_VALID ME_1_4 ,Thread message valid status for ME_1_4"
|
|
group asd:0xc0004014++0x07
|
|
line.long 0x00 "SELF_DESTRUCT_0,Self destruct register 0"
|
|
bitfld.long 0x00 0.--4. "SELF_DEST_DATA ,Set bit corresponding to value, cleared by read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "SELF_DESTRUCT_1,Self destruct register 1"
|
|
bitfld.long 0x04 0.--4. "SELF_DEST_DATA ,Set bit corresponding to value, cleared by read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group asd:0xc000401c++0x03
|
|
line.long 0x00 "INTERTHREAD_SIG,INTERTHREAD_SIG"
|
|
bitfld.long 0x00 11. "ME CLUS ,ME Cluster" "0,1"
|
|
;***IXP2400*** bitfld.long 0x00 7.--9. " ME_NO ,Microengine Number" "0,1,2,3,res,res,res,res"
|
|
bitfld.long 0x00 7.--9. " ME_NO ,Microengine Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--6. " THD_NO ,THREAD Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. " SIG ,Number of signals" "no,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:0xc0004b20++0x07
|
|
line.long 0x00 "XSCALE_INT_A,Write any data to generate a XScale interrupt"
|
|
line.long 0x04 "XSCALE_INT_B,Write any data to generate a XScale interrupt"
|
|
;***IXP2400*** group asd:0xc0004500++0x7f "THD_MSG Cluster 0"
|
|
group asd:0xc0004500++0xff "THD_MSG Cluster 0"
|
|
textline "Thread 0 1 2 3 4 5 6 7 "
|
|
textline "ME 0 "
|
|
hexfld.long 0x00 " ,ME Cluster 0 ME 0 Thread 0 Status"
|
|
hexfld.long 0x04 " ,ME Cluster 0 ME 0 Thread 1 Status"
|
|
hexfld.long 0x08 " ,ME Cluster 0 ME 0 Thread 2 Status"
|
|
hexfld.long 0x0c " ,ME Cluster 0 ME 0 Thread 3 Status"
|
|
hexfld.long 0x10 " ,ME Cluster 0 ME 0 Thread 4 Status "
|
|
hexfld.long 0x14 " ,ME Cluster 0 ME 0 Thread 5 Status "
|
|
hexfld.long 0x18 " ,ME Cluster 0 ME 0 Thread 6 Status "
|
|
hexfld.long 0x1c " ,ME Cluster 0 ME 0 Thread 7 Status "
|
|
textline "ME 1 "
|
|
hexfld.long 0x20 " ,ME Cluster 0 ME 1 Thread 0 Status "
|
|
hexfld.long 0x24 " ,ME Cluster 0 ME 1 Thread 1 Status "
|
|
hexfld.long 0x28 " ,ME Cluster 0 ME 1 Thread 2 Status "
|
|
hexfld.long 0x2c " ,ME Cluster 0 ME 1 Thread 3 Status "
|
|
hexfld.long 0x30 " ,ME Cluster 0 ME 1 Thread 4 Status "
|
|
hexfld.long 0x34 " ,ME Cluster 0 ME 1 Thread 5 Status "
|
|
hexfld.long 0x38 " ,ME Cluster 0 ME 1 Thread 6 Status "
|
|
hexfld.long 0x3c " ,ME Cluster 0 ME 1 Thread 7 Status "
|
|
textline "ME 2 "
|
|
hexfld.long 0x40 " ,ME Cluster 0 ME 2 Thread 0 Status "
|
|
hexfld.long 0x44 " ,ME Cluster 0 ME 2 Thread 1 Status "
|
|
hexfld.long 0x48 " ,ME Cluster 0 ME 2 Thread 2 Status "
|
|
hexfld.long 0x4c " ,ME Cluster 0 ME 2 Thread 3 Status "
|
|
hexfld.long 0x50 " ,ME Cluster 0 ME 2 Thread 4 Status "
|
|
hexfld.long 0x54 " ,ME Cluster 0 ME 2 Thread 5 Status "
|
|
hexfld.long 0x58 " ,ME Cluster 0 ME 2 Thread 6 Status "
|
|
hexfld.long 0x5c " ,ME Cluster 0 ME 2 Thread 7 Status "
|
|
textline "ME 3 "
|
|
hexfld.long 0x60 " ,ME Cluster 0 ME 3 Thread 0 Status "
|
|
hexfld.long 0x64 " ,ME Cluster 0 ME 3 Thread 1 Status "
|
|
hexfld.long 0x68 " ,ME Cluster 0 ME 3 Thread 2 Status "
|
|
hexfld.long 0x6c " ,ME Cluster 0 ME 3 Thread 3 Status "
|
|
hexfld.long 0x70 " ,ME Cluster 0 ME 3 Thread 4 Status "
|
|
hexfld.long 0x74 " ,ME Cluster 0 ME 3 Thread 5 Status "
|
|
hexfld.long 0x78 " ,ME Cluster 0 ME 3 Thread 6 Status "
|
|
hexfld.long 0x7c " ,ME Cluster 0 ME 3 Thread 7 Status "
|
|
textline "ME 4 "
|
|
hexfld.long 0x00 " ,ME Cluster 0 ME 4 Thread 0 Status"
|
|
hexfld.long 0x04 " ,ME Cluster 0 ME 4 Thread 1 Status"
|
|
hexfld.long 0x08 " ,ME Cluster 0 ME 4 Thread 2 Status"
|
|
hexfld.long 0x0c " ,ME Cluster 0 ME 4 Thread 3 Status"
|
|
hexfld.long 0x10 " ,ME Cluster 0 ME 4 Thread 4 Status "
|
|
hexfld.long 0x14 " ,ME Cluster 0 ME 4 Thread 5 Status "
|
|
hexfld.long 0x18 " ,ME Cluster 0 ME 4 Thread 6 Status "
|
|
hexfld.long 0x1c " ,ME Cluster 0 ME 4 Thread 7 Status "
|
|
textline "ME 5 "
|
|
hexfld.long 0x20 " ,ME Cluster 0 ME 5 Thread 0 Status "
|
|
hexfld.long 0x24 " ,ME Cluster 0 ME 5 Thread 1 Status "
|
|
hexfld.long 0x28 " ,ME Cluster 0 ME 5 Thread 2 Status "
|
|
hexfld.long 0x2c " ,ME Cluster 0 ME 5 Thread 3 Status "
|
|
hexfld.long 0x30 " ,ME Cluster 0 ME 5 Thread 4 Status "
|
|
hexfld.long 0x34 " ,ME Cluster 0 ME 5 Thread 5 Status "
|
|
hexfld.long 0x38 " ,ME Cluster 0 ME 5 Thread 6 Status "
|
|
hexfld.long 0x3c " ,ME Cluster 0 ME 5 Thread 7 Status "
|
|
textline "ME 6 "
|
|
hexfld.long 0x40 " ,ME Cluster 0 ME 6 Thread 0 Status "
|
|
hexfld.long 0x44 " ,ME Cluster 0 ME 6 Thread 1 Status "
|
|
hexfld.long 0x48 " ,ME Cluster 0 ME 6 Thread 2 Status "
|
|
hexfld.long 0x4c " ,ME Cluster 0 ME 6 Thread 3 Status "
|
|
hexfld.long 0x50 " ,ME Cluster 0 ME 6 Thread 4 Status "
|
|
hexfld.long 0x54 " ,ME Cluster 0 ME 6 Thread 5 Status "
|
|
hexfld.long 0x58 " ,ME Cluster 0 ME 6 Thread 6 Status "
|
|
hexfld.long 0x5c " ,ME Cluster 0 ME 6 Thread 7 Status "
|
|
textline "ME 7 "
|
|
hexfld.long 0x60 " ,ME Cluster 0 ME 7 Thread 0 Status "
|
|
hexfld.long 0x64 " ,ME Cluster 0 ME 7 Thread 1 Status "
|
|
hexfld.long 0x68 " ,ME Cluster 0 ME 7 Thread 2 Status "
|
|
hexfld.long 0x6c " ,ME Cluster 0 ME 7 Thread 3 Status "
|
|
hexfld.long 0x70 " ,ME Cluster 0 ME 7 Thread 4 Status "
|
|
hexfld.long 0x74 " ,ME Cluster 0 ME 7 Thread 5 Status "
|
|
hexfld.long 0x78 " ,ME Cluster 0 ME 7 Thread 6 Status "
|
|
hexfld.long 0x7c " ,ME Cluster 0 ME 7 Thread 7 Status "
|
|
;***IXP2400*** group asd:0xc0004600++0x7f "THD_MSG Cluster 1"
|
|
group asd:0xc0004600++0xff "THD_MSG Cluster 1"
|
|
textline "Thread 0 1 2 3 4 5 6 7 "
|
|
textline "ME 0 "
|
|
hexfld.long 0x00 " ,ME Cluster 1 ME 0 Thread 0 Status "
|
|
hexfld.long 0x04 " ,ME Cluster 1 ME 0 Thread 1 Status "
|
|
hexfld.long 0x08 " ,ME Cluster 1 ME 0 Thread 2 Status "
|
|
hexfld.long 0x0c " ,ME Cluster 1 ME 0 Thread 3 Status "
|
|
hexfld.long 0x10 " ,ME Cluster 1 ME 0 Thread 4 Status "
|
|
hexfld.long 0x14 " ,ME Cluster 1 ME 0 Thread 5 Status "
|
|
hexfld.long 0x18 " ,ME Cluster 1 ME 0 Thread 6 Status "
|
|
hexfld.long 0x1c " ,ME Cluster 1 ME 0 Thread 7 Status "
|
|
textline "ME 1 "
|
|
hexfld.long 0x20 " ,ME Cluster 1 ME 1 Thread 0 Status "
|
|
hexfld.long 0x24 " ,ME Cluster 1 ME 1 Thread 1 Status "
|
|
hexfld.long 0x28 " ,ME Cluster 1 ME 1 Thread 2 Status "
|
|
hexfld.long 0x2c " ,ME Cluster 1 ME 1 Thread 3 Status "
|
|
hexfld.long 0x30 " ,ME Cluster 1 ME 1 Thread 4 Status "
|
|
hexfld.long 0x34 " ,ME Cluster 1 ME 1 Thread 5 Status "
|
|
hexfld.long 0x38 " ,ME Cluster 1 ME 1 Thread 6 Status "
|
|
hexfld.long 0x3c " ,ME Cluster 1 ME 1 Thread 7 Status "
|
|
textline "ME 2 "
|
|
hexfld.long 0x40 " ,ME Cluster 1 ME 2 Thread 0 Status "
|
|
hexfld.long 0x44 " ,ME Cluster 1 ME 2 Thread 1 Status "
|
|
hexfld.long 0x48 " ,ME Cluster 1 ME 2 Thread 2 Status "
|
|
hexfld.long 0x4c " ,ME Cluster 1 ME 2 Thread 3 Status "
|
|
hexfld.long 0x50 " ,ME Cluster 1 ME 2 Thread 4 Status "
|
|
hexfld.long 0x54 " ,ME Cluster 1 ME 2 Thread 5 Status "
|
|
hexfld.long 0x58 " ,ME Cluster 1 ME 2 Thread 6 Status "
|
|
hexfld.long 0x5c " ,ME Cluster 1 ME 2 Thread 7 Status "
|
|
textline "ME 3 "
|
|
hexfld.long 0x60 " ,ME Cluster 1 ME 3 Thread 0 Status "
|
|
hexfld.long 0x64 " ,ME Cluster 1 ME 3 Thread 1 Status "
|
|
hexfld.long 0x68 " ,ME Cluster 1 ME 3 Thread 2 Status "
|
|
hexfld.long 0x6c " ,ME Cluster 1 ME 3 Thread 3 Status "
|
|
hexfld.long 0x70 " ,ME Cluster 1 ME 3 Thread 4 Status "
|
|
hexfld.long 0x74 " ,ME Cluster 1 ME 3 Thread 5 Status "
|
|
hexfld.long 0x78 " ,ME Cluster 1 ME 3 Thread 6 Status "
|
|
hexfld.long 0x7c " ,ME Cluster 1 ME 3 Thread 7 Status "
|
|
textline "ME 4 "
|
|
hexfld.long 0x00 " ,ME Cluster 1 ME 4 Thread 0 Status"
|
|
hexfld.long 0x04 " ,ME Cluster 1 ME 4 Thread 1 Status"
|
|
hexfld.long 0x08 " ,ME Cluster 1 ME 4 Thread 2 Status"
|
|
hexfld.long 0x0c " ,ME Cluster 1 ME 4 Thread 3 Status"
|
|
hexfld.long 0x10 " ,ME Cluster 1 ME 4 Thread 4 Status "
|
|
hexfld.long 0x14 " ,ME Cluster 1 ME 4 Thread 5 Status "
|
|
hexfld.long 0x18 " ,ME Cluster 1 ME 4 Thread 6 Status "
|
|
hexfld.long 0x1c " ,ME Cluster 1 ME 4 Thread 7 Status "
|
|
textline "ME 5 "
|
|
hexfld.long 0x20 " ,ME Cluster 1 ME 5 Thread 0 Status "
|
|
hexfld.long 0x24 " ,ME Cluster 1 ME 5 Thread 1 Status "
|
|
hexfld.long 0x28 " ,ME Cluster 1 ME 5 Thread 2 Status "
|
|
hexfld.long 0x2c " ,ME Cluster 1 ME 5 Thread 3 Status "
|
|
hexfld.long 0x30 " ,ME Cluster 1 ME 5 Thread 4 Status "
|
|
hexfld.long 0x34 " ,ME Cluster 1 ME 5 Thread 5 Status "
|
|
hexfld.long 0x38 " ,ME Cluster 1 ME 5 Thread 6 Status "
|
|
hexfld.long 0x3c " ,ME Cluster 1 ME 5 Thread 7 Status "
|
|
textline "ME 6 "
|
|
hexfld.long 0x40 " ,ME Cluster 1 ME 6 Thread 0 Status "
|
|
hexfld.long 0x44 " ,ME Cluster 1 ME 6 Thread 1 Status "
|
|
hexfld.long 0x48 " ,ME Cluster 1 ME 6 Thread 2 Status "
|
|
hexfld.long 0x4c " ,ME Cluster 1 ME 6 Thread 3 Status "
|
|
hexfld.long 0x50 " ,ME Cluster 1 ME 6 Thread 4 Status "
|
|
hexfld.long 0x54 " ,ME Cluster 1 ME 6 Thread 5 Status "
|
|
hexfld.long 0x58 " ,ME Cluster 1 ME 6 Thread 6 Status "
|
|
hexfld.long 0x5c " ,ME Cluster 1 ME 6 Thread 7 Status "
|
|
textline "ME 7 "
|
|
hexfld.long 0x60 " ,ME Cluster 1 ME 7 Thread 0 Status "
|
|
hexfld.long 0x64 " ,ME Cluster 1 ME 7 Thread 1 Status "
|
|
hexfld.long 0x68 " ,ME Cluster 1 ME 7 Thread 2 Status "
|
|
hexfld.long 0x6c " ,ME Cluster 1 ME 7 Thread 3 Status "
|
|
hexfld.long 0x70 " ,ME Cluster 1 ME 7 Thread 4 Status "
|
|
hexfld.long 0x74 " ,ME Cluster 1 ME 7 Thread 5 Status "
|
|
hexfld.long 0x78 " ,ME Cluster 1 ME 7 Thread 6 Status "
|
|
hexfld.long 0x7c " ,ME Cluster 1 ME 7 Thread 7 Status "
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2800-fastwrite.ph
|
|
;begin include file xscale/ixp2800-msf.ph
|
|
;parameters: 0xC8000000
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2800
|
|
; State: not complete
|
|
; see also: IXP2400
|
|
;
|
|
;
|
|
; IXP2800-MSF %1
|
|
;
|
|
; %1 Base Address
|
|
;
|
|
; --------------------------------------------------------------------------------
|
|
tree "MSF"
|
|
; --------------------------------------------------------------------------------
|
|
config 24. 8.
|
|
width 20.
|
|
group asd:(0xC8000000+0x0000)++0x03
|
|
line.long 0x00 "MSF_Rx_Control,Receive Configuration Parameters"
|
|
bitfld.long 0x0 31. "RX_EN_C ,Receive enable for CSIX" "Dis,Ena"
|
|
bitfld.long 0x0 30. " RX_EN_S ,Receive Enable for SPI-4" "Dis,Ena"
|
|
bitfld.long 0x0 26. " DATA_DIP_DIS ,Check DIP-4 parity enable/disable" "Dis,Ena"
|
|
textline " "
|
|
bitfld.long 0x0 25. " FLWCTL_VPAR_TYPE ,Flow control vertical parity type" "Vert,DIP16"
|
|
bitfld.long 0x0 24. " DATA_VPAR_TYPE ,Data vertical parity type" "Vert,DIP16"
|
|
textline " "
|
|
bitfld.long 0x0 23. " FLWCTL_VPAR_DIS ,Calculate/ignore the vertical parity for CFrames on RXCDAT" "Calc,Ign"
|
|
bitfld.long 0x0 22. " DATA_VPAR_DIS ,Calculate/ignore vertical parity for CFrames on RDAT" "Calc,Ign"
|
|
textline " "
|
|
bitfld.long 0x0 21. " FLWCTL_HPAR_DIS ,Calculate horizontaly parity for CFRAMES on RXCDAT" "Calc,Ign"
|
|
bitfld.long 0x0 20. " DATA_HPAR_DI ,Calculate horizontaly parity for CFRAMES on RPAR" "Calc,Ign"
|
|
textline " "
|
|
bitfld.long 0x0 18.--19. " RSTAT_OV_VALUE ,Value used with RSTAT override" "00,01,10,11"
|
|
bitfld.long 0x0 17. " RSTAT_OVERRIDE ,Allows software to control value sent on RSTAT outputs" "RBUF,Train_Dat"
|
|
textline " "
|
|
bitfld.long 0x0 16. " DUPLEX_MODE ,Determines the way CSIX Switch fabric flow control information is communicated" "Simple,Full"
|
|
bitfld.long 0x0 14.--15. " RX_CWRD_SIZE ,Determines the CWord size on receive" "32bits,64bits,96bits,128bits"
|
|
textline " "
|
|
bitfld.long 0x0 13. " RSTAT_CLOCK ,Selects which edge of RSCLK is used to change" "Rising,Falling"
|
|
bitfld.long 0x0 12. " RSAT_SELECT ,Selects which pins are used for SPI-4 status channel outputs" "LVTTL,LVDS"
|
|
textline " "
|
|
bitfld.long 0x0 9. " CSIX_FREELIST ,Determines how received CFrames are mapped to RX_THREAD_FREELIST" "Diff,Same"
|
|
bitfld.long 0x0 6.--7. " RBUF_ELE_SIZE_2 ,Indicates element size for partition 2 of RBUF" "64bytes,128bytes,256bytes,-"
|
|
textline " "
|
|
bitfld.long 0x0 4.--5. " RBUF_ELE_SIZE_1 ,Indicates element size for partition 1 of RBUF" "64bytes,128bytes,256bytes,-"
|
|
bitfld.long 0x0 2.--3. " RBUF_ELE_SIZE_0 ,Indicates element size for partition 0 of RBUF" "64bytes,128bytes,256bytes,-"
|
|
textline " "
|
|
bitfld.long 0x0 0.--1. " RBUF_PARTITION ,Controls the number of partition for RBUF elements" "1way,2way,3way,-"
|
|
group asd:(0xC8000000+0x0004)++3
|
|
line.long 0x0 "MSF_TX_Control,Transfer Configuration Parameters"
|
|
group asd:(0xC8000000+0x0008)++3
|
|
line.long 0x0 "MSF_IRQ_Status,Interrupt Status Register"
|
|
group asd:(0xC8000000+0x000C)++3
|
|
line.long 0x0 "MSF_IRQ_Enable,Interrupt Enable Register"
|
|
group asd:(0xC8000000+0x0010)++3
|
|
line.long 0x0 "CSIX_TYPE_MAP,CSIX-Type map register"
|
|
group asd:(0xC8000000+0x0014)++3
|
|
line.long 0x0 "FC_EGRESS_STATUS,Link level flow control information received from MSF"
|
|
group asd:(0xC8000000+0x0018)++3
|
|
line.long 0x0 "FC_INGRESS_STAUS,Holds the link level flow control information received on RXCSRB"
|
|
group asd:(0xC8000000+0x0024)++3
|
|
line.long 0x0 "HWM_CONTROL,Used to control high water marks for RBUF, FCEFIFO, and FCIFIFO"
|
|
group asd:(0xC8000000+0x0028)++3
|
|
line.long 0x0 "FC_STATUS_OVERRIDE,Sets how the CSIX bits are driven onto the TXSRB and/or RXSRB"
|
|
group asd:(0xC8000000+0x0030)++3
|
|
line.long 0x0 "RX_THREAD_FREELIST_0,Add a context to RX_THREAD_FREELIST_#"
|
|
group asd:(0xC8000000+0x0034)++3
|
|
line.long 0x0 "RX_THREAD_FREELIST_1,Add a context to RX_THREAD_FREELIST_#"
|
|
group asd:(0xC8000000+0x0038)++3
|
|
line.long 0x0 "RX_THREAD_FREELIST_2,Add a context to RX_THREAD_FREELIST_#"
|
|
group asd:(0xC8000000+0x0040)++3
|
|
line.long 0x0 "RX_PORT_MAP,Used to connect SSPI-4 ports to contexts"
|
|
group asd:(0xC8000000+0x0044)++3
|
|
line.long 0x0 "RBUF_ELEMENT_DONE,RBUF element number to be reused"
|
|
group asd:(0xC8000000+0x0048)++3
|
|
line.long 0x0 "RX_CALENDAR_LENGTH,Length of the SPI-4 RSTAT calendar"
|
|
group asd:(0xC8000000+0x004C)++3
|
|
line.long 0x0 "FCEFIFO_VALIDATE,Validate a CFrame written into FCEFIFO by software"
|
|
group asd:(0xC8000000+0x0050)++3
|
|
line.long 0x0 "RX_THREADFLTO0,Receive thread freelist timeout"
|
|
group asd:(0xC8000000+0x0054)++3
|
|
line.long 0x0 "RX_THREADFLTO1,Receive thread freelist timeout"
|
|
group asd:(0xC8000000+0x0058)++3
|
|
line.long 0x0 "RX_THREADFLTO2,Receive thread freelist timeout"
|
|
group asd:(0xC8000000+0x0060)++3
|
|
line.long 0x0 "TX_SEQUENCE_0,Transmit sequence register"
|
|
group asd:(0xC8000000+0x0064)++3
|
|
line.long 0x0 "TX_SEQUENCE_1,Transmit sequence register"
|
|
group asd:(0xC8000000+0x0068)++3
|
|
line.long 0x0 "TX_SEQUENCE_2,Transmit sequence register"
|
|
group asd:(0xC8000000+0x0070)++3
|
|
line.long 0x0 "TX_CALENDAR_LENGTH,Transmit calendat length"
|
|
group asd:(0xC8000000+0x00A0)++3
|
|
line.long 0x0 "TRAIN_DATA,Used for control and status related to pin deskew training"
|
|
group asd:(0xC8000000+0x00A4)++3
|
|
line.long 0x0 "TRAIN_CALENDAR,Used for control and status related to pin deskew training"
|
|
group asd:(0xC8000000+0x00A8)++3
|
|
line.long 0x0 "TRAIN_FLOW_CONTROL,Used for control and status related to pin deskew training when CSIX Flow Control"
|
|
group asd:(0xC8000000+0x0100)--(0xC8000000+0x013C)
|
|
line.long 0x0 "FCIFIFO,Used to read CFrames"
|
|
group asd:(0xC8000000+0x0140)--(0xC8000000+0x017C)
|
|
line.long 0x0 "FCEFIFO,Used to read CFrames"
|
|
group asd:(0xC8000000+0x0300)++3
|
|
line.long 0x0 "RX_DESKEW_RDAT0,Hold deskew values per pin from training"
|
|
group asd:(0xC8000000+0x0304)++3
|
|
line.long 0x0 "RX_DESKEW_RDAT1,Hold deskew values per pin from training"
|
|
group asd:(0xC8000000+0x0308)++3
|
|
line.long 0x0 "RX_DESKEW_RDAT2,Hold deskew values per pin from training"
|
|
group asd:(0xC8000000+0x030C)++3
|
|
line.long 0x0 "RX_DESKEW_RDAT3,Hold deskew values per pin from training"
|
|
group asd:(0xC8000000+0x0310)++3
|
|
line.long 0x0 "RX_DESKEW_RDAT4,Hold deskew values per pin from training"
|
|
group asd:(0xC8000000+0x0314)++3
|
|
line.long 0x0 "RX_DESKEW_RDAT5,Hold deskew values per pin from training"
|
|
group asd:(0xC8000000+0x0318)++3
|
|
line.long 0x0 "RX_DESKEW_RDAT6,Hold deskew values per pin from training"
|
|
group asd:(0xC8000000+0x031C)++3
|
|
line.long 0x0 "RX_DESKEW_RDAT7,Hold deskew values per pin from training"
|
|
group asd:(0xC8000000+0x0320)++3
|
|
line.long 0x0 "RX_DESKEW_RDAT8,Hold deskew values per pin from training"
|
|
group asd:(0xC8000000+0x0324)++3
|
|
line.long 0x0 "RX_DESKEW_RDAT9,Hold deskew values per pin from training"
|
|
group asd:(0xC8000000+0x0328)++3
|
|
line.long 0x0 "RX_DESKEW_RDAT10,Hold deskew values per pin from training"
|
|
group asd:(0xC8000000+0x032C)++3
|
|
line.long 0x0 "RX_DESKEW_RDAT11,Hold deskew values per pin from training"
|
|
group asd:(0xC8000000+0x0330)++3
|
|
line.long 0x0 "RX_DESKEW_RDAT12,Hold deskew values per pin from training"
|
|
group asd:(0xC8000000+0x0334)++3
|
|
line.long 0x0 "RX_DESKEW_RDAT13,Hold deskew values per pin from training"
|
|
group asd:(0xC8000000+0x0338)++3
|
|
line.long 0x0 "RX_DESKEW_RDAT14,Hold deskew values per pin from training"
|
|
group asd:(0xC8000000+0x033C)++3
|
|
line.long 0x0 "RX_DESKEW_RDAT15,Hold deskew values per pin from training"
|
|
group asd:(0xC8000000+0x0340)++3
|
|
line.long 0x0 "RX_DESKEW_RCTL,Receive deskew RCTL"
|
|
group asd:(0xC8000000+0x0344)++3
|
|
line.long 0x0 "RX_DESKEW_RPAR,Receive deskew RPAR"
|
|
group asd:(0xC8000000+0x0348)++3
|
|
line.long 0x0 "RX_DESKEW_RPROT,Receive deskew RPROT"
|
|
group asd:(0xC8000000+0x034C)++3
|
|
line.long 0x0 "SPI4_DYNFILT_THRESH,Defines the number of mismatched samples"
|
|
group asd:(0xC8000000+0x0354)++3
|
|
line.long 0x0 "RX_DESKEW_RXCSOF,Receive deskew RXCSOF"
|
|
group asd:(0xC8000000+0x0358)++3
|
|
line.long 0x0 "RX_DESKEW_RXCDAT0,Receive deskew RXCDAT0"
|
|
group asd:(0xC8000000+0x035C)++3
|
|
line.long 0x0 "RX_DESKEW_RXCDAT1,Receive deskew RXCDAT1"
|
|
group asd:(0xC8000000+0x0360)++3
|
|
line.long 0x0 "RX_DESKEW_RXCDAT2,Receive deskew RXCDAT2"
|
|
group asd:(0xC8000000+0x0364)++3
|
|
line.long 0x0 "RX_DESKEW_RXCDAT3,Receive deskew RXCDAT3"
|
|
group asd:(0xC8000000+0x0368)++3
|
|
line.long 0x0 "RX_DESKEW_RXPAR,Receive deskew RXPAR"
|
|
group asd:(0xC8000000+0x036C)++3
|
|
line.long 0x0 "RX_DESKEW_RXCSRB,Receive deskew RXCSRB"
|
|
group asd:(0xC8000000+0x0370)++3
|
|
line.long 0x0 "FC_DYNFILT_THRESH,Defines number of mismatched samples"
|
|
group asd:(0xC8000000+0x0380)--(0xC8000000+0x03BC)
|
|
line.long 0x0 "TX_MTPLE_PORT_STAT,Transmit multiple port statuses"
|
|
group asd:(0xC8000000+0x0400)++3
|
|
line.long 0x0 "RX_PHASEMON_RDAT0,Allowes user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0404)++3
|
|
line.long 0x0 "RX_PHASEMON_RDAT1,Allowes user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0408)++3
|
|
line.long 0x0 "RX_PHASEMON_RDAT2,Allowes user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x040C)++3
|
|
line.long 0x0 "RX_PHASEMON_RDAT3,Allowes user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0410)++3
|
|
line.long 0x0 "RX_PHASEMON_RDAT4,Allowes user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0414)++3
|
|
line.long 0x0 "RX_PHASEMON_RDAT5,Allowes user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0418)++3
|
|
line.long 0x0 "RX_PHASEMON_RDAT6,Allowes user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x041C)++3
|
|
line.long 0x0 "RX_PHASEMON_RDAT7,Allowes user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0420)++3
|
|
line.long 0x0 "RX_PHASEMON_RDAT8,Allowes user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0424)++3
|
|
line.long 0x0 "RX_PHASEMON_RDAT9,Allowes user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0428)++3
|
|
line.long 0x0 "RX_PHASEMON_RDAT10,Allowes user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x042C)++3
|
|
line.long 0x0 "RX_PHASEMON_RDAT11,Allowes user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0430)++3
|
|
line.long 0x0 "RX_PHASEMON_RDAT12,Allowes user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0434)++3
|
|
line.long 0x0 "RX_PHASEMON_RDAT13,Allowes user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0438)++3
|
|
line.long 0x0 "RX_PHASEMON_RDAT14,Allowes user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x043C)++3
|
|
line.long 0x0 "RX_PHASEMON_RDAT15,Allowes user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0440)++3
|
|
line.long 0x0 "RX_PHASEMON_RCTL,Allow user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0444)++3
|
|
line.long 0x0 "RX_PHASEMON_RPAR,Allow user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0448)++3
|
|
line.long 0x0 "RX_PHASEMON_RPROT,Allow user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0454)++3
|
|
line.long 0x0 "RX_PHASEMON_CSOF,Allow user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0458)++3
|
|
line.long 0x0 "RX_PHASEMON_RXCDAT0,Allow user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x045C)++3
|
|
line.long 0x0 "RX_PHASEMON_RXCDAT1,Allow user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0460)++3
|
|
line.long 0x0 "RX_PHASEMON_RXCDAT2,Allow user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0464)++3
|
|
line.long 0x0 "RX_PHASEMON_RXCDAT3,Allow user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x0468)++3
|
|
line.long 0x0 "RX_PHASEMON_RXCPAR,Allow user to monitor which dll output clock phase is being used to sample the data"
|
|
group asd:(0xC8000000+0x1000)--(0xC8000000+0x13FC)
|
|
line.long 0x0 "TX_CALENDAR,Ram for TX_Calendar"
|
|
group asd:(0xC8000000+0x1400)--(0xC8000000+0x17FC)
|
|
line.long 0x0 "TX_PORT_STATUS,Statuses of TX port"
|
|
group asd:(0xC8000000+0x1800)--(0xC8000000+0x1BFC)
|
|
line.long 0x0 "TBUF_Elmt_Ctrl,TBuf element control"
|
|
;group asd:(%1+0x2000)--(%1+0x3FFF)
|
|
; line.long 0x0 "RBUF/TBUF,Receive/Transmit Buffer"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2800-msf.ph
|
|
;begin include file xscale/ixp2400-pcictrl.ph
|
|
;parameters: IXP2800
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400, IXP2800
|
|
; State: ok
|
|
; see also: 80312-pci
|
|
;
|
|
; IXP2400-PCICTRL %1
|
|
;
|
|
; %1 processor type, IXP2400 | IXP2800
|
|
;
|
|
; --------------------------------------------------------------------------------
|
|
tree "PCI Controller"
|
|
; --------------------------------------------------------------------------------
|
|
width 24.
|
|
group asd:0xdf000030++0x03
|
|
line.long 0x00 "PCI_OUT_INT_STATUS,PCI Outbound Interrupt Status"
|
|
bitfld.long 0x00 10. "DMAD1 ,Channel 1 DMA Done Interrupt" "no,yes"
|
|
bitfld.long 0x00 9. " DMAD2 ,Channel 2 DMA Done Interrupt" "no,yes"
|
|
bitfld.long 0x00 8. " DMAD3 ,Channel 3 DMA Done Interrupt" "no,yes"
|
|
bitfld.long 0x00 3. " WDI ,XPI Wachtdog Timer" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PDI ,PCI Doorbell Interrupt" "no,yes"
|
|
bitfld.long 0x00 1. " XSI ,XScale Interrrupt" "no,yes"
|
|
bitfld.long 0x00 0. " PIS ,PCI Interrrupt Status" "no,yes"
|
|
group asd:0xdf000034++0x03
|
|
line.long 0x00 "PCI_OUT_INT_MASK,PCI Outbound Interrupt Mask"
|
|
bitfld.long 0x00 10. "DMAD1M ,Channel 1 DMA Done Interrupt Mask" "dis,ena"
|
|
bitfld.long 0x00 9. " DMAD2M ,Channel 2 DMA Done Interrupt Mask" "dis,ena"
|
|
bitfld.long 0x00 8. " DMAD3M ,Channel 3 DMA Done Interrupt Mask" "dis,ena"
|
|
bitfld.long 0x00 3. " WDIM ,XPI Wachtdog Timer Mask" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PDIM ,PCI Doorbell Interrupt Mask" "dis,ena"
|
|
bitfld.long 0x00 1. " XSIM ,XScale Interrrupt Mask" "dis,ena"
|
|
bitfld.long 0x00 0. " PISM ,PCI Interrrupt Status Mask" "dis,ena"
|
|
group asd:0xdf000050++0x0f
|
|
line.long 0x00 "MAILBOX_0,Mailbox Register"
|
|
line.long 0x04 "MAILBOX_1,Mailbox Register"
|
|
line.long 0x08 "MAILBOX_2,Mailbox Register"
|
|
line.long 0x0c "MAILBOX_3,Mailbox Register"
|
|
group asd:0xdf000060++0x03
|
|
line.long 0x00 "XSCALE_DOORBELL,XScale Doorbell, Software Interrupt from host to XScale"
|
|
group asd:0xdf000064++0x03
|
|
line.long 0x00 "XSCALE_DOORBELL_SETUP,XScale Doorbell Setup, Read/Write data Address"
|
|
group asd:0xdf000070++0x03
|
|
line.long 0x00 "PCI_DOORBELL,PCI Doorbell, Software Interrupt from XScale to host"
|
|
group asd:0xdf000074++0x03
|
|
line.long 0x00 "PCI_DOORBELL_SETUP,PCI doorbell Setup, Read/Write data Address"
|
|
group asd:0xdf000080++0x17 "Channel 1"
|
|
line.long 0x00 "CHAN_BYTE_COUNT,DMA Channel Byte Transfer Count"
|
|
bitfld.long 0x00 31. "EOC ,End of Chain" "no,yes"
|
|
bitfld.long 0x00 30. " CTD ,Control Transfer Direction" "PCI to DRAM,DRAM to PCI"
|
|
hexmask.long 0x00 0.--23. 0x01 " DMA_BYTE_CNT ,DMA Byte Count"
|
|
line.long 0x04 "CHAN_PCI_ADDR,DMA Channel PCI Address"
|
|
line.long 0x08 "CHAN_DRAM_ADDR,DMA Channel DRAM Address"
|
|
line.long 0x0c "CHAN_DESC_PTR,SRAM address of the next DMA descriptor for this channel"
|
|
bitfld.long 0x0c 30.--31. "CH ,SRAM Channel number" "0,1,2,3"
|
|
hexmask.long 0x0c 4.--29. 0x10 " DESCR_PTR ,Descriptor Pionter contains the address of the next descriptor in SRAM"
|
|
line.long 0x10 "CHAN_CONTROL,DMA Channel Control for the durection of a chain operation"
|
|
hexmask.long 0x10 16.--31. 0x01 "CHAN_XFER_DONE_CNT ,Channel Transfer Done Descriptor Count"
|
|
bitfld.long 0x10 15. " UDR ,Unlinked Descriptor" "read,completed"
|
|
bitfld.long 0x10 14. " PAUSED ,Set by channel when it completes an unlinked decriptor" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x10 13. " DA ,Notify the Channel that it has linked a new descriptor to an unlinked descritpro" "no,yes"
|
|
bitfld.long 0x10 7. " CCD ,Channel chain done" "no,yes"
|
|
bitfld.long 0x10 4. " CIDR ,Channel initial descriptor" "no,yes"
|
|
bitfld.long 0x10 3. " CH_ERR ,Channel error" "no,yes"
|
|
bitfld.long 0x10 2. " CXD ,Channel transfer done" "no,yes"
|
|
bitfld.long 0x10 0. " CE ,Channel enable" "dis,ena"
|
|
line.long 0x14 "CHAN_ME_PARAM,DMA Channel ME Microengine Parameter"
|
|
bitfld.long 0x14 31. "CTX_MODE ,Number of ME contexts" "8,4"
|
|
bitfld.long 0x14 16. " ME_CLUS ,ME Cluster" "0,1"
|
|
bitfld.long 0x14 12.--14. " ME_NO ,Microengine Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 9.--11. " CTX_NO ,Context Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 4.--8. " REG_NO ,Register Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x14 0.--3. " SIG_NO ,Signal Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:0xdf0000A0++0x17 "Channel 2"
|
|
copy
|
|
group asd:0xdf0000C0++0x17 "Channel 3"
|
|
copy
|
|
textline " "
|
|
; --------------------------------------------------------------------------------
|
|
; *** IXP2400 ***
|
|
; --------------------------------------------------------------------------------
|
|
if "IXP2800"=="IXP2400"
|
|
group asd:0xdf0000E0++0x03
|
|
line.long 0x00 "DMA_INF_MODE,DMA Information Mode"
|
|
bitfld.long 0x00 2.--3. "CH3 ,DMA Channel 3 allocation" "ME,XScale,PCI,res"
|
|
bitfld.long 0x00 0.--1. " MODE ,DMA Channel 1 and 2 allocation" "CH1-XScale/CH2-ME,both XScale,both ME,both PCI"
|
|
; --------------------------------------------------------------------------------
|
|
; *** IXP2800 ***
|
|
; --------------------------------------------------------------------------------
|
|
else
|
|
group asd:0xdf0000E0++0x03
|
|
line.long 0x00 "DMA_INF_MODE,DMA Information Mode"
|
|
bitfld.long 0x00 2.--3. "CH3 ,DMA Channel 3 allocation" "ME,XScale,PCI,res"
|
|
bitfld.long 0x00 0.--1. " MODE ,DMA Channel 1 allocation" "res,XScale,ME,PCI"
|
|
endif
|
|
; --------------------------------------------------------------------------------
|
|
group asd:0xdf0000FC++0x03
|
|
line.long 0x00 "SRAM_BASE_ADDR_MASK,SRAM Address Mask"
|
|
bitfld.long 0x00 31. "DIS ,SRAM Window Disable" "ena,dis"
|
|
bitfld.long 0x00 30. " NPR ,Non Perfetchable" "no,yes"
|
|
hexmask.long 0x00 18.--27. 0x040000 " MASK ,Address Window Size Mask"
|
|
group asd:0xdf000100++0x03
|
|
line.long 0x00 "DRAM_BASE_ADDR_MASK,DRAM Address Mask"
|
|
bitfld.long 0x00 31. "DIS ,DRAM Window Disable" "ena,dis"
|
|
bitfld.long 0x00 30. " NPR ,Non Perfetchable" "no,yes"
|
|
hexmask.long 0x00 20.--29. 0x100000 " MASK ,Address Window Size Mask"
|
|
group asd:0xdf00013C++0x03
|
|
line.long 0x00 "PCI_CONTROL,PCI Block CSR"
|
|
bitfld.long 0x00 31. "CFG_PCI_BOOT ,Boot Host, reflects the value of the CFG_PCI_BOOT pin" "Ext host,IXP"
|
|
bitfld.long 0x00 30. " CFG_PROM_BOOT ,PCI Prom Boot, reflects the value of the CFG_PCI_BOOT_HOST pin" "DRAM,PROM"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CFG_PCI_ARB ,PCI Internal Arbiter pin status, pin CFG_PCI_ARB" "Ext host,IXP"
|
|
bitfld.long 0x00 28. " CFG_RST_DIR ,PCI central function pin" "Ext PCI,IXP"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DMA_IDLE ,DMA Idle" "no,yes"
|
|
bitfld.long 0x00 26. " PIN_IN_RST ,PCI Bus in Reset" "no,yes"
|
|
bitfld.long 0x00 25. " TABT_DISABLE ,Target Abort on PCI Bus disable" "no,yes"
|
|
bitfld.long 0x00 24. " XS_INT ,XScale Interrupt, perform soft interrupt to PCI" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 22. " BE_DEO ,Big Endian Data Enable Out" "no,yes"
|
|
bitfld.long 0x00 21. " BE_DEI ,Big Endian Data Enable IN" "no,yes"
|
|
bitfld.long 0x00 20. " BE_BEO ,Big Endian Byte Enable Enable Out" "no,yes"
|
|
bitfld.long 0x00 19. " BE_BEI ,Big Endian Byte Enable Enable IN" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 18. " PNI ,PCI not Interrupt" "assert PCI_INT,deassert PCI_INT"
|
|
bitfld.long 0x00 17. " PNR ,PCI not Reset" "assert PCI_RST,deassert PCI_RST"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DTX ,Discard Timer expired" "no,yes"
|
|
bitfld.long 0x00 15. " TRB ,TGT_REG_BE, A target access of Registers detected an address byte enable error" "no,yes"
|
|
bitfld.long 0x00 14. " TWR ,TGT_WR_PAR, Target write with bad data" "no,yes"
|
|
bitfld.long 0x00 13. " TAE ,TGT_ADR_ERR, Detected address parity error" "no,yes"
|
|
bitfld.long 0x00 12. " TDE ,TGT_DRAM_ERR, Detected parity error on data from the DRAM" "no,yes"
|
|
bitfld.long 0x00 11. " TSE ,TGT_SRAM_ERR, Detected parity error on data from the SRAM" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DDE ,DMA_DRAM_ERR, Detected parity error on data from the DRAM during data transfer from DRAM" "no,yes"
|
|
bitfld.long 0x00 9. " DSE ,DMA_SRAM_ERR, Detected parity error on data from the SRAM during descriptor fetch" "no,yes"
|
|
bitfld.long 0x00 8. " DCT ,Detected Command Target Interface Error" "no,yes"
|
|
bitfld.long 0x00 7. " DPE ,Detected PCI write Parity Error" "no,yes"
|
|
bitfld.long 0x00 6. " RTA ,Receive target abort" "no,yes"
|
|
bitfld.long 0x00 5. " RMA ,Receive master abort" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DPED ,MST_RD_PAR, Data parity error detected when PCI unit is initiating a PCI read" "no,yes"
|
|
bitfld.long 0x00 3. " RS ,Receive SERR" "no,yes"
|
|
bitfld.long 0x00 2. " PCII ,PCI Interrupt to XScale" "no,yes"
|
|
bitfld.long 0x00 1. " AS ,Assert SERR" "no,yes"
|
|
bitfld.long 0x00 0. " CA ,Clock Active" "no,yes"
|
|
group asd:0xdf000140++0x03
|
|
line.long 0x00 "PCI_ADDR_EXT,PCI Address Extension"
|
|
hexmask.long 0x00 16.--31. 0x00010000 "PIO_ADD ,PCI IO Space upper Address Field"
|
|
hexmask.long 0x00 13.--15. 0x20000000 " PMSA ,PCI Memory Space Address Field"
|
|
group asd:0xdf000148++0x03
|
|
line.long 0x00 "ME_PUSH_STATUS,DMA completion signal to wakeup the Microengine that started the DMA"
|
|
bitfld.long 0x00 31. "DMA3M ,DMA Channel 3" "no,yes"
|
|
bitfld.long 0x00 30. " DMA2M ,DMA Channel 2" "no,yes"
|
|
bitfld.long 0x00 29. " DMA1M ,DMA Channel 1" "no,yes"
|
|
group asd:0xdf00014c++0x03
|
|
line.long 0x00 "ME_PUSH_ENABLE,Microengine Auto-Push Source channel Enable"
|
|
bitfld.long 0x00 31. "DMA3 ,DMA Channel 3" "dis,ena"
|
|
bitfld.long 0x00 30. " DMA2 ,DMA Channel 2" "dis,ena"
|
|
bitfld.long 0x00 29. " DMA1 ,DMA Channel 1" "dis,ena"
|
|
group asd:0xdf000150++0x03
|
|
line.long 0x00 "XSCALE_ERR-STATUS,Xscale Error Status"
|
|
bitfld.long 0x00 31. "DPE ,Detected PCI write Parity Error" "no,yes"
|
|
bitfld.long 0x00 30. " RTA ,Receive target abort" "no,yes"
|
|
bitfld.long 0x00 29. " RMA ,Receive master abort" "no,yes"
|
|
bitfld.long 0x00 28. " DPED ,MST_RD_PAR" "no,yes"
|
|
bitfld.long 0x00 27. " DTE ,Discard timer expired" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 26. " RSERR ,Receive SERR" "no,yes"
|
|
bitfld.long 0x00 25. " TRB ,TGR_REG_BE, A Slave access of Registers detected a byte anbale error" "no,yes"
|
|
bitfld.long 0x00 24. " TWR ,TGT_WR_PAR, Target write with bad data" "no,yes"
|
|
bitfld.long 0x00 23. " TAE ,TGT_ADR_ERR, Detected address parity error" "no,yes"
|
|
bitfld.long 0x00 22. " TDE ,TGT_DRAM_ERR, Detected parity error on data from the DRAM" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TSE ,TGT_SRAM_ERR, Detected parity error on data from the SRAM" "no,yes"
|
|
bitfld.long 0x00 20. " DDE ,DMA_DRAM_ERR, Detected parity error on data from the DRAM" "no,yes"
|
|
bitfld.long 0x00 19. " DSE ,DMA_SRAM_ERR, Detected parity error on data from the SRAM" "no,yes"
|
|
group asd:0xdf000154++0x03
|
|
line.long 0x00 "XSCALE_ERR_ENABLE,Xscale Error Interrupt Enable"
|
|
bitfld.long 0x00 31. "DPEM ,Detected PCI write Parity Error" "dis,ena"
|
|
bitfld.long 0x00 30. " RTAM ,Receive target abort" "dis,ena"
|
|
bitfld.long 0x00 29. " RMAM ,Receive master abort" "dis,ena"
|
|
bitfld.long 0x00 28. " DPEDM ,MST_RD_PAR" "dis,ena"
|
|
bitfld.long 0x00 27. " DTEM ,Discard timer expired" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 26. " RSERRM ,Receive SERR" "dis,ena"
|
|
bitfld.long 0x00 25. " TRBM ,TGR_REG_BE" "dis,ena"
|
|
bitfld.long 0x00 24. " TWRM ,TGT_WR_PAR, Target write with bad data" "dis,ena"
|
|
bitfld.long 0x00 23. " TAEM ,TGT_ADR_ERR, Detected address parity error" "dis,ena"
|
|
bitfld.long 0x00 22. " TDEM ,TGT_DRAM_ERR, Detected parity error on data from the DRAM" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TSEM ,TGT_SRAM_ERR, Detected parity error on data from the SRAM" "dis,ena"
|
|
bitfld.long 0x00 20. " DDEM ,DMA_DRAM_ERR, Detected parity error on data from the DRAM" "dis,ena"
|
|
bitfld.long 0x00 19. " DSEM ,DMA_SRAM_ERR, Detected parity error on data from the SRAM" "dis,ena"
|
|
group asd:0xdf000158++0x03
|
|
line.long 0x00 "XSCALE_INT_STATUS,Xscale Interrupt Status Register"
|
|
bitfld.long 0x00 31. "SB ,Start BIST" "no,yes"
|
|
bitfld.long 0x00 30. " DMA3NB ,DMA Channel 3 not busy" "busy,not busy"
|
|
bitfld.long 0x00 29. " DMA2NB ,DMA Channel 2 not busy" "busy,not busy"
|
|
bitfld.long 0x00 28. " DMA1NB ,DMA Channel 1 not busy" "busy,not busy"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PIL_A ,State of PCI interrupt pin PCI_INTA_L" "0,1"
|
|
bitfld.long 0x00 26. " PIL_B ,State of PCI interrupt pin PCI_INTB_L" "0,1"
|
|
bitfld.long 0x00 25. " PCII ,Soft Interrupt from PCI to XScale" "no,yes"
|
|
group asd:0xdf00015C++0x03
|
|
line.long 0x00 "XSCALE_INT_ENABLE,Xscale Interrupt Enable Register"
|
|
bitfld.long 0x00 31. "SBM ,Start BIST" "dis,ena"
|
|
bitfld.long 0x00 30. " DMA3NBM ,DMA Channel 3 not busy" "dis,ena"
|
|
bitfld.long 0x00 29. " DMA2NBM ,DMA Channel 2 not busy" "dis,ena"
|
|
bitfld.long 0x00 28. " DMA1NBM ,DMA Channel 1 not busy" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PILM_A ,Interrupt enable for PCI_INTA_L" "dis,ena"
|
|
bitfld.long 0x00 26. " PILM_B ,Interrupt enable for PCI_INTB_L" "dis,ena"
|
|
bitfld.long 0x00 25. " PCIIM ,Soft Interrupt from PCI to XScale" "dis,ena"
|
|
width.8
|
|
tree.end
|
|
;end include file xscale/ixp2400-pcictrl.ph
|
|
;begin include file xscale/ixp2400-pcicfg.ph
|
|
;parameters:
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400, IXP2800
|
|
; State: ok
|
|
; see also: 80312-pci
|
|
;
|
|
; --------------------------------------------------------------------------------
|
|
tree "PCI Configuration"
|
|
; --------------------------------------------------------------------------------
|
|
width 18.
|
|
; --------------------------------------------------------------------------------
|
|
; *** IXP2400 ***
|
|
; --------------------------------------------------------------------------------
|
|
if d.l(asd:(0xde000000))==0x90018086
|
|
group asd:0xde000000++0x03
|
|
line.long 0x00 "PCI_VEN_DEV_ID,PCI Device and Vendor Register"
|
|
bitfld.long 0x00 16.--16. "DEV_ID ,Device ID" "IXP2400,IXP2400"
|
|
bitfld.long 0x00 0.--0. " VEND_ID ,Vendor ID" "Intel,Intel"
|
|
; --------------------------------------------------------------------------------
|
|
; *** IXP2800 ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(asd:(0xde000000)))==0x90048086
|
|
group asd:0xde000000++0x03
|
|
line.long 0x00 "PCI_VEN_DEV_ID,PCI Device and Vendor Register"
|
|
bitfld.long 0x00 16.--16. "DEV_ID ,Device ID" "IXP2800,IXP2800"
|
|
bitfld.long 0x00 0.--0. " VEND_ID ,Vendor ID" "Intel,Intel"
|
|
; --------------------------------------------------------------------------------
|
|
; *** any other Intel ***
|
|
; --------------------------------------------------------------------------------
|
|
elif (d.l(asd:(0xde000000))&0x0000ffff)==0x00008086
|
|
group asd:0xde000000++0x03
|
|
line.long 0x00 "PCI_VEN_DEV_ID,PCI Device and Vendor Register"
|
|
hexmask.long 0x00 16.--31. 0x01 "DEV_ID ,Divice ID"
|
|
bitfld.long 0x00 0.--0. " VEND_ID ,Vendor ID" "Intel,Intel"
|
|
; --------------------------------------------------------------------------------
|
|
; *** any else ***
|
|
; --------------------------------------------------------------------------------
|
|
else
|
|
group asd:0xde000000++0x03
|
|
line.long 0x00 "PCI_VEN_DEV_ID,PCI Device and Vendor Register"
|
|
hexmask.long 0x00 16.--31. 0x01 "DEV_ID ,Divice ID"
|
|
hexmask.long 0x00 0.--15. 0x01 " VEND_ID ,Vendor ID"
|
|
endif
|
|
group asd:0xde000004++0x03
|
|
line.long 0x00 "PCI_CMD_STAT,PCI Command and Status Register"
|
|
bitfld.long 0x00 31. "PERR_2 ,Parity Error" "no,yes"
|
|
bitfld.long 0x00 30. " SIG_SERR ,Signalled SERR" "no,yes"
|
|
bitfld.long 0x00 29. " RX_MA ,Master Abort" "no,yes"
|
|
bitfld.long 0x00 28. " RX_TA ,Received Target Abort as a master" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SIG_TA ,Signalled Target Abort as a target" "no,yes"
|
|
bitfld.long 0x00 25.--26. " DEVSEL ,DEVSEL speed" "00,01,10,11"
|
|
bitfld.long 0x00 24. " PERR ,PCI_PERR" "no,yes"
|
|
bitfld.long 0x00 23. " FAST_BACK_T ,Target is capable accepting fast back-to-back" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 22. " UDF ,User Definable Features" "no,yes"
|
|
bitfld.long 0x00 21. " 66MHZ ,66Mhz capability" "no,yes"
|
|
bitfld.long 0x00 9. " FAST_BACK_I ,Enables fast back-to-backtransactions" "dis,ena"
|
|
bitfld.long 0x00 8. " SERR_EN ,Enables assertion of PCI_SERR" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STEP_EN ,Enables bizarre AD stepping" "dis,ena"
|
|
bitfld.long 0x00 6. " PERR_RESP ,Enables PCI parity check" "dis,ena"
|
|
bitfld.long 0x00 5. " VGA_EN ,Enables VGA palette snoooping" "dis,ena"
|
|
bitfld.long 0x00 4. " WR_INV_EN ,Enables use of Memory Write" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SPEC_CYC ,Enables response to PCI Special Cycles" "dis,ena"
|
|
bitfld.long 0x00 2. " BUS_MASTER ,Enables PE to act as PCI master" "dis,ena"
|
|
bitfld.long 0x00 1. " MEM_SPACE ,Enables MEM Space" "dis,ena"
|
|
bitfld.long 0x00 0. " IO_SPACE ,Enables IO Space" "dis,ena"
|
|
group asd:0xde000008++0x03
|
|
line.long 0x00 "PCI_REV_CLASS,PCI Class Code Register"
|
|
hexmask.long 0x00 24.--31. 0x01 "CLASS ,Processor (0x0B)"
|
|
hexmask.long 0x00 16.--23. 0x01 " SUB_CLASS ,CO-Processor (0x40)"
|
|
textline " "
|
|
hexmask.long 0x00 8.--15. 0x01 " INTERFACE ,Programming Interface (0x01)"
|
|
hexmask.long 0x00 0.--7. 0x01 " REV ,Chip Revision"
|
|
group asd:0xde00000c++0x03
|
|
line.long 0x00 "PCI_CH_LAT_HDR,PCI Miscellaneous BIST"
|
|
bitfld.long 0x00 31. "BSUP ,BIST Support Device" "no,yes"
|
|
bitfld.long 0x00 30. " BSTRT ,BIST Start Control Bit" "IXP,BIST Int."
|
|
bitfld.long 0x00 24.--27. " BCMPT ,BIST Complete Status" "passed,failed,failed,failed,failed,failed,failed,failed,failed,failed,failed,failed,failed,failed,failed,failed"
|
|
hexmask.long 0x00 16.--23. 0x01 " HDR_TYPE ,Header Format code"
|
|
textline " "
|
|
hexmask.long 0x00 11.--15. 0x01 " LAT_TMR_VAL ,Latency timer value"
|
|
hexmask.long 0x00 8.--10. 0x01 " LAT_TMR_FIX ,Latency timer by PCI"
|
|
hexmask.long 0x00 0.--7. 0x01 " CACHE_LINE ,Cache line Size"
|
|
group asd:0xde000010++0x03
|
|
line.long 0x00 "PCI_CSR_BAR,PCI Base Address Register for CSRs"
|
|
hexmask.long 0x00 20.--31. 0x00100000 "BASE_ADDR ,PCI Base Address"
|
|
hexmask.long 0x00 4.--19. 0x01 " SIZE ,Size"
|
|
bitfld.long 0x00 0.--3. " TYPE ,Not prefetchable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:0xde000014++0x03
|
|
line.long 0x00 "PCI_SRAM_BAR,PCI Base Address Register for SRAM"
|
|
hexmask.long 0x00 28.--31. 0x10000000 "BASE_ADDR ,PCI base address for SRAM"
|
|
hexmask.long 0x00 18.--27. 0x00040000 " PROG_ADDR ,Window size by CFG_PROM_BOOT"
|
|
hexmask.long 0x00 4.--17. 0x00000010 " FIX_ADDR ,Read as 0x0"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PREF ,Prefetchable space determined" "0,1"
|
|
bitfld.long 0x00 0.--2. " TYPE ,Locatable anywhere" "0,1,2,3,4,5,6,7"
|
|
group asd:0xde000018++0x03
|
|
line.long 0x00 "PCI_DRAM_BAR,PCI Base Address Register for DRAM"
|
|
hexmask.long 0x00 30.--31. 0x40000000 "BASE_ADDR ,PCI base address for DRAM"
|
|
hexmask.long 0x00 20.--29. 0x00100000 " PROG_ADDR ,Window size by CFG_PROM_BOOT"
|
|
hexmask.long 0x00 4.--19. 0x00000010 " FIX_ADDR ,Read as 0x0"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PREF ,Prefetchable space determined" "0,1"
|
|
bitfld.long 0x00 0.--2. " TYPE ,Locatable anywhere" "0,1,2,3,4,5,6,7"
|
|
group asd:0xde00002c++0x03
|
|
line.long 0x00 "PCI_SUBSYS,PCI Subsystem ID"
|
|
hexmask.long 0x00 16.--31. 0x01 "SID ,Subsystem ID"
|
|
hexmask.long 0x00 0.--15. 0x01 " SVID ,Subsystem Vendor ID"
|
|
group asd:0xde00003c++0x03
|
|
line.long 0x00 "PCI_INT_LAT,PCI Interrupt Latency"
|
|
hexmask.long 0x00 24.--31. 0x01 "MAX_LAT ,How often device get to bus in units"
|
|
hexmask.long 0x00 16.--23. 0x01 " MIN_GNT ,Time need for a burst"
|
|
textline " "
|
|
hexmask.long 0x00 8.--15. 0x01 " INT_PIN ,Which interrupt pin is used"
|
|
hexmask.long 0x00 0.--7. 0x01 " INT_LINE ,System interrupt information"
|
|
group asd:0xde000060++0x03
|
|
line.long 0x00 "PCI_RCOMP_OVERRIDE,PCI RCOMP Override"
|
|
bitfld.long 0x00 20. "RCOMP_OR_EN ,rcomp override enable" "dis,ena"
|
|
bitfld.long 0x00 16.--19. " RCOMP_SLEW_OR ,rcomp slew override" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
textline " "
|
|
hexmask.long 0x00 8.--14. 0x01 " N_RCOMP_OR ,N rcomp override"
|
|
hexmask.long 0x00 0.--6. 0x01 " P_RCOMP_OR ,P rcomp override"
|
|
group asd:0xde000064++0x03
|
|
line.long 0x00 "PCI_RCOMP_STAT,PCI RCOMP Status"
|
|
bitfld.long 0x00 16. "NINC ,digital output of comparator" "0,1"
|
|
hexmask.long 0x00 8.--14. 0x01 " N_STREN ,N Strenght"
|
|
hexmask.long 0x00 0.--6. 0x01 " P_STREN ,P Strenght"
|
|
group asd:0xde000078++0x03
|
|
line.long 0x00 "PCI_IXP_PARAM,IXP PArameters Register"
|
|
bitfld.long 0x00 1. "DPATH ,Current PCI UNIT 64bit mode" "system,inversion"
|
|
bitfld.long 0x00 0. " D64 ,Attempts D64 tranactions" "no,yes"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-pcicfg.ph
|
|
;begin include file xscale/ixp2800-int.ph
|
|
;parameters:
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400, Masterfile for IXP2800
|
|
; State: IXP2400 ok, IXP2800 not complete
|
|
; see also: IXP2800
|
|
;
|
|
; IXP2400: s///
|
|
; IXP2800: s/;***IXP2800***//
|
|
;
|
|
; --------------------------------------------------------------------------------
|
|
tree "Interrupt Controller"
|
|
; --------------------------------------------------------------------------------
|
|
width 20.
|
|
group asd:0xd6000000++0x03
|
|
line.long 0x00 "RAW_STATUS,Raw Interrupt Status"
|
|
bitfld.long 0x00 26. "THD64_95_B ,OR of all interrupt bits in THD_INT_B_2" "no,yes"
|
|
bitfld.long 0x00 24. " THD0_31_B ,OR of all interrupt bits in THD_INT_B_0" "no,yes"
|
|
bitfld.long 0x00 18. " THD64_95_A ,OR of all interrupt bits in THD_INT_A_2" "no,yes"
|
|
bitfld.long 0x00 16. " THD0_31_A ,OR of all interrupt bits in THD_INT_A_0" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PCI_INT ,PCI Interrupt A & B" "no,yes"
|
|
bitfld.long 0x00 14. " ME_ATTN ,Microengine Attention" "no,yes"
|
|
bitfld.long 0x00 13. " PCI_DOORBELL ,PCI Doorbell Interrupt" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DMA2_DONE ,Stautus DMA Engine" "no,yes"
|
|
bitfld.long 0x00 11. " DMA1_DONE ,Stautus DMA Engine" "no,yes"
|
|
bitfld.long 0x00 10. " DMA0_DONE ,Stautus DMA Engine" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SP_FINT ,Slow Port Interrupt" "no,yes"
|
|
bitfld.long 0x00 8. " PMU_INT ,PMU Interrupt" "no,yes"
|
|
bitfld.long 0x00 7. " TIMER3_UFLW ,Timer Underflow Interrupt" "no,yes"
|
|
bitfld.long 0x00 6. " TIMER2_UFLW ,Timer Underflow Interrupt" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIMER1_UFLW ,Timer Underflow Interrupt" "no,yes"
|
|
bitfld.long 0x00 4. " TIMER0_UFLW ,Timer Underflow Interrupt" "no,yes"
|
|
bitfld.long 0x00 3. " GPIO_INT ,GPIO Unit Interrupt Request" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " UART_INT ,UART Interrupt Request" "no,yes"
|
|
bitfld.long 0x00 1. " ERROR_SUM ,Error Status Register Interrupt" "no,yes"
|
|
bitfld.long 0x00 0. " SOFTINT ,Software Interrupt" "no,yes"
|
|
group asd:0xd6000004++0x03
|
|
line.long 0x00 "FIQ_STATUS,FIQ Interrupt Status"
|
|
bitfld.long 0x00 26. "THD64_95_B ,HD64_95_B" "no,yes"
|
|
bitfld.long 0x00 24. " THD0_31_B ,HD0_31_B" "no,yes"
|
|
bitfld.long 0x00 18. " THD64_95_A ,HD64_95_A" "no,yes"
|
|
bitfld.long 0x00 16. " THD0_31_A ,HD0_31_A" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PCI_INT ,PCI Interrupt A & B" "no,yes"
|
|
bitfld.long 0x00 14. " ME_ATTN ,Microengine Attention" "no,yes"
|
|
bitfld.long 0x00 13. " PCI_DOORBELL ,PCI Doorbell Interrupt" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DMA2_DONE ,Stautus DMA Engine" "no,yes"
|
|
bitfld.long 0x00 11. " DMA1_DONE ,Stautus DMA Engine" "no,yes"
|
|
bitfld.long 0x00 10. " DMA0_DONE ,Stautus DMA Engine" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SP_FINT ,Slow Port Interrupt" "no,yes"
|
|
bitfld.long 0x00 8. " PMU_INT ,PMU Interrupt" "no,yes"
|
|
bitfld.long 0x00 7. " TIMER3_UFLW ,Timer Underflow Interrupt" "no,yes"
|
|
bitfld.long 0x00 6. " TIMER2_UFLW ,Timer Underflow Interrupt" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIMER1_UFLW ,Timer Underflow Interrupt" "no,yes"
|
|
bitfld.long 0x00 4. " TIMER0_UFLW ,Timer Underflow Interrupt" "no,yes"
|
|
bitfld.long 0x00 3. " GPIO_INT ,GPIO Unit Interrupt Request" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " UART_INT ,UART Interrupt Request" "no,yes"
|
|
bitfld.long 0x00 1. " ERROR_SUM ,Error Status Register Interrupt" "no,yes"
|
|
bitfld.long 0x00 0. " SOFTINT ,Software Interrupt" "no,yes"
|
|
group asd:0xd6000008++0x03
|
|
line.long 0x00 "IRQ_STATUS,IRQ Interrupt Status"
|
|
bitfld.long 0x00 26. "THD64_95_B ,OR of all interrupt bits in THD_INT_B_2" "no,yes"
|
|
bitfld.long 0x00 24. " THD0_31_B ,OR of all interrupt bits in THD_INT_B_0" "no,yes"
|
|
bitfld.long 0x00 18. " THD64_95_A ,OR of all interrupt bits in THD_INT_A_2" "no,yes"
|
|
bitfld.long 0x00 16. " THD0_31_A ,OR of all interrupt bits in THD_INT_A_0" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PCI_INT ,PCI Interrupt A & B" "no,yes"
|
|
bitfld.long 0x00 14. " ME_ATTN ,Microengine Attention" "no,yes"
|
|
bitfld.long 0x00 13. " PCI_DOORBELL ,PCI Doorbell Interrupt" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DMA2_DONE ,Stautus DMA Engine" "no,yes"
|
|
bitfld.long 0x00 11. " DMA1_DONE ,Stautus DMA Engine" "no,yes"
|
|
bitfld.long 0x00 10. " DMA0_DONE ,Stautus DMA Engine" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SP_FINT ,Slow Port Interrupt" "no,yes"
|
|
bitfld.long 0x00 8. " PMU_INT ,PMU Interrupt" "no,yes"
|
|
bitfld.long 0x00 7. " TIMER3_UFLW ,Timer Underflow Interrupt" "no,yes"
|
|
bitfld.long 0x00 6. " TIMER2_UFLW ,Timer Underflow Interrupt" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIMER1_UFLW ,Timer Underflow Interrupt" "no,yes"
|
|
bitfld.long 0x00 4. " TIMER0_UFLW ,Timer Underflow Interrupt" "no,yes"
|
|
bitfld.long 0x00 3. " GPIO_INT ,GPIO Unit Interrupt Request" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " UART_INT ,UART Interrupt Request" "no,yes"
|
|
bitfld.long 0x00 1. " ERROR_SUM ,Error Status Register Interrupt" "no,yes"
|
|
bitfld.long 0x00 0. " SOFTINT ,Software Interrupt" "no,yes"
|
|
group asd:0xd600000c++0x0b
|
|
line.long 0x00 "FIQ_ENABLE,FIQ Enable"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x08 26. "THD64_95_B ,Interrupt Enable" "dis,ena"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x08 24. " THD0_31_B ,Interrupt Enable" "dis,ena"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x08 18. " THD64_95_A ,Interrupt Enable" "dis,ena"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x08 16. " THD0_31_A ,Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x08 15. " PCI_INT ,PCI Interrupt A & B" "dis,ena"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x08 14. " ME_ATTN ,Microengine Attention" "dis,ena"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x08 13. " PCI_DOORBELL ,PCI Doorbell Interrupt" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x00 12. 0x08 12. " DMA2_DONE ,Stautus DMA Engine" "dis,ena"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x08 11. " DMA1_DONE ,Stautus DMA Engine" "dis,ena"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x08 10. " DMA0_DONE ,Stautus DMA Engine" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x08 9. " SP_FINT ,Slow Port Interrupt" "dis,ena"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x08 8. " PMU_INT ,PMU Interrupt" "dis,ena"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x08 7. " TIMER3_UFLW ,Timer Underflow Interrupt" "dis,ena"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x08 6. " TIMER2_UFLW ,Timer Underflow Interrupt" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x08 5. " TIMER1_UFLW ,Timer Underflow Interrupt" "dis,ena"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x08 4. " TIMER0_UFLW ,Timer Underflow Interrupt" "dis,ena"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x08 3. " GPIO_INT ,GPIO Unit Interrupt Request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x08 2. " UART_INT ,UART Interrupt Request" "dis,ena"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x08 1. " ERROR_SUM ,Error Status Register Interrupt" "dis,ena"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x08 0. " SOFTINT ,Software Interrupt" "dis,ena"
|
|
group asd:0xd6000010++0x03
|
|
line.long 0x00 "IRQ_ENABLE,IRQ Enable"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x08 26. "THD64_95_B ,Interrupt Enable" "dis,ena"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x08 24. " THD0_31_B ,Interrupt Enable" "dis,ena"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x08 18. " THD64_95_A ,Interrupt Enable" "dis,ena"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x08 16. " THD0_31_A ,Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x08 15. " PCI_INT ,PCI Interrupt A & B" "dis,ena"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x08 14. " ME_ATTN ,Microengine Attention" "dis,ena"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x08 13. " PCI_DOORBELL ,PCI Doorbell Interrupt" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x00 12. 0x08 12. " DMA2_DONE ,Stautus DMA Engine" "dis,ena"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x08 11. " DMA1_DONE ,Stautus DMA Engine" "dis,ena"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x08 10. " DMA0_DONE ,Stautus DMA Engine" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x08 9. " SP_FINT ,Slow Port Interrupt" "dis,ena"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x08 8. " PMU_INT ,PMU Interrupt" "dis,ena"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x08 7. " TIMER3_UFLW ,Timer Underflow Interrupt" "dis,ena"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x08 6. " TIMER2_UFLW ,Timer Underflow Interrupt" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x08 5. " TIMER1_UFLW ,Timer Underflow Interrupt" "dis,ena"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x08 4. " TIMER0_UFLW ,Timer Underflow Interrupt" "dis,ena"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x08 3. " GPIO_INT ,GPIO Unit Interrupt Request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x08 2. " UART_INT ,UART Interrupt Request" "dis,ena"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x08 1. " ERROR_SUM ,Error Status Register Interrupt" "dis,ena"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x08 0. " SOFTINT ,Software Interrupt" "dis,ena"
|
|
group asd:0xd600001c++0x03
|
|
line.long 0x00 "RAW_ERR_STATUS,Raw Error Interrupt Status"
|
|
bitfld.long 0x00 26. "SP_INT ,Slow Port Interrupt" "no,yes"
|
|
bitfld.long 0x00 25. " PCI_ERR ,PCI Error Indicator" "no,yes"
|
|
bitfld.long 0x00 24. " MEDIA_ERR ,Media Error Indicator" "no,yes"
|
|
bitfld.long 0x00 17. " SRAM1_ERR ,SRAM Parity Error Channel 1" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SRAM0_ERR ,SRAM Parity Error Channel 0" "no,yes"
|
|
bitfld.long 0x00 1. " DRAM1_ECC_MAL ,Uncorrectable ECC Error Channel 0" "no,yes"
|
|
bitfld.long 0x00 0. " DRAM0_ECC_MIN ,Correctable ECC Error Channel 0" "no,yes"
|
|
group asd:0xd6000020++0x03
|
|
line.long 0x00 "FIQ_ERR_STATUS,FIQ Error Interrupt Status"
|
|
bitfld.long 0x00 26. "SP_INT ,Slow Port Interrupt" "no,yes"
|
|
bitfld.long 0x00 25. " PCI_ERR ,PCI Error Indicator" "no,yes"
|
|
bitfld.long 0x00 24. " MEDIA_ERR ,Media Error Indicator" "no,yes"
|
|
bitfld.long 0x00 17. " SRAM1_ERR ,SRAM Parity Error Channel 1" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SRAM0_ERR ,SRAM Parity Error Channel 0" "no,yes"
|
|
bitfld.long 0x00 1. " DRAM1_ECC_MAL ,Uncorrectable ECC Error Channel 0" "no,yes"
|
|
bitfld.long 0x00 0. " DRAM0_ECC_MIN ,Correctable ECC Error Channel 0" "no,yes"
|
|
group asd:0xd6000024++0x03
|
|
line.long 0x00 "IRQ_ERR_STATUS,IRQ Error Interrupt Status"
|
|
bitfld.long 0x00 26. "SP_INT ,Slow Port Interrupt" "no,yes"
|
|
bitfld.long 0x00 25. " PCI_ERR ,PCI Error Indicator" "no,yes"
|
|
bitfld.long 0x00 24. " MEDIA_ERR ,Media Error Indicator" "no,yes"
|
|
bitfld.long 0x00 17. " SRAM1_ERR ,SRAM Parity Error Channel 1" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SRAM0_ERR ,SRAM Parity Error Channel 0" "no,yes"
|
|
bitfld.long 0x00 1. " DRAM1_ECC_MAL ,Uncorrectable ECC Error Channel 0" "no,yes"
|
|
bitfld.long 0x00 0. " DRAM0_ECC_MIN ,Correctable ECC Error Channel 0" "no,yes"
|
|
group asd:0xd6000028++0x03
|
|
line.long 0x00 "FIQ_ERR_ENABLE,FIQ Error Enable"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x08 26. "SP_INT ,Slow Port Interrupt" "dis,ena"
|
|
setclrfld.long 0x00 25. 0x00 25. 0x08 25. " PCI_ERR ,PCI Error Indicator" "dis,ena"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x08 24. " MEDIA_ERR ,Media Error Indicator" "dis,ena"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x08 17. " SRAM1_ERR ,SRAM Parity Error Channel 1" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x08 16. " SRAM0_ERR ,SRAM Parity Error Channel 0" "dis,ena"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x08 1. " DRAM1_ECC_MAL ,Uncorrectable ECC Error Channel 0" "dis,ena"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x08 0. " DRAM0_ECC_MIN ,Correctable ECC Error Channel 0" "dis,ena"
|
|
group asd:0xd600002c++0x03
|
|
line.long 0x00 "IRQ_ERR_ENABLE,IRQ Error Enable"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x08 26. "SP_INT ,Slow Port Interrupt" "dis,ena"
|
|
setclrfld.long 0x00 25. 0x00 25. 0x08 25. " PCI_ERR ,PCI Error Indicator" "dis,ena"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x08 24. " MEDIA_ERR ,Media Error Indicator" "dis,ena"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x08 17. " SRAM1_ERR ,SRAM Parity Error Channel 1" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x08 16. " SRAM0_ERR ,SRAM Parity Error Channel 0" "dis,ena"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x08 1. " DRAM1_ECC_MAL ,Uncorrectable ECC Error Channel 0" "dis,ena"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x08 0. " DRAM0_ECC_MIN ,Correctable ECC Error Channel 0" "dis,ena"
|
|
group asd:0xd6000038++0x03
|
|
line.long 0x00 "RAW_ATTN_STATUS,Raw Attention Status"
|
|
bitfld.long 0x00 11. "ME_1_3 ,Microengine attention request" "no,yes"
|
|
bitfld.long 0x00 10. " ME_1_2 ,Microengine attention request" "no,yes"
|
|
bitfld.long 0x00 9. " ME_1_1 ,Microengine attention request" "no,yes"
|
|
bitfld.long 0x00 8. " ME_1_0 ,Microengine attention request" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ME_0_3 ,Microengine attention request" "no,yes"
|
|
bitfld.long 0x00 2. " ME_0_2 ,Microengine attention request" "no,yes"
|
|
bitfld.long 0x00 1. " ME_0_1 ,Microengine attention request" "no,yes"
|
|
bitfld.long 0x00 0. " ME_0_0 ,Microengine attention request" "no,yes"
|
|
group asd:0xd600003c++0x03
|
|
line.long 0x00 "FIQ_ATTN_STATUS,FIQ Attention Status"
|
|
bitfld.long 0x00 11. "ME_1_3 ,Microengine attention request" "no,yes"
|
|
bitfld.long 0x00 10. " ME_1_2 ,Microengine attention request" "no,yes"
|
|
bitfld.long 0x00 9. " ME_1_1 ,Microengine attention request" "no,yes"
|
|
bitfld.long 0x00 8. " ME_1_0 ,Microengine attention request" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ME_0_3 ,Microengine attention request" "no,yes"
|
|
bitfld.long 0x00 2. " ME_0_2 ,Microengine attention request" "no,yes"
|
|
bitfld.long 0x00 1. " ME_0_1 ,Microengine attention request" "no,yes"
|
|
bitfld.long 0x00 0. " ME_0_0 ,Microengine attention request" "no,yes"
|
|
group asd:0xd6000040++0x03
|
|
line.long 0x00 "IRQ_ATTN_STATUS,IRQ Attention Status"
|
|
bitfld.long 0x00 11. "ME_1_3 ,Microengine attention request" "no,yes"
|
|
bitfld.long 0x00 10. " ME_1_2 ,Microengine attention request" "no,yes"
|
|
bitfld.long 0x00 9. " ME_1_1 ,Microengine attention request" "no,yes"
|
|
bitfld.long 0x00 8. " ME_1_0 ,Microengine attention request" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ME_0_3 ,Microengine attention request" "no,yes"
|
|
bitfld.long 0x00 2. " ME_0_2 ,Microengine attention request" "no,yes"
|
|
bitfld.long 0x00 1. " ME_0_1 ,Microengine attention request" "no,yes"
|
|
bitfld.long 0x00 0. " ME_0_0 ,Microengine attention request" "no,yes"
|
|
group asd:0xd6000044++0x03
|
|
line.long 0x00 "FIQ_ATTN_ENABLE,FIQ Attention Enable"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x08 11. "ME_1_3 ,Microengine attention request" "dis,ena"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x08 10. " ME_1_2 ,Microengine attention request" "dis,ena"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x08 9. " ME_1_1 ,Microengine attention request" "dis,ena"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x08 8. " ME_1_0 ,Microengine attention request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x08 3. " ME_0_3 ,Microengine attention request" "dis,ena"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x08 2. " ME_0_2 ,Microengine attention request" "dis,ena"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x08 1. " ME_0_1 ,Microengine attention request" "dis,ena"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x08 0. " ME_0_0 ,Microengine attention request" "dis,ena"
|
|
group asd:0xd6000048++0x03
|
|
line.long 0x00 "IRQ_ATTN_ENABLE,IRQ Attention Enable"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x08 11. "ME_1_3 ,Microengine attention request" "dis,ena"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x08 10. " ME_1_2 ,Microengine attention request" "dis,ena"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x08 9. " ME_1_1 ,Microengine attention request" "dis,ena"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x08 8. " ME_1_0 ,Microengine attention request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x08 3. " ME_0_3 ,Microengine attention request" "dis,ena"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x08 2. " ME_0_2 ,Microengine attention request" "dis,ena"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x08 1. " ME_0_1 ,Microengine attention request" "dis,ena"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x08 0. " ME_0_0 ,Microengine attention request" "dis,ena"
|
|
group asd:0xd6000054++0x03
|
|
line.long 0x00 "SOFT_INT,FIQ Soft Interrupt"
|
|
bitfld.long 0x00 0. "SFT_INT ,Generate Soft Interruppt" "no,yes"
|
|
group asd:(0xd6000058)++0x03
|
|
line.long 0x00 "SCRATCH_RING_STATUS,Scratch ring full status"
|
|
bitfld.long 0x00 15.--15. "Ring15 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 14.--14. " Ring14 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 13.--13. " Ring13 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 12.--12. " Ring12 ,Scratch ring full indicator" "free,full"
|
|
textline " "
|
|
bitfld.long 0x00 11.--11. " Ring11 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 10.--10. " Ring10 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 9.--9. " Ring9 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 8.--8. " Ring8 ,Scratch ring full indicator" "free,full"
|
|
textline " "
|
|
bitfld.long 0x00 7.--7. " Ring7 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 6.--6. " Ring6 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 5.--5. " Ring5 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 4.--4. " Ring4 ,Scratch ring full indicator" "free,full"
|
|
textline " "
|
|
bitfld.long 0x00 3.--3. " Ring3 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 2.--2. " Ring2 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 1.--1. " Ring1 ,Scratch ring full indicator" "free,full"
|
|
bitfld.long 0x00 0.--0. " Ring0 ,Scratch ring full indicator" "free,full"
|
|
group asd:0xd6000060++0x03
|
|
line.long 0x00 "THD_RAW_STATUS_A_0,un-mask thread A interrupt status"
|
|
bitfld.long 0x00 31. "T31 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 30. " T30 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 29. " T29 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 28. " T28 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 27. " T27 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 26. " T26 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 25. " T25 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 24. " T24 ,indicates thread interrupt source is active" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 23. " T23 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 22. " T22 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 21. " T21 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 20. " T20 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 19. " T19 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 18. " T18 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 17. " T17 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 16. " T16 ,indicates thread interrupt source is active" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " T15 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 14. " T14 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 13. " T13 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 12. " T12 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 11. " T11 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 10. " T10 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 9. " T9 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 8. " T8 ,indicates thread interrupt source is active" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " T7 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 6. " T6 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 5. " T5 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 4. " T4 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 3. " T3 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 2. " T2 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 1. " T1 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 0. " T0 ,indicates thread interrupt source is active" "no,yes"
|
|
group asd:0xd6000068++0x03
|
|
line.long 0x00 "THD_RAW_STATUS_A_2,un-mask thread A interrupt status"
|
|
bitfld.long 0x00 31. "T95 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 30. " T94 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 29. " T93 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 28. " T92 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 27. " T91 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 26. " T90 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 25. " T89 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 24. " T88 ,indicates thread interrupt source is active" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 23. " T87 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 22. " T86 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 21. " T85 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 20. " T84 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 19. " T83 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 18. " T82 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 17. " T81 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 16. " T80 ,indicates thread interrupt source is active" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " T79 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 14. " T78 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 13. " T77 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 12. " T76 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 11. " T75 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 10. " T74 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 9. " T73 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 8. " T72 ,indicates thread interrupt source is active" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " T71 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 6. " T70 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 5. " T69 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 4. " T68 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 3. " T67 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 2. " T66 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 1. " T65 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 0. " T64 ,indicates thread interrupt source is active" "no,yes"
|
|
group asd:0xd6000080++0x03
|
|
line.long 0x00 "THD_RAW_STATUS_B_0,un-mask thread B interrupt status"
|
|
bitfld.long 0x00 31. "T31 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 30. " T30 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 29. " T29 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 28. " T28 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 27. " T27 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 26. " T26 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 25. " T25 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 24. " T24 ,indicates thread interrupt source is active" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 23. " T23 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 22. " T22 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 21. " T21 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 20. " T20 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 19. " T19 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 18. " T18 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 17. " T17 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 16. " T16 ,indicates thread interrupt source is active" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " T15 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 14. " T14 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 13. " T13 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 12. " T12 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 11. " T11 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 10. " T10 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 9. " T9 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 8. " T8 ,indicates thread interrupt source is active" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " T7 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 6. " T6 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 5. " T5 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 4. " T4 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 3. " T3 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 2. " T2 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 1. " T1 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 0. " T0 ,indicates thread interrupt source is active" "no,yes"
|
|
group asd:0xd6000088++0x03
|
|
line.long 0x00 "THD_RAW_STATUS_B_2,un-mask thread B interrupt status"
|
|
bitfld.long 0x00 31. "T95 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 30. " T94 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 29. " T93 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 28. " T92 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 27. " T91 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 26. " T90 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 25. " T89 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 24. " T88 ,indicates thread interrupt source is active" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 23. " T87 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 22. " T86 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 21. " T85 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 20. " T84 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 19. " T83 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 18. " T82 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 17. " T81 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 16. " T80 ,indicates thread interrupt source is active" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " T79 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 14. " T78 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 13. " T77 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 12. " T76 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 11. " T75 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 10. " T74 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 9. " T73 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 8. " T72 ,indicates thread interrupt source is active" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " T71 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 6. " T70 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 5. " T69 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 4. " T68 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 3. " T67 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 2. " T66 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 1. " T65 ,indicates thread interrupt source is active" "no,yes"
|
|
bitfld.long 0x00 0. " T64 ,indicates thread interrupt source is active" "no,yes"
|
|
group asd:0xd60000A0++0x03
|
|
line.long 0x00 "FIQ_THD_STATUS_A_0,FIQ mask thread A interrupt status"
|
|
bitfld.long 0x00 31. "T31 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 30. " T30 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 29. " T29 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 28. " T28 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 27. " T27 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 26. " T26 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 25. " T25 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 24. " T24 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 23. " T23 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 22. " T22 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 21. " T21 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 20. " T20 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 19. " T19 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 18. " T18 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 17. " T17 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 16. " T16 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " T15 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 14. " T14 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 13. " T13 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 12. " T12 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 11. " T11 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 10. " T10 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 9. " T9 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 8. " T8 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " T7 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 6. " T6 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 5. " T5 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 4. " T4 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 3. " T3 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 2. " T2 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 1. " T1 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 0. " T0 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
group asd:0xd60000A8++0x03
|
|
line.long 0x00 "FIQ_THD_STATUS_A_2,FIQ mask thread A interrupt status"
|
|
bitfld.long 0x00 31. "T95 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 30. " T94 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 29. " T93 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 28. " T92 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 27. " T91 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 26. " T90 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 25. " T89 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 24. " T88 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 23. " T87 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 22. " T86 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 21. " T85 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 20. " T84 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 19. " T83 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 18. " T82 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 17. " T81 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 16. " T80 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " T79 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 14. " T78 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 13. " T77 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 12. " T76 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 11. " T75 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 10. " T74 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 9. " T73 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 8. " T72 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " T71 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 6. " T70 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 5. " T69 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 4. " T68 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 3. " T67 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 2. " T66 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 1. " T65 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 0. " T64 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
group asd:0xd60000C0++0x03
|
|
line.long 0x00 "FIQ_THD_STATUS_B_0,FIQ mask thread B interrupt status"
|
|
bitfld.long 0x00 31. "T31 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 30. " T30 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 29. " T29 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 28. " T28 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 27. " T27 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 26. " T26 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 25. " T25 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 24. " T24 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 23. " T23 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 22. " T22 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 21. " T21 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 20. " T20 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 19. " T19 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 18. " T18 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 17. " T17 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 16. " T16 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " T15 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 14. " T14 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 13. " T13 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 12. " T12 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 11. " T11 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 10. " T10 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 9. " T9 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 8. " T8 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " T7 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 6. " T6 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 5. " T5 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 4. " T4 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 3. " T3 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 2. " T2 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 1. " T1 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 0. " T0 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
group asd:0xd60000C8++0x03
|
|
line.long 0x00 "FIQ_THD_STATUS_B_2,FIQ mask thread B interrupt status"
|
|
bitfld.long 0x00 31. "T95 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 30. " T94 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 29. " T93 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 28. " T92 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 27. " T91 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 26. " T90 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 25. " T89 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 24. " T88 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 23. " T87 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 22. " T86 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 21. " T85 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 20. " T84 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 19. " T83 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 18. " T82 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 17. " T81 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 16. " T80 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " T79 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 14. " T78 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 13. " T77 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 12. " T76 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 11. " T75 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 10. " T74 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 9. " T73 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 8. " T72 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " T71 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 6. " T70 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 5. " T69 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 4. " T68 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 3. " T67 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 2. " T66 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 1. " T65 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 0. " T64 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
group asd:0xd60000E0++0x03
|
|
line.long 0x00 "IRQ_THD_STATUS_A_0,IRQ mask thread A interrupt status"
|
|
bitfld.long 0x00 31. "T31 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 30. " T30 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 29. " T29 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 28. " T28 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 27. " T27 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 26. " T26 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 25. " T25 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 24. " T24 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 23. " T23 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 22. " T22 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 21. " T21 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 20. " T20 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 19. " T19 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 18. " T18 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 17. " T17 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 16. " T16 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " T15 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 14. " T14 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 13. " T13 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 12. " T12 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 11. " T11 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 10. " T10 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 9. " T9 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 8. " T8 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " T7 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 6. " T6 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 5. " T5 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 4. " T4 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 3. " T3 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 2. " T2 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 1. " T1 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 0. " T0 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
group asd:0xd60000E8++0x03
|
|
line.long 0x00 "IRQ_THD_STATUS_A_2,IRQ mask thread A interrupt status"
|
|
bitfld.long 0x00 31. "T95 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 30. " T94 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 29. " T93 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 28. " T92 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 27. " T91 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 26. " T90 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 25. " T89 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 24. " T88 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 23. " T87 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 22. " T86 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 21. " T85 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 20. " T84 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 19. " T83 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 18. " T82 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 17. " T81 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 16. " T80 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " T79 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 14. " T78 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 13. " T77 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 12. " T76 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 11. " T75 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 10. " T74 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 9. " T73 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 8. " T72 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " T71 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 6. " T70 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 5. " T69 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 4. " T68 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 3. " T67 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 2. " T66 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 1. " T65 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 0. " T64 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
group asd:0xd6000100++0x03
|
|
line.long 0x00 "IRQ_THD_STATUS_B_0,IRQ mask thread B interrupt status"
|
|
bitfld.long 0x00 31. "T31 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 30. " T30 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 29. " T29 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 28. " T28 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 27. " T27 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 26. " T26 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 25. " T25 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 24. " T24 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 23. " T23 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 22. " T22 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 21. " T21 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 20. " T20 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 19. " T19 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 18. " T18 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 17. " T17 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 16. " T16 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " T15 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 14. " T14 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 13. " T13 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 12. " T12 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 11. " T11 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 10. " T10 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 9. " T9 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 8. " T8 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " T7 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 6. " T6 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 5. " T5 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 4. " T4 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 3. " T3 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 2. " T2 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 1. " T1 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 0. " T0 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
group asd:0xd6000108++0x03
|
|
line.long 0x00 "IRQ_THD_STATUS_B_2,IRQ mask thread B interrupt status"
|
|
bitfld.long 0x00 31. "T95 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 30. " T94 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 29. " T93 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 28. " T92 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 27. " T91 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 26. " T90 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 25. " T89 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 24. " T88 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 23. " T87 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 22. " T86 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 21. " T85 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 20. " T84 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 19. " T83 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 18. " T82 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 17. " T81 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 16. " T80 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " T79 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 14. " T78 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 13. " T77 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 12. " T76 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 11. " T75 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 10. " T74 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 9. " T73 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 8. " T72 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " T71 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 6. " T70 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 5. " T69 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 4. " T68 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 3. " T67 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 2. " T66 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 1. " T65 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
bitfld.long 0x00 0. " T64 ,indicates thread interrupt source is active and enable" "no,yes"
|
|
group asd:0xd6000120++0x03
|
|
line.long 0x00 "FIQ_THD_ENABLE_A_0 ,FIQ thread A interrupt enable"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "T31 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " T30 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " T29 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " T28 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " T27 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " T26 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " T25 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " T24 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " T23 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " T22 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " T21 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " T20 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " T19 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " T18 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " T17 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " T16 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " T15 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " T14 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " T13 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " T12 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " T11 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " T10 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " T9 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " T8 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " T7 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " T6 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " T5 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " T4 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " T3 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " T2 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " T1 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " T0 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
group asd:0xd6000128++0x03
|
|
line.long 0x00 "FIQ_THD_ENABLE_A_2 ,FIQ thread A interrupt enable"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "T95 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " T94 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " T93 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " T92 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " T91 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " T90 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " T89 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " T88 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " T87 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " T86 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " T85 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " T84 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " T83 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " T82 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " T81 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " T80 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " T79 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " T78 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " T77 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " T76 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " T75 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " T74 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " T73 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " T72 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " T71 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " T70 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " T69 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " T68 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " T67 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " T66 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " T65 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " T64 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
group asd:0xd6000140++0x03
|
|
line.long 0x00 "FIQ_THD_ENABLE_B_0,FIQ thread B interrupt enable"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "T31 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " T30 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " T29 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " T28 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " T27 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " T26 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " T25 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " T24 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " T23 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " T22 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " T21 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " T20 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " T19 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " T18 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " T17 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " T16 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " T15 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " T14 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " T13 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " T12 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " T11 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " T10 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " T9 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " T8 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " T7 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " T6 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " T5 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " T4 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " T3 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " T2 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " T1 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " T0 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
group asd:0xd6000148++0x03
|
|
line.long 0x00 "FIQ_THD_ENABLE_B_2 ,FIQ thread B interrupt enable"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "T95 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " T94 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " T93 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " T92 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " T91 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " T90 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " T89 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " T88 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " T87 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " T86 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " T85 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " T84 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " T83 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " T82 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " T81 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " T80 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " T79 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " T78 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " T77 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " T76 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " T75 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " T74 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " T73 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " T72 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " T71 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " T70 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " T69 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " T68 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " T67 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " T66 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " T65 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " T64 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
group asd:0xd6000160++0x03
|
|
line.long 0x00 "IRQ_THD_ENABLE_A_0 ,IRQ thread A interrupt enable"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "T31 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " T30 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " T29 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " T28 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " T27 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " T26 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " T25 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " T24 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " T23 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " T22 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " T21 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " T20 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " T19 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " T18 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " T17 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " T16 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " T15 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " T14 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " T13 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " T12 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " T11 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " T10 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " T9 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " T8 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " T7 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " T6 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " T5 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " T4 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " T3 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " T2 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " T1 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " T0 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
group asd:0xd6000168++0x03
|
|
line.long 0x00 "IRQ_THD_ENABLE_A_2 ,IRQ thread A interrupt enable"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "T95 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " T94 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " T93 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " T92 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " T91 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " T90 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " T89 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " T88 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " T87 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " T86 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " T85 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " T84 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " T83 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " T82 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " T81 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " T80 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " T79 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " T78 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " T77 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " T76 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " T75 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " T74 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " T73 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " T72 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " T71 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " T70 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " T69 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " T68 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " T67 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " T66 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " T65 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " T64 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
group asd:0xd6000180++0x03
|
|
line.long 0x00 "IRQ_THD_ENABLE_B_0 ,IRQ thread B interrupt enable"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "T31 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " T30 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " T29 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " T28 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " T27 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " T26 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " T25 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " T24 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " T23 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " T22 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " T21 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " T20 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " T19 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " T18 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " T17 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " T16 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " T15 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " T14 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " T13 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " T12 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " T11 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " T10 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " T9 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " T8 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " T7 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " T6 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " T5 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " T4 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " T3 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " T2 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " T1 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " T0 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
group asd:0xd6000188++0x03
|
|
line.long 0x00 "IRQ_THD_ENABLE_B_2 ,IRQ thread B interrupt enable"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "T95 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " T94 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " T93 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " T92 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " T91 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " T90 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " T89 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " T88 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " T87 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " T86 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " T85 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " T84 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " T83 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " T82 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " T81 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " T80 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " T79 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " T78 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " T77 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " T76 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " T75 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " T74 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " T73 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " T72 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " T71 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " T70 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " T69 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " T68 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " T67 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " T66 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " T65 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " T64 ,indicates thread interrupt source is enable and interrupt request" "dis,ena"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2800-int.ph
|
|
;begin include file xscale/ixp2400-breakpoint.ph
|
|
;parameters:
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400, IXP2800
|
|
; State: ok
|
|
;
|
|
; --------------------------------------------------------------------------------
|
|
tree "Breakpoint CSR"
|
|
; --------------------------------------------------------------------------------
|
|
width 16.
|
|
group asd:0xd7000220++0x03
|
|
line.long 0x00 "BRK_RAW_STATUS,Breakpoint Raw Status, Un-masked breakpoint status"
|
|
bitfld.long 0x00 15. "PCI_INT ,The OR of external PCI interrupt A and B" "no,yes"
|
|
bitfld.long 0x00 14. " ME_ATTN ,OR of all the bits in the ME attention register" "no,yes"
|
|
bitfld.long 0x00 13. " PCI_DOORBELL ,A PCI device has set a doorbell interrupt" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DMA2_DONE ,Completion status from the DMA engine" "no,yes"
|
|
bitfld.long 0x00 11. " DMA1_DONE ,Completion status from the DMA engine" "no,yes"
|
|
bitfld.long 0x00 10. " DMA0_DONE ,Completion status from the DMA engine" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SP_FINT ,Slow Port Framer interrupt" "no,yes"
|
|
bitfld.long 0x00 8. " PMU_INT ,PMU interrupt" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TIMER3_UFLOW ,Timer underflow indicator" "no,yes"
|
|
bitfld.long 0x00 6. " TIMER2_UFLOW ,Timer underflow indicator" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIMER1_UFLOW ,Timer underflow indicator" "no,yes"
|
|
bitfld.long 0x00 4. " TIMER0_UFLOW ,Timer underflow indicator" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GPIO_INT ,Indicates a interrupt request from the GPIO unit" "no,yes"
|
|
bitfld.long 0x00 2. " UART_INT ,Indicates an UART interrupt request" "no,yes"
|
|
bitfld.long 0x00 1. " ERROR_SUM ,OIr of all interrupt bits in the ErrorStatus register" "no,yes"
|
|
bitfld.long 0x00 0. " SOFTINT ,Software is able to generate a break through this bit" "no,yes"
|
|
group asd:0xd7000224++0x03
|
|
line.long 0x00 "BRK_STATUS,Breakpoint Status, Masked breakpoint status"
|
|
bitfld.long 0x00 15. "PCI_INT ,The OR of external PCI interrupt A and B" "no,yes"
|
|
bitfld.long 0x00 14. " ME_ATTN ,OR of all the bits in the ME attention register" "no,yes"
|
|
bitfld.long 0x00 13. " PCI_DOORBELL ,A PCI device has set a doorbell interrupt" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DMA2_DONE ,Completion status from the DMA engine" "no,yes"
|
|
bitfld.long 0x00 11. " DMA1_DONE ,Completion status from the DMA engine" "no,yes"
|
|
bitfld.long 0x00 10. " DMA0_DONE ,Completion status from the DMA engine" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SP_FINT ,Slow Port Framer interrupt" "no,yes"
|
|
bitfld.long 0x00 8. " PMU_INT ,PMU interrupt" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TIMER3_UFLOW ,Timer underflow indicator" "no,yes"
|
|
bitfld.long 0x00 6. " TIMER2_UFLOW ,Timer underflow indicator" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TIMER1_UFLOW ,Timer underflow indicator" "no,yes"
|
|
bitfld.long 0x00 4. " TIMER0_UFLOW ,Timer underflow indicator" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GPIO_INT ,Indicates a interrupt request from the GPIO unit" "no,yes"
|
|
bitfld.long 0x00 2. " UART_INT ,Indicates an UART interrupt request" "no,yes"
|
|
bitfld.long 0x00 1. " ERROR_SUM ,OIr of all interrupt bits in the ErrorStatus register" "no,yes"
|
|
bitfld.long 0x00 0. " SOFTINT ,Software is able to generate a break through this bit" "no,yes"
|
|
group asd:0xd7000228++0x03
|
|
line.long 0x00 "BRK_ENABLE,Breakpoint Enable"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x04 15. "PCI_INT ,The OR of external PCI interrupt A and B" "dis,ena"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x04 14. " ME_ATTN ,OR of all the bits in the ME attention register" "dis,ena"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " PCI_DOORBELL ,A PCI device has set a doorbell interrupt" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x00 12. 0x04 12. " DMA2_DONE ,Completion status from the DMA engine" "dis,ena"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " DMA1_DONE ,Completion status from the DMA engine" "dis,ena"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " DMA0_DONE ,Completion status from the DMA engine" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " SP_FINT ,Slow Port Framer interrupt" "dis,ena"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " PMU_INT ,PMU interrupt" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " TIMER3_UFLOW ,Timer underflow indicator" "dis,ena"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " TIMER2_UFLOW ,Timer underflow indicator" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " TIMER1_UFLOW ,Timer underflow indicator" "dis,ena"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " TIMER0_UFLOW ,Timer underflow indicator" "dis,ena"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " GPIO_INT ,Indicates a interrupt request from the GPIO unit" "dis,ena"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " UART_INT ,Indicates an UART interrupt request" "dis,ena"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " ERROR_SUM ,OIr of all interrupt bits in the ErrorStatus register" "dis,ena"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " SOFTINT ,Software is able to generate a break through this bit" "dis,ena"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-breakpoint.ph
|
|
;begin include file xscale/ixp2400-pmu.ph
|
|
;parameters:
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400, IXP2800
|
|
; State: ok
|
|
;
|
|
; --------------------------------------------------------------------------------
|
|
tree "PMU"
|
|
; --------------------------------------------------------------------------------
|
|
width 12.
|
|
group asd:0xc0050f00++0x03
|
|
line.long 0x000 "PMUCONTCFG,PMU Control Bus Configuration Register"
|
|
bitfld.long 0x00 18. "AUTOCFG ,AUTOCFG Command" "no,yes"
|
|
bitfld.long 0x00 16.--17. " PMU_TAR_DESG_BL ,PMU Target Design Block Command" "res,reset,init,config"
|
|
hexmask.long 0x00 13.--15. 0x01 " SEL_EV_BUS ,Select Event Bus"
|
|
textline " "
|
|
hexmask.long 0x00 7.--12. 0x01 " SEL_DESG_BL ,Select Design Block"
|
|
hexmask.long 0x00 0.--6. 0x01 " SEL_DESG_EV ,Select design Event"
|
|
group asd:0xc0050E00++0x03
|
|
line.long 0x00 "PMUSTAT,PMU Counter Interrupt Status Register"
|
|
bitfld.long 0x00 31. "TCD ,PMU Target Design Configuration Command was executed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CHAP_CNTR_5_STATUS ,Threshold Compare was observed" "no,Threshold"
|
|
bitfld.long 0x00 21. " ,Command got Triggered" "no,Triggered"
|
|
bitfld.long 0x00 20. " ,Over Flow on Counter" "no,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CHAP_CNTR_4_STATUS ,Threshold Compare was observed" "no,Threshold"
|
|
bitfld.long 0x00 17. " ,Command got Triggered" "no,Triggered"
|
|
bitfld.long 0x00 16. " ,Over Flow on Counter" "no,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 14. " CHAP_CNTR_3_STATUS ,Threshold Compare was observed" "no,Threshold"
|
|
bitfld.long 0x00 13. " ,Command got Triggered" "no,Triggered"
|
|
bitfld.long 0x00 12. " ,Over Flow on Counter" "no,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CHAP_CNTR_2_STATUS ,Threshold Compare was observed" "no,Threshold"
|
|
bitfld.long 0x00 9. " ,Command got Triggered" "no,Triggered"
|
|
bitfld.long 0x00 8. " ,Over Flow on Counter" "no,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CHAP_CNTR_1_STATUS ,Threshold Compare was observed" "no,Threshold"
|
|
bitfld.long 0x00 5. " ,Command got Triggered" "no,Triggered"
|
|
bitfld.long 0x00 4. " ,Over Flow on Counter" "no,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CHAP_CNTR_0_STATUS ,Threshold Compare was observed" "no,Threshold"
|
|
bitfld.long 0x00 1. " ,Command got Triggered" "no,Triggered"
|
|
bitfld.long 0x00 0. " ,Over Flow on Counter" "no,Overflow"
|
|
group asd:0xc0050D00++0x03
|
|
line.long 0x00 "PMUMASK,PMU Counter Interrupt Mask Register"
|
|
bitfld.long 0x00 31. "TCM ,PMU Target Configuration MASK" "ena,dis"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CHAP_CNTR_5_MASK ,Threshold Compare Mask" "Threshold,dis"
|
|
bitfld.long 0x00 21. " ,Command got Triggered Mask" "Trigger,dis"
|
|
bitfld.long 0x00 20. " ,Over Flow on Counter Mask" "Overflow,dis"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CHAP_CNTR_4_MASK ,Threshold Compare Mask" "Threshold,dis"
|
|
bitfld.long 0x00 17. " ,Command got Triggered Mask" "Trigger,dis"
|
|
bitfld.long 0x00 16. " ,Over Flow on Counter Mask" "Overflow,dis"
|
|
textline " "
|
|
bitfld.long 0x00 14. " CHAP_CNTR_3_MASK ,Threshold Compare Mask" "Threshold,dis"
|
|
bitfld.long 0x00 13. " ,Command got Triggered Mask" "Trigger,dis"
|
|
bitfld.long 0x00 12. " ,Over Flow on Counter Mask" "Overflow,dis"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CHAP_CNTR_2_MASK ,Threshold Compare Mask" "Threshold,dis"
|
|
bitfld.long 0x00 9. " ,Command got Triggered Mask" "Trigger,dis"
|
|
bitfld.long 0x00 8. " ,Over Flow on Counter Mask" "Overflow,dis"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CHAP_CNTR_1_MASK ,Threshold Compare Mask" "Threshold,dis"
|
|
bitfld.long 0x00 5. " ,Command got Triggered Mask" "Trigger,dis"
|
|
bitfld.long 0x00 4. " ,Over Flow on Counter Mask" "Overflow,dis"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CHAP_CNTR_0_MASK ,Threshold Compare Mask" "Threshold,dis"
|
|
bitfld.long 0x00 1. " ,Command got Triggered Mask" "Trigger,dis"
|
|
bitfld.long 0x00 0. " ,Over Flow on Counter Mask" "Overflow,dis"
|
|
group asd:0xc0050C00++0x03
|
|
line.long 0x00 "PMUINTEN,PMU Counter Interrupt Enable Register"
|
|
bitfld.long 0x00 31. "TCE ,PMU Target design command Execute Interrupt Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CHAP_CNTR_5_INT_ENABLE ,Threshold Compare Interrupt Enable" "dis,Threshold"
|
|
bitfld.long 0x00 21. " ,Command got Triggered Interrupt Enable" "dis,Trigger"
|
|
bitfld.long 0x00 20. " ,Over Flow on Counter Interrupt Enable" "dis,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CHAP_CNTR_4_INT_ENABLE ,Threshold Compare Interrupt Enable" "dis,Threshold"
|
|
bitfld.long 0x00 17. " ,Command got Triggered Interrupt Enable" "dis,Trigger"
|
|
bitfld.long 0x00 16. " ,Over Flow on Counter Interrupt Enable" "dis,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 14. " CHAP_CNTR_3_INT_ENABLE ,Threshold Compare Interrupt Enable" "dis,Threshold"
|
|
bitfld.long 0x00 13. " ,Command got Triggered Interrupt Enable" "dis,Trigger"
|
|
bitfld.long 0x00 12. " ,Over Flow on Counter Interrupt Enable" "dis,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CHAP_CNTR_2_INT_ENABLE ,Threshold Compare Interrupt Enable" "dis,Threshold"
|
|
bitfld.long 0x00 9. " ,Command got Triggered Interrupt Enable" "dis,Trigger"
|
|
bitfld.long 0x00 8. " ,Over Flow on Counter Interrupt Enable" "dis,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CHAP_CNTR_1_INT_ENABLE ,Threshold Compare Interrupt Enable" "dis,Threshold"
|
|
bitfld.long 0x00 5. " ,Command got Triggered Interrupt Enable" "dis,Trigger"
|
|
bitfld.long 0x00 4. " ,Over Flow on Counter Interrupt Enable" "dis,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CHAP_CNTR_0_INT_ENABLE ,Threshold Compare Interrupt Enable" "dis,Threshold"
|
|
bitfld.long 0x00 1. " ,Command got Triggered Interrupt Enable" "dis,Trigger"
|
|
bitfld.long 0x00 0. " ,Over Flow on Counter Interrupt Enable" "dis,Overflow"
|
|
group asd:0xc0050000++0x0f "Counter 0"
|
|
line.long 0x00 "CHAPCMD,Chap Counter Command Register"
|
|
bitfld.long 0x00 31. "DBG ,PMU DEBUG Mode" "norm,debug"
|
|
bitfld.long 0x00 26. " OUIE ,Overflow/Underflow Indicator Enable" "no,yes"
|
|
bitfld.long 0x00 25. " CTIE ,Command Trigger Indicator Enable" "no,yes"
|
|
bitfld.long 0x00 24. " THIE ,Threshold Indicator Enable" "no,yes"
|
|
bitfld.long 0x00 21.--23. " CC ,Condition Code" "false,greater,equal,greater/equal,less not equal,less/equal,true,?..."
|
|
bitfld.long 0x00 20. " SAC ,Select ALL Counters" "only,all"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " OPCODE ,Opcode" "stop,start,sample,res,reset,restart,sample&restart,res,res,res,res,res,res,res,res,preload"
|
|
bitfld.long 0x00 12.--14. " CTEMS ,Command Trigger Event Mux Select" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. " CTDBS ,Command Trigger Design Block Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " ACT ,Always Command Trigger" "upon,by com trig"
|
|
line.long 0x04 "CHAPEVN,CHAP Counter Event Register"
|
|
bitfld.long 0x04 31. "DOCE ,Decrement Occurrence Count Enable" "duration,occurrence"
|
|
bitfld.long 0x04 28.--30. " DEC1_MUX_SEL ,Contain the Event Selection" "0,1,2,3,4,5,dis,dis"
|
|
bitfld.long 0x04 23.--25. " DEC0_MUX_SEL ,Contain the Event Selection" "0,1,2,3,4,5,dis,dis"
|
|
bitfld.long 0x04 16.--19. " DDBS ,Decrement Design Block Selection" "0,1,2,3,4,5,dis,dis,?..."
|
|
textline " "
|
|
bitfld.long 0x04 15. " IOCE ,Increment Occurrence Count Enable" "duration,occurrence"
|
|
bitfld.long 0x04 12.--14. " INC1_MUX_SEL ,Inc 1 Mux Select" "0,1,2,3,4,5,dis,dis"
|
|
bitfld.long 0x04 7.--9. " INC0_MUX_SEL ,Inc 0 Mux Select" "0,1,2,3,4,5,dis,dis"
|
|
bitfld.long 0x04 0.--3. " IDBS ,Increment Design Block Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "CHAPSTAT,CHAP Counter Status Register"
|
|
bitfld.long 0x08 31. "DEI ,Decrement Event Indicator" "no,yes"
|
|
bitfld.long 0x08 30. " IEI ,Increment Event Indicator" "no,yes"
|
|
bitfld.long 0x08 29. " CAI ,Counter Active Indicator" "no,yes"
|
|
bitfld.long 0x08 27. " UEI ,Unsupported Event Indicator" "no,yes"
|
|
bitfld.long 0x08 26. " OUI ,Overflow/Underflow Indicator " "no,yes"
|
|
bitfld.long 0x08 25. " CTI ,Command Trigger Indicator " "no,yes"
|
|
bitfld.long 0x08 24. " THI ,Threshold Indicator" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x08 20. " DME increment0 ,Debug Mode Event increment0" "no,yes"
|
|
bitfld.long 0x08 19. " DME increment1 ,Debug Mode Event increment1" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x08 18. " DME decrement0 ,Debug Mode Event decrement0" "no,yes"
|
|
bitfld.long 0x08 17. " DME decrement1 ,Debug Mode Event decrement1" "no,yes"
|
|
bitfld.long 0x08 16. " DME trigger ,Debug Mode Event trigger" "no,yes"
|
|
line.long 0xc "CHAPDATA,CHAP Counter data Register"
|
|
group asd:0xc0050010++0x0f "Counter 1"
|
|
copy
|
|
group asd:0xc0050020++0x0b "Counter 2"
|
|
line.long 0x00 "CHAPCMD,Chap Counter Command Register"
|
|
bitfld.long 0x00 31. "DBG ,PMU DEBUG Mode" "norm,debug"
|
|
bitfld.long 0x00 26. " OUIE ,Overflow/Underflow Indicator Enable" "no,yes"
|
|
bitfld.long 0x00 25. " CTIE ,Command Trigger Indicator Enable" "no,yes"
|
|
bitfld.long 0x00 24. " THIE ,Threshold Indicator Enable" "no,yes"
|
|
bitfld.long 0x00 21.--23. " CC ,Condition Code" "false,greater,equal,greater/equal,less not equal,less/equal,true,?..."
|
|
bitfld.long 0x00 20. " SAC ,Select ALL Counters" "only,all"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " OPCODE ,Opcode" "stop,start,sample,res,reset,restart,sample&restart,res,res,res,res,res,res,res,res,preload"
|
|
bitfld.long 0x00 12.--14. " CTEMS ,Command Trigger Event Mux Select" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. " CTDBS ,Command Trigger Design Block Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " ACT ,Always Command Trigger" "upon,by com trig"
|
|
line.long 0x04 "CHAPEVN,CHAP Counter Event Register"
|
|
bitfld.long 0x04 31. "DOCE ,Decrement Occurrence Count Enable" "duration,occurrence"
|
|
bitfld.long 0x04 28.--30. " DEC1_MUX_SEL ,Contain the Event Selection" "0,1,2,3,4,5,dis,dis"
|
|
bitfld.long 0x04 23.--25. " DEC0_MUX_SEL ,Contain the Event Selection" "0,1,2,3,4,5,dis,dis"
|
|
bitfld.long 0x04 16.--19. " DDBS ,Decrement Design Block Selection" "0,1,2,3,4,5,dis,dis,?..."
|
|
textline " "
|
|
bitfld.long 0x04 15. " IOCE ,Increment Occurrence Count Enable" "duration,occurrence"
|
|
bitfld.long 0x04 12.--14. " INC1_MUX_SEL ,Inc 1 Mux Select" "0,1,2,3,4,5,dis,dis"
|
|
bitfld.long 0x04 7.--9. " INC0_MUX_SEL ,Inc 0 Mux Select" "0,1,2,3,4,5,dis,dis"
|
|
bitfld.long 0x04 0.--3. " IDBS ,Increment Design Block Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "CHAPSTAT,CHAP Counter Status Register"
|
|
bitfld.long 0x08 31. "DEI ,Decrement Event Indicator" "no,yes"
|
|
bitfld.long 0x08 30. " IEI ,Increment Event Indicator" "no,yes"
|
|
bitfld.long 0x08 29. " CAI ,Counter Active Indicator" "no,yes"
|
|
bitfld.long 0x08 27. " UEI ,Unsupported Event Indicator" "no,yes"
|
|
bitfld.long 0x08 26. " OUI ,Overflow/Underflow Indicator " "no,yes"
|
|
bitfld.long 0x08 25. " CTI ,Command Trigger Indicator " "no,yes"
|
|
bitfld.long 0x08 24. " THI ,Threshold Indicator" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x08 20. " DME increment0 ,Debug Mode Event increment0" "no,yes"
|
|
bitfld.long 0x08 19. " DME increment1 ,Debug Mode Event increment1" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x08 18. " DME decrement0 ,Debug Mode Event decrement0" "no,yes"
|
|
bitfld.long 0x08 17. " DME decrement1 ,Debug Mode Event decrement1" "no,yes"
|
|
bitfld.long 0x08 16. " DME trigger ,Debug Mode Event trigger" "no,yes"
|
|
group asd:0xc0050030++0x0b "Counter 3 "
|
|
copy
|
|
group asd:0xc0050040++0x0b "Counter 4 "
|
|
copy
|
|
group asd:0xc0050050++0x0b "Counter 5 "
|
|
copy
|
|
tree.end
|
|
;end include file xscale/ixp2400-pmu.ph
|
|
;begin include file xscale/ixp2800-global.ph
|
|
;parameters:
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2x00 Master File for IXP2400, IXP2800
|
|
; State: OK
|
|
; see also: IXP2400, IXP2800
|
|
;
|
|
; IXP2400: s/;***IXP2400***//
|
|
; IXP2800: s///
|
|
;
|
|
; --------------------------------------------------------------------------------
|
|
tree "Global Control"
|
|
; --------------------------------------------------------------------------------
|
|
width 16.
|
|
group asd:0xc0004a00++0x03
|
|
line.long 0x00 "PRODUCT_ID,Product Identification"
|
|
; 16.--20. MAJ_PROD_TYPE
|
|
bitfld.long 0x00 16.--18. "MAJ_PROD_TYPE ,MAJ_PROD_TYPE" "IXP2000,res,res,res,res,res,res,res"
|
|
; 8.--15. MIN_PROD_TYPE
|
|
bitfld.long 0x00 8.--10. " MIN_PROD_TYPE ,MIN_PROD_TYPE" "IXP2800,IXP2800 Crypto,IXP2400,res,res,res,res,res"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MAJ_REV ,Current Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " MIN_REV ,Current Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:0xc0004a04++0x03
|
|
line.long 0x00 "MISC_CONTROL,MISC_CONTROL"
|
|
hexmask.long 0x00 21.--25. 0x01 "PCI_CMD_PRIO ,Priority for PCI"
|
|
hexmask.long 0x00 16.--20. 0x01 " XSCALE_CMD_PRIO ,Priority for Xscale"
|
|
textline " "
|
|
bitfld.long 0x00 9. " FLASH_WR_EN ,Write to flash address space" "dis,ena"
|
|
bitfld.long 0x00 8. " FLASH_ALIAS_DIS ,Memory at address 0" "ROM,DRAM"
|
|
bitfld.long 0x00 7. " TIMESTAMP_EN ,Timestamp Enable in the Microengines" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 6. " Clock DRAM Channel 2 ,Clock Disable for DRAM Channel 2" "ena,dis"
|
|
textline " "
|
|
bitfld.long 0x00 5. " Clock DRAM Channel 1 ,Clock Disable for DRAM Channel 1" "ena,dis"
|
|
bitfld.long 0x00 4. " Clock DRAM Channel 0 ,Clock Disable for DRAM Channel 0" "ena,dis"
|
|
textline " "
|
|
bitfld.long 0x00 3. " Clock SRAM Channel 3 ,Clock Disable for SRAM Channel 3" "ena,dis"
|
|
bitfld.long 0x00 2. " Clock SRAM Channel 2 ,Clock Disable for SRAM Channel 2" "ena,dis"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Clock SRAM Channel 1 ,Clock Disable for SRAM Channel 1" "ena,dis"
|
|
bitfld.long 0x00 0. " Clock SRAM Channel 0 ,Clock Disable for SRAM Channel 0" "ena,dis"
|
|
group asd:0xc0004a18++0x03
|
|
line.long 0x00 "STRAP_OPTIONS,STRAP_OPTIONS"
|
|
bitfld.long 0x00 14. "RESET_OUT_STRAP ,Determines when the external reset pin NRESET_OUT is deasserted" "PLL Lock,Ext. Reset"
|
|
hexmask.long 0x00 8.--13. 0x01 " CFG_PLL_MULT ,Selects PLL multiplier"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CFG_PCI_SWIN ,SRAM BAR Window Size" "32 MByte,64 MByte,128 MByte,256 MByte"
|
|
bitfld.long 0x00 4.--5. " CFG_PCI_DWIN ,DRAM BAR Window Size" "128 MByte,256 MByte,512 MByte,1024 MByte"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CFG_PCI_ARB ,PCI Arbiter Used" "external,internal"
|
|
bitfld.long 0x00 2. " CFG_PCI_BOOT_HOST ,Indicates who will configure PCI devices" "external,IXP2x00"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CFG_PROM_BOOT ,Boot ROM present" "no,yes"
|
|
bitfld.long 0x00 0. " CFG_RST_DIR ,Direction of PCI_RST# Signal" "output,input"
|
|
group asd:0xc0004a0c++0x07
|
|
line.long 0x00 "RESET_0,RESET_0"
|
|
bitfld.long 0x00 24. "WatchDog Reset Enable ,Watch Dog Timer Reset Enable" "PCI,RSTALL"
|
|
bitfld.long 0x00 22. " EXT_RESET_EN ,External Reset Enable" "after PLL lock,by software"
|
|
textline " "
|
|
bitfld.long 0x00 21. " INIT_COMP ,Indicates that Initialization is complete" "no,yes"
|
|
bitfld.long 0x00 20. " CMD_ARB ,Command bus arbiter Reset" "-,reset"
|
|
bitfld.long 0x00 19. " SBUS_ARB ,S Push/Pull bus arbiter Reset" "-,reset"
|
|
bitfld.long 0x00 18. " DBUS_ARB ,D Push/Pull bus arbiter Reset" "-,reset"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SHAC ,Scratch Unit Reset" "-,reset"
|
|
bitfld.long 0x00 16. " RSTALL ,Resets RESET_0 and RESET_1" "-,reset"
|
|
bitfld.long 0x00 15. " EXRST ,External Reset" "-,reset"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DRAM2 ,Dram2 Unit Reset" "-,reset"
|
|
bitfld.long 0x00 12. " DRAM1 ,Dram1 Unit Reset" "-,reset"
|
|
bitfld.long 0x00 11. " DRAM0 ,Dram0 Unit Reset" "-,reset"
|
|
bitfld.long 0x00 7. " MEDIA ,Media Unit" "-,reset"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SRAM3 ,Sram3 Unit" "-,reset"
|
|
bitfld.long 0x00 5. " SRAM2 ,Sram2 Unit" "-,reset"
|
|
bitfld.long 0x00 4. " SRAM1 ,Sram1 Unit" "-,reset"
|
|
bitfld.long 0x00 3. " SRAM0 ,Sram0 Unit" "-,reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PCIRST ,PCI_RST# pin assertion" "no,yes"
|
|
bitfld.long 0x00 1. " PCI ,PCI Unit Reset" "-,reset"
|
|
bitfld.long 0x00 0. " XSCALE ,XScale Reset" "-,reset"
|
|
line.long 0x04 "RESET_1,RESET_1"
|
|
bitfld.long 0x04 23. "ME_1_7 ,Cluster 1 ME 7" "-,reset"
|
|
bitfld.long 0x04 22. " ME_1_6 ,Cluster 1 ME 6" "-,reset"
|
|
bitfld.long 0x04 21. " ME_1_5 ,Cluster 1 ME 5" "-,reset"
|
|
bitfld.long 0x04 20. " ME_1_4 ,Cluster 1 ME 4" "-,reset"
|
|
textline " "
|
|
bitfld.long 0x04 19. "ME_1_3 ,Cluster 1 ME 3" "-,reset"
|
|
bitfld.long 0x04 18. " ME_1_2 ,Cluster 1 ME 2" "-,reset"
|
|
bitfld.long 0x04 17. " ME_1_1 ,Cluster 1 ME 1" "-,reset"
|
|
bitfld.long 0x04 16. " ME_1_0 ,Cluster 1 ME 0" "-,reset"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ME_0_7 ,Cluster 0 ME 7" "-,reset"
|
|
bitfld.long 0x04 6. " ME_0_6 ,Cluster 0 ME 6" "-,reset"
|
|
bitfld.long 0x04 5. " ME_0_5 ,Cluster 0 ME 5" "-,reset"
|
|
bitfld.long 0x04 4. " ME_0_4 ,Cluster 0 ME 4" "-,reset"
|
|
textline " "
|
|
bitfld.long 0x04 3. " ME_0_3 ,Cluster 0 ME 3" "-,reset"
|
|
bitfld.long 0x04 2. " ME_0_2 ,Cluster 0 ME 2" "-,reset"
|
|
bitfld.long 0x04 1. " ME_0_1 ,Cluster 0 ME 1" "-,reset"
|
|
bitfld.long 0x04 0. " ME_0_0 ,Cluster 0 ME 0" "-,reset"
|
|
;***IXP2400***group asd:0xc0004a14++0x03
|
|
;***IXP2400*** line.long 0x00 "CLOCK_CONTROL,CLOCK_CONTROL"
|
|
;***IXP2400*** bitfld.long 0x00 16.--19. "DRAM_CLK_RATIO ,Clock ratio for DRAM channels" "res,res,res,res,150MHz,res,100MHz,res,res,res,res,res,res,res,res,res"
|
|
;***IXP2400*** textline " "
|
|
;***IXP2400*** bitfld.long 0x00 4.--7. " SRAM_CH1_CLK_RATIO ,Clock ratio for SRAM channel 1" "res,res,res,200MHz,150MHz,res,100MHz,res,res,res,res,res,res,res,res,res"
|
|
;***IXP2400*** bitfld.long 0x00 0.--3. " SRAM_CH0_CLK_RATIO ,Clock ratio for SRAM channel 0" "res,res,res,200MHz,150MHz,res,100MHz,res,res,res,res,res,res,res,res,res"
|
|
group asd:0xc0004a14++0x03
|
|
line.long 0x00 "CLOCK_CONTROL,CLOCK_CONTROL"
|
|
bitfld.long 0x00 24.--27. "ARB_CLK_RATIO ,Clock ratio for the processor peripheral devices" "res,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20"
|
|
bitfld.long 0x00 20.--23. " MSF_CLK_RATIO ,Clock ratio for DRAM channels" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xa,0xb,0xc,0xd,0e,0xf"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SRAM_CH3_CLK_RATIO ,Clock ratio for SRAM channel 3" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xa,0xb,0xc,0xd,0e,0xf"
|
|
bitfld.long 0x00 8.--11. " SRAM_CH2_CLK_RATIO ,Clock ratio for SRAM channel 2" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xa,0xb,0xc,0xd,0e,0xf"
|
|
;***IXP2400***group asd:0xc0004a08++0x03
|
|
;***IXP2400*** line.long 0x00 "MCCR,MSF Clock control CSR"
|
|
;***IXP2400*** bitfld.long 0x00 25.--25. "MSF_TX_CLK_MODE ,Number of clocks on the transmit interface" "TXCLK01,TXCLK01/TXCLK23"
|
|
;***IXP2400*** bitfld.long 0x00 24.--24. " MSF_RX_CLK_MODE ,Number of clocks on the receive interface" "RXCLK01,RXCLK01/RXCLK23"
|
|
;***IXP2400*** textline " TX_PLL_1 TX_PLL_0 RX_PLL_1 RX_PLL_0"
|
|
;***IXP2400*** textline " "
|
|
;***IXP2400*** bitfld.long 0x00 31.--31. " MSF_PLL_LOCK ,PLL LOCK output signal from MSF's PLL (channels 2/3)" "not locked,locked"
|
|
;***IXP2400*** bitfld.long 0x00 30.--30. " ,PLL LOCK output signal from MSF's PLL (channels 0/1)" "not locked,locked"
|
|
;***IXP2400*** bitfld.long 0x00 29.--29. " ,PLL LOCK output signal from MSF's PLL (channels 2/3)" "not locked,locked"
|
|
;***IXP2400*** bitfld.long 0x00 28.--28. " ,PLL LOCK output signal from MSF's PLL (channels 0/1)" "not locked,locked"
|
|
;***IXP2400*** textline " "
|
|
;***IXP2400*** bitfld.long 0x00 22.--23. " MSF_CLK_CFG ,PLL divider (channels 2/3)" "25MHz,50MHz,104MHz,125MHz"
|
|
;***IXP2400*** bitfld.long 0x00 20.--21. " ,PLL divider (channels 0/1)" "25MHz,50MHz,104MHz,125MHz"
|
|
;***IXP2400*** bitfld.long 0x00 18.--19. " ,PLL divider (channels 2/3)" "25MHz,50MHz,104MHz,125MHz"
|
|
;***IXP2400*** bitfld.long 0x00 16.--17. " ,PLL divider (channels 0/1)" "25MHz,50MHz,104MHz,125MHz"
|
|
;***IXP2400*** textline " "
|
|
;***IXP2400*** bitfld.long 0x00 15.--15. " MSF_BYPASS_SEL ,Select MSF PLL bypass (channels 2/3)" "no bypass,bypass"
|
|
;***IXP2400*** bitfld.long 0x00 14.--14. " ,Select MSF PLL bypass (channels 0/1)" "no bypass,bypass"
|
|
;***IXP2400*** bitfld.long 0x00 13.--13. " ,Select MSF PLL bypass (channels 2/3)" "no bypass,bypass"
|
|
;***IXP2400*** bitfld.long 0x00 12.--12. " ,Select MSF PLL bypass (channels 0/1)" "no bypass,bypass"
|
|
;***IXP2400*** textline " "
|
|
;***IXP2400*** bitfld.long 0x00 11.--11. " MSF_DIV_RESET ,reset the divider (channels 2/3)" "not asserted,asserted"
|
|
;***IXP2400*** bitfld.long 0x00 10.--10. " ,reset the divider (channels 0/1)" "not asserted,asserted"
|
|
;***IXP2400*** bitfld.long 0x00 9.--9. " ,reset the divider (channels 2/3)" "not asserted,asserted"
|
|
;***IXP2400*** bitfld.long 0x00 8.--8. " ,reset the divider (channels 0/1)" "not asserted,asserted"
|
|
;***IXP2400*** textline " "
|
|
;***IXP2400*** bitfld.long 0x00 7.--7. " MSF_POWERDOWN ,PLL disable during power on initialization (channels 2/3)" "no,power down"
|
|
;***IXP2400*** bitfld.long 0x00 6.--6. " ,PLL disable during power on initialization (channels 0/1)" "no,power down"
|
|
;***IXP2400*** bitfld.long 0x00 5.--5. " ,PLL disable during power on initialization (channels 2/3)" "no,power down"
|
|
;***IXP2400*** bitfld.long 0x00 4.--4. " ,PLL disable during power on initialization (channels 0/1)" "no,power down"
|
|
;***IXP2400*** textline " "
|
|
;***IXP2400*** bitfld.long 0x00 3.--3. " MSF_ICCTEST ,Power down differrential amps in the clock buffer (channels 2/3)" "normal op.,power down"
|
|
;***IXP2400*** bitfld.long 0x00 2.--2. " ,Power down differrential amps in the clock buffer (channels 0/1)" "normal op.,power down"
|
|
;***IXP2400*** bitfld.long 0x00 1.--1. " ,Power down differrential amps in the clock buffer (channels 2/3)" "normal op.,power down"
|
|
;***IXP2400*** bitfld.long 0x00 0.--0. " ,Power down differrential amps in the clock buffer (channels 0/1)" "normal op.,power down"
|
|
group asd:0xc0004a08++0x03
|
|
line.long 0x00 "MCCR,MSF Clock control CSR"
|
|
bitfld.long 0x00 13.--13. "FC_RCV_CLK_SEL ,Flow Control receive logic clock select" "PLL,RXCCLK_DLL"
|
|
bitfld.long 0x00 12.--12. " RCV_CLK_SEL ,Data receive logic clock select" "PLL,RCLK_DLL"
|
|
textline " "
|
|
bitfld.long 0x00 11.--11. " RXCCLK_DLL_EN ,RXCCLK DLL locked" "reset,locked"
|
|
bitfld.long 0x00 10.--10. " RCLK_DLL_EN ,RCLK DLL locked" "reset,locked"
|
|
textline " "
|
|
bitfld.long 0x00 9.--9. " RSX_SECTION_EN ,Receive calendar section of MSF" "reset,running"
|
|
bitfld.long 0x00 8.--8. " TSX_SECTION_EN ,Transmit calendar section of MSF" "reset,running"
|
|
textline " "
|
|
bitfld.long 0x00 7.--7. " RCLK_REF_EN ,RCLK_REF output" "0,RCLK"
|
|
bitfld.long 0x00 6.--6. " TXCCLK_EN ,TXCCLK output" "0,TXCCLK_SOURCE"
|
|
textline " "
|
|
bitfld.long 0x00 5.--5. " RSCLK_EN ,RSCLK output" "0,1/4 RCLK"
|
|
bitfld.long 0x00 4.--4. " TCLK_EN ,TCLK output" "0,TCLK_SOURCE"
|
|
textline " "
|
|
bitfld.long 0x00 3.--3. " RX_FC_SECTION_EN ,Transmit flow control section of MSF" "reset,running"
|
|
bitfld.long 0x00 2.--2. " TX_FC_SECTION_EN ,Transmit flow control section of MSF" "reset,running"
|
|
textline " "
|
|
bitfld.long 0x00 1.--1. " RX_SECTION_EN ,Transmit section of MSF" "reset,running"
|
|
bitfld.long 0x00 0.--0. " TX_SECTION_EN ,Transmit section of MSF" "reset,running"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2800-global.ph
|
|
;begin include file xscale/ixp2400-me.ph
|
|
;parameters: 0xc0018000 0_0
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400
|
|
; State: ok
|
|
;
|
|
; IXP2400-ME %1 %2
|
|
;
|
|
; %1 address offset (0x100 * %2)
|
|
; %2 ME number (0..15)
|
|
; --------------------------------------------------------------------------------
|
|
tree "ME_0_0"
|
|
; --------------------------------------------------------------------------------
|
|
width 24.
|
|
group asd:(0x000+0xc0018000)++0x03
|
|
line.long 0x00 "USTORE_ADDRESS,USTORE_ADDRESS"
|
|
bitfld.long 0x00 31. "ECS ,Execution" "norm,rd/wr"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADR ,Contains the address of the Control Store location"
|
|
group asd:(0x004+0xc0018000)++0x03
|
|
line.long 0x00 "USTORE_DATA_LOWER,Control Store Data Bits [31..0]"
|
|
group asd:(0x008+0xc0018000)++0x03
|
|
line.long 0x00 "USTORE_DATA_UPPER,Upper Control Store Data Bits"
|
|
bitfld.long 0x00 9.--9. "PAR[39:20] ,Contains odd Parity for data bits [39:20]" "0,1"
|
|
bitfld.long 0x00 8.--8. " PAR[19:0] ,Contains odd Parity for data bits [19:0]" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " UDATA_UPPER ,Control Store Data Bits [39..32]"
|
|
group asd:(0x00c+0xc0018000)++0x03
|
|
line.long 0x00 "USTORE_ERROR_STATUS,Information about parity error during instruction reads"
|
|
bitfld.long 0x00 16.--18. "CTX ,Context that was executed when parity error occurred" "0,1,2,3,4,5,6,7"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADDR ,Adress that had the Parity Error"
|
|
group asd:(0x010+0xc0018000)++0x03
|
|
line.long 0x00 "ALU_OUT,ALU Output"
|
|
group asd:(0x014+0xc0018000)++0x03
|
|
line.long 0x00 "CTX_ARB_CNTL,Context Arbiter Control Register"
|
|
bitfld.long 0x00 4.--6. "PCTX ,Previous Context" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " NCTX ,Next Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x018+0xc0018000)++0x03
|
|
line.long 0x00 "CTX_ENABLES,Context Enable Register"
|
|
bitfld.long 0x00 31. "IN_USE_CTX ,in-use contexts" "0-7,0/2/4/6"
|
|
bitfld.long 0x00 30. " PRN Mode ,Operation of Pseudo Random Number Update" "load/read,every cycle"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CTL_STR_PAR_ER ,Parity error detected" "no,yes"
|
|
bitfld.long 0x00 28. " CTL_STR_PAR_EN ,Enables parity checking on Control Store" "dis,ena"
|
|
bitfld.long 0x00 27. " BREAKPOINT ,Breakpoint instruction was executed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NN_MODE ,Controls how the Next Neighbor Registers are written" "prev ME,this ME"
|
|
bitfld.long 0x00 18.--19. " NN_RING_EMPTY ,Controls Threshold when NN_EMPTY asserts" "0 entries,1 entry,2 entries,3 entries"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LM_ADDR_1_GLOB ,Control usage of LM_ADDR_1" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LM_ADDR_0_GLOB ,Control usage of LM_ADDR_0" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CTX_EN7 ,Context 7 Enable" "dis,ena"
|
|
bitfld.long 0x00 14. " CTX_EN6 ,Context 6 Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " CTX_EN5 ,Context 5 Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " CTX_EN4 ,Context 4 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTX_EN3 ,Context 3 Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " CTX_EN2 ,Context 2 Enable" "dis,ena"
|
|
bitfld.long 0x00 9. " CTX_EN1 ,Context 1 Enable" "dis,ena"
|
|
bitfld.long 0x00 8. " CTX_EN0 ,Context 0 Enable" "dis,ena"
|
|
group asd:(0x01c+0xc0018000)++0x03
|
|
line.long 0x00 "CC_ENABLE,CC_ENABLE"
|
|
bitfld.long 0x00 13. "CCCE ,Current Condition Code Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--2. " PMU CTX Monitor ,Number of the context to be monitored" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x020+0xc0018000)++0x03
|
|
line.long 0x00 "CSR_CTX_POINTER,Pointer to select which Cobntexts' registers is read"
|
|
bitfld.long 0x00 0.--2. "CTX ,Selects which contexts local CSR is accessed" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x040+0xc0018000)++0x03
|
|
line.long 0x00 "IND_CTX_STS,Indirect Context Status Register"
|
|
bitfld.long 0x00 16. "RR ,Ready to Run" "no,yes"
|
|
hexmask.long 0x00 0.--12. 0x01 " CTX_PC ,Program Counter"
|
|
group asd:(0x044+0xc0018000)++0x03
|
|
line.long 0x00 "ACT_CTX_STS,Active Context Status Register"
|
|
bitfld.long 0x00 31. "AB0 ,Microengine has a Context in executing state" "no,yes"
|
|
hexmask.long 0x00 8.--20. 0x01 " ACTXPC ,PC of Execution Context"
|
|
bitfld.long 0x00 3.--7. " ME_NO ,Number of Microengine" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 0.--2. " ACNO ,Number of Executing Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x048+0xc0018000)++0x03
|
|
line.long 0x00 "IND_CTX_SIG_EVENTS,Indirect Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x04c+0xc0018000)++0x03
|
|
line.long 0x00 "ACT_CTX_SIG_EVENTS,Active Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x050+0xc0018000)++0x03
|
|
line.long 0x00 "IND_CTX_WAKEUP_EVENTS,Indirect Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x054+0xc0018000)++0x03
|
|
line.long 0x00 "ACT_CTX_WAKEUP_EVENTS,Active Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x058+0xc0018000)++0x03
|
|
line.long 0x00 "IND_CTX_FUTURE_COUNT,Indirect Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x05c+0xc0018000)++0x03
|
|
line.long 0x00 "ACT_CTX_FUTURE_COUNT,Active Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x060+0xc0018000)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0,LM_ADDR_0 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x00 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x04 "ACT_LM_ADDR_0,Access working copy LM_ADDR_0"
|
|
hexmask.long 0x04 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x08 "IND_LM_ADDR_1,LM_ADDR_1 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x08 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x0c "ACT_LM_ADDR_1,Access working copy LM_ADDR_1"
|
|
hexmask.long 0x0c 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
group asd:(0x070+0xc0018000)++0x03
|
|
line.long 0x00 "BYTE_IDX,Controls the byte shift amount during Byte_Align instructions"
|
|
bitfld.long 0x00 0.--1. "BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0e0+0xc0018000)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0_BYTE_IDX,Read or writes IND_LM_ADDR_0 and BYTE_IDX"
|
|
hexmask.long 0x00 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x04 "ACT_LM_ADDR_0_BYTE_IDX,ACT_LM_ADDR_0_BYTE_IDX"
|
|
hexmask.long 0x04 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x04 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x08 "IND_LM_ADDR_1_BYTE_IDX,IND_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x08 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x08 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x0c "ACT_LM_ADDR_1_BYTE_IDX,ACT_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x0c 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x0c 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0f4+0xc0018000)++0x03
|
|
line.long 0x00 "T_IDX_BYTE_IDX,Read or writes T_IDX and BYTE_IDX register"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x074+0xc0018000)++0x03
|
|
line.long 0x00 "T_IDX,Index register for S_TRANSFER or D_TRANSFER"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
group asd:(0x078+0xc0018000)++0x03
|
|
line.long 0x00 "IND_FUTURE_COUNT_SIGNAL,Indirect Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x07c+0xc0018000)++0x03
|
|
line.long 0x00 "ACT_FUTURE_COUNT_SIGNAL,Active Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x080+0xc0018000)++0x03
|
|
line.long 0x00 "NN_PUT,Put Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to write"
|
|
group asd:(0x084+0xc0018000)++0x03
|
|
line.long 0x00 "NN_GET,Get Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to read"
|
|
group asd:(0x0c0+0xc0018000)++0x07
|
|
line.long 0x00 "TIMESTAMP_LOW,Timestamp[31:0]"
|
|
line.long 0x04 "TIMESTAMP_HIGH,Timestamp[63:32]"
|
|
group asd:(0x100+0xc0018000)++0x03
|
|
line.long 0x00 "NEXT_NEIGHBOR_SIGNAL,Signal a Context in the Next Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x104+0xc0018000)++0x03
|
|
line.long 0x00 "PREV_NEIGHBOR_SIGNAL,Signal a Context in the Previous Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x108+0xc0018000)++0x03
|
|
line.long 0x00 "SAME_ME_SIGNAL,Signal another Context in the same Microengine"
|
|
bitfld.long 0x00 7. "NEXT_CTX ,Controls" "use CTX field,next CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the same Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the same Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x140+0xc0018000)++0x03
|
|
line.long 0x00 "CRC_REMAINDER,Input Operand and result of CRC instruction"
|
|
group asd:(0x144+0xc0018000)++0x03
|
|
line.long 0x00 "PROFILE_COUNT,Profile Count"
|
|
hexmask.long 0x00 0.--15. 0x01 "PROFILE_COUNT ,Count advances by one every cycle"
|
|
group asd:(0x148+0xc0018000)++0x03
|
|
line.long 0x00 "PSEUDO_RANDOM_NUMBER,Pseudo Random Number"
|
|
;group asd:(0x180+%1)++0x03
|
|
hide.long 0x38 "LOCAL_CSR_STATUS,LOCAL_CSR_STATUS"
|
|
in
|
|
; bitfld.long 0x0 0. " STATUS ,Local CSR Status" "no acc,acc"
|
|
group asd:(0x3fc+0xc0018000)++0x03
|
|
line.long 0x00 "RESERVED,This address can always be used and no register will be written"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-me.ph
|
|
;begin include file xscale/ixp2400-me.ph
|
|
;parameters: 0xc0018400 0_1
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400
|
|
; State: ok
|
|
;
|
|
; IXP2400-ME %1 %2
|
|
;
|
|
; %1 address offset (0x100 * %2)
|
|
; %2 ME number (0..15)
|
|
; --------------------------------------------------------------------------------
|
|
tree "ME_0_1"
|
|
; --------------------------------------------------------------------------------
|
|
width 24.
|
|
group asd:(0x000+0xc0018400)++0x03
|
|
line.long 0x00 "USTORE_ADDRESS,USTORE_ADDRESS"
|
|
bitfld.long 0x00 31. "ECS ,Execution" "norm,rd/wr"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADR ,Contains the address of the Control Store location"
|
|
group asd:(0x004+0xc0018400)++0x03
|
|
line.long 0x00 "USTORE_DATA_LOWER,Control Store Data Bits [31..0]"
|
|
group asd:(0x008+0xc0018400)++0x03
|
|
line.long 0x00 "USTORE_DATA_UPPER,Upper Control Store Data Bits"
|
|
bitfld.long 0x00 9.--9. "PAR[39:20] ,Contains odd Parity for data bits [39:20]" "0,1"
|
|
bitfld.long 0x00 8.--8. " PAR[19:0] ,Contains odd Parity for data bits [19:0]" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " UDATA_UPPER ,Control Store Data Bits [39..32]"
|
|
group asd:(0x00c+0xc0018400)++0x03
|
|
line.long 0x00 "USTORE_ERROR_STATUS,Information about parity error during instruction reads"
|
|
bitfld.long 0x00 16.--18. "CTX ,Context that was executed when parity error occurred" "0,1,2,3,4,5,6,7"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADDR ,Adress that had the Parity Error"
|
|
group asd:(0x010+0xc0018400)++0x03
|
|
line.long 0x00 "ALU_OUT,ALU Output"
|
|
group asd:(0x014+0xc0018400)++0x03
|
|
line.long 0x00 "CTX_ARB_CNTL,Context Arbiter Control Register"
|
|
bitfld.long 0x00 4.--6. "PCTX ,Previous Context" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " NCTX ,Next Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x018+0xc0018400)++0x03
|
|
line.long 0x00 "CTX_ENABLES,Context Enable Register"
|
|
bitfld.long 0x00 31. "IN_USE_CTX ,in-use contexts" "0-7,0/2/4/6"
|
|
bitfld.long 0x00 30. " PRN Mode ,Operation of Pseudo Random Number Update" "load/read,every cycle"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CTL_STR_PAR_ER ,Parity error detected" "no,yes"
|
|
bitfld.long 0x00 28. " CTL_STR_PAR_EN ,Enables parity checking on Control Store" "dis,ena"
|
|
bitfld.long 0x00 27. " BREAKPOINT ,Breakpoint instruction was executed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NN_MODE ,Controls how the Next Neighbor Registers are written" "prev ME,this ME"
|
|
bitfld.long 0x00 18.--19. " NN_RING_EMPTY ,Controls Threshold when NN_EMPTY asserts" "0 entries,1 entry,2 entries,3 entries"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LM_ADDR_1_GLOB ,Control usage of LM_ADDR_1" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LM_ADDR_0_GLOB ,Control usage of LM_ADDR_0" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CTX_EN7 ,Context 7 Enable" "dis,ena"
|
|
bitfld.long 0x00 14. " CTX_EN6 ,Context 6 Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " CTX_EN5 ,Context 5 Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " CTX_EN4 ,Context 4 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTX_EN3 ,Context 3 Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " CTX_EN2 ,Context 2 Enable" "dis,ena"
|
|
bitfld.long 0x00 9. " CTX_EN1 ,Context 1 Enable" "dis,ena"
|
|
bitfld.long 0x00 8. " CTX_EN0 ,Context 0 Enable" "dis,ena"
|
|
group asd:(0x01c+0xc0018400)++0x03
|
|
line.long 0x00 "CC_ENABLE,CC_ENABLE"
|
|
bitfld.long 0x00 13. "CCCE ,Current Condition Code Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--2. " PMU CTX Monitor ,Number of the context to be monitored" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x020+0xc0018400)++0x03
|
|
line.long 0x00 "CSR_CTX_POINTER,Pointer to select which Cobntexts' registers is read"
|
|
bitfld.long 0x00 0.--2. "CTX ,Selects which contexts local CSR is accessed" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x040+0xc0018400)++0x03
|
|
line.long 0x00 "IND_CTX_STS,Indirect Context Status Register"
|
|
bitfld.long 0x00 16. "RR ,Ready to Run" "no,yes"
|
|
hexmask.long 0x00 0.--12. 0x01 " CTX_PC ,Program Counter"
|
|
group asd:(0x044+0xc0018400)++0x03
|
|
line.long 0x00 "ACT_CTX_STS,Active Context Status Register"
|
|
bitfld.long 0x00 31. "AB0 ,Microengine has a Context in executing state" "no,yes"
|
|
hexmask.long 0x00 8.--20. 0x01 " ACTXPC ,PC of Execution Context"
|
|
bitfld.long 0x00 3.--7. " ME_NO ,Number of Microengine" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 0.--2. " ACNO ,Number of Executing Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x048+0xc0018400)++0x03
|
|
line.long 0x00 "IND_CTX_SIG_EVENTS,Indirect Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x04c+0xc0018400)++0x03
|
|
line.long 0x00 "ACT_CTX_SIG_EVENTS,Active Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x050+0xc0018400)++0x03
|
|
line.long 0x00 "IND_CTX_WAKEUP_EVENTS,Indirect Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x054+0xc0018400)++0x03
|
|
line.long 0x00 "ACT_CTX_WAKEUP_EVENTS,Active Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x058+0xc0018400)++0x03
|
|
line.long 0x00 "IND_CTX_FUTURE_COUNT,Indirect Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x05c+0xc0018400)++0x03
|
|
line.long 0x00 "ACT_CTX_FUTURE_COUNT,Active Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x060+0xc0018400)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0,LM_ADDR_0 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x00 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x04 "ACT_LM_ADDR_0,Access working copy LM_ADDR_0"
|
|
hexmask.long 0x04 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x08 "IND_LM_ADDR_1,LM_ADDR_1 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x08 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x0c "ACT_LM_ADDR_1,Access working copy LM_ADDR_1"
|
|
hexmask.long 0x0c 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
group asd:(0x070+0xc0018400)++0x03
|
|
line.long 0x00 "BYTE_IDX,Controls the byte shift amount during Byte_Align instructions"
|
|
bitfld.long 0x00 0.--1. "BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0e0+0xc0018400)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0_BYTE_IDX,Read or writes IND_LM_ADDR_0 and BYTE_IDX"
|
|
hexmask.long 0x00 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x04 "ACT_LM_ADDR_0_BYTE_IDX,ACT_LM_ADDR_0_BYTE_IDX"
|
|
hexmask.long 0x04 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x04 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x08 "IND_LM_ADDR_1_BYTE_IDX,IND_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x08 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x08 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x0c "ACT_LM_ADDR_1_BYTE_IDX,ACT_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x0c 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x0c 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0f4+0xc0018400)++0x03
|
|
line.long 0x00 "T_IDX_BYTE_IDX,Read or writes T_IDX and BYTE_IDX register"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x074+0xc0018400)++0x03
|
|
line.long 0x00 "T_IDX,Index register for S_TRANSFER or D_TRANSFER"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
group asd:(0x078+0xc0018400)++0x03
|
|
line.long 0x00 "IND_FUTURE_COUNT_SIGNAL,Indirect Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x07c+0xc0018400)++0x03
|
|
line.long 0x00 "ACT_FUTURE_COUNT_SIGNAL,Active Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x080+0xc0018400)++0x03
|
|
line.long 0x00 "NN_PUT,Put Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to write"
|
|
group asd:(0x084+0xc0018400)++0x03
|
|
line.long 0x00 "NN_GET,Get Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to read"
|
|
group asd:(0x0c0+0xc0018400)++0x07
|
|
line.long 0x00 "TIMESTAMP_LOW,Timestamp[31:0]"
|
|
line.long 0x04 "TIMESTAMP_HIGH,Timestamp[63:32]"
|
|
group asd:(0x100+0xc0018400)++0x03
|
|
line.long 0x00 "NEXT_NEIGHBOR_SIGNAL,Signal a Context in the Next Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x104+0xc0018400)++0x03
|
|
line.long 0x00 "PREV_NEIGHBOR_SIGNAL,Signal a Context in the Previous Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x108+0xc0018400)++0x03
|
|
line.long 0x00 "SAME_ME_SIGNAL,Signal another Context in the same Microengine"
|
|
bitfld.long 0x00 7. "NEXT_CTX ,Controls" "use CTX field,next CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the same Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the same Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x140+0xc0018400)++0x03
|
|
line.long 0x00 "CRC_REMAINDER,Input Operand and result of CRC instruction"
|
|
group asd:(0x144+0xc0018400)++0x03
|
|
line.long 0x00 "PROFILE_COUNT,Profile Count"
|
|
hexmask.long 0x00 0.--15. 0x01 "PROFILE_COUNT ,Count advances by one every cycle"
|
|
group asd:(0x148+0xc0018400)++0x03
|
|
line.long 0x00 "PSEUDO_RANDOM_NUMBER,Pseudo Random Number"
|
|
;group asd:(0x180+%1)++0x03
|
|
hide.long 0x38 "LOCAL_CSR_STATUS,LOCAL_CSR_STATUS"
|
|
in
|
|
; bitfld.long 0x0 0. " STATUS ,Local CSR Status" "no acc,acc"
|
|
group asd:(0x3fc+0xc0018400)++0x03
|
|
line.long 0x00 "RESERVED,This address can always be used and no register will be written"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-me.ph
|
|
;begin include file xscale/ixp2400-me.ph
|
|
;parameters: 0xc0018800 0_2
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400
|
|
; State: ok
|
|
;
|
|
; IXP2400-ME %1 %2
|
|
;
|
|
; %1 address offset (0x100 * %2)
|
|
; %2 ME number (0..15)
|
|
; --------------------------------------------------------------------------------
|
|
tree "ME_0_2"
|
|
; --------------------------------------------------------------------------------
|
|
width 24.
|
|
group asd:(0x000+0xc0018800)++0x03
|
|
line.long 0x00 "USTORE_ADDRESS,USTORE_ADDRESS"
|
|
bitfld.long 0x00 31. "ECS ,Execution" "norm,rd/wr"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADR ,Contains the address of the Control Store location"
|
|
group asd:(0x004+0xc0018800)++0x03
|
|
line.long 0x00 "USTORE_DATA_LOWER,Control Store Data Bits [31..0]"
|
|
group asd:(0x008+0xc0018800)++0x03
|
|
line.long 0x00 "USTORE_DATA_UPPER,Upper Control Store Data Bits"
|
|
bitfld.long 0x00 9.--9. "PAR[39:20] ,Contains odd Parity for data bits [39:20]" "0,1"
|
|
bitfld.long 0x00 8.--8. " PAR[19:0] ,Contains odd Parity for data bits [19:0]" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " UDATA_UPPER ,Control Store Data Bits [39..32]"
|
|
group asd:(0x00c+0xc0018800)++0x03
|
|
line.long 0x00 "USTORE_ERROR_STATUS,Information about parity error during instruction reads"
|
|
bitfld.long 0x00 16.--18. "CTX ,Context that was executed when parity error occurred" "0,1,2,3,4,5,6,7"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADDR ,Adress that had the Parity Error"
|
|
group asd:(0x010+0xc0018800)++0x03
|
|
line.long 0x00 "ALU_OUT,ALU Output"
|
|
group asd:(0x014+0xc0018800)++0x03
|
|
line.long 0x00 "CTX_ARB_CNTL,Context Arbiter Control Register"
|
|
bitfld.long 0x00 4.--6. "PCTX ,Previous Context" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " NCTX ,Next Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x018+0xc0018800)++0x03
|
|
line.long 0x00 "CTX_ENABLES,Context Enable Register"
|
|
bitfld.long 0x00 31. "IN_USE_CTX ,in-use contexts" "0-7,0/2/4/6"
|
|
bitfld.long 0x00 30. " PRN Mode ,Operation of Pseudo Random Number Update" "load/read,every cycle"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CTL_STR_PAR_ER ,Parity error detected" "no,yes"
|
|
bitfld.long 0x00 28. " CTL_STR_PAR_EN ,Enables parity checking on Control Store" "dis,ena"
|
|
bitfld.long 0x00 27. " BREAKPOINT ,Breakpoint instruction was executed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NN_MODE ,Controls how the Next Neighbor Registers are written" "prev ME,this ME"
|
|
bitfld.long 0x00 18.--19. " NN_RING_EMPTY ,Controls Threshold when NN_EMPTY asserts" "0 entries,1 entry,2 entries,3 entries"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LM_ADDR_1_GLOB ,Control usage of LM_ADDR_1" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LM_ADDR_0_GLOB ,Control usage of LM_ADDR_0" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CTX_EN7 ,Context 7 Enable" "dis,ena"
|
|
bitfld.long 0x00 14. " CTX_EN6 ,Context 6 Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " CTX_EN5 ,Context 5 Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " CTX_EN4 ,Context 4 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTX_EN3 ,Context 3 Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " CTX_EN2 ,Context 2 Enable" "dis,ena"
|
|
bitfld.long 0x00 9. " CTX_EN1 ,Context 1 Enable" "dis,ena"
|
|
bitfld.long 0x00 8. " CTX_EN0 ,Context 0 Enable" "dis,ena"
|
|
group asd:(0x01c+0xc0018800)++0x03
|
|
line.long 0x00 "CC_ENABLE,CC_ENABLE"
|
|
bitfld.long 0x00 13. "CCCE ,Current Condition Code Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--2. " PMU CTX Monitor ,Number of the context to be monitored" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x020+0xc0018800)++0x03
|
|
line.long 0x00 "CSR_CTX_POINTER,Pointer to select which Cobntexts' registers is read"
|
|
bitfld.long 0x00 0.--2. "CTX ,Selects which contexts local CSR is accessed" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x040+0xc0018800)++0x03
|
|
line.long 0x00 "IND_CTX_STS,Indirect Context Status Register"
|
|
bitfld.long 0x00 16. "RR ,Ready to Run" "no,yes"
|
|
hexmask.long 0x00 0.--12. 0x01 " CTX_PC ,Program Counter"
|
|
group asd:(0x044+0xc0018800)++0x03
|
|
line.long 0x00 "ACT_CTX_STS,Active Context Status Register"
|
|
bitfld.long 0x00 31. "AB0 ,Microengine has a Context in executing state" "no,yes"
|
|
hexmask.long 0x00 8.--20. 0x01 " ACTXPC ,PC of Execution Context"
|
|
bitfld.long 0x00 3.--7. " ME_NO ,Number of Microengine" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 0.--2. " ACNO ,Number of Executing Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x048+0xc0018800)++0x03
|
|
line.long 0x00 "IND_CTX_SIG_EVENTS,Indirect Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x04c+0xc0018800)++0x03
|
|
line.long 0x00 "ACT_CTX_SIG_EVENTS,Active Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x050+0xc0018800)++0x03
|
|
line.long 0x00 "IND_CTX_WAKEUP_EVENTS,Indirect Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x054+0xc0018800)++0x03
|
|
line.long 0x00 "ACT_CTX_WAKEUP_EVENTS,Active Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x058+0xc0018800)++0x03
|
|
line.long 0x00 "IND_CTX_FUTURE_COUNT,Indirect Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x05c+0xc0018800)++0x03
|
|
line.long 0x00 "ACT_CTX_FUTURE_COUNT,Active Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x060+0xc0018800)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0,LM_ADDR_0 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x00 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x04 "ACT_LM_ADDR_0,Access working copy LM_ADDR_0"
|
|
hexmask.long 0x04 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x08 "IND_LM_ADDR_1,LM_ADDR_1 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x08 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x0c "ACT_LM_ADDR_1,Access working copy LM_ADDR_1"
|
|
hexmask.long 0x0c 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
group asd:(0x070+0xc0018800)++0x03
|
|
line.long 0x00 "BYTE_IDX,Controls the byte shift amount during Byte_Align instructions"
|
|
bitfld.long 0x00 0.--1. "BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0e0+0xc0018800)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0_BYTE_IDX,Read or writes IND_LM_ADDR_0 and BYTE_IDX"
|
|
hexmask.long 0x00 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x04 "ACT_LM_ADDR_0_BYTE_IDX,ACT_LM_ADDR_0_BYTE_IDX"
|
|
hexmask.long 0x04 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x04 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x08 "IND_LM_ADDR_1_BYTE_IDX,IND_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x08 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x08 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x0c "ACT_LM_ADDR_1_BYTE_IDX,ACT_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x0c 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x0c 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0f4+0xc0018800)++0x03
|
|
line.long 0x00 "T_IDX_BYTE_IDX,Read or writes T_IDX and BYTE_IDX register"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x074+0xc0018800)++0x03
|
|
line.long 0x00 "T_IDX,Index register for S_TRANSFER or D_TRANSFER"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
group asd:(0x078+0xc0018800)++0x03
|
|
line.long 0x00 "IND_FUTURE_COUNT_SIGNAL,Indirect Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x07c+0xc0018800)++0x03
|
|
line.long 0x00 "ACT_FUTURE_COUNT_SIGNAL,Active Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x080+0xc0018800)++0x03
|
|
line.long 0x00 "NN_PUT,Put Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to write"
|
|
group asd:(0x084+0xc0018800)++0x03
|
|
line.long 0x00 "NN_GET,Get Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to read"
|
|
group asd:(0x0c0+0xc0018800)++0x07
|
|
line.long 0x00 "TIMESTAMP_LOW,Timestamp[31:0]"
|
|
line.long 0x04 "TIMESTAMP_HIGH,Timestamp[63:32]"
|
|
group asd:(0x100+0xc0018800)++0x03
|
|
line.long 0x00 "NEXT_NEIGHBOR_SIGNAL,Signal a Context in the Next Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x104+0xc0018800)++0x03
|
|
line.long 0x00 "PREV_NEIGHBOR_SIGNAL,Signal a Context in the Previous Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x108+0xc0018800)++0x03
|
|
line.long 0x00 "SAME_ME_SIGNAL,Signal another Context in the same Microengine"
|
|
bitfld.long 0x00 7. "NEXT_CTX ,Controls" "use CTX field,next CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the same Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the same Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x140+0xc0018800)++0x03
|
|
line.long 0x00 "CRC_REMAINDER,Input Operand and result of CRC instruction"
|
|
group asd:(0x144+0xc0018800)++0x03
|
|
line.long 0x00 "PROFILE_COUNT,Profile Count"
|
|
hexmask.long 0x00 0.--15. 0x01 "PROFILE_COUNT ,Count advances by one every cycle"
|
|
group asd:(0x148+0xc0018800)++0x03
|
|
line.long 0x00 "PSEUDO_RANDOM_NUMBER,Pseudo Random Number"
|
|
;group asd:(0x180+%1)++0x03
|
|
hide.long 0x38 "LOCAL_CSR_STATUS,LOCAL_CSR_STATUS"
|
|
in
|
|
; bitfld.long 0x0 0. " STATUS ,Local CSR Status" "no acc,acc"
|
|
group asd:(0x3fc+0xc0018800)++0x03
|
|
line.long 0x00 "RESERVED,This address can always be used and no register will be written"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-me.ph
|
|
;begin include file xscale/ixp2400-me.ph
|
|
;parameters: 0xc0018c00 0_3
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400
|
|
; State: ok
|
|
;
|
|
; IXP2400-ME %1 %2
|
|
;
|
|
; %1 address offset (0x100 * %2)
|
|
; %2 ME number (0..15)
|
|
; --------------------------------------------------------------------------------
|
|
tree "ME_0_3"
|
|
; --------------------------------------------------------------------------------
|
|
width 24.
|
|
group asd:(0x000+0xc0018c00)++0x03
|
|
line.long 0x00 "USTORE_ADDRESS,USTORE_ADDRESS"
|
|
bitfld.long 0x00 31. "ECS ,Execution" "norm,rd/wr"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADR ,Contains the address of the Control Store location"
|
|
group asd:(0x004+0xc0018c00)++0x03
|
|
line.long 0x00 "USTORE_DATA_LOWER,Control Store Data Bits [31..0]"
|
|
group asd:(0x008+0xc0018c00)++0x03
|
|
line.long 0x00 "USTORE_DATA_UPPER,Upper Control Store Data Bits"
|
|
bitfld.long 0x00 9.--9. "PAR[39:20] ,Contains odd Parity for data bits [39:20]" "0,1"
|
|
bitfld.long 0x00 8.--8. " PAR[19:0] ,Contains odd Parity for data bits [19:0]" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " UDATA_UPPER ,Control Store Data Bits [39..32]"
|
|
group asd:(0x00c+0xc0018c00)++0x03
|
|
line.long 0x00 "USTORE_ERROR_STATUS,Information about parity error during instruction reads"
|
|
bitfld.long 0x00 16.--18. "CTX ,Context that was executed when parity error occurred" "0,1,2,3,4,5,6,7"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADDR ,Adress that had the Parity Error"
|
|
group asd:(0x010+0xc0018c00)++0x03
|
|
line.long 0x00 "ALU_OUT,ALU Output"
|
|
group asd:(0x014+0xc0018c00)++0x03
|
|
line.long 0x00 "CTX_ARB_CNTL,Context Arbiter Control Register"
|
|
bitfld.long 0x00 4.--6. "PCTX ,Previous Context" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " NCTX ,Next Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x018+0xc0018c00)++0x03
|
|
line.long 0x00 "CTX_ENABLES,Context Enable Register"
|
|
bitfld.long 0x00 31. "IN_USE_CTX ,in-use contexts" "0-7,0/2/4/6"
|
|
bitfld.long 0x00 30. " PRN Mode ,Operation of Pseudo Random Number Update" "load/read,every cycle"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CTL_STR_PAR_ER ,Parity error detected" "no,yes"
|
|
bitfld.long 0x00 28. " CTL_STR_PAR_EN ,Enables parity checking on Control Store" "dis,ena"
|
|
bitfld.long 0x00 27. " BREAKPOINT ,Breakpoint instruction was executed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NN_MODE ,Controls how the Next Neighbor Registers are written" "prev ME,this ME"
|
|
bitfld.long 0x00 18.--19. " NN_RING_EMPTY ,Controls Threshold when NN_EMPTY asserts" "0 entries,1 entry,2 entries,3 entries"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LM_ADDR_1_GLOB ,Control usage of LM_ADDR_1" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LM_ADDR_0_GLOB ,Control usage of LM_ADDR_0" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CTX_EN7 ,Context 7 Enable" "dis,ena"
|
|
bitfld.long 0x00 14. " CTX_EN6 ,Context 6 Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " CTX_EN5 ,Context 5 Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " CTX_EN4 ,Context 4 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTX_EN3 ,Context 3 Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " CTX_EN2 ,Context 2 Enable" "dis,ena"
|
|
bitfld.long 0x00 9. " CTX_EN1 ,Context 1 Enable" "dis,ena"
|
|
bitfld.long 0x00 8. " CTX_EN0 ,Context 0 Enable" "dis,ena"
|
|
group asd:(0x01c+0xc0018c00)++0x03
|
|
line.long 0x00 "CC_ENABLE,CC_ENABLE"
|
|
bitfld.long 0x00 13. "CCCE ,Current Condition Code Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--2. " PMU CTX Monitor ,Number of the context to be monitored" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x020+0xc0018c00)++0x03
|
|
line.long 0x00 "CSR_CTX_POINTER,Pointer to select which Cobntexts' registers is read"
|
|
bitfld.long 0x00 0.--2. "CTX ,Selects which contexts local CSR is accessed" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x040+0xc0018c00)++0x03
|
|
line.long 0x00 "IND_CTX_STS,Indirect Context Status Register"
|
|
bitfld.long 0x00 16. "RR ,Ready to Run" "no,yes"
|
|
hexmask.long 0x00 0.--12. 0x01 " CTX_PC ,Program Counter"
|
|
group asd:(0x044+0xc0018c00)++0x03
|
|
line.long 0x00 "ACT_CTX_STS,Active Context Status Register"
|
|
bitfld.long 0x00 31. "AB0 ,Microengine has a Context in executing state" "no,yes"
|
|
hexmask.long 0x00 8.--20. 0x01 " ACTXPC ,PC of Execution Context"
|
|
bitfld.long 0x00 3.--7. " ME_NO ,Number of Microengine" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 0.--2. " ACNO ,Number of Executing Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x048+0xc0018c00)++0x03
|
|
line.long 0x00 "IND_CTX_SIG_EVENTS,Indirect Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x04c+0xc0018c00)++0x03
|
|
line.long 0x00 "ACT_CTX_SIG_EVENTS,Active Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x050+0xc0018c00)++0x03
|
|
line.long 0x00 "IND_CTX_WAKEUP_EVENTS,Indirect Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x054+0xc0018c00)++0x03
|
|
line.long 0x00 "ACT_CTX_WAKEUP_EVENTS,Active Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x058+0xc0018c00)++0x03
|
|
line.long 0x00 "IND_CTX_FUTURE_COUNT,Indirect Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x05c+0xc0018c00)++0x03
|
|
line.long 0x00 "ACT_CTX_FUTURE_COUNT,Active Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x060+0xc0018c00)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0,LM_ADDR_0 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x00 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x04 "ACT_LM_ADDR_0,Access working copy LM_ADDR_0"
|
|
hexmask.long 0x04 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x08 "IND_LM_ADDR_1,LM_ADDR_1 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x08 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x0c "ACT_LM_ADDR_1,Access working copy LM_ADDR_1"
|
|
hexmask.long 0x0c 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
group asd:(0x070+0xc0018c00)++0x03
|
|
line.long 0x00 "BYTE_IDX,Controls the byte shift amount during Byte_Align instructions"
|
|
bitfld.long 0x00 0.--1. "BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0e0+0xc0018c00)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0_BYTE_IDX,Read or writes IND_LM_ADDR_0 and BYTE_IDX"
|
|
hexmask.long 0x00 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x04 "ACT_LM_ADDR_0_BYTE_IDX,ACT_LM_ADDR_0_BYTE_IDX"
|
|
hexmask.long 0x04 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x04 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x08 "IND_LM_ADDR_1_BYTE_IDX,IND_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x08 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x08 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x0c "ACT_LM_ADDR_1_BYTE_IDX,ACT_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x0c 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x0c 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0f4+0xc0018c00)++0x03
|
|
line.long 0x00 "T_IDX_BYTE_IDX,Read or writes T_IDX and BYTE_IDX register"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x074+0xc0018c00)++0x03
|
|
line.long 0x00 "T_IDX,Index register for S_TRANSFER or D_TRANSFER"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
group asd:(0x078+0xc0018c00)++0x03
|
|
line.long 0x00 "IND_FUTURE_COUNT_SIGNAL,Indirect Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x07c+0xc0018c00)++0x03
|
|
line.long 0x00 "ACT_FUTURE_COUNT_SIGNAL,Active Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x080+0xc0018c00)++0x03
|
|
line.long 0x00 "NN_PUT,Put Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to write"
|
|
group asd:(0x084+0xc0018c00)++0x03
|
|
line.long 0x00 "NN_GET,Get Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to read"
|
|
group asd:(0x0c0+0xc0018c00)++0x07
|
|
line.long 0x00 "TIMESTAMP_LOW,Timestamp[31:0]"
|
|
line.long 0x04 "TIMESTAMP_HIGH,Timestamp[63:32]"
|
|
group asd:(0x100+0xc0018c00)++0x03
|
|
line.long 0x00 "NEXT_NEIGHBOR_SIGNAL,Signal a Context in the Next Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x104+0xc0018c00)++0x03
|
|
line.long 0x00 "PREV_NEIGHBOR_SIGNAL,Signal a Context in the Previous Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x108+0xc0018c00)++0x03
|
|
line.long 0x00 "SAME_ME_SIGNAL,Signal another Context in the same Microengine"
|
|
bitfld.long 0x00 7. "NEXT_CTX ,Controls" "use CTX field,next CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the same Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the same Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x140+0xc0018c00)++0x03
|
|
line.long 0x00 "CRC_REMAINDER,Input Operand and result of CRC instruction"
|
|
group asd:(0x144+0xc0018c00)++0x03
|
|
line.long 0x00 "PROFILE_COUNT,Profile Count"
|
|
hexmask.long 0x00 0.--15. 0x01 "PROFILE_COUNT ,Count advances by one every cycle"
|
|
group asd:(0x148+0xc0018c00)++0x03
|
|
line.long 0x00 "PSEUDO_RANDOM_NUMBER,Pseudo Random Number"
|
|
;group asd:(0x180+%1)++0x03
|
|
hide.long 0x38 "LOCAL_CSR_STATUS,LOCAL_CSR_STATUS"
|
|
in
|
|
; bitfld.long 0x0 0. " STATUS ,Local CSR Status" "no acc,acc"
|
|
group asd:(0x3fc+0xc0018c00)++0x03
|
|
line.long 0x00 "RESERVED,This address can always be used and no register will be written"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-me.ph
|
|
;begin include file xscale/ixp2400-me.ph
|
|
;parameters: 0xc0019000 0_4
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400
|
|
; State: ok
|
|
;
|
|
; IXP2400-ME %1 %2
|
|
;
|
|
; %1 address offset (0x100 * %2)
|
|
; %2 ME number (0..15)
|
|
; --------------------------------------------------------------------------------
|
|
tree "ME_0_4"
|
|
; --------------------------------------------------------------------------------
|
|
width 24.
|
|
group asd:(0x000+0xc0019000)++0x03
|
|
line.long 0x00 "USTORE_ADDRESS,USTORE_ADDRESS"
|
|
bitfld.long 0x00 31. "ECS ,Execution" "norm,rd/wr"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADR ,Contains the address of the Control Store location"
|
|
group asd:(0x004+0xc0019000)++0x03
|
|
line.long 0x00 "USTORE_DATA_LOWER,Control Store Data Bits [31..0]"
|
|
group asd:(0x008+0xc0019000)++0x03
|
|
line.long 0x00 "USTORE_DATA_UPPER,Upper Control Store Data Bits"
|
|
bitfld.long 0x00 9.--9. "PAR[39:20] ,Contains odd Parity for data bits [39:20]" "0,1"
|
|
bitfld.long 0x00 8.--8. " PAR[19:0] ,Contains odd Parity for data bits [19:0]" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " UDATA_UPPER ,Control Store Data Bits [39..32]"
|
|
group asd:(0x00c+0xc0019000)++0x03
|
|
line.long 0x00 "USTORE_ERROR_STATUS,Information about parity error during instruction reads"
|
|
bitfld.long 0x00 16.--18. "CTX ,Context that was executed when parity error occurred" "0,1,2,3,4,5,6,7"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADDR ,Adress that had the Parity Error"
|
|
group asd:(0x010+0xc0019000)++0x03
|
|
line.long 0x00 "ALU_OUT,ALU Output"
|
|
group asd:(0x014+0xc0019000)++0x03
|
|
line.long 0x00 "CTX_ARB_CNTL,Context Arbiter Control Register"
|
|
bitfld.long 0x00 4.--6. "PCTX ,Previous Context" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " NCTX ,Next Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x018+0xc0019000)++0x03
|
|
line.long 0x00 "CTX_ENABLES,Context Enable Register"
|
|
bitfld.long 0x00 31. "IN_USE_CTX ,in-use contexts" "0-7,0/2/4/6"
|
|
bitfld.long 0x00 30. " PRN Mode ,Operation of Pseudo Random Number Update" "load/read,every cycle"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CTL_STR_PAR_ER ,Parity error detected" "no,yes"
|
|
bitfld.long 0x00 28. " CTL_STR_PAR_EN ,Enables parity checking on Control Store" "dis,ena"
|
|
bitfld.long 0x00 27. " BREAKPOINT ,Breakpoint instruction was executed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NN_MODE ,Controls how the Next Neighbor Registers are written" "prev ME,this ME"
|
|
bitfld.long 0x00 18.--19. " NN_RING_EMPTY ,Controls Threshold when NN_EMPTY asserts" "0 entries,1 entry,2 entries,3 entries"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LM_ADDR_1_GLOB ,Control usage of LM_ADDR_1" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LM_ADDR_0_GLOB ,Control usage of LM_ADDR_0" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CTX_EN7 ,Context 7 Enable" "dis,ena"
|
|
bitfld.long 0x00 14. " CTX_EN6 ,Context 6 Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " CTX_EN5 ,Context 5 Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " CTX_EN4 ,Context 4 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTX_EN3 ,Context 3 Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " CTX_EN2 ,Context 2 Enable" "dis,ena"
|
|
bitfld.long 0x00 9. " CTX_EN1 ,Context 1 Enable" "dis,ena"
|
|
bitfld.long 0x00 8. " CTX_EN0 ,Context 0 Enable" "dis,ena"
|
|
group asd:(0x01c+0xc0019000)++0x03
|
|
line.long 0x00 "CC_ENABLE,CC_ENABLE"
|
|
bitfld.long 0x00 13. "CCCE ,Current Condition Code Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--2. " PMU CTX Monitor ,Number of the context to be monitored" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x020+0xc0019000)++0x03
|
|
line.long 0x00 "CSR_CTX_POINTER,Pointer to select which Cobntexts' registers is read"
|
|
bitfld.long 0x00 0.--2. "CTX ,Selects which contexts local CSR is accessed" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x040+0xc0019000)++0x03
|
|
line.long 0x00 "IND_CTX_STS,Indirect Context Status Register"
|
|
bitfld.long 0x00 16. "RR ,Ready to Run" "no,yes"
|
|
hexmask.long 0x00 0.--12. 0x01 " CTX_PC ,Program Counter"
|
|
group asd:(0x044+0xc0019000)++0x03
|
|
line.long 0x00 "ACT_CTX_STS,Active Context Status Register"
|
|
bitfld.long 0x00 31. "AB0 ,Microengine has a Context in executing state" "no,yes"
|
|
hexmask.long 0x00 8.--20. 0x01 " ACTXPC ,PC of Execution Context"
|
|
bitfld.long 0x00 3.--7. " ME_NO ,Number of Microengine" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 0.--2. " ACNO ,Number of Executing Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x048+0xc0019000)++0x03
|
|
line.long 0x00 "IND_CTX_SIG_EVENTS,Indirect Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x04c+0xc0019000)++0x03
|
|
line.long 0x00 "ACT_CTX_SIG_EVENTS,Active Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x050+0xc0019000)++0x03
|
|
line.long 0x00 "IND_CTX_WAKEUP_EVENTS,Indirect Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x054+0xc0019000)++0x03
|
|
line.long 0x00 "ACT_CTX_WAKEUP_EVENTS,Active Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x058+0xc0019000)++0x03
|
|
line.long 0x00 "IND_CTX_FUTURE_COUNT,Indirect Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x05c+0xc0019000)++0x03
|
|
line.long 0x00 "ACT_CTX_FUTURE_COUNT,Active Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x060+0xc0019000)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0,LM_ADDR_0 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x00 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x04 "ACT_LM_ADDR_0,Access working copy LM_ADDR_0"
|
|
hexmask.long 0x04 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x08 "IND_LM_ADDR_1,LM_ADDR_1 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x08 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x0c "ACT_LM_ADDR_1,Access working copy LM_ADDR_1"
|
|
hexmask.long 0x0c 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
group asd:(0x070+0xc0019000)++0x03
|
|
line.long 0x00 "BYTE_IDX,Controls the byte shift amount during Byte_Align instructions"
|
|
bitfld.long 0x00 0.--1. "BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0e0+0xc0019000)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0_BYTE_IDX,Read or writes IND_LM_ADDR_0 and BYTE_IDX"
|
|
hexmask.long 0x00 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x04 "ACT_LM_ADDR_0_BYTE_IDX,ACT_LM_ADDR_0_BYTE_IDX"
|
|
hexmask.long 0x04 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x04 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x08 "IND_LM_ADDR_1_BYTE_IDX,IND_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x08 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x08 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x0c "ACT_LM_ADDR_1_BYTE_IDX,ACT_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x0c 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x0c 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0f4+0xc0019000)++0x03
|
|
line.long 0x00 "T_IDX_BYTE_IDX,Read or writes T_IDX and BYTE_IDX register"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x074+0xc0019000)++0x03
|
|
line.long 0x00 "T_IDX,Index register for S_TRANSFER or D_TRANSFER"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
group asd:(0x078+0xc0019000)++0x03
|
|
line.long 0x00 "IND_FUTURE_COUNT_SIGNAL,Indirect Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x07c+0xc0019000)++0x03
|
|
line.long 0x00 "ACT_FUTURE_COUNT_SIGNAL,Active Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x080+0xc0019000)++0x03
|
|
line.long 0x00 "NN_PUT,Put Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to write"
|
|
group asd:(0x084+0xc0019000)++0x03
|
|
line.long 0x00 "NN_GET,Get Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to read"
|
|
group asd:(0x0c0+0xc0019000)++0x07
|
|
line.long 0x00 "TIMESTAMP_LOW,Timestamp[31:0]"
|
|
line.long 0x04 "TIMESTAMP_HIGH,Timestamp[63:32]"
|
|
group asd:(0x100+0xc0019000)++0x03
|
|
line.long 0x00 "NEXT_NEIGHBOR_SIGNAL,Signal a Context in the Next Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x104+0xc0019000)++0x03
|
|
line.long 0x00 "PREV_NEIGHBOR_SIGNAL,Signal a Context in the Previous Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x108+0xc0019000)++0x03
|
|
line.long 0x00 "SAME_ME_SIGNAL,Signal another Context in the same Microengine"
|
|
bitfld.long 0x00 7. "NEXT_CTX ,Controls" "use CTX field,next CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the same Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the same Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x140+0xc0019000)++0x03
|
|
line.long 0x00 "CRC_REMAINDER,Input Operand and result of CRC instruction"
|
|
group asd:(0x144+0xc0019000)++0x03
|
|
line.long 0x00 "PROFILE_COUNT,Profile Count"
|
|
hexmask.long 0x00 0.--15. 0x01 "PROFILE_COUNT ,Count advances by one every cycle"
|
|
group asd:(0x148+0xc0019000)++0x03
|
|
line.long 0x00 "PSEUDO_RANDOM_NUMBER,Pseudo Random Number"
|
|
;group asd:(0x180+%1)++0x03
|
|
hide.long 0x38 "LOCAL_CSR_STATUS,LOCAL_CSR_STATUS"
|
|
in
|
|
; bitfld.long 0x0 0. " STATUS ,Local CSR Status" "no acc,acc"
|
|
group asd:(0x3fc+0xc0019000)++0x03
|
|
line.long 0x00 "RESERVED,This address can always be used and no register will be written"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-me.ph
|
|
;begin include file xscale/ixp2400-me.ph
|
|
;parameters: 0xc0019400 0_5
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400
|
|
; State: ok
|
|
;
|
|
; IXP2400-ME %1 %2
|
|
;
|
|
; %1 address offset (0x100 * %2)
|
|
; %2 ME number (0..15)
|
|
; --------------------------------------------------------------------------------
|
|
tree "ME_0_5"
|
|
; --------------------------------------------------------------------------------
|
|
width 24.
|
|
group asd:(0x000+0xc0019400)++0x03
|
|
line.long 0x00 "USTORE_ADDRESS,USTORE_ADDRESS"
|
|
bitfld.long 0x00 31. "ECS ,Execution" "norm,rd/wr"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADR ,Contains the address of the Control Store location"
|
|
group asd:(0x004+0xc0019400)++0x03
|
|
line.long 0x00 "USTORE_DATA_LOWER,Control Store Data Bits [31..0]"
|
|
group asd:(0x008+0xc0019400)++0x03
|
|
line.long 0x00 "USTORE_DATA_UPPER,Upper Control Store Data Bits"
|
|
bitfld.long 0x00 9.--9. "PAR[39:20] ,Contains odd Parity for data bits [39:20]" "0,1"
|
|
bitfld.long 0x00 8.--8. " PAR[19:0] ,Contains odd Parity for data bits [19:0]" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " UDATA_UPPER ,Control Store Data Bits [39..32]"
|
|
group asd:(0x00c+0xc0019400)++0x03
|
|
line.long 0x00 "USTORE_ERROR_STATUS,Information about parity error during instruction reads"
|
|
bitfld.long 0x00 16.--18. "CTX ,Context that was executed when parity error occurred" "0,1,2,3,4,5,6,7"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADDR ,Adress that had the Parity Error"
|
|
group asd:(0x010+0xc0019400)++0x03
|
|
line.long 0x00 "ALU_OUT,ALU Output"
|
|
group asd:(0x014+0xc0019400)++0x03
|
|
line.long 0x00 "CTX_ARB_CNTL,Context Arbiter Control Register"
|
|
bitfld.long 0x00 4.--6. "PCTX ,Previous Context" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " NCTX ,Next Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x018+0xc0019400)++0x03
|
|
line.long 0x00 "CTX_ENABLES,Context Enable Register"
|
|
bitfld.long 0x00 31. "IN_USE_CTX ,in-use contexts" "0-7,0/2/4/6"
|
|
bitfld.long 0x00 30. " PRN Mode ,Operation of Pseudo Random Number Update" "load/read,every cycle"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CTL_STR_PAR_ER ,Parity error detected" "no,yes"
|
|
bitfld.long 0x00 28. " CTL_STR_PAR_EN ,Enables parity checking on Control Store" "dis,ena"
|
|
bitfld.long 0x00 27. " BREAKPOINT ,Breakpoint instruction was executed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NN_MODE ,Controls how the Next Neighbor Registers are written" "prev ME,this ME"
|
|
bitfld.long 0x00 18.--19. " NN_RING_EMPTY ,Controls Threshold when NN_EMPTY asserts" "0 entries,1 entry,2 entries,3 entries"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LM_ADDR_1_GLOB ,Control usage of LM_ADDR_1" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LM_ADDR_0_GLOB ,Control usage of LM_ADDR_0" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CTX_EN7 ,Context 7 Enable" "dis,ena"
|
|
bitfld.long 0x00 14. " CTX_EN6 ,Context 6 Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " CTX_EN5 ,Context 5 Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " CTX_EN4 ,Context 4 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTX_EN3 ,Context 3 Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " CTX_EN2 ,Context 2 Enable" "dis,ena"
|
|
bitfld.long 0x00 9. " CTX_EN1 ,Context 1 Enable" "dis,ena"
|
|
bitfld.long 0x00 8. " CTX_EN0 ,Context 0 Enable" "dis,ena"
|
|
group asd:(0x01c+0xc0019400)++0x03
|
|
line.long 0x00 "CC_ENABLE,CC_ENABLE"
|
|
bitfld.long 0x00 13. "CCCE ,Current Condition Code Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--2. " PMU CTX Monitor ,Number of the context to be monitored" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x020+0xc0019400)++0x03
|
|
line.long 0x00 "CSR_CTX_POINTER,Pointer to select which Cobntexts' registers is read"
|
|
bitfld.long 0x00 0.--2. "CTX ,Selects which contexts local CSR is accessed" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x040+0xc0019400)++0x03
|
|
line.long 0x00 "IND_CTX_STS,Indirect Context Status Register"
|
|
bitfld.long 0x00 16. "RR ,Ready to Run" "no,yes"
|
|
hexmask.long 0x00 0.--12. 0x01 " CTX_PC ,Program Counter"
|
|
group asd:(0x044+0xc0019400)++0x03
|
|
line.long 0x00 "ACT_CTX_STS,Active Context Status Register"
|
|
bitfld.long 0x00 31. "AB0 ,Microengine has a Context in executing state" "no,yes"
|
|
hexmask.long 0x00 8.--20. 0x01 " ACTXPC ,PC of Execution Context"
|
|
bitfld.long 0x00 3.--7. " ME_NO ,Number of Microengine" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 0.--2. " ACNO ,Number of Executing Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x048+0xc0019400)++0x03
|
|
line.long 0x00 "IND_CTX_SIG_EVENTS,Indirect Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x04c+0xc0019400)++0x03
|
|
line.long 0x00 "ACT_CTX_SIG_EVENTS,Active Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x050+0xc0019400)++0x03
|
|
line.long 0x00 "IND_CTX_WAKEUP_EVENTS,Indirect Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x054+0xc0019400)++0x03
|
|
line.long 0x00 "ACT_CTX_WAKEUP_EVENTS,Active Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x058+0xc0019400)++0x03
|
|
line.long 0x00 "IND_CTX_FUTURE_COUNT,Indirect Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x05c+0xc0019400)++0x03
|
|
line.long 0x00 "ACT_CTX_FUTURE_COUNT,Active Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x060+0xc0019400)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0,LM_ADDR_0 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x00 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x04 "ACT_LM_ADDR_0,Access working copy LM_ADDR_0"
|
|
hexmask.long 0x04 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x08 "IND_LM_ADDR_1,LM_ADDR_1 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x08 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x0c "ACT_LM_ADDR_1,Access working copy LM_ADDR_1"
|
|
hexmask.long 0x0c 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
group asd:(0x070+0xc0019400)++0x03
|
|
line.long 0x00 "BYTE_IDX,Controls the byte shift amount during Byte_Align instructions"
|
|
bitfld.long 0x00 0.--1. "BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0e0+0xc0019400)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0_BYTE_IDX,Read or writes IND_LM_ADDR_0 and BYTE_IDX"
|
|
hexmask.long 0x00 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x04 "ACT_LM_ADDR_0_BYTE_IDX,ACT_LM_ADDR_0_BYTE_IDX"
|
|
hexmask.long 0x04 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x04 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x08 "IND_LM_ADDR_1_BYTE_IDX,IND_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x08 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x08 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x0c "ACT_LM_ADDR_1_BYTE_IDX,ACT_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x0c 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x0c 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0f4+0xc0019400)++0x03
|
|
line.long 0x00 "T_IDX_BYTE_IDX,Read or writes T_IDX and BYTE_IDX register"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x074+0xc0019400)++0x03
|
|
line.long 0x00 "T_IDX,Index register for S_TRANSFER or D_TRANSFER"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
group asd:(0x078+0xc0019400)++0x03
|
|
line.long 0x00 "IND_FUTURE_COUNT_SIGNAL,Indirect Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x07c+0xc0019400)++0x03
|
|
line.long 0x00 "ACT_FUTURE_COUNT_SIGNAL,Active Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x080+0xc0019400)++0x03
|
|
line.long 0x00 "NN_PUT,Put Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to write"
|
|
group asd:(0x084+0xc0019400)++0x03
|
|
line.long 0x00 "NN_GET,Get Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to read"
|
|
group asd:(0x0c0+0xc0019400)++0x07
|
|
line.long 0x00 "TIMESTAMP_LOW,Timestamp[31:0]"
|
|
line.long 0x04 "TIMESTAMP_HIGH,Timestamp[63:32]"
|
|
group asd:(0x100+0xc0019400)++0x03
|
|
line.long 0x00 "NEXT_NEIGHBOR_SIGNAL,Signal a Context in the Next Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x104+0xc0019400)++0x03
|
|
line.long 0x00 "PREV_NEIGHBOR_SIGNAL,Signal a Context in the Previous Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x108+0xc0019400)++0x03
|
|
line.long 0x00 "SAME_ME_SIGNAL,Signal another Context in the same Microengine"
|
|
bitfld.long 0x00 7. "NEXT_CTX ,Controls" "use CTX field,next CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the same Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the same Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x140+0xc0019400)++0x03
|
|
line.long 0x00 "CRC_REMAINDER,Input Operand and result of CRC instruction"
|
|
group asd:(0x144+0xc0019400)++0x03
|
|
line.long 0x00 "PROFILE_COUNT,Profile Count"
|
|
hexmask.long 0x00 0.--15. 0x01 "PROFILE_COUNT ,Count advances by one every cycle"
|
|
group asd:(0x148+0xc0019400)++0x03
|
|
line.long 0x00 "PSEUDO_RANDOM_NUMBER,Pseudo Random Number"
|
|
;group asd:(0x180+%1)++0x03
|
|
hide.long 0x38 "LOCAL_CSR_STATUS,LOCAL_CSR_STATUS"
|
|
in
|
|
; bitfld.long 0x0 0. " STATUS ,Local CSR Status" "no acc,acc"
|
|
group asd:(0x3fc+0xc0019400)++0x03
|
|
line.long 0x00 "RESERVED,This address can always be used and no register will be written"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-me.ph
|
|
;begin include file xscale/ixp2400-me.ph
|
|
;parameters: 0xc0019800 0_6
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400
|
|
; State: ok
|
|
;
|
|
; IXP2400-ME %1 %2
|
|
;
|
|
; %1 address offset (0x100 * %2)
|
|
; %2 ME number (0..15)
|
|
; --------------------------------------------------------------------------------
|
|
tree "ME_0_6"
|
|
; --------------------------------------------------------------------------------
|
|
width 24.
|
|
group asd:(0x000+0xc0019800)++0x03
|
|
line.long 0x00 "USTORE_ADDRESS,USTORE_ADDRESS"
|
|
bitfld.long 0x00 31. "ECS ,Execution" "norm,rd/wr"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADR ,Contains the address of the Control Store location"
|
|
group asd:(0x004+0xc0019800)++0x03
|
|
line.long 0x00 "USTORE_DATA_LOWER,Control Store Data Bits [31..0]"
|
|
group asd:(0x008+0xc0019800)++0x03
|
|
line.long 0x00 "USTORE_DATA_UPPER,Upper Control Store Data Bits"
|
|
bitfld.long 0x00 9.--9. "PAR[39:20] ,Contains odd Parity for data bits [39:20]" "0,1"
|
|
bitfld.long 0x00 8.--8. " PAR[19:0] ,Contains odd Parity for data bits [19:0]" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " UDATA_UPPER ,Control Store Data Bits [39..32]"
|
|
group asd:(0x00c+0xc0019800)++0x03
|
|
line.long 0x00 "USTORE_ERROR_STATUS,Information about parity error during instruction reads"
|
|
bitfld.long 0x00 16.--18. "CTX ,Context that was executed when parity error occurred" "0,1,2,3,4,5,6,7"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADDR ,Adress that had the Parity Error"
|
|
group asd:(0x010+0xc0019800)++0x03
|
|
line.long 0x00 "ALU_OUT,ALU Output"
|
|
group asd:(0x014+0xc0019800)++0x03
|
|
line.long 0x00 "CTX_ARB_CNTL,Context Arbiter Control Register"
|
|
bitfld.long 0x00 4.--6. "PCTX ,Previous Context" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " NCTX ,Next Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x018+0xc0019800)++0x03
|
|
line.long 0x00 "CTX_ENABLES,Context Enable Register"
|
|
bitfld.long 0x00 31. "IN_USE_CTX ,in-use contexts" "0-7,0/2/4/6"
|
|
bitfld.long 0x00 30. " PRN Mode ,Operation of Pseudo Random Number Update" "load/read,every cycle"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CTL_STR_PAR_ER ,Parity error detected" "no,yes"
|
|
bitfld.long 0x00 28. " CTL_STR_PAR_EN ,Enables parity checking on Control Store" "dis,ena"
|
|
bitfld.long 0x00 27. " BREAKPOINT ,Breakpoint instruction was executed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NN_MODE ,Controls how the Next Neighbor Registers are written" "prev ME,this ME"
|
|
bitfld.long 0x00 18.--19. " NN_RING_EMPTY ,Controls Threshold when NN_EMPTY asserts" "0 entries,1 entry,2 entries,3 entries"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LM_ADDR_1_GLOB ,Control usage of LM_ADDR_1" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LM_ADDR_0_GLOB ,Control usage of LM_ADDR_0" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CTX_EN7 ,Context 7 Enable" "dis,ena"
|
|
bitfld.long 0x00 14. " CTX_EN6 ,Context 6 Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " CTX_EN5 ,Context 5 Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " CTX_EN4 ,Context 4 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTX_EN3 ,Context 3 Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " CTX_EN2 ,Context 2 Enable" "dis,ena"
|
|
bitfld.long 0x00 9. " CTX_EN1 ,Context 1 Enable" "dis,ena"
|
|
bitfld.long 0x00 8. " CTX_EN0 ,Context 0 Enable" "dis,ena"
|
|
group asd:(0x01c+0xc0019800)++0x03
|
|
line.long 0x00 "CC_ENABLE,CC_ENABLE"
|
|
bitfld.long 0x00 13. "CCCE ,Current Condition Code Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--2. " PMU CTX Monitor ,Number of the context to be monitored" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x020+0xc0019800)++0x03
|
|
line.long 0x00 "CSR_CTX_POINTER,Pointer to select which Cobntexts' registers is read"
|
|
bitfld.long 0x00 0.--2. "CTX ,Selects which contexts local CSR is accessed" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x040+0xc0019800)++0x03
|
|
line.long 0x00 "IND_CTX_STS,Indirect Context Status Register"
|
|
bitfld.long 0x00 16. "RR ,Ready to Run" "no,yes"
|
|
hexmask.long 0x00 0.--12. 0x01 " CTX_PC ,Program Counter"
|
|
group asd:(0x044+0xc0019800)++0x03
|
|
line.long 0x00 "ACT_CTX_STS,Active Context Status Register"
|
|
bitfld.long 0x00 31. "AB0 ,Microengine has a Context in executing state" "no,yes"
|
|
hexmask.long 0x00 8.--20. 0x01 " ACTXPC ,PC of Execution Context"
|
|
bitfld.long 0x00 3.--7. " ME_NO ,Number of Microengine" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 0.--2. " ACNO ,Number of Executing Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x048+0xc0019800)++0x03
|
|
line.long 0x00 "IND_CTX_SIG_EVENTS,Indirect Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x04c+0xc0019800)++0x03
|
|
line.long 0x00 "ACT_CTX_SIG_EVENTS,Active Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x050+0xc0019800)++0x03
|
|
line.long 0x00 "IND_CTX_WAKEUP_EVENTS,Indirect Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x054+0xc0019800)++0x03
|
|
line.long 0x00 "ACT_CTX_WAKEUP_EVENTS,Active Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x058+0xc0019800)++0x03
|
|
line.long 0x00 "IND_CTX_FUTURE_COUNT,Indirect Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x05c+0xc0019800)++0x03
|
|
line.long 0x00 "ACT_CTX_FUTURE_COUNT,Active Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x060+0xc0019800)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0,LM_ADDR_0 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x00 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x04 "ACT_LM_ADDR_0,Access working copy LM_ADDR_0"
|
|
hexmask.long 0x04 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x08 "IND_LM_ADDR_1,LM_ADDR_1 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x08 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x0c "ACT_LM_ADDR_1,Access working copy LM_ADDR_1"
|
|
hexmask.long 0x0c 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
group asd:(0x070+0xc0019800)++0x03
|
|
line.long 0x00 "BYTE_IDX,Controls the byte shift amount during Byte_Align instructions"
|
|
bitfld.long 0x00 0.--1. "BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0e0+0xc0019800)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0_BYTE_IDX,Read or writes IND_LM_ADDR_0 and BYTE_IDX"
|
|
hexmask.long 0x00 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x04 "ACT_LM_ADDR_0_BYTE_IDX,ACT_LM_ADDR_0_BYTE_IDX"
|
|
hexmask.long 0x04 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x04 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x08 "IND_LM_ADDR_1_BYTE_IDX,IND_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x08 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x08 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x0c "ACT_LM_ADDR_1_BYTE_IDX,ACT_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x0c 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x0c 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0f4+0xc0019800)++0x03
|
|
line.long 0x00 "T_IDX_BYTE_IDX,Read or writes T_IDX and BYTE_IDX register"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x074+0xc0019800)++0x03
|
|
line.long 0x00 "T_IDX,Index register for S_TRANSFER or D_TRANSFER"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
group asd:(0x078+0xc0019800)++0x03
|
|
line.long 0x00 "IND_FUTURE_COUNT_SIGNAL,Indirect Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x07c+0xc0019800)++0x03
|
|
line.long 0x00 "ACT_FUTURE_COUNT_SIGNAL,Active Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x080+0xc0019800)++0x03
|
|
line.long 0x00 "NN_PUT,Put Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to write"
|
|
group asd:(0x084+0xc0019800)++0x03
|
|
line.long 0x00 "NN_GET,Get Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to read"
|
|
group asd:(0x0c0+0xc0019800)++0x07
|
|
line.long 0x00 "TIMESTAMP_LOW,Timestamp[31:0]"
|
|
line.long 0x04 "TIMESTAMP_HIGH,Timestamp[63:32]"
|
|
group asd:(0x100+0xc0019800)++0x03
|
|
line.long 0x00 "NEXT_NEIGHBOR_SIGNAL,Signal a Context in the Next Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x104+0xc0019800)++0x03
|
|
line.long 0x00 "PREV_NEIGHBOR_SIGNAL,Signal a Context in the Previous Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x108+0xc0019800)++0x03
|
|
line.long 0x00 "SAME_ME_SIGNAL,Signal another Context in the same Microengine"
|
|
bitfld.long 0x00 7. "NEXT_CTX ,Controls" "use CTX field,next CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the same Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the same Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x140+0xc0019800)++0x03
|
|
line.long 0x00 "CRC_REMAINDER,Input Operand and result of CRC instruction"
|
|
group asd:(0x144+0xc0019800)++0x03
|
|
line.long 0x00 "PROFILE_COUNT,Profile Count"
|
|
hexmask.long 0x00 0.--15. 0x01 "PROFILE_COUNT ,Count advances by one every cycle"
|
|
group asd:(0x148+0xc0019800)++0x03
|
|
line.long 0x00 "PSEUDO_RANDOM_NUMBER,Pseudo Random Number"
|
|
;group asd:(0x180+%1)++0x03
|
|
hide.long 0x38 "LOCAL_CSR_STATUS,LOCAL_CSR_STATUS"
|
|
in
|
|
; bitfld.long 0x0 0. " STATUS ,Local CSR Status" "no acc,acc"
|
|
group asd:(0x3fc+0xc0019800)++0x03
|
|
line.long 0x00 "RESERVED,This address can always be used and no register will be written"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-me.ph
|
|
;begin include file xscale/ixp2400-me.ph
|
|
;parameters: 0xc0019c00 0_7
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400
|
|
; State: ok
|
|
;
|
|
; IXP2400-ME %1 %2
|
|
;
|
|
; %1 address offset (0x100 * %2)
|
|
; %2 ME number (0..15)
|
|
; --------------------------------------------------------------------------------
|
|
tree "ME_0_7"
|
|
; --------------------------------------------------------------------------------
|
|
width 24.
|
|
group asd:(0x000+0xc0019c00)++0x03
|
|
line.long 0x00 "USTORE_ADDRESS,USTORE_ADDRESS"
|
|
bitfld.long 0x00 31. "ECS ,Execution" "norm,rd/wr"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADR ,Contains the address of the Control Store location"
|
|
group asd:(0x004+0xc0019c00)++0x03
|
|
line.long 0x00 "USTORE_DATA_LOWER,Control Store Data Bits [31..0]"
|
|
group asd:(0x008+0xc0019c00)++0x03
|
|
line.long 0x00 "USTORE_DATA_UPPER,Upper Control Store Data Bits"
|
|
bitfld.long 0x00 9.--9. "PAR[39:20] ,Contains odd Parity for data bits [39:20]" "0,1"
|
|
bitfld.long 0x00 8.--8. " PAR[19:0] ,Contains odd Parity for data bits [19:0]" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " UDATA_UPPER ,Control Store Data Bits [39..32]"
|
|
group asd:(0x00c+0xc0019c00)++0x03
|
|
line.long 0x00 "USTORE_ERROR_STATUS,Information about parity error during instruction reads"
|
|
bitfld.long 0x00 16.--18. "CTX ,Context that was executed when parity error occurred" "0,1,2,3,4,5,6,7"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADDR ,Adress that had the Parity Error"
|
|
group asd:(0x010+0xc0019c00)++0x03
|
|
line.long 0x00 "ALU_OUT,ALU Output"
|
|
group asd:(0x014+0xc0019c00)++0x03
|
|
line.long 0x00 "CTX_ARB_CNTL,Context Arbiter Control Register"
|
|
bitfld.long 0x00 4.--6. "PCTX ,Previous Context" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " NCTX ,Next Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x018+0xc0019c00)++0x03
|
|
line.long 0x00 "CTX_ENABLES,Context Enable Register"
|
|
bitfld.long 0x00 31. "IN_USE_CTX ,in-use contexts" "0-7,0/2/4/6"
|
|
bitfld.long 0x00 30. " PRN Mode ,Operation of Pseudo Random Number Update" "load/read,every cycle"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CTL_STR_PAR_ER ,Parity error detected" "no,yes"
|
|
bitfld.long 0x00 28. " CTL_STR_PAR_EN ,Enables parity checking on Control Store" "dis,ena"
|
|
bitfld.long 0x00 27. " BREAKPOINT ,Breakpoint instruction was executed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NN_MODE ,Controls how the Next Neighbor Registers are written" "prev ME,this ME"
|
|
bitfld.long 0x00 18.--19. " NN_RING_EMPTY ,Controls Threshold when NN_EMPTY asserts" "0 entries,1 entry,2 entries,3 entries"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LM_ADDR_1_GLOB ,Control usage of LM_ADDR_1" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LM_ADDR_0_GLOB ,Control usage of LM_ADDR_0" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CTX_EN7 ,Context 7 Enable" "dis,ena"
|
|
bitfld.long 0x00 14. " CTX_EN6 ,Context 6 Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " CTX_EN5 ,Context 5 Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " CTX_EN4 ,Context 4 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTX_EN3 ,Context 3 Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " CTX_EN2 ,Context 2 Enable" "dis,ena"
|
|
bitfld.long 0x00 9. " CTX_EN1 ,Context 1 Enable" "dis,ena"
|
|
bitfld.long 0x00 8. " CTX_EN0 ,Context 0 Enable" "dis,ena"
|
|
group asd:(0x01c+0xc0019c00)++0x03
|
|
line.long 0x00 "CC_ENABLE,CC_ENABLE"
|
|
bitfld.long 0x00 13. "CCCE ,Current Condition Code Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--2. " PMU CTX Monitor ,Number of the context to be monitored" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x020+0xc0019c00)++0x03
|
|
line.long 0x00 "CSR_CTX_POINTER,Pointer to select which Cobntexts' registers is read"
|
|
bitfld.long 0x00 0.--2. "CTX ,Selects which contexts local CSR is accessed" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x040+0xc0019c00)++0x03
|
|
line.long 0x00 "IND_CTX_STS,Indirect Context Status Register"
|
|
bitfld.long 0x00 16. "RR ,Ready to Run" "no,yes"
|
|
hexmask.long 0x00 0.--12. 0x01 " CTX_PC ,Program Counter"
|
|
group asd:(0x044+0xc0019c00)++0x03
|
|
line.long 0x00 "ACT_CTX_STS,Active Context Status Register"
|
|
bitfld.long 0x00 31. "AB0 ,Microengine has a Context in executing state" "no,yes"
|
|
hexmask.long 0x00 8.--20. 0x01 " ACTXPC ,PC of Execution Context"
|
|
bitfld.long 0x00 3.--7. " ME_NO ,Number of Microengine" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 0.--2. " ACNO ,Number of Executing Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x048+0xc0019c00)++0x03
|
|
line.long 0x00 "IND_CTX_SIG_EVENTS,Indirect Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x04c+0xc0019c00)++0x03
|
|
line.long 0x00 "ACT_CTX_SIG_EVENTS,Active Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x050+0xc0019c00)++0x03
|
|
line.long 0x00 "IND_CTX_WAKEUP_EVENTS,Indirect Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x054+0xc0019c00)++0x03
|
|
line.long 0x00 "ACT_CTX_WAKEUP_EVENTS,Active Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x058+0xc0019c00)++0x03
|
|
line.long 0x00 "IND_CTX_FUTURE_COUNT,Indirect Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x05c+0xc0019c00)++0x03
|
|
line.long 0x00 "ACT_CTX_FUTURE_COUNT,Active Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x060+0xc0019c00)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0,LM_ADDR_0 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x00 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x04 "ACT_LM_ADDR_0,Access working copy LM_ADDR_0"
|
|
hexmask.long 0x04 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x08 "IND_LM_ADDR_1,LM_ADDR_1 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x08 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x0c "ACT_LM_ADDR_1,Access working copy LM_ADDR_1"
|
|
hexmask.long 0x0c 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
group asd:(0x070+0xc0019c00)++0x03
|
|
line.long 0x00 "BYTE_IDX,Controls the byte shift amount during Byte_Align instructions"
|
|
bitfld.long 0x00 0.--1. "BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0e0+0xc0019c00)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0_BYTE_IDX,Read or writes IND_LM_ADDR_0 and BYTE_IDX"
|
|
hexmask.long 0x00 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x04 "ACT_LM_ADDR_0_BYTE_IDX,ACT_LM_ADDR_0_BYTE_IDX"
|
|
hexmask.long 0x04 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x04 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x08 "IND_LM_ADDR_1_BYTE_IDX,IND_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x08 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x08 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x0c "ACT_LM_ADDR_1_BYTE_IDX,ACT_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x0c 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x0c 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0f4+0xc0019c00)++0x03
|
|
line.long 0x00 "T_IDX_BYTE_IDX,Read or writes T_IDX and BYTE_IDX register"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x074+0xc0019c00)++0x03
|
|
line.long 0x00 "T_IDX,Index register for S_TRANSFER or D_TRANSFER"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
group asd:(0x078+0xc0019c00)++0x03
|
|
line.long 0x00 "IND_FUTURE_COUNT_SIGNAL,Indirect Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x07c+0xc0019c00)++0x03
|
|
line.long 0x00 "ACT_FUTURE_COUNT_SIGNAL,Active Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x080+0xc0019c00)++0x03
|
|
line.long 0x00 "NN_PUT,Put Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to write"
|
|
group asd:(0x084+0xc0019c00)++0x03
|
|
line.long 0x00 "NN_GET,Get Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to read"
|
|
group asd:(0x0c0+0xc0019c00)++0x07
|
|
line.long 0x00 "TIMESTAMP_LOW,Timestamp[31:0]"
|
|
line.long 0x04 "TIMESTAMP_HIGH,Timestamp[63:32]"
|
|
group asd:(0x100+0xc0019c00)++0x03
|
|
line.long 0x00 "NEXT_NEIGHBOR_SIGNAL,Signal a Context in the Next Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x104+0xc0019c00)++0x03
|
|
line.long 0x00 "PREV_NEIGHBOR_SIGNAL,Signal a Context in the Previous Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x108+0xc0019c00)++0x03
|
|
line.long 0x00 "SAME_ME_SIGNAL,Signal another Context in the same Microengine"
|
|
bitfld.long 0x00 7. "NEXT_CTX ,Controls" "use CTX field,next CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the same Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the same Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x140+0xc0019c00)++0x03
|
|
line.long 0x00 "CRC_REMAINDER,Input Operand and result of CRC instruction"
|
|
group asd:(0x144+0xc0019c00)++0x03
|
|
line.long 0x00 "PROFILE_COUNT,Profile Count"
|
|
hexmask.long 0x00 0.--15. 0x01 "PROFILE_COUNT ,Count advances by one every cycle"
|
|
group asd:(0x148+0xc0019c00)++0x03
|
|
line.long 0x00 "PSEUDO_RANDOM_NUMBER,Pseudo Random Number"
|
|
;group asd:(0x180+%1)++0x03
|
|
hide.long 0x38 "LOCAL_CSR_STATUS,LOCAL_CSR_STATUS"
|
|
in
|
|
; bitfld.long 0x0 0. " STATUS ,Local CSR Status" "no acc,acc"
|
|
group asd:(0x3fc+0xc0019c00)++0x03
|
|
line.long 0x00 "RESERVED,This address can always be used and no register will be written"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-me.ph
|
|
;begin include file xscale/ixp2400-me.ph
|
|
;parameters: 0xc001c000 1_0
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400
|
|
; State: ok
|
|
;
|
|
; IXP2400-ME %1 %2
|
|
;
|
|
; %1 address offset (0x100 * %2)
|
|
; %2 ME number (0..15)
|
|
; --------------------------------------------------------------------------------
|
|
tree "ME_1_0"
|
|
; --------------------------------------------------------------------------------
|
|
width 24.
|
|
group asd:(0x000+0xc001c000)++0x03
|
|
line.long 0x00 "USTORE_ADDRESS,USTORE_ADDRESS"
|
|
bitfld.long 0x00 31. "ECS ,Execution" "norm,rd/wr"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADR ,Contains the address of the Control Store location"
|
|
group asd:(0x004+0xc001c000)++0x03
|
|
line.long 0x00 "USTORE_DATA_LOWER,Control Store Data Bits [31..0]"
|
|
group asd:(0x008+0xc001c000)++0x03
|
|
line.long 0x00 "USTORE_DATA_UPPER,Upper Control Store Data Bits"
|
|
bitfld.long 0x00 9.--9. "PAR[39:20] ,Contains odd Parity for data bits [39:20]" "0,1"
|
|
bitfld.long 0x00 8.--8. " PAR[19:0] ,Contains odd Parity for data bits [19:0]" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " UDATA_UPPER ,Control Store Data Bits [39..32]"
|
|
group asd:(0x00c+0xc001c000)++0x03
|
|
line.long 0x00 "USTORE_ERROR_STATUS,Information about parity error during instruction reads"
|
|
bitfld.long 0x00 16.--18. "CTX ,Context that was executed when parity error occurred" "0,1,2,3,4,5,6,7"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADDR ,Adress that had the Parity Error"
|
|
group asd:(0x010+0xc001c000)++0x03
|
|
line.long 0x00 "ALU_OUT,ALU Output"
|
|
group asd:(0x014+0xc001c000)++0x03
|
|
line.long 0x00 "CTX_ARB_CNTL,Context Arbiter Control Register"
|
|
bitfld.long 0x00 4.--6. "PCTX ,Previous Context" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " NCTX ,Next Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x018+0xc001c000)++0x03
|
|
line.long 0x00 "CTX_ENABLES,Context Enable Register"
|
|
bitfld.long 0x00 31. "IN_USE_CTX ,in-use contexts" "0-7,0/2/4/6"
|
|
bitfld.long 0x00 30. " PRN Mode ,Operation of Pseudo Random Number Update" "load/read,every cycle"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CTL_STR_PAR_ER ,Parity error detected" "no,yes"
|
|
bitfld.long 0x00 28. " CTL_STR_PAR_EN ,Enables parity checking on Control Store" "dis,ena"
|
|
bitfld.long 0x00 27. " BREAKPOINT ,Breakpoint instruction was executed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NN_MODE ,Controls how the Next Neighbor Registers are written" "prev ME,this ME"
|
|
bitfld.long 0x00 18.--19. " NN_RING_EMPTY ,Controls Threshold when NN_EMPTY asserts" "0 entries,1 entry,2 entries,3 entries"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LM_ADDR_1_GLOB ,Control usage of LM_ADDR_1" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LM_ADDR_0_GLOB ,Control usage of LM_ADDR_0" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CTX_EN7 ,Context 7 Enable" "dis,ena"
|
|
bitfld.long 0x00 14. " CTX_EN6 ,Context 6 Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " CTX_EN5 ,Context 5 Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " CTX_EN4 ,Context 4 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTX_EN3 ,Context 3 Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " CTX_EN2 ,Context 2 Enable" "dis,ena"
|
|
bitfld.long 0x00 9. " CTX_EN1 ,Context 1 Enable" "dis,ena"
|
|
bitfld.long 0x00 8. " CTX_EN0 ,Context 0 Enable" "dis,ena"
|
|
group asd:(0x01c+0xc001c000)++0x03
|
|
line.long 0x00 "CC_ENABLE,CC_ENABLE"
|
|
bitfld.long 0x00 13. "CCCE ,Current Condition Code Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--2. " PMU CTX Monitor ,Number of the context to be monitored" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x020+0xc001c000)++0x03
|
|
line.long 0x00 "CSR_CTX_POINTER,Pointer to select which Cobntexts' registers is read"
|
|
bitfld.long 0x00 0.--2. "CTX ,Selects which contexts local CSR is accessed" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x040+0xc001c000)++0x03
|
|
line.long 0x00 "IND_CTX_STS,Indirect Context Status Register"
|
|
bitfld.long 0x00 16. "RR ,Ready to Run" "no,yes"
|
|
hexmask.long 0x00 0.--12. 0x01 " CTX_PC ,Program Counter"
|
|
group asd:(0x044+0xc001c000)++0x03
|
|
line.long 0x00 "ACT_CTX_STS,Active Context Status Register"
|
|
bitfld.long 0x00 31. "AB0 ,Microengine has a Context in executing state" "no,yes"
|
|
hexmask.long 0x00 8.--20. 0x01 " ACTXPC ,PC of Execution Context"
|
|
bitfld.long 0x00 3.--7. " ME_NO ,Number of Microengine" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 0.--2. " ACNO ,Number of Executing Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x048+0xc001c000)++0x03
|
|
line.long 0x00 "IND_CTX_SIG_EVENTS,Indirect Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x04c+0xc001c000)++0x03
|
|
line.long 0x00 "ACT_CTX_SIG_EVENTS,Active Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x050+0xc001c000)++0x03
|
|
line.long 0x00 "IND_CTX_WAKEUP_EVENTS,Indirect Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x054+0xc001c000)++0x03
|
|
line.long 0x00 "ACT_CTX_WAKEUP_EVENTS,Active Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x058+0xc001c000)++0x03
|
|
line.long 0x00 "IND_CTX_FUTURE_COUNT,Indirect Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x05c+0xc001c000)++0x03
|
|
line.long 0x00 "ACT_CTX_FUTURE_COUNT,Active Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x060+0xc001c000)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0,LM_ADDR_0 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x00 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x04 "ACT_LM_ADDR_0,Access working copy LM_ADDR_0"
|
|
hexmask.long 0x04 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x08 "IND_LM_ADDR_1,LM_ADDR_1 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x08 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x0c "ACT_LM_ADDR_1,Access working copy LM_ADDR_1"
|
|
hexmask.long 0x0c 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
group asd:(0x070+0xc001c000)++0x03
|
|
line.long 0x00 "BYTE_IDX,Controls the byte shift amount during Byte_Align instructions"
|
|
bitfld.long 0x00 0.--1. "BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0e0+0xc001c000)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0_BYTE_IDX,Read or writes IND_LM_ADDR_0 and BYTE_IDX"
|
|
hexmask.long 0x00 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x04 "ACT_LM_ADDR_0_BYTE_IDX,ACT_LM_ADDR_0_BYTE_IDX"
|
|
hexmask.long 0x04 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x04 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x08 "IND_LM_ADDR_1_BYTE_IDX,IND_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x08 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x08 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x0c "ACT_LM_ADDR_1_BYTE_IDX,ACT_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x0c 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x0c 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0f4+0xc001c000)++0x03
|
|
line.long 0x00 "T_IDX_BYTE_IDX,Read or writes T_IDX and BYTE_IDX register"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x074+0xc001c000)++0x03
|
|
line.long 0x00 "T_IDX,Index register for S_TRANSFER or D_TRANSFER"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
group asd:(0x078+0xc001c000)++0x03
|
|
line.long 0x00 "IND_FUTURE_COUNT_SIGNAL,Indirect Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x07c+0xc001c000)++0x03
|
|
line.long 0x00 "ACT_FUTURE_COUNT_SIGNAL,Active Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x080+0xc001c000)++0x03
|
|
line.long 0x00 "NN_PUT,Put Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to write"
|
|
group asd:(0x084+0xc001c000)++0x03
|
|
line.long 0x00 "NN_GET,Get Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to read"
|
|
group asd:(0x0c0+0xc001c000)++0x07
|
|
line.long 0x00 "TIMESTAMP_LOW,Timestamp[31:0]"
|
|
line.long 0x04 "TIMESTAMP_HIGH,Timestamp[63:32]"
|
|
group asd:(0x100+0xc001c000)++0x03
|
|
line.long 0x00 "NEXT_NEIGHBOR_SIGNAL,Signal a Context in the Next Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x104+0xc001c000)++0x03
|
|
line.long 0x00 "PREV_NEIGHBOR_SIGNAL,Signal a Context in the Previous Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x108+0xc001c000)++0x03
|
|
line.long 0x00 "SAME_ME_SIGNAL,Signal another Context in the same Microengine"
|
|
bitfld.long 0x00 7. "NEXT_CTX ,Controls" "use CTX field,next CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the same Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the same Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x140+0xc001c000)++0x03
|
|
line.long 0x00 "CRC_REMAINDER,Input Operand and result of CRC instruction"
|
|
group asd:(0x144+0xc001c000)++0x03
|
|
line.long 0x00 "PROFILE_COUNT,Profile Count"
|
|
hexmask.long 0x00 0.--15. 0x01 "PROFILE_COUNT ,Count advances by one every cycle"
|
|
group asd:(0x148+0xc001c000)++0x03
|
|
line.long 0x00 "PSEUDO_RANDOM_NUMBER,Pseudo Random Number"
|
|
;group asd:(0x180+%1)++0x03
|
|
hide.long 0x38 "LOCAL_CSR_STATUS,LOCAL_CSR_STATUS"
|
|
in
|
|
; bitfld.long 0x0 0. " STATUS ,Local CSR Status" "no acc,acc"
|
|
group asd:(0x3fc+0xc001c000)++0x03
|
|
line.long 0x00 "RESERVED,This address can always be used and no register will be written"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-me.ph
|
|
;begin include file xscale/ixp2400-me.ph
|
|
;parameters: 0xc001c400 1_1
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400
|
|
; State: ok
|
|
;
|
|
; IXP2400-ME %1 %2
|
|
;
|
|
; %1 address offset (0x100 * %2)
|
|
; %2 ME number (0..15)
|
|
; --------------------------------------------------------------------------------
|
|
tree "ME_1_1"
|
|
; --------------------------------------------------------------------------------
|
|
width 24.
|
|
group asd:(0x000+0xc001c400)++0x03
|
|
line.long 0x00 "USTORE_ADDRESS,USTORE_ADDRESS"
|
|
bitfld.long 0x00 31. "ECS ,Execution" "norm,rd/wr"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADR ,Contains the address of the Control Store location"
|
|
group asd:(0x004+0xc001c400)++0x03
|
|
line.long 0x00 "USTORE_DATA_LOWER,Control Store Data Bits [31..0]"
|
|
group asd:(0x008+0xc001c400)++0x03
|
|
line.long 0x00 "USTORE_DATA_UPPER,Upper Control Store Data Bits"
|
|
bitfld.long 0x00 9.--9. "PAR[39:20] ,Contains odd Parity for data bits [39:20]" "0,1"
|
|
bitfld.long 0x00 8.--8. " PAR[19:0] ,Contains odd Parity for data bits [19:0]" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " UDATA_UPPER ,Control Store Data Bits [39..32]"
|
|
group asd:(0x00c+0xc001c400)++0x03
|
|
line.long 0x00 "USTORE_ERROR_STATUS,Information about parity error during instruction reads"
|
|
bitfld.long 0x00 16.--18. "CTX ,Context that was executed when parity error occurred" "0,1,2,3,4,5,6,7"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADDR ,Adress that had the Parity Error"
|
|
group asd:(0x010+0xc001c400)++0x03
|
|
line.long 0x00 "ALU_OUT,ALU Output"
|
|
group asd:(0x014+0xc001c400)++0x03
|
|
line.long 0x00 "CTX_ARB_CNTL,Context Arbiter Control Register"
|
|
bitfld.long 0x00 4.--6. "PCTX ,Previous Context" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " NCTX ,Next Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x018+0xc001c400)++0x03
|
|
line.long 0x00 "CTX_ENABLES,Context Enable Register"
|
|
bitfld.long 0x00 31. "IN_USE_CTX ,in-use contexts" "0-7,0/2/4/6"
|
|
bitfld.long 0x00 30. " PRN Mode ,Operation of Pseudo Random Number Update" "load/read,every cycle"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CTL_STR_PAR_ER ,Parity error detected" "no,yes"
|
|
bitfld.long 0x00 28. " CTL_STR_PAR_EN ,Enables parity checking on Control Store" "dis,ena"
|
|
bitfld.long 0x00 27. " BREAKPOINT ,Breakpoint instruction was executed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NN_MODE ,Controls how the Next Neighbor Registers are written" "prev ME,this ME"
|
|
bitfld.long 0x00 18.--19. " NN_RING_EMPTY ,Controls Threshold when NN_EMPTY asserts" "0 entries,1 entry,2 entries,3 entries"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LM_ADDR_1_GLOB ,Control usage of LM_ADDR_1" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LM_ADDR_0_GLOB ,Control usage of LM_ADDR_0" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CTX_EN7 ,Context 7 Enable" "dis,ena"
|
|
bitfld.long 0x00 14. " CTX_EN6 ,Context 6 Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " CTX_EN5 ,Context 5 Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " CTX_EN4 ,Context 4 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTX_EN3 ,Context 3 Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " CTX_EN2 ,Context 2 Enable" "dis,ena"
|
|
bitfld.long 0x00 9. " CTX_EN1 ,Context 1 Enable" "dis,ena"
|
|
bitfld.long 0x00 8. " CTX_EN0 ,Context 0 Enable" "dis,ena"
|
|
group asd:(0x01c+0xc001c400)++0x03
|
|
line.long 0x00 "CC_ENABLE,CC_ENABLE"
|
|
bitfld.long 0x00 13. "CCCE ,Current Condition Code Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--2. " PMU CTX Monitor ,Number of the context to be monitored" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x020+0xc001c400)++0x03
|
|
line.long 0x00 "CSR_CTX_POINTER,Pointer to select which Cobntexts' registers is read"
|
|
bitfld.long 0x00 0.--2. "CTX ,Selects which contexts local CSR is accessed" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x040+0xc001c400)++0x03
|
|
line.long 0x00 "IND_CTX_STS,Indirect Context Status Register"
|
|
bitfld.long 0x00 16. "RR ,Ready to Run" "no,yes"
|
|
hexmask.long 0x00 0.--12. 0x01 " CTX_PC ,Program Counter"
|
|
group asd:(0x044+0xc001c400)++0x03
|
|
line.long 0x00 "ACT_CTX_STS,Active Context Status Register"
|
|
bitfld.long 0x00 31. "AB0 ,Microengine has a Context in executing state" "no,yes"
|
|
hexmask.long 0x00 8.--20. 0x01 " ACTXPC ,PC of Execution Context"
|
|
bitfld.long 0x00 3.--7. " ME_NO ,Number of Microengine" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 0.--2. " ACNO ,Number of Executing Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x048+0xc001c400)++0x03
|
|
line.long 0x00 "IND_CTX_SIG_EVENTS,Indirect Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x04c+0xc001c400)++0x03
|
|
line.long 0x00 "ACT_CTX_SIG_EVENTS,Active Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x050+0xc001c400)++0x03
|
|
line.long 0x00 "IND_CTX_WAKEUP_EVENTS,Indirect Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x054+0xc001c400)++0x03
|
|
line.long 0x00 "ACT_CTX_WAKEUP_EVENTS,Active Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x058+0xc001c400)++0x03
|
|
line.long 0x00 "IND_CTX_FUTURE_COUNT,Indirect Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x05c+0xc001c400)++0x03
|
|
line.long 0x00 "ACT_CTX_FUTURE_COUNT,Active Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x060+0xc001c400)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0,LM_ADDR_0 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x00 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x04 "ACT_LM_ADDR_0,Access working copy LM_ADDR_0"
|
|
hexmask.long 0x04 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x08 "IND_LM_ADDR_1,LM_ADDR_1 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x08 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x0c "ACT_LM_ADDR_1,Access working copy LM_ADDR_1"
|
|
hexmask.long 0x0c 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
group asd:(0x070+0xc001c400)++0x03
|
|
line.long 0x00 "BYTE_IDX,Controls the byte shift amount during Byte_Align instructions"
|
|
bitfld.long 0x00 0.--1. "BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0e0+0xc001c400)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0_BYTE_IDX,Read or writes IND_LM_ADDR_0 and BYTE_IDX"
|
|
hexmask.long 0x00 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x04 "ACT_LM_ADDR_0_BYTE_IDX,ACT_LM_ADDR_0_BYTE_IDX"
|
|
hexmask.long 0x04 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x04 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x08 "IND_LM_ADDR_1_BYTE_IDX,IND_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x08 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x08 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x0c "ACT_LM_ADDR_1_BYTE_IDX,ACT_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x0c 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x0c 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0f4+0xc001c400)++0x03
|
|
line.long 0x00 "T_IDX_BYTE_IDX,Read or writes T_IDX and BYTE_IDX register"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x074+0xc001c400)++0x03
|
|
line.long 0x00 "T_IDX,Index register for S_TRANSFER or D_TRANSFER"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
group asd:(0x078+0xc001c400)++0x03
|
|
line.long 0x00 "IND_FUTURE_COUNT_SIGNAL,Indirect Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x07c+0xc001c400)++0x03
|
|
line.long 0x00 "ACT_FUTURE_COUNT_SIGNAL,Active Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x080+0xc001c400)++0x03
|
|
line.long 0x00 "NN_PUT,Put Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to write"
|
|
group asd:(0x084+0xc001c400)++0x03
|
|
line.long 0x00 "NN_GET,Get Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to read"
|
|
group asd:(0x0c0+0xc001c400)++0x07
|
|
line.long 0x00 "TIMESTAMP_LOW,Timestamp[31:0]"
|
|
line.long 0x04 "TIMESTAMP_HIGH,Timestamp[63:32]"
|
|
group asd:(0x100+0xc001c400)++0x03
|
|
line.long 0x00 "NEXT_NEIGHBOR_SIGNAL,Signal a Context in the Next Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x104+0xc001c400)++0x03
|
|
line.long 0x00 "PREV_NEIGHBOR_SIGNAL,Signal a Context in the Previous Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x108+0xc001c400)++0x03
|
|
line.long 0x00 "SAME_ME_SIGNAL,Signal another Context in the same Microengine"
|
|
bitfld.long 0x00 7. "NEXT_CTX ,Controls" "use CTX field,next CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the same Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the same Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x140+0xc001c400)++0x03
|
|
line.long 0x00 "CRC_REMAINDER,Input Operand and result of CRC instruction"
|
|
group asd:(0x144+0xc001c400)++0x03
|
|
line.long 0x00 "PROFILE_COUNT,Profile Count"
|
|
hexmask.long 0x00 0.--15. 0x01 "PROFILE_COUNT ,Count advances by one every cycle"
|
|
group asd:(0x148+0xc001c400)++0x03
|
|
line.long 0x00 "PSEUDO_RANDOM_NUMBER,Pseudo Random Number"
|
|
;group asd:(0x180+%1)++0x03
|
|
hide.long 0x38 "LOCAL_CSR_STATUS,LOCAL_CSR_STATUS"
|
|
in
|
|
; bitfld.long 0x0 0. " STATUS ,Local CSR Status" "no acc,acc"
|
|
group asd:(0x3fc+0xc001c400)++0x03
|
|
line.long 0x00 "RESERVED,This address can always be used and no register will be written"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-me.ph
|
|
;begin include file xscale/ixp2400-me.ph
|
|
;parameters: 0xc001c800 1_2
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400
|
|
; State: ok
|
|
;
|
|
; IXP2400-ME %1 %2
|
|
;
|
|
; %1 address offset (0x100 * %2)
|
|
; %2 ME number (0..15)
|
|
; --------------------------------------------------------------------------------
|
|
tree "ME_1_2"
|
|
; --------------------------------------------------------------------------------
|
|
width 24.
|
|
group asd:(0x000+0xc001c800)++0x03
|
|
line.long 0x00 "USTORE_ADDRESS,USTORE_ADDRESS"
|
|
bitfld.long 0x00 31. "ECS ,Execution" "norm,rd/wr"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADR ,Contains the address of the Control Store location"
|
|
group asd:(0x004+0xc001c800)++0x03
|
|
line.long 0x00 "USTORE_DATA_LOWER,Control Store Data Bits [31..0]"
|
|
group asd:(0x008+0xc001c800)++0x03
|
|
line.long 0x00 "USTORE_DATA_UPPER,Upper Control Store Data Bits"
|
|
bitfld.long 0x00 9.--9. "PAR[39:20] ,Contains odd Parity for data bits [39:20]" "0,1"
|
|
bitfld.long 0x00 8.--8. " PAR[19:0] ,Contains odd Parity for data bits [19:0]" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " UDATA_UPPER ,Control Store Data Bits [39..32]"
|
|
group asd:(0x00c+0xc001c800)++0x03
|
|
line.long 0x00 "USTORE_ERROR_STATUS,Information about parity error during instruction reads"
|
|
bitfld.long 0x00 16.--18. "CTX ,Context that was executed when parity error occurred" "0,1,2,3,4,5,6,7"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADDR ,Adress that had the Parity Error"
|
|
group asd:(0x010+0xc001c800)++0x03
|
|
line.long 0x00 "ALU_OUT,ALU Output"
|
|
group asd:(0x014+0xc001c800)++0x03
|
|
line.long 0x00 "CTX_ARB_CNTL,Context Arbiter Control Register"
|
|
bitfld.long 0x00 4.--6. "PCTX ,Previous Context" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " NCTX ,Next Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x018+0xc001c800)++0x03
|
|
line.long 0x00 "CTX_ENABLES,Context Enable Register"
|
|
bitfld.long 0x00 31. "IN_USE_CTX ,in-use contexts" "0-7,0/2/4/6"
|
|
bitfld.long 0x00 30. " PRN Mode ,Operation of Pseudo Random Number Update" "load/read,every cycle"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CTL_STR_PAR_ER ,Parity error detected" "no,yes"
|
|
bitfld.long 0x00 28. " CTL_STR_PAR_EN ,Enables parity checking on Control Store" "dis,ena"
|
|
bitfld.long 0x00 27. " BREAKPOINT ,Breakpoint instruction was executed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NN_MODE ,Controls how the Next Neighbor Registers are written" "prev ME,this ME"
|
|
bitfld.long 0x00 18.--19. " NN_RING_EMPTY ,Controls Threshold when NN_EMPTY asserts" "0 entries,1 entry,2 entries,3 entries"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LM_ADDR_1_GLOB ,Control usage of LM_ADDR_1" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LM_ADDR_0_GLOB ,Control usage of LM_ADDR_0" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CTX_EN7 ,Context 7 Enable" "dis,ena"
|
|
bitfld.long 0x00 14. " CTX_EN6 ,Context 6 Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " CTX_EN5 ,Context 5 Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " CTX_EN4 ,Context 4 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTX_EN3 ,Context 3 Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " CTX_EN2 ,Context 2 Enable" "dis,ena"
|
|
bitfld.long 0x00 9. " CTX_EN1 ,Context 1 Enable" "dis,ena"
|
|
bitfld.long 0x00 8. " CTX_EN0 ,Context 0 Enable" "dis,ena"
|
|
group asd:(0x01c+0xc001c800)++0x03
|
|
line.long 0x00 "CC_ENABLE,CC_ENABLE"
|
|
bitfld.long 0x00 13. "CCCE ,Current Condition Code Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--2. " PMU CTX Monitor ,Number of the context to be monitored" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x020+0xc001c800)++0x03
|
|
line.long 0x00 "CSR_CTX_POINTER,Pointer to select which Cobntexts' registers is read"
|
|
bitfld.long 0x00 0.--2. "CTX ,Selects which contexts local CSR is accessed" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x040+0xc001c800)++0x03
|
|
line.long 0x00 "IND_CTX_STS,Indirect Context Status Register"
|
|
bitfld.long 0x00 16. "RR ,Ready to Run" "no,yes"
|
|
hexmask.long 0x00 0.--12. 0x01 " CTX_PC ,Program Counter"
|
|
group asd:(0x044+0xc001c800)++0x03
|
|
line.long 0x00 "ACT_CTX_STS,Active Context Status Register"
|
|
bitfld.long 0x00 31. "AB0 ,Microengine has a Context in executing state" "no,yes"
|
|
hexmask.long 0x00 8.--20. 0x01 " ACTXPC ,PC of Execution Context"
|
|
bitfld.long 0x00 3.--7. " ME_NO ,Number of Microengine" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 0.--2. " ACNO ,Number of Executing Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x048+0xc001c800)++0x03
|
|
line.long 0x00 "IND_CTX_SIG_EVENTS,Indirect Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x04c+0xc001c800)++0x03
|
|
line.long 0x00 "ACT_CTX_SIG_EVENTS,Active Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x050+0xc001c800)++0x03
|
|
line.long 0x00 "IND_CTX_WAKEUP_EVENTS,Indirect Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x054+0xc001c800)++0x03
|
|
line.long 0x00 "ACT_CTX_WAKEUP_EVENTS,Active Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x058+0xc001c800)++0x03
|
|
line.long 0x00 "IND_CTX_FUTURE_COUNT,Indirect Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x05c+0xc001c800)++0x03
|
|
line.long 0x00 "ACT_CTX_FUTURE_COUNT,Active Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x060+0xc001c800)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0,LM_ADDR_0 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x00 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x04 "ACT_LM_ADDR_0,Access working copy LM_ADDR_0"
|
|
hexmask.long 0x04 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x08 "IND_LM_ADDR_1,LM_ADDR_1 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x08 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x0c "ACT_LM_ADDR_1,Access working copy LM_ADDR_1"
|
|
hexmask.long 0x0c 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
group asd:(0x070+0xc001c800)++0x03
|
|
line.long 0x00 "BYTE_IDX,Controls the byte shift amount during Byte_Align instructions"
|
|
bitfld.long 0x00 0.--1. "BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0e0+0xc001c800)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0_BYTE_IDX,Read or writes IND_LM_ADDR_0 and BYTE_IDX"
|
|
hexmask.long 0x00 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x04 "ACT_LM_ADDR_0_BYTE_IDX,ACT_LM_ADDR_0_BYTE_IDX"
|
|
hexmask.long 0x04 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x04 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x08 "IND_LM_ADDR_1_BYTE_IDX,IND_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x08 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x08 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x0c "ACT_LM_ADDR_1_BYTE_IDX,ACT_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x0c 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x0c 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0f4+0xc001c800)++0x03
|
|
line.long 0x00 "T_IDX_BYTE_IDX,Read or writes T_IDX and BYTE_IDX register"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x074+0xc001c800)++0x03
|
|
line.long 0x00 "T_IDX,Index register for S_TRANSFER or D_TRANSFER"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
group asd:(0x078+0xc001c800)++0x03
|
|
line.long 0x00 "IND_FUTURE_COUNT_SIGNAL,Indirect Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x07c+0xc001c800)++0x03
|
|
line.long 0x00 "ACT_FUTURE_COUNT_SIGNAL,Active Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x080+0xc001c800)++0x03
|
|
line.long 0x00 "NN_PUT,Put Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to write"
|
|
group asd:(0x084+0xc001c800)++0x03
|
|
line.long 0x00 "NN_GET,Get Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to read"
|
|
group asd:(0x0c0+0xc001c800)++0x07
|
|
line.long 0x00 "TIMESTAMP_LOW,Timestamp[31:0]"
|
|
line.long 0x04 "TIMESTAMP_HIGH,Timestamp[63:32]"
|
|
group asd:(0x100+0xc001c800)++0x03
|
|
line.long 0x00 "NEXT_NEIGHBOR_SIGNAL,Signal a Context in the Next Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x104+0xc001c800)++0x03
|
|
line.long 0x00 "PREV_NEIGHBOR_SIGNAL,Signal a Context in the Previous Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x108+0xc001c800)++0x03
|
|
line.long 0x00 "SAME_ME_SIGNAL,Signal another Context in the same Microengine"
|
|
bitfld.long 0x00 7. "NEXT_CTX ,Controls" "use CTX field,next CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the same Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the same Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x140+0xc001c800)++0x03
|
|
line.long 0x00 "CRC_REMAINDER,Input Operand and result of CRC instruction"
|
|
group asd:(0x144+0xc001c800)++0x03
|
|
line.long 0x00 "PROFILE_COUNT,Profile Count"
|
|
hexmask.long 0x00 0.--15. 0x01 "PROFILE_COUNT ,Count advances by one every cycle"
|
|
group asd:(0x148+0xc001c800)++0x03
|
|
line.long 0x00 "PSEUDO_RANDOM_NUMBER,Pseudo Random Number"
|
|
;group asd:(0x180+%1)++0x03
|
|
hide.long 0x38 "LOCAL_CSR_STATUS,LOCAL_CSR_STATUS"
|
|
in
|
|
; bitfld.long 0x0 0. " STATUS ,Local CSR Status" "no acc,acc"
|
|
group asd:(0x3fc+0xc001c800)++0x03
|
|
line.long 0x00 "RESERVED,This address can always be used and no register will be written"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-me.ph
|
|
;begin include file xscale/ixp2400-me.ph
|
|
;parameters: 0xc001cc00 1_3
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400
|
|
; State: ok
|
|
;
|
|
; IXP2400-ME %1 %2
|
|
;
|
|
; %1 address offset (0x100 * %2)
|
|
; %2 ME number (0..15)
|
|
; --------------------------------------------------------------------------------
|
|
tree "ME_1_3"
|
|
; --------------------------------------------------------------------------------
|
|
width 24.
|
|
group asd:(0x000+0xc001cc00)++0x03
|
|
line.long 0x00 "USTORE_ADDRESS,USTORE_ADDRESS"
|
|
bitfld.long 0x00 31. "ECS ,Execution" "norm,rd/wr"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADR ,Contains the address of the Control Store location"
|
|
group asd:(0x004+0xc001cc00)++0x03
|
|
line.long 0x00 "USTORE_DATA_LOWER,Control Store Data Bits [31..0]"
|
|
group asd:(0x008+0xc001cc00)++0x03
|
|
line.long 0x00 "USTORE_DATA_UPPER,Upper Control Store Data Bits"
|
|
bitfld.long 0x00 9.--9. "PAR[39:20] ,Contains odd Parity for data bits [39:20]" "0,1"
|
|
bitfld.long 0x00 8.--8. " PAR[19:0] ,Contains odd Parity for data bits [19:0]" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " UDATA_UPPER ,Control Store Data Bits [39..32]"
|
|
group asd:(0x00c+0xc001cc00)++0x03
|
|
line.long 0x00 "USTORE_ERROR_STATUS,Information about parity error during instruction reads"
|
|
bitfld.long 0x00 16.--18. "CTX ,Context that was executed when parity error occurred" "0,1,2,3,4,5,6,7"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADDR ,Adress that had the Parity Error"
|
|
group asd:(0x010+0xc001cc00)++0x03
|
|
line.long 0x00 "ALU_OUT,ALU Output"
|
|
group asd:(0x014+0xc001cc00)++0x03
|
|
line.long 0x00 "CTX_ARB_CNTL,Context Arbiter Control Register"
|
|
bitfld.long 0x00 4.--6. "PCTX ,Previous Context" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " NCTX ,Next Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x018+0xc001cc00)++0x03
|
|
line.long 0x00 "CTX_ENABLES,Context Enable Register"
|
|
bitfld.long 0x00 31. "IN_USE_CTX ,in-use contexts" "0-7,0/2/4/6"
|
|
bitfld.long 0x00 30. " PRN Mode ,Operation of Pseudo Random Number Update" "load/read,every cycle"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CTL_STR_PAR_ER ,Parity error detected" "no,yes"
|
|
bitfld.long 0x00 28. " CTL_STR_PAR_EN ,Enables parity checking on Control Store" "dis,ena"
|
|
bitfld.long 0x00 27. " BREAKPOINT ,Breakpoint instruction was executed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NN_MODE ,Controls how the Next Neighbor Registers are written" "prev ME,this ME"
|
|
bitfld.long 0x00 18.--19. " NN_RING_EMPTY ,Controls Threshold when NN_EMPTY asserts" "0 entries,1 entry,2 entries,3 entries"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LM_ADDR_1_GLOB ,Control usage of LM_ADDR_1" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LM_ADDR_0_GLOB ,Control usage of LM_ADDR_0" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CTX_EN7 ,Context 7 Enable" "dis,ena"
|
|
bitfld.long 0x00 14. " CTX_EN6 ,Context 6 Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " CTX_EN5 ,Context 5 Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " CTX_EN4 ,Context 4 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTX_EN3 ,Context 3 Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " CTX_EN2 ,Context 2 Enable" "dis,ena"
|
|
bitfld.long 0x00 9. " CTX_EN1 ,Context 1 Enable" "dis,ena"
|
|
bitfld.long 0x00 8. " CTX_EN0 ,Context 0 Enable" "dis,ena"
|
|
group asd:(0x01c+0xc001cc00)++0x03
|
|
line.long 0x00 "CC_ENABLE,CC_ENABLE"
|
|
bitfld.long 0x00 13. "CCCE ,Current Condition Code Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--2. " PMU CTX Monitor ,Number of the context to be monitored" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x020+0xc001cc00)++0x03
|
|
line.long 0x00 "CSR_CTX_POINTER,Pointer to select which Cobntexts' registers is read"
|
|
bitfld.long 0x00 0.--2. "CTX ,Selects which contexts local CSR is accessed" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x040+0xc001cc00)++0x03
|
|
line.long 0x00 "IND_CTX_STS,Indirect Context Status Register"
|
|
bitfld.long 0x00 16. "RR ,Ready to Run" "no,yes"
|
|
hexmask.long 0x00 0.--12. 0x01 " CTX_PC ,Program Counter"
|
|
group asd:(0x044+0xc001cc00)++0x03
|
|
line.long 0x00 "ACT_CTX_STS,Active Context Status Register"
|
|
bitfld.long 0x00 31. "AB0 ,Microengine has a Context in executing state" "no,yes"
|
|
hexmask.long 0x00 8.--20. 0x01 " ACTXPC ,PC of Execution Context"
|
|
bitfld.long 0x00 3.--7. " ME_NO ,Number of Microengine" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 0.--2. " ACNO ,Number of Executing Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x048+0xc001cc00)++0x03
|
|
line.long 0x00 "IND_CTX_SIG_EVENTS,Indirect Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x04c+0xc001cc00)++0x03
|
|
line.long 0x00 "ACT_CTX_SIG_EVENTS,Active Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x050+0xc001cc00)++0x03
|
|
line.long 0x00 "IND_CTX_WAKEUP_EVENTS,Indirect Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x054+0xc001cc00)++0x03
|
|
line.long 0x00 "ACT_CTX_WAKEUP_EVENTS,Active Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x058+0xc001cc00)++0x03
|
|
line.long 0x00 "IND_CTX_FUTURE_COUNT,Indirect Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x05c+0xc001cc00)++0x03
|
|
line.long 0x00 "ACT_CTX_FUTURE_COUNT,Active Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x060+0xc001cc00)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0,LM_ADDR_0 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x00 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x04 "ACT_LM_ADDR_0,Access working copy LM_ADDR_0"
|
|
hexmask.long 0x04 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x08 "IND_LM_ADDR_1,LM_ADDR_1 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x08 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x0c "ACT_LM_ADDR_1,Access working copy LM_ADDR_1"
|
|
hexmask.long 0x0c 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
group asd:(0x070+0xc001cc00)++0x03
|
|
line.long 0x00 "BYTE_IDX,Controls the byte shift amount during Byte_Align instructions"
|
|
bitfld.long 0x00 0.--1. "BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0e0+0xc001cc00)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0_BYTE_IDX,Read or writes IND_LM_ADDR_0 and BYTE_IDX"
|
|
hexmask.long 0x00 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x04 "ACT_LM_ADDR_0_BYTE_IDX,ACT_LM_ADDR_0_BYTE_IDX"
|
|
hexmask.long 0x04 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x04 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x08 "IND_LM_ADDR_1_BYTE_IDX,IND_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x08 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x08 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x0c "ACT_LM_ADDR_1_BYTE_IDX,ACT_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x0c 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x0c 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0f4+0xc001cc00)++0x03
|
|
line.long 0x00 "T_IDX_BYTE_IDX,Read or writes T_IDX and BYTE_IDX register"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x074+0xc001cc00)++0x03
|
|
line.long 0x00 "T_IDX,Index register for S_TRANSFER or D_TRANSFER"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
group asd:(0x078+0xc001cc00)++0x03
|
|
line.long 0x00 "IND_FUTURE_COUNT_SIGNAL,Indirect Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x07c+0xc001cc00)++0x03
|
|
line.long 0x00 "ACT_FUTURE_COUNT_SIGNAL,Active Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x080+0xc001cc00)++0x03
|
|
line.long 0x00 "NN_PUT,Put Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to write"
|
|
group asd:(0x084+0xc001cc00)++0x03
|
|
line.long 0x00 "NN_GET,Get Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to read"
|
|
group asd:(0x0c0+0xc001cc00)++0x07
|
|
line.long 0x00 "TIMESTAMP_LOW,Timestamp[31:0]"
|
|
line.long 0x04 "TIMESTAMP_HIGH,Timestamp[63:32]"
|
|
group asd:(0x100+0xc001cc00)++0x03
|
|
line.long 0x00 "NEXT_NEIGHBOR_SIGNAL,Signal a Context in the Next Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x104+0xc001cc00)++0x03
|
|
line.long 0x00 "PREV_NEIGHBOR_SIGNAL,Signal a Context in the Previous Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x108+0xc001cc00)++0x03
|
|
line.long 0x00 "SAME_ME_SIGNAL,Signal another Context in the same Microengine"
|
|
bitfld.long 0x00 7. "NEXT_CTX ,Controls" "use CTX field,next CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the same Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the same Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x140+0xc001cc00)++0x03
|
|
line.long 0x00 "CRC_REMAINDER,Input Operand and result of CRC instruction"
|
|
group asd:(0x144+0xc001cc00)++0x03
|
|
line.long 0x00 "PROFILE_COUNT,Profile Count"
|
|
hexmask.long 0x00 0.--15. 0x01 "PROFILE_COUNT ,Count advances by one every cycle"
|
|
group asd:(0x148+0xc001cc00)++0x03
|
|
line.long 0x00 "PSEUDO_RANDOM_NUMBER,Pseudo Random Number"
|
|
;group asd:(0x180+%1)++0x03
|
|
hide.long 0x38 "LOCAL_CSR_STATUS,LOCAL_CSR_STATUS"
|
|
in
|
|
; bitfld.long 0x0 0. " STATUS ,Local CSR Status" "no acc,acc"
|
|
group asd:(0x3fc+0xc001cc00)++0x03
|
|
line.long 0x00 "RESERVED,This address can always be used and no register will be written"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-me.ph
|
|
;begin include file xscale/ixp2400-me.ph
|
|
;parameters: 0xc001d000 1_4
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400
|
|
; State: ok
|
|
;
|
|
; IXP2400-ME %1 %2
|
|
;
|
|
; %1 address offset (0x100 * %2)
|
|
; %2 ME number (0..15)
|
|
; --------------------------------------------------------------------------------
|
|
tree "ME_1_4"
|
|
; --------------------------------------------------------------------------------
|
|
width 24.
|
|
group asd:(0x000+0xc001d000)++0x03
|
|
line.long 0x00 "USTORE_ADDRESS,USTORE_ADDRESS"
|
|
bitfld.long 0x00 31. "ECS ,Execution" "norm,rd/wr"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADR ,Contains the address of the Control Store location"
|
|
group asd:(0x004+0xc001d000)++0x03
|
|
line.long 0x00 "USTORE_DATA_LOWER,Control Store Data Bits [31..0]"
|
|
group asd:(0x008+0xc001d000)++0x03
|
|
line.long 0x00 "USTORE_DATA_UPPER,Upper Control Store Data Bits"
|
|
bitfld.long 0x00 9.--9. "PAR[39:20] ,Contains odd Parity for data bits [39:20]" "0,1"
|
|
bitfld.long 0x00 8.--8. " PAR[19:0] ,Contains odd Parity for data bits [19:0]" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " UDATA_UPPER ,Control Store Data Bits [39..32]"
|
|
group asd:(0x00c+0xc001d000)++0x03
|
|
line.long 0x00 "USTORE_ERROR_STATUS,Information about parity error during instruction reads"
|
|
bitfld.long 0x00 16.--18. "CTX ,Context that was executed when parity error occurred" "0,1,2,3,4,5,6,7"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADDR ,Adress that had the Parity Error"
|
|
group asd:(0x010+0xc001d000)++0x03
|
|
line.long 0x00 "ALU_OUT,ALU Output"
|
|
group asd:(0x014+0xc001d000)++0x03
|
|
line.long 0x00 "CTX_ARB_CNTL,Context Arbiter Control Register"
|
|
bitfld.long 0x00 4.--6. "PCTX ,Previous Context" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " NCTX ,Next Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x018+0xc001d000)++0x03
|
|
line.long 0x00 "CTX_ENABLES,Context Enable Register"
|
|
bitfld.long 0x00 31. "IN_USE_CTX ,in-use contexts" "0-7,0/2/4/6"
|
|
bitfld.long 0x00 30. " PRN Mode ,Operation of Pseudo Random Number Update" "load/read,every cycle"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CTL_STR_PAR_ER ,Parity error detected" "no,yes"
|
|
bitfld.long 0x00 28. " CTL_STR_PAR_EN ,Enables parity checking on Control Store" "dis,ena"
|
|
bitfld.long 0x00 27. " BREAKPOINT ,Breakpoint instruction was executed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NN_MODE ,Controls how the Next Neighbor Registers are written" "prev ME,this ME"
|
|
bitfld.long 0x00 18.--19. " NN_RING_EMPTY ,Controls Threshold when NN_EMPTY asserts" "0 entries,1 entry,2 entries,3 entries"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LM_ADDR_1_GLOB ,Control usage of LM_ADDR_1" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LM_ADDR_0_GLOB ,Control usage of LM_ADDR_0" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CTX_EN7 ,Context 7 Enable" "dis,ena"
|
|
bitfld.long 0x00 14. " CTX_EN6 ,Context 6 Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " CTX_EN5 ,Context 5 Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " CTX_EN4 ,Context 4 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTX_EN3 ,Context 3 Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " CTX_EN2 ,Context 2 Enable" "dis,ena"
|
|
bitfld.long 0x00 9. " CTX_EN1 ,Context 1 Enable" "dis,ena"
|
|
bitfld.long 0x00 8. " CTX_EN0 ,Context 0 Enable" "dis,ena"
|
|
group asd:(0x01c+0xc001d000)++0x03
|
|
line.long 0x00 "CC_ENABLE,CC_ENABLE"
|
|
bitfld.long 0x00 13. "CCCE ,Current Condition Code Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--2. " PMU CTX Monitor ,Number of the context to be monitored" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x020+0xc001d000)++0x03
|
|
line.long 0x00 "CSR_CTX_POINTER,Pointer to select which Cobntexts' registers is read"
|
|
bitfld.long 0x00 0.--2. "CTX ,Selects which contexts local CSR is accessed" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x040+0xc001d000)++0x03
|
|
line.long 0x00 "IND_CTX_STS,Indirect Context Status Register"
|
|
bitfld.long 0x00 16. "RR ,Ready to Run" "no,yes"
|
|
hexmask.long 0x00 0.--12. 0x01 " CTX_PC ,Program Counter"
|
|
group asd:(0x044+0xc001d000)++0x03
|
|
line.long 0x00 "ACT_CTX_STS,Active Context Status Register"
|
|
bitfld.long 0x00 31. "AB0 ,Microengine has a Context in executing state" "no,yes"
|
|
hexmask.long 0x00 8.--20. 0x01 " ACTXPC ,PC of Execution Context"
|
|
bitfld.long 0x00 3.--7. " ME_NO ,Number of Microengine" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 0.--2. " ACNO ,Number of Executing Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x048+0xc001d000)++0x03
|
|
line.long 0x00 "IND_CTX_SIG_EVENTS,Indirect Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x04c+0xc001d000)++0x03
|
|
line.long 0x00 "ACT_CTX_SIG_EVENTS,Active Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x050+0xc001d000)++0x03
|
|
line.long 0x00 "IND_CTX_WAKEUP_EVENTS,Indirect Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x054+0xc001d000)++0x03
|
|
line.long 0x00 "ACT_CTX_WAKEUP_EVENTS,Active Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x058+0xc001d000)++0x03
|
|
line.long 0x00 "IND_CTX_FUTURE_COUNT,Indirect Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x05c+0xc001d000)++0x03
|
|
line.long 0x00 "ACT_CTX_FUTURE_COUNT,Active Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x060+0xc001d000)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0,LM_ADDR_0 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x00 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x04 "ACT_LM_ADDR_0,Access working copy LM_ADDR_0"
|
|
hexmask.long 0x04 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x08 "IND_LM_ADDR_1,LM_ADDR_1 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x08 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x0c "ACT_LM_ADDR_1,Access working copy LM_ADDR_1"
|
|
hexmask.long 0x0c 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
group asd:(0x070+0xc001d000)++0x03
|
|
line.long 0x00 "BYTE_IDX,Controls the byte shift amount during Byte_Align instructions"
|
|
bitfld.long 0x00 0.--1. "BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0e0+0xc001d000)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0_BYTE_IDX,Read or writes IND_LM_ADDR_0 and BYTE_IDX"
|
|
hexmask.long 0x00 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x04 "ACT_LM_ADDR_0_BYTE_IDX,ACT_LM_ADDR_0_BYTE_IDX"
|
|
hexmask.long 0x04 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x04 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x08 "IND_LM_ADDR_1_BYTE_IDX,IND_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x08 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x08 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x0c "ACT_LM_ADDR_1_BYTE_IDX,ACT_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x0c 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x0c 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0f4+0xc001d000)++0x03
|
|
line.long 0x00 "T_IDX_BYTE_IDX,Read or writes T_IDX and BYTE_IDX register"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x074+0xc001d000)++0x03
|
|
line.long 0x00 "T_IDX,Index register for S_TRANSFER or D_TRANSFER"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
group asd:(0x078+0xc001d000)++0x03
|
|
line.long 0x00 "IND_FUTURE_COUNT_SIGNAL,Indirect Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x07c+0xc001d000)++0x03
|
|
line.long 0x00 "ACT_FUTURE_COUNT_SIGNAL,Active Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x080+0xc001d000)++0x03
|
|
line.long 0x00 "NN_PUT,Put Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to write"
|
|
group asd:(0x084+0xc001d000)++0x03
|
|
line.long 0x00 "NN_GET,Get Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to read"
|
|
group asd:(0x0c0+0xc001d000)++0x07
|
|
line.long 0x00 "TIMESTAMP_LOW,Timestamp[31:0]"
|
|
line.long 0x04 "TIMESTAMP_HIGH,Timestamp[63:32]"
|
|
group asd:(0x100+0xc001d000)++0x03
|
|
line.long 0x00 "NEXT_NEIGHBOR_SIGNAL,Signal a Context in the Next Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x104+0xc001d000)++0x03
|
|
line.long 0x00 "PREV_NEIGHBOR_SIGNAL,Signal a Context in the Previous Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x108+0xc001d000)++0x03
|
|
line.long 0x00 "SAME_ME_SIGNAL,Signal another Context in the same Microengine"
|
|
bitfld.long 0x00 7. "NEXT_CTX ,Controls" "use CTX field,next CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the same Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the same Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x140+0xc001d000)++0x03
|
|
line.long 0x00 "CRC_REMAINDER,Input Operand and result of CRC instruction"
|
|
group asd:(0x144+0xc001d000)++0x03
|
|
line.long 0x00 "PROFILE_COUNT,Profile Count"
|
|
hexmask.long 0x00 0.--15. 0x01 "PROFILE_COUNT ,Count advances by one every cycle"
|
|
group asd:(0x148+0xc001d000)++0x03
|
|
line.long 0x00 "PSEUDO_RANDOM_NUMBER,Pseudo Random Number"
|
|
;group asd:(0x180+%1)++0x03
|
|
hide.long 0x38 "LOCAL_CSR_STATUS,LOCAL_CSR_STATUS"
|
|
in
|
|
; bitfld.long 0x0 0. " STATUS ,Local CSR Status" "no acc,acc"
|
|
group asd:(0x3fc+0xc001d000)++0x03
|
|
line.long 0x00 "RESERVED,This address can always be used and no register will be written"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-me.ph
|
|
;begin include file xscale/ixp2400-me.ph
|
|
;parameters: 0xc001d400 1_5
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400
|
|
; State: ok
|
|
;
|
|
; IXP2400-ME %1 %2
|
|
;
|
|
; %1 address offset (0x100 * %2)
|
|
; %2 ME number (0..15)
|
|
; --------------------------------------------------------------------------------
|
|
tree "ME_1_5"
|
|
; --------------------------------------------------------------------------------
|
|
width 24.
|
|
group asd:(0x000+0xc001d400)++0x03
|
|
line.long 0x00 "USTORE_ADDRESS,USTORE_ADDRESS"
|
|
bitfld.long 0x00 31. "ECS ,Execution" "norm,rd/wr"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADR ,Contains the address of the Control Store location"
|
|
group asd:(0x004+0xc001d400)++0x03
|
|
line.long 0x00 "USTORE_DATA_LOWER,Control Store Data Bits [31..0]"
|
|
group asd:(0x008+0xc001d400)++0x03
|
|
line.long 0x00 "USTORE_DATA_UPPER,Upper Control Store Data Bits"
|
|
bitfld.long 0x00 9.--9. "PAR[39:20] ,Contains odd Parity for data bits [39:20]" "0,1"
|
|
bitfld.long 0x00 8.--8. " PAR[19:0] ,Contains odd Parity for data bits [19:0]" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " UDATA_UPPER ,Control Store Data Bits [39..32]"
|
|
group asd:(0x00c+0xc001d400)++0x03
|
|
line.long 0x00 "USTORE_ERROR_STATUS,Information about parity error during instruction reads"
|
|
bitfld.long 0x00 16.--18. "CTX ,Context that was executed when parity error occurred" "0,1,2,3,4,5,6,7"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADDR ,Adress that had the Parity Error"
|
|
group asd:(0x010+0xc001d400)++0x03
|
|
line.long 0x00 "ALU_OUT,ALU Output"
|
|
group asd:(0x014+0xc001d400)++0x03
|
|
line.long 0x00 "CTX_ARB_CNTL,Context Arbiter Control Register"
|
|
bitfld.long 0x00 4.--6. "PCTX ,Previous Context" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " NCTX ,Next Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x018+0xc001d400)++0x03
|
|
line.long 0x00 "CTX_ENABLES,Context Enable Register"
|
|
bitfld.long 0x00 31. "IN_USE_CTX ,in-use contexts" "0-7,0/2/4/6"
|
|
bitfld.long 0x00 30. " PRN Mode ,Operation of Pseudo Random Number Update" "load/read,every cycle"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CTL_STR_PAR_ER ,Parity error detected" "no,yes"
|
|
bitfld.long 0x00 28. " CTL_STR_PAR_EN ,Enables parity checking on Control Store" "dis,ena"
|
|
bitfld.long 0x00 27. " BREAKPOINT ,Breakpoint instruction was executed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NN_MODE ,Controls how the Next Neighbor Registers are written" "prev ME,this ME"
|
|
bitfld.long 0x00 18.--19. " NN_RING_EMPTY ,Controls Threshold when NN_EMPTY asserts" "0 entries,1 entry,2 entries,3 entries"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LM_ADDR_1_GLOB ,Control usage of LM_ADDR_1" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LM_ADDR_0_GLOB ,Control usage of LM_ADDR_0" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CTX_EN7 ,Context 7 Enable" "dis,ena"
|
|
bitfld.long 0x00 14. " CTX_EN6 ,Context 6 Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " CTX_EN5 ,Context 5 Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " CTX_EN4 ,Context 4 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTX_EN3 ,Context 3 Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " CTX_EN2 ,Context 2 Enable" "dis,ena"
|
|
bitfld.long 0x00 9. " CTX_EN1 ,Context 1 Enable" "dis,ena"
|
|
bitfld.long 0x00 8. " CTX_EN0 ,Context 0 Enable" "dis,ena"
|
|
group asd:(0x01c+0xc001d400)++0x03
|
|
line.long 0x00 "CC_ENABLE,CC_ENABLE"
|
|
bitfld.long 0x00 13. "CCCE ,Current Condition Code Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--2. " PMU CTX Monitor ,Number of the context to be monitored" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x020+0xc001d400)++0x03
|
|
line.long 0x00 "CSR_CTX_POINTER,Pointer to select which Cobntexts' registers is read"
|
|
bitfld.long 0x00 0.--2. "CTX ,Selects which contexts local CSR is accessed" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x040+0xc001d400)++0x03
|
|
line.long 0x00 "IND_CTX_STS,Indirect Context Status Register"
|
|
bitfld.long 0x00 16. "RR ,Ready to Run" "no,yes"
|
|
hexmask.long 0x00 0.--12. 0x01 " CTX_PC ,Program Counter"
|
|
group asd:(0x044+0xc001d400)++0x03
|
|
line.long 0x00 "ACT_CTX_STS,Active Context Status Register"
|
|
bitfld.long 0x00 31. "AB0 ,Microengine has a Context in executing state" "no,yes"
|
|
hexmask.long 0x00 8.--20. 0x01 " ACTXPC ,PC of Execution Context"
|
|
bitfld.long 0x00 3.--7. " ME_NO ,Number of Microengine" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 0.--2. " ACNO ,Number of Executing Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x048+0xc001d400)++0x03
|
|
line.long 0x00 "IND_CTX_SIG_EVENTS,Indirect Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x04c+0xc001d400)++0x03
|
|
line.long 0x00 "ACT_CTX_SIG_EVENTS,Active Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x050+0xc001d400)++0x03
|
|
line.long 0x00 "IND_CTX_WAKEUP_EVENTS,Indirect Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x054+0xc001d400)++0x03
|
|
line.long 0x00 "ACT_CTX_WAKEUP_EVENTS,Active Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x058+0xc001d400)++0x03
|
|
line.long 0x00 "IND_CTX_FUTURE_COUNT,Indirect Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x05c+0xc001d400)++0x03
|
|
line.long 0x00 "ACT_CTX_FUTURE_COUNT,Active Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x060+0xc001d400)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0,LM_ADDR_0 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x00 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x04 "ACT_LM_ADDR_0,Access working copy LM_ADDR_0"
|
|
hexmask.long 0x04 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x08 "IND_LM_ADDR_1,LM_ADDR_1 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x08 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x0c "ACT_LM_ADDR_1,Access working copy LM_ADDR_1"
|
|
hexmask.long 0x0c 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
group asd:(0x070+0xc001d400)++0x03
|
|
line.long 0x00 "BYTE_IDX,Controls the byte shift amount during Byte_Align instructions"
|
|
bitfld.long 0x00 0.--1. "BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0e0+0xc001d400)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0_BYTE_IDX,Read or writes IND_LM_ADDR_0 and BYTE_IDX"
|
|
hexmask.long 0x00 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x04 "ACT_LM_ADDR_0_BYTE_IDX,ACT_LM_ADDR_0_BYTE_IDX"
|
|
hexmask.long 0x04 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x04 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x08 "IND_LM_ADDR_1_BYTE_IDX,IND_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x08 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x08 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x0c "ACT_LM_ADDR_1_BYTE_IDX,ACT_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x0c 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x0c 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0f4+0xc001d400)++0x03
|
|
line.long 0x00 "T_IDX_BYTE_IDX,Read or writes T_IDX and BYTE_IDX register"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x074+0xc001d400)++0x03
|
|
line.long 0x00 "T_IDX,Index register for S_TRANSFER or D_TRANSFER"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
group asd:(0x078+0xc001d400)++0x03
|
|
line.long 0x00 "IND_FUTURE_COUNT_SIGNAL,Indirect Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x07c+0xc001d400)++0x03
|
|
line.long 0x00 "ACT_FUTURE_COUNT_SIGNAL,Active Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x080+0xc001d400)++0x03
|
|
line.long 0x00 "NN_PUT,Put Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to write"
|
|
group asd:(0x084+0xc001d400)++0x03
|
|
line.long 0x00 "NN_GET,Get Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to read"
|
|
group asd:(0x0c0+0xc001d400)++0x07
|
|
line.long 0x00 "TIMESTAMP_LOW,Timestamp[31:0]"
|
|
line.long 0x04 "TIMESTAMP_HIGH,Timestamp[63:32]"
|
|
group asd:(0x100+0xc001d400)++0x03
|
|
line.long 0x00 "NEXT_NEIGHBOR_SIGNAL,Signal a Context in the Next Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x104+0xc001d400)++0x03
|
|
line.long 0x00 "PREV_NEIGHBOR_SIGNAL,Signal a Context in the Previous Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x108+0xc001d400)++0x03
|
|
line.long 0x00 "SAME_ME_SIGNAL,Signal another Context in the same Microengine"
|
|
bitfld.long 0x00 7. "NEXT_CTX ,Controls" "use CTX field,next CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the same Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the same Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x140+0xc001d400)++0x03
|
|
line.long 0x00 "CRC_REMAINDER,Input Operand and result of CRC instruction"
|
|
group asd:(0x144+0xc001d400)++0x03
|
|
line.long 0x00 "PROFILE_COUNT,Profile Count"
|
|
hexmask.long 0x00 0.--15. 0x01 "PROFILE_COUNT ,Count advances by one every cycle"
|
|
group asd:(0x148+0xc001d400)++0x03
|
|
line.long 0x00 "PSEUDO_RANDOM_NUMBER,Pseudo Random Number"
|
|
;group asd:(0x180+%1)++0x03
|
|
hide.long 0x38 "LOCAL_CSR_STATUS,LOCAL_CSR_STATUS"
|
|
in
|
|
; bitfld.long 0x0 0. " STATUS ,Local CSR Status" "no acc,acc"
|
|
group asd:(0x3fc+0xc001d400)++0x03
|
|
line.long 0x00 "RESERVED,This address can always be used and no register will be written"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-me.ph
|
|
;begin include file xscale/ixp2400-me.ph
|
|
;parameters: 0xc001d800 1_6
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400
|
|
; State: ok
|
|
;
|
|
; IXP2400-ME %1 %2
|
|
;
|
|
; %1 address offset (0x100 * %2)
|
|
; %2 ME number (0..15)
|
|
; --------------------------------------------------------------------------------
|
|
tree "ME_1_6"
|
|
; --------------------------------------------------------------------------------
|
|
width 24.
|
|
group asd:(0x000+0xc001d800)++0x03
|
|
line.long 0x00 "USTORE_ADDRESS,USTORE_ADDRESS"
|
|
bitfld.long 0x00 31. "ECS ,Execution" "norm,rd/wr"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADR ,Contains the address of the Control Store location"
|
|
group asd:(0x004+0xc001d800)++0x03
|
|
line.long 0x00 "USTORE_DATA_LOWER,Control Store Data Bits [31..0]"
|
|
group asd:(0x008+0xc001d800)++0x03
|
|
line.long 0x00 "USTORE_DATA_UPPER,Upper Control Store Data Bits"
|
|
bitfld.long 0x00 9.--9. "PAR[39:20] ,Contains odd Parity for data bits [39:20]" "0,1"
|
|
bitfld.long 0x00 8.--8. " PAR[19:0] ,Contains odd Parity for data bits [19:0]" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " UDATA_UPPER ,Control Store Data Bits [39..32]"
|
|
group asd:(0x00c+0xc001d800)++0x03
|
|
line.long 0x00 "USTORE_ERROR_STATUS,Information about parity error during instruction reads"
|
|
bitfld.long 0x00 16.--18. "CTX ,Context that was executed when parity error occurred" "0,1,2,3,4,5,6,7"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADDR ,Adress that had the Parity Error"
|
|
group asd:(0x010+0xc001d800)++0x03
|
|
line.long 0x00 "ALU_OUT,ALU Output"
|
|
group asd:(0x014+0xc001d800)++0x03
|
|
line.long 0x00 "CTX_ARB_CNTL,Context Arbiter Control Register"
|
|
bitfld.long 0x00 4.--6. "PCTX ,Previous Context" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " NCTX ,Next Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x018+0xc001d800)++0x03
|
|
line.long 0x00 "CTX_ENABLES,Context Enable Register"
|
|
bitfld.long 0x00 31. "IN_USE_CTX ,in-use contexts" "0-7,0/2/4/6"
|
|
bitfld.long 0x00 30. " PRN Mode ,Operation of Pseudo Random Number Update" "load/read,every cycle"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CTL_STR_PAR_ER ,Parity error detected" "no,yes"
|
|
bitfld.long 0x00 28. " CTL_STR_PAR_EN ,Enables parity checking on Control Store" "dis,ena"
|
|
bitfld.long 0x00 27. " BREAKPOINT ,Breakpoint instruction was executed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NN_MODE ,Controls how the Next Neighbor Registers are written" "prev ME,this ME"
|
|
bitfld.long 0x00 18.--19. " NN_RING_EMPTY ,Controls Threshold when NN_EMPTY asserts" "0 entries,1 entry,2 entries,3 entries"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LM_ADDR_1_GLOB ,Control usage of LM_ADDR_1" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LM_ADDR_0_GLOB ,Control usage of LM_ADDR_0" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CTX_EN7 ,Context 7 Enable" "dis,ena"
|
|
bitfld.long 0x00 14. " CTX_EN6 ,Context 6 Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " CTX_EN5 ,Context 5 Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " CTX_EN4 ,Context 4 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTX_EN3 ,Context 3 Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " CTX_EN2 ,Context 2 Enable" "dis,ena"
|
|
bitfld.long 0x00 9. " CTX_EN1 ,Context 1 Enable" "dis,ena"
|
|
bitfld.long 0x00 8. " CTX_EN0 ,Context 0 Enable" "dis,ena"
|
|
group asd:(0x01c+0xc001d800)++0x03
|
|
line.long 0x00 "CC_ENABLE,CC_ENABLE"
|
|
bitfld.long 0x00 13. "CCCE ,Current Condition Code Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--2. " PMU CTX Monitor ,Number of the context to be monitored" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x020+0xc001d800)++0x03
|
|
line.long 0x00 "CSR_CTX_POINTER,Pointer to select which Cobntexts' registers is read"
|
|
bitfld.long 0x00 0.--2. "CTX ,Selects which contexts local CSR is accessed" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x040+0xc001d800)++0x03
|
|
line.long 0x00 "IND_CTX_STS,Indirect Context Status Register"
|
|
bitfld.long 0x00 16. "RR ,Ready to Run" "no,yes"
|
|
hexmask.long 0x00 0.--12. 0x01 " CTX_PC ,Program Counter"
|
|
group asd:(0x044+0xc001d800)++0x03
|
|
line.long 0x00 "ACT_CTX_STS,Active Context Status Register"
|
|
bitfld.long 0x00 31. "AB0 ,Microengine has a Context in executing state" "no,yes"
|
|
hexmask.long 0x00 8.--20. 0x01 " ACTXPC ,PC of Execution Context"
|
|
bitfld.long 0x00 3.--7. " ME_NO ,Number of Microengine" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 0.--2. " ACNO ,Number of Executing Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x048+0xc001d800)++0x03
|
|
line.long 0x00 "IND_CTX_SIG_EVENTS,Indirect Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x04c+0xc001d800)++0x03
|
|
line.long 0x00 "ACT_CTX_SIG_EVENTS,Active Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x050+0xc001d800)++0x03
|
|
line.long 0x00 "IND_CTX_WAKEUP_EVENTS,Indirect Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x054+0xc001d800)++0x03
|
|
line.long 0x00 "ACT_CTX_WAKEUP_EVENTS,Active Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x058+0xc001d800)++0x03
|
|
line.long 0x00 "IND_CTX_FUTURE_COUNT,Indirect Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x05c+0xc001d800)++0x03
|
|
line.long 0x00 "ACT_CTX_FUTURE_COUNT,Active Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x060+0xc001d800)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0,LM_ADDR_0 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x00 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x04 "ACT_LM_ADDR_0,Access working copy LM_ADDR_0"
|
|
hexmask.long 0x04 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x08 "IND_LM_ADDR_1,LM_ADDR_1 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x08 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x0c "ACT_LM_ADDR_1,Access working copy LM_ADDR_1"
|
|
hexmask.long 0x0c 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
group asd:(0x070+0xc001d800)++0x03
|
|
line.long 0x00 "BYTE_IDX,Controls the byte shift amount during Byte_Align instructions"
|
|
bitfld.long 0x00 0.--1. "BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0e0+0xc001d800)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0_BYTE_IDX,Read or writes IND_LM_ADDR_0 and BYTE_IDX"
|
|
hexmask.long 0x00 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x04 "ACT_LM_ADDR_0_BYTE_IDX,ACT_LM_ADDR_0_BYTE_IDX"
|
|
hexmask.long 0x04 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x04 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x08 "IND_LM_ADDR_1_BYTE_IDX,IND_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x08 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x08 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x0c "ACT_LM_ADDR_1_BYTE_IDX,ACT_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x0c 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x0c 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0f4+0xc001d800)++0x03
|
|
line.long 0x00 "T_IDX_BYTE_IDX,Read or writes T_IDX and BYTE_IDX register"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x074+0xc001d800)++0x03
|
|
line.long 0x00 "T_IDX,Index register for S_TRANSFER or D_TRANSFER"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
group asd:(0x078+0xc001d800)++0x03
|
|
line.long 0x00 "IND_FUTURE_COUNT_SIGNAL,Indirect Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x07c+0xc001d800)++0x03
|
|
line.long 0x00 "ACT_FUTURE_COUNT_SIGNAL,Active Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x080+0xc001d800)++0x03
|
|
line.long 0x00 "NN_PUT,Put Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to write"
|
|
group asd:(0x084+0xc001d800)++0x03
|
|
line.long 0x00 "NN_GET,Get Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to read"
|
|
group asd:(0x0c0+0xc001d800)++0x07
|
|
line.long 0x00 "TIMESTAMP_LOW,Timestamp[31:0]"
|
|
line.long 0x04 "TIMESTAMP_HIGH,Timestamp[63:32]"
|
|
group asd:(0x100+0xc001d800)++0x03
|
|
line.long 0x00 "NEXT_NEIGHBOR_SIGNAL,Signal a Context in the Next Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x104+0xc001d800)++0x03
|
|
line.long 0x00 "PREV_NEIGHBOR_SIGNAL,Signal a Context in the Previous Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x108+0xc001d800)++0x03
|
|
line.long 0x00 "SAME_ME_SIGNAL,Signal another Context in the same Microengine"
|
|
bitfld.long 0x00 7. "NEXT_CTX ,Controls" "use CTX field,next CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the same Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the same Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x140+0xc001d800)++0x03
|
|
line.long 0x00 "CRC_REMAINDER,Input Operand and result of CRC instruction"
|
|
group asd:(0x144+0xc001d800)++0x03
|
|
line.long 0x00 "PROFILE_COUNT,Profile Count"
|
|
hexmask.long 0x00 0.--15. 0x01 "PROFILE_COUNT ,Count advances by one every cycle"
|
|
group asd:(0x148+0xc001d800)++0x03
|
|
line.long 0x00 "PSEUDO_RANDOM_NUMBER,Pseudo Random Number"
|
|
;group asd:(0x180+%1)++0x03
|
|
hide.long 0x38 "LOCAL_CSR_STATUS,LOCAL_CSR_STATUS"
|
|
in
|
|
; bitfld.long 0x0 0. " STATUS ,Local CSR Status" "no acc,acc"
|
|
group asd:(0x3fc+0xc001d800)++0x03
|
|
line.long 0x00 "RESERVED,This address can always be used and no register will be written"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-me.ph
|
|
;begin include file xscale/ixp2400-me.ph
|
|
;parameters: 0xc001dc00 1_7
|
|
; --------------------------------------------------------------------------------
|
|
; IXP2400
|
|
; State: ok
|
|
;
|
|
; IXP2400-ME %1 %2
|
|
;
|
|
; %1 address offset (0x100 * %2)
|
|
; %2 ME number (0..15)
|
|
; --------------------------------------------------------------------------------
|
|
tree "ME_1_7"
|
|
; --------------------------------------------------------------------------------
|
|
width 24.
|
|
group asd:(0x000+0xc001dc00)++0x03
|
|
line.long 0x00 "USTORE_ADDRESS,USTORE_ADDRESS"
|
|
bitfld.long 0x00 31. "ECS ,Execution" "norm,rd/wr"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADR ,Contains the address of the Control Store location"
|
|
group asd:(0x004+0xc001dc00)++0x03
|
|
line.long 0x00 "USTORE_DATA_LOWER,Control Store Data Bits [31..0]"
|
|
group asd:(0x008+0xc001dc00)++0x03
|
|
line.long 0x00 "USTORE_DATA_UPPER,Upper Control Store Data Bits"
|
|
bitfld.long 0x00 9.--9. "PAR[39:20] ,Contains odd Parity for data bits [39:20]" "0,1"
|
|
bitfld.long 0x00 8.--8. " PAR[19:0] ,Contains odd Parity for data bits [19:0]" "0,1"
|
|
hexmask.long 0x00 0.--7. 0x01 " UDATA_UPPER ,Control Store Data Bits [39..32]"
|
|
group asd:(0x00c+0xc001dc00)++0x03
|
|
line.long 0x00 "USTORE_ERROR_STATUS,Information about parity error during instruction reads"
|
|
bitfld.long 0x00 16.--18. "CTX ,Context that was executed when parity error occurred" "0,1,2,3,4,5,6,7"
|
|
hexmask.long 0x00 0.--12. 0x01 " UADDR ,Adress that had the Parity Error"
|
|
group asd:(0x010+0xc001dc00)++0x03
|
|
line.long 0x00 "ALU_OUT,ALU Output"
|
|
group asd:(0x014+0xc001dc00)++0x03
|
|
line.long 0x00 "CTX_ARB_CNTL,Context Arbiter Control Register"
|
|
bitfld.long 0x00 4.--6. "PCTX ,Previous Context" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " NCTX ,Next Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x018+0xc001dc00)++0x03
|
|
line.long 0x00 "CTX_ENABLES,Context Enable Register"
|
|
bitfld.long 0x00 31. "IN_USE_CTX ,in-use contexts" "0-7,0/2/4/6"
|
|
bitfld.long 0x00 30. " PRN Mode ,Operation of Pseudo Random Number Update" "load/read,every cycle"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CTL_STR_PAR_ER ,Parity error detected" "no,yes"
|
|
bitfld.long 0x00 28. " CTL_STR_PAR_EN ,Enables parity checking on Control Store" "dis,ena"
|
|
bitfld.long 0x00 27. " BREAKPOINT ,Breakpoint instruction was executed" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NN_MODE ,Controls how the Next Neighbor Registers are written" "prev ME,this ME"
|
|
bitfld.long 0x00 18.--19. " NN_RING_EMPTY ,Controls Threshold when NN_EMPTY asserts" "0 entries,1 entry,2 entries,3 entries"
|
|
textline " "
|
|
bitfld.long 0x00 17. " LM_ADDR_1_GLOB ,Control usage of LM_ADDR_1" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LM_ADDR_0_GLOB ,Control usage of LM_ADDR_0" "context relative,global"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CTX_EN7 ,Context 7 Enable" "dis,ena"
|
|
bitfld.long 0x00 14. " CTX_EN6 ,Context 6 Enable" "dis,ena"
|
|
bitfld.long 0x00 13. " CTX_EN5 ,Context 5 Enable" "dis,ena"
|
|
bitfld.long 0x00 12. " CTX_EN4 ,Context 4 Enable" "dis,ena"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTX_EN3 ,Context 3 Enable" "dis,ena"
|
|
bitfld.long 0x00 10. " CTX_EN2 ,Context 2 Enable" "dis,ena"
|
|
bitfld.long 0x00 9. " CTX_EN1 ,Context 1 Enable" "dis,ena"
|
|
bitfld.long 0x00 8. " CTX_EN0 ,Context 0 Enable" "dis,ena"
|
|
group asd:(0x01c+0xc001dc00)++0x03
|
|
line.long 0x00 "CC_ENABLE,CC_ENABLE"
|
|
bitfld.long 0x00 13. "CCCE ,Current Condition Code Enable" "dis,ena"
|
|
bitfld.long 0x00 0.--2. " PMU CTX Monitor ,Number of the context to be monitored" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x020+0xc001dc00)++0x03
|
|
line.long 0x00 "CSR_CTX_POINTER,Pointer to select which Cobntexts' registers is read"
|
|
bitfld.long 0x00 0.--2. "CTX ,Selects which contexts local CSR is accessed" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x040+0xc001dc00)++0x03
|
|
line.long 0x00 "IND_CTX_STS,Indirect Context Status Register"
|
|
bitfld.long 0x00 16. "RR ,Ready to Run" "no,yes"
|
|
hexmask.long 0x00 0.--12. 0x01 " CTX_PC ,Program Counter"
|
|
group asd:(0x044+0xc001dc00)++0x03
|
|
line.long 0x00 "ACT_CTX_STS,Active Context Status Register"
|
|
bitfld.long 0x00 31. "AB0 ,Microengine has a Context in executing state" "no,yes"
|
|
hexmask.long 0x00 8.--20. 0x01 " ACTXPC ,PC of Execution Context"
|
|
bitfld.long 0x00 3.--7. " ME_NO ,Number of Microengine" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15"
|
|
bitfld.long 0x00 0.--2. " ACNO ,Number of Executing Context" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x048+0xc001dc00)++0x03
|
|
line.long 0x00 "IND_CTX_SIG_EVENTS,Indirect Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x04c+0xc001dc00)++0x03
|
|
line.long 0x00 "ACT_CTX_SIG_EVENTS,Active Contexts' Event Signals Status Information"
|
|
bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes"
|
|
group asd:(0x050+0xc001dc00)++0x03
|
|
line.long 0x00 "IND_CTX_WAKEUP_EVENTS,Indirect Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x054+0xc001dc00)++0x03
|
|
line.long 0x00 "ACT_CTX_WAKEUP_EVENTS,Active Contexts' Wakeup Event Signals Status Information"
|
|
bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes"
|
|
bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes"
|
|
group asd:(0x058+0xc001dc00)++0x03
|
|
line.long 0x00 "IND_CTX_FUTURE_COUNT,Indirect Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x05c+0xc001dc00)++0x03
|
|
line.long 0x00 "ACT_CTX_FUTURE_COUNT,Active Contexts' Timestamp compare value"
|
|
hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp"
|
|
group asd:(0x060+0xc001dc00)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0,LM_ADDR_0 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x00 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x04 "ACT_LM_ADDR_0,Access working copy LM_ADDR_0"
|
|
hexmask.long 0x04 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x08 "IND_LM_ADDR_1,LM_ADDR_1 selected by CSR_CTX_Pointer"
|
|
hexmask.long 0x08 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
line.long 0x0c "ACT_LM_ADDR_1,Access working copy LM_ADDR_1"
|
|
hexmask.long 0x0c 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
group asd:(0x070+0xc001dc00)++0x03
|
|
line.long 0x00 "BYTE_IDX,Controls the byte shift amount during Byte_Align instructions"
|
|
bitfld.long 0x00 0.--1. "BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0e0+0xc001dc00)++0x0f
|
|
line.long 0x00 "IND_LM_ADDR_0_BYTE_IDX,Read or writes IND_LM_ADDR_0 and BYTE_IDX"
|
|
hexmask.long 0x00 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x04 "ACT_LM_ADDR_0_BYTE_IDX,ACT_LM_ADDR_0_BYTE_IDX"
|
|
hexmask.long 0x04 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x04 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x08 "IND_LM_ADDR_1_BYTE_IDX,IND_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x08 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x08 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
line.long 0x0c "ACT_LM_ADDR_1_BYTE_IDX,ACT_LM_ADDR_1_BYTE_IDX"
|
|
hexmask.long 0x0c 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory"
|
|
bitfld.long 0x0c 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x0f4+0xc001dc00)++0x03
|
|
line.long 0x00 "T_IDX_BYTE_IDX,Read or writes T_IDX and BYTE_IDX register"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3"
|
|
group asd:(0x074+0xc001dc00)++0x03
|
|
line.long 0x00 "T_IDX,Index register for S_TRANSFER or D_TRANSFER"
|
|
hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index"
|
|
group asd:(0x078+0xc001dc00)++0x03
|
|
line.long 0x00 "IND_FUTURE_COUNT_SIGNAL,Indirect Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x07c+0xc001dc00)++0x03
|
|
line.long 0x00 "ACT_FUTURE_COUNT_SIGNAL,Active Contexts' FUTURE_COUNT Signal Register"
|
|
bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group asd:(0x080+0xc001dc00)++0x03
|
|
line.long 0x00 "NN_PUT,Put Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to write"
|
|
group asd:(0x084+0xc001dc00)++0x03
|
|
line.long 0x00 "NN_GET,Get Pointer Register for Next Neighbor Ring"
|
|
hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to read"
|
|
group asd:(0x0c0+0xc001dc00)++0x07
|
|
line.long 0x00 "TIMESTAMP_LOW,Timestamp[31:0]"
|
|
line.long 0x04 "TIMESTAMP_HIGH,Timestamp[63:32]"
|
|
group asd:(0x100+0xc001dc00)++0x03
|
|
line.long 0x00 "NEXT_NEIGHBOR_SIGNAL,Signal a Context in the Next Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x104+0xc001dc00)++0x03
|
|
line.long 0x00 "PREV_NEIGHBOR_SIGNAL,Signal a Context in the Previous Neighbor Microengine"
|
|
bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x108+0xc001dc00)++0x03
|
|
line.long 0x00 "SAME_ME_SIGNAL,Signal another Context in the same Microengine"
|
|
bitfld.long 0x00 7. "NEXT_CTX ,Controls" "use CTX field,next CTX"
|
|
bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the same Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. " CTX ,Context to signal in the same Neighbor Microengine" "0,1,2,3,4,5,6,7"
|
|
group asd:(0x140+0xc001dc00)++0x03
|
|
line.long 0x00 "CRC_REMAINDER,Input Operand and result of CRC instruction"
|
|
group asd:(0x144+0xc001dc00)++0x03
|
|
line.long 0x00 "PROFILE_COUNT,Profile Count"
|
|
hexmask.long 0x00 0.--15. 0x01 "PROFILE_COUNT ,Count advances by one every cycle"
|
|
group asd:(0x148+0xc001dc00)++0x03
|
|
line.long 0x00 "PSEUDO_RANDOM_NUMBER,Pseudo Random Number"
|
|
;group asd:(0x180+%1)++0x03
|
|
hide.long 0x38 "LOCAL_CSR_STATUS,LOCAL_CSR_STATUS"
|
|
in
|
|
; bitfld.long 0x0 0. " STATUS ,Local CSR Status" "no acc,acc"
|
|
group asd:(0x3fc+0xc001dc00)++0x03
|
|
line.long 0x00 "RESERVED,This address can always be used and no register will be written"
|
|
width 8.
|
|
tree.end
|
|
;end include file xscale/ixp2400-me.ph
|