5102 lines
322 KiB
Plaintext
5102 lines
322 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: AT91SAM7X128/256/512 On-Chip Peripherals
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; @Props: Released
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; @Author: GAC, LUK, WOJ
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; @Changelog:
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; 2006-04-04
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; 2006-08-17
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; 2007-12-20
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; @Manufacturer: ATMEL - Atmel Corporation
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; @Doc: doc6120.pdf (2006-02-02)
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; AT91SAM7X512_256-128_DS.pdf (6120G-ATARM-08-Oct-07)
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; @Core: ARM
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; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perat91sam7xx.per 17440 2024-02-02 15:33:08Z kwisniewski $
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; Problems and errors found in documentation:
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;
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; - VREG -
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; p. 88 - The VREG_MR's offset is wrong, it should be 0x0. PSTDBY bit field has wrong description, it should be: "Standby Mode".
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;
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; - PMC -
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; p. 196 - The descriptin of PMC_ACKR is missed, but probably very similar to PMC_MCKR from p. 195. It's implemented with a few
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; changes. CSS bit field has wrong full name, it should be: "Programmable Clock Selection".
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config 16. 8.
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width 0xB
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base ad:0x00000000
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tree "RSTC (Reset Controller)"
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base 0xfffffd00
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width 0x09
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wgroup.long 0x00++0x03
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line.long 0x00 "RSTC_CR,Reset Controller Control Register"
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hexmask.long.byte 0x0 24.--31. 1. " KEY ,Password"
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bitfld.long 0x00 3. " EXTRST ,External Reset" "No effect,Reset"
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bitfld.long 0x00 2. " PERRST ,Peripheral Reset" "No effect,Reset"
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textline " "
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bitfld.long 0x00 0. " PROCRST ,Processor Reset" "No effect,Reset"
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hgroup.long 0x04++0x03
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hide.long 0x00 "RSTC_SR,Reset Controller Status Register"
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in
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group.long 0x08++0x03
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line.long 0x00 "RSTC_MR,Reset Controller Mode Register"
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hexmask.long.byte 0x00 24.--31. 1. " KEY ,Password"
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bitfld.long 0x00 16. " BODIEN ,Brownout Detection Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 8.--11. " ERSTL ,External Reset Length" "2 cycles,4 cycles,8 cycles,16 cycles,32 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles,2048 cycles,4096 cycles,8192 cycles,16384 cycles,32768 cycles,65536 cycles"
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textline " "
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bitfld.long 0x00 4. " URSTIEN ,User Reset Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 0. " URSTEN ,User Reset Enable" "Disabled,Enabled"
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width 0xB
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tree.end
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tree "RTT (Real-Time Timer)"
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base 0xfffffd20
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width 0x08
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group.long 0x00++0x07
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line.long 0x00 "RTT_MR,Real-Time Timer Mode Register"
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bitfld.long 0x00 18. " RTTRST ,Real-Time Timer Restart" "Not restarted,Restarted"
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bitfld.long 0x00 17. " RTTINCIEN ,Real-Time Timer Increment Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 16. " ALMIEN ,Alarm Interrupt Enable" "Disabled,Enabled"
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textline " "
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hexmask.long.word 0x00 0.--15. 1. " RTPRES ,Real-Time Timer Prescaler Value"
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line.long 0x04 "RTT_AR,Real-Time Timer Alarm Register"
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rgroup.long 0x08++0x3
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line.long 0x00 "RTT_VR,Real-Time Timer Value Register"
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hgroup.long 0xC++0x3
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hide.long 0x0 "RTT_SR,Real-Time Timer Status Register"
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in
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base vm:0x0
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wgroup 0x0++0x0
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width 0xB
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tree.end
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tree "PIT (Periodic Interval Timer)"
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base 0xfffffd30
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width 0xa
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group.long 0x00++0x03
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line.long 0x00 "PIT_MR,Periodic Interval Timer Mode Register"
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bitfld.long 0x00 25. " PITIEN ,Periodic Interval Timer Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 24. " PITEN ,Period Interval Timer Enable" "Disabled,Enabled"
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hexmask.long.tbyte 0x00 0.--19. 1. 1. " PIV ,Periodic Interval Value"
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rgroup.long 0x04++0x3
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line.long 0x00 "PIT_SR,Periodic Interval Timer Status Register"
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bitfld.long 0x00 0. " PITS ,Period Interval Timer Status" "Not Reached,Reached"
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hgroup.long 0x8++0x3
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hide.long 0x0 "PIT_PIVR,Periodic Interval Timer Value Register"
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in
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rgroup.long 0xC++0x3
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line.long 0x0 "PIT_PIIR,Periodic Interval Timer Image Register"
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hexmask.long.word 0x0 20.--31. 1. " PICNT ,Periodic Interval Counter"
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hexmask.long.tbyte 0x0 0.--19. 1. " CPIV ,Current Periodic Interval Value"
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width 0xB
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tree.end
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tree "WDT (Watchdog Timer)"
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base 0xfffffd40
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width 0x8
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wgroup.long 0x00++0x03
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line.long 0x00 "WDT_CR,Watchdog Timer Control Register"
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hexmask.long.byte 0x00 24.--31. 1. " KEY ,Password"
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bitfld.long 0x00 0. " WDRSTT ,Watchdog Restart" "No effect,Restarted"
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group.long 0x04++0x03
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line.long 0x00 "WDT_MR,Watchdog Timer Mode Register"
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bitfld.long 0x00 29. " WDIDLEHLT ,Watchdog Idle Halt" "Started,Stopped"
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bitfld.long 0x00 28. " WDDBGHLT ,Watchdog Debug Halt" "Started,Stopped"
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hexmask.long.word 0x00 16.--27. 1. " WDD ,Watchdog Delta Value"
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textline " "
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bitfld.long 0x00 15. " WDDIS ,Watchdog Disable" "Enabled,Disabled"
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bitfld.long 0x00 14. " WDRPROC ,Watchdog Reset Processor" "All,Processor"
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bitfld.long 0x00 13. " WDRSTEN ,Watchdog Reset Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 12. " WDFIEN ,Watchdog Fault Interrupt Enable" "Disabled,Enabled"
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hexmask.long.word 0x00 0.--11. 1. " WDV ,Watchdog Counter Value"
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hgroup.long 0x08++0x03
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hide.long 0x00 "WDT_SR,Watchdog Timer Status Register"
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in
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base vm:0x0
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wgroup 0x0++0x0
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width 0xB
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tree.end
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tree "VREG (Voltage Regulator Mode Controller)"
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base 0xfffffd60
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width 0x09
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group.long 0x00++0x03
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line.long 0x00 "VREG_MR,Voltage Regulator Mode Register"
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bitfld.long 0x00 00. " PSTDBY ,Standby Mode" "Normal,Standby"
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width 0xB
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tree.end
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tree "MC (Memory Controller)"
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base 0xffffff00
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width 0x09
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wgroup.long 0x00++0x03
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line.long 0x00 "MC_RCR,MC Remap Control Register"
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bitfld.long 0x00 00. " RCB ,Remap Command Bit" "No effect,Restored"
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hgroup.long 0x04++0x3
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hide.long 0x00 "MC_ASR,MC Abort Status Register"
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in
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rgroup.long 0x8++0x3
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line.long 0x0 "MC_AASR,MC Abort Address Status Register"
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width 0xB
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tree.end
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sif (cpu()=="AT91SAM7X512")
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tree.open "EFC (Embedded Flash Controller)"
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tree "EFC 0 (Embedded Flash Controller 0)"
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base 0xffffff00
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width 0x8
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group.long 0x60++0x03
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line.long 0x00 "MC_FMR,MC Flash Mode Register"
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hexmask.long.byte 0x00 16.--23. 1. " FMCN ,Flash Microsecond Cycle Number"
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bitfld.long 0x00 8.--9. " FWS ,Flash Wait State (Read/Write Operations)" "1/2 cycles,2/3 cycles,3/4 cycles,4/4 cycles"
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bitfld.long 0x00 7. " NEBP ,No Erase Before Programming" "Erased,Not erased"
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textline " "
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bitfld.long 0x00 3. " PROGE ,Programming Error Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 2. " LOCKE ,Lock Error Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 0. " FRDY ,Flash Ready Interrupt Enable" "Disabled,Enabled"
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wgroup.long 0x64++0x03
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line.long 0x00 "MC_FCR,MC Flash Command Register"
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hexmask.long.byte 0x00 24.--31. 1. " KEY ,Write Protection Key"
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hexmask.long.word 0x00 8.--17. 1. " PAGEN ,Page Number"
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bitfld.long 0x00 0.--3. " FCMD ,Flash Command" "No command,WP,SLB,WPL,CLB,Reserved,Reserved,Reserved,EA,Reserved,Reserved,SGPB,Reserved,CGPB,Reserved,SSB"
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hgroup.long 0x68++0x03
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hide.long 0x00 "MC_FSR,MC Flash Status Register"
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in
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base vm:0x0
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wgroup 0x0++0x0
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width 0xB
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tree.end
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tree "EFC 1 (Embedded Flash Controller 1)"
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base 0xffffff10
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width 0x8
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group.long 0x60++0x03
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line.long 0x00 "MC_FMR,MC Flash Mode Register"
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hexmask.long.byte 0x00 16.--23. 1. " FMCN ,Flash Microsecond Cycle Number"
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bitfld.long 0x00 8.--9. " FWS ,Flash Wait State (Read/Write Operations)" "1/2 cycles,2/3 cycles,3/4 cycles,4/4 cycles"
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bitfld.long 0x00 7. " NEBP ,No Erase Before Programming" "Erased,Not erased"
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textline " "
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bitfld.long 0x00 3. " PROGE ,Programming Error Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 2. " LOCKE ,Lock Error Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 0. " FRDY ,Flash Ready Interrupt Enable" "Disabled,Enabled"
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wgroup.long 0x64++0x03
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line.long 0x00 "MC_FCR,MC Flash Command Register"
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hexmask.long.byte 0x00 24.--31. 1. " KEY ,Write Protection Key"
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hexmask.long.word 0x00 8.--17. 1. " PAGEN ,Page Number"
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bitfld.long 0x00 0.--3. " FCMD ,Flash Command" "No command,WP,SLB,WPL,CLB,Reserved,Reserved,Reserved,EA,Reserved,Reserved,SGPB,Reserved,CGPB,Reserved,SSB"
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hgroup.long 0x68++0x03
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hide.long 0x00 "MC_FSR,MC Flash Status Register"
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in
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base vm:0x0
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wgroup 0x0++0x0
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width 0xB
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tree.end
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tree.end
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else
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tree "EFC (Embedded Flash Controller)"
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base 0xffffff00
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width 0x8
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group.long 0x60++0x03
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line.long 0x00 "MC_FMR,MC Flash Mode Register"
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hexmask.long.byte 0x00 16.--23. 1. " FMCN ,Flash Microsecond Cycle Number"
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bitfld.long 0x00 8.--9. " FWS ,Flash Wait State (Read/Write Operations)" "1/2 cycles,2/3 cycles,3/4 cycles,4/4 cycles"
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bitfld.long 0x00 7. " NEBP ,No Erase Before Programming" "Erased,Not erased"
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textline " "
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bitfld.long 0x00 3. " PROGE ,Programming Error Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 2. " LOCKE ,Lock Error Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 0. " FRDY ,Flash Ready Interrupt Enable" "Disabled,Enabled"
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wgroup.long 0x64++0x03
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line.long 0x00 "MC_FCR,MC Flash Command Register"
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hexmask.long.byte 0x00 24.--31. 1. " KEY ,Write Protection Key"
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hexmask.long.word 0x00 8.--17. 1. " PAGEN ,Page Number"
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bitfld.long 0x00 0.--3. " FCMD ,Flash Command" "No command,WP,SLB,WPL,CLB,Reserved,Reserved,Reserved,EA,Reserved,Reserved,SGPB,Reserved,CGPB,Reserved,SSB"
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hgroup.long 0x68++0x03
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hide.long 0x00 "MC_FSR,MC Flash Status Register"
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in
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base vm:0x0
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wgroup 0x0++0x0
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width 0xB
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tree.end
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endif
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tree.open "PDC (Peripheral DMA Controller)"
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width 0xB
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base 0xFFFFF200
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tree "PDC_DBGU (Peripheral DMA Controller for Debug Unit)"
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group.long 0x100++0x27
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line.long 0x00 "DBGU_RPR,PDC/DBGU Receive Pointer Register"
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line.long 0x04 "DBGU_RCR,PDC/DBGU Receive Counter Register"
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hexmask.long.word 0x04 00.--15. 1. " RXCTR ,Receive Counter Value"
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line.long 0x08 "DBGU_TPR,PDC/DBGU Transmit Pointer Register"
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line.long 0x0C "DBGU_TCR,PDC/DBGU Transmit Counter Register"
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hexmask.long.word 0x0c 00.--15. 1. " TXCTR ,Transmit Counter Value"
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line.long 0x10 "DBGU_RNPR,PDC/DBGU Receive Next Pointer Register"
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line.long 0x14 "DBGU_RNCR,PDC/DBGU Receive Next Counter Register"
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hexmask.long.word 0x14 00.--15. 1. " RXNCR ,Receive Next Counter Value"
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line.long 0x18 "DBGU_TNPR,PDC/DBGU Transmit Next Pointer Register"
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line.long 0x1C "DBGU_TNCR,PDC/DBGU Transmit Next Counter Register"
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hexmask.long.word 0x1C 00.--15. 1. " TXNCR ,Transmit Next Counter Value"
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line.long 0x24 "DBGU_PTSR,PDC/DBGU Transfer Status Register"
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setclrfld.long 0x24 08. 0x20 8. 0x20 9. " TXTEN_set/clr ,Transmitter Transfer Enable" "Disabled,Enabled"
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setclrfld.long 0x24 00. 0x20 0. 0x20 1. " RXTEN_set/clr ,Receiver Transfer Enable" "Disabled,Enabled"
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tree.end
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width 0xB
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base 0xFFFE0000
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tree "PDC_SPI0 (Peripheral DMA Controller for Serial Peripheral Interface 0)"
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group.long 0x100++0x27
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line.long 0x00 "SPI0_RPR,PDC/SPI0 Receive Pointer Register"
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line.long 0x04 "SPI0_RCR,PDC/SPI0 Receive Counter Register"
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hexmask.long.word 0x04 00.--15. 1. " RXCTR ,Receive Counter Value"
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line.long 0x08 "SPI0_TPR,PDC/SPI0 Transmit Pointer Register"
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line.long 0x0C "SPI0_TCR,PDC/SPI0 Transmit Counter Register"
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hexmask.long.word 0x0c 00.--15. 1. " TXCTR ,Transmit Counter Value"
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line.long 0x10 "SPI0_RNPR,PDC/SPI0 Receive Next Pointer Register"
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line.long 0x14 "SPI0_RNCR,PDC/SPI0 Receive Next Counter Register"
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hexmask.long.word 0x14 00.--15. 1. " RXNCR ,Receive Next Counter Value"
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line.long 0x18 "SPI0_TNPR,PDC/SPI0 Transmit Next Pointer Register"
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line.long 0x1C "SPI0_TNCR,PDC/SPI0 Transmit Next Counter Register"
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hexmask.long.word 0x1C 00.--15. 1. " TXNCR ,Transmit Next Counter Value"
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line.long 0x24 "SPI0_PTSR,PDC/SPI0 Transfer Status Register"
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setclrfld.long 0x24 08. 0x20 8. 0x20 9. " TXTEN_set/clr ,Transmitter Transfer Enable" "Disabled,Enabled"
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setclrfld.long 0x24 00. 0x20 0. 0x20 1. " RXTEN_set/clr ,Receiver Transfer Enable" "Disabled,Enabled"
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tree.end
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width 0xB
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base 0xFFFE4000
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tree "PDC_SPI1 (Peripheral DMA Controller for Serial Peripheral Interface 1)"
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group.long 0x100++0x27
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line.long 0x00 "SPI1_RPR,PDC/SPI1 Receive Pointer Register"
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line.long 0x04 "SPI1_RCR,PDC/SPI1 Receive Counter Register"
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hexmask.long.word 0x04 00.--15. 1. " RXCTR ,Receive Counter Value"
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line.long 0x08 "SPI1_TPR,PDC/SPI1 Transmit Pointer Register"
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line.long 0x0C "SPI1_TCR,PDC/SPI1 Transmit Counter Register"
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hexmask.long.word 0x0c 00.--15. 1. " TXCTR ,Transmit Counter Value"
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line.long 0x10 "SPI1_RNPR,PDC/SPI1 Receive Next Pointer Register"
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line.long 0x14 "SPI1_RNCR,PDC/SPI1 Receive Next Counter Register"
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hexmask.long.word 0x14 00.--15. 1. " RXNCR ,Receive Next Counter Value"
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line.long 0x18 "SPI1_TNPR,PDC/SPI1 Transmit Next Pointer Register"
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line.long 0x1C "SPI1_TNCR,PDC/SPI1 Transmit Next Counter Register"
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hexmask.long.word 0x1C 00.--15. 1. " TXNCR ,Transmit Next Counter Value"
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line.long 0x24 "SPI1_PTSR,PDC/SPI1 Transfer Status Register"
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setclrfld.long 0x24 08. 0x20 8. 0x20 9. " TXTEN_set/clr ,Transmitter Transfer Enable" "Disabled,Enabled"
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setclrfld.long 0x24 00. 0x20 0. 0x20 1. " RXTEN_set/clr ,Receiver Transfer Enable" "Disabled,Enabled"
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tree.end
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width 0xD
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base 0xFFFC0000
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tree "PDC_USART0 (Peripheral DMA Controller for Universal Synchronous Asynchronous Receiver Transmitter 0)"
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group.long 0x100++0x27
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line.long 0x00 "USART0_RPR,PDC/USART0 Receive Pointer Register"
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line.long 0x04 "USART0_RCR,PDC/USART0 Receive Counter Register"
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hexmask.long.word 0x04 00.--15. 1. " RXCTR ,Receive Counter Value"
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line.long 0x08 "USART0_TPR,PDC/USART0 Transmit Pointer Register"
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line.long 0x0C "USART0_TCR,PDC/USART0 Transmit Counter Register"
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hexmask.long.word 0x0c 00.--15. 1. " TXCTR ,Transmit Counter Value"
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line.long 0x10 "USART0_RNPR,PDC/USART0 Receive Next Pointer Register"
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line.long 0x14 "USART0_RNCR,PDC/USART0 Receive Next Counter Register"
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hexmask.long.word 0x14 00.--15. 1. " RXNCR ,Receive Next Counter Value"
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line.long 0x18 "USART0_TNPR,PDC/USART0 Transmit Next Pointer Register"
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line.long 0x1C "USART0_TNCR,PDC/USART0 Transmit Next Counter Register"
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hexmask.long.word 0x1C 00.--15. 1. " TXNCR ,Transmit Next Counter Value"
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line.long 0x24 "USART0_PTSR,PDC/USART0 Transfer Status Register"
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setclrfld.long 0x24 08. 0x20 8. 0x20 9. " TXTEN_set/clr ,Transmitter Transfer Enable" "Disabled,Enabled"
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setclrfld.long 0x24 00. 0x20 0. 0x20 1. " RXTEN_set/clr ,Receiver Transfer Enable" "Disabled,Enabled"
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tree.end
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width 0xD
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base 0xFFFC4000
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tree "PDC_USART1 (Peripheral DMA Controller for Universal Synchronous Asynchronous Receiver Transmitter 1)"
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group.long 0x100++0x27
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line.long 0x00 "USART1_RPR,PDC/USART1 Receive Pointer Register"
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line.long 0x04 "USART1_RCR,PDC/USART1 Receive Counter Register"
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hexmask.long.word 0x04 00.--15. 1. " RXCTR ,Receive Counter Value"
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line.long 0x08 "USART1_TPR,PDC/USART1 Transmit Pointer Register"
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line.long 0x0C "USART1_TCR,PDC/USART1 Transmit Counter Register"
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hexmask.long.word 0x0c 00.--15. 1. " TXCTR ,Transmit Counter Value"
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line.long 0x10 "USART1_RNPR,PDC/USART1 Receive Next Pointer Register"
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line.long 0x14 "USART1_RNCR,PDC/USART1 Receive Next Counter Register"
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hexmask.long.word 0x14 00.--15. 1. " RXNCR ,Receive Next Counter Value"
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line.long 0x18 "USART1_TNPR,PDC/USART1 Transmit Next Pointer Register"
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line.long 0x1C "USART1_TNCR,PDC/USART1 Transmit Next Counter Register"
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hexmask.long.word 0x1C 00.--15. 1. " TXNCR ,Transmit Next Counter Value"
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line.long 0x24 "USART1_PTSR,PDC/USART1 Transfer Status Register"
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setclrfld.long 0x24 08. 0x20 8. 0x20 9. " TXTEN_set/clr ,Transmitter Transfer Enable" "Disabled,Enabled"
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setclrfld.long 0x24 00. 0x20 0. 0x20 1. " RXTEN_set/clr ,Receiver Transfer Enable" "Disabled,Enabled"
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tree.end
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width 0xB
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base 0xFFFD4000
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tree "PDC_SSC (Peripheral DMA Controller for Synchronous Serial Controller)"
|
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group.long 0x100++0x27
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line.long 0x00 "SSC_RPR,PDC/SSC Receive Pointer Register"
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line.long 0x04 "SSC_RCR,PDC/SSC Receive Counter Register"
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hexmask.long.word 0x04 00.--15. 1. " RXCTR ,Receive Counter Value"
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line.long 0x08 "SSC_TPR,PDC/SSC Transmit Pointer Register"
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line.long 0x0C "SSC_TCR,PDC/SSC Transmit Counter Register"
|
|
hexmask.long.word 0x0c 00.--15. 1. " TXCTR ,Transmit Counter Value"
|
|
line.long 0x10 "SSC_RNPR,PDC/SSC Receive Next Pointer Register"
|
|
line.long 0x14 "SSC_RNCR,PDC/SSC Receive Next Counter Register"
|
|
hexmask.long.word 0x14 00.--15. 1. " RXNCR ,Receive Next Counter Value"
|
|
line.long 0x18 "SSC_TNPR,PDC/SSC Transmit Next Pointer Register"
|
|
line.long 0x1C "SSC_TNCR,PDC/SSC Transmit Next Counter Register"
|
|
hexmask.long.word 0x1C 00.--15. 1. " TXNCR ,Transmit Next Counter Value"
|
|
line.long 0x24 "SSC_PTSR,PDC/SSC Transfer Status Register"
|
|
setclrfld.long 0x24 08. 0x20 8. 0x20 9. " TXTEN_set/clr ,Transmitter Transfer Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x24 00. 0x20 0. 0x20 1. " RXTEN_set/clr ,Receiver Transfer Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree.end
|
|
tree "AIC (Advanced Interrupt Controller)"
|
|
base 0xfffff000
|
|
tree "Source Mode Registers"
|
|
group.long 0x00++0x3
|
|
line.long 0x0 "AIC_SMR0,AIC Source Mode Register 0"
|
|
bitfld.long 0x0 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
group.long 0x4++0x7B
|
|
line.long 0x0 "AIC_SMR1 ,AIC Source Mode Register 1 "
|
|
bitfld.long 0x0 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x0 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "AIC_SMR2 ,AIC Source Mode Register 2 "
|
|
bitfld.long 0x4 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x4 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "AIC_SMR3 ,AIC Source Mode Register 3 "
|
|
bitfld.long 0x8 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x8 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "AIC_SMR4 ,AIC Source Mode Register 4 "
|
|
bitfld.long 0xC 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0xC 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "AIC_SMR5 ,AIC Source Mode Register 5 "
|
|
bitfld.long 0x10 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x10 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "AIC_SMR6 ,AIC Source Mode Register 6 "
|
|
bitfld.long 0x14 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x14 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "AIC_SMR7 ,AIC Source Mode Register 7 "
|
|
bitfld.long 0x18 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x18 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "AIC_SMR8 ,AIC Source Mode Register 8 "
|
|
bitfld.long 0x1C 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x1C 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x20 "AIC_SMR9 ,AIC Source Mode Register 9 "
|
|
bitfld.long 0x20 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x20 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x24 "AIC_SMR10,AIC Source Mode Register 10"
|
|
bitfld.long 0x24 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x24 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x28 "AIC_SMR11,AIC Source Mode Register 11"
|
|
bitfld.long 0x28 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x28 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x2C "AIC_SMR12,AIC Source Mode Register 12"
|
|
bitfld.long 0x2C 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x2C 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x30 "AIC_SMR13,AIC Source Mode Register 13"
|
|
bitfld.long 0x30 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x30 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x34 "AIC_SMR14,AIC Source Mode Register 14"
|
|
bitfld.long 0x34 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x34 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x38 "AIC_SMR15,AIC Source Mode Register 15"
|
|
bitfld.long 0x38 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x38 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x3C "AIC_SMR16,AIC Source Mode Register 16"
|
|
bitfld.long 0x3C 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x3C 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x40 "AIC_SMR17,AIC Source Mode Register 17"
|
|
bitfld.long 0x40 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x40 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x44 "AIC_SMR18,AIC Source Mode Register 18"
|
|
bitfld.long 0x44 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x44 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x48 "AIC_SMR19,AIC Source Mode Register 19"
|
|
bitfld.long 0x48 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x48 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4C "AIC_SMR20,AIC Source Mode Register 20"
|
|
bitfld.long 0x4C 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x4C 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x50 "AIC_SMR21,AIC Source Mode Register 21"
|
|
bitfld.long 0x50 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x50 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x54 "AIC_SMR22,AIC Source Mode Register 22"
|
|
bitfld.long 0x54 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x54 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x58 "AIC_SMR23,AIC Source Mode Register 23"
|
|
bitfld.long 0x58 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x58 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x5C "AIC_SMR24,AIC Source Mode Register 24"
|
|
bitfld.long 0x5C 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x5C 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x60 "AIC_SMR25,AIC Source Mode Register 25"
|
|
bitfld.long 0x60 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x60 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x64 "AIC_SMR26,AIC Source Mode Register 26"
|
|
bitfld.long 0x64 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x64 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x68 "AIC_SMR27,AIC Source Mode Register 27"
|
|
bitfld.long 0x68 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x68 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x6C "AIC_SMR28,AIC Source Mode Register 28"
|
|
bitfld.long 0x6C 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x6C 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x70 "AIC_SMR29,AIC Source Mode Register 29"
|
|
bitfld.long 0x70 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x70 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x74 "AIC_SMR30,AIC Source Mode Register 30"
|
|
bitfld.long 0x74 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x74 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x78 "AIC_SMR31,AIC Source Mode Register 31"
|
|
bitfld.long 0x78 05.--06. " SRCTYPE ,Internal/External Interrupt Source Type" "High/low,Positive/negative,High,Positive"
|
|
bitfld.long 0x78 00.--02. " PRIOR ,Priority Level" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "Source Vector Registers"
|
|
textline ""
|
|
group.long 0x80++0x7f
|
|
line.long 0x0 "AIC_SVR0 ,AIC Source Vector Register 0 "
|
|
line.long 0x4 "AIC_SVR1 ,AIC Source Vector Register 1 "
|
|
line.long 0x8 "AIC_SVR2 ,AIC Source Vector Register 2 "
|
|
line.long 0xC "AIC_SVR3 ,AIC Source Vector Register 3 "
|
|
line.long 0x10 "AIC_SVR4 ,AIC Source Vector Register 4 "
|
|
line.long 0x14 "AIC_SVR5 ,AIC Source Vector Register 5 "
|
|
line.long 0x18 "AIC_SVR6 ,AIC Source Vector Register 6 "
|
|
line.long 0x1C "AIC_SVR7 ,AIC Source Vector Register 7 "
|
|
line.long 0x20 "AIC_SVR8 ,AIC Source Vector Register 8 "
|
|
line.long 0x24 "AIC_SVR9 ,AIC Source Vector Register 9 "
|
|
line.long 0x28 "AIC_SVR10,AIC Source Vector Register 10"
|
|
line.long 0x2C "AIC_SVR11,AIC Source Vector Register 11"
|
|
line.long 0x30 "AIC_SVR12,AIC Source Vector Register 12"
|
|
line.long 0x34 "AIC_SVR13,AIC Source Vector Register 13"
|
|
line.long 0x38 "AIC_SVR14,AIC Source Vector Register 14"
|
|
line.long 0x3C "AIC_SVR15,AIC Source Vector Register 15"
|
|
line.long 0x40 "AIC_SVR16,AIC Source Vector Register 16"
|
|
line.long 0x44 "AIC_SVR17,AIC Source Vector Register 17"
|
|
line.long 0x48 "AIC_SVR18,AIC Source Vector Register 18"
|
|
line.long 0x4C "AIC_SVR19,AIC Source Vector Register 19"
|
|
line.long 0x50 "AIC_SVR20,AIC Source Vector Register 20"
|
|
line.long 0x54 "AIC_SVR21,AIC Source Vector Register 21"
|
|
line.long 0x58 "AIC_SVR22,AIC Source Vector Register 22"
|
|
line.long 0x5C "AIC_SVR23,AIC Source Vector Register 23"
|
|
line.long 0x60 "AIC_SVR24,AIC Source Vector Register 24"
|
|
line.long 0x64 "AIC_SVR25,AIC Source Vector Register 25"
|
|
line.long 0x68 "AIC_SVR26,AIC Source Vector Register 26"
|
|
line.long 0x6C "AIC_SVR27,AIC Source Vector Register 27"
|
|
line.long 0x70 "AIC_SVR28,AIC Source Vector Register 28"
|
|
line.long 0x74 "AIC_SVR29,AIC Source Vector Register 29"
|
|
line.long 0x78 "AIC_SVR30,AIC Source Vector Register 30"
|
|
line.long 0x7C "AIC_SVR31,AIC Source Vector Register 31"
|
|
tree.end
|
|
textline " "
|
|
hgroup.long 0x100++0x3
|
|
hide.long 0x00 "AIC_IVR,AIC Interrupt Vector Register"
|
|
in
|
|
rgroup.long 0x104++0x7
|
|
line.long 0x0 "AIC_FVR,AIC FIQ Vector Register"
|
|
line.long 0x4 "AIC_ISR,AIC Interrupt Status Register"
|
|
bitfld.long 0x4 0.--4. " IRQID ,Current Interrupt Identifier" "Source 0,Source 1,Source 2,Source 3,Source 4,Source 5,Source 6,Source 7,Source 8,Source 9,Source 10,Source 11,Source 12,Source 13,Source 14,Source 15,Source 16,Source 17,Source 18,Source 19,Source 20,Source 21,Source 22,Source 23,Source 24,Source 25,Source 26,Source 27,Source 28,Source 29,Source 30,Source 31"
|
|
group.long 0x10C++0x7
|
|
line.long 0x0 "AIC_IPR,AIC Interrupt Pending Register"
|
|
setclrfld.long 0x0 31. 0x20 31. 0x1C 31. " PID31_Clear/Set ,Interrupt 31 Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0 30. 0x20 30. 0x1C 30. " PID30_Clear/Set ,Interrupt 30 Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 29. 0x20 29. 0x1C 29. " PID29_Clear/Set ,Interrupt 29 Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0 28. 0x20 28. 0x1C 28. " PID28_Clear/Set ,Interrupt 28 Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 27. 0x20 27. 0x1C 27. " PID27_Clear/Set ,Interrupt 27 Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0 26. 0x20 26. 0x1C 26. " PID26_Clear/Set ,Interrupt 26 Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 25. 0x20 25. 0x1C 25. " PID25_Clear/Set ,Interrupt 25 Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0 24. 0x20 24. 0x1C 24. " PID24_Clear/Set ,Interrupt 24 Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 23. 0x20 23. 0x1C 23. " PID23_Clear/Set ,Interrupt 23 Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0 22. 0x20 22. 0x1C 22. " PID22_Clear/Set ,Interrupt 22 Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 21. 0x20 21. 0x1C 21. " PID21_Clear/Set ,Interrupt 21 Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0 20. 0x20 20. 0x1C 20. " PID20_Clear/Set ,Interrupt 20 Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 19. 0x20 19. 0x1C 19. " PID19_Clear/Set ,Interrupt 19 Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0 18. 0x20 18. 0x1C 18. " PID18_Clear/Set ,Interrupt 18 Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 17. 0x20 17. 0x1C 17. " PID17_Clear/Set ,Interrupt 17 Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0 16. 0x20 16. 0x1C 16. " PID16_Clear/Set ,Interrupt 16 Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 15. 0x20 15. 0x1C 15. " PID15_Clear/Set ,Interrupt 15 Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0 14. 0x20 14. 0x1C 14. " PID14_Clear/Set ,Interrupt 14 Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 13. 0x20 13. 0x1C 13. " PID13_Clear/Set ,Interrupt 13 Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0 12. 0x20 12. 0x1C 12. " PID12_Clear/Set ,Interrupt 12 Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 11. 0x20 11. 0x1C 11. " PID11_Clear/Set ,Interrupt 11 Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0 10. 0x20 10. 0x1C 10. " PID10_Clear/Set ,Interrupt 10 Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 9. 0x20 9. 0x1C 9. " PID9_Clear/Set ,Interrupt 9 Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0 8. 0x20 8. 0x1C 8. " PID8_Clear/Set ,Interrupt 8 Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 7. 0x20 7. 0x1C 7. " PID7_Clear/Set ,Interrupt 7 Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0 6. 0x20 6. 0x1C 6. " PID6_Clear/Set ,Interrupt 6 Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 5. 0x20 5. 0x1C 5. " PID5_Clear/Set ,Interrupt 5 Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0 4. 0x20 4. 0x1C 4. " PID4_Clear/Set ,Interrupt 4 Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 3. 0x20 3. 0x1C 3. " PID3_Clear/Set ,Interrupt 3 Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0 2. 0x20 2. 0x1C 2. " PID2_Clear/Set ,Interrupt 2 Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 1. 0x20 1. 0x1C 1. " SYS_Clear/Set ,SYS Interrupt Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0 0. 0x20 0. 0x1C 0. " FIQ_Clear/Set ,FIQ Interrupt Pending" "Not pending,Pending"
|
|
line.long 0x4 "AIC_IMR,AIC Interrupt Mask Register"
|
|
setclrfld.long 0x4 31. 0x14 31. 0x18 31. " PID31_Clear/Set ,Interrupt 31 Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x4 30. 0x14 30. 0x18 30. " PID30_Clear/Set ,Interrupt 30 Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 29. 0x14 29. 0x18 29. " PID29_Clear/Set ,Interrupt 29 Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x4 28. 0x14 28. 0x18 28. " PID28_Clear/Set ,Interrupt 28 Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 27. 0x14 27. 0x18 27. " PID27_Clear/Set ,Interrupt 27 Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x4 26. 0x14 26. 0x18 26. " PID26_Clear/Set ,Interrupt 26 Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 25. 0x14 25. 0x18 25. " PID25_Clear/Set ,Interrupt 25 Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x4 24. 0x14 24. 0x18 24. " PID24_Clear/Set ,Interrupt 24 Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 23. 0x14 23. 0x18 23. " PID23_Clear/Set ,Interrupt 23 Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x4 22. 0x14 22. 0x18 22. " PID22_Clear/Set ,Interrupt 22 Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 21. 0x14 21. 0x18 21. " PID21_Clear/Set ,Interrupt 21 Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x4 20. 0x14 20. 0x18 20. " PID20_Clear/Set ,Interrupt 20 Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 19. 0x14 19. 0x18 19. " PID19_Clear/Set ,Interrupt 19 Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x4 18. 0x14 18. 0x18 18. " PID18_Clear/Set ,Interrupt 18 Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 17. 0x14 17. 0x18 17. " PID17_Clear/Set ,Interrupt 17 Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x4 16. 0x14 16. 0x18 16. " PID16_Clear/Set ,Interrupt 16 Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 15. 0x14 15. 0x18 15. " PID15_Clear/Set ,Interrupt 15 Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x4 14. 0x14 14. 0x18 14. " PID14_Clear/Set ,Interrupt 14 Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 13. 0x14 13. 0x18 13. " PID13_Clear/Set ,Interrupt 13 Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x4 12. 0x14 12. 0x18 12. " PID12_Clear/Set ,Interrupt 12 Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 11. 0x14 11. 0x18 11. " PID11_Clear/Set ,Interrupt 11 Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x4 10. 0x14 10. 0x18 10. " PID10_Clear/Set ,Interrupt 10 Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 9. 0x14 9. 0x18 9. " PID9_Clear/Set ,Interrupt 9 Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x4 8. 0x14 8. 0x18 8. " PID8_Clear/Set ,Interrupt 8 Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 7. 0x14 7. 0x18 7. " PID7_Clear/Set ,Interrupt 7 Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x4 6. 0x14 6. 0x18 6. " PID6_Clear/Set ,Interrupt 6 Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 5. 0x14 5. 0x18 5. " PID5_Clear/Set ,Interrupt 5 Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x4 4. 0x14 4. 0x18 4. " PID4_Clear/Set ,Interrupt 4 Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 3. 0x14 3. 0x18 3. " PID3_Clear/Set ,Interrupt 3 Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x4 2. 0x14 2. 0x18 2. " PID2_Clear/Set ,Interrupt 2 Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x4 01. 0x14 1. 0x18 1. " SYS_Clear/Set ,SYS Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x4 00. 0x14 0. 0x18 0. " FIQ_Clear/Set ,FIQ Interrupt Mask" "Disabled,Enabled"
|
|
rgroup.long 0x114++0x3
|
|
line.long 0x0 "AIC_CISR,AIC Core Interrupt Status Register"
|
|
bitfld.long 0x0 01. " NIRQ ,NIRQ Status" "Not activated,Activated"
|
|
bitfld.long 0x0 00. " NFIQ ,NFIQ Status" "Not activated,Activated"
|
|
wgroup.long 0x130++0x3
|
|
line.long 0x0 "AIC_EOICR,AIC End of Interrupt Command Register"
|
|
group.long 0x134++0x07
|
|
line.long 0x00 "AIC_SPU,AIC Spurious Interrupt Vector Register"
|
|
line.long 0x04 "AIC_DEBUG,AIC Debug Control Register"
|
|
bitfld.long 0x04 01. " GMSK ,General Mask" "Normal,Masked"
|
|
bitfld.long 0x04 00. " PROT ,Protection Mode" "Disabled,Enabled"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "AIC_FFSR,AIC Fast Forcing Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " PID31_Clear/Set ,Fast Forcing Status 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " PID30_Clear/Set ,Fast Forcing Status 30" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " PID29_Clear/Set ,Fast Forcing Status 29" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " PID28_Clear/Set ,Fast Forcing Status 28" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " PID27_Clear/Set ,Fast Forcing Status 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " PID26_Clear/Set ,Fast Forcing Status 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " PID25_Clear/Set ,Fast Forcing Status 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " PID24_Clear/Set ,Fast Forcing Status 24" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " PID23_Clear/Set ,Fast Forcing Status 23" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " PID22_Clear/Set ,Fast Forcing Status 22" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " PID21_Clear/Set ,Fast Forcing Status 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " PID20_Clear/Set ,Fast Forcing Status 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " PID19_Clear/Set ,Fast Forcing Status 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " PID18_Clear/Set ,Fast Forcing Status 18" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " PID17_Clear/Set ,Fast Forcing Status 17" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " PID16_Clear/Set ,Fast Forcing Status 16" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " PID15_Clear/Set ,Fast Forcing Status 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " PID14_Clear/Set ,Fast Forcing Status 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " PID13_Clear/Set ,Fast Forcing Status 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " PID12_Clear/Set ,Fast Forcing Status 12" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " PID11_Clear/Set ,Fast Forcing Status 11" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " PID10_Clear/Set ,Fast Forcing Status 10" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 09. -0x08 09. -0x04 9. " PID9_Clear/Set ,Fast Forcing Status 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 08. -0x08 08. -0x04 8. " PID8_Clear/Set ,Fast Forcing Status 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 07. -0x08 07. -0x04 7. " PID7_Clear/Set ,Fast Forcing Status 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 06. -0x08 06. -0x04 6. " PID6_Clear/Set ,Fast Forcing Status 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 05. -0x08 05. -0x04 5. " PID5_Clear/Set ,Fast Forcing Status 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 04. -0x08 04. -0x04 4. " PID4_Clear/Set ,Fast Forcing Status 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 03. -0x08 03. -0x04 3. " PID3_Clear/Set ,Fast Forcing Status 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 02. -0x08 02. -0x04 2. " PID2_Clear/Set ,Fast Forcing Status 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 01. -0x08 01. -0x04 01. " SYS_Clear/Set ,Fast Forcing Status SYS" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PMC (Power Management Controller)"
|
|
base 0xfffffc00
|
|
sif (cpu()=="AT91SAM7X512"||cpu()=="AT91SAM7X256"||cpu()=="AT91SAM7X128")
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "PMC_SCDR,System Clock Disable Register"
|
|
bitfld.long 0x00 0. " PCK ,Processor Clock Status" "Enabled,Disabled"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PMC_SCSR,PMC System Clock Status Register"
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " PCK3_Clear/Set ,Programmable Clock 3 Output Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " PCK2_Clear/Set ,Programmable Clock 2 Output Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " PCK1_Clear/Set ,Programmable Clock 1 Output Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " PCK0_Clear/Set ,Programmable Clock 0 Output Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " UDP_Clear/Set ,USB Device Port Clock Status" "Disabled,Enabled"
|
|
sif (cpu()=="AT91SAM7XC512"||cpu()=="AT91SAM7XC256"||cpu()=="AT91SAM7XC128")
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " PCK_Clear/Set ,Processor Clock Status" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 0. " PCK ,Processor Clock Status" "Enabled,Disabled"
|
|
endif
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PMC_PCSR,PMC Peripheral Clock Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " PID31_Clear/Set ,Peripheral Clock 31 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " PID30_Clear/Set ,Peripheral Clock 30 Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " PID29_Clear/Set ,Peripheral Clock 29 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " PID28_Clear/Set ,Peripheral Clock 28 Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " PID27_Clear/Set ,Peripheral Clock 27 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " PID26_Clear/Set ,Peripheral Clock 26 Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " PID25_Clear/Set ,Peripheral Clock 25 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " PID24_Clear/Set ,Peripheral Clock 24 Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " PID23_Clear/Set ,Peripheral Clock 23 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " PID22_Clear/Set ,Peripheral Clock 22 Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " PID21_Clear/Set ,Peripheral Clock 21 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " PID20_Clear/Set ,Peripheral Clock 20 Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " PID19_Clear/Set ,Peripheral Clock 19 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " PID18_Clear/Set ,Peripheral Clock 18 Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " PID17_Clear/Set ,Peripheral Clock 17 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " PID16_Clear/Set ,Peripheral Clock 16 Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " PID15_Clear/Set ,Peripheral Clock 15 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " PID14_Clear/Set ,Peripheral Clock 14 Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " PID13_Clear/Set ,Peripheral Clock 13 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " PID12_Clear/Set ,Peripheral Clock 12 Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " PID11_Clear/Set ,Peripheral Clock 11 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " PID10_Clear/Set ,Peripheral Clock 10 Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " PID9_Clear/Set ,Peripheral Clock 9 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " PID8_Clear/Set ,Peripheral Clock 8 Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " PID7_Clear/Set ,Peripheral Clock 7 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " PID6_Clear/Set ,Peripheral Clock 6 Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " PID5_Clear/Set ,Peripheral Clock 5 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " PID4_Clear/Set ,Peripheral Clock 4 Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " PID3_Clear/Set ,Peripheral Clock 3 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " PID2_Clear/Set ,Peripheral Clock 2 Status" "Disabled,Enabled"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CKGR_MOR,PMC Clock Generator Main Oscillator Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " OSCOUNT ,Main Oscillator Start-Up Time"
|
|
bitfld.long 0x00 1. " OSCBYPASS ,Oscillator Bypass" "No effect,Bypassed"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MOSCEN ,Main Oscillator Enable" "Disabled,Enabled"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "CKGR_MCFR,PMC Clock Generator Main Clock Frequency Register"
|
|
bitfld.long 0x00 16. " MAINRDY ,Main Clock Ready" "Not ready,Ready"
|
|
hexmask.long.word 0x00 0.--15. 1. " MAINF ,Main Clock Frequency"
|
|
group.long 0x2c++0x07
|
|
line.long 0x00 "CKGR_PLLR,PMC Clock Generator PLL Register"
|
|
bitfld.long 0x00 28.--29. " USBDIV ,USB Clock Divider" "Clock,Clock/2,Clock/4,?..."
|
|
hexmask.long.word 0x00 16.--26. 1. 1. " MUL ,PLL Multiplier"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " OUT ,PLL Clock Frequency Range" "80-160 MHz,Reserved,150-200 MHz,?..."
|
|
bitfld.long 0x00 8.--13. " PLLCOUNT ,PLL Counter" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,35 cycles,36 cycles,37 cycles,38 cycles,39 cycles,40 cycles,41 cycles,42 cycles,43 cycles,44 cycles,45 cycles,46 cycles,47 cycles,48 cycles,49 cycles,50 cycles,51 cycles,52 cycles,53 cycles,54 cycles,55 cycles,56 cycles,57 cycles,58 cycles,59 cycles,60 cycles,61 cycles,62 cycles,63 cycles"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DIV ,Divider"
|
|
line.long 0x04 "PMC_MCKR,PMC Master Clock Register"
|
|
bitfld.long 0x04 2.--4. " PRES ,Master Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..."
|
|
bitfld.long 0x04 0.--1. " CSS ,Master Clock Selection" "Slow,Main,Reserved,PLL"
|
|
sif (cpu()!="AT91SAM7XC512"&&cpu()!="AT91SAM7XC256"&&cpu()!="AT91SAM7XC128"&&cpu()!="AT91SAM7X512"&&cpu()!="AT91SAM7X256"&&cpu()!="AT91SAM7X128")
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "PMC_ACKR,PMC Application Clock Register"
|
|
bitfld.long 0x00 2.--4. " PRES ,Application Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..."
|
|
bitfld.long 0x00 0.--1. " CSS ,Application Clock Selection" "Slow,Main,Reserved,PLL"
|
|
endif
|
|
group.long 0x40++0x1F
|
|
line.long 0x0 "PMC_PCK0,PMC Programmable Clock 0 Register"
|
|
bitfld.long 0x0 2.--4. " PRES ,Programmable Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..."
|
|
bitfld.long 0x0 0.--1. " CSS ,Programmable Clock Selection" "Slow,Main,Reserved,PLL"
|
|
line.long 0x4 "PMC_PCK1,PMC Programmable Clock 1 Register"
|
|
bitfld.long 0x4 2.--4. " PRES ,Programmable Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..."
|
|
bitfld.long 0x4 0.--1. " CSS ,Programmable Clock Selection" "Slow,Main,Reserved,PLL"
|
|
line.long 0x8 "PMC_PCK2,PMC Programmable Clock 2 Register"
|
|
bitfld.long 0x8 2.--4. " PRES ,Programmable Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..."
|
|
bitfld.long 0x8 0.--1. " CSS ,Programmable Clock Selection" "Slow,Main,Reserved,PLL"
|
|
line.long 0xC "PMC_PCK3,PMC Programmable Clock 3 Register"
|
|
bitfld.long 0xC 2.--4. " PRES ,Programmable Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..."
|
|
bitfld.long 0xC 0.--1. " CSS ,Programmable Clock Selection" "Slow,Main,Reserved,PLL"
|
|
line.long 0x10 "PMC_PCK4,PMC Programmable Clock 4 Register"
|
|
bitfld.long 0x10 2.--4. " PRES ,Programmable Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..."
|
|
bitfld.long 0x10 0.--1. " CSS ,Programmable Clock Selection" "Slow,Main,Reserved,PLL"
|
|
line.long 0x14 "PMC_PCK5,PMC Programmable Clock 5 Register"
|
|
bitfld.long 0x14 2.--4. " PRES ,Programmable Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..."
|
|
bitfld.long 0x14 0.--1. " CSS ,Programmable Clock Selection" "Slow,Main,Reserved,PLL"
|
|
line.long 0x18 "PMC_PCK6,PMC Programmable Clock 6 Register"
|
|
bitfld.long 0x18 2.--4. " PRES ,Programmable Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..."
|
|
bitfld.long 0x18 0.--1. " CSS ,Programmable Clock Selection" "Slow,Main,Reserved,PLL"
|
|
line.long 0x1C "PMC_PCK7,PMC Programmable Clock 7 Register"
|
|
bitfld.long 0x1C 2.--4. " PRES ,Programmable Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..."
|
|
bitfld.long 0x1C 0.--1. " CSS ,Programmable Clock Selection" "Slow,Main,Reserved,PLL"
|
|
group.long 0x6c++0x3
|
|
line.long 0x0 "PMC_IMR,PMC Interrupt Mask Register"
|
|
setclrfld.long 0x0 09. -0x8 9. -0xc 9. " PCKRDY1_Clear/Set ,Programmable Clock Ready 1 Interrupt Mask" "Enabled,Disabled"
|
|
setclrfld.long 0x0 08. -0x8 8. -0xc 8. " PCKRDY0_Clear/Set ,Programmable Clock Ready 0 Interrupt Mask" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x0 03. -0x8 3. -0xc 3. " MCKRDY_Clear/Set ,Master Clock Ready Interrupt Mask" "Enabled,Disabled"
|
|
setclrfld.long 0x0 02. -0x8 2. -0xc 2. " LOCK_Clear/Set ,PLL Lock Interrupt Mask" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x0 00. -0x8 0. -0xc 0. " MOSCS_Clear/Set ,Main Oscillator Status Interrupt Mask" "Enabled,Disabled"
|
|
sif (cpu()!="AT91SAM7X512"&&cpu()!="AT91SAM7X256"&&cpu()!="AT91SAM7X128")
|
|
setclrfld.long 0x0 11. -0x8 11. -0xc 11. " PCKRDY3_Clear/Set ,Programmable Clock Ready 3 Interrupt Mask" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x0 10. -0x8 10. -0xc 10. " PCKRDY2_Clear/Set ,Programmable Clock Ready 2 Interrupt Mask" "Enabled,Disabled"
|
|
else
|
|
setclrfld.long 0x0 10. -0x8 10. -0xc 10. " PCKRDY2_Clear/Set ,Programmable Clock Ready 2 Interrupt Mask" "Enabled,Disabled"
|
|
endif
|
|
rgroup.long 0x68++0x3
|
|
line.long 0x0 "PMC_SR,PMC Status Register"
|
|
sif (cpu()!="AT91SAM7X512"&&cpu()!="AT91SAM7X256"&&cpu()!="AT91SAM7X128")
|
|
bitfld.long 0x0 11. " PCKRDY3 ,Programmable Clock Ready 3 Status" "Not ready,Ready"
|
|
bitfld.long 0x0 10. " PCKRDY2 ,Programmable Clock Ready 2 Status" "Not ready,Ready"
|
|
else
|
|
bitfld.long 0x0 10. " PCKRDY2 ,Programmable Clock Ready 2 Status" "Not ready,Ready"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x0 09. " PCKRDY1 ,Programmable Clock Ready 1 Status" "Not ready,Ready"
|
|
bitfld.long 0x0 08. " PCKRDY0 ,Programmable Clock Ready 0 Status" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x0 03. " MCKRDY ,Master Clock Status" "Not ready,Ready"
|
|
bitfld.long 0x0 02. " LOCK ,PLL Lock Status" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x0 00. " MOSCS ,MOSCS Flag Status" "Not stabilized,Stabilized"
|
|
tree.end
|
|
tree "DBGU (Debug Unit)"
|
|
base 0xfffff200
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "DBGU_CR,Debug Unit Control Register"
|
|
bitfld.long 0x00 8. " RSTSTA ,Status Bits Reset" "No effect,Reset"
|
|
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DBGU_MR,Debug Unit Mode Register"
|
|
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic,Local,Remote"
|
|
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Space,Mark,No parity,No parity,No parity,No parity"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DBGU_IMR,Debug Unit Interrupt Mask Register"
|
|
setclrfld.long 0x00 31. -0x8 31. -0x04 31. " COMMRX_set/clr ,COMMRX Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x8 30. -0x04 30. " COMMTX_set/clr ,COMMTX Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 12. -0x8 12. -0x04 12. " RXBUFF_set/clr ,RXBUFF Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. -0x8 11. -0x04 11. " TXBUFE_set/clr ,TXBUFE Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x8 9. -0x04 9. " TXEMPTY_set/clr ,TXEMPTY Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. -0x8 7. -0x04 7. " PARE_set/clr ,Parity Error Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. -0x8 6. -0x04 6. " FRAME_set/clr ,Framing Error Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x8 5. -0x04 5. " OVRE_set/clr ,Overrun Error Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x8 4. -0x04 4. " ENDTX_set/clr ,End of Transmit Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x8 3. -0x04 3. " ENDRX_set/clr ,End of Receive Transfer Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x8 1. -0x04 1. " TXRDY_set/clr ,TXRDY Interrupt Disable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x8 0. -0x04 0. " RXRDY_set/clr ,RXRDY Interrupt Mask" "Disabled,Enabled"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "DBGU_SR,Debug Unit Status Register"
|
|
bitfld.long 0x0 31. " COMMRX ,Debug Communication Channel Read Status" "Not activated,Activated"
|
|
bitfld.long 0x0 30. " COMMTX ,Debug Communication Channel Write Status" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x0 12. " RXBUFF ,Receive Buffer Full" "Not full,Full"
|
|
bitfld.long 0x0 11. " TXBUFE ,Transmission Buffer Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x0 9. " TXEMPTY ,Transmitter Empty" "Not empty,Empty"
|
|
bitfld.long 0x0 7. " PARE ,Parity Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 6. " FRAME ,Framing Error" "No error,Error"
|
|
bitfld.long 0x0 5. " OVRE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 4. " ENDTX ,Transmitter Transfer End" "Not activated,Activated"
|
|
bitfld.long 0x0 3. " ENDRX ,Receiver Transfer End" "Not activated,Activated"
|
|
textline " "
|
|
bitfld.long 0x0 1. " TXRDY ,Transmitter Ready" "Not ready,Ready"
|
|
bitfld.long 0x0 0. " RXRDY ,Receiver Ready" "Not ready,Ready"
|
|
hgroup.long 0x18++0x3
|
|
hide.long 0x0 "DBGU_RHR,Debug Unit Receiver Holding Register"
|
|
in
|
|
wgroup.long 0x1c++0x03
|
|
line.long 0x00 "DBGU_THR,Debug Unit Transmit Holding Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXCHR ,Character to Transmit"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DBGU_BRGR,Debug Unit Baud Rate Generator Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divisor"
|
|
rgroup.long 0x40++0x07
|
|
line.long 0x00 "DBGU_CIDR,Debug Unit Chip ID Register"
|
|
bitfld.long 0x00 31. " EXT ,Extension Flag" "Not implemented,Implemented"
|
|
bitfld.long 0x00 28.--30. " NVPTYP ,Nonvolatile Program Memory Type" "ROM,ROMless/flash,EFM,ROM/EFM,SRAM/ROM,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 20.--27. 1. " ARCH ,Architecture Identifier"
|
|
bitfld.long 0x00 16.--19. " SRAMSIZ ,Internal SRAM Size" "Reserved,1-KB,2-KB,Reserved,112-KB,4-KB,80-KB,160-KB,8-KB,16-KB,32-KB,64-KB,128-KB,256-KB,96-KB,512-KB"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " NVPSIZ2 ,Second Nonvolatile Program Memory Size" "Disabled,8-KB,16-KB,32-KB,Reserved,64-KB,Reserved,128-KB,Reserved,256-KB,512-KB,Reserved,1-MB,Reserved,2-MB,?..."
|
|
bitfld.long 0x00 8.--11. " NVPSIZ ,Nonvolatile Program Memory Size" "Disabled,8-KB,16-KB,32-KB,Reserved,64-KB,Reserved,128-KB,Reserved,256-KB,512-KB,Reserved,1-MB,Reserved,2-MB,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " EPROC ,Embedded Processor" "Reserved,ARM946E-S,ARM7TDMI,Reserved,ARM920T,ARM926EJ-S,?..."
|
|
bitfld.long 0x00 0.--4. " VERSION ,Device Version" "Version 0,Version 1,Version 2,Version 3,Version 4,Version 5,Version 6,Version 7,Version 8,Version 9,Version 10,Version 11,Version 12,Version 13,Version 14,Version 15,Version 16,Version 17,Version 18,Version 19,Version 20,Version 21,Version 22,Version 23,Version 24,Version 25,Version 26,Version 27,Version 28,Version 29,Version 30,Version 31"
|
|
line.long 0x04 "DBGU_EXID,Debug Unit Chip ID Extension Register"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DBGU_FNR,Debug Unit Force NTRST Register"
|
|
bitfld.long 0x00 0. " FNTRST ,NTRST Force" "Not forced,Forced"
|
|
tree.end
|
|
tree.open "PIOs (Parallel Input/Output Controllers)"
|
|
tree "PIOA (Parallel Input/Output Controller A)"
|
|
base 0xfffff400
|
|
tree "PIO Controller Registers"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PIO_PSRA,PIO Controller PIO Status Register A"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_Clear/Set ,PIO31 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_Clear/Set ,PIO30 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_Clear/Set ,PIO29 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_Clear/Set ,PIO28 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_Clear/Set ,PIO27 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_Clear/Set ,PIO26 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_Clear/Set ,PIO25 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_Clear/Set ,PIO24 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_Clear/Set ,PIO23 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_Clear/Set ,PIO22 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_Clear/Set ,PIO21 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_Clear/Set ,PIO20 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_Clear/Set ,PIO19 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_Clear/Set ,PIO18 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_Clear/Set ,PIO17 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_Clear/Set ,PIO16 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_Clear/Set ,PIO15 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_Clear/Set ,PIO14 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_Clear/Set ,PIO13 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_Clear/Set ,PIO12 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_Clear/Set ,PIO11 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_Clear/Set ,PIO10 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_Clear/Set ,PIO9 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_Clear/Set ,PIO8 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_Clear/Set ,PIO7 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_Clear/Set ,PIO6 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_Clear/Set ,PIO5 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_Clear/Set ,PIO4 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_Clear/Set ,PIO3 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_Clear/Set ,PIO2 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_Clear/Set ,PIO1 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_Clear/Set ,PIO0 Status" "Not activated,Activated"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PIO_OSRA,PIO Controller Output Status Register A"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_Clear/Set ,Output Status 31" "Input,Output"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_Clear/Set ,Output Status 30" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_Clear/Set ,Output Status 29" "Input,Output"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_Clear/Set ,Output Status 28" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_Clear/Set ,Output Status 27" "Input,Output"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_Clear/Set ,Output Status 26" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_Clear/Set ,Output Status 25" "Input,Output"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_Clear/Set ,Output Status 24" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_Clear/Set ,Output Status 23" "Input,Output"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_Clear/Set ,Output Status 22" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_Clear/Set ,Output Status 21" "Input,Output"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_Clear/Set ,Output Status 20" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_Clear/Set ,Output Status 19" "Input,Output"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_Clear/Set ,Output Status 18" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_Clear/Set ,Output Status 17" "Input,Output"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_Clear/Set ,Output Status 16" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_Clear/Set ,Output Status 15" "Input,Output"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_Clear/Set ,Output Status 14" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_Clear/Set ,Output Status 13" "Input,Output"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_Clear/Set ,Output Status 12" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_Clear/Set ,Output Status 11" "Input,Output"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_Clear/Set ,Output Status 10" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_Clear/Set ,Output Status 9" "Input,Output"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_Clear/Set ,Output Status 8" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_Clear/Set ,Output Status 7" "Input,Output"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_Clear/Set ,Output Status 6" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_Clear/Set ,Output Status 5" "Input,Output"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_Clear/Set ,Output Status 4" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_Clear/Set ,Output Status 3" "Input,Output"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_Clear/Set ,Output Status 2" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_Clear/Set ,Output Status 1" "Input,Output"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_Clear/Set ,Output Status 0" "Input,Output"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PIO_IFSRA,PIO Controller Input Filter Status Register A"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_Clear/Set ,Input Filter Status 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_Clear/Set ,Input Filter Status 30" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_Clear/Set ,Input Filter Status 29" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_Clear/Set ,Input Filter Status 28" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_Clear/Set ,Input Filter Status 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_Clear/Set ,Input Filter Status 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_Clear/Set ,Input Filter Status 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_Clear/Set ,Input Filter Status 24" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_Clear/Set ,Input Filter Status 23" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_Clear/Set ,Input Filter Status 22" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_Clear/Set ,Input Filter Status 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_Clear/Set ,Input Filter Status 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_Clear/Set ,Input Filter Status 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_Clear/Set ,Input Filter Status 18" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_Clear/Set ,Input Filter Status 17" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_Clear/Set ,Input Filter Status 16" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_Clear/Set ,Input Filter Status 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_Clear/Set ,Input Filter Status 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_Clear/Set ,Input Filter Status 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_Clear/Set ,Input Filter Status 12" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_Clear/Set ,Input Filter Status 11" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_Clear/Set ,Input Filter Status 10" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_Clear/Set ,Input Filter Status 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_Clear/Set ,Input Filter Status 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_Clear/Set ,Input Filter Status 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_Clear/Set ,Input Filter Status 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_Clear/Set ,Input Filter Status 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_Clear/Set ,Input Filter Status 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_Clear/Set ,Input Filter Status 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_Clear/Set ,Input Filter Status 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_Clear/Set ,Input Filter Status 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_Clear/Set ,Input Filter Status 0" "Disabled,Enabled"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "PIO_ODSRA,PIO Controller Output Data Status Register A"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_Clear/Set ,Output Data Status 31" "Low,High"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_Clear/Set ,Output Data Status 30" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_Clear/Set ,Output Data Status 29" "Low,High"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_Clear/Set ,Output Data Status 28" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_Clear/Set ,Output Data Status 27" "Low,High"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_Clear/Set ,Output Data Status 26" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_Clear/Set ,Output Data Status 25" "Low,High"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_Clear/Set ,Output Data Status 24" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_Clear/Set ,Output Data Status 23" "Low,High"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_Clear/Set ,Output Data Status 22" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_Clear/Set ,Output Data Status 21" "Low,High"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_Clear/Set ,Output Data Status 20" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_Clear/Set ,Output Data Status 19" "Low,High"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_Clear/Set ,Output Data Status 18" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_Clear/Set ,Output Data Status 17" "Low,High"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_Clear/Set ,Output Data Status 16" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_Clear/Set ,Output Data Status 15" "Low,High"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_Clear/Set ,Output Data Status 14" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_Clear/Set ,Output Data Status 13" "Low,High"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_Clear/Set ,Output Data Status 12" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_Clear/Set ,Output Data Status 11" "Low,High"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_Clear/Set ,Output Data Status 10" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_Clear/Set ,Output Data Status 9" "Low,High"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_Clear/Set ,Output Data Status 8" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_Clear/Set ,Output Data Status 7" "Low,High"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_Clear/Set ,Output Data Status 6" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_Clear/Set ,Output Data Status 5" "Low,High"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_Clear/Set ,Output Data Status 4" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_Clear/Set ,Output Data Status 3" "Low,High"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_Clear/Set ,Output Data Status 2" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_Clear/Set ,Output Data Status 1" "Low,High"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_Clear/Set ,Output Data Status 0" "Low,High"
|
|
rgroup.long 0x3c++0x03
|
|
line.long 0x00 "PIO_PDSRA,PIO Controller Pin Data Status Register A"
|
|
bitfld.long 0x00 31. " P31 ,Output Data Status 31" "Low,High"
|
|
bitfld.long 0x00 30. " P30 ,Output Data Status 30" "Low,High"
|
|
bitfld.long 0x00 29. " P29 ,Output Data Status 29" "Low,High"
|
|
bitfld.long 0x00 28. " P28 ,Output Data Status 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. "P27 ,Output Data Status 27" "Low,High"
|
|
bitfld.long 0x00 26. " P26 ,Output Data Status 26" "Low,High"
|
|
bitfld.long 0x00 25. " P25 ,Output Data Status 25" "Low,High"
|
|
bitfld.long 0x00 24. " P24 ,Output Data Status 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. "P23 ,Output Data Status 23" "Low,High"
|
|
bitfld.long 0x00 22. " P22 ,Output Data Status 22" "Low,High"
|
|
bitfld.long 0x00 21. " P21 ,Output Data Status 21" "Low,High"
|
|
bitfld.long 0x00 20. " P20 ,Output Data Status 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. "P19 ,Output Data Status 19" "Low,High"
|
|
bitfld.long 0x00 18. " P18 ,Output Data Status 18" "Low,High"
|
|
bitfld.long 0x00 17. " P17 ,Output Data Status 17" "Low,High"
|
|
bitfld.long 0x00 16. " P16 ,Output Data Status 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. "P15 ,Output Data Status 15" "Low,High"
|
|
bitfld.long 0x00 14. " P14 ,Output Data Status 14" "Low,High"
|
|
bitfld.long 0x00 13. " P13 ,Output Data Status 13" "Low,High"
|
|
bitfld.long 0x00 12. " P12 ,Output Data Status 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. "P11 ,Output Data Status 11" "Low,High"
|
|
bitfld.long 0x00 10. " P10 ,Output Data Status 10" "Low,High"
|
|
bitfld.long 0x00 9. " P9 ,Output Data Status 9" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,Output Data Status 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. "P7 ,Output Data Status 7" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,Output Data Status 6" "Low,High"
|
|
bitfld.long 0x00 5. " P5 ,Output Data Status 5" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,Output Data Status 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. "P3 ,Output Data Status 3" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,Output Data Status 2" "Low,High"
|
|
bitfld.long 0x00 1. " P1 ,Output Data Status 1" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,Output Data Status 0" "Low,High"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PIO_IMRA,PIO Controller Interrupt Mask Register A"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_Clear/Set ,Input Change Interrupt Mask 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_Clear/Set ,Input Change Interrupt Mask 30" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_Clear/Set ,Input Change Interrupt Mask 29" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_Clear/Set ,Input Change Interrupt Mask 28" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_Clear/Set ,Input Change Interrupt Mask 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_Clear/Set ,Input Change Interrupt Mask 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_Clear/Set ,Input Change Interrupt Mask 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_Clear/Set ,Input Change Interrupt Mask 24" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_Clear/Set ,Input Change Interrupt Mask 23" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_Clear/Set ,Input Change Interrupt Mask 22" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_Clear/Set ,Input Change Interrupt Mask 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_Clear/Set ,Input Change Interrupt Mask 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_Clear/Set ,Input Change Interrupt Mask 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_Clear/Set ,Input Change Interrupt Mask 18" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_Clear/Set ,Input Change Interrupt Mask 17" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_Clear/Set ,Input Change Interrupt Mask 16" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_Clear/Set ,Input Change Interrupt Mask 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_Clear/Set ,Input Change Interrupt Mask 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_Clear/Set ,Input Change Interrupt Mask 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_Clear/Set ,Input Change Interrupt Mask 12" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_Clear/Set ,Input Change Interrupt Mask 11" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_Clear/Set ,Input Change Interrupt Mask 10" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_Clear/Set ,Input Change Interrupt Mask 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_Clear/Set ,Input Change Interrupt Mask 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_Clear/Set ,Input Change Interrupt Mask 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_Clear/Set ,Input Change Interrupt Mask 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_Clear/Set ,Input Change Interrupt Mask 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_Clear/Set ,Input Change Interrupt Mask 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_Clear/Set ,Input Change Interrupt Mask 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_Clear/Set ,Input Change Interrupt Mask 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_Clear/Set ,Input Change Interrupt Mask 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_Clear/Set ,Input Change Interrupt Mask 0" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PIO Status Registers"
|
|
hgroup.long 0x4c++0x03
|
|
hide.long 0x00 "PIO_ISRA,PIO Controller Interrupt Status Register A"
|
|
in
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "PIO_MDSRA,PIO Multi-Driver Status Register A"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_Clear/Set ,Multi Drive Status 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_Clear/Set ,Multi Drive Status 30" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_Clear/Set ,Multi Drive Status 29" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_Clear/Set ,Multi Drive Status 28" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_Clear/Set ,Multi Drive Status 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_Clear/Set ,Multi Drive Status 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_Clear/Set ,Multi Drive Status 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_Clear/Set ,Multi Drive Status 24" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_Clear/Set ,Multi Drive Status 23" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_Clear/Set ,Multi Drive Status 22" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_Clear/Set ,Multi Drive Status 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_Clear/Set ,Multi Drive Status 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_Clear/Set ,Multi Drive Status 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_Clear/Set ,Multi Drive Status 18" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_Clear/Set ,Multi Drive Status 17" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_Clear/Set ,Multi Drive Status 16" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_Clear/Set ,Multi Drive Status 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_Clear/Set ,Multi Drive Status 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_Clear/Set ,Multi Drive Status 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_Clear/Set ,Multi Drive Status 12" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_Clear/Set ,Multi Drive Status 11" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_Clear/Set ,Multi Drive Status 10" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_Clear/Set ,Multi Drive Status 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_Clear/Set ,Multi Drive Status 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_Clear/Set ,Multi Drive Status 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_Clear/Set ,Multi Drive Status 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_Clear/Set ,Multi Drive Status 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_Clear/Set ,Multi Drive Status 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_Clear/Set ,Multi Drive Status 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_Clear/Set ,Multi Drive Status 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_Clear/Set ,Multi Drive Status 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_Clear/Set ,Multi Drive Status 0" "Disabled,Enabled"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "PIO_PUSRA,PIO Pull Up Status Register A"
|
|
setclrfld.long 0x00 31. -0x04 31. -0x08 31. " P31_Set/Clear ,Pull Up 31 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 30. -0x04 30. -0x08 30. " P30_Set/Clear ,Pull Up 30 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x04 29. -0x08 29. " P29_Set/Clear ,Pull Up 29 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 28. -0x04 28. -0x08 28. " P28_Set/Clear ,Pull Up 28 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x04 27. -0x08 27. " P27_Set/Clear ,Pull Up 27 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 26. -0x04 26. -0x08 26. " P26_Set/Clear ,Pull Up 26 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x04 25. -0x08 25. " P25_Set/Clear ,Pull Up 25 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 24. -0x04 24. -0x08 24. " P24_Set/Clear ,Pull Up 24 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x04 23. -0x08 23. " P23_Set/Clear ,Pull Up 23 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 22. -0x04 22. -0x08 22. " P22_Set/Clear ,Pull Up 22 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x04 21. -0x08 21. " P21_Set/Clear ,Pull Up 21 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 20. -0x04 20. -0x08 20. " P20_Set/Clear ,Pull Up 20 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x04 19. -0x08 19. " P19_Set/Clear ,Pull Up 19 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 18. -0x04 18. -0x08 18. " P18_Set/Clear ,Pull Up 18 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x04 17. -0x08 17. " P17_Set/Clear ,Pull Up 17 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 16. -0x04 16. -0x08 16. " P16_Set/Clear ,Pull Up 16 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x04 15. -0x08 15. " P15_Set/Clear ,Pull Up 15 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_Set/Clear ,Pull Up 14 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_Set/Clear ,Pull Up 13 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_Set/Clear ,Pull Up 12 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_Set/Clear ,Pull Up 11 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_Set/Clear ,Pull Up 10 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_Set/Clear ,Pull Up 9 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_Set/Clear ,Pull Up 8 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_Set/Clear ,Pull Up 7 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_Set/Clear ,Pull Up 6 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x04 5. -0x08 5. " P5_Set/Clear ,Pull Up 5 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_Set/Clear ,Pull Up 4 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_Set/Clear ,Pull Up 3 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_Set/Clear ,Pull Up 2 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_Set/Clear ,Pull Up 1 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_Set/Clear ,Pull Up 0 Status" "Enabled,Disabled"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "PIO_ABSRA,PIO Peripheral A B Status Register A"
|
|
setclrfld.long 0x00 31. -0x04 31. -0x08 31. " P31_Clear/Set ,Peripheral 31 A B Status" "A,B"
|
|
setclrfld.long 0x00 30. -0x04 30. -0x08 30. " P30_Clear/Set ,Peripheral 30 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x04 29. -0x08 29. " P29_Clear/Set ,Peripheral 29 A B Status" "A,B"
|
|
setclrfld.long 0x00 28. -0x04 28. -0x08 28. " P28_Clear/Set ,Peripheral 28 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x04 27. -0x08 27. " P27_Clear/Set ,Peripheral 27 A B Status" "A,B"
|
|
setclrfld.long 0x00 26. -0x04 26. -0x08 26. " P26_Clear/Set ,Peripheral 26 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x04 25. -0x08 25. " P25_Clear/Set ,Peripheral 25 A B Status" "A,B"
|
|
setclrfld.long 0x00 24. -0x04 24. -0x08 24. " P24_Clear/Set ,Peripheral 24 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x04 23. -0x08 23. " P23_Clear/Set ,Peripheral 23 A B Status" "A,B"
|
|
setclrfld.long 0x00 22. -0x04 22. -0x08 22. " P22_Clear/Set ,Peripheral 22 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x04 21. -0x08 21. " P21_Clear/Set ,Peripheral 21 A B Status" "A,B"
|
|
setclrfld.long 0x00 20. -0x04 20. -0x08 20. " P20_Clear/Set ,Peripheral 20 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x04 19. -0x08 19. " P19_Clear/Set ,Peripheral 19 A B Status" "A,B"
|
|
setclrfld.long 0x00 18. -0x04 18. -0x08 18. " P18_Clear/Set ,Peripheral 18 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x04 17. -0x08 17. " P17_Clear/Set ,Peripheral 17 A B Status" "A,B"
|
|
setclrfld.long 0x00 16. -0x04 16. -0x08 16. " P16_Clear/Set ,Peripheral 16 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x04 15. -0x08 15. " P15_Clear/Set ,Peripheral 15 A B Status" "A,B"
|
|
setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_Clear/Set ,Peripheral 14 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_Clear/Set ,Peripheral 13 A B Status" "A,B"
|
|
setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_Clear/Set ,Peripheral 12 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_Clear/Set ,Peripheral 11 A B Status" "A,B"
|
|
setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_Clear/Set ,Peripheral 10 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_Clear/Set ,Peripheral 9 A B Status" "A,B"
|
|
setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_Clear/Set ,Peripheral 8 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_Clear/Set ,Peripheral 7 A B Status" "A,B"
|
|
setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_Clear/Set ,Peripheral 6 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x04 5. -0x08 5. " P5_Clear/Set ,Peripheral 5 A B Status" "A,B"
|
|
setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_Clear/Set ,Peripheral 4 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_Clear/Set ,Peripheral 3 A B Status" "A,B"
|
|
setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_Clear/Set ,Peripheral 2 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_Clear/Set ,Peripheral 1 A B Status" "A,B"
|
|
setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_Clear/Set ,Peripheral 0 A B Status" "A,B"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "PIO_OWSRA,PIO Output Write Status Register A"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_Clear/Set ,Output Write Status 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_Clear/Set ,Output Write Status 30" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_Clear/Set ,Output Write Status 29" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_Clear/Set ,Output Write Status 28" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_Clear/Set ,Output Write Status 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_Clear/Set ,Output Write Status 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_Clear/Set ,Output Write Status 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_Clear/Set ,Output Write Status 24" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_Clear/Set ,Output Write Status 23" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_Clear/Set ,Output Write Status 22" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_Clear/Set ,Output Write Status 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_Clear/Set ,Output Write Status 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_Clear/Set ,Output Write Status 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_Clear/Set ,Output Write Status 18" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_Clear/Set ,Output Write Status 17" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_Clear/Set ,Output Write Status 16" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_Clear/Set ,Output Write Status 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_Clear/Set ,Output Write Status 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_Clear/Set ,Output Write Status 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_Clear/Set ,Output Write Status 12" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_Clear/Set ,Output Write Status 11" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_Clear/Set ,Output Write Status 10" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_Clear/Set ,Output Write Status 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_Clear/Set ,Output Write Status 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_Clear/Set ,Output Write Status 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_Clear/Set ,Output Write Status 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_Clear/Set ,Output Write Status 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_Clear/Set ,Output Write Status 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_Clear/Set ,Output Write Status 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_Clear/Set ,Output Write Status 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P_Clear/Set1 ,Output Write Status 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_Clear/Set ,Output Write Status 0" "Disabled,Enabled"
|
|
tree.end
|
|
tree.end
|
|
tree "PIOB (Parallel Input/Output Controller B)"
|
|
base 0xfffff600
|
|
tree "PIO Controller Registers"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PIO_PSRB,PIO Controller PIO Status Register B"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_Clear/Set ,PIO31 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_Clear/Set ,PIO30 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_Clear/Set ,PIO29 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_Clear/Set ,PIO28 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_Clear/Set ,PIO27 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_Clear/Set ,PIO26 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_Clear/Set ,PIO25 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_Clear/Set ,PIO24 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_Clear/Set ,PIO23 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_Clear/Set ,PIO22 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_Clear/Set ,PIO21 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_Clear/Set ,PIO20 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_Clear/Set ,PIO19 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_Clear/Set ,PIO18 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_Clear/Set ,PIO17 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_Clear/Set ,PIO16 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_Clear/Set ,PIO15 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_Clear/Set ,PIO14 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_Clear/Set ,PIO13 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_Clear/Set ,PIO12 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_Clear/Set ,PIO11 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_Clear/Set ,PIO10 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_Clear/Set ,PIO9 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_Clear/Set ,PIO8 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_Clear/Set ,PIO7 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_Clear/Set ,PIO6 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_Clear/Set ,PIO5 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_Clear/Set ,PIO4 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_Clear/Set ,PIO3 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_Clear/Set ,PIO2 Status" "Not activated,Activated"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_Clear/Set ,PIO1 Status" "Not activated,Activated"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_Clear/Set ,PIO0 Status" "Not activated,Activated"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PIO_OSRB,PIO Controller Output Status Register B"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_Clear/Set ,Output Status 31" "Input,Output"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_Clear/Set ,Output Status 30" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_Clear/Set ,Output Status 29" "Input,Output"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_Clear/Set ,Output Status 28" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_Clear/Set ,Output Status 27" "Input,Output"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_Clear/Set ,Output Status 26" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_Clear/Set ,Output Status 25" "Input,Output"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_Clear/Set ,Output Status 24" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_Clear/Set ,Output Status 23" "Input,Output"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_Clear/Set ,Output Status 22" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_Clear/Set ,Output Status 21" "Input,Output"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_Clear/Set ,Output Status 20" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_Clear/Set ,Output Status 19" "Input,Output"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_Clear/Set ,Output Status 18" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_Clear/Set ,Output Status 17" "Input,Output"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_Clear/Set ,Output Status 16" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_Clear/Set ,Output Status 15" "Input,Output"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_Clear/Set ,Output Status 14" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_Clear/Set ,Output Status 13" "Input,Output"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_Clear/Set ,Output Status 12" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_Clear/Set ,Output Status 11" "Input,Output"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_Clear/Set ,Output Status 10" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_Clear/Set ,Output Status 9" "Input,Output"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_Clear/Set ,Output Status 8" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_Clear/Set ,Output Status 7" "Input,Output"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_Clear/Set ,Output Status 6" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_Clear/Set ,Output Status 5" "Input,Output"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_Clear/Set ,Output Status 4" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_Clear/Set ,Output Status 3" "Input,Output"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_Clear/Set ,Output Status 2" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_Clear/Set ,Output Status 1" "Input,Output"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_Clear/Set ,Output Status 0" "Input,Output"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PIO_IFSRB,PIO Controller Input Filter Status Register B"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_Clear/Set ,Input Filter Status 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_Clear/Set ,Input Filter Status 30" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_Clear/Set ,Input Filter Status 29" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_Clear/Set ,Input Filter Status 28" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_Clear/Set ,Input Filter Status 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_Clear/Set ,Input Filter Status 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_Clear/Set ,Input Filter Status 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_Clear/Set ,Input Filter Status 24" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_Clear/Set ,Input Filter Status 23" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_Clear/Set ,Input Filter Status 22" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_Clear/Set ,Input Filter Status 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_Clear/Set ,Input Filter Status 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_Clear/Set ,Input Filter Status 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_Clear/Set ,Input Filter Status 18" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_Clear/Set ,Input Filter Status 17" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_Clear/Set ,Input Filter Status 16" "Disabled,Enabled"
|
|
textline " "
|
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setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_Clear/Set ,Input Filter Status 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_Clear/Set ,Input Filter Status 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_Clear/Set ,Input Filter Status 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_Clear/Set ,Input Filter Status 12" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_Clear/Set ,Input Filter Status 11" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_Clear/Set ,Input Filter Status 10" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_Clear/Set ,Input Filter Status 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_Clear/Set ,Input Filter Status 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_Clear/Set ,Input Filter Status 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_Clear/Set ,Input Filter Status 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_Clear/Set ,Input Filter Status 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_Clear/Set ,Input Filter Status 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_Clear/Set ,Input Filter Status 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_Clear/Set ,Input Filter Status 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_Clear/Set ,Input Filter Status 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_Clear/Set ,Input Filter Status 0" "Disabled,Enabled"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "PIO_ODSRB,PIO Controller Output Data Status Register B"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_Clear/Set ,Output Data Status 31" "Low,High"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_Clear/Set ,Output Data Status 30" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_Clear/Set ,Output Data Status 29" "Low,High"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_Clear/Set ,Output Data Status 28" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_Clear/Set ,Output Data Status 27" "Low,High"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_Clear/Set ,Output Data Status 26" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_Clear/Set ,Output Data Status 25" "Low,High"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_Clear/Set ,Output Data Status 24" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_Clear/Set ,Output Data Status 23" "Low,High"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_Clear/Set ,Output Data Status 22" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_Clear/Set ,Output Data Status 21" "Low,High"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_Clear/Set ,Output Data Status 20" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_Clear/Set ,Output Data Status 19" "Low,High"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_Clear/Set ,Output Data Status 18" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_Clear/Set ,Output Data Status 17" "Low,High"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_Clear/Set ,Output Data Status 16" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_Clear/Set ,Output Data Status 15" "Low,High"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_Clear/Set ,Output Data Status 14" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_Clear/Set ,Output Data Status 13" "Low,High"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_Clear/Set ,Output Data Status 12" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_Clear/Set ,Output Data Status 11" "Low,High"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_Clear/Set ,Output Data Status 10" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_Clear/Set ,Output Data Status 9" "Low,High"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_Clear/Set ,Output Data Status 8" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_Clear/Set ,Output Data Status 7" "Low,High"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_Clear/Set ,Output Data Status 6" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_Clear/Set ,Output Data Status 5" "Low,High"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_Clear/Set ,Output Data Status 4" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_Clear/Set ,Output Data Status 3" "Low,High"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_Clear/Set ,Output Data Status 2" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_Clear/Set ,Output Data Status 1" "Low,High"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_Clear/Set ,Output Data Status 0" "Low,High"
|
|
rgroup.long 0x3c++0x03
|
|
line.long 0x00 "PIO_PDSRB,PIO Controller Pin Data Status Register B"
|
|
bitfld.long 0x00 31. " P31 ,Output Data Status 31" "Low,High"
|
|
bitfld.long 0x00 30. " P30 ,Output Data Status 30" "Low,High"
|
|
bitfld.long 0x00 29. " P29 ,Output Data Status 29" "Low,High"
|
|
bitfld.long 0x00 28. " P28 ,Output Data Status 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. "P27 ,Output Data Status 27" "Low,High"
|
|
bitfld.long 0x00 26. " P26 ,Output Data Status 26" "Low,High"
|
|
bitfld.long 0x00 25. " P25 ,Output Data Status 25" "Low,High"
|
|
bitfld.long 0x00 24. " P24 ,Output Data Status 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. "P23 ,Output Data Status 23" "Low,High"
|
|
bitfld.long 0x00 22. " P22 ,Output Data Status 22" "Low,High"
|
|
bitfld.long 0x00 21. " P21 ,Output Data Status 21" "Low,High"
|
|
bitfld.long 0x00 20. " P20 ,Output Data Status 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. "P19 ,Output Data Status 19" "Low,High"
|
|
bitfld.long 0x00 18. " P18 ,Output Data Status 18" "Low,High"
|
|
bitfld.long 0x00 17. " P17 ,Output Data Status 17" "Low,High"
|
|
bitfld.long 0x00 16. " P16 ,Output Data Status 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. "P15 ,Output Data Status 15" "Low,High"
|
|
bitfld.long 0x00 14. " P14 ,Output Data Status 14" "Low,High"
|
|
bitfld.long 0x00 13. " P13 ,Output Data Status 13" "Low,High"
|
|
bitfld.long 0x00 12. " P12 ,Output Data Status 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. "P11 ,Output Data Status 11" "Low,High"
|
|
bitfld.long 0x00 10. " P10 ,Output Data Status 10" "Low,High"
|
|
bitfld.long 0x00 9. " P9 ,Output Data Status 9" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,Output Data Status 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. "P7 ,Output Data Status 7" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,Output Data Status 6" "Low,High"
|
|
bitfld.long 0x00 5. " P5 ,Output Data Status 5" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,Output Data Status 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. "P3 ,Output Data Status 3" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,Output Data Status 2" "Low,High"
|
|
bitfld.long 0x00 1. " P1 ,Output Data Status 1" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,Output Data Status 0" "Low,High"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "PIO_IMRB,PIO Controller Interrupt Mask Register B"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_Clear/Set ,Input Change Interrupt Mask 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_Clear/Set ,Input Change Interrupt Mask 30" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_Clear/Set ,Input Change Interrupt Mask 29" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_Clear/Set ,Input Change Interrupt Mask 28" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_Clear/Set ,Input Change Interrupt Mask 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_Clear/Set ,Input Change Interrupt Mask 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_Clear/Set ,Input Change Interrupt Mask 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_Clear/Set ,Input Change Interrupt Mask 24" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_Clear/Set ,Input Change Interrupt Mask 23" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_Clear/Set ,Input Change Interrupt Mask 22" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_Clear/Set ,Input Change Interrupt Mask 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_Clear/Set ,Input Change Interrupt Mask 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_Clear/Set ,Input Change Interrupt Mask 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_Clear/Set ,Input Change Interrupt Mask 18" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_Clear/Set ,Input Change Interrupt Mask 17" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_Clear/Set ,Input Change Interrupt Mask 16" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_Clear/Set ,Input Change Interrupt Mask 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_Clear/Set ,Input Change Interrupt Mask 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_Clear/Set ,Input Change Interrupt Mask 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_Clear/Set ,Input Change Interrupt Mask 12" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_Clear/Set ,Input Change Interrupt Mask 11" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_Clear/Set ,Input Change Interrupt Mask 10" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_Clear/Set ,Input Change Interrupt Mask 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_Clear/Set ,Input Change Interrupt Mask 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_Clear/Set ,Input Change Interrupt Mask 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_Clear/Set ,Input Change Interrupt Mask 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_Clear/Set ,Input Change Interrupt Mask 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_Clear/Set ,Input Change Interrupt Mask 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_Clear/Set ,Input Change Interrupt Mask 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_Clear/Set ,Input Change Interrupt Mask 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_Clear/Set ,Input Change Interrupt Mask 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_Clear/Set ,Input Change Interrupt Mask 0" "Disabled,Enabled"
|
|
tree.end
|
|
tree "PIO Status Registers"
|
|
hgroup.long 0x4c++0x03
|
|
hide.long 0x00 "PIO_ISRB,PIO Controller Interrupt Status Register B"
|
|
in
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "PIO_MDSRB,PIO Multi-Driver Status Register B"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_Clear/Set ,Multi Drive Status 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_Clear/Set ,Multi Drive Status 30" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_Clear/Set ,Multi Drive Status 29" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_Clear/Set ,Multi Drive Status 28" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_Clear/Set ,Multi Drive Status 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_Clear/Set ,Multi Drive Status 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_Clear/Set ,Multi Drive Status 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_Clear/Set ,Multi Drive Status 24" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_Clear/Set ,Multi Drive Status 23" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_Clear/Set ,Multi Drive Status 22" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_Clear/Set ,Multi Drive Status 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_Clear/Set ,Multi Drive Status 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_Clear/Set ,Multi Drive Status 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_Clear/Set ,Multi Drive Status 18" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_Clear/Set ,Multi Drive Status 17" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_Clear/Set ,Multi Drive Status 16" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_Clear/Set ,Multi Drive Status 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_Clear/Set ,Multi Drive Status 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_Clear/Set ,Multi Drive Status 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_Clear/Set ,Multi Drive Status 12" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_Clear/Set ,Multi Drive Status 11" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_Clear/Set ,Multi Drive Status 10" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_Clear/Set ,Multi Drive Status 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_Clear/Set ,Multi Drive Status 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_Clear/Set ,Multi Drive Status 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_Clear/Set ,Multi Drive Status 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_Clear/Set ,Multi Drive Status 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_Clear/Set ,Multi Drive Status 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_Clear/Set ,Multi Drive Status 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_Clear/Set ,Multi Drive Status 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_Clear/Set ,Multi Drive Status 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_Clear/Set ,Multi Drive Status 0" "Disabled,Enabled"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "PIO_PUSRB,PIO Pull Up Status Register B"
|
|
setclrfld.long 0x00 31. -0x04 31. -0x08 31. " P31_Set/Clear ,Pull Up 31 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 30. -0x04 30. -0x08 30. " P30_Set/Clear ,Pull Up 30 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x04 29. -0x08 29. " P29_Set/Clear ,Pull Up 29 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 28. -0x04 28. -0x08 28. " P28_Set/Clear ,Pull Up 28 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x04 27. -0x08 27. " P27_Set/Clear ,Pull Up 27 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 26. -0x04 26. -0x08 26. " P26_Set/Clear ,Pull Up 26 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x04 25. -0x08 25. " P25_Set/Clear ,Pull Up 25 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 24. -0x04 24. -0x08 24. " P24_Set/Clear ,Pull Up 24 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x04 23. -0x08 23. " P23_Set/Clear ,Pull Up 23 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 22. -0x04 22. -0x08 22. " P22_Set/Clear ,Pull Up 22 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x04 21. -0x08 21. " P21_Set/Clear ,Pull Up 21 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 20. -0x04 20. -0x08 20. " P20_Set/Clear ,Pull Up 20 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x04 19. -0x08 19. " P19_Set/Clear ,Pull Up 19 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 18. -0x04 18. -0x08 18. " P18_Set/Clear ,Pull Up 18 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x04 17. -0x08 17. " P17_Set/Clear ,Pull Up 17 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 16. -0x04 16. -0x08 16. " P16_Set/Clear ,Pull Up 16 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x04 15. -0x08 15. " P15_Set/Clear ,Pull Up 15 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_Set/Clear ,Pull Up 14 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_Set/Clear ,Pull Up 13 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_Set/Clear ,Pull Up 12 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_Set/Clear ,Pull Up 11 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_Set/Clear ,Pull Up 10 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_Set/Clear ,Pull Up 9 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_Set/Clear ,Pull Up 8 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_Set/Clear ,Pull Up 7 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_Set/Clear ,Pull Up 6 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x04 5. -0x08 5. " P5_Set/Clear ,Pull Up 5 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_Set/Clear ,Pull Up 4 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_Set/Clear ,Pull Up 3 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_Set/Clear ,Pull Up 2 Status" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_Set/Clear ,Pull Up 1 Status" "Enabled,Disabled"
|
|
setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_Set/Clear ,Pull Up 0 Status" "Enabled,Disabled"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "PIO_ABSRB,PIO Peripheral A B Status Register B"
|
|
setclrfld.long 0x00 31. -0x04 31. -0x08 31. " P31_Clear/Set ,Peripheral 31 A B Status" "A,B"
|
|
setclrfld.long 0x00 30. -0x04 30. -0x08 30. " P30_Clear/Set ,Peripheral 30 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x04 29. -0x08 29. " P29_Clear/Set ,Peripheral 29 A B Status" "A,B"
|
|
setclrfld.long 0x00 28. -0x04 28. -0x08 28. " P28_Clear/Set ,Peripheral 28 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x04 27. -0x08 27. " P27_Clear/Set ,Peripheral 27 A B Status" "A,B"
|
|
setclrfld.long 0x00 26. -0x04 26. -0x08 26. " P26_Clear/Set ,Peripheral 26 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x04 25. -0x08 25. " P25_Clear/Set ,Peripheral 25 A B Status" "A,B"
|
|
setclrfld.long 0x00 24. -0x04 24. -0x08 24. " P24_Clear/Set ,Peripheral 24 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x04 23. -0x08 23. " P23_Clear/Set ,Peripheral 23 A B Status" "A,B"
|
|
setclrfld.long 0x00 22. -0x04 22. -0x08 22. " P22_Clear/Set ,Peripheral 22 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x04 21. -0x08 21. " P21_Clear/Set ,Peripheral 21 A B Status" "A,B"
|
|
setclrfld.long 0x00 20. -0x04 20. -0x08 20. " P20_Clear/Set ,Peripheral 20 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x04 19. -0x08 19. " P19_Clear/Set ,Peripheral 19 A B Status" "A,B"
|
|
setclrfld.long 0x00 18. -0x04 18. -0x08 18. " P18_Clear/Set ,Peripheral 18 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x04 17. -0x08 17. " P17_Clear/Set ,Peripheral 17 A B Status" "A,B"
|
|
setclrfld.long 0x00 16. -0x04 16. -0x08 16. " P16_Clear/Set ,Peripheral 16 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x04 15. -0x08 15. " P15_Clear/Set ,Peripheral 15 A B Status" "A,B"
|
|
setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_Clear/Set ,Peripheral 14 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_Clear/Set ,Peripheral 13 A B Status" "A,B"
|
|
setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_Clear/Set ,Peripheral 12 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_Clear/Set ,Peripheral 11 A B Status" "A,B"
|
|
setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_Clear/Set ,Peripheral 10 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_Clear/Set ,Peripheral 9 A B Status" "A,B"
|
|
setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_Clear/Set ,Peripheral 8 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_Clear/Set ,Peripheral 7 A B Status" "A,B"
|
|
setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_Clear/Set ,Peripheral 6 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x04 5. -0x08 5. " P5_Clear/Set ,Peripheral 5 A B Status" "A,B"
|
|
setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_Clear/Set ,Peripheral 4 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_Clear/Set ,Peripheral 3 A B Status" "A,B"
|
|
setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_Clear/Set ,Peripheral 2 A B Status" "A,B"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_Clear/Set ,Peripheral 1 A B Status" "A,B"
|
|
setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_Clear/Set ,Peripheral 0 A B Status" "A,B"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "PIO_OWSRB,PIO Output Write Status Register B"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_Clear/Set ,Output Write Status 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_Clear/Set ,Output Write Status 30" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_Clear/Set ,Output Write Status 29" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_Clear/Set ,Output Write Status 28" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_Clear/Set ,Output Write Status 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_Clear/Set ,Output Write Status 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_Clear/Set ,Output Write Status 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_Clear/Set ,Output Write Status 24" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_Clear/Set ,Output Write Status 23" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_Clear/Set ,Output Write Status 22" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_Clear/Set ,Output Write Status 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_Clear/Set ,Output Write Status 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_Clear/Set ,Output Write Status 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_Clear/Set ,Output Write Status 18" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_Clear/Set ,Output Write Status 17" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_Clear/Set ,Output Write Status 16" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_Clear/Set ,Output Write Status 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_Clear/Set ,Output Write Status 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_Clear/Set ,Output Write Status 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_Clear/Set ,Output Write Status 12" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_Clear/Set ,Output Write Status 11" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_Clear/Set ,Output Write Status 10" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_Clear/Set ,Output Write Status 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_Clear/Set ,Output Write Status 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_Clear/Set ,Output Write Status 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_Clear/Set ,Output Write Status 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_Clear/Set ,Output Write Status 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_Clear/Set ,Output Write Status 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_Clear/Set ,Output Write Status 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_Clear/Set ,Output Write Status 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P_Clear/Set1 ,Output Write Status 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_Clear/Set ,Output Write Status 0" "Disabled,Enabled"
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree.open "SPIs (Serial Peripheral Interfaces)"
|
|
tree "SPI0 (Serial Peripheral Interface 0)"
|
|
base 0xfffe0000
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "SPI0_CR,SPI0 Control Register"
|
|
bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,Deasserted"
|
|
bitfld.long 0x00 7. " SWRST ,SPI Software Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPIDIS ,SPI Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 0. " SPIEN ,SPI Enable" "No effect,Enabled"
|
|
if ((((data.long(ad:(0xfffe0000+0x4)))&0x06)==0x00)&&(((data.long(ad:(0xfffe0000+0x4)))&0x1)==0x1))
|
|
;if PCSDEC=0 and PS=0 and MSTR=1
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SPI0_MR,SPI0 Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip Selects Delay"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Directly,Decoder"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PS ,Peripheral Selection" "Fixed,Variable"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "1110,1101,1110,1011,1110,1101,1110,0111,1110,1101,1110,1011,1110,1101,1110,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " MSTR ,Master Mode" "Slave,Master"
|
|
bitfld.long 0x00 7. " LLB ,Local Loopback Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
|
|
sif ((cpu()!="AT91SAM7XC512")&&(cpu()!="AT91SAM7XC256")&&(cpu()!="AT91SAM7XC128")&&(cpu()!="AT91SAM7X512")&&(cpu()!="AT91SAM7X256")&&(cpu()!="AT91SAM7X128"))
|
|
bitfld.long 0x00 3. " FDIV ,Clock Selection" "MCK,MCK/N"
|
|
endif
|
|
elif ((((data.long(ad:(0xfffe0000+0x4)))&0x06)==0x04)&&(((data.long(ad:(0xfffe0000+0x4)))&0x1)==0x1))
|
|
;if PCSDEC=1 and PS=0 and MSTR=1
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SPI0_MR,SPI0 Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip Selects Delay"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Directly,Decoder"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PS ,Peripheral Selection" "Fixed,Variable"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MSTR ,Master Mode" "Slave,Master"
|
|
bitfld.long 0x00 7. " LLB ,Local Loopback Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
|
|
sif ((cpu()!="AT91SAM7XC512")&&(cpu()!="AT91SAM7XC256")&&(cpu()!="AT91SAM7XC128")&&(cpu()!="AT91SAM7X512")&&(cpu()!="AT91SAM7X256")&&(cpu()!="AT91SAM7X128"))
|
|
bitfld.long 0x00 3. " FDIV ,Clock Selection" "MCK,MCK/N"
|
|
endif
|
|
elif (((((data.long(ad:(0xfffe0000+0x4)))&0x06)==0x02)||(((data.long(ad:(0xfffe0000+0x4)))&0x06)==0x06))&&(((data.long(ad:(0xfffe0000+0x4)))&0x1)==0x1))
|
|
;if (PS=1) or (PCSDEC=1 and PS=1 and MSTR=1)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SPI0_MR,SPI0 Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip Selects Delay"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Directly,Decoder"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PS ,Peripheral Selection" "Fixed,Variable"
|
|
bitfld.long 0x00 0. " MSTR ,Master Mode" "Slave,Master"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LLB ,Local Loopback Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
|
|
textline " "
|
|
sif ((cpu()!="AT91SAM7XC512")&&(cpu()!="AT91SAM7XC256")&&(cpu()!="AT91SAM7XC128")&&(cpu()!="AT91SAM7X512")&&(cpu()!="AT91SAM7X256")&&(cpu()!="AT91SAM7X128"))
|
|
bitfld.long 0x00 3. " FDIV ,Clock Selection" "MCK,MCK/N"
|
|
endif
|
|
elif (((data.long(ad:(0xfffe0000+0x4)))&0x06)==0x00)
|
|
;if PCSDEC=0 and PS=0
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SPI0_MR,SPI0 Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip Selects Delay"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Directly,Decoder"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PS ,Peripheral Selection" "Fixed,Variable"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "1110,1101,1110,1011,1110,1101,1110,0111,1110,1101,1110,1011,1110,1101,1110,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " MSTR ,Master Mode" "Slave,Master"
|
|
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
|
|
textline " "
|
|
sif ((cpu()!="AT91SAM7XC512")&&(cpu()!="AT91SAM7XC256")&&(cpu()!="AT91SAM7XC128")&&(cpu()!="AT91SAM7X512")&&(cpu()!="AT91SAM7X256")&&(cpu()!="AT91SAM7X128"))
|
|
bitfld.long 0x00 3. " FDIV ,Clock Selection" "MCK,MCK/N"
|
|
endif
|
|
elif (((data.long(ad:(0xfffe0000+0x4)))&0x06)==0x04)
|
|
;if PCSDEC=1 and PS=0
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SPI0_MR,SPI0 Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip Selects Delay"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Directly,Decoder"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PS ,Peripheral Selection" "Fixed,Variable"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MSTR ,Master Mode" "Slave,Master"
|
|
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
|
|
textline " "
|
|
sif ((cpu()!="AT91SAM7XC512")&&(cpu()!="AT91SAM7XC256")&&(cpu()!="AT91SAM7XC128")&&(cpu()!="AT91SAM7X512")&&(cpu()!="AT91SAM7X256")&&(cpu()!="AT91SAM7X128"))
|
|
bitfld.long 0x00 3. " FDIV ,Clock Selection" "MCK,MCK/N"
|
|
endif
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SPI0_MR,SPI0 Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip Selects Delay"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Directly,Decoder"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PS ,Peripheral Selection" "Fixed,Variable"
|
|
bitfld.long 0x00 0. " MSTR ,Master Mode" "Slave,Master"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
|
|
sif ((cpu()!="AT91SAM7XC512")&&(cpu()!="AT91SAM7XC256")&&(cpu()!="AT91SAM7XC128")&&(cpu()!="AT91SAM7X512")&&(cpu()!="AT91SAM7X256")&&(cpu()!="AT91SAM7X128"))
|
|
bitfld.long 0x00 3. " FDIV ,Clock Selection" "MCK,MCK/N"
|
|
endif
|
|
endif
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "SPI0_RDR,SPI0 Receive Data Register"
|
|
in
|
|
if (((data.long(ad:(0xfffe0000+0x4)))&0x06)==0x02)
|
|
;if PCSDEC=0 and PS=1
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "SPI0_TDR,SPI0 Transmit Data Register"
|
|
bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,Deasserted"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "1110,1101,1110,1011,1110,1101,1110,0111,1110,1101,1110,1011,1110,1101,1110,?..."
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data"
|
|
elif (((data.long(ad:(0xfffe0000+0x4)))&0x06)==0x06)
|
|
;if PCSDEC=1 and PS=1
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "SPI0_TDR,SPI0 Transmit Data Register"
|
|
bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,Deasserted"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data"
|
|
else
|
|
;if PS=0
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "SPI0_TDR,SPI0 Transmit Data Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data"
|
|
endif
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "SPI0_SR,SPI0 Status Register"
|
|
in
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SPI0_IMR,SPI0 Interrupt Mask Register"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXEMPTY_set/clr ,Transmission Registers Empty Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " NSSR_set/clr ,NSS Rising Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " TXBUFE_set/clr ,Transmit Buffer Empty Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " RXBUFF_set/clr ,Receive Buffer Full Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " ENDTX_set/clr ,End of Transmit Buffer Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ENDRX_set/clr ,End of Receive Buffer Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " OVRES_set/clr ,Overrun Error Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " MODF_set/clr ,Mode Fault Error Inrerrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TDRE_set/clr ,SPI Transmit Data Register Empty Inrerrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RDRF_set/clr ,Receive Data Register Full Inrerrupt Mask" "Disabled,Enabled"
|
|
group.long 0x30++0x0F
|
|
line.long 0x0 "SPI0_CSR0,SPI0 Chip Select Register 0"
|
|
hexmask.long.byte 0x0 24.--31. 1. " DLYBCT ,Consecutive Transfers Delay"
|
|
hexmask.long.byte 0x0 16.--23. 1. " DLYBS ,Delay Before SPCK"
|
|
textline " "
|
|
hexmask.long.byte 0x0 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
|
|
bitfld.long 0x0 4.--7. " BITS ,Bits Per Transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x0 3. " CSAAT ,Chip Select Active After Transfer" "Risen,Not risen"
|
|
bitfld.long 0x0 1. " NCPHA ,Clock Phase" "Changed/captured,Captured/changed"
|
|
textline " "
|
|
bitfld.long 0x0 0. " CPOL ,Clock Polarity" "Low,High"
|
|
line.long 0x4 "SPI0_CSR1,SPI0 Chip Select Register 1"
|
|
hexmask.long.byte 0x4 24.--31. 1. " DLYBCT ,Consecutive Transfers Delay"
|
|
hexmask.long.byte 0x4 16.--23. 1. " DLYBS ,Delay Before SPCK"
|
|
textline " "
|
|
hexmask.long.byte 0x4 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
|
|
bitfld.long 0x4 4.--7. " BITS ,Bits Per Transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x4 3. " CSAAT ,Chip Select Active After Transfer" "Risen,Not risen"
|
|
bitfld.long 0x4 1. " NCPHA ,Clock Phase" "Changed/captured,Captured/changed"
|
|
textline " "
|
|
bitfld.long 0x4 0. " CPOL ,Clock Polarity" "Low,High"
|
|
line.long 0x8 "SPI0_CSR2,SPI0 Chip Select Register 2"
|
|
hexmask.long.byte 0x8 24.--31. 1. " DLYBCT ,Consecutive Transfers Delay"
|
|
hexmask.long.byte 0x8 16.--23. 1. " DLYBS ,Delay Before SPCK"
|
|
textline " "
|
|
hexmask.long.byte 0x8 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
|
|
bitfld.long 0x8 4.--7. " BITS ,Bits Per Transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x8 3. " CSAAT ,Chip Select Active After Transfer" "Risen,Not risen"
|
|
bitfld.long 0x8 1. " NCPHA ,Clock Phase" "Changed/captured,Captured/changed"
|
|
textline " "
|
|
bitfld.long 0x8 0. " CPOL ,Clock Polarity" "Low,High"
|
|
line.long 0xC "SPI0_CSR3,SPI0 Chip Select Register 3"
|
|
hexmask.long.byte 0xC 24.--31. 1. " DLYBCT ,Consecutive Transfers Delay"
|
|
hexmask.long.byte 0xC 16.--23. 1. " DLYBS ,Delay Before SPCK"
|
|
textline " "
|
|
hexmask.long.byte 0xC 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
|
|
bitfld.long 0xC 4.--7. " BITS ,Bits Per Transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
|
|
textline " "
|
|
bitfld.long 0xC 3. " CSAAT ,Chip Select Active After Transfer" "Risen,Not risen"
|
|
bitfld.long 0xC 1. " NCPHA ,Clock Phase" "Changed/captured,Captured/changed"
|
|
textline " "
|
|
bitfld.long 0xC 0. " CPOL ,Clock Polarity" "Low,High"
|
|
tree.end
|
|
tree "SPI1 (Serial Peripheral Interface 1)"
|
|
base 0xfffe4000
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "SPI1_CR,SPI1 Control Register"
|
|
bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,Deasserted"
|
|
bitfld.long 0x00 7. " SWRST ,SPI Software Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPIDIS ,SPI Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 0. " SPIEN ,SPI Enable" "No effect,Enabled"
|
|
if ((((data.long(ad:(0xfffe4000+0x4)))&0x06)==0x00)&&(((data.long(ad:(0xfffe4000+0x4)))&0x1)==0x1))
|
|
;if PCSDEC=0 and PS=0 and MSTR=1
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SPI1_MR,SPI1 Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip Selects Delay"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Directly,Decoder"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PS ,Peripheral Selection" "Fixed,Variable"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "1110,1101,1110,1011,1110,1101,1110,0111,1110,1101,1110,1011,1110,1101,1110,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " MSTR ,Master Mode" "Slave,Master"
|
|
bitfld.long 0x00 7. " LLB ,Local Loopback Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
|
|
sif ((cpu()!="AT91SAM7XC512")&&(cpu()!="AT91SAM7XC256")&&(cpu()!="AT91SAM7XC128")&&(cpu()!="AT91SAM7X512")&&(cpu()!="AT91SAM7X256")&&(cpu()!="AT91SAM7X128"))
|
|
bitfld.long 0x00 3. " FDIV ,Clock Selection" "MCK,MCK/N"
|
|
endif
|
|
elif ((((data.long(ad:(0xfffe4000+0x4)))&0x06)==0x04)&&(((data.long(ad:(0xfffe4000+0x4)))&0x1)==0x1))
|
|
;if PCSDEC=1 and PS=0 and MSTR=1
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SPI1_MR,SPI1 Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip Selects Delay"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Directly,Decoder"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PS ,Peripheral Selection" "Fixed,Variable"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MSTR ,Master Mode" "Slave,Master"
|
|
bitfld.long 0x00 7. " LLB ,Local Loopback Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
|
|
sif ((cpu()!="AT91SAM7XC512")&&(cpu()!="AT91SAM7XC256")&&(cpu()!="AT91SAM7XC128")&&(cpu()!="AT91SAM7X512")&&(cpu()!="AT91SAM7X256")&&(cpu()!="AT91SAM7X128"))
|
|
bitfld.long 0x00 3. " FDIV ,Clock Selection" "MCK,MCK/N"
|
|
endif
|
|
elif (((((data.long(ad:(0xfffe4000+0x4)))&0x06)==0x02)||(((data.long(ad:(0xfffe4000+0x4)))&0x06)==0x06))&&(((data.long(ad:(0xfffe4000+0x4)))&0x1)==0x1))
|
|
;if (PS=1) or (PCSDEC=1 and PS=1 and MSTR=1)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SPI1_MR,SPI1 Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip Selects Delay"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Directly,Decoder"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PS ,Peripheral Selection" "Fixed,Variable"
|
|
bitfld.long 0x00 0. " MSTR ,Master Mode" "Slave,Master"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LLB ,Local Loopback Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
|
|
textline " "
|
|
sif ((cpu()!="AT91SAM7XC512")&&(cpu()!="AT91SAM7XC256")&&(cpu()!="AT91SAM7XC128")&&(cpu()!="AT91SAM7X512")&&(cpu()!="AT91SAM7X256")&&(cpu()!="AT91SAM7X128"))
|
|
bitfld.long 0x00 3. " FDIV ,Clock Selection" "MCK,MCK/N"
|
|
endif
|
|
elif (((data.long(ad:(0xfffe4000+0x4)))&0x06)==0x00)
|
|
;if PCSDEC=0 and PS=0
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SPI1_MR,SPI1 Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip Selects Delay"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Directly,Decoder"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PS ,Peripheral Selection" "Fixed,Variable"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "1110,1101,1110,1011,1110,1101,1110,0111,1110,1101,1110,1011,1110,1101,1110,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " MSTR ,Master Mode" "Slave,Master"
|
|
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
|
|
textline " "
|
|
sif ((cpu()!="AT91SAM7XC512")&&(cpu()!="AT91SAM7XC256")&&(cpu()!="AT91SAM7XC128")&&(cpu()!="AT91SAM7X512")&&(cpu()!="AT91SAM7X256")&&(cpu()!="AT91SAM7X128"))
|
|
bitfld.long 0x00 3. " FDIV ,Clock Selection" "MCK,MCK/N"
|
|
endif
|
|
elif (((data.long(ad:(0xfffe4000+0x4)))&0x06)==0x04)
|
|
;if PCSDEC=1 and PS=0
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SPI1_MR,SPI1 Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip Selects Delay"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Directly,Decoder"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PS ,Peripheral Selection" "Fixed,Variable"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MSTR ,Master Mode" "Slave,Master"
|
|
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
|
|
textline " "
|
|
sif ((cpu()!="AT91SAM7XC512")&&(cpu()!="AT91SAM7XC256")&&(cpu()!="AT91SAM7XC128")&&(cpu()!="AT91SAM7X512")&&(cpu()!="AT91SAM7X256")&&(cpu()!="AT91SAM7X128"))
|
|
bitfld.long 0x00 3. " FDIV ,Clock Selection" "MCK,MCK/N"
|
|
endif
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SPI1_MR,SPI1 Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip Selects Delay"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Directly,Decoder"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PS ,Peripheral Selection" "Fixed,Variable"
|
|
bitfld.long 0x00 0. " MSTR ,Master Mode" "Slave,Master"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
|
|
sif ((cpu()!="AT91SAM7XC512")&&(cpu()!="AT91SAM7XC256")&&(cpu()!="AT91SAM7XC128")&&(cpu()!="AT91SAM7X512")&&(cpu()!="AT91SAM7X256")&&(cpu()!="AT91SAM7X128"))
|
|
bitfld.long 0x00 3. " FDIV ,Clock Selection" "MCK,MCK/N"
|
|
endif
|
|
endif
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "SPI1_RDR,SPI1 Receive Data Register"
|
|
in
|
|
if (((data.long(ad:(0xfffe4000+0x4)))&0x06)==0x02)
|
|
;if PCSDEC=0 and PS=1
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "SPI1_TDR,SPI1 Transmit Data Register"
|
|
bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,Deasserted"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "1110,1101,1110,1011,1110,1101,1110,0111,1110,1101,1110,1011,1110,1101,1110,?..."
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data"
|
|
elif (((data.long(ad:(0xfffe4000+0x4)))&0x06)==0x06)
|
|
;if PCSDEC=1 and PS=1
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "SPI1_TDR,SPI1 Transmit Data Register"
|
|
bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,Deasserted"
|
|
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data"
|
|
else
|
|
;if PS=0
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "SPI1_TDR,SPI1 Transmit Data Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data"
|
|
endif
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "SPI1_SR,SPI1 Status Register"
|
|
in
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SPI1_IMR,SPI1 Interrupt Mask Register"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXEMPTY_set/clr ,Transmission Registers Empty Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " NSSR_set/clr ,NSS Rising Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " TXBUFE_set/clr ,Transmit Buffer Empty Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " RXBUFF_set/clr ,Receive Buffer Full Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " ENDTX_set/clr ,End of Transmit Buffer Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ENDRX_set/clr ,End of Receive Buffer Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " OVRES_set/clr ,Overrun Error Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " MODF_set/clr ,Mode Fault Error Inrerrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TDRE_set/clr ,SPI Transmit Data Register Empty Inrerrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RDRF_set/clr ,Receive Data Register Full Inrerrupt Mask" "Disabled,Enabled"
|
|
group.long 0x30++0x0F
|
|
line.long 0x0 "SPI1_CSR0,SPI1 Chip Select Register 0"
|
|
hexmask.long.byte 0x0 24.--31. 1. " DLYBCT ,Consecutive Transfers Delay"
|
|
hexmask.long.byte 0x0 16.--23. 1. " DLYBS ,Delay Before SPCK"
|
|
textline " "
|
|
hexmask.long.byte 0x0 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
|
|
bitfld.long 0x0 4.--7. " BITS ,Bits Per Transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x0 3. " CSAAT ,Chip Select Active After Transfer" "Risen,Not risen"
|
|
bitfld.long 0x0 1. " NCPHA ,Clock Phase" "Changed/captured,Captured/changed"
|
|
textline " "
|
|
bitfld.long 0x0 0. " CPOL ,Clock Polarity" "Low,High"
|
|
line.long 0x4 "SPI1_CSR1,SPI1 Chip Select Register 1"
|
|
hexmask.long.byte 0x4 24.--31. 1. " DLYBCT ,Consecutive Transfers Delay"
|
|
hexmask.long.byte 0x4 16.--23. 1. " DLYBS ,Delay Before SPCK"
|
|
textline " "
|
|
hexmask.long.byte 0x4 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
|
|
bitfld.long 0x4 4.--7. " BITS ,Bits Per Transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x4 3. " CSAAT ,Chip Select Active After Transfer" "Risen,Not risen"
|
|
bitfld.long 0x4 1. " NCPHA ,Clock Phase" "Changed/captured,Captured/changed"
|
|
textline " "
|
|
bitfld.long 0x4 0. " CPOL ,Clock Polarity" "Low,High"
|
|
line.long 0x8 "SPI1_CSR2,SPI1 Chip Select Register 2"
|
|
hexmask.long.byte 0x8 24.--31. 1. " DLYBCT ,Consecutive Transfers Delay"
|
|
hexmask.long.byte 0x8 16.--23. 1. " DLYBS ,Delay Before SPCK"
|
|
textline " "
|
|
hexmask.long.byte 0x8 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
|
|
bitfld.long 0x8 4.--7. " BITS ,Bits Per Transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x8 3. " CSAAT ,Chip Select Active After Transfer" "Risen,Not risen"
|
|
bitfld.long 0x8 1. " NCPHA ,Clock Phase" "Changed/captured,Captured/changed"
|
|
textline " "
|
|
bitfld.long 0x8 0. " CPOL ,Clock Polarity" "Low,High"
|
|
line.long 0xC "SPI1_CSR3,SPI1 Chip Select Register 3"
|
|
hexmask.long.byte 0xC 24.--31. 1. " DLYBCT ,Consecutive Transfers Delay"
|
|
hexmask.long.byte 0xC 16.--23. 1. " DLYBS ,Delay Before SPCK"
|
|
textline " "
|
|
hexmask.long.byte 0xC 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
|
|
bitfld.long 0xC 4.--7. " BITS ,Bits Per Transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
|
|
textline " "
|
|
bitfld.long 0xC 3. " CSAAT ,Chip Select Active After Transfer" "Risen,Not risen"
|
|
bitfld.long 0xC 1. " NCPHA ,Clock Phase" "Changed/captured,Captured/changed"
|
|
textline " "
|
|
bitfld.long 0xC 0. " CPOL ,Clock Polarity" "Low,High"
|
|
tree.end
|
|
tree.end
|
|
tree "TWI (Two-Wire Interface)"
|
|
base 0xfffb8000
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "TWI_CR,TWI Control Register"
|
|
bitfld.long 0x00 7. " SWRST ,Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 3. " MSDIS ,TWI Master Transfer Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MSEN ,TWI Master Transfer Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " STOP ,Stop Condition Send" "No effect,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 0. " START ,Start Condition Send" "No effect,Sent"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TWI_MMR,TWI Master Mode Register"
|
|
hexmask.long.byte 0x00 16.--22. 1. " DADR ,Device Address"
|
|
bitfld.long 0x00 12. " MREAD ,Master Read Direction" "Write,Read"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " IADRSZ ,Internal Device Address Size" "No address,1-byte,2-byte,3-byte"
|
|
if (((data.long(ad:(0xfffb8000+0x4)))&0x300)==0x300)
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "TWI_IADR,TWI Internal Address Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " IADR ,Internal Address"
|
|
elif (((data.long(ad:(0xfffb8000+0x4)))&0x300)==0x200)
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "TWI_IADR,TWI Internal Address Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " IADR ,Internal Address"
|
|
elif (((data.long(ad:(0xfffb8000+0x4)))&0x300)==0x100)
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "TWI_IADR,TWI Internal Address Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " IADR ,Internal Address"
|
|
else
|
|
hgroup.long 0x0c++0x3
|
|
hide.long 0x00 "TWI_IADR,TWI Internal Address Register"
|
|
endif
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "TWI_CWGR,TWI Clock Waveform Generator Register"
|
|
bitfld.long 0x0 16.--18. " CKDIV ,Clock Divider" "CDIVx1,CDIVx2,CDIVx4,CDIVx8,CDIVx16,CDIVx32,CDIVx64,CDIVx128"
|
|
hexmask.long.byte 0x0 8.--15. 1. " CHDIV ,Clock High Divider"
|
|
textline " "
|
|
hexmask.long.byte 0x0 0.--7. 1. " CLDIV ,Clock Low Divider"
|
|
hgroup.long 0x20++0x03
|
|
hide.long 0x00 "TWI_SR,TWI Status Register"
|
|
in
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "TWI_IMR,TWI Interrupt Mask Register"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " NACK_Clear/Set ,Non Acknowledge" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXRDY_Clear/Set ,Transmit Holding Register Ready" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXRDY_Clear/Set ,Receive Holding Register Ready" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXCOMP_Clear/Set ,Transmission Complete" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()!="AT91SAM7X512"&&cpu()!="AT91SAM7X256"&&cpu()!="AT91SAM7X128"&&cpu()!="AT91SAM7XC512"&&cpu()!="AT91SAM7XC256"&&cpu()!="AT91SAM7XC128")
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " UNRE_Clear/Set ,Underrun Error" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " OVRE_Clear/Set ,Overrun Error" "Disabled,Enabled"
|
|
endif
|
|
hgroup.long 0x30++0x03
|
|
hide.long 0x00 "TWI_RHR,TWI Receive Holding Register"
|
|
in
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "TWI_THR,TWI Transmit Holding Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXDATA ,Master/Slave Transmit Holding Data"
|
|
tree.end
|
|
tree.open "USARTs (Universal Synchronous Asynchronous Receiver Transmitters)"
|
|
tree "USART0 (Universal Synchronous Asynchronous Receiver Transmitter 0)"
|
|
base 0xfffc0000
|
|
width 0xA
|
|
if ((((data.long(ad:(0xfffc0000+0x4)))&0xE00)>=0xC00)&&((((data.long(ad:(0xfffc0000+0x4)))&0xF)==0x4)||(((data.long(ad:(0xfffc0000+0x4)))&0xF)==0x6)))
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "US0_CR,USART0 Control Register"
|
|
bitfld.long 0x00 19. " RTSDIS ,Request to Send Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 18. " RTSEN ,Request to Send Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DTRDIS ,Data Terminal Ready Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 16. " DTREN ,Data Terminal Ready Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RETTO ,Time-Out Rearm" "No effect,Restarted"
|
|
bitfld.long 0x00 14. " RSTNACK ,Non Acknowledge Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RSTIT ,Iterations Reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " SENDA ,Address Send" "No effect,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 11. " STTTO ,Time-Out Start" "No effect,Started"
|
|
bitfld.long 0x00 10. " STPBRK ,Break Stop" "No effect,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STTBRK ,Break Start" "No effect,Started"
|
|
bitfld.long 0x00 8. " RSTSTA ,Status Bits Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RSTTX ,Transmitter Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " RSTRX ,Receiver Reset" "No effect,Reset"
|
|
elif (((data.long(ad:(0xfffc0000+0x4)))&0xE00)>=0xC00)
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "US0_CR,USART0 Control Register"
|
|
bitfld.long 0x00 19. " RTSDIS ,Request to Send Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 18. " RTSEN ,Request to Send Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DTRDIS ,Data Terminal Ready Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 16. " DTREN ,Data Terminal Ready Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RETTO ,Time-Out Rearm" "No effect,Restarted"
|
|
bitfld.long 0x00 14. " RSTNACK ,Non Acknowledge Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RSTIT ,Iterations Reset" "No effect,?..."
|
|
bitfld.long 0x00 12. " SENDA ,Address Send" "No effect,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 11. " STTTO ,Time-Out Start" "No effect,Started"
|
|
bitfld.long 0x00 10. " STPBRK ,Break Stop" "No effect,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STTBRK ,Break Start" "No effect,Started"
|
|
bitfld.long 0x00 8. " RSTSTA ,Status Bits Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RSTTX ,Transmitter Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " RSTRX ,Receiver Reset" "No effect,Reset"
|
|
elif ((((data.long(ad:(0xfffc0000+0x4)))&0xE00)<0xC00)&&((((data.long(ad:(0xfffc0000+0x4)))&0xF)==0x4)||(((data.long(ad:(0xfffc0000+0x4)))&0xF)==0x6)))
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "US0_CR,USART0 Control Register"
|
|
bitfld.long 0x00 19. " RTSDIS ,Request to Send Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 18. " RTSEN ,Request to Send Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DTRDIS ,Data Terminal Ready Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 16. " DTREN ,Data Terminal Ready Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RETTO ,Time-Out Rearm" "No effect,Restarted"
|
|
bitfld.long 0x00 14. " RSTNACK ,Non Acknowledge Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RSTIT ,Iterations Reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " SENDA ,Address Send" "No effect,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " STTTO ,Time-Out Start" "No effect,Started"
|
|
bitfld.long 0x00 10. " STPBRK ,Break Stop" "No effect,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STTBRK ,Break Start" "No effect,Started"
|
|
bitfld.long 0x00 8. " RSTSTA ,Status Bits Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RSTTX ,Transmitter Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " RSTRX ,Receiver Reset" "No effect,Reset"
|
|
else
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "US0_CR,USART0 Control Register"
|
|
bitfld.long 0x00 19. " RTSDIS ,Request to Send Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 18. " RTSEN ,Request to Send Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DTRDIS ,Data Terminal Ready Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 16. " DTREN ,Data Terminal Ready Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RETTO ,Time-Out Rearm" "No effect,Restarted"
|
|
bitfld.long 0x00 14. " RSTNACK ,Non Acknowledge Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RSTIT ,Iterations Reset" "No effect,?..."
|
|
bitfld.long 0x00 12. " SENDA ,Address Send" "No effect,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " STTTO ,Time-Out Start" "No effect,Started"
|
|
bitfld.long 0x00 10. " STPBRK ,Break Stop" "No effect,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STTBRK ,Break Start" "No effect,Started"
|
|
bitfld.long 0x00 8. " RSTSTA ,Status Bits Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RSTTX ,Transmitter Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " RSTRX ,Receiver Reset" "No effect,Reset"
|
|
endif
|
|
width 0xA
|
|
if (((data.long(ad:(0xfffc0000+0x4)))&0x100)==0x100)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "US0_MR,USART0 Mode Register"
|
|
sif (cpu()!="AT91SAM7X512"&&cpu()!="AT91SAM7X256"&&cpu()!="AT91SAM7X128"&&cpu()!="AT91SAM7XC512"&&cpu()!="AT91SAM7XC256"&&cpu()!="AT91SAM7XC128")
|
|
bitfld.long 0x00 31. " ONEBIT ,Start Frame Delimiter Selector" "Command/data,One bit"
|
|
bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered"
|
|
bitfld.long 0x00 24.--26. " MAX_ITERATION ,Iterations Maximum Number in ISO7816 Mode (T=0)" "No iteration,1 iteration,2 iterations,3 iterations,4 iterations,5 iterations,6 iterations,7 iterations"
|
|
textline " "
|
|
bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "Generated,Not generated"
|
|
bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CLKO ,Clock Output Selection (SCK pin driven)" "Not driven,Driven"
|
|
bitfld.long 0x00 17. " MODE9 ,9-Bit Character Length" "CHRL,9-bit"
|
|
textline " "
|
|
bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first"
|
|
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic,Local,Remote"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " NBSTOP ,Stop Bits Number" "1 bit,Reserved,2 bits,?..."
|
|
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Space,Mark,No parity,No parity,Multidrop,Multidrop"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Selection" "Asynchronous,Synchronous"
|
|
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5-bit,6-bit,7-bit,8-bit"
|
|
textline " "
|
|
sif (cpuis("AT91CAP7*"))
|
|
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,Reserved,SCK"
|
|
else
|
|
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/DIV,Reserved,SCK"
|
|
endif
|
|
bitfld.long 0x00 0.--3. " USART_MODE ,USART Mode" "Normal,RS485,Handshaking,Modem,IS07816 T=0,Reserved,IS07816 T=1,Reserved,IrDA,?..."
|
|
textline " "
|
|
sif (cpu()!="AT91SAM7X512"&&cpu()!="AT91SAM7X256"&&cpu()!="AT91SAM7X128"&&cpu()!="AT91SAM7XC512"&&cpu()!="AT91SAM7XC256"&&cpu()!="AT91SAM7XC128"&&!cpuis("AT91CAP7*"))
|
|
bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization Command/Data Sync Start Frame Delimiter" "SYNC,US_THR"
|
|
endif
|
|
sif (cpu()=="AT91SAM7X512"||cpu()=="AT91SAM7X256"||cpu()=="AT91SAM7X128"||cpu()=="AT91SAM7XC512"||cpu()=="AT91SAM7XC256"||cpu()=="AT91SAM7XC128")
|
|
bitfld.long 0x00 21. " DSNACK ,Successive NACK Disable" "No,Yes"
|
|
endif
|
|
sif (cpuis("AT91CAP7*"))
|
|
bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "From 0 to 1,From 1 to 0"
|
|
bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization Command/Data Sync Start Frame Delimiter" "SYNC,US_THR"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DSNACK ,Successive NACK Disable" "No,Yes"
|
|
endif
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "US0_MR,USART0 Mode Register"
|
|
sif (cpu()!="AT91SAM7X512"&&cpu()!="AT91SAM7X256"&&cpu()!="AT91SAM7X128"&&cpu()!="AT91SAM7XC512"&&cpu()!="AT91SAM7XC256"&&cpu()!="AT91SAM7XC128")
|
|
bitfld.long 0x00 31. " ONEBIT ,Start Frame Delimiter Selector" "Command/data,One bit"
|
|
bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered"
|
|
bitfld.long 0x00 24.--26. " MAX_ITERATION ,Iterations Maximum Number in ISO7816 Mode (T=0)" "No iteration,1 iteration,2 iterations,3 iterations,4 iterations,5 iterations,6 iterations,7 iterations"
|
|
textline " "
|
|
bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "Generated,Not generated"
|
|
bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CLKO ,Clock Output Selection (SCK pin driven)" "Not driven,Driven"
|
|
bitfld.long 0x00 17. " MODE9 ,9-Bit Character Length" "CHRL,9-bit"
|
|
textline " "
|
|
bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first"
|
|
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic,Local,Remote"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " NBSTOP ,Stop Bits Number" "1 bit,1.5 bits,2 bits,?..."
|
|
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Space,Mark,No parity,No parity,Multidrop,Multidrop"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Selection" "Asynchronous,Synchronous"
|
|
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5-bit,6-bit,7-bit,8-bit"
|
|
textline " "
|
|
sif (cpuis("AT91CAP7*"))
|
|
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,Reserved,SCK"
|
|
else
|
|
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/DIV,Reserved,SCK"
|
|
endif
|
|
bitfld.long 0x00 0.--3. " USART_MODE ,USART Mode" "Normal,RS485,Handshaking,Modem,IS07816 T=0,Reserved,IS07816 T=1,Reserved,IrDA,?..."
|
|
textline " "
|
|
sif (cpu()!="AT91SAM7X512"&&cpu()!="AT91SAM7X256"&&cpu()!="AT91SAM7X128"&&cpu()!="AT91SAM7XC512"&&cpu()!="AT91SAM7XC256"&&cpu()!="AT91SAM7XC128"&&!cpuis("AT91CAP7*"))
|
|
bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "SYNC,US_THR"
|
|
endif
|
|
sif (cpu()=="AT91SAM7X512"||cpu()=="AT91SAM7X256"||cpu()=="AT91SAM7X128"||cpu()=="AT91SAM7XC512"||cpu()=="AT91SAM7XC256"||cpu()=="AT91SAM7XC128")
|
|
bitfld.long 0x00 21. " DSNACK ,Successive NACK Disable" "No,Yes"
|
|
endif
|
|
sif (cpuis("AT91CAP7*"))
|
|
bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "From 0 to 1,From 1 to 0"
|
|
bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization Command/Data Sync Start Frame Delimiter" "SYNC,US_THR"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DSNACK ,Successive NACK Disable" "No,Yes"
|
|
endif
|
|
endif
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "US0_IMR,USART0 Interrupt Mask Register"
|
|
sif (cpu()!="AT91SAM7X512"&&cpu()!="AT91SAM7X256"&&cpu()!="AT91SAM7X128"&&cpu()!="AT91SAM7XC512"&&cpu()!="AT91SAM7XC256"&&cpu()!="AT91SAM7XC128")
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " MANE_set/clr ,Manchester Error Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " CTSIC_set/clr ,Clear to Send Input Change Interrupt Mask" "Disabled,Enabled"
|
|
else
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " CTSIC_set/clr ,Clear to Send Input Change Interrupt Mask" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " DCDIC_set/clr ,Data Carrier Detect Input Change Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " DSRIC_set/clr ,Data Set Ready Input Change Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " RIIC_set/clr ,Ring Indicator Input Change Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " NACK_set/clr ,Non Acknowledge Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RXBUFF_set/clr ,Buffer Full Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TXBUFE_set/clr ,Buffer Empty Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " ITERATION_set/clr ,Iteration Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXEMPTY_set/clr ,TXEMPTY Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " TIMEOUT_set/clr ,Time-Out Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " PARE_set/clr ,Parity Error Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " FRAME_set/clr ,Framing Error Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " OVRE_set/clr ,Overrun Error Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ENDTX_set/clr ,Transmit End Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " ENDRX_set/clr ,Receive Transfer End Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " RXBRK_set/clr ,Receiver Break Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TXRDY_set/clr ,TXRDY Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RXRDY_set/clr ,RXRDY Interrupt Mask" "Disabled,Enabled"
|
|
width 0xA
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "US0_CSR,USART0 Channel Status Register"
|
|
in
|
|
hgroup.long 0x18++0x03
|
|
hide.long 0x00 "US0_RHR,USART0 Receive Holding Register"
|
|
in
|
|
wgroup.long 0x1C++0x03
|
|
line.long 0x00 "US0_THR,USART0 Transmit Holding Register"
|
|
bitfld.long 0x00 15. " TXSYNH ,Sync Field to Transmit" "Data,Command"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to Transmit"
|
|
group.long 0x20++0x0B
|
|
line.long 0x00 "US0_BRGR,USART0 Baud Rate Generator Register"
|
|
bitfld.long 0x00 16.--18. " FP ,Fractional Part" "Disabled,1/8,2/8,3/8,4/8,5/8,6/8,7/8"
|
|
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider"
|
|
line.long 0x04 "US0_RTOR,USART0 Receiver Time-Out Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TO ,Time-Out Value"
|
|
line.long 0x08 "US0_TTGR,USART0 Transmitter Timeguard Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " TG ,Timeguard Value"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "US0_FIDI,USART0 FI DI Ratio Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " FI_DI_RATIO ,FI Over DI Ratio Value"
|
|
hgroup.long 0x44++0x3
|
|
hide.long 0x00 "US0_NER,USART0 Errors Number Register"
|
|
in
|
|
sif (cpuis("AT91CAP7*"))
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "US0_MAN,USART0 Manchester Configuration Register"
|
|
bitfld.long 0x00 30. " DRIFT ,Drift compensation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " RX_MPOL ,Receiver Manchester Polarity" "0:zero-to-one/1:one-to-zero,0:one-to-zero/1:zero-to-one"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " RX_PP ,Receiver Preamble Pattern detected" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RX_PL ,Receiver Preamble Length" "Disabled,1 x Bit Period,2 x Bit Period,3 x Bit Period,4 x Bit Period,5 x Bit Period,6 x Bit Period,7 x Bit Period,8 x Bit Period,9 x Bit Period,10 x Bit Period,11 x Bit Period,12 x Bit Period,13 x Bit Period,14 x Bit Period,15 x Bit Period"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TX_MPOL ,Transmitter Manchester Polarity" "0:zero-to-one/1:one-to-zero,0:one-to-zero/1:zero-to-one"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " TX_PP ,Transmitter Preamble Pattern" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " TX_PL ,Transmitter Preamble Length" "Disabled,1 x Bit Period,2 x Bit Period,3 x Bit Period,4 x Bit Period,5 x Bit Period,6 x Bit Period,7 x Bit Period,8 x Bit Period,9 x Bit Period,10 x Bit Period,11 x Bit Period,12 x Bit Period,13 x Bit Period,14 x Bit Period,15 x Bit Period"
|
|
endif
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "US0_IF,USART0 IrDA Filter Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. " IRDA_FILTER ,IrDA Filter"
|
|
tree.end
|
|
tree "USART1 (Universal Synchronous Asynchronous Receiver Transmitter 1)"
|
|
base 0xfffc4000
|
|
width 0xA
|
|
if ((((data.long(ad:(0xfffc4000+0x4)))&0xE00)>=0xC00)&&((((data.long(ad:(0xfffc4000+0x4)))&0xF)==0x4)||(((data.long(ad:(0xfffc4000+0x4)))&0xF)==0x6)))
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "US1_CR,USART1 Control Register"
|
|
bitfld.long 0x00 19. " RTSDIS ,Request to Send Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 18. " RTSEN ,Request to Send Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DTRDIS ,Data Terminal Ready Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 16. " DTREN ,Data Terminal Ready Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RETTO ,Time-Out Rearm" "No effect,Restarted"
|
|
bitfld.long 0x00 14. " RSTNACK ,Non Acknowledge Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RSTIT ,Iterations Reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " SENDA ,Address Send" "No effect,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 11. " STTTO ,Time-Out Start" "No effect,Started"
|
|
bitfld.long 0x00 10. " STPBRK ,Break Stop" "No effect,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STTBRK ,Break Start" "No effect,Started"
|
|
bitfld.long 0x00 8. " RSTSTA ,Status Bits Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RSTTX ,Transmitter Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " RSTRX ,Receiver Reset" "No effect,Reset"
|
|
elif (((data.long(ad:(0xfffc4000+0x4)))&0xE00)>=0xC00)
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "US1_CR,USART1 Control Register"
|
|
bitfld.long 0x00 19. " RTSDIS ,Request to Send Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 18. " RTSEN ,Request to Send Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DTRDIS ,Data Terminal Ready Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 16. " DTREN ,Data Terminal Ready Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RETTO ,Time-Out Rearm" "No effect,Restarted"
|
|
bitfld.long 0x00 14. " RSTNACK ,Non Acknowledge Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RSTIT ,Iterations Reset" "No effect,?..."
|
|
bitfld.long 0x00 12. " SENDA ,Address Send" "No effect,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 11. " STTTO ,Time-Out Start" "No effect,Started"
|
|
bitfld.long 0x00 10. " STPBRK ,Break Stop" "No effect,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STTBRK ,Break Start" "No effect,Started"
|
|
bitfld.long 0x00 8. " RSTSTA ,Status Bits Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RSTTX ,Transmitter Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " RSTRX ,Receiver Reset" "No effect,Reset"
|
|
elif ((((data.long(ad:(0xfffc4000+0x4)))&0xE00)<0xC00)&&((((data.long(ad:(0xfffc4000+0x4)))&0xF)==0x4)||(((data.long(ad:(0xfffc4000+0x4)))&0xF)==0x6)))
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "US1_CR,USART1 Control Register"
|
|
bitfld.long 0x00 19. " RTSDIS ,Request to Send Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 18. " RTSEN ,Request to Send Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DTRDIS ,Data Terminal Ready Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 16. " DTREN ,Data Terminal Ready Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RETTO ,Time-Out Rearm" "No effect,Restarted"
|
|
bitfld.long 0x00 14. " RSTNACK ,Non Acknowledge Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RSTIT ,Iterations Reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " SENDA ,Address Send" "No effect,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " STTTO ,Time-Out Start" "No effect,Started"
|
|
bitfld.long 0x00 10. " STPBRK ,Break Stop" "No effect,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STTBRK ,Break Start" "No effect,Started"
|
|
bitfld.long 0x00 8. " RSTSTA ,Status Bits Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RSTTX ,Transmitter Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " RSTRX ,Receiver Reset" "No effect,Reset"
|
|
else
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "US1_CR,USART1 Control Register"
|
|
bitfld.long 0x00 19. " RTSDIS ,Request to Send Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 18. " RTSEN ,Request to Send Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DTRDIS ,Data Terminal Ready Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 16. " DTREN ,Data Terminal Ready Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RETTO ,Time-Out Rearm" "No effect,Restarted"
|
|
bitfld.long 0x00 14. " RSTNACK ,Non Acknowledge Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RSTIT ,Iterations Reset" "No effect,?..."
|
|
bitfld.long 0x00 12. " SENDA ,Address Send" "No effect,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " STTTO ,Time-Out Start" "No effect,Started"
|
|
bitfld.long 0x00 10. " STPBRK ,Break Stop" "No effect,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STTBRK ,Break Start" "No effect,Started"
|
|
bitfld.long 0x00 8. " RSTSTA ,Status Bits Reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
|
|
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RSTTX ,Transmitter Reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " RSTRX ,Receiver Reset" "No effect,Reset"
|
|
endif
|
|
width 0xA
|
|
if (((data.long(ad:(0xfffc4000+0x4)))&0x100)==0x100)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "US1_MR,USART1 Mode Register"
|
|
sif (cpu()!="AT91SAM7X512"&&cpu()!="AT91SAM7X256"&&cpu()!="AT91SAM7X128"&&cpu()!="AT91SAM7XC512"&&cpu()!="AT91SAM7XC256"&&cpu()!="AT91SAM7XC128")
|
|
bitfld.long 0x00 31. " ONEBIT ,Start Frame Delimiter Selector" "Command/data,One bit"
|
|
bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered"
|
|
bitfld.long 0x00 24.--26. " MAX_ITERATION ,Iterations Maximum Number in ISO7816 Mode (T=0)" "No iteration,1 iteration,2 iterations,3 iterations,4 iterations,5 iterations,6 iterations,7 iterations"
|
|
textline " "
|
|
bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "Generated,Not generated"
|
|
bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CLKO ,Clock Output Selection (SCK pin driven)" "Not driven,Driven"
|
|
bitfld.long 0x00 17. " MODE9 ,9-Bit Character Length" "CHRL,9-bit"
|
|
textline " "
|
|
bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first"
|
|
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic,Local,Remote"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " NBSTOP ,Stop Bits Number" "1 bit,Reserved,2 bits,?..."
|
|
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Space,Mark,No parity,No parity,Multidrop,Multidrop"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Selection" "Asynchronous,Synchronous"
|
|
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5-bit,6-bit,7-bit,8-bit"
|
|
textline " "
|
|
sif (cpuis("AT91CAP7*"))
|
|
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,Reserved,SCK"
|
|
else
|
|
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/DIV,Reserved,SCK"
|
|
endif
|
|
bitfld.long 0x00 0.--3. " USART_MODE ,USART Mode" "Normal,RS485,Handshaking,Modem,IS07816 T=0,Reserved,IS07816 T=1,Reserved,IrDA,?..."
|
|
textline " "
|
|
sif (cpu()!="AT91SAM7X512"&&cpu()!="AT91SAM7X256"&&cpu()!="AT91SAM7X128"&&cpu()!="AT91SAM7XC512"&&cpu()!="AT91SAM7XC256"&&cpu()!="AT91SAM7XC128"&&!cpuis("AT91CAP7*"))
|
|
bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization Command/Data Sync Start Frame Delimiter" "SYNC,US_THR"
|
|
endif
|
|
sif (cpu()=="AT91SAM7X512"||cpu()=="AT91SAM7X256"||cpu()=="AT91SAM7X128"||cpu()=="AT91SAM7XC512"||cpu()=="AT91SAM7XC256"||cpu()=="AT91SAM7XC128")
|
|
bitfld.long 0x00 21. " DSNACK ,Successive NACK Disable" "No,Yes"
|
|
endif
|
|
sif (cpuis("AT91CAP7*"))
|
|
bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "From 0 to 1,From 1 to 0"
|
|
bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization Command/Data Sync Start Frame Delimiter" "SYNC,US_THR"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DSNACK ,Successive NACK Disable" "No,Yes"
|
|
endif
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "US1_MR,USART1 Mode Register"
|
|
sif (cpu()!="AT91SAM7X512"&&cpu()!="AT91SAM7X256"&&cpu()!="AT91SAM7X128"&&cpu()!="AT91SAM7XC512"&&cpu()!="AT91SAM7XC256"&&cpu()!="AT91SAM7XC128")
|
|
bitfld.long 0x00 31. " ONEBIT ,Start Frame Delimiter Selector" "Command/data,One bit"
|
|
bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered"
|
|
bitfld.long 0x00 24.--26. " MAX_ITERATION ,Iterations Maximum Number in ISO7816 Mode (T=0)" "No iteration,1 iteration,2 iterations,3 iterations,4 iterations,5 iterations,6 iterations,7 iterations"
|
|
textline " "
|
|
bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "Generated,Not generated"
|
|
bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CLKO ,Clock Output Selection (SCK pin driven)" "Not driven,Driven"
|
|
bitfld.long 0x00 17. " MODE9 ,9-Bit Character Length" "CHRL,9-bit"
|
|
textline " "
|
|
bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first"
|
|
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic,Local,Remote"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " NBSTOP ,Stop Bits Number" "1 bit,1.5 bits,2 bits,?..."
|
|
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Space,Mark,No parity,No parity,Multidrop,Multidrop"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Selection" "Asynchronous,Synchronous"
|
|
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5-bit,6-bit,7-bit,8-bit"
|
|
textline " "
|
|
sif (cpuis("AT91CAP7*"))
|
|
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,Reserved,SCK"
|
|
else
|
|
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/DIV,Reserved,SCK"
|
|
endif
|
|
bitfld.long 0x00 0.--3. " USART_MODE ,USART Mode" "Normal,RS485,Handshaking,Modem,IS07816 T=0,Reserved,IS07816 T=1,Reserved,IrDA,?..."
|
|
textline " "
|
|
sif (cpu()!="AT91SAM7X512"&&cpu()!="AT91SAM7X256"&&cpu()!="AT91SAM7X128"&&cpu()!="AT91SAM7XC512"&&cpu()!="AT91SAM7XC256"&&cpu()!="AT91SAM7XC128"&&!cpuis("AT91CAP7*"))
|
|
bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "SYNC,US_THR"
|
|
endif
|
|
sif (cpu()=="AT91SAM7X512"||cpu()=="AT91SAM7X256"||cpu()=="AT91SAM7X128"||cpu()=="AT91SAM7XC512"||cpu()=="AT91SAM7XC256"||cpu()=="AT91SAM7XC128")
|
|
bitfld.long 0x00 21. " DSNACK ,Successive NACK Disable" "No,Yes"
|
|
endif
|
|
sif (cpuis("AT91CAP7*"))
|
|
bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "From 0 to 1,From 1 to 0"
|
|
bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization Command/Data Sync Start Frame Delimiter" "SYNC,US_THR"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DSNACK ,Successive NACK Disable" "No,Yes"
|
|
endif
|
|
endif
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "US1_IMR,USART1 Interrupt Mask Register"
|
|
sif (cpu()!="AT91SAM7X512"&&cpu()!="AT91SAM7X256"&&cpu()!="AT91SAM7X128"&&cpu()!="AT91SAM7XC512"&&cpu()!="AT91SAM7XC256"&&cpu()!="AT91SAM7XC128")
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " MANE_set/clr ,Manchester Error Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " CTSIC_set/clr ,Clear to Send Input Change Interrupt Mask" "Disabled,Enabled"
|
|
else
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " CTSIC_set/clr ,Clear to Send Input Change Interrupt Mask" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " DCDIC_set/clr ,Data Carrier Detect Input Change Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " DSRIC_set/clr ,Data Set Ready Input Change Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " RIIC_set/clr ,Ring Indicator Input Change Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " NACK_set/clr ,Non Acknowledge Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RXBUFF_set/clr ,Buffer Full Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TXBUFE_set/clr ,Buffer Empty Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " ITERATION_set/clr ,Iteration Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXEMPTY_set/clr ,TXEMPTY Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " TIMEOUT_set/clr ,Time-Out Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " PARE_set/clr ,Parity Error Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " FRAME_set/clr ,Framing Error Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " OVRE_set/clr ,Overrun Error Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ENDTX_set/clr ,Transmit End Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " ENDRX_set/clr ,Receive Transfer End Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " RXBRK_set/clr ,Receiver Break Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TXRDY_set/clr ,TXRDY Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RXRDY_set/clr ,RXRDY Interrupt Mask" "Disabled,Enabled"
|
|
width 0xA
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "US1_CSR,USART1 Channel Status Register"
|
|
in
|
|
hgroup.long 0x18++0x03
|
|
hide.long 0x00 "US1_RHR,USART1 Receive Holding Register"
|
|
in
|
|
wgroup.long 0x1C++0x03
|
|
line.long 0x00 "US1_THR,USART1 Transmit Holding Register"
|
|
bitfld.long 0x00 15. " TXSYNH ,Sync Field to Transmit" "Data,Command"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to Transmit"
|
|
group.long 0x20++0x0B
|
|
line.long 0x00 "US1_BRGR,USART1 Baud Rate Generator Register"
|
|
bitfld.long 0x00 16.--18. " FP ,Fractional Part" "Disabled,1/8,2/8,3/8,4/8,5/8,6/8,7/8"
|
|
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider"
|
|
line.long 0x04 "US1_RTOR,USART1 Receiver Time-Out Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TO ,Time-Out Value"
|
|
line.long 0x08 "US1_TTGR,USART1 Transmitter Timeguard Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " TG ,Timeguard Value"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "US1_FIDI,USART1 FI DI Ratio Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " FI_DI_RATIO ,FI Over DI Ratio Value"
|
|
hgroup.long 0x44++0x3
|
|
hide.long 0x00 "US1_NER,USART1 Errors Number Register"
|
|
in
|
|
sif (cpuis("AT91CAP7*"))
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "US1_MAN,USART1 Manchester Configuration Register"
|
|
bitfld.long 0x00 30. " DRIFT ,Drift compensation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " RX_MPOL ,Receiver Manchester Polarity" "0:zero-to-one/1:one-to-zero,0:one-to-zero/1:zero-to-one"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " RX_PP ,Receiver Preamble Pattern detected" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " RX_PL ,Receiver Preamble Length" "Disabled,1 x Bit Period,2 x Bit Period,3 x Bit Period,4 x Bit Period,5 x Bit Period,6 x Bit Period,7 x Bit Period,8 x Bit Period,9 x Bit Period,10 x Bit Period,11 x Bit Period,12 x Bit Period,13 x Bit Period,14 x Bit Period,15 x Bit Period"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TX_MPOL ,Transmitter Manchester Polarity" "0:zero-to-one/1:one-to-zero,0:one-to-zero/1:zero-to-one"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " TX_PP ,Transmitter Preamble Pattern" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " TX_PL ,Transmitter Preamble Length" "Disabled,1 x Bit Period,2 x Bit Period,3 x Bit Period,4 x Bit Period,5 x Bit Period,6 x Bit Period,7 x Bit Period,8 x Bit Period,9 x Bit Period,10 x Bit Period,11 x Bit Period,12 x Bit Period,13 x Bit Period,14 x Bit Period,15 x Bit Period"
|
|
endif
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "US1_IF,USART1 IrDA Filter Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. " IRDA_FILTER ,IrDA Filter"
|
|
tree.end
|
|
tree.end
|
|
tree "SSC (Synchronous Serial Controller)"
|
|
base 0xfffd4000
|
|
width 10.
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "SSC_CR,SSC Control Register"
|
|
bitfld.long 0x00 15. " SWRST ,Software Reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " TXDIS ,Transmit Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXEN ,Transmit Enable" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " RXDIS ,Receive Disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXEN ,Receive Enable" "No effect,Enabled"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SSC_CMR,SSC Clock Mode Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " DIV ,Clock Divider"
|
|
group.long 0x10++0x0f
|
|
line.long 0x00 "SSC_RCMR,SSC Receive Clock Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PERIOD ,Receive Period Divider Selection"
|
|
hexmask.long.byte 0x00 16.--23. 1. " STTDLY ,Receive Start Delay"
|
|
textline " "
|
|
bitfld.long 0x00 12. " STOP ,Receive Stop Selection" "Completed,Compare 1"
|
|
bitfld.long 0x00 8.--11. " START ,Receive Start Selection" "Continuous,Transmit start,Low,High,Falling,Rising,Level change,Any edge,Compare 0,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CKG ,Receive Clock Gating Selection" "No gating,Low,High,?..."
|
|
bitfld.long 0x00 5. " CKI ,Receive Clock Inversion" "Falling/rising,Rising/falling"
|
|
textline " "
|
|
bitfld.long 0x00 2.--4. " CKO ,Receive Clock Output Mode Selection" "No clock,Continuous,During transfers,?..."
|
|
bitfld.long 0x00 0.--1. " CKS ,Receive Clock Selection" "Divided,TK,RK,?..."
|
|
line.long 0x04 "SSC_RFMR,SSC Receive Frame Mode Register"
|
|
sif (cpuis("UC3*"))
|
|
bitfld.long 0x04 28.--31. " FSLENHI ,Receive Frame Sync Length High part" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x04 24. " FSEDGE ,Frame Sync Edge Detection" "Positive,Negative"
|
|
bitfld.long 0x04 20.--22. " FSOS ,Receive Frame Sync Output Selection" "No signal,Negative,Positive,Low,High,Toggled,?..."
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " FSLEN ,Receive Frame Sync Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--11. " DATNB ,Data Number per Frame" "1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,9 words,10 words,11 words,12 words,13 words,14 words,15 words,16 words"
|
|
textline " "
|
|
bitfld.long 0x04 7. " MSBF ,Most Significant Bit First" "LSB,MSB"
|
|
bitfld.long 0x04 5. " LOOP ,Loop Mode" "Normal,Loop"
|
|
textline " "
|
|
bitfld.long 0x04 0.--4. " DATLEN ,Data Length" "Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit,17-bit,18-bit,19-bit,20-bit,21-bit,22-bit,23-bit,24-bit,25-bit,26-bit,27-bit,28-bit,29-bit,30-bit,31-bit,32-bit"
|
|
line.long 0x08 "SSC_TCMR,SSC Transmit Clock Mode Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " PERIOD ,Transmit Period Divider Selection"
|
|
hexmask.long.byte 0x08 16.--23. 1. " STTDLY ,Transmit Start Delay"
|
|
textline " "
|
|
bitfld.long 0x08 8.--11. " START ,Transmit Start Selection" "Continuous,Receive start,Low,High,Falling,Rising,Level change,Any edge,?..."
|
|
bitfld.long 0x08 6.--7. " CKG ,Transmit Clock Gating Selection" "No gating,Low,High,?..."
|
|
textline " "
|
|
bitfld.long 0x08 5. " CKI ,Transmit Clock Inversion" "Falling/rising,Rising/falling"
|
|
bitfld.long 0x08 2.--4. " CKO ,Transmit Clock Output Mode Selection" "No clock,Continuous,During transfers,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0.--1. " CKS ,Transmit Clock Selection" "Divided,RK,TK,?..."
|
|
line.long 0x0C "SSC_TFMR,SSC Transmit Frame Mode Register"
|
|
sif (cpuis("UC3*"))
|
|
bitfld.long 0x0c 28.--31. " FSLENHI ,Receive Frame Sync Length High part" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0c 24. " FSEDGE ,Frame Sync Edge Detection" "Positive,Negative"
|
|
bitfld.long 0x0c 23. " FSDEN ,Frame Sync Data Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 20.--22. " FSOS ,Transmit Frame Sync Output Selection" "No signal,Negative,Positive,Low,High,Toggled,?..."
|
|
bitfld.long 0x0c 16.--19. " FSLEN ,Transmit Frame Sync Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x0c 8.--11. " DATNB ,Data Number per Frame" "1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,9 words,10 words,11 words,12 words,13 words,14 words,15 words,16 words"
|
|
bitfld.long 0x0c 7. " MSBF ,Most Significant Bit First" "LSB,MSB"
|
|
textline " "
|
|
bitfld.long 0x0c 5. " DATDEF ,Data Default Value" "Low,High"
|
|
bitfld.long 0x0c 0.--4. " DATLEN ,Data Length" "Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit,17-bit,18-bit,19-bit,20-bit,21-bit,22-bit,23-bit,24-bit,25-bit,26-bit,27-bit,28-bit,29-bit,30-bit,31-bit,32-bit"
|
|
hgroup.long 0x20++0x03
|
|
hide.long 0x00 "SSC_RHR,SSC Receive Holding Register"
|
|
in
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "SSC_THR,SSC Transmit Holding Register"
|
|
hgroup.long 0x30++0x03
|
|
hide.long 0x00 "SSC_RSHR,SSC Receive Synchronization Holding Register"
|
|
in
|
|
group.long 0x34++0x0b
|
|
line.long 0x00 "SSC_TSHR,SSC Transmit Synchronization Holding Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TSDAT ,Transmit Synchronization Data"
|
|
line.long 0x04 "SSC_RC0R,SSC Receive Compare 0 Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " CP0 ,Receive Compare Data 0"
|
|
line.long 0x08 "SSC_RC1R,SSC Receive Compare 1 Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " CP1 ,Receive Compare Data 1"
|
|
hgroup.long 0x40++0x03
|
|
hide.long 0x00 "SSC_SR,SSC Status Register"
|
|
in
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "SSC_IMR,SSC Interrupt Mask Register"
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " RXSYN_Clear/Set ,Rx Sync Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TXSYN_Clear/Set ,Tx Sync Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " CP1_Clear/Set ,Compare 1 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " CP0_Clear/Set ,Compare 0 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " RXBUFF_Clear/Set ,Receive Buffer Full Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " ENDRX_Clear/Set ,Reception End Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " OVRUN_Clear/Set ,Receive Overrun Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " RXRDY_Clear/Set ,Receive Ready Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " TXBUFE_Clear/Set ,Transmit Buffer Empty Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " ENDTX_Clear/Set ,Transmission End Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TXEMPTY_Clear/Set ,Transmit Empty Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXRDY_Clear/Set ,Transmit Ready Interrupt Mask" "Disabled,Enabled"
|
|
tree.end
|
|
tree "TC (Timer/Counter)"
|
|
base 0xfffa0000
|
|
width 0x8
|
|
wgroup.long 0xc0++0x03
|
|
line.long 0x00 "TC_BCR,TC Block Control Register"
|
|
bitfld.long 0x00 0. " SYNC , Synchro Command" "No effect,Asserted"
|
|
group.long 0xc4++0x03
|
|
line.long 0x00 "TC_BMR,TC Block Mode Register"
|
|
bitfld.long 0x00 4.--5. " TC2XC2S ,External Clock Signal 2 Selection" "TCLK2,No signal,TIOA0,TIOA1"
|
|
bitfld.long 0x00 2.--3. " TC1XC1S ,External Clock Signal 1 Selection" "TCLK1,No signal,TIOA0,TIOA2"
|
|
bitfld.long 0x00 0.--1. " TC0XC0S ,External Clock Signal 0 Selection" "TCLK0,No signal,TIOA1,TIOA2"
|
|
width 0x9
|
|
tree "TC Channel 0"
|
|
wgroup.long (0x00+(0*0x40))++0x03
|
|
line.long 0x00 "TC0_CCR,TC0 Channel Control Register"
|
|
bitfld.long 0x00 2. " SWTRG ,Software Trigger Command" "No effect,Performed"
|
|
bitfld.long 0x00 1. " CLKDIS ,Counter Clock Disable Command" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable Command" "No effect,Enabled"
|
|
if (((data.long(ad:(0xfffa0000+0x4)))&0x8000)==0x8000)
|
|
group.long (0x04+(0*0x40))++0x03
|
|
line.long 0x00 "TC0_CMR,TC0 Channel Mode Register"
|
|
bitfld.long 0x00 30.--31. " BSWTRG ,Software Trigger Effect on TIOB" "No effect,Set,Cleared,Toggled"
|
|
bitfld.long 0x00 28.--29. " BEEVT ,External Event Effect on TIOB" "No effect,Set,Cleared,Toggled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Waveform Mode Enable" "Capture,Waveform"
|
|
bitfld.long 0x00 26.--27. " BCPC ,RC Compare Effect on TIOB" "No effect,Set,Cleared,Toggled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BCPB ,RB Compare Effect on TIOB" "No effect,Set,Cleared,Toggled"
|
|
bitfld.long 0x00 22.--23. " ASWTRG ,Software Trigger Effect on TIOA" "No effect,Set,Cleared,Toggled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " AEEVT ,External Event Effect on TIOA" "No effect,Set,Cleared,Toggled"
|
|
bitfld.long 0x00 18.--19. " ACPC ,RC Compare Effect on TIOA" "No effect,Set,Cleared,Toggled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " ACPA ,RA Compare Effect on TIOA" "No effect,Set,Cleared,Toggled"
|
|
bitfld.long 0x00 13.--14. " WAVSEL ,Waveform Selection" "UP/non-auto,UPDOWN/non-auto,UP/auto,UPDOWN/auto"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ENETRG ,External Event Trigger Enable" "No effect,Reset/started"
|
|
bitfld.long 0x00 10.--11. " EEVT ,External Event Selection" "TIOB,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " EEVTEDG ,External Event Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.long 0x00 7. " CPCDIS ,Counter Clock Disable with RC Compare" "Not disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CPCSTOP ,Counter Clock Stopped With RC Compare" "Not stopped,Stopped"
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invertion" "Rising,Falling"
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "CLOCK1,CLOCK2,CLOCK3,CLOCK4,CLOCK5,XC0,XC1,XC2"
|
|
else
|
|
group.long (0x04+(0*0x40))++0x03
|
|
line.long 0x00 "TC0_CMR,TC0 Channel Mode Register"
|
|
bitfld.long 0x00 18.--19. " LDRB ,RB Loading Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.long 0x00 16.--17. " LDRA ,RA Loading Selection" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Waveform Mode Enable" "Capture,Waveform"
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Reset/started"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ABETRG ,External Trigger Selection" "TIOB,TIOA"
|
|
bitfld.long 0x00 8.--9. " ETRGEDG ,External Trigger Edge Selection" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LDBDIS ,Counter Clock Disable With RB Loading" "Not disabled,Disabled"
|
|
bitfld.long 0x00 6. " LDBSTOP ,Counter Clock Stop With RB Loading" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0,XC1,XC2"
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invertion" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "CLOCK1,CLOCK2,CLOCK3,CLOCK4,CLOCK5,XC0,XC1,XC2"
|
|
endif
|
|
rgroup.long (0x10+(0*0x40))++0x03
|
|
line.long 0x00 "TC0_CV,TC0 Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CV ,Counter Value"
|
|
if (((data.long(ad:(0xfffa0000+0x4)))&0x8000)==0x8000)
|
|
group.long (0x14+(0*0x40))++0x7
|
|
line.long 0x00 "TC0_RA,TC0 Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A Value"
|
|
line.long 0x04 "TC0_RB,TC0 Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B Value"
|
|
else
|
|
rgroup.long (0x14+(0*0x40))++0x07
|
|
line.long 0x00 "TC0_RA,TC0 Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A Value"
|
|
line.long 0x04 "TC0_RB,TC0 Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B Value"
|
|
endif
|
|
group.long (0x1C+(0*0x40))++0x03
|
|
line.long 0x00 "TC0_RC,TC0 Register C"
|
|
hexmask.long.word 0x00 0.--15. 1. " RC ,Register C Value"
|
|
hgroup.long (0x20+(0*0x40))++0x03
|
|
hide.long 0x00 "TC0_SR,TC0 Status Register"
|
|
in
|
|
group.long (0x2C+(0*0x40))++0x03
|
|
line.long 0x00 "TC0_IMR,TC0 Interrupt Mask Register"
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " ETRGS_set/clr ,External Trigger" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " LDRBS_set/clr ,RB Loading" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " LDRAS_set/clr ,RA Loading" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CPCS_set/clr ,RC Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CPBS_set/clr ,RB Compare" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CPAS_set/clr ,RA Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " LOVRS_set/clr ,Load Overrun" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " COVFS_set/clr ,Counter Overflow" "Disabled,Enabled"
|
|
tree.end
|
|
width 0xB
|
|
width 0x9
|
|
tree "TC Channel 1"
|
|
wgroup.long (0x00+(1*0x40))++0x03
|
|
line.long 0x00 "TC1_CCR,TC1 Channel Control Register"
|
|
bitfld.long 0x00 2. " SWTRG ,Software Trigger Command" "No effect,Performed"
|
|
bitfld.long 0x00 1. " CLKDIS ,Counter Clock Disable Command" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable Command" "No effect,Enabled"
|
|
if (((data.long(ad:(0xfffa0040+0x4)))&0x8000)==0x8000)
|
|
group.long (0x04+(1*0x40))++0x03
|
|
line.long 0x00 "TC1_CMR,TC1 Channel Mode Register"
|
|
bitfld.long 0x00 30.--31. " BSWTRG ,Software Trigger Effect on TIOB" "No effect,Set,Cleared,Toggled"
|
|
bitfld.long 0x00 28.--29. " BEEVT ,External Event Effect on TIOB" "No effect,Set,Cleared,Toggled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Waveform Mode Enable" "Capture,Waveform"
|
|
bitfld.long 0x00 26.--27. " BCPC ,RC Compare Effect on TIOB" "No effect,Set,Cleared,Toggled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BCPB ,RB Compare Effect on TIOB" "No effect,Set,Cleared,Toggled"
|
|
bitfld.long 0x00 22.--23. " ASWTRG ,Software Trigger Effect on TIOA" "No effect,Set,Cleared,Toggled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " AEEVT ,External Event Effect on TIOA" "No effect,Set,Cleared,Toggled"
|
|
bitfld.long 0x00 18.--19. " ACPC ,RC Compare Effect on TIOA" "No effect,Set,Cleared,Toggled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " ACPA ,RA Compare Effect on TIOA" "No effect,Set,Cleared,Toggled"
|
|
bitfld.long 0x00 13.--14. " WAVSEL ,Waveform Selection" "UP/non-auto,UPDOWN/non-auto,UP/auto,UPDOWN/auto"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ENETRG ,External Event Trigger Enable" "No effect,Reset/started"
|
|
bitfld.long 0x00 10.--11. " EEVT ,External Event Selection" "TIOB,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " EEVTEDG ,External Event Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.long 0x00 7. " CPCDIS ,Counter Clock Disable with RC Compare" "Not disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CPCSTOP ,Counter Clock Stopped With RC Compare" "Not stopped,Stopped"
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invertion" "Rising,Falling"
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "CLOCK1,CLOCK2,CLOCK3,CLOCK4,CLOCK5,XC0,XC1,XC2"
|
|
else
|
|
group.long (0x04+(1*0x40))++0x03
|
|
line.long 0x00 "TC1_CMR,TC1 Channel Mode Register"
|
|
bitfld.long 0x00 18.--19. " LDRB ,RB Loading Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.long 0x00 16.--17. " LDRA ,RA Loading Selection" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Waveform Mode Enable" "Capture,Waveform"
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Reset/started"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ABETRG ,External Trigger Selection" "TIOB,TIOA"
|
|
bitfld.long 0x00 8.--9. " ETRGEDG ,External Trigger Edge Selection" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LDBDIS ,Counter Clock Disable With RB Loading" "Not disabled,Disabled"
|
|
bitfld.long 0x00 6. " LDBSTOP ,Counter Clock Stop With RB Loading" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0,XC1,XC2"
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invertion" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "CLOCK1,CLOCK2,CLOCK3,CLOCK4,CLOCK5,XC0,XC1,XC2"
|
|
endif
|
|
rgroup.long (0x10+(1*0x40))++0x03
|
|
line.long 0x00 "TC1_CV,TC1 Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CV ,Counter Value"
|
|
if (((data.long(ad:(0xfffa0040+0x4)))&0x8000)==0x8000)
|
|
group.long (0x14+(1*0x40))++0x7
|
|
line.long 0x00 "TC1_RA,TC1 Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A Value"
|
|
line.long 0x04 "TC1_RB,TC1 Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B Value"
|
|
else
|
|
rgroup.long (0x14+(1*0x40))++0x07
|
|
line.long 0x00 "TC1_RA,TC1 Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A Value"
|
|
line.long 0x04 "TC1_RB,TC1 Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B Value"
|
|
endif
|
|
group.long (0x1C+(1*0x40))++0x03
|
|
line.long 0x00 "TC1_RC,TC1 Register C"
|
|
hexmask.long.word 0x00 0.--15. 1. " RC ,Register C Value"
|
|
hgroup.long (0x20+(1*0x40))++0x03
|
|
hide.long 0x00 "TC1_SR,TC1 Status Register"
|
|
in
|
|
group.long (0x2C+(1*0x40))++0x03
|
|
line.long 0x00 "TC1_IMR,TC1 Interrupt Mask Register"
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " ETRGS_set/clr ,External Trigger" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " LDRBS_set/clr ,RB Loading" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " LDRAS_set/clr ,RA Loading" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CPCS_set/clr ,RC Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CPBS_set/clr ,RB Compare" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CPAS_set/clr ,RA Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " LOVRS_set/clr ,Load Overrun" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " COVFS_set/clr ,Counter Overflow" "Disabled,Enabled"
|
|
tree.end
|
|
width 0xB
|
|
width 0x9
|
|
tree "TC Channel 2"
|
|
wgroup.long (0x00+(2*0x40))++0x03
|
|
line.long 0x00 "TC2_CCR,TC2 Channel Control Register"
|
|
bitfld.long 0x00 2. " SWTRG ,Software Trigger Command" "No effect,Performed"
|
|
bitfld.long 0x00 1. " CLKDIS ,Counter Clock Disable Command" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable Command" "No effect,Enabled"
|
|
if (((data.long(ad:(0xfffa0080+0x4)))&0x8000)==0x8000)
|
|
group.long (0x04+(2*0x40))++0x03
|
|
line.long 0x00 "TC2_CMR,TC2 Channel Mode Register"
|
|
bitfld.long 0x00 30.--31. " BSWTRG ,Software Trigger Effect on TIOB" "No effect,Set,Cleared,Toggled"
|
|
bitfld.long 0x00 28.--29. " BEEVT ,External Event Effect on TIOB" "No effect,Set,Cleared,Toggled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Waveform Mode Enable" "Capture,Waveform"
|
|
bitfld.long 0x00 26.--27. " BCPC ,RC Compare Effect on TIOB" "No effect,Set,Cleared,Toggled"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " BCPB ,RB Compare Effect on TIOB" "No effect,Set,Cleared,Toggled"
|
|
bitfld.long 0x00 22.--23. " ASWTRG ,Software Trigger Effect on TIOA" "No effect,Set,Cleared,Toggled"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " AEEVT ,External Event Effect on TIOA" "No effect,Set,Cleared,Toggled"
|
|
bitfld.long 0x00 18.--19. " ACPC ,RC Compare Effect on TIOA" "No effect,Set,Cleared,Toggled"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " ACPA ,RA Compare Effect on TIOA" "No effect,Set,Cleared,Toggled"
|
|
bitfld.long 0x00 13.--14. " WAVSEL ,Waveform Selection" "UP/non-auto,UPDOWN/non-auto,UP/auto,UPDOWN/auto"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ENETRG ,External Event Trigger Enable" "No effect,Reset/started"
|
|
bitfld.long 0x00 10.--11. " EEVT ,External Event Selection" "TIOB,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " EEVTEDG ,External Event Edge Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.long 0x00 7. " CPCDIS ,Counter Clock Disable with RC Compare" "Not disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CPCSTOP ,Counter Clock Stopped With RC Compare" "Not stopped,Stopped"
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invertion" "Rising,Falling"
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "CLOCK1,CLOCK2,CLOCK3,CLOCK4,CLOCK5,XC0,XC1,XC2"
|
|
else
|
|
group.long (0x04+(2*0x40))++0x03
|
|
line.long 0x00 "TC2_CMR,TC2 Channel Mode Register"
|
|
bitfld.long 0x00 18.--19. " LDRB ,RB Loading Selection" "No edge,Rising,Falling,Both"
|
|
bitfld.long 0x00 16.--17. " LDRA ,RA Loading Selection" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Waveform Mode Enable" "Capture,Waveform"
|
|
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Reset/started"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ABETRG ,External Trigger Selection" "TIOB,TIOA"
|
|
bitfld.long 0x00 8.--9. " ETRGEDG ,External Trigger Edge Selection" "No edge,Rising,Falling,Both"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LDBDIS ,Counter Clock Disable With RB Loading" "Not disabled,Disabled"
|
|
bitfld.long 0x00 6. " LDBSTOP ,Counter Clock Stop With RB Loading" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0,XC1,XC2"
|
|
bitfld.long 0x00 3. " CLKI ,Clock Invertion" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "CLOCK1,CLOCK2,CLOCK3,CLOCK4,CLOCK5,XC0,XC1,XC2"
|
|
endif
|
|
rgroup.long (0x10+(2*0x40))++0x03
|
|
line.long 0x00 "TC2_CV,TC2 Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CV ,Counter Value"
|
|
if (((data.long(ad:(0xfffa0080+0x4)))&0x8000)==0x8000)
|
|
group.long (0x14+(2*0x40))++0x7
|
|
line.long 0x00 "TC2_RA,TC2 Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A Value"
|
|
line.long 0x04 "TC2_RB,TC2 Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B Value"
|
|
else
|
|
rgroup.long (0x14+(2*0x40))++0x07
|
|
line.long 0x00 "TC2_RA,TC2 Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A Value"
|
|
line.long 0x04 "TC2_RB,TC2 Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B Value"
|
|
endif
|
|
group.long (0x1C+(2*0x40))++0x03
|
|
line.long 0x00 "TC2_RC,TC2 Register C"
|
|
hexmask.long.word 0x00 0.--15. 1. " RC ,Register C Value"
|
|
hgroup.long (0x20+(2*0x40))++0x03
|
|
hide.long 0x00 "TC2_SR,TC2 Status Register"
|
|
in
|
|
group.long (0x2C+(2*0x40))++0x03
|
|
line.long 0x00 "TC2_IMR,TC2 Interrupt Mask Register"
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " ETRGS_set/clr ,External Trigger" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " LDRBS_set/clr ,RB Loading" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " LDRAS_set/clr ,RA Loading" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CPCS_set/clr ,RC Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CPBS_set/clr ,RB Compare" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CPAS_set/clr ,RA Compare" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " LOVRS_set/clr ,Load Overrun" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " COVFS_set/clr ,Counter Overflow" "Disabled,Enabled"
|
|
tree.end
|
|
width 0xB
|
|
tree.end
|
|
tree "PWM (Pulse Width Modulation Controller)"
|
|
base 0xfffcc000
|
|
width 0x9
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PWM_MR,PWM Mode Register"
|
|
bitfld.long 0x00 24.--27. " PREB ,Divider Input Clock" "MCK,MCK/2,MCK/4,MCK/8,MCK/16,MCK/32,MCK/64,MCK/128,MCK/256,MCK/512,MCK/1024,?..."
|
|
hexmask.long.byte 0x00 16.--23. 1. " DIVB ,CLKB Divide Factor"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " PREA ,Divider Input Clock" "MCK,MCK/2,MCK/4,MCK/8,MCK/16,MCK/32,MCK/64,MCK/128,MCK/256,MCK/512,MCK/1024,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. " DIVA ,CLKA Divide Factor"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PWM_SR,PWM Status Register"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CHID3_Clear/Set ,PWM Output for Channel 3 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CHID2_Clear/Set ,PWM Output for Channel 2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CHID1_Clear/Set ,PWM Output for Channel 1 Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CHID0_Clear/Set ,PWM Output for Channel 0 Enable" "Disabled,Enabled"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PWM_IMR,PWM Interrupt Mask Register"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CHID3_Clear/Set ,Enable Interrupt for PWM Channel 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CHID2_Clear/Set ,Enable Interrupt for PWM Channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CHID1_Clear/Set ,Enable Interrupt for PWM Channel 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CHID0_Clear/Set ,Enable Interrupt for PWM Channel 0" "Disabled,Enabled"
|
|
hgroup.long 0x1C++0x03
|
|
hide.long 0x00 "PWM_ISR,PWM Interrupt Status Register"
|
|
in
|
|
wgroup 0x0++0x0
|
|
width 0xb
|
|
tree "Channel 0 Registers"
|
|
group.long (0x200+(0*0x20))++0x0b
|
|
line.long 0x00 "PWM_CMR0,PWM Channel 0 Mode Register"
|
|
bitfld.long 0x00 10. " CPD ,Channel Update Period" "Duty cycle,Period"
|
|
bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low,High"
|
|
bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-Scaler" "MCK,MCK/2,MCK/4,MCK/8,MCK/16,MCK/32,MCK/64,MCK/128,MCK/256,MCK/512,MCK/1024,CLKA,CLKB,?..."
|
|
line.long 0x04 "PWM_CDTY0,PWM Channel 0 Duty Cycle Register"
|
|
line.long 0x08 "PWM_CPRD0,PWM Channel 0 Period Register"
|
|
rgroup.long (0x20C+(0*0x20))++0x03
|
|
line.long 0x00 "PWM_CCNT0,PWM Channel 0 Counter Register"
|
|
wgroup.long (0x210+(0*0x20))++0x03
|
|
line.long 0x00 "PWM_CUPD0,PWM Channel 0 Update Register"
|
|
tree.end
|
|
width 0xb
|
|
tree "Channel 1 Registers"
|
|
group.long (0x200+(1*0x20))++0x0b
|
|
line.long 0x00 "PWM_CMR1,PWM Channel 1 Mode Register"
|
|
bitfld.long 0x00 10. " CPD ,Channel Update Period" "Duty cycle,Period"
|
|
bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low,High"
|
|
bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-Scaler" "MCK,MCK/2,MCK/4,MCK/8,MCK/16,MCK/32,MCK/64,MCK/128,MCK/256,MCK/512,MCK/1024,CLKA,CLKB,?..."
|
|
line.long 0x04 "PWM_CDTY1,PWM Channel 1 Duty Cycle Register"
|
|
line.long 0x08 "PWM_CPRD1,PWM Channel 1 Period Register"
|
|
rgroup.long (0x20C+(1*0x20))++0x03
|
|
line.long 0x00 "PWM_CCNT1,PWM Channel 1 Counter Register"
|
|
wgroup.long (0x210+(1*0x20))++0x03
|
|
line.long 0x00 "PWM_CUPD1,PWM Channel 1 Update Register"
|
|
tree.end
|
|
width 0xb
|
|
tree "Channel 2 Registers"
|
|
group.long (0x200+(2*0x20))++0x0b
|
|
line.long 0x00 "PWM_CMR2,PWM Channel 2 Mode Register"
|
|
bitfld.long 0x00 10. " CPD ,Channel Update Period" "Duty cycle,Period"
|
|
bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low,High"
|
|
bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-Scaler" "MCK,MCK/2,MCK/4,MCK/8,MCK/16,MCK/32,MCK/64,MCK/128,MCK/256,MCK/512,MCK/1024,CLKA,CLKB,?..."
|
|
line.long 0x04 "PWM_CDTY2,PWM Channel 2 Duty Cycle Register"
|
|
line.long 0x08 "PWM_CPRD2,PWM Channel 2 Period Register"
|
|
rgroup.long (0x20C+(2*0x20))++0x03
|
|
line.long 0x00 "PWM_CCNT2,PWM Channel 2 Counter Register"
|
|
wgroup.long (0x210+(2*0x20))++0x03
|
|
line.long 0x00 "PWM_CUPD2,PWM Channel 2 Update Register"
|
|
tree.end
|
|
width 0xb
|
|
tree "Channel 3 Registers"
|
|
group.long (0x200+(3*0x20))++0x0b
|
|
line.long 0x00 "PWM_CMR3,PWM Channel 3 Mode Register"
|
|
bitfld.long 0x00 10. " CPD ,Channel Update Period" "Duty cycle,Period"
|
|
bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low,High"
|
|
bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-Scaler" "MCK,MCK/2,MCK/4,MCK/8,MCK/16,MCK/32,MCK/64,MCK/128,MCK/256,MCK/512,MCK/1024,CLKA,CLKB,?..."
|
|
line.long 0x04 "PWM_CDTY3,PWM Channel 3 Duty Cycle Register"
|
|
line.long 0x08 "PWM_CPRD3,PWM Channel 3 Period Register"
|
|
rgroup.long (0x20C+(3*0x20))++0x03
|
|
line.long 0x00 "PWM_CCNT3,PWM Channel 3 Counter Register"
|
|
wgroup.long (0x210+(3*0x20))++0x03
|
|
line.long 0x00 "PWM_CUPD3,PWM Channel 3 Update Register"
|
|
tree.end
|
|
tree.end
|
|
tree "UDP (USB Device Port)"
|
|
base 0xfffb0000
|
|
width 0xe
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "UDP_FRM_NUM,UDP Frame Number Register"
|
|
bitfld.long 0x00 17. " FRM_OK ,Frame OK" "-,OK"
|
|
bitfld.long 0x00 16. " FRM_ERR ,Frame Error" "No error,Error"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 1. " FRM_NUM ,Frame Number"
|
|
group.long 0x04++0x07
|
|
line.long 0x00 "UDP_GLB_STAT,UDP Global State Register"
|
|
sif (cpu()!="AT91SAM7X512"&&cpu()!="AT91SAM7X256"&&cpu()!="AT91SAM7X128"&&cpu()!="AT91SAM7XC512"&&cpu()!="AT91SAM7XC256"&&cpu()!="AT91SAM7XC128"&&!cpuis("AT91CAP7*"))
|
|
bitfld.long 0x00 4. " RMWUPE ,Remote Wake Up Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RSMINPR ,Resume to the Host Send Status" "No effect,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ESR ,Send Resume Enable" "Disabled,Enabled"
|
|
endif
|
|
bitfld.long 0x00 0. " FADDEN ,Function Address Enable" "Not addressed,Addressed"
|
|
textline " "
|
|
sif (cpu()=="AT91SAM7X512"||cpu()=="AT91SAM7X256"||cpu()=="AT91SAM7X128"||cpu()=="AT91SAM7XC512"||cpu()=="AT91SAM7XC256"||cpu()=="AT91SAM7XC128"||cpuis("AT91CAP7*"))
|
|
bitfld.long 0x00 1. " CONFG ,Configure" "Not configured,Configured"
|
|
endif
|
|
line.long 0x04 "UDP_FADDR,UDP Function Address Register"
|
|
bitfld.long 0x04 8. " FEN ,Function Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 0.--6. 1. " FADD[6:0] ,Function Address Value"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "UDP_IMR,UDP Interrupt Mask Register"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " WAKEUP_set/clr ,USB Bus Wakeup Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " SOFINT_set/clr ,Frame Start Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " RXSUSP_set/clr ,UDP Suspend Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " EP5INT_set/clr ,Endpoint 5 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " EP4INT_set/clr ,Endpoint 4 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " EP3INT_set/clr ,Endpoint 3 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " EP2INT_set/clr ,Endpoint 2 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " EP1INT_set/clr ,Endpoint 1 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EP0INT_set/clr ,Endpoint 0 Interrupt Mask" "Disabled,Enabled"
|
|
sif (cpu()!="AT91SAM7X512"&&cpu()!="AT91SAM7X256"&&cpu()!="AT91SAM7X128"&&cpu()!="AT91SAM7XC512"&&cpu()!="AT91SAM7XC256"&&cpu()!="AT91SAM7XC128"&&!cpuis("AT91CAP7*"))
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " EXTRSM_set/clr ,External Resume Interrupt Mask" "Disabled,Enabled"
|
|
endif
|
|
sif (cpu()=="AT91SAM7X512"||cpu()=="AT91SAM7X256"||cpu()=="AT91SAM7X128"||cpu()=="AT91SAM7XC512"||cpu()=="AT91SAM7XC256"||cpu()=="AT91SAM7XC128"||cpuis("AT91CAP7*"))
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RXRSM_set/clr ,UDP Resume Interrupt Mask" "Disabled,Enabled"
|
|
endif
|
|
width 9.
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "UDP_ISR,UDP Interrupt Status Register"
|
|
bitfld.long 0x00 13. " WAKEUP ,UDP Resume Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " ENDBUSRES ,End of BUS Reset Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SOFINT ,Start Of Frame Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " RXRSM ,UDP Resume Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXSUSP ,UDP Suspend Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " EP5INT ,Endpoint 5 Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EP4INT ,Endpoint 4 Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " EP3INT ,Endpoint 3 Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EP2INT ,Endpoint 2 Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " EP1INT ,Endpoint 1 Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EP0INT ,Endpoint 0 Interrupt Status" "Not occurred,Occurred"
|
|
sif (cpu()!="AT91SAM7X512"&&cpu()!="AT91SAM7X256"&&cpu()!="AT91SAM7X128"&&cpu()!="AT91SAM7XC512"&&cpu()!="AT91SAM7XC256"&&cpu()!="AT91SAM7XC128"&&!cpuis("AT91CAP7*"))
|
|
bitfld.long 0x00 10. " EXTRSM ,External Resume Interrupt Status" "Not occurred,Occurred"
|
|
endif
|
|
width 0xe
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "UDP_ICR,UDP Interrupt Clear Register"
|
|
bitfld.long 0x00 13. " WAKEUP ,Wakeup Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 12. " ENDBUSRES ,BUS End Reset Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SOFINT ,Frame Start Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 9. " RXRSM ,UDP Resume Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXSUSP ,UDP Suspend Interrupt Clear" "No effect,Cleared"
|
|
sif (cpu()!="AT91SAM7X512"&&cpu()!="AT91SAM7X256"&&cpu()!="AT91SAM7X128"&&cpu()!="AT91SAM7XC512"&&cpu()!="AT91SAM7XC256"&&cpu()!="AT91SAM7XC128"&&!cpuis("AT91CAP7*"))
|
|
bitfld.long 0x00 10. " EXTRSM ,External Resume Interrupt Clear" "No effect,Cleared"
|
|
endif
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "UDP_RST_EP,UDP Reset Endpoint Register"
|
|
bitfld.long 0x00 5. " EP5 ,Endpoint 5 Reset" "No reset,Reset"
|
|
bitfld.long 0x00 4. " EP4 ,Endpoint 4 Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EP3 ,Endpoint 3 Reset" "No reset,Reset"
|
|
bitfld.long 0x00 2. " EP2 ,Endpoint 2 Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EP1 ,Endpoint 1 Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " EP0 ,Endpoint 0 Reset" "No reset,Reset"
|
|
width 0xA
|
|
tree "UDP Endpoint Control and Status Registers"
|
|
if ((((data.long(ad:(0xfffb0000+0x30+0x0)))&0x700)==0x100)||(((data.long(ad:(0xfffb0000+0x30+0x0)))&0x700)==0x500))
|
|
group.long (0x30+0x0)++0x3
|
|
line.long 0x0 "UDP_CSR0,UDP Endpoint 0 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
bitfld.long 0x0 3. " ISOERROR ,Isochronous Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
elif (((data.long(ad:(0xfffb0000+0x30+0x0)))&0x700)==0x400)
|
|
group.long (0x30+0x0)++0x3
|
|
line.long 0x0 "UDP_CSR0,UDP Endpoint 0 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
elif (((data.long(ad:(0xfffb0000+0x30+0x0)))&0x700)==0x000)
|
|
group.long (0x30+0x0)++0x3
|
|
line.long 0x0 "UDP_CSR0,UDP Endpoint 0 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 7. " DIR ,Transfer Direction" "Out,In"
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
textline " "
|
|
bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged"
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
else
|
|
group.long (0x30+0x0)++0x3
|
|
line.long 0x0 "UDP_CSR0,UDP Endpoint 0 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged"
|
|
textline " "
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
endif
|
|
if ((((data.long(ad:(0xfffb0000+0x30+0x4)))&0x700)==0x100)||(((data.long(ad:(0xfffb0000+0x30+0x4)))&0x700)==0x500))
|
|
group.long (0x30+0x4)++0x3
|
|
line.long 0x0 "UDP_CSR1,UDP Endpoint 1 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
bitfld.long 0x0 3. " ISOERROR ,Isochronous Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
elif (((data.long(ad:(0xfffb0000+0x30+0x4)))&0x700)==0x400)
|
|
group.long (0x30+0x4)++0x3
|
|
line.long 0x0 "UDP_CSR1,UDP Endpoint 1 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
elif (((data.long(ad:(0xfffb0000+0x30+0x4)))&0x700)==0x000)
|
|
group.long (0x30+0x4)++0x3
|
|
line.long 0x0 "UDP_CSR1,UDP Endpoint 1 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 7. " DIR ,Transfer Direction" "Out,In"
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
textline " "
|
|
bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged"
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
else
|
|
group.long (0x30+0x4)++0x3
|
|
line.long 0x0 "UDP_CSR1,UDP Endpoint 1 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged"
|
|
textline " "
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
endif
|
|
if ((((data.long(ad:(0xfffb0000+0x30+0x8)))&0x700)==0x100)||(((data.long(ad:(0xfffb0000+0x30+0x8)))&0x700)==0x500))
|
|
group.long (0x30+0x8)++0x3
|
|
line.long 0x0 "UDP_CSR2,UDP Endpoint 2 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
bitfld.long 0x0 3. " ISOERROR ,Isochronous Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
elif (((data.long(ad:(0xfffb0000+0x30+0x8)))&0x700)==0x400)
|
|
group.long (0x30+0x8)++0x3
|
|
line.long 0x0 "UDP_CSR2,UDP Endpoint 2 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
elif (((data.long(ad:(0xfffb0000+0x30+0x8)))&0x700)==0x000)
|
|
group.long (0x30+0x8)++0x3
|
|
line.long 0x0 "UDP_CSR2,UDP Endpoint 2 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 7. " DIR ,Transfer Direction" "Out,In"
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
textline " "
|
|
bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged"
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
else
|
|
group.long (0x30+0x8)++0x3
|
|
line.long 0x0 "UDP_CSR2,UDP Endpoint 2 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged"
|
|
textline " "
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
endif
|
|
if ((((data.long(ad:(0xfffb0000+0x30+0xC)))&0x700)==0x100)||(((data.long(ad:(0xfffb0000+0x30+0xC)))&0x700)==0x500))
|
|
group.long (0x30+0xC)++0x3
|
|
line.long 0x0 "UDP_CSR3,UDP Endpoint 3 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
bitfld.long 0x0 3. " ISOERROR ,Isochronous Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
elif (((data.long(ad:(0xfffb0000+0x30+0xC)))&0x700)==0x400)
|
|
group.long (0x30+0xC)++0x3
|
|
line.long 0x0 "UDP_CSR3,UDP Endpoint 3 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
elif (((data.long(ad:(0xfffb0000+0x30+0xC)))&0x700)==0x000)
|
|
group.long (0x30+0xC)++0x3
|
|
line.long 0x0 "UDP_CSR3,UDP Endpoint 3 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 7. " DIR ,Transfer Direction" "Out,In"
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
textline " "
|
|
bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged"
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
else
|
|
group.long (0x30+0xC)++0x3
|
|
line.long 0x0 "UDP_CSR3,UDP Endpoint 3 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged"
|
|
textline " "
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
endif
|
|
if ((((data.long(ad:(0xfffb0000+0x30+0x10)))&0x700)==0x100)||(((data.long(ad:(0xfffb0000+0x30+0x10)))&0x700)==0x500))
|
|
group.long (0x30+0x10)++0x3
|
|
line.long 0x0 "UDP_CSR4,UDP Endpoint 4 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
bitfld.long 0x0 3. " ISOERROR ,Isochronous Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
elif (((data.long(ad:(0xfffb0000+0x30+0x10)))&0x700)==0x400)
|
|
group.long (0x30+0x10)++0x3
|
|
line.long 0x0 "UDP_CSR4,UDP Endpoint 4 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
elif (((data.long(ad:(0xfffb0000+0x30+0x10)))&0x700)==0x000)
|
|
group.long (0x30+0x10)++0x3
|
|
line.long 0x0 "UDP_CSR4,UDP Endpoint 4 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 7. " DIR ,Transfer Direction" "Out,In"
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
textline " "
|
|
bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged"
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
else
|
|
group.long (0x30+0x10)++0x3
|
|
line.long 0x0 "UDP_CSR4,UDP Endpoint 4 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged"
|
|
textline " "
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
endif
|
|
if ((((data.long(ad:(0xfffb0000+0x30+0x14)))&0x700)==0x100)||(((data.long(ad:(0xfffb0000+0x30+0x14)))&0x700)==0x500))
|
|
group.long (0x30+0x14)++0x3
|
|
line.long 0x0 "UDP_CSR5,UDP Endpoint 5 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
bitfld.long 0x0 3. " ISOERROR ,Isochronous Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
elif (((data.long(ad:(0xfffb0000+0x30+0x14)))&0x700)==0x400)
|
|
group.long (0x30+0x14)++0x3
|
|
line.long 0x0 "UDP_CSR5,UDP Endpoint 5 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
elif (((data.long(ad:(0xfffb0000+0x30+0x14)))&0x700)==0x000)
|
|
group.long (0x30+0x14)++0x3
|
|
line.long 0x0 "UDP_CSR5,UDP Endpoint 5 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 7. " DIR ,Transfer Direction" "Out,In"
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
textline " "
|
|
bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged"
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
else
|
|
group.long (0x30+0x14)++0x3
|
|
line.long 0x0 "UDP_CSR5,UDP Endpoint 5 Control and Status Register"
|
|
hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,FIFO Available Bytes Number"
|
|
bitfld.long 0x0 15. " EPEDS ,Endpoint Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1"
|
|
bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous out,Bulk out,Interrupt out,Reserved,Isochronous in,Bulk in,Interrupt in"
|
|
textline " "
|
|
bitfld.long 0x0 6. " RX_DATA_BK1 ,Bank 1 Data Receive" "Not received,Received"
|
|
bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Ready,Busy"
|
|
bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged"
|
|
textline " "
|
|
bitfld.long 0x0 2. " RXSETUP ,Setup Data Packet Receive" "Not received,Received"
|
|
bitfld.long 0x0 1. " RX_DATA_BK0 ,Bank 0 Data Receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TXCOMP ,IN Packet With Data Previously Written in the DPR Generation" "Not acknowledged,Acknowledged"
|
|
endif
|
|
tree.end
|
|
tree "UDP FIFO Data Registers"
|
|
hgroup.long 0x50++0x03
|
|
hide.long 0x00 "UDP_FDR0,UDP FIFO Data Register 0"
|
|
in
|
|
hgroup.long 0x54++0x03
|
|
hide.long 0x00 "UDP_FDR1,UDP FIFO Data Register 1"
|
|
in
|
|
hgroup.long 0x58++0x03
|
|
hide.long 0x00 "UDP_FDR2,UDP FIFO Data Register 2"
|
|
in
|
|
hgroup.long 0x5C++0x03
|
|
hide.long 0x00 "UDP_FDR3,UDP FIFO Data Register 3"
|
|
in
|
|
hgroup.long 0x60++0x03
|
|
hide.long 0x00 "UDP_FDR4,UDP FIFO Data Register 4"
|
|
in
|
|
hgroup.long 0x64++0x03
|
|
hide.long 0x00 "UDP_FDR5,UDP FIFO Data Register 5"
|
|
in
|
|
wgroup 0x0++0x0
|
|
tree.end
|
|
textline " "
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "UDP_TXVC,UDP Transceiver Control Register"
|
|
bitfld.long 0x00 8. " TXVDIS ,Transceiver Disable" "No,Yes"
|
|
width 0xB
|
|
tree.end
|
|
tree "ADC (Analog-to-Digital Converter)"
|
|
base 0xfffd8000
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "ADC_CR,ADC Control Register"
|
|
bitfld.long 0x00 1. " START ,Conversion Start" "No effect,Started"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "ADC_MR,ADC Mode Register"
|
|
bitfld.long 0x00 24.--27. " SHTIM ,Sample and Hold Time" "1/clock,2/clock,3/clock,4/clock,5/clock,6/clock,7/clock,8/clock,9/clock,10/clock,11/clock,12/clock,13/clock,14/clock,15/clock,16/clock"
|
|
bitfld.long 0x00 16.--20. " STARTUP ,Start Up Time" "8/clock,16/clock,24/clock,32/clock,40/clock,48/clock,56/clock,64/clock,72/clock,80/clock,88/clock,96/clock,104/clock,112/clock,120/clock,128/clock,136/clock,144/clock,152/clock,160/clock,168/clock,176/clock,184/clock,192/clock,200/clock,208/clock,216/clock,224/clock,232/clock,240/clock,248/clock,256/clock"
|
|
textline " "
|
|
bitfld.long 0x00 8.--13. " PRESCAL ,Prescaler Rate Selection" "MCK/2,MCK/4,MCK/6,MCK/8,MCK/10,MCK/12,MCK/14,MCK/16,MCK/18,MCK/20,MCK/22,MCK/24,MCK/26,MCK/28,MCK/30,MCK/32,MCK/34,MCK/36,MCK/38,MCK/40,MCK/42,MCK/44,MCK/46,MCK/48,MCK/50,MCK/52,MCK/54,MCK/56,MCK/58,MCK/60,MCK/62,MCK/64,MCK/66,MCK/68,MCK/70,MCK/72,MCK/74,MCK/76,MCK/78,MCK/80,MCK/82,MCK/84,MCK/86,MCK/88,MCK/90,MCK/92,MCK/94,MCK/96,MCK/98,MCK/100,MCK/102,MCK/104,MCK/106,MCK/108,MCK/110,MCK/112,MCK/114,MCK/116,MCK/118,MCK/120,MCK/122,MCK/124,MCK/126,MCK/128"
|
|
bitfld.long 0x00 5. " SLEEP ,Sleep Mode" "Normal,Sleep"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LOWRES ,Resolution" "10-bit,8-bit"
|
|
sif (cpuis("AT91CAP7*"))
|
|
bitfld.long 0x00 1.--3. " TRGSEL ,Trigger Selection" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,External,?..."
|
|
elif (cpuis("UC3*"))
|
|
bitfld.long 0x00 1.--3. " TRGSEL ,Trigger Selection" "TIOA0,TIOA1,TIOA2,TIOA3,TIOA4,TIOA5,External,?..."
|
|
else
|
|
bitfld.long 0x00 1.--3. " TRGSEL ,Trigger Selection" "Channel 0,Channel 1,Channel 2,Reserved,Reserved,Reserved,External,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0. " TRGEN ,Trigger Enable" "Disabled,Enabled"
|
|
group.long 0x10++0x0b
|
|
line.long 0x08 "ADC_CHSR,ADC Channel Status Register"
|
|
setclrfld.long 0x08 7. 0x00 7. 0x04 7. " CH7_set/clr ,Channel 7 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x00 6. 0x04 6. " CH6_set/clr ,Channel 6 Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 5. 0x00 5. 0x04 5. " CH5_set/clr ,Channel 5 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x00 4. 0x04 4. " CH4_set/clr ,Channel 4 Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 3. 0x00 3. 0x04 3. " CH3_set/clr ,Channel 3 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x00 2. 0x04 2. " CH2_set/clr ,Channel 2 Status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x00 1. 0x04 1. " CH1_set/clr ,Channel 1 Status" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x00 0. 0x04 0. " CH0_set/clr ,Channel 0 Status" "Disabled,Enabled"
|
|
hgroup.long 0x1c++0x3
|
|
hide.long 0x00 "ADC_SR,ADC Status Register"
|
|
in
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "ADC_LCDR,ADC Last Converted Data Register"
|
|
hexmask.long.word 0x0 0.--9. 1. " LDATA ,Last Data Converted"
|
|
group.long 0x24++0x0b
|
|
line.long 0x08 "ADC_IMR,ADC Interrupt Mask Register"
|
|
setclrfld.long 0x08 19. 0x00 19. 0x04 19. " RXBUFF_set/clr ,Receive Buffer Full Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x00 18. 0x04 18. " ENDRX_set/clr ,Receive Buffer End Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 17. 0x00 17. 0x04 17. " GOVRE_set/clr ,General Overrun Error Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x00 16. 0x04 16. " DRDY_set/clr ,Data Ready Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 15. 0x00 15. 0x04 15. " OVRE7_set/clr ,Overrun Error Interrupt Mask 7" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x00 14. 0x04 14. " OVRE6_set/clr ,Overrun Error Interrupt Mask 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x00 13. 0x04 13. " OVRE5_set/clr ,Overrun Error Interrupt Mask 5" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x00 12. 0x04 12. " OVRE4_set/clr ,Overrun Error Interrupt Mask 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 11. 0x00 11. 0x04 11. " OVRE3_set/clr ,Overrun Error Interrupt Mask 3" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x00 10. 0x04 10. " OVRE2_set/clr ,Overrun Error Interrupt Mask 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 9. 0x00 9. 0x04 9. " OVRE1_set/clr ,Overrun Error Interrupt Mask 1" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x00 8. 0x04 8. " OVRE0_set/clr ,Overrun Error Interrupt Mask 0" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x00 7. 0x04 7. " EOC7_set/clr ,Conversion End Interrupt Mask 7" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x00 6. 0x04 6. " EOC6_set/clr ,Conversion End Interrupt Mask 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 5. 0x00 5. 0x04 5. " EOC5_set/clr ,Conversion End Interrupt Mask 5" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x00 4. 0x04 4. " EOC4_set/clr ,Conversion End Interrupt Mask 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 3. 0x00 3. 0x04 3. " EOC3_set/clr ,Conversion End Interrupt Mask 3" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x00 2. 0x04 2. " EOC2_set/clr ,Conversion End Interrupt Mask 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x00 1. 0x04 1. " EOC1_set/clr ,Conversion End Interrupt Mask 1" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x00 0. 0x04 0. " EOC0_set/clr ,Conversion End Interrupt Mask 0" "Disabled,Enabled"
|
|
rgroup.long 0x30++0x1f
|
|
line.long 0x00 "ADC_CDR0,ADC Channel Data Register 0"
|
|
hexmask.long.word 0x00 0.--9. 1. " DATA ,Converted Data"
|
|
line.long 0x04 "ADC_CDR1,ADC Channel Data Register 1"
|
|
hexmask.long.word 0x04 0.--9. 1. " DATA ,Converted Data"
|
|
line.long 0x08 "ADC_CDR2,ADC Channel Data Register 2"
|
|
hexmask.long.word 0x08 0.--9. 1. " DATA ,Converted Data"
|
|
line.long 0x0c "ADC_CDR3,ADC Channel Data Register 3"
|
|
hexmask.long.word 0x0c 0.--9. 1. " DATA ,Converted Data"
|
|
line.long 0x10 "ADC_CDR4,ADC Channel Data Register 4"
|
|
hexmask.long.word 0x10 0.--9. 1. " DATA ,Converted Data"
|
|
line.long 0x14 "ADC_CDR5,ADC Channel Data Register 5"
|
|
hexmask.long.word 0x14 0.--9. 1. " DATA ,Converted Data"
|
|
line.long 0x18 "ADC_CDR6,ADC Channel Data Register 6"
|
|
hexmask.long.word 0x18 0.--9. 1. " DATA ,Converted Data"
|
|
line.long 0x1c "ADC_CDR7,ADC Channel Data Register 7"
|
|
hexmask.long.word 0x1c 0.--9. 1. " DATA ,Converted Data"
|
|
sif (cpuis("UC3*"))
|
|
rgroup.long 0xFC++0x03
|
|
line.long 0x00 "VERSION,Version Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " VERSION ,Version Number"
|
|
endif
|
|
tree.end
|
|
tree "CAN (Controller Area Network)"
|
|
base 0xfffd0000
|
|
width 0x0d
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CAN_MR,CAN Mode Register"
|
|
bitfld.long 0x00 7. " DRPT ,Repeat Disable" "Pending,Aborted"
|
|
bitfld.long 0x00 6. " TIMFRZ ,Timer Freeze Enable" "Not frozen,Frozen"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TTM ,Time Triggered Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " TEOF ,Timestamp Messages at Each Frame End" "SOF,EOF"
|
|
textline " "
|
|
bitfld.long 0x00 3. " OVL ,Overload Frame Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ABM ,Autobaud/Listen mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LPM ,Low Power Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CANEN ,CAN Controller Enable" "Disabled,Enabled"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CAN_IMR,CAN Interrupt Mask Register"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " BERR_Clear/Set ,Bit Error Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " FERR_Clear/Set ,Form Error Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " AERR_Clear/Set ,Acknowledgment Error Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " SERR_Clear/Set ,Stuffing Error Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " CERR_Clear/Set ,CRC Error Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " TSTP_Clear/Set ,Timestamp Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " TOVF_Clear/Set ,Timer Overflow Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " WAKEUP_Clear/Set ,Wakeup Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " SLEEP_Clear/Set ,Sleep Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " BOFF_Clear/Set ,Bus-Off Mode Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " ERRP_Clear/Set ,Error Passive Mode Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " WARN_Clear/Set ,Warning Limit Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " ERRA_Clear/Set ,Error Active Mode Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 07. -0x08 07. -0x04 07. " MB7_Clear/Set ,Mailbox 7 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 06. -0x08 06. -0x04 06. " MB6_Clear/Set ,Mailbox 6 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 05. -0x08 05. -0x04 05. " MB5_Clear/Set ,Mailbox 5 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 04. -0x08 04. -0x04 04. " MB4_Clear/Set ,Mailbox 4 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 03. -0x08 03. -0x04 03. " MB3_Clear/Set ,Mailbox 3 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 02. -0x08 02. -0x04 02. " MB2_Clear/Set ,Mailbox 2 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 01. -0x08 01. -0x04 01. " MB1_Clear/Set ,Mailbox 1 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 00. -0x08 00. -0x04 00. " MB0_Clear/Set ,Mailbox 0 Interrupt Mask" "Disabled,Enabled"
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "CAN_SR,CAN Status Register"
|
|
in
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CAN_BR,CAN Baudrate Register"
|
|
bitfld.long 0x00 24. " SMP ,Sampling Mode" "1 sample,3 samples"
|
|
hexmask.long.byte 0x00 16.--22. 1. " BRP ,Baudrate Prescaler"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " SJW ,Re-Synchronization Jump Width" "tCSCx1,tCSCx2,tCSCx3,tCSCx4"
|
|
bitfld.long 0x00 8.--10. " PROPAG ,Programming Time Segment" "tCSCx1,tCSCx2,tCSCx3,tCSCx4,tCSCx5,tCSCx6,tCSCx7,tCSCx8"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " PHASE1 ,Phase 1 Segment" "tCSCx1,tCSCx2,tCSCx3,tCSCx4,tCSCx5,tCSCx6,tCSCx7,tCSCx8"
|
|
bitfld.long 0x00 0.--2. " PHASE2 ,Phase 2 Segment" "tCSCx1,tCSCx2,tCSCx3,tCSCx4,tCSCx5,tCSCx6,tCSCx7,tCSCx8"
|
|
rgroup.long 0x18--0x23
|
|
line.long 0x00 "CAN_TIM,CAN Timer Register"
|
|
bitfld.long 0x00 15. " TIMER ,Timer 15" "0,1"
|
|
bitfld.long 0x00 14. ",Timer 14" "0,1"
|
|
bitfld.long 0x00 13. ",Timer 13" "0,1"
|
|
bitfld.long 0x00 12. ",Timer 12" "0,1"
|
|
bitfld.long 0x00 11. ",Timer 11" "0,1"
|
|
bitfld.long 0x00 10. ",Timer 10" "0,1"
|
|
bitfld.long 0x00 9. ",Timer 9" "0,1"
|
|
bitfld.long 0x00 8. ",Timer 8" "0,1"
|
|
bitfld.long 0x00 7. ",Timer 7" "0,1"
|
|
bitfld.long 0x00 6. ",Timer 6" "0,1"
|
|
bitfld.long 0x00 5. ",Timer 5" "0,1"
|
|
bitfld.long 0x00 4. ",Timer 4" "0,1"
|
|
bitfld.long 0x00 3. ",Timer 3" "0,1"
|
|
bitfld.long 0x00 2. ",Timer 2" "0,1"
|
|
bitfld.long 0x00 1. ",Timer 1" "0,1"
|
|
bitfld.long 0x00 0. ",Timer 0" "0,1"
|
|
line.long 0x04 "CAN_TIMESTP,CAN Timestamp Register"
|
|
bitfld.long 0x04 15. " MTIMESTAMP15 ,Timestamp 15" "0,1"
|
|
bitfld.long 0x04 14. ",Timestamp 14" "0,1"
|
|
bitfld.long 0x04 13. ",Timestamp 13" "0,1"
|
|
bitfld.long 0x04 12. ",Timestamp 12" "0,1"
|
|
bitfld.long 0x04 11. ",Timestamp 11" "0,1"
|
|
bitfld.long 0x04 10. ",Timestamp 10" "0,1"
|
|
bitfld.long 0x04 9. ",Timestamp 9" "0,1"
|
|
bitfld.long 0x04 8. ",Timestamp 8" "0,1"
|
|
bitfld.long 0x04 7. ",Timestamp 7" "0,1"
|
|
bitfld.long 0x04 6. ",Timestamp 6" "0,1"
|
|
bitfld.long 0x04 5. ",Timestamp 5" "0,1"
|
|
bitfld.long 0x04 4. ",Timestamp 4" "0,1"
|
|
bitfld.long 0x04 3. ",Timestamp 3" "0,1"
|
|
bitfld.long 0x04 2. ",Timestamp 2" "0,1"
|
|
bitfld.long 0x04 1. ",Timestamp 1" "0,1"
|
|
bitfld.long 0x04 0. ",Timestamp 0" "0,1"
|
|
line.long 0x08 "CAN_ECR,CAN Error Counter Register"
|
|
hexmask.long.byte 0x08 16.--23. 1. " TEC ,Transmit Error Counter"
|
|
hexmask.long.byte 0x08 0.--7. 1. " REC ,Receive Error Counter"
|
|
if (((data.long(ad:0xfffd0000))&0x20)==0x20)
|
|
wgroup.long 0x24++0x07
|
|
line.long 0x00 "CAN_TCR,CAN Transfer Command Register"
|
|
bitfld.long 0x00 31. " TIMRST ,Timer Reset" "No reset,Reset"
|
|
bitfld.long 0x00 7. " MB7 ,Mailbox 7 Transfer Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 6. " MB6 ,Mailbox 6 Transfer Request" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " MB5 ,Mailbox 5 Transfer Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MB4 ,Mailbox 4 Transfer Request" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " MB3 ,Mailbox 3 Transfer Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MB2 ,Mailbox 2 Transfer Request" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " MB1 ,Mailbox 1 Transfer Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MB0 ,Mailbox 0 Transfer Request" "Not requested,Requested"
|
|
else
|
|
wgroup.long 0x24++0x07
|
|
line.long 0x00 "CAN_TCR,CAN Transfer Command Register"
|
|
bitfld.long 0x00 7. " MB7 ,Mailbox 7 Transfer Request" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " MB6 ,Mailbox 6 Transfer Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MB5 ,Mailbox 5 Transfer Request" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " MB4 ,Mailbox 4 Transfer Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MB3 ,Mailbox 3 Transfer Request" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " MB2 ,Mailbox 2 Transfer Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MB1 ,Mailbox 1 Transfer Request" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " MB0 ,Mailbox 0 Transfer Request" "Not requested,Requested"
|
|
endif
|
|
width 0x0d
|
|
wgroup.long 0x24++0x07
|
|
line.long 0x04 "CAN_ACR,CAN Abort Command Register"
|
|
bitfld.long 0x04 7. " MB7 ,Mailbox 7 Abort Request" "Not requested,Requested"
|
|
bitfld.long 0x04 6. " MB6 ,Mailbox 6 Abort Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 5. " MB5 ,Mailbox 5 Abort Request" "Not requested,Requested"
|
|
bitfld.long 0x04 4. " MB4 ,Mailbox 4 Abort Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 3. " MB3 ,Mailbox 3 Abort Request" "Not requested,Requested"
|
|
bitfld.long 0x04 2. " MB2 ,Mailbox 2 Abort Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 1. " MB1 ,Mailbox 1 Abort Request" "Not requested,Requested"
|
|
bitfld.long 0x04 0. " MB0 ,Mailbox 0 Abort Request" "Not requested,Requested"
|
|
tree.open "CAN Message Registers"
|
|
width 0xb
|
|
tree "CAN Message 0x0 Registers"
|
|
if ((((data.long(ad:0xfffd0000))&0x20)==0x20)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x0))))&0x7000000)!=0x1000000)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x0))))&0x7000000)!=0x2000000))
|
|
group.long (0x200+(0x20*0x0))++0x3
|
|
line.long 0x00 "CAN_MMR0x0,CAN Message 0x0 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 16.--19. " PRIOR ,Mailbox Priority" "Priority 0,Priority 1,Priority 2,Priority 3,Priority 4,Priority 5,Priority 6,Priority 7,Priority 8,Priority 9,Priority 10,Priority 11,Priority 12,Priority 13,Priority 14,Priority 15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MTIMEMARK ,Mailbox Timemark 15" "0,1"
|
|
bitfld.long 0x00 14. ",Mailbox Timemark 14" "0,1"
|
|
bitfld.long 0x00 13. ",Mailbox Timemark 13" "0,1"
|
|
bitfld.long 0x00 12. ",Mailbox Timemark 12" "0,1"
|
|
bitfld.long 0x00 11. ",Mailbox Timemark 11" "0,1"
|
|
bitfld.long 0x00 10. ",Mailbox Timemark 10" "0,1"
|
|
bitfld.long 0x00 9. ",Mailbox Timemark 9" "0,1"
|
|
bitfld.long 0x00 8. ",Mailbox Timemark 8" "0,1"
|
|
bitfld.long 0x00 7. ",Mailbox Timemark 7" "0,1"
|
|
bitfld.long 0x00 6. ",Mailbox Timemark 6" "0,1"
|
|
bitfld.long 0x00 5. ",Mailbox Timemark 5" "0,1"
|
|
bitfld.long 0x00 4. ",Mailbox Timemark 4" "0,1"
|
|
bitfld.long 0x00 3. ",Mailbox Timemark 3" "0,1"
|
|
bitfld.long 0x00 2. ",Mailbox Timemark 2" "0,1"
|
|
bitfld.long 0x00 1. ",Mailbox Timemark 1" "0,1"
|
|
bitfld.long 0x00 0. ",Mailbox Timemark 0" "0,1"
|
|
elif ((((data.long(ad:0xfffd0000))&0x20)==0x20)&&((((data.long(ad:(0xfffd0000+0x200+(0x20*0x0))))&0x7000000)==0x1000000)||(((data.long(ad:(0xfffd0000+0x200+(0x20*0x0))))&0x7000000)==0x2000000)))
|
|
group.long (0x200+(0x20*0x0))++0x3
|
|
line.long 0x00 "CAN_MMR0x0,CAN Message 0x0 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 15. " MTIMEMARK ,Mailbox Timemark 15" "0,1"
|
|
bitfld.long 0x00 14. ",Mailbox Timemark 14" "0,1"
|
|
bitfld.long 0x00 13. ",Mailbox Timemark 13" "0,1"
|
|
bitfld.long 0x00 12. ",Mailbox Timemark 12" "0,1"
|
|
bitfld.long 0x00 11. ",Mailbox Timemark 11" "0,1"
|
|
bitfld.long 0x00 10. ",Mailbox Timemark 10" "0,1"
|
|
bitfld.long 0x00 9. ",Mailbox Timemark 9" "0,1"
|
|
bitfld.long 0x00 8. ",Mailbox Timemark 8" "0,1"
|
|
bitfld.long 0x00 7. ",Mailbox Timemark 7" "0,1"
|
|
bitfld.long 0x00 6. ",Mailbox Timemark 6" "0,1"
|
|
bitfld.long 0x00 5. ",Mailbox Timemark 5" "0,1"
|
|
bitfld.long 0x00 4. ",Mailbox Timemark 4" "0,1"
|
|
bitfld.long 0x00 3. ",Mailbox Timemark 3" "0,1"
|
|
bitfld.long 0x00 2. ",Mailbox Timemark 2" "0,1"
|
|
bitfld.long 0x00 1. ",Mailbox Timemark 1" "0,1"
|
|
bitfld.long 0x00 0. ",Mailbox Timemark 0" "0,1"
|
|
elif ((((data.long(ad:0xfffd0000))&0x20)==0x00)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x0))))&0x7000000)!=0x1000000)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x0))))&0x7000000)!=0x2000000))
|
|
group.long (0x200+(0x20*0x0))++0x3
|
|
line.long 0x00 "CAN_MMR0x0,CAN Message 0x0 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 16.--19. " PRIOR ,Mailbox Priority" "Priority 0,Priority 1,Priority 2,Priority 3,Priority 4,Priority 5,Priority 6,Priority 7,Priority 8,Priority 9,Priority 10,Priority 11,Priority 12,Priority 13,Priority 14,Priority 15"
|
|
else
|
|
group.long (0x200+(0x20*0x0))++0x3
|
|
line.long 0x00 "CAN_MMR0x0,CAN Message 0x0 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
endif
|
|
group.long (0x204+(0x20*0x0))++0x7
|
|
line.long 0x0 "CAN_MAM0x0,CAN Message 0x0 Acceptance Mask Register"
|
|
bitfld.long 0x0 29. " MIDE ,Identifier Version" "IDvA,IDvA/IDvB"
|
|
hexmask.long.word 0x0 18.--28. 1. " MIDvA ,Identifier Complementary Bits (Standard Frame Mode)"
|
|
textline " "
|
|
hexmask.long.tbyte 0x0 0.--17. 1. " MIDvB ,Identifier Complementary Bits (Extended Frame Mode)"
|
|
line.long 0x4 "CAN_MID0x0,CAN Message 0x0 ID Register"
|
|
bitfld.long 0x4 29. " MIDE ,Identifier Version" "A,B"
|
|
hexmask.long.word 0x4 18.--28. 1. " MIDvA ,Identifier Complementary Bits (Standard Frame Mode)"
|
|
textline " "
|
|
hexmask.long.tbyte 0x4 0.--17. 1. " MIDvB ,Identifier Complementary Bits (Extended Frame Mode)"
|
|
rgroup.long (0x20c+(0x20*0x0))++0x3
|
|
line.long 0x00 "CAN_MFID0x0,CAN Message 0x0 Family ID Register"
|
|
hexmask.long 0x00 0.--28. 1. " MFID ,Family ID"
|
|
hgroup.long (0x210+(0x20*0x0))++0x3
|
|
hide.long 0x0 "CAN_MSR0x0,CAN Message 0x0 Status Register"
|
|
in
|
|
hgroup.long (0x214+(0x20*0x0))++0x03
|
|
hide.long 0x00 "CAN_MDL0x0,CAN Message 0x0 Data Low Register"
|
|
in
|
|
hgroup.long (0x218+(0x20*0x0))++0x03
|
|
hide.long 0x00 "CAN_MDH0x0,CAN Message 0x0 Data High Register"
|
|
in
|
|
wgroup.long (0x21c+(0x20*0x0))++0x03
|
|
line.long 0x00 "CAN_MCR0x0,CAN Message 0x0 Control Register"
|
|
bitfld.long 0x00 23. " MTCR ,Mailbox Transfer Command" "Not transferred,Transferred"
|
|
bitfld.long 0x00 22. " MACR ,Mailbox 0x0 Abort Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 20. " MRTR ,Mailbox Remote Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x00 16.--19. " MDLC ,Mailbox Data Length Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
width 0xb
|
|
tree "CAN Message 0x1 Registers"
|
|
if ((((data.long(ad:0xfffd0000))&0x20)==0x20)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x1))))&0x7000000)!=0x1000000)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x1))))&0x7000000)!=0x2000000))
|
|
group.long (0x200+(0x20*0x1))++0x3
|
|
line.long 0x00 "CAN_MMR0x1,CAN Message 0x1 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 16.--19. " PRIOR ,Mailbox Priority" "Priority 0,Priority 1,Priority 2,Priority 3,Priority 4,Priority 5,Priority 6,Priority 7,Priority 8,Priority 9,Priority 10,Priority 11,Priority 12,Priority 13,Priority 14,Priority 15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MTIMEMARK ,Mailbox Timemark 15" "0,1"
|
|
bitfld.long 0x00 14. ",Mailbox Timemark 14" "0,1"
|
|
bitfld.long 0x00 13. ",Mailbox Timemark 13" "0,1"
|
|
bitfld.long 0x00 12. ",Mailbox Timemark 12" "0,1"
|
|
bitfld.long 0x00 11. ",Mailbox Timemark 11" "0,1"
|
|
bitfld.long 0x00 10. ",Mailbox Timemark 10" "0,1"
|
|
bitfld.long 0x00 9. ",Mailbox Timemark 9" "0,1"
|
|
bitfld.long 0x00 8. ",Mailbox Timemark 8" "0,1"
|
|
bitfld.long 0x00 7. ",Mailbox Timemark 7" "0,1"
|
|
bitfld.long 0x00 6. ",Mailbox Timemark 6" "0,1"
|
|
bitfld.long 0x00 5. ",Mailbox Timemark 5" "0,1"
|
|
bitfld.long 0x00 4. ",Mailbox Timemark 4" "0,1"
|
|
bitfld.long 0x00 3. ",Mailbox Timemark 3" "0,1"
|
|
bitfld.long 0x00 2. ",Mailbox Timemark 2" "0,1"
|
|
bitfld.long 0x00 1. ",Mailbox Timemark 1" "0,1"
|
|
bitfld.long 0x00 0. ",Mailbox Timemark 0" "0,1"
|
|
elif ((((data.long(ad:0xfffd0000))&0x20)==0x20)&&((((data.long(ad:(0xfffd0000+0x200+(0x20*0x1))))&0x7000000)==0x1000000)||(((data.long(ad:(0xfffd0000+0x200+(0x20*0x1))))&0x7000000)==0x2000000)))
|
|
group.long (0x200+(0x20*0x1))++0x3
|
|
line.long 0x00 "CAN_MMR0x1,CAN Message 0x1 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 15. " MTIMEMARK ,Mailbox Timemark 15" "0,1"
|
|
bitfld.long 0x00 14. ",Mailbox Timemark 14" "0,1"
|
|
bitfld.long 0x00 13. ",Mailbox Timemark 13" "0,1"
|
|
bitfld.long 0x00 12. ",Mailbox Timemark 12" "0,1"
|
|
bitfld.long 0x00 11. ",Mailbox Timemark 11" "0,1"
|
|
bitfld.long 0x00 10. ",Mailbox Timemark 10" "0,1"
|
|
bitfld.long 0x00 9. ",Mailbox Timemark 9" "0,1"
|
|
bitfld.long 0x00 8. ",Mailbox Timemark 8" "0,1"
|
|
bitfld.long 0x00 7. ",Mailbox Timemark 7" "0,1"
|
|
bitfld.long 0x00 6. ",Mailbox Timemark 6" "0,1"
|
|
bitfld.long 0x00 5. ",Mailbox Timemark 5" "0,1"
|
|
bitfld.long 0x00 4. ",Mailbox Timemark 4" "0,1"
|
|
bitfld.long 0x00 3. ",Mailbox Timemark 3" "0,1"
|
|
bitfld.long 0x00 2. ",Mailbox Timemark 2" "0,1"
|
|
bitfld.long 0x00 1. ",Mailbox Timemark 1" "0,1"
|
|
bitfld.long 0x00 0. ",Mailbox Timemark 0" "0,1"
|
|
elif ((((data.long(ad:0xfffd0000))&0x20)==0x00)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x1))))&0x7000000)!=0x1000000)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x1))))&0x7000000)!=0x2000000))
|
|
group.long (0x200+(0x20*0x1))++0x3
|
|
line.long 0x00 "CAN_MMR0x1,CAN Message 0x1 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 16.--19. " PRIOR ,Mailbox Priority" "Priority 0,Priority 1,Priority 2,Priority 3,Priority 4,Priority 5,Priority 6,Priority 7,Priority 8,Priority 9,Priority 10,Priority 11,Priority 12,Priority 13,Priority 14,Priority 15"
|
|
else
|
|
group.long (0x200+(0x20*0x1))++0x3
|
|
line.long 0x00 "CAN_MMR0x1,CAN Message 0x1 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
endif
|
|
group.long (0x204+(0x20*0x1))++0x7
|
|
line.long 0x0 "CAN_MAM0x1,CAN Message 0x1 Acceptance Mask Register"
|
|
bitfld.long 0x0 29. " MIDE ,Identifier Version" "IDvA,IDvA/IDvB"
|
|
hexmask.long.word 0x0 18.--28. 1. " MIDvA ,Identifier Complementary Bits (Standard Frame Mode)"
|
|
textline " "
|
|
hexmask.long.tbyte 0x0 0.--17. 1. " MIDvB ,Identifier Complementary Bits (Extended Frame Mode)"
|
|
line.long 0x4 "CAN_MID0x1,CAN Message 0x1 ID Register"
|
|
bitfld.long 0x4 29. " MIDE ,Identifier Version" "A,B"
|
|
hexmask.long.word 0x4 18.--28. 1. " MIDvA ,Identifier Complementary Bits (Standard Frame Mode)"
|
|
textline " "
|
|
hexmask.long.tbyte 0x4 0.--17. 1. " MIDvB ,Identifier Complementary Bits (Extended Frame Mode)"
|
|
rgroup.long (0x20c+(0x20*0x1))++0x3
|
|
line.long 0x00 "CAN_MFID0x1,CAN Message 0x1 Family ID Register"
|
|
hexmask.long 0x00 0.--28. 1. " MFID ,Family ID"
|
|
hgroup.long (0x210+(0x20*0x1))++0x3
|
|
hide.long 0x0 "CAN_MSR0x1,CAN Message 0x1 Status Register"
|
|
in
|
|
hgroup.long (0x214+(0x20*0x1))++0x03
|
|
hide.long 0x00 "CAN_MDL0x1,CAN Message 0x1 Data Low Register"
|
|
in
|
|
hgroup.long (0x218+(0x20*0x1))++0x03
|
|
hide.long 0x00 "CAN_MDH0x1,CAN Message 0x1 Data High Register"
|
|
in
|
|
wgroup.long (0x21c+(0x20*0x1))++0x03
|
|
line.long 0x00 "CAN_MCR0x1,CAN Message 0x1 Control Register"
|
|
bitfld.long 0x00 23. " MTCR ,Mailbox Transfer Command" "Not transferred,Transferred"
|
|
bitfld.long 0x00 22. " MACR ,Mailbox 0x1 Abort Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 20. " MRTR ,Mailbox Remote Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x00 16.--19. " MDLC ,Mailbox Data Length Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
width 0xb
|
|
tree "CAN Message 0x2 Registers"
|
|
if ((((data.long(ad:0xfffd0000))&0x20)==0x20)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x2))))&0x7000000)!=0x1000000)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x2))))&0x7000000)!=0x2000000))
|
|
group.long (0x200+(0x20*0x2))++0x3
|
|
line.long 0x00 "CAN_MMR0x2,CAN Message 0x2 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 16.--19. " PRIOR ,Mailbox Priority" "Priority 0,Priority 1,Priority 2,Priority 3,Priority 4,Priority 5,Priority 6,Priority 7,Priority 8,Priority 9,Priority 10,Priority 11,Priority 12,Priority 13,Priority 14,Priority 15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MTIMEMARK ,Mailbox Timemark 15" "0,1"
|
|
bitfld.long 0x00 14. ",Mailbox Timemark 14" "0,1"
|
|
bitfld.long 0x00 13. ",Mailbox Timemark 13" "0,1"
|
|
bitfld.long 0x00 12. ",Mailbox Timemark 12" "0,1"
|
|
bitfld.long 0x00 11. ",Mailbox Timemark 11" "0,1"
|
|
bitfld.long 0x00 10. ",Mailbox Timemark 10" "0,1"
|
|
bitfld.long 0x00 9. ",Mailbox Timemark 9" "0,1"
|
|
bitfld.long 0x00 8. ",Mailbox Timemark 8" "0,1"
|
|
bitfld.long 0x00 7. ",Mailbox Timemark 7" "0,1"
|
|
bitfld.long 0x00 6. ",Mailbox Timemark 6" "0,1"
|
|
bitfld.long 0x00 5. ",Mailbox Timemark 5" "0,1"
|
|
bitfld.long 0x00 4. ",Mailbox Timemark 4" "0,1"
|
|
bitfld.long 0x00 3. ",Mailbox Timemark 3" "0,1"
|
|
bitfld.long 0x00 2. ",Mailbox Timemark 2" "0,1"
|
|
bitfld.long 0x00 1. ",Mailbox Timemark 1" "0,1"
|
|
bitfld.long 0x00 0. ",Mailbox Timemark 0" "0,1"
|
|
elif ((((data.long(ad:0xfffd0000))&0x20)==0x20)&&((((data.long(ad:(0xfffd0000+0x200+(0x20*0x2))))&0x7000000)==0x1000000)||(((data.long(ad:(0xfffd0000+0x200+(0x20*0x2))))&0x7000000)==0x2000000)))
|
|
group.long (0x200+(0x20*0x2))++0x3
|
|
line.long 0x00 "CAN_MMR0x2,CAN Message 0x2 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 15. " MTIMEMARK ,Mailbox Timemark 15" "0,1"
|
|
bitfld.long 0x00 14. ",Mailbox Timemark 14" "0,1"
|
|
bitfld.long 0x00 13. ",Mailbox Timemark 13" "0,1"
|
|
bitfld.long 0x00 12. ",Mailbox Timemark 12" "0,1"
|
|
bitfld.long 0x00 11. ",Mailbox Timemark 11" "0,1"
|
|
bitfld.long 0x00 10. ",Mailbox Timemark 10" "0,1"
|
|
bitfld.long 0x00 9. ",Mailbox Timemark 9" "0,1"
|
|
bitfld.long 0x00 8. ",Mailbox Timemark 8" "0,1"
|
|
bitfld.long 0x00 7. ",Mailbox Timemark 7" "0,1"
|
|
bitfld.long 0x00 6. ",Mailbox Timemark 6" "0,1"
|
|
bitfld.long 0x00 5. ",Mailbox Timemark 5" "0,1"
|
|
bitfld.long 0x00 4. ",Mailbox Timemark 4" "0,1"
|
|
bitfld.long 0x00 3. ",Mailbox Timemark 3" "0,1"
|
|
bitfld.long 0x00 2. ",Mailbox Timemark 2" "0,1"
|
|
bitfld.long 0x00 1. ",Mailbox Timemark 1" "0,1"
|
|
bitfld.long 0x00 0. ",Mailbox Timemark 0" "0,1"
|
|
elif ((((data.long(ad:0xfffd0000))&0x20)==0x00)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x2))))&0x7000000)!=0x1000000)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x2))))&0x7000000)!=0x2000000))
|
|
group.long (0x200+(0x20*0x2))++0x3
|
|
line.long 0x00 "CAN_MMR0x2,CAN Message 0x2 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 16.--19. " PRIOR ,Mailbox Priority" "Priority 0,Priority 1,Priority 2,Priority 3,Priority 4,Priority 5,Priority 6,Priority 7,Priority 8,Priority 9,Priority 10,Priority 11,Priority 12,Priority 13,Priority 14,Priority 15"
|
|
else
|
|
group.long (0x200+(0x20*0x2))++0x3
|
|
line.long 0x00 "CAN_MMR0x2,CAN Message 0x2 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
endif
|
|
group.long (0x204+(0x20*0x2))++0x7
|
|
line.long 0x0 "CAN_MAM0x2,CAN Message 0x2 Acceptance Mask Register"
|
|
bitfld.long 0x0 29. " MIDE ,Identifier Version" "IDvA,IDvA/IDvB"
|
|
hexmask.long.word 0x0 18.--28. 1. " MIDvA ,Identifier Complementary Bits (Standard Frame Mode)"
|
|
textline " "
|
|
hexmask.long.tbyte 0x0 0.--17. 1. " MIDvB ,Identifier Complementary Bits (Extended Frame Mode)"
|
|
line.long 0x4 "CAN_MID0x2,CAN Message 0x2 ID Register"
|
|
bitfld.long 0x4 29. " MIDE ,Identifier Version" "A,B"
|
|
hexmask.long.word 0x4 18.--28. 1. " MIDvA ,Identifier Complementary Bits (Standard Frame Mode)"
|
|
textline " "
|
|
hexmask.long.tbyte 0x4 0.--17. 1. " MIDvB ,Identifier Complementary Bits (Extended Frame Mode)"
|
|
rgroup.long (0x20c+(0x20*0x2))++0x3
|
|
line.long 0x00 "CAN_MFID0x2,CAN Message 0x2 Family ID Register"
|
|
hexmask.long 0x00 0.--28. 1. " MFID ,Family ID"
|
|
hgroup.long (0x210+(0x20*0x2))++0x3
|
|
hide.long 0x0 "CAN_MSR0x2,CAN Message 0x2 Status Register"
|
|
in
|
|
hgroup.long (0x214+(0x20*0x2))++0x03
|
|
hide.long 0x00 "CAN_MDL0x2,CAN Message 0x2 Data Low Register"
|
|
in
|
|
hgroup.long (0x218+(0x20*0x2))++0x03
|
|
hide.long 0x00 "CAN_MDH0x2,CAN Message 0x2 Data High Register"
|
|
in
|
|
wgroup.long (0x21c+(0x20*0x2))++0x03
|
|
line.long 0x00 "CAN_MCR0x2,CAN Message 0x2 Control Register"
|
|
bitfld.long 0x00 23. " MTCR ,Mailbox Transfer Command" "Not transferred,Transferred"
|
|
bitfld.long 0x00 22. " MACR ,Mailbox 0x2 Abort Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 20. " MRTR ,Mailbox Remote Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x00 16.--19. " MDLC ,Mailbox Data Length Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
width 0xb
|
|
tree "CAN Message 0x3 Registers"
|
|
if ((((data.long(ad:0xfffd0000))&0x20)==0x20)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x3))))&0x7000000)!=0x1000000)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x3))))&0x7000000)!=0x2000000))
|
|
group.long (0x200+(0x20*0x3))++0x3
|
|
line.long 0x00 "CAN_MMR0x3,CAN Message 0x3 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 16.--19. " PRIOR ,Mailbox Priority" "Priority 0,Priority 1,Priority 2,Priority 3,Priority 4,Priority 5,Priority 6,Priority 7,Priority 8,Priority 9,Priority 10,Priority 11,Priority 12,Priority 13,Priority 14,Priority 15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MTIMEMARK ,Mailbox Timemark 15" "0,1"
|
|
bitfld.long 0x00 14. ",Mailbox Timemark 14" "0,1"
|
|
bitfld.long 0x00 13. ",Mailbox Timemark 13" "0,1"
|
|
bitfld.long 0x00 12. ",Mailbox Timemark 12" "0,1"
|
|
bitfld.long 0x00 11. ",Mailbox Timemark 11" "0,1"
|
|
bitfld.long 0x00 10. ",Mailbox Timemark 10" "0,1"
|
|
bitfld.long 0x00 9. ",Mailbox Timemark 9" "0,1"
|
|
bitfld.long 0x00 8. ",Mailbox Timemark 8" "0,1"
|
|
bitfld.long 0x00 7. ",Mailbox Timemark 7" "0,1"
|
|
bitfld.long 0x00 6. ",Mailbox Timemark 6" "0,1"
|
|
bitfld.long 0x00 5. ",Mailbox Timemark 5" "0,1"
|
|
bitfld.long 0x00 4. ",Mailbox Timemark 4" "0,1"
|
|
bitfld.long 0x00 3. ",Mailbox Timemark 3" "0,1"
|
|
bitfld.long 0x00 2. ",Mailbox Timemark 2" "0,1"
|
|
bitfld.long 0x00 1. ",Mailbox Timemark 1" "0,1"
|
|
bitfld.long 0x00 0. ",Mailbox Timemark 0" "0,1"
|
|
elif ((((data.long(ad:0xfffd0000))&0x20)==0x20)&&((((data.long(ad:(0xfffd0000+0x200+(0x20*0x3))))&0x7000000)==0x1000000)||(((data.long(ad:(0xfffd0000+0x200+(0x20*0x3))))&0x7000000)==0x2000000)))
|
|
group.long (0x200+(0x20*0x3))++0x3
|
|
line.long 0x00 "CAN_MMR0x3,CAN Message 0x3 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 15. " MTIMEMARK ,Mailbox Timemark 15" "0,1"
|
|
bitfld.long 0x00 14. ",Mailbox Timemark 14" "0,1"
|
|
bitfld.long 0x00 13. ",Mailbox Timemark 13" "0,1"
|
|
bitfld.long 0x00 12. ",Mailbox Timemark 12" "0,1"
|
|
bitfld.long 0x00 11. ",Mailbox Timemark 11" "0,1"
|
|
bitfld.long 0x00 10. ",Mailbox Timemark 10" "0,1"
|
|
bitfld.long 0x00 9. ",Mailbox Timemark 9" "0,1"
|
|
bitfld.long 0x00 8. ",Mailbox Timemark 8" "0,1"
|
|
bitfld.long 0x00 7. ",Mailbox Timemark 7" "0,1"
|
|
bitfld.long 0x00 6. ",Mailbox Timemark 6" "0,1"
|
|
bitfld.long 0x00 5. ",Mailbox Timemark 5" "0,1"
|
|
bitfld.long 0x00 4. ",Mailbox Timemark 4" "0,1"
|
|
bitfld.long 0x00 3. ",Mailbox Timemark 3" "0,1"
|
|
bitfld.long 0x00 2. ",Mailbox Timemark 2" "0,1"
|
|
bitfld.long 0x00 1. ",Mailbox Timemark 1" "0,1"
|
|
bitfld.long 0x00 0. ",Mailbox Timemark 0" "0,1"
|
|
elif ((((data.long(ad:0xfffd0000))&0x20)==0x00)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x3))))&0x7000000)!=0x1000000)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x3))))&0x7000000)!=0x2000000))
|
|
group.long (0x200+(0x20*0x3))++0x3
|
|
line.long 0x00 "CAN_MMR0x3,CAN Message 0x3 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 16.--19. " PRIOR ,Mailbox Priority" "Priority 0,Priority 1,Priority 2,Priority 3,Priority 4,Priority 5,Priority 6,Priority 7,Priority 8,Priority 9,Priority 10,Priority 11,Priority 12,Priority 13,Priority 14,Priority 15"
|
|
else
|
|
group.long (0x200+(0x20*0x3))++0x3
|
|
line.long 0x00 "CAN_MMR0x3,CAN Message 0x3 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
endif
|
|
group.long (0x204+(0x20*0x3))++0x7
|
|
line.long 0x0 "CAN_MAM0x3,CAN Message 0x3 Acceptance Mask Register"
|
|
bitfld.long 0x0 29. " MIDE ,Identifier Version" "IDvA,IDvA/IDvB"
|
|
hexmask.long.word 0x0 18.--28. 1. " MIDvA ,Identifier Complementary Bits (Standard Frame Mode)"
|
|
textline " "
|
|
hexmask.long.tbyte 0x0 0.--17. 1. " MIDvB ,Identifier Complementary Bits (Extended Frame Mode)"
|
|
line.long 0x4 "CAN_MID0x3,CAN Message 0x3 ID Register"
|
|
bitfld.long 0x4 29. " MIDE ,Identifier Version" "A,B"
|
|
hexmask.long.word 0x4 18.--28. 1. " MIDvA ,Identifier Complementary Bits (Standard Frame Mode)"
|
|
textline " "
|
|
hexmask.long.tbyte 0x4 0.--17. 1. " MIDvB ,Identifier Complementary Bits (Extended Frame Mode)"
|
|
rgroup.long (0x20c+(0x20*0x3))++0x3
|
|
line.long 0x00 "CAN_MFID0x3,CAN Message 0x3 Family ID Register"
|
|
hexmask.long 0x00 0.--28. 1. " MFID ,Family ID"
|
|
hgroup.long (0x210+(0x20*0x3))++0x3
|
|
hide.long 0x0 "CAN_MSR0x3,CAN Message 0x3 Status Register"
|
|
in
|
|
hgroup.long (0x214+(0x20*0x3))++0x03
|
|
hide.long 0x00 "CAN_MDL0x3,CAN Message 0x3 Data Low Register"
|
|
in
|
|
hgroup.long (0x218+(0x20*0x3))++0x03
|
|
hide.long 0x00 "CAN_MDH0x3,CAN Message 0x3 Data High Register"
|
|
in
|
|
wgroup.long (0x21c+(0x20*0x3))++0x03
|
|
line.long 0x00 "CAN_MCR0x3,CAN Message 0x3 Control Register"
|
|
bitfld.long 0x00 23. " MTCR ,Mailbox Transfer Command" "Not transferred,Transferred"
|
|
bitfld.long 0x00 22. " MACR ,Mailbox 0x3 Abort Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 20. " MRTR ,Mailbox Remote Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x00 16.--19. " MDLC ,Mailbox Data Length Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
width 0xb
|
|
tree "CAN Message 0x4 Registers"
|
|
if ((((data.long(ad:0xfffd0000))&0x20)==0x20)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x4))))&0x7000000)!=0x1000000)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x4))))&0x7000000)!=0x2000000))
|
|
group.long (0x200+(0x20*0x4))++0x3
|
|
line.long 0x00 "CAN_MMR0x4,CAN Message 0x4 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 16.--19. " PRIOR ,Mailbox Priority" "Priority 0,Priority 1,Priority 2,Priority 3,Priority 4,Priority 5,Priority 6,Priority 7,Priority 8,Priority 9,Priority 10,Priority 11,Priority 12,Priority 13,Priority 14,Priority 15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MTIMEMARK ,Mailbox Timemark 15" "0,1"
|
|
bitfld.long 0x00 14. ",Mailbox Timemark 14" "0,1"
|
|
bitfld.long 0x00 13. ",Mailbox Timemark 13" "0,1"
|
|
bitfld.long 0x00 12. ",Mailbox Timemark 12" "0,1"
|
|
bitfld.long 0x00 11. ",Mailbox Timemark 11" "0,1"
|
|
bitfld.long 0x00 10. ",Mailbox Timemark 10" "0,1"
|
|
bitfld.long 0x00 9. ",Mailbox Timemark 9" "0,1"
|
|
bitfld.long 0x00 8. ",Mailbox Timemark 8" "0,1"
|
|
bitfld.long 0x00 7. ",Mailbox Timemark 7" "0,1"
|
|
bitfld.long 0x00 6. ",Mailbox Timemark 6" "0,1"
|
|
bitfld.long 0x00 5. ",Mailbox Timemark 5" "0,1"
|
|
bitfld.long 0x00 4. ",Mailbox Timemark 4" "0,1"
|
|
bitfld.long 0x00 3. ",Mailbox Timemark 3" "0,1"
|
|
bitfld.long 0x00 2. ",Mailbox Timemark 2" "0,1"
|
|
bitfld.long 0x00 1. ",Mailbox Timemark 1" "0,1"
|
|
bitfld.long 0x00 0. ",Mailbox Timemark 0" "0,1"
|
|
elif ((((data.long(ad:0xfffd0000))&0x20)==0x20)&&((((data.long(ad:(0xfffd0000+0x200+(0x20*0x4))))&0x7000000)==0x1000000)||(((data.long(ad:(0xfffd0000+0x200+(0x20*0x4))))&0x7000000)==0x2000000)))
|
|
group.long (0x200+(0x20*0x4))++0x3
|
|
line.long 0x00 "CAN_MMR0x4,CAN Message 0x4 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 15. " MTIMEMARK ,Mailbox Timemark 15" "0,1"
|
|
bitfld.long 0x00 14. ",Mailbox Timemark 14" "0,1"
|
|
bitfld.long 0x00 13. ",Mailbox Timemark 13" "0,1"
|
|
bitfld.long 0x00 12. ",Mailbox Timemark 12" "0,1"
|
|
bitfld.long 0x00 11. ",Mailbox Timemark 11" "0,1"
|
|
bitfld.long 0x00 10. ",Mailbox Timemark 10" "0,1"
|
|
bitfld.long 0x00 9. ",Mailbox Timemark 9" "0,1"
|
|
bitfld.long 0x00 8. ",Mailbox Timemark 8" "0,1"
|
|
bitfld.long 0x00 7. ",Mailbox Timemark 7" "0,1"
|
|
bitfld.long 0x00 6. ",Mailbox Timemark 6" "0,1"
|
|
bitfld.long 0x00 5. ",Mailbox Timemark 5" "0,1"
|
|
bitfld.long 0x00 4. ",Mailbox Timemark 4" "0,1"
|
|
bitfld.long 0x00 3. ",Mailbox Timemark 3" "0,1"
|
|
bitfld.long 0x00 2. ",Mailbox Timemark 2" "0,1"
|
|
bitfld.long 0x00 1. ",Mailbox Timemark 1" "0,1"
|
|
bitfld.long 0x00 0. ",Mailbox Timemark 0" "0,1"
|
|
elif ((((data.long(ad:0xfffd0000))&0x20)==0x00)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x4))))&0x7000000)!=0x1000000)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x4))))&0x7000000)!=0x2000000))
|
|
group.long (0x200+(0x20*0x4))++0x3
|
|
line.long 0x00 "CAN_MMR0x4,CAN Message 0x4 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 16.--19. " PRIOR ,Mailbox Priority" "Priority 0,Priority 1,Priority 2,Priority 3,Priority 4,Priority 5,Priority 6,Priority 7,Priority 8,Priority 9,Priority 10,Priority 11,Priority 12,Priority 13,Priority 14,Priority 15"
|
|
else
|
|
group.long (0x200+(0x20*0x4))++0x3
|
|
line.long 0x00 "CAN_MMR0x4,CAN Message 0x4 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
endif
|
|
group.long (0x204+(0x20*0x4))++0x7
|
|
line.long 0x0 "CAN_MAM0x4,CAN Message 0x4 Acceptance Mask Register"
|
|
bitfld.long 0x0 29. " MIDE ,Identifier Version" "IDvA,IDvA/IDvB"
|
|
hexmask.long.word 0x0 18.--28. 1. " MIDvA ,Identifier Complementary Bits (Standard Frame Mode)"
|
|
textline " "
|
|
hexmask.long.tbyte 0x0 0.--17. 1. " MIDvB ,Identifier Complementary Bits (Extended Frame Mode)"
|
|
line.long 0x4 "CAN_MID0x4,CAN Message 0x4 ID Register"
|
|
bitfld.long 0x4 29. " MIDE ,Identifier Version" "A,B"
|
|
hexmask.long.word 0x4 18.--28. 1. " MIDvA ,Identifier Complementary Bits (Standard Frame Mode)"
|
|
textline " "
|
|
hexmask.long.tbyte 0x4 0.--17. 1. " MIDvB ,Identifier Complementary Bits (Extended Frame Mode)"
|
|
rgroup.long (0x20c+(0x20*0x4))++0x3
|
|
line.long 0x00 "CAN_MFID0x4,CAN Message 0x4 Family ID Register"
|
|
hexmask.long 0x00 0.--28. 1. " MFID ,Family ID"
|
|
hgroup.long (0x210+(0x20*0x4))++0x3
|
|
hide.long 0x0 "CAN_MSR0x4,CAN Message 0x4 Status Register"
|
|
in
|
|
hgroup.long (0x214+(0x20*0x4))++0x03
|
|
hide.long 0x00 "CAN_MDL0x4,CAN Message 0x4 Data Low Register"
|
|
in
|
|
hgroup.long (0x218+(0x20*0x4))++0x03
|
|
hide.long 0x00 "CAN_MDH0x4,CAN Message 0x4 Data High Register"
|
|
in
|
|
wgroup.long (0x21c+(0x20*0x4))++0x03
|
|
line.long 0x00 "CAN_MCR0x4,CAN Message 0x4 Control Register"
|
|
bitfld.long 0x00 23. " MTCR ,Mailbox Transfer Command" "Not transferred,Transferred"
|
|
bitfld.long 0x00 22. " MACR ,Mailbox 0x4 Abort Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 20. " MRTR ,Mailbox Remote Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x00 16.--19. " MDLC ,Mailbox Data Length Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
width 0xb
|
|
tree "CAN Message 0x5 Registers"
|
|
if ((((data.long(ad:0xfffd0000))&0x20)==0x20)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x5))))&0x7000000)!=0x1000000)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x5))))&0x7000000)!=0x2000000))
|
|
group.long (0x200+(0x20*0x5))++0x3
|
|
line.long 0x00 "CAN_MMR0x5,CAN Message 0x5 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 16.--19. " PRIOR ,Mailbox Priority" "Priority 0,Priority 1,Priority 2,Priority 3,Priority 4,Priority 5,Priority 6,Priority 7,Priority 8,Priority 9,Priority 10,Priority 11,Priority 12,Priority 13,Priority 14,Priority 15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MTIMEMARK ,Mailbox Timemark 15" "0,1"
|
|
bitfld.long 0x00 14. ",Mailbox Timemark 14" "0,1"
|
|
bitfld.long 0x00 13. ",Mailbox Timemark 13" "0,1"
|
|
bitfld.long 0x00 12. ",Mailbox Timemark 12" "0,1"
|
|
bitfld.long 0x00 11. ",Mailbox Timemark 11" "0,1"
|
|
bitfld.long 0x00 10. ",Mailbox Timemark 10" "0,1"
|
|
bitfld.long 0x00 9. ",Mailbox Timemark 9" "0,1"
|
|
bitfld.long 0x00 8. ",Mailbox Timemark 8" "0,1"
|
|
bitfld.long 0x00 7. ",Mailbox Timemark 7" "0,1"
|
|
bitfld.long 0x00 6. ",Mailbox Timemark 6" "0,1"
|
|
bitfld.long 0x00 5. ",Mailbox Timemark 5" "0,1"
|
|
bitfld.long 0x00 4. ",Mailbox Timemark 4" "0,1"
|
|
bitfld.long 0x00 3. ",Mailbox Timemark 3" "0,1"
|
|
bitfld.long 0x00 2. ",Mailbox Timemark 2" "0,1"
|
|
bitfld.long 0x00 1. ",Mailbox Timemark 1" "0,1"
|
|
bitfld.long 0x00 0. ",Mailbox Timemark 0" "0,1"
|
|
elif ((((data.long(ad:0xfffd0000))&0x20)==0x20)&&((((data.long(ad:(0xfffd0000+0x200+(0x20*0x5))))&0x7000000)==0x1000000)||(((data.long(ad:(0xfffd0000+0x200+(0x20*0x5))))&0x7000000)==0x2000000)))
|
|
group.long (0x200+(0x20*0x5))++0x3
|
|
line.long 0x00 "CAN_MMR0x5,CAN Message 0x5 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 15. " MTIMEMARK ,Mailbox Timemark 15" "0,1"
|
|
bitfld.long 0x00 14. ",Mailbox Timemark 14" "0,1"
|
|
bitfld.long 0x00 13. ",Mailbox Timemark 13" "0,1"
|
|
bitfld.long 0x00 12. ",Mailbox Timemark 12" "0,1"
|
|
bitfld.long 0x00 11. ",Mailbox Timemark 11" "0,1"
|
|
bitfld.long 0x00 10. ",Mailbox Timemark 10" "0,1"
|
|
bitfld.long 0x00 9. ",Mailbox Timemark 9" "0,1"
|
|
bitfld.long 0x00 8. ",Mailbox Timemark 8" "0,1"
|
|
bitfld.long 0x00 7. ",Mailbox Timemark 7" "0,1"
|
|
bitfld.long 0x00 6. ",Mailbox Timemark 6" "0,1"
|
|
bitfld.long 0x00 5. ",Mailbox Timemark 5" "0,1"
|
|
bitfld.long 0x00 4. ",Mailbox Timemark 4" "0,1"
|
|
bitfld.long 0x00 3. ",Mailbox Timemark 3" "0,1"
|
|
bitfld.long 0x00 2. ",Mailbox Timemark 2" "0,1"
|
|
bitfld.long 0x00 1. ",Mailbox Timemark 1" "0,1"
|
|
bitfld.long 0x00 0. ",Mailbox Timemark 0" "0,1"
|
|
elif ((((data.long(ad:0xfffd0000))&0x20)==0x00)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x5))))&0x7000000)!=0x1000000)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x5))))&0x7000000)!=0x2000000))
|
|
group.long (0x200+(0x20*0x5))++0x3
|
|
line.long 0x00 "CAN_MMR0x5,CAN Message 0x5 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 16.--19. " PRIOR ,Mailbox Priority" "Priority 0,Priority 1,Priority 2,Priority 3,Priority 4,Priority 5,Priority 6,Priority 7,Priority 8,Priority 9,Priority 10,Priority 11,Priority 12,Priority 13,Priority 14,Priority 15"
|
|
else
|
|
group.long (0x200+(0x20*0x5))++0x3
|
|
line.long 0x00 "CAN_MMR0x5,CAN Message 0x5 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
endif
|
|
group.long (0x204+(0x20*0x5))++0x7
|
|
line.long 0x0 "CAN_MAM0x5,CAN Message 0x5 Acceptance Mask Register"
|
|
bitfld.long 0x0 29. " MIDE ,Identifier Version" "IDvA,IDvA/IDvB"
|
|
hexmask.long.word 0x0 18.--28. 1. " MIDvA ,Identifier Complementary Bits (Standard Frame Mode)"
|
|
textline " "
|
|
hexmask.long.tbyte 0x0 0.--17. 1. " MIDvB ,Identifier Complementary Bits (Extended Frame Mode)"
|
|
line.long 0x4 "CAN_MID0x5,CAN Message 0x5 ID Register"
|
|
bitfld.long 0x4 29. " MIDE ,Identifier Version" "A,B"
|
|
hexmask.long.word 0x4 18.--28. 1. " MIDvA ,Identifier Complementary Bits (Standard Frame Mode)"
|
|
textline " "
|
|
hexmask.long.tbyte 0x4 0.--17. 1. " MIDvB ,Identifier Complementary Bits (Extended Frame Mode)"
|
|
rgroup.long (0x20c+(0x20*0x5))++0x3
|
|
line.long 0x00 "CAN_MFID0x5,CAN Message 0x5 Family ID Register"
|
|
hexmask.long 0x00 0.--28. 1. " MFID ,Family ID"
|
|
hgroup.long (0x210+(0x20*0x5))++0x3
|
|
hide.long 0x0 "CAN_MSR0x5,CAN Message 0x5 Status Register"
|
|
in
|
|
hgroup.long (0x214+(0x20*0x5))++0x03
|
|
hide.long 0x00 "CAN_MDL0x5,CAN Message 0x5 Data Low Register"
|
|
in
|
|
hgroup.long (0x218+(0x20*0x5))++0x03
|
|
hide.long 0x00 "CAN_MDH0x5,CAN Message 0x5 Data High Register"
|
|
in
|
|
wgroup.long (0x21c+(0x20*0x5))++0x03
|
|
line.long 0x00 "CAN_MCR0x5,CAN Message 0x5 Control Register"
|
|
bitfld.long 0x00 23. " MTCR ,Mailbox Transfer Command" "Not transferred,Transferred"
|
|
bitfld.long 0x00 22. " MACR ,Mailbox 0x5 Abort Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 20. " MRTR ,Mailbox Remote Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x00 16.--19. " MDLC ,Mailbox Data Length Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
width 0xb
|
|
tree "CAN Message 0x6 Registers"
|
|
if ((((data.long(ad:0xfffd0000))&0x20)==0x20)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x6))))&0x7000000)!=0x1000000)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x6))))&0x7000000)!=0x2000000))
|
|
group.long (0x200+(0x20*0x6))++0x3
|
|
line.long 0x00 "CAN_MMR0x6,CAN Message 0x6 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 16.--19. " PRIOR ,Mailbox Priority" "Priority 0,Priority 1,Priority 2,Priority 3,Priority 4,Priority 5,Priority 6,Priority 7,Priority 8,Priority 9,Priority 10,Priority 11,Priority 12,Priority 13,Priority 14,Priority 15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MTIMEMARK ,Mailbox Timemark 15" "0,1"
|
|
bitfld.long 0x00 14. ",Mailbox Timemark 14" "0,1"
|
|
bitfld.long 0x00 13. ",Mailbox Timemark 13" "0,1"
|
|
bitfld.long 0x00 12. ",Mailbox Timemark 12" "0,1"
|
|
bitfld.long 0x00 11. ",Mailbox Timemark 11" "0,1"
|
|
bitfld.long 0x00 10. ",Mailbox Timemark 10" "0,1"
|
|
bitfld.long 0x00 9. ",Mailbox Timemark 9" "0,1"
|
|
bitfld.long 0x00 8. ",Mailbox Timemark 8" "0,1"
|
|
bitfld.long 0x00 7. ",Mailbox Timemark 7" "0,1"
|
|
bitfld.long 0x00 6. ",Mailbox Timemark 6" "0,1"
|
|
bitfld.long 0x00 5. ",Mailbox Timemark 5" "0,1"
|
|
bitfld.long 0x00 4. ",Mailbox Timemark 4" "0,1"
|
|
bitfld.long 0x00 3. ",Mailbox Timemark 3" "0,1"
|
|
bitfld.long 0x00 2. ",Mailbox Timemark 2" "0,1"
|
|
bitfld.long 0x00 1. ",Mailbox Timemark 1" "0,1"
|
|
bitfld.long 0x00 0. ",Mailbox Timemark 0" "0,1"
|
|
elif ((((data.long(ad:0xfffd0000))&0x20)==0x20)&&((((data.long(ad:(0xfffd0000+0x200+(0x20*0x6))))&0x7000000)==0x1000000)||(((data.long(ad:(0xfffd0000+0x200+(0x20*0x6))))&0x7000000)==0x2000000)))
|
|
group.long (0x200+(0x20*0x6))++0x3
|
|
line.long 0x00 "CAN_MMR0x6,CAN Message 0x6 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 15. " MTIMEMARK ,Mailbox Timemark 15" "0,1"
|
|
bitfld.long 0x00 14. ",Mailbox Timemark 14" "0,1"
|
|
bitfld.long 0x00 13. ",Mailbox Timemark 13" "0,1"
|
|
bitfld.long 0x00 12. ",Mailbox Timemark 12" "0,1"
|
|
bitfld.long 0x00 11. ",Mailbox Timemark 11" "0,1"
|
|
bitfld.long 0x00 10. ",Mailbox Timemark 10" "0,1"
|
|
bitfld.long 0x00 9. ",Mailbox Timemark 9" "0,1"
|
|
bitfld.long 0x00 8. ",Mailbox Timemark 8" "0,1"
|
|
bitfld.long 0x00 7. ",Mailbox Timemark 7" "0,1"
|
|
bitfld.long 0x00 6. ",Mailbox Timemark 6" "0,1"
|
|
bitfld.long 0x00 5. ",Mailbox Timemark 5" "0,1"
|
|
bitfld.long 0x00 4. ",Mailbox Timemark 4" "0,1"
|
|
bitfld.long 0x00 3. ",Mailbox Timemark 3" "0,1"
|
|
bitfld.long 0x00 2. ",Mailbox Timemark 2" "0,1"
|
|
bitfld.long 0x00 1. ",Mailbox Timemark 1" "0,1"
|
|
bitfld.long 0x00 0. ",Mailbox Timemark 0" "0,1"
|
|
elif ((((data.long(ad:0xfffd0000))&0x20)==0x00)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x6))))&0x7000000)!=0x1000000)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x6))))&0x7000000)!=0x2000000))
|
|
group.long (0x200+(0x20*0x6))++0x3
|
|
line.long 0x00 "CAN_MMR0x6,CAN Message 0x6 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 16.--19. " PRIOR ,Mailbox Priority" "Priority 0,Priority 1,Priority 2,Priority 3,Priority 4,Priority 5,Priority 6,Priority 7,Priority 8,Priority 9,Priority 10,Priority 11,Priority 12,Priority 13,Priority 14,Priority 15"
|
|
else
|
|
group.long (0x200+(0x20*0x6))++0x3
|
|
line.long 0x00 "CAN_MMR0x6,CAN Message 0x6 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
endif
|
|
group.long (0x204+(0x20*0x6))++0x7
|
|
line.long 0x0 "CAN_MAM0x6,CAN Message 0x6 Acceptance Mask Register"
|
|
bitfld.long 0x0 29. " MIDE ,Identifier Version" "IDvA,IDvA/IDvB"
|
|
hexmask.long.word 0x0 18.--28. 1. " MIDvA ,Identifier Complementary Bits (Standard Frame Mode)"
|
|
textline " "
|
|
hexmask.long.tbyte 0x0 0.--17. 1. " MIDvB ,Identifier Complementary Bits (Extended Frame Mode)"
|
|
line.long 0x4 "CAN_MID0x6,CAN Message 0x6 ID Register"
|
|
bitfld.long 0x4 29. " MIDE ,Identifier Version" "A,B"
|
|
hexmask.long.word 0x4 18.--28. 1. " MIDvA ,Identifier Complementary Bits (Standard Frame Mode)"
|
|
textline " "
|
|
hexmask.long.tbyte 0x4 0.--17. 1. " MIDvB ,Identifier Complementary Bits (Extended Frame Mode)"
|
|
rgroup.long (0x20c+(0x20*0x6))++0x3
|
|
line.long 0x00 "CAN_MFID0x6,CAN Message 0x6 Family ID Register"
|
|
hexmask.long 0x00 0.--28. 1. " MFID ,Family ID"
|
|
hgroup.long (0x210+(0x20*0x6))++0x3
|
|
hide.long 0x0 "CAN_MSR0x6,CAN Message 0x6 Status Register"
|
|
in
|
|
hgroup.long (0x214+(0x20*0x6))++0x03
|
|
hide.long 0x00 "CAN_MDL0x6,CAN Message 0x6 Data Low Register"
|
|
in
|
|
hgroup.long (0x218+(0x20*0x6))++0x03
|
|
hide.long 0x00 "CAN_MDH0x6,CAN Message 0x6 Data High Register"
|
|
in
|
|
wgroup.long (0x21c+(0x20*0x6))++0x03
|
|
line.long 0x00 "CAN_MCR0x6,CAN Message 0x6 Control Register"
|
|
bitfld.long 0x00 23. " MTCR ,Mailbox Transfer Command" "Not transferred,Transferred"
|
|
bitfld.long 0x00 22. " MACR ,Mailbox 0x6 Abort Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 20. " MRTR ,Mailbox Remote Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x00 16.--19. " MDLC ,Mailbox Data Length Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
width 0xb
|
|
tree "CAN Message 0x7 Registers"
|
|
if ((((data.long(ad:0xfffd0000))&0x20)==0x20)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x7))))&0x7000000)!=0x1000000)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x7))))&0x7000000)!=0x2000000))
|
|
group.long (0x200+(0x20*0x7))++0x3
|
|
line.long 0x00 "CAN_MMR0x7,CAN Message 0x7 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 16.--19. " PRIOR ,Mailbox Priority" "Priority 0,Priority 1,Priority 2,Priority 3,Priority 4,Priority 5,Priority 6,Priority 7,Priority 8,Priority 9,Priority 10,Priority 11,Priority 12,Priority 13,Priority 14,Priority 15"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MTIMEMARK ,Mailbox Timemark 15" "0,1"
|
|
bitfld.long 0x00 14. ",Mailbox Timemark 14" "0,1"
|
|
bitfld.long 0x00 13. ",Mailbox Timemark 13" "0,1"
|
|
bitfld.long 0x00 12. ",Mailbox Timemark 12" "0,1"
|
|
bitfld.long 0x00 11. ",Mailbox Timemark 11" "0,1"
|
|
bitfld.long 0x00 10. ",Mailbox Timemark 10" "0,1"
|
|
bitfld.long 0x00 9. ",Mailbox Timemark 9" "0,1"
|
|
bitfld.long 0x00 8. ",Mailbox Timemark 8" "0,1"
|
|
bitfld.long 0x00 7. ",Mailbox Timemark 7" "0,1"
|
|
bitfld.long 0x00 6. ",Mailbox Timemark 6" "0,1"
|
|
bitfld.long 0x00 5. ",Mailbox Timemark 5" "0,1"
|
|
bitfld.long 0x00 4. ",Mailbox Timemark 4" "0,1"
|
|
bitfld.long 0x00 3. ",Mailbox Timemark 3" "0,1"
|
|
bitfld.long 0x00 2. ",Mailbox Timemark 2" "0,1"
|
|
bitfld.long 0x00 1. ",Mailbox Timemark 1" "0,1"
|
|
bitfld.long 0x00 0. ",Mailbox Timemark 0" "0,1"
|
|
elif ((((data.long(ad:0xfffd0000))&0x20)==0x20)&&((((data.long(ad:(0xfffd0000+0x200+(0x20*0x7))))&0x7000000)==0x1000000)||(((data.long(ad:(0xfffd0000+0x200+(0x20*0x7))))&0x7000000)==0x2000000)))
|
|
group.long (0x200+(0x20*0x7))++0x3
|
|
line.long 0x00 "CAN_MMR0x7,CAN Message 0x7 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 15. " MTIMEMARK ,Mailbox Timemark 15" "0,1"
|
|
bitfld.long 0x00 14. ",Mailbox Timemark 14" "0,1"
|
|
bitfld.long 0x00 13. ",Mailbox Timemark 13" "0,1"
|
|
bitfld.long 0x00 12. ",Mailbox Timemark 12" "0,1"
|
|
bitfld.long 0x00 11. ",Mailbox Timemark 11" "0,1"
|
|
bitfld.long 0x00 10. ",Mailbox Timemark 10" "0,1"
|
|
bitfld.long 0x00 9. ",Mailbox Timemark 9" "0,1"
|
|
bitfld.long 0x00 8. ",Mailbox Timemark 8" "0,1"
|
|
bitfld.long 0x00 7. ",Mailbox Timemark 7" "0,1"
|
|
bitfld.long 0x00 6. ",Mailbox Timemark 6" "0,1"
|
|
bitfld.long 0x00 5. ",Mailbox Timemark 5" "0,1"
|
|
bitfld.long 0x00 4. ",Mailbox Timemark 4" "0,1"
|
|
bitfld.long 0x00 3. ",Mailbox Timemark 3" "0,1"
|
|
bitfld.long 0x00 2. ",Mailbox Timemark 2" "0,1"
|
|
bitfld.long 0x00 1. ",Mailbox Timemark 1" "0,1"
|
|
bitfld.long 0x00 0. ",Mailbox Timemark 0" "0,1"
|
|
elif ((((data.long(ad:0xfffd0000))&0x20)==0x00)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x7))))&0x7000000)!=0x1000000)&&(((data.long(ad:(0xfffd0000+0x200+(0x20*0x7))))&0x7000000)!=0x2000000))
|
|
group.long (0x200+(0x20*0x7))++0x3
|
|
line.long 0x00 "CAN_MMR0x7,CAN Message 0x7 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
bitfld.long 0x00 16.--19. " PRIOR ,Mailbox Priority" "Priority 0,Priority 1,Priority 2,Priority 3,Priority 4,Priority 5,Priority 6,Priority 7,Priority 8,Priority 9,Priority 10,Priority 11,Priority 12,Priority 13,Priority 14,Priority 15"
|
|
else
|
|
group.long (0x200+(0x20*0x7))++0x3
|
|
line.long 0x00 "CAN_MMR0x7,CAN Message 0x7 Mode Register"
|
|
bitfld.long 0x00 24.--26. " MOT ,Mailbox Object Type" "Disabled,Reception,Reception/overwrite,Transmit,Consumer,Producer,?..."
|
|
endif
|
|
group.long (0x204+(0x20*0x7))++0x7
|
|
line.long 0x0 "CAN_MAM0x7,CAN Message 0x7 Acceptance Mask Register"
|
|
bitfld.long 0x0 29. " MIDE ,Identifier Version" "IDvA,IDvA/IDvB"
|
|
hexmask.long.word 0x0 18.--28. 1. " MIDvA ,Identifier Complementary Bits (Standard Frame Mode)"
|
|
textline " "
|
|
hexmask.long.tbyte 0x0 0.--17. 1. " MIDvB ,Identifier Complementary Bits (Extended Frame Mode)"
|
|
line.long 0x4 "CAN_MID0x7,CAN Message 0x7 ID Register"
|
|
bitfld.long 0x4 29. " MIDE ,Identifier Version" "A,B"
|
|
hexmask.long.word 0x4 18.--28. 1. " MIDvA ,Identifier Complementary Bits (Standard Frame Mode)"
|
|
textline " "
|
|
hexmask.long.tbyte 0x4 0.--17. 1. " MIDvB ,Identifier Complementary Bits (Extended Frame Mode)"
|
|
rgroup.long (0x20c+(0x20*0x7))++0x3
|
|
line.long 0x00 "CAN_MFID0x7,CAN Message 0x7 Family ID Register"
|
|
hexmask.long 0x00 0.--28. 1. " MFID ,Family ID"
|
|
hgroup.long (0x210+(0x20*0x7))++0x3
|
|
hide.long 0x0 "CAN_MSR0x7,CAN Message 0x7 Status Register"
|
|
in
|
|
hgroup.long (0x214+(0x20*0x7))++0x03
|
|
hide.long 0x00 "CAN_MDL0x7,CAN Message 0x7 Data Low Register"
|
|
in
|
|
hgroup.long (0x218+(0x20*0x7))++0x03
|
|
hide.long 0x00 "CAN_MDH0x7,CAN Message 0x7 Data High Register"
|
|
in
|
|
wgroup.long (0x21c+(0x20*0x7))++0x03
|
|
line.long 0x00 "CAN_MCR0x7,CAN Message 0x7 Control Register"
|
|
bitfld.long 0x00 23. " MTCR ,Mailbox Transfer Command" "Not transferred,Transferred"
|
|
bitfld.long 0x00 22. " MACR ,Mailbox 0x7 Abort Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 20. " MRTR ,Mailbox Remote Transmission Request" "Not requested,Requested"
|
|
bitfld.long 0x00 16.--19. " MDLC ,Mailbox Data Length Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree "EMAC (Ethernet MAC 10/100)"
|
|
base 0xfffdc000
|
|
width 0xC
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "EMAC_NCR,Network Control Register"
|
|
bitfld.long 0x00 10. " THALT ,Transmit Halt" "No effect,Halted"
|
|
bitfld.long 0x00 9. " TSTART ,Transmission Start" "No effect,Started"
|
|
textline " "
|
|
bitfld.long 0x00 8. " BP ,Back Pressure" "No effect,Collisions"
|
|
bitfld.long 0x00 7. " WESTAT ,Statistics Registers Write Enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INCSTAT ,Statistics Registers Increment" "No effect,Incremented"
|
|
bitfld.long 0x00 5. " CLRSTAT ,Statistics Registers Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MPE ,Management Port Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TE ,Transmit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " LLB ,Loopback Local" "No loopback,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LB ,Loopback" "No loopback,Loopback"
|
|
line.long 0x04 "EMAC_NCFGR,Network Configuration Register"
|
|
bitfld.long 0x04 19. " IRXFCS ,RX FCS Ignore" "Normal,Ignored"
|
|
bitfld.long 0x04 18. " EFRHD ,Half-Duplex Receive Frames Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 17. " DRFCS ,Receive FCS Discard" "Not discarded,Discarded"
|
|
bitfld.long 0x04 16. " RLCE ,Receive Length Field Checking Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 14.--15. " RBOF ,Receive Buffer Offset" "No offset,1-byte,2-byte,3-byte"
|
|
bitfld.long 0x04 13. " PAE ,Pause Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 12. " RTY ,Retry Test" "Normal,Retry"
|
|
bitfld.long 0x04 10.--11. " CLK ,MDC Clock Divider" "MCK/8,MCK/16,MCK/32,MCK/64"
|
|
textline " "
|
|
bitfld.long 0x04 8. " BIG ,1536 Bytes Frames Receive" "Not received,Received"
|
|
bitfld.long 0x04 7. " UNI ,Unicast Hash Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " MTI ,Multicast Hash Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " NBC ,No Broadcast" "Broadcast,No broadcast"
|
|
textline " "
|
|
bitfld.long 0x04 4. " CAF ,All Frames Copy" "Not copied,Copied"
|
|
bitfld.long 0x04 3. " JFRAME ,Jumbo Frames Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " FD ,Full Duplex Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " SPD ,Speed" "10 Mb/s,100 Mb/s"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "EMAC_NSR,Network Status Register"
|
|
bitfld.long 0x00 2. " IDLE ,PHY Management Logic IDLE" "Idle,Running"
|
|
bitfld.long 0x00 1. " MDIO ,MDIO Pin Status" "Low,High"
|
|
group.long 0x14++0x7
|
|
line.long 0x00 "EMAC_TSR,Transmit Status Register"
|
|
eventfld.long 0x00 6. " UND ,Transmit Underrun" "No underrun,Underrun"
|
|
eventfld.long 0x00 5. " COMP ,Transmit Complete" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x00 4. " BEX ,Buffers Mid Frame Exhaust" "Not exhausted,Exhausted"
|
|
bitfld.long 0x00 3. " TGO ,Transmit Go" "Not activated,Activated"
|
|
textline " "
|
|
eventfld.long 0x00 2. " RLE ,Retry Limit Exceed" "Not exceeded,Exceeded"
|
|
eventfld.long 0x00 1. " COL ,Collision Occurence" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 0. " UBR ,Used Bit Read" "Not read,Read"
|
|
line.long 0x04 "EMAC_RBQP,Receive Buffer Queue Pointer Register"
|
|
hexmask.long 0x04 2.--31. 4. " ADDR ,Receive Buffer Queue Pointer Address"
|
|
if (((data.long(ad:(0xfffdc000+0x14)))&0x8)==0x0)
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "EMAC_TBQP,Transmit Buffer Queue Pointer Register"
|
|
hexmask.long 0x0 2.--31. 4. " ADDR ,Transmit Buffer Queue Pointer Address"
|
|
else
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "EMAC_TBQP,Transmit Buffer Queue Pointer Register"
|
|
hexmask.long 0x0 2.--31. 4. " ADDR ,Transmit Buffer Queue Pointer Address"
|
|
endif
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "EMAC_RSR,Receive Status Register"
|
|
eventfld.long 0x0 2. " OVR ,Receive Overrun" "No overrun,Overrun"
|
|
eventfld.long 0x0 1. " REC ,Frame Receive" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x0 0. " BNA ,Buffer Not Available" "Available,Not available"
|
|
hgroup.long 0x24++0x03
|
|
hide.long 0x0 "EMAC_ISR,Interrupt Status Register"
|
|
in
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "EMAC_IMR,Interrupt Mask Register"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " PTZ_Cleared/Set ,Pause Time Zero" "Enabled,Disabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " PFR_Cleared/Set ,Pause Frame Receive" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " HRESP_Cleared/Set ,Hresp Not OK" "Enabled,Disabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " ROVR_Cleared/Set ,Receive Overrun" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 07. -0x08 07. -0x04 7. " TCOMP_Cleared/Set ,Transmit Complete" "Enabled,Disabled"
|
|
setclrfld.long 0x00 06. -0x08 06. -0x04 6. " TXERR_Cleared/Set ,Transmit Buffers Mid-Frame Exhaust Interrupt" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 05. -0x08 05. -0x04 5. " RLE_Cleared/Set ,Retry Limit Exceed" "Enabled,Disabled"
|
|
setclrfld.long 0x00 04. -0x08 04. -0x04 4. " TUND_Cleared/Set ,Ethernet Transmit Buffer Underrun" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 03. -0x08 03. -0x04 3. " TXUBR_Cleared/Set ,Transmit Used Bit Read" "Enabled,Disabled"
|
|
setclrfld.long 0x00 02. -0x08 02. -0x04 2. " RXUBR_Cleared/Set ,Receive Used Bit Read" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 01. -0x08 01. -0x04 1. " RCOMP_Cleared/Set ,Receive Complete" "Enabled,Disabled"
|
|
setclrfld.long 0x00 00. -0x08 00. -0x04 0. " MFD_Cleared/Set ,Management Frame Send" "Enabled,Disabled"
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "EMAC_MAN,PHY Maintenance Register"
|
|
bitfld.long 0x00 30.--31. " SOF ,Frame Start" "Not valid,Valid,Not valid,Not valid"
|
|
bitfld.long 0x00 28.--29. " RW ,Read/Write" "Reserved,Write,Read,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 23.--27. 1. " PHYA ,PHY Address"
|
|
hexmask.long.byte 0x00 18.--22. 1. " REGA ,Register Address"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " CODE ,Code" "00,01,10,11"
|
|
hexmask.long.word 0x00 0.--15. 1. " DATA ,PHY Data"
|
|
line.long 0x04 "EMAC_PTR,Pause Time Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " PTIME ,Pause Time"
|
|
group.long 0x90++0x7
|
|
line.long 0x00 "EMAC_HRB,Hash Register Bottom"
|
|
line.long 0x04 "EMAC_HRT,Hash Register Top"
|
|
tree "Specific Address Registers"
|
|
textline ""
|
|
group.long 0x98++0x1F
|
|
line.long 0x0 "EMAC_SA1B,Specific Address 1 Bottom Register"
|
|
line.long 0x4 "EMAC_SA1T,Specific Address 1 Top Register"
|
|
hexmask.long.word 0x4 0.--15. 1. " ADDR ,Destination Address Most Significant Bits 32 to 47"
|
|
line.long 0x8 "EMAC_SA2B,Specific Address 2 Bottom Register"
|
|
line.long 0xC "EMAC_SA2T,Specific Address 2 Top Register"
|
|
hexmask.long.word 0xC 0.--15. 1. " ADDR ,Destination Address Most Significant Bits 32 to 47"
|
|
line.long 0x10 "EMAC_SA3B,Specific Address 3 Bottom Register"
|
|
line.long 0x14 "EMAC_SA3T,Specific Address 3 Top Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " ADDR ,Destination Address Most Significant Bits 32 to 47"
|
|
line.long 0x18 "EMAC_SA4B,Specific Address 4 Bottom Register"
|
|
line.long 0x1C "EMAC_SA4T,Specific Address 4 Top Register"
|
|
hexmask.long.word 0x1C 0.--15. 1. " ADDR ,Destination Address Most Significant Bits 32 to 47"
|
|
tree.end
|
|
textline " "
|
|
group.long 0xB8++0x3
|
|
line.long 0x0 "EMAC_TID,Type ID Checking Register"
|
|
hexmask.long.word 0x0 0.--15. 1. " TID ,Type ID Checking"
|
|
group.long 0xc0++0x03
|
|
line.long 0x00 "EMAC_USRIO,User Input/Output Register"
|
|
bitfld.long 0x00 1. " CLKEN ,Transceiver Input Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RMII ,RMII Operation Mode Enable" "MII,RMII"
|
|
tree "EMAC Statistic Registers"
|
|
hgroup.long 0x3C++0x03
|
|
hide.long 0x00 "EMAC_PFR,Pause Frames Received Register"
|
|
in
|
|
hgroup.long 0x40++0x03
|
|
hide.long 0x00 "EMAC_FTO,Frames Transmitted Ok Register"
|
|
in
|
|
hgroup.long 0x44++0x03
|
|
hide.long 0x00 "EMAC_SCF,Single Collision Frames Register"
|
|
in
|
|
hgroup.long 0x48++0x03
|
|
hide.long 0x00 "EMAC_MCF,Multicollision Frames Register"
|
|
in
|
|
hgroup.long 0x4C++0x03
|
|
hide.long 0x00 "EMAC_FRO,Frames Received Ok Register"
|
|
in
|
|
hgroup.long 0x50++0x03
|
|
hide.long 0x00 "EMAC_FCSE,Frames Check Sequence Errors Register"
|
|
in
|
|
hgroup.long 0x54++0x03
|
|
hide.long 0x00 "EMAC_ALE,Alignment Errors Register"
|
|
in
|
|
hgroup.long 0x58++0x03
|
|
hide.long 0x00 "EMAC_DTF,Deferred Transmission Frames Register"
|
|
in
|
|
hgroup.long 0x5C++0x03
|
|
hide.long 0x00 "EMAC_LCOL,Late Collisions Register"
|
|
in
|
|
hgroup.long 0x60++0x03
|
|
hide.long 0x00 "EMAC_EXCOL,Excessive Collisions Register"
|
|
in
|
|
hgroup.long 0x64++0x03
|
|
hide.long 0x00 "EMAC_TUND,Transmit Underrun Errors Register"
|
|
in
|
|
hgroup.long 0x68++0x03
|
|
hide.long 0x00 "EMAC_CSE,Carrier Sense Errors Register"
|
|
in
|
|
hgroup.long 0x6C++0x03
|
|
hide.long 0x00 "EMAC_RRE,Receive Resource Errors Register"
|
|
in
|
|
hgroup.long 0x70++0x03
|
|
hide.long 0x00 "EMAC_ROVR,Receive Overrun Errors Register"
|
|
in
|
|
hgroup.long 0x74++0x03
|
|
hide.long 0x00 "EMAC_RSE,Receive Symbol Errors Register"
|
|
in
|
|
hgroup.long 0x78++0x03
|
|
hide.long 0x00 "EMAC_ELE,Excessive Length Errors Register"
|
|
in
|
|
hgroup.long 0x7C++0x03
|
|
hide.long 0x00 "EMAC_RJA,Receive Jabbers Register"
|
|
in
|
|
hgroup.long 0x80++0x03
|
|
hide.long 0x00 "EMAC_USF,Undersize Frames Register"
|
|
in
|
|
hgroup.long 0x84++0x03
|
|
hide.long 0x00 "EMAC_STE,SQE Test Errors Register"
|
|
in
|
|
hgroup.long 0x88++0x03
|
|
hide.long 0x00 "EMAC_RLE,Received Length Field Mismatch Register"
|
|
in
|
|
base vm:0x0
|
|
wgroup 0x0++0x0
|
|
tree.end
|
|
tree.end
|
|
textline ""
|