5862 lines
392 KiB
Plaintext
5862 lines
392 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: A31L12x On-Chip Peripherals
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; @Props: Released
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; @Author: JDU, NEJ
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; @Changelog: 2023-02-06 JDU
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; 2023-11-02 NEJ
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; @Manufacturer: ABOV - ABOV Semiconductor Co., Ltd.
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; @Doc: Generated (TRACE32, build: 164232.), based on:
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; A31L12x_fixed.svd (Ver. 1.0)
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; @Core: Cortex-M0+
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; @Chip: A31L122CL, A31L122KN, A31L122KU, A31L122RL, A31L123CL, A31L123KN,
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; A31L123KU, A31L123RL
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; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: pera31l12x.per 16938 2023-11-07 18:43:11Z kwisniewski $
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AUTOINDENT.ON CENTER TREE
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ENUMDELIMITER ","
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base ad:0x0
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tree.close "Core Registers (Cortex-M0+)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 0x8
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if (CORENAME()=="CORTEXM1")
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group.long 0x10++0x0b
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line.long 0x00 "STCSR,SysTick Control and Status Register"
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bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
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bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock"
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textline " "
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bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
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bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
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line.long 0x04 "STRVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
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line.long 0x08 "STCVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
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else
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group.long 0x10++0x0b
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line.long 0x00 "STCSR,SysTick Control and Status Register"
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bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
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bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock"
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textline " "
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bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
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bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
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line.long 0x04 "STRVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
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line.long 0x08 "STCVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
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endif
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if (CORENAME()=="CORTEXM1")
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rgroup.long 0x1c++0x03
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line.long 0x00 "STCR,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1"
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bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1"
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textline " "
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known"
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else
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rgroup.long 0x1c++0x03
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line.long 0x00 "STCR,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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textline " "
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors"
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endif
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rgroup.long 0xd00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer code"
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hexmask.long.byte 0x00 20.--23. 1. " VARIANT ,Implementation defined variant number"
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textline " "
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hexmask.long.byte 0x00 4.--15. 1. " PARTNO ,Number of processor within family"
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hexmask.long.byte 0x00 0.--3. 1. " REVISION ,Implementation defined revision number"
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group.long 0xd04++0x03
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending"
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bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending"
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textline " "
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bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending"
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bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending"
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textline " "
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bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending"
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bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt"
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hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field"
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textline " "
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hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field"
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if (CORENAME()=="CORTEXM0+")
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group.long 0xd08++0x03
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line.long 0x00 "VTOR,Vector Table Offset Register"
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hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address"
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else
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textline " "
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endif
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group.long 0xd0c++0x03
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line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key"
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bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian"
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textline " "
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bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset"
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bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear"
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group.long 0xd10++0x03
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line.long 0x00 "SCR,System Control Register"
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bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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textline " "
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bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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rgroup.long 0xd14++0x03
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line.long 0x00 "CCR,Configuration and Control Register"
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bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned"
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bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped"
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group.long 0xd1c++0x0b
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line.long 0x00 "SHPR2,System Handler Priority Register 2"
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bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11"
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line.long 0x04 "SHPR3,System Handler Priority Register 3"
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bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11"
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bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11"
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line.long 0x08 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending"
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if (CORENAME()=="CORTEXM0+")
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hgroup.long 0x08++0x03
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hide.long 0x00 "ACTLR,Auxiliary Control Register"
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else
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textline " "
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endif
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else
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newline
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textline "COREDEBUG component base address not specified"
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newline
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endif
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tree.end
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tree "Memory Protection Unit (MPU)"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 15.
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rgroup.long 0xD90++0x03
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line.long 0x00 "MPU_TYPE,MPU Type Register"
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bitfld.long 0x00 8.--15. 1. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,?..."
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group.long 0xD94++0x03
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line.long 0x00 "MPU_CTRL,MPU Control Register"
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bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
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bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
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bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
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group.long 0xD98++0x03
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line.long 0x00 "MPU_RNR,MPU Region Number Register"
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hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
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tree.close "MPU regions"
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if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
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group.long 0xD9C++0x03 "Region 0"
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saveout 0xD98 %l 0x0
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line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
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hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
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group.long 0xDA0++0x03
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saveout 0xD98 %l 0x0
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line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
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bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
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bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
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bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
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textline " "
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bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
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bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
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bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
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textline " "
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bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
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bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
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bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
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bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
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bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
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bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
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bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
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bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
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bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
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bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
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else
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hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
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saveout 0xD98 %l 0x0
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hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
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hgroup.long 0xDA0++0x03
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saveout 0xD98 %l 0x0
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hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
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textline " "
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textline " "
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endif
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if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
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group.long 0xD9C++0x03 "Region 1"
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saveout 0xD98 %l 0x1
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line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
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hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
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group.long 0xDA0++0x03
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saveout 0xD98 %l 0x1
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line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
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bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
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bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
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bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
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textline " "
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bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
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bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
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bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
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textline " "
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bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
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bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
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bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
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bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
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bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
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bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
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bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
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bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
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bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
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bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
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else
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hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
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saveout 0xD98 %l 0x1
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hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
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hgroup.long 0xDA0++0x03
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saveout 0xD98 %l 0x1
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hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
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textline " "
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textline " "
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endif
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if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
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group.long 0xD9C++0x03 "Region 2"
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saveout 0xD98 %l 0x2
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line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
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hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
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group.long 0xDA0++0x03
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saveout 0xD98 %l 0x2
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line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
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bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
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bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
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bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
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textline " "
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bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
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bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
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bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
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textline " "
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bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
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bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
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bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
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bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
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bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
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bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
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bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
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bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
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bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
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bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
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else
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hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
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saveout 0xD98 %l 0x2
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hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
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hgroup.long 0xDA0++0x03
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saveout 0xD98 %l 0x2
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hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
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textline " "
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textline " "
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endif
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if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
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group.long 0xD9C++0x03 "Region 3"
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saveout 0xD98 %l 0x3
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line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
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hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
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group.long 0xDA0++0x03
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saveout 0xD98 %l 0x3
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line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
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bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
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bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
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bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
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textline " "
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bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
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bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
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bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
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textline " "
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bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
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bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
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bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
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bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
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bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
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bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
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bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
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bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
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bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
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bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
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else
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hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
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|
saveout 0xD98 %l 0x3
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hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
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hgroup.long 0xDA0++0x03
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saveout 0xD98 %l 0x3
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hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller (NVIC)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 12.
|
|
tree "Interrupt Enable Registers"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
tree.end
|
|
width 6.
|
|
tree "Interrupt Priority Registers"
|
|
group.long 0x400++0x1F
|
|
line.long 0x00 "INT0,Interrupt Priority Register"
|
|
bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3"
|
|
line.long 0x04 "INT1,Interrupt Priority Register"
|
|
bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3"
|
|
bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3"
|
|
bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3"
|
|
bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3"
|
|
line.long 0x08 "INT2,Interrupt Priority Register"
|
|
bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3"
|
|
bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3"
|
|
bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3"
|
|
bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3"
|
|
line.long 0x0C "INT3,Interrupt Priority Register"
|
|
bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3"
|
|
bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3"
|
|
bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3"
|
|
bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3"
|
|
line.long 0x10 "INT4,Interrupt Priority Register"
|
|
bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3"
|
|
bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3"
|
|
bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3"
|
|
bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3"
|
|
line.long 0x14 "INT5,Interrupt Priority Register"
|
|
bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3"
|
|
bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3"
|
|
bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3"
|
|
bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3"
|
|
line.long 0x18 "INT6,Interrupt Priority Register"
|
|
bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3"
|
|
bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3"
|
|
bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3"
|
|
bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3"
|
|
line.long 0x1C "INT7,Interrupt Priority Register"
|
|
bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3"
|
|
bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3"
|
|
bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3"
|
|
bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 0xA
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred"
|
|
eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match"
|
|
textline " "
|
|
eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match"
|
|
eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request"
|
|
if (CORENAME()=="CORTEXM1")
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Selector Register"
|
|
bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write"
|
|
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..."
|
|
group.long 0xDF8++0x07
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor"
|
|
line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Breakpoint Unit (BPU)"
|
|
sif COMPonent.AVAILABLE("BPU")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1))
|
|
width 8.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "BP_CTRL,Breakpoint Control Register"
|
|
bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " KEY ,Key field" "No write,Write"
|
|
bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled"
|
|
else
|
|
newline
|
|
textline "BPU component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 14.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "DW_CTRL,DW Control Register "
|
|
bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "DW_PCSR,DW Program Counter Sample Register"
|
|
hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF"
|
|
group.long 0x20++0x0b
|
|
line.long 0x00 "DW_COMP0,DW Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK0,DW Mask Register 0"
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION0,DW Function Register 0"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
group.long 0x30++0x0b
|
|
line.long 0x00 "DW_COMP1,DW Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK1,DW Mask Register 1 "
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION1,DW Function Register 1"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
tree "ADC (High Speed 12-bit A/D Converter)"
|
|
base ad:0x40003000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CR,A/D Converter Control Register"
|
|
bitfld.long 0x0 15. "ADCEN,ADC Module Enable" "0: Disable ADC Module Operation.,1: Enable ADC Module Operation."
|
|
bitfld.long 0x0 10.--12. "TRIG,ADC Trigger Signal Selection" "0: Select ADST.,1: Timer 40 Trigger Signals,2: Timer 41 Trigger Signals,3: Timer 42 Trigger Signals,4: Timer 43 Trigger Signals,?,?,7: External ADC Trigger Input"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "ETRGP,ADC External Trigger Input Polarity Selection" "0: Disable ADC external trigger function.,1: Trigger on falling edge,2: Trigger on rising edge,3: Trigger on both of falling and rising edge"
|
|
bitfld.long 0x0 7. "ADRDY,ADC Conversion Ready" "0: Stop subsequent steps.,1: Ready to convert."
|
|
newline
|
|
bitfld.long 0x0 3.--4. "MDSEL,ADC Conversion Mode Selection" "0: Single Conversion Mode,1: Sequential Conversion Mode,2: Continuous Conversion Mode,?"
|
|
bitfld.long 0x0 0. "ADST,ADC Conversion Start" "0: No effect.,1: Trigger signal generation for conversion start."
|
|
line.long 0x4 "OVSCR,A/D Converter Oversampling Control Register"
|
|
bitfld.long 0x4 15. "OVSMPEN,Oversampling Enable" "0: Disable oversampling.,1: Enable oversampling."
|
|
bitfld.long 0x4 5.--7. "OVSMPR,Oversampling Ratio Selection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--3. 1. "OVSHT,Oversampling Data Shift"
|
|
line.long 0x8 "IESR,A/D Converter Interrupt Enable and Status Register"
|
|
hexmask.long.byte 0x8 16.--20. 1. "LASTCH,ADC Last Conversion Channel Numbe"
|
|
bitfld.long 0x8 11. "STBIEN,ADC Stabilization Interrupt Enable" "0: Disable stabilization interrupt.,1: Enable stabilization interrupt."
|
|
newline
|
|
bitfld.long 0x8 10. "OVRUNIEN,ADC Data Overrun Interrupt Enable" "0: Disable overrun interrupt.,1: Enable overrun interrupt."
|
|
bitfld.long 0x8 9. "EOCIEN,ADC End of Conversion Interrupt Enable" "0: Disable end of conversion interrupt.,1: Enable end of conversion interrupt."
|
|
newline
|
|
bitfld.long 0x8 8. "EOSIEN,ADC End of Sequence Interrupt Enable" "0: Disable end of sequence interrupt.,1: Enable end of sequence interrupt."
|
|
bitfld.long 0x8 3. "STBIFLAG,ADC Stabilization Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
newline
|
|
bitfld.long 0x8 2. "OVRUNIFLAG,ADC Data Overrun Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
bitfld.long 0x8 1. "EOCIFLAG,ADC End of Conversion Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
newline
|
|
bitfld.long 0x8 0. "EOSIFLAG,ADC End of Sequence Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "DR,A/D Converter Data Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "ADDATA,A/D Converter Result Data"
|
|
group.long 0x10++0xB
|
|
line.long 0x0 "PREDR,A/D Converter Prescaler Data Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PRED,A/D Converter Prescaler Data"
|
|
line.long 0x4 "SAMR,A/D Converter Sampling Time Register"
|
|
hexmask.long.byte 0x4 0.--4. 1. "SAMCK,Sampling Cycles for Sample/Hold Circuit"
|
|
line.long 0x8 "CHSELR,A/D Converter Channel Selection Register"
|
|
bitfld.long 0x8 19. "AN19,AN19(BGR) Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
bitfld.long 0x8 18. "AN18,AN18(AVDD) Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
newline
|
|
bitfld.long 0x8 16. "AN16,AN16(AVSS) Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
bitfld.long 0x8 15. "AN15,AN15 Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
newline
|
|
bitfld.long 0x8 14. "AN14,AN14 Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
bitfld.long 0x8 13. "AN13,AN13 Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
newline
|
|
bitfld.long 0x8 12. "AN12,AN12 Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
bitfld.long 0x8 11. "AN11,AN11 Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
newline
|
|
bitfld.long 0x8 10. "AN10,AN1 Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
bitfld.long 0x8 9. "AN9,AN9 Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
newline
|
|
bitfld.long 0x8 8. "AN8,AN8 Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
bitfld.long 0x8 7. "AN7,AN7 Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
newline
|
|
bitfld.long 0x8 6. "AN6,AN6 Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
bitfld.long 0x8 5. "AN5,AN5 Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
newline
|
|
bitfld.long 0x8 4. "AN4,AN4 Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
bitfld.long 0x8 3. "AN3,AN3 Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
newline
|
|
bitfld.long 0x8 2. "AN2,AN2 Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
bitfld.long 0x8 1. "AN1,AN1 Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
newline
|
|
bitfld.long 0x8 0. "AN0,AN0 Channel Selection" "0: ANx is not selected for conversion,1: ANx is selected for conversion"
|
|
tree.end
|
|
tree "CMP (Comparator)"
|
|
base ad:0x0
|
|
tree "CMP0"
|
|
base ad:0x40005600
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CR,Comparator n Control Register"
|
|
bitfld.long 0x0 15. "CMPnEN,Comparator n Enable" "0: Disable comparator n operation.,1: Enable comparator n operation."
|
|
bitfld.long 0x0 12.--14. "CMPnNEG,Comparator n Negative Input Selection" "0: Select external CPnN0 pin.,1: Select external CPnN1 pin.,2: Select external CPnN2 pin.,3: Select external CPnN3 pin. (Reserved on..,?,?,?,7: Select internal reference."
|
|
newline
|
|
bitfld.long 0x0 9.--11. "CMPnPOS,Comparator n Positive Input Selection" "0: Select external CPnP0 pin.,1: Select external CPnP1 pin. (CP1POS signal on..,2: Select external CPnP2 pin. (Reserved on..,3: Select external CPnP3 pin. (Reserved on..,4: Select external CPnP4 pin. (Reserved on..,5: Select external CPnP5 pin. (Reserved on..,?,?"
|
|
bitfld.long 0x0 8. "HYSnEN,Comparator n Hysteresis Enable" "0: Disable hysteresis function.,1: Enable hysteresis function."
|
|
newline
|
|
bitfld.long 0x0 6. "CMPnSPD,Comparator n Speed Selection" "0: Slow speed,1: Fast speed"
|
|
bitfld.long 0x0 4.--5. "CMPnPOL,Comparator n Interrupt Polarity Selection" "0: No interrupt at any edge,1: Interrupt on falling edge,2: Interrupt on rising edge,3: Interrupt on both of falling and rising edge"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "NFCKn,Comparator n Noise Filter Sampling Clock Selection" "0: PCLK/1,1: PCLK/2,2: PCLK/4,3: PCLK/8,4: PCLK/16,5: PCLK/32,6: PCLK/64,?"
|
|
line.long 0x4 "SR,Comparator n Status Register"
|
|
bitfld.long 0x4 4. "CMPnIFLAG,Comparator n Interrupt Flag" "0: No request occurred.,1: Request occurred. This bit is cleared to '0'.."
|
|
rbitfld.long 0x4 0. "CMPnST,Comparator n Output Status" "0: Comparator n output is low.,1: Comparator n output is high."
|
|
line.long 0x8 "RCR,Comparator n Reference Control Register"
|
|
bitfld.long 0x8 7. "REFnEN,Comparator n Internal Reference Enable" "0: Disable internal reference.,1: Enable internal reference."
|
|
bitfld.long 0x8 0.--2. "CMPnREF,Comparator n Reference Voltage Level Selection" "0: Select reference voltage level 0. NOTE)..,1: Select reference voltage level 1. NOTE)..,2: Select reference voltage level 2. NOTE)..,3: Select reference voltage level 3. NOTE)..,4: Select reference voltage level 4. NOTE)..,5: Select reference voltage level 5. NOTE)..,6: Select reference voltage level 6. NOTE)..,7: Select reference voltage level 7. NOTE).."
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CMP0_CR,Comparator 0 Control Register"
|
|
bitfld.long 0x0 15. "CMPnEN,Comparator n Enable" "0: Disable comparator n operation.,1: Enable comparator n operation."
|
|
bitfld.long 0x0 12.--14. "CMPnNEG,Comparator n Negative Input Selection" "0: Select external CPnN0 pin.,1: Select external CPnN1 pin.,2: Select external CPnN2 pin.,?,?,?,?,7: Select internal reference."
|
|
newline
|
|
bitfld.long 0x0 9.--11. "CMPnPOS,Comparator n Positive Input Selection" "0: Select external CPnP0 pin.,1: Select external CPnP1 pin. (CP1POS signal on..,?,?,?,?,?,?"
|
|
bitfld.long 0x0 8. "HYSnEN,Comparator n Hysteresis Enable" "0: Disable hysteresis function.,1: Enable hysteresis function."
|
|
newline
|
|
bitfld.long 0x0 6. "CMPnSPD,Comparator n Speed Selection" "0: Slow speed,1: Fast speed"
|
|
bitfld.long 0x0 4.--5. "CMPnPOL,Comparator n Interrupt Polarity Selection" "0: No interrupt at any edge,1: Interrupt on falling edge,2: Interrupt on rising edge,3: Interrupt on both of falling and rising edge"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "NFCKn,Comparator n Noise Filter Sampling Clock Selection" "0: PCLK/1,1: PCLK/2,2: PCLK/4,3: PCLK/8,4: PCLK/16,5: PCLK/32,6: PCLK/64,?"
|
|
tree.end
|
|
tree "CMP1"
|
|
base ad:0x40005680
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CR,Comparator n Control Register"
|
|
bitfld.long 0x0 15. "CMPnEN,Comparator n Enable" "0: Disable comparator n operation.,1: Enable comparator n operation."
|
|
bitfld.long 0x0 12.--14. "CMPnNEG,Comparator n Negative Input Selection" "0: Select external CPnN0 pin.,1: Select external CPnN1 pin.,2: Select external CPnN2 pin.,3: Select external CPnN3 pin. (Reserved on..,?,?,?,7: Select internal reference."
|
|
newline
|
|
bitfld.long 0x0 9.--11. "CMPnPOS,Comparator n Positive Input Selection" "0: Select external CPnP0 pin.,1: Select external CPnP1 pin. (CP1POS signal on..,2: Select external CPnP2 pin. (Reserved on..,3: Select external CPnP3 pin. (Reserved on..,4: Select external CPnP4 pin. (Reserved on..,5: Select external CPnP5 pin. (Reserved on..,?,?"
|
|
bitfld.long 0x0 8. "HYSnEN,Comparator n Hysteresis Enable" "0: Disable hysteresis function.,1: Enable hysteresis function."
|
|
newline
|
|
bitfld.long 0x0 6. "CMPnSPD,Comparator n Speed Selection" "0: Slow speed,1: Fast speed"
|
|
bitfld.long 0x0 4.--5. "CMPnPOL,Comparator n Interrupt Polarity Selection" "0: No interrupt at any edge,1: Interrupt on falling edge,2: Interrupt on rising edge,3: Interrupt on both of falling and rising edge"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "NFCKn,Comparator n Noise Filter Sampling Clock Selection" "0: PCLK/1,1: PCLK/2,2: PCLK/4,3: PCLK/8,4: PCLK/16,5: PCLK/32,6: PCLK/64,?"
|
|
line.long 0x4 "SR,Comparator n Status Register"
|
|
bitfld.long 0x4 4. "CMPnIFLAG,Comparator n Interrupt Flag" "0: No request occurred.,1: Request occurred. This bit is cleared to '0'.."
|
|
rbitfld.long 0x4 0. "CMPnST,Comparator n Output Status" "0: Comparator n output is low.,1: Comparator n output is high."
|
|
line.long 0x8 "RCR,Comparator n Reference Control Register"
|
|
bitfld.long 0x8 7. "REFnEN,Comparator n Internal Reference Enable" "0: Disable internal reference.,1: Enable internal reference."
|
|
bitfld.long 0x8 0.--2. "CMPnREF,Comparator n Reference Voltage Level Selection" "0: Select reference voltage level 0. NOTE)..,1: Select reference voltage level 1. NOTE)..,2: Select reference voltage level 2. NOTE)..,3: Select reference voltage level 3. NOTE)..,4: Select reference voltage level 4. NOTE)..,5: Select reference voltage level 5. NOTE)..,6: Select reference voltage level 6. NOTE)..,7: Select reference voltage level 7. NOTE).."
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CMP1_CR,Comparator 1 Control Register"
|
|
bitfld.long 0x0 15. "CMPnEN,Comparator n Enable" "0: Disable comparator n operation.,1: Enable comparator n operation."
|
|
bitfld.long 0x0 12.--14. "CMPnNEG,Comparator n Negative Input Selection" "0: Select external CPnN0 pin.,1: Select external CPnN1 pin.,2: Select external CPnN2 pin.,3: Select external CPnN3 pin.,?,?,?,7: Select internal reference."
|
|
newline
|
|
bitfld.long 0x0 9.--11. "CMPnPOS,Comparator n Positive Input Selection" "0: Select external CPnP0 pin.,1: Select external CPnP1 pin. (CP1POS signal on..,2: Select external CPnP2 pin.,3: Select external CPnP3 pin.,4: Select external CPnP4 pin,5: Select external CPnP5 pin.,?,?"
|
|
bitfld.long 0x0 8. "HYSnEN,Comparator n Hysteresis Enable" "0: Disable hysteresis function.,1: Enable hysteresis function."
|
|
newline
|
|
bitfld.long 0x0 6. "CMPnSPD,Comparator n Speed Selection" "0: Slow speed,1: Fast speed"
|
|
bitfld.long 0x0 4.--5. "CMPnPOL,Comparator n Interrupt Polarity Selection" "0: No interrupt at any edge,1: Interrupt on falling edge,2: Interrupt on rising edge,3: Interrupt on both of falling and rising edge"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "NFCKn,Comparator n Noise Filter Sampling Clock Selection" "0: PCLK/1,1: PCLK/2,2: PCLK/4,3: PCLK/8,4: PCLK/16,5: PCLK/32,6: PCLK/64,?"
|
|
tree.end
|
|
tree "CMPn"
|
|
base ad:0x53000000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CR,Comparator n Control Register"
|
|
bitfld.long 0x0 15. "CMPnEN,Comparator n Enable" "0: Disable comparator n operation.,1: Enable comparator n operation."
|
|
bitfld.long 0x0 12.--14. "CMPnNEG,Comparator n Negative Input Selection" "0: Select external CPnN0 pin.,1: Select external CPnN1 pin.,2: Select external CPnN2 pin.,3: Select external CPnN3 pin. (Reserved on..,?,?,?,7: Select internal reference."
|
|
newline
|
|
bitfld.long 0x0 9.--11. "CMPnPOS,Comparator n Positive Input Selection" "0: Select external CPnP0 pin.,1: Select external CPnP1 pin. (CP1POS signal on..,2: Select external CPnP2 pin. (Reserved on..,3: Select external CPnP3 pin. (Reserved on..,4: Select external CPnP4 pin. (Reserved on..,5: Select external CPnP5 pin. (Reserved on..,?,?"
|
|
bitfld.long 0x0 8. "HYSnEN,Comparator n Hysteresis Enable" "0: Disable hysteresis function.,1: Enable hysteresis function."
|
|
newline
|
|
bitfld.long 0x0 6. "CMPnSPD,Comparator n Speed Selection" "0: Slow speed,1: Fast speed"
|
|
bitfld.long 0x0 4.--5. "CMPnPOL,Comparator n Interrupt Polarity Selection" "0: No interrupt at any edge,1: Interrupt on falling edge,2: Interrupt on rising edge,3: Interrupt on both of falling and rising edge"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "NFCKn,Comparator n Noise Filter Sampling Clock Selection" "0: PCLK/1,1: PCLK/2,2: PCLK/4,3: PCLK/8,4: PCLK/16,5: PCLK/32,6: PCLK/64,?"
|
|
line.long 0x4 "SR,Comparator n Status Register"
|
|
bitfld.long 0x4 4. "CMPnIFLAG,Comparator n Interrupt Flag" "0: No request occurred.,1: Request occurred. This bit is cleared to '0'.."
|
|
rbitfld.long 0x4 0. "CMPnST,Comparator n Output Status" "0: Comparator n output is low.,1: Comparator n output is high."
|
|
line.long 0x8 "RCR,Comparator n Reference Control Register"
|
|
bitfld.long 0x8 7. "REFnEN,Comparator n Internal Reference Enable" "0: Disable internal reference.,1: Enable internal reference."
|
|
bitfld.long 0x8 0.--2. "CMPnREF,Comparator n Reference Voltage Level Selection" "0: Select reference voltage level 0. NOTE)..,1: Select reference voltage level 1. NOTE)..,2: Select reference voltage level 2. NOTE)..,3: Select reference voltage level 3. NOTE)..,4: Select reference voltage level 4. NOTE)..,5: Select reference voltage level 5. NOTE)..,6: Select reference voltage level 6. NOTE)..,7: Select reference voltage level 7. NOTE).."
|
|
tree.end
|
|
tree.end
|
|
tree "COA (Configuration Option Area)"
|
|
base ad:0x0
|
|
tree "COA0 (System Related Trimming Value)"
|
|
base ad:0x1FFFF000
|
|
rgroup.long 0x0++0x7F
|
|
line.long 0x0 "TRIM00,System Related Trim Value 00"
|
|
line.long 0x4 "TRIM01,System Related Trim Value 01"
|
|
line.long 0x8 "TRIM02,System Related Trim Value 02"
|
|
line.long 0xC "TRIM03,System Related Trim Value 03"
|
|
line.long 0x10 "TRIM04,System Related Trim Value 04"
|
|
line.long 0x14 "TRIM05,System Related Trim Value 05"
|
|
line.long 0x18 "TRIM06,System Related Trim Value 06"
|
|
line.long 0x1C "TRIM07,System Related Trim Value 07"
|
|
line.long 0x20 "TRIM08,System Related Trim Value 08"
|
|
line.long 0x24 "TRIM09,System Related Trim Value 09"
|
|
line.long 0x28 "TRIM10,System Related Trim Value 10"
|
|
line.long 0x2C "TRIM11,System Related Trim Value 11"
|
|
line.long 0x30 "TRIM12,System Related Trim Value 12"
|
|
line.long 0x34 "TRIM13,System Related Trim Value 13"
|
|
line.long 0x38 "TRIM14,System Related Trim Value 14"
|
|
line.long 0x3C "TRIM15,System Related Trim Value 15"
|
|
line.long 0x40 "TRIM16,System Related Trim Value 16"
|
|
line.long 0x44 "TRIM17,System Related Trim Value 17"
|
|
line.long 0x48 "TRIM18,System Related Trim Value 18"
|
|
line.long 0x4C "TRIM19,System Related Trim Value 19"
|
|
line.long 0x50 "CONF_MF1CNFIG,Manufacture Information 1"
|
|
hexmask.long 0x50 0.--31. 1. "XYCDN,X and Y Coordinates"
|
|
line.long 0x54 "CONF_MF2CNFIG,Manufacture Information 2"
|
|
hexmask.long.tbyte 0x54 8.--31. 1. "LOTNO,Lot Number [23:0]"
|
|
hexmask.long.byte 0x54 0.--7. 1. "WAFNO,Wafer Number"
|
|
line.long 0x58 "CONF_MF3CNFIG,Manufacture Information 3"
|
|
hexmask.long 0x58 0.--31. 1. "LOTNO,Lot Number [55:24]"
|
|
line.long 0x5C "CONF_MF4CNFIG,Manufacture Information 4"
|
|
hexmask.long 0x5C 0.--31. 1. "LOTNO,Lot Number [87:56]"
|
|
line.long 0x60 "TRIM24,System Related Trim Value 24"
|
|
line.long 0x64 "TRIM25,System Related Trim Value 25"
|
|
line.long 0x68 "TRIM26,System Related Trim Value 26"
|
|
line.long 0x6C "TRIM27,System Related Trim Value 27"
|
|
line.long 0x70 "TRIM28,System Related Trim Value 28"
|
|
line.long 0x74 "TRIM29,System Related Trim Value 29"
|
|
line.long 0x78 "TRIM30,System Related Trim Value 30"
|
|
line.long 0x7C "TRIM31,System Related Trim Value 31"
|
|
tree.end
|
|
tree "COA1 (User Option)"
|
|
base ad:0x1FFFF200
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "RPCNFIG,Configuration for Read Protection"
|
|
hexmask.long 0x0 4.--31. 1. "WTIDKY,Write Identification Key (0x69c8a27)"
|
|
bitfld.long 0x0 0.--1. "READP,Read Protection for Flash Memory Area" "0: 1. Not readable/erasable/writable by 'Debug' /..,?,2: 1. Not readable/erasable/writable by 'Debug' 2.,3: No restriction for read/erase/write."
|
|
rgroup.long 0xC++0xB
|
|
line.long 0x0 "WDTCNFIG,Configuration for Watch-Dog Timer"
|
|
hexmask.long.word 0x0 4.--15. 1. "WRCMF,Watch-Dog Timer RC Oscillator Master Configuration"
|
|
bitfld.long 0x0 2. "WCLKMF,Watch-Dog Timer Clock Selection Master Configuration" "0: By S/W (PPCLKSR Register),1: Always WDTRC"
|
|
newline
|
|
bitfld.long 0x0 1. "WRSTMF,Watch-Dog Timer Reset Enable Master Configuration" "0: Always Enable,1: By S/W (WDTCR Register)"
|
|
bitfld.long 0x0 0. "WCNTMF,Watch-Dog Timer Counter Enable Master Configuration" "0: Always Enable,1: By S/W (WDTCR Register)"
|
|
line.long 0x4 "LVRCNFIG,Configuration for Low Voltage Reset"
|
|
hexmask.long.byte 0x4 8.--15. 1. "LVRENM,LVR Reset Operation Control Master Configuration"
|
|
bitfld.long 0x4 0.--2. "LVRVS,LVR Voltage Selection" "0: 2.65V,1: 2.50V,2: 2.35V,3: 2.20V,4: 2.05V,5: 1.90V,6: 1.75V,7: 1.50V"
|
|
line.long 0x8 "CNFIGWTP1,Erase/Write Protection for Configure Option Page 1/2/3"
|
|
bitfld.long 0x8 2. "CP3WP,Configure Option Page 3 Erase/Write Protection" "0: Enable protection. (Not erasable/writable by..,1: Disable protection. (Erasable/writable by.."
|
|
bitfld.long 0x8 1. "CP2WP,Configure Option Page 2 Erase/Write Protection" "0: Enable protection. (Not erasable/writable by..,1: Disable protection. (Erasable/writable by.."
|
|
newline
|
|
bitfld.long 0x8 0. "CP1WP,Configure Option Page 1 Erase/Write Protection" "0: Enable protection. (Not erasable/writable by..,1: Disable protection. (Erasable/writable by.."
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "FMWTP1,Erase/Write Protection for Flash Memory"
|
|
bitfld.long 0x0 31. "SWTP31,Flash Memory Erase/Write Protection 31" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
bitfld.long 0x0 30. "SWTP30,Flash Memory Erase/Write Protection 30" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
newline
|
|
bitfld.long 0x0 29. "SWTP29,Flash Memory Erase/Write Protection 29" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
bitfld.long 0x0 28. "SWTP28,Flash Memory Erase/Write Protection 28" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
newline
|
|
bitfld.long 0x0 27. "SWTP27,Flash Memory Erase/Write Protection 27" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
bitfld.long 0x0 26. "SWTP26,Flash Memory Erase/Write Protection 26" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
newline
|
|
bitfld.long 0x0 25. "SWTP25,Flash Memory Erase/Write Protection 25" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
bitfld.long 0x0 24. "SWTP24,Flash Memory Erase/Write Protection 24" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
newline
|
|
bitfld.long 0x0 23. "SWTP23,Flash Memory Erase/Write Protection 23" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
bitfld.long 0x0 22. "SWTP22,Flash Memory Erase/Write Protection 22" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
newline
|
|
bitfld.long 0x0 21. "SWTP21,Flash Memory Erase/Write Protection 21" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
bitfld.long 0x0 20. "SWTP20,Flash Memory Erase/Write Protection 20" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
newline
|
|
bitfld.long 0x0 19. "SWTP19,Flash Memory Erase/Write Protection 19" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
bitfld.long 0x0 18. "SWTP18,Flash Memory Erase/Write Protection 18" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
newline
|
|
bitfld.long 0x0 17. "SWTP17,Flash Memory Erase/Write Protection 17" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
bitfld.long 0x0 16. "SWTP16,Flash Memory Erase/Write Protection 16" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
newline
|
|
bitfld.long 0x0 15. "SWTP15,Flash Memory Erase/Write Protection 15" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
bitfld.long 0x0 14. "SWTP14,Flash Memory Erase/Write Protection 14" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
newline
|
|
bitfld.long 0x0 13. "SWTP13,Flash Memory Erase/Write Protection 13" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
bitfld.long 0x0 12. "SWTP12,Flash Memory Erase/Write Protection 12" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
newline
|
|
bitfld.long 0x0 11. "SWTP11,Flash Memory Erase/Write Protection 11" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
bitfld.long 0x0 10. "SWTP10,Flash Memory Erase/Write Protection 10" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
newline
|
|
bitfld.long 0x0 9. "SWTP9,Flash Memory Erase/Write Protection 9" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
bitfld.long 0x0 8. "SWTP8,Flash Memory Erase/Write Protection 8" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
newline
|
|
bitfld.long 0x0 7. "SWTP7,Flash Memory Erase/Write Protection 7" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
bitfld.long 0x0 6. "SWTP6,Flash Memory Erase/Write Protection 6" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
newline
|
|
bitfld.long 0x0 5. "SWTP5,Flash Memory Erase/Write Protection 5" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
bitfld.long 0x0 4. "SWTP4,Flash Memory Erase/Write Protection 4" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
newline
|
|
bitfld.long 0x0 3. "SWTP3,Flash Memory Erase/Write Protection 3" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
bitfld.long 0x0 2. "SWTP2,Flash Memory Erase/Write Protection 2" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
newline
|
|
bitfld.long 0x0 1. "SWTP1,Flash Memory Erase/Write Protection 1" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
bitfld.long 0x0 0. "SWTP0,Flash Memory Erase/Write Protection 0" "0: Protect 'flash memory sector n erase/write',1: Permit 'flash memory sector n erase/write'"
|
|
tree.end
|
|
tree "COA2 (User Data Area 0)"
|
|
base ad:0x1FFFF400
|
|
rgroup.long 0x0++0x7F
|
|
line.long 0x0 "UDATA00,User Data 00"
|
|
line.long 0x4 "UDATA01,User Data 01"
|
|
line.long 0x8 "UDATA02,User Data 02"
|
|
line.long 0xC "UDATA03,User Data 03"
|
|
line.long 0x10 "UDATA04,User Data 04"
|
|
line.long 0x14 "UDATA05,User Data 05"
|
|
line.long 0x18 "UDATA06,User Data 06"
|
|
line.long 0x1C "UDATA07,User Data 07"
|
|
line.long 0x20 "UDATA08,User Data 08"
|
|
line.long 0x24 "UDATA09,User Data 09"
|
|
line.long 0x28 "UDATA10,User Data 10"
|
|
line.long 0x2C "UDATA11,User Data 11"
|
|
line.long 0x30 "UDATA12,User Data 12"
|
|
line.long 0x34 "UDATA13,User Data 13"
|
|
line.long 0x38 "UDATA14,User Data 14"
|
|
line.long 0x3C "UDATA15,User Data 15"
|
|
line.long 0x40 "UDATA16,User Data 16"
|
|
line.long 0x44 "UDATA17,User Data 17"
|
|
line.long 0x48 "UDATA18,User Data 18"
|
|
line.long 0x4C "UDATA19,User Data 19"
|
|
line.long 0x50 "UDATA20,User Data 20"
|
|
line.long 0x54 "UDATA21,User Data 21"
|
|
line.long 0x58 "UDATA22,User Data 22"
|
|
line.long 0x5C "UDATA23,User Data 23"
|
|
line.long 0x60 "UDATA24,User Data 24"
|
|
line.long 0x64 "UDATA25,User Data 25"
|
|
line.long 0x68 "UDATA26,User Data 26"
|
|
line.long 0x6C "UDATA27,User Data 27"
|
|
line.long 0x70 "UDATA28,User Data 28"
|
|
line.long 0x74 "UDATA29,User Data 29"
|
|
line.long 0x78 "UDATA30,User Data 30"
|
|
line.long 0x7C "UDATA31,User Data 31"
|
|
tree.end
|
|
tree "COA3 (User Data Area 1)"
|
|
base ad:0x1FFFF600
|
|
rgroup.long 0x0++0x7F
|
|
line.long 0x0 "UDATA00,User Data 00"
|
|
line.long 0x4 "UDATA01,User Data 01"
|
|
line.long 0x8 "UDATA02,User Data 02"
|
|
line.long 0xC "UDATA03,User Data 03"
|
|
line.long 0x10 "UDATA04,User Data 04"
|
|
line.long 0x14 "UDATA05,User Data 05"
|
|
line.long 0x18 "UDATA06,User Data 06"
|
|
line.long 0x1C "UDATA07,User Data 07"
|
|
line.long 0x20 "UDATA08,User Data 08"
|
|
line.long 0x24 "UDATA09,User Data 09"
|
|
line.long 0x28 "UDATA10,User Data 10"
|
|
line.long 0x2C "UDATA11,User Data 11"
|
|
line.long 0x30 "UDATA12,User Data 12"
|
|
line.long 0x34 "UDATA13,User Data 13"
|
|
line.long 0x38 "UDATA14,User Data 14"
|
|
line.long 0x3C "UDATA15,User Data 15"
|
|
line.long 0x40 "UDATA16,User Data 16"
|
|
line.long 0x44 "UDATA17,User Data 17"
|
|
line.long 0x48 "UDATA18,User Data 18"
|
|
line.long 0x4C "UDATA19,User Data 19"
|
|
line.long 0x50 "UDATA20,User Data 20"
|
|
line.long 0x54 "UDATA21,User Data 21"
|
|
line.long 0x58 "UDATA22,User Data 22"
|
|
line.long 0x5C "UDATA23,User Data 23"
|
|
line.long 0x60 "UDATA24,User Data 24"
|
|
line.long 0x64 "UDATA25,User Data 25"
|
|
line.long 0x68 "UDATA26,User Data 26"
|
|
line.long 0x6C "UDATA27,User Data 27"
|
|
line.long 0x70 "UDATA28,User Data 28"
|
|
line.long 0x74 "UDATA29,User Data 29"
|
|
line.long 0x78 "UDATA30,User Data 30"
|
|
line.long 0x7C "UDATA31,User Data 31"
|
|
tree.end
|
|
tree.end
|
|
tree "CRC (Check Redundancy Check and Checksum)"
|
|
base ad:0x30001000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CR,CRC/Checksum Control Register"
|
|
bitfld.long 0x0 14.--15. "INSIZE,Input Data Size Selection" "0: 32-bit is the input data size,1: 16-bit is the input data size,2: 8-bit is the input data size.,?"
|
|
bitfld.long 0x0 10. "INCOMP,Input Data Complement" "0: No effect.,1: 1's complement of input data"
|
|
newline
|
|
bitfld.long 0x0 7. "MODS,User/Auto Mode Selection" "0: User Mode (Calculate every data written to the..,1: Auto Mode (Calculate till CRC_SADR == CRC_EADR)"
|
|
bitfld.long 0x0 6. "RLTCLR,CRC/Checksum Result Data Register (CRC_RLT) Initialization" "0: No effect.,1: Initialize the CRC_RLT register with the value.."
|
|
newline
|
|
bitfld.long 0x0 5. "MDSEL,CRC/Checksum Selection" "0: Select CRC.,1: Select Checksum."
|
|
bitfld.long 0x0 3.--4. "POLYS,Polynomial Selection (CRC only)" "0: CRC16-CCITT (G1(x) = x16 + x12 + x5 + 1),1: CRC16 (G2(x) = x16 + x15 + x2 + 1),2: CRC8 (G3(x) = x8 + x2 + x + 1),3: CRC32 (G4(x) = x32 + x26 + x23 + x22 + x16 + x12.."
|
|
newline
|
|
bitfld.long 0x0 2. "SARINC,CRC/Checksum Start Address Auto Increment Control (User mode only)" "0: No effect.,1: The CRC/Checksum start address register is.."
|
|
bitfld.long 0x0 1. "FIRSTBS,First Shifted-in Selection (CRC only)" "0: msb first,1: lsb first"
|
|
newline
|
|
bitfld.long 0x0 0. "CRCRUN,CRC/Checksum Start/Stop Control" "0: Not busy. The CRC operation can be finished by..,1: Start CRC operation. This bit is automatically.."
|
|
line.long 0x4 "IN,CRC/Checksum Input Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "INDATA,CRC Input Data"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "RLT,CRC/Checksum Result Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "RLTDATA,CRC Result Data"
|
|
group.long 0xC++0xB
|
|
line.long 0x0 "INIT,CRC/Checksum Initial Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "INIDATA,CRC Initial Data"
|
|
line.long 0x4 "SADR,CRC/Checksum Start Address Register"
|
|
hexmask.long 0x4 0.--31. 1. "SADR,CRC Start Address"
|
|
line.long 0x8 "EADR,CRC/Checksum End Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "EADR,CRC End Address"
|
|
tree.end
|
|
tree "DMAC (Direct Memory Access Controller)"
|
|
base ad:0x0
|
|
tree "DMAC0"
|
|
base ad:0x40005D00
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CR,DMA Channel n Control Register"
|
|
hexmask.long.word 0x0 16.--27. 1. "TRANSCNT,The number of times to transfer"
|
|
bitfld.long 0x0 15. "ERFGSTP,Error Flag Stop" "0: Disable DMA stop function by an error of..,1: Enable DMA stop function by an error of.."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--12. 1. "PERSEL,Peripheral Selection"
|
|
bitfld.long 0x0 2.--3. "SIZE,Transfer Size Selection" "0: 8 bits,1: 16 bits,2: 32 bits,?"
|
|
newline
|
|
bitfld.long 0x0 1. "DIR,Transfer Direction" "0: Transfer is from memory to peripheral.,1: Transfer is from peripheral to memory."
|
|
bitfld.long 0x0 0. "CHnEN,DMA Channel Enable" "0: Disable channel n.,1: Enable channel n."
|
|
line.long 0x4 "IESR,DMA Channel n Interrupt Enable and Status Register"
|
|
bitfld.long 0x4 5. "TRERIENn,Transfer Error Interrupt Enable" "0: Disable transfer error interrupt.,1: Enable transfer error interrupt."
|
|
bitfld.long 0x4 4. "TRCIENn,Transfer Complete Interrupt Enable" "0: Disable transfer complete interrupt.,1: Enable transfer complete interrupt."
|
|
newline
|
|
bitfld.long 0x4 1. "TRERIFGn,Transfer Error Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
bitfld.long 0x4 0. "TRCIFGn,Transfer Complete Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
line.long 0x8 "PAR,DMA Channel n Peripheral Address Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "PBADR,Peripheral Base Address"
|
|
hexmask.long.word 0x8 0.--15. 1. "POADR,Peripheral Offset Address"
|
|
line.long 0xC "MAR,DMA Channel n Memory Address Register"
|
|
hexmask.long 0xC 0.--31. 1. "MAR,Memory Address"
|
|
tree.end
|
|
tree "DMAC1"
|
|
base ad:0x40005D20
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CR,DMA Channel n Control Register"
|
|
hexmask.long.word 0x0 16.--27. 1. "TRANSCNT,The number of times to transfer"
|
|
bitfld.long 0x0 15. "ERFGSTP,Error Flag Stop" "0: Disable DMA stop function by an error of..,1: Enable DMA stop function by an error of.."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--12. 1. "PERSEL,Peripheral Selection"
|
|
bitfld.long 0x0 2.--3. "SIZE,Transfer Size Selection" "0: 8 bits,1: 16 bits,2: 32 bits,?"
|
|
newline
|
|
bitfld.long 0x0 1. "DIR,Transfer Direction" "0: Transfer is from memory to peripheral.,1: Transfer is from peripheral to memory."
|
|
bitfld.long 0x0 0. "CHnEN,DMA Channel Enable" "0: Disable channel n.,1: Enable channel n."
|
|
line.long 0x4 "IESR,DMA Channel n Interrupt Enable and Status Register"
|
|
bitfld.long 0x4 5. "TRERIENn,Transfer Error Interrupt Enable" "0: Disable transfer error interrupt.,1: Enable transfer error interrupt."
|
|
bitfld.long 0x4 4. "TRCIENn,Transfer Complete Interrupt Enable" "0: Disable transfer complete interrupt.,1: Enable transfer complete interrupt."
|
|
newline
|
|
bitfld.long 0x4 1. "TRERIFGn,Transfer Error Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
bitfld.long 0x4 0. "TRCIFGn,Transfer Complete Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
line.long 0x8 "PAR,DMA Channel n Peripheral Address Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "PBADR,Peripheral Base Address"
|
|
hexmask.long.word 0x8 0.--15. 1. "POADR,Peripheral Offset Address"
|
|
line.long 0xC "MAR,DMA Channel n Memory Address Register"
|
|
hexmask.long 0xC 0.--31. 1. "MAR,Memory Address"
|
|
tree.end
|
|
tree "DMAC2"
|
|
base ad:0x40005D40
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CR,DMA Channel n Control Register"
|
|
hexmask.long.word 0x0 16.--27. 1. "TRANSCNT,The number of times to transfer"
|
|
bitfld.long 0x0 15. "ERFGSTP,Error Flag Stop" "0: Disable DMA stop function by an error of..,1: Enable DMA stop function by an error of.."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--12. 1. "PERSEL,Peripheral Selection"
|
|
bitfld.long 0x0 2.--3. "SIZE,Transfer Size Selection" "0: 8 bits,1: 16 bits,2: 32 bits,?"
|
|
newline
|
|
bitfld.long 0x0 1. "DIR,Transfer Direction" "0: Transfer is from memory to peripheral.,1: Transfer is from peripheral to memory."
|
|
bitfld.long 0x0 0. "CHnEN,DMA Channel Enable" "0: Disable channel n.,1: Enable channel n."
|
|
line.long 0x4 "IESR,DMA Channel n Interrupt Enable and Status Register"
|
|
bitfld.long 0x4 5. "TRERIENn,Transfer Error Interrupt Enable" "0: Disable transfer error interrupt.,1: Enable transfer error interrupt."
|
|
bitfld.long 0x4 4. "TRCIENn,Transfer Complete Interrupt Enable" "0: Disable transfer complete interrupt.,1: Enable transfer complete interrupt."
|
|
newline
|
|
bitfld.long 0x4 1. "TRERIFGn,Transfer Error Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
bitfld.long 0x4 0. "TRCIFGn,Transfer Complete Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
line.long 0x8 "PAR,DMA Channel n Peripheral Address Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "PBADR,Peripheral Base Address"
|
|
hexmask.long.word 0x8 0.--15. 1. "POADR,Peripheral Offset Address"
|
|
line.long 0xC "MAR,DMA Channel n Memory Address Register"
|
|
hexmask.long 0xC 0.--31. 1. "MAR,Memory Address"
|
|
tree.end
|
|
tree "DMAC3"
|
|
base ad:0x40005D60
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CR,DMA Channel n Control Register"
|
|
hexmask.long.word 0x0 16.--27. 1. "TRANSCNT,The number of times to transfer"
|
|
bitfld.long 0x0 15. "ERFGSTP,Error Flag Stop" "0: Disable DMA stop function by an error of..,1: Enable DMA stop function by an error of.."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--12. 1. "PERSEL,Peripheral Selection"
|
|
bitfld.long 0x0 2.--3. "SIZE,Transfer Size Selection" "0: 8 bits,1: 16 bits,2: 32 bits,?"
|
|
newline
|
|
bitfld.long 0x0 1. "DIR,Transfer Direction" "0: Transfer is from memory to peripheral.,1: Transfer is from peripheral to memory."
|
|
bitfld.long 0x0 0. "CHnEN,DMA Channel Enable" "0: Disable channel n.,1: Enable channel n."
|
|
line.long 0x4 "IESR,DMA Channel n Interrupt Enable and Status Register"
|
|
bitfld.long 0x4 5. "TRERIENn,Transfer Error Interrupt Enable" "0: Disable transfer error interrupt.,1: Enable transfer error interrupt."
|
|
bitfld.long 0x4 4. "TRCIENn,Transfer Complete Interrupt Enable" "0: Disable transfer complete interrupt.,1: Enable transfer complete interrupt."
|
|
newline
|
|
bitfld.long 0x4 1. "TRERIFGn,Transfer Error Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
bitfld.long 0x4 0. "TRCIFGn,Transfer Complete Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
line.long 0x8 "PAR,DMA Channel n Peripheral Address Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "PBADR,Peripheral Base Address"
|
|
hexmask.long.word 0x8 0.--15. 1. "POADR,Peripheral Offset Address"
|
|
line.long 0xC "MAR,DMA Channel n Memory Address Register"
|
|
hexmask.long 0xC 0.--31. 1. "MAR,Memory Address"
|
|
tree.end
|
|
tree "DMAC4"
|
|
base ad:0x40005D80
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CR,DMA Channel n Control Register"
|
|
hexmask.long.word 0x0 16.--27. 1. "TRANSCNT,The number of times to transfer"
|
|
bitfld.long 0x0 15. "ERFGSTP,Error Flag Stop" "0: Disable DMA stop function by an error of..,1: Enable DMA stop function by an error of.."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--12. 1. "PERSEL,Peripheral Selection"
|
|
bitfld.long 0x0 2.--3. "SIZE,Transfer Size Selection" "0: 8 bits,1: 16 bits,2: 32 bits,?"
|
|
newline
|
|
bitfld.long 0x0 1. "DIR,Transfer Direction" "0: Transfer is from memory to peripheral.,1: Transfer is from peripheral to memory."
|
|
bitfld.long 0x0 0. "CHnEN,DMA Channel Enable" "0: Disable channel n.,1: Enable channel n."
|
|
line.long 0x4 "IESR,DMA Channel n Interrupt Enable and Status Register"
|
|
bitfld.long 0x4 5. "TRERIENn,Transfer Error Interrupt Enable" "0: Disable transfer error interrupt.,1: Enable transfer error interrupt."
|
|
bitfld.long 0x4 4. "TRCIENn,Transfer Complete Interrupt Enable" "0: Disable transfer complete interrupt.,1: Enable transfer complete interrupt."
|
|
newline
|
|
bitfld.long 0x4 1. "TRERIFGn,Transfer Error Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
bitfld.long 0x4 0. "TRCIFGn,Transfer Complete Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
line.long 0x8 "PAR,DMA Channel n Peripheral Address Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "PBADR,Peripheral Base Address"
|
|
hexmask.long.word 0x8 0.--15. 1. "POADR,Peripheral Offset Address"
|
|
line.long 0xC "MAR,DMA Channel n Memory Address Register"
|
|
hexmask.long 0xC 0.--31. 1. "MAR,Memory Address"
|
|
tree.end
|
|
tree "DMACn"
|
|
base ad:0x59000000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CR,DMA Channel n Control Register"
|
|
hexmask.long.word 0x0 16.--27. 1. "TRANSCNT,The number of times to transfer"
|
|
bitfld.long 0x0 15. "ERFGSTP,Error Flag Stop" "0: Disable DMA stop function by an error of..,1: Enable DMA stop function by an error of.."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--12. 1. "PERSEL,Peripheral Selection"
|
|
bitfld.long 0x0 2.--3. "SIZE,Transfer Size Selection" "0: 8 bits,1: 16 bits,2: 32 bits,?"
|
|
newline
|
|
bitfld.long 0x0 1. "DIR,Transfer Direction" "0: Transfer is from memory to peripheral.,1: Transfer is from peripheral to memory."
|
|
bitfld.long 0x0 0. "CHnEN,DMA Channel Enable" "0: Disable channel n.,1: Enable channel n."
|
|
line.long 0x4 "IESR,DMA Channel n Interrupt Enable and Status Register"
|
|
bitfld.long 0x4 5. "TRERIENn,Transfer Error Interrupt Enable" "0: Disable transfer error interrupt.,1: Enable transfer error interrupt."
|
|
bitfld.long 0x4 4. "TRCIENn,Transfer Complete Interrupt Enable" "0: Disable transfer complete interrupt.,1: Enable transfer complete interrupt."
|
|
newline
|
|
bitfld.long 0x4 1. "TRERIFGn,Transfer Error Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
bitfld.long 0x4 0. "TRCIFGn,Transfer Complete Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
line.long 0x8 "PAR,DMA Channel n Peripheral Address Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "PBADR,Peripheral Base Address"
|
|
hexmask.long.word 0x8 0.--15. 1. "POADR,Peripheral Offset Address"
|
|
line.long 0xC "MAR,DMA Channel n Memory Address Register"
|
|
hexmask.long 0xC 0.--31. 1. "MAR,Memory Address"
|
|
tree.end
|
|
tree.end
|
|
tree "FMC (Flash Memory Controller)"
|
|
base ad:0x40001B00
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "ADR,Flash Memory Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDR,Flash Memory Address Pointer"
|
|
line.long 0x4 "IDR1,Flash Memory Identification Register 1"
|
|
hexmask.long 0x4 0.--31. 1. "ID1,Flash Memory Identification 0"
|
|
line.long 0x8 "IDR2,Flash Memory Identification Register 2"
|
|
hexmask.long 0x8 0.--31. 1. "ID2,Flash Memory Identification 1"
|
|
line.long 0xC "CR,Flash Memory Control Register"
|
|
hexmask.long.word 0xC 16.--31. 1. "WTIDKY,Write Identification Key (0x6c93)"
|
|
hexmask.long.byte 0xC 8.--15. 1. "FMKEY,Flash Memory Operation Area Selection"
|
|
rbitfld.long 0xC 7. "FMBUSY,Flash Memory Operation Mode Busy" "0,1"
|
|
hexmask.long.byte 0xC 0.--3. 1. "FMOD,Flash Memory Operation Mode Selection"
|
|
line.long 0x10 "BCR,Flash Memory Configure Area Bulk Erase Control Register"
|
|
hexmask.long.word 0x10 16.--31. 1. "WTIDKY,Write Identification Key (0xc1be)"
|
|
hexmask.long.byte 0x10 8.--11. 1. "CNF3BEN,Configure Option Page 3 Bulk Erase Enable"
|
|
hexmask.long.byte 0x10 4.--7. 1. "CNF2BEN,Configure Option Page 2 Bulk Erase Enable"
|
|
hexmask.long.byte 0x10 0.--3. 1. "CNF1BEN,Configure Option Page 1 Bulk Erase Enable"
|
|
line.long 0x14 "ERFLAG,Flash Memory Error Flag"
|
|
bitfld.long 0x14 1. "INSTFLAG,Don't care" "0,1"
|
|
bitfld.long 0x14 0. "FMOPFLAG,Error bit of Flash Memory Operation Procedure" "0,1"
|
|
wgroup.long 0x100++0x3
|
|
line.long 0x0 "PAGEBUF,Flash Memory Page Buffer Area (128bytes/Accessed by 32bit Word Only)"
|
|
tree.end
|
|
tree "I2C (Inter-Integrated Circuit)"
|
|
base ad:0x0
|
|
tree "I2C0"
|
|
base ad:0x40004800
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "CR,I2Cn Control Register"
|
|
bitfld.long 0x0 7. "I2CnEN,Activate I2Cn Block by supplying" "0,1"
|
|
bitfld.long 0x0 6. "TXDLYENBn,I2CnSDHR Register Control" "0,1"
|
|
bitfld.long 0x0 5. "I2CnIEN,I2Cn Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 4. "I2CnIFLAG,I2Cn Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 3. "ACKnEN,Controls ACK signal generation at ninth SCL period" "0,1"
|
|
rbitfld.long 0x0 2. "IMASTERn,Represent Operation Mode of I2Cn" "0,1"
|
|
bitfld.long 0x0 1. "STOPCn,STOP Condition Generation When I2Cn is master" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "STARTCn,START Condition Generation When I2Cn is master" "0,1"
|
|
line.long 0x4 "ST,I2Cn Status Register"
|
|
bitfld.long 0x4 7. "GCALLn,This bit has different meaning depending on whether I2C is master or slave" "0,1"
|
|
bitfld.long 0x4 6. "TENDn,This bit is set when 1-byte of data is transferred completely" "?,1: byte of data is transferred completely"
|
|
bitfld.long 0x4 5. "STOPDn,This bit is set when a STOP condition is detected" "0,1"
|
|
bitfld.long 0x4 4. "SSELn,This bit is set when I2C is addressed by other master" "0,1"
|
|
bitfld.long 0x4 3. "MLOSTn,This bit represents the result of bus arbitration in master mode" "0,1"
|
|
bitfld.long 0x4 2. "BUSYn,This bit reflects bus status" "0,1"
|
|
rbitfld.long 0x4 1. "TMODEn,This bit is used to indicate whether I2C is transmitter or receiver" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXACKn,This bit shows the state of ACK signal" "0,1"
|
|
line.long 0x8 "SAR1,I2Cn Slave Address Register 1"
|
|
hexmask.long.byte 0x8 1.--7. 1. "SLAn,These bits configure the slave address 0 in slave mode"
|
|
bitfld.long 0x8 0. "GCALLnEN,This bit decides whether I2Cn allows general call address 0 or not in I2Cn slave mode" "0,1"
|
|
line.long 0xC "SAR2,I2Cn Slave Address Register 2"
|
|
hexmask.long.byte 0xC 1.--7. 1. "SLAn,These bits configure the slave address 1 in slave mode"
|
|
bitfld.long 0xC 0. "GCALLnEN,This bit decides whether I2Cn allows general call address 1 or not in I2Cn slave mode" "0,1"
|
|
line.long 0x10 "DR,I2Cn Data Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "DATA,The I2CnDR Transmit buffer and Receive buffer share the same I/O address with this DATA register"
|
|
line.long 0x14 "SDHR,I2Cn SDA Hold Time Register"
|
|
hexmask.long.word 0x14 0.--11. 1. "HLDT,This register is used to control SDA output timing from the falling edge of SCL"
|
|
line.long 0x18 "SCLR,I2Cn SCL Low Period Register"
|
|
hexmask.long.word 0x18 0.--11. 1. "SCLL,This register defines the low period of SCL in master mode"
|
|
line.long 0x1C "SCHR,I2Cn SCL High Period Register"
|
|
hexmask.long.word 0x1C 0.--11. 1. "SCLH,This register defines the high period of SCL in master mode"
|
|
tree.end
|
|
tree "I2C1"
|
|
base ad:0x40004900
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "CR,I2Cn Control Register"
|
|
bitfld.long 0x0 7. "I2CnEN,Activate I2Cn Block by supplying" "0,1"
|
|
bitfld.long 0x0 6. "TXDLYENBn,I2CnSDHR Register Control" "0,1"
|
|
bitfld.long 0x0 5. "I2CnIEN,I2Cn Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 4. "I2CnIFLAG,I2Cn Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 3. "ACKnEN,Controls ACK signal generation at ninth SCL period" "0,1"
|
|
rbitfld.long 0x0 2. "IMASTERn,Represent Operation Mode of I2Cn" "0,1"
|
|
bitfld.long 0x0 1. "STOPCn,STOP Condition Generation When I2Cn is master" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "STARTCn,START Condition Generation When I2Cn is master" "0,1"
|
|
line.long 0x4 "ST,I2Cn Status Register"
|
|
bitfld.long 0x4 7. "GCALLn,This bit has different meaning depending on whether I2C is master or slave" "0,1"
|
|
bitfld.long 0x4 6. "TENDn,This bit is set when 1-byte of data is transferred completely" "?,1: byte of data is transferred completely"
|
|
bitfld.long 0x4 5. "STOPDn,This bit is set when a STOP condition is detected" "0,1"
|
|
bitfld.long 0x4 4. "SSELn,This bit is set when I2C is addressed by other master" "0,1"
|
|
bitfld.long 0x4 3. "MLOSTn,This bit represents the result of bus arbitration in master mode" "0,1"
|
|
bitfld.long 0x4 2. "BUSYn,This bit reflects bus status" "0,1"
|
|
rbitfld.long 0x4 1. "TMODEn,This bit is used to indicate whether I2C is transmitter or receiver" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXACKn,This bit shows the state of ACK signal" "0,1"
|
|
line.long 0x8 "SAR1,I2Cn Slave Address Register 1"
|
|
hexmask.long.byte 0x8 1.--7. 1. "SLAn,These bits configure the slave address 0 in slave mode"
|
|
bitfld.long 0x8 0. "GCALLnEN,This bit decides whether I2Cn allows general call address 0 or not in I2Cn slave mode" "0,1"
|
|
line.long 0xC "SAR2,I2Cn Slave Address Register 2"
|
|
hexmask.long.byte 0xC 1.--7. 1. "SLAn,These bits configure the slave address 1 in slave mode"
|
|
bitfld.long 0xC 0. "GCALLnEN,This bit decides whether I2Cn allows general call address 1 or not in I2Cn slave mode" "0,1"
|
|
line.long 0x10 "DR,I2Cn Data Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "DATA,The I2CnDR Transmit buffer and Receive buffer share the same I/O address with this DATA register"
|
|
line.long 0x14 "SDHR,I2Cn SDA Hold Time Register"
|
|
hexmask.long.word 0x14 0.--11. 1. "HLDT,This register is used to control SDA output timing from the falling edge of SCL"
|
|
line.long 0x18 "SCLR,I2Cn SCL Low Period Register"
|
|
hexmask.long.word 0x18 0.--11. 1. "SCLL,This register defines the low period of SCL in master mode"
|
|
line.long 0x1C "SCHR,I2Cn SCL High Period Register"
|
|
hexmask.long.word 0x1C 0.--11. 1. "SCLH,This register defines the high period of SCL in master mode"
|
|
tree.end
|
|
tree "I2Cn"
|
|
base ad:0x58000000
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "CR,I2Cn Control Register"
|
|
bitfld.long 0x0 7. "I2CnEN,Activate I2Cn Block by supplying" "0,1"
|
|
bitfld.long 0x0 6. "TXDLYENBn,I2CnSDHR Register Control" "0,1"
|
|
bitfld.long 0x0 5. "I2CnIEN,I2Cn Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 4. "I2CnIFLAG,I2Cn Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 3. "ACKnEN,Controls ACK signal generation at ninth SCL period" "0,1"
|
|
rbitfld.long 0x0 2. "IMASTERn,Represent Operation Mode of I2Cn" "0,1"
|
|
bitfld.long 0x0 1. "STOPCn,STOP Condition Generation When I2Cn is master" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "STARTCn,START Condition Generation When I2Cn is master" "0,1"
|
|
line.long 0x4 "ST,I2Cn Status Register"
|
|
bitfld.long 0x4 7. "GCALLn,This bit has different meaning depending on whether I2C is master or slave" "0,1"
|
|
bitfld.long 0x4 6. "TENDn,This bit is set when 1-byte of data is transferred completely" "?,1: byte of data is transferred completely"
|
|
bitfld.long 0x4 5. "STOPDn,This bit is set when a STOP condition is detected" "0,1"
|
|
bitfld.long 0x4 4. "SSELn,This bit is set when I2C is addressed by other master" "0,1"
|
|
bitfld.long 0x4 3. "MLOSTn,This bit represents the result of bus arbitration in master mode" "0,1"
|
|
bitfld.long 0x4 2. "BUSYn,This bit reflects bus status" "0,1"
|
|
rbitfld.long 0x4 1. "TMODEn,This bit is used to indicate whether I2C is transmitter or receiver" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXACKn,This bit shows the state of ACK signal" "0,1"
|
|
line.long 0x8 "SAR1,I2Cn Slave Address Register 1"
|
|
hexmask.long.byte 0x8 1.--7. 1. "SLAn,These bits configure the slave address 0 in slave mode"
|
|
bitfld.long 0x8 0. "GCALLnEN,This bit decides whether I2Cn allows general call address 0 or not in I2Cn slave mode" "0,1"
|
|
line.long 0xC "SAR2,I2Cn Slave Address Register 2"
|
|
hexmask.long.byte 0xC 1.--7. 1. "SLAn,These bits configure the slave address 1 in slave mode"
|
|
bitfld.long 0xC 0. "GCALLnEN,This bit decides whether I2Cn allows general call address 1 or not in I2Cn slave mode" "0,1"
|
|
line.long 0x10 "DR,I2Cn Data Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "DATA,The I2CnDR Transmit buffer and Receive buffer share the same I/O address with this DATA register"
|
|
line.long 0x14 "SDHR,I2Cn SDA Hold Time Register"
|
|
hexmask.long.word 0x14 0.--11. 1. "HLDT,This register is used to control SDA output timing from the falling edge of SCL"
|
|
line.long 0x18 "SCLR,I2Cn SCL Low Period Register"
|
|
hexmask.long.word 0x18 0.--11. 1. "SCLL,This register defines the low period of SCL in master mode"
|
|
line.long 0x1C "SCHR,I2Cn SCL High Period Register"
|
|
hexmask.long.word 0x1C 0.--11. 1. "SCLH,This register defines the high period of SCL in master mode"
|
|
tree.end
|
|
tree.end
|
|
tree "INTC (Interrupt Controller)"
|
|
base ad:0x40001000
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "PATRIG,Port A Interrupt Trigger Selection Register"
|
|
bitfld.long 0x0 9. "ITRIG9,Port A Interrupt Trigger Selection 9" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x0 8. "ITRIG8,Port A Interrupt Trigger Selection 8" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0x0 7. "ITRIG7,Port A Interrupt Trigger Selection 7" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x0 6. "ITRIG6,Port A Interrupt Trigger Selection 6" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0x0 5. "ITRIG5,Port A Interrupt Trigger Selection 5" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x0 4. "ITRIG4,Port A Interrupt Trigger Selection 4" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0x0 3. "ITRIG3,Port A Interrupt Trigger Selection 3" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x0 2. "ITRIG2,Port A Interrupt Trigger Selection 2" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0x0 1. "ITRIG1,Port A Interrupt Trigger Selection 1" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x0 0. "ITRIG0,Port A Interrupt Trigger Selection 0" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
line.long 0x4 "PBTRIG,Port B Interrupt Trigger Selection Register"
|
|
bitfld.long 0x4 12. "ITRIG12,Port B Interrupt Trigger Selection 12" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x4 11. "ITRIG11,Port B Interrupt Trigger Selection 11" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0x4 10. "ITRIG10,Port B Interrupt Trigger Selection 10" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x4 9. "ITRIG9,Port B Interrupt Trigger Selection 9" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0x4 8. "ITRIG8,Port B Interrupt Trigger Selection 8" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x4 7. "ITRIG7,Port B Interrupt Trigger Selection 7" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0x4 6. "ITRIG6,Port B Interrupt Trigger Selection 6" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x4 5. "ITRIG5,Port B Interrupt Trigger Selection 5" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0x4 4. "ITRIG4,Port B Interrupt Trigger Selection 4" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x4 3. "ITRIG3,Port B Interrupt Trigger Selection 3" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0x4 2. "ITRIG2,Port B Interrupt Trigger Selection 2" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x4 1. "ITRIG1,Port B Interrupt Trigger Selection 1" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0x4 0. "ITRIG0,Port B Interrupt Trigger Selection 0" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
line.long 0x8 "PCTRIG,Port C Interrupt Trigger Selection Register"
|
|
bitfld.long 0x8 11. "ITRIG11,Port C Interrupt Trigger Selection 11" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x8 10. "ITRIG10,Port C Interrupt Trigger Selection 10" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0x8 9. "ITRIG9,Port C Interrupt Trigger Selection 9" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x8 8. "ITRIG8,Port C Interrupt Trigger Selection 8" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0x8 7. "ITRIG7,Port C Interrupt Trigger Selection 7" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x8 6. "ITRIG6,Port C Interrupt Trigger Selection 6" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0x8 5. "ITRIG5,Port C Interrupt Trigger Selection 5" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x8 4. "ITRIG4,Port C Interrupt Trigger Selection 4" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0x8 3. "ITRIG3,Port C Interrupt Trigger Selection 3" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x8 2. "ITRIG2,Port C Interrupt Trigger Selection 2" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0x8 1. "ITRIG1,Port C Interrupt Trigger Selection 1" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x8 0. "ITRIG0,Port C Interrupt Trigger Selection 0" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
line.long 0xC "PDTRIG,Port D Interrupt Trigger Selection Register"
|
|
bitfld.long 0xC 7. "ITRIG7,Port D Interrupt Trigger Selection 7" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0xC 6. "ITRIG6,Port D Interrupt Trigger Selection 6" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0xC 5. "ITRIG5,Port D Interrupt Trigger Selection 5" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0xC 4. "ITRIG4,Port D Interrupt Trigger Selection 4" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0xC 3. "ITRIG3,Port D Interrupt Trigger Selection 3" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0xC 2. "ITRIG2,Port D Interrupt Trigger Selection 2" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0xC 1. "ITRIG1,Port D Interrupt Trigger Selection 1" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0xC 0. "ITRIG0,Port D Interrupt Trigger Selection 0" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
line.long 0x10 "PETRIG,Port E Interrupt Trigger Selection Register"
|
|
bitfld.long 0x10 4. "ITRIG4,Port E Interrupt Trigger Selection 4" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x10 3. "ITRIG3,Port E Interrupt Trigger Selection 3" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0x10 2. "ITRIG2,Port E Interrupt Trigger Selection 2" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x10 1. "ITRIG1,Port E Interrupt Trigger Selection 1" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0x10 0. "ITRIG0,Port E Interrupt Trigger Selection 0" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
line.long 0x14 "PFTRIG,Port F Interrupt Trigger Selection Register"
|
|
bitfld.long 0x14 3. "ITRIG3,Port F Interrupt Trigger Selection 3" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x14 2. "ITRIG2,Port F Interrupt Trigger Selection 2" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
newline
|
|
bitfld.long 0x14 1. "ITRIG1,Port F Interrupt Trigger Selection 1" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
bitfld.long 0x14 0. "ITRIG0,Port F Interrupt Trigger Selection 0" "0: Edge trigger interrupt,1: Level trigger interrupt"
|
|
group.long 0x100++0x17
|
|
line.long 0x0 "PACR,Port A Interrupt Control Register"
|
|
bitfld.long 0x0 18.--19. "INTCTL9,Port A Interrupt Control 9" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
|
|
bitfld.long 0x0 16.--17. "INTCTL8,Port A Interrupt Control 8" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
|
|
newline
|
|
bitfld.long 0x0 14.--15. "INTCTL7,Port A Interrupt Control 7" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
|
|
bitfld.long 0x0 12.--13. "INTCTL6,Port A Interrupt Control 6" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
|
|
newline
|
|
bitfld.long 0x0 10.--11. "INTCTL5,Port A Interrupt Control 5" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x0 8.--9. "INTCTL4,Port A Interrupt Control 4" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x0 6.--7. "INTCTL3,Port A Interrupt Control 3" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x0 4.--5. "INTCTL2,Port A Interrupt Control 2" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x0 2.--3. "INTCTL1,Port A Interrupt Control 1" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x0 0.--1. "INTCTL0,Port A Interrupt Control 0" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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line.long 0x4 "PBCR,Port B Interrupt Control Register"
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bitfld.long 0x4 24.--25. "INTCTL12,Port B Interrupt Control 12" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x4 22.--23. "INTCTL11,Port B Interrupt Control 11" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x4 20.--21. "INTCTL10,Port B Interrupt Control 10" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x4 18.--19. "INTCTL9,Port B Interrupt Control 9" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x4 16.--17. "INTCTL8,Port B Interrupt Control 8" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x4 14.--15. "INTCTL7,Port B Interrupt Control 7" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x4 12.--13. "INTCTL6,Port B Interrupt Control 6" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x4 10.--11. "INTCTL5,Port B Interrupt Control 5" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x4 8.--9. "INTCTL4,Port B Interrupt Control 4" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x4 6.--7. "INTCTL3,Port B Interrupt Control 3" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x4 4.--5. "INTCTL2,Port B Interrupt Control 2" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x4 2.--3. "INTCTL1,Port B Interrupt Control 1" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x4 0.--1. "INTCTL0,Port B Interrupt Control 0" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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line.long 0x8 "PCCR,Port C Interrupt Control Register"
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bitfld.long 0x8 22.--23. "INTCTL11,Port C Interrupt Control 11" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x8 20.--21. "INTCTL10,Port C Interrupt Control 10" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x8 18.--19. "INTCTL9,Port C Interrupt Control 9" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x8 16.--17. "INTCTL8,Port C Interrupt Control 8" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x8 14.--15. "INTCTL7,Port C Interrupt Control 7" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x8 12.--13. "INTCTL6,Port C Interrupt Control 6" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x8 10.--11. "INTCTL5,Port C Interrupt Control 5" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x8 8.--9. "INTCTL4,Port C Interrupt Control 4" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x8 6.--7. "INTCTL3,Port C Interrupt Control 3" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x8 4.--5. "INTCTL2,Port C Interrupt Control 2" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x8 2.--3. "INTCTL1,Port C Interrupt Control 1" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x8 0.--1. "INTCTL0,Port C Interrupt Control 0" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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line.long 0xC "PDCR,Port D Interrupt Control Register"
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bitfld.long 0xC 14.--15. "INTCTL7,Port D Interrupt Control 7" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0xC 12.--13. "INTCTL6,Port D Interrupt Control 6" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0xC 10.--11. "INTCTL5,Port D Interrupt Control 5" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0xC 8.--9. "INTCTL4,Port D Interrupt Control 4" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0xC 6.--7. "INTCTL3,Port D Interrupt Control 3" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0xC 4.--5. "INTCTL2,Port D Interrupt Control 2" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0xC 2.--3. "INTCTL1,Port D Interrupt Control 1" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0xC 0.--1. "INTCTL0,Port D Interrupt Control 0" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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line.long 0x10 "PECR,Port E Interrupt Control Register"
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bitfld.long 0x10 8.--9. "INTCTL4,Port E Interrupt Control 4" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x10 6.--7. "INTCTL3,Port E Interrupt Control 3" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x10 4.--5. "INTCTL2,Port E Interrupt Control 2" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x10 2.--3. "INTCTL1,Port E Interrupt Control 1" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x10 0.--1. "INTCTL0,Port E Interrupt Control 0" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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line.long 0x14 "PFCR,Port F Interrupt Control Register"
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bitfld.long 0x14 6.--7. "INTCTL3,Port F Interrupt Control 3" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x14 4.--5. "INTCTL2,Port F Interrupt Control 2" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x14 2.--3. "INTCTL1,Port F Interrupt Control 1" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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bitfld.long 0x14 0.--1. "INTCTL0,Port F Interrupt Control 0" "0: Disable external interrupt.,1: Interrupt on falling edge or on low level,2: Interrupt on rising edge or on high level,3: Interrupt on both falling and rising edge No.."
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group.long 0x200++0x17
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line.long 0x0 "PAFLAG,Port A Interrupt Flag Register"
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bitfld.long 0x0 9. "FLAG9,Port A Interrupt Flag 9" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x0 8. "FLAG8,Port A Interrupt Flag 8" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x0 7. "FLAG7,Port A Interrupt Flag 7" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x0 6. "FLAG6,Port A Interrupt Flag 6" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x0 5. "FLAG5,Port A Interrupt Flag 5" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x0 4. "FLAG4,Port A Interrupt Flag 4" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0x0 3. "FLAG3,Port A Interrupt Flag 3" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x0 2. "FLAG2,Port A Interrupt Flag 2" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x0 1. "FLAG1,Port A Interrupt Flag 1" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x0 0. "FLAG0,Port A Interrupt Flag 0" "0: No request occurred.,1: Request occurred."
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line.long 0x4 "PBFLAG,Port B Interrupt Flag Register"
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bitfld.long 0x4 12. "FLAG12,Port B Interrupt Flag 12" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x4 11. "FLAG11,Port B Interrupt Flag 11" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0x4 10. "FLAG10,Port B Interrupt Flag 10" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x4 9. "FLAG9,Port B Interrupt Flag 9" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0x4 8. "FLAG8,Port B Interrupt Flag 8" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x4 7. "FLAG7,Port B Interrupt Flag 7" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0x4 6. "FLAG6,Port B Interrupt Flag 6" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x4 5. "FLAG5,Port B Interrupt Flag 5" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0x4 4. "FLAG4,Port B Interrupt Flag 4" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x4 3. "FLAG3,Port B Interrupt Flag 3" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0x4 2. "FLAG2,Port B Interrupt Flag 2" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x4 1. "FLAG1,Port B Interrupt Flag 1" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0x4 0. "FLAG0,Port B Interrupt Flag 0" "0: No request occurred.,1: Request occurred."
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line.long 0x8 "PCFLAG,Port C Interrupt Flag Register"
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bitfld.long 0x8 11. "FLAG11,Port C Interrupt Flag 11" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x8 10. "FLAG10,Port C Interrupt Flag 10" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0x8 9. "FLAG9,Port C Interrupt Flag 9" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x8 8. "FLAG8,Port C Interrupt Flag 8" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0x8 7. "FLAG7,Port C Interrupt Flag 7" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x8 6. "FLAG6,Port C Interrupt Flag 6" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0x8 5. "FLAG5,Port C Interrupt Flag 5" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x8 4. "FLAG4,Port C Interrupt Flag 4" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0x8 3. "FLAG3,Port C Interrupt Flag 3" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x8 2. "FLAG2,Port C Interrupt Flag 2" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0x8 1. "FLAG1,Port C Interrupt Flag 1" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x8 0. "FLAG0,Port C Interrupt Flag 0" "0: No request occurred.,1: Request occurred."
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line.long 0xC "PDFLAG,Port D Interrupt Flag Register"
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bitfld.long 0xC 7. "FLAG7,Port D Interrupt Flag 7" "0: No request occurred.,1: Request occurred."
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bitfld.long 0xC 6. "FLAG6,Port D Interrupt Flag 6" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0xC 5. "FLAG5,Port D Interrupt Flag 5" "0: No request occurred.,1: Request occurred."
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bitfld.long 0xC 4. "FLAG4,Port D Interrupt Flag 4" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0xC 3. "FLAG3,Port D Interrupt Flag 3" "0: No request occurred.,1: Request occurred."
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bitfld.long 0xC 2. "FLAG2,Port D Interrupt Flag 2" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0xC 1. "FLAG1,Port D Interrupt Flag 1" "0: No request occurred.,1: Request occurred."
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bitfld.long 0xC 0. "FLAG0,Port D Interrupt Flag 0" "0: No request occurred.,1: Request occurred."
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line.long 0x10 "PEFLAG,Port E Interrupt Flag Register"
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bitfld.long 0x10 4. "FLAG4,Port E Interrupt Flag 4" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x10 3. "FLAG3,Port E Interrupt Flag 3" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0x10 2. "FLAG2,Port E Interrupt Flag 2" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x10 1. "FLAG1,Port E Interrupt Flag 1" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0x10 0. "FLAG0,Port E Interrupt Flag 0" "0: No request occurred.,1: Request occurred."
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line.long 0x14 "PFFLAG,Port F Interrupt Flag Register"
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bitfld.long 0x14 3. "FLAG3,Port F Interrupt Flag 3" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x14 2. "FLAG2,Port F Interrupt Flag 2" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0x14 1. "FLAG1,Port F Interrupt Flag 1" "0: No request occurred.,1: Request occurred."
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bitfld.long 0x14 0. "FLAG0,Port F Interrupt Flag 0" "0: No request occurred.,1: Request occurred."
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group.long 0x300++0x1F
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line.long 0x0 "EINT0CONF1,External Interrupt 0 Configuration Register 1"
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hexmask.long.byte 0x0 28.--31. 1. "CONF7,External Interrupt 0 Configuration 7"
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hexmask.long.byte 0x0 24.--27. 1. "CONF6,External Interrupt 0 Configuration 6"
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hexmask.long.byte 0x0 20.--23. 1. "CONF5,External Interrupt 0 Configuration 5"
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hexmask.long.byte 0x0 16.--19. 1. "CONF4,External Interrupt 0 Configuration 4"
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newline
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hexmask.long.byte 0x0 12.--15. 1. "CONF3,External Interrupt 0 Configuration 3"
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hexmask.long.byte 0x0 8.--11. 1. "CONF2,External Interrupt 0 Configuration 2"
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newline
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hexmask.long.byte 0x0 4.--7. 1. "CONF1,External Interrupt 0 Configuration 1"
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hexmask.long.byte 0x0 0.--3. 1. "CONF0,External Interrupt 0 Configuration 0"
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line.long 0x4 "EINT1CONF1,External Interrupt 1 Configuration Register 1"
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hexmask.long.byte 0x4 28.--31. 1. "CONF7,External Interrupt 1 Configuration 7"
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hexmask.long.byte 0x4 24.--27. 1. "CONF6,External Interrupt 1 Configuration 6"
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newline
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hexmask.long.byte 0x4 20.--23. 1. "CONF5,External Interrupt 1 Configuration 5"
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hexmask.long.byte 0x4 16.--19. 1. "CONF4,External Interrupt 1 Configuration 4"
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newline
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hexmask.long.byte 0x4 12.--15. 1. "CONF3,External Interrupt 1 Configuration 3"
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hexmask.long.byte 0x4 8.--11. 1. "CONF2,External Interrupt 1 Configuration 2"
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newline
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hexmask.long.byte 0x4 4.--7. 1. "CONF1,External Interrupt 1 Configuration 1"
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hexmask.long.byte 0x4 0.--3. 1. "CONF0,External Interrupt 1 Configuration 0"
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line.long 0x8 "EINT2CONF1,External Interrupt 2 Configuration Register 1"
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hexmask.long.byte 0x8 28.--31. 1. "CONF7,External Interrupt 2 Configuration 7"
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hexmask.long.byte 0x8 24.--27. 1. "CONF6,External Interrupt 2 Configuration 6"
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newline
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hexmask.long.byte 0x8 20.--23. 1. "CONF5,External Interrupt 2 Configuration 5"
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hexmask.long.byte 0x8 16.--19. 1. "CONF4,External Interrupt 2 Configuration 4"
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newline
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hexmask.long.byte 0x8 12.--15. 1. "CONF3,External Interrupt 2 Configuration 3"
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hexmask.long.byte 0x8 8.--11. 1. "CONF2,External Interrupt 2 Configuration 2"
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newline
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hexmask.long.byte 0x8 4.--7. 1. "CONF1,External Interrupt 2 Configuration 1"
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hexmask.long.byte 0x8 0.--3. 1. "CONF0,External Interrupt 2 Configuration 0"
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line.long 0xC "EINT3CONF1,External Interrupt 3 Configuration Register 1"
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hexmask.long.byte 0xC 28.--31. 1. "CONF7,External Interrupt 3 Configuration 7"
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hexmask.long.byte 0xC 24.--27. 1. "CONF6,External Interrupt 3 Configuration 6"
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newline
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hexmask.long.byte 0xC 20.--23. 1. "CONF5,External Interrupt 3 Configuration 5"
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hexmask.long.byte 0xC 16.--19. 1. "CONF4,External Interrupt 3 Configuration 4"
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newline
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hexmask.long.byte 0xC 12.--15. 1. "CONF3,External Interrupt 3 Configuration 3"
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hexmask.long.byte 0xC 8.--11. 1. "CONF2,External Interrupt 3 Configuration 2"
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newline
|
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hexmask.long.byte 0xC 4.--7. 1. "CONF1,External Interrupt 3 Configuration 1"
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hexmask.long.byte 0xC 0.--3. 1. "CONF0,External Interrupt 3 Configuration 0"
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line.long 0x10 "EINT0CONF2,External Interrupt 0 Configuration Register 2"
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hexmask.long.byte 0x10 16.--19. 1. "CONF12,External Interrupt 0 Configuration 12"
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hexmask.long.byte 0x10 12.--15. 1. "CONF11,External Interrupt 0 Configuration 11"
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newline
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hexmask.long.byte 0x10 8.--11. 1. "CONF10,External Interrupt 0 Configuration 10"
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hexmask.long.byte 0x10 4.--7. 1. "CONF9,External Interrupt 0 Configuration 9"
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newline
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hexmask.long.byte 0x10 0.--3. 1. "CONF8,External Interrupt 0 Configuration 8"
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line.long 0x14 "EINT1CONF2,External Interrupt 1 Configuration Register 2"
|
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hexmask.long.byte 0x14 16.--19. 1. "CONF12,External Interrupt 1 Configuration 12"
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hexmask.long.byte 0x14 12.--15. 1. "CONF11,External Interrupt 1 Configuration 11"
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newline
|
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hexmask.long.byte 0x14 8.--11. 1. "CONF10,External Interrupt 1 Configuration 10"
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hexmask.long.byte 0x14 4.--7. 1. "CONF9,External Interrupt 1 Configuration 9"
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newline
|
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hexmask.long.byte 0x14 0.--3. 1. "CONF8,External Interrupt 1 Configuration 8"
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line.long 0x18 "EINT2CONF2,External Interrupt 2 Configuration Register 2"
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hexmask.long.byte 0x18 16.--19. 1. "CONF12,External Interrupt 2 Configuration 12"
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hexmask.long.byte 0x18 12.--15. 1. "CONF11,External Interrupt 2 Configuration 11"
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newline
|
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hexmask.long.byte 0x18 8.--11. 1. "CONF10,External Interrupt 2 Configuration 10"
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hexmask.long.byte 0x18 4.--7. 1. "CONF9,External Interrupt 2 Configuration 9"
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newline
|
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hexmask.long.byte 0x18 0.--3. 1. "CONF8,External Interrupt 2 Configuration 8"
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line.long 0x1C "EINT3CONF2,External Interrupt 3 Configuration Register 2"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "CONF12,External Interrupt 3 Configuration 12"
|
|
hexmask.long.byte 0x1C 12.--15. 1. "CONF11,External Interrupt 3 Configuration 11"
|
|
newline
|
|
hexmask.long.byte 0x1C 8.--11. 1. "CONF10,External Interrupt 3 Configuration 10"
|
|
hexmask.long.byte 0x1C 4.--7. 1. "CONF9,External Interrupt 3 Configuration 9"
|
|
newline
|
|
hexmask.long.byte 0x1C 0.--3. 1. "CONF8,External Interrupt 3 Configuration 8"
|
|
group.long 0x400++0x3
|
|
line.long 0x0 "MSK,Interrupt Source Mask Register"
|
|
bitfld.long 0x0 31. "IMSK31_DMAC4,Interrupt Source Mask 31 (DMAC4)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
bitfld.long 0x0 30. "IMSK30_DMAC3,Interrupt Source Mask 30 (DMAC3)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
newline
|
|
bitfld.long 0x0 29. "IMSK29_DMAC2,Interrupt Source Mask 29 (DMAC2)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
bitfld.long 0x0 28. "IMSK28_RTCC,Interrupt Source Mask 28 (RTCC)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
newline
|
|
bitfld.long 0x0 27. "IMSK27_NULL,Interrupt Source Mask 27 (RSVD)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
bitfld.long 0x0 26. "IMSK26_NULL,Interrupt Source Mask 26 (RSVD)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
newline
|
|
bitfld.long 0x0 25. "IMSK25_LPUART,Interrupt Source Mask 25 (LPUART)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
bitfld.long 0x0 24. "IMSK24_DMAC1,Interrupt Source Mask 24 (DMAC1)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
newline
|
|
bitfld.long 0x0 23. "IMSK23_DMAC0,Interrupt Source Mask 23 (DMAC0)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
bitfld.long 0x0 22. "IMSK22_CMPn,Interrupt Source Mask 22 (CMP)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
newline
|
|
bitfld.long 0x0 21. "IMSK21_TIMER43,Interrupt Source Mask 21 (TIMER43)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
bitfld.long 0x0 20. "IMSK20_UART1,Interrupt Source Mask 20 (UART1)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
newline
|
|
bitfld.long 0x0 19. "IMSK19_UART0,Interrupt Source Mask 19 (UART0)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
bitfld.long 0x0 18. "IMSK18_ADC,Interrupt Source Mask 18 (ADC)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
newline
|
|
bitfld.long 0x0 17. "IMSK17_SC1,Interrupt Source Mask 17 (SC1)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
bitfld.long 0x0 16. "IMSK16_SC0,Interrupt Source Mask 16 (SC0)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
newline
|
|
bitfld.long 0x0 15. "IMSK15_TIMER50,Interrupt Source Mask 15 (TIMER50)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
bitfld.long 0x0 14. "IMSK14_I2C1,Interrupt Source Mask 14 (I2C1)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
newline
|
|
bitfld.long 0x0 13. "IMSK13_SPI1,Interrupt Source Mask 13 (SPI1)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
bitfld.long 0x0 12. "IMSK12_SPI0,Interrupt Source Mask 12 (SPI0)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
newline
|
|
bitfld.long 0x0 11. "IMSK11_USART10,Interrupt Source Mask 11 (USART10)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
bitfld.long 0x0 10. "IMSK10_I2C0,Interrupt Source Mask 10 (I2C0)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
newline
|
|
bitfld.long 0x0 9. "IMSK9_TIMER42,Interrupt Source Mask 9 (TIMER42)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
bitfld.long 0x0 8. "IMSK8_TIMER41,Interrupt Source Mask 8 (TIMER41)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
newline
|
|
bitfld.long 0x0 7. "IMSK7_TIMER40,Interrupt Source Mask 7 (TIMER40)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
bitfld.long 0x0 6. "IMSK6_EINT3,Interrupt Source Mask 6 (EINT3)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
newline
|
|
bitfld.long 0x0 5. "IMSK5_EINT2,Interrupt Source Mask 5 (EINT2)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
bitfld.long 0x0 4. "IMSK4_EINT1,Interrupt Source Mask 4 (EINT1)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
newline
|
|
bitfld.long 0x0 3. "IMSK3_EINT0,Interrupt Source Mask 3 (EINT0)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
bitfld.long 0x0 2. "IMSK2_WDT,Interrupt Source Mask 2 (WDT)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
newline
|
|
bitfld.long 0x0 1. "IMSK1_WUT,Interrupt Source Mask 1 (WUT)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
bitfld.long 0x0 0. "IMSK0_LVI,Interrupt Source Mask 0 (LVI)" "0: Mask Interrupt Source,1: Unmask Interrupt Source"
|
|
tree.end
|
|
tree "LCD (LCD Driver)"
|
|
base ad:0x40005000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CR,LCD Driver Control Register"
|
|
bitfld.long 0x0 6.--7. "IRSEL,Internal LCD Bias Dividing Resistor Selection" "0: 105/105/80[kohm] @(1/2)/(1/3)/(1/4) bias,1: 10/10/10[kohm] @(1/2)/(1/3)/(1/4) bias,2: 66/66/50[kohm] @(1/2)/(1/3)/(1/4) bias,3: 320/320/240[kohm] @(1/2)/(1/3)/(1/4) bias"
|
|
bitfld.long 0x0 3.--5. "DBS,LCD Duty and Bias Selection" "0: 1/8 duty 1/4 bias,1: 1/6 duty 1/4 bias,2: 1/5 duty 1/3 bias,3: 1/4 duty 1/3 bias,4: 1/3 duty 1/3 bias,5: 1/3 duty 1/2 bias,?,?"
|
|
bitfld.long 0x0 1.--2. "LCLK,LCD Clock Selection (When fLCD = 32.768kHz)" "0: 32.768kHz(fLCD) / 256,1: 32.768kHz(fLCD) / 128,2: 32.768kHz(fLCD) / 64,3: 32.768kHz(fLCD) / 32"
|
|
newline
|
|
bitfld.long 0x0 0. "DISP,LCD Display Control" "0: Display off,1: Normal display on"
|
|
line.long 0x4 "BCCR,LCD Automatic Bias and Contrast Control Register"
|
|
bitfld.long 0x4 12. "LCDABC,LCD Automatic Bias Control" "0: LCD automatic bias is off,1: LCD automatic bias is on"
|
|
bitfld.long 0x4 8.--10. "BMSEL,'Bias Mode A' Time Selection" "0: 'Bias Mode A' for 1-clock of fLCD,1: 'Bias Mode A' for 2-clock of fLCD,2: 'Bias Mode A' for 3-clock of fLCD,3: 'Bias Mode A' for 4-clock of fLCD,4: 'Bias Mode A' for 5-clock of fLCD,5: 'Bias Mode A' for 6-clock of fLCD,6: 'Bias Mode A' for 7-clock of fLCD,7: 'Bias Mode A' for 8-clock of fLCD"
|
|
bitfld.long 0x4 5. "LCTEN,LCD Driver Contrast Control" "0: Disable LCD driver contrast.,1: Enable LCD driver contrast."
|
|
newline
|
|
hexmask.long.byte 0x4 0.--3. 1. "VLCD,VLC0 Voltage Control when the contrast is enabled"
|
|
group.byte 0x10++0x20
|
|
line.byte 0x0 "DR0,LCD Display Data Register 0"
|
|
line.byte 0x1 "DR1,LCD Display Data Register 1"
|
|
line.byte 0x2 "DR2,LCD Display Data Register 2"
|
|
line.byte 0x3 "DR3,LCD Display Data Register 3"
|
|
line.byte 0x4 "DR4,LCD Display Data Register 4"
|
|
line.byte 0x5 "DR5,LCD Display Data Register 5"
|
|
line.byte 0x6 "DR6,LCD Display Data Register 6"
|
|
line.byte 0x7 "DR7,LCD Display Data Register 7"
|
|
line.byte 0x8 "DR8,LCD Display Data Register 8"
|
|
line.byte 0x9 "DR9,LCD Display Data Register 9"
|
|
line.byte 0xA "DR10,LCD Display Data Register 10"
|
|
line.byte 0xB "DR11,LCD Display Data Register 11"
|
|
line.byte 0xC "DR12,LCD Display Data Register 12"
|
|
line.byte 0xD "DR13,LCD Display Data Register 13"
|
|
line.byte 0xE "DR14,LCD Display Data Register 14"
|
|
line.byte 0xF "DR15,LCD Display Data Register 15"
|
|
line.byte 0x10 "DR16,LCD Display Data Register 16"
|
|
line.byte 0x11 "DR17,LCD Display Data Register 17"
|
|
line.byte 0x12 "DR18,LCD Display Data Register 18"
|
|
line.byte 0x13 "DR19,LCD Display Data Register 19"
|
|
line.byte 0x14 "DR20,LCD Display Data Register 20"
|
|
line.byte 0x15 "DR21,LCD Display Data Register 21"
|
|
line.byte 0x16 "DR22,LCD Display Data Register 22"
|
|
line.byte 0x17 "DR23,LCD Display Data Register 23"
|
|
line.byte 0x18 "DR24,LCD Display Data Register 24"
|
|
line.byte 0x19 "DR25,LCD Display Data Register 25"
|
|
line.byte 0x1A "DR26,LCD Display Data Register 26"
|
|
line.byte 0x1B "DR27,LCD Display Data Register 27"
|
|
line.byte 0x1C "DR28,LCD Display Data Register 28"
|
|
line.byte 0x1D "DR29,LCD Display Data Register 29"
|
|
line.byte 0x1E "DR30,LCD Display Data Register 30"
|
|
line.byte 0x1F "DR31,LCD Display Data Register 31"
|
|
line.byte 0x20 "DR32,LCD Display Data Register 32"
|
|
tree.end
|
|
tree "PCU&GPIO (Port Control Unit and General Purpose I/O)"
|
|
base ad:0x0
|
|
tree "PA"
|
|
base ad:0x30000000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "MOD,Port n Mode Register"
|
|
bitfld.long 0x0 24.--25. "MODE12,Port n Mode Selection 12" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 22.--23. "MODE11,Port n Mode Selection 11" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "MODE10,Port n Mode Selection 10" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 18.--19. "MODE9,Port n Mode Selection 9" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "MODE8,Port n Mode Selection 8" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 14.--15. "MODE7,Port n Mode Selection 7" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "MODE6,Port n Mode Selection 6" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 10.--11. "MODE5,Port n Mode Selection 5" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "MODE4,Port n Mode Selection 4" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 6.--7. "MODE3,Port n Mode Selection 3" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "MODE2,Port n Mode Selection 2" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 2.--3. "MODE1,Port n Mode Selection 1" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MODE0,Port n Mode Selection 0" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
line.long 0x4 "TYP,Port n Output Type Selection Register"
|
|
bitfld.long 0x4 12. "TYP12,Port n Output Type Selection 12" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 11. "TYP11,Port n Output Type Selection 11" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 10. "TYP10,Port n Output Type Selection 10" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 9. "TYP9,Port n Output Type Selection 9" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 8. "TYP8,Port n Output Type Selection 8" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 7. "TYP7,Port n Output Type Selection 7" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 6. "TYP6,Port n Output Type Selection 6" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 5. "TYP5,Port n Output Type Selection 5" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TYP4,Port n Output Type Selection 4" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 3. "TYP3,Port n Output Type Selection 3" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 2. "TYP2,Port n Output Type Selection 2" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 1. "TYP1,Port n Output Type Selection 1" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 0. "TYP0,Port n Output Type Selection 0" "0: Push-Pull Output,1: Open-Drain Output"
|
|
line.long 0x8 "AFSR1,Port n Alternative Function Selection Register 1"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AFSR7,Port n Alternative Function Selection 7"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AFSR6,Port n Alternative Function Selection 6"
|
|
newline
|
|
hexmask.long.byte 0x8 20.--23. 1. "AFSR5,Port n Alternative Function Selection 5"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AFSR4,Port n Alternative Function Selection 4"
|
|
newline
|
|
hexmask.long.byte 0x8 12.--15. 1. "AFSR3,Port n Alternative Function Selection 3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AFSR2,Port n Alternative Function Selection 2"
|
|
newline
|
|
hexmask.long.byte 0x8 4.--7. 1. "AFSR1,Port n Alternative Function Selection 1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AFSR0,Port n Alternative Function Selection 0"
|
|
line.long 0xC "AFSR2,Port n Alternative Function Selection Register 2"
|
|
hexmask.long.byte 0xC 16.--19. 1. "AFSR12,Port n Alternative Function Selection 12"
|
|
hexmask.long.byte 0xC 12.--15. 1. "AFSR11,Port n Alternative Function Selection 11"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--11. 1. "AFSR10,Port n Alternative Function Selection 10"
|
|
hexmask.long.byte 0xC 4.--7. 1. "AFSR9,Port n Alternative Function Selection 9"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--3. 1. "AFSR8,Port n Alternative Function Selection 8"
|
|
line.long 0x10 "PUPD,Port n Pull-Up/Down Resistor Selection Register"
|
|
bitfld.long 0x10 24.--25. "PUPD12,Port n Pull-Up/Down Resistor Selection 12" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 22.--23. "PUPD11,Port n Pull-Up/Down Resistor Selection 11" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 20.--21. "PUPD10,Port n Pull-Up/Down Resistor Selection 10" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 18.--19. "PUPD9,Port n Pull-Up/Down Resistor Selection 9" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "PUPD8,Port n Pull-Up/Down Resistor Selection 8" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 14.--15. "PUPD7,Port n Pull-Up/Down Resistor Selection 7" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 12.--13. "PUPD6,Port n Pull-Up/Down Resistor Selection 6" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 10.--11. "PUPD5,Port n Pull-Up/Down Resistor Selection 5" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 8.--9. "PUPD4,Port n Pull-Up/Down Resistor Selection 4" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 6.--7. "PUPD3,Port n Pull-Up/Down Resistor Selection 3" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 4.--5. "PUPD2,Port n Pull-Up/Down Resistor Selection 2" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 2.--3. "PUPD1,Port n Pull-Up/Down Resistor Selection 1" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 0.--1. "PUPD0,Port n Pull-Up/Down Resistor Selection 0" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "INDR,Port n Input Data Register"
|
|
bitfld.long 0x0 12. "INDR12,Port n Input Data 12" "0,1"
|
|
bitfld.long 0x0 11. "INDR11,Port n Input Data 11" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "INDR10,Port n Input Data 10" "0,1"
|
|
bitfld.long 0x0 9. "INDR9,Port n Input Data 9" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "INDR8,Port n Input Data 8" "0,1"
|
|
bitfld.long 0x0 7. "INDR7,Port n Input Data 7" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "INDR6,Port n Input Data 6" "0,1"
|
|
bitfld.long 0x0 5. "INDR5,Port n Input Data 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "INDR4,Port n Input Data 4" "0,1"
|
|
bitfld.long 0x0 3. "INDR3,Port n Input Data 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "INDR2,Port n Input Data 2" "0,1"
|
|
bitfld.long 0x0 1. "INDR1,Port n Input Data 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "INDR0,Port n Input Data 0" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "OUTDR,Port n Output Data Register"
|
|
bitfld.long 0x0 12. "OUTDR12,Port n Output Data 12" "0,1"
|
|
bitfld.long 0x0 11. "OUTDR11,Port n Output Data 11" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OUTDR10,Port n Output Data 10" "0,1"
|
|
bitfld.long 0x0 9. "OUTDR9,Port n Output Data 9" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OUTDR8,Port n Output Data 8" "0,1"
|
|
bitfld.long 0x0 7. "OUTDR7,Port n Output Data 7" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "OUTDR6,Port n Output Data 6" "0,1"
|
|
bitfld.long 0x0 5. "OUTDR5,Port n Output Data 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "OUTDR4,Port n Output Data 4" "0,1"
|
|
bitfld.long 0x0 3. "OUTDR3,Port n Output Data 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "OUTDR2,Port n Output Data 2" "0,1"
|
|
bitfld.long 0x0 1. "OUTDR1,Port n Output Data 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OUTDR0,Port n Output Data 0" "0,1"
|
|
wgroup.long 0x1C++0x7
|
|
line.long 0x0 "BSR,Port n Output Bit Set Register"
|
|
bitfld.long 0x0 12. "BSR12,Port n Output Bit Set 12" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 11. "BSR11,Port n Output Bit Set 11" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 10. "BSR10,Port n Output Bit Set 10" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 9. "BSR9,Port n Output Bit Set 9" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 8. "BSR8,Port n Output Bit Set 8" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 7. "BSR7,Port n Output Bit Set 7" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 6. "BSR6,Port n Output Bit Set 6" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 5. "BSR5,Port n Output Bit Set 5" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
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bitfld.long 0x0 4. "BSR4,Port n Output Bit Set 4" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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|
bitfld.long 0x0 3. "BSR3,Port n Output Bit Set 3" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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|
newline
|
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bitfld.long 0x0 2. "BSR2,Port n Output Bit Set 2" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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|
bitfld.long 0x0 1. "BSR1,Port n Output Bit Set 1" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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|
newline
|
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bitfld.long 0x0 0. "BSR0,Port n Output Bit Set 0" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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|
line.long 0x4 "BCR,Port n Output Bit Clear Register"
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|
bitfld.long 0x4 12. "BCR12,Port n Output Bit Clear 12" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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bitfld.long 0x4 11. "BCR11,Port n Output Bit Clear 11" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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|
newline
|
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bitfld.long 0x4 10. "BCR10,Port n Output Bit Clear 10" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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|
bitfld.long 0x4 9. "BCR9,Port n Output Bit Clear 9" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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|
newline
|
|
bitfld.long 0x4 8. "BCR8,Port n Output Bit Clear 8" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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|
bitfld.long 0x4 7. "BCR7,Port n Output Bit Clear 7" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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|
newline
|
|
bitfld.long 0x4 6. "BCR6,Port n Output Bit Clear 6" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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|
bitfld.long 0x4 5. "BCR5,Port n Output Bit Clear 5" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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|
newline
|
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bitfld.long 0x4 4. "BCR4,Port n Output Bit Clear 4" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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bitfld.long 0x4 3. "BCR3,Port n Output Bit Clear 3" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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newline
|
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bitfld.long 0x4 2. "BCR2,Port n Output Bit Clear 2" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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bitfld.long 0x4 1. "BCR1,Port n Output Bit Clear 1" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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newline
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bitfld.long 0x4 0. "BCR0,Port n Output Bit Clear 0" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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|
group.long 0x24++0x7
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line.long 0x0 "OUTDMSK,Port n Output Data Mask Register"
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bitfld.long 0x0 12. "OUTDMSK12,Port n Output Data Mask 12" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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bitfld.long 0x0 11. "OUTDMSK11,Port n Output Data Mask 11" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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newline
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bitfld.long 0x0 10. "OUTDMSK10,Port n Output Data Mask 10" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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bitfld.long 0x0 9. "OUTDMSK9,Port n Output Data Mask 9" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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|
newline
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bitfld.long 0x0 8. "OUTDMSK8,Port n Output Data Mask 8" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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bitfld.long 0x0 7. "OUTDMSK7,Port n Output Data Mask 7" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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newline
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bitfld.long 0x0 6. "OUTDMSK6,Port n Output Data Mask 6" "0,1"
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bitfld.long 0x0 5. "OUTDMSK5,Port n Output Data Mask 5" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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newline
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bitfld.long 0x0 4. "OUTDMSK4,Port n Output Data Mask 4" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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bitfld.long 0x0 3. "OUTDMSK3,Port n Output Data Mask 3" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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newline
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bitfld.long 0x0 2. "OUTDMSK2,Port n Output Data Mask 2" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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bitfld.long 0x0 1. "OUTDMSK1,Port n Output Data Mask 1" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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newline
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bitfld.long 0x0 0. "OUTDMSK0,Port n Output Data Mask 0" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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line.long 0x4 "DBCR,Port n Debounce Control Register"
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bitfld.long 0x4 16.--18. "DBCLK,Port n Debounce Filter Sampling Clock Selection" "0: HCLK/1,1: HCLK/4,2: HCLK/16,3: HCLK/64,4: HCLK/256,5: HCLK/1024,?,?"
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bitfld.long 0x4 12. "DBEN12,Port n Debounce Enable 12" "0: Disable debounce filter.,1: Enable debounce filter."
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newline
|
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bitfld.long 0x4 11. "DBEN11,Port n Debounce Enable 11" "0: Disable debounce filter.,1: Enable debounce filter."
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bitfld.long 0x4 10. "DBEN10,Port n Debounce Enable 10" "0: Disable debounce filter.,1: Enable debounce filter."
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|
newline
|
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bitfld.long 0x4 9. "DBEN9,Port n Debounce Enable 9" "0: Disable debounce filter.,1: Enable debounce filter."
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bitfld.long 0x4 8. "DBEN8,Port n Debounce Enable 8" "0: Disable debounce filter.,1: Enable debounce filter."
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newline
|
|
bitfld.long 0x4 7. "DBEN7,Port n Debounce Enable 7" "0: Disable debounce filter.,1: Enable debounce filter."
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|
bitfld.long 0x4 6. "DBEN6,Port n Debounce Enable 6" "0: Disable debounce filter.,1: Enable debounce filter."
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newline
|
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bitfld.long 0x4 5. "DBEN5,Port n Debounce Enable 5" "0: Disable debounce filter.,1: Enable debounce filter."
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bitfld.long 0x4 4. "DBEN4,Port n Debounce Enable 4" "0: Disable debounce filter.,1: Enable debounce filter."
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newline
|
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bitfld.long 0x4 3. "DBEN3,Port n Debounce Enable 3" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 2. "DBEN2,Port n Debounce Enable 2" "0: Disable debounce filter.,1: Enable debounce filter."
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|
newline
|
|
bitfld.long 0x4 1. "DBEN1,Port n Debounce Enable 1" "0: Disable debounce filter.,1: Enable debounce filter."
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|
bitfld.long 0x4 0. "DBEN0,Port n Debounce Enable 0" "0: Disable debounce filter.,1: Enable debounce filter."
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|
group.long 0x0++0x13
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line.long 0x0 "PA_MOD,Port n Mode Register"
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bitfld.long 0x0 18.--19. "MODE9,Port n Mode Selection 9" "0,1,2,3"
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bitfld.long 0x0 16.--17. "MODE8,Port n Mode Selection 8" "0,1,2,3"
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newline
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bitfld.long 0x0 14.--15. "MODE7,Port n Mode Selection 7" "0,1,2,3"
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|
bitfld.long 0x0 12.--13. "MODE6,Port n Mode Selection 6" "0,1,2,3"
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|
newline
|
|
bitfld.long 0x0 10.--11. "MODE5,Port n Mode Selection 5" "0,1,2,3"
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|
bitfld.long 0x0 8.--9. "MODE4,Port n Mode Selection 4" "0,1,2,3"
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|
newline
|
|
bitfld.long 0x0 6.--7. "MODE3,Port n Mode Selection 3" "0,1,2,3"
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|
bitfld.long 0x0 4.--5. "MODE2,Port n Mode Selection 2" "0,1,2,3"
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|
newline
|
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bitfld.long 0x0 2.--3. "MODE1,Port n Mode Selection 1" "0,1,2,3"
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|
bitfld.long 0x0 0.--1. "MODE0,Port n Mode Selection 0" "0,1,2,3"
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|
line.long 0x4 "PA_TYP,Port n Output Type Selection Register"
|
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bitfld.long 0x4 9. "TYP9,Port n Output Type Selection 9" "0,1"
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bitfld.long 0x4 8. "TYP8,Port n Output Type Selection 8" "0,1"
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newline
|
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bitfld.long 0x4 7. "TYP7,Port n Output Type Selection 7" "0,1"
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|
bitfld.long 0x4 6. "TYP6,Port n Output Type Selection 6" "0,1"
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newline
|
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bitfld.long 0x4 5. "TYP5,Port n Output Type Selection 5" "0,1"
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|
bitfld.long 0x4 4. "TYP4,Port n Output Type Selection 4" "0,1"
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|
newline
|
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bitfld.long 0x4 3. "TYP3,Port n Output Type Selection 3" "0,1"
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bitfld.long 0x4 2. "TYP2,Port n Output Type Selection 2" "0,1"
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newline
|
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bitfld.long 0x4 1. "TYP1,Port n Output Type Selection 1" "0,1"
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bitfld.long 0x4 0. "TYP0,Port n Output Type Selection 0" "0,1"
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line.long 0x8 "PA_AFSR1,Port n Alternative Function Selection Register 1"
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hexmask.long.byte 0x8 28.--31. 1. "AFSR7,Port n Alternative Function Selection 7"
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hexmask.long.byte 0x8 24.--27. 1. "AFSR6,Port n Alternative Function Selection 6"
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newline
|
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hexmask.long.byte 0x8 20.--23. 1. "AFSR5,Port n Alternative Function Selection 5"
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hexmask.long.byte 0x8 16.--19. 1. "AFSR4,Port n Alternative Function Selection 4"
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newline
|
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hexmask.long.byte 0x8 12.--15. 1. "AFSR3,Port n Alternative Function Selection 3"
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hexmask.long.byte 0x8 8.--11. 1. "AFSR2,Port n Alternative Function Selection 2"
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newline
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hexmask.long.byte 0x8 4.--7. 1. "AFSR1,Port n Alternative Function Selection 1"
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hexmask.long.byte 0x8 0.--3. 1. "AFSR0,Port n Alternative Function Selection 0"
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line.long 0xC "PA_AFSR2,Port n Alternative Function Selection Register 2"
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hexmask.long.byte 0xC 4.--7. 1. "AFSR9,Port n Alternative Function Selection 9"
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hexmask.long.byte 0xC 0.--3. 1. "AFSR8,Port n Alternative Function Selection 8"
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line.long 0x10 "PA_PUPD,Port n Pull-Up/Down Resistor Selection Register"
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bitfld.long 0x10 18.--19. "PUPD9,Port n Pull-Up/Down Resistor Selection 9" "0,1,2,3"
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bitfld.long 0x10 16.--17. "PUPD8,Port n Pull-Up/Down Resistor Selection 8" "0,1,2,3"
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newline
|
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bitfld.long 0x10 14.--15. "PUPD7,Port n Pull-Up/Down Resistor Selection 7" "0,1,2,3"
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bitfld.long 0x10 12.--13. "PUPD6,Port n Pull-Up/Down Resistor Selection 6" "0,1,2,3"
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newline
|
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bitfld.long 0x10 10.--11. "PUPD5,Port n Pull-Up/Down Resistor Selection 5" "0,1,2,3"
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bitfld.long 0x10 8.--9. "PUPD4,Port n Pull-Up/Down Resistor Selection 4" "0,1,2,3"
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newline
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bitfld.long 0x10 6.--7. "PUPD3,Port n Pull-Up/Down Resistor Selection 3" "0,1,2,3"
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bitfld.long 0x10 4.--5. "PUPD2,Port n Pull-Up/Down Resistor Selection 2" "0,1,2,3"
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newline
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bitfld.long 0x10 2.--3. "PUPD1,Port n Pull-Up/Down Resistor Selection 1" "0,1,2,3"
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bitfld.long 0x10 0.--1. "PUPD0,Port n Pull-Up/Down Resistor Selection 0" "0,1,2,3"
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rgroup.long 0x14++0x3
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line.long 0x0 "PA_INDR,Port n Input Data Register"
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bitfld.long 0x0 9. "INDR9,Port n Input Data 9" "0,1"
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bitfld.long 0x0 8. "INDR8,Port n Input Data 8" "0,1"
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newline
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bitfld.long 0x0 7. "INDR7,Port n Input Data 7" "0,1"
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bitfld.long 0x0 6. "INDR6,Port n Input Data 6" "0,1"
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newline
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bitfld.long 0x0 5. "INDR5,Port n Input Data 5" "0,1"
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bitfld.long 0x0 4. "INDR4,Port n Input Data 4" "0,1"
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newline
|
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bitfld.long 0x0 3. "INDR3,Port n Input Data 3" "0,1"
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bitfld.long 0x0 2. "INDR2,Port n Input Data 2" "0,1"
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newline
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bitfld.long 0x0 1. "INDR1,Port n Input Data 1" "0,1"
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bitfld.long 0x0 0. "INDR0,Port n Input Data 0" "0,1"
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group.long 0x18++0x3
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line.long 0x0 "PA_OUTDR,Port n Output Data Register"
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bitfld.long 0x0 9. "OUTDR9,Port n Output Data 9" "0,1"
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bitfld.long 0x0 8. "OUTDR8,Port n Output Data 8" "0,1"
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newline
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bitfld.long 0x0 7. "OUTDR7,Port n Output Data 7" "0,1"
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bitfld.long 0x0 6. "OUTDR6,Port n Output Data 6" "0,1"
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newline
|
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bitfld.long 0x0 5. "OUTDR5,Port n Output Data 5" "0,1"
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bitfld.long 0x0 4. "OUTDR4,Port n Output Data 4" "0,1"
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newline
|
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bitfld.long 0x0 3. "OUTDR3,Port n Output Data 3" "0,1"
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bitfld.long 0x0 2. "OUTDR2,Port n Output Data 2" "0,1"
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newline
|
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bitfld.long 0x0 1. "OUTDR1,Port n Output Data 1" "0,1"
|
|
bitfld.long 0x0 0. "OUTDR0,Port n Output Data 0" "0,1"
|
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wgroup.long 0x1C++0x7
|
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line.long 0x0 "PA_BSR,Port n Output Bit Set Register"
|
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bitfld.long 0x0 9. "BSR9,Port n Output Bit Set 9" "0,1"
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bitfld.long 0x0 8. "BSR8,Port n Output Bit Set 8" "0,1"
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newline
|
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bitfld.long 0x0 7. "BSR7,Port n Output Bit Set 7" "0,1"
|
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bitfld.long 0x0 6. "BSR6,Port n Output Bit Set 6" "0,1"
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newline
|
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bitfld.long 0x0 5. "BSR5,Port n Output Bit Set 5" "0,1"
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bitfld.long 0x0 4. "BSR4,Port n Output Bit Set 4" "0,1"
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newline
|
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bitfld.long 0x0 3. "BSR3,Port n Output Bit Set 3" "0,1"
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bitfld.long 0x0 2. "BSR2,Port n Output Bit Set 2" "0,1"
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newline
|
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bitfld.long 0x0 1. "BSR1,Port n Output Bit Set 1" "0,1"
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bitfld.long 0x0 0. "BSR0,Port n Output Bit Set 0" "0,1"
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line.long 0x4 "PA_BCR,Port n Output Bit Clear Register"
|
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bitfld.long 0x4 9. "BCR9,Port n Output Bit Clear 9" "0,1"
|
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bitfld.long 0x4 8. "BCR8,Port n Output Bit Clear 8" "0,1"
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newline
|
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bitfld.long 0x4 7. "BCR7,Port n Output Bit Clear 7" "0,1"
|
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bitfld.long 0x4 6. "BCR6,Port n Output Bit Clear 6" "0,1"
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newline
|
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bitfld.long 0x4 5. "BCR5,Port n Output Bit Clear 5" "0,1"
|
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bitfld.long 0x4 4. "BCR4,Port n Output Bit Clear 4" "0,1"
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newline
|
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bitfld.long 0x4 3. "BCR3,Port n Output Bit Clear 3" "0,1"
|
|
bitfld.long 0x4 2. "BCR2,Port n Output Bit Clear 2" "0,1"
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|
newline
|
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bitfld.long 0x4 1. "BCR1,Port n Output Bit Clear 1" "0,1"
|
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bitfld.long 0x4 0. "BCR0,Port n Output Bit Clear 0" "0,1"
|
|
group.long 0x24++0x7
|
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line.long 0x0 "PA_OUTDMSK,Port n Output Data Mask Register"
|
|
bitfld.long 0x0 9. "OUTDMSK9,Port n Output Data Mask 9" "0,1"
|
|
bitfld.long 0x0 8. "OUTDMSK8,Port n Output Data Mask 8" "0,1"
|
|
newline
|
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bitfld.long 0x0 7. "OUTDMSK7,Port n Output Data Mask 7" "0,1"
|
|
bitfld.long 0x0 6. "OUTDMSK6,Port n Output Data Mask 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OUTDMSK5,Port n Output Data Mask 5" "0,1"
|
|
bitfld.long 0x0 4. "OUTDMSK4,Port n Output Data Mask 4" "0,1"
|
|
newline
|
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bitfld.long 0x0 3. "OUTDMSK3,Port n Output Data Mask 3" "0,1"
|
|
bitfld.long 0x0 2. "OUTDMSK2,Port n Output Data Mask 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "OUTDMSK1,Port n Output Data Mask 1" "0,1"
|
|
bitfld.long 0x0 0. "OUTDMSK0,Port n Output Data Mask 0" "0,1"
|
|
line.long 0x4 "PA_DBCR,Port n Debounce Control Register"
|
|
bitfld.long 0x4 16.--18. "DBCLK,Port n Debounce Filter Sampling Clock Selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 9. "DBEN9,Port n Debounce Enable 9" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "DBEN8,Port n Debounce Enable 8" "0,1"
|
|
bitfld.long 0x4 7. "DBEN7,Port n Debounce Enable 7" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "DBEN6,Port n Debounce Enable 6" "0,1"
|
|
bitfld.long 0x4 5. "DBEN5,Port n Debounce Enable 5" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "DBEN4,Port n Debounce Enable 4" "0,1"
|
|
bitfld.long 0x4 3. "DBEN3,Port n Debounce Enable 3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "DBEN2,Port n Debounce Enable 2" "0,1"
|
|
bitfld.long 0x4 1. "DBEN1,Port n Debounce Enable 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "DBEN0,Port n Debounce Enable 0" "0,1"
|
|
tree.end
|
|
tree "PB"
|
|
base ad:0x30000100
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "MOD,Port n Mode Register"
|
|
bitfld.long 0x0 24.--25. "MODE12,Port n Mode Selection 12" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 22.--23. "MODE11,Port n Mode Selection 11" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "MODE10,Port n Mode Selection 10" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 18.--19. "MODE9,Port n Mode Selection 9" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "MODE8,Port n Mode Selection 8" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 14.--15. "MODE7,Port n Mode Selection 7" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "MODE6,Port n Mode Selection 6" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 10.--11. "MODE5,Port n Mode Selection 5" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "MODE4,Port n Mode Selection 4" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 6.--7. "MODE3,Port n Mode Selection 3" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "MODE2,Port n Mode Selection 2" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 2.--3. "MODE1,Port n Mode Selection 1" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MODE0,Port n Mode Selection 0" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
line.long 0x4 "TYP,Port n Output Type Selection Register"
|
|
bitfld.long 0x4 12. "TYP12,Port n Output Type Selection 12" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 11. "TYP11,Port n Output Type Selection 11" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 10. "TYP10,Port n Output Type Selection 10" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 9. "TYP9,Port n Output Type Selection 9" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 8. "TYP8,Port n Output Type Selection 8" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 7. "TYP7,Port n Output Type Selection 7" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
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bitfld.long 0x4 6. "TYP6,Port n Output Type Selection 6" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 5. "TYP5,Port n Output Type Selection 5" "0,1"
|
|
newline
|
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bitfld.long 0x4 4. "TYP4,Port n Output Type Selection 4" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 3. "TYP3,Port n Output Type Selection 3" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
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bitfld.long 0x4 2. "TYP2,Port n Output Type Selection 2" "0: Push-Pull Output,1: Open-Drain Output"
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|
bitfld.long 0x4 1. "TYP1,Port n Output Type Selection 1" "0: Push-Pull Output,1: Open-Drain Output"
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|
newline
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bitfld.long 0x4 0. "TYP0,Port n Output Type Selection 0" "0: Push-Pull Output,1: Open-Drain Output"
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|
line.long 0x8 "AFSR1,Port n Alternative Function Selection Register 1"
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hexmask.long.byte 0x8 28.--31. 1. "AFSR7,Port n Alternative Function Selection 7"
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hexmask.long.byte 0x8 24.--27. 1. "AFSR6,Port n Alternative Function Selection 6"
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|
newline
|
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hexmask.long.byte 0x8 20.--23. 1. "AFSR5,Port n Alternative Function Selection 5"
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hexmask.long.byte 0x8 16.--19. 1. "AFSR4,Port n Alternative Function Selection 4"
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newline
|
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hexmask.long.byte 0x8 12.--15. 1. "AFSR3,Port n Alternative Function Selection 3"
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hexmask.long.byte 0x8 8.--11. 1. "AFSR2,Port n Alternative Function Selection 2"
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newline
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hexmask.long.byte 0x8 4.--7. 1. "AFSR1,Port n Alternative Function Selection 1"
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hexmask.long.byte 0x8 0.--3. 1. "AFSR0,Port n Alternative Function Selection 0"
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line.long 0xC "AFSR2,Port n Alternative Function Selection Register 2"
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hexmask.long.byte 0xC 16.--19. 1. "AFSR12,Port n Alternative Function Selection 12"
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hexmask.long.byte 0xC 12.--15. 1. "AFSR11,Port n Alternative Function Selection 11"
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newline
|
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hexmask.long.byte 0xC 8.--11. 1. "AFSR10,Port n Alternative Function Selection 10"
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hexmask.long.byte 0xC 4.--7. 1. "AFSR9,Port n Alternative Function Selection 9"
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newline
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hexmask.long.byte 0xC 0.--3. 1. "AFSR8,Port n Alternative Function Selection 8"
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line.long 0x10 "PUPD,Port n Pull-Up/Down Resistor Selection Register"
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bitfld.long 0x10 24.--25. "PUPD12,Port n Pull-Up/Down Resistor Selection 12" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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bitfld.long 0x10 22.--23. "PUPD11,Port n Pull-Up/Down Resistor Selection 11" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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newline
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bitfld.long 0x10 20.--21. "PUPD10,Port n Pull-Up/Down Resistor Selection 10" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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bitfld.long 0x10 18.--19. "PUPD9,Port n Pull-Up/Down Resistor Selection 9" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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newline
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bitfld.long 0x10 16.--17. "PUPD8,Port n Pull-Up/Down Resistor Selection 8" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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bitfld.long 0x10 14.--15. "PUPD7,Port n Pull-Up/Down Resistor Selection 7" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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newline
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bitfld.long 0x10 12.--13. "PUPD6,Port n Pull-Up/Down Resistor Selection 6" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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bitfld.long 0x10 10.--11. "PUPD5,Port n Pull-Up/Down Resistor Selection 5" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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newline
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bitfld.long 0x10 8.--9. "PUPD4,Port n Pull-Up/Down Resistor Selection 4" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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bitfld.long 0x10 6.--7. "PUPD3,Port n Pull-Up/Down Resistor Selection 3" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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newline
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bitfld.long 0x10 4.--5. "PUPD2,Port n Pull-Up/Down Resistor Selection 2" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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bitfld.long 0x10 2.--3. "PUPD1,Port n Pull-Up/Down Resistor Selection 1" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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newline
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bitfld.long 0x10 0.--1. "PUPD0,Port n Pull-Up/Down Resistor Selection 0" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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rgroup.long 0x14++0x3
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line.long 0x0 "INDR,Port n Input Data Register"
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bitfld.long 0x0 12. "INDR12,Port n Input Data 12" "0,1"
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bitfld.long 0x0 11. "INDR11,Port n Input Data 11" "0,1"
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newline
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bitfld.long 0x0 10. "INDR10,Port n Input Data 10" "0,1"
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bitfld.long 0x0 9. "INDR9,Port n Input Data 9" "0,1"
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newline
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bitfld.long 0x0 8. "INDR8,Port n Input Data 8" "0,1"
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bitfld.long 0x0 7. "INDR7,Port n Input Data 7" "0,1"
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newline
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bitfld.long 0x0 6. "INDR6,Port n Input Data 6" "0,1"
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bitfld.long 0x0 5. "INDR5,Port n Input Data 5" "0,1"
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newline
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bitfld.long 0x0 4. "INDR4,Port n Input Data 4" "0,1"
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bitfld.long 0x0 3. "INDR3,Port n Input Data 3" "0,1"
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newline
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bitfld.long 0x0 2. "INDR2,Port n Input Data 2" "0,1"
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bitfld.long 0x0 1. "INDR1,Port n Input Data 1" "0,1"
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newline
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bitfld.long 0x0 0. "INDR0,Port n Input Data 0" "0,1"
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group.long 0x18++0x3
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line.long 0x0 "OUTDR,Port n Output Data Register"
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bitfld.long 0x0 12. "OUTDR12,Port n Output Data 12" "0,1"
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bitfld.long 0x0 11. "OUTDR11,Port n Output Data 11" "0,1"
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newline
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bitfld.long 0x0 10. "OUTDR10,Port n Output Data 10" "0,1"
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bitfld.long 0x0 9. "OUTDR9,Port n Output Data 9" "0,1"
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newline
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bitfld.long 0x0 8. "OUTDR8,Port n Output Data 8" "0,1"
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bitfld.long 0x0 7. "OUTDR7,Port n Output Data 7" "0,1"
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newline
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bitfld.long 0x0 6. "OUTDR6,Port n Output Data 6" "0,1"
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bitfld.long 0x0 5. "OUTDR5,Port n Output Data 5" "0,1"
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newline
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bitfld.long 0x0 4. "OUTDR4,Port n Output Data 4" "0,1"
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bitfld.long 0x0 3. "OUTDR3,Port n Output Data 3" "0,1"
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newline
|
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bitfld.long 0x0 2. "OUTDR2,Port n Output Data 2" "0,1"
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bitfld.long 0x0 1. "OUTDR1,Port n Output Data 1" "0,1"
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newline
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bitfld.long 0x0 0. "OUTDR0,Port n Output Data 0" "0,1"
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wgroup.long 0x1C++0x7
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line.long 0x0 "BSR,Port n Output Bit Set Register"
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bitfld.long 0x0 12. "BSR12,Port n Output Bit Set 12" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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bitfld.long 0x0 11. "BSR11,Port n Output Bit Set 11" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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newline
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bitfld.long 0x0 10. "BSR10,Port n Output Bit Set 10" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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bitfld.long 0x0 9. "BSR9,Port n Output Bit Set 9" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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newline
|
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bitfld.long 0x0 8. "BSR8,Port n Output Bit Set 8" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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bitfld.long 0x0 7. "BSR7,Port n Output Bit Set 7" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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|
newline
|
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bitfld.long 0x0 6. "BSR6,Port n Output Bit Set 6" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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bitfld.long 0x0 5. "BSR5,Port n Output Bit Set 5" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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|
newline
|
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bitfld.long 0x0 4. "BSR4,Port n Output Bit Set 4" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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bitfld.long 0x0 3. "BSR3,Port n Output Bit Set 3" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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|
newline
|
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bitfld.long 0x0 2. "BSR2,Port n Output Bit Set 2" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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bitfld.long 0x0 1. "BSR1,Port n Output Bit Set 1" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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newline
|
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bitfld.long 0x0 0. "BSR0,Port n Output Bit Set 0" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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line.long 0x4 "BCR,Port n Output Bit Clear Register"
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bitfld.long 0x4 12. "BCR12,Port n Output Bit Clear 12" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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bitfld.long 0x4 11. "BCR11,Port n Output Bit Clear 11" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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|
newline
|
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bitfld.long 0x4 10. "BCR10,Port n Output Bit Clear 10" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
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bitfld.long 0x4 9. "BCR9,Port n Output Bit Clear 9" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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|
newline
|
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bitfld.long 0x4 8. "BCR8,Port n Output Bit Clear 8" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
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bitfld.long 0x4 7. "BCR7,Port n Output Bit Clear 7" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
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bitfld.long 0x4 6. "BCR6,Port n Output Bit Clear 6" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
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bitfld.long 0x4 5. "BCR5,Port n Output Bit Clear 5" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
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bitfld.long 0x4 4. "BCR4,Port n Output Bit Clear 4" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
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bitfld.long 0x4 3. "BCR3,Port n Output Bit Clear 3" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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|
newline
|
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bitfld.long 0x4 2. "BCR2,Port n Output Bit Clear 2" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
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bitfld.long 0x4 1. "BCR1,Port n Output Bit Clear 1" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
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bitfld.long 0x4 0. "BCR0,Port n Output Bit Clear 0" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
group.long 0x24++0x7
|
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line.long 0x0 "OUTDMSK,Port n Output Data Mask Register"
|
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bitfld.long 0x0 12. "OUTDMSK12,Port n Output Data Mask 12" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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bitfld.long 0x0 11. "OUTDMSK11,Port n Output Data Mask 11" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
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bitfld.long 0x0 10. "OUTDMSK10,Port n Output Data Mask 10" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
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bitfld.long 0x0 9. "OUTDMSK9,Port n Output Data Mask 9" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
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bitfld.long 0x0 8. "OUTDMSK8,Port n Output Data Mask 8" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
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bitfld.long 0x0 7. "OUTDMSK7,Port n Output Data Mask 7" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 6. "OUTDMSK6,Port n Output Data Mask 6" "0,1"
|
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bitfld.long 0x0 5. "OUTDMSK5,Port n Output Data Mask 5" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 4. "OUTDMSK4,Port n Output Data Mask 4" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
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bitfld.long 0x0 3. "OUTDMSK3,Port n Output Data Mask 3" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 2. "OUTDMSK2,Port n Output Data Mask 2" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 1. "OUTDMSK1,Port n Output Data Mask 1" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 0. "OUTDMSK0,Port n Output Data Mask 0" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
line.long 0x4 "DBCR,Port n Debounce Control Register"
|
|
bitfld.long 0x4 16.--18. "DBCLK,Port n Debounce Filter Sampling Clock Selection" "0: HCLK/1,1: HCLK/4,2: HCLK/16,3: HCLK/64,4: HCLK/256,5: HCLK/1024,?,?"
|
|
bitfld.long 0x4 12. "DBEN12,Port n Debounce Enable 12" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 11. "DBEN11,Port n Debounce Enable 11" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 10. "DBEN10,Port n Debounce Enable 10" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 9. "DBEN9,Port n Debounce Enable 9" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 8. "DBEN8,Port n Debounce Enable 8" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 7. "DBEN7,Port n Debounce Enable 7" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 6. "DBEN6,Port n Debounce Enable 6" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 5. "DBEN5,Port n Debounce Enable 5" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 4. "DBEN4,Port n Debounce Enable 4" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 3. "DBEN3,Port n Debounce Enable 3" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 2. "DBEN2,Port n Debounce Enable 2" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 1. "DBEN1,Port n Debounce Enable 1" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 0. "DBEN0,Port n Debounce Enable 0" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "PB_MOD,Port n Mode Register"
|
|
bitfld.long 0x0 24.--25. "MODE12,Port n Mode Selection 12" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "MODE11,Port n Mode Selection 11" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "MODE10,Port n Mode Selection 10" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "MODE9,Port n Mode Selection 9" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "MODE8,Port n Mode Selection 8" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "MODE7,Port n Mode Selection 7" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "MODE6,Port n Mode Selection 6" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MODE5,Port n Mode Selection 5" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "MODE4,Port n Mode Selection 4" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "MODE3,Port n Mode Selection 3" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "MODE2,Port n Mode Selection 2" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "MODE1,Port n Mode Selection 1" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MODE0,Port n Mode Selection 0" "0,1,2,3"
|
|
line.long 0x4 "PB_TYP,Port n Output Type Selection Register"
|
|
bitfld.long 0x4 12. "TYP12,Port n Output Type Selection 12" "0,1"
|
|
bitfld.long 0x4 11. "TYP11,Port n Output Type Selection 11" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "TYP10,Port n Output Type Selection 10" "0,1"
|
|
bitfld.long 0x4 9. "TYP9,Port n Output Type Selection 9" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "TYP8,Port n Output Type Selection 8" "0,1"
|
|
bitfld.long 0x4 7. "TYP7,Port n Output Type Selection 7" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "TYP6,Port n Output Type Selection 6" "0,1"
|
|
bitfld.long 0x4 5. "TYP5,Port n Output Type Selection 5" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TYP4,Port n Output Type Selection 4" "0,1"
|
|
bitfld.long 0x4 3. "TYP3,Port n Output Type Selection 3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "TYP2,Port n Output Type Selection 2" "0,1"
|
|
bitfld.long 0x4 1. "TYP1,Port n Output Type Selection 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "TYP0,Port n Output Type Selection 0" "0,1"
|
|
line.long 0x8 "PB_AFSR1,Port n Alternative Function Selection Register 1"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AFSR7,Port n Alternative Function Selection 7"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AFSR6,Port n Alternative Function Selection 6"
|
|
newline
|
|
hexmask.long.byte 0x8 20.--23. 1. "AFSR5,Port n Alternative Function Selection 5"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AFSR4,Port n Alternative Function Selection 4"
|
|
newline
|
|
hexmask.long.byte 0x8 12.--15. 1. "AFSR3,Port n Alternative Function Selection 3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AFSR2,Port n Alternative Function Selection 2"
|
|
newline
|
|
hexmask.long.byte 0x8 4.--7. 1. "AFSR1,Port n Alternative Function Selection 1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AFSR0,Port n Alternative Function Selection 0"
|
|
line.long 0xC "PB_AFSR2,Port n Alternative Function Selection Register 2"
|
|
hexmask.long.byte 0xC 16.--19. 1. "AFSR12,Port n Alternative Function Selection 12"
|
|
hexmask.long.byte 0xC 12.--15. 1. "AFSR11,Port n Alternative Function Selection 11"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--11. 1. "AFSR10,Port n Alternative Function Selection 10"
|
|
hexmask.long.byte 0xC 4.--7. 1. "AFSR9,Port n Alternative Function Selection 9"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--3. 1. "AFSR8,Port n Alternative Function Selection 8"
|
|
line.long 0x10 "PB_PUPD,Port n Pull-Up/Down Resistor Selection Register"
|
|
bitfld.long 0x10 24.--25. "PUPD12,Port n Pull-Up/Down Resistor Selection 12" "0,1,2,3"
|
|
bitfld.long 0x10 22.--23. "PUPD11,Port n Pull-Up/Down Resistor Selection 11" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 20.--21. "PUPD10,Port n Pull-Up/Down Resistor Selection 10" "0,1,2,3"
|
|
bitfld.long 0x10 18.--19. "PUPD9,Port n Pull-Up/Down Resistor Selection 9" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "PUPD8,Port n Pull-Up/Down Resistor Selection 8" "0,1,2,3"
|
|
bitfld.long 0x10 14.--15. "PUPD7,Port n Pull-Up/Down Resistor Selection 7" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 12.--13. "PUPD6,Port n Pull-Up/Down Resistor Selection 6" "0,1,2,3"
|
|
bitfld.long 0x10 10.--11. "PUPD5,Port n Pull-Up/Down Resistor Selection 5" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 8.--9. "PUPD4,Port n Pull-Up/Down Resistor Selection 4" "0,1,2,3"
|
|
bitfld.long 0x10 6.--7. "PUPD3,Port n Pull-Up/Down Resistor Selection 3" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 4.--5. "PUPD2,Port n Pull-Up/Down Resistor Selection 2" "0,1,2,3"
|
|
bitfld.long 0x10 2.--3. "PUPD1,Port n Pull-Up/Down Resistor Selection 1" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 0.--1. "PUPD0,Port n Pull-Up/Down Resistor Selection 0" "0,1,2,3"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "PB_INDR,Port n Input Data Register"
|
|
bitfld.long 0x0 12. "INDR12,Port n Input Data 12" "0,1"
|
|
bitfld.long 0x0 11. "INDR11,Port n Input Data 11" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "INDR10,Port n Input Data 10" "0,1"
|
|
bitfld.long 0x0 9. "INDR9,Port n Input Data 9" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "INDR8,Port n Input Data 8" "0,1"
|
|
bitfld.long 0x0 7. "INDR7,Port n Input Data 7" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "INDR6,Port n Input Data 6" "0,1"
|
|
bitfld.long 0x0 5. "INDR5,Port n Input Data 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "INDR4,Port n Input Data 4" "0,1"
|
|
bitfld.long 0x0 3. "INDR3,Port n Input Data 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "INDR2,Port n Input Data 2" "0,1"
|
|
bitfld.long 0x0 1. "INDR1,Port n Input Data 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "INDR0,Port n Input Data 0" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "PB_OUTDR,Port n Output Data Register"
|
|
bitfld.long 0x0 12. "OUTDR12,Port n Output Data 12" "0,1"
|
|
bitfld.long 0x0 11. "OUTDR11,Port n Output Data 11" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OUTDR10,Port n Output Data 10" "0,1"
|
|
bitfld.long 0x0 9. "OUTDR9,Port n Output Data 9" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OUTDR8,Port n Output Data 8" "0,1"
|
|
bitfld.long 0x0 7. "OUTDR7,Port n Output Data 7" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "OUTDR6,Port n Output Data 6" "0,1"
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|
bitfld.long 0x0 5. "OUTDR5,Port n Output Data 5" "0,1"
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|
newline
|
|
bitfld.long 0x0 4. "OUTDR4,Port n Output Data 4" "0,1"
|
|
bitfld.long 0x0 3. "OUTDR3,Port n Output Data 3" "0,1"
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|
newline
|
|
bitfld.long 0x0 2. "OUTDR2,Port n Output Data 2" "0,1"
|
|
bitfld.long 0x0 1. "OUTDR1,Port n Output Data 1" "0,1"
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|
newline
|
|
bitfld.long 0x0 0. "OUTDR0,Port n Output Data 0" "0,1"
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|
wgroup.long 0x1C++0x7
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|
line.long 0x0 "PB_BSR,Port n Output Bit Set Register"
|
|
bitfld.long 0x0 12. "BSR12,Port n Output Bit Set 12" "0,1"
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|
bitfld.long 0x0 11. "BSR11,Port n Output Bit Set 11" "0,1"
|
|
newline
|
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bitfld.long 0x0 10. "BSR10,Port n Output Bit Set 10" "0,1"
|
|
bitfld.long 0x0 9. "BSR9,Port n Output Bit Set 9" "0,1"
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|
newline
|
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bitfld.long 0x0 8. "BSR8,Port n Output Bit Set 8" "0,1"
|
|
bitfld.long 0x0 7. "BSR7,Port n Output Bit Set 7" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "BSR6,Port n Output Bit Set 6" "0,1"
|
|
bitfld.long 0x0 5. "BSR5,Port n Output Bit Set 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "BSR4,Port n Output Bit Set 4" "0,1"
|
|
bitfld.long 0x0 3. "BSR3,Port n Output Bit Set 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "BSR2,Port n Output Bit Set 2" "0,1"
|
|
bitfld.long 0x0 1. "BSR1,Port n Output Bit Set 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "BSR0,Port n Output Bit Set 0" "0,1"
|
|
line.long 0x4 "PB_BCR,Port n Output Bit Clear Register"
|
|
bitfld.long 0x4 12. "BCR12,Port n Output Bit Clear 12" "0,1"
|
|
bitfld.long 0x4 11. "BCR11,Port n Output Bit Clear 11" "0,1"
|
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newline
|
|
bitfld.long 0x4 10. "BCR10,Port n Output Bit Clear 10" "0,1"
|
|
bitfld.long 0x4 9. "BCR9,Port n Output Bit Clear 9" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "BCR8,Port n Output Bit Clear 8" "0,1"
|
|
bitfld.long 0x4 7. "BCR7,Port n Output Bit Clear 7" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "BCR6,Port n Output Bit Clear 6" "0,1"
|
|
bitfld.long 0x4 5. "BCR5,Port n Output Bit Clear 5" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "BCR4,Port n Output Bit Clear 4" "0,1"
|
|
bitfld.long 0x4 3. "BCR3,Port n Output Bit Clear 3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "BCR2,Port n Output Bit Clear 2" "0,1"
|
|
bitfld.long 0x4 1. "BCR1,Port n Output Bit Clear 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "BCR0,Port n Output Bit Clear 0" "0,1"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "PB_OUTDMSK,Port n Output Data Mask Register"
|
|
bitfld.long 0x0 12. "OUTDMSK12,Port n Output Data Mask 12" "0,1"
|
|
bitfld.long 0x0 11. "OUTDMSK11,Port n Output Data Mask 11" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OUTDMSK10,Port n Output Data Mask 10" "0,1"
|
|
bitfld.long 0x0 9. "OUTDMSK9,Port n Output Data Mask 9" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OUTDMSK8,Port n Output Data Mask 8" "0,1"
|
|
bitfld.long 0x0 7. "OUTDMSK7,Port n Output Data Mask 7" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "OUTDMSK6,Port n Output Data Mask 6" "0,1"
|
|
bitfld.long 0x0 5. "OUTDMSK5,Port n Output Data Mask 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "OUTDMSK4,Port n Output Data Mask 4" "0,1"
|
|
bitfld.long 0x0 3. "OUTDMSK3,Port n Output Data Mask 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "OUTDMSK2,Port n Output Data Mask 2" "0,1"
|
|
bitfld.long 0x0 1. "OUTDMSK1,Port n Output Data Mask 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OUTDMSK0,Port n Output Data Mask 0" "0,1"
|
|
line.long 0x4 "PB_DBCR,Port n Debounce Control Register"
|
|
bitfld.long 0x4 16.--18. "DBCLK,Port n Debounce Filter Sampling Clock Selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 12. "DBEN12,Port n Debounce Enable 12" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "DBEN11,Port n Debounce Enable 11" "0,1"
|
|
bitfld.long 0x4 10. "DBEN10,Port n Debounce Enable 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "DBEN9,Port n Debounce Enable 9" "0,1"
|
|
bitfld.long 0x4 8. "DBEN8,Port n Debounce Enable 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "DBEN7,Port n Debounce Enable 7" "0,1"
|
|
bitfld.long 0x4 6. "DBEN6,Port n Debounce Enable 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "DBEN5,Port n Debounce Enable 5" "0,1"
|
|
bitfld.long 0x4 4. "DBEN4,Port n Debounce Enable 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "DBEN3,Port n Debounce Enable 3" "0,1"
|
|
bitfld.long 0x4 2. "DBEN2,Port n Debounce Enable 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "DBEN1,Port n Debounce Enable 1" "0,1"
|
|
bitfld.long 0x4 0. "DBEN0,Port n Debounce Enable 0" "0,1"
|
|
tree.end
|
|
tree "PC"
|
|
base ad:0x30000200
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "MOD,Port n Mode Register"
|
|
bitfld.long 0x0 24.--25. "MODE12,Port n Mode Selection 12" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 22.--23. "MODE11,Port n Mode Selection 11" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "MODE10,Port n Mode Selection 10" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 18.--19. "MODE9,Port n Mode Selection 9" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "MODE8,Port n Mode Selection 8" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 14.--15. "MODE7,Port n Mode Selection 7" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "MODE6,Port n Mode Selection 6" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 10.--11. "MODE5,Port n Mode Selection 5" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "MODE4,Port n Mode Selection 4" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 6.--7. "MODE3,Port n Mode Selection 3" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "MODE2,Port n Mode Selection 2" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 2.--3. "MODE1,Port n Mode Selection 1" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MODE0,Port n Mode Selection 0" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
line.long 0x4 "TYP,Port n Output Type Selection Register"
|
|
bitfld.long 0x4 12. "TYP12,Port n Output Type Selection 12" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 11. "TYP11,Port n Output Type Selection 11" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 10. "TYP10,Port n Output Type Selection 10" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 9. "TYP9,Port n Output Type Selection 9" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 8. "TYP8,Port n Output Type Selection 8" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 7. "TYP7,Port n Output Type Selection 7" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 6. "TYP6,Port n Output Type Selection 6" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 5. "TYP5,Port n Output Type Selection 5" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TYP4,Port n Output Type Selection 4" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 3. "TYP3,Port n Output Type Selection 3" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 2. "TYP2,Port n Output Type Selection 2" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 1. "TYP1,Port n Output Type Selection 1" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 0. "TYP0,Port n Output Type Selection 0" "0: Push-Pull Output,1: Open-Drain Output"
|
|
line.long 0x8 "AFSR1,Port n Alternative Function Selection Register 1"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AFSR7,Port n Alternative Function Selection 7"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AFSR6,Port n Alternative Function Selection 6"
|
|
newline
|
|
hexmask.long.byte 0x8 20.--23. 1. "AFSR5,Port n Alternative Function Selection 5"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AFSR4,Port n Alternative Function Selection 4"
|
|
newline
|
|
hexmask.long.byte 0x8 12.--15. 1. "AFSR3,Port n Alternative Function Selection 3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AFSR2,Port n Alternative Function Selection 2"
|
|
newline
|
|
hexmask.long.byte 0x8 4.--7. 1. "AFSR1,Port n Alternative Function Selection 1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AFSR0,Port n Alternative Function Selection 0"
|
|
line.long 0xC "AFSR2,Port n Alternative Function Selection Register 2"
|
|
hexmask.long.byte 0xC 16.--19. 1. "AFSR12,Port n Alternative Function Selection 12"
|
|
hexmask.long.byte 0xC 12.--15. 1. "AFSR11,Port n Alternative Function Selection 11"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--11. 1. "AFSR10,Port n Alternative Function Selection 10"
|
|
hexmask.long.byte 0xC 4.--7. 1. "AFSR9,Port n Alternative Function Selection 9"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--3. 1. "AFSR8,Port n Alternative Function Selection 8"
|
|
line.long 0x10 "PUPD,Port n Pull-Up/Down Resistor Selection Register"
|
|
bitfld.long 0x10 24.--25. "PUPD12,Port n Pull-Up/Down Resistor Selection 12" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 22.--23. "PUPD11,Port n Pull-Up/Down Resistor Selection 11" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 20.--21. "PUPD10,Port n Pull-Up/Down Resistor Selection 10" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 18.--19. "PUPD9,Port n Pull-Up/Down Resistor Selection 9" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "PUPD8,Port n Pull-Up/Down Resistor Selection 8" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 14.--15. "PUPD7,Port n Pull-Up/Down Resistor Selection 7" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 12.--13. "PUPD6,Port n Pull-Up/Down Resistor Selection 6" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 10.--11. "PUPD5,Port n Pull-Up/Down Resistor Selection 5" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 8.--9. "PUPD4,Port n Pull-Up/Down Resistor Selection 4" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 6.--7. "PUPD3,Port n Pull-Up/Down Resistor Selection 3" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 4.--5. "PUPD2,Port n Pull-Up/Down Resistor Selection 2" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 2.--3. "PUPD1,Port n Pull-Up/Down Resistor Selection 1" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 0.--1. "PUPD0,Port n Pull-Up/Down Resistor Selection 0" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "INDR,Port n Input Data Register"
|
|
bitfld.long 0x0 12. "INDR12,Port n Input Data 12" "0,1"
|
|
bitfld.long 0x0 11. "INDR11,Port n Input Data 11" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "INDR10,Port n Input Data 10" "0,1"
|
|
bitfld.long 0x0 9. "INDR9,Port n Input Data 9" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "INDR8,Port n Input Data 8" "0,1"
|
|
bitfld.long 0x0 7. "INDR7,Port n Input Data 7" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "INDR6,Port n Input Data 6" "0,1"
|
|
bitfld.long 0x0 5. "INDR5,Port n Input Data 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "INDR4,Port n Input Data 4" "0,1"
|
|
bitfld.long 0x0 3. "INDR3,Port n Input Data 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "INDR2,Port n Input Data 2" "0,1"
|
|
bitfld.long 0x0 1. "INDR1,Port n Input Data 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "INDR0,Port n Input Data 0" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "OUTDR,Port n Output Data Register"
|
|
bitfld.long 0x0 12. "OUTDR12,Port n Output Data 12" "0,1"
|
|
bitfld.long 0x0 11. "OUTDR11,Port n Output Data 11" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OUTDR10,Port n Output Data 10" "0,1"
|
|
bitfld.long 0x0 9. "OUTDR9,Port n Output Data 9" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OUTDR8,Port n Output Data 8" "0,1"
|
|
bitfld.long 0x0 7. "OUTDR7,Port n Output Data 7" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "OUTDR6,Port n Output Data 6" "0,1"
|
|
bitfld.long 0x0 5. "OUTDR5,Port n Output Data 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "OUTDR4,Port n Output Data 4" "0,1"
|
|
bitfld.long 0x0 3. "OUTDR3,Port n Output Data 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "OUTDR2,Port n Output Data 2" "0,1"
|
|
bitfld.long 0x0 1. "OUTDR1,Port n Output Data 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OUTDR0,Port n Output Data 0" "0,1"
|
|
wgroup.long 0x1C++0x7
|
|
line.long 0x0 "BSR,Port n Output Bit Set Register"
|
|
bitfld.long 0x0 12. "BSR12,Port n Output Bit Set 12" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 11. "BSR11,Port n Output Bit Set 11" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 10. "BSR10,Port n Output Bit Set 10" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 9. "BSR9,Port n Output Bit Set 9" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 8. "BSR8,Port n Output Bit Set 8" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 7. "BSR7,Port n Output Bit Set 7" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 6. "BSR6,Port n Output Bit Set 6" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 5. "BSR5,Port n Output Bit Set 5" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 4. "BSR4,Port n Output Bit Set 4" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 3. "BSR3,Port n Output Bit Set 3" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 2. "BSR2,Port n Output Bit Set 2" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 1. "BSR1,Port n Output Bit Set 1" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 0. "BSR0,Port n Output Bit Set 0" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
line.long 0x4 "BCR,Port n Output Bit Clear Register"
|
|
bitfld.long 0x4 12. "BCR12,Port n Output Bit Clear 12" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 11. "BCR11,Port n Output Bit Clear 11" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 10. "BCR10,Port n Output Bit Clear 10" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 9. "BCR9,Port n Output Bit Clear 9" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 8. "BCR8,Port n Output Bit Clear 8" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 7. "BCR7,Port n Output Bit Clear 7" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 6. "BCR6,Port n Output Bit Clear 6" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 5. "BCR5,Port n Output Bit Clear 5" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 4. "BCR4,Port n Output Bit Clear 4" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 3. "BCR3,Port n Output Bit Clear 3" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 2. "BCR2,Port n Output Bit Clear 2" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 1. "BCR1,Port n Output Bit Clear 1" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 0. "BCR0,Port n Output Bit Clear 0" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "OUTDMSK,Port n Output Data Mask Register"
|
|
bitfld.long 0x0 12. "OUTDMSK12,Port n Output Data Mask 12" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 11. "OUTDMSK11,Port n Output Data Mask 11" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 10. "OUTDMSK10,Port n Output Data Mask 10" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 9. "OUTDMSK9,Port n Output Data Mask 9" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 8. "OUTDMSK8,Port n Output Data Mask 8" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 7. "OUTDMSK7,Port n Output Data Mask 7" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
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bitfld.long 0x0 6. "OUTDMSK6,Port n Output Data Mask 6" "0,1"
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|
bitfld.long 0x0 5. "OUTDMSK5,Port n Output Data Mask 5" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
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bitfld.long 0x0 4. "OUTDMSK4,Port n Output Data Mask 4" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 3. "OUTDMSK3,Port n Output Data Mask 3" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
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bitfld.long 0x0 2. "OUTDMSK2,Port n Output Data Mask 2" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 1. "OUTDMSK1,Port n Output Data Mask 1" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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|
newline
|
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bitfld.long 0x0 0. "OUTDMSK0,Port n Output Data Mask 0" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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|
line.long 0x4 "DBCR,Port n Debounce Control Register"
|
|
bitfld.long 0x4 16.--18. "DBCLK,Port n Debounce Filter Sampling Clock Selection" "0: HCLK/1,1: HCLK/4,2: HCLK/16,3: HCLK/64,4: HCLK/256,5: HCLK/1024,?,?"
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bitfld.long 0x4 12. "DBEN12,Port n Debounce Enable 12" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
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bitfld.long 0x4 11. "DBEN11,Port n Debounce Enable 11" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 10. "DBEN10,Port n Debounce Enable 10" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
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bitfld.long 0x4 9. "DBEN9,Port n Debounce Enable 9" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 8. "DBEN8,Port n Debounce Enable 8" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 7. "DBEN7,Port n Debounce Enable 7" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 6. "DBEN6,Port n Debounce Enable 6" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 5. "DBEN5,Port n Debounce Enable 5" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 4. "DBEN4,Port n Debounce Enable 4" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 3. "DBEN3,Port n Debounce Enable 3" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 2. "DBEN2,Port n Debounce Enable 2" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 1. "DBEN1,Port n Debounce Enable 1" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 0. "DBEN0,Port n Debounce Enable 0" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "PC_MOD,Port n Mode Register"
|
|
bitfld.long 0x0 22.--23. "MODE11,Port n Mode Selection 11" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "MODE10,Port n Mode Selection 10" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 18.--19. "MODE9,Port n Mode Selection 9" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "MODE8,Port n Mode Selection 8" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "MODE7,Port n Mode Selection 7" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "MODE6,Port n Mode Selection 6" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "MODE5,Port n Mode Selection 5" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "MODE4,Port n Mode Selection 4" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "MODE3,Port n Mode Selection 3" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODE2,Port n Mode Selection 2" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE1,Port n Mode Selection 1" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODE0,Port n Mode Selection 0" "0,1,2,3"
|
|
line.long 0x4 "PC_TYP,Port n Output Type Selection Register"
|
|
bitfld.long 0x4 11. "TYP11,Port n Output Type Selection 11" "0,1"
|
|
bitfld.long 0x4 10. "TYP10,Port n Output Type Selection 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "TYP9,Port n Output Type Selection 9" "0,1"
|
|
bitfld.long 0x4 8. "TYP8,Port n Output Type Selection 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "TYP7,Port n Output Type Selection 7" "0,1"
|
|
bitfld.long 0x4 6. "TYP6,Port n Output Type Selection 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "TYP5,Port n Output Type Selection 5" "0,1"
|
|
bitfld.long 0x4 4. "TYP4,Port n Output Type Selection 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "TYP3,Port n Output Type Selection 3" "0,1"
|
|
bitfld.long 0x4 2. "TYP2,Port n Output Type Selection 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "TYP1,Port n Output Type Selection 1" "0,1"
|
|
bitfld.long 0x4 0. "TYP0,Port n Output Type Selection 0" "0,1"
|
|
line.long 0x8 "PC_AFSR1,Port n Alternative Function Selection Register 1"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AFSR7,Port n Alternative Function Selection 7"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AFSR6,Port n Alternative Function Selection 6"
|
|
newline
|
|
hexmask.long.byte 0x8 20.--23. 1. "AFSR5,Port n Alternative Function Selection 5"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AFSR4,Port n Alternative Function Selection 4"
|
|
newline
|
|
hexmask.long.byte 0x8 12.--15. 1. "AFSR3,Port n Alternative Function Selection 3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AFSR2,Port n Alternative Function Selection 2"
|
|
newline
|
|
hexmask.long.byte 0x8 4.--7. 1. "AFSR1,Port n Alternative Function Selection 1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AFSR0,Port n Alternative Function Selection 0"
|
|
line.long 0xC "PC_AFSR2,Port n Alternative Function Selection Register 2"
|
|
hexmask.long.byte 0xC 12.--15. 1. "AFSR11,Port n Alternative Function Selection 11"
|
|
hexmask.long.byte 0xC 8.--11. 1. "AFSR10,Port n Alternative Function Selection 10"
|
|
newline
|
|
hexmask.long.byte 0xC 4.--7. 1. "AFSR9,Port n Alternative Function Selection 9"
|
|
hexmask.long.byte 0xC 0.--3. 1. "AFSR8,Port n Alternative Function Selection 8"
|
|
line.long 0x10 "PC_PUPD,Port n Pull-Up/Down Resistor Selection Register"
|
|
bitfld.long 0x10 22.--23. "PUPD11,Port n Pull-Up/Down Resistor Selection 11" "0,1,2,3"
|
|
bitfld.long 0x10 20.--21. "PUPD10,Port n Pull-Up/Down Resistor Selection 10" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "PUPD9,Port n Pull-Up/Down Resistor Selection 9" "0,1,2,3"
|
|
bitfld.long 0x10 16.--17. "PUPD8,Port n Pull-Up/Down Resistor Selection 8" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 14.--15. "PUPD7,Port n Pull-Up/Down Resistor Selection 7" "0,1,2,3"
|
|
bitfld.long 0x10 12.--13. "PUPD6,Port n Pull-Up/Down Resistor Selection 6" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 10.--11. "PUPD5,Port n Pull-Up/Down Resistor Selection 5" "0,1,2,3"
|
|
bitfld.long 0x10 8.--9. "PUPD4,Port n Pull-Up/Down Resistor Selection 4" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 6.--7. "PUPD3,Port n Pull-Up/Down Resistor Selection 3" "0,1,2,3"
|
|
bitfld.long 0x10 4.--5. "PUPD2,Port n Pull-Up/Down Resistor Selection 2" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 2.--3. "PUPD1,Port n Pull-Up/Down Resistor Selection 1" "0,1,2,3"
|
|
bitfld.long 0x10 0.--1. "PUPD0,Port n Pull-Up/Down Resistor Selection 0" "0,1,2,3"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "PC_INDR,Port n Input Data Register"
|
|
bitfld.long 0x0 11. "INDR11,Port n Input Data 11" "0,1"
|
|
bitfld.long 0x0 10. "INDR10,Port n Input Data 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "INDR9,Port n Input Data 9" "0,1"
|
|
bitfld.long 0x0 8. "INDR8,Port n Input Data 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "INDR7,Port n Input Data 7" "0,1"
|
|
bitfld.long 0x0 6. "INDR6,Port n Input Data 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "INDR5,Port n Input Data 5" "0,1"
|
|
bitfld.long 0x0 4. "INDR4,Port n Input Data 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "INDR3,Port n Input Data 3" "0,1"
|
|
bitfld.long 0x0 2. "INDR2,Port n Input Data 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "INDR1,Port n Input Data 1" "0,1"
|
|
bitfld.long 0x0 0. "INDR0,Port n Input Data 0" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "PC_OUTDR,Port n Output Data Register"
|
|
bitfld.long 0x0 11. "OUTDR11,Port n Output Data 11" "0,1"
|
|
bitfld.long 0x0 10. "OUTDR10,Port n Output Data 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "OUTDR9,Port n Output Data 9" "0,1"
|
|
bitfld.long 0x0 8. "OUTDR8,Port n Output Data 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "OUTDR7,Port n Output Data 7" "0,1"
|
|
bitfld.long 0x0 6. "OUTDR6,Port n Output Data 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OUTDR5,Port n Output Data 5" "0,1"
|
|
bitfld.long 0x0 4. "OUTDR4,Port n Output Data 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "OUTDR3,Port n Output Data 3" "0,1"
|
|
bitfld.long 0x0 2. "OUTDR2,Port n Output Data 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "OUTDR1,Port n Output Data 1" "0,1"
|
|
bitfld.long 0x0 0. "OUTDR0,Port n Output Data 0" "0,1"
|
|
wgroup.long 0x1C++0x7
|
|
line.long 0x0 "PC_BSR,Port n Output Bit Set Register"
|
|
bitfld.long 0x0 11. "BSR11,Port n Output Bit Set 11" "0,1"
|
|
bitfld.long 0x0 10. "BSR10,Port n Output Bit Set 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "BSR9,Port n Output Bit Set 9" "0,1"
|
|
bitfld.long 0x0 8. "BSR8,Port n Output Bit Set 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "BSR7,Port n Output Bit Set 7" "0,1"
|
|
bitfld.long 0x0 6. "BSR6,Port n Output Bit Set 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "BSR5,Port n Output Bit Set 5" "0,1"
|
|
bitfld.long 0x0 4. "BSR4,Port n Output Bit Set 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "BSR3,Port n Output Bit Set 3" "0,1"
|
|
bitfld.long 0x0 2. "BSR2,Port n Output Bit Set 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "BSR1,Port n Output Bit Set 1" "0,1"
|
|
bitfld.long 0x0 0. "BSR0,Port n Output Bit Set 0" "0,1"
|
|
line.long 0x4 "PC_BCR,Port n Output Bit Clear Register"
|
|
bitfld.long 0x4 11. "BCR11,Port n Output Bit Clear 11" "0,1"
|
|
bitfld.long 0x4 10. "BCR10,Port n Output Bit Clear 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "BCR9,Port n Output Bit Clear 9" "0,1"
|
|
bitfld.long 0x4 8. "BCR8,Port n Output Bit Clear 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "BCR7,Port n Output Bit Clear 7" "0,1"
|
|
bitfld.long 0x4 6. "BCR6,Port n Output Bit Clear 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "BCR5,Port n Output Bit Clear 5" "0,1"
|
|
bitfld.long 0x4 4. "BCR4,Port n Output Bit Clear 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "BCR3,Port n Output Bit Clear 3" "0,1"
|
|
bitfld.long 0x4 2. "BCR2,Port n Output Bit Clear 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "BCR1,Port n Output Bit Clear 1" "0,1"
|
|
bitfld.long 0x4 0. "BCR0,Port n Output Bit Clear 0" "0,1"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "PC_OUTDMSK,Port n Output Data Mask Register"
|
|
bitfld.long 0x0 11. "OUTDMSK11,Port n Output Data Mask 11" "0,1"
|
|
bitfld.long 0x0 10. "OUTDMSK10,Port n Output Data Mask 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "OUTDMSK9,Port n Output Data Mask 9" "0,1"
|
|
bitfld.long 0x0 8. "OUTDMSK8,Port n Output Data Mask 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "OUTDMSK7,Port n Output Data Mask 7" "0,1"
|
|
bitfld.long 0x0 6. "OUTDMSK6,Port n Output Data Mask 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OUTDMSK5,Port n Output Data Mask 5" "0,1"
|
|
bitfld.long 0x0 4. "OUTDMSK4,Port n Output Data Mask 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "OUTDMSK3,Port n Output Data Mask 3" "0,1"
|
|
bitfld.long 0x0 2. "OUTDMSK2,Port n Output Data Mask 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "OUTDMSK1,Port n Output Data Mask 1" "0,1"
|
|
bitfld.long 0x0 0. "OUTDMSK0,Port n Output Data Mask 0" "0,1"
|
|
line.long 0x4 "PC_DBCR,Port n Debounce Control Register"
|
|
bitfld.long 0x4 16.--18. "DBCLK,Port n Debounce Filter Sampling Clock Selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 11. "DBEN11,Port n Debounce Enable 11" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "DBEN10,Port n Debounce Enable 10" "0,1"
|
|
bitfld.long 0x4 9. "DBEN9,Port n Debounce Enable 9" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "DBEN8,Port n Debounce Enable 8" "0,1"
|
|
bitfld.long 0x4 7. "DBEN7,Port n Debounce Enable 7" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "DBEN6,Port n Debounce Enable 6" "0,1"
|
|
bitfld.long 0x4 5. "DBEN5,Port n Debounce Enable 5" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "DBEN4,Port n Debounce Enable 4" "0,1"
|
|
bitfld.long 0x4 3. "DBEN3,Port n Debounce Enable 3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "DBEN2,Port n Debounce Enable 2" "0,1"
|
|
bitfld.long 0x4 1. "DBEN1,Port n Debounce Enable 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "DBEN0,Port n Debounce Enable 0" "0,1"
|
|
tree.end
|
|
tree "PD"
|
|
base ad:0x30000300
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "MOD,Port n Mode Register"
|
|
bitfld.long 0x0 24.--25. "MODE12,Port n Mode Selection 12" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 22.--23. "MODE11,Port n Mode Selection 11" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "MODE10,Port n Mode Selection 10" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 18.--19. "MODE9,Port n Mode Selection 9" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
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newline
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bitfld.long 0x0 16.--17. "MODE8,Port n Mode Selection 8" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
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bitfld.long 0x0 14.--15. "MODE7,Port n Mode Selection 7" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
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newline
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bitfld.long 0x0 12.--13. "MODE6,Port n Mode Selection 6" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
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bitfld.long 0x0 10.--11. "MODE5,Port n Mode Selection 5" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
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newline
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bitfld.long 0x0 8.--9. "MODE4,Port n Mode Selection 4" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
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bitfld.long 0x0 6.--7. "MODE3,Port n Mode Selection 3" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
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newline
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bitfld.long 0x0 4.--5. "MODE2,Port n Mode Selection 2" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
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bitfld.long 0x0 2.--3. "MODE1,Port n Mode Selection 1" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
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newline
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bitfld.long 0x0 0.--1. "MODE0,Port n Mode Selection 0" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
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line.long 0x4 "TYP,Port n Output Type Selection Register"
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bitfld.long 0x4 12. "TYP12,Port n Output Type Selection 12" "0: Push-Pull Output,1: Open-Drain Output"
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bitfld.long 0x4 11. "TYP11,Port n Output Type Selection 11" "0: Push-Pull Output,1: Open-Drain Output"
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newline
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bitfld.long 0x4 10. "TYP10,Port n Output Type Selection 10" "0: Push-Pull Output,1: Open-Drain Output"
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bitfld.long 0x4 9. "TYP9,Port n Output Type Selection 9" "0: Push-Pull Output,1: Open-Drain Output"
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newline
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bitfld.long 0x4 8. "TYP8,Port n Output Type Selection 8" "0: Push-Pull Output,1: Open-Drain Output"
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bitfld.long 0x4 7. "TYP7,Port n Output Type Selection 7" "0: Push-Pull Output,1: Open-Drain Output"
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newline
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bitfld.long 0x4 6. "TYP6,Port n Output Type Selection 6" "0: Push-Pull Output,1: Open-Drain Output"
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bitfld.long 0x4 5. "TYP5,Port n Output Type Selection 5" "0,1"
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newline
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bitfld.long 0x4 4. "TYP4,Port n Output Type Selection 4" "0: Push-Pull Output,1: Open-Drain Output"
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bitfld.long 0x4 3. "TYP3,Port n Output Type Selection 3" "0: Push-Pull Output,1: Open-Drain Output"
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newline
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bitfld.long 0x4 2. "TYP2,Port n Output Type Selection 2" "0: Push-Pull Output,1: Open-Drain Output"
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bitfld.long 0x4 1. "TYP1,Port n Output Type Selection 1" "0: Push-Pull Output,1: Open-Drain Output"
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newline
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bitfld.long 0x4 0. "TYP0,Port n Output Type Selection 0" "0: Push-Pull Output,1: Open-Drain Output"
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line.long 0x8 "AFSR1,Port n Alternative Function Selection Register 1"
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hexmask.long.byte 0x8 28.--31. 1. "AFSR7,Port n Alternative Function Selection 7"
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hexmask.long.byte 0x8 24.--27. 1. "AFSR6,Port n Alternative Function Selection 6"
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newline
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hexmask.long.byte 0x8 20.--23. 1. "AFSR5,Port n Alternative Function Selection 5"
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hexmask.long.byte 0x8 16.--19. 1. "AFSR4,Port n Alternative Function Selection 4"
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newline
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hexmask.long.byte 0x8 12.--15. 1. "AFSR3,Port n Alternative Function Selection 3"
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hexmask.long.byte 0x8 8.--11. 1. "AFSR2,Port n Alternative Function Selection 2"
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newline
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hexmask.long.byte 0x8 4.--7. 1. "AFSR1,Port n Alternative Function Selection 1"
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hexmask.long.byte 0x8 0.--3. 1. "AFSR0,Port n Alternative Function Selection 0"
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line.long 0xC "AFSR2,Port n Alternative Function Selection Register 2"
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hexmask.long.byte 0xC 16.--19. 1. "AFSR12,Port n Alternative Function Selection 12"
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hexmask.long.byte 0xC 12.--15. 1. "AFSR11,Port n Alternative Function Selection 11"
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newline
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hexmask.long.byte 0xC 8.--11. 1. "AFSR10,Port n Alternative Function Selection 10"
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hexmask.long.byte 0xC 4.--7. 1. "AFSR9,Port n Alternative Function Selection 9"
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newline
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hexmask.long.byte 0xC 0.--3. 1. "AFSR8,Port n Alternative Function Selection 8"
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line.long 0x10 "PUPD,Port n Pull-Up/Down Resistor Selection Register"
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bitfld.long 0x10 24.--25. "PUPD12,Port n Pull-Up/Down Resistor Selection 12" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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bitfld.long 0x10 22.--23. "PUPD11,Port n Pull-Up/Down Resistor Selection 11" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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newline
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bitfld.long 0x10 20.--21. "PUPD10,Port n Pull-Up/Down Resistor Selection 10" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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bitfld.long 0x10 18.--19. "PUPD9,Port n Pull-Up/Down Resistor Selection 9" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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newline
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bitfld.long 0x10 16.--17. "PUPD8,Port n Pull-Up/Down Resistor Selection 8" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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bitfld.long 0x10 14.--15. "PUPD7,Port n Pull-Up/Down Resistor Selection 7" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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newline
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bitfld.long 0x10 12.--13. "PUPD6,Port n Pull-Up/Down Resistor Selection 6" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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bitfld.long 0x10 10.--11. "PUPD5,Port n Pull-Up/Down Resistor Selection 5" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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newline
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bitfld.long 0x10 8.--9. "PUPD4,Port n Pull-Up/Down Resistor Selection 4" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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bitfld.long 0x10 6.--7. "PUPD3,Port n Pull-Up/Down Resistor Selection 3" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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newline
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bitfld.long 0x10 4.--5. "PUPD2,Port n Pull-Up/Down Resistor Selection 2" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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bitfld.long 0x10 2.--3. "PUPD1,Port n Pull-Up/Down Resistor Selection 1" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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newline
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bitfld.long 0x10 0.--1. "PUPD0,Port n Pull-Up/Down Resistor Selection 0" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
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rgroup.long 0x14++0x3
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line.long 0x0 "INDR,Port n Input Data Register"
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bitfld.long 0x0 12. "INDR12,Port n Input Data 12" "0,1"
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bitfld.long 0x0 11. "INDR11,Port n Input Data 11" "0,1"
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newline
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bitfld.long 0x0 10. "INDR10,Port n Input Data 10" "0,1"
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bitfld.long 0x0 9. "INDR9,Port n Input Data 9" "0,1"
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newline
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bitfld.long 0x0 8. "INDR8,Port n Input Data 8" "0,1"
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bitfld.long 0x0 7. "INDR7,Port n Input Data 7" "0,1"
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newline
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bitfld.long 0x0 6. "INDR6,Port n Input Data 6" "0,1"
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bitfld.long 0x0 5. "INDR5,Port n Input Data 5" "0,1"
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newline
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bitfld.long 0x0 4. "INDR4,Port n Input Data 4" "0,1"
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bitfld.long 0x0 3. "INDR3,Port n Input Data 3" "0,1"
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newline
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bitfld.long 0x0 2. "INDR2,Port n Input Data 2" "0,1"
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bitfld.long 0x0 1. "INDR1,Port n Input Data 1" "0,1"
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newline
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bitfld.long 0x0 0. "INDR0,Port n Input Data 0" "0,1"
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group.long 0x18++0x3
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line.long 0x0 "OUTDR,Port n Output Data Register"
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bitfld.long 0x0 12. "OUTDR12,Port n Output Data 12" "0,1"
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bitfld.long 0x0 11. "OUTDR11,Port n Output Data 11" "0,1"
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newline
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bitfld.long 0x0 10. "OUTDR10,Port n Output Data 10" "0,1"
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bitfld.long 0x0 9. "OUTDR9,Port n Output Data 9" "0,1"
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newline
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bitfld.long 0x0 8. "OUTDR8,Port n Output Data 8" "0,1"
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bitfld.long 0x0 7. "OUTDR7,Port n Output Data 7" "0,1"
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newline
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bitfld.long 0x0 6. "OUTDR6,Port n Output Data 6" "0,1"
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bitfld.long 0x0 5. "OUTDR5,Port n Output Data 5" "0,1"
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newline
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bitfld.long 0x0 4. "OUTDR4,Port n Output Data 4" "0,1"
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bitfld.long 0x0 3. "OUTDR3,Port n Output Data 3" "0,1"
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newline
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bitfld.long 0x0 2. "OUTDR2,Port n Output Data 2" "0,1"
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bitfld.long 0x0 1. "OUTDR1,Port n Output Data 1" "0,1"
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newline
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bitfld.long 0x0 0. "OUTDR0,Port n Output Data 0" "0,1"
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wgroup.long 0x1C++0x7
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line.long 0x0 "BSR,Port n Output Bit Set Register"
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bitfld.long 0x0 12. "BSR12,Port n Output Bit Set 12" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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bitfld.long 0x0 11. "BSR11,Port n Output Bit Set 11" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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newline
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bitfld.long 0x0 10. "BSR10,Port n Output Bit Set 10" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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bitfld.long 0x0 9. "BSR9,Port n Output Bit Set 9" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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newline
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bitfld.long 0x0 8. "BSR8,Port n Output Bit Set 8" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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bitfld.long 0x0 7. "BSR7,Port n Output Bit Set 7" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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newline
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bitfld.long 0x0 6. "BSR6,Port n Output Bit Set 6" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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bitfld.long 0x0 5. "BSR5,Port n Output Bit Set 5" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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newline
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bitfld.long 0x0 4. "BSR4,Port n Output Bit Set 4" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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bitfld.long 0x0 3. "BSR3,Port n Output Bit Set 3" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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newline
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bitfld.long 0x0 2. "BSR2,Port n Output Bit Set 2" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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bitfld.long 0x0 1. "BSR1,Port n Output Bit Set 1" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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newline
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bitfld.long 0x0 0. "BSR0,Port n Output Bit Set 0" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
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line.long 0x4 "BCR,Port n Output Bit Clear Register"
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bitfld.long 0x4 12. "BCR12,Port n Output Bit Clear 12" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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bitfld.long 0x4 11. "BCR11,Port n Output Bit Clear 11" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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newline
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bitfld.long 0x4 10. "BCR10,Port n Output Bit Clear 10" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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bitfld.long 0x4 9. "BCR9,Port n Output Bit Clear 9" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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newline
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bitfld.long 0x4 8. "BCR8,Port n Output Bit Clear 8" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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bitfld.long 0x4 7. "BCR7,Port n Output Bit Clear 7" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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newline
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bitfld.long 0x4 6. "BCR6,Port n Output Bit Clear 6" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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bitfld.long 0x4 5. "BCR5,Port n Output Bit Clear 5" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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newline
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bitfld.long 0x4 4. "BCR4,Port n Output Bit Clear 4" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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bitfld.long 0x4 3. "BCR3,Port n Output Bit Clear 3" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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newline
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bitfld.long 0x4 2. "BCR2,Port n Output Bit Clear 2" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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bitfld.long 0x4 1. "BCR1,Port n Output Bit Clear 1" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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newline
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bitfld.long 0x4 0. "BCR0,Port n Output Bit Clear 0" "0: No effect.,1: Clear the corresponding OUTDRx bit."
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group.long 0x24++0x7
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line.long 0x0 "OUTDMSK,Port n Output Data Mask Register"
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bitfld.long 0x0 12. "OUTDMSK12,Port n Output Data Mask 12" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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bitfld.long 0x0 11. "OUTDMSK11,Port n Output Data Mask 11" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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newline
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bitfld.long 0x0 10. "OUTDMSK10,Port n Output Data Mask 10" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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bitfld.long 0x0 9. "OUTDMSK9,Port n Output Data Mask 9" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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newline
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bitfld.long 0x0 8. "OUTDMSK8,Port n Output Data Mask 8" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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bitfld.long 0x0 7. "OUTDMSK7,Port n Output Data Mask 7" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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newline
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bitfld.long 0x0 6. "OUTDMSK6,Port n Output Data Mask 6" "0,1"
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bitfld.long 0x0 5. "OUTDMSK5,Port n Output Data Mask 5" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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newline
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bitfld.long 0x0 4. "OUTDMSK4,Port n Output Data Mask 4" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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bitfld.long 0x0 3. "OUTDMSK3,Port n Output Data Mask 3" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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newline
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bitfld.long 0x0 2. "OUTDMSK2,Port n Output Data Mask 2" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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bitfld.long 0x0 1. "OUTDMSK1,Port n Output Data Mask 1" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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newline
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bitfld.long 0x0 0. "OUTDMSK0,Port n Output Data Mask 0" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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line.long 0x4 "DBCR,Port n Debounce Control Register"
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bitfld.long 0x4 16.--18. "DBCLK,Port n Debounce Filter Sampling Clock Selection" "0: HCLK/1,1: HCLK/4,2: HCLK/16,3: HCLK/64,4: HCLK/256,5: HCLK/1024,?,?"
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bitfld.long 0x4 12. "DBEN12,Port n Debounce Enable 12" "0: Disable debounce filter.,1: Enable debounce filter."
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newline
|
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bitfld.long 0x4 11. "DBEN11,Port n Debounce Enable 11" "0: Disable debounce filter.,1: Enable debounce filter."
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bitfld.long 0x4 10. "DBEN10,Port n Debounce Enable 10" "0: Disable debounce filter.,1: Enable debounce filter."
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newline
|
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bitfld.long 0x4 9. "DBEN9,Port n Debounce Enable 9" "0: Disable debounce filter.,1: Enable debounce filter."
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bitfld.long 0x4 8. "DBEN8,Port n Debounce Enable 8" "0: Disable debounce filter.,1: Enable debounce filter."
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|
newline
|
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bitfld.long 0x4 7. "DBEN7,Port n Debounce Enable 7" "0: Disable debounce filter.,1: Enable debounce filter."
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bitfld.long 0x4 6. "DBEN6,Port n Debounce Enable 6" "0: Disable debounce filter.,1: Enable debounce filter."
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newline
|
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bitfld.long 0x4 5. "DBEN5,Port n Debounce Enable 5" "0: Disable debounce filter.,1: Enable debounce filter."
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bitfld.long 0x4 4. "DBEN4,Port n Debounce Enable 4" "0: Disable debounce filter.,1: Enable debounce filter."
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newline
|
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bitfld.long 0x4 3. "DBEN3,Port n Debounce Enable 3" "0: Disable debounce filter.,1: Enable debounce filter."
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bitfld.long 0x4 2. "DBEN2,Port n Debounce Enable 2" "0: Disable debounce filter.,1: Enable debounce filter."
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newline
|
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bitfld.long 0x4 1. "DBEN1,Port n Debounce Enable 1" "0: Disable debounce filter.,1: Enable debounce filter."
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bitfld.long 0x4 0. "DBEN0,Port n Debounce Enable 0" "0: Disable debounce filter.,1: Enable debounce filter."
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group.long 0x0++0x13
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line.long 0x0 "PD_MOD,Port n Mode Register"
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bitfld.long 0x0 14.--15. "MODE7,Port n Mode Selection 7" "0,1,2,3"
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bitfld.long 0x0 12.--13. "MODE6,Port n Mode Selection 6" "0,1,2,3"
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|
newline
|
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bitfld.long 0x0 10.--11. "MODE5,Port n Mode Selection 5" "0,1,2,3"
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bitfld.long 0x0 8.--9. "MODE4,Port n Mode Selection 4" "0,1,2,3"
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newline
|
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bitfld.long 0x0 6.--7. "MODE3,Port n Mode Selection 3" "0,1,2,3"
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bitfld.long 0x0 4.--5. "MODE2,Port n Mode Selection 2" "0,1,2,3"
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|
newline
|
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bitfld.long 0x0 2.--3. "MODE1,Port n Mode Selection 1" "0,1,2,3"
|
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bitfld.long 0x0 0.--1. "MODE0,Port n Mode Selection 0" "0,1,2,3"
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line.long 0x4 "PD_TYP,Port n Output Type Selection Register"
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bitfld.long 0x4 7. "TYP7,Port n Output Type Selection 7" "0,1"
|
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bitfld.long 0x4 6. "TYP6,Port n Output Type Selection 6" "0,1"
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newline
|
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bitfld.long 0x4 5. "TYP5,Port n Output Type Selection 5" "0,1"
|
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bitfld.long 0x4 4. "TYP4,Port n Output Type Selection 4" "0,1"
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newline
|
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bitfld.long 0x4 3. "TYP3,Port n Output Type Selection 3" "0,1"
|
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bitfld.long 0x4 2. "TYP2,Port n Output Type Selection 2" "0,1"
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|
newline
|
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bitfld.long 0x4 1. "TYP1,Port n Output Type Selection 1" "0,1"
|
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bitfld.long 0x4 0. "TYP0,Port n Output Type Selection 0" "0,1"
|
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line.long 0x8 "PD_AFSR1,Port n Alternative Function Selection Register 1"
|
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hexmask.long.byte 0x8 28.--31. 1. "AFSR7,Port n Alternative Function Selection 7"
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hexmask.long.byte 0x8 24.--27. 1. "AFSR6,Port n Alternative Function Selection 6"
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newline
|
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hexmask.long.byte 0x8 20.--23. 1. "AFSR5,Port n Alternative Function Selection 5"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AFSR4,Port n Alternative Function Selection 4"
|
|
newline
|
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hexmask.long.byte 0x8 12.--15. 1. "AFSR3,Port n Alternative Function Selection 3"
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hexmask.long.byte 0x8 8.--11. 1. "AFSR2,Port n Alternative Function Selection 2"
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newline
|
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hexmask.long.byte 0x8 4.--7. 1. "AFSR1,Port n Alternative Function Selection 1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AFSR0,Port n Alternative Function Selection 0"
|
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line.long 0xC "PD_AFSR2,Port n Alternative Function Selection Register 2"
|
|
line.long 0x10 "PD_PUPD,Port n Pull-Up/Down Resistor Selection Register"
|
|
bitfld.long 0x10 14.--15. "PUPD7,Port n Pull-Up/Down Resistor Selection 7" "0,1,2,3"
|
|
bitfld.long 0x10 12.--13. "PUPD6,Port n Pull-Up/Down Resistor Selection 6" "0,1,2,3"
|
|
newline
|
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bitfld.long 0x10 10.--11. "PUPD5,Port n Pull-Up/Down Resistor Selection 5" "0,1,2,3"
|
|
bitfld.long 0x10 8.--9. "PUPD4,Port n Pull-Up/Down Resistor Selection 4" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 6.--7. "PUPD3,Port n Pull-Up/Down Resistor Selection 3" "0,1,2,3"
|
|
bitfld.long 0x10 4.--5. "PUPD2,Port n Pull-Up/Down Resistor Selection 2" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 2.--3. "PUPD1,Port n Pull-Up/Down Resistor Selection 1" "0,1,2,3"
|
|
bitfld.long 0x10 0.--1. "PUPD0,Port n Pull-Up/Down Resistor Selection 0" "0,1,2,3"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "PD_INDR,Port n Input Data Register"
|
|
bitfld.long 0x0 7. "INDR7,Port n Input Data 7" "0,1"
|
|
bitfld.long 0x0 6. "INDR6,Port n Input Data 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "INDR5,Port n Input Data 5" "0,1"
|
|
bitfld.long 0x0 4. "INDR4,Port n Input Data 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "INDR3,Port n Input Data 3" "0,1"
|
|
bitfld.long 0x0 2. "INDR2,Port n Input Data 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "INDR1,Port n Input Data 1" "0,1"
|
|
bitfld.long 0x0 0. "INDR0,Port n Input Data 0" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "PD_OUTDR,Port n Output Data Register"
|
|
bitfld.long 0x0 7. "OUTDR7,Port n Output Data 7" "0,1"
|
|
bitfld.long 0x0 6. "OUTDR6,Port n Output Data 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OUTDR5,Port n Output Data 5" "0,1"
|
|
bitfld.long 0x0 4. "OUTDR4,Port n Output Data 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "OUTDR3,Port n Output Data 3" "0,1"
|
|
bitfld.long 0x0 2. "OUTDR2,Port n Output Data 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "OUTDR1,Port n Output Data 1" "0,1"
|
|
bitfld.long 0x0 0. "OUTDR0,Port n Output Data 0" "0,1"
|
|
wgroup.long 0x1C++0x7
|
|
line.long 0x0 "PD_BSR,Port n Output Bit Set Register"
|
|
bitfld.long 0x0 7. "BSR7,Port n Output Bit Set 7" "0,1"
|
|
bitfld.long 0x0 6. "BSR6,Port n Output Bit Set 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "BSR5,Port n Output Bit Set 5" "0,1"
|
|
bitfld.long 0x0 4. "BSR4,Port n Output Bit Set 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "BSR3,Port n Output Bit Set 3" "0,1"
|
|
bitfld.long 0x0 2. "BSR2,Port n Output Bit Set 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "BSR1,Port n Output Bit Set 1" "0,1"
|
|
bitfld.long 0x0 0. "BSR0,Port n Output Bit Set 0" "0,1"
|
|
line.long 0x4 "PD_BCR,Port n Output Bit Clear Register"
|
|
bitfld.long 0x4 7. "BCR7,Port n Output Bit Clear 7" "0,1"
|
|
bitfld.long 0x4 6. "BCR6,Port n Output Bit Clear 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "BCR5,Port n Output Bit Clear 5" "0,1"
|
|
bitfld.long 0x4 4. "BCR4,Port n Output Bit Clear 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "BCR3,Port n Output Bit Clear 3" "0,1"
|
|
bitfld.long 0x4 2. "BCR2,Port n Output Bit Clear 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "BCR1,Port n Output Bit Clear 1" "0,1"
|
|
bitfld.long 0x4 0. "BCR0,Port n Output Bit Clear 0" "0,1"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "PD_OUTDMSK,Port n Output Data Mask Register"
|
|
bitfld.long 0x0 7. "OUTDMSK7,Port n Output Data Mask 7" "0,1"
|
|
bitfld.long 0x0 6. "OUTDMSK6,Port n Output Data Mask 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OUTDMSK5,Port n Output Data Mask 5" "0,1"
|
|
bitfld.long 0x0 4. "OUTDMSK4,Port n Output Data Mask 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "OUTDMSK3,Port n Output Data Mask 3" "0,1"
|
|
bitfld.long 0x0 2. "OUTDMSK2,Port n Output Data Mask 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "OUTDMSK1,Port n Output Data Mask 1" "0,1"
|
|
bitfld.long 0x0 0. "OUTDMSK0,Port n Output Data Mask 0" "0,1"
|
|
line.long 0x4 "PD_DBCR,Port n Debounce Control Register"
|
|
bitfld.long 0x4 16.--18. "DBCLK,Port n Debounce Filter Sampling Clock Selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 7. "DBEN7,Port n Debounce Enable 7" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "DBEN6,Port n Debounce Enable 6" "0,1"
|
|
bitfld.long 0x4 5. "DBEN5,Port n Debounce Enable 5" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "DBEN4,Port n Debounce Enable 4" "0,1"
|
|
bitfld.long 0x4 3. "DBEN3,Port n Debounce Enable 3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "DBEN2,Port n Debounce Enable 2" "0,1"
|
|
bitfld.long 0x4 1. "DBEN1,Port n Debounce Enable 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "DBEN0,Port n Debounce Enable 0" "0,1"
|
|
tree.end
|
|
tree "PE"
|
|
base ad:0x30000400
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "MOD,Port n Mode Register"
|
|
bitfld.long 0x0 24.--25. "MODE12,Port n Mode Selection 12" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 22.--23. "MODE11,Port n Mode Selection 11" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "MODE10,Port n Mode Selection 10" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 18.--19. "MODE9,Port n Mode Selection 9" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "MODE8,Port n Mode Selection 8" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 14.--15. "MODE7,Port n Mode Selection 7" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "MODE6,Port n Mode Selection 6" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 10.--11. "MODE5,Port n Mode Selection 5" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "MODE4,Port n Mode Selection 4" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 6.--7. "MODE3,Port n Mode Selection 3" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "MODE2,Port n Mode Selection 2" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 2.--3. "MODE1,Port n Mode Selection 1" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MODE0,Port n Mode Selection 0" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
line.long 0x4 "TYP,Port n Output Type Selection Register"
|
|
bitfld.long 0x4 12. "TYP12,Port n Output Type Selection 12" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 11. "TYP11,Port n Output Type Selection 11" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 10. "TYP10,Port n Output Type Selection 10" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 9. "TYP9,Port n Output Type Selection 9" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 8. "TYP8,Port n Output Type Selection 8" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 7. "TYP7,Port n Output Type Selection 7" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 6. "TYP6,Port n Output Type Selection 6" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 5. "TYP5,Port n Output Type Selection 5" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TYP4,Port n Output Type Selection 4" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 3. "TYP3,Port n Output Type Selection 3" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 2. "TYP2,Port n Output Type Selection 2" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 1. "TYP1,Port n Output Type Selection 1" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 0. "TYP0,Port n Output Type Selection 0" "0: Push-Pull Output,1: Open-Drain Output"
|
|
line.long 0x8 "AFSR1,Port n Alternative Function Selection Register 1"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AFSR7,Port n Alternative Function Selection 7"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AFSR6,Port n Alternative Function Selection 6"
|
|
newline
|
|
hexmask.long.byte 0x8 20.--23. 1. "AFSR5,Port n Alternative Function Selection 5"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AFSR4,Port n Alternative Function Selection 4"
|
|
newline
|
|
hexmask.long.byte 0x8 12.--15. 1. "AFSR3,Port n Alternative Function Selection 3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AFSR2,Port n Alternative Function Selection 2"
|
|
newline
|
|
hexmask.long.byte 0x8 4.--7. 1. "AFSR1,Port n Alternative Function Selection 1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AFSR0,Port n Alternative Function Selection 0"
|
|
line.long 0xC "AFSR2,Port n Alternative Function Selection Register 2"
|
|
hexmask.long.byte 0xC 16.--19. 1. "AFSR12,Port n Alternative Function Selection 12"
|
|
hexmask.long.byte 0xC 12.--15. 1. "AFSR11,Port n Alternative Function Selection 11"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--11. 1. "AFSR10,Port n Alternative Function Selection 10"
|
|
hexmask.long.byte 0xC 4.--7. 1. "AFSR9,Port n Alternative Function Selection 9"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--3. 1. "AFSR8,Port n Alternative Function Selection 8"
|
|
line.long 0x10 "PUPD,Port n Pull-Up/Down Resistor Selection Register"
|
|
bitfld.long 0x10 24.--25. "PUPD12,Port n Pull-Up/Down Resistor Selection 12" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 22.--23. "PUPD11,Port n Pull-Up/Down Resistor Selection 11" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 20.--21. "PUPD10,Port n Pull-Up/Down Resistor Selection 10" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 18.--19. "PUPD9,Port n Pull-Up/Down Resistor Selection 9" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "PUPD8,Port n Pull-Up/Down Resistor Selection 8" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 14.--15. "PUPD7,Port n Pull-Up/Down Resistor Selection 7" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 12.--13. "PUPD6,Port n Pull-Up/Down Resistor Selection 6" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 10.--11. "PUPD5,Port n Pull-Up/Down Resistor Selection 5" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 8.--9. "PUPD4,Port n Pull-Up/Down Resistor Selection 4" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 6.--7. "PUPD3,Port n Pull-Up/Down Resistor Selection 3" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 4.--5. "PUPD2,Port n Pull-Up/Down Resistor Selection 2" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 2.--3. "PUPD1,Port n Pull-Up/Down Resistor Selection 1" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 0.--1. "PUPD0,Port n Pull-Up/Down Resistor Selection 0" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "INDR,Port n Input Data Register"
|
|
bitfld.long 0x0 12. "INDR12,Port n Input Data 12" "0,1"
|
|
bitfld.long 0x0 11. "INDR11,Port n Input Data 11" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "INDR10,Port n Input Data 10" "0,1"
|
|
bitfld.long 0x0 9. "INDR9,Port n Input Data 9" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "INDR8,Port n Input Data 8" "0,1"
|
|
bitfld.long 0x0 7. "INDR7,Port n Input Data 7" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "INDR6,Port n Input Data 6" "0,1"
|
|
bitfld.long 0x0 5. "INDR5,Port n Input Data 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "INDR4,Port n Input Data 4" "0,1"
|
|
bitfld.long 0x0 3. "INDR3,Port n Input Data 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "INDR2,Port n Input Data 2" "0,1"
|
|
bitfld.long 0x0 1. "INDR1,Port n Input Data 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "INDR0,Port n Input Data 0" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "OUTDR,Port n Output Data Register"
|
|
bitfld.long 0x0 12. "OUTDR12,Port n Output Data 12" "0,1"
|
|
bitfld.long 0x0 11. "OUTDR11,Port n Output Data 11" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OUTDR10,Port n Output Data 10" "0,1"
|
|
bitfld.long 0x0 9. "OUTDR9,Port n Output Data 9" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OUTDR8,Port n Output Data 8" "0,1"
|
|
bitfld.long 0x0 7. "OUTDR7,Port n Output Data 7" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "OUTDR6,Port n Output Data 6" "0,1"
|
|
bitfld.long 0x0 5. "OUTDR5,Port n Output Data 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "OUTDR4,Port n Output Data 4" "0,1"
|
|
bitfld.long 0x0 3. "OUTDR3,Port n Output Data 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "OUTDR2,Port n Output Data 2" "0,1"
|
|
bitfld.long 0x0 1. "OUTDR1,Port n Output Data 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OUTDR0,Port n Output Data 0" "0,1"
|
|
wgroup.long 0x1C++0x7
|
|
line.long 0x0 "BSR,Port n Output Bit Set Register"
|
|
bitfld.long 0x0 12. "BSR12,Port n Output Bit Set 12" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 11. "BSR11,Port n Output Bit Set 11" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 10. "BSR10,Port n Output Bit Set 10" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 9. "BSR9,Port n Output Bit Set 9" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 8. "BSR8,Port n Output Bit Set 8" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 7. "BSR7,Port n Output Bit Set 7" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 6. "BSR6,Port n Output Bit Set 6" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 5. "BSR5,Port n Output Bit Set 5" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 4. "BSR4,Port n Output Bit Set 4" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 3. "BSR3,Port n Output Bit Set 3" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 2. "BSR2,Port n Output Bit Set 2" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 1. "BSR1,Port n Output Bit Set 1" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 0. "BSR0,Port n Output Bit Set 0" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
line.long 0x4 "BCR,Port n Output Bit Clear Register"
|
|
bitfld.long 0x4 12. "BCR12,Port n Output Bit Clear 12" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 11. "BCR11,Port n Output Bit Clear 11" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 10. "BCR10,Port n Output Bit Clear 10" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 9. "BCR9,Port n Output Bit Clear 9" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 8. "BCR8,Port n Output Bit Clear 8" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 7. "BCR7,Port n Output Bit Clear 7" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 6. "BCR6,Port n Output Bit Clear 6" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 5. "BCR5,Port n Output Bit Clear 5" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 4. "BCR4,Port n Output Bit Clear 4" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 3. "BCR3,Port n Output Bit Clear 3" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 2. "BCR2,Port n Output Bit Clear 2" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 1. "BCR1,Port n Output Bit Clear 1" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 0. "BCR0,Port n Output Bit Clear 0" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "OUTDMSK,Port n Output Data Mask Register"
|
|
bitfld.long 0x0 12. "OUTDMSK12,Port n Output Data Mask 12" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 11. "OUTDMSK11,Port n Output Data Mask 11" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 10. "OUTDMSK10,Port n Output Data Mask 10" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 9. "OUTDMSK9,Port n Output Data Mask 9" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 8. "OUTDMSK8,Port n Output Data Mask 8" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 7. "OUTDMSK7,Port n Output Data Mask 7" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 6. "OUTDMSK6,Port n Output Data Mask 6" "0,1"
|
|
bitfld.long 0x0 5. "OUTDMSK5,Port n Output Data Mask 5" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 4. "OUTDMSK4,Port n Output Data Mask 4" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 3. "OUTDMSK3,Port n Output Data Mask 3" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 2. "OUTDMSK2,Port n Output Data Mask 2" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 1. "OUTDMSK1,Port n Output Data Mask 1" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 0. "OUTDMSK0,Port n Output Data Mask 0" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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|
line.long 0x4 "DBCR,Port n Debounce Control Register"
|
|
bitfld.long 0x4 16.--18. "DBCLK,Port n Debounce Filter Sampling Clock Selection" "0: HCLK/1,1: HCLK/4,2: HCLK/16,3: HCLK/64,4: HCLK/256,5: HCLK/1024,?,?"
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|
bitfld.long 0x4 12. "DBEN12,Port n Debounce Enable 12" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 11. "DBEN11,Port n Debounce Enable 11" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 10. "DBEN10,Port n Debounce Enable 10" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 9. "DBEN9,Port n Debounce Enable 9" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 8. "DBEN8,Port n Debounce Enable 8" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 7. "DBEN7,Port n Debounce Enable 7" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 6. "DBEN6,Port n Debounce Enable 6" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 5. "DBEN5,Port n Debounce Enable 5" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 4. "DBEN4,Port n Debounce Enable 4" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 3. "DBEN3,Port n Debounce Enable 3" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 2. "DBEN2,Port n Debounce Enable 2" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 1. "DBEN1,Port n Debounce Enable 1" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 0. "DBEN0,Port n Debounce Enable 0" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "PE_MOD,Port n Mode Register"
|
|
bitfld.long 0x0 8.--9. "MODE4,Port n Mode Selection 4" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "MODE3,Port n Mode Selection 3" "0,1,2,3"
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|
newline
|
|
bitfld.long 0x0 4.--5. "MODE2,Port n Mode Selection 2" "0,1,2,3"
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|
bitfld.long 0x0 2.--3. "MODE1,Port n Mode Selection 1" "0,1,2,3"
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|
newline
|
|
bitfld.long 0x0 0.--1. "MODE0,Port n Mode Selection 0" "0,1,2,3"
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|
line.long 0x4 "PE_TYP,Port n Output Type Selection Register"
|
|
bitfld.long 0x4 4. "TYP4,Port n Output Type Selection 4" "0,1"
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|
bitfld.long 0x4 3. "TYP3,Port n Output Type Selection 3" "0,1"
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|
newline
|
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bitfld.long 0x4 2. "TYP2,Port n Output Type Selection 2" "0,1"
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|
bitfld.long 0x4 1. "TYP1,Port n Output Type Selection 1" "0,1"
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|
newline
|
|
bitfld.long 0x4 0. "TYP0,Port n Output Type Selection 0" "0,1"
|
|
line.long 0x8 "PE_AFSR1,Port n Alternative Function Selection Register 1"
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|
hexmask.long.byte 0x8 16.--19. 1. "AFSR4,Port n Alternative Function Selection 4"
|
|
hexmask.long.byte 0x8 12.--15. 1. "AFSR3,Port n Alternative Function Selection 3"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--11. 1. "AFSR2,Port n Alternative Function Selection 2"
|
|
hexmask.long.byte 0x8 4.--7. 1. "AFSR1,Port n Alternative Function Selection 1"
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|
newline
|
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hexmask.long.byte 0x8 0.--3. 1. "AFSR0,Port n Alternative Function Selection 0"
|
|
line.long 0xC "PE_AFSR2,Port n Alternative Function Selection Register 2"
|
|
line.long 0x10 "PE_PUPD,Port n Pull-Up/Down Resistor Selection Register"
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|
bitfld.long 0x10 8.--9. "PUPD4,Port n Pull-Up/Down Resistor Selection 4" "0,1,2,3"
|
|
bitfld.long 0x10 6.--7. "PUPD3,Port n Pull-Up/Down Resistor Selection 3" "0,1,2,3"
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|
newline
|
|
bitfld.long 0x10 4.--5. "PUPD2,Port n Pull-Up/Down Resistor Selection 2" "0,1,2,3"
|
|
bitfld.long 0x10 2.--3. "PUPD1,Port n Pull-Up/Down Resistor Selection 1" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 0.--1. "PUPD0,Port n Pull-Up/Down Resistor Selection 0" "0,1,2,3"
|
|
rgroup.long 0x14++0x3
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line.long 0x0 "PE_INDR,Port n Input Data Register"
|
|
bitfld.long 0x0 4. "INDR4,Port n Input Data 4" "0,1"
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bitfld.long 0x0 3. "INDR3,Port n Input Data 3" "0,1"
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|
newline
|
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bitfld.long 0x0 2. "INDR2,Port n Input Data 2" "0,1"
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|
bitfld.long 0x0 1. "INDR1,Port n Input Data 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "INDR0,Port n Input Data 0" "0,1"
|
|
group.long 0x18++0x3
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|
line.long 0x0 "PE_OUTDR,Port n Output Data Register"
|
|
bitfld.long 0x0 4. "OUTDR4,Port n Output Data 4" "0,1"
|
|
bitfld.long 0x0 3. "OUTDR3,Port n Output Data 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "OUTDR2,Port n Output Data 2" "0,1"
|
|
bitfld.long 0x0 1. "OUTDR1,Port n Output Data 1" "0,1"
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|
newline
|
|
bitfld.long 0x0 0. "OUTDR0,Port n Output Data 0" "0,1"
|
|
wgroup.long 0x1C++0x7
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|
line.long 0x0 "PE_BSR,Port n Output Bit Set Register"
|
|
bitfld.long 0x0 4. "BSR4,Port n Output Bit Set 4" "0,1"
|
|
bitfld.long 0x0 3. "BSR3,Port n Output Bit Set 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "BSR2,Port n Output Bit Set 2" "0,1"
|
|
bitfld.long 0x0 1. "BSR1,Port n Output Bit Set 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "BSR0,Port n Output Bit Set 0" "0,1"
|
|
line.long 0x4 "PE_BCR,Port n Output Bit Clear Register"
|
|
bitfld.long 0x4 4. "BCR4,Port n Output Bit Clear 4" "0,1"
|
|
bitfld.long 0x4 3. "BCR3,Port n Output Bit Clear 3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "BCR2,Port n Output Bit Clear 2" "0,1"
|
|
bitfld.long 0x4 1. "BCR1,Port n Output Bit Clear 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "BCR0,Port n Output Bit Clear 0" "0,1"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "PE_OUTDMSK,Port n Output Data Mask Register"
|
|
bitfld.long 0x0 4. "OUTDMSK4,Port n Output Data Mask 4" "0,1"
|
|
bitfld.long 0x0 3. "OUTDMSK3,Port n Output Data Mask 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "OUTDMSK2,Port n Output Data Mask 2" "0,1"
|
|
bitfld.long 0x0 1. "OUTDMSK1,Port n Output Data Mask 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OUTDMSK0,Port n Output Data Mask 0" "0,1"
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|
line.long 0x4 "PE_DBCR,Port n Debounce Control Register"
|
|
bitfld.long 0x4 16.--18. "DBCLK,Port n Debounce Filter Sampling Clock Selection" "0,1,2,3,4,5,6,7"
|
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bitfld.long 0x4 4. "DBEN4,Port n Debounce Enable 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "DBEN3,Port n Debounce Enable 3" "0,1"
|
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bitfld.long 0x4 2. "DBEN2,Port n Debounce Enable 2" "0,1"
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|
newline
|
|
bitfld.long 0x4 1. "DBEN1,Port n Debounce Enable 1" "0,1"
|
|
bitfld.long 0x4 0. "DBEN0,Port n Debounce Enable 0" "0,1"
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tree.end
|
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tree "PF"
|
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base ad:0x30000500
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group.long 0x0++0x13
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line.long 0x0 "MOD,Port n Mode Register"
|
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bitfld.long 0x0 24.--25. "MODE12,Port n Mode Selection 12" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
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bitfld.long 0x0 22.--23. "MODE11,Port n Mode Selection 11" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "MODE10,Port n Mode Selection 10" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
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bitfld.long 0x0 18.--19. "MODE9,Port n Mode Selection 9" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "MODE8,Port n Mode Selection 8" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 14.--15. "MODE7,Port n Mode Selection 7" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "MODE6,Port n Mode Selection 6" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 10.--11. "MODE5,Port n Mode Selection 5" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "MODE4,Port n Mode Selection 4" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 6.--7. "MODE3,Port n Mode Selection 3" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "MODE2,Port n Mode Selection 2" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 2.--3. "MODE1,Port n Mode Selection 1" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MODE0,Port n Mode Selection 0" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
line.long 0x4 "TYP,Port n Output Type Selection Register"
|
|
bitfld.long 0x4 12. "TYP12,Port n Output Type Selection 12" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 11. "TYP11,Port n Output Type Selection 11" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 10. "TYP10,Port n Output Type Selection 10" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 9. "TYP9,Port n Output Type Selection 9" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 8. "TYP8,Port n Output Type Selection 8" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 7. "TYP7,Port n Output Type Selection 7" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 6. "TYP6,Port n Output Type Selection 6" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 5. "TYP5,Port n Output Type Selection 5" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TYP4,Port n Output Type Selection 4" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 3. "TYP3,Port n Output Type Selection 3" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 2. "TYP2,Port n Output Type Selection 2" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 1. "TYP1,Port n Output Type Selection 1" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 0. "TYP0,Port n Output Type Selection 0" "0: Push-Pull Output,1: Open-Drain Output"
|
|
line.long 0x8 "AFSR1,Port n Alternative Function Selection Register 1"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AFSR7,Port n Alternative Function Selection 7"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AFSR6,Port n Alternative Function Selection 6"
|
|
newline
|
|
hexmask.long.byte 0x8 20.--23. 1. "AFSR5,Port n Alternative Function Selection 5"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AFSR4,Port n Alternative Function Selection 4"
|
|
newline
|
|
hexmask.long.byte 0x8 12.--15. 1. "AFSR3,Port n Alternative Function Selection 3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AFSR2,Port n Alternative Function Selection 2"
|
|
newline
|
|
hexmask.long.byte 0x8 4.--7. 1. "AFSR1,Port n Alternative Function Selection 1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AFSR0,Port n Alternative Function Selection 0"
|
|
line.long 0xC "AFSR2,Port n Alternative Function Selection Register 2"
|
|
hexmask.long.byte 0xC 16.--19. 1. "AFSR12,Port n Alternative Function Selection 12"
|
|
hexmask.long.byte 0xC 12.--15. 1. "AFSR11,Port n Alternative Function Selection 11"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--11. 1. "AFSR10,Port n Alternative Function Selection 10"
|
|
hexmask.long.byte 0xC 4.--7. 1. "AFSR9,Port n Alternative Function Selection 9"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--3. 1. "AFSR8,Port n Alternative Function Selection 8"
|
|
line.long 0x10 "PUPD,Port n Pull-Up/Down Resistor Selection Register"
|
|
bitfld.long 0x10 24.--25. "PUPD12,Port n Pull-Up/Down Resistor Selection 12" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 22.--23. "PUPD11,Port n Pull-Up/Down Resistor Selection 11" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 20.--21. "PUPD10,Port n Pull-Up/Down Resistor Selection 10" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 18.--19. "PUPD9,Port n Pull-Up/Down Resistor Selection 9" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "PUPD8,Port n Pull-Up/Down Resistor Selection 8" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 14.--15. "PUPD7,Port n Pull-Up/Down Resistor Selection 7" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 12.--13. "PUPD6,Port n Pull-Up/Down Resistor Selection 6" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 10.--11. "PUPD5,Port n Pull-Up/Down Resistor Selection 5" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 8.--9. "PUPD4,Port n Pull-Up/Down Resistor Selection 4" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 6.--7. "PUPD3,Port n Pull-Up/Down Resistor Selection 3" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 4.--5. "PUPD2,Port n Pull-Up/Down Resistor Selection 2" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 2.--3. "PUPD1,Port n Pull-Up/Down Resistor Selection 1" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 0.--1. "PUPD0,Port n Pull-Up/Down Resistor Selection 0" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "INDR,Port n Input Data Register"
|
|
bitfld.long 0x0 12. "INDR12,Port n Input Data 12" "0,1"
|
|
bitfld.long 0x0 11. "INDR11,Port n Input Data 11" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "INDR10,Port n Input Data 10" "0,1"
|
|
bitfld.long 0x0 9. "INDR9,Port n Input Data 9" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "INDR8,Port n Input Data 8" "0,1"
|
|
bitfld.long 0x0 7. "INDR7,Port n Input Data 7" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "INDR6,Port n Input Data 6" "0,1"
|
|
bitfld.long 0x0 5. "INDR5,Port n Input Data 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "INDR4,Port n Input Data 4" "0,1"
|
|
bitfld.long 0x0 3. "INDR3,Port n Input Data 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "INDR2,Port n Input Data 2" "0,1"
|
|
bitfld.long 0x0 1. "INDR1,Port n Input Data 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "INDR0,Port n Input Data 0" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "OUTDR,Port n Output Data Register"
|
|
bitfld.long 0x0 12. "OUTDR12,Port n Output Data 12" "0,1"
|
|
bitfld.long 0x0 11. "OUTDR11,Port n Output Data 11" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OUTDR10,Port n Output Data 10" "0,1"
|
|
bitfld.long 0x0 9. "OUTDR9,Port n Output Data 9" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OUTDR8,Port n Output Data 8" "0,1"
|
|
bitfld.long 0x0 7. "OUTDR7,Port n Output Data 7" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "OUTDR6,Port n Output Data 6" "0,1"
|
|
bitfld.long 0x0 5. "OUTDR5,Port n Output Data 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "OUTDR4,Port n Output Data 4" "0,1"
|
|
bitfld.long 0x0 3. "OUTDR3,Port n Output Data 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "OUTDR2,Port n Output Data 2" "0,1"
|
|
bitfld.long 0x0 1. "OUTDR1,Port n Output Data 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OUTDR0,Port n Output Data 0" "0,1"
|
|
wgroup.long 0x1C++0x7
|
|
line.long 0x0 "BSR,Port n Output Bit Set Register"
|
|
bitfld.long 0x0 12. "BSR12,Port n Output Bit Set 12" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 11. "BSR11,Port n Output Bit Set 11" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 10. "BSR10,Port n Output Bit Set 10" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 9. "BSR9,Port n Output Bit Set 9" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 8. "BSR8,Port n Output Bit Set 8" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 7. "BSR7,Port n Output Bit Set 7" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 6. "BSR6,Port n Output Bit Set 6" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 5. "BSR5,Port n Output Bit Set 5" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 4. "BSR4,Port n Output Bit Set 4" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 3. "BSR3,Port n Output Bit Set 3" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 2. "BSR2,Port n Output Bit Set 2" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 1. "BSR1,Port n Output Bit Set 1" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 0. "BSR0,Port n Output Bit Set 0" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
line.long 0x4 "BCR,Port n Output Bit Clear Register"
|
|
bitfld.long 0x4 12. "BCR12,Port n Output Bit Clear 12" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 11. "BCR11,Port n Output Bit Clear 11" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 10. "BCR10,Port n Output Bit Clear 10" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 9. "BCR9,Port n Output Bit Clear 9" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 8. "BCR8,Port n Output Bit Clear 8" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 7. "BCR7,Port n Output Bit Clear 7" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 6. "BCR6,Port n Output Bit Clear 6" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 5. "BCR5,Port n Output Bit Clear 5" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 4. "BCR4,Port n Output Bit Clear 4" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 3. "BCR3,Port n Output Bit Clear 3" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 2. "BCR2,Port n Output Bit Clear 2" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 1. "BCR1,Port n Output Bit Clear 1" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 0. "BCR0,Port n Output Bit Clear 0" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "OUTDMSK,Port n Output Data Mask Register"
|
|
bitfld.long 0x0 12. "OUTDMSK12,Port n Output Data Mask 12" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 11. "OUTDMSK11,Port n Output Data Mask 11" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
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bitfld.long 0x0 10. "OUTDMSK10,Port n Output Data Mask 10" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 9. "OUTDMSK9,Port n Output Data Mask 9" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 8. "OUTDMSK8,Port n Output Data Mask 8" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 7. "OUTDMSK7,Port n Output Data Mask 7" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
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|
newline
|
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bitfld.long 0x0 6. "OUTDMSK6,Port n Output Data Mask 6" "0,1"
|
|
bitfld.long 0x0 5. "OUTDMSK5,Port n Output Data Mask 5" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
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bitfld.long 0x0 4. "OUTDMSK4,Port n Output Data Mask 4" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 3. "OUTDMSK3,Port n Output Data Mask 3" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 2. "OUTDMSK2,Port n Output Data Mask 2" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 1. "OUTDMSK1,Port n Output Data Mask 1" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 0. "OUTDMSK0,Port n Output Data Mask 0" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
line.long 0x4 "DBCR,Port n Debounce Control Register"
|
|
bitfld.long 0x4 16.--18. "DBCLK,Port n Debounce Filter Sampling Clock Selection" "0: HCLK/1,1: HCLK/4,2: HCLK/16,3: HCLK/64,4: HCLK/256,5: HCLK/1024,?,?"
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|
bitfld.long 0x4 12. "DBEN12,Port n Debounce Enable 12" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
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bitfld.long 0x4 11. "DBEN11,Port n Debounce Enable 11" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 10. "DBEN10,Port n Debounce Enable 10" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 9. "DBEN9,Port n Debounce Enable 9" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 8. "DBEN8,Port n Debounce Enable 8" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 7. "DBEN7,Port n Debounce Enable 7" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 6. "DBEN6,Port n Debounce Enable 6" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 5. "DBEN5,Port n Debounce Enable 5" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 4. "DBEN4,Port n Debounce Enable 4" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
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bitfld.long 0x4 3. "DBEN3,Port n Debounce Enable 3" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 2. "DBEN2,Port n Debounce Enable 2" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 1. "DBEN1,Port n Debounce Enable 1" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 0. "DBEN0,Port n Debounce Enable 0" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "PF_MOD,Port n Mode Register"
|
|
bitfld.long 0x0 6.--7. "MODE3,Port n Mode Selection 3" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODE2,Port n Mode Selection 2" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE1,Port n Mode Selection 1" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODE0,Port n Mode Selection 0" "0,1,2,3"
|
|
line.long 0x4 "PF_TYP,Port n Output Type Selection Register"
|
|
bitfld.long 0x4 3. "TYP3,Port n Output Type Selection 3" "0,1"
|
|
bitfld.long 0x4 2. "TYP2,Port n Output Type Selection 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "TYP1,Port n Output Type Selection 1" "0,1"
|
|
bitfld.long 0x4 0. "TYP0,Port n Output Type Selection 0" "0,1"
|
|
line.long 0x8 "PF_AFSR1,Port n Alternative Function Selection Register 1"
|
|
hexmask.long.byte 0x8 12.--15. 1. "AFSR3,Port n Alternative Function Selection 3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AFSR2,Port n Alternative Function Selection 2"
|
|
newline
|
|
hexmask.long.byte 0x8 4.--7. 1. "AFSR1,Port n Alternative Function Selection 1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AFSR0,Port n Alternative Function Selection 0"
|
|
line.long 0xC "PF_AFSR2,Port n Alternative Function Selection Register 2"
|
|
line.long 0x10 "PF_PUPD,Port n Pull-Up/Down Resistor Selection Register"
|
|
bitfld.long 0x10 6.--7. "PUPD3,Port n Pull-Up/Down Resistor Selection 3" "0,1,2,3"
|
|
bitfld.long 0x10 4.--5. "PUPD2,Port n Pull-Up/Down Resistor Selection 2" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 2.--3. "PUPD1,Port n Pull-Up/Down Resistor Selection 1" "0,1,2,3"
|
|
bitfld.long 0x10 0.--1. "PUPD0,Port n Pull-Up/Down Resistor Selection 0" "0,1,2,3"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "PF_INDR,Port n Input Data Register"
|
|
bitfld.long 0x0 3. "INDR3,Port n Input Data 3" "0,1"
|
|
bitfld.long 0x0 2. "INDR2,Port n Input Data 2" "0,1"
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|
newline
|
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bitfld.long 0x0 1. "INDR1,Port n Input Data 1" "0,1"
|
|
bitfld.long 0x0 0. "INDR0,Port n Input Data 0" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "PF_OUTDR,Port n Output Data Register"
|
|
bitfld.long 0x0 3. "OUTDR3,Port n Output Data 3" "0,1"
|
|
bitfld.long 0x0 2. "OUTDR2,Port n Output Data 2" "0,1"
|
|
newline
|
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bitfld.long 0x0 1. "OUTDR1,Port n Output Data 1" "0,1"
|
|
bitfld.long 0x0 0. "OUTDR0,Port n Output Data 0" "0,1"
|
|
wgroup.long 0x1C++0x7
|
|
line.long 0x0 "PF_BSR,Port n Output Bit Set Register"
|
|
bitfld.long 0x0 3. "BSR3,Port n Output Bit Set 3" "0,1"
|
|
bitfld.long 0x0 2. "BSR2,Port n Output Bit Set 2" "0,1"
|
|
newline
|
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bitfld.long 0x0 1. "BSR1,Port n Output Bit Set 1" "0,1"
|
|
bitfld.long 0x0 0. "BSR0,Port n Output Bit Set 0" "0,1"
|
|
line.long 0x4 "PF_BCR,Port n Output Bit Clear Register"
|
|
bitfld.long 0x4 3. "BCR3,Port n Output Bit Clear 3" "0,1"
|
|
bitfld.long 0x4 2. "BCR2,Port n Output Bit Clear 2" "0,1"
|
|
newline
|
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bitfld.long 0x4 1. "BCR1,Port n Output Bit Clear 1" "0,1"
|
|
bitfld.long 0x4 0. "BCR0,Port n Output Bit Clear 0" "0,1"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "PF_OUTDMSK,Port n Output Data Mask Register"
|
|
bitfld.long 0x0 3. "OUTDMSK3,Port n Output Data Mask 3" "0,1"
|
|
bitfld.long 0x0 2. "OUTDMSK2,Port n Output Data Mask 2" "0,1"
|
|
newline
|
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bitfld.long 0x0 1. "OUTDMSK1,Port n Output Data Mask 1" "0,1"
|
|
bitfld.long 0x0 0. "OUTDMSK0,Port n Output Data Mask 0" "0,1"
|
|
line.long 0x4 "PF_DBCR,Port n Debounce Control Register"
|
|
bitfld.long 0x4 16.--18. "DBCLK,Port n Debounce Filter Sampling Clock Selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "DBEN3,Port n Debounce Enable 3" "0,1"
|
|
newline
|
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bitfld.long 0x4 2. "DBEN2,Port n Debounce Enable 2" "0,1"
|
|
bitfld.long 0x4 1. "DBEN1,Port n Debounce Enable 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "DBEN0,Port n Debounce Enable 0" "0,1"
|
|
tree.end
|
|
tree "Pn"
|
|
base ad:0x50000000
|
|
group.long 0x0++0x13
|
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line.long 0x0 "MOD,Port n Mode Register"
|
|
bitfld.long 0x0 24.--25. "MODE12,Port n Mode Selection 12" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 22.--23. "MODE11,Port n Mode Selection 11" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
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bitfld.long 0x0 20.--21. "MODE10,Port n Mode Selection 10" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 18.--19. "MODE9,Port n Mode Selection 9" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
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bitfld.long 0x0 16.--17. "MODE8,Port n Mode Selection 8" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 14.--15. "MODE7,Port n Mode Selection 7" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "MODE6,Port n Mode Selection 6" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 10.--11. "MODE5,Port n Mode Selection 5" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "MODE4,Port n Mode Selection 4" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 6.--7. "MODE3,Port n Mode Selection 3" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "MODE2,Port n Mode Selection 2" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
bitfld.long 0x0 2.--3. "MODE1,Port n Mode Selection 1" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "MODE0,Port n Mode Selection 0" "0: Input Mode,1: Output Mode,2: Alternative Function Mode,?"
|
|
line.long 0x4 "TYP,Port n Output Type Selection Register"
|
|
bitfld.long 0x4 12. "TYP12,Port n Output Type Selection 12" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 11. "TYP11,Port n Output Type Selection 11" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 10. "TYP10,Port n Output Type Selection 10" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 9. "TYP9,Port n Output Type Selection 9" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 8. "TYP8,Port n Output Type Selection 8" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 7. "TYP7,Port n Output Type Selection 7" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 6. "TYP6,Port n Output Type Selection 6" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 5. "TYP5,Port n Output Type Selection 5" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TYP4,Port n Output Type Selection 4" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 3. "TYP3,Port n Output Type Selection 3" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 2. "TYP2,Port n Output Type Selection 2" "0: Push-Pull Output,1: Open-Drain Output"
|
|
bitfld.long 0x4 1. "TYP1,Port n Output Type Selection 1" "0: Push-Pull Output,1: Open-Drain Output"
|
|
newline
|
|
bitfld.long 0x4 0. "TYP0,Port n Output Type Selection 0" "0: Push-Pull Output,1: Open-Drain Output"
|
|
line.long 0x8 "AFSR1,Port n Alternative Function Selection Register 1"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AFSR7,Port n Alternative Function Selection 7"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AFSR6,Port n Alternative Function Selection 6"
|
|
newline
|
|
hexmask.long.byte 0x8 20.--23. 1. "AFSR5,Port n Alternative Function Selection 5"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AFSR4,Port n Alternative Function Selection 4"
|
|
newline
|
|
hexmask.long.byte 0x8 12.--15. 1. "AFSR3,Port n Alternative Function Selection 3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AFSR2,Port n Alternative Function Selection 2"
|
|
newline
|
|
hexmask.long.byte 0x8 4.--7. 1. "AFSR1,Port n Alternative Function Selection 1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AFSR0,Port n Alternative Function Selection 0"
|
|
line.long 0xC "AFSR2,Port n Alternative Function Selection Register 2"
|
|
hexmask.long.byte 0xC 16.--19. 1. "AFSR12,Port n Alternative Function Selection 12"
|
|
hexmask.long.byte 0xC 12.--15. 1. "AFSR11,Port n Alternative Function Selection 11"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--11. 1. "AFSR10,Port n Alternative Function Selection 10"
|
|
hexmask.long.byte 0xC 4.--7. 1. "AFSR9,Port n Alternative Function Selection 9"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--3. 1. "AFSR8,Port n Alternative Function Selection 8"
|
|
line.long 0x10 "PUPD,Port n Pull-Up/Down Resistor Selection Register"
|
|
bitfld.long 0x10 24.--25. "PUPD12,Port n Pull-Up/Down Resistor Selection 12" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 22.--23. "PUPD11,Port n Pull-Up/Down Resistor Selection 11" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 20.--21. "PUPD10,Port n Pull-Up/Down Resistor Selection 10" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 18.--19. "PUPD9,Port n Pull-Up/Down Resistor Selection 9" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "PUPD8,Port n Pull-Up/Down Resistor Selection 8" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 14.--15. "PUPD7,Port n Pull-Up/Down Resistor Selection 7" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 12.--13. "PUPD6,Port n Pull-Up/Down Resistor Selection 6" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 10.--11. "PUPD5,Port n Pull-Up/Down Resistor Selection 5" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 8.--9. "PUPD4,Port n Pull-Up/Down Resistor Selection 4" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 6.--7. "PUPD3,Port n Pull-Up/Down Resistor Selection 3" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 4.--5. "PUPD2,Port n Pull-Up/Down Resistor Selection 2" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
bitfld.long 0x10 2.--3. "PUPD1,Port n Pull-Up/Down Resistor Selection 1" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
newline
|
|
bitfld.long 0x10 0.--1. "PUPD0,Port n Pull-Up/Down Resistor Selection 0" "0: Disable pull-up/down resistor.,1: Enable pull-up resistor.,2: Enable pull-down resistor.,?"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "INDR,Port n Input Data Register"
|
|
bitfld.long 0x0 12. "INDR12,Port n Input Data 12" "0,1"
|
|
bitfld.long 0x0 11. "INDR11,Port n Input Data 11" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "INDR10,Port n Input Data 10" "0,1"
|
|
bitfld.long 0x0 9. "INDR9,Port n Input Data 9" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "INDR8,Port n Input Data 8" "0,1"
|
|
bitfld.long 0x0 7. "INDR7,Port n Input Data 7" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "INDR6,Port n Input Data 6" "0,1"
|
|
bitfld.long 0x0 5. "INDR5,Port n Input Data 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "INDR4,Port n Input Data 4" "0,1"
|
|
bitfld.long 0x0 3. "INDR3,Port n Input Data 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "INDR2,Port n Input Data 2" "0,1"
|
|
bitfld.long 0x0 1. "INDR1,Port n Input Data 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "INDR0,Port n Input Data 0" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "OUTDR,Port n Output Data Register"
|
|
bitfld.long 0x0 12. "OUTDR12,Port n Output Data 12" "0,1"
|
|
bitfld.long 0x0 11. "OUTDR11,Port n Output Data 11" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OUTDR10,Port n Output Data 10" "0,1"
|
|
bitfld.long 0x0 9. "OUTDR9,Port n Output Data 9" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "OUTDR8,Port n Output Data 8" "0,1"
|
|
bitfld.long 0x0 7. "OUTDR7,Port n Output Data 7" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "OUTDR6,Port n Output Data 6" "0,1"
|
|
bitfld.long 0x0 5. "OUTDR5,Port n Output Data 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "OUTDR4,Port n Output Data 4" "0,1"
|
|
bitfld.long 0x0 3. "OUTDR3,Port n Output Data 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "OUTDR2,Port n Output Data 2" "0,1"
|
|
bitfld.long 0x0 1. "OUTDR1,Port n Output Data 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "OUTDR0,Port n Output Data 0" "0,1"
|
|
wgroup.long 0x1C++0x7
|
|
line.long 0x0 "BSR,Port n Output Bit Set Register"
|
|
bitfld.long 0x0 12. "BSR12,Port n Output Bit Set 12" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 11. "BSR11,Port n Output Bit Set 11" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 10. "BSR10,Port n Output Bit Set 10" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 9. "BSR9,Port n Output Bit Set 9" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 8. "BSR8,Port n Output Bit Set 8" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 7. "BSR7,Port n Output Bit Set 7" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 6. "BSR6,Port n Output Bit Set 6" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 5. "BSR5,Port n Output Bit Set 5" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 4. "BSR4,Port n Output Bit Set 4" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 3. "BSR3,Port n Output Bit Set 3" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 2. "BSR2,Port n Output Bit Set 2" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
bitfld.long 0x0 1. "BSR1,Port n Output Bit Set 1" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
newline
|
|
bitfld.long 0x0 0. "BSR0,Port n Output Bit Set 0" "0: No effect.,1: Set the corresponding OUTDRx bit (Automatically.."
|
|
line.long 0x4 "BCR,Port n Output Bit Clear Register"
|
|
bitfld.long 0x4 12. "BCR12,Port n Output Bit Clear 12" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 11. "BCR11,Port n Output Bit Clear 11" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 10. "BCR10,Port n Output Bit Clear 10" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 9. "BCR9,Port n Output Bit Clear 9" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 8. "BCR8,Port n Output Bit Clear 8" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 7. "BCR7,Port n Output Bit Clear 7" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 6. "BCR6,Port n Output Bit Clear 6" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 5. "BCR5,Port n Output Bit Clear 5" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 4. "BCR4,Port n Output Bit Clear 4" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 3. "BCR3,Port n Output Bit Clear 3" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 2. "BCR2,Port n Output Bit Clear 2" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
bitfld.long 0x4 1. "BCR1,Port n Output Bit Clear 1" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
newline
|
|
bitfld.long 0x4 0. "BCR0,Port n Output Bit Clear 0" "0: No effect.,1: Clear the corresponding OUTDRx bit."
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "OUTDMSK,Port n Output Data Mask Register"
|
|
bitfld.long 0x0 12. "OUTDMSK12,Port n Output Data Mask 12" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 11. "OUTDMSK11,Port n Output Data Mask 11" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 10. "OUTDMSK10,Port n Output Data Mask 10" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 9. "OUTDMSK9,Port n Output Data Mask 9" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 8. "OUTDMSK8,Port n Output Data Mask 8" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 7. "OUTDMSK7,Port n Output Data Mask 7" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 6. "OUTDMSK6,Port n Output Data Mask 6" "0,1"
|
|
bitfld.long 0x0 5. "OUTDMSK5,Port n Output Data Mask 5" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 4. "OUTDMSK4,Port n Output Data Mask 4" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 3. "OUTDMSK3,Port n Output Data Mask 3" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 2. "OUTDMSK2,Port n Output Data Mask 2" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
bitfld.long 0x0 1. "OUTDMSK1,Port n Output Data Mask 1" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
newline
|
|
bitfld.long 0x0 0. "OUTDMSK0,Port n Output Data Mask 0" "0: Unmask. The corresponding OUTDRx bit can be..,1: Mask. The corresponding OUTDRx bit is protected."
|
|
line.long 0x4 "DBCR,Port n Debounce Control Register"
|
|
bitfld.long 0x4 16.--18. "DBCLK,Port n Debounce Filter Sampling Clock Selection" "0: HCLK/1,1: HCLK/4,2: HCLK/16,3: HCLK/64,4: HCLK/256,5: HCLK/1024,?,?"
|
|
bitfld.long 0x4 12. "DBEN12,Port n Debounce Enable 12" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 11. "DBEN11,Port n Debounce Enable 11" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 10. "DBEN10,Port n Debounce Enable 10" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 9. "DBEN9,Port n Debounce Enable 9" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 8. "DBEN8,Port n Debounce Enable 8" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 7. "DBEN7,Port n Debounce Enable 7" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 6. "DBEN6,Port n Debounce Enable 6" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 5. "DBEN5,Port n Debounce Enable 5" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 4. "DBEN4,Port n Debounce Enable 4" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 3. "DBEN3,Port n Debounce Enable 3" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 2. "DBEN2,Port n Debounce Enable 2" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
newline
|
|
bitfld.long 0x4 1. "DBEN1,Port n Debounce Enable 1" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
bitfld.long 0x4 0. "DBEN0,Port n Debounce Enable 0" "0: Disable debounce filter.,1: Enable debounce filter."
|
|
tree.end
|
|
tree.end
|
|
tree "PMU (Power Management Unit)"
|
|
base ad:0x40001900
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "PWRCR,Power Control Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "WTIDKY,Write Identification Key (0x5072)"
|
|
bitfld.long 0x0 15. "ALLPWR,All System and Peripheral Except Always-on Regiion Power Control" "0: Power on/off is controlled by each power control..,1: Power off all system and peripheral except.."
|
|
newline
|
|
bitfld.long 0x0 8. "FLASHPWR,Flash Memory Power Control" "0: Power On,1: Power Off"
|
|
bitfld.long 0x0 0. "SRAMRTPWR,SRAM Retention Power Control" "0: Normal power for SRAM,1: Retention power for SRAM on sleep and deep sleep.."
|
|
group.byte 0x40++0x1F
|
|
line.byte 0x0 "BKR0,Back-up Data Register 0"
|
|
hexmask.byte 0x0 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x1 "BKR1,Back-up Data Register 1"
|
|
hexmask.byte 0x1 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x2 "BKR2,Back-up Data Register 2"
|
|
hexmask.byte 0x2 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x3 "BKR3,Back-up Data Register 3"
|
|
hexmask.byte 0x3 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x4 "BKR4,Back-up Data Register 4"
|
|
hexmask.byte 0x4 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x5 "BKR5,Back-up Data Register 5"
|
|
hexmask.byte 0x5 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x6 "BKR6,Back-up Data Register 6"
|
|
hexmask.byte 0x6 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x7 "BKR7,Back-up Data Register 7"
|
|
hexmask.byte 0x7 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x8 "BKR8,Back-up Data Register 8"
|
|
hexmask.byte 0x8 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x9 "BKR9,Back-up Data Register 9"
|
|
hexmask.byte 0x9 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0xA "BKR10,Back-up Data Register 10"
|
|
hexmask.byte 0xA 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0xB "BKR11,Back-up Data Register 11"
|
|
hexmask.byte 0xB 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0xC "BKR12,Back-up Data Register 12"
|
|
hexmask.byte 0xC 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0xD "BKR13,Back-up Data Register 13"
|
|
hexmask.byte 0xD 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0xE "BKR14,Back-up Data Register 14"
|
|
hexmask.byte 0xE 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0xF "BKR15,Back-up Data Register 15"
|
|
hexmask.byte 0xF 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x10 "BKR16,Back-up Data Register 16"
|
|
hexmask.byte 0x10 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x11 "BKR17,Back-up Data Register 17"
|
|
hexmask.byte 0x11 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x12 "BKR18,Back-up Data Register 18"
|
|
hexmask.byte 0x12 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x13 "BKR19,Back-up Data Register 19"
|
|
hexmask.byte 0x13 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x14 "BKR20,Back-up Data Register 20"
|
|
hexmask.byte 0x14 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x15 "BKR21,Back-up Data Register 21"
|
|
hexmask.byte 0x15 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x16 "BKR22,Back-up Data Register 22"
|
|
hexmask.byte 0x16 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x17 "BKR23,Back-up Data Register 23"
|
|
hexmask.byte 0x17 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x18 "BKR24,Back-up Data Register 24"
|
|
hexmask.byte 0x18 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x19 "BKR25,Back-up Data Register 25"
|
|
hexmask.byte 0x19 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x1A "BKR26,Back-up Data Register 26"
|
|
hexmask.byte 0x1A 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x1B "BKR27,Back-up Data Register 27"
|
|
hexmask.byte 0x1B 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x1C "BKR28,Back-up Data Register 28"
|
|
hexmask.byte 0x1C 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x1D "BKR29,Back-up Data Register 29"
|
|
hexmask.byte 0x1D 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x1E "BKR30,Back-up Data Register 30"
|
|
hexmask.byte 0x1E 0.--7. 1. "BACKUP,Back-up Data"
|
|
line.byte 0x1F "BKR31,Back-up Data Register 31"
|
|
hexmask.byte 0x1F 0.--7. 1. "BACKUP,Back-up Data"
|
|
tree.end
|
|
tree "RTCC (Real Time Clock and Calendar)"
|
|
base ad:0x40005200
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CR,RTCC Control Register"
|
|
bitfld.long 0x0 15. "RTEN,RTCC Enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "RTIN,RTCC Interrupt Interval Selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 11. "RTIFLAG,RTCC Interval Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 10. "HS24,12/24-hour System Selection" "0,1"
|
|
bitfld.long 0x0 8. "OUTSEL,RTCOUT Selection" "0,1"
|
|
bitfld.long 0x0 7. "ALEN,RTCC Alarm Match Operation Enable" "0,1"
|
|
bitfld.long 0x0 6. "ALIEN,RTCC Alarm Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 5. "ALIFLAG,RTCC Alarm Match Interrupt Flag" "0,1"
|
|
rbitfld.long 0x0 1. "RTWST,RTCC Wait Status Flag" "0,1"
|
|
bitfld.long 0x0 0. "RTWAIT,RTCC Wait Control" "0,1"
|
|
line.long 0x4 "ECR,RTCC Time Error Correcton Register"
|
|
bitfld.long 0x4 7. "ECTM,Time Error Correction Timing Selection" "0,1"
|
|
bitfld.long 0x4 6. "ECSIGN,Time Error Correction Data Sign" "0,1"
|
|
hexmask.long.byte 0x4 0.--5. 1. "ECV,Time Error Correction Data"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "SCNT,RTCC Sub-counter Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RTCNT,RTCC Sub-counter"
|
|
group.long 0xC++0x27
|
|
line.long 0x0 "SEC,RTCC Second Counter Register"
|
|
hexmask.long.byte 0x0 0.--6. 1. "RSEC,RTCC Second Counter"
|
|
line.long 0x4 "MIN,RTCC Minute Counter Register"
|
|
hexmask.long.byte 0x4 0.--6. 1. "RMIN,RTCC Minute Counter"
|
|
line.long 0x8 "HOUR,RTCC Hour Counter Register"
|
|
hexmask.long.byte 0x8 0.--6. 1. "RHOUR,RTCC Hour Counter"
|
|
line.long 0xC "DAY,RTCC Day Counter Register"
|
|
hexmask.long.byte 0xC 0.--5. 1. "RDAY,RTCC Day Counter"
|
|
line.long 0x10 "WEEK,RTCC Week Counter Register"
|
|
bitfld.long 0x10 0.--2. "RWEEK,RTCC Week Counter" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "MONTH,RTCC Month Counter Register"
|
|
hexmask.long.byte 0x14 0.--4. 1. "RMONTH,RTCC Month Counter"
|
|
line.long 0x18 "YEAR,RTCC Year Counter Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. "RYEAR,RTCC Year Counter"
|
|
line.long 0x1C "ALMIN,RTCC Alarm Minute Counter Register"
|
|
hexmask.long.byte 0x1C 0.--6. 1. "AMIN,RTCC Alarm Minute Counter"
|
|
line.long 0x20 "ALHOUR,RTCC Alarm Hour Counter Register"
|
|
hexmask.long.byte 0x20 0.--5. 1. "AHOUR,RTCC Alarm Hour Counter"
|
|
line.long 0x24 "ALWEEK,RTCC Alarm Week Counter Register"
|
|
bitfld.long 0x24 6. "AWEEK6,Saturday Alarm Setting" "0,1"
|
|
bitfld.long 0x24 5. "AWEEK5,Friday Alarm Setting" "0,1"
|
|
bitfld.long 0x24 4. "AWEEK4,Thursday Alarm Setting" "0,1"
|
|
bitfld.long 0x24 3. "AWEEK3,Wednesday Alarm Setting" "0,1"
|
|
bitfld.long 0x24 2. "AWEEK2,Tuesday Alarm Setting" "0,1"
|
|
bitfld.long 0x24 1. "AWEEK1,Monday Alarm Setting" "0,1"
|
|
bitfld.long 0x24 0. "AWEEK0,Sunday Alarm Setting" "0,1"
|
|
tree.end
|
|
tree "SCI&UART (Smartcard Interface and Universal Asynchronous Receiver/Transmitter)"
|
|
base ad:0x0
|
|
tree "SC0"
|
|
base ad:0x40005300
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CR1,SCn Control Register 1"
|
|
bitfld.long 0x0 15. "SCnMD,Smartcard Interface Mode Selection" "0: Smartcard interface mode (SCnPWR/RST/CLK/DATA/IN),1: UART mode (SCnRXD/TXD)"
|
|
bitfld.long 0x0 14. "PENn,Parity Enable" "0: Disable parity bit generation and detection.,1: Enable parity bit generation and detection"
|
|
newline
|
|
bitfld.long 0x0 13. "PSELn,Parity Selection" "0: Odd parity (Odd number of logic '1'),1: Even parity (Even number of logic '1')"
|
|
bitfld.long 0x0 9.--10. "DLENn,Data Length Selection" "0: 5bit. Start D0 D1 D2 D3 D4 (Parity) Stop1 (Stop2),1: 6bit. Start D0 D1 D2 D3 D4 D5 (Parity) Stop1..,2: 7bit. Start D0 D1 D2 D3 D4 D5 D6 (Parity) Stop1..,3: 8bit. Start D0 D1 D2 D3 D4 D5 D6 D7 (Parity).."
|
|
newline
|
|
bitfld.long 0x0 7. "STOPBn,Stop bit length" "0: 1 Stop bit,1: 2 Stop bits"
|
|
bitfld.long 0x0 4. "OVRSn,Oversampling Selection" "0: 16 oversampling,1: 8 oversampling"
|
|
newline
|
|
bitfld.long 0x0 3. "TXEn,Enable the transmitter unit." "0: Transmitter is disabled.,1: Transmitter is enabled."
|
|
bitfld.long 0x0 2. "RXEn,Enable the receiver unit." "0: Receiver is disabled.,1: Receiver is enabled."
|
|
newline
|
|
bitfld.long 0x0 1. "RTOENn,Receive Time Out Function Enable" "0: Disable receive time out function.,1: Enable receive time out function."
|
|
bitfld.long 0x0 0. "SCInEN,Smartcard Interface Block Enable" "0: Disable SCn block.,1: Enable SCn block."
|
|
line.long 0x4 "CR2,SCn Control Register 2 (only used for Smardcard Interface Mode)"
|
|
bitfld.long 0x4 15. "ACTENn,Auto Activation Enable" "0: No effect.,1: Enable activation and cold reset. (This bit is.."
|
|
bitfld.long 0x4 14. "WRENn,Auto Warm Reset Enable" "0: No effect.,1: Enable warm reset. (This bit is automatically.."
|
|
newline
|
|
bitfld.long 0x4 13. "DACTENn,Auto Deactivation Enable" "0: No effect.,1: Enable deactivation. (This bit is automatically.."
|
|
rbitfld.long 0x4 9. "SCnINST,SCnIN Pin Status" "0: SCnIN pin state at low level,1: SCnIN pin state at high level"
|
|
newline
|
|
bitfld.long 0x4 8. "SCnPWRLV,SCnPWR Pin Level Setting" "0: SCnPWR pin to low level,1: SCnPWR pin to high level"
|
|
bitfld.long 0x4 7. "SCnRSTLV,SCnRST Pin Level Setting" "0: SCnRST pin to low level,1: SCnRST pin to high level"
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newline
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bitfld.long 0x4 6. "SCnDATALV,SCnDATA Pin Level Setting" "0: SCnDATA pin to low level,1: The SCnDATA pin is high level with an external.."
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bitfld.long 0x4 5. "SCnCLKLV,SCnCLK Pin Level Setting" "0: SCnCLK pin to low level on clock generation..,1: SCnCLK pin to high level on clock generation.."
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|
newline
|
|
bitfld.long 0x4 4. "SCnCLKEN,Smartcard Clock Generation Enable" "0: Disable smartcard clock generation.,1: Enable smartcard clock generation."
|
|
hexmask.long.byte 0x4 0.--3. 1. "SCnCLKG,This bit-field is used to generate smartcard clock"
|
|
line.long 0x8 "CR3,SCn Control Register 3 (only used for Smardcard Interface Mode)"
|
|
bitfld.long 0x8 23. "ACONDETn,Auto Convention Detection" "0: No effect.,1: Auto convention detection (This bit is.."
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|
bitfld.long 0x8 22. "CONSELn,Convention Selection" "0: Direct convention (lsb first shift out 0: Low..,1: Inverse convention (msb first shift out 0: High.."
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|
newline
|
|
bitfld.long 0x8 20. "RETRYENn,Tx/Rx Error Signal Generation/Detection Retry Enable" "0: Disable error signal generation/detection and..,1: Enable error signal generation/detection and.."
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|
bitfld.long 0x8 17.--19. "RETRYn,The number of retry. RETRYn[2:0]+1" "0,1,2,3,4,5,6,7"
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|
newline
|
|
bitfld.long 0x8 16. "DLYRETRYn,Delay Time Before Retry Selection" "0: 2.5 etu delay before re-transmit byte,1: 2.5 etu + 'extra guard time' delay before.."
|
|
bitfld.long 0x8 13.--14. "SCnINPOL,SCnIN Pin Input Polarity Selection" "0: Smartcard Insert/Removal on falling edge,1: Smartcard Insert/Removal on rising edge,2: Smartcard Insert/Removal on both of falling and..,?"
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|
newline
|
|
bitfld.long 0x8 8. "RXCNTENn,Received byte Count Enable" "0: No effect.,1: Received block length counts every Rx (This bit.."
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|
hexmask.long.byte 0x8 0.--7. 1. "RXBLENn,Received Block Length"
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|
group.long 0x10++0x7
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line.long 0x0 "IER,SCn Interrupt Enable Register"
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bitfld.long 0x0 23. "RSTAIENn,Reset Assertion Interrupt Enable" "0: Disable reset assertion interrupt.,1: Enable reset assertion interrupt."
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bitfld.long 0x0 22. "SERIENn,Sequence Error Interrupt Enable" "0: Disable sequence error interrupt.,1: Enable sequence error interrupt."
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newline
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bitfld.long 0x0 21. "SEDIENn,Sequence End Interrupt Enable" "0: Disable sequence end interrupt.,1: Enable sequence end interrupt."
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|
bitfld.long 0x0 20. "CONERIENn,Convention Detection Error Interrupt Enable" "0: Disable convention detection error interrupt.,1: Enable convention detection error interrupt."
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newline
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bitfld.long 0x0 19. "CONEDIENn,Convention Detection End Interrupt Enable" "0: Disable convention detection end interrupt.,1: Enable convention detection end interrupt."
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|
bitfld.long 0x0 18. "TRYERIENn,Transmit Retry Error Interrupt Enable" "0: Disable transmit retry error interrupt.,1: Enable transmit retry error interrupt."
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|
newline
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bitfld.long 0x0 17. "SCINIENn,SCnIN Pin Valid Edge Interrupt Enable" "0: Disable SCnIN pin valid edge interrupt.,1: Enable SCnIN pin valid edge interrupt."
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bitfld.long 0x0 16. "BLEDIENn,Block Length Count End Interrupt Enable" "0: Disable block length count end interrupt.,1: Enable block length count end interrupt."
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|
newline
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bitfld.long 0x0 6. "RTOIENn,Receive Time Out Interrupt Enable" "0: Disable receive time out interrupt.,1: Enable receive time out interrupt."
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|
bitfld.long 0x0 2. "TXCIENn,Transmit Complete Interrupt Enable" "0: Disable transmit complete interrupt.,1: Enable transmit complete interrupt."
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newline
|
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bitfld.long 0x0 0. "RXCIENn,Receive Data Register Not Empty Interrupt Enable" "0: Disable receive data not empty interrupt.,1: Enable receive data not empty interrupt."
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line.long 0x4 "IFSR,SCn Interrupt Flag and Status Register"
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bitfld.long 0x4 23. "RSTAIFGn,Reset Assertion Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
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bitfld.long 0x4 22. "SERIFGn,Sequence Error Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
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newline
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bitfld.long 0x4 21. "SEDIFGn,Sequence End Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
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bitfld.long 0x4 20. "CONERIFGn,Convention Detection Error Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
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newline
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bitfld.long 0x4 19. "CONEDIFGn,Convention Detection End Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
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bitfld.long 0x4 18. "TRYERIFGn,Transmit Retry Error Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
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newline
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bitfld.long 0x4 17. "SCINIFGn,SCnIN Pin Valid Edge Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
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bitfld.long 0x4 16. "BLEDIFGn,Block Length Count End Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
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newline
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bitfld.long 0x4 15. "DORn,Data Overrun" "0,1"
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bitfld.long 0x4 14. "FEn,Frame Error" "0,1"
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newline
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bitfld.long 0x4 13. "PEn,Parity Error" "0,1"
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rbitfld.long 0x4 12. "RXBUSYn,RXD Line Busy" "0,1"
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newline
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bitfld.long 0x4 6. "RTOIFLAGn,Receive Time Out Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
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bitfld.long 0x4 2. "TXCIFLAGn,Transmit Complete Interrupt Flag" "0: No request occurred.,1: The data in the transmit shift register are.."
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newline
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bitfld.long 0x4 0. "RXCIFLAGn,Receive Data Register Not Empty Interrupt Flag" "0: No request occurred.,1: There is data in the receive data register. This.."
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rgroup.long 0x18++0x3
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line.long 0x0 "RDR,SCn Receive Data Register"
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bitfld.long 0x0 8. "PARB,Receive Parity" "0,1"
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hexmask.long.byte 0x0 0.--7. 1. "RDATA,Receive Data"
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group.long 0x1C++0x1B
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line.long 0x0 "TDR,SCn Transmit Data Register"
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hexmask.long.byte 0x0 0.--7. 1. "TDATA,Transmit Data"
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line.long 0x4 "BDR,SCn Baud Rate Data Register"
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hexmask.long.word 0x4 0.--15. 1. "BDATA,These bits are used to generate baud rate"
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line.long 0x8 "BCMP,SCn Baud Rate Compensation Register"
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bitfld.long 0x8 15. "BCMPS,Baud Rate Compensation Sign" "0,1"
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bitfld.long 0x8 8. "BCMP8,Baud Rate Compensation 8" "0,1"
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newline
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bitfld.long 0x8 7. "BCMP7,Baud Rate Compensation 7" "0,1"
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bitfld.long 0x8 6. "BCMP6,Baud Rate Compensation 6" "0,1"
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newline
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bitfld.long 0x8 5. "BCMP5,Baud Rate Compensation 5" "0,1"
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bitfld.long 0x8 4. "BCMP4,Baud Rate Compensation 4" "0,1"
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newline
|
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bitfld.long 0x8 3. "BCMP3,Baud Rate Compensation 3" "0,1"
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bitfld.long 0x8 2. "BCMP2,Baud Rate Compensation 2" "0,1"
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newline
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bitfld.long 0x8 1. "BCMP1,Baud Rate Compensation 1" "0,1"
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bitfld.long 0x8 0. "BCMP0,Baud Rate Compensation 0" "0,1"
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line.long 0xC "RTODR,SCn Receive Time Out Data Register"
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hexmask.long.tbyte 0xC 0.--23. 1. "RTOD,SCn Receive Time Out Data"
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|
line.long 0x10 "EGTR,SCn Tx Extra Guard Time Register"
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hexmask.long.byte 0x10 0.--7. 1. "EGT,SCn Tx Extra Guard Time"
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line.long 0x14 "T3DR,SCn T3 Duration Data Register"
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hexmask.long.word 0x14 0.--15. 1. "T3D,T3 Duration Data bits. T3D[15:0] + 1"
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line.long 0x18 "T4DR,SCn T4 Duration Data Register"
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hexmask.long.word 0x18 0.--15. 1. "T4D,T4 Duration Data bits. T4D[15:0] + 1"
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tree.end
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tree "SC1"
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base ad:0x40005380
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group.long 0x0++0xB
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line.long 0x0 "CR1,SCn Control Register 1"
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bitfld.long 0x0 15. "SCnMD,Smartcard Interface Mode Selection" "0: Smartcard interface mode (SCnPWR/RST/CLK/DATA/IN),1: UART mode (SCnRXD/TXD)"
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bitfld.long 0x0 14. "PENn,Parity Enable" "0: Disable parity bit generation and detection.,1: Enable parity bit generation and detection"
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newline
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bitfld.long 0x0 13. "PSELn,Parity Selection" "0: Odd parity (Odd number of logic '1'),1: Even parity (Even number of logic '1')"
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bitfld.long 0x0 9.--10. "DLENn,Data Length Selection" "0: 5bit. Start D0 D1 D2 D3 D4 (Parity) Stop1 (Stop2),1: 6bit. Start D0 D1 D2 D3 D4 D5 (Parity) Stop1..,2: 7bit. Start D0 D1 D2 D3 D4 D5 D6 (Parity) Stop1..,3: 8bit. Start D0 D1 D2 D3 D4 D5 D6 D7 (Parity).."
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newline
|
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bitfld.long 0x0 7. "STOPBn,Stop bit length" "0: 1 Stop bit,1: 2 Stop bits"
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bitfld.long 0x0 4. "OVRSn,Oversampling Selection" "0: 16 oversampling,1: 8 oversampling"
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|
newline
|
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bitfld.long 0x0 3. "TXEn,Enable the transmitter unit." "0: Transmitter is disabled.,1: Transmitter is enabled."
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bitfld.long 0x0 2. "RXEn,Enable the receiver unit." "0: Receiver is disabled.,1: Receiver is enabled."
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newline
|
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bitfld.long 0x0 1. "RTOENn,Receive Time Out Function Enable" "0: Disable receive time out function.,1: Enable receive time out function."
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bitfld.long 0x0 0. "SCInEN,Smartcard Interface Block Enable" "0: Disable SCn block.,1: Enable SCn block."
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line.long 0x4 "CR2,SCn Control Register 2 (only used for Smardcard Interface Mode)"
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bitfld.long 0x4 15. "ACTENn,Auto Activation Enable" "0: No effect.,1: Enable activation and cold reset. (This bit is.."
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bitfld.long 0x4 14. "WRENn,Auto Warm Reset Enable" "0: No effect.,1: Enable warm reset. (This bit is automatically.."
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newline
|
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bitfld.long 0x4 13. "DACTENn,Auto Deactivation Enable" "0: No effect.,1: Enable deactivation. (This bit is automatically.."
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rbitfld.long 0x4 9. "SCnINST,SCnIN Pin Status" "0: SCnIN pin state at low level,1: SCnIN pin state at high level"
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newline
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bitfld.long 0x4 8. "SCnPWRLV,SCnPWR Pin Level Setting" "0: SCnPWR pin to low level,1: SCnPWR pin to high level"
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bitfld.long 0x4 7. "SCnRSTLV,SCnRST Pin Level Setting" "0: SCnRST pin to low level,1: SCnRST pin to high level"
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newline
|
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bitfld.long 0x4 6. "SCnDATALV,SCnDATA Pin Level Setting" "0: SCnDATA pin to low level,1: The SCnDATA pin is high level with an external.."
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bitfld.long 0x4 5. "SCnCLKLV,SCnCLK Pin Level Setting" "0: SCnCLK pin to low level on clock generation..,1: SCnCLK pin to high level on clock generation.."
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newline
|
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bitfld.long 0x4 4. "SCnCLKEN,Smartcard Clock Generation Enable" "0: Disable smartcard clock generation.,1: Enable smartcard clock generation."
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hexmask.long.byte 0x4 0.--3. 1. "SCnCLKG,This bit-field is used to generate smartcard clock"
|
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line.long 0x8 "CR3,SCn Control Register 3 (only used for Smardcard Interface Mode)"
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bitfld.long 0x8 23. "ACONDETn,Auto Convention Detection" "0: No effect.,1: Auto convention detection (This bit is.."
|
|
bitfld.long 0x8 22. "CONSELn,Convention Selection" "0: Direct convention (lsb first shift out 0: Low..,1: Inverse convention (msb first shift out 0: High.."
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|
newline
|
|
bitfld.long 0x8 20. "RETRYENn,Tx/Rx Error Signal Generation/Detection Retry Enable" "0: Disable error signal generation/detection and..,1: Enable error signal generation/detection and.."
|
|
bitfld.long 0x8 17.--19. "RETRYn,The number of retry. RETRYn[2:0]+1" "0,1,2,3,4,5,6,7"
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|
newline
|
|
bitfld.long 0x8 16. "DLYRETRYn,Delay Time Before Retry Selection" "0: 2.5 etu delay before re-transmit byte,1: 2.5 etu + 'extra guard time' delay before.."
|
|
bitfld.long 0x8 13.--14. "SCnINPOL,SCnIN Pin Input Polarity Selection" "0: Smartcard Insert/Removal on falling edge,1: Smartcard Insert/Removal on rising edge,2: Smartcard Insert/Removal on both of falling and..,?"
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|
newline
|
|
bitfld.long 0x8 8. "RXCNTENn,Received byte Count Enable" "0: No effect.,1: Received block length counts every Rx (This bit.."
|
|
hexmask.long.byte 0x8 0.--7. 1. "RXBLENn,Received Block Length"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "IER,SCn Interrupt Enable Register"
|
|
bitfld.long 0x0 23. "RSTAIENn,Reset Assertion Interrupt Enable" "0: Disable reset assertion interrupt.,1: Enable reset assertion interrupt."
|
|
bitfld.long 0x0 22. "SERIENn,Sequence Error Interrupt Enable" "0: Disable sequence error interrupt.,1: Enable sequence error interrupt."
|
|
newline
|
|
bitfld.long 0x0 21. "SEDIENn,Sequence End Interrupt Enable" "0: Disable sequence end interrupt.,1: Enable sequence end interrupt."
|
|
bitfld.long 0x0 20. "CONERIENn,Convention Detection Error Interrupt Enable" "0: Disable convention detection error interrupt.,1: Enable convention detection error interrupt."
|
|
newline
|
|
bitfld.long 0x0 19. "CONEDIENn,Convention Detection End Interrupt Enable" "0: Disable convention detection end interrupt.,1: Enable convention detection end interrupt."
|
|
bitfld.long 0x0 18. "TRYERIENn,Transmit Retry Error Interrupt Enable" "0: Disable transmit retry error interrupt.,1: Enable transmit retry error interrupt."
|
|
newline
|
|
bitfld.long 0x0 17. "SCINIENn,SCnIN Pin Valid Edge Interrupt Enable" "0: Disable SCnIN pin valid edge interrupt.,1: Enable SCnIN pin valid edge interrupt."
|
|
bitfld.long 0x0 16. "BLEDIENn,Block Length Count End Interrupt Enable" "0: Disable block length count end interrupt.,1: Enable block length count end interrupt."
|
|
newline
|
|
bitfld.long 0x0 6. "RTOIENn,Receive Time Out Interrupt Enable" "0: Disable receive time out interrupt.,1: Enable receive time out interrupt."
|
|
bitfld.long 0x0 2. "TXCIENn,Transmit Complete Interrupt Enable" "0: Disable transmit complete interrupt.,1: Enable transmit complete interrupt."
|
|
newline
|
|
bitfld.long 0x0 0. "RXCIENn,Receive Data Register Not Empty Interrupt Enable" "0: Disable receive data not empty interrupt.,1: Enable receive data not empty interrupt."
|
|
line.long 0x4 "IFSR,SCn Interrupt Flag and Status Register"
|
|
bitfld.long 0x4 23. "RSTAIFGn,Reset Assertion Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
|
|
bitfld.long 0x4 22. "SERIFGn,Sequence Error Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
|
|
newline
|
|
bitfld.long 0x4 21. "SEDIFGn,Sequence End Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
|
|
bitfld.long 0x4 20. "CONERIFGn,Convention Detection Error Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
|
|
newline
|
|
bitfld.long 0x4 19. "CONEDIFGn,Convention Detection End Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
|
|
bitfld.long 0x4 18. "TRYERIFGn,Transmit Retry Error Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
|
|
newline
|
|
bitfld.long 0x4 17. "SCINIFGn,SCnIN Pin Valid Edge Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
|
|
bitfld.long 0x4 16. "BLEDIFGn,Block Length Count End Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
|
|
newline
|
|
bitfld.long 0x4 15. "DORn,Data Overrun" "0,1"
|
|
bitfld.long 0x4 14. "FEn,Frame Error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "PEn,Parity Error" "0,1"
|
|
rbitfld.long 0x4 12. "RXBUSYn,RXD Line Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "RTOIFLAGn,Receive Time Out Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
|
|
bitfld.long 0x4 2. "TXCIFLAGn,Transmit Complete Interrupt Flag" "0: No request occurred.,1: The data in the transmit shift register are.."
|
|
newline
|
|
bitfld.long 0x4 0. "RXCIFLAGn,Receive Data Register Not Empty Interrupt Flag" "0: No request occurred.,1: There is data in the receive data register. This.."
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "RDR,SCn Receive Data Register"
|
|
bitfld.long 0x0 8. "PARB,Receive Parity" "0,1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RDATA,Receive Data"
|
|
group.long 0x1C++0x1B
|
|
line.long 0x0 "TDR,SCn Transmit Data Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TDATA,Transmit Data"
|
|
line.long 0x4 "BDR,SCn Baud Rate Data Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "BDATA,These bits are used to generate baud rate"
|
|
line.long 0x8 "BCMP,SCn Baud Rate Compensation Register"
|
|
bitfld.long 0x8 15. "BCMPS,Baud Rate Compensation Sign" "0,1"
|
|
bitfld.long 0x8 8. "BCMP8,Baud Rate Compensation 8" "0,1"
|
|
newline
|
|
bitfld.long 0x8 7. "BCMP7,Baud Rate Compensation 7" "0,1"
|
|
bitfld.long 0x8 6. "BCMP6,Baud Rate Compensation 6" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "BCMP5,Baud Rate Compensation 5" "0,1"
|
|
bitfld.long 0x8 4. "BCMP4,Baud Rate Compensation 4" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "BCMP3,Baud Rate Compensation 3" "0,1"
|
|
bitfld.long 0x8 2. "BCMP2,Baud Rate Compensation 2" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "BCMP1,Baud Rate Compensation 1" "0,1"
|
|
bitfld.long 0x8 0. "BCMP0,Baud Rate Compensation 0" "0,1"
|
|
line.long 0xC "RTODR,SCn Receive Time Out Data Register"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. "RTOD,SCn Receive Time Out Data"
|
|
line.long 0x10 "EGTR,SCn Tx Extra Guard Time Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "EGT,SCn Tx Extra Guard Time"
|
|
line.long 0x14 "T3DR,SCn T3 Duration Data Register"
|
|
hexmask.long.word 0x14 0.--15. 1. "T3D,T3 Duration Data bits. T3D[15:0] + 1"
|
|
line.long 0x18 "T4DR,SCn T4 Duration Data Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "T4D,T4 Duration Data bits. T4D[15:0] + 1"
|
|
tree.end
|
|
tree "SCn"
|
|
base ad:0x56000000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CR1,SCn Control Register 1"
|
|
bitfld.long 0x0 15. "SCnMD,Smartcard Interface Mode Selection" "0: Smartcard interface mode (SCnPWR/RST/CLK/DATA/IN),1: UART mode (SCnRXD/TXD)"
|
|
bitfld.long 0x0 14. "PENn,Parity Enable" "0: Disable parity bit generation and detection.,1: Enable parity bit generation and detection"
|
|
newline
|
|
bitfld.long 0x0 13. "PSELn,Parity Selection" "0: Odd parity (Odd number of logic '1'),1: Even parity (Even number of logic '1')"
|
|
bitfld.long 0x0 9.--10. "DLENn,Data Length Selection" "0: 5bit. Start D0 D1 D2 D3 D4 (Parity) Stop1 (Stop2),1: 6bit. Start D0 D1 D2 D3 D4 D5 (Parity) Stop1..,2: 7bit. Start D0 D1 D2 D3 D4 D5 D6 (Parity) Stop1..,3: 8bit. Start D0 D1 D2 D3 D4 D5 D6 D7 (Parity).."
|
|
newline
|
|
bitfld.long 0x0 7. "STOPBn,Stop bit length" "0: 1 Stop bit,1: 2 Stop bits"
|
|
bitfld.long 0x0 4. "OVRSn,Oversampling Selection" "0: 16 oversampling,1: 8 oversampling"
|
|
newline
|
|
bitfld.long 0x0 3. "TXEn,Enable the transmitter unit." "0: Transmitter is disabled.,1: Transmitter is enabled."
|
|
bitfld.long 0x0 2. "RXEn,Enable the receiver unit." "0: Receiver is disabled.,1: Receiver is enabled."
|
|
newline
|
|
bitfld.long 0x0 1. "RTOENn,Receive Time Out Function Enable" "0: Disable receive time out function.,1: Enable receive time out function."
|
|
bitfld.long 0x0 0. "SCInEN,Smartcard Interface Block Enable" "0: Disable SCn block.,1: Enable SCn block."
|
|
line.long 0x4 "CR2,SCn Control Register 2 (only used for Smardcard Interface Mode)"
|
|
bitfld.long 0x4 15. "ACTENn,Auto Activation Enable" "0: No effect.,1: Enable activation and cold reset. (This bit is.."
|
|
bitfld.long 0x4 14. "WRENn,Auto Warm Reset Enable" "0: No effect.,1: Enable warm reset. (This bit is automatically.."
|
|
newline
|
|
bitfld.long 0x4 13. "DACTENn,Auto Deactivation Enable" "0: No effect.,1: Enable deactivation. (This bit is automatically.."
|
|
rbitfld.long 0x4 9. "SCnINST,SCnIN Pin Status" "0: SCnIN pin state at low level,1: SCnIN pin state at high level"
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bitfld.long 0x4 8. "SCnPWRLV,SCnPWR Pin Level Setting" "0: SCnPWR pin to low level,1: SCnPWR pin to high level"
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bitfld.long 0x4 7. "SCnRSTLV,SCnRST Pin Level Setting" "0: SCnRST pin to low level,1: SCnRST pin to high level"
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bitfld.long 0x4 6. "SCnDATALV,SCnDATA Pin Level Setting" "0: SCnDATA pin to low level,1: The SCnDATA pin is high level with an external.."
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|
bitfld.long 0x4 5. "SCnCLKLV,SCnCLK Pin Level Setting" "0: SCnCLK pin to low level on clock generation..,1: SCnCLK pin to high level on clock generation.."
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|
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bitfld.long 0x4 4. "SCnCLKEN,Smartcard Clock Generation Enable" "0: Disable smartcard clock generation.,1: Enable smartcard clock generation."
|
|
hexmask.long.byte 0x4 0.--3. 1. "SCnCLKG,This bit-field is used to generate smartcard clock"
|
|
line.long 0x8 "CR3,SCn Control Register 3 (only used for Smardcard Interface Mode)"
|
|
bitfld.long 0x8 23. "ACONDETn,Auto Convention Detection" "0: No effect.,1: Auto convention detection (This bit is.."
|
|
bitfld.long 0x8 22. "CONSELn,Convention Selection" "0: Direct convention (lsb first shift out 0: Low..,1: Inverse convention (msb first shift out 0: High.."
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|
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bitfld.long 0x8 20. "RETRYENn,Tx/Rx Error Signal Generation/Detection Retry Enable" "0: Disable error signal generation/detection and..,1: Enable error signal generation/detection and.."
|
|
bitfld.long 0x8 17.--19. "RETRYn,The number of retry. RETRYn[2:0]+1" "0,1,2,3,4,5,6,7"
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|
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|
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bitfld.long 0x8 16. "DLYRETRYn,Delay Time Before Retry Selection" "0: 2.5 etu delay before re-transmit byte,1: 2.5 etu + 'extra guard time' delay before.."
|
|
bitfld.long 0x8 13.--14. "SCnINPOL,SCnIN Pin Input Polarity Selection" "0: Smartcard Insert/Removal on falling edge,1: Smartcard Insert/Removal on rising edge,2: Smartcard Insert/Removal on both of falling and..,?"
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|
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bitfld.long 0x8 8. "RXCNTENn,Received byte Count Enable" "0: No effect.,1: Received block length counts every Rx (This bit.."
|
|
hexmask.long.byte 0x8 0.--7. 1. "RXBLENn,Received Block Length"
|
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group.long 0x10++0x7
|
|
line.long 0x0 "IER,SCn Interrupt Enable Register"
|
|
bitfld.long 0x0 23. "RSTAIENn,Reset Assertion Interrupt Enable" "0: Disable reset assertion interrupt.,1: Enable reset assertion interrupt."
|
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bitfld.long 0x0 22. "SERIENn,Sequence Error Interrupt Enable" "0: Disable sequence error interrupt.,1: Enable sequence error interrupt."
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bitfld.long 0x0 21. "SEDIENn,Sequence End Interrupt Enable" "0: Disable sequence end interrupt.,1: Enable sequence end interrupt."
|
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bitfld.long 0x0 20. "CONERIENn,Convention Detection Error Interrupt Enable" "0: Disable convention detection error interrupt.,1: Enable convention detection error interrupt."
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|
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bitfld.long 0x0 19. "CONEDIENn,Convention Detection End Interrupt Enable" "0: Disable convention detection end interrupt.,1: Enable convention detection end interrupt."
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|
bitfld.long 0x0 18. "TRYERIENn,Transmit Retry Error Interrupt Enable" "0: Disable transmit retry error interrupt.,1: Enable transmit retry error interrupt."
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|
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|
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bitfld.long 0x0 17. "SCINIENn,SCnIN Pin Valid Edge Interrupt Enable" "0: Disable SCnIN pin valid edge interrupt.,1: Enable SCnIN pin valid edge interrupt."
|
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bitfld.long 0x0 16. "BLEDIENn,Block Length Count End Interrupt Enable" "0: Disable block length count end interrupt.,1: Enable block length count end interrupt."
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|
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|
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bitfld.long 0x0 6. "RTOIENn,Receive Time Out Interrupt Enable" "0: Disable receive time out interrupt.,1: Enable receive time out interrupt."
|
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bitfld.long 0x0 2. "TXCIENn,Transmit Complete Interrupt Enable" "0: Disable transmit complete interrupt.,1: Enable transmit complete interrupt."
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bitfld.long 0x0 0. "RXCIENn,Receive Data Register Not Empty Interrupt Enable" "0: Disable receive data not empty interrupt.,1: Enable receive data not empty interrupt."
|
|
line.long 0x4 "IFSR,SCn Interrupt Flag and Status Register"
|
|
bitfld.long 0x4 23. "RSTAIFGn,Reset Assertion Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
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|
bitfld.long 0x4 22. "SERIFGn,Sequence Error Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
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bitfld.long 0x4 21. "SEDIFGn,Sequence End Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
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|
bitfld.long 0x4 20. "CONERIFGn,Convention Detection Error Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
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|
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|
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bitfld.long 0x4 19. "CONEDIFGn,Convention Detection End Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
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|
bitfld.long 0x4 18. "TRYERIFGn,Transmit Retry Error Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
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bitfld.long 0x4 17. "SCINIFGn,SCnIN Pin Valid Edge Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
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|
bitfld.long 0x4 16. "BLEDIFGn,Block Length Count End Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
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bitfld.long 0x4 15. "DORn,Data Overrun" "0,1"
|
|
bitfld.long 0x4 14. "FEn,Frame Error" "0,1"
|
|
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|
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bitfld.long 0x4 13. "PEn,Parity Error" "0,1"
|
|
rbitfld.long 0x4 12. "RXBUSYn,RXD Line Busy" "0,1"
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bitfld.long 0x4 6. "RTOIFLAGn,Receive Time Out Interrupt Flag" "0: No request occurred.,1: Request occurred This bit is cleared to '0' when.."
|
|
bitfld.long 0x4 2. "TXCIFLAGn,Transmit Complete Interrupt Flag" "0: No request occurred.,1: The data in the transmit shift register are.."
|
|
newline
|
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bitfld.long 0x4 0. "RXCIFLAGn,Receive Data Register Not Empty Interrupt Flag" "0: No request occurred.,1: There is data in the receive data register. This.."
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "RDR,SCn Receive Data Register"
|
|
bitfld.long 0x0 8. "PARB,Receive Parity" "0,1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RDATA,Receive Data"
|
|
group.long 0x1C++0x1B
|
|
line.long 0x0 "TDR,SCn Transmit Data Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TDATA,Transmit Data"
|
|
line.long 0x4 "BDR,SCn Baud Rate Data Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "BDATA,These bits are used to generate baud rate"
|
|
line.long 0x8 "BCMP,SCn Baud Rate Compensation Register"
|
|
bitfld.long 0x8 15. "BCMPS,Baud Rate Compensation Sign" "0,1"
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bitfld.long 0x8 8. "BCMP8,Baud Rate Compensation 8" "0,1"
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|
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bitfld.long 0x8 7. "BCMP7,Baud Rate Compensation 7" "0,1"
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|
bitfld.long 0x8 6. "BCMP6,Baud Rate Compensation 6" "0,1"
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bitfld.long 0x8 5. "BCMP5,Baud Rate Compensation 5" "0,1"
|
|
bitfld.long 0x8 4. "BCMP4,Baud Rate Compensation 4" "0,1"
|
|
newline
|
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bitfld.long 0x8 3. "BCMP3,Baud Rate Compensation 3" "0,1"
|
|
bitfld.long 0x8 2. "BCMP2,Baud Rate Compensation 2" "0,1"
|
|
newline
|
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bitfld.long 0x8 1. "BCMP1,Baud Rate Compensation 1" "0,1"
|
|
bitfld.long 0x8 0. "BCMP0,Baud Rate Compensation 0" "0,1"
|
|
line.long 0xC "RTODR,SCn Receive Time Out Data Register"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. "RTOD,SCn Receive Time Out Data"
|
|
line.long 0x10 "EGTR,SCn Tx Extra Guard Time Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "EGT,SCn Tx Extra Guard Time"
|
|
line.long 0x14 "T3DR,SCn T3 Duration Data Register"
|
|
hexmask.long.word 0x14 0.--15. 1. "T3D,T3 Duration Data bits. T3D[15:0] + 1"
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|
line.long 0x18 "T4DR,SCn T4 Duration Data Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "T4D,T4 Duration Data bits. T4D[15:0] + 1"
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|
tree.end
|
|
tree.end
|
|
tree "SCU (System Control Unit)"
|
|
base ad:0x0
|
|
tree "SCUCC (Chip Configuration)"
|
|
base ad:0x4000F000
|
|
rgroup.long 0x0++0xB
|
|
line.long 0x0 "VENDORID,Vendor Identification Register"
|
|
hexmask.long 0x0 0.--31. 1. "VENDID,Vendor Identification"
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|
line.long 0x4 "CHIPID,Chip Identification Register"
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|
hexmask.long 0x4 0.--31. 1. "CHIPID,Chip Identification"
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line.long 0x8 "REVNR,Revision Number Register"
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hexmask.long.byte 0x8 0.--7. 1. "REVNO,Chip Revision Number"
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group.long 0x14++0xF
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line.long 0x0 "PMREMAP,Program Memory Remap Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "WTIDKY,Write Identification Key (0xe2f1)"
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hexmask.long.byte 0x0 8.--15. 1. "nPMREM,Write Complement Key"
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newline
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hexmask.long.byte 0x0 0.--7. 1. "PMREM,Program Memory Remap"
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line.long 0x4 "BTPSCR,Boot Pin Status and Control Register"
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bitfld.long 0x4 5.--6. "BFIND,BOOT Pin Function Indicator" "?,?,2: Check the BOOT pin when a system reset occurs by..,3: Check the BOOT pin when a system reset occurs.."
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rbitfld.long 0x4 0. "BTPSTA,BOOT Pin Status" "0: The BOOT pin is low level.,1: The BOOT pin is high level."
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line.long 0x8 "RSTSSR,Reset Source Status Register"
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bitfld.long 0x8 6. "WAKUPSTA,Wake-Up Reset Status" "0: Not detected.,1: WUR was detected."
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|
bitfld.long 0x8 5. "MONSTA,Clock Monitoring Reset Status" "0: Not detected.,1: CMR was detected."
|
|
newline
|
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bitfld.long 0x8 4. "SWSTA,Software Reset Status" "0: Not detected.,1: SWR was detected."
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|
bitfld.long 0x8 3. "EXTSTA,External Pin Reset Status" "0: Not detected.,1: EXTR was detected."
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newline
|
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bitfld.long 0x8 2. "WDTSTA,Watch-Dog Timer Reset Status" "0: Not detected.,1: WDTR was detected."
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|
bitfld.long 0x8 1. "LVRSTA,LVR Reset Status" "0: Not detected.,1: LVR was detected."
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newline
|
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bitfld.long 0x8 0. "PORSTA,POR Reset Status" "0: Not detected.,1: POR was detected."
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line.long 0xC "NMISRCR,NMI Source Selection Register"
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bitfld.long 0xC 7. "NMICON,Non-Maskable Interrupt (NMI) Control" "0: Disable NMI.,1: Enable NMI."
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bitfld.long 0xC 6. "MONINT,Clock Monitoring Interrupt Selection" "0: Non-select clock monitoring interrupt for NMI..,1: Select clock monitoring interrupt for NMI source."
|
|
newline
|
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hexmask.long.byte 0xC 0.--4. 1. "NMISRC,Non-Maskable Interrupt Source Selection"
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wgroup.long 0x24++0x3
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line.long 0x0 "SWRSTR,Software Reset Register"
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hexmask.long.word 0x0 16.--31. 1. "WTIDKY,Write Identification Key (0x9eb3)"
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hexmask.long.byte 0x0 0.--7. 1. "SWRST,Software Reset (System Reset)"
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rgroup.long 0x28++0x3
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line.long 0x0 "SRSTVR,System Reset Validation Register"
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hexmask.long.byte 0x0 0.--7. 1. "VALID,System Reset Validation"
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group.long 0x2C++0x7
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line.long 0x0 "WUTCR,Wake-Up Timer Control Register"
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bitfld.long 0x0 7. "WUTIEN,Wake-Up Timer Interrupt Enable" "0: Disable Wake-Up Timer interrupt.,1: Enable Wake-Up Timer interrupt."
|
|
bitfld.long 0x0 1. "CNTRLD,Counter Reload" "0: No effect.,1: Reload data to counter."
|
|
newline
|
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bitfld.long 0x0 0. "WUTIFLAG,Wake-Up Timer Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
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line.long 0x4 "WUTDR,Wake-Up Timer Data Register"
|
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hexmask.long.tbyte 0x4 0.--23. 1. "WUTDATA,Wake-Up Timer Data"
|
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group.long 0xA8++0x7
|
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line.long 0x0 "HIRCTRM,High Frequency Internal RC Trim Register (HIRCNFIG)"
|
|
hexmask.long.word 0x0 16.--31. 1. "WTIDKY,Write Identification Key (0xa6b5)"
|
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hexmask.long.byte 0x0 8.--15. 1. "nTRMH,Write Complement Key"
|
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newline
|
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bitfld.long 0x0 5.--7. "CTRMH,Factory HIRC Coarse Trim" "0,1,2,3,4,5,6,7"
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hexmask.long.byte 0x0 0.--4. 1. "FTRMH,Factory HIRC Fine Trim"
|
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line.long 0x4 "WDTRCTRM,Watch-Dog Timer RC Trim Register (WDTRCNFIG)"
|
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hexmask.long.word 0x4 16.--31. 1. "WTIDKY,Write Identification Key (0x4c3d)"
|
|
hexmask.long.byte 0x4 8.--15. 1. "nTRMW,Write Complement Key"
|
|
newline
|
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hexmask.long.byte 0x4 4.--7. 1. "CTRMW,Factory WDTRC Coarse Trim"
|
|
bitfld.long 0x4 0.--2. "FTRMW,Factory WDTRC Fine Trim" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "SCUCG (Clock Generation)"
|
|
base ad:0x40001800
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "SCCR,System Clock Control Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "WTIDKY,Write Identification Key (0x570a)"
|
|
bitfld.long 0x0 0.--1. "MCLKSEL,Main Clock Selection MCLK" "0: High Frequency Internal RC Oscillator (32MHz) HIRC,1: External Main Oscillator (2 - 32MHz) XMOSC,2: External Sub Oscillator (32.768kHz) XSOSC,3: Internal Watch-Dog Timer RC Oscillator (40kHz).."
|
|
line.long 0x4 "CLKSRCR,Clock Source Control Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "WTIDKY,Write Identification Key (0xa507)"
|
|
bitfld.long 0x4 12.--13. "HIRCSEL,HIRC Frequency Selection" "0: 32MHz HIRC,1: 16MHz HIRC,2: 8MHz HIRC,3: 4MHz HIRC"
|
|
newline
|
|
bitfld.long 0x4 8. "XMFRNG,Main Oscillator Type and Frequency Range Selection" "0: X-tal for XMOSC 2 to 16MHz,1: External Clock for XMOSC 2MHz to 32MHz"
|
|
bitfld.long 0x4 3. "WDTRCEN,WDTRC Enable" "0: Disable WDTRC.,1: Enable WDTRC."
|
|
newline
|
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bitfld.long 0x4 2. "HIRCEN,HIRC Enable" "0: Disable HIRC.,1: Enable HIRC."
|
|
bitfld.long 0x4 1. "XMOSCEN,XMOSC Enable" "0: Disable XMOSC.,1: Enable XMOSC."
|
|
newline
|
|
bitfld.long 0x4 0. "XSOSCEN,XSOSC Enable" "0: Disable XSOSC.,1: Enable XSOSC."
|
|
line.long 0x8 "SCDIVR1,System Clock Divide Register 1"
|
|
bitfld.long 0x8 4.--6. "WLDIV,Clock Divide for RTCC and LCD Driver/Controller Divider 2" "0: MCLK/64,1: MCLK/128,2: MCLK/256,3: MCLK/512,4: MCLK/1024,?,?,?"
|
|
bitfld.long 0x8 0.--2. "HDIV,Clock Divide for HCLK Divider 0" "0: MCLK/16,1: MCLK/8,2: MCLK/4,3: MCLK/2,4: MCLK/1,?,?,?"
|
|
line.long 0xC "SCDIVR2,System Clock Divide Register 2"
|
|
bitfld.long 0xC 4.--5. "SYSTDIV,Clock Divide for SysTick Timer Divider 3" "0: HCLK/1,1: HCLK/2,2: HCLK/4,3: HCLK/8"
|
|
bitfld.long 0xC 0.--1. "PDIV,Clock Divide for PCLK Divider 1" "0: HCLK/1,1: HCLK/2,2: HCLK/4,3: HCLK/8"
|
|
line.long 0x10 "CLKOCR,Clock Output Control Register"
|
|
bitfld.long 0x10 7. "CLKOEN,Clock Output Enable" "0: Disable clock output.,1: Enable clock output."
|
|
bitfld.long 0x10 6. "POLSEL,Clock Output Polarity Selection when disable" "0: Low level during disable,1: High level during disable"
|
|
newline
|
|
bitfld.long 0x10 3.--5. "CLKODIV,Output Clock Divide Divider 4" "0: Selected Clock/1,1: Selected Clock/2,2: Selected Clock/4,3: Selected Clock/8,4: Selected Clock/16,5: Selected Clock/32,6: Selected Clock/64,7: Selected Clock/128"
|
|
bitfld.long 0x10 0.--2. "CLKOS,Clock Output Selection" "0: Select MCLK.,1: Select WDTRC.,2: Select HIRC.,3: Select HCLK.,4: Select PCLK.,?,?,?"
|
|
line.long 0x14 "CMONCR,Clock Monitoring Control Register"
|
|
bitfld.long 0x14 7. "MONEN,Clock Monitoring Enable" "0: Disable clock monitoring.,1: Enable clock monitoring."
|
|
bitfld.long 0x14 5.--6. "MACTS,Clock Monitoring Action Selection" "0: No action by clock monitoring but flags will be..,1: Reset generation by clock monitoring,2: The system clock will be changed to the WDTRC..,?"
|
|
newline
|
|
bitfld.long 0x14 3. "MONFLAG,Clock Monitoring Result Flag" "0: The clock to be monitored is not ready,1: The clock to be monitored is ready"
|
|
bitfld.long 0x14 2. "NMINTFG,Clock Monitoring Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
newline
|
|
bitfld.long 0x14 0.--1. "MONCS,Monitored Clock Selection" "0: Select MCLK.,1: Select HIRC.,2: Select XMOSC.,3: Select XSOSC."
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "PPCLKEN1,Peripheral Clock Enable Register 1"
|
|
bitfld.long 0x0 30. "T50CLKE,TIMER50 Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
bitfld.long 0x0 25. "T43CLKE,TIMER43 Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
newline
|
|
bitfld.long 0x0 24. "T42CLKE,TIMER42 Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
bitfld.long 0x0 23. "T41CLKE,TIMER41 Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
newline
|
|
bitfld.long 0x0 22. "T40CLKE,TIMER40 Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
bitfld.long 0x0 5. "PFCLKE,Port F Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
newline
|
|
bitfld.long 0x0 4. "PECLKE,Port E Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
bitfld.long 0x0 3. "PDCLKE,Port D Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
newline
|
|
bitfld.long 0x0 2. "PCCLKE,Port C Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
bitfld.long 0x0 1. "PBCLKE,Port B Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
newline
|
|
bitfld.long 0x0 0. "PACLKE,Port A Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
line.long 0x4 "PPCLKEN2,Peripheral Clock Enable Register 2"
|
|
bitfld.long 0x4 31. "DMACLKE,DMAC (DMA Controller) Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
bitfld.long 0x4 28. "CMP1CLKE,CMP1 (Comparator) Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
newline
|
|
bitfld.long 0x4 27. "CMP0CLKE,CMP0 (Comparator) Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
bitfld.long 0x4 25. "SC1CLKE,SC1 (Smart Card) Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
newline
|
|
bitfld.long 0x4 24. "SC0CLKE,SC0 (Smart Card) Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
bitfld.long 0x4 21. "SPI1CLKE,SPI1 Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
newline
|
|
bitfld.long 0x4 20. "SPI0CLKE,SPI0 Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
bitfld.long 0x4 19. "FMCLKE,FMC (Flash Memory Controller) Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
newline
|
|
bitfld.long 0x4 18. "LVICLKE,LVI (Low Voltage Indicator) Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
bitfld.long 0x4 17. "WDTCLKE,WDT (Watch-Dog Timer) Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
newline
|
|
bitfld.long 0x4 15. "LPUTCLKE,LPUART (Low Power UART) Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
bitfld.long 0x4 13. "LCDCLKE,LCD (LCD Driver) Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
newline
|
|
bitfld.long 0x4 12. "CRCLKE,CRC (Cyclic Redundancy Check) Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
bitfld.long 0x4 11. "RTCCLKE,RTCC (Real Time Clock/Calendar) Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
newline
|
|
bitfld.long 0x4 10. "ADCLKE,ADC (Analog to Digital Converter) Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
bitfld.long 0x4 7. "I2C1CLKE,I2C1 (Inter-IC) Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
newline
|
|
bitfld.long 0x4 6. "I2C0CLKE,I2C0 (Inter-IC) Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
bitfld.long 0x4 3. "UT1CLKE,UART1 Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
newline
|
|
bitfld.long 0x4 2. "UT0CLKE,UART0 Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
bitfld.long 0x4 0. "UST10CLKE,USART10 Clock Enable" "0: Disable clock.,1: Enable clock."
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PPCLKSR,Peripheral Clock Selection Register"
|
|
bitfld.long 0x0 24.--25. "T50CLK,TIMER50 Clock Selection" "0: PCLK clock,1: WDTRC clock,2: HIRC clock,3: XSOSC clock"
|
|
bitfld.long 0x0 10.--11. "LPUTCLK,LPUART (Low Power UART) Clock Selection" "0: PCLK clock,1: HIRC clock,2: XSOSC clock,?"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "RTCCLK,RTCC (Real Time Clock/Calendar) Clock Selection" "0: Low level (RTC stuck),1: XSOSC clock,2: WDTRC clock,3: A clock of the MCLK which is divided by divider 2"
|
|
bitfld.long 0x0 6.--7. "LCDCLK,LCD (LCD Driver) Clock Selection" "0: A clock of the MCLK which is divided by divider 2,1: XSOSC clock,2: WDTRC clock,?"
|
|
newline
|
|
bitfld.long 0x0 0. "WDTCLK,WDT (Watch-Dog Timer) Clock Selection" "0: WDTRC clock,1: PCLK clock"
|
|
group.long 0x60++0x7
|
|
line.long 0x0 "PPRST1,Peripheral Reset Register 1"
|
|
bitfld.long 0x0 30. "T50RST,TIMER50 Reset" "0,1"
|
|
bitfld.long 0x0 25. "T43RST,TIMER43 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "T42RST,TIMER42 Reset" "0,1"
|
|
bitfld.long 0x0 23. "T41RST,TIMER41 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "T40RST,TIMER40 Reset" "0,1"
|
|
bitfld.long 0x0 5. "PFRST,Port F Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "PERST,Port E Reset" "0,1"
|
|
bitfld.long 0x0 3. "PDRST,Port D Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "PCRST,Port C Reset" "0,1"
|
|
bitfld.long 0x0 1. "PBRST,Port B Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PARST,Port A Reset" "0,1"
|
|
line.long 0x4 "PPRST2,Peripheral Reset Register 2"
|
|
bitfld.long 0x4 31. "DMARST,DMAC (DMA Controller) Reset" "0,1"
|
|
bitfld.long 0x4 28. "CMP1RST,CMP1 (Comparator) Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "CMP0RST,CMP0 (Comparator) Reset" "0,1"
|
|
bitfld.long 0x4 25. "SC1RST,SC1 (Smart Card) Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "SC0RST,SC0 (Smart Card) Reset" "0,1"
|
|
bitfld.long 0x4 21. "SPI1RST,SPI1 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "SPI0RST,SPI0 Reset" "0,1"
|
|
bitfld.long 0x4 19. "FMCRST,FMC (Flash Memory Controller) Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "LVIRST,LVI (Low Voltage Indicator) Reset" "0,1"
|
|
bitfld.long 0x4 15. "LPUTRST,LPUART (Low Power UART) Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "LCDRST,LCD (LCD Driver) Reset" "0,1"
|
|
bitfld.long 0x4 12. "CRRST,CRC (Cyclic Redundancy Check) Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "RTCRST,RTCC (Real Time Clock/Calendar) Reset" "0,1"
|
|
bitfld.long 0x4 10. "ADRST,ADC (Analog to Digital Converter) Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "I2C1RST,I2C1 (Inter-IC) Reset" "0,1"
|
|
bitfld.long 0x4 6. "I2C0RST,I2C0 (Inter-IC) Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "UT1RST,UART1 Reset" "0,1"
|
|
bitfld.long 0x4 2. "UT0RST,UART0 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "UST10RST,USART10 Reset" "0,1"
|
|
group.long 0x80++0x7
|
|
line.long 0x0 "XTFLSR,X-tal Filter Selection Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "WTIDKY,Write Identification Key (0x9b37)"
|
|
bitfld.long 0x0 0.--2. "XRNS,External Main Oscillator Filter Selection" "0: x-tal LE 4.5MHz,1: 4.5MHz GT x-tal LE 6.5MHz,2: 6.5MHz GT x-tal LE 8.5MHz,3: 8.5MHz GT x-tal LE 10.5MHz,4: 10.5MHz GT x-tal LE 12.5MHz,5: 12.5MHz GT x-tal LE 16.5MHz,?,?"
|
|
line.long 0x4 "XSOSC,Sub Oscillator Control Register"
|
|
bitfld.long 0x4 3.--5. "ISET_I,Sub Oscillator Driving Current Selection" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "SCULV (LVI and LVR)"
|
|
base ad:0x40005100
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "LVICR,Low Voltage Indicator Control Register"
|
|
bitfld.long 0x0 7. "LVIEN,LVI Enable" "0: Disable low voltage indicator.,1: Enable low voltage indicator."
|
|
bitfld.long 0x0 5. "LVINTEN,LVI Interrupt Enable" "0: Disable low voltage indicator interrupt.,1: Enable low voltage indicator interrupt."
|
|
bitfld.long 0x0 4. "LVIFLAG,LVI Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
bitfld.long 0x0 0.--2. "LVIVS,LVI Voltage Selection" "0: 1.75V,1: 1.75V,2: 1.90V,3: 2.05V,4: 2.20V,5: 2.35V,6: 2.50V,7: 2.65V"
|
|
line.long 0x4 "LVRCR,Low Voltage Reset Control Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LVREN,LVR Enable"
|
|
tree.end
|
|
tree.end
|
|
tree "SPI (Serial Peripheral Interface)"
|
|
base ad:0x0
|
|
tree "SPI0"
|
|
base ad:0x40005800
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CR,SPIn Control Register"
|
|
bitfld.long 0x0 7. "SPInEN,SPIn Operation Control" "0: Disable SPIn operation.,1: Enable SPIn operation."
|
|
bitfld.long 0x0 6. "FLSBn,Data Transmission Sequence Selection" "0: msb first,1: lsb first"
|
|
newline
|
|
bitfld.long 0x0 5. "SPInMS,Master/Slave Selection" "0: Slave mode,1: Master mode"
|
|
bitfld.long 0x0 3. "SPInIEN,SPIn Interrupt Enable" "0: Disable SPIn interrupt.,1: Enable SPIn interrupt."
|
|
newline
|
|
bitfld.long 0x0 1. "CPOLn,Selects the clock polarity of SCK" "0: SCK to 0 when idle,1: SCK to 1 when idle"
|
|
bitfld.long 0x0 0. "CPHAn,The CPOLn and this bit determine if data are sampled on the leading or trailing edge of SCK" "0: Start with idle state.,1: Start with inverted idle state."
|
|
line.long 0x4 "SR,SPIn Status Register"
|
|
bitfld.long 0x4 7. "SPInIFLAG,SPIn Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
bitfld.long 0x4 4. "SSnHIGH,This bit is set when the SSn pin goes high level during the pin is the corresponding function" "0: No effect.,1: The SSn pin has gone from low level to high"
|
|
newline
|
|
bitfld.long 0x4 1. "FXCHn,SPIn Pin Function Exchange Control" "0: No effect.,1: Exchange MOSIn and MISOn function"
|
|
bitfld.long 0x4 0. "SSnEN,SSn Pin Operation Control" "0: Disable SSn pin operation.,1: Enable SSn pin operation."
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "RDR,SPIn Receive Data Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RDATA,SPIn Receive Data"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "TDR,SPIn Transmit Data Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TDATA,SPIn Transmit Data"
|
|
line.long 0x4 "PREDR,SPIn Prescaler Data Register"
|
|
hexmask.long.word 0x4 0.--9. 1. "PRED,The value in this register is used to generate an SCK clock"
|
|
tree.end
|
|
tree "SPI1"
|
|
base ad:0x40005880
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CR,SPIn Control Register"
|
|
bitfld.long 0x0 7. "SPInEN,SPIn Operation Control" "0: Disable SPIn operation.,1: Enable SPIn operation."
|
|
bitfld.long 0x0 6. "FLSBn,Data Transmission Sequence Selection" "0: msb first,1: lsb first"
|
|
newline
|
|
bitfld.long 0x0 5. "SPInMS,Master/Slave Selection" "0: Slave mode,1: Master mode"
|
|
bitfld.long 0x0 3. "SPInIEN,SPIn Interrupt Enable" "0: Disable SPIn interrupt.,1: Enable SPIn interrupt."
|
|
newline
|
|
bitfld.long 0x0 1. "CPOLn,Selects the clock polarity of SCK" "0: SCK to 0 when idle,1: SCK to 1 when idle"
|
|
bitfld.long 0x0 0. "CPHAn,The CPOLn and this bit determine if data are sampled on the leading or trailing edge of SCK" "0: Start with idle state.,1: Start with inverted idle state."
|
|
line.long 0x4 "SR,SPIn Status Register"
|
|
bitfld.long 0x4 7. "SPInIFLAG,SPIn Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
bitfld.long 0x4 4. "SSnHIGH,This bit is set when the SSn pin goes high level during the pin is the corresponding function" "0: No effect.,1: The SSn pin has gone from low level to high"
|
|
newline
|
|
bitfld.long 0x4 1. "FXCHn,SPIn Pin Function Exchange Control" "0: No effect.,1: Exchange MOSIn and MISOn function"
|
|
bitfld.long 0x4 0. "SSnEN,SSn Pin Operation Control" "0: Disable SSn pin operation.,1: Enable SSn pin operation."
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "RDR,SPIn Receive Data Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RDATA,SPIn Receive Data"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "TDR,SPIn Transmit Data Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TDATA,SPIn Transmit Data"
|
|
line.long 0x4 "PREDR,SPIn Prescaler Data Register"
|
|
hexmask.long.word 0x4 0.--9. 1. "PRED,The value in this register is used to generate an SCK clock"
|
|
tree.end
|
|
tree "SPIn"
|
|
base ad:0x57000000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CR,SPIn Control Register"
|
|
bitfld.long 0x0 7. "SPInEN,SPIn Operation Control" "0: Disable SPIn operation.,1: Enable SPIn operation."
|
|
bitfld.long 0x0 6. "FLSBn,Data Transmission Sequence Selection" "0: msb first,1: lsb first"
|
|
newline
|
|
bitfld.long 0x0 5. "SPInMS,Master/Slave Selection" "0: Slave mode,1: Master mode"
|
|
bitfld.long 0x0 3. "SPInIEN,SPIn Interrupt Enable" "0: Disable SPIn interrupt.,1: Enable SPIn interrupt."
|
|
newline
|
|
bitfld.long 0x0 1. "CPOLn,Selects the clock polarity of SCK" "0: SCK to 0 when idle,1: SCK to 1 when idle"
|
|
bitfld.long 0x0 0. "CPHAn,The CPOLn and this bit determine if data are sampled on the leading or trailing edge of SCK" "0: Start with idle state.,1: Start with inverted idle state."
|
|
line.long 0x4 "SR,SPIn Status Register"
|
|
bitfld.long 0x4 7. "SPInIFLAG,SPIn Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
bitfld.long 0x4 4. "SSnHIGH,This bit is set when the SSn pin goes high level during the pin is the corresponding function" "0: No effect.,1: The SSn pin has gone from low level to high"
|
|
newline
|
|
bitfld.long 0x4 1. "FXCHn,SPIn Pin Function Exchange Control" "0: No effect.,1: Exchange MOSIn and MISOn function"
|
|
bitfld.long 0x4 0. "SSnEN,SSn Pin Operation Control" "0: Disable SSn pin operation.,1: Enable SSn pin operation."
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "RDR,SPIn Receive Data Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RDATA,SPIn Receive Data"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "TDR,SPIn Transmit Data Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TDATA,SPIn Transmit Data"
|
|
line.long 0x4 "PREDR,SPIn Prescaler Data Register"
|
|
hexmask.long.word 0x4 0.--9. 1. "PRED,The value in this register is used to generate an SCK clock"
|
|
tree.end
|
|
tree.end
|
|
tree "TC (Timer/Counter)"
|
|
base ad:0x0
|
|
tree "TIMER4n"
|
|
base ad:0x51000000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CR,TIMER4n Control Register"
|
|
bitfld.long 0x0 23. "T4nFRCEN,TIMER4n Output Force Level Enable" "0: Disable output force level.,1: Enable output force level during the valid level.."
|
|
bitfld.long 0x0 20.--21. "T4nFRCS,TIMER4n Force Input Selection" "0: T40 force input,1: T41 force input,2: T42 force input,3: T43 force input"
|
|
newline
|
|
bitfld.long 0x0 19. "CNTSHEN,Timer Counter Sharing Enable" "0: Disable counter sharing.,1: Enable counter sharing."
|
|
bitfld.long 0x0 16.--17. "CNTSH,Timer Counter Sharing Selection" "0: Timer n uses timer 40's counter instead of itself.,1: Timer n uses timer 41's counter instead of itself.,2: Timer n uses timer 42's counter instead of itself.,3: Timer n uses timer 43's counter instead of itself."
|
|
newline
|
|
bitfld.long 0x0 15. "T4nEN,TIMER4n Operation Enable" "0: Disable timer n operation.,1: Enable timer n operation. (Counter clear and.."
|
|
bitfld.long 0x0 14. "T4nCLK,TIMER4n Clock Selection" "0: Select the internal prescaled clock.,1: Select the external clock."
|
|
newline
|
|
bitfld.long 0x0 12.--13. "T4nMS,TIMER4n Operation Mode Selection" "0: Interval mode. (All match interrupts can occur),1: Capture mode. (The Period-match interrupt can..,2: Back-to-back mode. (All match and bottom..,3: One-shot interval mode. (All match interrupts.."
|
|
bitfld.long 0x0 11. "T4nECE,TIMER4n External Clock Edge Selection" "0: Select falling edge of external clock.,1: Select rising edge of external clock."
|
|
newline
|
|
bitfld.long 0x0 10. "T4nOPAIR,TIMER4n Output Pair Selection" "0: No output pair,1: Output pair (The TnOUTB signal depends on.."
|
|
bitfld.long 0x0 9. "DLYEN,Delay Time Insertion Enable" "0: Disable to insert delay time to the TnOUTA/TnOUTB.,1: Enable to insert delay time to the TnOUTA/TnOUTB."
|
|
newline
|
|
bitfld.long 0x0 8. "DLYPOS,Delay Time Insertion Position" "0: Insert at front of TnOUTA and at back of TnOUTB..,1: Insert at back of TnOUTA and at front of TnOUTB.."
|
|
bitfld.long 0x0 6.--7. "UPDT,Data Reload Time Selection" "0: Update data to buffer at the time of writing.,1: Update data to buffer at period match.,2: Update data to buffer at bottom.,?"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "T4nINPOL,TIMER4n Capture/'Force level' Polarity Selection" "0: Capture on falling edge Force level on low level.,1: Capture on rising edge Force level on high level.,2: Capture on both of falling and rising edge Not..,?"
|
|
bitfld.long 0x0 1. "T4nPAU,TIMER4n Counter Temporary Pause Control" "0: Continue counting,1: Temporary pause"
|
|
newline
|
|
bitfld.long 0x0 0. "T4nCLR,TIMER4n Counter and Prescaler Clear" "0: No effect.,1: Clear Counter and Prescaler. (Automatically.."
|
|
line.long 0x4 "PDR,TIMER4n Period Data Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "PDATA,TIMER4n Period Data"
|
|
line.long 0x8 "ADR,TIMER4n A Data Register"
|
|
hexmask.long.word 0x8 0.--15. 1. "ADATA,TIMER4n A Data bits. The range is 0x0000 to 0xFFFF"
|
|
line.long 0xC "BDR,TIMER4n B Data Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "BDATA,TIMER4n B Data bits. The range is 0x0000 to 0xFFFF"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "CAPDR,TIMER4n Capture Data Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CAPD,TIMER4n Capture Data"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "PREDR,TIMER4n Prescaler Data Register"
|
|
hexmask.long.word 0x0 0.--11. 1. "PRED,TIMER4n Prescaler Data"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "CNT,TIMER4n Counter Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,TIMER4n Counter"
|
|
group.long 0x1C++0x13
|
|
line.long 0x0 "OUTCR,TIMER4n Output Control Register"
|
|
bitfld.long 0x0 9. "POLB,TnOUTB Output Polarity Selection" "0: Low level start (The TnOUTB pin is started with..,1: High level start (The TnOUTB pin is started with.."
|
|
bitfld.long 0x0 8. "POLA,TnOUTA Output Polarity Selection" "0: Low level start (The TnOUTA pins are started..,1: High level start (The TnOUTA pins are started.."
|
|
newline
|
|
bitfld.long 0x0 5. "T4nBOE,TnOUTB Output Enable" "0: Disable output.,1: Enable output."
|
|
bitfld.long 0x0 4. "T4nAOE,TnOUTA Output Enable" "0: Disable output.,1: Enable output."
|
|
newline
|
|
bitfld.long 0x0 1. "LVLB,Configure TnOUTB Output When Disable" "0: Low level,1: High level"
|
|
bitfld.long 0x0 0. "LVLA,Configure TnOUTA Output When Disable" "0: Low level,1: High level"
|
|
line.long 0x4 "DLY,TIMER4n Output Delay Data Register"
|
|
hexmask.long.word 0x4 0.--9. 1. "DLY,TIMER4n Output Delay Data"
|
|
line.long 0x8 "INTCR,TIMER4n Interrupt Control Register"
|
|
bitfld.long 0x8 11. "T4nFRCIEN,TIMER4n Output Force Level Interrupt Enable" "0: Disable timer n output hold interrupt.,1: Enable timer n output hold interrupt."
|
|
bitfld.long 0x8 10. "T4nCIEN,TIMER4n Capture Interrupt Enable" "0: Disable timer n capture interrupt.,1: Enable timer n capture interrupt."
|
|
newline
|
|
bitfld.long 0x8 9. "T4nBTIEN,TIMER4n Bottom Interrupt Enable" "0: Disable timer n bottom interrupt.,1: Enable timer n bottom interrupt."
|
|
bitfld.long 0x8 8. "T4nPMIEN,TIMER4n Period Match Interrupt Enable" "0: Disable timer n period interrupt.,1: Enable timer n period interrupt."
|
|
newline
|
|
bitfld.long 0x8 2.--3. "T4nBMIEN,TIMER4n B Match Interrupt Enable" "0: Disable B match interrupt.,1: Enable B match interrupt on up counting.,2: Enable B match interrupt on down counting.,3: Enable B match interrupt on up and down counting."
|
|
bitfld.long 0x8 0.--1. "T4nAMIEN,TIMER4n A Match Interrupt Enable" "0: Disable A match interrupt.,1: Enable A match interrupt on up counting.,2: Enable A match interrupt on down counting.,3: Enable A match interrupt on up and down counting."
|
|
line.long 0xC "INTFLAG,TIMER4n Interrupt Flag Register"
|
|
bitfld.long 0xC 7. "T4nFRCIFLAG,TIMER4n Output Force Level Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
bitfld.long 0xC 6. "T4nCIFLAG,TIMER4n Capture Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
newline
|
|
bitfld.long 0xC 5. "T4nBTIFLAG,TIMER4n Bottom Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
bitfld.long 0xC 4. "T4nPMIFLAG,TIMER4n Period Match Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
newline
|
|
bitfld.long 0xC 1. "T4nBMIFLAG,TIMER4n B Match Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
bitfld.long 0xC 0. "T4nAMIFLAG,TIMER4n A Match Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
line.long 0x10 "ADTCR,TIMER4n ADC Trigger Control Register"
|
|
bitfld.long 0x10 9. "T4nBTTG,Select TIMER4n Bottom for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by bottom.,1: Enable ADC trigger signal generator by bottom."
|
|
bitfld.long 0x10 8. "T4nPMTG,Select TIMER4n Period Match for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by period..,1: Enable ADC trigger signal generator by period.."
|
|
newline
|
|
bitfld.long 0x10 2.--3. "T4nBMTG,Select TIMER4n B Match for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by B match.,1: Enable ADC trigger signal generator by B match..,2: Enable ADC trigger signal generator by B match..,3: Enable ADC trigger signal generator by B match.."
|
|
bitfld.long 0x10 0.--1. "T4nAMTG,Select TIMER4n A Match for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by A match.,1: Enable ADC trigger signal generator by A match..,2: Enable ADC trigger signal generator by A match..,3: Enable ADC trigger signal generator by A match.."
|
|
tree.end
|
|
tree "TIMER5n"
|
|
base ad:0x52000000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CR,TIMER5n Control Register"
|
|
bitfld.long 0x0 20. "T5nCLEN,TIMER5n Counter Clear Input Enable" "0: Disable counter clear input.,1: Enable counter clear input at a valid edge by.."
|
|
bitfld.long 0x0 18.--19. "T5nINSEL,TIMER5n Capture Signal Selection" "0: Select the external clock.,1: Select XSOSC.,2: Select WDTRC.,?"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "T5nINPOL,TIMER5n Capture/'Counter Clear Input' Polarity Selection" "0: Capture or 'Counter Clear Input' on Falling Edge,1: Capture or 'Counter Clear Input' on Rising Edge,2: Capture or 'Counter Clear Input' on both of..,?"
|
|
bitfld.long 0x0 15. "T5nEN,TIMER5n Operation Enable" "0: Disable the timer operation.,1: Enable the timer operation."
|
|
newline
|
|
bitfld.long 0x0 14. "T5nCLK,TIMER5n Clock Selection" "0: Select the internal prescaled clock.,1: Select the external clock."
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|
bitfld.long 0x0 12.--13. "T5nMS,TIMER5n Operation Mode Selection" "0: Interval mode. (T5nOUT: toggle at A-match),1: Capture mode. (The A-match interrupt can occur),2: PPG one-shot mode. (T5nOUT: Programmable pulse..,3: PPG repeat mode. (T5nOUT: Programmable pulse.."
|
|
newline
|
|
bitfld.long 0x0 11. "T5nECE,TIMER5n External Clock Edge Selection" "0: Select falling edge of external clock.,1: Select rising edge of external clock."
|
|
bitfld.long 0x0 9. "T5nOPOL,T5nOUT Polarity Selection" "0: Start high. (T5nOUT is low level at disable),1: Start low. (T5nOUT is high level at disable)"
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|
newline
|
|
bitfld.long 0x0 8. "T5nPAU,TIMER5n Counter Temporary Pause Control" "0: Continue counting,1: Temporary pause"
|
|
bitfld.long 0x0 7. "T5nMIEN,TIMER5n Match Interrupt Enable" "0: Disable the match interrupt.,1: Enable the match interrupt."
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|
newline
|
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bitfld.long 0x0 6. "T5nCIEN,TIMER5n Capture Interrupt Enable" "0: Disable the capture interrupt.,1: Enable the capture interrupt."
|
|
bitfld.long 0x0 5. "T5nCLIEN,TIMER5n Counter Clear Interrupt Enable" "0: Disable the counter clear input interrupt.,1: Enable the counter clear input interrupt."
|
|
newline
|
|
bitfld.long 0x0 3. "T5nMIFLAG,TIMER5n Match Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
bitfld.long 0x0 2. "T5nCIFLAG,TIMER5n Capture Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
newline
|
|
bitfld.long 0x0 1. "T5nCLIFLAG,TIMER5n Counter Clear Input Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
bitfld.long 0x0 0. "T5nCLR,TIMER5n Counter and Prescaler Clear" "0: No effect.,1: Clear Counter and Prescaler. (Automatically.."
|
|
line.long 0x4 "ADR,TIMER5n A Data Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "ADATA,TIMER5n A Data"
|
|
line.long 0x8 "BDR,TIMER5n B Data Register"
|
|
hexmask.long.word 0x8 0.--15. 1. "BDATA,TIMER5n B Data"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "CAPDR,TIMER5n Capture Data Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CAPD,TIMER5n Capture Data"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "PREDR,TIMER5n Prescaler Data Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "PRED,TIMER5n Prescaler Data"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "CNT,TIMER5n Counter Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,TIMER5n Counter"
|
|
tree.end
|
|
tree "TIMER40"
|
|
base ad:0x40002700
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CR,TIMER4n Control Register"
|
|
bitfld.long 0x0 23. "T4nFRCEN,TIMER4n Output Force Level Enable" "0: Disable output force level.,1: Enable output force level during the valid level.."
|
|
bitfld.long 0x0 20.--21. "T4nFRCS,TIMER4n Force Input Selection" "0: T40 force input,1: T41 force input,2: T42 force input,3: T43 force input"
|
|
newline
|
|
bitfld.long 0x0 19. "CNTSHEN,Timer Counter Sharing Enable" "0: Disable counter sharing.,1: Enable counter sharing."
|
|
bitfld.long 0x0 16.--17. "CNTSH,Timer Counter Sharing Selection" "0: Timer n uses timer 40's counter instead of itself.,1: Timer n uses timer 41's counter instead of itself.,2: Timer n uses timer 42's counter instead of itself.,3: Timer n uses timer 43's counter instead of itself."
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|
newline
|
|
bitfld.long 0x0 15. "T4nEN,TIMER4n Operation Enable" "0: Disable timer n operation.,1: Enable timer n operation. (Counter clear and.."
|
|
bitfld.long 0x0 14. "T4nCLK,TIMER4n Clock Selection" "0: Select the internal prescaled clock.,1: Select the external clock."
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|
newline
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bitfld.long 0x0 12.--13. "T4nMS,TIMER4n Operation Mode Selection" "0: Interval mode. (All match interrupts can occur),1: Capture mode. (The Period-match interrupt can..,2: Back-to-back mode. (All match and bottom..,3: One-shot interval mode. (All match interrupts.."
|
|
bitfld.long 0x0 11. "T4nECE,TIMER4n External Clock Edge Selection" "0: Select falling edge of external clock.,1: Select rising edge of external clock."
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|
newline
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bitfld.long 0x0 10. "T4nOPAIR,TIMER4n Output Pair Selection" "0: No output pair,1: Output pair (The TnOUTB signal depends on.."
|
|
bitfld.long 0x0 9. "DLYEN,Delay Time Insertion Enable" "0: Disable to insert delay time to the TnOUTA/TnOUTB.,1: Enable to insert delay time to the TnOUTA/TnOUTB."
|
|
newline
|
|
bitfld.long 0x0 8. "DLYPOS,Delay Time Insertion Position" "0: Insert at front of TnOUTA and at back of TnOUTB..,1: Insert at back of TnOUTA and at front of TnOUTB.."
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|
bitfld.long 0x0 6.--7. "UPDT,Data Reload Time Selection" "0: Update data to buffer at the time of writing.,1: Update data to buffer at period match.,2: Update data to buffer at bottom.,?"
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|
newline
|
|
bitfld.long 0x0 4.--5. "T4nINPOL,TIMER4n Capture/'Force level' Polarity Selection" "0: Capture on falling edge Force level on low level.,1: Capture on rising edge Force level on high level.,2: Capture on both of falling and rising edge Not..,?"
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|
bitfld.long 0x0 1. "T4nPAU,TIMER4n Counter Temporary Pause Control" "0: Continue counting,1: Temporary pause"
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|
newline
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bitfld.long 0x0 0. "T4nCLR,TIMER4n Counter and Prescaler Clear" "0: No effect.,1: Clear Counter and Prescaler. (Automatically.."
|
|
line.long 0x4 "PDR,TIMER4n Period Data Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "PDATA,TIMER4n Period Data"
|
|
line.long 0x8 "ADR,TIMER4n A Data Register"
|
|
hexmask.long.word 0x8 0.--15. 1. "ADATA,TIMER4n A Data bits. The range is 0x0000 to 0xFFFF"
|
|
line.long 0xC "BDR,TIMER4n B Data Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "BDATA,TIMER4n B Data bits. The range is 0x0000 to 0xFFFF"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "CAPDR,TIMER4n Capture Data Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CAPD,TIMER4n Capture Data"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "PREDR,TIMER4n Prescaler Data Register"
|
|
hexmask.long.word 0x0 0.--11. 1. "PRED,TIMER4n Prescaler Data"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "CNT,TIMER4n Counter Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,TIMER4n Counter"
|
|
group.long 0x1C++0x13
|
|
line.long 0x0 "OUTCR,TIMER4n Output Control Register"
|
|
bitfld.long 0x0 9. "POLB,TnOUTB Output Polarity Selection" "0: Low level start (The TnOUTB pin is started with..,1: High level start (The TnOUTB pin is started with.."
|
|
bitfld.long 0x0 8. "POLA,TnOUTA Output Polarity Selection" "0: Low level start (The TnOUTA pins are started..,1: High level start (The TnOUTA pins are started.."
|
|
newline
|
|
bitfld.long 0x0 5. "T4nBOE,TnOUTB Output Enable" "0: Disable output.,1: Enable output."
|
|
bitfld.long 0x0 4. "T4nAOE,TnOUTA Output Enable" "0: Disable output.,1: Enable output."
|
|
newline
|
|
bitfld.long 0x0 1. "LVLB,Configure TnOUTB Output When Disable" "0: Low level,1: High level"
|
|
bitfld.long 0x0 0. "LVLA,Configure TnOUTA Output When Disable" "0: Low level,1: High level"
|
|
line.long 0x4 "DLY,TIMER4n Output Delay Data Register"
|
|
hexmask.long.word 0x4 0.--9. 1. "DLY,TIMER4n Output Delay Data"
|
|
line.long 0x8 "INTCR,TIMER4n Interrupt Control Register"
|
|
bitfld.long 0x8 11. "T4nFRCIEN,TIMER4n Output Force Level Interrupt Enable" "0: Disable timer n output hold interrupt.,1: Enable timer n output hold interrupt."
|
|
bitfld.long 0x8 10. "T4nCIEN,TIMER4n Capture Interrupt Enable" "0: Disable timer n capture interrupt.,1: Enable timer n capture interrupt."
|
|
newline
|
|
bitfld.long 0x8 9. "T4nBTIEN,TIMER4n Bottom Interrupt Enable" "0: Disable timer n bottom interrupt.,1: Enable timer n bottom interrupt."
|
|
bitfld.long 0x8 8. "T4nPMIEN,TIMER4n Period Match Interrupt Enable" "0: Disable timer n period interrupt.,1: Enable timer n period interrupt."
|
|
newline
|
|
bitfld.long 0x8 2.--3. "T4nBMIEN,TIMER4n B Match Interrupt Enable" "0: Disable B match interrupt.,1: Enable B match interrupt on up counting.,2: Enable B match interrupt on down counting.,3: Enable B match interrupt on up and down counting."
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|
bitfld.long 0x8 0.--1. "T4nAMIEN,TIMER4n A Match Interrupt Enable" "0: Disable A match interrupt.,1: Enable A match interrupt on up counting.,2: Enable A match interrupt on down counting.,3: Enable A match interrupt on up and down counting."
|
|
line.long 0xC "INTFLAG,TIMER4n Interrupt Flag Register"
|
|
bitfld.long 0xC 7. "T4nFRCIFLAG,TIMER4n Output Force Level Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
bitfld.long 0xC 6. "T4nCIFLAG,TIMER4n Capture Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
newline
|
|
bitfld.long 0xC 5. "T4nBTIFLAG,TIMER4n Bottom Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
bitfld.long 0xC 4. "T4nPMIFLAG,TIMER4n Period Match Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
newline
|
|
bitfld.long 0xC 1. "T4nBMIFLAG,TIMER4n B Match Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
bitfld.long 0xC 0. "T4nAMIFLAG,TIMER4n A Match Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
line.long 0x10 "ADTCR,TIMER4n ADC Trigger Control Register"
|
|
bitfld.long 0x10 9. "T4nBTTG,Select TIMER4n Bottom for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by bottom.,1: Enable ADC trigger signal generator by bottom."
|
|
bitfld.long 0x10 8. "T4nPMTG,Select TIMER4n Period Match for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by period..,1: Enable ADC trigger signal generator by period.."
|
|
newline
|
|
bitfld.long 0x10 2.--3. "T4nBMTG,Select TIMER4n B Match for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by B match.,1: Enable ADC trigger signal generator by B match..,2: Enable ADC trigger signal generator by B match..,3: Enable ADC trigger signal generator by B match.."
|
|
bitfld.long 0x10 0.--1. "T4nAMTG,Select TIMER4n A Match for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by A match.,1: Enable ADC trigger signal generator by A match..,2: Enable ADC trigger signal generator by A match..,3: Enable ADC trigger signal generator by A match.."
|
|
tree.end
|
|
tree "TIMER41"
|
|
base ad:0x40002780
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CR,TIMER4n Control Register"
|
|
bitfld.long 0x0 23. "T4nFRCEN,TIMER4n Output Force Level Enable" "0: Disable output force level.,1: Enable output force level during the valid level.."
|
|
bitfld.long 0x0 20.--21. "T4nFRCS,TIMER4n Force Input Selection" "0: T40 force input,1: T41 force input,2: T42 force input,3: T43 force input"
|
|
newline
|
|
bitfld.long 0x0 19. "CNTSHEN,Timer Counter Sharing Enable" "0: Disable counter sharing.,1: Enable counter sharing."
|
|
bitfld.long 0x0 16.--17. "CNTSH,Timer Counter Sharing Selection" "0: Timer n uses timer 40's counter instead of itself.,1: Timer n uses timer 41's counter instead of itself.,2: Timer n uses timer 42's counter instead of itself.,3: Timer n uses timer 43's counter instead of itself."
|
|
newline
|
|
bitfld.long 0x0 15. "T4nEN,TIMER4n Operation Enable" "0: Disable timer n operation.,1: Enable timer n operation. (Counter clear and.."
|
|
bitfld.long 0x0 14. "T4nCLK,TIMER4n Clock Selection" "0: Select the internal prescaled clock.,1: Select the external clock."
|
|
newline
|
|
bitfld.long 0x0 12.--13. "T4nMS,TIMER4n Operation Mode Selection" "0: Interval mode. (All match interrupts can occur),1: Capture mode. (The Period-match interrupt can..,2: Back-to-back mode. (All match and bottom..,3: One-shot interval mode. (All match interrupts.."
|
|
bitfld.long 0x0 11. "T4nECE,TIMER4n External Clock Edge Selection" "0: Select falling edge of external clock.,1: Select rising edge of external clock."
|
|
newline
|
|
bitfld.long 0x0 10. "T4nOPAIR,TIMER4n Output Pair Selection" "0: No output pair,1: Output pair (The TnOUTB signal depends on.."
|
|
bitfld.long 0x0 9. "DLYEN,Delay Time Insertion Enable" "0: Disable to insert delay time to the TnOUTA/TnOUTB.,1: Enable to insert delay time to the TnOUTA/TnOUTB."
|
|
newline
|
|
bitfld.long 0x0 8. "DLYPOS,Delay Time Insertion Position" "0: Insert at front of TnOUTA and at back of TnOUTB..,1: Insert at back of TnOUTA and at front of TnOUTB.."
|
|
bitfld.long 0x0 6.--7. "UPDT,Data Reload Time Selection" "0: Update data to buffer at the time of writing.,1: Update data to buffer at period match.,2: Update data to buffer at bottom.,?"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "T4nINPOL,TIMER4n Capture/'Force level' Polarity Selection" "0: Capture on falling edge Force level on low level.,1: Capture on rising edge Force level on high level.,2: Capture on both of falling and rising edge Not..,?"
|
|
bitfld.long 0x0 1. "T4nPAU,TIMER4n Counter Temporary Pause Control" "0: Continue counting,1: Temporary pause"
|
|
newline
|
|
bitfld.long 0x0 0. "T4nCLR,TIMER4n Counter and Prescaler Clear" "0: No effect.,1: Clear Counter and Prescaler. (Automatically.."
|
|
line.long 0x4 "PDR,TIMER4n Period Data Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "PDATA,TIMER4n Period Data"
|
|
line.long 0x8 "ADR,TIMER4n A Data Register"
|
|
hexmask.long.word 0x8 0.--15. 1. "ADATA,TIMER4n A Data bits. The range is 0x0000 to 0xFFFF"
|
|
line.long 0xC "BDR,TIMER4n B Data Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "BDATA,TIMER4n B Data bits. The range is 0x0000 to 0xFFFF"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "CAPDR,TIMER4n Capture Data Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CAPD,TIMER4n Capture Data"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "PREDR,TIMER4n Prescaler Data Register"
|
|
hexmask.long.word 0x0 0.--11. 1. "PRED,TIMER4n Prescaler Data"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "CNT,TIMER4n Counter Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,TIMER4n Counter"
|
|
group.long 0x1C++0x13
|
|
line.long 0x0 "OUTCR,TIMER4n Output Control Register"
|
|
bitfld.long 0x0 9. "POLB,TnOUTB Output Polarity Selection" "0: Low level start (The TnOUTB pin is started with..,1: High level start (The TnOUTB pin is started with.."
|
|
bitfld.long 0x0 8. "POLA,TnOUTA Output Polarity Selection" "0: Low level start (The TnOUTA pins are started..,1: High level start (The TnOUTA pins are started.."
|
|
newline
|
|
bitfld.long 0x0 5. "T4nBOE,TnOUTB Output Enable" "0: Disable output.,1: Enable output."
|
|
bitfld.long 0x0 4. "T4nAOE,TnOUTA Output Enable" "0: Disable output.,1: Enable output."
|
|
newline
|
|
bitfld.long 0x0 1. "LVLB,Configure TnOUTB Output When Disable" "0: Low level,1: High level"
|
|
bitfld.long 0x0 0. "LVLA,Configure TnOUTA Output When Disable" "0: Low level,1: High level"
|
|
line.long 0x4 "DLY,TIMER4n Output Delay Data Register"
|
|
hexmask.long.word 0x4 0.--9. 1. "DLY,TIMER4n Output Delay Data"
|
|
line.long 0x8 "INTCR,TIMER4n Interrupt Control Register"
|
|
bitfld.long 0x8 11. "T4nFRCIEN,TIMER4n Output Force Level Interrupt Enable" "0: Disable timer n output hold interrupt.,1: Enable timer n output hold interrupt."
|
|
bitfld.long 0x8 10. "T4nCIEN,TIMER4n Capture Interrupt Enable" "0: Disable timer n capture interrupt.,1: Enable timer n capture interrupt."
|
|
newline
|
|
bitfld.long 0x8 9. "T4nBTIEN,TIMER4n Bottom Interrupt Enable" "0: Disable timer n bottom interrupt.,1: Enable timer n bottom interrupt."
|
|
bitfld.long 0x8 8. "T4nPMIEN,TIMER4n Period Match Interrupt Enable" "0: Disable timer n period interrupt.,1: Enable timer n period interrupt."
|
|
newline
|
|
bitfld.long 0x8 2.--3. "T4nBMIEN,TIMER4n B Match Interrupt Enable" "0: Disable B match interrupt.,1: Enable B match interrupt on up counting.,2: Enable B match interrupt on down counting.,3: Enable B match interrupt on up and down counting."
|
|
bitfld.long 0x8 0.--1. "T4nAMIEN,TIMER4n A Match Interrupt Enable" "0: Disable A match interrupt.,1: Enable A match interrupt on up counting.,2: Enable A match interrupt on down counting.,3: Enable A match interrupt on up and down counting."
|
|
line.long 0xC "INTFLAG,TIMER4n Interrupt Flag Register"
|
|
bitfld.long 0xC 7. "T4nFRCIFLAG,TIMER4n Output Force Level Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
bitfld.long 0xC 6. "T4nCIFLAG,TIMER4n Capture Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
newline
|
|
bitfld.long 0xC 5. "T4nBTIFLAG,TIMER4n Bottom Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
bitfld.long 0xC 4. "T4nPMIFLAG,TIMER4n Period Match Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
newline
|
|
bitfld.long 0xC 1. "T4nBMIFLAG,TIMER4n B Match Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
bitfld.long 0xC 0. "T4nAMIFLAG,TIMER4n A Match Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
line.long 0x10 "ADTCR,TIMER4n ADC Trigger Control Register"
|
|
bitfld.long 0x10 9. "T4nBTTG,Select TIMER4n Bottom for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by bottom.,1: Enable ADC trigger signal generator by bottom."
|
|
bitfld.long 0x10 8. "T4nPMTG,Select TIMER4n Period Match for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by period..,1: Enable ADC trigger signal generator by period.."
|
|
newline
|
|
bitfld.long 0x10 2.--3. "T4nBMTG,Select TIMER4n B Match for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by B match.,1: Enable ADC trigger signal generator by B match..,2: Enable ADC trigger signal generator by B match..,3: Enable ADC trigger signal generator by B match.."
|
|
bitfld.long 0x10 0.--1. "T4nAMTG,Select TIMER4n A Match for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by A match.,1: Enable ADC trigger signal generator by A match..,2: Enable ADC trigger signal generator by A match..,3: Enable ADC trigger signal generator by A match.."
|
|
tree.end
|
|
tree "TIMER42"
|
|
base ad:0x40002800
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CR,TIMER4n Control Register"
|
|
bitfld.long 0x0 23. "T4nFRCEN,TIMER4n Output Force Level Enable" "0: Disable output force level.,1: Enable output force level during the valid level.."
|
|
bitfld.long 0x0 20.--21. "T4nFRCS,TIMER4n Force Input Selection" "0: T40 force input,1: T41 force input,2: T42 force input,3: T43 force input"
|
|
newline
|
|
bitfld.long 0x0 19. "CNTSHEN,Timer Counter Sharing Enable" "0: Disable counter sharing.,1: Enable counter sharing."
|
|
bitfld.long 0x0 16.--17. "CNTSH,Timer Counter Sharing Selection" "0: Timer n uses timer 40's counter instead of itself.,1: Timer n uses timer 41's counter instead of itself.,2: Timer n uses timer 42's counter instead of itself.,3: Timer n uses timer 43's counter instead of itself."
|
|
newline
|
|
bitfld.long 0x0 15. "T4nEN,TIMER4n Operation Enable" "0: Disable timer n operation.,1: Enable timer n operation. (Counter clear and.."
|
|
bitfld.long 0x0 14. "T4nCLK,TIMER4n Clock Selection" "0: Select the internal prescaled clock.,1: Select the external clock."
|
|
newline
|
|
bitfld.long 0x0 12.--13. "T4nMS,TIMER4n Operation Mode Selection" "0: Interval mode. (All match interrupts can occur),1: Capture mode. (The Period-match interrupt can..,2: Back-to-back mode. (All match and bottom..,3: One-shot interval mode. (All match interrupts.."
|
|
bitfld.long 0x0 11. "T4nECE,TIMER4n External Clock Edge Selection" "0: Select falling edge of external clock.,1: Select rising edge of external clock."
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|
newline
|
|
bitfld.long 0x0 10. "T4nOPAIR,TIMER4n Output Pair Selection" "0: No output pair,1: Output pair (The TnOUTB signal depends on.."
|
|
bitfld.long 0x0 9. "DLYEN,Delay Time Insertion Enable" "0: Disable to insert delay time to the TnOUTA/TnOUTB.,1: Enable to insert delay time to the TnOUTA/TnOUTB."
|
|
newline
|
|
bitfld.long 0x0 8. "DLYPOS,Delay Time Insertion Position" "0: Insert at front of TnOUTA and at back of TnOUTB..,1: Insert at back of TnOUTA and at front of TnOUTB.."
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|
bitfld.long 0x0 6.--7. "UPDT,Data Reload Time Selection" "0: Update data to buffer at the time of writing.,1: Update data to buffer at period match.,2: Update data to buffer at bottom.,?"
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|
newline
|
|
bitfld.long 0x0 4.--5. "T4nINPOL,TIMER4n Capture/'Force level' Polarity Selection" "0: Capture on falling edge Force level on low level.,1: Capture on rising edge Force level on high level.,2: Capture on both of falling and rising edge Not..,?"
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|
bitfld.long 0x0 1. "T4nPAU,TIMER4n Counter Temporary Pause Control" "0: Continue counting,1: Temporary pause"
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|
newline
|
|
bitfld.long 0x0 0. "T4nCLR,TIMER4n Counter and Prescaler Clear" "0: No effect.,1: Clear Counter and Prescaler. (Automatically.."
|
|
line.long 0x4 "PDR,TIMER4n Period Data Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "PDATA,TIMER4n Period Data"
|
|
line.long 0x8 "ADR,TIMER4n A Data Register"
|
|
hexmask.long.word 0x8 0.--15. 1. "ADATA,TIMER4n A Data bits. The range is 0x0000 to 0xFFFF"
|
|
line.long 0xC "BDR,TIMER4n B Data Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "BDATA,TIMER4n B Data bits. The range is 0x0000 to 0xFFFF"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "CAPDR,TIMER4n Capture Data Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CAPD,TIMER4n Capture Data"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "PREDR,TIMER4n Prescaler Data Register"
|
|
hexmask.long.word 0x0 0.--11. 1. "PRED,TIMER4n Prescaler Data"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "CNT,TIMER4n Counter Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,TIMER4n Counter"
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|
group.long 0x1C++0x13
|
|
line.long 0x0 "OUTCR,TIMER4n Output Control Register"
|
|
bitfld.long 0x0 9. "POLB,TnOUTB Output Polarity Selection" "0: Low level start (The TnOUTB pin is started with..,1: High level start (The TnOUTB pin is started with.."
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|
bitfld.long 0x0 8. "POLA,TnOUTA Output Polarity Selection" "0: Low level start (The TnOUTA pins are started..,1: High level start (The TnOUTA pins are started.."
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|
newline
|
|
bitfld.long 0x0 5. "T4nBOE,TnOUTB Output Enable" "0: Disable output.,1: Enable output."
|
|
bitfld.long 0x0 4. "T4nAOE,TnOUTA Output Enable" "0: Disable output.,1: Enable output."
|
|
newline
|
|
bitfld.long 0x0 1. "LVLB,Configure TnOUTB Output When Disable" "0: Low level,1: High level"
|
|
bitfld.long 0x0 0. "LVLA,Configure TnOUTA Output When Disable" "0: Low level,1: High level"
|
|
line.long 0x4 "DLY,TIMER4n Output Delay Data Register"
|
|
hexmask.long.word 0x4 0.--9. 1. "DLY,TIMER4n Output Delay Data"
|
|
line.long 0x8 "INTCR,TIMER4n Interrupt Control Register"
|
|
bitfld.long 0x8 11. "T4nFRCIEN,TIMER4n Output Force Level Interrupt Enable" "0: Disable timer n output hold interrupt.,1: Enable timer n output hold interrupt."
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|
bitfld.long 0x8 10. "T4nCIEN,TIMER4n Capture Interrupt Enable" "0: Disable timer n capture interrupt.,1: Enable timer n capture interrupt."
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|
newline
|
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bitfld.long 0x8 9. "T4nBTIEN,TIMER4n Bottom Interrupt Enable" "0: Disable timer n bottom interrupt.,1: Enable timer n bottom interrupt."
|
|
bitfld.long 0x8 8. "T4nPMIEN,TIMER4n Period Match Interrupt Enable" "0: Disable timer n period interrupt.,1: Enable timer n period interrupt."
|
|
newline
|
|
bitfld.long 0x8 2.--3. "T4nBMIEN,TIMER4n B Match Interrupt Enable" "0: Disable B match interrupt.,1: Enable B match interrupt on up counting.,2: Enable B match interrupt on down counting.,3: Enable B match interrupt on up and down counting."
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bitfld.long 0x8 0.--1. "T4nAMIEN,TIMER4n A Match Interrupt Enable" "0: Disable A match interrupt.,1: Enable A match interrupt on up counting.,2: Enable A match interrupt on down counting.,3: Enable A match interrupt on up and down counting."
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|
line.long 0xC "INTFLAG,TIMER4n Interrupt Flag Register"
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bitfld.long 0xC 7. "T4nFRCIFLAG,TIMER4n Output Force Level Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
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|
bitfld.long 0xC 6. "T4nCIFLAG,TIMER4n Capture Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
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|
newline
|
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bitfld.long 0xC 5. "T4nBTIFLAG,TIMER4n Bottom Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
bitfld.long 0xC 4. "T4nPMIFLAG,TIMER4n Period Match Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
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|
newline
|
|
bitfld.long 0xC 1. "T4nBMIFLAG,TIMER4n B Match Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
bitfld.long 0xC 0. "T4nAMIFLAG,TIMER4n A Match Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
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|
line.long 0x10 "ADTCR,TIMER4n ADC Trigger Control Register"
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bitfld.long 0x10 9. "T4nBTTG,Select TIMER4n Bottom for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by bottom.,1: Enable ADC trigger signal generator by bottom."
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bitfld.long 0x10 8. "T4nPMTG,Select TIMER4n Period Match for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by period..,1: Enable ADC trigger signal generator by period.."
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|
newline
|
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bitfld.long 0x10 2.--3. "T4nBMTG,Select TIMER4n B Match for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by B match.,1: Enable ADC trigger signal generator by B match..,2: Enable ADC trigger signal generator by B match..,3: Enable ADC trigger signal generator by B match.."
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bitfld.long 0x10 0.--1. "T4nAMTG,Select TIMER4n A Match for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by A match.,1: Enable ADC trigger signal generator by A match..,2: Enable ADC trigger signal generator by A match..,3: Enable ADC trigger signal generator by A match.."
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|
tree.end
|
|
tree "TIMER43"
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|
base ad:0x40002880
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CR,TIMER4n Control Register"
|
|
bitfld.long 0x0 23. "T4nFRCEN,TIMER4n Output Force Level Enable" "0: Disable output force level.,1: Enable output force level during the valid level.."
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|
bitfld.long 0x0 20.--21. "T4nFRCS,TIMER4n Force Input Selection" "0: T40 force input,1: T41 force input,2: T42 force input,3: T43 force input"
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|
newline
|
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bitfld.long 0x0 19. "CNTSHEN,Timer Counter Sharing Enable" "0: Disable counter sharing.,1: Enable counter sharing."
|
|
bitfld.long 0x0 16.--17. "CNTSH,Timer Counter Sharing Selection" "0: Timer n uses timer 40's counter instead of itself.,1: Timer n uses timer 41's counter instead of itself.,2: Timer n uses timer 42's counter instead of itself.,3: Timer n uses timer 43's counter instead of itself."
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|
newline
|
|
bitfld.long 0x0 15. "T4nEN,TIMER4n Operation Enable" "0: Disable timer n operation.,1: Enable timer n operation. (Counter clear and.."
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|
bitfld.long 0x0 14. "T4nCLK,TIMER4n Clock Selection" "0: Select the internal prescaled clock.,1: Select the external clock."
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|
newline
|
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bitfld.long 0x0 12.--13. "T4nMS,TIMER4n Operation Mode Selection" "0: Interval mode. (All match interrupts can occur),1: Capture mode. (The Period-match interrupt can..,2: Back-to-back mode. (All match and bottom..,3: One-shot interval mode. (All match interrupts.."
|
|
bitfld.long 0x0 11. "T4nECE,TIMER4n External Clock Edge Selection" "0: Select falling edge of external clock.,1: Select rising edge of external clock."
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|
newline
|
|
bitfld.long 0x0 10. "T4nOPAIR,TIMER4n Output Pair Selection" "0: No output pair,1: Output pair (The TnOUTB signal depends on.."
|
|
bitfld.long 0x0 9. "DLYEN,Delay Time Insertion Enable" "0: Disable to insert delay time to the TnOUTA/TnOUTB.,1: Enable to insert delay time to the TnOUTA/TnOUTB."
|
|
newline
|
|
bitfld.long 0x0 8. "DLYPOS,Delay Time Insertion Position" "0: Insert at front of TnOUTA and at back of TnOUTB..,1: Insert at back of TnOUTA and at front of TnOUTB.."
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|
bitfld.long 0x0 6.--7. "UPDT,Data Reload Time Selection" "0: Update data to buffer at the time of writing.,1: Update data to buffer at period match.,2: Update data to buffer at bottom.,?"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "T4nINPOL,TIMER4n Capture/'Force level' Polarity Selection" "0: Capture on falling edge Force level on low level.,1: Capture on rising edge Force level on high level.,2: Capture on both of falling and rising edge Not..,?"
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|
bitfld.long 0x0 1. "T4nPAU,TIMER4n Counter Temporary Pause Control" "0: Continue counting,1: Temporary pause"
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|
newline
|
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bitfld.long 0x0 0. "T4nCLR,TIMER4n Counter and Prescaler Clear" "0: No effect.,1: Clear Counter and Prescaler. (Automatically.."
|
|
line.long 0x4 "PDR,TIMER4n Period Data Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "PDATA,TIMER4n Period Data"
|
|
line.long 0x8 "ADR,TIMER4n A Data Register"
|
|
hexmask.long.word 0x8 0.--15. 1. "ADATA,TIMER4n A Data bits. The range is 0x0000 to 0xFFFF"
|
|
line.long 0xC "BDR,TIMER4n B Data Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "BDATA,TIMER4n B Data bits. The range is 0x0000 to 0xFFFF"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "CAPDR,TIMER4n Capture Data Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CAPD,TIMER4n Capture Data"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "PREDR,TIMER4n Prescaler Data Register"
|
|
hexmask.long.word 0x0 0.--11. 1. "PRED,TIMER4n Prescaler Data"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "CNT,TIMER4n Counter Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,TIMER4n Counter"
|
|
group.long 0x1C++0x13
|
|
line.long 0x0 "OUTCR,TIMER4n Output Control Register"
|
|
bitfld.long 0x0 9. "POLB,TnOUTB Output Polarity Selection" "0: Low level start (The TnOUTB pin is started with..,1: High level start (The TnOUTB pin is started with.."
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|
bitfld.long 0x0 8. "POLA,TnOUTA Output Polarity Selection" "0: Low level start (The TnOUTA pins are started..,1: High level start (The TnOUTA pins are started.."
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|
newline
|
|
bitfld.long 0x0 5. "T4nBOE,TnOUTB Output Enable" "0: Disable output.,1: Enable output."
|
|
bitfld.long 0x0 4. "T4nAOE,TnOUTA Output Enable" "0: Disable output.,1: Enable output."
|
|
newline
|
|
bitfld.long 0x0 1. "LVLB,Configure TnOUTB Output When Disable" "0: Low level,1: High level"
|
|
bitfld.long 0x0 0. "LVLA,Configure TnOUTA Output When Disable" "0: Low level,1: High level"
|
|
line.long 0x4 "DLY,TIMER4n Output Delay Data Register"
|
|
hexmask.long.word 0x4 0.--9. 1. "DLY,TIMER4n Output Delay Data"
|
|
line.long 0x8 "INTCR,TIMER4n Interrupt Control Register"
|
|
bitfld.long 0x8 11. "T4nFRCIEN,TIMER4n Output Force Level Interrupt Enable" "0: Disable timer n output hold interrupt.,1: Enable timer n output hold interrupt."
|
|
bitfld.long 0x8 10. "T4nCIEN,TIMER4n Capture Interrupt Enable" "0: Disable timer n capture interrupt.,1: Enable timer n capture interrupt."
|
|
newline
|
|
bitfld.long 0x8 9. "T4nBTIEN,TIMER4n Bottom Interrupt Enable" "0: Disable timer n bottom interrupt.,1: Enable timer n bottom interrupt."
|
|
bitfld.long 0x8 8. "T4nPMIEN,TIMER4n Period Match Interrupt Enable" "0: Disable timer n period interrupt.,1: Enable timer n period interrupt."
|
|
newline
|
|
bitfld.long 0x8 2.--3. "T4nBMIEN,TIMER4n B Match Interrupt Enable" "0: Disable B match interrupt.,1: Enable B match interrupt on up counting.,2: Enable B match interrupt on down counting.,3: Enable B match interrupt on up and down counting."
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|
bitfld.long 0x8 0.--1. "T4nAMIEN,TIMER4n A Match Interrupt Enable" "0: Disable A match interrupt.,1: Enable A match interrupt on up counting.,2: Enable A match interrupt on down counting.,3: Enable A match interrupt on up and down counting."
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|
line.long 0xC "INTFLAG,TIMER4n Interrupt Flag Register"
|
|
bitfld.long 0xC 7. "T4nFRCIFLAG,TIMER4n Output Force Level Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
bitfld.long 0xC 6. "T4nCIFLAG,TIMER4n Capture Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
newline
|
|
bitfld.long 0xC 5. "T4nBTIFLAG,TIMER4n Bottom Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
bitfld.long 0xC 4. "T4nPMIFLAG,TIMER4n Period Match Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
newline
|
|
bitfld.long 0xC 1. "T4nBMIFLAG,TIMER4n B Match Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
bitfld.long 0xC 0. "T4nAMIFLAG,TIMER4n A Match Interrupt Flag" "0: No request occurred.,1: Request occurred. The bit will be cleared to '0'.."
|
|
line.long 0x10 "ADTCR,TIMER4n ADC Trigger Control Register"
|
|
bitfld.long 0x10 9. "T4nBTTG,Select TIMER4n Bottom for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by bottom.,1: Enable ADC trigger signal generator by bottom."
|
|
bitfld.long 0x10 8. "T4nPMTG,Select TIMER4n Period Match for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by period..,1: Enable ADC trigger signal generator by period.."
|
|
newline
|
|
bitfld.long 0x10 2.--3. "T4nBMTG,Select TIMER4n B Match for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by B match.,1: Enable ADC trigger signal generator by B match..,2: Enable ADC trigger signal generator by B match..,3: Enable ADC trigger signal generator by B match.."
|
|
bitfld.long 0x10 0.--1. "T4nAMTG,Select TIMER4n A Match for ADC Trigger Signal Generator." "0: Disable ADC trigger signal generator by A match.,1: Enable ADC trigger signal generator by A match..,2: Enable ADC trigger signal generator by A match..,3: Enable ADC trigger signal generator by A match.."
|
|
tree.end
|
|
tree "TIMER50"
|
|
base ad:0x40002B00
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CR,TIMER5n Control Register"
|
|
bitfld.long 0x0 20. "T5nCLEN,TIMER5n Counter Clear Input Enable" "0: Disable counter clear input.,1: Enable counter clear input at a valid edge by.."
|
|
bitfld.long 0x0 18.--19. "T5nINSEL,TIMER5n Capture Signal Selection" "0: Select the external clock.,1: Select XSOSC.,2: Select WDTRC.,?"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "T5nINPOL,TIMER5n Capture/'Counter Clear Input' Polarity Selection" "0: Capture or 'Counter Clear Input' on Falling Edge,1: Capture or 'Counter Clear Input' on Rising Edge,2: Capture or 'Counter Clear Input' on both of..,?"
|
|
bitfld.long 0x0 15. "T5nEN,TIMER5n Operation Enable" "0: Disable the timer operation.,1: Enable the timer operation."
|
|
newline
|
|
bitfld.long 0x0 14. "T5nCLK,TIMER5n Clock Selection" "0: Select the internal prescaled clock.,1: Select the external clock."
|
|
bitfld.long 0x0 12.--13. "T5nMS,TIMER5n Operation Mode Selection" "0: Interval mode. (T5nOUT: toggle at A-match),1: Capture mode. (The A-match interrupt can occur),2: PPG one-shot mode. (T5nOUT: Programmable pulse..,3: PPG repeat mode. (T5nOUT: Programmable pulse.."
|
|
newline
|
|
bitfld.long 0x0 11. "T5nECE,TIMER5n External Clock Edge Selection" "0: Select falling edge of external clock.,1: Select rising edge of external clock."
|
|
bitfld.long 0x0 9. "T5nOPOL,T5nOUT Polarity Selection" "0: Start high. (T5nOUT is low level at disable),1: Start low. (T5nOUT is high level at disable)"
|
|
newline
|
|
bitfld.long 0x0 8. "T5nPAU,TIMER5n Counter Temporary Pause Control" "0: Continue counting,1: Temporary pause"
|
|
bitfld.long 0x0 7. "T5nMIEN,TIMER5n Match Interrupt Enable" "0: Disable the match interrupt.,1: Enable the match interrupt."
|
|
newline
|
|
bitfld.long 0x0 6. "T5nCIEN,TIMER5n Capture Interrupt Enable" "0: Disable the capture interrupt.,1: Enable the capture interrupt."
|
|
bitfld.long 0x0 5. "T5nCLIEN,TIMER5n Counter Clear Interrupt Enable" "0: Disable the counter clear input interrupt.,1: Enable the counter clear input interrupt."
|
|
newline
|
|
bitfld.long 0x0 3. "T5nMIFLAG,TIMER5n Match Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
bitfld.long 0x0 2. "T5nCIFLAG,TIMER5n Capture Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
newline
|
|
bitfld.long 0x0 1. "T5nCLIFLAG,TIMER5n Counter Clear Input Interrupt Flag" "0: No request occurred.,1: Request occurred."
|
|
bitfld.long 0x0 0. "T5nCLR,TIMER5n Counter and Prescaler Clear" "0: No effect.,1: Clear Counter and Prescaler. (Automatically.."
|
|
line.long 0x4 "ADR,TIMER5n A Data Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "ADATA,TIMER5n A Data"
|
|
line.long 0x8 "BDR,TIMER5n B Data Register"
|
|
hexmask.long.word 0x8 0.--15. 1. "BDATA,TIMER5n B Data"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "CAPDR,TIMER5n Capture Data Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CAPD,TIMER5n Capture Data"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "PREDR,TIMER5n Prescaler Data Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "PRED,TIMER5n Prescaler Data"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "CNT,TIMER5n Counter Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,TIMER5n Counter"
|
|
tree.end
|
|
tree.end
|
|
tree "UART (Universal Asynchronous Receiver/Transmitter)"
|
|
base ad:0x0
|
|
tree "LPUART"
|
|
base ad:0x40005C00
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CR1,LPUART Control Register 1"
|
|
bitfld.long 0x0 14. "PEN,Parity Enable" "0,1"
|
|
bitfld.long 0x0 13. "STKPEN,Stick Parity Enable" "0,1"
|
|
bitfld.long 0x0 12. "PSEL,Parity Selection" "0,1"
|
|
bitfld.long 0x0 9.--10. "DLEN,Data Length Selection" "0,1,2,3"
|
|
bitfld.long 0x0 7. "STOPB,Stop" "0,1"
|
|
bitfld.long 0x0 5.--6. "OVRS,Oversampling Selection" "0,1,2,3"
|
|
bitfld.long 0x0 4. "HDCOM,1-wire Half-Duplex Communication" "?,1: wire Half-Duplex Communication"
|
|
bitfld.long 0x0 3. "TXE,Enable the transmitter unit." "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXE,Enable the receiver unit." "0,1"
|
|
bitfld.long 0x0 1. "WAKEN,Wake-Up Function bit in Deep Sleep Mode" "0,1"
|
|
bitfld.long 0x0 0. "LPUEN,Low Power UART Enable" "0,1"
|
|
line.long 0x4 "CR2,LPUART Control Register 2"
|
|
hexmask.long.byte 0x4 16.--20. 1. "DEALST,DE Pin Active Level Start Time"
|
|
hexmask.long.byte 0x4 8.--12. 1. "DEALFT,DE Pin Active Level Finish Time"
|
|
bitfld.long 0x4 7. "DEPOL,DE Pin Polarity Selection" "0,1"
|
|
bitfld.long 0x4 6. "DEPEN,DE Pin Function Enable" "0,1"
|
|
bitfld.long 0x4 4. "RCDEN,Receive Character Detection Function Enable" "0,1"
|
|
bitfld.long 0x4 3. "RTOEN,Receive Time Out Function Enable" "0,1"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "IER,LPUART Interrupt Enable Register"
|
|
bitfld.long 0x0 7. "RCDIEN,Receive Character Detection Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 6. "RTOIEN,Receive Time Out Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 4. "SBDIEN,Start Bit Detection Interrupt Enable bit in Deep Sleep Mode" "0,1"
|
|
bitfld.long 0x0 2. "TXCIEN,Transmit Complete Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "RXCIEN,Receive Data Register Not Empty Interrupt Enable" "0,1"
|
|
line.long 0x4 "IFSR,LPUART Interrupt Flag and Status Register"
|
|
bitfld.long 0x4 15. "DOR,Data Overrun" "0,1"
|
|
bitfld.long 0x4 14. "FE,Frame Error" "0,1"
|
|
bitfld.long 0x4 13. "PE,Parity Error" "0,1"
|
|
rbitfld.long 0x4 12. "RXBUSY,RXD Line Busy" "0,1"
|
|
bitfld.long 0x4 7. "RCDIFLAG,Receive Character detection Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 6. "RTOIFLAG,Receive Time Out Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 4. "SBDIFLAG,Start Bit Detection Interrupt Flag" "0,1"
|
|
bitfld.long 0x4 2. "TXCIFLAG,Transmit Complete Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXCIFLAG,Receive Data Register Not Empty Interrupt Flag" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "RDR,LPUART Receive Data Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RDATA,Receive Data"
|
|
group.long 0x1C++0x17
|
|
line.long 0x0 "TDR,LPUART Transmit Data Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TDATA,Transmit Data"
|
|
line.long 0x4 "BDR,LPUART Baud Rate Data Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "BDATA,These bits are used to generate baud rate"
|
|
line.long 0x8 "BCMP,LPUART Baud Rate Compensation Register"
|
|
bitfld.long 0x8 15. "BCMPS,Baud Rate Compensation Sign" "0,1"
|
|
bitfld.long 0x8 8. "BCMP8,Baud Rate Compensation 8" "0,1"
|
|
bitfld.long 0x8 7. "BCMP7,Baud Rate Compensation 7" "0,1"
|
|
bitfld.long 0x8 6. "BCMP6,Baud Rate Compensation 6" "0,1"
|
|
bitfld.long 0x8 5. "BCMP5,Baud Rate Compensation 5" "0,1"
|
|
bitfld.long 0x8 4. "BCMP4,Baud Rate Compensation 4" "0,1"
|
|
bitfld.long 0x8 3. "BCMP3,Baud Rate Compensation 3" "0,1"
|
|
bitfld.long 0x8 2. "BCMP2,Baud Rate Compensation 2" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "BCMP1,Baud Rate Compensation 1" "0,1"
|
|
bitfld.long 0x8 0. "BCMP0,Baud Rate Compensation 0" "0,1"
|
|
line.long 0xC "RTODR,LPUART Receive Time Out Data Register"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. "RTOD,LPUART Receive Time Out Data"
|
|
line.long 0x10 "RCDR,LPUART Receive Character Detection Data Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "RCDD,LPUART Receive Character Detection Data"
|
|
line.long 0x14 "DLYDR,LPUART Tx Delay Time Data Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. "DLYD,LPUART Tx Delay Data"
|
|
tree.end
|
|
tree "UART0"
|
|
base ad:0x40004000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "RBR,UARTn Receive Data Buffer Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RBR,UARTn Receive Data Buffer"
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "THR,UARTn Transmit Data Hold Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "THR,UARTn Transmit Data Hold"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "IER,UARTn Interrupt Enable Register"
|
|
bitfld.long 0x0 3. "TXEIE,Transmit Empty Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "RLSIE,Receiver Line Status Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 1. "THREIE,Transmit Holding Register Empty Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "DRIE,Data Receive Interrupt Enable" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "IIR,UARTn Interrupt ID Register"
|
|
bitfld.long 0x0 4. "TXE,Transmit Complete Interrupt Source ID" "0,1"
|
|
bitfld.long 0x0 1.--2. "IID,UARTn Interrupt ID" "0,1,2,3"
|
|
bitfld.long 0x0 0. "IPEN,Interrupt Pending" "0,1"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "LCR,UARTn Line Control Register"
|
|
bitfld.long 0x0 6. "BREAK,Transfer Break Control" "0,1"
|
|
bitfld.long 0x0 5. "STICKP,Force Parity" "0,1"
|
|
bitfld.long 0x0 4. "PARITY,Parity Mode and Parity Stuck Selection" "0,1"
|
|
bitfld.long 0x0 3. "PEN,Parity Bit Transfer Enable" "0,1"
|
|
bitfld.long 0x0 2. "STOPBIT,Stop Bit Length Selection" "0,1"
|
|
bitfld.long 0x0 0.--1. "DLEN,Data Length Selection" "0,1,2,3"
|
|
line.long 0x4 "DCR,UARTn Data Control Register"
|
|
bitfld.long 0x4 4. "LBON,Local Loopback Test Mode Enable" "0,1"
|
|
bitfld.long 0x4 3. "RXINV,Receive Data Inversion Selection" "0,1"
|
|
bitfld.long 0x4 2. "TXINV,Transmit Data Inversion Selection" "0,1"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "LSR,UARTn Line Status Register"
|
|
bitfld.long 0x0 6. "TEMT,Transmit Empty" "0,1"
|
|
bitfld.long 0x0 5. "THRE,Transmit Holding Empty" "0,1"
|
|
bitfld.long 0x0 4. "BI,Break Condition Indication" "0,1"
|
|
bitfld.long 0x0 3. "FE,Frame Error Indicator" "0,1"
|
|
bitfld.long 0x0 2. "PE,Parity Error Indicator" "0,1"
|
|
bitfld.long 0x0 1. "OE,Overrun Error Indicator" "0,1"
|
|
bitfld.long 0x0 0. "DR,Data Receive Indicator" "0,1"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "BDR,UARTn Baud Rate Divisor Latch Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "BDR,Baud Rate Divider Latch Value. Baud rate = fUARTnCLK/(16 x BDR[15:0] x 2)"
|
|
line.long 0x4 "BFR,UARTn Baud Rate Fractional Counter Value"
|
|
hexmask.long.byte 0x4 0.--7. 1. "BFR,Fraction Counter value"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "IDTR,UARTn Inter-frame Delay Time Register"
|
|
bitfld.long 0x0 7. "SMS,Start Bit Multi Sampling Enable" "0,1"
|
|
bitfld.long 0x0 6. "DMS,Data Bit Multi sampling enable" "0,1"
|
|
bitfld.long 0x0 0.--2. "WAITVAL,Wait Time Value" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "UART1"
|
|
base ad:0x40004100
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "RBR,UARTn Receive Data Buffer Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RBR,UARTn Receive Data Buffer"
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "THR,UARTn Transmit Data Hold Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "THR,UARTn Transmit Data Hold"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "IER,UARTn Interrupt Enable Register"
|
|
bitfld.long 0x0 3. "TXEIE,Transmit Empty Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "RLSIE,Receiver Line Status Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 1. "THREIE,Transmit Holding Register Empty Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "DRIE,Data Receive Interrupt Enable" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "IIR,UARTn Interrupt ID Register"
|
|
bitfld.long 0x0 4. "TXE,Transmit Complete Interrupt Source ID" "0,1"
|
|
bitfld.long 0x0 1.--2. "IID,UARTn Interrupt ID" "0,1,2,3"
|
|
bitfld.long 0x0 0. "IPEN,Interrupt Pending" "0,1"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "LCR,UARTn Line Control Register"
|
|
bitfld.long 0x0 6. "BREAK,Transfer Break Control" "0,1"
|
|
bitfld.long 0x0 5. "STICKP,Force Parity" "0,1"
|
|
bitfld.long 0x0 4. "PARITY,Parity Mode and Parity Stuck Selection" "0,1"
|
|
bitfld.long 0x0 3. "PEN,Parity Bit Transfer Enable" "0,1"
|
|
bitfld.long 0x0 2. "STOPBIT,Stop Bit Length Selection" "0,1"
|
|
bitfld.long 0x0 0.--1. "DLEN,Data Length Selection" "0,1,2,3"
|
|
line.long 0x4 "DCR,UARTn Data Control Register"
|
|
bitfld.long 0x4 4. "LBON,Local Loopback Test Mode Enable" "0,1"
|
|
bitfld.long 0x4 3. "RXINV,Receive Data Inversion Selection" "0,1"
|
|
bitfld.long 0x4 2. "TXINV,Transmit Data Inversion Selection" "0,1"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "LSR,UARTn Line Status Register"
|
|
bitfld.long 0x0 6. "TEMT,Transmit Empty" "0,1"
|
|
bitfld.long 0x0 5. "THRE,Transmit Holding Empty" "0,1"
|
|
bitfld.long 0x0 4. "BI,Break Condition Indication" "0,1"
|
|
bitfld.long 0x0 3. "FE,Frame Error Indicator" "0,1"
|
|
bitfld.long 0x0 2. "PE,Parity Error Indicator" "0,1"
|
|
bitfld.long 0x0 1. "OE,Overrun Error Indicator" "0,1"
|
|
bitfld.long 0x0 0. "DR,Data Receive Indicator" "0,1"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "BDR,UARTn Baud Rate Divisor Latch Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "BDR,Baud Rate Divider Latch Value. Baud rate = fUARTnCLK/(16 x BDR[15:0] x 2)"
|
|
line.long 0x4 "BFR,UARTn Baud Rate Fractional Counter Value"
|
|
hexmask.long.byte 0x4 0.--7. 1. "BFR,Fraction Counter value"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "IDTR,UARTn Inter-frame Delay Time Register"
|
|
bitfld.long 0x0 7. "SMS,Start Bit Multi Sampling Enable" "0,1"
|
|
bitfld.long 0x0 6. "DMS,Data Bit Multi sampling enable" "0,1"
|
|
bitfld.long 0x0 0.--2. "WAITVAL,Wait Time Value" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "UARTn"
|
|
base ad:0x55000000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "RBR,UARTn Receive Data Buffer Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RBR,UARTn Receive Data Buffer"
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "THR,UARTn Transmit Data Hold Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "THR,UARTn Transmit Data Hold"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "IER,UARTn Interrupt Enable Register"
|
|
bitfld.long 0x0 3. "TXEIE,Transmit Empty Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "RLSIE,Receiver Line Status Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 1. "THREIE,Transmit Holding Register Empty Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "DRIE,Data Receive Interrupt Enable" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "IIR,UARTn Interrupt ID Register"
|
|
bitfld.long 0x0 4. "TXE,Transmit Complete Interrupt Source ID" "0,1"
|
|
bitfld.long 0x0 1.--2. "IID,UARTn Interrupt ID" "0,1,2,3"
|
|
bitfld.long 0x0 0. "IPEN,Interrupt Pending" "0,1"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "LCR,UARTn Line Control Register"
|
|
bitfld.long 0x0 6. "BREAK,Transfer Break Control" "0,1"
|
|
bitfld.long 0x0 5. "STICKP,Force Parity" "0,1"
|
|
bitfld.long 0x0 4. "PARITY,Parity Mode and Parity Stuck Selection" "0,1"
|
|
bitfld.long 0x0 3. "PEN,Parity Bit Transfer Enable" "0,1"
|
|
bitfld.long 0x0 2. "STOPBIT,Stop Bit Length Selection" "0,1"
|
|
bitfld.long 0x0 0.--1. "DLEN,Data Length Selection" "0,1,2,3"
|
|
line.long 0x4 "DCR,UARTn Data Control Register"
|
|
bitfld.long 0x4 4. "LBON,Local Loopback Test Mode Enable" "0,1"
|
|
bitfld.long 0x4 3. "RXINV,Receive Data Inversion Selection" "0,1"
|
|
bitfld.long 0x4 2. "TXINV,Transmit Data Inversion Selection" "0,1"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "LSR,UARTn Line Status Register"
|
|
bitfld.long 0x0 6. "TEMT,Transmit Empty" "0,1"
|
|
bitfld.long 0x0 5. "THRE,Transmit Holding Empty" "0,1"
|
|
bitfld.long 0x0 4. "BI,Break Condition Indication" "0,1"
|
|
bitfld.long 0x0 3. "FE,Frame Error Indicator" "0,1"
|
|
bitfld.long 0x0 2. "PE,Parity Error Indicator" "0,1"
|
|
bitfld.long 0x0 1. "OE,Overrun Error Indicator" "0,1"
|
|
bitfld.long 0x0 0. "DR,Data Receive Indicator" "0,1"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "BDR,UARTn Baud Rate Divisor Latch Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "BDR,Baud Rate Divider Latch Value. Baud rate = fUARTnCLK/(16 x BDR[15:0] x 2)"
|
|
line.long 0x4 "BFR,UARTn Baud Rate Fractional Counter Value"
|
|
hexmask.long.byte 0x4 0.--7. 1. "BFR,Fraction Counter value"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "IDTR,UARTn Inter-frame Delay Time Register"
|
|
bitfld.long 0x0 7. "SMS,Start Bit Multi Sampling Enable" "0,1"
|
|
bitfld.long 0x0 6. "DMS,Data Bit Multi sampling enable" "0,1"
|
|
bitfld.long 0x0 0.--2. "WAITVAL,Wait Time Value" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree.end
|
|
tree "USART&SPI (Universal Synchronous/Asynchronous Receiver/Transmitter + Serial Peripheral Interface)"
|
|
base ad:0x0
|
|
tree "USART1n"
|
|
base ad:0x54000000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CR1,USART1n Control Register 1"
|
|
bitfld.long 0x0 14.--15. "USTnMS,USART1n Operation Mode Selection" "0: Asynchronous Mode (UART),1: Synchronous Mode (USRT),?,3: SPI Mode"
|
|
bitfld.long 0x0 12.--13. "USTnP,Selects Parity Generation and Check method (only UART mode)" "0: No Parity,?,2: Even Parity,3: Odd Parity"
|
|
bitfld.long 0x0 9.--11. "USTnS,Selects the length of data bit in a frame when Asynchronous or Synchronous mode" "0: 5 bit,1: 6 bit,2: 7 bit,3: 8 bit,?,?,?,7: 9 bit"
|
|
newline
|
|
bitfld.long 0x0 8. "ORDn,Selects the first data bit to be transmitted (only SPI mode)" "0: lsb first,1: msb first"
|
|
bitfld.long 0x0 7. "CPOLn,Selects the Clock Polarity of ACK in Synchronous or SPI mode" "0: SCK to 0 when idle,1: SCK to 1 when idle"
|
|
bitfld.long 0x0 6. "CPHAn,The CPOLn and this bit determine if data are sampled on the leading or trailing edge of SCK (only SPI mode)" "0: Start with idle state.,1: Start with inverted idle state."
|
|
newline
|
|
bitfld.long 0x0 5. "DRIEn,Transmit Data Register Empty Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 4. "TXCIEn,Transmit Complete Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 3. "RXCIEn,Receive Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "WAKEIEn,Asynchronous Wake-Up Interrupt Enable in Deep Sleep Mode (only UART mode)" "0,1"
|
|
bitfld.long 0x0 1. "TXEn,Enable the transmitter unit." "0,1"
|
|
bitfld.long 0x0 0. "RXEn,Enable the receiver unit." "0,1"
|
|
line.long 0x4 "CR2,USART1n Control Register 2"
|
|
bitfld.long 0x4 9. "USTnEN,Activate USART1n Block by supplying" "0,1"
|
|
bitfld.long 0x4 8. "DBLSn,Selects receiver sampling rate (only UART mode)" "0,1"
|
|
bitfld.long 0x4 7. "MASTERn,Selects master or slave in SPI or Synchronous mode and controls the direction of SCK pin" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "LOOPSn,1-wire Half-Duplex Communication on Asynchronous Mode or Loop Back for Test on SPI and Asynchronous Mode" "?,1: wire Half-Duplex Communication on Asynchronous.."
|
|
bitfld.long 0x4 5. "DISSCKn,In synchronous mode operation selects the waveform of SCK output" "0,1"
|
|
bitfld.long 0x4 4. "USTnSSEN,This bit controls the SS pin operation (only SPI mode)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "FXCHn,SPI port function exchange control bit (only SPI mode)" "0,1"
|
|
bitfld.long 0x4 2. "USTnSB,Selects the length of stop bit in Asynchronous or Synchronous mode" "0,1"
|
|
line.long 0x8 "CR3,USART1n Control Register 3"
|
|
bitfld.long 0x8 10. "RCDENn,Receive Character Detection Function Enable" "0,1"
|
|
bitfld.long 0x8 9. "RTOENn,Receive Time Out Function Enable" "0,1"
|
|
bitfld.long 0x8 7. "RCDIEn,Receive Character Detection Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 6. "RTOIEn,Receive Time Out Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 4. "RCDnIFLAG,Receive Character detection Interrupt Flag" "0,1"
|
|
bitfld.long 0x8 3. "RTOnIFLAG,Receive Time Out Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0.--1. "BRDIVn,Baud Rate Clock Dividing Selection for Receive Time Out bits (only asynchronous mode)" "0,1,2,3"
|
|
line.long 0xC "ST,USART1n Status Register"
|
|
bitfld.long 0xC 7. "DREn,Transmit Data Register Empty Interrupt Flag" "0,1"
|
|
bitfld.long 0xC 6. "TXCn,Transmit Complete Interrupt Flag" "0,1"
|
|
bitfld.long 0xC 5. "RXCn,Receive Complete Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0xC 4. "WAKEn,Asynchronous Wake-Up Interrupt Flag" "0,1"
|
|
bitfld.long 0xC 2. "DORn,Data Overrun" "0,1"
|
|
bitfld.long 0xC 1. "FEn,Frame Error" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "PEn,Parity Error" "0,1"
|
|
line.long 0x10 "BDR,USART1n Baud Rate Generation Register"
|
|
hexmask.long.word 0x10 0.--11. 1. "BDATA,The value in this register is used to generate internal baud rate in UART mode or to generate SCK clock in SPI mode"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "RDR,USART1n Receive Data Register"
|
|
hexmask.long.word 0x0 0.--8. 1. "RDATA,Receive Data"
|
|
group.long 0x18++0xB
|
|
line.long 0x0 "TDR,USART1n Transmit Data Register"
|
|
hexmask.long.word 0x0 0.--8. 1. "TDATA,Transmit Data"
|
|
line.long 0x4 "RTODR,USART1n Receive Time Out Data Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RTOD,USART1n Receive Time Out Data"
|
|
line.long 0x8 "RCDR,USART1n Receive Character Detection Data Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "RCDD,USART1n Receive Character Detection Data"
|
|
tree.end
|
|
tree "USART10"
|
|
base ad:0x40003800
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CR1,USART1n Control Register 1"
|
|
bitfld.long 0x0 14.--15. "USTnMS,USART1n Operation Mode Selection" "0: Asynchronous Mode (UART),1: Synchronous Mode (USRT),?,3: SPI Mode"
|
|
bitfld.long 0x0 12.--13. "USTnP,Selects Parity Generation and Check method (only UART mode)" "0: No Parity,?,2: Even Parity,3: Odd Parity"
|
|
bitfld.long 0x0 9.--11. "USTnS,Selects the length of data bit in a frame when Asynchronous or Synchronous mode" "0: 5 bit,1: 6 bit,2: 7 bit,3: 8 bit,?,?,?,7: 9 bit"
|
|
newline
|
|
bitfld.long 0x0 8. "ORDn,Selects the first data bit to be transmitted (only SPI mode)" "0: lsb first,1: msb first"
|
|
bitfld.long 0x0 7. "CPOLn,Selects the Clock Polarity of ACK in Synchronous or SPI mode" "0: SCK to 0 when idle,1: SCK to 1 when idle"
|
|
bitfld.long 0x0 6. "CPHAn,The CPOLn and this bit determine if data are sampled on the leading or trailing edge of SCK (only SPI mode)" "0: Start with idle state.,1: Start with inverted idle state."
|
|
newline
|
|
bitfld.long 0x0 5. "DRIEn,Transmit Data Register Empty Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 4. "TXCIEn,Transmit Complete Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 3. "RXCIEn,Receive Complete Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "WAKEIEn,Asynchronous Wake-Up Interrupt Enable in Deep Sleep Mode (only UART mode)" "0,1"
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bitfld.long 0x0 1. "TXEn,Enable the transmitter unit." "0,1"
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bitfld.long 0x0 0. "RXEn,Enable the receiver unit." "0,1"
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line.long 0x4 "CR2,USART1n Control Register 2"
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bitfld.long 0x4 9. "USTnEN,Activate USART1n Block by supplying" "0,1"
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bitfld.long 0x4 8. "DBLSn,Selects receiver sampling rate (only UART mode)" "0,1"
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bitfld.long 0x4 7. "MASTERn,Selects master or slave in SPI or Synchronous mode and controls the direction of SCK pin" "0,1"
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newline
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bitfld.long 0x4 6. "LOOPSn,1-wire Half-Duplex Communication on Asynchronous Mode or Loop Back for Test on SPI and Asynchronous Mode" "?,1: wire Half-Duplex Communication on Asynchronous.."
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bitfld.long 0x4 5. "DISSCKn,In synchronous mode operation selects the waveform of SCK output" "0,1"
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bitfld.long 0x4 4. "USTnSSEN,This bit controls the SS pin operation (only SPI mode)" "0,1"
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newline
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bitfld.long 0x4 3. "FXCHn,SPI port function exchange control bit (only SPI mode)" "0,1"
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bitfld.long 0x4 2. "USTnSB,Selects the length of stop bit in Asynchronous or Synchronous mode" "0,1"
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line.long 0x8 "CR3,USART1n Control Register 3"
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bitfld.long 0x8 10. "RCDENn,Receive Character Detection Function Enable" "0,1"
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bitfld.long 0x8 9. "RTOENn,Receive Time Out Function Enable" "0,1"
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bitfld.long 0x8 7. "RCDIEn,Receive Character Detection Interrupt Enable" "0,1"
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newline
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bitfld.long 0x8 6. "RTOIEn,Receive Time Out Interrupt Enable" "0,1"
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bitfld.long 0x8 4. "RCDnIFLAG,Receive Character detection Interrupt Flag" "0,1"
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bitfld.long 0x8 3. "RTOnIFLAG,Receive Time Out Interrupt Flag" "0,1"
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newline
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bitfld.long 0x8 0.--1. "BRDIVn,Baud Rate Clock Dividing Selection for Receive Time Out bits (only asynchronous mode)" "0,1,2,3"
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line.long 0xC "ST,USART1n Status Register"
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bitfld.long 0xC 7. "DREn,Transmit Data Register Empty Interrupt Flag" "0,1"
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bitfld.long 0xC 6. "TXCn,Transmit Complete Interrupt Flag" "0,1"
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bitfld.long 0xC 5. "RXCn,Receive Complete Interrupt Flag" "0,1"
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newline
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bitfld.long 0xC 4. "WAKEn,Asynchronous Wake-Up Interrupt Flag" "0,1"
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bitfld.long 0xC 2. "DORn,Data Overrun" "0,1"
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bitfld.long 0xC 1. "FEn,Frame Error" "0,1"
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newline
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bitfld.long 0xC 0. "PEn,Parity Error" "0,1"
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line.long 0x10 "BDR,USART1n Baud Rate Generation Register"
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hexmask.long.word 0x10 0.--11. 1. "BDATA,The value in this register is used to generate internal baud rate in UART mode or to generate SCK clock in SPI mode"
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rgroup.long 0x14++0x3
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line.long 0x0 "RDR,USART1n Receive Data Register"
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hexmask.long.word 0x0 0.--8. 1. "RDATA,Receive Data"
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group.long 0x18++0xB
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line.long 0x0 "TDR,USART1n Transmit Data Register"
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hexmask.long.word 0x0 0.--8. 1. "TDATA,Transmit Data"
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line.long 0x4 "RTODR,USART1n Receive Time Out Data Register"
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hexmask.long.byte 0x4 0.--7. 1. "RTOD,USART1n Receive Time Out Data"
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line.long 0x8 "RCDR,USART1n Receive Character Detection Data Register"
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hexmask.long.byte 0x8 0.--7. 1. "RCDD,USART1n Receive Character Detection Data"
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tree.end
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tree.end
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tree "WDT (Watchdog Timer)"
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base ad:0x40001A00
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group.long 0x0++0xB
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line.long 0x0 "CR,Watch-Dog Timer Control Register"
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hexmask.long.word 0x0 16.--31. 1. "WTIDKY,Write Identification Key (0x5a69)"
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hexmask.long.byte 0x0 10.--15. 1. "RSTEN,Watch-Dog Timer Reset Enable"
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newline
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hexmask.long.byte 0x0 4.--9. 1. "CNTEN,Watch-Dog Timer Counter Enable"
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bitfld.long 0x0 3. "WINMIEN,Watch-Dog Timer Window Match Interrupt Enable" "0: Disable window data match interrupt.,1: Enable window data match interrupt."
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newline
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bitfld.long 0x0 2. "UNFIEN,Watch-Dog Timer Underflow Interrupt Enable" "0: Disable Watch-Dog Timer underflow interrupt.,1: Enable Watch-Dog Timer underflow interrupt."
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bitfld.long 0x0 0.--1. "CLKDIV,Watch-Dog Timer Clock Divider" "0: fWDT/4,1: fWDT/16,2: fWDT/64,3: fWDT/256"
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line.long 0x4 "SR,Watch-Dog Timer Status Register"
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bitfld.long 0x4 7. "DBGCNTEN,Watch-Dog Timer Counter Enable When the core is halted in debug mode" "0: The Watch-Dog Timer counter continues even if..,1: The Watch-Dog Timer counter is stopped when the.."
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bitfld.long 0x4 1. "WINMIFLAG,Watch-Dog Timer Window Match Interrupt Flag" "0: No request occurred.,1: Request occurred."
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newline
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bitfld.long 0x4 0. "UNFIFLAG,Watch-Dog Timer Underflow Interrupt Flag" "0: No request occurred.,1: Request occurred."
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line.long 0x8 "DR,Watch-Dog Timer Data Register"
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hexmask.long.tbyte 0x8 0.--23. 1. "DATA,Watch-Dog Timer Data"
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rgroup.long 0xC++0x3
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line.long 0x0 "CNT,Watch-Dog Timer Counter Register"
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hexmask.long.tbyte 0x0 0.--23. 1. "CNT,Watch-Dog Timer Counter"
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group.long 0x10++0x3
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line.long 0x0 "WINDR,Watch-Dog Timer Window Data Register"
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hexmask.long.tbyte 0x0 0.--23. 1. "WDATA,Watch-Dog Timer Window Data"
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wgroup.long 0x14++0x3
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line.long 0x0 "CNTR,Watch-Dog Timer Counter Reload Register"
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hexmask.long.byte 0x0 0.--7. 1. "CNTR,Watch-Dog Timer Counter Reload"
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tree.end
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AUTOINDENT.OFF
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