11287 lines
819 KiB
Plaintext
11287 lines
819 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: A2Fxxx On-Chip Peripherals
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; @Props: Released
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; @Author: HUB
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; @Changelog: 2005-07-10 HUB
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; @Manufacturer: ACTEL - Actel Corp.
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; @Doc: SmartFusion_MSS_UG.pdf(2010.05); SmartFusion_Analog_UG.pdf(2010.03)
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; @Core: Cortex-M3
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; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: pera2fxxx.per 17736 2024-04-08 09:26:07Z kwisniewski $
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tree.close "Core Registers (Cortex-M3)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 11.
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group 0x10--0x1b
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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bitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,Clock Source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "Not SysTick,SysTick"
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textline " "
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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;group 0x14++0x03
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line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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;group 0x18++0x03
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line.long 0x08 "SYST_CVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Current Value"
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rgroup 0x1c++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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textline " "
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rgroup 0xd00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code"
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bitfld.long 0x00 20.--23. " VARIANT ,Implementation Defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 16.--19. " CONSTANT ,Constant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Number of Processor"
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bitfld.long 0x00 0.--3. " REVISION ,Implementation Defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group 0xd04--0xd17
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Not set,Set"
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bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not set,Set"
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bitfld.long 0x00 27. " PENDSVCLR ,Clear Pending pendSV Bit" "Not cleared,Cleared"
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textline " "
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bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not set,Set"
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bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "Not cleared,Cleared"
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bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,Interrupt Pending Flag" "Not pending,Pending"
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hexmask.long.word 0x00 12.--21. 1. " VECTPENDING ,Pending ISR Number Field"
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bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
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textline " "
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,Active ISR Number Field"
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;group 0xd08++0x03
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line.long 0x04 "VTOR,Vector Table Offset Register"
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bitfld.long 0x04 29. " TBLBASE ,Table Base" "Code,RAM"
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hexmask.long.tbyte 0x04 7.--28. 1. " TBLOFF ,Vector Table Base Offset Field"
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;group 0xd0c++0x03
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
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rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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textline " "
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bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "Not cleared,Cleared all"
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bitfld.long 0x08 0. " VECTRESET ,System Reset" "No reset,Reset"
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;group 0xd10++0x03
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line.long 0x0c "SCR,System Control Register"
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bitfld.long 0x0c 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0c 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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textline " "
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bitfld.long 0x0c 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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;group 0xd14++0x03
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line.long 0x10 "CCR,Configuration Control Register"
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bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte,8-byte"
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bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI, Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
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bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 1. " USERSETMPEND ,Enable User Access to the Software Trigger Exception Register" "Disabled,Enabled"
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bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
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group 0xd18--0xd23
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line.long 0x00 "SHPR1,SSystem Handler Priority Register 1"
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hexmask.long.byte 0x00 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
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hexmask.long.byte 0x00 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
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hexmask.long.byte 0x00 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
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textline " "
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hexmask.long.byte 0x00 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
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line.long 0x04 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x04 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
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hexmask.long.byte 0x04 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
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hexmask.long.byte 0x04 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
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textline " "
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hexmask.long.byte 0x04 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
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line.long 0x08 "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x08 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
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hexmask.long.byte 0x08 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
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hexmask.long.byte 0x08 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
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textline " "
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hexmask.long.byte 0x08 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
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group 0xd24++0x3
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line.long 0x00 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x00 18. " USGFAULTENA ,USGFAULTENA" "Disabled,Enabled"
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bitfld.long 0x00 17. " BUSFAULTENA ,BUSFAULTENA" "Disabled,Enabled"
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bitfld.long 0x00 16. " MEMFAULTENA ,MEMFAULTENA" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 15. " SVCALLPENDED ,SVCall is Pended Started" "Not replaced,Replaced"
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bitfld.long 0x00 14. " BUSFAULTPENDED ,BusFault is Pended Started" "Not replaced,Replaced"
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bitfld.long 0x00 13. " MEMFAULTPENDED ,MemManage is Pended Started" "Not replaced,Replaced"
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textline " "
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bitfld.long 0x00 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
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bitfld.long 0x00 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
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bitfld.long 0x00 8. " MONITORACT ,Monitor is Active" "Not active,Active"
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textline " "
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bitfld.long 0x00 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
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bitfld.long 0x00 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
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bitfld.long 0x00 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
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textline " "
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bitfld.long 0x00 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
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group 0xd28--0xd3b
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line.byte 0x0 "MMFSR,Memory Manage Fault Status Register"
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bitfld.byte 0x0 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x0 4. " MSTKERR ,Stacking Access Violations" "No error,Error"
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bitfld.byte 0x0 3. " MUNSTKERR ,Unstack Access Violations" "No error,Error"
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textline " "
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bitfld.byte 0x0 1. " DACCVIOL ,Data Access Violation" "No error,Error"
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bitfld.byte 0x0 0. " IACCVIOL ,Instruction Access Violation" "No error,Error"
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;group 0xd29++0x00
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line.byte 0x01 "BFSR,Bus Fault Status Register"
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bitfld.byte 0x01 7. " BFARVALID ,Address Valid" "Not valid,Valid"
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bitfld.byte 0x01 4. " STKERR ,Stacking from Exception has Caused Bus Faults" "No error,Error"
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bitfld.byte 0x01 3. " UNSTKERR ,Unstack from Exception Return has Caused Bus Faults" "No error,Error"
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textline " "
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bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise Data Bus Error" "No error,Error"
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bitfld.byte 0x01 1. " PRECISERR ,Precise Data Bus Error Return" "No error,Error"
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bitfld.byte 0x01 0. " IBUSERR ,Instruction Bus Error Flag" "No error,Error"
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;group 0xd2a++0x01
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line.word 0x02 "USAFAULT,Usage Fault Status Register"
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bitfld.word 0x02 9. " DIVBYZERO ,Illegal PC Load" "No error,Error"
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bitfld.word 0x02 8. " UNALIGNED ,Illegal Unaligned Access" "No error,Error"
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bitfld.word 0x02 3. " NOCP ,Attempt to use a coprocessor instruction" "No error,Error"
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textline " "
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bitfld.word 0x02 2. " INVPC ,Attempt to Load EXC_RETURN into PC Illegally" "No error,Error"
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bitfld.word 0x02 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error"
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bitfld.word 0x02 0. " UNDEFINSTR ,Illegal Processor State" "No error,Error"
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;group 0xd2c++0x03
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line.long 0x04 "HFSR,Hard Fault Status Register"
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bitfld.long 0x04 31. " DEBUGEVT ,This Bit is Set if There is a Fault Related to Debug" "No error,Error"
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bitfld.long 0x04 30. " FORCED ,Hard Fault Activated" "No error,Error"
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bitfld.long 0x04 1. " VECTTBL ,Bus Fault" "No error,Error"
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;group 0xd30++0x03
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line.long 0x08 "DFSR,Debug Fault Status Register"
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bitfld.long 0x08 4. " EXTERNAL ,External Debug Request Flag" "Not asserted,Asserted"
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bitfld.long 0x08 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
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bitfld.long 0x08 2. " DWTTRAP ,Data Watchpoint and Trace (DWT) Flag" "Not matched,Matched"
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textline " "
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bitfld.long 0x08 1. " BKPT ,BKPT Flag" "Not executed,Executed"
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bitfld.long 0x08 0. " HALTED ,Halt Request Flag" "Not requested,Requested"
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;group 0xd34++0x03
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line.long 0xc "MMFAR,Memory Manage Fault Address Register"
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;group 0xd38++0x03
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line.long 0x10 "BFAR,Bus Fault Address Register"
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wgroup 0xf00++0x03
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line.long 0x00 "STIR,Software Trigger Interrupt Register"
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hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
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tree "Feature Registers"
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width 10.
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rgroup.long 0xD40++0x0B
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line.long 0x00 "ID_PFR0,Processor Feature Register 0"
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bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
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bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
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line.long 0x04 "ID_PFR1,Processor Feature Register 1"
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bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
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line.long 0x08 "ID_DFR0,Debug Feature Register 0"
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bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
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hgroup.long 0xD4C++0x03
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hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
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rgroup.long 0xD50++0x03
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line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
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bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
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textline " "
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bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
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bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
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hgroup.long 0xD54++0x03
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hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
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rgroup.long 0xD58++0x03
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line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
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rgroup.long 0xD60++0x13
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line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
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bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
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bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
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bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
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bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
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bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
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line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
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bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
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bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
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bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
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textline " "
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bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
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line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
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bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
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bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
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bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
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bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
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bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
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textline " "
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bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
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line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
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bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
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bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
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bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
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textline " "
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bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
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bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
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textline " "
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bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
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line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
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bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
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bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
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textline " "
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bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
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bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
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bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
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tree.end
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tree "CoreSight Identification Registers"
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width 6.
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rgroup.long 0xFE0++0x0F
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line.long 0x00 "PID0,Peripheral ID0"
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hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
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line.long 0x04 "PID1,Peripheral ID1"
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hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
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hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
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line.long 0x08 "PID2,Peripheral ID2"
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hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
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bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
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hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
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line.long 0x0c "PID3,Peripheral ID3"
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hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
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hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
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rgroup.long 0xFD0++0x03
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line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20000)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20001)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 5. " C_SNAPSTALL ,Halting debug to gain control of the core" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step"
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x0)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x00001)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step"
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
wgroup 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,R13,R14,R15,xPSR/ Flags,MSP,PSP,RAZ/WI,CONTROL/FAULTMASK/BASEPRI/PRIMASK,?..."
|
|
group 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group 0x00--0x27
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 8.--11. " NUM_LIT ,Number of Literal Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " NUM_CODE ,Number of Code Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
hexmask.long.tbyte 0x04 5.--28. 1. " REMAP ,Remap Base Address Field"
|
|
;group 0x08++0x03
|
|
line.long 0x8 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x8 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x8 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x8 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0xC "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0xC 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0xC 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0xC 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x10 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x10 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x10 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x10 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x14 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x14 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x14 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x14 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x18 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x18 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x18 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x18 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x1C "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x1C 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x1C 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x1C 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x20 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x20 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x20 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x20 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x24 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x24 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x24 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x24 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
tree "Coresight Management Registers"
|
|
rgroup 0xfd0--0xfff
|
|
line.long 0x00 "PID4,Peripheral ID4"
|
|
line.long 0x04 "PID5,Peripheral ID5"
|
|
line.long 0x08 "PID6,Peripheral ID6"
|
|
line.long 0x0c "PID7,Peripheral ID7"
|
|
line.long 0x10 "PID0,Peripheral ID0"
|
|
line.long 0x14 "PID1,Peripheral ID1"
|
|
line.long 0x18 "PID2,Peripheral ID2"
|
|
line.long 0x1c "PID3,Peripheral ID3"
|
|
line.long 0x20 "CID0,Component ID0"
|
|
line.long 0x24 "CID1,Component ID1"
|
|
line.long 0x28 "CID2,Component ID2"
|
|
line.long 0x2c "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group 0x00--0x1B
|
|
line.long 0x00 "DWT_CTRL,DWT Control Register"
|
|
bitfld.long 0x00 28.--31. " NUMCOMP ,Number of Comparators Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables Cycle Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables Folded Instruction Count Event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables LSU Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables Sleep Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables Interrupt Overhead Event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables CPI Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables Interrupt Event Tracing" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables PC Sampling Event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Feed Synchronization Pulse to the ITM SYNCEN Control" "Disabled,24,26,28"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects a Tap on the DWT_CYCCNT Register" "Bit 6,Bit 10"
|
|
bitfld.long 0x00 5.--8. " POSTCNT ,Post-Scalar Counter for CYCTAP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload Value for POSTCNT Post-Scalar Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enable the DWT_CYCCNT Counter" "Disabled,Enabled"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count register"
|
|
;group 0x08++0x03
|
|
line.long 0x08 "DWT_CPICNT,DWT CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
;group 0x0c++0x03
|
|
line.long 0x0c "DWT_EXCCNT,DWT Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
;group 0x10++0x03
|
|
line.long 0x10 "DWT_SLEEPCNT,DWT Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
;group 0x14++0x03
|
|
line.long 0x14 "DWT_LSUCNT,DWT LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
;group 0x18++0x03
|
|
line.long 0x18 "DWT_FOLDCNT,DWT Fold Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x20)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x38))&0x20)==0x00)
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x48))&0x20)==0x00)
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x58))&0x20)==0x00)
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
tree "Coresight Management Registers"
|
|
rgroup 0xfd0--0xfff
|
|
line.long 0x00 "PID4,Peripheral ID4"
|
|
line.long 0x04 "PID5,Peripheral ID5"
|
|
line.long 0x08 "PID6,Peripheral ID6"
|
|
line.long 0x0c "PID7,Peripheral ID7"
|
|
line.long 0x10 "PID0,Peripheral ID1"
|
|
line.long 0x14 "PID1,Peripheral ID2"
|
|
line.long 0x18 "PID2,Peripheral ID3"
|
|
line.long 0x1c "PID3,Peripheral ID4"
|
|
line.long 0x20 "CID0,Component ID0"
|
|
line.long 0x24 "CID1,Component ID1"
|
|
line.long 0x28 "CID2,Component ID2"
|
|
line.long 0x2c "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
config 16. 8.
|
|
tree "System Module (SYSREG)"
|
|
base ad:0xE0042000
|
|
width 19.
|
|
group.long 0x00++0x13
|
|
line.long 0x00 "ESRAM_CR,Controls address mapping of the eSRAMs"
|
|
bitfld.long 0x00 0. " COM_ESRAMFWREMAP ,Remap of embedded SRAMs" "Not remapped,Remapped"
|
|
line.long 0x04 "ENVM_CR,Configures eNVM parameters"
|
|
bitfld.long 0x04 7. " ENVM_SIX_CYCLE ,Extra delay enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " ENVM_PIPE_BYPASS ,Pipeline bypass enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0.--4. " COM_ENVMREMAPSIZE ,Indicates the size of the segment in eNVM" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 Kbytes,32 Kbytes,64 Kbytes,128 Kbytes,256 Kbytes,512 Kbytes,?..."
|
|
line.long 0x08 "ENVM_REMAP_SYS_CR,eNVM mapping in system space"
|
|
hexmask.long.tbyte 0x08 1.--19. 2. " COM_ENVMREMAPBASE ,Offset address of eNVM for remapping"
|
|
bitfld.long 0x08 0. " COM_ENVMREMAPENABLE ,eNVM remap enable" "Disabled,Enabled"
|
|
line.long 0x0C "ENVM_REMAP_FAB_CR,eNVM mapping in fabric master space"
|
|
hexmask.long.tbyte 0x0C 1.--19. 2. " COM_ENVMREMAPBASE ,Offset address of eNVM for remapping"
|
|
bitfld.long 0x0C 0. " COM_ENVMREMAPENABLE ,eNVM remap enable" "Disabled,Enabled"
|
|
line.long 0x10 "FAB_PROT_SIZE_CR,Fabric protect size"
|
|
bitfld.long 0x10 0.--4. " COM_PROTREGIONSIZE ,Size of the memory region inaccessible to the FPGA fabric master" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,128 Bytes,Reserved,Reserved,Reserved,2 Kbytes,Reserved,Reserved,16 Kbytes,32 Kbytes,64 Kbytes,128 Kbytes,256 Kbytes,512 Kbytes,Reserved,Reserved,Reserved,8 MBytes,Reserved,Reserved,Reserved,128 MBytes,Reserved,Reserved,Reserved,2 GBytes,?..."
|
|
if (((d.l(ad:0xE0042000+0x10))&0x1F)==0x06)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FAB_PROT_BASE_CR,Fabric protect base address"
|
|
hexmask.long 0x00 7.--31. 0x80 " COM_PROTREGIONBASE ,Indicate the absolute base address of the protected segment"
|
|
bitfld.long 0x00 0. " COM_PROTREGIONENABLE ,Protection region enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xE0042000+0x10))&0x1F)==0x0A)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FAB_PROT_BASE_CR,Fabric protect base address"
|
|
hexmask.long.tbyte 0x00 11.--31. 0x800 " COM_PROTREGIONBASE ,Indicate the absolute base address of the protected segment"
|
|
bitfld.long 0x00 0. " COM_PROTREGIONENABLE ,Protection region enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xE0042000+0x10))&0x1F)==0x0D)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FAB_PROT_BASE_CR,Fabric protect base address"
|
|
hexmask.long.tbyte 0x00 14.--31. 0x4000 " COM_PROTREGIONBASE ,Indicate the absolute base address of the protected segment"
|
|
bitfld.long 0x00 0. " COM_PROTREGIONENABLE ,Protection region enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xE0042000+0x10))&0x1F)==0x0E)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FAB_PROT_BASE_CR,Fabric protect base address"
|
|
hexmask.long.tbyte 0x00 15.--31. 0x8000 " COM_PROTREGIONBASE ,Indicate the absolute base address of the protected segment"
|
|
bitfld.long 0x00 0. " COM_PROTREGIONENABLE ,Protection region enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xE0042000+0x10))&0x1F)==0x0F)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FAB_PROT_BASE_CR,Fabric protect base address"
|
|
hexmask.long.word 0x00 16.--31. 0x1 " COM_PROTREGIONBASE ,Indicate the absolute base address of the protected segment"
|
|
bitfld.long 0x00 0. " COM_PROTREGIONENABLE ,Protection region enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xE0042000+0x10))&0x1F)==0x10)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FAB_PROT_BASE_CR,Fabric protect base address"
|
|
hexmask.long.word 0x00 17.--31. 0x2 " COM_PROTREGIONBASE ,Indicate the absolute base address of the protected segment"
|
|
bitfld.long 0x00 0. " COM_PROTREGIONENABLE ,Protection region enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xE0042000+0x10))&0x1F)==0x11)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FAB_PROT_BASE_CR,Fabric protect base address"
|
|
hexmask.long.word 0x00 18.--31. 0x4 " COM_PROTREGIONBASE ,Indicate the absolute base address of the protected segment"
|
|
bitfld.long 0x00 0. " COM_PROTREGIONENABLE ,Protection region enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xE0042000+0x10))&0x1F)==0x12)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FAB_PROT_BASE_CR,Fabric protect base address"
|
|
hexmask.long.word 0x00 19.--31. 0x8 " COM_PROTREGIONBASE ,Indicate the absolute base address of the protected segment"
|
|
bitfld.long 0x00 0. " COM_PROTREGIONENABLE ,Protection region enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xE0042000+0x10))&0x1F)==0x16)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FAB_PROT_BASE_CR,Fabric protect base address"
|
|
hexmask.long.word 0x00 23.--31. 0x80 " COM_PROTREGIONBASE ,Indicate the absolute base address of the protected segment"
|
|
bitfld.long 0x00 0. " COM_PROTREGIONENABLE ,Protection region enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xE0042000+0x10))&0x1F)==0x1A)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FAB_PROT_BASE_CR,Fabric protect base address"
|
|
hexmask.long.byte 0x00 27.--31. 0x8 " COM_PROTREGIONBASE ,Indicate the absolute base address of the protected segment"
|
|
bitfld.long 0x00 0. " COM_PROTREGIONENABLE ,Protection region enable" "Disabled,Enabled"
|
|
elif (((d.l(ad:0xE0042000+0x10))&0x1F)==0x1E)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FAB_PROT_BASE_CR,Fabric protect base address"
|
|
bitfld.long 0x00 31. " COM_PROTREGIONBASE ,Indicate the absolute base address of the 2 GB protected segment" "0,1"
|
|
bitfld.long 0x00 0. " COM_PROTREGIONENABLE ,Protection region enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FAB_PROT_BASE_CR,Fabric protect base address"
|
|
bitfld.long 0x00 0. " COM_PROTREGIONENABLE ,Protection region enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "AHB_MATRIX_CR,Configures the AHB bus matrix"
|
|
bitfld.long 0x00 3. " COM_WEIGHTEDMODE ,Weighted round robin slave arbitration enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " COM_MASTERENABLE1 ,Enable control for Peripheral DMA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " COM_MASTERENABLE2 ,Enable control for Ethernet MAC" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " COM_MASTERENABLE3 ,Enable control for FPGA fabric master" "Disabled,Enabled"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "MSS_SR,MSS status bits"
|
|
bitfld.long 0x00 10. " PLLLOCKLOSTINT ,This bit indicates that a falling edge event occurred on PLLLOCK" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " PLLLOCKINT ,This bit indicates that a rising edge event occurred on the PLLLOCK signal" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 8. " COM_ERROR_STATUS[8] ,Peripheral DMA master access error" "No error,Error"
|
|
bitfld.long 0x00 7. " COM_ERROR_STATUS[7] ,Ethernet MAC master access error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " COM_ERROR_STATUS[6] ,Fabric master access error" "No error,Error"
|
|
bitfld.long 0x00 5. " COM_ERROR_STATUS[5] ,Cortex-M3 system bus master access error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 4. " COM_ERROR_STATUS[4] ,Cortex-M3 I-Code/D-Code bus master access error" "No error,Error"
|
|
bitfld.long 0x00 3. " BROWNOUT3_3VINT ,Indicates that the 3.3 V supply has dropped below 2.5 V" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " BROWNOUT1_5VINT ,Indicates that the 1.5 V supply has dropped below 1.3 V" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " WDOGTIMEOUTEVENT ,Watchdog time out" "Not occurred,Occurred"
|
|
textline " "
|
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bitfld.long 0x00 0. " RTCMATCHEVENT ,RTC matche an event" "Not occurred,Occurred"
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wgroup.long 0x20++0x03
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line.long 0x00 "CLR_MSS_SR,Clear the MSS status bits"
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bitfld.long 0x00 10. " CLRPLLLOCKLOSTINT ,Clears the interrupt signal PLLLOCKLOSTINT" "No effect,Clear"
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bitfld.long 0x00 9. " CLRPLLLOCKINT ,Clears the interrupt signal PLLLOCKTINT" "No effect,Clear"
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|
textline " "
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bitfld.long 0x00 8. " COM_CLEARSTATUS[8] ,Peripheral DMA master access error clear" "No effect,Clear"
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|
bitfld.long 0x00 7. " COM_CLEARSTATUS[7] ,Ethernet MAC master access error clear" "No effect,Clear"
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|
textline " "
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bitfld.long 0x00 6. " COM_CLEARSTATUS[6] ,Fabric master access error clear" "No effect,Clear"
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bitfld.long 0x00 5. " COM_CLEARSTATUS[5] ,Cortex-M3 system bus master access error clear" "No effect,Clear"
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textline " "
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bitfld.long 0x00 4. " COM_CLEARSTATUS[4] ,Cortex-M3 I-Code/D-Code bus master access error clear" "No effect,Clear"
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bitfld.long 0x00 3. " CLRBROWNOUT3_3VINT ,Clears the interrupt signal BROWNOUT3_3VINT" "No effect,Clear"
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|
textline " "
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bitfld.long 0x00 2. " CLRBROWNOUT1_5VINT ,Clears the interrupt signal BROWNOUT1_5VINT" "No effect,Clear"
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|
bitfld.long 0x00 1. " CLRWDOGTIMEOUTEVENT ,clears the WDOGTIMEOUTEVENT bit" "No effect,Clear"
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textline " "
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bitfld.long 0x00 0. " CLRRTCMATCHEVENT ,Clears the RTCMATCHEVENT bit" "No effect,Clear"
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group.long 0x24++0x0F
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line.long 0x00 "EFROM_CR,eFROM APB interface controller timing options register"
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bitfld.long 0x00 1.--3. " SYS_TOPT[3:1] ,Controls the number of wait states" "Reserved,Reserved,Reserved,Reserved,1:1/2:1/4:1,?..."
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|
textline " "
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bitfld.long 0x00 0. " SYS_TOPT[0] ,Timing Option" "Reserved,Timing option 2"
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line.long 0x04 "IAP_CR,Cnfigures IAP bus timing"
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line.long 0x08 "SOFT_IRQ_CR,SOFTINTERRUPT in FIIC Control"
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line.long 0x0C "SOFT_RST_CR,Controls soft resets"
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bitfld.long 0x0C 19. " PADRESETENABLE , Pad reset enable" "Disabled,Enabled"
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bitfld.long 0x0C 18. " F2MRESETENABLE ,F2M reset enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0C 17. " FPGA_SR ,FPGA fabric reset" "Relese,Keep"
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bitfld.long 0x0C 16. " EXT_SR ,EXT reset" "Relese,Keep"
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textline " "
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bitfld.long 0x0C 15. " IAP_SR ,IAP controller reset" "Relese,Keep"
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bitfld.long 0x0C 14. " GPIO_SR ,GPIOs reset" "Relese,Keep"
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textline " "
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bitfld.long 0x0C 13. " ACE_SR ,ACE reset" "Relese,Keep"
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bitfld.long 0x0C 12. " I2C_1_SR ,I2C_1 reset" "Relese,Keep"
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textline " "
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bitfld.long 0x0C 11. " I2C_0_SR ,I2C_0 reset" "Relese,Keep"
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bitfld.long 0x0C 10. " SPI_1_SR ,SPI_1 reset" "Relese,Keep"
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textline " "
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bitfld.long 0x0C 9. " SPI_0_SR ,SPI_0 reset" "Relese,Keep"
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bitfld.long 0x0C 8. " UART_1_SR ,UART_1 reset" "Relese,Keep"
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textline " "
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bitfld.long 0x0C 7. " UART_0_SR ,UART_0 reset" "Relese,Keep"
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|
bitfld.long 0x0C 6. " TIMER_SR ,System timer reset" "Relese,Keep"
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textline " "
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bitfld.long 0x0C 5. " PDMA_SR ,PDMA reset" "Relese,Keep"
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bitfld.long 0x0C 4. " MAC_SR ,Ethernet MAC reset" "Relese,Keep"
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|
textline " "
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bitfld.long 0x0C 3. " EMC_SR ,External memory controller reset" "Relese,Keep"
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bitfld.long 0x0C 2. " ESRAM_1_SR ,ESRAM_1 memory controller reset" "Relese,Keep"
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textline " "
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bitfld.long 0x0C 1. " ESRAM_0_SR ,ESRAM_0 memory controller reset" "Relese,Keep"
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bitfld.long 0x0C 0. " ESRAM_SR ,ENVM memory controller reset" "Relese,Keep"
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rgroup.long 0x34++0x03
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line.long 0x00 "DEVICE_SR,Provides device level status information"
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|
bitfld.long 0x00 6. " FPGAGOOD ,FPGA fabric state" "Powered down/not programmed,Powered up/programmed"
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bitfld.long 0x00 5. " FPGAPROGRAMMING ,FPGA programing mode" "Disabled,Enabled"
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|
textline " "
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bitfld.long 0x00 1. " BROWNOUT3_3VN ,Power status 3.3V" "<2.5 V,OK"
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bitfld.long 0x00 0. " BROWNOUT1_5VN ,Power status 1.5V" "<1.3 V,OK"
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group.long 0x38++0x03
|
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line.long 0x00 "SYSTICK_CR,Firmware control pins of Cortex-M3"
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bitfld.long 0x00 28.--29. " STCLK_DIVISOR , Clock divider" "4,8,16,32"
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bitfld.long 0x00 25. " NOREF ,Reference clock provide" "Provided,Not provided"
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|
textline " "
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|
bitfld.long 0x00 24. " SKEW ,The calibration value" "10 ms,Not exactly 10 ms"
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|
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,This value is the Reload value to use for 10 ms timing"
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|
sif ((CPU()=="A2F200")||(CPU()=="A2F500")||(CPU()=="SC100"))
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group.long 0x3C++0x0B
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line.long 0x00 "EMC_MUX_CR,External memory controller MUX configuration"
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bitfld.long 0x00 0. " EMC_SEL ,Multiplexed EMC I/O control" "Allocated to the FPGA logic,Allocated to the EMC"
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line.long 0x04 "CS_0_CR,EMC timing parameters for chip select 0"
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bitfld.long 0x04 21. " EMC_CSFE0 ,Chip select falling edge" "Rising,Falling"
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|
bitfld.long 0x04 20. " EMC_WENBEN0 ,Write enable/byte enable" "Write enable,Byte enable"
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|
textline " "
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bitfld.long 0x04 19. " EMC_RWPOL0 ,Read/write polarity" "Non-inverted,Inverted"
|
|
bitfld.long 0x04 18. " EMC_PIPEWRN0 ,Pipelined write" "Disabled,Enabled"
|
|
textline " "
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|
bitfld.long 0x04 17. " EMC_PIPERDN0 ,Pipelined read" "Disabled,Enabled"
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|
bitfld.long 0x04 15.--16. " EMC_IDD0 ,Inter device delay" "0,1,2,3"
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|
textline " "
|
|
bitfld.long 0x04 11.--14. " EMC_WRLAT0 ,Write data latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x04 7.--10. " EMC_RDLATREST0 ,Read data latency, next access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
textline " "
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bitfld.long 0x04 3.--6. " EMC_RDLATFIRST0 ,Read data latency, first access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x04 2. " EMC_PORTSIZE0 ,Port size" "8-bit,16-bit"
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|
textline " "
|
|
bitfld.long 0x04 0.--1. " EMC_MEMTYPE0 ,External memory type" "No memory assigned,Asynchronous/PSRAM,Synchronous,NOR flash"
|
|
line.long 0x08 "CS_1_CR,EMC timing parameters for chip select 1"
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|
bitfld.long 0x08 21. " EMC_CSFE1 ,Chip select falling edge" "Rising,Falling"
|
|
bitfld.long 0x08 20. " EMC_WENBEN1 ,Write enable/byte enable" "Write enable,Byte enable"
|
|
textline " "
|
|
bitfld.long 0x08 19. " EMC_RWPOL1 ,Read/write polarity" "Non-inverted,Inverted"
|
|
bitfld.long 0x08 18. " EMC_PIPEWRN1 ,Pipelined write" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 17. " EMC_PIPERDN1 ,Pipelined read" "Disabled,Enabled"
|
|
bitfld.long 0x08 15.--16. " EMC_IDD1 ,Inter device delay" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x08 11.--14. " EMC_WRLAT1 ,Write data latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x08 7.--10. " EMC_RDLATREST1 ,Read data latency, next access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
textline " "
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bitfld.long 0x08 3.--6. " EMC_RDLATFIRST1 ,Read data latency, first access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x08 2. " EMC_PORTSIZE1 ,Port size" "8-bit,16-bit"
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|
textline " "
|
|
bitfld.long 0x08 0.--1. " EMC_MEMTYPE1 ,External memory type" "No memory assigned,Asynchronous/PSRAM,Synchronous,NOR flash"
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;tree "Memory"
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|
;width 5.
|
|
;base ad:0x70000000
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|
;group.long 0x00++0x03
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|
; line.long 0x00 "EMC_CS0,CS0 Memory Region"
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; button "CS0 " "d ad:0x70000000--ad:0x73ffffff /long"
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;base ad:0x74000000
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;group.long 0x00++0x03
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; line.long 0x00 "EMC_CS1,CS1 Memory Region"
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; button "CS1 " "d ad:0x74000000--ad:0x77ffffff /long"
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;tree.end
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endif
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group.long 0x48++0x13
|
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line.long 0x00 "MSS_CLK_CR,Clock Configuration for APB buses"
|
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bitfld.long 0x00 12.--13. " GLBDIVISOR ,Selects the clock ratio between the MSS and FPGA" "1:1,2:1,4:1,?..."
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bitfld.long 0x00 8.--11. " RTCIF_ACMDIVISOR ,Determines the divisor value (RTCIF)" "PCLK1/16,PCLK1,PCLK1/2,Reserved,PCLK1/4,Reserved,Reserved,Reserved,PCLK1/8,?..."
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textline " "
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bitfld.long 0x00 6.--7. " ACLKDIVISOR ,Determines the divisor value (ACLK)" "FCLK,FCLK/2,FCLK/4,?..."
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bitfld.long 0x00 4.--5. " PCLK1DIVISOR ,Determines the divisor value (PCLK1)" "FCLK,FCLK/2,FCLK/4,?..."
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textline " "
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bitfld.long 0x00 2.--3. " PCLK0DIVISOR ,Determines the divisor value (PCLK0)" "FCLK,FCLK/2,FCLK/4,?..."
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bitfld.long 0x00 0. " RMIICLKSEL , RMII clock select" "External pad,GLC output"
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textline " "
|
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line.long 0x04 "MSS_CCC_DIV_CR,Control bits for the CCC dividers"
|
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bitfld.long 0x04 22. " OCDIVRST ,Reset the counter" "No reset,Reset"
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bitfld.long 0x04 21. " OCDIVHALF ,Output frequency divider" "OCDIV define,GLC or YC define"
|
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textline " "
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bitfld.long 0x04 16.--20. " OCDIV ,These bits divide the output of the global buffer" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
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bitfld.long 0x04 14. " OBDIVRST ,Reset the counter" "No reset,Reset"
|
|
textline " "
|
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bitfld.long 0x04 13. " OBDIVHALF ,Output frequency divider" "OBDIV define,GLB or YB define"
|
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bitfld.long 0x04 8.--12. " OBDIV ,These bits divide the output of the global buffer" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
textline " "
|
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bitfld.long 0x04 6. " OADIVRST ,Reset the counter" "No reset,Reset"
|
|
bitfld.long 0x04 5. " OADIVHALF ,Output frequency divider" "OADIV define,GLA define"
|
|
textline " "
|
|
bitfld.long 0x04 0.--4. " OADIV ,These bits divide the output of the global buffer" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
textline " "
|
|
line.long 0x08 "MSS_CCC_MUX_CR,Control bits for the CCC multiplexers"
|
|
bitfld.long 0x08 30.--31. " MAINOSCMODE ,Sets the main RC oscillator mode" "RC network,Low gain,Medium gain,High gain"
|
|
bitfld.long 0x08 29. " MAINOSCEN ,Main crystal oscillator enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 24.--27. " GLMUXCFG_SEL ,configures the glitchless multiplexer" "GLA,GLC,GLA,GLC,GLA,GLINT,GLA,GLINT,GLC,GLINT,GLC,GLINT,GLA,GLC,GLINT,GND"
|
|
bitfld.long 0x08 22. " BYPASSC ,Bypass GLC" "Output of PLL divider w,Global MUX C Path"
|
|
textline " "
|
|
bitfld.long 0x08 19.--21. " OCMUX ,Clock path C output multiplexer" "Bypassed,CLKC,PLL VCO 0 (from FBDLY),GLA clock source,PLL VCO 0,PLL VCO 90,PLL VCO 180,PLL VCO 270"
|
|
textline " "
|
|
bitfld.long 0x08 16.--18. " DYNCRXCSTATC ,DYNCSEL RXCSEL and STATCSEL clock select" "CUIN,CDIP,CUIP,GLCINT,RC oscillator,RC oscillator,32 KHz oscillator,32 KHz oscillator"
|
|
bitfld.long 0x08 14. " BYPASSB ,Bypass GLB" "Output of PLL divider v,Global MUX B Path"
|
|
textline " "
|
|
bitfld.long 0x08 11.--13. " OBMUX ,Clock path B output multiplexer" "Bypassed,CLKB,PLL VCO 0 (from FBDLY),GLA clock source,PLL VCO 0,PLL VCO 90,PLL VCO 180,PLL VCO 270"
|
|
bitfld.long 0x08 8.--10. " DYNBRXBSTATB ,DYNBSEL, RXBSEL, and STATBSEL clock select" "BUIN,BDIP,BUIP,GLBINT,RC oscillator,RC oscillator,32 KHz oscillator,32 KHz oscillator"
|
|
textline " "
|
|
bitfld.long 0x08 6. " BYPASSA ,Bypass GLA" "Output of PLL divider u,Global MUX A Path"
|
|
bitfld.long 0x08 3.--5. " OAMUX ,Clock path A output multiplexer" "Bypassed,CLKA,PLL VCO 0 (from FBDLY),Reserved,PLL VCO 0,PLL VCO 90,PLL VCO 180,PLL VCO 270"
|
|
textline " "
|
|
bitfld.long 0x08 0.--2. " DYNARXASTATA ,DYNASEL RXASEL and STATASEL clock select" "AUIN,ADIP,AUIP,GLAINT,RC oscillator,RC oscillator,32 KHz oscillator,32 KHz oscillator"
|
|
textline " "
|
|
line.long 0x0C "MSS_CCC_PLL_CR,Control bits for the PLL"
|
|
bitfld.long 0x0C 31. " PLLEN , PLL enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 23.--24. " VCOSEL[2:1] ,Specifies the PLL lock acquisition time and tracking jitter" "22-43.75,43.75-87.5,87.5-175,175-350"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " VCOSEL[0] ,Fast/slow PLL lock acquisition" "Fast PLL,Slow PLL"
|
|
bitfld.long 0x0C 21. " XDLYSEL ,Adds an additional 2 ns delay" "Not added,Added 2 ns"
|
|
textline " "
|
|
bitfld.long 0x0C 16.--20. " FBDLY ,Feedback delay" "535 ps,735 ps,935 ps,1.1 ns,1.27 ns,1.44 ns,1.6 ns,1.77 ns,1.94 ns,2.11 ns,2.27 ns,2.44 ns,2.61 ns,2.77 ns,2.95 ns,3.11 ns,3.28 ns,3.45 ns,3.61 ns,3.78 ns,3.95 ns,4.18 ns,4.28 ns,4.45 ns,4.79 ns,4.96 ns,5.12 ns,5.23 ns,5.33 ns,5.46 ns,5.50 ns,5.60 ns"
|
|
bitfld.long 0x0C 14.--15. " FBSEL ,Selects the multiplexer input" "GLBINT from FPGA fabric,PLL VCO 0 degree phase shift,PLL delayed,BUIP direct input clock"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 7.--13. 1. " FBDIV ,FBDIV defines the feedback clock divider /m value"
|
|
hexmask.long.byte 0x0C 0.--6. 1. " FINDIV ,FINDIV defines the input clock divider /n value"
|
|
textline " "
|
|
line.long 0x10 "MSS_CCC_DLY_CR,Control bits for the CCC delay elements"
|
|
bitfld.long 0x10 20.--24. " DLYA1 ,Sets the delay from the output of the glitchless MUX to the FPGA fabric" "735 ps,935 ps,1.1 ns,1.24 ns,1.36 ns,1.44 ns,1.6 ns,1.77 ns,1.94 ns,2.11 ns,2.27 ns,2.44 ns,2.61 ns,2.77 ns,2.95 ns,3.11 ns,3.28 ns,3.45 ns,3.61 ns,3.78 ns,3.95 ns,4.18 ns,4.28 ns,4.45 ns,4.79 ns,4.96 ns,5.12 ns,5.23 ns,5.33 ns,5.46 ns,5.50 ns,5.60 ns"
|
|
bitfld.long 0x10 15.--19. " DLYA0 ,Sets the delay from the output of the glitchless MUX to the microcontroller subsystem" "735 ps,935 ps,1.1 ns,1.24 ns,1.36 ns,1.44 ns,1.6 ns,1.77 ns,1.94 ns,2.11 ns,2.27 ns,2.44 ns,2.61 ns,2.77 ns,2.95 ns,3.11 ns,3.28 ns,3.45 ns,3.61 ns,3.78 ns,3.95 ns,4.18 ns,4.28 ns,4.45 ns,4.79 ns,4.96 ns,5.12 ns,5.23 ns,5.33 ns,5.46 ns,5.50 ns,5.60 ns"
|
|
textline " "
|
|
bitfld.long 0x10 10.--14. " DLYC ,sets the delay for the Global MUX C" "535 ps,735 ps,935 ps,1.1 ns,1.27 ns,1.44 ns,1.6 ns,1.77 ns,1.94 ns,2.11 ns,2.27 ns,2.44 ns,2.61 ns,2.77 ns,2.95 ns,3.11 ns,3.28 ns,3.45 ns,3.61 ns,3.78 ns,3.95 ns,4.18 ns,4.28 ns,4.45 ns,4.79 ns,4.96 ns,5.12 ns,5.23 ns,5.33 ns,5.46 ns,5.50 ns,5.60 ns"
|
|
bitfld.long 0x10 5.--9. " DLYB ,sets the delay for the Global MUX B" "535 ps,735 ps,935 ps,1.1 ns,1.27 ns,1.44 ns,1.6 ns,1.77 ns,1.94 ns,2.11 ns,2.27 ns,2.44 ns,2.61 ns,2.77 ns,2.95 ns,3.11 ns,3.28 ns,3.45 ns,3.61 ns,3.78 ns,3.95 ns,4.18 ns,4.28 ns,4.45 ns,4.79 ns,4.96 ns,5.12 ns,5.23 ns,5.33 ns,5.46 ns,5.50 ns,5.60 ns"
|
|
textline " "
|
|
bitfld.long 0x10 0.--4. " DLYA ,sets the delay for the Global MUX A" "535 ps,735 ps,935 ps,1.1 ns,1.27 ns,1.44 ns,1.6 ns,1.77 ns,1.94 ns,2.11 ns,2.27 ns,2.44 ns,2.61 ns,2.77 ns,2.95 ns,3.11 ns,3.28 ns,3.45 ns,3.61 ns,3.78 ns,3.95 ns,4.18 ns,4.28 ns,4.45 ns,4.79 ns,4.96 ns,5.12 ns,5.23 ns,5.33 ns,5.46 ns,5.50 ns,5.60 ns"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "MSS_CCC_SR,PLL Lock indication"
|
|
bitfld.long 0x00 0. " PLL_LOCK_SYNC ,PLL lock" "Not locked,Locked"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "VRPSM_CR,Control on chip VR"
|
|
bitfld.long 0x00 4. " BGPSMENABLE ,BG and PSM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CLR_PU_NINT ,Clears the PU_NINT interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FPGAVRONENABLE ,Fabric VR On signal qualifier enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MSSVRON ,switch off the power to the MSS and the FPGA fabric" "Disabled,Enabled"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "FAB_IF_CR,Controls the functionality of the fabric interface controller"
|
|
bitfld.long 0x00 2.--3. " APB32/AHBIF ,Bus Type Selection" "16-bit APB,32-bit AHB,32-bit APB,32-bit AHB"
|
|
bitfld.long 0x00 0. " FAB_AHB_BYPASS ,Configures to operate in bypass mode" "Pipeline mode,Bypass mode"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "FAB_APB_HIWORD_DR,16-bit APB holding register within the FIC"
|
|
hexmask.long.word 0x00 0.--15. 1. " APB16_XHOLD ,contains the upper 16 bits of the write/read data"
|
|
group.long 0x78++0x07
|
|
line.long 0x00 "MSS_IO_BANK_CR,Configures logic thresholds for the MSS I/O banks"
|
|
bitfld.long 0x00 2.--3. " BTWEST ,Logic threshold selection for MSS I/O west bank" "LVTTL/LVCMOS 3.3V,LVCMOS 2.5V,LVCMOS 1.8V,LVCMOS 1.5V/LVCMOS 1.8V"
|
|
bitfld.long 0x00 0.--1. " BTEAST ,Logic threshold selection for MSS I/O east bank" "LVTTL/LVCMOS 3.3V,LVCMOS 2.5V,LVCMOS 1.8V,LVCMOS 1.5V/LVCMOS 1.8V"
|
|
line.long 0x04 "GPIN_SOURCE_CR,Provides for alternate sourcing of input to GPIOs 16-31"
|
|
bitfld.long 0x04 15. " GPIN_31_SRC ,GPIN Source Select" "IOMUX15,IOMUX56"
|
|
bitfld.long 0x04 14. " GPIN_30_SRC ,GPIN Source Select" "IOMUX14,IOMUX55"
|
|
textline " "
|
|
bitfld.long 0x04 13. " GPIN_29_SRC ,GPIN Source Select" "IOMUX13,IOMUX54"
|
|
bitfld.long 0x04 12. " GPIN_28_SRC ,GPIN Source Select" "IOMUX12,IOMUX53"
|
|
textline " "
|
|
bitfld.long 0x04 11. " GPIN_27_SRC ,GPIN Source Select" "IOMUX11,IOMUX52"
|
|
bitfld.long 0x04 10. " GPIN_26_SRC ,GPIN Source Select" "IOMUX10,IOMUX51"
|
|
textline " "
|
|
bitfld.long 0x04 9. " GPIN_25_SRC ,GPIN Source Select" "IOMUX9,IOMUX50"
|
|
bitfld.long 0x04 8. " GPIN_24_SRC ,GPIN Source Select" "IOMUX8,IOMUX49"
|
|
textline " "
|
|
bitfld.long 0x04 7. " GPIN_23_SRC ,GPIN Source Select" "IOMUX7,IOMUX48"
|
|
bitfld.long 0x04 6. " GPIN_22_SRC ,GPIN Source Select" "IOMUX6,IOMUX47"
|
|
textline " "
|
|
bitfld.long 0x04 5. " GPIN_21_SRC ,GPIN Source Select" "IOMUX5,IOMUX46"
|
|
bitfld.long 0x04 4. " GPIN_20_SRC ,GPIN Source Select" "IOMUX4,IOMUX45"
|
|
textline " "
|
|
bitfld.long 0x04 3. " GPIN_19_SRC ,GPIN Source Select" "IOMUX3,IOMUX44"
|
|
bitfld.long 0x04 2. " GPIN_18_SRC ,GPIN Source Select" "IOMUX2,IOMUX43"
|
|
textline " "
|
|
bitfld.long 0x04 1. " GPIN_17_SRC ,GPIN Source Select" "IOMUX1,IOMUX42"
|
|
bitfld.long 0x04 0. " GPIN_16_SRC ,GPIN Source Select" "IOMUX0,IOMUX41"
|
|
tree "IOMUX"
|
|
width 13.
|
|
group.long 0x100++0xE3
|
|
line.long 0x0 "IOMUX_0_CR,Configures IOMUX 0"
|
|
bitfld.long 0x0 9. " IOMUX_0_ST ,Schmitt Trigger of IOMUX 0 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 8. " IOMUX_0_PD ,Weak pull-down of IOMUX 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 7. " IOMUX_0_PU ,Weak pull-up of IOMUX 0 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " IOMUX_0_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " IOMUX_0_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x0 1.--2. " IOMUX_0_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x0 0. " IOMUX_0_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x4 "IOMUX_1_CR,Configures IOMUX 1"
|
|
bitfld.long 0x4 9. " IOMUX_1_ST ,Schmitt Trigger of IOMUX 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 8. " IOMUX_1_PD ,Weak pull-down of IOMUX 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 7. " IOMUX_1_PU ,Weak pull-up of IOMUX 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 5. " IOMUX_1_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x4 3.--4. " IOMUX_1_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
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|
bitfld.long 0x4 1.--2. " IOMUX_1_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x4 0. " IOMUX_1_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x8 "IOMUX_2_CR,Configures IOMUX 2"
|
|
bitfld.long 0x8 9. " IOMUX_2_ST ,Schmitt Trigger of IOMUX 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 8. " IOMUX_2_PD ,Weak pull-down of IOMUX 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 7. " IOMUX_2_PU ,Weak pull-up of IOMUX 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 5. " IOMUX_2_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x8 3.--4. " IOMUX_2_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x8 1.--2. " IOMUX_2_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x8 0. " IOMUX_2_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xC "IOMUX_3_CR,Configures IOMUX 3"
|
|
bitfld.long 0xC 9. " IOMUX_3_ST ,Schmitt Trigger of IOMUX 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 8. " IOMUX_3_PD ,Weak pull-down of IOMUX 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 7. " IOMUX_3_PU ,Weak pull-up of IOMUX 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 5. " IOMUX_3_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xC 3.--4. " IOMUX_3_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0xC 1.--2. " IOMUX_3_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xC 0. " IOMUX_3_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x10 "IOMUX_4_CR,Configures IOMUX 4"
|
|
bitfld.long 0x10 9. " IOMUX_4_ST ,Schmitt Trigger of IOMUX 4 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " IOMUX_4_PD ,Weak pull-down of IOMUX 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " IOMUX_4_PU ,Weak pull-up of IOMUX 4 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 5. " IOMUX_4_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x10 3.--4. " IOMUX_4_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x10 1.--2. " IOMUX_4_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x10 0. " IOMUX_4_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x14 "IOMUX_5_CR,Configures IOMUX 5"
|
|
bitfld.long 0x14 9. " IOMUX_5_ST ,Schmitt Trigger of IOMUX 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 8. " IOMUX_5_PD ,Weak pull-down of IOMUX 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 7. " IOMUX_5_PU ,Weak pull-up of IOMUX 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 5. " IOMUX_5_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x14 3.--4. " IOMUX_5_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x14 1.--2. " IOMUX_5_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x14 0. " IOMUX_5_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x18 "IOMUX_6_CR,Configures IOMUX 6"
|
|
bitfld.long 0x18 9. " IOMUX_6_ST ,Schmitt Trigger of IOMUX 6 enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 8. " IOMUX_6_PD ,Weak pull-down of IOMUX 6 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 7. " IOMUX_6_PU ,Weak pull-up of IOMUX 6 enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 5. " IOMUX_6_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x18 3.--4. " IOMUX_6_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x18 1.--2. " IOMUX_6_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x18 0. " IOMUX_6_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x1C "IOMUX_7_CR,Configures IOMUX 7"
|
|
bitfld.long 0x1C 9. " IOMUX_7_ST ,Schmitt Trigger of IOMUX 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 8. " IOMUX_7_PD ,Weak pull-down of IOMUX 7 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " IOMUX_7_PU ,Weak pull-up of IOMUX 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 5. " IOMUX_7_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x1C 3.--4. " IOMUX_7_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x1C 1.--2. " IOMUX_7_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " IOMUX_7_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x20 "IOMUX_8_CR,Configures IOMUX 8"
|
|
bitfld.long 0x20 9. " IOMUX_8_ST ,Schmitt Trigger of IOMUX 8 enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 8. " IOMUX_8_PD ,Weak pull-down of IOMUX 8 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 7. " IOMUX_8_PU ,Weak pull-up of IOMUX 8 enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 5. " IOMUX_8_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x20 3.--4. " IOMUX_8_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x20 1.--2. " IOMUX_8_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x20 0. " IOMUX_8_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x24 "IOMUX_9_CR,Configures IOMUX 9"
|
|
bitfld.long 0x24 9. " IOMUX_9_ST ,Schmitt Trigger of IOMUX 9 enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 8. " IOMUX_9_PD ,Weak pull-down of IOMUX 9 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 7. " IOMUX_9_PU ,Weak pull-up of IOMUX 9 enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 5. " IOMUX_9_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x24 3.--4. " IOMUX_9_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x24 1.--2. " IOMUX_9_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x24 0. " IOMUX_9_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x28 "IOMUX_10_CR,Configures IOMUX 10"
|
|
bitfld.long 0x28 9. " IOMUX_10_ST ,Schmitt Trigger of IOMUX 10 enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 8. " IOMUX_10_PD ,Weak pull-down of IOMUX 10 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 7. " IOMUX_10_PU ,Weak pull-up of IOMUX 10 enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 5. " IOMUX_10_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x28 3.--4. " IOMUX_10_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x28 1.--2. " IOMUX_10_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x28 0. " IOMUX_10_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x2C "IOMUX_11_CR,Configures IOMUX 11"
|
|
bitfld.long 0x2C 9. " IOMUX_11_ST ,Schmitt Trigger of IOMUX 11 enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 8. " IOMUX_11_PD ,Weak pull-down of IOMUX 11 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 7. " IOMUX_11_PU ,Weak pull-up of IOMUX 11 enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 5. " IOMUX_11_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x2C 3.--4. " IOMUX_11_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x2C 1.--2. " IOMUX_11_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x2C 0. " IOMUX_11_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x30 "IOMUX_12_CR,Configures IOMUX 12"
|
|
bitfld.long 0x30 9. " IOMUX_12_ST ,Schmitt Trigger of IOMUX 12 enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 8. " IOMUX_12_PD ,Weak pull-down of IOMUX 12 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 7. " IOMUX_12_PU ,Weak pull-up of IOMUX 12 enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 5. " IOMUX_12_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x30 3.--4. " IOMUX_12_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x30 1.--2. " IOMUX_12_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x30 0. " IOMUX_12_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x34 "IOMUX_13_CR,Configures IOMUX 13"
|
|
bitfld.long 0x34 9. " IOMUX_13_ST ,Schmitt Trigger of IOMUX 13 enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 8. " IOMUX_13_PD ,Weak pull-down of IOMUX 13 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 7. " IOMUX_13_PU ,Weak pull-up of IOMUX 13 enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 5. " IOMUX_13_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x34 3.--4. " IOMUX_13_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x34 1.--2. " IOMUX_13_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x34 0. " IOMUX_13_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x38 "IOMUX_14_CR,Configures IOMUX 14"
|
|
bitfld.long 0x38 9. " IOMUX_14_ST ,Schmitt Trigger of IOMUX 14 enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 8. " IOMUX_14_PD ,Weak pull-down of IOMUX 14 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 7. " IOMUX_14_PU ,Weak pull-up of IOMUX 14 enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 5. " IOMUX_14_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x38 3.--4. " IOMUX_14_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x38 1.--2. " IOMUX_14_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x38 0. " IOMUX_14_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x3C "IOMUX_15_CR,Configures IOMUX 15"
|
|
bitfld.long 0x3C 9. " IOMUX_15_ST ,Schmitt Trigger of IOMUX 15 enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 8. " IOMUX_15_PD ,Weak pull-down of IOMUX 15 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 7. " IOMUX_15_PU ,Weak pull-up of IOMUX 15 enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 5. " IOMUX_15_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x3C 3.--4. " IOMUX_15_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x3C 1.--2. " IOMUX_15_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x3C 0. " IOMUX_15_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x40 "IOMUX_16_CR,Configures IOMUX 16"
|
|
bitfld.long 0x40 9. " IOMUX_16_ST ,Schmitt Trigger of IOMUX 16 enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 8. " IOMUX_16_PD ,Weak pull-down of IOMUX 16 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x40 7. " IOMUX_16_PU ,Weak pull-up of IOMUX 16 enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 5. " IOMUX_16_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x40 3.--4. " IOMUX_16_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
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|
bitfld.long 0x40 1.--2. " IOMUX_16_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x40 0. " IOMUX_16_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x44 "IOMUX_17_CR,Configures IOMUX 17"
|
|
bitfld.long 0x44 9. " IOMUX_17_ST ,Schmitt Trigger of IOMUX 17 enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 8. " IOMUX_17_PD ,Weak pull-down of IOMUX 17 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x44 7. " IOMUX_17_PU ,Weak pull-up of IOMUX 17 enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 5. " IOMUX_17_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x44 3.--4. " IOMUX_17_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
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|
bitfld.long 0x44 1.--2. " IOMUX_17_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x44 0. " IOMUX_17_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x48 "IOMUX_18_CR,Configures IOMUX 18"
|
|
bitfld.long 0x48 9. " IOMUX_18_ST ,Schmitt Trigger of IOMUX 18 enable" "Disabled,Enabled"
|
|
bitfld.long 0x48 8. " IOMUX_18_PD ,Weak pull-down of IOMUX 18 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x48 7. " IOMUX_18_PU ,Weak pull-up of IOMUX 18 enable" "Disabled,Enabled"
|
|
bitfld.long 0x48 5. " IOMUX_18_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x48 3.--4. " IOMUX_18_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x48 1.--2. " IOMUX_18_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x48 0. " IOMUX_18_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x4C "IOMUX_19_CR,Configures IOMUX 19"
|
|
bitfld.long 0x4C 9. " IOMUX_19_ST ,Schmitt Trigger of IOMUX 19 enable" "Disabled,Enabled"
|
|
bitfld.long 0x4C 8. " IOMUX_19_PD ,Weak pull-down of IOMUX 19 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4C 7. " IOMUX_19_PU ,Weak pull-up of IOMUX 19 enable" "Disabled,Enabled"
|
|
bitfld.long 0x4C 5. " IOMUX_19_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x4C 3.--4. " IOMUX_19_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x4C 1.--2. " IOMUX_19_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x4C 0. " IOMUX_19_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x50 "IOMUX_20_CR,Configures IOMUX 20"
|
|
bitfld.long 0x50 9. " IOMUX_20_ST ,Schmitt Trigger of IOMUX 20 enable" "Disabled,Enabled"
|
|
bitfld.long 0x50 8. " IOMUX_20_PD ,Weak pull-down of IOMUX 20 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x50 7. " IOMUX_20_PU ,Weak pull-up of IOMUX 20 enable" "Disabled,Enabled"
|
|
bitfld.long 0x50 5. " IOMUX_20_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x50 3.--4. " IOMUX_20_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x50 1.--2. " IOMUX_20_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x50 0. " IOMUX_20_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x54 "IOMUX_21_CR,Configures IOMUX 21"
|
|
bitfld.long 0x54 9. " IOMUX_21_ST ,Schmitt Trigger of IOMUX 21 enable" "Disabled,Enabled"
|
|
bitfld.long 0x54 8. " IOMUX_21_PD ,Weak pull-down of IOMUX 21 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x54 7. " IOMUX_21_PU ,Weak pull-up of IOMUX 21 enable" "Disabled,Enabled"
|
|
bitfld.long 0x54 5. " IOMUX_21_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x54 3.--4. " IOMUX_21_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x54 1.--2. " IOMUX_21_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x54 0. " IOMUX_21_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x58 "IOMUX_22_CR,Configures IOMUX 22"
|
|
bitfld.long 0x58 9. " IOMUX_22_ST ,Schmitt Trigger of IOMUX 22 enable" "Disabled,Enabled"
|
|
bitfld.long 0x58 8. " IOMUX_22_PD ,Weak pull-down of IOMUX 22 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x58 7. " IOMUX_22_PU ,Weak pull-up of IOMUX 22 enable" "Disabled,Enabled"
|
|
bitfld.long 0x58 5. " IOMUX_22_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x58 3.--4. " IOMUX_22_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x58 1.--2. " IOMUX_22_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x58 0. " IOMUX_22_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x5C "IOMUX_23_CR,Configures IOMUX 23"
|
|
bitfld.long 0x5C 9. " IOMUX_23_ST ,Schmitt Trigger of IOMUX 23 enable" "Disabled,Enabled"
|
|
bitfld.long 0x5C 8. " IOMUX_23_PD ,Weak pull-down of IOMUX 23 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x5C 7. " IOMUX_23_PU ,Weak pull-up of IOMUX 23 enable" "Disabled,Enabled"
|
|
bitfld.long 0x5C 5. " IOMUX_23_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x5C 3.--4. " IOMUX_23_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x5C 1.--2. " IOMUX_23_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x5C 0. " IOMUX_23_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x60 "IOMUX_24_CR,Configures IOMUX 24"
|
|
bitfld.long 0x60 9. " IOMUX_24_ST ,Schmitt Trigger of IOMUX 24 enable" "Disabled,Enabled"
|
|
bitfld.long 0x60 8. " IOMUX_24_PD ,Weak pull-down of IOMUX 24 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x60 7. " IOMUX_24_PU ,Weak pull-up of IOMUX 24 enable" "Disabled,Enabled"
|
|
bitfld.long 0x60 5. " IOMUX_24_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x60 3.--4. " IOMUX_24_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x60 1.--2. " IOMUX_24_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x60 0. " IOMUX_24_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x64 "IOMUX_25_CR,Configures IOMUX 25"
|
|
bitfld.long 0x64 9. " IOMUX_25_ST ,Schmitt Trigger of IOMUX 25 enable" "Disabled,Enabled"
|
|
bitfld.long 0x64 8. " IOMUX_25_PD ,Weak pull-down of IOMUX 25 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x64 7. " IOMUX_25_PU ,Weak pull-up of IOMUX 25 enable" "Disabled,Enabled"
|
|
bitfld.long 0x64 5. " IOMUX_25_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x64 3.--4. " IOMUX_25_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x64 1.--2. " IOMUX_25_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x64 0. " IOMUX_25_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x68 "IOMUX_26_CR,Configures IOMUX 26"
|
|
bitfld.long 0x68 9. " IOMUX_26_ST ,Schmitt Trigger of IOMUX 26 enable" "Disabled,Enabled"
|
|
bitfld.long 0x68 8. " IOMUX_26_PD ,Weak pull-down of IOMUX 26 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x68 7. " IOMUX_26_PU ,Weak pull-up of IOMUX 26 enable" "Disabled,Enabled"
|
|
bitfld.long 0x68 5. " IOMUX_26_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x68 3.--4. " IOMUX_26_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x68 1.--2. " IOMUX_26_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x68 0. " IOMUX_26_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x6C "IOMUX_27_CR,Configures IOMUX 27"
|
|
bitfld.long 0x6C 9. " IOMUX_27_ST ,Schmitt Trigger of IOMUX 27 enable" "Disabled,Enabled"
|
|
bitfld.long 0x6C 8. " IOMUX_27_PD ,Weak pull-down of IOMUX 27 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x6C 7. " IOMUX_27_PU ,Weak pull-up of IOMUX 27 enable" "Disabled,Enabled"
|
|
bitfld.long 0x6C 5. " IOMUX_27_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x6C 3.--4. " IOMUX_27_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x6C 1.--2. " IOMUX_27_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x6C 0. " IOMUX_27_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x70 "IOMUX_28_CR,Configures IOMUX 28"
|
|
bitfld.long 0x70 9. " IOMUX_28_ST ,Schmitt Trigger of IOMUX 28 enable" "Disabled,Enabled"
|
|
bitfld.long 0x70 8. " IOMUX_28_PD ,Weak pull-down of IOMUX 28 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x70 7. " IOMUX_28_PU ,Weak pull-up of IOMUX 28 enable" "Disabled,Enabled"
|
|
bitfld.long 0x70 5. " IOMUX_28_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x70 3.--4. " IOMUX_28_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x70 1.--2. " IOMUX_28_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x70 0. " IOMUX_28_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x74 "IOMUX_29_CR,Configures IOMUX 29"
|
|
bitfld.long 0x74 9. " IOMUX_29_ST ,Schmitt Trigger of IOMUX 29 enable" "Disabled,Enabled"
|
|
bitfld.long 0x74 8. " IOMUX_29_PD ,Weak pull-down of IOMUX 29 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x74 7. " IOMUX_29_PU ,Weak pull-up of IOMUX 29 enable" "Disabled,Enabled"
|
|
bitfld.long 0x74 5. " IOMUX_29_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x74 3.--4. " IOMUX_29_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x74 1.--2. " IOMUX_29_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x74 0. " IOMUX_29_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x78 "IOMUX_30_CR,Configures IOMUX 30"
|
|
bitfld.long 0x78 9. " IOMUX_30_ST ,Schmitt Trigger of IOMUX 30 enable" "Disabled,Enabled"
|
|
bitfld.long 0x78 8. " IOMUX_30_PD ,Weak pull-down of IOMUX 30 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x78 7. " IOMUX_30_PU ,Weak pull-up of IOMUX 30 enable" "Disabled,Enabled"
|
|
bitfld.long 0x78 5. " IOMUX_30_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x78 3.--4. " IOMUX_30_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x78 1.--2. " IOMUX_30_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x78 0. " IOMUX_30_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x7C "IOMUX_31_CR,Configures IOMUX 31"
|
|
bitfld.long 0x7C 9. " IOMUX_31_ST ,Schmitt Trigger of IOMUX 31 enable" "Disabled,Enabled"
|
|
bitfld.long 0x7C 8. " IOMUX_31_PD ,Weak pull-down of IOMUX 31 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x7C 7. " IOMUX_31_PU ,Weak pull-up of IOMUX 31 enable" "Disabled,Enabled"
|
|
bitfld.long 0x7C 5. " IOMUX_31_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x7C 3.--4. " IOMUX_31_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x7C 1.--2. " IOMUX_31_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x7C 0. " IOMUX_31_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x80 "IOMUX_32_CR,Configures IOMUX 32"
|
|
bitfld.long 0x80 9. " IOMUX_32_ST ,Schmitt Trigger of IOMUX 32 enable" "Disabled,Enabled"
|
|
bitfld.long 0x80 8. " IOMUX_32_PD ,Weak pull-down of IOMUX 32 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x80 7. " IOMUX_32_PU ,Weak pull-up of IOMUX 32 enable" "Disabled,Enabled"
|
|
bitfld.long 0x80 5. " IOMUX_32_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x80 3.--4. " IOMUX_32_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x80 1.--2. " IOMUX_32_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x80 0. " IOMUX_32_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x84 "IOMUX_33_CR,Configures IOMUX 33"
|
|
bitfld.long 0x84 9. " IOMUX_33_ST ,Schmitt Trigger of IOMUX 33 enable" "Disabled,Enabled"
|
|
bitfld.long 0x84 8. " IOMUX_33_PD ,Weak pull-down of IOMUX 33 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x84 7. " IOMUX_33_PU ,Weak pull-up of IOMUX 33 enable" "Disabled,Enabled"
|
|
bitfld.long 0x84 5. " IOMUX_33_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x84 3.--4. " IOMUX_33_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x84 1.--2. " IOMUX_33_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x84 0. " IOMUX_33_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x88 "IOMUX_34_CR,Configures IOMUX 34"
|
|
bitfld.long 0x88 9. " IOMUX_34_ST ,Schmitt Trigger of IOMUX 34 enable" "Disabled,Enabled"
|
|
bitfld.long 0x88 8. " IOMUX_34_PD ,Weak pull-down of IOMUX 34 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x88 7. " IOMUX_34_PU ,Weak pull-up of IOMUX 34 enable" "Disabled,Enabled"
|
|
bitfld.long 0x88 5. " IOMUX_34_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x88 3.--4. " IOMUX_34_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
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|
bitfld.long 0x88 1.--2. " IOMUX_34_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x88 0. " IOMUX_34_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x8C "IOMUX_35_CR,Configures IOMUX 35"
|
|
bitfld.long 0x8C 9. " IOMUX_35_ST ,Schmitt Trigger of IOMUX 35 enable" "Disabled,Enabled"
|
|
bitfld.long 0x8C 8. " IOMUX_35_PD ,Weak pull-down of IOMUX 35 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8C 7. " IOMUX_35_PU ,Weak pull-up of IOMUX 35 enable" "Disabled,Enabled"
|
|
bitfld.long 0x8C 5. " IOMUX_35_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x8C 3.--4. " IOMUX_35_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
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|
bitfld.long 0x8C 1.--2. " IOMUX_35_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x8C 0. " IOMUX_35_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x90 "IOMUX_36_CR,Configures IOMUX 36"
|
|
bitfld.long 0x90 9. " IOMUX_36_ST ,Schmitt Trigger of IOMUX 36 enable" "Disabled,Enabled"
|
|
bitfld.long 0x90 8. " IOMUX_36_PD ,Weak pull-down of IOMUX 36 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x90 7. " IOMUX_36_PU ,Weak pull-up of IOMUX 36 enable" "Disabled,Enabled"
|
|
bitfld.long 0x90 5. " IOMUX_36_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x90 3.--4. " IOMUX_36_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
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|
bitfld.long 0x90 1.--2. " IOMUX_36_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x90 0. " IOMUX_36_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x94 "IOMUX_37_CR,Configures IOMUX 37"
|
|
bitfld.long 0x94 9. " IOMUX_37_ST ,Schmitt Trigger of IOMUX 37 enable" "Disabled,Enabled"
|
|
bitfld.long 0x94 8. " IOMUX_37_PD ,Weak pull-down of IOMUX 37 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x94 7. " IOMUX_37_PU ,Weak pull-up of IOMUX 37 enable" "Disabled,Enabled"
|
|
bitfld.long 0x94 5. " IOMUX_37_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x94 3.--4. " IOMUX_37_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
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|
bitfld.long 0x94 1.--2. " IOMUX_37_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x94 0. " IOMUX_37_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x98 "IOMUX_38_CR,Configures IOMUX 38"
|
|
bitfld.long 0x98 9. " IOMUX_38_ST ,Schmitt Trigger of IOMUX 38 enable" "Disabled,Enabled"
|
|
bitfld.long 0x98 8. " IOMUX_38_PD ,Weak pull-down of IOMUX 38 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x98 7. " IOMUX_38_PU ,Weak pull-up of IOMUX 38 enable" "Disabled,Enabled"
|
|
bitfld.long 0x98 5. " IOMUX_38_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x98 3.--4. " IOMUX_38_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x98 1.--2. " IOMUX_38_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x98 0. " IOMUX_38_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x9C "IOMUX_39_CR,Configures IOMUX 39"
|
|
bitfld.long 0x9C 9. " IOMUX_39_ST ,Schmitt Trigger of IOMUX 39 enable" "Disabled,Enabled"
|
|
bitfld.long 0x9C 8. " IOMUX_39_PD ,Weak pull-down of IOMUX 39 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x9C 7. " IOMUX_39_PU ,Weak pull-up of IOMUX 39 enable" "Disabled,Enabled"
|
|
bitfld.long 0x9C 5. " IOMUX_39_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x9C 3.--4. " IOMUX_39_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x9C 1.--2. " IOMUX_39_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x9C 0. " IOMUX_39_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xA0 "IOMUX_40_CR,Configures IOMUX 40"
|
|
bitfld.long 0xA0 9. " IOMUX_40_ST ,Schmitt Trigger of IOMUX 40 enable" "Disabled,Enabled"
|
|
bitfld.long 0xA0 8. " IOMUX_40_PD ,Weak pull-down of IOMUX 40 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xA0 7. " IOMUX_40_PU ,Weak pull-up of IOMUX 40 enable" "Disabled,Enabled"
|
|
bitfld.long 0xA0 5. " IOMUX_40_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xA0 3.--4. " IOMUX_40_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0xA0 1.--2. " IOMUX_40_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xA0 0. " IOMUX_40_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xA4 "IOMUX_41_CR,Configures IOMUX 41"
|
|
bitfld.long 0xA4 9. " IOMUX_41_ST ,Schmitt Trigger of IOMUX 41 enable" "Disabled,Enabled"
|
|
bitfld.long 0xA4 8. " IOMUX_41_PD ,Weak pull-down of IOMUX 41 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xA4 7. " IOMUX_41_PU ,Weak pull-up of IOMUX 41 enable" "Disabled,Enabled"
|
|
bitfld.long 0xA4 5. " IOMUX_41_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xA4 3.--4. " IOMUX_41_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0xA4 1.--2. " IOMUX_41_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xA4 0. " IOMUX_41_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xA8 "IOMUX_42_CR,Configures IOMUX 42"
|
|
bitfld.long 0xA8 9. " IOMUX_42_ST ,Schmitt Trigger of IOMUX 42 enable" "Disabled,Enabled"
|
|
bitfld.long 0xA8 8. " IOMUX_42_PD ,Weak pull-down of IOMUX 42 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xA8 7. " IOMUX_42_PU ,Weak pull-up of IOMUX 42 enable" "Disabled,Enabled"
|
|
bitfld.long 0xA8 5. " IOMUX_42_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xA8 3.--4. " IOMUX_42_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0xA8 1.--2. " IOMUX_42_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xA8 0. " IOMUX_42_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xAC "IOMUX_43_CR,Configures IOMUX 43"
|
|
bitfld.long 0xAC 9. " IOMUX_43_ST ,Schmitt Trigger of IOMUX 43 enable" "Disabled,Enabled"
|
|
bitfld.long 0xAC 8. " IOMUX_43_PD ,Weak pull-down of IOMUX 43 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xAC 7. " IOMUX_43_PU ,Weak pull-up of IOMUX 43 enable" "Disabled,Enabled"
|
|
bitfld.long 0xAC 5. " IOMUX_43_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xAC 3.--4. " IOMUX_43_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0xAC 1.--2. " IOMUX_43_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xAC 0. " IOMUX_43_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xB0 "IOMUX_44_CR,Configures IOMUX 44"
|
|
bitfld.long 0xB0 9. " IOMUX_44_ST ,Schmitt Trigger of IOMUX 44 enable" "Disabled,Enabled"
|
|
bitfld.long 0xB0 8. " IOMUX_44_PD ,Weak pull-down of IOMUX 44 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xB0 7. " IOMUX_44_PU ,Weak pull-up of IOMUX 44 enable" "Disabled,Enabled"
|
|
bitfld.long 0xB0 5. " IOMUX_44_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xB0 3.--4. " IOMUX_44_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0xB0 1.--2. " IOMUX_44_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xB0 0. " IOMUX_44_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xB4 "IOMUX_45_CR,Configures IOMUX 45"
|
|
bitfld.long 0xB4 9. " IOMUX_45_ST ,Schmitt Trigger of IOMUX 45 enable" "Disabled,Enabled"
|
|
bitfld.long 0xB4 8. " IOMUX_45_PD ,Weak pull-down of IOMUX 45 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xB4 7. " IOMUX_45_PU ,Weak pull-up of IOMUX 45 enable" "Disabled,Enabled"
|
|
bitfld.long 0xB4 5. " IOMUX_45_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xB4 3.--4. " IOMUX_45_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0xB4 1.--2. " IOMUX_45_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xB4 0. " IOMUX_45_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xB8 "IOMUX_46_CR,Configures IOMUX 46"
|
|
bitfld.long 0xB8 9. " IOMUX_46_ST ,Schmitt Trigger of IOMUX 46 enable" "Disabled,Enabled"
|
|
bitfld.long 0xB8 8. " IOMUX_46_PD ,Weak pull-down of IOMUX 46 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xB8 7. " IOMUX_46_PU ,Weak pull-up of IOMUX 46 enable" "Disabled,Enabled"
|
|
bitfld.long 0xB8 5. " IOMUX_46_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xB8 3.--4. " IOMUX_46_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0xB8 1.--2. " IOMUX_46_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xB8 0. " IOMUX_46_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xBC "IOMUX_47_CR,Configures IOMUX 47"
|
|
bitfld.long 0xBC 9. " IOMUX_47_ST ,Schmitt Trigger of IOMUX 47 enable" "Disabled,Enabled"
|
|
bitfld.long 0xBC 8. " IOMUX_47_PD ,Weak pull-down of IOMUX 47 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xBC 7. " IOMUX_47_PU ,Weak pull-up of IOMUX 47 enable" "Disabled,Enabled"
|
|
bitfld.long 0xBC 5. " IOMUX_47_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xBC 3.--4. " IOMUX_47_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0xBC 1.--2. " IOMUX_47_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xBC 0. " IOMUX_47_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xC0 "IOMUX_48_CR,Configures IOMUX 48"
|
|
bitfld.long 0xC0 9. " IOMUX_48_ST ,Schmitt Trigger of IOMUX 48 enable" "Disabled,Enabled"
|
|
bitfld.long 0xC0 8. " IOMUX_48_PD ,Weak pull-down of IOMUX 48 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC0 7. " IOMUX_48_PU ,Weak pull-up of IOMUX 48 enable" "Disabled,Enabled"
|
|
bitfld.long 0xC0 5. " IOMUX_48_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xC0 3.--4. " IOMUX_48_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0xC0 1.--2. " IOMUX_48_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xC0 0. " IOMUX_48_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xC4 "IOMUX_49_CR,Configures IOMUX 49"
|
|
bitfld.long 0xC4 9. " IOMUX_49_ST ,Schmitt Trigger of IOMUX 49 enable" "Disabled,Enabled"
|
|
bitfld.long 0xC4 8. " IOMUX_49_PD ,Weak pull-down of IOMUX 49 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC4 7. " IOMUX_49_PU ,Weak pull-up of IOMUX 49 enable" "Disabled,Enabled"
|
|
bitfld.long 0xC4 5. " IOMUX_49_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xC4 3.--4. " IOMUX_49_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0xC4 1.--2. " IOMUX_49_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xC4 0. " IOMUX_49_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xC8 "IOMUX_50_CR,Configures IOMUX 50"
|
|
bitfld.long 0xC8 9. " IOMUX_50_ST ,Schmitt Trigger of IOMUX 50 enable" "Disabled,Enabled"
|
|
bitfld.long 0xC8 8. " IOMUX_50_PD ,Weak pull-down of IOMUX 50 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC8 7. " IOMUX_50_PU ,Weak pull-up of IOMUX 50 enable" "Disabled,Enabled"
|
|
bitfld.long 0xC8 5. " IOMUX_50_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xC8 3.--4. " IOMUX_50_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0xC8 1.--2. " IOMUX_50_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xC8 0. " IOMUX_50_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xCC "IOMUX_51_CR,Configures IOMUX 51"
|
|
bitfld.long 0xCC 9. " IOMUX_51_ST ,Schmitt Trigger of IOMUX 51 enable" "Disabled,Enabled"
|
|
bitfld.long 0xCC 8. " IOMUX_51_PD ,Weak pull-down of IOMUX 51 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xCC 7. " IOMUX_51_PU ,Weak pull-up of IOMUX 51 enable" "Disabled,Enabled"
|
|
bitfld.long 0xCC 5. " IOMUX_51_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xCC 3.--4. " IOMUX_51_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0xCC 1.--2. " IOMUX_51_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xCC 0. " IOMUX_51_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xD0 "IOMUX_52_CR,Configures IOMUX 52"
|
|
bitfld.long 0xD0 9. " IOMUX_52_ST ,Schmitt Trigger of IOMUX 52 enable" "Disabled,Enabled"
|
|
bitfld.long 0xD0 8. " IOMUX_52_PD ,Weak pull-down of IOMUX 52 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xD0 7. " IOMUX_52_PU ,Weak pull-up of IOMUX 52 enable" "Disabled,Enabled"
|
|
bitfld.long 0xD0 5. " IOMUX_52_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xD0 3.--4. " IOMUX_52_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
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|
bitfld.long 0xD0 1.--2. " IOMUX_52_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xD0 0. " IOMUX_52_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xD4 "IOMUX_53_CR,Configures IOMUX 53"
|
|
bitfld.long 0xD4 9. " IOMUX_53_ST ,Schmitt Trigger of IOMUX 53 enable" "Disabled,Enabled"
|
|
bitfld.long 0xD4 8. " IOMUX_53_PD ,Weak pull-down of IOMUX 53 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xD4 7. " IOMUX_53_PU ,Weak pull-up of IOMUX 53 enable" "Disabled,Enabled"
|
|
bitfld.long 0xD4 5. " IOMUX_53_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xD4 3.--4. " IOMUX_53_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
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|
bitfld.long 0xD4 1.--2. " IOMUX_53_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xD4 0. " IOMUX_53_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xD8 "IOMUX_54_CR,Configures IOMUX 54"
|
|
bitfld.long 0xD8 9. " IOMUX_54_ST ,Schmitt Trigger of IOMUX 54 enable" "Disabled,Enabled"
|
|
bitfld.long 0xD8 8. " IOMUX_54_PD ,Weak pull-down of IOMUX 54 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xD8 7. " IOMUX_54_PU ,Weak pull-up of IOMUX 54 enable" "Disabled,Enabled"
|
|
bitfld.long 0xD8 5. " IOMUX_54_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xD8 3.--4. " IOMUX_54_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
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|
bitfld.long 0xD8 1.--2. " IOMUX_54_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xD8 0. " IOMUX_54_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xDC "IOMUX_55_CR,Configures IOMUX 55"
|
|
bitfld.long 0xDC 9. " IOMUX_55_ST ,Schmitt Trigger of IOMUX 55 enable" "Disabled,Enabled"
|
|
bitfld.long 0xDC 8. " IOMUX_55_PD ,Weak pull-down of IOMUX 55 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xDC 7. " IOMUX_55_PU ,Weak pull-up of IOMUX 55 enable" "Disabled,Enabled"
|
|
bitfld.long 0xDC 5. " IOMUX_55_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xDC 3.--4. " IOMUX_55_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
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bitfld.long 0xDC 1.--2. " IOMUX_55_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xDC 0. " IOMUX_55_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xE0 "IOMUX_56_CR,Configures IOMUX 56"
|
|
bitfld.long 0xE0 9. " IOMUX_56_ST ,Schmitt Trigger of IOMUX 56 enable" "Disabled,Enabled"
|
|
bitfld.long 0xE0 8. " IOMUX_56_PD ,Weak pull-down of IOMUX 56 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xE0 7. " IOMUX_56_PU ,Weak pull-up of IOMUX 56 enable" "Disabled,Enabled"
|
|
bitfld.long 0xE0 5. " IOMUX_56_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xE0 3.--4. " IOMUX_56_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
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|
bitfld.long 0xE0 1.--2. " IOMUX_56_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xE0 0. " IOMUX_56_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
group.long 0x200++0x4B
|
|
line.long 0x0 "IOMUX_64_CR,Configures IOMUX 64"
|
|
bitfld.long 0x0 9. " IOMUX_64_ST ,Schmitt Trigger of IOMUX 64 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 8. " IOMUX_64_PD ,Weak pull-down of IOMUX 64 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 7. " IOMUX_64_PU ,Weak pull-up of IOMUX 64 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " IOMUX_64_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " IOMUX_64_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x0 1.--2. " IOMUX_64_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x0 0. " IOMUX_64_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x4 "IOMUX_65_CR,Configures IOMUX 65"
|
|
bitfld.long 0x4 9. " IOMUX_65_ST ,Schmitt Trigger of IOMUX 65 enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 8. " IOMUX_65_PD ,Weak pull-down of IOMUX 65 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 7. " IOMUX_65_PU ,Weak pull-up of IOMUX 65 enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 5. " IOMUX_65_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x4 3.--4. " IOMUX_65_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
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|
bitfld.long 0x4 1.--2. " IOMUX_65_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x4 0. " IOMUX_65_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x8 "IOMUX_66_CR,Configures IOMUX 66"
|
|
bitfld.long 0x8 9. " IOMUX_66_ST ,Schmitt Trigger of IOMUX 66 enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 8. " IOMUX_66_PD ,Weak pull-down of IOMUX 66 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 7. " IOMUX_66_PU ,Weak pull-up of IOMUX 66 enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 5. " IOMUX_66_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x8 3.--4. " IOMUX_66_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x8 1.--2. " IOMUX_66_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x8 0. " IOMUX_66_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0xC "IOMUX_67_CR,Configures IOMUX 67"
|
|
bitfld.long 0xC 9. " IOMUX_67_ST ,Schmitt Trigger of IOMUX 67 enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 8. " IOMUX_67_PD ,Weak pull-down of IOMUX 67 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 7. " IOMUX_67_PU ,Weak pull-up of IOMUX 67 enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 5. " IOMUX_67_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0xC 3.--4. " IOMUX_67_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0xC 1.--2. " IOMUX_67_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0xC 0. " IOMUX_67_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x10 "IOMUX_68_CR,Configures IOMUX 68"
|
|
bitfld.long 0x10 9. " IOMUX_68_ST ,Schmitt Trigger of IOMUX 68 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " IOMUX_68_PD ,Weak pull-down of IOMUX 68 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " IOMUX_68_PU ,Weak pull-up of IOMUX 68 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 5. " IOMUX_68_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x10 3.--4. " IOMUX_68_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x10 1.--2. " IOMUX_68_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x10 0. " IOMUX_68_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x14 "IOMUX_69_CR,Configures IOMUX 69"
|
|
bitfld.long 0x14 9. " IOMUX_69_ST ,Schmitt Trigger of IOMUX 69 enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 8. " IOMUX_69_PD ,Weak pull-down of IOMUX 69 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 7. " IOMUX_69_PU ,Weak pull-up of IOMUX 69 enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 5. " IOMUX_69_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x14 3.--4. " IOMUX_69_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x14 1.--2. " IOMUX_69_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x14 0. " IOMUX_69_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x18 "IOMUX_70_CR,Configures IOMUX 70"
|
|
bitfld.long 0x18 9. " IOMUX_70_ST ,Schmitt Trigger of IOMUX 70 enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 8. " IOMUX_70_PD ,Weak pull-down of IOMUX 70 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 7. " IOMUX_70_PU ,Weak pull-up of IOMUX 70 enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 5. " IOMUX_70_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x18 3.--4. " IOMUX_70_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x18 1.--2. " IOMUX_70_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x18 0. " IOMUX_70_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x1C "IOMUX_71_CR,Configures IOMUX 71"
|
|
bitfld.long 0x1C 9. " IOMUX_71_ST ,Schmitt Trigger of IOMUX 71 enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 8. " IOMUX_71_PD ,Weak pull-down of IOMUX 71 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " IOMUX_71_PU ,Weak pull-up of IOMUX 71 enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 5. " IOMUX_71_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x1C 3.--4. " IOMUX_71_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x1C 1.--2. " IOMUX_71_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " IOMUX_71_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x20 "IOMUX_72_CR,Configures IOMUX 72"
|
|
bitfld.long 0x20 9. " IOMUX_72_ST ,Schmitt Trigger of IOMUX 72 enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 8. " IOMUX_72_PD ,Weak pull-down of IOMUX 72 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 7. " IOMUX_72_PU ,Weak pull-up of IOMUX 72 enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 5. " IOMUX_72_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x20 3.--4. " IOMUX_72_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x20 1.--2. " IOMUX_72_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x20 0. " IOMUX_72_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x24 "IOMUX_73_CR,Configures IOMUX 73"
|
|
bitfld.long 0x24 9. " IOMUX_73_ST ,Schmitt Trigger of IOMUX 73 enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 8. " IOMUX_73_PD ,Weak pull-down of IOMUX 73 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 7. " IOMUX_73_PU ,Weak pull-up of IOMUX 73 enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 5. " IOMUX_73_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x24 3.--4. " IOMUX_73_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x24 1.--2. " IOMUX_73_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x24 0. " IOMUX_73_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x28 "IOMUX_74_CR,Configures IOMUX 74"
|
|
bitfld.long 0x28 9. " IOMUX_74_ST ,Schmitt Trigger of IOMUX 74 enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 8. " IOMUX_74_PD ,Weak pull-down of IOMUX 74 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 7. " IOMUX_74_PU ,Weak pull-up of IOMUX 74 enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 5. " IOMUX_74_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x28 3.--4. " IOMUX_74_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x28 1.--2. " IOMUX_74_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x28 0. " IOMUX_74_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x2C "IOMUX_75_CR,Configures IOMUX 75"
|
|
bitfld.long 0x2C 9. " IOMUX_75_ST ,Schmitt Trigger of IOMUX 75 enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 8. " IOMUX_75_PD ,Weak pull-down of IOMUX 75 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 7. " IOMUX_75_PU ,Weak pull-up of IOMUX 75 enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 5. " IOMUX_75_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x2C 3.--4. " IOMUX_75_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x2C 1.--2. " IOMUX_75_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x2C 0. " IOMUX_75_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x30 "IOMUX_76_CR,Configures IOMUX 76"
|
|
bitfld.long 0x30 9. " IOMUX_76_ST ,Schmitt Trigger of IOMUX 76 enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 8. " IOMUX_76_PD ,Weak pull-down of IOMUX 76 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 7. " IOMUX_76_PU ,Weak pull-up of IOMUX 76 enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 5. " IOMUX_76_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x30 3.--4. " IOMUX_76_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x30 1.--2. " IOMUX_76_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x30 0. " IOMUX_76_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x34 "IOMUX_77_CR,Configures IOMUX 77"
|
|
bitfld.long 0x34 9. " IOMUX_77_ST ,Schmitt Trigger of IOMUX 77 enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 8. " IOMUX_77_PD ,Weak pull-down of IOMUX 77 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 7. " IOMUX_77_PU ,Weak pull-up of IOMUX 77 enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 5. " IOMUX_77_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x34 3.--4. " IOMUX_77_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x34 1.--2. " IOMUX_77_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x34 0. " IOMUX_77_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x38 "IOMUX_78_CR,Configures IOMUX 78"
|
|
bitfld.long 0x38 9. " IOMUX_78_ST ,Schmitt Trigger of IOMUX 78 enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 8. " IOMUX_78_PD ,Weak pull-down of IOMUX 78 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 7. " IOMUX_78_PU ,Weak pull-up of IOMUX 78 enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 5. " IOMUX_78_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x38 3.--4. " IOMUX_78_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x38 1.--2. " IOMUX_78_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x38 0. " IOMUX_78_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x3C "IOMUX_79_CR,Configures IOMUX 79"
|
|
bitfld.long 0x3C 9. " IOMUX_79_ST ,Schmitt Trigger of IOMUX 79 enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 8. " IOMUX_79_PD ,Weak pull-down of IOMUX 79 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 7. " IOMUX_79_PU ,Weak pull-up of IOMUX 79 enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 5. " IOMUX_79_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x3C 3.--4. " IOMUX_79_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x3C 1.--2. " IOMUX_79_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x3C 0. " IOMUX_79_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x40 "IOMUX_80_CR,Configures IOMUX 80"
|
|
bitfld.long 0x40 9. " IOMUX_80_ST ,Schmitt Trigger of IOMUX 80 enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 8. " IOMUX_80_PD ,Weak pull-down of IOMUX 80 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x40 7. " IOMUX_80_PU ,Weak pull-up of IOMUX 80 enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 5. " IOMUX_80_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x40 3.--4. " IOMUX_80_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x40 1.--2. " IOMUX_80_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x40 0. " IOMUX_80_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x44 "IOMUX_81_CR,Configures IOMUX 81"
|
|
bitfld.long 0x44 9. " IOMUX_81_ST ,Schmitt Trigger of IOMUX 81 enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 8. " IOMUX_81_PD ,Weak pull-down of IOMUX 81 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x44 7. " IOMUX_81_PU ,Weak pull-up of IOMUX 81 enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 5. " IOMUX_81_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x44 3.--4. " IOMUX_81_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x44 1.--2. " IOMUX_81_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x44 0. " IOMUX_81_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
line.long 0x48 "IOMUX_82_CR,Configures IOMUX 82"
|
|
bitfld.long 0x48 9. " IOMUX_82_ST ,Schmitt Trigger of IOMUX 82 enable" "Disabled,Enabled"
|
|
bitfld.long 0x48 8. " IOMUX_82_PD ,Weak pull-down of IOMUX 82 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x48 7. " IOMUX_82_PU ,Weak pull-up of IOMUX 82 enable" "Disabled,Enabled"
|
|
bitfld.long 0x48 5. " IOMUX_82_M3_S ,MUX M3 select" "IN_B=IO_I,IN_B=OUT_A"
|
|
textline " "
|
|
bitfld.long 0x48 3.--4. " IOMUX_82_M2_S[1:0] ,OMUX MUX M2 Configuration" "OE_A drives IO_OE,IO_OE driven to 0,OE_B drives IO_OE,IO_OE driven to 1"
|
|
bitfld.long 0x48 1.--2. " IOMUX_82_M1_S[1:0] ,IOMUX MUX M1 Configuration" "OUT_A drives IO_O,IO_O driven to 0,OUT_B drives IO_O,IO_O driven to 1"
|
|
textline " "
|
|
bitfld.long 0x48 0. " IOMUX_82_M0_S ,MUX M0 select" "IN_A=IO_I,IN_A=OUT_B"
|
|
tree.end
|
|
width 0xB
|
|
tree.end
|
|
tree "Peripheral DMA (PDMA)"
|
|
base ad:0x40004000
|
|
width 15.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "RATIO_HIGH_LOW,High priority versus low priority"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RATIOHILO ,High/low priority for DMA access opportunities"
|
|
line.long 0x04 "BUFFER_STATUS,Indicates when buffers have drained"
|
|
bitfld.long 0x04 15. " CH7BUFB ,CH_COMP_B is set nad if BUF_B_SEL is clear, then this bit is asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x04 14. " CH7BUFA ,CH_COMP_A is set nad if BUF_A_SEL is clear, then this bit is asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 13. " CH6BUFB ,CH_COMP_B is set nad if BUF_B_SEL is clear, then this bit is asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x04 12. " CH6BUFA ,CH_COMP_A is set nad if BUF_A_SEL is clear, then this bit is asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 11. " CH5BUFB ,CH_COMP_B is set nad if BUF_B_SEL is clear, then this bit is asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x04 10. " CH5BUFA ,CH_COMP_A is set nad if BUF_A_SEL is clear, then this bit is asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 9. " CH4BUFB ,CH_COMP_B is set nad if BUF_B_SEL is clear, then this bit is asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x04 8. " CH4BUFA ,CH_COMP_A is set nad if BUF_A_SEL is clear, then this bit is asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 7. " CH3BUFB ,CH_COMP_B is set nad if BUF_B_SEL is clear, then this bit is asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x04 6. " CH3BUFA ,CH_COMP_A is set nad if BUF_A_SEL is clear, then this bit is asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 5. " CH2BUFB ,CH_COMP_B is set nad if BUF_B_SEL is clear, then this bit is asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x04 4. " CH2BUFA ,CH_COMP_A is set nad if BUF_A_SEL is clear, then this bit is asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 3. " CH1BUFB ,CH_COMP_B is set nad if BUF_B_SEL is clear, then this bit is asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x04 2. " CH1BUFA ,CH_COMP_A is set nad if BUF_A_SEL is clear, then this bit is asserted" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CH0BUFB ,CH_COMP_B is set nad if BUF_B_SEL is clear, then this bit is asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x04 0. " CH0BUFA ,CH_COMP_A is set nad if BUF_A_SEL is clear, then this bit is asserted" "Not asserted,Asserted"
|
|
width 0xB
|
|
tree "DMA Ch0"
|
|
width 17.
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CH0_CONTROL,CHANNEL_0_CONTROL Register"
|
|
bitfld.long 0x00 23.--26. " PERIPHERAL_SEL ,Selects the peripheral assigned to this channel" "UART_0 receive to MSS,MSS to UART_0 transmit,UART_1 receive to MSS,MSS to UART_1 transmit,SPI_0 receive to MSS,MSS to SPI_0 transmit,SPI_1 receive to MSS,MSS to SPI_1 transmit,From to/from FPGA fabric DMAREADY1,From to/from FPGA fabric DMAREADY0,From MSS to the ACE,From the ACE to MSS,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 14.--21. 1. " WRITE_ADJ ,indicating the number of FCLK periods"
|
|
bitfld.long 0x00 12.--13. " DSTADDRINC ,This field controls the destination address increment for the DMA transfer" "0 byte,1 byte,2 bytes,4 bytes"
|
|
bitfld.long 0x00 10.--11. " SRCADDRINC ,This field controls the source address increment for the DMA transfer" "0 byte,1 byte,2 bytes,4 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HI_PRIORITY ,High priority enable" "Disable,Enable"
|
|
bitfld.long 0x00 8. " CLR_COMP_B ,Clears the CH_COMP_B" "Not cleared,Cleared"
|
|
bitfld.long 0x00 7. " CLR_COMP_A ,Clears the CH_COMP_A" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INTEN ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RESET ,Resets this channel" "No reset,Reset"
|
|
bitfld.long 0x00 4. " PAUSE ,Pauses the transfer for this channel" "No pause,Pause"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TRANSFER_SIZE ,This field determines the data width" "Byte,Half Word,Word,?..."
|
|
bitfld.long 0x00 1. " DIR ,Direct data transfer" "Peripheral to memory,Memory to peripheral"
|
|
bitfld.long 0x00 0. " PERIPHERAL_DMA ,Memory to memory mode enable" "Disabled,Enabled"
|
|
rgroup.long (0x20+0x04)++0x03
|
|
line.long 0x00 "CHANNEL_0_STATUS,Channel 0 status register"
|
|
bitfld.long 0x00 2. " BUF_SEL ,Buffer A/B select" "Buffer A,Buffer B"
|
|
bitfld.long 0x00 1. " CH_COMP_B ,Asserts when this channel completes its DMA" "Not completed,Completed"
|
|
bitfld.long 0x00 0. " CH_COMP_A ,Asserts when this channel completes its DMA" "Not completed,Completed"
|
|
group.long (0x20+0x08)++0x17
|
|
line.long 0x00 "CH0_BUFA_SRCADDR,Channel 0 buffer A source address"
|
|
line.long 0x04 "CH0_BUFA_DSTADDR,Channel 0 buffer A destination address"
|
|
line.long 0x08 "CH0_BUFA_TRCOUNT,Channel 0 buffer A transfer count"
|
|
hexmask.long.word 0x08 0.--15. 1. " BUF_A_COUNT ,Buffer A transfer count"
|
|
line.long 0x0C "CH0_BUFB_SRCADDR,Channel 0 buffer B source address"
|
|
line.long 0x10 "CH0_BUFB_DSTADDR,Channel 0 buffer B destination address"
|
|
line.long 0x14 "CH0_BUFB_TRCOUNT,Channel 0 buffer B transfer count"
|
|
hexmask.long.word 0x14 0.--15. 1. " BUF_B_COUNT ,Buffer B transfer count"
|
|
width 0xB
|
|
tree.end
|
|
tree "DMA Ch1"
|
|
width 17.
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CH1_CONTROL,CHANNEL_1_CONTROL Register"
|
|
bitfld.long 0x00 23.--26. " PERIPHERAL_SEL ,Selects the peripheral assigned to this channel" "UART_0 receive to MSS,MSS to UART_0 transmit,UART_1 receive to MSS,MSS to UART_1 transmit,SPI_0 receive to MSS,MSS to SPI_0 transmit,SPI_1 receive to MSS,MSS to SPI_1 transmit,From to/from FPGA fabric DMAREADY1,From to/from FPGA fabric DMAREADY0,From MSS to the ACE,From the ACE to MSS,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 14.--21. 1. " WRITE_ADJ ,indicating the number of FCLK periods"
|
|
bitfld.long 0x00 12.--13. " DSTADDRINC ,This field controls the destination address increment for the DMA transfer" "0 byte,1 byte,2 bytes,4 bytes"
|
|
bitfld.long 0x00 10.--11. " SRCADDRINC ,This field controls the source address increment for the DMA transfer" "0 byte,1 byte,2 bytes,4 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HI_PRIORITY ,High priority enable" "Disable,Enable"
|
|
bitfld.long 0x00 8. " CLR_COMP_B ,Clears the CH_COMP_B" "Not cleared,Cleared"
|
|
bitfld.long 0x00 7. " CLR_COMP_A ,Clears the CH_COMP_A" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INTEN ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RESET ,Resets this channel" "No reset,Reset"
|
|
bitfld.long 0x00 4. " PAUSE ,Pauses the transfer for this channel" "No pause,Pause"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TRANSFER_SIZE ,This field determines the data width" "Byte,Half Word,Word,?..."
|
|
bitfld.long 0x00 1. " DIR ,Direct data transfer" "Peripheral to memory,Memory to peripheral"
|
|
bitfld.long 0x00 0. " PERIPHERAL_DMA ,Memory to memory mode enable" "Disabled,Enabled"
|
|
rgroup.long (0x40+0x04)++0x03
|
|
line.long 0x00 "CHANNEL_1_STATUS,Channel 1 status register"
|
|
bitfld.long 0x00 2. " BUF_SEL ,Buffer A/B select" "Buffer A,Buffer B"
|
|
bitfld.long 0x00 1. " CH_COMP_B ,Asserts when this channel completes its DMA" "Not completed,Completed"
|
|
bitfld.long 0x00 0. " CH_COMP_A ,Asserts when this channel completes its DMA" "Not completed,Completed"
|
|
group.long (0x40+0x08)++0x17
|
|
line.long 0x00 "CH1_BUFA_SRCADDR,Channel 1 buffer A source address"
|
|
line.long 0x04 "CH1_BUFA_DSTADDR,Channel 1 buffer A destination address"
|
|
line.long 0x08 "CH1_BUFA_TRCOUNT,Channel 1 buffer A transfer count"
|
|
hexmask.long.word 0x08 0.--15. 1. " BUF_A_COUNT ,Buffer A transfer count"
|
|
line.long 0x0C "CH1_BUFB_SRCADDR,Channel 1 buffer B source address"
|
|
line.long 0x10 "CH1_BUFB_DSTADDR,Channel 1 buffer B destination address"
|
|
line.long 0x14 "CH1_BUFB_TRCOUNT,Channel 1 buffer B transfer count"
|
|
hexmask.long.word 0x14 0.--15. 1. " BUF_B_COUNT ,Buffer B transfer count"
|
|
width 0xB
|
|
tree.end
|
|
tree "DMA Ch2"
|
|
width 17.
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "CH2_CONTROL,CHANNEL_2_CONTROL Register"
|
|
bitfld.long 0x00 23.--26. " PERIPHERAL_SEL ,Selects the peripheral assigned to this channel" "UART_0 receive to MSS,MSS to UART_0 transmit,UART_1 receive to MSS,MSS to UART_1 transmit,SPI_0 receive to MSS,MSS to SPI_0 transmit,SPI_1 receive to MSS,MSS to SPI_1 transmit,From to/from FPGA fabric DMAREADY1,From to/from FPGA fabric DMAREADY0,From MSS to the ACE,From the ACE to MSS,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 14.--21. 1. " WRITE_ADJ ,indicating the number of FCLK periods"
|
|
bitfld.long 0x00 12.--13. " DSTADDRINC ,This field controls the destination address increment for the DMA transfer" "0 byte,1 byte,2 bytes,4 bytes"
|
|
bitfld.long 0x00 10.--11. " SRCADDRINC ,This field controls the source address increment for the DMA transfer" "0 byte,1 byte,2 bytes,4 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HI_PRIORITY ,High priority enable" "Disable,Enable"
|
|
bitfld.long 0x00 8. " CLR_COMP_B ,Clears the CH_COMP_B" "Not cleared,Cleared"
|
|
bitfld.long 0x00 7. " CLR_COMP_A ,Clears the CH_COMP_A" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INTEN ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RESET ,Resets this channel" "No reset,Reset"
|
|
bitfld.long 0x00 4. " PAUSE ,Pauses the transfer for this channel" "No pause,Pause"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TRANSFER_SIZE ,This field determines the data width" "Byte,Half Word,Word,?..."
|
|
bitfld.long 0x00 1. " DIR ,Direct data transfer" "Peripheral to memory,Memory to peripheral"
|
|
bitfld.long 0x00 0. " PERIPHERAL_DMA ,Memory to memory mode enable" "Disabled,Enabled"
|
|
rgroup.long (0x60+0x04)++0x03
|
|
line.long 0x00 "CHANNEL_2_STATUS,Channel 2 status register"
|
|
bitfld.long 0x00 2. " BUF_SEL ,Buffer A/B select" "Buffer A,Buffer B"
|
|
bitfld.long 0x00 1. " CH_COMP_B ,Asserts when this channel completes its DMA" "Not completed,Completed"
|
|
bitfld.long 0x00 0. " CH_COMP_A ,Asserts when this channel completes its DMA" "Not completed,Completed"
|
|
group.long (0x60+0x08)++0x17
|
|
line.long 0x00 "CH2_BUFA_SRCADDR,Channel 2 buffer A source address"
|
|
line.long 0x04 "CH2_BUFA_DSTADDR,Channel 2 buffer A destination address"
|
|
line.long 0x08 "CH2_BUFA_TRCOUNT,Channel 2 buffer A transfer count"
|
|
hexmask.long.word 0x08 0.--15. 1. " BUF_A_COUNT ,Buffer A transfer count"
|
|
line.long 0x0C "CH2_BUFB_SRCADDR,Channel 2 buffer B source address"
|
|
line.long 0x10 "CH2_BUFB_DSTADDR,Channel 2 buffer B destination address"
|
|
line.long 0x14 "CH2_BUFB_TRCOUNT,Channel 2 buffer B transfer count"
|
|
hexmask.long.word 0x14 0.--15. 1. " BUF_B_COUNT ,Buffer B transfer count"
|
|
width 0xB
|
|
tree.end
|
|
tree "DMA Ch3"
|
|
width 17.
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "CH3_CONTROL,CHANNEL_3_CONTROL Register"
|
|
bitfld.long 0x00 23.--26. " PERIPHERAL_SEL ,Selects the peripheral assigned to this channel" "UART_0 receive to MSS,MSS to UART_0 transmit,UART_1 receive to MSS,MSS to UART_1 transmit,SPI_0 receive to MSS,MSS to SPI_0 transmit,SPI_1 receive to MSS,MSS to SPI_1 transmit,From to/from FPGA fabric DMAREADY1,From to/from FPGA fabric DMAREADY0,From MSS to the ACE,From the ACE to MSS,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 14.--21. 1. " WRITE_ADJ ,indicating the number of FCLK periods"
|
|
bitfld.long 0x00 12.--13. " DSTADDRINC ,This field controls the destination address increment for the DMA transfer" "0 byte,1 byte,2 bytes,4 bytes"
|
|
bitfld.long 0x00 10.--11. " SRCADDRINC ,This field controls the source address increment for the DMA transfer" "0 byte,1 byte,2 bytes,4 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HI_PRIORITY ,High priority enable" "Disable,Enable"
|
|
bitfld.long 0x00 8. " CLR_COMP_B ,Clears the CH_COMP_B" "Not cleared,Cleared"
|
|
bitfld.long 0x00 7. " CLR_COMP_A ,Clears the CH_COMP_A" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INTEN ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RESET ,Resets this channel" "No reset,Reset"
|
|
bitfld.long 0x00 4. " PAUSE ,Pauses the transfer for this channel" "No pause,Pause"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TRANSFER_SIZE ,This field determines the data width" "Byte,Half Word,Word,?..."
|
|
bitfld.long 0x00 1. " DIR ,Direct data transfer" "Peripheral to memory,Memory to peripheral"
|
|
bitfld.long 0x00 0. " PERIPHERAL_DMA ,Memory to memory mode enable" "Disabled,Enabled"
|
|
rgroup.long (0x80+0x04)++0x03
|
|
line.long 0x00 "CHANNEL_3_STATUS,Channel 3 status register"
|
|
bitfld.long 0x00 2. " BUF_SEL ,Buffer A/B select" "Buffer A,Buffer B"
|
|
bitfld.long 0x00 1. " CH_COMP_B ,Asserts when this channel completes its DMA" "Not completed,Completed"
|
|
bitfld.long 0x00 0. " CH_COMP_A ,Asserts when this channel completes its DMA" "Not completed,Completed"
|
|
group.long (0x80+0x08)++0x17
|
|
line.long 0x00 "CH3_BUFA_SRCADDR,Channel 3 buffer A source address"
|
|
line.long 0x04 "CH3_BUFA_DSTADDR,Channel 3 buffer A destination address"
|
|
line.long 0x08 "CH3_BUFA_TRCOUNT,Channel 3 buffer A transfer count"
|
|
hexmask.long.word 0x08 0.--15. 1. " BUF_A_COUNT ,Buffer A transfer count"
|
|
line.long 0x0C "CH3_BUFB_SRCADDR,Channel 3 buffer B source address"
|
|
line.long 0x10 "CH3_BUFB_DSTADDR,Channel 3 buffer B destination address"
|
|
line.long 0x14 "CH3_BUFB_TRCOUNT,Channel 3 buffer B transfer count"
|
|
hexmask.long.word 0x14 0.--15. 1. " BUF_B_COUNT ,Buffer B transfer count"
|
|
width 0xB
|
|
tree.end
|
|
tree "DMA Ch4"
|
|
width 17.
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "CH4_CONTROL,CHANNEL_4_CONTROL Register"
|
|
bitfld.long 0x00 23.--26. " PERIPHERAL_SEL ,Selects the peripheral assigned to this channel" "UART_0 receive to MSS,MSS to UART_0 transmit,UART_1 receive to MSS,MSS to UART_1 transmit,SPI_0 receive to MSS,MSS to SPI_0 transmit,SPI_1 receive to MSS,MSS to SPI_1 transmit,From to/from FPGA fabric DMAREADY1,From to/from FPGA fabric DMAREADY0,From MSS to the ACE,From the ACE to MSS,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 14.--21. 1. " WRITE_ADJ ,indicating the number of FCLK periods"
|
|
bitfld.long 0x00 12.--13. " DSTADDRINC ,This field controls the destination address increment for the DMA transfer" "0 byte,1 byte,2 bytes,4 bytes"
|
|
bitfld.long 0x00 10.--11. " SRCADDRINC ,This field controls the source address increment for the DMA transfer" "0 byte,1 byte,2 bytes,4 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HI_PRIORITY ,High priority enable" "Disable,Enable"
|
|
bitfld.long 0x00 8. " CLR_COMP_B ,Clears the CH_COMP_B" "Not cleared,Cleared"
|
|
bitfld.long 0x00 7. " CLR_COMP_A ,Clears the CH_COMP_A" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INTEN ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RESET ,Resets this channel" "No reset,Reset"
|
|
bitfld.long 0x00 4. " PAUSE ,Pauses the transfer for this channel" "No pause,Pause"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TRANSFER_SIZE ,This field determines the data width" "Byte,Half Word,Word,?..."
|
|
bitfld.long 0x00 1. " DIR ,Direct data transfer" "Peripheral to memory,Memory to peripheral"
|
|
bitfld.long 0x00 0. " PERIPHERAL_DMA ,Memory to memory mode enable" "Disabled,Enabled"
|
|
rgroup.long (0xA0+0x04)++0x03
|
|
line.long 0x00 "CHANNEL_4_STATUS,Channel 4 status register"
|
|
bitfld.long 0x00 2. " BUF_SEL ,Buffer A/B select" "Buffer A,Buffer B"
|
|
bitfld.long 0x00 1. " CH_COMP_B ,Asserts when this channel completes its DMA" "Not completed,Completed"
|
|
bitfld.long 0x00 0. " CH_COMP_A ,Asserts when this channel completes its DMA" "Not completed,Completed"
|
|
group.long (0xA0+0x08)++0x17
|
|
line.long 0x00 "CH4_BUFA_SRCADDR,Channel 4 buffer A source address"
|
|
line.long 0x04 "CH4_BUFA_DSTADDR,Channel 4 buffer A destination address"
|
|
line.long 0x08 "CH4_BUFA_TRCOUNT,Channel 4 buffer A transfer count"
|
|
hexmask.long.word 0x08 0.--15. 1. " BUF_A_COUNT ,Buffer A transfer count"
|
|
line.long 0x0C "CH4_BUFB_SRCADDR,Channel 4 buffer B source address"
|
|
line.long 0x10 "CH4_BUFB_DSTADDR,Channel 4 buffer B destination address"
|
|
line.long 0x14 "CH4_BUFB_TRCOUNT,Channel 4 buffer B transfer count"
|
|
hexmask.long.word 0x14 0.--15. 1. " BUF_B_COUNT ,Buffer B transfer count"
|
|
width 0xB
|
|
tree.end
|
|
tree "DMA Ch5"
|
|
width 17.
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "CH5_CONTROL,CHANNEL_5_CONTROL Register"
|
|
bitfld.long 0x00 23.--26. " PERIPHERAL_SEL ,Selects the peripheral assigned to this channel" "UART_0 receive to MSS,MSS to UART_0 transmit,UART_1 receive to MSS,MSS to UART_1 transmit,SPI_0 receive to MSS,MSS to SPI_0 transmit,SPI_1 receive to MSS,MSS to SPI_1 transmit,From to/from FPGA fabric DMAREADY1,From to/from FPGA fabric DMAREADY0,From MSS to the ACE,From the ACE to MSS,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 14.--21. 1. " WRITE_ADJ ,indicating the number of FCLK periods"
|
|
bitfld.long 0x00 12.--13. " DSTADDRINC ,This field controls the destination address increment for the DMA transfer" "0 byte,1 byte,2 bytes,4 bytes"
|
|
bitfld.long 0x00 10.--11. " SRCADDRINC ,This field controls the source address increment for the DMA transfer" "0 byte,1 byte,2 bytes,4 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HI_PRIORITY ,High priority enable" "Disable,Enable"
|
|
bitfld.long 0x00 8. " CLR_COMP_B ,Clears the CH_COMP_B" "Not cleared,Cleared"
|
|
bitfld.long 0x00 7. " CLR_COMP_A ,Clears the CH_COMP_A" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INTEN ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RESET ,Resets this channel" "No reset,Reset"
|
|
bitfld.long 0x00 4. " PAUSE ,Pauses the transfer for this channel" "No pause,Pause"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TRANSFER_SIZE ,This field determines the data width" "Byte,Half Word,Word,?..."
|
|
bitfld.long 0x00 1. " DIR ,Direct data transfer" "Peripheral to memory,Memory to peripheral"
|
|
bitfld.long 0x00 0. " PERIPHERAL_DMA ,Memory to memory mode enable" "Disabled,Enabled"
|
|
rgroup.long (0xC0+0x04)++0x03
|
|
line.long 0x00 "CHANNEL_5_STATUS,Channel 5 status register"
|
|
bitfld.long 0x00 2. " BUF_SEL ,Buffer A/B select" "Buffer A,Buffer B"
|
|
bitfld.long 0x00 1. " CH_COMP_B ,Asserts when this channel completes its DMA" "Not completed,Completed"
|
|
bitfld.long 0x00 0. " CH_COMP_A ,Asserts when this channel completes its DMA" "Not completed,Completed"
|
|
group.long (0xC0+0x08)++0x17
|
|
line.long 0x00 "CH5_BUFA_SRCADDR,Channel 5 buffer A source address"
|
|
line.long 0x04 "CH5_BUFA_DSTADDR,Channel 5 buffer A destination address"
|
|
line.long 0x08 "CH5_BUFA_TRCOUNT,Channel 5 buffer A transfer count"
|
|
hexmask.long.word 0x08 0.--15. 1. " BUF_A_COUNT ,Buffer A transfer count"
|
|
line.long 0x0C "CH5_BUFB_SRCADDR,Channel 5 buffer B source address"
|
|
line.long 0x10 "CH5_BUFB_DSTADDR,Channel 5 buffer B destination address"
|
|
line.long 0x14 "CH5_BUFB_TRCOUNT,Channel 5 buffer B transfer count"
|
|
hexmask.long.word 0x14 0.--15. 1. " BUF_B_COUNT ,Buffer B transfer count"
|
|
width 0xB
|
|
tree.end
|
|
tree "DMA Ch6"
|
|
width 17.
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "CH6_CONTROL,CHANNEL_6_CONTROL Register"
|
|
bitfld.long 0x00 23.--26. " PERIPHERAL_SEL ,Selects the peripheral assigned to this channel" "UART_0 receive to MSS,MSS to UART_0 transmit,UART_1 receive to MSS,MSS to UART_1 transmit,SPI_0 receive to MSS,MSS to SPI_0 transmit,SPI_1 receive to MSS,MSS to SPI_1 transmit,From to/from FPGA fabric DMAREADY1,From to/from FPGA fabric DMAREADY0,From MSS to the ACE,From the ACE to MSS,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 14.--21. 1. " WRITE_ADJ ,indicating the number of FCLK periods"
|
|
bitfld.long 0x00 12.--13. " DSTADDRINC ,This field controls the destination address increment for the DMA transfer" "0 byte,1 byte,2 bytes,4 bytes"
|
|
bitfld.long 0x00 10.--11. " SRCADDRINC ,This field controls the source address increment for the DMA transfer" "0 byte,1 byte,2 bytes,4 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HI_PRIORITY ,High priority enable" "Disable,Enable"
|
|
bitfld.long 0x00 8. " CLR_COMP_B ,Clears the CH_COMP_B" "Not cleared,Cleared"
|
|
bitfld.long 0x00 7. " CLR_COMP_A ,Clears the CH_COMP_A" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INTEN ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RESET ,Resets this channel" "No reset,Reset"
|
|
bitfld.long 0x00 4. " PAUSE ,Pauses the transfer for this channel" "No pause,Pause"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TRANSFER_SIZE ,This field determines the data width" "Byte,Half Word,Word,?..."
|
|
bitfld.long 0x00 1. " DIR ,Direct data transfer" "Peripheral to memory,Memory to peripheral"
|
|
bitfld.long 0x00 0. " PERIPHERAL_DMA ,Memory to memory mode enable" "Disabled,Enabled"
|
|
rgroup.long (0xE0+0x04)++0x03
|
|
line.long 0x00 "CHANNEL_6_STATUS,Channel 6 status register"
|
|
bitfld.long 0x00 2. " BUF_SEL ,Buffer A/B select" "Buffer A,Buffer B"
|
|
bitfld.long 0x00 1. " CH_COMP_B ,Asserts when this channel completes its DMA" "Not completed,Completed"
|
|
bitfld.long 0x00 0. " CH_COMP_A ,Asserts when this channel completes its DMA" "Not completed,Completed"
|
|
group.long (0xE0+0x08)++0x17
|
|
line.long 0x00 "CH6_BUFA_SRCADDR,Channel 6 buffer A source address"
|
|
line.long 0x04 "CH6_BUFA_DSTADDR,Channel 6 buffer A destination address"
|
|
line.long 0x08 "CH6_BUFA_TRCOUNT,Channel 6 buffer A transfer count"
|
|
hexmask.long.word 0x08 0.--15. 1. " BUF_A_COUNT ,Buffer A transfer count"
|
|
line.long 0x0C "CH6_BUFB_SRCADDR,Channel 6 buffer B source address"
|
|
line.long 0x10 "CH6_BUFB_DSTADDR,Channel 6 buffer B destination address"
|
|
line.long 0x14 "CH6_BUFB_TRCOUNT,Channel 6 buffer B transfer count"
|
|
hexmask.long.word 0x14 0.--15. 1. " BUF_B_COUNT ,Buffer B transfer count"
|
|
width 0xB
|
|
tree.end
|
|
tree "DMA Ch7"
|
|
width 17.
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "CH7_CONTROL,CHANNEL_7_CONTROL Register"
|
|
bitfld.long 0x00 23.--26. " PERIPHERAL_SEL ,Selects the peripheral assigned to this channel" "UART_0 receive to MSS,MSS to UART_0 transmit,UART_1 receive to MSS,MSS to UART_1 transmit,SPI_0 receive to MSS,MSS to SPI_0 transmit,SPI_1 receive to MSS,MSS to SPI_1 transmit,From to/from FPGA fabric DMAREADY1,From to/from FPGA fabric DMAREADY0,From MSS to the ACE,From the ACE to MSS,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 14.--21. 1. " WRITE_ADJ ,indicating the number of FCLK periods"
|
|
bitfld.long 0x00 12.--13. " DSTADDRINC ,This field controls the destination address increment for the DMA transfer" "0 byte,1 byte,2 bytes,4 bytes"
|
|
bitfld.long 0x00 10.--11. " SRCADDRINC ,This field controls the source address increment for the DMA transfer" "0 byte,1 byte,2 bytes,4 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HI_PRIORITY ,High priority enable" "Disable,Enable"
|
|
bitfld.long 0x00 8. " CLR_COMP_B ,Clears the CH_COMP_B" "Not cleared,Cleared"
|
|
bitfld.long 0x00 7. " CLR_COMP_A ,Clears the CH_COMP_A" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INTEN ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RESET ,Resets this channel" "No reset,Reset"
|
|
bitfld.long 0x00 4. " PAUSE ,Pauses the transfer for this channel" "No pause,Pause"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TRANSFER_SIZE ,This field determines the data width" "Byte,Half Word,Word,?..."
|
|
bitfld.long 0x00 1. " DIR ,Direct data transfer" "Peripheral to memory,Memory to peripheral"
|
|
bitfld.long 0x00 0. " PERIPHERAL_DMA ,Memory to memory mode enable" "Disabled,Enabled"
|
|
rgroup.long (0x100+0x04)++0x03
|
|
line.long 0x00 "CHANNEL_7_STATUS,Channel 7 status register"
|
|
bitfld.long 0x00 2. " BUF_SEL ,Buffer A/B select" "Buffer A,Buffer B"
|
|
bitfld.long 0x00 1. " CH_COMP_B ,Asserts when this channel completes its DMA" "Not completed,Completed"
|
|
bitfld.long 0x00 0. " CH_COMP_A ,Asserts when this channel completes its DMA" "Not completed,Completed"
|
|
group.long (0x100+0x08)++0x17
|
|
line.long 0x00 "CH7_BUFA_SRCADDR,Channel 7 buffer A source address"
|
|
line.long 0x04 "CH7_BUFA_DSTADDR,Channel 7 buffer A destination address"
|
|
line.long 0x08 "CH7_BUFA_TRCOUNT,Channel 7 buffer A transfer count"
|
|
hexmask.long.word 0x08 0.--15. 1. " BUF_A_COUNT ,Buffer A transfer count"
|
|
line.long 0x0C "CH7_BUFB_SRCADDR,Channel 7 buffer B source address"
|
|
line.long 0x10 "CH7_BUFB_DSTADDR,Channel 7 buffer B destination address"
|
|
line.long 0x14 "CH7_BUFB_TRCOUNT,Channel 7 buffer B transfer count"
|
|
hexmask.long.word 0x14 0.--15. 1. " BUF_B_COUNT ,Buffer B transfer count"
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree "Embedded Nonvolatile Memory Controller (eNVM)"
|
|
base ad:0x60100000
|
|
width 17.
|
|
group.long 0x00++0x0B
|
|
line.long 0x00 "STATUS_REG,Envm status register"
|
|
eventfld.long 0x00 31. " ILLEGAL_CMD_1 ,Illegal command has been issued to ENVM_1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " ENVM_STATUS_1 ,These bits provide status information from ENVM_1" "Any Command,ARRAY_READ/ARRAY_WRITE/UNPROTECT_PAGE/PROGRAM_PAGE/ERASE_PAGE/OVERWRITE_PAGE,ARRAY_READ/UNPROTECT_PAGE/PROGRAM_PAGE/PROGRAM_PAGE_PROTECTED/ERASE_PAGE/ERASE_PAGE_PROTECTED/OVERWRITE_PAGE,ARRAY_WRITE/UNPROTECT_PAGE/PROGRAM_PAGE/PROGRAM_PAGE_PROTECTED/ERASE_PAGE/ERASE_PAGE_PROTECTED/OVERWRITE_PAGE"
|
|
textline " "
|
|
eventfld.long 0x00 23. " OP_DONE_1 ,ENVM_1 Operation done" "Not occurred,Occurred"
|
|
eventfld.long 0x00 22. " ECC2_ERROR_1 ,ENVM_1 ECC2 error" "No error,Erorr"
|
|
eventfld.long 0x00 21. " ECC1_ERROR_1 ,ENVM_1 ECC1 error" "No error,Erorr"
|
|
textline " "
|
|
eventfld.long 0x00 20. " OVER_THRESH_1 ,ENVM_1 accesse page Over threshold" "Not occurred,Occurred"
|
|
eventfld.long 0x00 19. " ERASE_ERROR_1 ,ENVM_1 reported an erase error" "No error,Erorr"
|
|
eventfld.long 0x00 18. " PROG_ERROR_1 ,ENVM_1 reported a programming error" "No error,Erorr"
|
|
textline " "
|
|
eventfld.long 0x00 17. " PROT_ERROR_1 ,ENVM_1 reported a protection error" "No error,Erorr"
|
|
bitfld.long 0x00 16. " BUSY_1 ,ENVM_1 ready/ busy" "Ready,Busy"
|
|
eventfld.long 0x00 15. " ILLEGAL_CMD_0 ,Illegal command has been issued to ENVM_0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " ENVM_STATUS_0 ,These bits provide status information from ENVM_0" "Any Command,ARRAY_READ/ARRAY_WRITE/UNPROTECT_PAGE/PROGRAM_PAGE/ERASE_PAGE/OVERWRITE_PAGE,ARRAY_READ/UNPROTECT_PAGE/PROGRAM_PAGE/PROGRAM_PAGE_PROTECTED/ERASE_PAGE/ERASE_PAGE_PROTECTED/OVERWRITE_PAGE,ARRAY_WRITE/UNPROTECT_PAGE/PROGRAM_PAGE/PROGRAM_PAGE_PROTECTED/ERASE_PAGE/ERASE_PAGE_PROTECTED/OVERWRITE_PAGE"
|
|
textline " "
|
|
eventfld.long 0x00 7. " OP_DONE_0 ,ENVM_0 Operation done" "Not occurred,Occurred"
|
|
eventfld.long 0x00 6. " ECC2_ERROR_0 ,ENVM_0 ECC2 error" "No error,Erorr"
|
|
eventfld.long 0x00 5. " ECC1_ERROR_0 ,ENVM_1 ECC1 error" "No error,Erorr"
|
|
textline " "
|
|
eventfld.long 0x00 4. " OVER_THRESH_0 ,ENVM_0 accesse page Over threshold" "Not occurred,Occurred"
|
|
eventfld.long 0x00 3. " ERASE_ERROR_0 ,ENVM_0 reported an erase error" "No error,Erorr"
|
|
eventfld.long 0x00 2. " PROG_ERROR_0 ,ENVM_0 reported a programming error" "No error,Erorr"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PROT_ERROR_0 ,ENVM_0 reported a protection error" "No error,Erorr"
|
|
bitfld.long 0x00 0. " BUSY_0 ,ENVM_0 ready/ busy" "Ready,Busy"
|
|
line.long 0x04 "CONTROL_REG,Envm control register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " COMMAND ,the command to be executed by the eNVM"
|
|
hexmask.long.tbyte 0x04 0.--19. 1. " PAGE_ADDRESS ,This field contains the page address"
|
|
line.long 0x08 "ENABLE_REG,Envm interrupt enable register"
|
|
bitfld.long 0x08 31. " ILLEGAL_CMD_1 ,Illegal command interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " OP_DONE_1 ,Operation done interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " ECC2_ERROR_1 ,ECC2 error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 21. " ECC1_ERROR_1 ,ECC1 error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " OVER_THRESH_1 ,over threshold error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 19. " ERASE_ERROR_1 ,Erasing errors interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 18. " PROG_ERROR_1 ,Programming errors interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " PROT_ERROR_1 ,Protection errors interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " ILLEGAL_CMD_0 ,Illegal command interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " OP_DONE_0 ,Operation done interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " ECC2_ERROR_0 ,ECC2 error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " ECC1_ERROR_0 ,ECC1 error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " OVER_THRESH_0 ,over threshold error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " ERASE_ERROR_0 ,Erasing errors interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " PROG_ERROR_0 ,Programming errors interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " PROT_ERROR_0 ,Protection errors interrupt enable" "Disabled,Enabled"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "ENVM_0_CR,Envm_0 configuration register"
|
|
bitfld.long 0x00 2. " LOCK ,Give access to the eNVM from the JTAG interface" "Disabled,eNVM disabled from JTAG access"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PAGE_LOSS ,Page loss protection enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " READ_NEXT ,Read next command enable" "Disabled,Enabled"
|
|
line.long 0x04 "ENVM_1_CR,Envm_1 configuration register"
|
|
bitfld.long 0x04 2. " LOCK ,Give access to the eNVM from the JTAG interface" "Disabled,eNVM disabled from JTAG access"
|
|
textline " "
|
|
bitfld.long 0x04 1. " PAGE_LOSS ,Page loss protection enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " READ_NEXT ,Read next command enable" "Disabled,Enabled"
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "PAGE_STAT_0_REG,Envm_0 page status register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. " WRITE_COUNT ,Page write count"
|
|
bitfld.long 0x00 3. " OVERTHRES ,Page is under/over threshold" "Under threshold,Over threshold"
|
|
textline " "
|
|
bitfld.long 0x00 2. " READ_PROT ,Read protect" "Not protected,Protected"
|
|
bitfld.long 0x00 1. " WRITE_PROT ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x00 0. " OVERWRITE_PROT ,Overwrite protect" "Not protected,Protected"
|
|
line.long 0x04 "PAGE_STAT_1_REG,Envm_1 page status register"
|
|
hexmask.long.tbyte 0x04 8.--31. 1. " WRITE_COUNT ,Page write count"
|
|
bitfld.long 0x04 3. " OVERTHRES ,Page is under/over threshold" "Under threshold,Over threshold"
|
|
textline " "
|
|
bitfld.long 0x04 2. " READ_PROT ,Read protect" "Not protected,Protected"
|
|
bitfld.long 0x04 1. " WRITE_PROT ,Write protect" "Not protected,Protected"
|
|
bitfld.long 0x04 0. " OVERWRITE_PROT ,Overwrite protect" "Not protected,Protected"
|
|
width 0xB
|
|
tree.end
|
|
tree "Watchdog Timer"
|
|
base ad:0x40060000
|
|
width 14.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "WDOGVALUE,Current value of counter"
|
|
group.long 0x04++0x07
|
|
line.long 0x00 "WDOGLOAD,Load value for counter"
|
|
line.long 0x04 "WDOGMVRP,Maximum value for which refreshing is permitted"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "WDOGREFRESH,Causes the counter to be refreshed with the value in the WDOGLOAD register"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "WDOGENABLE,Watchdog enable register"
|
|
hexmask.long 0x00 1.--31. 1. " DISABLE_KEY ,Value 0x4C6E55FA clear ENABLE bit"
|
|
bitfld.long 0x00 0. " ENABLE ,Watchdog enable" "Disabled,Enabled"
|
|
line.long 0x04 "WDOGCONTROL,Control register"
|
|
bitfld.long 0x04 2. " MODE ,Watchdog mode of operation" "Reset generated,Interrupt generated"
|
|
textline " "
|
|
bitfld.long 0x04 1. " TIMEOUTINTEN ,Time out interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " WAKEUPINTEN ,Wake up interrupt enable" "Disabled,Enabled"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "WDOGSTATUS,Watchdog status register"
|
|
bitfld.long 0x00 0. " REFRESHSTATUS ,Watchdog freshing status" "Interrupt/Reset,No interrupt/No reset"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "WDOGRIS,Raw interrupt status"
|
|
eventfld.long 0x00 1. " TIMEOUTRS ,Raw Status of the WDOGTIMEOUTINT interrupt" "0,1"
|
|
eventfld.long 0x00 0. " WAKEUPRS ,Raw Status of the WDOGWAKEUPINT interrupt" "0,1"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "WDOGMIS,Masked interrupt status"
|
|
bitfld.long 0x00 1. " TIMEOUTMS ,Status of the WDOGTIMEOUTINT interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " WAKEUPMS ,Status of the WDOGWAKEUPINT interrupt" "Not masked,Masked"
|
|
width 0xB
|
|
tree.end
|
|
sif (CPU()!="A2F060")
|
|
tree "Ethernet MAC"
|
|
base ad:0x40003000
|
|
width 7.
|
|
if (((d.l(ad:0x40003000))&0x200000)==0x200000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CSR0,Bus mode"
|
|
bitfld.long 0x00 21. " SPD ,Clock frequency selection" "2.5 MHz,25 MHz"
|
|
bitfld.long 0x00 20. " DBO ,Descriptor byte ordering mode" "Little,Big"
|
|
bitfld.long 0x00 17.--19. " TAP ,Transmit automatic polling" "TAP disabled,82.56 us,247.68 us,577.92 us,5.16 us,10.32 us,15.48 us,41.28 us"
|
|
textline " "
|
|
bitfld.long 0x00 8.--13. " PBL ,Programmable burst length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 7. " BLE ,Big/little endian" "Little,Big"
|
|
bitfld.long 0x00 2.--6. " DSL ,Descriptor skip length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BAR ,Bus arbitration scheme" "Intelligent arbitration,Equal priority"
|
|
bitfld.long 0x00 0. " SWR ,Software reset" "No reset,Reset"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CSR0,Bus mode"
|
|
bitfld.long 0x00 21. " SPD ,Clock frequency selection" "2.5 MHz,25 MHz"
|
|
bitfld.long 0x00 20. " DBO ,Descriptor byte ordering mode" "Little,Big"
|
|
bitfld.long 0x00 17.--19. " TAP ,Transmit automatic polling" "TAP disabled,825.6 us,2476.8 us,5779.2 us,51.6 us,103.2 us,154.8 us,412.8 us"
|
|
textline " "
|
|
bitfld.long 0x00 8.--13. " PBL ,Programmable burst length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 7. " BLE ,Big/little endian" "Little-endian,Big-endian"
|
|
bitfld.long 0x00 2.--6. " DSL ,Descriptor skip length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BAR ,Bus arbitration scheme" "Intelligent arbitration,Equal priority"
|
|
bitfld.long 0x00 0. " SWR ,Software reset" "No reset,Reset"
|
|
endif
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "CSR1,Transmit poll demand"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "CSR2,Receive poll demand"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CSR3,Receive list base address"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CSR4,Transmit list base address"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CSR5,Status and control"
|
|
bitfld.long 0x00 20.--22. " TS ,Transmit process state" "Stopped(RESET/STOP TRANSMIT command issued),Running(fetching the transmit descriptor),Running(Waiting for end of transmission),Running(transferring data to FIFO),Reserved,Running(set up packet),Suspended(FIFO underflow),Running(closing transmit descriptor)"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " RS ,Receive process state" "Stopped(RESET/STOP RECEIVE command issued),Running(fetching the receive descriptor),Running(waiting for the end-of-receive packet),Running(waiting for the receive packet),Suspended(unavailable receive buffer),Running(closing the receive descriptor),Reserved,Running(transferring data from FIFO)"
|
|
textline " "
|
|
eventfld.long 0x00 16. " NIS ,Normal interrupt summary" "Not forced,Forced"
|
|
eventfld.long 0x00 15. " AIS ,Abnormal interrupt summary" "Not forced,Forced"
|
|
eventfld.long 0x00 14. " ERI ,Early receive interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 11. " GTE ,General-purpose timer expiration" "Not occurred,Occurred"
|
|
eventfld.long 0x00 10. " ETI ,Early transmit interrupt" "Not occurred,Occurred"
|
|
eventfld.long 0x00 8. " RPS ,Receive process stopped" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 7. " RU ,Receive buffer unavailable" "Not occurred,Occurred"
|
|
eventfld.long 0x00 6. " RI ,Receive interrupt" "Not occurred,Occurred"
|
|
eventfld.long 0x00 5. " UNF ,Transmit underflow" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 2. " TU ,Transmit buffer unavailable" "Not occurred,Occurred"
|
|
eventfld.long 0x00 1. " TPS ,Transmit process stopped" "Not occurred,Occurred"
|
|
eventfld.long 0x00 0. " TI ,Transmit interrupt" "Not occurred,Occurred"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CSR6,Operation mode"
|
|
bitfld.long 0x00 30. " RA ,Receive all" "Not forced,Forced"
|
|
bitfld.long 0x00 22. " TTM ,Transmit threshold mode" "10 Mbps mode,100 Mbps mode"
|
|
bitfld.long 0x00 21. " SF ,Store and forward" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " TR ,Threshold control bits" "0,1,2,3"
|
|
bitfld.long 0x00 13. " ST ,Start/stop transmit command" "No caused,Caused"
|
|
bitfld.long 0x00 9. " FD ,Full-duplex mode" "Half-duplex mode,Forcing full-duplex mode"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PM ,Pass all multicast" "Not forced,Forced"
|
|
bitfld.long 0x00 6. " RP ,Promiscuous mode" "Not forced,Forced"
|
|
bitfld.long 0x00 4. " IF ,Inverse filtering" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PB ,Pass bad frames" "Not forced,Forced"
|
|
bitfld.long 0x00 2. " HO ,Hash-only filtering mode" "Not forced,Forced"
|
|
bitfld.long 0x00 1. " SR ,Start/stop receive command" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HP ,Hash/perfect receive filtering mode" "Perfect filtering,Imperfect filtering"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CSR7,Interrupt enable"
|
|
bitfld.long 0x00 16. " NIE ,Normal interrupt summary enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " AIE ,Abnormal interrupt summary enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " ERE ,Early receive interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " GTE ,General-purpose timer overflow enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " ETE ,Early transmit interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " RSE ,Receive stopped enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RUE ,Receive buffer unavailable enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " UNE ,Underflow interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TUE ,Transmit buffer unavailable enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TSE ,Transmit stopped enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "CSR8,Missed frames and overflow counters"
|
|
bitfld.long 0x00 28. " OCO ,Overflow counter overflow" "Not occurred,Occurred"
|
|
hexmask.long.word 0x00 17.--27. 1. " FOC ,FIFO overflow counter"
|
|
bitfld.long 0x00 16. " MFO ,Missed frame overflow" "Not occurred,Occurred"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " MFC ,Missed frame counter"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CSR9,RMII management"
|
|
bitfld.long 0x00 19. " MDI ,RMII management data in signal" "Low,High"
|
|
bitfld.long 0x00 18. " MDEN ,RMII management operation mode" "Ethernet MAC writes,Ethernet MAC reads"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MDO ,RMII management write data" "Low,High"
|
|
bitfld.long 0x00 16. " MDC ,RMII management clock" "Low,High"
|
|
if (((d.l(ad:0x40003030))&0x200000)==0x200000)
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "CSR11,Timer and interrupt mitigation control"
|
|
bitfld.long 0x00 31. " CS ,Cycle size" "81.92 us,5.12 us"
|
|
bitfld.long 0x00 27.--30. " TT ,Transmit timer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--26. " NTP ,Number of transmit packets" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " RT ,Receive timer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 17.--19. " NRP ,Number of receive packets" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16. " CON ,Continuous mode" "Continuous,One-shot"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " TIM ,Timer value"
|
|
else
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "CSR11,Timer and interrupt mitigation control"
|
|
bitfld.long 0x00 31. " CS ,Cycle size" "819.2 us,51.2 us"
|
|
bitfld.long 0x00 27.--30. " TT ,Transmit timer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--26. " NTP ,Number of transmit packets" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " RT ,Receive timer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 17.--19. " NRP ,Number of receive packets" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16. " CON ,Continuous mode" "Continuous,One-shot"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " TIM ,Timer value"
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree.open "Serial Peripheral Interface (SPI)"
|
|
tree "SPI 0"
|
|
base ad:0x40001000
|
|
width 13.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CONTROL,Control Register"
|
|
bitfld.long 0x00 25. " SPH ,Clock phase" "0,1"
|
|
bitfld.long 0x00 24. " SPO ,Clock polarity" "0,1"
|
|
textline " "
|
|
hexmask.long.word 0x00 8.--23. 1. " TXRXDFCOUNT ,Number of data frames to be sent/received"
|
|
bitfld.long 0x00 7. " INTTXUNRRUN ,Interrupt on transmit under-run" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INTRXOVRFLO ,Interrupt on receive overflow" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " INTTXDATA ,Interrupt on transmit data" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INTRXDATA ,Interrupt on receive data" "Masked,Not masked"
|
|
bitfld.long 0x00 2.--3. " TRANSFPRTL ,Transfer protocol" "Motorola SPI,TI Synchronous Serial,MICROWIRE,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1. " MODE ,SPI implementation" "Slave,Master"
|
|
bitfld.long 0x00 0. " ENABLE ,Core enable" "Disabled,Enabled"
|
|
line.long 0x04 "TXRXDF_SIZE,Transmit and receive data frame size"
|
|
bitfld.long 0x04 0.--5. " TXRXDFS ,Transmit and receive data size" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 11. " TXFIFOEMPNXT ,Transmit FIFO empty on next read" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " TXFIFOEMP ,Transmit FIFO empty" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXFIFOFULNXT ,Transmit FIFO full on next write" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " TXFIFOFUL ,Transmit FIFO full" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXFIFOEMPNXT ,Receive FIFO empty on next read" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " RXFIFOEMP ,Receive FIFO empty" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXFIFOFULNXT ,Receive FIFO full on next write" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " RXFIFOFUL ,Receive FIFO full" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TXUNDERRUN ,No data available for transmission" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " RXOVERFLOW ,Channel is unable to write to receive FIFO as it is full" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXDATRCED ,Data has been received and can be read" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " TXDATSENT ,Data have been sent" "Not occurred,Occurred"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "INT_CLEAR,Interrupt Clear Register"
|
|
bitfld.long 0x00 3. " TXCHUNDRUN ,Transmit channel under-run" "No effect,Clear"
|
|
bitfld.long 0x00 2. " RXCHOVRFLW ,Receive channel over flow" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXRDYCLR ,Clears receive ready (rx_rdy)" "No effect,Clear"
|
|
bitfld.long 0x00 0. " TXDONECLR ,Clears transmit done (tx_done)" "No effect,Clear"
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "RX_DATA,Receive Data Register"
|
|
in
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "TX_DATA,Transmit Data Register"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CLK_GEN,Output Clock Generator (master mode)"
|
|
bitfld.long 0x00 0.--3. " SCLKOGEN ,Specifies the division of incoming PCLK" "PCLK/2,PCLK/4,PCLK/8,PCLK/16,PCLK/32,PCLK/64,PCLK/128,PCLK/256,?..."
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SLAVE_SELECT,Specifies slave selected (master mode)"
|
|
bitfld.long 0x00 3. " SLAVESELECT[3] ,Specifies the slave select (SPI_0_SS[3] pin)" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SLAVESELECT[2] ,Specifies the slave select (SPI_0_SS[2] pin)" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SLAVESELECT[1] ,Specifies the slave select (SPI_0_SS[1] pin)" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SLAVESELECT[0] ,Specifies the slave select (SPI_0_SS[0] pin)" "Not selected,Selected"
|
|
rgroup.long 0x20++0x07
|
|
line.long 0x00 "MIS,Masked interrupt status"
|
|
bitfld.long 0x00 3. " TXCHUNDMSKINT ,Masked interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " RXCHOVRFMSKINT ,Masked status of receive channel overflow" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXRDYMSKINT ,Masked status of receive data ready" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " TXDONEMSKINT ,Masked status of transmit done" "No interrupt,Interrupt"
|
|
line.long 0x04 "RIS,Raw interrupt status"
|
|
bitfld.long 0x04 3. " TXCHUNDR ,RAW interrupt status" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " RXCHOVRF ,Raw status of receive channel overflow" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RXRDY ,Receive data ready (data received in FIFO)" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " TXDONE ,Raw status of transmit done (data shifted out)" "Not occurred,Occurred"
|
|
width 0xB
|
|
tree.end
|
|
tree "SPI 1"
|
|
base ad:0x40011000
|
|
width 13.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CONTROL,Control Register"
|
|
bitfld.long 0x00 25. " SPH ,Clock phase" "0,1"
|
|
bitfld.long 0x00 24. " SPO ,Clock polarity" "0,1"
|
|
textline " "
|
|
hexmask.long.word 0x00 8.--23. 1. " TXRXDFCOUNT ,Number of data frames to be sent/received"
|
|
bitfld.long 0x00 7. " INTTXUNRRUN ,Interrupt on transmit under-run" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INTRXOVRFLO ,Interrupt on receive overflow" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " INTTXDATA ,Interrupt on transmit data" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INTRXDATA ,Interrupt on receive data" "Masked,Not masked"
|
|
bitfld.long 0x00 2.--3. " TRANSFPRTL ,Transfer protocol" "Motorola SPI,TI Synchronous Serial,MICROWIRE,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1. " MODE ,SPI implementation" "Slave,Master"
|
|
bitfld.long 0x00 0. " ENABLE ,Core enable" "Disabled,Enabled"
|
|
line.long 0x04 "TXRXDF_SIZE,Transmit and receive data frame size"
|
|
bitfld.long 0x04 0.--5. " TXRXDFS ,Transmit and receive data size" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 11. " TXFIFOEMPNXT ,Transmit FIFO empty on next read" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " TXFIFOEMP ,Transmit FIFO empty" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXFIFOFULNXT ,Transmit FIFO full on next write" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " TXFIFOFUL ,Transmit FIFO full" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXFIFOEMPNXT ,Receive FIFO empty on next read" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " RXFIFOEMP ,Receive FIFO empty" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXFIFOFULNXT ,Receive FIFO full on next write" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " RXFIFOFUL ,Receive FIFO full" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TXUNDERRUN ,No data available for transmission" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " RXOVERFLOW ,Channel is unable to write to receive FIFO as it is full" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXDATRCED ,Data has been received and can be read" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " TXDATSENT ,Data have been sent" "Not occurred,Occurred"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "INT_CLEAR,Interrupt Clear Register"
|
|
bitfld.long 0x00 3. " TXCHUNDRUN ,Transmit channel under-run" "No effect,Clear"
|
|
bitfld.long 0x00 2. " RXCHOVRFLW ,Receive channel over flow" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXRDYCLR ,Clears receive ready (rx_rdy)" "No effect,Clear"
|
|
bitfld.long 0x00 0. " TXDONECLR ,Clears transmit done (tx_done)" "No effect,Clear"
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "RX_DATA,Receive Data Register"
|
|
in
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "TX_DATA,Transmit Data Register"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CLK_GEN,Output Clock Generator (master mode)"
|
|
bitfld.long 0x00 0.--3. " SCLKOGEN ,Specifies the division of incoming PCLK" "PCLK/2,PCLK/4,PCLK/8,PCLK/16,PCLK/32,PCLK/64,PCLK/128,PCLK/256,?..."
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SLAVE_SELECT,Specifies slave selected (master mode)"
|
|
bitfld.long 0x00 7. " SLAVESELECT[7] ,Specifies the slave select (SPI_1_SS[7] pin)" "Not selected,Selected"
|
|
bitfld.long 0x00 6. " SLAVESELECT[6] ,Specifies the slave select (SPI_1_SS[6] pin)" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SLAVESELECT[5] ,Specifies the slave select (SPI_1_SS[5] pin)" "Not selected,Selected"
|
|
bitfld.long 0x00 4. " SLAVESELECT[4] ,Specifies the slave select (SPI_1_SS[4] pin)" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SLAVESELECT[3] ,Specifies the slave select (SPI_1_SS[3] pin)" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " SLAVESELECT[2] ,Specifies the slave select (SPI_1_SS[2] pin)" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SLAVESELECT[1] ,Specifies the slave select (SPI_1_SS[1] pin)" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " SLAVESELECT[0] ,Specifies the slave select (SPI_1_SS[0] pin)" "Not selected,Selected"
|
|
rgroup.long 0x20++0x07
|
|
line.long 0x00 "MIS,Masked interrupt status"
|
|
bitfld.long 0x00 3. " TXCHUNDMSKINT ,Masked interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " RXCHOVRFMSKINT ,Masked status of receive channel overflow" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXRDYMSKINT ,Masked status of receive data ready" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " TXDONEMSKINT ,Masked status of transmit done" "No interrupt,Interrupt"
|
|
line.long 0x04 "RIS,Raw interrupt status"
|
|
bitfld.long 0x04 3. " TXCHUNDR ,RAW interrupt status" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " RXCHOVRF ,Raw status of receive channel overflow" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RXRDY ,Receive data ready (data received in FIFO)" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " TXDONE ,Raw status of transmit done (data shifted out)" "Not occurred,Occurred"
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree.open "Inter-Integrated Circuit (I2C)"
|
|
tree "I2C 0"
|
|
base ad:0x40002000
|
|
width 11.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Used to configure the I2C peripheral"
|
|
bitfld.long 0x00 0. 1. 7. " CR ,Serial clock rate" "PCLK/256,PCLK/224,PCLK/192,PCLK/160,PCLK/960,PCLK/120,PCLK/60,BCLK/8"
|
|
bitfld.long 0x00 6. " ENS1 ,I2C enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " STA ,The START flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ST0 ,The STOP flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " SI ,The Serial Interrupt flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " AA ,The Assert Acknowledge flag" "Not occurred,Occurred"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "STATUS,The current state of the I2C peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " STATUS ,The current state of the I2C peripheral"
|
|
group.long 0x08++0x13
|
|
line.long 0x00 "DATA,Read/write data to/from the serial interface"
|
|
bitfld.long 0x00 7. " Sd7 ,Serial data bit 7" "Low,High"
|
|
bitfld.long 0x00 6. " Sd6 ,Serial data bit 6" "Low,High"
|
|
bitfld.long 0x00 5. " Sd5 ,Serial data bit 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " Sd4 ,Serial data bit 4" "Low,High"
|
|
bitfld.long 0x00 3. " Sd3 ,Serial data bit 3" "Low,High"
|
|
bitfld.long 0x00 2. " Sd2 ,Serial data bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Sd1 ,Serial data bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " DIR ,Serial data bit 0" "Write,Read"
|
|
line.long 0x04 "ADDR,Address of the I2C peripheral"
|
|
hexmask.long.byte 0x04 1.--7. 2. " Addr ,Own slave address"
|
|
bitfld.long 0x04 0. " GC ,General call address acknowledge" "Ignored,Recognized"
|
|
line.long 0x08 "SMBUS,SMBus timeout reset condition"
|
|
bitfld.long 0x08 7. " SMBusRst ,SMBus reset" "Not forced,Forced"
|
|
bitfld.long 0x08 6. " SMBSUS_NO ,SMBSUS_NO control" "Not forced,Forced"
|
|
bitfld.long 0x08 5. " SMBSUS_NI ,Status of SMBSUS_NI signal" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SMBALERT_NO ,SMBALERT_NO control" "Not forced,Forced"
|
|
bitfld.long 0x08 3. " SMBALERT_NI ,Status of SMBALERT_NI signal" "Not forced,Forced"
|
|
bitfld.long 0x08 2. " SMBusEn ,SMBus enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SMBUSIntEn ,SMBUS Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " SMBALERTIntEn ,SMBALERT Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x0C "FREQ,Configuring real-time timeout logic"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " FREQ ,PCLK0 frequency"
|
|
line.long 0x10 "GLITCHREG,Number of registers in the glitch filter"
|
|
hexmask.long.byte 0x10 0.--7. 1. " GLITCHREG ,Value for glitch filter"
|
|
width 0xB
|
|
tree.end
|
|
tree "I2C 1"
|
|
base ad:0x40012000
|
|
width 11.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Used to configure the I2C peripheral"
|
|
bitfld.long 0x00 0. 1. 7. " CR ,Serial clock rate" "PCLK/256,PCLK/224,PCLK/192,PCLK/160,PCLK/960,PCLK/120,PCLK/60,BCLK/8"
|
|
bitfld.long 0x00 6. " ENS1 ,I2C enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " STA ,The START flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ST0 ,The STOP flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " SI ,The Serial Interrupt flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " AA ,The Assert Acknowledge flag" "Not occurred,Occurred"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "STATUS,The current state of the I2C peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " STATUS ,The current state of the I2C peripheral"
|
|
group.long 0x08++0x13
|
|
line.long 0x00 "DATA,Read/write data to/from the serial interface"
|
|
bitfld.long 0x00 7. " Sd7 ,Serial data bit 7" "Low,High"
|
|
bitfld.long 0x00 6. " Sd6 ,Serial data bit 6" "Low,High"
|
|
bitfld.long 0x00 5. " Sd5 ,Serial data bit 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " Sd4 ,Serial data bit 4" "Low,High"
|
|
bitfld.long 0x00 3. " Sd3 ,Serial data bit 3" "Low,High"
|
|
bitfld.long 0x00 2. " Sd2 ,Serial data bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " Sd1 ,Serial data bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " DIR ,Serial data bit 0" "Write,Read"
|
|
line.long 0x04 "ADDR,Address of the I2C peripheral"
|
|
hexmask.long.byte 0x04 1.--7. 2. " Addr ,Own slave address"
|
|
bitfld.long 0x04 0. " GC ,General call address acknowledge" "Ignored,Recognized"
|
|
line.long 0x08 "SMBUS,SMBus timeout reset condition"
|
|
bitfld.long 0x08 7. " SMBusRst ,SMBus reset" "Not forced,Forced"
|
|
bitfld.long 0x08 6. " SMBSUS_NO ,SMBSUS_NO control" "Not forced,Forced"
|
|
bitfld.long 0x08 5. " SMBSUS_NI ,Status of SMBSUS_NI signal" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SMBALERT_NO ,SMBALERT_NO control" "Not forced,Forced"
|
|
bitfld.long 0x08 3. " SMBALERT_NI ,Status of SMBALERT_NI signal" "Not forced,Forced"
|
|
bitfld.long 0x08 2. " SMBusEn ,SMBus enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SMBUSIntEn ,SMBUS Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " SMBALERTIntEn ,SMBALERT Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x0C "FREQ,Configuring real-time timeout logic"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " FREQ ,PCLK1 frequency"
|
|
line.long 0x10 "GLITCHREG,Number of registers in the glitch filter"
|
|
hexmask.long.byte 0x10 0.--7. 1. " GLITCHREG ,Value for glitch filter"
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree.open "Universal Asynchronous Receiver/Transmitter (UART)"
|
|
tree "UART 0"
|
|
base ad:0x40000000
|
|
width 9.
|
|
if (((d.l(ad:0x40000000+0x0C))&0x80)==0x00)
|
|
;LCR[DLAB]=0
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "RBR/THR,Buffer Register/Transmit Holding Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 3. " EDSSI ,Modem status interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ELSI ,Receiver line status interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ETBEI ,Transmit holding register empty interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ERBFI ,Receive data available interrupt enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DLR,Divisor Latch (LSB) Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLR ,Divisor value"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DMR,Divisor Latch (MSB) Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DMR ,Divisor value"
|
|
endif
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "IIR,Interrupt Identification Register"
|
|
bitfld.long 0x00 6.--7. " Mode ,Enables FIFO mode" "b'00,b'01,b'10,b'11"
|
|
bitfld.long 0x00 0.--3. " IntIdeBt ,Interrupt identification bits" "Modem status,Reserved,THR empty,Reserved,Received data available,Reserved,Receiver line status,Reserved,Reserved,Reserved,Reserved,Reserved,Character timeout,?..."
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "FCR,FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " RX_TRIG ,Trigger level for the RX FIFO interrupt" "1 byte,4 bytes,8 bytes,14 bytes"
|
|
bitfld.long 0x00 3. " EN_TXR_RXR ,Enable data transfer from transmit FIFO to PDMA" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CLEAR_TX_FIFO ,Clears all bytes in TX FIFO" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLEAR_RX_FIFO ,Clears all bytes in RX FIFO" "Disabled,Enabled"
|
|
if (((d.l(ad:0x40000000+0x0C))&0x03)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "LCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SB ,Set break" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of stop bits" "1 stop bit,1.5 bit"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word length select" "5 bits,6 bits,7 bits,8 bits"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "LCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SB ,Set break" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of stop bits" "1 stop bit,2 bits"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word length select" "5 bits,6 bits,7 bits,8 bits"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "MCR,Modem Control Register"
|
|
bitfld.long 0x00 4. " LOOP ,Loop enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " OUT2 ,Controls the Output2 (OUT2_0) signal" "0,1"
|
|
bitfld.long 0x00 2. " OUT1 ,Controls the Output1 (OUT1_0) signal" "0,1"
|
|
bitfld.long 0x00 1. " RTS ,Controls the Request to Send (RTS_0) signal" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DTR ,Data Terminal Ready (DTR_0) signal" "0,1"
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "LSR,Line Status Register"
|
|
in
|
|
hgroup.long 0x18++0x03
|
|
hide.long 0x00 "MSR,Modem Status Register"
|
|
in
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SR,Scratch Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SR ,Scratch Register"
|
|
tree.end
|
|
tree "UART 1"
|
|
base ad:0x40010000
|
|
width 9.
|
|
if (((d.l(ad:0x40010000+0x0C))&0x80)==0x00)
|
|
;LCR[DLAB]=0
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "RBR/THR,Buffer Register/Transmit Holding Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x00 3. " EDSSI ,Modem status interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ELSI ,Receiver line status interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ETBEI ,Transmit holding register empty interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ERBFI ,Receive data available interrupt enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DLR,Divisor Latch (LSB) Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLR ,Divisor value"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DMR,Divisor Latch (MSB) Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DMR ,Divisor value"
|
|
endif
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "IIR,Interrupt Identification Register"
|
|
bitfld.long 0x00 6.--7. " Mode ,Enables FIFO mode" "b'00,b'01,b'10,b'11"
|
|
bitfld.long 0x00 0.--3. " IntIdeBt ,Interrupt identification bits" "Modem status,Reserved,THR empty,Reserved,Received data available,Reserved,Receiver line status,Reserved,Reserved,Reserved,Reserved,Reserved,Character timeout,?..."
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "FCR,FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " RX_TRIG ,Trigger level for the RX FIFO interrupt" "1 byte,4 bytes,8 bytes,14 bytes"
|
|
bitfld.long 0x00 3. " EN_TXR_RXR ,Enable data transfer from transmit FIFO to PDMA" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CLEAR_TX_FIFO ,Clears all bytes in TX FIFO" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLEAR_RX_FIFO ,Clears all bytes in RX FIFO" "Disabled,Enabled"
|
|
if (((d.l(ad:0x40010000+0x0C))&0x03)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "LCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SB ,Set break" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of stop bits" "1 stop bit,1.5 bit"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word length select" "5 bits,6 bits,7 bits,8 bits"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "LCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SB ,Set break" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of stop bits" "1 stop bit,2 bits"
|
|
bitfld.long 0x00 0.--1. " WLS ,Word length select" "5 bits,6 bits,7 bits,8 bits"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "MCR,Modem Control Register"
|
|
bitfld.long 0x00 4. " LOOP ,Loop enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " OUT2 ,Controls the Output2 (OUT2_1) signal" "0,1"
|
|
bitfld.long 0x00 2. " OUT1 ,Controls the Output1 (OUT1_1) signal" "0,1"
|
|
bitfld.long 0x00 1. " RTS ,Controls the Request to Send (RTS_1) signal" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DTR ,Data Terminal Ready (DTR_1) signal" "0,1"
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "LSR,Line Status Register"
|
|
in
|
|
hgroup.long 0x18++0x03
|
|
hide.long 0x00 "MSR,Modem Status Register"
|
|
in
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SR,Scratch Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SR ,Scratch Register"
|
|
tree.end
|
|
tree.end
|
|
tree "Real-Time Counter (RTC)"
|
|
base ad:0x40014100
|
|
width 16.
|
|
group.long 0x00++0x13
|
|
line.long 0x0 "COUNTER0_REG,Counter bits 7:0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " CNT_[ 7:0] ,Counter bits 7:0"
|
|
line.long 0x4 "COUNTER1_REG,Counter bits 15:8"
|
|
hexmask.long.byte 0x4 0.--7. 1. " CNT_[15:8] ,Counter bits 15:8"
|
|
line.long 0x8 "COUNTER2_REG,Counter bits 23:16"
|
|
hexmask.long.byte 0x8 0.--7. 1. " CNT_[23:16] ,Counter bits 23:16"
|
|
line.long 0xC "COUNTER3_REG,Counter bits 31:24"
|
|
hexmask.long.byte 0xC 0.--7. 1. " CNT_[31:24] ,Counter bits 31:24"
|
|
line.long 0x10 "COUNTER4_REG,Counter bits 39:32"
|
|
hexmask.long.byte 0x10 0.--7. 1. " CNT_[39:32] ,Counter bits 39:32"
|
|
group.long 0x20++0x13
|
|
line.long 0x0 "MATCHREG0_REG,Match Register bits 7:0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " MATCH_[ 7:0] ,Match bits 7:0"
|
|
line.long 0x4 "MATCHREG1_REG,Match Register bits 15:8"
|
|
hexmask.long.byte 0x4 0.--7. 1. " MATCH_[15:8] ,Match bits 15:8"
|
|
line.long 0x8 "MATCHREG2_REG,Match Register bits 23:16"
|
|
hexmask.long.byte 0x8 0.--7. 1. " MATCH_[23:16] ,Match bits 23:16"
|
|
line.long 0xC "MATCHREG3_REG,Match Register bits 31:24"
|
|
hexmask.long.byte 0xC 0.--7. 1. " MATCH_[31:24] ,Match bits 31:24"
|
|
line.long 0x10 "MATCHREG4_REG,Match Register bits 39:32"
|
|
hexmask.long.byte 0x10 0.--7. 1. " MATCH_[39:32] ,Match bits 39:32"
|
|
group.long 0x40++0x13
|
|
line.long 0x0 "MATCHBITS0_REG,Match Register bits 7:0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " IND_MATCH_[ 7:0] ,Individual match bits 7:0"
|
|
line.long 0x4 "MATCHBITS1_REG,Match Register bits 15:8"
|
|
hexmask.long.byte 0x4 0.--7. 1. " IND_MATCH_[15:8] ,Individual match bits 15:8"
|
|
line.long 0x8 "MATCHBITS2_REG,Match Register bits 23:16"
|
|
hexmask.long.byte 0x8 0.--7. 1. " IND_MATCH_[23:16] ,Individual match bits 23:16"
|
|
line.long 0xC "MATCHBITS3_REG,Match Register bits 31:24"
|
|
hexmask.long.byte 0xC 0.--7. 1. " IND_MATCH_[31:24] ,Individual match bits 31:24"
|
|
line.long 0x10 "MATCHBITS4_REG,Match Register bits 39:32"
|
|
hexmask.long.byte 0x10 0.--7. 1. " IND_MATCH_[39:32] ,Individual match bits 39:32"
|
|
group.byte 0x60++0x00
|
|
line.byte 0x00 "CTRL_STAT_REG,Control/Status register"
|
|
bitfld.byte 0x00 7. " RTC_RST ,RTC Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 6. " CNTR_EN ,Counter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " VR_EN_MAT ,Voltage Regulator Enable on Match" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " RST_CNT_OMAT ,Reset Counter on Match" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " RSTB_CNT ,Counter Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 0. " XTAL_EN ,Crystal Oscillator Enable" "Disabled,Enabled"
|
|
width 0xB
|
|
tree.end
|
|
tree.open "System Timer"
|
|
tree "TIM 1"
|
|
base ad:0x40005000
|
|
width 16.
|
|
if ((d.l(ad:0x40005054)&0x1)==0x0)
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "TIM0_VAL,Current value of Timer 0"
|
|
group.long 0x04++0x0F
|
|
line.long 0x00 "TIM0_LOADVAL,Load value for Timer 0"
|
|
line.long 0x04 "TIM0_BGLOADVAL,Background load value for Timer 0"
|
|
line.long 0x08 "TIM0_CTRL,Timer 0 Control Register"
|
|
bitfld.long 0x08 2. " TIM0INTEN ,Timer 0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " TIM0MODE ,Timer 0 Mode" "Periodic mode,One-Shot mode"
|
|
textline " "
|
|
bitfld.long 0x08 0. " TIM0ENABLE ,Timer 0 Enable" "Disabled,Enabled"
|
|
line.long 0x0C "TIM0_RIS,Timer 0 raw interrupt status"
|
|
eventfld.long 0x0C 0. " TIM0_RIS ,Timer 0 Raw Interrupt Status" "Not reached zero,Reached zero"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "TIM0_MIS,Timer 0 masked interrupt status"
|
|
bitfld.long 0x00 0. " TIM0_MIS ,Timer 0 masked interrupt status" "Not masked,Masked"
|
|
else
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "TIM0_VAL,Current value of Timer 0"
|
|
hgroup.long 0x04++0x03
|
|
hide.long 0x00 "TIM0_LOADVAL,Load value for Timer 0"
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "TIM0_BGLOADVAL,Background load value for Timer 0"
|
|
hgroup.long 0x0C++0x03
|
|
hide.long 0x00 "TIM0_CTRL,Timer 0 Control Register"
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "TIM0_RIS,Timer 0 raw interrupt status"
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "TIM0_MIS,Timer 0 masked interrupt status"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "TIM 2"
|
|
base ad:0x40005018
|
|
width 16.
|
|
if ((d.l(ad:0x40005054)&0x1)==0x0)
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "TIM1_VAL,Current value of Timer 1"
|
|
group.long 0x04++0x0F
|
|
line.long 0x00 "TIM1_LOADVAL,Load value for Timer 1"
|
|
line.long 0x04 "TIM1_BGLOADVAL,Background load value for Timer 1"
|
|
line.long 0x08 "TIM1_CTRL,Timer 1 Control Register"
|
|
bitfld.long 0x08 2. " TIM1INTEN ,Timer 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " TIM1MODE ,Timer 1 Mode" "Periodic mode,One-Shot mode"
|
|
textline " "
|
|
bitfld.long 0x08 0. " TIM1ENABLE ,Timer 1 Enable" "Disabled,Enabled"
|
|
line.long 0x0C "TIM1_RIS,Timer 1 raw interrupt status"
|
|
eventfld.long 0x0C 0. " TIM1_RIS ,Timer 1 Raw Interrupt Status" "Not reached zero,Reached zero"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "TIM1_MIS,Timer 1 masked interrupt status"
|
|
bitfld.long 0x00 0. " TIM1_MIS ,Timer 1 masked interrupt status" "Not masked,Masked"
|
|
else
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "TIM1_VAL,Current value of Timer 1"
|
|
hgroup.long 0x04++0x03
|
|
hide.long 0x00 "TIM1_LOADVAL,Load value for Timer 1"
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "TIM1_BGLOADVAL,Background load value for Timer 1"
|
|
hgroup.long 0x0C++0x03
|
|
hide.long 0x00 "TIM1_CTRL,Timer 1 Control Register"
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "TIM1_RIS,Timer 1 raw interrupt status"
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "TIM1_MIS,Timer 1 masked interrupt status"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "TIM 64bit"
|
|
base ad:0x40005030
|
|
width 18.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "TIM64_VAL_U,Upper 32-bit word in 64-bit mode"
|
|
line.long 0x04 "TIM64_VAL_L,Lower 32-bit word in 64-bit mode"
|
|
group.long 0x08++0x17
|
|
line.long 0x00 "TIM64_LOADVAL_U,Upper 32-bit load value word in 64-bit mode"
|
|
line.long 0x04 "TIM64_LOADVAL_L,Lower 32-bit load value word in 64-bit mode"
|
|
line.long 0x08 "TIM64_BGLOADVAL_U,Upper 32-bit background load value in 64-bit mode"
|
|
line.long 0x0C "TIM64_BGLOADVAL_L,Lower 32-bit background load value in 64-bit mode"
|
|
line.long 0x10 "TIM64_CTRL,Control Register in 64-bit mode"
|
|
bitfld.long 0x10 2. " TIM64INTEN ,Timer 64 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " TIM64MODE ,Timer 64 Mode" "Periodic mode,One-Shot mode"
|
|
textline " "
|
|
bitfld.long 0x10 0. " TIM64ENABLE ,Timer 64 Enable" "Disabled,Enabled"
|
|
line.long 0x14 "TIM64_RIS,Raw interrupt status in 64-bit mode"
|
|
eventfld.long 0x14 0. " TIM64_RIS ,Timer 64 Raw Interrupt Status" "Not reached zero,Reached zero"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "TIM64_MIS,Masked interrupt status in 64-bit mode"
|
|
bitfld.long 0x00 0. " TIM64_MIS ,Timer 64 masked interrupt status" "Not masked,Masked"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "TIM64_MODE,System Timer dual 32-bit or 64-bit mode"
|
|
bitfld.long 0x00 0. " TIM64_MODE ,Timer 64 mode" "Disabled,Enabled"
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree "General Purpose I/O (GPIO)"
|
|
base ad:0x40013000
|
|
width 12.
|
|
group.long 0x00++0x83
|
|
line.long 0x0 "GPIO_0_CFG,GPIO Configuration register for bit 0"
|
|
bitfld.long 0x0 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x0 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x4 "GPIO_1_CFG,GPIO Configuration register for bit 1"
|
|
bitfld.long 0x4 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x4 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x8 "GPIO_2_CFG,GPIO Configuration register for bit 2"
|
|
bitfld.long 0x8 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x8 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0xC "GPIO_3_CFG,GPIO Configuration register for bit 3"
|
|
bitfld.long 0xC 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0xC 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x10 "GPIO_4_CFG,GPIO Configuration register for bit 4"
|
|
bitfld.long 0x10 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x10 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x14 "GPIO_5_CFG,GPIO Configuration register for bit 5"
|
|
bitfld.long 0x14 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x14 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x18 "GPIO_6_CFG,GPIO Configuration register for bit 6"
|
|
bitfld.long 0x18 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x18 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x1C "GPIO_7_CFG,GPIO Configuration register for bit 7"
|
|
bitfld.long 0x1C 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x1C 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x20 "GPIO_8_CFG,GPIO Configuration register for bit 8"
|
|
bitfld.long 0x20 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x20 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x24 "GPIO_9_CFG,GPIO Configuration register for bit 9"
|
|
bitfld.long 0x24 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x24 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x28 "GPIO_10_CFG,GPIO Configuration register for bit 10"
|
|
bitfld.long 0x28 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x28 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x2C "GPIO_11_CFG,GPIO Configuration register for bit 11"
|
|
bitfld.long 0x2C 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x2C 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x30 "GPIO_12_CFG,GPIO Configuration register for bit 12"
|
|
bitfld.long 0x30 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x30 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x34 "GPIO_13_CFG,GPIO Configuration register for bit 13"
|
|
bitfld.long 0x34 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x34 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x34 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x38 "GPIO_14_CFG,GPIO Configuration register for bit 14"
|
|
bitfld.long 0x38 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x38 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x38 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x3C "GPIO_15_CFG,GPIO Configuration register for bit 15"
|
|
bitfld.long 0x3C 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x3C 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x3C 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x40 "GPIO_16_CFG,GPIO Configuration register for bit 16"
|
|
bitfld.long 0x40 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x40 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x40 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x44 "GPIO_17_CFG,GPIO Configuration register for bit 17"
|
|
bitfld.long 0x44 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x44 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x44 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x48 "GPIO_18_CFG,GPIO Configuration register for bit 18"
|
|
bitfld.long 0x48 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x48 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x48 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x48 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x48 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x4C "GPIO_19_CFG,GPIO Configuration register for bit 19"
|
|
bitfld.long 0x4C 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x4C 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x4C 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4C 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x4C 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x50 "GPIO_20_CFG,GPIO Configuration register for bit 20"
|
|
bitfld.long 0x50 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x50 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x50 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x50 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x50 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x54 "GPIO_21_CFG,GPIO Configuration register for bit 21"
|
|
bitfld.long 0x54 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x54 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x54 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x54 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x54 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x58 "GPIO_22_CFG,GPIO Configuration register for bit 22"
|
|
bitfld.long 0x58 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x58 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x58 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x58 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x58 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x5C "GPIO_23_CFG,GPIO Configuration register for bit 23"
|
|
bitfld.long 0x5C 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x5C 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x5C 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x5C 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x5C 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x60 "GPIO_24_CFG,GPIO Configuration register for bit 24"
|
|
bitfld.long 0x60 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x60 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x60 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x60 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x60 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x64 "GPIO_25_CFG,GPIO Configuration register for bit 25"
|
|
bitfld.long 0x64 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x64 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x64 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x64 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x64 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x68 "GPIO_26_CFG,GPIO Configuration register for bit 26"
|
|
bitfld.long 0x68 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x68 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x68 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x68 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x68 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x6C "GPIO_27_CFG,GPIO Configuration register for bit 27"
|
|
bitfld.long 0x6C 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x6C 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x6C 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x6C 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x6C 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x70 "GPIO_28_CFG,GPIO Configuration register for bit 28"
|
|
bitfld.long 0x70 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x70 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x70 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x70 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x70 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x74 "GPIO_29_CFG,GPIO Configuration register for bit 29"
|
|
bitfld.long 0x74 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x74 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x74 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x74 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x74 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x78 "GPIO_30_CFG,GPIO Configuration register for bit 30"
|
|
bitfld.long 0x78 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x78 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x78 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x78 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x78 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x7C "GPIO_31_CFG,GPIO Configuration register for bit 31"
|
|
bitfld.long 0x7C 5.--7. " GPIOINT_TYPE ,Input Interrupt Type Configuration" "Level High,Level Low,Positive edge,Negative edge,Both edges,?..."
|
|
bitfld.long 0x7C 3. " GPINTEN ,GPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x7C 2. " GPO_OUTBUFEN ,GPO output buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x7C 1. " GPINEN ,GPI register enable" "Disabled,Enabled"
|
|
bitfld.long 0x7C 0. " GPOUTEN ,GPU register enable" "Disabled,Enabled"
|
|
line.long 0x80 "GPIO_IRQ,Interrupt Status register"
|
|
rgroup.long 0x84++0x03
|
|
line.long 0x00 "GPIO_IN,Read only bits for ports configured as inputs"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "GPIO_OUT,Read/write bits for ports configured as outputs"
|
|
width 0xB
|
|
tree.end
|
|
tree "Fabric Interface"
|
|
base ad:0x40007000
|
|
width 13.
|
|
if (((d.l(ad:0x40007000+0x40))&0x1)==0x1)
|
|
group.long 0x00++0x1F
|
|
line.long 0x00 "MSSIRQ_EN_0,Enables/disables interrupt sources for MSSINT[0]"
|
|
bitfld.long 0x00 24. " SOFTINT ,Software interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 23. " PLLLOCKLOST ,PLL lock lost interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 22. " PLLLOCK ,PLL LOCK interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TIMER2 ,TIMER2 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 20. " TIMER1 ,TIMER1 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 19. " I2C_1_SMBSUS ,I2C_1_SMBSUS interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " I2C_1_SMBALERT ,I2C_1_SMBALERT interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 17. " I2C_1 ,I2C_1 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 16. " I2C_0_SMBSUS ,I2C_0_SMBSUS interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I2C_0_SMBALERT ,I2C_0_SMBALERT interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 14. " I2C_0 ,I2C_0 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 13. " SPI_1 ,SPI_1 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SPI_0 ,SPI_0 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 11. " UART_1 ,UART_1 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 10. " UART_0 ,UART_0 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DMA ,DMA interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 8. " ENVM_1 ,ENVM_1 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 7. " ENVM_0 ,ENVM_0 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IAP ,IAP interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 5. " MAC ,MAC interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 4. " RTCIF_PUB ,RTCIF_PUB interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RTCMATCHEVENT ,RTCMATCHEVENT interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 2. " BROWNOUT3_3V ,BROWNOUT3_3V interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 1. " BROWNOUT1_5V ,BROWNOUT1_5V interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WDOGWAKEUP ,Wdog wake up interrupt enable" "Masked,Enabled"
|
|
line.long 0x04 "MSSIRQ_EN_1,Enables/disables interrupt sources for MSSINT[1]"
|
|
bitfld.long 0x04 31. " MSS_GPIO[31] ,MSS_GPIO[31] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 30. " MSS_GPIO[30] ,MSS_GPIO[30] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 29. " MSS_GPIO[29] ,MSS_GPIO[29] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " MSS_GPIO[28] ,MSS_GPIO[28] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 27. " MSS_GPIO[27] ,MSS_GPIO[27] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 26. " MSS_GPIO[26] ,MSS_GPIO[26] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " MSS_GPIO[25] ,MSS_GPIO[25] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 24. " MSS_GPIO[24] ,MSS_GPIO[24] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 23. " MSS_GPIO[23] ,MSS_GPIO[23] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " MSS_GPIO[22] ,MSS_GPIO[22] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 21. " MSS_GPIO[21] ,MSS_GPIO[21] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 20. " MSS_GPIO[20] ,MSS_GPIO[20] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " MSS_GPIO[19] ,MSS_GPIO[19] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 18. " MSS_GPIO[18] ,MSS_GPIO[18] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 17. " MSS_GPIO[17] ,MSS_GPIO[17] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " MSS_GPIO[16] ,MSS_GPIO[16] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 15. " MSS_GPIO[15] ,MSS_GPIO[15] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 14. " MSS_GPIO[14] ,MSS_GPIO[14] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " MSS_GPIO[13] ,MSS_GPIO[13] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 12. " MSS_GPIO[12] ,MSS_GPIO[12] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 11. " MSS_GPIO[11] ,MSS_GPIO[11] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " MSS_GPIO[10] ,MSS_GPIO[10] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 9. " MSS_GPIO[9] ,MSS_GPIO[9] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 8. " MSS_GPIO[8] ,MSS_GPIO[8] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " MSS_GPIO[7] ,MSS_GPIO[7] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 6. " MSS_GPIO[6] ,MSS_GPIO[6] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 5. " MSS_GPIO[5] ,MSS_GPIO[5] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " MSS_GPIO[4] ,MSS_GPIO[4] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 3. " MSS_GPIO[3] ,MSS_GPIO[3] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 2. " MSS_GPIO[2] ,MSS_GPIO[2] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " MSS_GPIO[1] ,MSS_GPIO[1] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 0. " MSS_GPIO[0] ,MSS_GPIO[0] interrupt enable" "Masked,Enabled"
|
|
line.long 0x08 "MSSIRQ_EN_2,Enables/disables ACE comparators interrupt sources for MSSINT[2]"
|
|
sif ((CPU()!="A2F060")&&(CPU()!="A2F200"))
|
|
bitfld.long 0x08 21. " CMP_9_R ,CMP_9_R interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x08 20. " CMP_8_R ,CMP_8_R interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (CPU()!="A2F060")
|
|
bitfld.long 0x08 19. " CMP_7_R ,CMP_7_R interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x08 18. " CMP_6_R ,CMP_6_R interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 17. " CMP_5_R ,CMP_5_R interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x08 16. " CMP_4_R ,CMP_4_R interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 15. " CMP_3_R ,CMP_3_R interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x08 14. " CMP_2_R ,CMP_2_R interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 13. " CMP_1_R ,CMP_1_R interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x08 12. " CMP_0_R ,CMP_0_R interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
sif ((CPU()!="A2F060")&&(CPU()!="A2F200"))
|
|
bitfld.long 0x08 9. " CMP_9_F ,CMP_9_F interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x08 8. " CMP_8_F ,CMP_8_F interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (CPU()!="A2F060")
|
|
bitfld.long 0x08 7. " CMP_7_F ,CMP_7_F interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x08 6. " CMP_6_F ,CMP_6_F interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 5. " CMP_5_F ,CMP_5_F interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x08 4. " CMP_4_F ,CMP_4_F interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " CMP_3_F ,CMP_3_F interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x08 2. " CMP_2_F ,CMP_2_F interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 1. " CMP_1_F ,CMP_1_F interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x08 0. " CMP_0_F ,CMP_0_F interrupt enable" "Masked,Enabled"
|
|
line.long 0x0C "MSSIRQ_EN_3,Enables/disables interrupt sources for MSSINT[3]"
|
|
bitfld.long 0x0C 11. " PC2_FLAG_3 ,PC2_FLAG_3 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x0C 10. " PC2_FLAG_2 ,PC2_FLAG_2 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x0C 9. " PC2_FLAG_1 ,PC2_FLAG_1 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 8. " PC2_FLAG_0 ,PC2_FLAG_0 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x0C 7. " PC1_FLAG_3 ,PC1_FLAG_3 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x0C 6. " PC1_FLAG_2 ,PC1_FLAG_2 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 5. " PC1_FLAG_1 ,PC1_FLAG_1 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x0C 4. " PC1_FLAG_0 ,PC1_FLAG_0 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x0C 3. " PC0_FLAG_3 ,PC0_FLAG_3 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " PC0_FLAG_2 ,PC0_FLAG_2 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x0C 1. " PC0_FLAG_1 ,PC0_FLAG_1 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x0C 0. " PC0_FLAG_0 ,PC0_FLAG_0 interrupt enable" "Masked,Enabled"
|
|
line.long 0x10 "MSSIRQ_EN_4,Enables/disables interrupt sources for MSSINT[4]"
|
|
bitfld.long 0x10 31. " PPE_THRESH31 ,PPE_THRESH31 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 30. " PPE_THRESH30 ,PPE_THRESH30 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 29. " PPE_THRESH29 ,PPE_THRESH29 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 28. " PPE_THRESH28 ,PPE_THRESH28 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 27. " PPE_THRESH27 ,PPE_THRESH27 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 26. " PPE_THRESH26 ,PPE_THRESH26 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 25. " PPE_THRESH25 ,PPE_THRESH25 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 24. " PPE_THRESH24 ,PPE_THRESH24 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 23. " PPE_THRESH23 ,PPE_THRESH23 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 22. " PPE_THRESH22 ,PPE_THRESH22 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 21. " PPE_THRESH21 ,PPE_THRESH21 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 20. " PPE_THRESH20 ,PPE_THRESH20 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 19. " PPE_THRESH19 ,PPE_THRESH19 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 18. " PPE_THRESH18 ,PPE_THRESH18 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 17. " PPE_THRESH17 ,PPE_THRESH17 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 16. " PPE_THRESH16 ,PPE_THRESH16 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 15. " PPE_THRESH15 ,PPE_THRESH15 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 14. " PPE_THRESH14 ,PPE_THRESH14 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 13. " PPE_THRESH13 ,PPE_THRESH13 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 12. " PPE_THRESH12 ,PPE_THRESH12 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 11. " PPE_THRESH11 ,PPE_THRESH11 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 10. " PPE_THRESH10 ,PPE_THRESH10 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 9. " PPE_THRESH9 ,PPE_THRESH9 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 8. " PPE_THRESH8 ,PPE_THRESH8 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " PPE_THRESH7 ,PPE_THRESH7 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 6. " PPE_THRESH6 ,PPE_THRESH6 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 5. " PPE_THRESH5 ,PPE_THRESH5 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " PPE_THRESH4 ,PPE_THRESH4 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 3. " PPE_THRESH3 ,PPE_THRESH3 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 2. " PPE_THRESH2 ,PPE_THRESH2 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " PPE_THRESH1 ,PPE_THRESH1 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x10 0. " PPE_THRESH0 ,PPE_THRESH0 interrupt enable" "Masked,Enabled"
|
|
line.long 0x14 "MSSIRQ_EN_5,Enables/disables interrupt sources for MSSINT[5]"
|
|
sif (CPU()=="A2F500")
|
|
bitfld.long 0x14 8. " ADC_2_CAL_R ,ADC_2_CAL_R interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x14 7. " ADC_1_CAL_R ,ADC_1_CAL_R interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x14 6. " ADC_0_CAL_R ,ADC_0_CAL_R interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F200")
|
|
bitfld.long 0x14 7. " ADC_1_CAL_R ,ADC_1_CAL_R interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x14 6. " ADC_0_CAL_R ,ADC_0_CAL_R interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F060")
|
|
bitfld.long 0x14 6. " ADC_0_CAL_R ,ADC_0_CAL_R interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F500")
|
|
bitfld.long 0x14 5. " ADC_2_CAL_F ,ADC_2_CAL_F interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x14 4. " ADC_1_CAL_F ,ADC_1_CAL_F interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x14 3. " ADC_0_CAL_F ,ADC_0_CAL_F interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F200")
|
|
bitfld.long 0x14 4. " ADC_1_CAL_F ,ADC_1_CAL_F interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x14 3. " ADC_0_CAL_F ,ADC_0_CAL_F interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F060")
|
|
bitfld.long 0x14 3. " ADC_0_CAL_F ,ADC_0_CAL_F interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F500")
|
|
bitfld.long 0x14 2. " ADC_2_DV_R ,ADC_2_DV_R interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x14 1. " ADC_1_DV_R ,ADC_1_DV_R interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x14 0. " ADC_0_DV_R ,ADC_0_DV_R interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F200")
|
|
bitfld.long 0x14 1. " ADC_1_DV_R ,ADC_1_DV_R interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x14 0. " ADC_0_DV_R ,ADC_0_DV_R interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F060")
|
|
bitfld.long 0x14 0. " ADC_0_DV_R ,ADC_0_DV_R interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
endif
|
|
line.long 0x18 "MSSIRQ_EN_6,Enables/disables interrupt sources for MSSINT[6]"
|
|
sif ((CPU()!="A2F060")&&(CPU()!="A2F200"))
|
|
bitfld.long 0x18 5. " ADC2_AFULL ,ADC2_AFULL interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x18 4. " ADC2_FULL ,ADC2_FULL interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (CPU()!="A2F060")
|
|
bitfld.long 0x18 3. " ADC1_AFULL ,ADC1_AFULL interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x18 2. " ADC1_FULL ,ADC1_FULL interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x18 1. " ADC0_AFULL ,ADC0_AFULL interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x18 0. " ADC0_FULL ,ADC0_FULL interrupt enable" "Masked,Enabled"
|
|
line.long 0x1C "MSSIRQ_EN_7,Enables/disables interrupt sources for MSSINT[7]"
|
|
sif (CPU()=="A2F500")
|
|
bitfld.long 0x1C 2. " ADC2_NOTEMPTY ,ADC2 not empty interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x1C 1. " ADC1_NOTEMPTY ,ADC1 not empty interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x1C 0. " ADC0_NOTEMPTY ,ADC0 not empty interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F200")
|
|
bitfld.long 0x1C 1. " ADC1_NOTEMPTY ,ADC1 not empty interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x1C 0. " ADC0_NOTEMPTY ,ADC0 not empty interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F060")
|
|
bitfld.long 0x1C 0. " ADC0_NOTEMPTY ,ADC0 not empty interrupt enable" "Masked,Enabled"
|
|
endif
|
|
rgroup.long 0x20++0x1F
|
|
line.long 0x00 "MSSIRQ_SRC_0,Source of interrupt for MSSINT[0]"
|
|
bitfld.long 0x00 24. " SOFTINT ,Software interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 23. " PLLLOCKLOST ,PLL lock lost interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 22. " PLLLOCK ,PLL LOCK interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TIMER2 ,TIMER2 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 20. " TIMER1 ,TIMER1 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 19. " I2C_1_SMBSUS ,I2C_1_SMBSUS interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 18. " I2C_1_SMBALERT ,I2C_1_SMBALERT interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 17. " I2C_1 ,I2C_1 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 16. " I2C_0_SMBSUS ,I2C_0_SMBSUS interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I2C_0_SMBALERT ,I2C_0_SMBALERT interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 14. " I2C_0 ,I2C_0 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 13. " SPI_1 ,SPI_1 interrupt" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SPI_0 ,SPI_0 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 11. " UART_1 ,UART_1 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10. " UART_0 ,UART_0 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DMA ,DMA interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 8. " ENVM_1 ,ENVM_1 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 7. " ENVM_0 ,ENVM_0 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IAP ,IAP interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 5. " MAC ,MAC interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " RTCIF_PUB ,RTCIF_PUB interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RTCMATCHEVENT ,RTCMATCHEVENT interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " BROWNOUT3_3V ,BROWNOUT3_3V interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 1. " BROWNOUT1_5V ,BROWNOUT1_5V interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WDOGWAKEUP ,Wdog wake up interrupt assert" "Not asserted,Asserted"
|
|
line.long 0x04 "MSSIRQ_SRC_1,Source of interrupt for MSSINT[1]"
|
|
bitfld.long 0x04 31. " MSS_GPIO31 ,MSS_GPIO31 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 30. " MSS_GPIO30 ,MSS_GPIO30 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 29. " MSS_GPIO29 ,MSS_GPIO29 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 28. " MSS_GPIO28 ,MSS_GPIO28 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 27. " MSS_GPIO27 ,MSS_GPIO27 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 26. " MSS_GPIO26 ,MSS_GPIO26 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 25. " MSS_GPIO25 ,MSS_GPIO25 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 24. " MSS_GPIO24 ,MSS_GPIO24 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 23. " MSS_GPIO23 ,MSS_GPIO23 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 22. " MSS_GPIO22 ,MSS_GPIO22 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 21. " MSS_GPIO21 ,MSS_GPIO21 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 20. " MSS_GPIO20 ,MSS_GPIO20 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 19. " MSS_GPIO19 ,MSS_GPIO19 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 18. " MSS_GPIO18 ,MSS_GPIO18 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 17. " MSS_GPIO17 ,MSS_GPIO17 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 16. " MSS_GPIO16 ,MSS_GPIO16 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 15. " MSS_GPIO15 ,MSS_GPIO15 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 14. " MSS_GPIO14 ,MSS_GPIO14 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 13. " MSS_GPIO13 ,MSS_GPIO13 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 12. " MSS_GPIO12 ,MSS_GPIO12 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 11. " MSS_GPIO11 ,MSS_GPIO11 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " MSS_GPIO10 ,MSS_GPIO10 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 9. " MSS_GPIO9 ,MSS_GPIO9 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 8. " MSS_GPIO8 ,MSS_GPIO8 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 7. " MSS_GPIO7 ,MSS_GPIO7 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 6. " MSS_GPIO6 ,MSS_GPIO6 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 5. " MSS_GPIO5 ,MSS_GPIO5 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " MSS_GPIO4 ,MSS_GPIO4 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 3. " MSS_GPIO3 ,MSS_GPIO3 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 2. " MSS_GPIO2 ,MSS_GPIO2 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 1. " MSS_GPIO1 ,MSS_GPIO1 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 0. " MSS_GPIO0 ,MSS_GPIO0 interrupt assert" "Not asserted,Asserted"
|
|
line.long 0x08 "MSSIRQ_SRC_2,Source of interrupt for MSSINT[2]"
|
|
sif ((CPU()!="A2F060")&&(CPU()!="A2F200"))
|
|
bitfld.long 0x08 21. " CMP_9_R ,CMP_9_R interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x08 20. " CMP_8_R ,CMP_8_R interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
endif
|
|
sif (CPU()!="A2F060")
|
|
bitfld.long 0x08 19. " CMP_7_R ,CMP_7_R interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x08 18. " CMP_6_R ,CMP_6_R interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 17. " CMP_5_R ,CMP_5_R interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x08 16. " CMP_4_R ,CMP_4_R interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 15. " CMP_3_R ,CMP_3_R interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x08 14. " CMP_2_R ,CMP_2_R interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 13. " CMP_1_R ,CMP_1_R interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x08 12. " CMP_0_R ,CMP_0_R interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 11. " CMP_11_F ,CMP_11_F interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x08 10. " CMP_10_F ,CMP_10_F interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 7. " CMP_7_F ,CMP_7_F interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x08 6. " CMP_6_F ,CMP_6_F interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 5. " CMP_5_F ,CMP_5_F interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x08 4. " CMP_4_F ,CMP_4_F interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x08 3. " CMP_3_F ,CMP_3_F interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x08 2. " CMP_2_F ,CMP_2_F interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 1. " CMP_1_F ,CMP_1_F interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x08 0. " CMP_0_F ,CMP_0_F interrupt assert" "Not asserted,Asserted"
|
|
line.long 0x0C "MSSIRQ_SRC_3,Source of interrupt for MSSINT[3]"
|
|
bitfld.long 0x0C 11. " PC2_FLAG_3 ,PC2_FLAG_3 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x0C 10. " PC2_FLAG_2 ,PC2_FLAG_2 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x0C 9. " PC2_FLAG_1 ,PC2_FLAG_1 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 8. " PC2_FLAG_0 ,PC2_FLAG_0 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x0C 7. " PC1_FLAG_3 ,PC1_FLAG_3 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x0C 6. " PC1_FLAG_2 ,PC1_FLAG_2 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 5. " PC1_FLAG_1 ,PC1_FLAG_1 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x0C 4. " PC1_FLAG_0 ,PC1_FLAG_0 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x0C 3. " PC0_FLAG_3 ,PC0_FLAG_3 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " PC0_FLAG_2 ,PC0_FLAG_2 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x0C 1. " PC0_FLAG_1 ,PC0_FLAG_1 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x0C 0. " PC0_FLAG_0 ,PC0_FLAG_0 interrupt assert" "Not asserted,Asserted"
|
|
line.long 0x10 "MSSIRQ_SRC_4,Source of interrupt for MSSINT[4]"
|
|
bitfld.long 0x10 31. " PPE_THRESH31 ,PPE_THRESH31 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 30. " PPE_THRESH30 ,PPE_THRESH30 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 29. " PPE_THRESH29 ,PPE_THRESH29 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x10 28. " PPE_THRESH28 ,PPE_THRESH28 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 27. " PPE_THRESH27 ,PPE_THRESH27 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 26. " PPE_THRESH26 ,PPE_THRESH26 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x10 25. " PPE_THRESH25 ,PPE_THRESH25 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 24. " PPE_THRESH24 ,PPE_THRESH24 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 23. " PPE_THRESH23 ,PPE_THRESH23 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x10 22. " PPE_THRESH22 ,PPE_THRESH22 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 21. " PPE_THRESH21 ,PPE_THRESH21 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 20. " PPE_THRESH20 ,PPE_THRESH20 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x10 19. " PPE_THRESH19 ,PPE_THRESH19 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 18. " PPE_THRESH18 ,PPE_THRESH18 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 17. " PPE_THRESH17 ,PPE_THRESH17 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x10 16. " PPE_THRESH16 ,PPE_THRESH16 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 15. " PPE_THRESH15 ,PPE_THRESH15 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 14. " PPE_THRESH14 ,PPE_THRESH14 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x10 13. " PPE_THRESH13 ,PPE_THRESH13 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 12. " PPE_THRESH12 ,PPE_THRESH12 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 11. " PPE_THRESH11 ,PPE_THRESH11 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x10 10. " PPE_THRESH10 ,PPE_THRESH10 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 9. " PPE_THRESH9 ,PPE_THRESH9 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 8. " PPE_THRESH8 ,PPE_THRESH8 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x10 7. " PPE_THRESH7 ,PPE_THRESH7 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 6. " PPE_THRESH6 ,PPE_THRESH6 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 5. " PPE_THRESH5 ,PPE_THRESH5 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x10 4. " PPE_THRESH4 ,PPE_THRESH4 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 3. " PPE_THRESH3 ,PPE_THRESH3 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 2. " PPE_THRESH2 ,PPE_THRESH2 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x10 1. " PPE_THRESH1 ,PPE_THRESH1 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x10 0. " PPE_THRESH0 ,PPE_THRESH0 interrupt assert" "Not asserted,Asserted"
|
|
line.long 0x14 "MSSIRQ_SRC_5,Source of interrupt for MSSINT[5]"
|
|
sif (CPU()=="A2F500")
|
|
bitfld.long 0x14 8. " ADC_2_CAL_R ,ADC_2_CAL_R interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x14 7. " ADC_1_CAL_R ,ADC_1_CAL_R interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x14 6. " ADC_0_CAL_R ,ADC_0_CAL_R interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F200")
|
|
bitfld.long 0x14 7. " ADC_1_CAL_R ,ADC_1_CAL_R interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x14 6. " ADC_0_CAL_R ,ADC_0_CAL_R interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F060")
|
|
bitfld.long 0x14 6. " ADC_0_CAL_R ,ADC_0_CAL_R interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F500")
|
|
bitfld.long 0x14 5. " ADC_2_CAL_F ,ADC_2_CAL_F interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x14 4. " ADC_1_CAL_F ,ADC_1_CAL_F interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x14 3. " ADC_0_CAL_F ,ADC_0_CAL_F interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F200")
|
|
bitfld.long 0x14 4. " ADC_1_CAL_F ,ADC_1_CAL_F interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x14 3. " ADC_0_CAL_F ,ADC_0_CAL_F interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F060")
|
|
bitfld.long 0x14 3. " ADC_0_CAL_F ,ADC_0_CAL_F interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F500")
|
|
bitfld.long 0x14 2. " ADC_2_DV_R ,ADC_2_DV_R interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x14 1. " ADC_1_DV_R ,ADC_1_DV_R interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x14 0. " ADC_0_DV_R ,ADC_0_DV_R interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F200")
|
|
bitfld.long 0x14 1. " ADC_1_DV_R ,ADC_1_DV_R interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x14 0. " ADC_0_DV_R ,ADC_0_DV_R interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F060")
|
|
bitfld.long 0x14 0. " ADC_0_DV_R ,ADC_0_DV_R interrupt assert" "Not asserted,Asserted"
|
|
endif
|
|
line.long 0x18 "MSSIRQ_SRC_6,Source of interrupt for MSSINT[6]"
|
|
sif ((CPU()!="A2F060")&&(CPU()!="A2F200"))
|
|
bitfld.long 0x18 5. " ADC2_AFULL ,ADC2_AFULL interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x18 4. " ADC2_FULL ,ADC2_FULL interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
endif
|
|
sif (CPU()!="A2F060")
|
|
bitfld.long 0x18 3. " ADC1_AFULL ,ADC1_AFULL interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x18 2. " ADC1_FULL ,ADC1_FULL interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x18 1. " ADC0_AFULL ,ADC0_AFULL interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x18 0. " ADC0_FULL ,ADC0_FULL interrupt assert" "Not asserted,Asserted"
|
|
line.long 0x1C "MSSIRQ_SRC_7,Source of interrupt for MSSINT[7]"
|
|
sif (CPU()=="A2F500")
|
|
bitfld.long 0x1C 2. " ADC2_NOTEMPTY ,ADC2 not empty interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x1C 1. " ADC1_NOTEMPTY ,ADC1 not empty interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x1C 0. " ADC0_NOTEMPTY ,ADC0 not empty interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F200")
|
|
bitfld.long 0x1C 1. " ADC1_NOTEMPTY ,ADC1 not empty interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x1C 0. " ADC0_NOTEMPTY ,ADC0 not empty interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
endif
|
|
sif (CPU()=="A2F060")
|
|
bitfld.long 0x1C 0. " ADC0_NOTEMPTY ,ADC0 not empty interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
endif
|
|
else
|
|
group.long 0x00++0x1F
|
|
line.long 0x00 "MSSIRQ_EN_0,Enables/disables interrupt sources for MSSINT[0]"
|
|
bitfld.long 0x00 23. " PLLLOCKLOST ,PLL lock lost interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 22. " PLLLOCK ,PLL LOCK interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 20. " TIMER1 ,TIMER1 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " I2C_1_SMBSUS ,I2C_1_SMBSUS interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 18. " I2C_1_SMBALERT ,I2C_1_SMBALERT interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 16. " I2C_0_SMBSUS ,I2C_0_SMBSUS interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I2C_0_SMBALERT ,I2C_0_SMBALERT interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 14. " I2C_0 ,I2C_0 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 12. " SPI_0 ,SPI_0 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " UART_0 ,UART_0 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 9. " DMA ,DMA interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 8. " ENVM_1 ,ENVM_1 interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ENVM_0 ,ENVM_0 interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 6. " IAP ,IAP interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 4. " RTCIF_PUB ,RTCIF_PUB interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RTCMATCHEVENT ,RTCMATCHEVENT interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 2. " BROWNOUT3_3V ,BROWNOUT3_3V interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x00 1. " BROWNOUT1_5V ,BROWNOUT1_5V interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WDOGWAKEUP ,Wdog wake up interrupt enable" "Masked,Enabled"
|
|
line.long 0x04 "MSSIRQ_EN_1,Enables/disables interrupt sources for MSSINT[1]"
|
|
bitfld.long 0x04 31. " MSS_GPIO[31] ,MSS_GPIO[31] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 30. " MSS_GPIO[30] ,MSS_GPIO[30] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 29. " MSS_GPIO[29] ,MSS_GPIO[29] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " MSS_GPIO[28] ,MSS_GPIO[28] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 27. " MSS_GPIO[27] ,MSS_GPIO[27] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 26. " MSS_GPIO[26] ,MSS_GPIO[26] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " MSS_GPIO[25] ,MSS_GPIO[25] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 24. " MSS_GPIO[24] ,MSS_GPIO[24] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 23. " MSS_GPIO[23] ,MSS_GPIO[23] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " MSS_GPIO[22] ,MSS_GPIO[22] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 21. " MSS_GPIO[21] ,MSS_GPIO[21] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 20. " MSS_GPIO[20] ,MSS_GPIO[20] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " MSS_GPIO[19] ,MSS_GPIO[19] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 18. " MSS_GPIO[18] ,MSS_GPIO[18] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 17. " MSS_GPIO[17] ,MSS_GPIO[17] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " MSS_GPIO[16] ,MSS_GPIO[16] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 15. " MSS_GPIO[15] ,MSS_GPIO[15] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 14. " MSS_GPIO[14] ,MSS_GPIO[14] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " MSS_GPIO[13] ,MSS_GPIO[13] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 12. " MSS_GPIO[12] ,MSS_GPIO[12] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 11. " MSS_GPIO[11] ,MSS_GPIO[11] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " MSS_GPIO[10] ,MSS_GPIO[10] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 9. " MSS_GPIO[9] ,MSS_GPIO[9] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 8. " MSS_GPIO[8] ,MSS_GPIO[8] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " MSS_GPIO[7] ,MSS_GPIO[7] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 6. " MSS_GPIO[6] ,MSS_GPIO[6] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 5. " MSS_GPIO[5] ,MSS_GPIO[5] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " MSS_GPIO[4] ,MSS_GPIO[4] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 3. " MSS_GPIO[3] ,MSS_GPIO[3] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 2. " MSS_GPIO[2] ,MSS_GPIO[2] interrupt enable" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " MSS_GPIO[1] ,MSS_GPIO[1] interrupt enable" "Masked,Enabled"
|
|
bitfld.long 0x04 0. " MSS_GPIO[0] ,MSS_GPIO[0] interrupt enable" "Masked,Enabled"
|
|
line.long 0x08 "MSSIRQ_EN_2,Enables/disables Software interrupt sources for MSSINT[2]"
|
|
line.long 0x0C "MSSIRQ_EN_3,Enables/disables Timer2 interrupt sources for MSSINT[3]"
|
|
line.long 0x10 "MSSIRQ_EN_4,Enables/disables MAC interrupt sources for MSSINT[4]"
|
|
line.long 0x14 "MSSIRQ_EN_5,Enables/disables UART1 interrupt sources for MSSINT[5]"
|
|
line.long 0x18 "MSSIRQ_EN_6,Enables/disables I2C1 interrupt sources for MSSINT[6]"
|
|
line.long 0x1C "MSSIRQ_EN_7,Enables/disables SPI interrupt sources for MSSINT[7]"
|
|
rgroup.long 0x20++0x1F
|
|
line.long 0x00 "MSSIRQ_SRC_0,Source of interrupt for MSSINT[0]"
|
|
bitfld.long 0x00 23. " PLLLOCKLOST ,PLL lock lost interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 22. " PLLLOCK ,PLL LOCK interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 20. " TIMER1 ,TIMER1 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 19. " I2C_1_SMBSUS ,I2C_1_SMBSUS interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 18. " I2C_1_SMBALERT ,I2C_1_SMBALERT interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 16. " I2C_0_SMBSUS ,I2C_0_SMBSUS interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I2C_0_SMBALERT ,I2C_0_SMBALERT interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 14. " I2C_0 ,I2C_0 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 12. " SPI_0 ,SPI_0 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " UART_0 ,UART_0 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 9. " DMA ,DMA interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 8. " ENVM_1 ,ENVM_1 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ENVM_0 ,ENVM_0 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. " IAP ,IAP interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 4. " RTCIF_PUB ,RTCIF_PUB interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RTCMATCHEVENT ,RTCMATCHEVENT interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. " BROWNOUT3_3V ,BROWNOUT3_3V interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x00 1. " BROWNOUT1_5V ,BROWNOUT1_5V interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WDOGWAKEUP ,Wdog wake up interrupt assert" "Not asserted,Asserted"
|
|
line.long 0x04 "MSSIRQ_SRC_1,Source of interrupt for MSSINT[1]"
|
|
bitfld.long 0x04 31. " MSS_GPIO31 ,MSS_GPIO31 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 30. " MSS_GPIO30 ,MSS_GPIO30 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 29. " MSS_GPIO29 ,MSS_GPIO29 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 28. " MSS_GPIO28 ,MSS_GPIO28 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 27. " MSS_GPIO27 ,MSS_GPIO27 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 26. " MSS_GPIO26 ,MSS_GPIO26 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 25. " MSS_GPIO25 ,MSS_GPIO25 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 24. " MSS_GPIO24 ,MSS_GPIO24 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 23. " MSS_GPIO23 ,MSS_GPIO23 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 22. " MSS_GPIO22 ,MSS_GPIO22 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 21. " MSS_GPIO21 ,MSS_GPIO21 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 20. " MSS_GPIO20 ,MSS_GPIO20 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 19. " MSS_GPIO19 ,MSS_GPIO19 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 18. " MSS_GPIO18 ,MSS_GPIO18 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 17. " MSS_GPIO17 ,MSS_GPIO17 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 16. " MSS_GPIO16 ,MSS_GPIO16 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 15. " MSS_GPIO15 ,MSS_GPIO15 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 14. " MSS_GPIO14 ,MSS_GPIO14 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 13. " MSS_GPIO13 ,MSS_GPIO13 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 12. " MSS_GPIO12 ,MSS_GPIO12 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 11. " MSS_GPIO11 ,MSS_GPIO11 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 10. " MSS_GPIO10 ,MSS_GPIO10 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 9. " MSS_GPIO9 ,MSS_GPIO9 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 8. " MSS_GPIO8 ,MSS_GPIO8 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 7. " MSS_GPIO7 ,MSS_GPIO7 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 6. " MSS_GPIO6 ,MSS_GPIO6 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 5. " MSS_GPIO5 ,MSS_GPIO5 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 4. " MSS_GPIO4 ,MSS_GPIO4 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 3. " MSS_GPIO3 ,MSS_GPIO3 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 2. " MSS_GPIO2 ,MSS_GPIO2 interrupt assert" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x04 1. " MSS_GPIO1 ,MSS_GPIO1 interrupt assert" "Not asserted,Asserted"
|
|
bitfld.long 0x04 0. " MSS_GPIO0 ,MSS_GPIO0 interrupt assert" "Not asserted,Asserted"
|
|
line.long 0x08 "MSSIRQ_SRC_2,Software source of interrupt for MSSINT[2]"
|
|
line.long 0x0C "MSSIRQ_SRC_3,Timer2 of interrupt for MSSINT[3]"
|
|
line.long 0x10 "MSSIRQ_SRC_4,MAC Source of interrupt for MSSINT[4]"
|
|
line.long 0x14 "MSSIRQ_SRC_5,UART1 Source of interrupt for MSSINT[5]"
|
|
line.long 0x18 "MSSIRQ_SRC_6,I2C 1 Source of interrupt for MSSINT[6]"
|
|
line.long 0x1C "MSSIRQ_SRC_7,SPI 1 Source of interrupt for MSSINT[7]"
|
|
endif
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "FIIC_MR,Fabric interface interrupt controller mode register"
|
|
bitfld.long 0x00 0. " MODE ,Ace mode enable" "Non-ACE mode,ACE mode"
|
|
tree.end
|
|
tree "Analog Compute Engine (ACE)"
|
|
base ad:0x40020000
|
|
tree "ADC"
|
|
sif (CPU()=="A2F060")
|
|
width 15.
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SSE_TS_CTRL,Sample sequence engine time slot control"
|
|
sif (CPU()=="A2F500")
|
|
group.long 0x08++07
|
|
line.long 0x00 "ADC_SYNC_CONV,Synchronized ADC control"
|
|
bitfld.long 0x00 6. " CONVWAIT2 ,Waits for the conversion" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CONVWAIT1 ,Waits for the conversion" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CONVWAIT0 ,Waits for the conversion" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ADCSTART2 ,Start the conversion on ADC2" "Not forced,Forced"
|
|
bitfld.long 0x00 1. " ADCSTART1 ,Start the conversion on ADC1" "Not forced,Forced"
|
|
bitfld.long 0x00 0. " ADCSTART0 ,Start the conversion on ADC0" "Not forced,Forced"
|
|
line.long 0x04 "ANA_COMM_CTRL,Common analog block control"
|
|
bitfld.long 0x04 4. " ACB_RESETN ,Reset analog control block" "No effect,Reset"
|
|
bitfld.long 0x04 3. " ABPOWERON ,Analog block power enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " ADCSPWRDWN ,Power up/down ADC0, ADC1, and ADC2" "Power-up,Power-down"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ADCSRESET ,Reset ADC0, ADC1, and ADC2" "No effect,Reset"
|
|
bitfld.long 0x04 0. " VAREFSEL ,Select internal/external reference voltage for ADC0, ADC1, and ADC2" "Internal,External"
|
|
elif (CPU()=="A2F200")
|
|
group.long 0x08++07
|
|
line.long 0x00 "ADC_SYNC_CONV,Synchronized ADC control"
|
|
bitfld.long 0x00 5. " CONVWAIT1 ,Waits for the conversion" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CONVWAIT0 ,Waits for the conversion" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ADCSTART1 ,Start the conversion on ADC1" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ADCSTART0 ,Start the conversion on ADC0" "Not forced,Forced"
|
|
line.long 0x04 "ANA_COMM_CTRL,Common analog block control"
|
|
bitfld.long 0x04 4. " ACB_RESETN ,Reset analog control block" "No effect,Reset"
|
|
bitfld.long 0x04 3. " ABPOWERON ,Analog block power enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " ADCSPWRDWN ,Power up/down ADC0, ADC1" "Power-up,Power-down"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ADCSRESET ,Reset ADC0, ADC1" "No effect,Reset"
|
|
bitfld.long 0x04 0. " VAREFSEL ,Select internal/external reference voltage for ADC0, ADC1" "Internal,External"
|
|
elif (CPU()=="A2F060")
|
|
group.long 0x08++07
|
|
line.long 0x00 "ADC_SYNC_CONV,Synchronized ADC control"
|
|
bitfld.long 0x00 4. " CONVWAIT0 ,Waits for the conversion" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADCSTART0 ,Start the conversion on ADC0" "Not forced,Forced"
|
|
line.long 0x04 "ANA_COMM_CTRL,Common analog block control"
|
|
bitfld.long 0x04 4. " ACB_RESETN ,Reset analog control block" "No effect,Reset"
|
|
bitfld.long 0x04 3. " ABPOWERON ,Analog block power enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " ADCSPWRDWN ,Power up/down ADC0" "Power-up,Power-down"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ADCSRESET ,Reset ADC0" "No effect,Reset"
|
|
bitfld.long 0x04 0. " VAREFSEL ,Select internal/external reference voltage for ADC0" "Internal,External"
|
|
endif
|
|
group.long (0x50+0x0)++0x0F "ADC Channel 0"
|
|
line.long 0x00 "ADC0_CONV_CTRL,ADC 0 conversion control"
|
|
bitfld.long 0x00 7. " ADCSTART ,Start ADC0 conversion" "Not forced,Forced"
|
|
bitfld.long 0x00 6. " CONVWAIT ,Waits for the conversion" "Disable,Enable"
|
|
bitfld.long 0x00 0.--3. " AMUXSEL ,Analog multiplexer for ADC0" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
line.long 0x04 "ADC0_STC,ADC 0 sample time control"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ADC0_STC ,ADC0 sample time control"
|
|
line.long 0x08 "ADC0_TVC,ADC 0 time division control"
|
|
hexmask.long.byte 0x08 0.--7. 1. " ADC0_TVC ,ADC0 ACLK divider control"
|
|
line.long 0x0C "ADC0_MISC_CTRL,ADC 0 control register"
|
|
bitfld.long 0x0C 5. " PWRDWN_0 ,Power-up/down ADC_0" "Power up,Power down"
|
|
bitfld.long 0x0C 4. " ADCRESET ,Reset ADC_0" "No effect,Reset"
|
|
bitfld.long 0x0C 3. " CALIBRATE ,Disables calibration after conversion" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " PWRDWN ,Power-down ADC after conversion complete" "Enabled,Disabled"
|
|
bitfld.long 0x0C 0.--1. " RESOLUTION ,ADC resolution " "10-bit,12-bit,8-bit,?..."
|
|
rgroup.long (0x1000+0x0)++0x03
|
|
line.long 0x00 "ADC0_STATUS,Status of ADC 0"
|
|
bitfld.long 0x00 15. " CALIBRATE ,ADC0 calibrating" "Not calibrating,Calibrating"
|
|
bitfld.long 0x00 14. " SAMPLE ,ADC0 sampling analog input" "Not sampling,Sampling"
|
|
bitfld.long 0x00 13. " BUSY ,ADC0 is busy converting" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DATAVALID ,ADC0 finished conversion" "Converting,Finished"
|
|
hexmask.long.word 0x00 0.--11. 1. " ADC_RESULT ,ADC0 converted result"
|
|
group.long 0x1404++0x03
|
|
line.long 0x00 "PPE_CTRL,Post processing engine control"
|
|
elif (CPU()=="A2F200")
|
|
width 15.
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SSE_TS_CTRL,Sample sequence engine time slot control"
|
|
sif (CPU()=="A2F500")
|
|
group.long 0x08++07
|
|
line.long 0x00 "ADC_SYNC_CONV,Synchronized ADC control"
|
|
bitfld.long 0x00 6. " CONVWAIT2 ,Waits for the conversion" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CONVWAIT1 ,Waits for the conversion" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CONVWAIT0 ,Waits for the conversion" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ADCSTART2 ,Start the conversion on ADC2" "Not forced,Forced"
|
|
bitfld.long 0x00 1. " ADCSTART1 ,Start the conversion on ADC1" "Not forced,Forced"
|
|
bitfld.long 0x00 0. " ADCSTART0 ,Start the conversion on ADC0" "Not forced,Forced"
|
|
line.long 0x04 "ANA_COMM_CTRL,Common analog block control"
|
|
bitfld.long 0x04 4. " ACB_RESETN ,Reset analog control block" "No effect,Reset"
|
|
bitfld.long 0x04 3. " ABPOWERON ,Analog block power enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " ADCSPWRDWN ,Power up/down ADC0, ADC1, and ADC2" "Power-up,Power-down"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ADCSRESET ,Reset ADC0, ADC1, and ADC2" "No effect,Reset"
|
|
bitfld.long 0x04 0. " VAREFSEL ,Select internal/external reference voltage for ADC0, ADC1, and ADC2" "Internal,External"
|
|
elif (CPU()=="A2F200")
|
|
group.long 0x08++07
|
|
line.long 0x00 "ADC_SYNC_CONV,Synchronized ADC control"
|
|
bitfld.long 0x00 5. " CONVWAIT1 ,Waits for the conversion" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CONVWAIT0 ,Waits for the conversion" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ADCSTART1 ,Start the conversion on ADC1" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ADCSTART0 ,Start the conversion on ADC0" "Not forced,Forced"
|
|
line.long 0x04 "ANA_COMM_CTRL,Common analog block control"
|
|
bitfld.long 0x04 4. " ACB_RESETN ,Reset analog control block" "No effect,Reset"
|
|
bitfld.long 0x04 3. " ABPOWERON ,Analog block power enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " ADCSPWRDWN ,Power up/down ADC0, ADC1" "Power-up,Power-down"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ADCSRESET ,Reset ADC0, ADC1" "No effect,Reset"
|
|
bitfld.long 0x04 0. " VAREFSEL ,Select internal/external reference voltage for ADC0, ADC1" "Internal,External"
|
|
elif (CPU()=="A2F060")
|
|
group.long 0x08++07
|
|
line.long 0x00 "ADC_SYNC_CONV,Synchronized ADC control"
|
|
bitfld.long 0x00 4. " CONVWAIT0 ,Waits for the conversion" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADCSTART0 ,Start the conversion on ADC0" "Not forced,Forced"
|
|
line.long 0x04 "ANA_COMM_CTRL,Common analog block control"
|
|
bitfld.long 0x04 4. " ACB_RESETN ,Reset analog control block" "No effect,Reset"
|
|
bitfld.long 0x04 3. " ABPOWERON ,Analog block power enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " ADCSPWRDWN ,Power up/down ADC0" "Power-up,Power-down"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ADCSRESET ,Reset ADC0" "No effect,Reset"
|
|
bitfld.long 0x04 0. " VAREFSEL ,Select internal/external reference voltage for ADC0" "Internal,External"
|
|
endif
|
|
group.long (0x50+0x0)++0x0F "ADC Channel 0"
|
|
line.long 0x00 "ADC0_CONV_CTRL,ADC 0 conversion control"
|
|
bitfld.long 0x00 7. " ADCSTART ,Start ADC0 conversion" "Not forced,Forced"
|
|
bitfld.long 0x00 6. " CONVWAIT ,Waits for the conversion" "Disable,Enable"
|
|
bitfld.long 0x00 0.--3. " AMUXSEL ,Analog multiplexer for ADC0" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
line.long 0x04 "ADC0_STC,ADC 0 sample time control"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ADC0_STC ,ADC0 sample time control"
|
|
line.long 0x08 "ADC0_TVC,ADC 0 time division control"
|
|
hexmask.long.byte 0x08 0.--7. 1. " ADC0_TVC ,ADC0 ACLK divider control"
|
|
line.long 0x0C "ADC0_MISC_CTRL,ADC 0 control register"
|
|
bitfld.long 0x0C 5. " PWRDWN_0 ,Power-up/down ADC_0" "Power up,Power down"
|
|
bitfld.long 0x0C 4. " ADCRESET ,Reset ADC_0" "No effect,Reset"
|
|
bitfld.long 0x0C 3. " CALIBRATE ,Disables calibration after conversion" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " PWRDWN ,Power-down ADC after conversion complete" "Enabled,Disabled"
|
|
bitfld.long 0x0C 0.--1. " RESOLUTION ,ADC resolution " "10-bit,12-bit,8-bit,?..."
|
|
rgroup.long (0x1000+0x0)++0x03
|
|
line.long 0x00 "ADC0_STATUS,Status of ADC 0"
|
|
bitfld.long 0x00 15. " CALIBRATE ,ADC0 calibrating" "Not calibrating,Calibrating"
|
|
bitfld.long 0x00 14. " SAMPLE ,ADC0 sampling analog input" "Not sampling,Sampling"
|
|
bitfld.long 0x00 13. " BUSY ,ADC0 is busy converting" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DATAVALID ,ADC0 finished conversion" "Converting,Finished"
|
|
hexmask.long.word 0x00 0.--11. 1. " ADC_RESULT ,ADC0 converted result"
|
|
group.long (0x50+0x40)++0x0F "ADC Channel 1"
|
|
line.long 0x00 "ADC1_CONV_CTRL,ADC 1 conversion control"
|
|
bitfld.long 0x00 7. " ADCSTART ,Start ADC1 conversion" "Not forced,Forced"
|
|
bitfld.long 0x00 6. " CONVWAIT ,Waits for the conversion" "Disable,Enable"
|
|
bitfld.long 0x00 0.--3. " AMUXSEL ,Analog multiplexer for ADC1" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
line.long 0x04 "ADC1_STC,ADC 1 sample time control"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ADC1_STC ,ADC1 sample time control"
|
|
line.long 0x08 "ADC1_TVC,ADC 1 time division control"
|
|
hexmask.long.byte 0x08 0.--7. 1. " ADC1_TVC ,ADC1 ACLK divider control"
|
|
line.long 0x0C "ADC1_MISC_CTRL,ADC 1 control register"
|
|
bitfld.long 0x0C 5. " PWRDWN_1 ,Power-up/down ADC_1" "Power up,Power down"
|
|
bitfld.long 0x0C 4. " ADCRESET ,Reset ADC_1" "No effect,Reset"
|
|
bitfld.long 0x0C 3. " CALIBRATE ,Disables calibration after conversion" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " PWRDWN ,Power-down ADC after conversion complete" "Enabled,Disabled"
|
|
bitfld.long 0x0C 0.--1. " RESOLUTION ,ADC resolution " "10-bit,12-bit,8-bit,?..."
|
|
rgroup.long (0x1000+0x4)++0x03
|
|
line.long 0x00 "ADC1_STATUS,Status of ADC 1"
|
|
bitfld.long 0x00 15. " CALIBRATE ,ADC1 calibrating" "Not calibrating,Calibrating"
|
|
bitfld.long 0x00 14. " SAMPLE ,ADC1 sampling analog input" "Not sampling,Sampling"
|
|
bitfld.long 0x00 13. " BUSY ,ADC1 is busy converting" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DATAVALID ,ADC1 finished conversion" "Converting,Finished"
|
|
hexmask.long.word 0x00 0.--11. 1. " ADC_RESULT ,ADC1 converted result"
|
|
group.long 0x1404++0x03
|
|
line.long 0x00 "PPE_CTRL,Post processing engine control"
|
|
elif (CPU()=="A2F500")
|
|
width 15.
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SSE_TS_CTRL,Sample sequence engine time slot control"
|
|
sif (CPU()=="A2F500")
|
|
group.long 0x08++07
|
|
line.long 0x00 "ADC_SYNC_CONV,Synchronized ADC control"
|
|
bitfld.long 0x00 6. " CONVWAIT2 ,Waits for the conversion" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CONVWAIT1 ,Waits for the conversion" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CONVWAIT0 ,Waits for the conversion" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ADCSTART2 ,Start the conversion on ADC2" "Not forced,Forced"
|
|
bitfld.long 0x00 1. " ADCSTART1 ,Start the conversion on ADC1" "Not forced,Forced"
|
|
bitfld.long 0x00 0. " ADCSTART0 ,Start the conversion on ADC0" "Not forced,Forced"
|
|
line.long 0x04 "ANA_COMM_CTRL,Common analog block control"
|
|
bitfld.long 0x04 4. " ACB_RESETN ,Reset analog control block" "No effect,Reset"
|
|
bitfld.long 0x04 3. " ABPOWERON ,Analog block power enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " ADCSPWRDWN ,Power up/down ADC0, ADC1, and ADC2" "Power-up,Power-down"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ADCSRESET ,Reset ADC0, ADC1, and ADC2" "No effect,Reset"
|
|
bitfld.long 0x04 0. " VAREFSEL ,Select internal/external reference voltage for ADC0, ADC1, and ADC2" "Internal,External"
|
|
elif (CPU()=="A2F200")
|
|
group.long 0x08++07
|
|
line.long 0x00 "ADC_SYNC_CONV,Synchronized ADC control"
|
|
bitfld.long 0x00 5. " CONVWAIT1 ,Waits for the conversion" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CONVWAIT0 ,Waits for the conversion" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ADCSTART1 ,Start the conversion on ADC1" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ADCSTART0 ,Start the conversion on ADC0" "Not forced,Forced"
|
|
line.long 0x04 "ANA_COMM_CTRL,Common analog block control"
|
|
bitfld.long 0x04 4. " ACB_RESETN ,Reset analog control block" "No effect,Reset"
|
|
bitfld.long 0x04 3. " ABPOWERON ,Analog block power enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " ADCSPWRDWN ,Power up/down ADC0, ADC1" "Power-up,Power-down"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ADCSRESET ,Reset ADC0, ADC1" "No effect,Reset"
|
|
bitfld.long 0x04 0. " VAREFSEL ,Select internal/external reference voltage for ADC0, ADC1" "Internal,External"
|
|
elif (CPU()=="A2F060")
|
|
group.long 0x08++07
|
|
line.long 0x00 "ADC_SYNC_CONV,Synchronized ADC control"
|
|
bitfld.long 0x00 4. " CONVWAIT0 ,Waits for the conversion" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADCSTART0 ,Start the conversion on ADC0" "Not forced,Forced"
|
|
line.long 0x04 "ANA_COMM_CTRL,Common analog block control"
|
|
bitfld.long 0x04 4. " ACB_RESETN ,Reset analog control block" "No effect,Reset"
|
|
bitfld.long 0x04 3. " ABPOWERON ,Analog block power enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " ADCSPWRDWN ,Power up/down ADC0" "Power-up,Power-down"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ADCSRESET ,Reset ADC0" "No effect,Reset"
|
|
bitfld.long 0x04 0. " VAREFSEL ,Select internal/external reference voltage for ADC0" "Internal,External"
|
|
endif
|
|
group.long (0x50+0x0)++0x0F "ADC Channel 0"
|
|
line.long 0x00 "ADC0_CONV_CTRL,ADC 0 conversion control"
|
|
bitfld.long 0x00 7. " ADCSTART ,Start ADC0 conversion" "Not forced,Forced"
|
|
bitfld.long 0x00 6. " CONVWAIT ,Waits for the conversion" "Disable,Enable"
|
|
bitfld.long 0x00 0.--3. " AMUXSEL ,Analog multiplexer for ADC0" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
line.long 0x04 "ADC0_STC,ADC 0 sample time control"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ADC0_STC ,ADC0 sample time control"
|
|
line.long 0x08 "ADC0_TVC,ADC 0 time division control"
|
|
hexmask.long.byte 0x08 0.--7. 1. " ADC0_TVC ,ADC0 ACLK divider control"
|
|
line.long 0x0C "ADC0_MISC_CTRL,ADC 0 control register"
|
|
bitfld.long 0x0C 5. " PWRDWN_0 ,Power-up/down ADC_0" "Power up,Power down"
|
|
bitfld.long 0x0C 4. " ADCRESET ,Reset ADC_0" "No effect,Reset"
|
|
bitfld.long 0x0C 3. " CALIBRATE ,Disables calibration after conversion" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " PWRDWN ,Power-down ADC after conversion complete" "Enabled,Disabled"
|
|
bitfld.long 0x0C 0.--1. " RESOLUTION ,ADC resolution " "10-bit,12-bit,8-bit,?..."
|
|
rgroup.long (0x1000+0x0)++0x03
|
|
line.long 0x00 "ADC0_STATUS,Status of ADC 0"
|
|
bitfld.long 0x00 15. " CALIBRATE ,ADC0 calibrating" "Not calibrating,Calibrating"
|
|
bitfld.long 0x00 14. " SAMPLE ,ADC0 sampling analog input" "Not sampling,Sampling"
|
|
bitfld.long 0x00 13. " BUSY ,ADC0 is busy converting" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DATAVALID ,ADC0 finished conversion" "Converting,Finished"
|
|
hexmask.long.word 0x00 0.--11. 1. " ADC_RESULT ,ADC0 converted result"
|
|
group.long (0x50+0x40)++0x0F "ADC Channel 1"
|
|
line.long 0x00 "ADC1_CONV_CTRL,ADC 1 conversion control"
|
|
bitfld.long 0x00 7. " ADCSTART ,Start ADC1 conversion" "Not forced,Forced"
|
|
bitfld.long 0x00 6. " CONVWAIT ,Waits for the conversion" "Disable,Enable"
|
|
bitfld.long 0x00 0.--3. " AMUXSEL ,Analog multiplexer for ADC1" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
line.long 0x04 "ADC1_STC,ADC 1 sample time control"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ADC1_STC ,ADC1 sample time control"
|
|
line.long 0x08 "ADC1_TVC,ADC 1 time division control"
|
|
hexmask.long.byte 0x08 0.--7. 1. " ADC1_TVC ,ADC1 ACLK divider control"
|
|
line.long 0x0C "ADC1_MISC_CTRL,ADC 1 control register"
|
|
bitfld.long 0x0C 5. " PWRDWN_1 ,Power-up/down ADC_1" "Power up,Power down"
|
|
bitfld.long 0x0C 4. " ADCRESET ,Reset ADC_1" "No effect,Reset"
|
|
bitfld.long 0x0C 3. " CALIBRATE ,Disables calibration after conversion" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " PWRDWN ,Power-down ADC after conversion complete" "Enabled,Disabled"
|
|
bitfld.long 0x0C 0.--1. " RESOLUTION ,ADC resolution " "10-bit,12-bit,8-bit,?..."
|
|
rgroup.long (0x1000+0x4)++0x03
|
|
line.long 0x00 "ADC1_STATUS,Status of ADC 1"
|
|
bitfld.long 0x00 15. " CALIBRATE ,ADC1 calibrating" "Not calibrating,Calibrating"
|
|
bitfld.long 0x00 14. " SAMPLE ,ADC1 sampling analog input" "Not sampling,Sampling"
|
|
bitfld.long 0x00 13. " BUSY ,ADC1 is busy converting" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DATAVALID ,ADC1 finished conversion" "Converting,Finished"
|
|
hexmask.long.word 0x00 0.--11. 1. " ADC_RESULT ,ADC1 converted result"
|
|
group.long (0x50+0x80)++0x0F "ADC Channel 2"
|
|
line.long 0x00 "ADC2_CONV_CTRL,ADC 2 conversion control"
|
|
bitfld.long 0x00 7. " ADCSTART ,Start ADC2 conversion" "Not forced,Forced"
|
|
bitfld.long 0x00 6. " CONVWAIT ,Waits for the conversion" "Disable,Enable"
|
|
bitfld.long 0x00 0.--3. " AMUXSEL ,Analog multiplexer for ADC2" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
line.long 0x04 "ADC2_STC,ADC 2 sample time control"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ADC2_STC ,ADC2 sample time control"
|
|
line.long 0x08 "ADC2_TVC,ADC 2 time division control"
|
|
hexmask.long.byte 0x08 0.--7. 1. " ADC2_TVC ,ADC2 ACLK divider control"
|
|
line.long 0x0C "ADC2_MISC_CTRL,ADC 2 control register"
|
|
bitfld.long 0x0C 5. " PWRDWN_2 ,Power-up/down ADC_2" "Power up,Power down"
|
|
bitfld.long 0x0C 4. " ADCRESET ,Reset ADC_2" "No effect,Reset"
|
|
bitfld.long 0x0C 3. " CALIBRATE ,Disables calibration after conversion" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " PWRDWN ,Power-down ADC after conversion complete" "Enabled,Disabled"
|
|
bitfld.long 0x0C 0.--1. " RESOLUTION ,ADC resolution " "10-bit,12-bit,8-bit,?..."
|
|
rgroup.long (0x1000+0x8)++0x03
|
|
line.long 0x00 "ADC2_STATUS,Status of ADC 2"
|
|
bitfld.long 0x00 15. " CALIBRATE ,ADC2 calibrating" "Not calibrating,Calibrating"
|
|
bitfld.long 0x00 14. " SAMPLE ,ADC2 sampling analog input" "Not sampling,Sampling"
|
|
bitfld.long 0x00 13. " BUSY ,ADC2 is busy converting" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DATAVALID ,ADC2 finished conversion" "Converting,Finished"
|
|
hexmask.long.word 0x00 0.--11. 1. " ADC_RESULT ,ADC2 converted result"
|
|
group.long 0x1404++0x03
|
|
line.long 0x00 "PPE_CTRL,Post processing engine control"
|
|
endif
|
|
tree.end
|
|
tree "DAC"
|
|
sif (CPU()=="A2F060")
|
|
width 14.
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DAC_SYNC_CTRL,Common SDD control"
|
|
bitfld.long 0x00 6. " DAC_SYNC_EN ,SDD2 synchronized update enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DAC_SYNC_EN ,SDD1 synchronized update enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DAC_SYNC_EN ,SDD0 synchronized update enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DAC_SYNC_UPDATE ,SDD2 synchronized update" "Not forced,Forced"
|
|
bitfld.long 0x00 1. " DAC_SYNC_UPDATE ,SDD1 synchronized update" "Not forced,Forced"
|
|
bitfld.long 0x00 0. " DAC_SYNC_UPDATE ,SDD0 synchronized update" "Not forced,Forced"
|
|
group.long 0x60++0x0F
|
|
line.long 0x00 "DAC0_CTRL,SDD0 control"
|
|
bitfld.long 0x00 6. " REG_SEL ,selects the data source for the lower two bytes" "DAC_BYTE1[7:0] concatenated with DAC_BYTE0[7:0],DAC_BYTES01[15:0]"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EN ,SDD0 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SW_OBD ,Register data bit used to drive the analog one-bit DAC" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " DAC_RES[1:0] ,SDD0 modulator input resolution" "8 bits,16 bits,24 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " DAC_SEL[1:0] ,SDD0 input bit source selection" "ACE 1-bit sigma-delta,signal F2ASDDn and F2ASDDCLKn,SW_OBD bit,?..."
|
|
line.long 0x04 "DAC0_BYTE0,SDD0 byte 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DAC_BYTE0[7:0] ,LSB of data input to the sigma-delta modulator"
|
|
line.long 0x08 "DAC0_BYTE1,SDD0 byte 1"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DAC_BYTE0[7:0] ,Bits [15:8] of data input to the sigma-delta modulator"
|
|
line.long 0x0C "DAC0_BYTE2,SDD0 byte 2"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " DAC_BYTE0[7:0] ,Bits [23:16] of data input to the sigma-delta modulator"
|
|
textline ""
|
|
width 18.
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "SSE_DAC0_BYTES01,SSE SDD0 byte 0 and byte 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " DAC_BYTE01[15:0] ,Bits [15:0] of the data input to the sigma-delta modulator"
|
|
width 0xB
|
|
elif (CPU()=="A2F200")
|
|
width 14.
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DAC_SYNC_CTRL,Common SDD control"
|
|
bitfld.long 0x00 6. " DAC_SYNC_EN ,SDD2 synchronized update enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DAC_SYNC_EN ,SDD1 synchronized update enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DAC_SYNC_EN ,SDD0 synchronized update enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DAC_SYNC_UPDATE ,SDD2 synchronized update" "Not forced,Forced"
|
|
bitfld.long 0x00 1. " DAC_SYNC_UPDATE ,SDD1 synchronized update" "Not forced,Forced"
|
|
bitfld.long 0x00 0. " DAC_SYNC_UPDATE ,SDD0 synchronized update" "Not forced,Forced"
|
|
group.long 0x60++0x0F
|
|
line.long 0x00 "DAC0_CTRL,SDD0 control"
|
|
bitfld.long 0x00 6. " REG_SEL ,selects the data source for the lower two bytes" "DAC_BYTE1[7:0] concatenated with DAC_BYTE0[7:0],DAC_BYTES01[15:0]"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EN ,SDD0 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SW_OBD ,Register data bit used to drive the analog one-bit DAC" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " DAC_RES[1:0] ,SDD0 modulator input resolution" "8 bits,16 bits,24 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " DAC_SEL[1:0] ,SDD0 input bit source selection" "ACE 1-bit sigma-delta,signal F2ASDDn and F2ASDDCLKn,SW_OBD bit,?..."
|
|
line.long 0x04 "DAC0_BYTE0,SDD0 byte 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DAC_BYTE0[7:0] ,LSB of data input to the sigma-delta modulator"
|
|
line.long 0x08 "DAC0_BYTE1,SDD0 byte 1"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DAC_BYTE0[7:0] ,Bits [15:8] of data input to the sigma-delta modulator"
|
|
line.long 0x0C "DAC0_BYTE2,SDD0 byte 2"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " DAC_BYTE0[7:0] ,Bits [23:16] of data input to the sigma-delta modulator"
|
|
group.long 0xA0++0x0F
|
|
line.long 0x00 "DAC1_CTRL,SDD0 control"
|
|
bitfld.long 0x00 6. " REG_SEL ,selects the data source for the lower two bytes" "DAC_BYTE1[7:0] concatenated with DAC_BYTE0[7:0],DAC_BYTES01[15:0]"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EN ,SDD0 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SW_OBD ,Register data bit used to drive the analog one-bit DAC" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " DAC_RES[1:0] ,SDD0 modulator input resolution" "8 bits,16 bits,24 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " DAC_SEL[1:0] ,SDD0 input bit source selection" "ACE 1-bit sigma-delta,signal F2ASDDn and F2ASDDCLKn,SW_OBD bit,?..."
|
|
line.long 0x04 "DAC1_BYTE0,SDD1 byte 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DAC_BYTE0[7:0] ,LSB of data input to the sigma-delta modulator"
|
|
line.long 0x08 "DAC1_BYTE1,SDD1 byte 1"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DAC_BYTE0[7:0] ,Bits [15:8] of data input to the sigma-delta modulator"
|
|
line.long 0x0C "DAC1_BYTE2,SDD1 byte 2"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " DAC_BYTE0[7:0] ,Bits [23:16] of data input to the sigma-delta modulator"
|
|
textline ""
|
|
width 18.
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "SSE_DAC0_BYTES01,SSE SDD0 byte 0 and byte 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " DAC_BYTE01[15:0] ,Bits [15:0] of the data input to the sigma-delta modulator"
|
|
group.long 0x504++0x03
|
|
line.long 0x00 "SSE_DAC1_BYTES01,SSE SDD1 byte 0 and byte 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " DAC_BYTE01[15:0] ,Bits [15:0] of the data input to the sigma-delta modulator"
|
|
width 0xB
|
|
elif (CPU()=="A2F500")
|
|
width 14.
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "DAC_SYNC_CTRL,Common SDD control"
|
|
bitfld.long 0x00 6. " DAC_SYNC_EN ,SDD2 synchronized update enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DAC_SYNC_EN ,SDD1 synchronized update enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DAC_SYNC_EN ,SDD0 synchronized update enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DAC_SYNC_UPDATE ,SDD2 synchronized update" "Not forced,Forced"
|
|
bitfld.long 0x00 1. " DAC_SYNC_UPDATE ,SDD1 synchronized update" "Not forced,Forced"
|
|
bitfld.long 0x00 0. " DAC_SYNC_UPDATE ,SDD0 synchronized update" "Not forced,Forced"
|
|
group.long 0x60++0x0F
|
|
line.long 0x00 "DAC0_CTRL,SDD0 control"
|
|
bitfld.long 0x00 6. " REG_SEL ,selects the data source for the lower two bytes" "DAC_BYTE1[7:0] concatenated with DAC_BYTE0[7:0],DAC_BYTES01[15:0]"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EN ,SDD0 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SW_OBD ,Register data bit used to drive the analog one-bit DAC" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " DAC_RES[1:0] ,SDD0 modulator input resolution" "8 bits,16 bits,24 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " DAC_SEL[1:0] ,SDD0 input bit source selection" "ACE 1-bit sigma-delta,signal F2ASDDn and F2ASDDCLKn,SW_OBD bit,?..."
|
|
line.long 0x04 "DAC0_BYTE0,SDD0 byte 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DAC_BYTE0[7:0] ,LSB of data input to the sigma-delta modulator"
|
|
line.long 0x08 "DAC0_BYTE1,SDD0 byte 1"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DAC_BYTE0[7:0] ,Bits [15:8] of data input to the sigma-delta modulator"
|
|
line.long 0x0C "DAC0_BYTE2,SDD0 byte 2"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " DAC_BYTE0[7:0] ,Bits [23:16] of data input to the sigma-delta modulator"
|
|
group.long 0xA0++0x0F
|
|
line.long 0x00 "DAC1_CTRL,SDD0 control"
|
|
bitfld.long 0x00 6. " REG_SEL ,selects the data source for the lower two bytes" "DAC_BYTE1[7:0] concatenated with DAC_BYTE0[7:0],DAC_BYTES01[15:0]"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EN ,SDD0 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SW_OBD ,Register data bit used to drive the analog one-bit DAC" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " DAC_RES[1:0] ,SDD0 modulator input resolution" "8 bits,16 bits,24 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " DAC_SEL[1:0] ,SDD0 input bit source selection" "ACE 1-bit sigma-delta,signal F2ASDDn and F2ASDDCLKn,SW_OBD bit,?..."
|
|
line.long 0x04 "DAC1_BYTE0,SDD1 byte 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DAC_BYTE0[7:0] ,LSB of data input to the sigma-delta modulator"
|
|
line.long 0x08 "DAC1_BYTE1,SDD1 byte 1"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DAC_BYTE0[7:0] ,Bits [15:8] of data input to the sigma-delta modulator"
|
|
line.long 0x0C "DAC1_BYTE2,SDD1 byte 2"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " DAC_BYTE0[7:0] ,Bits [23:16] of data input to the sigma-delta modulator"
|
|
group.long 0xE0++0x0F
|
|
line.long 0x00 "DAC2_CTRL,SDD0 control"
|
|
bitfld.long 0x00 6. " REG_SEL ,selects the data source for the lower two bytes" "DAC_BYTE1[7:0] concatenated with DAC_BYTE0[7:0],DAC_BYTES01[15:0]"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EN ,SDD0 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SW_OBD ,Register data bit used to drive the analog one-bit DAC" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " DAC_RES[1:0] ,SDD0 modulator input resolution" "8 bits,16 bits,24 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " DAC_SEL[1:0] ,SDD0 input bit source selection" "ACE 1-bit sigma-delta,signal F2ASDDn and F2ASDDCLKn,SW_OBD bit,?..."
|
|
line.long 0x04 "DAC2_BYTE0,SDD2 byte 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DAC_BYTE0[7:0] ,LSB of data input to the sigma-delta modulator"
|
|
line.long 0x08 "DAC2_BYTE1,SDD2 byte 1"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DAC_BYTE0[7:0] ,Bits [15:8] of data input to the sigma-delta modulator"
|
|
line.long 0x0C "DAC2_BYTE2,SDD2 byte 2"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " DAC_BYTE0[7:0] ,Bits [23:16] of data input to the sigma-delta modulator"
|
|
textline ""
|
|
width 18.
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "SSE_DAC0_BYTES01,SSE SDD0 byte 0 and byte 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " DAC_BYTE01[15:0] ,Bits [15:0] of the data input to the sigma-delta modulator"
|
|
group.long 0x504++0x03
|
|
line.long 0x00 "SSE_DAC1_BYTES01,SSE SDD1 byte 0 and byte 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " DAC_BYTE01[15:0] ,Bits [15:0] of the data input to the sigma-delta modulator"
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "SSE_DAC2_BYTES01,SSE SDD2 byte 0 and byte 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " DAC_BYTE01[15:0] ,Bits [15:0] of the data input to the sigma-delta modulator"
|
|
width 0xB
|
|
endif
|
|
tree.end
|
|
tree "High-Speed Comparators"
|
|
width 18.
|
|
sif (CPU()=="A2F060")
|
|
rgroup.long 0x100C++0x03
|
|
line.long 0x00 "COMPARATOR_STATUS,Comparator Output Levels"
|
|
bitfld.long 0x00 1. " COMPARATOR1 ,CMP1 Output" "Low,High"
|
|
bitfld.long 0x00 0. " COMPARATOR0 ,CMP0 Output" "Low,High"
|
|
group.long 0x120C++0x07
|
|
line.long 0x00 "IRQ_EN,Enable interrupt"
|
|
bitfld.long 0x00 13. " IRQ_CMP1_R_E ,Enable inerrupt for CMP1 Output Rising" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IRQ_CMP0_R_E ,Enable inerrupt for CMP0 Output Rising" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQ_CMP1_F_E ,Enable inerrupt for CMP1 Output Falling" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IRQ_CMP0_F_E ,Enable inerrupt for CMP0 Output Falling" "Disabled,Enabled"
|
|
line.long 0x04 "COMP_IRQ,Comparator interrupt"
|
|
setclrfld.long 0x04 13. 0x04 13. 0x08 13. " IRQ_CMP1_R ,CMP1 output rising interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x08 12. " IRQ_CMP0_R ,CMP0 output rising interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x08 1. " IRQ_CMP1_F ,CMP1 output falling interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x08 0. " IRQ_CMP0_F ,CMP0 output falling interrupt" "No interrupt,Interrupt"
|
|
elif (CPU()=="A2F200")
|
|
rgroup.long 0x100C++0x03
|
|
line.long 0x00 "COMPARATOR_STATUS,Comparator Output Levels"
|
|
bitfld.long 0x00 7. " COMPARATOR7 ,CMP7 Output" "Low,High"
|
|
bitfld.long 0x00 6. " COMPARATOR6 ,CMP6 Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " COMPARATOR5 ,CMP5 Output" "Low,High"
|
|
bitfld.long 0x00 4. " COMPARATOR4 ,CMP4 Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " COMPARATOR3 ,CMP3 Output" "Low,High"
|
|
bitfld.long 0x00 2. " COMPARATOR2 ,CMP2 Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " COMPARATOR1 ,CMP1 Output" "Low,High"
|
|
bitfld.long 0x00 0. " COMPARATOR0 ,CMP0 Output" "Low,High"
|
|
group.long 0x120C++0x07
|
|
line.long 0x00 "IRQ_EN,Enable interrupt"
|
|
bitfld.long 0x00 19. " IRQ_CMP7_R_E ,Enable inerrupt for CMP7 Output Rising" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " IRQ_CMP6_R_E ,Enable inerrupt for CMP6 Output Rising" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " IRQ_CMP5_R_E ,Enable inerrupt for CMP5 Output Rising" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " IRQ_CMP4_R_E ,Enable inerrupt for CMP4 Output Rising" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQ_CMP3_R_E ,Enable inerrupt for CMP3 Output Rising" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " IRQ_CMP2_R_E ,Enable inerrupt for CMP2 Output Rising" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQ_CMP1_R_E ,Enable inerrupt for CMP1 Output Rising" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IRQ_CMP0_R_E ,Enable inerrupt for CMP0 Output Rising" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQ_CMP7_F_E ,Enable inerrupt for CMP7 Output Falling" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IRQ_CMP6_F_E ,Enable inerrupt for CMP6 Output Falling" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " IRQ_CMP5_F_E ,Enable inerrupt for CMP5 Output Falling" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IRQ_CMP4_F_E ,Enable inerrupt for CMP4 Output Falling" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IRQ_CMP3_F_E ,Enable inerrupt for CMP3 Output Falling" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IRQ_CMP2_F_E ,Enable inerrupt for CMP2 Output Falling" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQ_CMP1_F_E ,Enable inerrupt for CMP1 Output Falling" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IRQ_CMP0_F_E ,Enable inerrupt for CMP0 Output Falling" "Disabled,Enabled"
|
|
line.long 0x04 "COMP_IRQ,Comparator interrupt"
|
|
setclrfld.long 0x04 19. 0x04 19. 0x08 19. " IRQ_CMP7_R ,CMP7 output rising interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x08 18. " IRQ_CMP6_R ,CMP6 output rising interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 17. 0x04 17. 0x08 17. " IRQ_CMP5_R ,CMP5 output rising interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x08 16. " IRQ_CMP4_R ,CMP4 output rising interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 15. 0x04 15. 0x08 15. " IRQ_CMP3_R ,CMP3 output rising interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x08 14. " IRQ_CMP2_R ,CMP2 output rising interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x08 13. " IRQ_CMP1_R ,CMP1 output rising interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x08 12. " IRQ_CMP0_R ,CMP0 output rising interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x08 7. " IRQ_CMP7_F ,CMP7 output falling interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x08 6. " IRQ_CMP6_F ,CMP6 output falling interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 5. 0x04 5. 0x08 5. " IRQ_CMP5_F ,CMP5 output falling interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x08 4. " IRQ_CMP4_F ,CMP4 output falling interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 3. 0x04 3. 0x08 3. " IRQ_CMP3_F ,CMP3 output falling interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x08 2. " IRQ_CMP2_F ,CMP2 output falling interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x08 1. " IRQ_CMP1_F ,CMP1 output falling interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x08 0. " IRQ_CMP0_F ,CMP0 output falling interrupt" "No interrupt,Interrupt"
|
|
elif (CPU()=="A2F500")
|
|
rgroup.long 0x100C++0x03
|
|
line.long 0x00 "COMPARATOR_STATUS,Comparator Output Levels"
|
|
bitfld.long 0x00 9. " COMPARATOR9 ,CMP9 Output" "Low,High"
|
|
bitfld.long 0x00 8. " COMPARATOR8 ,CMP8 Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " COMPARATOR7 ,CMP7 Output" "Low,High"
|
|
bitfld.long 0x00 6. " COMPARATOR6 ,CMP6 Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " COMPARATOR5 ,CMP5 Output" "Low,High"
|
|
bitfld.long 0x00 4. " COMPARATOR4 ,CMP4 Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " COMPARATOR3 ,CMP3 Output" "Low,High"
|
|
bitfld.long 0x00 2. " COMPARATOR2 ,CMP2 Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " COMPARATOR1 ,CMP1 Output" "Low,High"
|
|
bitfld.long 0x00 0. " COMPARATOR0 ,CMP0 Output" "Low,High"
|
|
group.long 0x120C++0x07
|
|
line.long 0x00 "IRQ_EN,Enable interrupt"
|
|
bitfld.long 0x00 21. " IRQ_CMP9_R_E ,Enable inerrupt for CMP9 Output Rising" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " IRQ_CMP8_R_E ,Enable inerrupt for CMP8 Output Rising" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ_CMP7_R_E ,Enable inerrupt for CMP7 Output Rising" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " IRQ_CMP6_R_E ,Enable inerrupt for CMP6 Output Rising" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " IRQ_CMP5_R_E ,Enable inerrupt for CMP5 Output Rising" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " IRQ_CMP4_R_E ,Enable inerrupt for CMP4 Output Rising" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQ_CMP3_R_E ,Enable inerrupt for CMP3 Output Rising" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " IRQ_CMP2_R_E ,Enable inerrupt for CMP2 Output Rising" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQ_CMP1_R_E ,Enable inerrupt for CMP1 Output Rising" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IRQ_CMP0_R_E ,Enable inerrupt for CMP0 Output Rising" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " IRQ_CMP9_F_E ,Enable inerrupt for CMP9 Output Falling" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IRQ_CMP8_F_E ,Enable inerrupt for CMP8 Output Falling" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQ_CMP7_F_E ,Enable inerrupt for CMP7 Output Falling" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IRQ_CMP6_F_E ,Enable inerrupt for CMP6 Output Falling" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " IRQ_CMP5_F_E ,Enable inerrupt for CMP5 Output Falling" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IRQ_CMP4_F_E ,Enable inerrupt for CMP4 Output Falling" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IRQ_CMP3_F_E ,Enable inerrupt for CMP3 Output Falling" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IRQ_CMP2_F_E ,Enable inerrupt for CMP2 Output Falling" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQ_CMP1_F_E ,Enable inerrupt for CMP1 Output Falling" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IRQ_CMP0_F_E ,Enable inerrupt for CMP0 Output Falling" "Disabled,Enabled"
|
|
line.long 0x04 "COMP_IRQ,Comparator interrupt"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x08 21. " IRQ_CMP9_R ,CMP9 output rising interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x08 20. " IRQ_CMP8_R ,CMP8 output rising interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x08 19. " IRQ_CMP7_R ,CMP7 output rising interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x08 18. " IRQ_CMP6_R ,CMP6 output rising interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 17. 0x04 17. 0x08 17. " IRQ_CMP5_R ,CMP5 output rising interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x08 16. " IRQ_CMP4_R ,CMP4 output rising interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 15. 0x04 15. 0x08 15. " IRQ_CMP3_R ,CMP3 output rising interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x08 14. " IRQ_CMP2_R ,CMP2 output rising interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x08 13. " IRQ_CMP1_R ,CMP1 output rising interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x08 12. " IRQ_CMP0_R ,CMP0 output rising interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 9. 0x04 9. 0x08 9. " IRQ_CMP9_F ,CMP9 output falling interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x08 8. " IRQ_CMP8_F ,CMP8 output falling interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x08 7. " IRQ_CMP7_F ,CMP7 output falling interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x08 6. " IRQ_CMP6_F ,CMP6 output falling interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 5. 0x04 5. 0x08 5. " IRQ_CMP5_F ,CMP5 output falling interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x08 4. " IRQ_CMP4_F ,CMP4 output falling interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 3. 0x04 3. 0x08 3. " IRQ_CMP3_F ,CMP3 output falling interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x08 2. " IRQ_CMP2_F ,CMP2 output falling interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x08 1. " IRQ_CMP1_F ,CMP1 output falling interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x08 0. " IRQ_CMP0_F ,CMP0 output falling interrupt" "No interrupt,Interrupt"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "Signal Conditioning BLOCKs (SCBs)"
|
|
sif (CPU()=="A2F060")
|
|
width 10.
|
|
group.byte 0x21C++0x00 "SCB 0"
|
|
line.byte 0x00 "SCB0_B6,SCB 0 byte 6"
|
|
bitfld.byte 0x00 1. " NO_CHOPPING ,SDD0 NRTZ mode" "RTZ,NRTZ"
|
|
bitfld.byte 0x00 0. " CUR_VOLB ,SDD0 current mode select" "Voltage,Current"
|
|
group.byte (0x21C+0x04)++0x00
|
|
line.byte 0x00 "SCB0_B7,SCB 0 byte 7"
|
|
sif (CPU()=="A2F500")
|
|
bitfld.byte 0x00 4. " CM_STB_G[4] ,Global CM4 strobe" "Idle mode,Sequence mode"
|
|
bitfld.byte 0x00 3. " CM_STB_G[3] ,Global CM3 strobe" "Idle mode,Sequence mode"
|
|
bitfld.byte 0x00 2. " CM_STB_G[2] ,Global CM2 strobe" "Idle mode,Sequence mode"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " CM_STB_G[1] ,Global CM1 strobe" "Idle mode,Sequence mode"
|
|
bitfld.byte 0x00 0. " CM_STB_G[0] ,Global CM0 strobe" "Idle mode,Sequence mode"
|
|
endif
|
|
sif (CPU()=="A2F200")
|
|
bitfld.byte 0x00 3. " CM_STB_G[3] ,Global CM3 strobe" "Idle mode,Sequence mode"
|
|
bitfld.byte 0x00 2. " CM_STB_G[2] ,Global CM2 strobe" "Idle mode,Sequence mode"
|
|
bitfld.byte 0x00 1. " CM_STB_G[1] ,Global CM1 strobe" "Idle mode,Sequence mode"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " CM_STB_G[0] ,Global CM0 strobe" "Idle mode,Sequence mode"
|
|
endif
|
|
sif (CPU()=="A2F060")
|
|
bitfld.byte 0x00 0. " CM_STB_G[0] ,Global CM0 strobe" "Idle mode,Sequence mode"
|
|
endif
|
|
group.byte (0x21C+0x08)++0x00
|
|
line.byte 0x00 "SCB0_B8,SCB0 byte 8"
|
|
bitfld.byte 0x00 5.--6. " GDEC[1:0] ,ABPS1 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
bitfld.byte 0x00 4. " ABPS_EN ,ABPS1 enable" "Power save,Operational"
|
|
bitfld.byte 0x00 1.--2. " GDEC[1:0] ,ABPS0 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " ABPS_EN ,ABPS0 enable" "Power save,Operational"
|
|
group.byte (0x21C+0x0C)++0x00
|
|
line.byte 0x00 "SCB0_B9,SCB 0 byte 9"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP0 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP0 comparator enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " CM_STB ,CM0 strobe" "Start in idle mode,Start sequence"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " CM_EN ,CM0 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " CMB_DI_ON ,CM0 Isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " CMB_MUX_SEL ,CM0 bypass MUX" "CM op-amp,CM[n] pad"
|
|
group.byte (0x21C+0x10)++0x00
|
|
line.byte 0x00 "SCB0_B10,SCB 0 byte 10"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP1 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 5. " COMP_VREF_SW ,SCB 0 SDD Analog Switch" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " TM_STB ,TM0 strobe" "Idle mode,Hold mode"
|
|
bitfld.byte 0x00 2. " TM_EN ,TM0 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMB_DI_ON ,TM0 isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " TMB_MUX_SEL ,TM0 bypass MUX" "Temperature monitor,TM[n] pad"
|
|
group.byte (0x21C+0x14)++0x00
|
|
line.byte 0x00 "SCB0_B11,SCB0 byte 11"
|
|
sif (CPU()=="A2F060")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM0 analog MUX (to CMP1)" "SDD0_OUT,?..."
|
|
elif (CPU()=="A2F200")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM0 analog MUX (to CMP1)" "SDD0_OUT,SDD1_OUT,?..."
|
|
elif (CPU()=="A2F500")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM0 analog MUX (to CMP1)" "SDD0_OUT,SDD1_OUT,SDD2_OUT,?..."
|
|
endif
|
|
width 0x0B
|
|
elif (CPU()=="A2F200")
|
|
width 10.
|
|
group.byte 0x21C++0x00 "SCB 0"
|
|
line.byte 0x00 "SCB0_B6,SCB 0 byte 6"
|
|
bitfld.byte 0x00 1. " NO_CHOPPING ,SDD0 NRTZ mode" "RTZ,NRTZ"
|
|
bitfld.byte 0x00 0. " CUR_VOLB ,SDD0 current mode select" "Voltage,Current"
|
|
group.byte (0x21C+0x04)++0x00
|
|
line.byte 0x00 "SCB0_B7,SCB 0 byte 7"
|
|
sif (CPU()=="A2F500")
|
|
bitfld.byte 0x00 4. " CM_STB_G[4] ,Global CM4 strobe" "Idle mode,Sequence mode"
|
|
bitfld.byte 0x00 3. " CM_STB_G[3] ,Global CM3 strobe" "Idle mode,Sequence mode"
|
|
bitfld.byte 0x00 2. " CM_STB_G[2] ,Global CM2 strobe" "Idle mode,Sequence mode"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " CM_STB_G[1] ,Global CM1 strobe" "Idle mode,Sequence mode"
|
|
bitfld.byte 0x00 0. " CM_STB_G[0] ,Global CM0 strobe" "Idle mode,Sequence mode"
|
|
endif
|
|
sif (CPU()=="A2F200")
|
|
bitfld.byte 0x00 3. " CM_STB_G[3] ,Global CM3 strobe" "Idle mode,Sequence mode"
|
|
bitfld.byte 0x00 2. " CM_STB_G[2] ,Global CM2 strobe" "Idle mode,Sequence mode"
|
|
bitfld.byte 0x00 1. " CM_STB_G[1] ,Global CM1 strobe" "Idle mode,Sequence mode"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " CM_STB_G[0] ,Global CM0 strobe" "Idle mode,Sequence mode"
|
|
endif
|
|
sif (CPU()=="A2F060")
|
|
bitfld.byte 0x00 0. " CM_STB_G[0] ,Global CM0 strobe" "Idle mode,Sequence mode"
|
|
endif
|
|
group.byte (0x21C+0x08)++0x00
|
|
line.byte 0x00 "SCB0_B8,SCB0 byte 8"
|
|
bitfld.byte 0x00 5.--6. " GDEC[1:0] ,ABPS1 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
bitfld.byte 0x00 4. " ABPS_EN ,ABPS1 enable" "Power save,Operational"
|
|
bitfld.byte 0x00 1.--2. " GDEC[1:0] ,ABPS0 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " ABPS_EN ,ABPS0 enable" "Power save,Operational"
|
|
group.byte (0x21C+0x0C)++0x00
|
|
line.byte 0x00 "SCB0_B9,SCB 0 byte 9"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP0 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP0 comparator enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " CM_STB ,CM0 strobe" "Start in idle mode,Start sequence"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " CM_EN ,CM0 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " CMB_DI_ON ,CM0 Isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " CMB_MUX_SEL ,CM0 bypass MUX" "CM op-amp,CM[n] pad"
|
|
group.byte (0x21C+0x10)++0x00
|
|
line.byte 0x00 "SCB0_B10,SCB 0 byte 10"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP1 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 5. " COMP_VREF_SW ,SCB 0 SDD Analog Switch" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " TM_STB ,TM0 strobe" "Idle mode,Hold mode"
|
|
bitfld.byte 0x00 2. " TM_EN ,TM0 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMB_DI_ON ,TM0 isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " TMB_MUX_SEL ,TM0 bypass MUX" "Temperature monitor,TM[n] pad"
|
|
group.byte (0x21C+0x14)++0x00
|
|
line.byte 0x00 "SCB0_B11,SCB0 byte 11"
|
|
sif (CPU()=="A2F060")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM0 analog MUX (to CMP1)" "SDD0_OUT,?..."
|
|
elif (CPU()=="A2F200")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM0 analog MUX (to CMP1)" "SDD0_OUT,SDD1_OUT,?..."
|
|
elif (CPU()=="A2F500")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM0 analog MUX (to CMP1)" "SDD0_OUT,SDD1_OUT,SDD2_OUT,?..."
|
|
endif
|
|
group.byte 0x24C++0x00 "SCB 1"
|
|
line.byte 0x00 "SCB1_B6,SCB 1 byte 6"
|
|
bitfld.byte 0x00 1. " NO_CHOPPING ,SDD0 NRTZ mode" "RTZ,NRTZ"
|
|
bitfld.byte 0x00 0. " CUR_VOLB ,SDD0 current mode select" "Voltage,Current"
|
|
group.byte (0x24C+0x08)++0x00
|
|
line.byte 0x00 "SCB1_B8,SCB0 byte 8"
|
|
bitfld.byte 0x00 5.--6. " GDEC[1:0] ,ABPS3 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
bitfld.byte 0x00 4. " ABPS_EN ,ABPS3 enable" "Power save,Operational"
|
|
bitfld.byte 0x00 1.--2. " GDEC[1:0] ,ABPS2 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " ABPS_EN ,ABPS2 enable" "Power save,Operational"
|
|
group.byte (0x24C+0x0C)++0x00
|
|
line.byte 0x00 "SCB1_B9,SCB 1 byte 9"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP2 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP2 comparator enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " CM_STB ,CM1 strobe" "Start in idle mode,Start sequence"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " CM_EN ,CM1 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " CMB_DI_ON ,CM1 Isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " CMB_MUX_SEL ,CM1 bypass MUX" "CM op-amp,CM[n] pad"
|
|
group.byte (0x24C+0x10)++0x00
|
|
line.byte 0x00 "SCB1_B10,SCB 1 byte 10"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP3 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 5. " COMP_VREF_SW ,SCB 1 SDD Analog Switch" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP3 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " TM_STB ,TM1 strobe" "Idle mode,Hold mode"
|
|
bitfld.byte 0x00 2. " TM_EN ,TM1 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMB_DI_ON ,TM1 isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " TMB_MUX_SEL ,TM1 bypass MUX" "Temperature monitor,TM[n] pad"
|
|
group.byte (0x24C+0x14)++0x00
|
|
line.byte 0x00 "SCB1_B11,SCB0 byte 11"
|
|
sif (CPU()=="A2F060")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM1 analog MUX (to CMP3)" "SDD0_OUT,?..."
|
|
elif (CPU()=="A2F200")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM1 analog MUX (to CMP3)" "SDD0_OUT,SDD1_OUT,?..."
|
|
elif (CPU()=="A2F500")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM1 analog MUX (to CMP3)" "SDD0_OUT,SDD1_OUT,SDD2_OUT,?..."
|
|
endif
|
|
group.byte 0x27C++0x00 "SCB 2"
|
|
line.byte 0x00 "SCB2_B6,SCB 2 byte 6"
|
|
bitfld.byte 0x00 1. " NO_CHOPPING ,SDD0 NRTZ mode" "RTZ,NRTZ"
|
|
bitfld.byte 0x00 0. " CUR_VOLB ,SDD0 current mode select" "Voltage,Current"
|
|
group.byte (0x27C+0x08)++0x00
|
|
line.byte 0x00 "SCB2_B8,SCB0 byte 8"
|
|
bitfld.byte 0x00 5.--6. " GDEC[1:0] ,ABPS5 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
bitfld.byte 0x00 4. " ABPS_EN ,ABPS5 enable" "Power save,Operational"
|
|
bitfld.byte 0x00 1.--2. " GDEC[1:0] ,ABPS4 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " ABPS_EN ,ABPS4 enable" "Power save,Operational"
|
|
group.byte (0x27C+0x0C)++0x00
|
|
line.byte 0x00 "SCB2_B9,SCB 2 byte 9"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP4 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP4 comparator enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " CM_STB ,CM2 strobe" "Start in idle mode,Start sequence"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " CM_EN ,CM2 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " CMB_DI_ON ,CM2 Isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " CMB_MUX_SEL ,CM2 bypass MUX" "CM op-amp,CM[n] pad"
|
|
group.byte (0x27C+0x10)++0x00
|
|
line.byte 0x00 "SCB2_B10,SCB 2 byte 10"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP5 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 5. " COMP_VREF_SW ,SCB 2 SDD Analog Switch" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP5 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " TM_STB ,TM2 strobe" "Idle mode,Hold mode"
|
|
bitfld.byte 0x00 2. " TM_EN ,TM2 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMB_DI_ON ,TM2 isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " TMB_MUX_SEL ,TM2 bypass MUX" "Temperature monitor,TM[n] pad"
|
|
group.byte (0x27C+0x14)++0x00
|
|
line.byte 0x00 "SCB2_B11,SCB0 byte 11"
|
|
sif (CPU()=="A2F060")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM2 analog MUX (to CMP5)" "SDD0_OUT,?..."
|
|
elif (CPU()=="A2F200")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM2 analog MUX (to CMP5)" "SDD0_OUT,SDD1_OUT,?..."
|
|
elif (CPU()=="A2F500")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM2 analog MUX (to CMP5)" "SDD0_OUT,SDD1_OUT,SDD2_OUT,?..."
|
|
endif
|
|
group.byte 0x2AC++0x00 "SCB 3"
|
|
line.byte 0x00 "SCB3_B6,SCB 3 byte 6"
|
|
bitfld.byte 0x00 1. " NO_CHOPPING ,SDD0 NRTZ mode" "RTZ,NRTZ"
|
|
bitfld.byte 0x00 0. " CUR_VOLB ,SDD0 current mode select" "Voltage,Current"
|
|
group.byte (0x2AC+0x08)++0x00
|
|
line.byte 0x00 "SCB3_B8,SCB0 byte 8"
|
|
bitfld.byte 0x00 5.--6. " GDEC[1:0] ,ABPS7 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
bitfld.byte 0x00 4. " ABPS_EN ,ABPS7 enable" "Power save,Operational"
|
|
bitfld.byte 0x00 1.--2. " GDEC[1:0] ,ABPS6 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " ABPS_EN ,ABPS6 enable" "Power save,Operational"
|
|
group.byte (0x2AC+0x0C)++0x00
|
|
line.byte 0x00 "SCB3_B9,SCB 3 byte 9"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP6 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP6 comparator enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " CM_STB ,CM3 strobe" "Start in idle mode,Start sequence"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " CM_EN ,CM3 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " CMB_DI_ON ,CM3 Isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " CMB_MUX_SEL ,CM3 bypass MUX" "CM op-amp,CM[n] pad"
|
|
group.byte (0x2AC+0x10)++0x00
|
|
line.byte 0x00 "SCB3_B10,SCB 3 byte 10"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP7 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 5. " COMP_VREF_SW ,SCB 3 SDD Analog Switch" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP7 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " TM_STB ,TM3 strobe" "Idle mode,Hold mode"
|
|
bitfld.byte 0x00 2. " TM_EN ,TM3 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMB_DI_ON ,TM3 isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " TMB_MUX_SEL ,TM3 bypass MUX" "Temperature monitor,TM[n] pad"
|
|
group.byte (0x2AC+0x14)++0x00
|
|
line.byte 0x00 "SCB3_B11,SCB0 byte 11"
|
|
sif (CPU()=="A2F060")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM3 analog MUX (to CMP7)" "SDD0_OUT,?..."
|
|
elif (CPU()=="A2F200")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM3 analog MUX (to CMP7)" "SDD0_OUT,SDD1_OUT,?..."
|
|
elif (CPU()=="A2F500")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM3 analog MUX (to CMP7)" "SDD0_OUT,SDD1_OUT,SDD2_OUT,?..."
|
|
endif
|
|
width 0x0B
|
|
elif (CPU()=="A2F500")
|
|
width 10.
|
|
group.byte 0x21C++0x00 "SCB 0"
|
|
line.byte 0x00 "SCB0_B6,SCB 0 byte 6"
|
|
bitfld.byte 0x00 1. " NO_CHOPPING ,SDD0 NRTZ mode" "RTZ,NRTZ"
|
|
bitfld.byte 0x00 0. " CUR_VOLB ,SDD0 current mode select" "Voltage,Current"
|
|
group.byte (0x21C+0x04)++0x00
|
|
line.byte 0x00 "SCB0_B7,SCB 0 byte 7"
|
|
sif (CPU()=="A2F500")
|
|
bitfld.byte 0x00 4. " CM_STB_G[4] ,Global CM4 strobe" "Idle mode,Sequence mode"
|
|
bitfld.byte 0x00 3. " CM_STB_G[3] ,Global CM3 strobe" "Idle mode,Sequence mode"
|
|
bitfld.byte 0x00 2. " CM_STB_G[2] ,Global CM2 strobe" "Idle mode,Sequence mode"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " CM_STB_G[1] ,Global CM1 strobe" "Idle mode,Sequence mode"
|
|
bitfld.byte 0x00 0. " CM_STB_G[0] ,Global CM0 strobe" "Idle mode,Sequence mode"
|
|
endif
|
|
sif (CPU()=="A2F200")
|
|
bitfld.byte 0x00 3. " CM_STB_G[3] ,Global CM3 strobe" "Idle mode,Sequence mode"
|
|
bitfld.byte 0x00 2. " CM_STB_G[2] ,Global CM2 strobe" "Idle mode,Sequence mode"
|
|
bitfld.byte 0x00 1. " CM_STB_G[1] ,Global CM1 strobe" "Idle mode,Sequence mode"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " CM_STB_G[0] ,Global CM0 strobe" "Idle mode,Sequence mode"
|
|
endif
|
|
sif (CPU()=="A2F060")
|
|
bitfld.byte 0x00 0. " CM_STB_G[0] ,Global CM0 strobe" "Idle mode,Sequence mode"
|
|
endif
|
|
group.byte (0x21C+0x08)++0x00
|
|
line.byte 0x00 "SCB0_B8,SCB0 byte 8"
|
|
bitfld.byte 0x00 5.--6. " GDEC[1:0] ,ABPS1 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
bitfld.byte 0x00 4. " ABPS_EN ,ABPS1 enable" "Power save,Operational"
|
|
bitfld.byte 0x00 1.--2. " GDEC[1:0] ,ABPS0 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " ABPS_EN ,ABPS0 enable" "Power save,Operational"
|
|
group.byte (0x21C+0x0C)++0x00
|
|
line.byte 0x00 "SCB0_B9,SCB 0 byte 9"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP0 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP0 comparator enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " CM_STB ,CM0 strobe" "Start in idle mode,Start sequence"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " CM_EN ,CM0 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " CMB_DI_ON ,CM0 Isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " CMB_MUX_SEL ,CM0 bypass MUX" "CM op-amp,CM[n] pad"
|
|
group.byte (0x21C+0x10)++0x00
|
|
line.byte 0x00 "SCB0_B10,SCB 0 byte 10"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP1 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 5. " COMP_VREF_SW ,SCB 0 SDD Analog Switch" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " TM_STB ,TM0 strobe" "Idle mode,Hold mode"
|
|
bitfld.byte 0x00 2. " TM_EN ,TM0 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMB_DI_ON ,TM0 isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " TMB_MUX_SEL ,TM0 bypass MUX" "Temperature monitor,TM[n] pad"
|
|
group.byte (0x21C+0x14)++0x00
|
|
line.byte 0x00 "SCB0_B11,SCB0 byte 11"
|
|
sif (CPU()=="A2F060")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM0 analog MUX (to CMP1)" "SDD0_OUT,?..."
|
|
elif (CPU()=="A2F200")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM0 analog MUX (to CMP1)" "SDD0_OUT,SDD1_OUT,?..."
|
|
elif (CPU()=="A2F500")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM0 analog MUX (to CMP1)" "SDD0_OUT,SDD1_OUT,SDD2_OUT,?..."
|
|
endif
|
|
group.byte 0x24C++0x00 "SCB 1"
|
|
line.byte 0x00 "SCB1_B6,SCB 1 byte 6"
|
|
bitfld.byte 0x00 1. " NO_CHOPPING ,SDD0 NRTZ mode" "RTZ,NRTZ"
|
|
bitfld.byte 0x00 0. " CUR_VOLB ,SDD0 current mode select" "Voltage,Current"
|
|
group.byte (0x24C+0x08)++0x00
|
|
line.byte 0x00 "SCB1_B8,SCB0 byte 8"
|
|
bitfld.byte 0x00 5.--6. " GDEC[1:0] ,ABPS3 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
bitfld.byte 0x00 4. " ABPS_EN ,ABPS3 enable" "Power save,Operational"
|
|
bitfld.byte 0x00 1.--2. " GDEC[1:0] ,ABPS2 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " ABPS_EN ,ABPS2 enable" "Power save,Operational"
|
|
group.byte (0x24C+0x0C)++0x00
|
|
line.byte 0x00 "SCB1_B9,SCB 1 byte 9"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP2 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP2 comparator enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " CM_STB ,CM1 strobe" "Start in idle mode,Start sequence"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " CM_EN ,CM1 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " CMB_DI_ON ,CM1 Isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " CMB_MUX_SEL ,CM1 bypass MUX" "CM op-amp,CM[n] pad"
|
|
group.byte (0x24C+0x10)++0x00
|
|
line.byte 0x00 "SCB1_B10,SCB 1 byte 10"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP3 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 5. " COMP_VREF_SW ,SCB 1 SDD Analog Switch" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP3 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " TM_STB ,TM1 strobe" "Idle mode,Hold mode"
|
|
bitfld.byte 0x00 2. " TM_EN ,TM1 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMB_DI_ON ,TM1 isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " TMB_MUX_SEL ,TM1 bypass MUX" "Temperature monitor,TM[n] pad"
|
|
group.byte (0x24C+0x14)++0x00
|
|
line.byte 0x00 "SCB1_B11,SCB0 byte 11"
|
|
sif (CPU()=="A2F060")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM1 analog MUX (to CMP3)" "SDD0_OUT,?..."
|
|
elif (CPU()=="A2F200")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM1 analog MUX (to CMP3)" "SDD0_OUT,SDD1_OUT,?..."
|
|
elif (CPU()=="A2F500")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM1 analog MUX (to CMP3)" "SDD0_OUT,SDD1_OUT,SDD2_OUT,?..."
|
|
endif
|
|
group.byte 0x27C++0x00 "SCB 2"
|
|
line.byte 0x00 "SCB2_B6,SCB 2 byte 6"
|
|
bitfld.byte 0x00 1. " NO_CHOPPING ,SDD0 NRTZ mode" "RTZ,NRTZ"
|
|
bitfld.byte 0x00 0. " CUR_VOLB ,SDD0 current mode select" "Voltage,Current"
|
|
group.byte (0x27C+0x08)++0x00
|
|
line.byte 0x00 "SCB2_B8,SCB0 byte 8"
|
|
bitfld.byte 0x00 5.--6. " GDEC[1:0] ,ABPS5 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
bitfld.byte 0x00 4. " ABPS_EN ,ABPS5 enable" "Power save,Operational"
|
|
bitfld.byte 0x00 1.--2. " GDEC[1:0] ,ABPS4 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " ABPS_EN ,ABPS4 enable" "Power save,Operational"
|
|
group.byte (0x27C+0x0C)++0x00
|
|
line.byte 0x00 "SCB2_B9,SCB 2 byte 9"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP4 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP4 comparator enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " CM_STB ,CM2 strobe" "Start in idle mode,Start sequence"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " CM_EN ,CM2 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " CMB_DI_ON ,CM2 Isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " CMB_MUX_SEL ,CM2 bypass MUX" "CM op-amp,CM[n] pad"
|
|
group.byte (0x27C+0x10)++0x00
|
|
line.byte 0x00 "SCB2_B10,SCB 2 byte 10"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP5 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 5. " COMP_VREF_SW ,SCB 2 SDD Analog Switch" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP5 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " TM_STB ,TM2 strobe" "Idle mode,Hold mode"
|
|
bitfld.byte 0x00 2. " TM_EN ,TM2 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMB_DI_ON ,TM2 isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " TMB_MUX_SEL ,TM2 bypass MUX" "Temperature monitor,TM[n] pad"
|
|
group.byte (0x27C+0x14)++0x00
|
|
line.byte 0x00 "SCB2_B11,SCB0 byte 11"
|
|
sif (CPU()=="A2F060")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM2 analog MUX (to CMP5)" "SDD0_OUT,?..."
|
|
elif (CPU()=="A2F200")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM2 analog MUX (to CMP5)" "SDD0_OUT,SDD1_OUT,?..."
|
|
elif (CPU()=="A2F500")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM2 analog MUX (to CMP5)" "SDD0_OUT,SDD1_OUT,SDD2_OUT,?..."
|
|
endif
|
|
group.byte 0x2AC++0x00 "SCB 3"
|
|
line.byte 0x00 "SCB3_B6,SCB 3 byte 6"
|
|
bitfld.byte 0x00 1. " NO_CHOPPING ,SDD0 NRTZ mode" "RTZ,NRTZ"
|
|
bitfld.byte 0x00 0. " CUR_VOLB ,SDD0 current mode select" "Voltage,Current"
|
|
group.byte (0x2AC+0x08)++0x00
|
|
line.byte 0x00 "SCB3_B8,SCB0 byte 8"
|
|
bitfld.byte 0x00 5.--6. " GDEC[1:0] ,ABPS7 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
bitfld.byte 0x00 4. " ABPS_EN ,ABPS7 enable" "Power save,Operational"
|
|
bitfld.byte 0x00 1.--2. " GDEC[1:0] ,ABPS6 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " ABPS_EN ,ABPS6 enable" "Power save,Operational"
|
|
group.byte (0x2AC+0x0C)++0x00
|
|
line.byte 0x00 "SCB3_B9,SCB 3 byte 9"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP6 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP6 comparator enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " CM_STB ,CM3 strobe" "Start in idle mode,Start sequence"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " CM_EN ,CM3 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " CMB_DI_ON ,CM3 Isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " CMB_MUX_SEL ,CM3 bypass MUX" "CM op-amp,CM[n] pad"
|
|
group.byte (0x2AC+0x10)++0x00
|
|
line.byte 0x00 "SCB3_B10,SCB 3 byte 10"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP7 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 5. " COMP_VREF_SW ,SCB 3 SDD Analog Switch" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP7 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " TM_STB ,TM3 strobe" "Idle mode,Hold mode"
|
|
bitfld.byte 0x00 2. " TM_EN ,TM3 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMB_DI_ON ,TM3 isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " TMB_MUX_SEL ,TM3 bypass MUX" "Temperature monitor,TM[n] pad"
|
|
group.byte (0x2AC+0x14)++0x00
|
|
line.byte 0x00 "SCB3_B11,SCB0 byte 11"
|
|
sif (CPU()=="A2F060")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM3 analog MUX (to CMP7)" "SDD0_OUT,?..."
|
|
elif (CPU()=="A2F200")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM3 analog MUX (to CMP7)" "SDD0_OUT,SDD1_OUT,?..."
|
|
elif (CPU()=="A2F500")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM3 analog MUX (to CMP7)" "SDD0_OUT,SDD1_OUT,SDD2_OUT,?..."
|
|
endif
|
|
group.byte 0x2DC++0x00 "SCB 4"
|
|
line.byte 0x00 "SCB4_B6,SCB 4 byte 6"
|
|
bitfld.byte 0x00 1. " NO_CHOPPING ,SDD0 NRTZ mode" "RTZ,NRTZ"
|
|
bitfld.byte 0x00 0. " CUR_VOLB ,SDD0 current mode select" "Voltage,Current"
|
|
group.byte (0x2DC+0x08)++0x00
|
|
line.byte 0x00 "SCB4_B8,SCB0 byte 8"
|
|
bitfld.byte 0x00 5.--6. " GDEC[1:0] ,ABPS9 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
bitfld.byte 0x00 4. " ABPS_EN ,ABPS9 enable" "Power save,Operational"
|
|
bitfld.byte 0x00 1.--2. " GDEC[1:0] ,ABPS8 range select" "+/-15.36 V,+/-10.24 V,+/-5.12 V,+/-2.56 V"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " ABPS_EN ,ABPS8 enable" "Power save,Operational"
|
|
group.byte (0x2DC+0x0C)++0x00
|
|
line.byte 0x00 "SCB4_B9,SCB 4 byte 9"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP8 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP8 comparator enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " CM_STB ,CM4 strobe" "Start in idle mode,Start sequence"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " CM_EN ,CM4 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " CMB_DI_ON ,CM4 Isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " CMB_MUX_SEL ,CM4 bypass MUX" "CM op-amp,CM[n] pad"
|
|
group.byte (0x2DC+0x10)++0x00
|
|
line.byte 0x00 "SCB4_B10,SCB 4 byte 10"
|
|
bitfld.byte 0x00 6.--7. " HYS[1:0] ,CMP9 Hysteresis" "No Hysteresis,+/-10 mV,+/-30 mV,+/-100 mV"
|
|
bitfld.byte 0x00 5. " COMP_VREF_SW ,SCB 4 SDD Analog Switch" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " COMP_EN ,CMP9 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " TM_STB ,TM4 strobe" "Idle mode,Hold mode"
|
|
bitfld.byte 0x00 2. " TM_EN ,TM4 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TMB_DI_ON ,TM4 isolation switch" "Open,Closed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " TMB_MUX_SEL ,TM4 bypass MUX" "Temperature monitor,TM[n] pad"
|
|
group.byte (0x2DC+0x14)++0x00
|
|
line.byte 0x00 "SCB4_B11,SCB0 byte 11"
|
|
sif (CPU()=="A2F060")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM4 analog MUX (to CMP9)" "SDD0_OUT,?..."
|
|
elif (CPU()=="A2F200")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM4 analog MUX (to CMP9)" "SDD0_OUT,SDD1_OUT,?..."
|
|
elif (CPU()=="A2F500")
|
|
bitfld.byte 0x00 0.--1. " DAC_MUXSEL[1:0] ,SDDM4 analog MUX (to CMP9)" "SDD0_OUT,SDD1_OUT,SDD2_OUT,?..."
|
|
endif
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
textline ""
|