494 lines
22 KiB
Plaintext
494 lines
22 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: RCARD3 Specific Menu
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; @Props: Released
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; @Author: ASK, KWI, DAS, KOF, MRO, PID, PIJ, PAK
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; @Changelog: 2017-11-23 ASK
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; 2020-06-18 PID
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; 2020-10-07 PAK
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; @Manufacturer: RENESAS - Renesas Technology, Corp.
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; @Core: Cortex-A53
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; @Chip: R8A77995
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; @Copyright: (C) 1989-2020 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menrcard3.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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if (CORENAME()=="CORTEXA53")
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(
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popup "[:chip]Core Registers (Cortex-A53)"
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(
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menuitem "[:chip]ID Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,ID Registers"""
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menuitem "[:chip]System Control and Configuration[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,System Control and Configuration"""
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menuitem "[:chip]Memory Management Unit[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Memory Management Unit"""
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menuitem "[:chip]Virtualization Extensions[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Virtualization Extensions"""
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menuitem "[:chip]Cache Control and Configuration[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Cache Control and Configuration"""
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menuitem "[:chip]System Performance Monitor[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,System Performance Monitor"""
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menuitem "[:chip]System Timer Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,System Timer Registers"""
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menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Generic Interrupt Controller CPU Interface"""
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separator
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menuitem "[:chip]Debug Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Debug Registers"""
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separator
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menuitem "[:chip]Breakpoint Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Breakpoint Registers"""
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menuitem "[:chip]Watchpoint Control Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Watchpoint Control Registers"""
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separator
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menuitem "[:chip]ID Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,ID Registers"""
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menuitem "[:chip]System Control and Configuration[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,System Control and Configuration"""
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menuitem "[:chip]Memory Management Unit[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Memory Management Unit"""
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menuitem "[:chip]Virtualization Extensions[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Virtualization Extensions"""
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menuitem "[:chip]Cache Control and Configuration[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Cache Control and Configuration"""
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menuitem "[:chip]System Performance Monitor[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,System Performance Monitor"""
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menuitem "[:chip]System Timer Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,System Timer Registers"""
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menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Generic Interrupt Controller CPU Interface"""
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separator
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menuitem "[:chip]Debug Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Debug Registers"""
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separator
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menuitem "[:chip]Breakpoint Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Breakpoint Registers"""
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menuitem "[:chip]Watchpoint Control Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Watchpoint Control Registers"""
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separator
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menuitem "[:chip]Interrupt Controller (GIC-400)" "per , ""Core Registers (Cortex-A53),Interrupt Controller (GIC-400)"""
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)
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menuitem "[:chip]Generic Counter" "per , ""Generic Counter"""
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)
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separator
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menuitem "PFC;Pin Function Controller" "per , ""PFC (Pin Function Controller)"""
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popup "GPIO;General-Purpose Input/Output Ports"
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(
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menuitem "Block 0" "per , ""GPIO (General-Purpose Input/Output Ports),Block 0"""
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menuitem "Block 1" "per , ""GPIO (General-Purpose Input/Output Ports),Block 1"""
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menuitem "Block 2" "per , ""GPIO (General-Purpose Input/Output Ports),Block 2"""
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menuitem "Block 3" "per , ""GPIO (General-Purpose Input/Output Ports),Block 3"""
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menuitem "Block 4" "per , ""GPIO (General-Purpose Input/Output Ports),Block 4"""
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menuitem "Block 5" "per , ""GPIO (General-Purpose Input/Output Ports),Block 5"""
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menuitem "Block 6" "per , ""GPIO (General-Purpose Input/Output Ports),Block 6"""
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)
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menuitem "CPG;Clock Pulse Generator" "per , ""CPG (Clock Pulse Generator)"""
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menuitem "MSSR;Module Standby / Software Reset" "per , ""MSSR (Module Standby / Software Reset)"""
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popup "APMU;Advanced Power Management Unit for AP-System Core"
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(
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menuitem "Cortex-A53" "per , ""APMU (Advanced Power Management Unit for AP-System Core),Cortex-A53"""
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)
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menuitem "SYSC;System Controller" "per , ""SYSC (System Controller)"""
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menuitem "THS/CIVM;Thermal Sensor/Chip Internal Voltage Monitor" "per , ""THS/CIVM (Thermal Sensor/Chip Internal Voltage Monitor)"""
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menuitem "RST;Reset" "per , ""RST (Reset)"""
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popup "INTC;Interrupt Controller"
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(
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menuitem "INTC" "per , ""INTC (Interrupt Controller),INTC"""
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menuitem "INTC-AP;GIC-400" "per , ""INTC (Interrupt Controller),INTC-AP (GIC-400)"""
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menuitem "INTC-EX" "per , ""INTC (Interrupt Controller),INTC-EX"""
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)
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menuitem "MFIS;Multifunctional Interface" "per , ""MFIS (Multifunctional Interface)"""
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menuitem "AXI-bus" "per , ""AXI-bus"""
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popup "IPMMU"
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(
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menuitem "IPMMU-VI0" "per , ""IPMMU,IPMMU-VI0"""
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menuitem "IPMMU-VP0" "per , ""IPMMU,IPMMU-VP0"""
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menuitem "IPMMU-VC0" "per , ""IPMMU,IPMMU-VC0"""
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menuitem "IPMMU-PV0" "per , ""IPMMU,IPMMU-PV0"""
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menuitem "IPMMU-HC" "per , ""IPMMU,IPMMU-HC"""
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menuitem "IPMMU-RT" "per , ""IPMMU,IPMMU-RT"""
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menuitem "IPMMU-MP" "per , ""IPMMU,IPMMU-MP"""
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menuitem "IPMMU-DS0" "per , ""IPMMU,IPMMU-DS0"""
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menuitem "IPMMU-DS1" "per , ""IPMMU,IPMMU-DS1"""
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menuitem "IPMMU-MM" "per , ""IPMMU,IPMMU-MM"""
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)
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menuitem "SYS-DMAC;Direct Memory Access Controller for System" "per , ""SYS-DMAC (Direct Memory Access Controller for System)"""
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menuitem "RT-DMAC;Realtime Direct Memory Access Controller" "per , ""RT-DMAC (Realtime Direct Memory Access Controller)"""
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menuitem "DBSC4;External Bus Controller for DDR4 SDRAM" "per , ""DBSC4 (External Bus Controller for DDR4 SDRAM)"""
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menuitem "DCU;De-Compression Unit" "per , ""DCU (De-Compression Unit)"""
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menuitem "VIN;Video Input Module" "per , ""VIN (Video Input Module)"""
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menuitem "IMR-LX4;Image Renderer Light Extended 4" "per , ""IMR-LX4 (Image Renderer Light Extended 4)"""
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popup "VSP2;Video Signal Processor"
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(
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menuitem "VSPBS" "per , ""VSP2 (Video Signal Processor),VSPBS"""
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popup "VSPD0"
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(
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menuitem "VSPD0" "per , ""VSP2 (Video Signal Processor),VSPD0"""
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popup "DISCOM;Display Output Compare Unit"
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(
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menuitem "UIF4" "per , ""VSP2 (Video Signal Processor),VSPD0,DISCOM (Display Output Compare Unit),UIF4"""
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)
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)
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popup "VSPD1"
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(
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menuitem "VSPD1" "per , ""VSP2 (Video Signal Processor),VSPD1"""
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popup "DISCOM;Display Output Compare Unit"
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(
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menuitem "UIF4" "per , ""VSP2 (Video Signal Processor),VSPD1,DISCOM (Display Output Compare Unit),UIF4"""
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)
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)
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)
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popup "FCP;Frame Compression Processor"
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(
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popup "FCP for VSP"
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(
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menuitem "FCPVB0" "per , ""FCP (Frame Compression Processor),FCP for VSP,FCPVB0"""
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menuitem "FCPVD0" "per , ""FCP (Frame Compression Processor),FCP for VSP,FCPVD0"""
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menuitem "FCPVD1" "per , ""FCP (Frame Compression Processor),FCP for VSP,FCPVD1"""
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)
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)
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popup "DU;Display Unit"
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(
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menuitem "DU 0" "per , ""DU (Display Unit),DU 0"""
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menuitem "DU 1" "per , ""DU (Display Unit),DU 1"""
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)
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popup "CMM;Color Management Module"
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(
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menuitem "CMM0" "per , ""CMM (Color Management Module),CMM0"""
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menuitem "CMM1" "per , ""CMM (Color Management Module),CMM1"""
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)
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popup "DOC;Display Output Checker"
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(
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menuitem "DOC0" "per , ""DOC (Display Output Checker),DOC0"""
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)
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popup "LVDS;LVDS Interface"
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(
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menuitem "Channel 0" "per , ""LVDS (LVDS Interface),Channel 0"""
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menuitem "Channel 1" "per , ""LVDS (LVDS Interface),Channel 1"""
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)
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popup "SSIU;Serial Sound Interface Unit"
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(
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menuitem "SSIU3" "per , ""SSIU (Serial Sound Interface Unit),SSIU3"""
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menuitem "SSIU4" "per , ""SSIU (Serial Sound Interface Unit),SSIU4"""
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menuitem "Other Registers" "per , ""SSIU (Serial Sound Interface Unit),Other Registers"""
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popup "BUSIF Data Registers"
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(
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menuitem "Audio-DMAC" "per , ""SSIU (Serial Sound Interface Unit),BUSIF Data Registers,Audio-DMAC"""
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menuitem "Audio-DMACpp" "per , ""SSIU (Serial Sound Interface Unit),BUSIF Data Registers,Audio-DMACpp"""
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)
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)
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popup "SSI;Serial Sound Interface"
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(
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menuitem "Module 3" "per , ""SSI (Serial Sound Interface),Module 3"""
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menuitem "Module 4" "per , ""SSI (Serial Sound Interface),Module 4"""
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)
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menuitem "ADG;Audio Clock Generator" "per , ""ADG (Audio Clock Generator)"""
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menuitem "SCU;Sampling Rate Converter Unit" "per , ""SCU (Sampling Rate Converter Unit)"""
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menuitem "MLBIF;MediaLB I/F" "per , ""MLBIF (MediaLB I/F)"""
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menuitem "MLM;MediaLB+ Local Memory" "per , ""MLM (MediaLB+ Local Memory)"""
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popup "Audio-DMAC;Direct Memory Access Controller for Audio"
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(
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menuitem "Low channels" "per , ""Audio-DMAC (Direct Memory Access Controller for Audio),Low channels"""
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)
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menuitem "Audio-DMAC-P-P;Audio-DMAC-Peripheral-Peripheral" "per , ""Audio-DMAC-P-P (Audio-DMAC-Peripheral-Peripheral)"""
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menuitem "EthernetAVB-IF" "per , ""EthernetAVB-IF"""
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popup "CAN;Controller Area Network"
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(
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menuitem "CAN0" "per , ""CAN (Controller Area Network),CAN0"""
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|
menuitem "CAN1" "per , ""CAN (Controller Area Network),CAN1"""
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|
)
|
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menuitem "CAN-FD;CANFD Interface" "per , ""CAN-FD (CANFD Interface)"""
|
|
popup "SCIF;Serial Communication Interface With FIFO"
|
|
(
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menuitem "SCIF_0" "per , ""SCIF (Serial Communication Interface With FIFO),SCIF_0"""
|
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menuitem "SCIF_1" "per , ""SCIF (Serial Communication Interface With FIFO),SCIF_1"""
|
|
menuitem "SCIF_2" "per , ""SCIF (Serial Communication Interface With FIFO),SCIF_2"""
|
|
menuitem "SCIF_3" "per , ""SCIF (Serial Communication Interface With FIFO),SCIF_3"""
|
|
menuitem "SCIF_4" "per , ""SCIF (Serial Communication Interface With FIFO),SCIF_4"""
|
|
menuitem "SCIF_5" "per , ""SCIF (Serial Communication Interface With FIFO),SCIF_5"""
|
|
)
|
|
popup "HSCIF;High Speed Serial Communication Interface with FIFO"
|
|
(
|
|
menuitem "Channel 0" "per , ""HSCIF (High Speed Serial Communication Interface with FIFO),Channel 0"""
|
|
menuitem "Channel 3" "per , ""HSCIF (High Speed Serial Communication Interface with FIFO),Channel 3"""
|
|
)
|
|
popup "I2C;I2C Bus Interface"
|
|
(
|
|
menuitem "I2C_0" "per , ""I2C (I2C Bus Interface),I2C_0"""
|
|
menuitem "I2C_1" "per , ""I2C (I2C Bus Interface),I2C_1"""
|
|
menuitem "I2C_2" "per , ""I2C (I2C Bus Interface),I2C_2"""
|
|
menuitem "I2C_3" "per , ""I2C (I2C Bus Interface),I2C_3"""
|
|
)
|
|
popup "MSIOF;Clock-Synchronized Serial Interface with FIFO"
|
|
(
|
|
menuitem "MSIOF_0" "per , ""MSIOF (Clock-Synchronized Serial Interface with FIFO),MSIOF_0"""
|
|
menuitem "MSIOF_1" "per , ""MSIOF (Clock-Synchronized Serial Interface with FIFO),MSIOF_1"""
|
|
menuitem "MSIOF_2" "per , ""MSIOF (Clock-Synchronized Serial Interface with FIFO),MSIOF_2"""
|
|
menuitem "MSIOF_3" "per , ""MSIOF (Clock-Synchronized Serial Interface with FIFO),MSIOF_3"""
|
|
)
|
|
popup "PWM Timer"
|
|
(
|
|
menuitem "Channel 0" "per , ""PWM Timer,Channel 0"""
|
|
menuitem "Channel 1" "per , ""PWM Timer,Channel 1"""
|
|
menuitem "Channel 2" "per , ""PWM Timer,Channel 2"""
|
|
menuitem "Channel 3" "per , ""PWM Timer,Channel 3"""
|
|
)
|
|
menuitem "RPC;SPI Multi I/O Bus Controller" "per , ""RPC (SPI Multi I/O Bus Controller)"""
|
|
popup "LifeC;Life Cycle"
|
|
(
|
|
menuitem "Channel 0" "per , ""LifeC (Life Cycle),Channel 0"""
|
|
menuitem "Channel 1" "per , ""LifeC (Life Cycle),Channel 1"""
|
|
)
|
|
menuitem "SDHI_2/MMC_0;SD Card/MMC Interfaces" "per , ""SDHI_2/MMC_0 (SD Card/MMC Interfaces)"""
|
|
menuitem "R-NANDC;rawNAND Controller" "per , ""R-NANDC (rawNAND Controller)"""
|
|
menuitem "USB2.0 Host;EHCI/OHCI" "per , ""USB2.0 Host (EHCI/OHCI)"""
|
|
menuitem "HS-USB;High Speed USB" "per , ""HS-USB (High Speed USB)"""
|
|
popup "USB-DMAC;USB High-Speed DMAC"
|
|
(
|
|
menuitem "USB-DMAC0" "per , ""USB-DMAC (USB High-Speed DMAC),USB-DMAC0"""
|
|
menuitem "USB-DMAC1" "per , ""USB-DMAC (USB High-Speed DMAC),USB-DMAC1"""
|
|
menuitem "DDM;Descriptor DMAC" "per , ""USB-DMAC (USB High-Speed DMAC),DDM (Descriptor DMAC)"""
|
|
)
|
|
menuitem "RWDT;RCLK Watchdog Timer" "per , ""RWDT (RCLK Watchdog Timer)"""
|
|
menuitem "SWDT;System Watchdog" "per , ""SWDT (System Watchdog)"""
|
|
menuitem "TPU;16-Bit Timer Pulse Unit" "per , ""TPU (16-Bit Timer Pulse Unit)"""
|
|
menuitem "CMT0;Compare Match Timer Type 0" "per , ""CMT0 (Compare Match Timer Type 0)"""
|
|
popup "CMT1;Compare Match Timer Type 1"
|
|
(
|
|
menuitem "CMT_1" "per , ""CMT1 (Compare Match Timer Type 1),CMT_1"""
|
|
menuitem "CMT_2" "per , ""CMT1 (Compare Match Timer Type 1),CMT_2"""
|
|
menuitem "CMT_3" "per , ""CMT1 (Compare Match Timer Type 1),CMT_3"""
|
|
)
|
|
popup "TMU;Timer Unit"
|
|
(
|
|
menuitem "Timer 0" "per , ""TMU (Timer Unit),Timer 0"""
|
|
menuitem "Timer 1" "per , ""TMU (Timer Unit),Timer 1"""
|
|
menuitem "Timer 2" "per , ""TMU (Timer Unit),Timer 2"""
|
|
menuitem "Timer 3" "per , ""TMU (Timer Unit),Timer 3"""
|
|
menuitem "Timer 4" "per , ""TMU (Timer Unit),Timer 4"""
|
|
)
|
|
menuitem "SCMT;System Timer" "per , ""SCMT (System Timer)"""
|
|
menuitem "SUCMT;System Up-Time Clock" "per , ""SUCMT (System Up-Time Clock)"""
|
|
menuitem "PRR;Product Register" "per , ""PRR (Product Register)"""
|
|
menuitem "DBG;Debug and Trace" "per , ""DBG (Debug and Trace)"""
|
|
)
|
|
)
|