Files
Gen4_R-Car_Trace32/2_Trunk/mennetx90mpwapp.men
2025-10-14 09:52:32 +09:00

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Plaintext

; --------------------------------------------------------------------------------
; @Title: netX90MPW-APP Specific Menu
; @Props: Released
; @Author: KOL, PEG, KRZ
; @Changelog: 2018-06-18 KOL
; 2019-12-20 PEG
; 2022-10-26 KRZ
; @Manufacturer: HILSCHER - Hilscher GmbH
; @Core: Cortex-M4F
; @Chip: NETX90MPW
; @Copyright: (C) 1989-2021 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: mennetx90mpwapp.men 16339 2023-07-03 13:30:14Z pegold $
add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (Cortex-M4F)"
(
menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M4F),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M4F),Memory Protection Unit"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M4F),Nested Vectored Interrupt Controller"""
menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M4F),Floating-point Unit"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M4F),Debug,Core Debug"""
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M4F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M4F),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
separator
menuitem "ABORT" "per , ""ABORT"""
menuitem "ADC_SEQ" "per , ""ADC_SEQ"""
menuitem "AES" "per , ""AES"""
menuitem "ASIC_CTRL" "per , ""ASIC_CTRL"""
menuitem "BISS_CTRL0_APP" "per , ""BISS_CTRL0_APP"""
menuitem "BISS_CTRL1_APP" "per , ""BISS_CTRL1_APP"""
menuitem "BISS0_APP" "per , ""BISS0_APP"""
menuitem "BISS1_APP" "per , ""BISS1_APP"""
menuitem "CAN_CTRL0_APP" "per , ""CAN_CTRL0_APP"""
menuitem "CAN_CTRL1_APP" "per , ""CAN_CTRL1_APP"""
menuitem "CM4_MISC_CTRL" "per , ""CM4_MISC_CTRL"""
menuitem "CM4_SCS" "per , ""CM4_SCS"""
popup "DMAC_APP_CH"
(
menuitem "DMAC_APP_CH0" "per , ""DMAC_APP_CH,DMAC_APP_CH0"""
menuitem "DMAC_APP_CH1" "per , ""DMAC_APP_CH,DMAC_APP_CH1"""
menuitem "DMAC_APP_CH2" "per , ""DMAC_APP_CH,DMAC_APP_CH2"""
)
menuitem "DMAC_APP_REG" "per , ""DMAC_APP_REG"""
menuitem "DMAC_MUX_APP" "per , ""DMAC_MUX_APP"""
menuitem "ECC_CTRL_APP" "per , ""ECC_CTRL_APP"""
menuitem "ENDAT_CTRL0_APP" "per , ""ENDAT_CTRL0_APP"""
menuitem "ENDAT_CTRL1_APP" "per , ""ENDAT_CTRL1_APP"""
menuitem "ENDAT0_APP" "per , ""ENDAT0_APP"""
menuitem "ENDAT1_APP" "per , ""ENDAT1_APP"""
menuitem "ETH" "per , ""ETH"""
menuitem "GLOBAL_BUF_MAN" "per , ""GLOBAL_BUF_MAN"""
menuitem "GPIO_APP" "per , ""GPIO_APP"""
menuitem "GPIO_XPIC_APP" "per , ""GPIO_XPIC_APP"""
menuitem "HASH" "per , ""HASH"""
menuitem "HIF_ASYNCMEM_CTRL" "per , ""HIF_ASYNCMEM_CTRL"""
menuitem "HIF_IO_CTRL" "per , ""HIF_IO_CTRL"""
menuitem "HIF_SDRAM_CTRL" "per , ""HIF_SDRAM_CTRL"""
menuitem "HIFMEM_PRIORITY_CTRL" "per , ""HIFMEM_PRIORITY_CTRL"""
menuitem "I2C_APP" "per , ""I2C_APP"""
menuitem "I2C_XPIC_APP" "per , ""I2C_XPIC_APP"""
menuitem "IDPM_COM" "per , ""IDPM_COM"""
menuitem "IFLASH_CFG2" "per , ""IFLASH_CFG2"""
menuitem "IO_LINK_IRQ" "per , ""IO_LINK_IRQ"""
menuitem "MCP_APP" "per , ""MCP_APP"""
menuitem "MCP_XPIC_APP" "per , ""MCP_XPIC_APP"""
menuitem "MIIMU" "per , ""MIIMU"""
menuitem "MLED_CTRL_APP" "per , ""MLED_CTRL_APP"""
menuitem "MMIO_CTRL" "per , ""MMIO_CTRL"""
menuitem "MTGY" "per , ""MTGY"""
menuitem "NFIFO" "per , ""NFIFO"""
menuitem "PAD_CTRL" "per , ""PAD_CTRL"""
menuitem "PIO_APP" "per , ""PIO_APP"""
menuitem "RANDOM" "per , ""RANDOM"""
menuitem "SAMPLE_AT_PORN_STAT" "per , ""SAMPLE_AT_PORN_STAT"""
menuitem "SPI_XPIC_APP" "per , ""SPI_XPIC_APP"""
menuitem "SPI0_APP" "per , ""SPI0_APP"""
menuitem "SPI1_APP" "per , ""SPI1_APP"""
menuitem "SPI2_APP" "per , ""SPI2_APP"""
menuitem "SQI" "per , ""SQI"""
menuitem "SYSTIME_APP" "per , ""SYSTIME_APP"""
menuitem "SYSTIME_LT_APP" "per , ""SYSTIME_LT_APP"""
menuitem "SYSTIME_LT_XPIC_APP" "per , ""SYSTIME_LT_XPIC_APP"""
menuitem "TIMER_APP" "per , ""TIMER_APP"""
menuitem "TIMER_XPIC_APP" "per , ""TIMER_XPIC_APP"""
menuitem "TRIGGER_IRQ_APP" "per , ""TRIGGER_IRQ_APP"""
menuitem "UART_APP" "per , ""UART_APP"""
menuitem "UART_XPIC_APP" "per , ""UART_XPIC_APP"""
menuitem "VIC_XPIC_APP" "per , ""VIC_XPIC_APP"""
menuitem "WDG_APP" "per , ""WDG_APP"""
menuitem "WDG_XPIC_APP" "per , ""WDG_XPIC_APP"""
popup "XLINK"
(
menuitem "XLINK0" "per , ""XLINK,XLINK0"""
menuitem "XLINK1" "per , ""XLINK,XLINK1"""
menuitem "XLINK2" "per , ""XLINK,XLINK2"""
menuitem "XLINK3" "per , ""XLINK,XLINK3"""
menuitem "XLINK4" "per , ""XLINK,XLINK4"""
menuitem "XLINK5" "per , ""XLINK,XLINK5"""
menuitem "XLINK6" "per , ""XLINK,XLINK6"""
menuitem "XLINK7" "per , ""XLINK,XLINK7"""
)
menuitem "XPIC_APP_DEBUG" "per , ""XPIC_APP_DEBUG"""
menuitem "XPIC_APP_REGS" "per , ""XPIC_APP_REGS"""
)
)