712 lines
41 KiB
Plaintext
712 lines
41 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: G9090x Specific Menu
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; @Props: Released
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; @Author: JDU
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; @Changelog: 2023-05-19 JDU
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; @Manufacturer: SemiDrive
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; @Core: Cortex-R5F, Cortex-A55
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; @Chip: G9090
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; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: meng9h.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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if (CORENAME()=="CORTEXR5F")
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(
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popup "[:chip]Core Registers (Cortex-R5F)"
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(
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menuitem "[:chip]ID Registers" "per , ""Core Registers (Cortex-R5F),ID Registers"""
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menuitem "[:chip]System Control and Configuration" "per , ""Core Registers (Cortex-R5F),System Control and Configuration"""
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menuitem "[:chip]MPU Control and Configuration" "per , ""Core Registers (Cortex-R5F),MPU Control and Configuration"""
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menuitem "[:chip]Cache Control and Configuration" "per , ""Core Registers (Cortex-R5F),Cache Control and Configuration"""
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menuitem "[:chip]TCM Control and Configuration" "per , ""Core Registers (Cortex-R5F),TCM Control and Configuration"""
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menuitem "[:chip]System Performance Monitor" "per , ""Core Registers (Cortex-R5F),System Performance Monitor"""
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separator
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menuitem "[:chip]Debug Registers" "per , ""Core Registers (Cortex-R5F),Debug Registers"""
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menuitem "[:chip]Breakpoint Registers" "per , ""Core Registers (Cortex-R5F),Breakpoint Registers"""
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menuitem "[:chip]Watchpoint Control Registers" "per , ""Core Registers (Cortex-R5F),Watchpoint Control Registers"""
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)
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)
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else if (CORENAME()=="CORTEXA55")
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(
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popup "[:chip]Core Registers (Cortex-A55)"
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(
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menuitem "[:chip]ID Registers[AArch64]" "per , ""Core Registers (Cortex-A55),AArch64,ID Registers"""
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menuitem "[:chip]System Control and Configuration[AArch64]" "per , ""Core Registers (Cortex-A55),AArch64,System Control and Configuration"""
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menuitem "[:chip]System Instructions[AArch64]" "per , ""Core Registers (Cortex-A55),AArch64,System Control and Configuration,System Instructions"""
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menuitem "[:chip]Memory Management Unit[AArch64]" "per , ""Core Registers (Cortex-A55),AArch64,Memory Management Unit"""
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menuitem "[:chip]Virtualization Extensions[AArch64]" "per , ""Core Registers (Cortex-A55),AArch64,Virtualization Extensions"""
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menuitem "[:chip]Cache Control and Configuration[AArch64]" "per , ""Core Registers (Cortex-A55),AArch64,Cache Control and Configuration"""
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menuitem "[:chip]System Performance Monitor[AArch64]" "per , ""Core Registers (Cortex-A55),AArch64,System Performance Monitor"""
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menuitem "[:chip]System Timer Registers[AArch64]" "per , ""Core Registers (Cortex-A55),AArch64,System Timer Registers"""
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menuitem "[:chip]Generic Interrupt Controller System Registers[AArch64]" "per , ""Core Registers (Cortex-A55),AArch64,Generic Interrupt Controller System Registers"""
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separator
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menuitem "[:chip]Debug Registers[AArch64]" "per , ""Core Registers (Cortex-A55),AArch64,Debug Registers"""
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menuitem "[:chip]Activity Monitors Unit[AArch64]" "per , ""AArch64,Activity Monitors Unit"""
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separator
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menuitem "[:chip]Breakpoint Registers[AArch64]" "per , ""Core Registers (Cortex-A55),AArch64,Breakpoint Registers"""
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menuitem "[:chip]Watchpoint Registers[AArch64]" "per , ""Core Registers (Cortex-A55),AArch64,Watchpoint Registers"""
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separator
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menuitem "[:chip]LORegions Registers[AArch64]" "per , ""Core Registers (Cortex-A55),AArch64,LORegions Registers"""
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separator
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menuitem "[:chip]DynamIQ Shared Unit[AArch64]" "per , ""Core Registers (Cortex-A55),AArch64,DynamIQ Shared Unit"""
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separator
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menuitem "[:chip]ID Registers[AArch32]" "per , ""Core Registers (Cortex-A55),AArch32,ID Registers"""
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menuitem "[:chip]System Control and Configuration[AArch32]" "per , ""Core Registers (Cortex-A55),AArch32,System Control and Configuration"""
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menuitem "[:chip]Memory Management Unit[AArch32]" "per , ""Core Registers (Cortex-A55),AArch32,Memory Management Unit"""
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menuitem "[:chip]Virtualization Extensions[AArch32]" "per , ""Core Registers (Cortex-A55),AArch32,Virtualization Extensions"""
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menuitem "[:chip]Cache Control and Configuration[AArch32]" "per , ""Core Registers (Cortex-A55),AArch32,Cache Control and Configuration"""
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menuitem "[:chip]System Performance Monitor[AArch32]" "per , ""Core Registers (Cortex-A55),AArch32,System Performance Monitor"""
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menuitem "[:chip]System Timer Registers[AArch32]" "per , ""Core Registers (Cortex-A55),AArch32,System Timer Registers"""
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menuitem "[:chip]Generic Interrupt Controller System Registers[AArch32]" "per , ""Core Registers (Cortex-A55),AArch32,Generic Interrupt Controller System Registers"""
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separator
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menuitem "[:chip]Debug Registers[AArch32]" "per , ""Core Registers (Cortex-A55),AArch32,Debug Registers"""
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separator
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menuitem "[:chip]Breakpoint Registers[AArch32]" "per , ""Core Registers (Cortex-A55),AArch32,Breakpoint Registers"""
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menuitem "[:chip]Watchpoint Registers[AArch32]" "per , ""Core Registers (Cortex-A55),AArch32,Watchpoint Registers"""
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separator
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menuitem "[:chip]DynamIQ Shared Unit[AArch32]" "per , ""Core Registers (Cortex-A55),AArch32,DynamIQ Shared Unit"""
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separator
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menuitem "[:chip]Interrupt Controller" "per , ""Core Registers (Cortex-A55),Interrupt Controller"""
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)
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)
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separator
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menuitem "ADC;12-bit Analog-to-Digital Converter" "per , ""ADC (12-bit Analog-to-Digital Converter)"""
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popup "ATU;Address Translation Unit"
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(
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menuitem "FTBU_SECURE_CORE" "per , ""ATU (Address Translation Unit),FTBU_SECURE_CORE"""
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menuitem "FTBU_MP_CORE" "per , ""ATU (Address Translation Unit),FTBU_MP_CORE"""
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menuitem "FTBU_VDSP" "per , ""ATU (Address Translation Unit),FTBU_VDSP"""
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menuitem "FTBU_JPU_P0" "per , ""ATU (Address Translation Unit),FTBU_JPU_P0"""
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menuitem "FTBU_VPU2_P0" "per , ""ATU (Address Translation Unit),FTBU_VPU2_P0"""
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menuitem "FTBU_VPU1_P0" "per , ""ATU (Address Translation Unit),FTBU_VPU1_P0"""
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menuitem "FTBU_JPU_P1" "per , ""ATU (Address Translation Unit),FTBU_JPU_P1"""
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menuitem "FTBU_VPU2_P1" "per , ""ATU (Address Translation Unit),FTBU_VPU2_P1"""
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menuitem "FTBU_VPU1_P1" "per , ""ATU (Address Translation Unit),FTBU_VPU1_P1"""
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)
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popup "CANFD;Controller Area Network with Flexible Data-Rate"
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(
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menuitem "CANFD1" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD1"""
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menuitem "CANFD2" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD2"""
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menuitem "CANFD3" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD3"""
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menuitem "CANFD4" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD4"""
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menuitem "CANFD5" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD5"""
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menuitem "CANFD6" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD6"""
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menuitem "CANFD7" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD7"""
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menuitem "CANFD8" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD8"""
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menuitem "CANFD9" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD9"""
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menuitem "CANFD10" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD10"""
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menuitem "CANFD11" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD11"""
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menuitem "CANFD12" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD12"""
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menuitem "CANFD13" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD13"""
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menuitem "CANFD14" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD14"""
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menuitem "CANFD15" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD15"""
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menuitem "CANFD16" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD16"""
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menuitem "CANFD17" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD17"""
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menuitem "CANFD18" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD18"""
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menuitem "CANFD19" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD19"""
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menuitem "CANFD20" "per , ""CANFD (Controller Area Network with Flexible Data-Rate),CANFD20"""
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)
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popup "CE;Crypto Engine Control Registers"
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(
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menuitem "CE1_REG" "per , ""CE (Crypto Engine Control Registers),CE1_REG"""
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menuitem "CE2_REG" "per , ""CE (Crypto Engine Control Registers),CE2_REG"""
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)
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popup "CKGEN;Clock Generation"
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(
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menuitem "CKGEN_XPU" "per , ""CKGEN (Clock Generation),CKGEN_XPU"""
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menuitem "CKGEN_DISP" "per , ""CKGEN (Clock Generation),CKGEN_DISP"""
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menuitem "CKGEN_AP" "per , ""CKGEN (Clock Generation),CKGEN_AP"""
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menuitem "CKGEN_SAFETY" "per , ""CKGEN (Clock Generation),CKGEN_SAFETY"""
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)
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popup "CSI;CSI Interface"
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(
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menuitem "CSI1" "per , ""CSI (CSI Interface),CSI1"""
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menuitem "CSI2" "per , ""CSI (CSI Interface),CSI2"""
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menuitem "CSI3" "per , ""CSI (CSI Interface),CSI3"""
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menuitem "MIPI_CSI1" "per , ""CSI (CSI Interface),MIPI_CSI1"""
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menuitem "MIPI_CSI2" "per , ""CSI (CSI Interface),MIPI_CSI2"""
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)
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popup "DSI;Interface DSI"
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(
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menuitem "MIPI_DSI1" "per , ""DSI (Interface DSI),MIPI_DSI1"""
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menuitem "MIPI_DSI2" "per , ""DSI (Interface DSI),MIPI_DSI2"""
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)
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popup "DDR;DRAM Controller"
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(
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menuitem "DDR_CTRL" "per , ""DDR (DRAM Controller),DDR_CTRL"""
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menuitem "DDR_PHY" "per , ""DDR (DRAM Controller),DDR_PHY"""
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)
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menuitem "DISP_MUX;Display MUX" "per , ""DISP_MUX (Display MUX)"""
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popup "DMAC;DMA Controller"
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(
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menuitem "DMA1" "per , ""DMAC (DMA Controller),DMA1"""
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menuitem "DMA2" "per , ""DMAC (DMA Controller),DMA2"""
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menuitem "DMA3" "per , ""DMAC (DMA Controller),DMA3"""
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menuitem "DMA4" "per , ""DMAC (DMA Controller),DMA4"""
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menuitem "DMA5" "per , ""DMAC (DMA Controller),DMA5"""
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menuitem "DMA6" "per , ""DMAC (DMA Controller),DMA6"""
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menuitem "DMA7" "per , ""DMAC (DMA Controller),DMA7"""
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menuitem "DMA8" "per , ""DMAC (DMA Controller),DMA8"""
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)
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popup "DMA_MUX;DMA MUX Controller"
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(
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menuitem "DMA_MUX_PCIE1" "per , ""DMA_MUX (DMA MUX Controller),DMA_MUX_PCIE1"""
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menuitem "DMA_MUX_PCIE2" "per , ""DMA_MUX (DMA MUX Controller),DMA_MUX_PCIE2"""
|
|
menuitem "DMA_MUX1" "per , ""DMA_MUX (DMA MUX Controller),DMA_MUX1"""
|
|
menuitem "DMA_MUX2" "per , ""DMA_MUX (DMA MUX Controller),DMA_MUX2"""
|
|
menuitem "DMA_MUX3" "per , ""DMA_MUX (DMA MUX Controller),DMA_MUX3"""
|
|
menuitem "DMA_MUX4" "per , ""DMA_MUX (DMA MUX Controller),DMA_MUX4"""
|
|
menuitem "DMA_MUX5" "per , ""DMA_MUX (DMA MUX Controller),DMA_MUX5"""
|
|
menuitem "DMA_MUX6" "per , ""DMA_MUX (DMA MUX Controller),DMA_MUX6"""
|
|
menuitem "DMA_MUX7" "per , ""DMA_MUX (DMA MUX Controller),DMA_MUX7"""
|
|
menuitem "DMA_MUX8" "per , ""DMA_MUX (DMA MUX Controller),DMA_MUX8"""
|
|
)
|
|
menuitem "EFUSEC;Fuse Controller" "per , ""EFUSEC (Fuse Controller)"""
|
|
popup "ETHERNET;Ethernet Controller"
|
|
(
|
|
menuitem "ETHERNET1" "per , ""ETHERNET (Ethernet Controller),ETHERNET1"""
|
|
menuitem "ETHERNET2" "per , ""ETHERNET (Ethernet Controller),ETHERNET2"""
|
|
)
|
|
if (CORENAME()=="CORTEXA55")
|
|
(
|
|
popup "GIC;Generic Interrupt Controller"
|
|
(
|
|
menuitem "GIC_A55" "per , ""GIC (Generic Interrupt Controller),GIC_A55"""
|
|
menuitem "GIC_A55_MP" "per , ""GIC (Generic Interrupt Controller),GIC_A55_MP"""
|
|
)
|
|
)
|
|
popup "GPIO;General-Purpose IO Controller"
|
|
(
|
|
menuitem "GPIO1" "per , ""GPIO (General-Purpose IO Controller),GPIO1"""
|
|
menuitem "GPIO2" "per , ""GPIO (General-Purpose IO Controller),GPIO2"""
|
|
menuitem "GPIO3" "per , ""GPIO (General-Purpose IO Controller),GPIO3"""
|
|
menuitem "GPIO4" "per , ""GPIO (General-Purpose IO Controller),GPIO4"""
|
|
menuitem "GPIO5" "per , ""GPIO (General-Purpose IO Controller),GPIO5"""
|
|
)
|
|
popup "GPU;GPU Controller"
|
|
(
|
|
menuitem "GPU1" "per , ""GPU (GPU Controller),GPU1"""
|
|
menuitem "GPU2" "per , ""GPU (GPU Controller),GPU2"""
|
|
)
|
|
popup "I2C;Inter-Integrated Circuit Interface"
|
|
(
|
|
menuitem "I2C1" "per , ""I2C (Inter-Integrated Circuit Interface),I2C1"""
|
|
menuitem "I2C2" "per , ""I2C (Inter-Integrated Circuit Interface),I2C2"""
|
|
menuitem "I2C3" "per , ""I2C (Inter-Integrated Circuit Interface),I2C3"""
|
|
menuitem "I2C4" "per , ""I2C (Inter-Integrated Circuit Interface),I2C4"""
|
|
menuitem "I2C5" "per , ""I2C (Inter-Integrated Circuit Interface),I2C5"""
|
|
menuitem "I2C6" "per , ""I2C (Inter-Integrated Circuit Interface),I2C6"""
|
|
menuitem "I2C7" "per , ""I2C (Inter-Integrated Circuit Interface),I2C7"""
|
|
menuitem "I2C8" "per , ""I2C (Inter-Integrated Circuit Interface),I2C8"""
|
|
menuitem "I2C9" "per , ""I2C (Inter-Integrated Circuit Interface),I2C9"""
|
|
menuitem "I2C10" "per , ""I2C (Inter-Integrated Circuit Interface),I2C10"""
|
|
menuitem "I2C11" "per , ""I2C (Inter-Integrated Circuit Interface),I2C11"""
|
|
menuitem "I2C12" "per , ""I2C (Inter-Integrated Circuit Interface),I2C12"""
|
|
)
|
|
popup "I2S;Inter-Integrated Circuit Sound"
|
|
(
|
|
menuitem "I2S_MC1" "per , ""I2S (Inter-Integrated Circuit Sound),I2S_MC1"""
|
|
menuitem "I2S_MC2" "per , ""I2S (Inter-Integrated Circuit Sound),I2S_MC2"""
|
|
menuitem "I2S_SC1" "per , ""I2S (Inter-Integrated Circuit Sound),I2S_SC1"""
|
|
menuitem "I2S_SC2" "per , ""I2S (Inter-Integrated Circuit Sound),I2S_SC2"""
|
|
menuitem "I2S_SC3" "per , ""I2S (Inter-Integrated Circuit Sound),I2S_SC3"""
|
|
menuitem "I2S_SC4" "per , ""I2S (Inter-Integrated Circuit Sound),I2S_SC4"""
|
|
menuitem "I2S_SC5" "per , ""I2S (Inter-Integrated Circuit Sound),I2S_SC5"""
|
|
menuitem "I2S_SC6" "per , ""I2S (Inter-Integrated Circuit Sound),I2S_SC6"""
|
|
menuitem "I2S_SC7" "per , ""I2S (Inter-Integrated Circuit Sound),I2S_SC7"""
|
|
menuitem "I2S_SC8" "per , ""I2S (Inter-Integrated Circuit Sound),I2S_SC8"""
|
|
)
|
|
popup "IRAMC;IRAM Controller"
|
|
(
|
|
menuitem "IRAMC1" "per , ""IRAMC (IRAM Controller),IRAMC1"""
|
|
menuitem "IRAMC2" "per , ""IRAMC (IRAM Controller),IRAMC2"""
|
|
menuitem "IRAMC3" "per , ""IRAMC (IRAM Controller),IRAMC3"""
|
|
menuitem "IRAMC4" "per , ""IRAMC (IRAM Controller),IRAMC4"""
|
|
menuitem "IRAMC5" "per , ""IRAMC (IRAM Controller),IRAMC5"""
|
|
)
|
|
popup "LVDS;LVDS Interface"
|
|
(
|
|
menuitem "LVDS_COMMON" "per , ""LVDS (LVDS Interface),LVDS_COMMON"""
|
|
menuitem "LVDS1" "per , ""LVDS (LVDS Interface),LVDS1"""
|
|
menuitem "LVDS2" "per , ""LVDS (LVDS Interface),LVDS2"""
|
|
menuitem "LVDS3" "per , ""LVDS (LVDS Interface),LVDS3"""
|
|
menuitem "LVDS4" "per , ""LVDS (LVDS Interface),LVDS4"""
|
|
)
|
|
popup "MAC;Memory Access Controller"
|
|
(
|
|
menuitem "MAC1" "per , ""MAC (Memory Access Controller),MAC1"""
|
|
menuitem "MAC2" "per , ""MAC (Memory Access Controller),MAC2"""
|
|
menuitem "MAC3" "per , ""MAC (Memory Access Controller),MAC3"""
|
|
menuitem "MAC4" "per , ""MAC (Memory Access Controller),MAC4"""
|
|
)
|
|
menuitem "MAILBOX;MAILBOX" "per , ""MAILBOX (MAILBOX)"""
|
|
popup "MSHC;SD/eMMC"
|
|
(
|
|
menuitem "MSHC1" "per , ""MSHC (SD/eMMC),MSHC1"""
|
|
menuitem "MSHC2" "per , ""MSHC (SD/eMMC),MSHC2"""
|
|
menuitem "MSHC3" "per , ""MSHC (SD/eMMC),MSHC3"""
|
|
menuitem "MSHC4" "per , ""MSHC (SD/eMMC),MSHC4"""
|
|
)
|
|
popup "OSC;Crystal-less Oscillator"
|
|
(
|
|
menuitem "OSC_SAFETY" "per , ""OSC (Crystal-less Oscillator),OSC_SAFETY"""
|
|
menuitem "OSC_RTC" "per , ""OSC (Crystal-less Oscillator),OSC_RTC"""
|
|
)
|
|
popup "OSPI;Octal-SPI"
|
|
(
|
|
menuitem "OSPI1" "per , ""OSPI (Octal-SPI),OSPI1"""
|
|
menuitem "OSPI2" "per , ""OSPI (Octal-SPI),OSPI2"""
|
|
)
|
|
popup "PCIE1;PCI Express 1"
|
|
(
|
|
menuitem "PCIE1_PF0" "per , ""PCIE1 (PCI Express 1),PCIE1_PF0"""
|
|
menuitem "PCIE1_VF01" "per , ""PCIE1 (PCI Express 1),PCIE1_VF01"""
|
|
menuitem "PCIE1_VF23" "per , ""PCIE1 (PCI Express 1),PCIE1_VF23"""
|
|
menuitem "PCIE1_PF1" "per , ""PCIE1 (PCI Express 1),PCIE1_PF1"""
|
|
menuitem "PCIE1_VF45" "per , ""PCIE1 (PCI Express 1),PCIE1_VF45"""
|
|
menuitem "PCIE1_VF67" "per , ""PCIE1 (PCI Express 1),PCIE1_VF67"""
|
|
menuitem "PCIE1_ATU_DMA" "per , ""PCIE1 (PCI Express 1),PCIE1_ATU_DMA"""
|
|
menuitem "PCIE1_NCR" "per , ""PCIE1 (PCI Express 1),PCIE1_NCR"""
|
|
)
|
|
popup "PCIE2;PCI Express 2"
|
|
(
|
|
menuitem "PCIE2_PF0" "per , ""PCIE2 (PCI Express 2),PCIE2_PF0"""
|
|
menuitem "PCIE2_ATU_DMA" "per , ""PCIE2 (PCI Express 2),PCIE2_ATU_DMA"""
|
|
menuitem "PCIE2_NCR" "per , ""PCIE2 (PCI Express 2),PCIE2_NCR"""
|
|
)
|
|
popup "PCIE_PHY;PCIe PHY Configuration"
|
|
(
|
|
menuitem "PCIE_PHY" "per , ""PCIE_PHY (PCIe PHY Configuration),PCIE_PHY"""
|
|
menuitem "PCIE_PHY_NCR" "per , ""PCIE_PHY (PCIe PHY Configuration),PCIE_PHY_NCR"""
|
|
)
|
|
popup "PINCTRL;I/O Pins Controller"
|
|
(
|
|
menuitem "PINCTRL_AP" "per , ""PINCTRL (I/O Pins Controller),PINCTRL_AP"""
|
|
menuitem "PINCTRL_RTC" "per , ""PINCTRL (I/O Pins Controller),PINCTRL_RTC"""
|
|
menuitem "PINCTRL_SAFETY" "per , ""PINCTRL (I/O Pins Controller),PINCTRL_SAFETY"""
|
|
)
|
|
popup "PLL;Phase Locked Loop"
|
|
(
|
|
menuitem "PLL1" "per , ""PLL (Phase Locked Loop),PLL1"""
|
|
menuitem "PLL2" "per , ""PLL (Phase Locked Loop),PLL2"""
|
|
menuitem "PLL3" "per , ""PLL (Phase Locked Loop),PLL3"""
|
|
menuitem "PLL4" "per , ""PLL (Phase Locked Loop),PLL4"""
|
|
menuitem "PLL5" "per , ""PLL (Phase Locked Loop),PLL5"""
|
|
menuitem "PLL6" "per , ""PLL (Phase Locked Loop),PLL6"""
|
|
menuitem "PLL7" "per , ""PLL (Phase Locked Loop),PLL7"""
|
|
menuitem "PLL_LVDS1" "per , ""PLL (Phase Locked Loop),PLL_LVDS1"""
|
|
menuitem "PLL_LVDS2" "per , ""PLL (Phase Locked Loop),PLL_LVDS2"""
|
|
menuitem "PLL_LVDS3" "per , ""PLL (Phase Locked Loop),PLL_LVDS3"""
|
|
menuitem "PLL_LVDS4" "per , ""PLL (Phase Locked Loop),PLL_LVDS4"""
|
|
menuitem "PLL_DISP" "per , ""PLL (Phase Locked Loop),PLL_DISP"""
|
|
menuitem "PLL_HIS" "per , ""PLL (Phase Locked Loop),PLL_HIS"""
|
|
menuitem "PLL_VPU" "per , ""PLL (Phase Locked Loop),PLL_VPU"""
|
|
menuitem "PLL_GPU1" "per , ""PLL (Phase Locked Loop),PLL_GPU1"""
|
|
menuitem "PLL_GPU2" "per , ""PLL (Phase Locked Loop),PLL_GPU2"""
|
|
menuitem "PLL_CPU_CORE" "per , ""PLL (Phase Locked Loop),PLL_CPU_CORE"""
|
|
menuitem "PLL_CPU" "per , ""PLL (Phase Locked Loop),PLL_CPU"""
|
|
menuitem "PLL_CPU_DSU" "per , ""PLL (Phase Locked Loop),PLL_CPU_DSU"""
|
|
menuitem "PLL_HPI" "per , ""PLL (Phase Locked Loop),PLL_HPI"""
|
|
menuitem "PLL_DDR" "per , ""PLL (Phase Locked Loop),PLL_DDR"""
|
|
menuitem "PLL_VSN" "per , ""PLL (Phase Locked Loop),PLL_VSN"""
|
|
)
|
|
menuitem "PMU;Power Management Unit" "per , ""PMU (Power Management Unit)"""
|
|
popup "PVT_SENS;PVT Sensor"
|
|
(
|
|
menuitem "PVT_SNS_SAFETY" "per , ""PVT_SENS (PVT Sensor),PVT_SNS_SAFETY"""
|
|
menuitem "PVT_SNS_AP" "per , ""PVT_SENS (PVT Sensor),PVT_SNS_AP"""
|
|
)
|
|
popup "PWM;Pulse Width Modulation"
|
|
(
|
|
menuitem "PWM1" "per , ""PWM (Pulse Width Modulation),PWM1"""
|
|
menuitem "PWM2" "per , ""PWM (Pulse Width Modulation),PWM2"""
|
|
menuitem "PWM3" "per , ""PWM (Pulse Width Modulation),PWM3"""
|
|
menuitem "PWM4" "per , ""PWM (Pulse Width Modulation),PWM4"""
|
|
menuitem "PWM5" "per , ""PWM (Pulse Width Modulation),PWM5"""
|
|
menuitem "PWM6" "per , ""PWM (Pulse Width Modulation),PWM6"""
|
|
menuitem "PWM7" "per , ""PWM (Pulse Width Modulation),PWM7"""
|
|
menuitem "PWM8" "per , ""PWM (Pulse Width Modulation),PWM8"""
|
|
)
|
|
popup "ROMC;ROM Controller"
|
|
(
|
|
menuitem "ROMC_SAFETY" "per , ""ROMC (ROM Controller),ROMC_SAFETY"""
|
|
menuitem "ROMC_AP" "per , ""ROMC (ROM Controller),ROMC_AP"""
|
|
)
|
|
popup "RPC;Register Access Permission Controller"
|
|
(
|
|
menuitem "RPC_XPU_CLKGEN" "per , ""RPC (Register Access Permission Controller),RPC_XPU_CLKGEN"""
|
|
menuitem "RPC_DISP_CLKGEN" "per , ""RPC (Register Access Permission Controller),RPC_DISP_CLKGEN"""
|
|
menuitem "RPC_XPU_DISP_GLOBAL" "per , ""RPC (Register Access Permission Controller),RPC_XPU_DISP_GLOBAL"""
|
|
menuitem "RPC_AP_CLKGEN" "per , ""RPC (Register Access Permission Controller),RPC_AP_CLKGEN"""
|
|
menuitem "RPC_AP_RSTGEN" "per , ""RPC (Register Access Permission Controller),RPC_AP_RSTGEN"""
|
|
menuitem "RPC_AP_PINCTRL" "per , ""RPC (Register Access Permission Controller),RPC_AP_PINCTRL"""
|
|
menuitem "RPC_AP_GLOBAL" "per , ""RPC (Register Access Permission Controller),RPC_AP_GLOBAL"""
|
|
menuitem "RPC_SAFETY_CLKGEN" "per , ""RPC (Register Access Permission Controller),RPC_SAFETY_CLKGEN"""
|
|
menuitem "RPC_SAFETY_SCR" "per , ""RPC (Register Access Permission Controller),RPC_SAFETY_SCR"""
|
|
menuitem "RPC_SAFETY_RSTGEN" "per , ""RPC (Register Access Permission Controller),RPC_SAFETY_RSTGEN"""
|
|
menuitem "RPC_SAFETY_PINCTRL" "per , ""RPC (Register Access Permission Controller),RPC_SAFETY_PINCTRL"""
|
|
menuitem "RPC_SAFETY_GLOBAL" "per , ""RPC (Register Access Permission Controller),RPC_SAFETY_GLOBAL"""
|
|
)
|
|
popup "RSTGEN;Reset Generation Controller"
|
|
(
|
|
menuitem "RSTGEN_RTC" "per , ""RSTGEN (Reset Generation Controller),RSTGEN_RTC"""
|
|
menuitem "RSTGEN_AP" "per , ""RSTGEN (Reset Generation Controller),RSTGEN_AP"""
|
|
menuitem "RSTGEN_SAFETY" "per , ""RSTGEN (Reset Generation Controller),RSTGEN_SAFETY"""
|
|
)
|
|
popup "RTC;Real-Time Clock"
|
|
(
|
|
menuitem "RTC1" "per , ""RTC (Real-Time Clock),RTC1"""
|
|
menuitem "RTC2" "per , ""RTC (Real-Time Clock),RTC2"""
|
|
)
|
|
popup "SCR;System Control Register"
|
|
(
|
|
menuitem "SCR_AP" "per , ""SCR (System Control Register),SCR_AP"""
|
|
menuitem "SCR_SAFETY" "per , ""SCR (System Control Register),SCR_SAFETY"""
|
|
)
|
|
popup "SEC_STORAGE;Secure Storage"
|
|
(
|
|
menuitem "SEC_STORAGE1" "per , ""SEC_STORAGE (Secure Storage),SEC_STORAGE1"""
|
|
menuitem "SEC_STORAGE2" "per , ""SEC_STORAGE (Secure Storage),SEC_STORAGE2"""
|
|
)
|
|
popup "SEM;Safety Error Manager"
|
|
(
|
|
menuitem "SEM1" "per , ""SEM (Safety Error Manager),SEM1"""
|
|
menuitem "SEM2" "per , ""SEM (Safety Error Manager),SEM2"""
|
|
)
|
|
popup "SPDIF;Sony/Philips Digital Interface"
|
|
(
|
|
menuitem "SPDIF1" "per , ""SPDIF (Sony/Philips Digital Interface),SPDIF1"""
|
|
menuitem "SPDIF2" "per , ""SPDIF (Sony/Philips Digital Interface),SPDIF2"""
|
|
menuitem "SPDIF3" "per , ""SPDIF (Sony/Philips Digital Interface),SPDIF3"""
|
|
menuitem "SPDIF4" "per , ""SPDIF (Sony/Philips Digital Interface),SPDIF4"""
|
|
)
|
|
popup "SPI;Serial Peripheral Interface"
|
|
(
|
|
popup "SPI_SLAVE"
|
|
(
|
|
menuitem "SPI1" "per , ""SPI (Serial Peripheral Interface),SPI_SLAVE,SPI1"""
|
|
menuitem "SPI2" "per , ""SPI (Serial Peripheral Interface),SPI_SLAVE,SPI2"""
|
|
menuitem "SPI3" "per , ""SPI (Serial Peripheral Interface),SPI_SLAVE,SPI3"""
|
|
menuitem "SPI4" "per , ""SPI (Serial Peripheral Interface),SPI_SLAVE,SPI4"""
|
|
menuitem "SPI5" "per , ""SPI (Serial Peripheral Interface),SPI_SLAVE,SPI5"""
|
|
menuitem "SPI6" "per , ""SPI (Serial Peripheral Interface),SPI_SLAVE,SPI6"""
|
|
menuitem "SPI7" "per , ""SPI (Serial Peripheral Interface),SPI_SLAVE,SPI7"""
|
|
menuitem "SPI8" "per , ""SPI (Serial Peripheral Interface),SPI_SLAVE,SPI8"""
|
|
)
|
|
popup "SPI_MASTER"
|
|
(
|
|
menuitem "SPI1" "per , ""SPI (Serial Peripheral Interface),SPI_MASTER,SPI1"""
|
|
menuitem "SPI2" "per , ""SPI (Serial Peripheral Interface),SPI_MASTER,SPI2"""
|
|
menuitem "SPI3" "per , ""SPI (Serial Peripheral Interface),SPI_MASTER,SPI3"""
|
|
menuitem "SPI4" "per , ""SPI (Serial Peripheral Interface),SPI_MASTER,SPI4"""
|
|
menuitem "SPI5" "per , ""SPI (Serial Peripheral Interface),SPI_MASTER,SPI5"""
|
|
menuitem "SPI6" "per , ""SPI (Serial Peripheral Interface),SPI_MASTER,SPI6"""
|
|
menuitem "SPI7" "per , ""SPI (Serial Peripheral Interface),SPI_MASTER,SPI7"""
|
|
menuitem "SPI8" "per , ""SPI (Serial Peripheral Interface),SPI_MASTER,SPI8"""
|
|
)
|
|
)
|
|
menuitem "TM;Tamper Monitor" "per , ""TM (Tamper Monitor)"""
|
|
popup "TMR;Generic Timer"
|
|
(
|
|
menuitem "TMR1" "per , ""TMR (Generic Timer),TMR1"""
|
|
menuitem "TMR2" "per , ""TMR (Generic Timer),TMR2"""
|
|
menuitem "TMR3" "per , ""TMR (Generic Timer),TMR3"""
|
|
menuitem "TMR4" "per , ""TMR (Generic Timer),TMR4"""
|
|
menuitem "TMR5" "per , ""TMR (Generic Timer),TMR5"""
|
|
menuitem "TMR6" "per , ""TMR (Generic Timer),TMR6"""
|
|
menuitem "TMR7" "per , ""TMR (Generic Timer),TMR7"""
|
|
menuitem "TMR8" "per , ""TMR (Generic Timer),TMR8"""
|
|
)
|
|
popup "UART;Universal Asynchronous Receiver and Transmitter"
|
|
(
|
|
menuitem "UART1" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART1"""
|
|
menuitem "UART2" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART2"""
|
|
menuitem "UART3" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART3"""
|
|
menuitem "UART4" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART4"""
|
|
menuitem "UART5" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART5"""
|
|
menuitem "UART6" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART6"""
|
|
menuitem "UART7" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART7"""
|
|
menuitem "UART8" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART8"""
|
|
menuitem "UART9" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART9"""
|
|
menuitem "UART10" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART10"""
|
|
menuitem "UART11" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART11"""
|
|
menuitem "UART12" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART12"""
|
|
menuitem "UART13" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART13"""
|
|
menuitem "UART14" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART14"""
|
|
menuitem "UART15" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART15"""
|
|
menuitem "UART16" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART16"""
|
|
)
|
|
popup "USB1;USB Controller 1"
|
|
(
|
|
menuitem "USB1" "per , ""USB1 (USB Controller 1),USB1"""
|
|
menuitem "USB1_NCR" "per , ""USB1 (USB Controller 1),USB1_NCR"""
|
|
menuitem "USB_PHY1" "per , ""USB1 (USB Controller 1),USB_PHY1"""
|
|
menuitem "USB_PHY1_NCR" "per , ""USB1 (USB Controller 1),USB_PHY1_NCR"""
|
|
)
|
|
popup "USB2;USB Controller 2"
|
|
(
|
|
menuitem "USB2" "per , ""USB2 (USB Controller 2),USB2"""
|
|
menuitem "USB2_NCR" "per , ""USB2 (USB Controller 2),USB2_NCR"""
|
|
menuitem "USB_PHY2" "per , ""USB2 (USB Controller 2),USB_PHY2"""
|
|
menuitem "USB_PHY2_NCR" "per , ""USB2 (USB Controller 2),USB_PHY2_NCR"""
|
|
)
|
|
popup "WDT;Watchdog Timer"
|
|
(
|
|
menuitem "WDT1" "per , ""WDT (Watchdog Timer),WDT1"""
|
|
menuitem "WDT2" "per , ""WDT (Watchdog Timer),WDT2"""
|
|
menuitem "WDT3" "per , ""WDT (Watchdog Timer),WDT3"""
|
|
menuitem "WDT4" "per , ""WDT (Watchdog Timer),WDT4"""
|
|
menuitem "WDT5" "per , ""WDT (Watchdog Timer),WDT5"""
|
|
menuitem "WDT6" "per , ""WDT (Watchdog Timer),WDT6"""
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menuitem "WDT7" "per , ""WDT (Watchdog Timer),WDT7"""
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menuitem "WDT8" "per , ""WDT (Watchdog Timer),WDT8"""
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)
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popup "XTAL;Crystal Oscillator"
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(
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menuitem "XTAL_SAFETY" "per , ""XTAL (Crystal Oscillator),XTAL_SAFETY"""
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menuitem "XTAL_AP" "per , ""XTAL (Crystal Oscillator),XTAL_AP"""
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menuitem "XTAL_RTC" "per , ""XTAL (Crystal Oscillator),XTAL_RTC"""
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)
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)
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)
|