527 lines
20 KiB
Plaintext
527 lines
20 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: AWR Specific Menu
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; @Props: Released
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; @Author: MTR, RMG, KWI, KOL, ASK, MHM, STR, MRO, KOP, CEZ, DLI, DOR, KRZ, PAK,
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; KOF, DAS, TRJ
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; @Changelog: 2016-11-24 ASK
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; 2018-03-02 KOL
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; 2019-01-16 PEG
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; 2019-03-23 MRO
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; 2019-07-18 KOP
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; 2020-12-03 KOF
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; @Manufacturer: TI - Texas Instruments
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; @Core: Cortex-R4F, C674x
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; @Chip: AWR1843, AWR1843-CORE1, AWR1843DSP, AWR1642, AWR1443, AWR6843,
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; AWR6843-CORE1, AWR6843DSP
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; @Copyright: (C) 1989-2019 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menawr.men 16340 2023-07-03 14:25:09Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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if (cpuis("AWR1443"))||(cpuis("AWR1443-CORE0"))||(cpuis("AWR1443-CORE1"))
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(
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popup "Peripherals"
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)
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else if (cpuis("AWR1843"))||(cpuis("AWR1843-CORE1"))||(cpuis("AWR1843DSP"))
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(
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popup "Peripherals"
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)
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else if (cpuis("AWR6843"))||(cpuis("AWR6843-CORE1"))||(cpuis("AWR6843DSP"))
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(
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popup "Peripherals"
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)
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else
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(
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popup "Peripherals"
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)
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(
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if (CORENAME()=="CORTEXR4F")
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(
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popup "[:chip]Core Registers (Cortex-R4F)"
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(
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menuitem "[:chip]ID Registers" "per , ""Core Registers (Cortex-R4F),ID Registers"""
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menuitem "[:chip]System Control and Configuration" "per , ""Core Registers (Cortex-R4F),System Control and Configuration"""
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menuitem "[:chip]MPU Control and Configuration" "per , ""Core Registers (Cortex-R4F),MPU Control and Configuration"""
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menuitem "[:chip]Cache Control and Configuration" "per , ""Core Registers (Cortex-R4F),Cache Control and Configuration"""
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menuitem "[:chip]TCM Control and Configuration" "per , ""Core Registers (Cortex-R4F),TCM Control and Configuration"""
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menuitem "[:chip]System Performance Monitor" "per , ""Core Registers (Cortex-R4F),System Performance Monitor"""
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separator
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menuitem "[:chip]Debug Registers" "per , ""Core Registers (Cortex-R4F),Debug Registers"""
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menuitem "[:chip]Breakpoint Registers" "per , ""Core Registers (Cortex-R4F),Breakpoint Registers"""
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menuitem "[:chip]Watchpoint Control Registers" "per , ""Core Registers (Cortex-R4F),Watchpoint Control Registers"""
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)
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separator
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if cpuis("AWR1443*")
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(
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menuitem "AWR;Power, Reset, Clock Management and Control Registers" "per , ""AWR (Power, Reset, Clock Management and Control Registers)"""
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)
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else if cpuis("AWR6843*")
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(
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popup "AWR;Power, Reset, Clock Management and Control Registers"
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(
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menuitem "MSS TOPRCM Registers" "per , ""AWR (Power, Reset, Clock Management and Control Registers),MSS TOPRCM Registers"""
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menuitem "MSS RCM Registers" "per , ""AWR (Power, Reset, Clock Management and Control Registers),MSS RCM Registers"""
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menuitem "MSS GPCFG Registers" "per , ""AWR (Power, Reset, Clock Management and Control Registers),MSS GPCFG Registers"""
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menuitem "DSS REG Registers" "per , ""AWR (Power, Reset, Clock Management and Control Registers),DSS REG Registers"""
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menuitem "DSS REG2 Registers" "per , ""AWR (Power, Reset, Clock Management and Control Registers),DSS REG2 Registers"""
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)
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)
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else
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(
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popup "AWR;Power, Reset, Clock Management and Control Registers"
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(
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menuitem "DSS REG Registers" "per , ""AWR (Power, Reset, Clock Management and Control Registers),DSS REG Registers"""
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menuitem "DSS REG2 Registers" "per , ""AWR (Power, Reset, Clock Management and Control Registers),DSS REG2 Registers"""
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)
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)
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popup "DMA;Direct Memory Access Controller"
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(
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menuitem "DMA1" "per , ""DMA (Direct Memory Access Controller),DMA1"""
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menuitem "DMA2" "per , ""DMA (Direct Memory Access Controller),DMA2"""
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)
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menuitem "VIM;Vectored Interrupt Manager" "per , ""VIM (Vectored Interrupt Manager)"""
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popup "EDMA;Enhanced Direct Memory Access"
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(
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popup "TPCC"
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(
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menuitem "TPCC0" "per , ""EDMA (Enhanced Direct Memory Access),TPCC,TPCC0"""
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if (cpuis("AWR1642"))||(cpuis("AWR1642-CORE1"))||cpuis("AWR1843*")||cpuis("AWR6843*")
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(
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menuitem "TPCC1" "per , ""EDMA (Enhanced Direct Memory Access),TPCC,TPCC1"""
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)
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)
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popup "TPTC"
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(
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menuitem "TPTC0" "per , ""EDMA (Enhanced Direct Memory Access),TPTC,TPTC0"""
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menuitem "TPTC1" "per , ""EDMA (Enhanced Direct Memory Access),TPTC,TPTC1"""
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if (cpuis("AWR1642"))||(cpuis("AWR1642-CORE1"))||cpuis("AWR1843*")||cpuis("AWR6843*")
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(
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menuitem "TPTC2" "per , ""EDMA (Enhanced Direct Memory Access),TPTC,TPTC2"""
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menuitem "TPTC3" "per , ""EDMA (Enhanced Direct Memory Access),TPTC,TPTC3"""
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)
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)
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)
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popup "HSI;High-Speed Interface"
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(
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menuitem "CBUFF and LVDS Registers" "per , ""HSI (High-Speed Interface),CBUFF and LVDS Registers"""
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if (cpuis("AWR1443"))||(cpuis("AWR1443-CORE0"))||(cpuis("AWR1443-CORE1"))
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(
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menuitem "CSI2_PROTOCOL_ENGINE Registers" "per , ""HSI (High-Speed Interface),CSI2_PROTOCOL_ENGINE Registers"""
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menuitem "CSI2_PHY Registers" "per , ""HSI (High-Speed Interface),CSI2_PHY Registers"""
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)
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)
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if (cpuis("AWR1443"))||(cpuis("AWR1443-CORE0"))||(cpuis("AWR1443-CORE1"))||cpuis("AWR1843*")||cpuis("AWR6843*")
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(
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popup "HWA;Hardware Accelerator"
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(
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menuitem "ACC_PARAM Registers" "per , ""HWA (Hardware Accelerator),ACC_PARAM Registers"""
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menuitem "ACC_STATIC Registers" "per , ""HWA (Hardware Accelerator),ACC_STATIC Registers"""
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)
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)
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popup "RTI;Real Time Interrupt"
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(
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if cpuis("AWR1843*")||cpuis("AWR6843*")
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(
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menuitem "WDT/RTI1" "per , ""RTI (Real Time Interrupt),WDT/RTI1"""
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menuitem "RTI2" "per , ""RTI (Real Time Interrupt),RTI2"""
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)
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menuitem "RTI-A" "per , ""RTI (Real Time Interrupt),RTI-A"""
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menuitem "RTI-B/WDT" "per , ""RTI (Real Time Interrupt),RTI-B/WDT"""
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)
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popup "GIO;General Purpose I/0"
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(
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menuitem "IRQ Function Registers" "per , ""GIO (General Purpose I/0),IRQ Function Registers"""
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popup "I/O Function Registers"
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(
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menuitem "GPIO_A" "per , ""GIO (General Purpose I/0),I/O Function Registers,GPIO_A"""
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menuitem "GPIO_B" "per , ""GIO (General Purpose I/0),I/O Function Registers,GPIO_B"""
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menuitem "GPIO_C" "per , ""GIO (General Purpose I/0),I/O Function Registers,GPIO_C"""
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menuitem "GPIO_D" "per , ""GIO (General Purpose I/0),I/O Function Registers,GPIO_D"""
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menuitem "GPIO_E" "per , ""GIO (General Purpose I/0),I/O Function Registers,GPIO_E"""
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menuitem "GPIO_F" "per , ""GIO (General Purpose I/0),I/O Function Registers,GPIO_F"""
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menuitem "GPIO_G" "per , ""GIO (General Purpose I/0),I/O Function Registers,GPIO_G"""
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menuitem "GPIO_H" "per , ""GIO (General Purpose I/0),I/O Function Registers,GPIO_H"""
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menuitem "Slew Rate Registers" "per , ""GIO (General Purpose I/0),Slew Rate Registers"""
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)
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)
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popup "MAILBOX;Mailbox"
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(
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menuitem "BSS_MBOX4MSS" "per , ""MAILBOX (Mailbox),BSS_MBOX4MSS"""
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if (cpuis("AWR1642"))||(cpuis("AWR1642-CORE1"))||cpuis("AWR1843*")||cpuis("AWR6843*")
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(
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menuitem "BSS_MBOX4GEM" "per , ""MAILBOX (Mailbox),BSS_MBOX4GEM"""
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menuitem "GEM_MBOX4BSS" "per , ""MAILBOX (Mailbox),GEM_MBOX4BSS"""
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menuitem "MSS_MBOX4GEM" "per , ""MAILBOX (Mailbox),MSS_MBOX4GEM"""
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menuitem "GEM_MBOX4MSS" "per , ""MAILBOX (Mailbox),GEM_MBOX4MSS"""
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)
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menuitem "MSS_MBOX4BSS" "per , ""MAILBOX (Mailbox),MSS_MBOX4BSS"""
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)
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if (cpuis("AWR1642"))||(cpuis("AWR1642-CORE1"))||cpuis("AWR1843*")||cpuis("AWR6843*")
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(
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popup "DMM;Data Modification Module"
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(
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menuitem "DMM-2" "per , ""DMM (Data Modification Module),DMM-2"""
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menuitem "DMM-1" "per , ""DMM (Data Modification Module),DMM-1"""
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)
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popup "EPWM;Enhanced Pulse Width Modulator"
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(
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menuitem "MSS_ETPWM1" "per , ""EPWM (Enhanced Pulse Width Modulator),MSS_ETPWM1"""
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menuitem "MSS_ETPWM2" "per , ""EPWM (Enhanced Pulse Width Modulator),MSS_ETPWM2"""
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menuitem "MSS_ETPWM3" "per , ""EPWM (Enhanced Pulse Width Modulator),MSS_ETPWM3"""
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)
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)
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if !cpuis("AWR1843*")&&!cpuis("AWR6843*")
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(
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menuitem "DCAN;Controller Area Network" "per , ""DCAN (Controller Area Network)"""
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)
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if (cpuis("AWR1642"))||(cpuis("AWR1642-CORE1"))||cpuis("AWR1843*")
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(
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popup "MCAN;Modular Controller Area Network"
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(
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menuitem "CAN-FD Module Configuration" "per , ""MCAN (Modular Controller Area Network),CAN-FD Module Configuration"""
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menuitem "MCAN ECC Module" "per , ""MCAN (Modular Controller Area Network),MCAN ECC Module"""
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)
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)
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else if cpuis("AWR6843*")
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(
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popup "MCAN;Modular Controller Area Network"
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(
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menuitem "CAN-FD Module Configuration" "per , ""MCAN (Modular Controller Area Network),CAN-FD Module Configuration"""
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menuitem "MCAN ECC Module" "per , ""MCAN (Modular Controller Area Network),MCAN ECC Module"""
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menuitem "CAN-FD Module B Configuration" "per , ""MCAN (Modular Controller Area Network),CAN-FD Module B Configuration"""
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menuitem "MCAN ECC Module B" "per , ""MCAN (Modular Controller Area Network),MCAN ECC Module B"""
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)
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)
|
|
popup "MIBSPI;Multi-Buffered Serial Peripheral Interface Module"
|
|
(
|
|
menuitem "Control Registers A" "per , ""MIBSPI (Multi-Buffered Serial Peripheral Interface Module),Control Registers A"""
|
|
menuitem "Multi-Buffer RAM A" "per , ""MIBSPI (Multi-Buffered Serial Peripheral Interface Module),Multi-Buffer RAM A"""
|
|
if (cpuis("AWR1642")||cpuis("AWR1642-CORE1")||cpuis("AWR1843*")||cpuis("AWR6843*"))
|
|
(
|
|
menuitem "Control Registers B" "per , ""MIBSPI (Multi-Buffered Serial Peripheral Interface Module),Control Registers B"""
|
|
menuitem "Multi-Buffer RAM B" "per , ""MIBSPI (Multi-Buffered Serial Peripheral Interface Module),Multi-Buffer RAM B"""
|
|
)
|
|
)
|
|
popup "QSPI;Quad Serial Peripheral Interface"
|
|
(
|
|
if cpuis("AWR1843*")||cpuis("AWR6843*")
|
|
(
|
|
menuitem "EXT FLASH" "per , ""QSPI (Quad Serial Peripheral Interface),EXT FLASH"""
|
|
)
|
|
menuitem "MSS QSPI" "per , ""QSPI (Quad Serial Peripheral Interface),MSS QSPI"""
|
|
)
|
|
menuitem "I2C;Inter-Integrated Circuit" "per , ""I2C (Inter-Integrated Circuit)"""
|
|
popup "SCI;Serial Communication Interface"
|
|
(
|
|
menuitem "SCI-A" "per , ""SCI (Serial Communication Interface),SCI-A"""
|
|
menuitem "SCI-B" "per , ""SCI (Serial Communication Interface),SCI-B"""
|
|
)
|
|
if cpuis("AWR1843*")||cpuis("AWR6843*")
|
|
(
|
|
menuitem "DCC;Dual Clock Comparator" "per , ""DCC (Dual Clock Comparator)"""
|
|
)
|
|
else
|
|
(
|
|
popup "DCC;Dual Clock Comparator"
|
|
(
|
|
menuitem "DCC-A" "per , ""DCC (Dual Clock Comparator),DCC-A"""
|
|
menuitem "DCC-B" "per , ""DCC (Dual Clock Comparator),DCC-B"""
|
|
)
|
|
)
|
|
menuitem "ESM;Error Signaling Module" "per , ""ESM (Error Signaling Module)"""
|
|
menuitem "CRC;Cyclic Redundancy Check" "per , ""CRC (Cyclic Redundancy Check)"""
|
|
if !cpuis("AWR6843*")
|
|
(
|
|
menuitem "PBIST;Programmable Built-In Self-Test" "per , ""PBIST (Programmable Built-In Self-Test)"""
|
|
menuitem "STC;Self-Test Controller" "per , ""STC (Self-Test Controller)"""
|
|
)
|
|
)
|
|
else
|
|
(
|
|
popup "AWR;Power, Reset, Clock Management and Control Registers"
|
|
(
|
|
menuitem "DSS_REG" "per , ""AWR (Power, Reset, Clock Management and Control Registers),DSS_REG"""
|
|
menuitem "DSS_REG2" "per , ""AWR (Power, Reset, Clock Management and Control Registers),DSS_REG2"""
|
|
)
|
|
popup "EDMA;Enhanced Direct Memory Access"
|
|
(
|
|
popup "TPCC"
|
|
(
|
|
menuitem "TPCC0" "per , ""EDMA (Enhanced Direct Memory Access),TPCC,TPCC0"""
|
|
menuitem "TPCC1" "per , ""EDMA (Enhanced Direct Memory Access),TPCC,TPCC1"""
|
|
)
|
|
popup "TPTC"
|
|
(
|
|
menuitem "TPTC0" "per , ""EDMA (Enhanced Direct Memory Access),TPTC,TPTC0"""
|
|
menuitem "TPTC1" "per , ""EDMA (Enhanced Direct Memory Access),TPTC,TPTC1"""
|
|
menuitem "TPTC2" "per , ""EDMA (Enhanced Direct Memory Access),TPTC,TPTC2"""
|
|
menuitem "TPTC3" "per , ""EDMA (Enhanced Direct Memory Access),TPTC,TPTC3"""
|
|
)
|
|
)
|
|
popup "RTI;Real Time Interrupt"
|
|
(
|
|
menuitem "RTI1" "per , ""RTI (Real Time Interrupt),RTI1"""
|
|
menuitem "RTI2" "per , ""RTI (Real Time Interrupt),RTI2"""
|
|
)
|
|
menuitem "HSI;High-Speed Interface" "per , ""HSI (High-Speed Interface)"""
|
|
if cpuis("AWR1843*")||cpuis("AWR6843*")
|
|
(
|
|
popup "HWA;Hardware Accelerator"
|
|
(
|
|
menuitem "ACC_PARAM Registers" "per , ""HWA (Hardware Accelerator),ACC_PARAM Registers"""
|
|
menuitem "ACC_STATIC Registers" "per , ""HWA (Hardware Accelerator),ACC_STATIC Registers"""
|
|
)
|
|
)
|
|
popup "MAILBOX;Mailbox"
|
|
(
|
|
menuitem "BSS_MBOX4MSS" "per , ""MAILBOX (Mailbox),BSS_MBOX4MSS"""
|
|
menuitem "BSS_MBOX4GEM" "per , ""MAILBOX (Mailbox),BSS_MBOX4GEM"""
|
|
menuitem "GEM_MBOX4BSS" "per , ""MAILBOX (Mailbox),GEM_MBOX4BSS"""
|
|
menuitem "MSS_MBOX4GEM" "per , ""MAILBOX (Mailbox),MSS_MBOX4GEM"""
|
|
menuitem "GEM_MBOX4MSS" "per , ""MAILBOX (Mailbox),GEM_MBOX4MSS"""
|
|
menuitem "MSS_MBOX4BSS" "per , ""MAILBOX (Mailbox),MSS_MBOX4BSS"""
|
|
)
|
|
menuitem "SCI;Serial Communication Interface" "per , ""SCI (Serial Communication Interface)"""
|
|
menuitem "ESM;Error Signaling Module" "per , ""ESM (Error Signaling Module)"""
|
|
menuitem "CRC;Cyclic Redundancy Check" "per , ""CRC (Cyclic Redundancy Check)"""
|
|
)
|
|
)
|
|
)
|