315 lines
6.8 KiB
Plaintext
315 lines
6.8 KiB
Plaintext
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/************************************************************************
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*
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* start.sx
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*
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* Startup code for application.
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*
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************************************************************************/
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/************************************************************************
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* Include files
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************************************************************************/
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#include "mips.h"
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/************************************************************************
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* Definitions
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************************************************************************/
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#define PERIOD 0x100
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#define STACK_SIZE 0x1000
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/************************************************************************
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* Public variables
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************************************************************************/
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/************************************************************************
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* Static variables
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************************************************************************/
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.lcomm ARG, 0x10
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/************************************************************************
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* Implementation : Static functions
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************************************************************************/
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/************************************************************************
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* Implementation : Public functions
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************************************************************************/
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/************************************************************************
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*
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* _start
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* Description :
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* -------------
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*
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* Function linked to application start address
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*
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* Initialises sp and gp registers and clears bss section
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*
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* Return values :
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* ---------------
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*
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* None
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*
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************************************************************************/
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.section ".text","ax"
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.globl _start
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.ent _start
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_start:
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.set noreorder
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/* Initialize some registers to get deterministic data trace.
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Probably that would lead to an error if we ould try to return to Yamon. */
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move $16, $0
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move $17, $0
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move $18, $0
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move $18, $0
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move $19, $0
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move $20, $0
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move $21, $0
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move $22, $0
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move $23, $0
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/* Setup sp and gp */
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la $28, _gp
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la $29, _sp
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/* read out architecture revision from CP0 16 selection 0 */
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// lw $11, MIPS_REL($5)
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mfc0 $11, $16, 0
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li $8, 0x1C00
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and $11, $8
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beq $11, $0,_clear_bss /* Architecture revison 0: => No EBASE register! */
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nop
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/* Handle sp and gp for multicore applications */
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/* read out CPU core number from CP0 15.1: CPUNum = bits [9:0] */
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mfc0 $11, $15, 1
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li $8, 0x3FF
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and $11, $8
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bne $11, $0, _generic /* not core 0 ? */
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nop
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_clear_bss:
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/* Clear bss */
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la $8, _fbss /* First address */
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la $9, _end /* Last address */
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addu $9, 3
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li $10, ~3
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and $9, $10
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1:
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sw $0, 0($8)
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bne $8, $9, 1b
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addiu $8, 4
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_generic:
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/* calculate and set core specific sp. */
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move $8, $0
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li $8, STACK_SIZE
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mul $8, $8, $11 /* calculate stack offset relative to stack base address */
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sub $29, $8 /* calculate core instance specific stack start address */
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/* Set Interupt vector base t0 0x80003000*/
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mfc0 $8, $15, 1
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ori $8, $8, 0x3000
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mtc0 $8, $15, 1
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/* clear BEV , ERL & IE in Status register */
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mfc0 $8, $12
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and $8, ~0x400005
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/* Set IM7(Timer) in Status register */
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or $8, 0x8000
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mtc0 $8, $12
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/* Clear Count Register and set Compare Register */
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mtc0 $0, $9
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lui $8, PERIOD
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mtc0 $8, $11
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/* Setup argc and argv */
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lui $4, 0
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la $5, ARG
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/* read out configuration registers */
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_readConfig_0:
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mfc0 $11, $16, 0
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li $8, 0x1C00
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and $8, $11
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beq $8, $0,_setMipsRev /* Architecture revison 0: => No EBASE register! */
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move $9, $0
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li $9, 0x1
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_setMipsRev:
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sw $9, MIPS_REL($5)
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addiu $4, $4, 1
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/* check if config 1 is available */
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li $8, 0x80000000
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and $8, $11
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beq $8, $0,_configReadOutEnd
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_readConfig_1:
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mfc0 $11, $16, 1
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li $8, 0x4
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and $8, $11
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beq $8, $0,_setISA
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move $9, $0
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li $9, MIPS16
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_setISA:
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sw $9, ISA($5)
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addiu $4, $4, 1
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li $8, 0x1
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and $8, $11
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beq $8, $0,_setFPU
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move $9, $0
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li $9, 0x1
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_setFPU:
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sw $9, FPU($5)
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addiu $4, $4, 1
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/* check if config 2 is available */
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li $8, 0x80000000
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and $8, $11
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beq $8, $0,_configReadOutEnd
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_readConfig_2:
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mfc0 $11, $16, 2
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/* check if config 3 is available */
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li $8, 0x80000000
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and $8, $11
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beq $8, $0,_configReadOutEnd
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_readConfig_3:
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mfc0 $11, $16, 3
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li $8, 0x8000
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and $8, $11
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beq $8, $0,_setISA2 /*Micro Mips*/
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lw $9, ISA($5)
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li $9, MICRO_MIPS
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_setISA2:
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sw $9, ISA($5)
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_configReadOutEnd:
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/* Get ready to jump to main */
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move $16, $31
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la $8, main
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/* Jump to main */
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jal $8
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nop
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b _exit
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.set reorder
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.end _start
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.section ".text","ax"
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.globl _exit
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.ent _exit
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_exit:
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.set noreorder
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b _exit
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.set reorder
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.end _exit
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/************************************************************************
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*
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* __main, _gccmain
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* Description :
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* -------------
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*
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* Dummy functions called by main() function.
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*
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* GNU-gcc 2.8.1 : main() calls __main
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* GNU-gcc 2.9 : main() calls __gccmain
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*
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* Return values :
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* ---------------
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*
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* None
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*
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************************************************************************/
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.set noreorder
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.globl __main
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.globl __gccmain
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.ent __main
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__main:
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__gccmain:
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jr $31
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nop
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.end __main
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/************************************************************************
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*
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* Description : _exception
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* -------------
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*
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************************************************************************/
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.section ".excp","ax"
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.globl _exception
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.ent _exception
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.set noreorder
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_exception:
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/* increment PC by 4, because in case of an exception the EPC points to the location where the exception has been caused! */
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mfc0 $25, $14
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addi $25,$25, 4
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mtc0 $25, $14
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eret
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nop
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.end _exception
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.set reorder
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/************************************************************************
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*
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* Description : _genexception
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* -------------
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*
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************************************************************************/
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.section ".gen_excp","ax"
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.globl _genexception
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.ent _genexception
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.set noreorder
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_genexception:
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/* Clear Count Register and set Compare Register */
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mtc0 $0, $9
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lui $25, PERIOD
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mtc0 $25, $11
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eret
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nop
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.end _genexception
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.set reorder
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