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Gen4_R-Car_Trace32/2_Trunk/demo/arm/flash/s32k14x-spi.cmm
2025-10-14 09:52:32 +09:00

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; --------------------------------------------------------------------------------
; @Title: SPI FLASH Programming script for S32K148
; @Description:
; SPI FLASH(ISSI, IS25LP016D) is connected LPSPI
;
; pin connection
; PORTB_PCR0 , LPSPI0_PCS0
; PORTB_PCR1 , LPSPI0_SOUT
; PORTB_PCR2 , LPSPI0_SCK
; PORTB_PCR3 , LPSPI0_SIN
;
; Internal SRAM : 0x20000000
; LPSPI Base : 0x4002C00
;
; @Chip: S32K148
; @Board:
; @Author: JIM
; @Keywords: ARM
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: s32k14x-spi.cmm 10516 2022-02-02 11:39:30Z bschroefel $
LOCAL &arg1
ENTRY &arg1
&arg1=STRing.UPpeR("&arg1") // for example "PREPAREONLY"
&SPI_BASE=0x4002C000
; --------------------------------------------------------------------------------
; initialize and start the debugger
RESet
SYStem.RESet
SYStem.CPU S32K148
IF VERSION.BUILD.BASE()<83714.
(
SYStem.CONFIG ETM Base E:0xE0041000
)
SYStem.CONFIG.DEBUGPORTTYPE SWD
IF hardware.COMBIPROBE()||hardware.UTRACE()
(
SYStem.CONFIG.CONNECTOR MIPI20T
)
SYStem.Option DUALPORT ON
SYStem.MemAccess DAP
SYStem.JtagClock CTCK 10MHz
Trace.DISable
SYStem.Up
; --------------------------------------------------------------------------------
; disable BootROM
GOSUB DisableBootrom
; --------------------------------------------------------------------------------
; disable Watchdog
GOSUB DisableWatchdog
; --------------------------------------------------------------------------------
; Clock Enable
GOSUB ClockEnable
; --------------------------------------------------------------------------------
; PIN MUX
GOSUB PinMux
; --------------------------------------------------------------------------------
; LPSPI Init
GOSUB LpspiInit
; --------------------------------------------------------------------------------
; Read flash id by a direct access
GOSUB READ_ID_TEST
; --------------------------------------------------------------------------------
; FLASHFILE Configuration
Break.RESet
FLASHFILE.RESet
//FLASFILE.CONFIG
FLASHFILE.CONFIG &SPI_BASE
// FLASHFILE.TARGET <code range> <data range> <Algorithm file>
FLASHFILE.TARGET 0x20000000++0x1FFF ESD:0x20002000++0x27FF ~~/demo/arm/flash/byte/spi64_lpspi.bin /KEEP /DUALPORT
FLASHFILE.GETID
//End of the test prepareonly
IF "&arg1"=="PREPAREONLY"
ENDDO
FLASHFILE.DUMP 0x0
//Erase Serial FLASH
;FLASHFILE.ERASE 0x0--0xFFFFF
//Write
;FLASHFILE.LOAD * 0x0
;FLASHFILE.LOAD * 0x0 /ComPare ;verify
ENDDO
READ_ID_TEST:
(
PER.Set.simple ASD:&SPI_BASE+0x014 %Long -1 ;clear status
PER.Set.simple ASD:&SPI_BASE+0x064 %Long 0x9F010203
GOSUB DisableWatchdog ;for the cpu running
&temp=Data.Long(A:&SPI_BASE+0x074)
PRINT "read 1th: 0x" (&temp>>24.)&0xFF
PRINT "read 2nd: 0x" (&temp>>16.)&0xFF " (manufacture ID)"
PRINT "read 3rd: 0x" (&temp>>8.)&0xFF " (device ID)"
PRINT "read 4th: 0x" (&temp)&0xFF
PER.Set.simple ASD:&SPI_BASE+0x014 %Long -1
RETURN
)
DisableBootrom: ;()
(
Data.Set AD:0x4007F010 %LE %Long 0x6
Data.Set AD:0x4007F014 %LE %Long 0x0
RETURN
)
DisableWatchdog: ;()
(
LOCAL &tmp1 &tmp2
&tmp1=Data.Long(ST:0x20000000)
&tmp2=Data.Long(ST:0x20000004)
Register.SWAP
; The watchdog has a restrictive timing. It has to be configured and unlocked within a peripod
; of 128 cycles. Therefor the unlock sequence need to be done by a small target program.
Data.Assemble ST:0x20000000 str r1,[r0] ;SD:0x40052004 = 0xD928C520 (Key)
Data.Assemble , str r3,[r2] ;SD:0x40052000 = 0x00002120 (Control register)
Data.Assemble , str r5,[r4] ;SD:0x40052008 = 0x0000FFFF (Timeout value)
Data.Assemble , bkpt #0
Register.Set PC 0x20000000
Register.Set SP 0x20001000
Register.Set R0 0x40052004
Register.Set R1 0xD928C520
Register.Set R2 0x40052000
Register.Set R3 0x00002120
Register.Set R4 0x40052008
Register.Set R5 0x0000FFFF
Go.direct
WAIT !RUN()
Data.Set ST:0x20000000 %Long &tmp1
Data.Set ST:0x20000004 %Long &tmp2
Register.SWAP
RETURN
)
ClockEnable:
(
PER.Set.simple ASD:0x40064200 %Long 0x0
PER.Set.simple ASD:0x40064200 %Long 0x04000000
PER.Set.simple ASD:0x40064204 %Long 0x0101
PER.Set.simple ASD:0x40064208 %Long 0x1
PER.Set.simple ASD:0x40064200 %Long 0x5
PER.Set.simple ASD:0x40064100 %Long 0x0
PER.Set.simple ASD:0x40064100 %Long 0x04000000
PER.Set.simple ASD:0x40064104 %Long 0x0101
PER.Set.simple ASD:0x40064108 %Long 0x24
PER.Set.simple ASD:0x40064100 %Long 0x1
PER.Set.simple ASD:0x40064600 %Long 0x0
PER.Set.simple ASD:0x40064600 %Long 0x04000000
PER.Set.simple ASD:0x40064604 %Long 0x0101
PER.Set.simple ASD:0x40064608 %Long 0x000c0000
PER.Set.simple ASD:0x40064600 %Long 0x1
PER.Set.simple ASD:0x40064014 %Long 0x06020011
PER.Set.simple ASD:0x40064300 %Long 0x01000009
PER.Set.simple ASD:0x40064300 %Long 0x04000000
PER.Set.simple ASD:0x40064304 %Long 0x0101
PER.Set.simple ASD:0x40064308 %Long 0x0
PER.Set.simple ASD:0x40064300 %Long 0x09
PER.Set.simple ASD:0x40064014 %Long 0x03000011
PER.Set.simple ASD:0x40064020 %Long 0x03000000
PER.Set.simple ASD:0x40064018 %Long 0x02010003
PER.Set.simple ASD:0x4006401C %Long 0x06000013
//PCC LPSPI Enable
PER.Set.simple ASD:0x400650B0 %Long 0xC3000000
PER.Set.simple ASD:0x40065128 %Long 0xC0000000
RETURN
)
PinMux:
(
PER.Set.simple ASD:0x4004A000 %Long 0x300 ;PORTB_PCR0 , LPSPI0_PCS0
PER.Set.simple ASD:0x4004A004 %Long 0x300 ;PORTB_PCR1 , LPSPI0_SOUT
PER.Set.simple ASD:0x4004A008 %Long 0x300 ;PORTB_PCR2 , LPSPI0_SCK
PER.Set.simple ASD:0x4004A00C %Long 0x300 ;PORTB_PCR3 , LPSPI0_SIN
RETURN
)
LpspiInit:
(
PER.Set.simple ASD:&SPI_BASE+0x010 %Long 00000002
PER.Set.simple ASD:&SPI_BASE+0x010 %Long 00000000
PER.Set.simple ASD:&SPI_BASE+0x040 %Long 0x010101EE
PER.Set.simple ASD:&SPI_BASE+0x060 %Long 0x10000007 ;TCR
PER.Set.simple ASD:&SPI_BASE+0x018 %Long 0xFFFFFFFF
PER.Set.simple ASD:&SPI_BASE+0x024 %Long 0x3
;PER.Set.simple ASD:&SPI_BASE+0x040 %Long 0x2F2F2E5E ;500kHz
PER.Set.simple ASD:&SPI_BASE+0x040 %Long 0x00000008 ; 5Mhz
PER.Set.simple ASD:&SPI_BASE+0x060 %Long 0x0000001F ;32bit
PER.Set.simple ASD:&SPI_BASE+0x010 %Long 0x1
RETURN
)