220 lines
6.2 KiB
Plaintext
220 lines
6.2 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: SPI FLASH Programming script for S32K148
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; @Description:
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; SPI FLASH(ISSI, IS25LP016D) is connected LPSPI
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;
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; pin connection
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; PORTB_PCR0 , LPSPI0_PCS0
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; PORTB_PCR1 , LPSPI0_SOUT
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; PORTB_PCR2 , LPSPI0_SCK
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; PORTB_PCR3 , LPSPI0_SIN
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;
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; Internal SRAM : 0x20000000
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; LPSPI Base : 0x4002C00
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;
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; @Chip: S32K148
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; @Board:
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; @Author: JIM
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; @Keywords: ARM
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: s32k14x-spi.cmm 10516 2022-02-02 11:39:30Z bschroefel $
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LOCAL &arg1
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ENTRY &arg1
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&arg1=STRing.UPpeR("&arg1") // for example "PREPAREONLY"
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&SPI_BASE=0x4002C000
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; --------------------------------------------------------------------------------
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; initialize and start the debugger
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RESet
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SYStem.RESet
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SYStem.CPU S32K148
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IF VERSION.BUILD.BASE()<83714.
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(
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SYStem.CONFIG ETM Base E:0xE0041000
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)
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SYStem.CONFIG.DEBUGPORTTYPE SWD
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IF hardware.COMBIPROBE()||hardware.UTRACE()
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(
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SYStem.CONFIG.CONNECTOR MIPI20T
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)
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SYStem.Option DUALPORT ON
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SYStem.MemAccess DAP
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SYStem.JtagClock CTCK 10MHz
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Trace.DISable
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SYStem.Up
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; --------------------------------------------------------------------------------
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; disable BootROM
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GOSUB DisableBootrom
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; --------------------------------------------------------------------------------
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; disable Watchdog
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GOSUB DisableWatchdog
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; --------------------------------------------------------------------------------
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; Clock Enable
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GOSUB ClockEnable
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; --------------------------------------------------------------------------------
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; PIN MUX
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GOSUB PinMux
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; --------------------------------------------------------------------------------
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; LPSPI Init
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GOSUB LpspiInit
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; --------------------------------------------------------------------------------
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; Read flash id by a direct access
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GOSUB READ_ID_TEST
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; --------------------------------------------------------------------------------
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; FLASHFILE Configuration
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Break.RESet
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FLASHFILE.RESet
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//FLASFILE.CONFIG
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FLASHFILE.CONFIG &SPI_BASE
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// FLASHFILE.TARGET <code range> <data range> <Algorithm file>
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FLASHFILE.TARGET 0x20000000++0x1FFF ESD:0x20002000++0x27FF ~~/demo/arm/flash/byte/spi64_lpspi.bin /KEEP /DUALPORT
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FLASHFILE.GETID
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//End of the test prepareonly
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IF "&arg1"=="PREPAREONLY"
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ENDDO
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FLASHFILE.DUMP 0x0
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//Erase Serial FLASH
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;FLASHFILE.ERASE 0x0--0xFFFFF
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//Write
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;FLASHFILE.LOAD * 0x0
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;FLASHFILE.LOAD * 0x0 /ComPare ;verify
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ENDDO
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READ_ID_TEST:
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(
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PER.Set.simple ASD:&SPI_BASE+0x014 %Long -1 ;clear status
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PER.Set.simple ASD:&SPI_BASE+0x064 %Long 0x9F010203
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GOSUB DisableWatchdog ;for the cpu running
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&temp=Data.Long(A:&SPI_BASE+0x074)
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PRINT "read 1th: 0x" (&temp>>24.)&0xFF
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PRINT "read 2nd: 0x" (&temp>>16.)&0xFF " (manufacture ID)"
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PRINT "read 3rd: 0x" (&temp>>8.)&0xFF " (device ID)"
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PRINT "read 4th: 0x" (&temp)&0xFF
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PER.Set.simple ASD:&SPI_BASE+0x014 %Long -1
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RETURN
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)
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DisableBootrom: ;()
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(
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Data.Set AD:0x4007F010 %LE %Long 0x6
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Data.Set AD:0x4007F014 %LE %Long 0x0
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RETURN
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)
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DisableWatchdog: ;()
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(
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LOCAL &tmp1 &tmp2
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&tmp1=Data.Long(ST:0x20000000)
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&tmp2=Data.Long(ST:0x20000004)
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Register.SWAP
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; The watchdog has a restrictive timing. It has to be configured and unlocked within a peripod
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; of 128 cycles. Therefor the unlock sequence need to be done by a small target program.
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Data.Assemble ST:0x20000000 str r1,[r0] ;SD:0x40052004 = 0xD928C520 (Key)
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Data.Assemble , str r3,[r2] ;SD:0x40052000 = 0x00002120 (Control register)
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Data.Assemble , str r5,[r4] ;SD:0x40052008 = 0x0000FFFF (Timeout value)
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Data.Assemble , bkpt #0
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Register.Set PC 0x20000000
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Register.Set SP 0x20001000
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Register.Set R0 0x40052004
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Register.Set R1 0xD928C520
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Register.Set R2 0x40052000
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Register.Set R3 0x00002120
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Register.Set R4 0x40052008
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Register.Set R5 0x0000FFFF
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Go.direct
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WAIT !RUN()
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Data.Set ST:0x20000000 %Long &tmp1
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Data.Set ST:0x20000004 %Long &tmp2
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Register.SWAP
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RETURN
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)
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ClockEnable:
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(
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PER.Set.simple ASD:0x40064200 %Long 0x0
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PER.Set.simple ASD:0x40064200 %Long 0x04000000
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PER.Set.simple ASD:0x40064204 %Long 0x0101
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PER.Set.simple ASD:0x40064208 %Long 0x1
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PER.Set.simple ASD:0x40064200 %Long 0x5
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PER.Set.simple ASD:0x40064100 %Long 0x0
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PER.Set.simple ASD:0x40064100 %Long 0x04000000
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PER.Set.simple ASD:0x40064104 %Long 0x0101
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PER.Set.simple ASD:0x40064108 %Long 0x24
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PER.Set.simple ASD:0x40064100 %Long 0x1
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PER.Set.simple ASD:0x40064600 %Long 0x0
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PER.Set.simple ASD:0x40064600 %Long 0x04000000
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PER.Set.simple ASD:0x40064604 %Long 0x0101
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PER.Set.simple ASD:0x40064608 %Long 0x000c0000
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PER.Set.simple ASD:0x40064600 %Long 0x1
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PER.Set.simple ASD:0x40064014 %Long 0x06020011
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PER.Set.simple ASD:0x40064300 %Long 0x01000009
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PER.Set.simple ASD:0x40064300 %Long 0x04000000
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PER.Set.simple ASD:0x40064304 %Long 0x0101
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PER.Set.simple ASD:0x40064308 %Long 0x0
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PER.Set.simple ASD:0x40064300 %Long 0x09
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PER.Set.simple ASD:0x40064014 %Long 0x03000011
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PER.Set.simple ASD:0x40064020 %Long 0x03000000
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PER.Set.simple ASD:0x40064018 %Long 0x02010003
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PER.Set.simple ASD:0x4006401C %Long 0x06000013
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//PCC LPSPI Enable
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PER.Set.simple ASD:0x400650B0 %Long 0xC3000000
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PER.Set.simple ASD:0x40065128 %Long 0xC0000000
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RETURN
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)
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PinMux:
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(
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PER.Set.simple ASD:0x4004A000 %Long 0x300 ;PORTB_PCR0 , LPSPI0_PCS0
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PER.Set.simple ASD:0x4004A004 %Long 0x300 ;PORTB_PCR1 , LPSPI0_SOUT
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PER.Set.simple ASD:0x4004A008 %Long 0x300 ;PORTB_PCR2 , LPSPI0_SCK
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PER.Set.simple ASD:0x4004A00C %Long 0x300 ;PORTB_PCR3 , LPSPI0_SIN
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RETURN
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)
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LpspiInit:
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(
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PER.Set.simple ASD:&SPI_BASE+0x010 %Long 00000002
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PER.Set.simple ASD:&SPI_BASE+0x010 %Long 00000000
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PER.Set.simple ASD:&SPI_BASE+0x040 %Long 0x010101EE
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PER.Set.simple ASD:&SPI_BASE+0x060 %Long 0x10000007 ;TCR
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PER.Set.simple ASD:&SPI_BASE+0x018 %Long 0xFFFFFFFF
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PER.Set.simple ASD:&SPI_BASE+0x024 %Long 0x3
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;PER.Set.simple ASD:&SPI_BASE+0x040 %Long 0x2F2F2E5E ;500kHz
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PER.Set.simple ASD:&SPI_BASE+0x040 %Long 0x00000008 ; 5Mhz
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PER.Set.simple ASD:&SPI_BASE+0x060 %Long 0x0000001F ;32bit
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PER.Set.simple ASD:&SPI_BASE+0x010 %Long 0x1
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RETURN
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) |