157 lines
4.0 KiB
Plaintext
157 lines
4.0 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: R-CAR-H2 eMMC FLASH Program script for R-CARH2 on LAGER board
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; @Description:
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; eMMC FLASH(Micron,MTFC4GM) is connected to MMC Channel 1
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;
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; SRAM: 0xE63A0000
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; MMC(controller) Base: 0xEE220000
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;
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; @Author: jjeong
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; @Chip: R8A7790X
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; @Keywords: RCAR RCARH2 Flash eMMC
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: rcarh2-emmc.cmm 10516 2022-02-02 11:39:30Z bschroefel $
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LOCAL &arg1
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ENTRY &arg1
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&arg1=STRing.UPpeR("&arg1") // for example "PREPAREONLY"
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; Start-up Script file for R-CARH2 on LAGER board
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; PEG, July 23, 2013
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; Depending on the Master Boot Mode Selection only the first CA15 or the first CA7 is active.
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; SW8.7=MD6=ON, SW8.8=MD7=ON -> CA15
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; => SW8.7=MD6=OFF, SW8.8=MD7=ON -> CA7 <= REQUIRED
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; Therefore I first connect to this core in order to power and deassert reset of the other cores.
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; as the boot-code is not thread save we stop all cores at reset via CTI
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; and load out sieve demo into SRAM.
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; In this demo we only use the A7 cores!
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; master boot CA15/CA7 CPU0 reset vector break
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RESet
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SYStem.CPU RCARH2-CA7
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CORE.ASSIGN 1
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SYStem.Option PWRCHECKFIX OFF; use OFF in case of CA7 is active
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SYStem.Up
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; power up power domain of CA15 SCU and CA7 SCU
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;Data.Set ANSD:0xE618018c %Long 0x1 ; PWRONCR5 (CA15 SCU)
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Data.Set ANSD:0xE618010c %Long 0x1 ; PWRONCR3 (CA7 SCU)
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&pfc_base=0xE6060000
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&GPSR3=&pfc_base+0x0010
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&IPSR11=&pfc_base+0x004C
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&MMC_BASE=0xEE220000
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//Enable clk for MMC1
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Data.Set A:0xE615013C %Long Data.Long(A:0xE615013C)&0xFFFFFFFDF ; (1<<5) has to be cleared for MMC1
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//Pin mux for MMC1_CLK,CMD,DAT[0:3]
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GOSUB WRITE_OR &IPSR11 0x2AB0
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GOSUB WRITE_OR &GPSR3 0x3F000000
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Data.Set &MMC_BASE+0x40 %Long 0x0
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Data.Set &MMC_BASE+0x18 %Long 0x01060000 ; clk div /128, clk should be slower <400khz
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Data.Set &MMC_BASE+0x44 %Long 0x1cf3f
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GOSUB READ_ID_TEST
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FLASHFILE.RESet
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FLASHFILE.CONFIG 0xEE220000
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// FLASHFILE.TARGET <code range> <data range> <Algorithm file>
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FLASHFILE.TARGET 0xe63A0000++0x1FFF 0xe63A2000++0x21FF ~~/demo/arm/flash/byte/emmc_shmmc.bin /KEEP
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//Read FLASH Manufacture and Device ID
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FLASHFILE.GETID
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Data.Set &MMC_BASE+0x18 %Long 0x01000000 ; clk div /2
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//print the ECSD registers on AREA
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FLASHFILE.GETEXTCSD
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//End of the test prepareonly
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IF "&arg1"=="PREPAREONLY"
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ENDDO
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//Read FLASH
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FLASHFILE.DUMP 0x0
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//Erase FLASH
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; FLASHFILE.ERASE 0x0--0xFFFFFF
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//Write FLASH
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; FLASHFILE.LOAD * 0x0
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; FLASHFILE.LOAD * 0x0 /ComPare ;verify
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ENDDO
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WRITE_OR:
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ENTRY &addr &data
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&data=((&data)|(Data.Long(A:&addr)))
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¬_data=~(&data)
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Data.Set &pfc_base %Long ¬_data
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Data.Set &addr %Long &data
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RETURN
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READ_ID_TEST:
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//CMD0
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RePeaT 2.
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(
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Data.Set &MMC_BASE+0x40 %Long 0xFFFEFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x0 ;arg
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Data.Set &MMC_BASE+0x0 %Long 0x0 ;cmd
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WAIT 10.ms
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)
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//CMD1
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RePeaT 10.
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(
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Data.Set &MMC_BASE+0x40 %Long 0xFFFEFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x40FF8000 ;arg
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Data.Set &MMC_BASE+0x0 %Long (0x1<<24.)|(0x1<<22.) ;cmd1
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WAIT 100.ms
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&resp=Data.Long(A:(&MMC_BASE+0x2c))
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//print "CMD1 resp: 0x" &resp
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IF (&resp&0x80000000)==0x80000000
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(
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GOTO jump_cmd2
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)
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)
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PRINT "CMD1 fail"
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END
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jump_cmd2:
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//CMD2
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Data.Set &MMC_BASE+0x40 %Long 0xFFFEFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x0 ;arg
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Data.Set &MMC_BASE+0x0 %Long (0x2<<24.)|(0x2<<22.) ;cmd2
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WAIT 10.ms
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//CMD3
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Data.Set &MMC_BASE+0x40 %Long 0xFFFEFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x00010000 ; arg, MMC RCA is (0x0001<<16.)
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Data.Set &MMC_BASE+0x0 %Long (0x3<<24.)|(0x1<<22.) ;cmd3
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WAIT 10.ms
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//CMD10
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Data.Set &MMC_BASE+0x40 %Long 0xFFFEFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x00010000 ; arg, MMC RCA is (0x0001<<16.)
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Data.Set &MMC_BASE+0x0 %Long (0xA<<24.)|(0x2<<22.);cmd10
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WAIT 10.ms
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//Response2
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PRINT "CID register"
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PRINT "[127:104] 0x" Data.Long(A:(&MMC_BASE+0x20))
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PRINT "[103:72] 0x" Data.Long(A:(&MMC_BASE+0x24))
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PRINT "[71:40] 0x" Data.Long(A:(&MMC_BASE+0x28))
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PRINT "[39:8] 0x" Data.Long(A:(&MMC_BASE+0x2C))
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RETURN
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