172 lines
5.4 KiB
Plaintext
172 lines
5.4 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: Generic Hyper FLASH Program script for the R-Car Gen3 devices
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; @Description:
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; Generic Hyper FLASH Program script for the R-Car Gen3 devices using a small
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; application code on the Cortex-A5x to program the flash.
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; The KL512S (Spansion Hyper flash) is connected to the SPI Multi I/O Bus
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; Controller (RPC)
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;
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; Prerequisites:
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; * Set the Cortex-A5x as boot core to flash using Cortex-A5x
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; * Set the Cortex-R7 as boot core to flash using Cortex-R7
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;
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; SRAM: 0xE6300000--0xE6307FFF
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; QuadSPI(controller) Base: 0xEE200000
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; QuadSPI memory mapped ADDRESS: 0x8000000
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;
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; Calling convention
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; Do rcar_gen3-hyper.cmm <cpu> <option>
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; <cpu> SoC name / R-Car Gen3 device to be programmed.
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; Optional, if empty CPU selection dialog will appear
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; <option> Optional parameter. If "PREPAREONLY" is pased, flash programming
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; is prepared (flash declaration), but flash is not programmed
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;
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; Example for R8A77951 (R-Car H3):
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; Do rcar_gen3-hyper.cmm R8A77951 "PREPAREONLY"
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; Do rcar_gen3-cr7-hyper.cmm R8A77951-CR7 "PREPAREONLY"
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;
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; @Author: JIM
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; @Keywords: KL512 Spansion HyperFlash QuadSPI
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: rcar_gen3-hyper.cmm 12741 2023-11-17 07:55:15Z mschaeffner $
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LOCAL &cpu &arg1 &BASE
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ENTRY &cpu &arg1
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&arg1=STRing.UPpeR("&arg1") // for example "PREPAREONLY"
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&BASE=0xEE200000
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RESet
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SYStem.RESet
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IF "&cpu"==""
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(
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SYStem.CPU R8A779*
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&cpu=CPU()
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)
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ELSE
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SYStem.CPU &cpu
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; --------------------------------------------------------------------------------
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; Setup CPU
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SYStem.JtagClock CTCK 10MHz
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CORE.ASSIGN 1. // boot core
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; CORE.ASSIGN 2. // Alternate boot core if previoius line does not work
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Trace.DISable
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SYStem.Up
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; Cortex-A5x or Cortex-R7?
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IF ARMARCHVERSION()<8.
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GOSUB MPU_CONFIG
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; enable SRAM
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Data.Set A:0xE67F0018 %LE %Long 0x1
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IF ARMARCHVERSION()>=8.
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(
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Register.Set I 0
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Register.Set M 0x5 ;EL1h
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)
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//Enable RPC PowerON & Clock
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Data.Set A:0xE6150900 %LE %Long ~(0x3F1E017)
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Data.Set A:0xE6150994 %LE %Long 0x3F1E017 ; Module STOP register, BIT17 RPC SMSTPCR9 (System module stop control register 9)
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Data.Set A:0xE6150900 %LE %Long ~(0x13)
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Data.Set A:0xE6150238 %LE %Long 0x13 ;80Mhz, 0x17=40Mhz RPCCKCR(RPC Clock frequency control register)
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IF ARMARCHVERSION()>=8.
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GOSUB WDOG_DISABLE
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//FLASH READ ID TEST
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AREA.CLEAR
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AREA.view
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GOSUB READ_ID_TEST
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LOCAL &pdd
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&pdd=OS.PresentDemoDirectory()
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Break.RESet
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FLASHFILE.RESet
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//FLASHFILE.CONFIG <RPC Base Address>
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FLASHFILE.CONFIG &BASE
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//FLASHFILE.TARGET <code range> <data range> <Algorithm file>
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FLASHFILE.TARGET 0xE6300000++0x1FFF 0xE6302000++0x21FF &pdd/flash/word/hyper256_shrpc.bin /KEEP
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//Read FLASH Manufacture and Device ID
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FLASHFILE.GETID
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//End of the test prepareonly
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IF "&arg1"=="PREPAREONLY"
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ENDDO
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//Dump window for Hyper FLASH
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FLASHFILE.DUMP 0x0
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//Erase Hyper FLASH
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; FLASHFILE.ERASE 0x0--0xFFFFF
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//Write Hyper FLASH
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; FLASHFILE.LOAD * 0x0
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ENDDO
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; --------------------------------------------------------------------------------
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WDOG_DISABLE:
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//RCLK Watchdog Timer disable
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Data.Set EZAXI:0xE6020004 %Long 0xA5A5A500|0x00 ; Write 0 to the RCLK Watchdog Timer Control Register A
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Data.Set EZAXI:0xE6020008 %Long 0xA5A5A500|0x00 ; Write 0 to the RCLK Watchdog Timer Control Register B
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//System Watchdog Timer disable
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Data.Set EZAXI:0xE6030004 %Long 0xA5A5A500|0x00 ; Write 0 to the System Watchdog Timer Control Register A
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Data.Set EZAXI:0xE6030008 %Long 0xA5A5A500|0x00 ; Write 0 to the System Watchdog Timer Control Register B
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RETURN
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; --------------------------------------------------------------------------------
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READ_ID_TEST:
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(
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&backup_cmncr=Data.Long(A:(&BASE+0x00))
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Data.Set A:(&BASE+0x7C) %Long 0x80000263 ;physical calibration.
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Data.Set A:(&BASE+0x00) %Long 0x81fff301
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Data.Set A:(&BASE+0x24) %Long 0x0 ;write memory
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Data.Set A:(&BASE+0x28) %Long 0x555
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Data.Set A:(&BASE+0x2C) %Long 0x0
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Data.Set A:(&BASE+0x64) %Long 0x5101
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Data.Set A:(&BASE+0x30) %Long 0xA2225408
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Data.Set A:(&BASE+0x40) %Long 0xF0000000 ; Reset(0xF0)
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Data.Set A:(&BASE+0x20) %Long 0x3 ;write access
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Data.Set A:(&BASE+0x7C) %Long 0x80000263 ;physical calibration.
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Data.Set A:(&BASE+0x00) %Long 0x81fff301
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Data.Set A:(&BASE+0x24) %Long 0x0 ;write memory
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Data.Set A:(&BASE+0x28) %Long 0x555
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Data.Set A:(&BASE+0x2C) %Long 0x0
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Data.Set A:(&BASE+0x64) %Long 0x5101
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Data.Set A:(&BASE+0x30) %Long 0xA2225408
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Data.Set A:(&BASE+0x40) %Long 0x98000000 ; CFI Enter(0x98)
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Data.Set A:(&BASE+0x20) %Long 0x3 ;write access
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Data.Set A:(&BASE+0x7C) %Long 0x80000263 ;physical calibration.
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Data.Set A:(&BASE+0x00) %Long 0x81fff301
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Data.Set A:(&BASE+0x24) %Long 0x00800000 ;read memory
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Data.Set A:(&BASE+0x28) %Long 0x0 ;addr
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Data.Set A:(&BASE+0x2C) %Long 0x0
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Data.Set A:(&BASE+0x60) %Long 0xE ;dummy cycle
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Data.Set A:(&BASE+0x64) %Long 0x5101
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Data.Set A:(&BASE+0x30) %Long 0xA222D40C ; 32bit read with dummy cycle
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Data.Set A:(&BASE+0x20) %Long 0x5 ;read access
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WAIT 10.ms
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//print "read_buffer[31:0]: 0x" data.long(A:(&BASE+0x38))
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&temp=Data.Long(A:(&BASE+0x38))
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PRINT "Read 1st: 0x" (&temp>>8.)&0xFF " (Manufacturer)"
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PRINT "Read 2nd: 0x" (&temp>>24.)&0xFF " (Device ID)"
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Data.Set A:(&BASE+0x00) %Long &backup_cmncr
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)
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RETURN
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