171 lines
5.1 KiB
Plaintext
171 lines
5.1 KiB
Plaintext
; @Title: i.MX7 SABRE Board (i.MX 7) eMMC FLASH Program script
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; @Description:
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; The Micron (MTFC4GACAAAM-JWA57) is on the USDHC1
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; SW2[1..8]: 00000000
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; SW3[1..2]: 00
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;
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; SRAM: 0x900000
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; USDHC(controller) Base: 0x30B40000
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;
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; @Author: jjeong
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; @Chip: imx7*
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; @Keywords: Flash eMMC
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; $Id: imx7-emmc.cmm 10516 2022-02-02 11:39:30Z bschroefel $
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;
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LOCAL &arg1
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ENTRY &arg1
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&arg1=STRing.UPpeR("&arg1") // for example "PREPAREONLY"
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&MMC_BASE=0x30B40000 ;SDHC1
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RESet
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SYStem.RESet
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SYStem.CPU IMX7DUAL-CA7
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SYStem.Option ResBreak OFF
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IF VERSION.BUILD()<92177.
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(
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; adjust WaitReset time if required
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SYStem.Option WaitReset 30ms
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)
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ELSE
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(
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SYStem.Option WaitIDCODE 1.5s
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)
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SYStem.JtagClock CTCK 10MHz
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CORE.ASSIGN 1.
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SYStem.Up
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Data.Set C15:0x1 %Long (Data.Long(C15:0x1)&~(0x1005)) ; disable cache and mmu
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GOSUB Config_SDHC1
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GOSUB READ_ID_TEST
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FLASHFILE.RESet
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;FLASHFILE.CONFIG <eMMC controller> <0x0> <0x0>
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FLASHFILE.CONFIG &MMC_BASE 0x0 0x0
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;FLASHFILE.TARGET <<code range>> <<data range>> <<algorithm file>>
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FLASHFILE.TARGET 0x900000++0x1fff EAHB:0x902000++0x3fff ~~/demo/arm/flash/byte/emmc_imx6.bin /KEEP /DualPort
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Data.Set A:&MMC_BASE+0x2C %LE %Long 0x008E10F8 ; 400KHz clk
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FLASHFILE.GETID
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Data.Set A:&MMC_BASE+0x2C %LE %Long 0x008E0202 ; 25Mhz clk
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//Get EXTended CSD registers
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FLASHFILE.GETEXTCSD
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//End of the test prepareonly
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IF "&arg1"=="PREPAREONLY"
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ENDDO
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//When you access to the other partition on the flash
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;FLASHFILE.SETEXTCSD 179. 0x00 ; access: partition null, no boot, access: no boot partition
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;FLASHFILE.SETEXTCSD 179. 0x48 ; access: partition null
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;FLASHFILE.SETEXTCSD 179. 0x49 ; access: partition boot 1
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;FLASHFILE.SETEXTCSD 179. 0x4A ; access: partition boot 2
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FLASHFILE.DUMP 0x0 ; Read NAND
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;FLASHFILE.ERASE 0x0--0xFFFFF ; Erase NAND
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;FLASHFILE.LOAD * 0x0 ; Write NAND
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ENDDO
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Config_SDHC1:
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Data.Set A:0x303846C8 %LE %Long 0x3 ;CCM_CCGR108_CLEAR, clock gating register CCM_CCGR108
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Data.Set A:0x3038AB00 %LE %Long 0x11000001 ;USDHC1_CLK_ROOT
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Data.Set A:0x303846C4 %LE %Long 0x3 ;CCM_CCGR108_SET, clock gating register CCM_CCGR108
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; --------------------------------------------------------------------------------
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; IO Mux for SDHC1
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; --------------------------------------------------------------------------------
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Data.Set A:0x30330194 %LE %Long 0x0 ;USDHC1_CLK, IOMUXC_SW_MUX_CTL_PAD_SD1_CLK
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Data.Set A:0x30330198 %LE %Long 0x0 ;USDHC1_CMD, IOMUXC_SW_MUX_CTL_PAD_SD1_CMD
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Data.Set A:0x3033019C %LE %Long 0x0 ;USDHC1_DAT0, IOMUXC_SW_MUX_CTL_PAD_SD1_DATA0
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Data.Set A:0x303301A0 %LE %Long 0x0 ;USDHC1_DAT0, IOMUXC_SW_MUX_CTL_PAD_SD1_DATA1
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Data.Set A:0x303301A4 %LE %Long 0x0 ;USDHC1_DAT0, IOMUXC_SW_MUX_CTL_PAD_SD1_DATA2
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Data.Set A:0x303301A8 %LE %Long 0x0 ;USDHC1_DAT0, IOMUXC_SW_MUX_CTL_PAD_SD1_DATA3
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Data.Set A:0x30330404 %LE %Long 0x5F; IOMUXC_SW_PAD_CTL_PAD_SD1_CLK
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Data.Set A:0x30330408 %LE %Long 0x5F; IOMUXC_SW_PAD_CTL_PAD_SD1_CMD
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Data.Set A:0x3033040C %LE %Long 0x5F; IOMUXC_SW_PAD_CTL_PAD_SD1_DATA0
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Data.Set A:0x30330410 %LE %Long 0x5F; IOMUXC_SW_PAD_CTL_PAD_SD1_DATA1
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Data.Set A:0x30330414 %LE %Long 0x5F; IOMUXC_SW_PAD_CTL_PAD_SD1_DATA2
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Data.Set A:0x30330418 %LE %Long 0x5F; IOMUXC_SW_PAD_CTL_PAD_SD1_DATA3
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; --------------------------------------------------------------------------------
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; Config SDHC
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; --------------------------------------------------------------------------------
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Data.Set A:&MMC_BASE+0x04 %LE %Long 0x00010200 ; blk size,cnt
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Data.Set A:&MMC_BASE+0x28 %LE %Long 0x08800020 ; bus width, endian
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Data.Set A:&MMC_BASE+0x2C %LE %Long 0x008E1088 ; 400KHz clk
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Data.Set A:&MMC_BASE+0x34 %LE %Long 0x007F0037 ; BRR,BWR, TCI, CCI interrupt enable
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Data.Set A:&MMC_BASE+0x38 %LE %Long 0x007F0037 ; BRR,BWR, TCI, CCI interrupt enable
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Data.Set A:&MMC_BASE+0x44 %LE %Long 0x00100010 ;read/write fifo threshold level 64bytes
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RETURN
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READ_ID_TEST:
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//CMD0
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RePeaT 2.
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(
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Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x0 ;arg
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Data.Set &MMC_BASE+0xc %Long 0x0 ;cmd
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WAIT 10.ms
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)
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//CMD1
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RePeaT 10.
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(
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Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x40FF8000 ;arg
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Data.Set &MMC_BASE+0xc %Long 0x01020000 ;cmd1
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WAIT 100.ms
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&resp=Data.Long(A:(&MMC_BASE+0x10))
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//print "CMD1 resp: 0x" &resp
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IF (&resp&0x80000000)==0x80000000
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(
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GOTO jump_cmd2
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)
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)
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PRINT "CMD1 fail"
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END
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jump_cmd2:
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//CMD2
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Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x0 ;arg
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Data.Set &MMC_BASE+0xc %Long 0x02010000 ;cmd2
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WAIT 10.ms
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//CMD3
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Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x00010000 ; arg, MMC RCA is (0x0001<<16.)
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Data.Set &MMC_BASE+0xc %Long 0x03020000 ;cmd3
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WAIT 10.ms
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//CMD10
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Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x00010000 ; arg, MMC RCA is (0x0001<<16.)
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Data.Set &MMC_BASE+0xc %Long 0x0A010000 ;cmd10
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WAIT 10.ms
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//Response2
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PRINT "CID register"
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PRINT "[127:104] 0x" Data.Long(A:(&MMC_BASE+0x1c))
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PRINT "[103:72] 0x" Data.Long(A:(&MMC_BASE+0x18))
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PRINT "[71:40] 0x" Data.Long(A:(&MMC_BASE+0x14))
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PRINT "[39:8] 0x" Data.Long(A:(&MMC_BASE+0x10))
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RETURN
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