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Gen4_R-Car_Trace32/2_Trunk/pertmpm061.per
woody d411edd9b4 add Trace32 File
2025-10-14 09:52:32 +09:00

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; --------------------------------------------------------------------------------
; @Title: TMPM061 On-Chip Peripherals
; @Props: Released
; @Author: NEJ
; @Changelog: 2022-04-07 NEJ
; @Manufacturer: TOSHIBA - Toshiba
; @Doc: SVD generated, based on: M061.svd (Ver. 1.0)
; @Core: Cortex-M0
; @Chip: TMPM061FWFG
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: pertmpm061.per 14591 2022-04-08 10:34:57Z kwisniewski $
tree.close "Core Registers (Cortex-M0)"
AUTOINDENT.PUSH
AUTOINDENT.OFF
tree "System Control"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 0x8
if (CORENAME()=="CORTEXM1")
group.long 0x10++0x0b
line.long 0x00 "STCSR,SysTick Control and Status Register"
bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock"
textline " "
bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
line.long 0x04 "STRVR,SysTick Reload Value Register"
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
line.long 0x08 "STCVR,SysTick Current Value Register"
hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
else
group.long 0x10++0x0b
line.long 0x00 "STCSR,SysTick Control and Status Register"
bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock"
textline " "
bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
line.long 0x04 "STRVR,SysTick Reload Value Register"
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
line.long 0x08 "STCVR,SysTick Current Value Register"
hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
endif
if (CORENAME()=="CORTEXM1")
rgroup.long 0x1c++0x03
line.long 0x00 "STCR,SysTick Calibration Value Register"
bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1"
bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1"
textline " "
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known"
else
rgroup.long 0x1c++0x03
line.long 0x00 "STCR,SysTick Calibration Value Register"
bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented"
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
textline " "
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors"
endif
rgroup.long 0xd00++0x03
line.long 0x00 "CPUID,CPU ID Base Register"
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer code"
hexmask.long.byte 0x00 20.--23. 1. " VARIANT ,Implementation defined variant number"
textline " "
hexmask.long.byte 0x00 4.--15. 1. " PARTNO ,Number of processor within family"
hexmask.long.byte 0x00 0.--3. 1. " REVISION ,Implementation defined revision number"
group.long 0xd04++0x03
line.long 0x00 "ICSR,Interrupt Control State Register"
bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending"
bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending"
textline " "
bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending"
bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending"
textline " "
bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending"
bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service"
textline " "
bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt"
hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field"
textline " "
hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field"
if (CORENAME()=="CORTEXM0+")
group.long 0xd08++0x03
line.long 0x00 "VTOR,Vector Table Offset Register"
hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address"
else
textline " "
endif
group.long 0xd0c++0x03
line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register"
hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key"
bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian"
textline " "
bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset"
bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear"
group.long 0xd10++0x03
line.long 0x00 "SCR,System Control Register"
bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
textline " "
bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
rgroup.long 0xd14++0x03
line.long 0x00 "CCR,Configuration and Control Register"
bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned"
bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped"
group.long 0xd1c++0x0b
line.long 0x00 "SHPR2,System Handler Priority Register 2"
bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11"
line.long 0x04 "SHPR3,System Handler Priority Register 3"
bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11"
bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11"
line.long 0x08 "SHCSR,System Handler Control and State Register"
bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending"
if (CORENAME()=="CORTEXM0+")
hgroup.long 0x08++0x03
hide.long 0x00 "ACTLR,Auxiliary Control Register"
else
textline " "
endif
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Nested Vectored Interrupt Controller (NVIC)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 12.
tree "Interrupt Enable Registers"
group.long 0x100++0x03
line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
tree.end
tree "Interrupt Pending Registers"
group.long 0x200++0x03
line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
tree.end
width 6.
tree "Interrupt Priority Registers"
group.long 0x400++0x1F
line.long 0x00 "INT0,Interrupt Priority Register"
bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3"
bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3"
bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3"
bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3"
line.long 0x04 "INT1,Interrupt Priority Register"
bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3"
bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3"
bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3"
bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3"
line.long 0x08 "INT2,Interrupt Priority Register"
bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3"
bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3"
bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3"
bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3"
line.long 0x0C "INT3,Interrupt Priority Register"
bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3"
bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3"
bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3"
bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3"
line.long 0x10 "INT4,Interrupt Priority Register"
bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3"
bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3"
bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3"
bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3"
line.long 0x14 "INT5,Interrupt Priority Register"
bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3"
bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3"
bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3"
bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3"
line.long 0x18 "INT6,Interrupt Priority Register"
bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3"
bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3"
bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3"
bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3"
line.long 0x1C "INT7,Interrupt Priority Register"
bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3"
bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3"
bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3"
bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3"
tree.end
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Debug"
tree "Core Debug"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 0xA
group.long 0xD30++0x03
line.long 0x00 "DFSR,Data Fault Status Register"
eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred"
eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred"
textline " "
eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match"
textline " "
eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match"
eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request"
if (CORENAME()=="CORTEXM1")
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
group.long 0xDF0++0x03
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
textline " "
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
textline " "
textline " "
textfld " "
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
else
group.long 0xDF0++0x03
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
textline " "
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
textline " "
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
textline " "
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
endif
else
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
group.long 0xDF0++0x03
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
textline " "
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
textline " "
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
textline " "
textline " "
textfld " "
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
else
group.long 0xDF0++0x03
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
textline " "
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
textline " "
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
textline " "
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
textline " "
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
endif
endif
wgroup.long 0xDF4++0x03
line.long 0x00 "DCRSR,Debug Core Selector Register"
bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write"
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..."
group.long 0xDF8++0x07
line.long 0x00 "DCRDR,Debug Core Register Data Register"
hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor"
line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register"
bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled"
bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error"
textline " "
bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Breakpoint Unit (BPU)"
sif COMPonent.AVAILABLE("BPU")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1))
width 8.
group.long 0x00++0x03
line.long 0x00 "BP_CTRL,Breakpoint Control Register"
bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 1. " KEY ,Key field" "No write,Write"
bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0"
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled"
group.long 0xC++0x03
line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1"
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2"
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled"
group.long 0x14++0x03
line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3"
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled"
else
newline
textline "BPU component base address not specified"
newline
endif
tree.end
tree "Data Watchpoint and Trace Unit (DWT)"
sif COMPonent.AVAILABLE("DWT")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
width 14.
rgroup.long 0x00++0x03
line.long 0x00 "DW_CTRL,DW Control Register "
bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x1c++0x03
line.long 0x00 "DW_PCSR,DW Program Counter Sample Register"
hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF"
group.long 0x20++0x0b
line.long 0x00 "DW_COMP0,DW Comparator Register 0"
hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address"
line.long 0x04 "DW_MASK0,DW Mask Register 0"
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
line.long 0x08 "DW_FUNCTION0,DW Function Register 0"
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
group.long 0x30++0x0b
line.long 0x00 "DW_COMP1,DW Comparator Register 1"
hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address"
line.long 0x04 "DW_MASK1,DW Mask Register 1 "
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
line.long 0x08 "DW_FUNCTION1,DW Function Register 1"
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
else
newline
textline "DWT component base address not specified"
newline
endif
tree.end
tree.end
AUTOINDENT.POP
tree.end
autoindent.on center tree
tree "ADC (10-bit Analog/Digital Converter)"
base ad:0x400FC000
group.long 0x00++0x03
line.long 0x00 "CLK,AD Conversion Clock Setting Register"
bitfld.long 0x00 6.--7. "ADCC,ADCC" "0,1,2,3"
bitfld.long 0x00 0.--2. "ADCLK,ADCLK" "0,1,2,3,4,5,6,7"
group.long 0x04++0x03
line.long 0x00 "MOD0,AD Mode Control Register 0"
rbitfld.long 0x00 7. "EOCFN,EOCFN" "0,1"
rbitfld.long 0x00 6. "ADBFN,ADBFN" "0,1"
bitfld.long 0x00 3.--4. "ITM,ITM" "0,1,2,3"
bitfld.long 0x00 2. "REPEAT,REPEAT" "0,1"
bitfld.long 0x00 1. "SCAN,SCAN" "0,1"
bitfld.long 0x00 0. "ADS,ADS" "0,1"
group.long 0x08++0x03
line.long 0x00 "MOD1,AD Mode Control Register 1"
bitfld.long 0x00 7. "VREFON,VREFON" "0,1"
bitfld.long 0x00 6. "I2AD,I2AD" "0,1"
bitfld.long 0x00 4.--5. "ADSCN,ADSCN" "0,1,2,3"
bitfld.long 0x00 0.--3. "ADCH,ADCH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x0C++0x03
line.long 0x00 "MOD2,AD Mode Control Register 2"
rbitfld.long 0x00 7. "EOCFHP,EOCFHP" "0,1"
rbitfld.long 0x00 6. "ADBFHP,ADBFHP" "0,1"
bitfld.long 0x00 5. "HPADCE,HPADCE" "0,1"
bitfld.long 0x00 0.--3. "HPADCH,HPADCH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x10++0x03
line.long 0x00 "MOD3,AD Mode Control Register 3"
bitfld.long 0x00 5. "ADOBIC0,ADOBIC0" "0,1"
bitfld.long 0x00 1.--4. "ADREGS0,ADREGS0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "ADOBSV0,ADOBSV0" "0,1"
group.long 0x14++0x03
line.long 0x00 "MOD4,AD Mode Control Register 4"
bitfld.long 0x00 7. "HADHS,HADHS" "0,1"
bitfld.long 0x00 6. "HADHTG,HADHTG" "0,1"
bitfld.long 0x00 5. "ADHS,ADHS" "0,1"
bitfld.long 0x00 4. "ADHTG,ADHTG" "0,1"
bitfld.long 0x00 0.--1. "ADRST,ADRST" "0,1,2,3"
group.long 0x18++0x03
line.long 0x00 "MOD5,AD Mode Control Register 5"
bitfld.long 0x00 5. "ADOBIC1,ADOBIC1" "0,1"
bitfld.long 0x00 1.--4. "ADREGS1,ADREGS1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "ADOBSV1,ADOBSV1" "0,1"
rgroup.long 0x30++0x03
line.long 0x00 "REG0,AD Conversion Result Register 08"
hexmask.long.word 0x00 6.--15. 1. "ADR0,ADR0"
bitfld.long 0x00 1. "OVR0,OVR0" "0,1"
bitfld.long 0x00 0. "ADR0RF,ADR0RF" "0,1"
rgroup.long 0x34++0x03
line.long 0x00 "REG1,AD Conversion Result Register 19"
hexmask.long.word 0x00 6.--15. 1. "ADR1,ADR1"
bitfld.long 0x00 1. "OVR1,OVR1" "0,1"
bitfld.long 0x00 0. "ADR1RF,ADR1RF" "0,1"
rgroup.long 0x38++0x03
line.long 0x00 "REG2,AD Conversion Result Register 2A"
hexmask.long.word 0x00 6.--15. 1. "ADR2,ADR2"
bitfld.long 0x00 1. "OVR2,OVR2" "0,1"
bitfld.long 0x00 0. "ADR2RF,ADR2RF" "0,1"
rgroup.long 0x3C++0x03
line.long 0x00 "REG3,AD Conversion Result Register 3B"
hexmask.long.word 0x00 6.--15. 1. "ADR3,ADR3"
bitfld.long 0x00 1. "OVR3,OVR3" "0,1"
bitfld.long 0x00 0. "ADR3RF,ADR3RF" "0,1"
rgroup.long 0x40++0x03
line.long 0x00 "REG4,AD Conversion Result Register 4C"
hexmask.long.word 0x00 6.--15. 1. "ADR4,ADR4"
bitfld.long 0x00 1. "OVR4,OVR4" "0,1"
bitfld.long 0x00 0. "ADR4RF,ADR4RF" "0,1"
rgroup.long 0x44++0x03
line.long 0x00 "REG5,AD Conversion Result Register 5D"
hexmask.long.word 0x00 6.--15. 1. "ADR5,ADR5"
bitfld.long 0x00 1. "OVR5,OVR5" "0,1"
bitfld.long 0x00 0. "ADR5RF,ADR5RF" "0,1"
rgroup.long 0x48++0x03
line.long 0x00 "REG6,AD Conversion Result Register 6E"
hexmask.long.word 0x00 6.--15. 1. "ADR6,ADR6"
bitfld.long 0x00 1. "OVR6,OVR6" "0,1"
bitfld.long 0x00 0. "ADR6RF,ADR6RF" "0,1"
rgroup.long 0x4C++0x03
line.long 0x00 "REG7,AD Conversion Result Register 7F"
hexmask.long.word 0x00 6.--15. 1. "ADR7,ADR7"
bitfld.long 0x00 1. "OVR7,OVR7" "0,1"
bitfld.long 0x00 0. "ADR7RF,ADR7RF" "0,1"
rgroup.long 0x50++0x03
line.long 0x00 "REG8,AD Conversion Result Register 8"
hexmask.long.word 0x00 6.--15. 1. "ADR8,ADR8"
bitfld.long 0x00 1. "OVR8,OVR8" "0,1"
bitfld.long 0x00 0. "ADR8RF,ADR8RF" "0,1"
rgroup.long 0x54++0x03
line.long 0x00 "REG9,AD Conversion Result Register 9"
hexmask.long.word 0x00 6.--15. 1. "ADR9,ADR9"
bitfld.long 0x00 1. "OVR9,OVR9" "0,1"
bitfld.long 0x00 0. "ADR9RF,ADR9RF" "0,1"
rgroup.long 0x58++0x03
line.long 0x00 "REG10,AD Conversion Result Register 10"
hexmask.long.word 0x00 6.--15. 1. "ADR10,ADR10"
bitfld.long 0x00 1. "OVR10,OVR10" "0,1"
bitfld.long 0x00 0. "ADR10RF,ADR10RF" "0,1"
rgroup.long 0x5C++0x03
line.long 0x00 "REG11,AD Conversion Result Register 11"
hexmask.long.word 0x00 6.--15. 1. "ADR11,ADR11"
bitfld.long 0x00 1. "OVR11,OVR11" "0,1"
bitfld.long 0x00 0. "ADR11RF,ADR11RF" "0,1"
rgroup.long 0x60++0x03
line.long 0x00 "REGSP,AD Conversion Result Register SP"
hexmask.long.word 0x00 6.--15. 1. "ADRSP,ADRSP"
bitfld.long 0x00 1. "OVRSP,OVRSP" "0,1"
bitfld.long 0x00 0. "ADRSPRF,ADRSPRF" "0,1"
group.long 0x64++0x03
line.long 0x00 "CMP0,AD Conversion Result Comparison Register 0"
hexmask.long.word 0x00 6.--15. 1. "ADCOM0,ADCOM0"
group.long 0x68++0x03
line.long 0x00 "CMP1,AD Conversion Result Comparison Register 1"
hexmask.long.word 0x00 6.--15. 1. "ADCOM1,ADCOM1"
tree.end
tree "CG (Clock Generator)"
base ad:0x400F3000
group.long 0x00++0x03
line.long 0x00 "SYSCR,System Control Register"
bitfld.long 0x00 20. "FCSTOP,FCSTOP" "0,1"
bitfld.long 0x00 16.--17. "SCOSEL,SCOSEL" "0,1,2,3"
bitfld.long 0x00 12.--13. "FPSEL,FPSEL" "0,1,2,3"
bitfld.long 0x00 8.--10. "PRCK,PRCK" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "GEAR,GEAR" "0,1,2,3,4,5,6,7"
group.long 0x04++0x03
line.long 0x00 "OSCCR,Oscillation Control Register"
hexmask.long.word 0x00 20.--31. 1. "WUPT,WUPT"
bitfld.long 0x00 19. "WUPSEL2,WUPSEL2" "0,1"
bitfld.long 0x00 18. "HOSCON,HOSCON" "0,1"
bitfld.long 0x00 17. "OSCSEL,OSCSEL" "0,1"
bitfld.long 0x00 16. "XEN2,XEN2" "0,1"
bitfld.long 0x00 14.--15. "WUPTL,WUPTL" "0,1,2,3"
bitfld.long 0x00 11. "EHCLKEN,EHCLKEN" "0,1"
bitfld.long 0x00 10. "LOSCSEL,LOSCSEL" "0,1"
bitfld.long 0x00 9. "XTEN,XTEN" "0,1"
bitfld.long 0x00 8. "XEN1,XEN1" "0,1"
bitfld.long 0x00 3. "WUPSEL1,WUPSEL1" "0,1"
newline
rbitfld.long 0x00 1. "WUEF,WUEF" "0,1"
bitfld.long 0x00 0. "WUEON,WUEON" "0,1"
group.long 0x08++0x03
line.long 0x00 "STBYCR,Standby Control Register"
bitfld.long 0x00 16. "DRVE,DRVE" "0,1"
bitfld.long 0x00 9. "RXTEN,RXTEN" "0,1"
bitfld.long 0x00 8. "RXEN,RXEN" "0,1"
bitfld.long 0x00 0.--2. "STBY,STBY" "0,1,2,3,4,5,6,7"
group.long 0x0C++0x03
line.long 0x00 "EHCLKSEL,External High-speed clock select register"
bitfld.long 0x00 0. "EHCLKSEL,EHCLKSEL" "0,1"
group.long 0x10++0x03
line.long 0x00 "CKSEL,System Clock Selection Register"
bitfld.long 0x00 1. "SYSCK,SYSCK" "0,1"
rbitfld.long 0x00 0. "SYSCKFLG,SYSCKFLG" "0,1"
wgroup.long 0x14++0x03
line.long 0x00 "ICRCG,CG Interrupt Request Clear Register"
bitfld.long 0x00 0.--4. "ICRCG,ICRCG" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x1C++0x03
line.long 0x00 "RSTFLG,Reset Flag Register"
bitfld.long 0x00 4. "DBGRSTF,DBGRSTF" "0,1"
bitfld.long 0x00 2. "WDTRSTF,WDTRSTF" "0,1"
bitfld.long 0x00 0. "PINRSTF,PINRSTF" "0,1"
group.long 0x20++0x03
line.long 0x00 "IMCGA,CG Interrupt Mode Control Register A"
bitfld.long 0x00 28.--30. "EMCG3,EMCG3" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 26.--27. "EMST3,EMST3" "0,1,2,3"
bitfld.long 0x00 24. "INT3EN,INT3EN" "0,1"
bitfld.long 0x00 20.--22. "EMCG2,EMCG2" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 18.--19. "EMST2,EMST2" "0,1,2,3"
bitfld.long 0x00 16. "INT2EN,INT2EN" "0,1"
bitfld.long 0x00 12.--14. "EMCG1,EMCG1" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 10.--11. "EMST1,EMST1" "0,1,2,3"
bitfld.long 0x00 8. "INT1EN,INT1EN" "0,1"
bitfld.long 0x00 4.--6. "EMCG0,EMCG0" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 2.--3. "EMST0,EMST0" "0,1,2,3"
newline
bitfld.long 0x00 0. "INT0EN,INT0EN" "0,1"
group.long 0x24++0x03
line.long 0x00 "IMCGB,CG Interrupt Mode Control Register B"
bitfld.long 0x00 12.--14. "EMCG5,EMCG5" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 10.--11. "EMST5,EMST5" "0,1,2,3"
bitfld.long 0x00 8. "INT5EN,INT5EN" "0,1"
bitfld.long 0x00 4.--6. "EMCG4,EMCG4" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 2.--3. "EMST4,EMST4" "0,1,2,3"
bitfld.long 0x00 0. "INT4EN,INT4EN" "0,1"
tree.end
tree "DSAD (16-bit Delta-Sigma AD Converter)"
repeat 3. (list 0. 1. 2.) (list ad:0x44067000 ad:0x44068000 ad:0x44069000)
tree "DSAD$1"
base $2
group.long 0x00++0x03
line.long 0x00 "CLK,DSAD Conversion Clock Setting Register"
bitfld.long 0x00 0.--2. "ADCLK,ADCLK" "0,1,2,3,4,5,6,7"
group.long 0x04++0x03
line.long 0x00 "CR0,DSAD Control Register 0"
bitfld.long 0x00 0.--1. "ADRST,ADRST" "0,1,2,3"
group.long 0x08++0x03
line.long 0x00 "CR1,DSAD Control Register 1"
bitfld.long 0x00 1. "BIASEN,BIASEN" "0,1"
bitfld.long 0x00 0. "MODEN,MODEN" "0,1"
group.long 0x0C++0x03
line.long 0x00 "CR2,DSAD Control Register 2"
bitfld.long 0x00 0. "ADS,ADS" "0,1"
group.long 0x10++0x03
line.long 0x00 "CR3,DSAD Control Register 3"
bitfld.long 0x00 8. "ADSYNC,ADSYNC" "0,1"
bitfld.long 0x00 0. "REPEAT,REPEAT" "0,1"
group.long 0x14++0x03
line.long 0x00 "CR4,DSAD Control Register 4"
bitfld.long 0x00 0.--2. "DSGAIN,DSGAIN" "0,1,2,3,4,5,6,7"
group.long 0x18++0x03
line.long 0x00 "ADJ,DSAD Adjust Register"
hexmask.long.word 0x00 16.--31. 1. "OFFSET,OFFSET"
bitfld.long 0x00 0. "ADJ,ADJ" "0,1"
group.long 0x1C++0x03
line.long 0x00 "ST,DSAD Status Register"
rbitfld.long 0x00 1. "EOCF,EOCF" "0,1"
rbitfld.long 0x00 0. "ADBF,ADBF" "0,1"
group.long 0x20++0x03
line.long 0x00 "RES,DSAD Result Register"
hexmask.long.tbyte 0x00 8.--31. 1. "ADR,ADR"
rbitfld.long 0x00 1. "ADOVR,ADOVR" "0,1"
rbitfld.long 0x00 0. "ADRF,ADRF" "0,1"
tree.end
repeat.end
tree.end
tree "FC (Flash Control)"
base ad:0x41FFF000
group.long 0x10++0x03
line.long 0x00 "SECBIT,FC Security Bit Register"
bitfld.long 0x00 0. "SECBIT,SECBIT" "0,1"
rgroup.long 0x20++0x03
line.long 0x00 "FLCS,FC Flash Control Register"
bitfld.long 0x00 16.--19. "BLPRO,BLPRO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "RDY_BSY,RDY_BSY" "0,1"
group.long 0x5C++0x03
line.long 0x00 "DBGEN,FC Debug enable monitor Register"
rbitfld.long 0x00 1. "EN1,EN1" "0,1"
rbitfld.long 0x00 0. "EN0,EN0" "0,1"
tree.end
tree "LCD (LCD Driver)"
base ad:0x4006E000
group.long 0x00++0x03
line.long 0x00 "EN,Enable register"
bitfld.long 0x00 0. "LCDE,LCDE" "0,1"
group.long 0x04++0x03
line.long 0x00 "CR1,Control register 1"
bitfld.long 0x00 7. "EDSP,EDSP" "0,1"
bitfld.long 0x00 4.--6. "DUTY,DUTY" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "SLF,SLF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x08++0x03
line.long 0x00 "CR2,Control register 2"
bitfld.long 0x00 5.--7. "LRSE,LRSE" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 4. "BRH,BRH" "0,1"
bitfld.long 0x00 3. "BRSEL,BRSEL" "0,1"
group.long 0x0C++0x03
line.long 0x00 "BUF00,Buffer register 00"
bitfld.long 0x00 4.--7. "SEG1,SEG1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG0,SEG0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x10++0x03
line.long 0x00 "BUF01,Buffer register 01"
bitfld.long 0x00 4.--7. "SEG3,SEG3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG2,SEG2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x14++0x03
line.long 0x00 "BUF02,Buffer register 02"
bitfld.long 0x00 4.--7. "SEG5,SEG5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG4,SEG4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x18++0x03
line.long 0x00 "BUF03,Buffer register 03"
bitfld.long 0x00 4.--7. "SEG7,SEG7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG6,SEG6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x1C++0x03
line.long 0x00 "BUF04,Buffer register 04"
bitfld.long 0x00 4.--7. "SEG9,SEG9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG8,SEG8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x20++0x03
line.long 0x00 "BUF05,Buffer register 05"
bitfld.long 0x00 4.--7. "SEG11,SEG11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG10,SEG10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x24++0x03
line.long 0x00 "BUF06,Buffer register 06"
bitfld.long 0x00 4.--7. "SEG13,SEG13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG12,SEG12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x28++0x03
line.long 0x00 "BUF07,Buffer register 07"
bitfld.long 0x00 4.--7. "SEG15,SEG15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG14,SEG14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x2C++0x03
line.long 0x00 "BUF08,Buffer register 08"
bitfld.long 0x00 4.--7. "SEG17,SEG17" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG16,SEG16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x30++0x03
line.long 0x00 "BUF09,Buffer register 09"
bitfld.long 0x00 4.--7. "SEG19,SEG19" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG18,SEG18" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x34++0x03
line.long 0x00 "BUF10,Buffer register 10"
bitfld.long 0x00 4.--7. "SEG21,SEG21" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG20,SEG20" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x38++0x03
line.long 0x00 "BUF11,Buffer register 11"
bitfld.long 0x00 4.--7. "SEG23,SEG23" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG22,SEG22" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x3C++0x03
line.long 0x00 "BUF12,Buffer register 12"
bitfld.long 0x00 4.--7. "SEG25,SEG25" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG24,SEG24" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x40++0x03
line.long 0x00 "BUF13,Buffer register 13"
bitfld.long 0x00 4.--7. "SEG27,SEG27" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG26,SEG26" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x44++0x03
line.long 0x00 "BUF14,Buffer register 14"
bitfld.long 0x00 4.--7. "SEG29,SEG29" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG28,SEG28" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x48++0x03
line.long 0x00 "BUF15,Buffer register 15"
bitfld.long 0x00 4.--7. "SEG31,SEG31" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG30,SEG30" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x4C++0x03
line.long 0x00 "BUF16,Buffer register 16"
bitfld.long 0x00 4.--7. "SEG33,SEG33" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG32,SEG32" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x50++0x03
line.long 0x00 "BUF17,Buffer register 17"
bitfld.long 0x00 4.--7. "SEG35,SEG35" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG34,SEG34" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x54++0x03
line.long 0x00 "BUF18,Buffer register 18"
bitfld.long 0x00 4.--7. "SEG37,SEG37" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG36,SEG36" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x58++0x03
line.long 0x00 "BUF19,Buffer register 19"
bitfld.long 0x00 4.--7. "SEG39,SEG39" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "SEG38,SEG38" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
tree.end
tree "LVD (Low Voltage Detector Control Register)"
base ad:0x400F4000
group.long 0x04++0x03
line.long 0x00 "ICR,LVD-NMI Control Register"
bitfld.long 0x00 5. "LVDINTEN,LVDINTEN" "0,1"
bitfld.long 0x00 4. "INTSEL,INTSEL" "0,1"
bitfld.long 0x00 1.--3. "LVDLVL2,LVDLVL2" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "LVDEN2,LVDEN2" "0,1"
group.long 0x08++0x03
line.long 0x00 "SR,LVD Status Control Register"
rbitfld.long 0x00 1. "LVDST2,LVDST2" "0,1"
tree.end
tree "PA (Port A)"
base ad:0x400C0000
group.long 0x00++0x03
line.long 0x00 "DATA,PA Data Register"
bitfld.long 0x00 7. "PA7,PA7" "0,1"
bitfld.long 0x00 6. "PA6,PA6" "0,1"
bitfld.long 0x00 5. "PA5,PA5" "0,1"
bitfld.long 0x00 4. "PA4,PA4" "0,1"
bitfld.long 0x00 3. "PA3,PA3" "0,1"
bitfld.long 0x00 2. "PA2,PA2" "0,1"
bitfld.long 0x00 1. "PA1,PA1" "0,1"
bitfld.long 0x00 0. "PA0,PA0" "0,1"
group.long 0x04++0x03
line.long 0x00 "CR,PA Control Register"
bitfld.long 0x00 7. "PA7C,PA7C" "0,1"
bitfld.long 0x00 6. "PA6C,PA6C" "0,1"
bitfld.long 0x00 5. "PA5C,PA5C" "0,1"
bitfld.long 0x00 4. "PA4C,PA4C" "0,1"
bitfld.long 0x00 3. "PA3C,PA3C" "0,1"
bitfld.long 0x00 2. "PA2C,PA2C" "0,1"
bitfld.long 0x00 1. "PA1C,PA1C" "0,1"
bitfld.long 0x00 0. "PA0C,PA0C" "0,1"
group.long 0x08++0x03
line.long 0x00 "FR1,PA Function Register 1"
bitfld.long 0x00 7. "PA7F1,PA7F1" "0,1"
bitfld.long 0x00 6. "PA6F1,PA6F1" "0,1"
bitfld.long 0x00 5. "PA5F1,PA5F1" "0,1"
bitfld.long 0x00 4. "PA4F1,PA4F1" "0,1"
bitfld.long 0x00 3. "PA3F1,PA3F1" "0,1"
bitfld.long 0x00 2. "PA2F1,PA2F1" "0,1"
bitfld.long 0x00 1. "PA1F1,PA1F1" "0,1"
bitfld.long 0x00 0. "PA0F1,PA0F1" "0,1"
group.long 0x28++0x03
line.long 0x00 "OD,PA Open Drain Control Register"
bitfld.long 0x00 7. "PA7OD,PA7OD" "0,1"
bitfld.long 0x00 6. "PA6OD,PA6OD" "0,1"
bitfld.long 0x00 5. "PA5OD,PA5OD" "0,1"
bitfld.long 0x00 4. "PA4OD,PA4OD" "0,1"
bitfld.long 0x00 3. "PA3OD,PA3OD" "0,1"
bitfld.long 0x00 2. "PA2OD,PA2OD" "0,1"
bitfld.long 0x00 1. "PA1OD,PA1OD" "0,1"
bitfld.long 0x00 0. "PA0OD,PA0OD" "0,1"
group.long 0x2C++0x03
line.long 0x00 "PUP,PA Pull-Up Control Register"
bitfld.long 0x00 7. "PA7UP,PA7UP" "0,1"
bitfld.long 0x00 6. "PA6UP,PA6UP" "0,1"
bitfld.long 0x00 5. "PA5UP,PA5UP" "0,1"
bitfld.long 0x00 4. "PA4UP,PA4UP" "0,1"
bitfld.long 0x00 3. "PA3UP,PA3UP" "0,1"
bitfld.long 0x00 2. "PA2UP,PA2UP" "0,1"
bitfld.long 0x00 1. "PA1UP,PA1UP" "0,1"
bitfld.long 0x00 0. "PA0UP,PA0UP" "0,1"
group.long 0x30++0x03
line.long 0x00 "PDN,PA Pull-Down Control Register"
bitfld.long 0x00 7. "PA7DN,PA7DN" "0,1"
bitfld.long 0x00 6. "PA6DN,PA6DN" "0,1"
bitfld.long 0x00 5. "PA5DN,PA5DN" "0,1"
bitfld.long 0x00 4. "PA4DN,PA4DN" "0,1"
bitfld.long 0x00 3. "PA3DN,PA3DN" "0,1"
bitfld.long 0x00 2. "PA2DN,PA2DN" "0,1"
bitfld.long 0x00 1. "PA1DN,PA1DN" "0,1"
bitfld.long 0x00 0. "PA0DN,PA0DN" "0,1"
group.long 0x38++0x03
line.long 0x00 "IE,PA Input Enable Control Register"
bitfld.long 0x00 7. "PA7IE,PA7IE" "0,1"
bitfld.long 0x00 6. "PA6IE,PA6IE" "0,1"
bitfld.long 0x00 5. "PA5IE,PA5IE" "0,1"
bitfld.long 0x00 4. "PA4IE,PA4IE" "0,1"
bitfld.long 0x00 3. "PA3IE,PA3IE" "0,1"
bitfld.long 0x00 2. "PA2IE,PA2IE" "0,1"
bitfld.long 0x00 1. "PA1IE,PA1IE" "0,1"
bitfld.long 0x00 0. "PA0IE,PA0IE" "0,1"
tree.end
tree "PB (Port B)"
base ad:0x400C0100
group.long 0x00++0x03
line.long 0x00 "DATA,PB Data Register"
bitfld.long 0x00 7. "PB7,PB7" "0,1"
bitfld.long 0x00 6. "PB6,PB6" "0,1"
bitfld.long 0x00 5. "PB5,PB5" "0,1"
bitfld.long 0x00 4. "PB4,PB4" "0,1"
bitfld.long 0x00 3. "PB3,PB3" "0,1"
bitfld.long 0x00 2. "PB2,PB2" "0,1"
bitfld.long 0x00 1. "PB1,PB1" "0,1"
bitfld.long 0x00 0. "PB0,PB0" "0,1"
group.long 0x04++0x03
line.long 0x00 "CR,PB Control Register"
bitfld.long 0x00 7. "PB7C,PB7C" "0,1"
bitfld.long 0x00 6. "PB6C,PB6C" "0,1"
bitfld.long 0x00 5. "PB5C,PB5C" "0,1"
bitfld.long 0x00 4. "PB4C,PB4C" "0,1"
bitfld.long 0x00 3. "PB3C,PB3C" "0,1"
bitfld.long 0x00 2. "PB2C,PB2C" "0,1"
bitfld.long 0x00 1. "PB1C,PB1C" "0,1"
bitfld.long 0x00 0. "PB0C,PB0C" "0,1"
group.long 0x08++0x03
line.long 0x00 "FR1,PB Function Register 1"
bitfld.long 0x00 7. "PB7F1,PB7F1" "0,1"
bitfld.long 0x00 6. "PB6F1,PB6F1" "0,1"
bitfld.long 0x00 5. "PB5F1,PB5F1" "0,1"
bitfld.long 0x00 4. "PB4F1,PB4F1" "0,1"
bitfld.long 0x00 3. "PB3F1,PB3F1" "0,1"
bitfld.long 0x00 2. "PB2F1,PB2F1" "0,1"
bitfld.long 0x00 1. "PB1F1,PB1F1" "0,1"
bitfld.long 0x00 0. "PB0F1,PB0F1" "0,1"
group.long 0x28++0x03
line.long 0x00 "OD,PB Open Drain Control Register"
bitfld.long 0x00 7. "PB7OD,PB7OD" "0,1"
bitfld.long 0x00 6. "PB6OD,PB6OD" "0,1"
bitfld.long 0x00 5. "PB5OD,PB5OD" "0,1"
bitfld.long 0x00 4. "PB4OD,PB4OD" "0,1"
bitfld.long 0x00 3. "PB3OD,PB3OD" "0,1"
bitfld.long 0x00 2. "PB2OD,PB2OD" "0,1"
bitfld.long 0x00 1. "PB1OD,PB1OD" "0,1"
bitfld.long 0x00 0. "PB0OD,PB0OD" "0,1"
group.long 0x2C++0x03
line.long 0x00 "PUP,PB Pull-Up Control Register"
bitfld.long 0x00 7. "PB7UP,PB7UP" "0,1"
bitfld.long 0x00 6. "PB6UP,PB6UP" "0,1"
bitfld.long 0x00 5. "PB5UP,PB5UP" "0,1"
bitfld.long 0x00 4. "PB4UP,PB4UP" "0,1"
bitfld.long 0x00 3. "PB3UP,PB3UP" "0,1"
bitfld.long 0x00 2. "PB2UP,PB2UP" "0,1"
bitfld.long 0x00 1. "PB1UP,PB1UP" "0,1"
bitfld.long 0x00 0. "PB0UP,PB0UP" "0,1"
group.long 0x30++0x03
line.long 0x00 "PDN,PB Pull-Down Control Register"
bitfld.long 0x00 7. "PB7DN,PB7DN" "0,1"
bitfld.long 0x00 6. "PB6DN,PB6DN" "0,1"
bitfld.long 0x00 5. "PB5DN,PB5DN" "0,1"
bitfld.long 0x00 4. "PB4DN,PB4DN" "0,1"
bitfld.long 0x00 3. "PB3DN,PB3DN" "0,1"
bitfld.long 0x00 2. "PB2DN,PB2DN" "0,1"
bitfld.long 0x00 1. "PB1DN,PB1DN" "0,1"
bitfld.long 0x00 0. "PB0DN,PB0DN" "0,1"
group.long 0x38++0x03
line.long 0x00 "IE,PB Input Enable Control Register"
bitfld.long 0x00 7. "PB7IE,PB7IE" "0,1"
bitfld.long 0x00 6. "PB6IE,PB6IE" "0,1"
bitfld.long 0x00 5. "PB5IE,PB5IE" "0,1"
bitfld.long 0x00 4. "PB4IE,PB4IE" "0,1"
bitfld.long 0x00 3. "PB3IE,PB3IE" "0,1"
bitfld.long 0x00 2. "PB2IE,PB2IE" "0,1"
bitfld.long 0x00 1. "PB1IE,PB1IE" "0,1"
bitfld.long 0x00 0. "PB0IE,PB0IE" "0,1"
tree.end
tree "PC (Port C)"
base ad:0x400C0200
group.long 0x00++0x03
line.long 0x00 "DATA,PC Data Register"
bitfld.long 0x00 7. "PC7,PC7" "0,1"
bitfld.long 0x00 6. "PC6,PC6" "0,1"
bitfld.long 0x00 5. "PC5,PC5" "0,1"
bitfld.long 0x00 4. "PC4,PC4" "0,1"
bitfld.long 0x00 3. "PC3,PC3" "0,1"
bitfld.long 0x00 2. "PC2,PC2" "0,1"
bitfld.long 0x00 1. "PC1,PC1" "0,1"
bitfld.long 0x00 0. "PC0,PC0" "0,1"
group.long 0x04++0x03
line.long 0x00 "CR,PC Control Register"
bitfld.long 0x00 7. "PC7C,PC7C" "0,1"
bitfld.long 0x00 6. "PC6C,PC6C" "0,1"
bitfld.long 0x00 5. "PC5C,PC5C" "0,1"
bitfld.long 0x00 4. "PC4C,PC4C" "0,1"
bitfld.long 0x00 3. "PC3C,PC3C" "0,1"
bitfld.long 0x00 2. "PC2C,PC2C" "0,1"
bitfld.long 0x00 1. "PC1C,PC1C" "0,1"
bitfld.long 0x00 0. "PC0C,PC0C" "0,1"
group.long 0x08++0x03
line.long 0x00 "FR1,PC Function Register 1"
bitfld.long 0x00 7. "PC7F1,PC7F1" "0,1"
bitfld.long 0x00 6. "PC6F1,PC6F1" "0,1"
bitfld.long 0x00 5. "PC5F1,PC5F1" "0,1"
bitfld.long 0x00 4. "PC4F1,PC4F1" "0,1"
bitfld.long 0x00 3. "PC3F1,PC3F1" "0,1"
bitfld.long 0x00 2. "PC2F1,PC2F1" "0,1"
bitfld.long 0x00 1. "PC1F1,PC1F1" "0,1"
bitfld.long 0x00 0. "PC0F1,PC0F1" "0,1"
group.long 0x28++0x03
line.long 0x00 "OD,PC Open Drain Control Register"
bitfld.long 0x00 7. "PC7OD,PC7OD" "0,1"
bitfld.long 0x00 6. "PC6OD,PC6OD" "0,1"
bitfld.long 0x00 5. "PC5OD,PC5OD" "0,1"
bitfld.long 0x00 4. "PC4OD,PC4OD" "0,1"
bitfld.long 0x00 3. "PC3OD,PC3OD" "0,1"
bitfld.long 0x00 2. "PC2OD,PC2OD" "0,1"
bitfld.long 0x00 1. "PC1OD,PC1OD" "0,1"
bitfld.long 0x00 0. "PC0OD,PC0OD" "0,1"
group.long 0x2C++0x03
line.long 0x00 "PUP,PC Pull-Up Control Register"
bitfld.long 0x00 7. "PC7UP,PC7UP" "0,1"
bitfld.long 0x00 6. "PC6UP,PC6UP" "0,1"
bitfld.long 0x00 5. "PC5UP,PC5UP" "0,1"
bitfld.long 0x00 4. "PC4UP,PC4UP" "0,1"
bitfld.long 0x00 3. "PC3UP,PC3UP" "0,1"
bitfld.long 0x00 2. "PC2UP,PC2UP" "0,1"
bitfld.long 0x00 1. "PC1UP,PC1UP" "0,1"
bitfld.long 0x00 0. "PC0UP,PC0UP" "0,1"
group.long 0x30++0x03
line.long 0x00 "PDN,PC Pull-Down Control Register"
bitfld.long 0x00 7. "PC7DN,PC7DN" "0,1"
bitfld.long 0x00 6. "PC6DN,PC6DN" "0,1"
bitfld.long 0x00 5. "PC5DN,PC5DN" "0,1"
bitfld.long 0x00 4. "PC4DN,PC4DN" "0,1"
bitfld.long 0x00 3. "PC3DN,PC3DN" "0,1"
bitfld.long 0x00 2. "PC2DN,PC2DN" "0,1"
bitfld.long 0x00 1. "PC1DN,PC1DN" "0,1"
bitfld.long 0x00 0. "PC0DN,PC0DN" "0,1"
group.long 0x38++0x03
line.long 0x00 "IE,PC Input Enable Control Register"
bitfld.long 0x00 7. "PC7IE,PC7IE" "0,1"
bitfld.long 0x00 6. "PC6IE,PC6IE" "0,1"
bitfld.long 0x00 5. "PC5IE,PC5IE" "0,1"
bitfld.long 0x00 4. "PC4IE,PC4IE" "0,1"
bitfld.long 0x00 3. "PC3IE,PC3IE" "0,1"
bitfld.long 0x00 2. "PC2IE,PC2IE" "0,1"
bitfld.long 0x00 1. "PC1IE,PC1IE" "0,1"
bitfld.long 0x00 0. "PC0IE,PC0IE" "0,1"
tree.end
tree "PCE (Power Calculation Engine)"
base ad:0x4406F000
group.long 0x00++0x03
line.long 0x00 "PINTCR,PCE core interrupt control"
bitfld.long 0x00 2. "PCEINT,PCEINT" "0,1"
bitfld.long 0x00 1. "PCENMI,PCENMI" "0,1"
bitfld.long 0x00 0. "PCERST,PCERST" "0,1"
group.long 0x04++0x03
line.long 0x00 "MINTCR,Interrupt control to the main core"
bitfld.long 0x00 0. "MAININT,MAININT" "0,1"
group.long 0x08++0x03
line.long 0x00 "PCLKCR,PCE core clock control)"
bitfld.long 0x00 0. "PCECLK,PCECLK" "0,1"
group.long 0x0C++0x03
line.long 0x00 "PNMIFLG,PCE core NMI event flag)"
rbitfld.long 0x00 1. "PCEIFNMIF,PCEIFNMIF" "0,1"
rbitfld.long 0x00 0. "WDTNMIF,WDTNMIF" "0,1"
group.long 0x10++0x03
line.long 0x00 "PNMICLR,PCE core NMI event clear)"
bitfld.long 0x00 1. "PCEIFNMIC,PCEIFNMIC" "0,1"
bitfld.long 0x00 0. "WDTNMIC,WDTNMIC" "0,1"
tree.end
tree "PD (Port D)"
base ad:0x400C0300
group.long 0x00++0x03
line.long 0x00 "DATA,PD Data Register"
bitfld.long 0x00 7. "PD7,PD7" "0,1"
bitfld.long 0x00 6. "PD6,PD6" "0,1"
bitfld.long 0x00 5. "PD5,PD5" "0,1"
bitfld.long 0x00 4. "PD4,PD4" "0,1"
bitfld.long 0x00 3. "PD3,PD3" "0,1"
bitfld.long 0x00 2. "PD2,PD2" "0,1"
bitfld.long 0x00 1. "PD1,PD1" "0,1"
bitfld.long 0x00 0. "PD0,PD0" "0,1"
group.long 0x04++0x03
line.long 0x00 "CR,PD Control Register"
bitfld.long 0x00 7. "PD7C,PD7C" "0,1"
bitfld.long 0x00 6. "PD6C,PD6C" "0,1"
bitfld.long 0x00 5. "PD5C,PD5C" "0,1"
bitfld.long 0x00 4. "PD4C,PD4C" "0,1"
bitfld.long 0x00 3. "PD3C,PD3C" "0,1"
bitfld.long 0x00 2. "PD2C,PD2C" "0,1"
bitfld.long 0x00 1. "PD1C,PD1C" "0,1"
bitfld.long 0x00 0. "PD0C,PD0C" "0,1"
group.long 0x08++0x03
line.long 0x00 "FR1,PD Function Register 1"
bitfld.long 0x00 7. "PD7F1,PD7F1" "0,1"
bitfld.long 0x00 6. "PD6F1,PD6F1" "0,1"
bitfld.long 0x00 5. "PD5F1,PD5F1" "0,1"
bitfld.long 0x00 4. "PD4F1,PD4F1" "0,1"
bitfld.long 0x00 3. "PD3F1,PD3F1" "0,1"
bitfld.long 0x00 2. "PD2F1,PD2F1" "0,1"
bitfld.long 0x00 1. "PD1F1,PD1F1" "0,1"
bitfld.long 0x00 0. "PD0F1,PD0F1" "0,1"
group.long 0x28++0x03
line.long 0x00 "OD,PD Open Drain Control Register"
bitfld.long 0x00 7. "PD7OD,PD7OD" "0,1"
bitfld.long 0x00 6. "PD6OD,PD6OD" "0,1"
bitfld.long 0x00 5. "PD5OD,PD5OD" "0,1"
bitfld.long 0x00 4. "PD4OD,PD4OD" "0,1"
bitfld.long 0x00 3. "PD3OD,PD3OD" "0,1"
bitfld.long 0x00 2. "PD2OD,PD2OD" "0,1"
bitfld.long 0x00 1. "PD1OD,PD1OD" "0,1"
bitfld.long 0x00 0. "PD0OD,PD0OD" "0,1"
group.long 0x2C++0x03
line.long 0x00 "PUP,PD Pull-Up Control Register"
bitfld.long 0x00 7. "PD7UP,PD7UP" "0,1"
bitfld.long 0x00 6. "PD6UP,PD6UP" "0,1"
bitfld.long 0x00 5. "PD5UP,PD5UP" "0,1"
bitfld.long 0x00 4. "PD4UP,PD4UP" "0,1"
bitfld.long 0x00 3. "PD3UP,PD3UP" "0,1"
bitfld.long 0x00 2. "PD2UP,PD2UP" "0,1"
bitfld.long 0x00 1. "PD1UP,PD1UP" "0,1"
bitfld.long 0x00 0. "PD0UP,PD0UP" "0,1"
group.long 0x30++0x03
line.long 0x00 "PDN,PD Pull-Down Control Register"
bitfld.long 0x00 7. "PD7DN,PD7DN" "0,1"
bitfld.long 0x00 6. "PD6DN,PD6DN" "0,1"
bitfld.long 0x00 5. "PD5DN,PD5DN" "0,1"
bitfld.long 0x00 4. "PD4DN,PD4DN" "0,1"
bitfld.long 0x00 3. "PD3DN,PD3DN" "0,1"
bitfld.long 0x00 2. "PD2DN,PD2DN" "0,1"
bitfld.long 0x00 1. "PD1DN,PD1DN" "0,1"
bitfld.long 0x00 0. "PD0DN,PD0DN" "0,1"
group.long 0x38++0x03
line.long 0x00 "IE,PD Input Enable Control Register"
bitfld.long 0x00 7. "PD7IE,PD7IE" "0,1"
bitfld.long 0x00 6. "PD6IE,PD6IE" "0,1"
bitfld.long 0x00 5. "PD5IE,PD5IE" "0,1"
bitfld.long 0x00 4. "PD4IE,PD4IE" "0,1"
bitfld.long 0x00 3. "PD3IE,PD3IE" "0,1"
bitfld.long 0x00 2. "PD2IE,PD2IE" "0,1"
bitfld.long 0x00 1. "PD1IE,PD1IE" "0,1"
bitfld.long 0x00 0. "PD0IE,PD0IE" "0,1"
tree.end
tree "PE (Port E)"
base ad:0x400C0400
group.long 0x00++0x03
line.long 0x00 "DATA,PE Data Register"
bitfld.long 0x00 7. "PE7,PE7" "0,1"
bitfld.long 0x00 6. "PE6,PE6" "0,1"
bitfld.long 0x00 5. "PE5,PE5" "0,1"
bitfld.long 0x00 4. "PE4,PE4" "0,1"
bitfld.long 0x00 3. "PE3,PE3" "0,1"
bitfld.long 0x00 2. "PE2,PE2" "0,1"
bitfld.long 0x00 1. "PE1,PE1" "0,1"
bitfld.long 0x00 0. "PE0,PE0" "0,1"
group.long 0x04++0x03
line.long 0x00 "CR,PE Control Register"
bitfld.long 0x00 7. "PE7C,PE7C" "0,1"
bitfld.long 0x00 6. "PE6C,PE6C" "0,1"
bitfld.long 0x00 5. "PE5C,PE5C" "0,1"
bitfld.long 0x00 4. "PE4C,PE4C" "0,1"
bitfld.long 0x00 3. "PE3C,PE3C" "0,1"
bitfld.long 0x00 2. "PE2C,PE2C" "0,1"
bitfld.long 0x00 1. "PE1C,PE1C" "0,1"
bitfld.long 0x00 0. "PE0C,PE0C" "0,1"
group.long 0x08++0x03
line.long 0x00 "FR1,PE Function Register 1"
bitfld.long 0x00 7. "PE7F1,PE7F1" "0,1"
bitfld.long 0x00 6. "PE6F1,PE6F1" "0,1"
bitfld.long 0x00 5. "PE5F1,PE5F1" "0,1"
bitfld.long 0x00 4. "PE4F1,PE4F1" "0,1"
bitfld.long 0x00 3. "PE3F1,PE3F1" "0,1"
bitfld.long 0x00 2. "PE2F1,PE2F1" "0,1"
bitfld.long 0x00 1. "PE1F1,PE1F1" "0,1"
bitfld.long 0x00 0. "PE0F1,PE0F1" "0,1"
group.long 0x0C++0x03
line.long 0x00 "FR2,PE Function Register 2"
bitfld.long 0x00 7. "PE7F2,PE7F2" "0,1"
bitfld.long 0x00 6. "PE6F2,PE6F2" "0,1"
bitfld.long 0x00 5. "PE5F2,PE5F2" "0,1"
bitfld.long 0x00 4. "PE4F2,PE4F2" "0,1"
bitfld.long 0x00 3. "PE3F2,PE3F2" "0,1"
bitfld.long 0x00 2. "PE2F2,PE2F2" "0,1"
bitfld.long 0x00 1. "PE1F2,PE1F2" "0,1"
bitfld.long 0x00 0. "PE0F2,PE0F2" "0,1"
group.long 0x10++0x03
line.long 0x00 "FR3,PE Function Register 3"
bitfld.long 0x00 3. "PE3F3,PE3F3" "0,1"
group.long 0x28++0x03
line.long 0x00 "OD,PE Open Drain Control Register"
bitfld.long 0x00 7. "PE7OD,PE7OD" "0,1"
bitfld.long 0x00 6. "PE6OD,PE6OD" "0,1"
bitfld.long 0x00 5. "PE5OD,PE5OD" "0,1"
bitfld.long 0x00 4. "PE4OD,PE4OD" "0,1"
bitfld.long 0x00 3. "PE3OD,PE3OD" "0,1"
bitfld.long 0x00 2. "PE2OD,PE2OD" "0,1"
bitfld.long 0x00 1. "PE1OD,PE1OD" "0,1"
bitfld.long 0x00 0. "PE0OD,PE0OD" "0,1"
group.long 0x2C++0x03
line.long 0x00 "PUP,PE Pull-Up Control Register"
bitfld.long 0x00 7. "PE7UP,PE7UP" "0,1"
bitfld.long 0x00 6. "PE6UP,PE6UP" "0,1"
bitfld.long 0x00 5. "PE5UP,PE5UP" "0,1"
bitfld.long 0x00 4. "PE4UP,PE4UP" "0,1"
bitfld.long 0x00 3. "PE3UP,PE3UP" "0,1"
bitfld.long 0x00 2. "PE2UP,PE2UP" "0,1"
bitfld.long 0x00 1. "PE1UP,PE1UP" "0,1"
bitfld.long 0x00 0. "PE0UP,PE0UP" "0,1"
group.long 0x30++0x03
line.long 0x00 "PDN,PE Pull-Down Control Register"
bitfld.long 0x00 7. "PE7DN,PE7DN" "0,1"
bitfld.long 0x00 6. "PE6DN,PE6DN" "0,1"
bitfld.long 0x00 5. "PE5DN,PE5DN" "0,1"
bitfld.long 0x00 4. "PE4DN,PE4DN" "0,1"
bitfld.long 0x00 3. "PE3DN,PE3DN" "0,1"
bitfld.long 0x00 2. "PE2DN,PE2DN" "0,1"
bitfld.long 0x00 1. "PE1DN,PE1DN" "0,1"
bitfld.long 0x00 0. "PE0DN,PE0DN" "0,1"
group.long 0x38++0x03
line.long 0x00 "IE,PE Input Enable Control Register"
bitfld.long 0x00 7. "PE7IE,PE7IE" "0,1"
bitfld.long 0x00 6. "PE6IE,PE6IE" "0,1"
bitfld.long 0x00 5. "PE5IE,PE5IE" "0,1"
bitfld.long 0x00 4. "PE4IE,PE4IE" "0,1"
bitfld.long 0x00 3. "PE3IE,PE3IE" "0,1"
bitfld.long 0x00 2. "PE2IE,PE2IE" "0,1"
bitfld.long 0x00 1. "PE1IE,PE1IE" "0,1"
bitfld.long 0x00 0. "PE0IE,PE0IE" "0,1"
tree.end
tree "PF (Port F)"
base ad:0x400C0500
group.long 0x00++0x03
line.long 0x00 "DATA,PF Data Register"
bitfld.long 0x00 1. "PF1,PF1" "0,1"
bitfld.long 0x00 0. "PF0,PF0" "0,1"
group.long 0x04++0x03
line.long 0x00 "CR,PF Control Register"
bitfld.long 0x00 1. "PF1C,PF1C" "0,1"
bitfld.long 0x00 0. "PF0C,PF0C" "0,1"
group.long 0x08++0x03
line.long 0x00 "FR1,PF Function Register 1"
bitfld.long 0x00 1. "PF1F1,PF1F1" "0,1"
group.long 0x28++0x03
line.long 0x00 "OD,PF Open Drain Control Register"
bitfld.long 0x00 1. "PF1OD,PF1OD" "0,1"
bitfld.long 0x00 0. "PF0OD,PF0OD" "0,1"
group.long 0x2C++0x03
line.long 0x00 "PUP,PF Pull-Up Control Register"
bitfld.long 0x00 1. "PF1UP,PF1UP" "0,1"
bitfld.long 0x00 0. "PF0UP,PF0UP" "0,1"
group.long 0x30++0x03
line.long 0x00 "PFN,PF Pull-Down Control Register"
bitfld.long 0x00 1. "PF1DN,PF1DN" "0,1"
bitfld.long 0x00 0. "PF0DN,PF0DN" "0,1"
group.long 0x38++0x03
line.long 0x00 "IE,PF Input Enable Control Register"
bitfld.long 0x00 1. "PF1IE,PF1IE" "0,1"
bitfld.long 0x00 0. "PF0IE,PF0IE" "0,1"
tree.end
tree "PG (Port G)"
base ad:0x400C0600
group.long 0x00++0x03
line.long 0x00 "DATA,PG Data Register"
bitfld.long 0x00 0. "PG0,PG0" "0,1"
group.long 0x04++0x03
line.long 0x00 "CR,PG Control Register"
bitfld.long 0x00 0. "PG0C,PG0C" "0,1"
group.long 0x08++0x03
line.long 0x00 "FR1,PG Function Register 1"
bitfld.long 0x00 0. "PG0F1,PG0F1" "0,1"
group.long 0x0C++0x03
line.long 0x00 "FR2,PG Function Register 2"
bitfld.long 0x00 0. "PG0F2,PG0F2" "0,1"
group.long 0x28++0x03
line.long 0x00 "OD,PG Open Drain Control Register"
bitfld.long 0x00 0. "PG0OD,PG0OD" "0,1"
group.long 0x2C++0x03
line.long 0x00 "PUP,PG Pull-Up Control Register"
bitfld.long 0x00 0. "PG0UP,PG0UP" "0,1"
group.long 0x30++0x03
line.long 0x00 "PGN,PG Pull-Down Control Register"
bitfld.long 0x00 0. "PG0DN,PG0DN" "0,1"
group.long 0x38++0x03
line.long 0x00 "IE,PG Input Enable Control Register"
bitfld.long 0x00 0. "PG0IE,PG0IE" "0,1"
tree.end
tree "PH (Port H)"
base ad:0x400C0700
group.long 0x00++0x03
line.long 0x00 "DATA,PH Data Register"
bitfld.long 0x00 5. "PH5,PH5" "0,1"
bitfld.long 0x00 4. "PH4,PH4" "0,1"
bitfld.long 0x00 3. "PH3,PH3" "0,1"
bitfld.long 0x00 2. "PH2,PH2" "0,1"
bitfld.long 0x00 1. "PH1,PH1" "0,1"
bitfld.long 0x00 0. "PH0,PH0" "0,1"
group.long 0x04++0x03
line.long 0x00 "CR,PH Control Register"
bitfld.long 0x00 5. "PH5C,PH5C" "0,1"
bitfld.long 0x00 4. "PH4C,PH4C" "0,1"
bitfld.long 0x00 3. "PH3C,PH3C" "0,1"
bitfld.long 0x00 2. "PH2C,PH2C" "0,1"
bitfld.long 0x00 1. "PH1C,PH1C" "0,1"
bitfld.long 0x00 0. "PH0C,PH0C" "0,1"
group.long 0x08++0x03
line.long 0x00 "FR1,PH Function Register 1"
bitfld.long 0x00 5. "PH5F1,PH5F1" "0,1"
bitfld.long 0x00 4. "PH4F1,PH4F1" "0,1"
bitfld.long 0x00 3. "PH3F1,PH3F1" "0,1"
bitfld.long 0x00 2. "PH2F1,PH2F1" "0,1"
bitfld.long 0x00 1. "PH1F1,PH1F1" "0,1"
bitfld.long 0x00 0. "PH0F1,PH0F1" "0,1"
group.long 0x0C++0x03
line.long 0x00 "FR2,PH Function Register 2"
bitfld.long 0x00 5. "PH5F2,PH5F2" "0,1"
bitfld.long 0x00 3. "PH3F2,PH3F2" "0,1"
bitfld.long 0x00 2. "PH2F2,PH2F2" "0,1"
bitfld.long 0x00 0. "PH0F2,PH0F2" "0,1"
group.long 0x10++0x03
line.long 0x00 "FR3,PH Function Register 3"
bitfld.long 0x00 5. "PH5F3,PH5F3" "0,1"
bitfld.long 0x00 2. "PH2F3,PH2F3" "0,1"
group.long 0x28++0x03
line.long 0x00 "OD,PH OPHn Drain Control Register"
bitfld.long 0x00 5. "PH5OD,PH5OD" "0,1"
bitfld.long 0x00 4. "PH4OD,PH4OD" "0,1"
bitfld.long 0x00 3. "PH3OD,PH3OD" "0,1"
bitfld.long 0x00 2. "PH2OD,PH2OD" "0,1"
bitfld.long 0x00 1. "PH1OD,PH1OD" "0,1"
bitfld.long 0x00 0. "PH0OD,PH0OD" "0,1"
group.long 0x2C++0x03
line.long 0x00 "PUP,PH Pull-Up Control Register"
bitfld.long 0x00 5. "PH5UP,PH5UP" "0,1"
bitfld.long 0x00 4. "PH4UP,PH4UP" "0,1"
bitfld.long 0x00 3. "PH3UP,PH3UP" "0,1"
bitfld.long 0x00 2. "PH2UP,PH2UP" "0,1"
bitfld.long 0x00 1. "PH1UP,PH1UP" "0,1"
bitfld.long 0x00 0. "PH0UP,PH0UP" "0,1"
group.long 0x30++0x03
line.long 0x00 "PDN,PH Pull-Down Control Register"
bitfld.long 0x00 5. "PH5DN,PH5DN" "0,1"
bitfld.long 0x00 4. "PH4DN,PH4DN" "0,1"
bitfld.long 0x00 3. "PH3DN,PH3DN" "0,1"
bitfld.long 0x00 2. "PH2DN,PH2DN" "0,1"
bitfld.long 0x00 1. "PH1DN,PH1DN" "0,1"
bitfld.long 0x00 0. "PH0DN,PH0DN" "0,1"
group.long 0x38++0x03
line.long 0x00 "IE,PH Input Enable Control Register"
bitfld.long 0x00 5. "PH5IE,PH5IE" "0,1"
bitfld.long 0x00 4. "PH4IE,PH4IE" "0,1"
bitfld.long 0x00 3. "PH3IE,PH3IE" "0,1"
bitfld.long 0x00 2. "PH2IE,PH2IE" "0,1"
bitfld.long 0x00 1. "PH1IE,PH1IE" "0,1"
bitfld.long 0x00 0. "PH0IE,PH0IE" "0,1"
tree.end
tree "PI (Port I)"
base ad:0x400C0800
group.long 0x00++0x03
line.long 0x00 "DATA,PI Data Register"
bitfld.long 0x00 6. "PI6,PI6" "0,1"
bitfld.long 0x00 5. "PI5,PI5" "0,1"
bitfld.long 0x00 4. "PI4,PI4" "0,1"
bitfld.long 0x00 3. "PI3,PI3" "0,1"
bitfld.long 0x00 2. "PI2,PI2" "0,1"
bitfld.long 0x00 1. "PI1,PI1" "0,1"
bitfld.long 0x00 0. "PI0,PI0" "0,1"
group.long 0x04++0x03
line.long 0x00 "CR,PI Control Register"
bitfld.long 0x00 6. "PI6C,PI6C" "0,1"
bitfld.long 0x00 5. "PI5C,PI5C" "0,1"
bitfld.long 0x00 4. "PI4C,PI4C" "0,1"
bitfld.long 0x00 3. "PI3C,PI3C" "0,1"
bitfld.long 0x00 2. "PI2C,PI2C" "0,1"
bitfld.long 0x00 1. "PI1C,PI1C" "0,1"
bitfld.long 0x00 0. "PI0C,PI0C" "0,1"
group.long 0x08++0x03
line.long 0x00 "FR1,PI Function Register 1"
bitfld.long 0x00 6. "PI6F1,PI6F1" "0,1"
bitfld.long 0x00 5. "PI5F1,PI5F1" "0,1"
bitfld.long 0x00 4. "PI4F1,PI4F1" "0,1"
bitfld.long 0x00 3. "PI3F1,PI3F1" "0,1"
bitfld.long 0x00 2. "PI2F1,PI2F1" "0,1"
bitfld.long 0x00 1. "PI1F1,PI1F1" "0,1"
bitfld.long 0x00 0. "PI0F1,PI0F1" "0,1"
group.long 0x0C++0x03
line.long 0x00 "FR2,PI Function Register 2"
bitfld.long 0x00 6. "PI6F2,PI6F2" "0,1"
bitfld.long 0x00 2. "PI2F2,PI2F2" "0,1"
bitfld.long 0x00 0. "PI0F2,PI0F2" "0,1"
group.long 0x10++0x03
line.long 0x00 "FR3,PI Function Register 3"
bitfld.long 0x00 6. "PI6F3,PI6F3" "0,1"
bitfld.long 0x00 2. "PI2F3,PI2F3" "0,1"
group.long 0x28++0x03
line.long 0x00 "OD,PI OPIn Drain Control Register"
bitfld.long 0x00 6. "PI6OD,PI6OD" "0,1"
bitfld.long 0x00 5. "PI5OD,PI5OD" "0,1"
bitfld.long 0x00 4. "PI4OD,PI4OD" "0,1"
bitfld.long 0x00 3. "PI3OD,PI3OD" "0,1"
bitfld.long 0x00 2. "PI2OD,PI2OD" "0,1"
bitfld.long 0x00 1. "PI1OD,PI1OD" "0,1"
bitfld.long 0x00 0. "PI0OD,PI0OD" "0,1"
group.long 0x2C++0x03
line.long 0x00 "PUP,PI Pull-Up Control Register"
bitfld.long 0x00 6. "PI6UP,PI6UP" "0,1"
bitfld.long 0x00 5. "PI5UP,PI5UP" "0,1"
bitfld.long 0x00 4. "PI4UP,PI4UP" "0,1"
bitfld.long 0x00 3. "PI3UP,PI3UP" "0,1"
bitfld.long 0x00 2. "PI2UP,PI2UP" "0,1"
bitfld.long 0x00 1. "PI1UP,PI1UP" "0,1"
bitfld.long 0x00 0. "PI0UP,PI0UP" "0,1"
group.long 0x30++0x03
line.long 0x00 "PDN,PI Pull-Down Control Register"
bitfld.long 0x00 6. "PI6DN,PI6DN" "0,1"
bitfld.long 0x00 5. "PI5DN,PI5DN" "0,1"
bitfld.long 0x00 4. "PI4DN,PI4DN" "0,1"
bitfld.long 0x00 3. "PI3DN,PI3DN" "0,1"
bitfld.long 0x00 2. "PI2DN,PI2DN" "0,1"
bitfld.long 0x00 1. "PI1DN,PI1DN" "0,1"
bitfld.long 0x00 0. "PI0DN,PI0DN" "0,1"
group.long 0x38++0x03
line.long 0x00 "IE,PI Input Enable Control Register"
bitfld.long 0x00 6. "PI6IE,PI6IE" "0,1"
bitfld.long 0x00 5. "PI5IE,PI5IE" "0,1"
bitfld.long 0x00 4. "PI4IE,PI4IE" "0,1"
bitfld.long 0x00 3. "PI3IE,PI3IE" "0,1"
bitfld.long 0x00 2. "PI2IE,PI2IE" "0,1"
bitfld.long 0x00 1. "PI1IE,PI1IE" "0,1"
bitfld.long 0x00 0. "PI0IE,PI0IE" "0,1"
tree.end
tree "PJ (Port J)"
base ad:0x400C0900
group.long 0x00++0x03
line.long 0x00 "DATA,PJ Data Register"
bitfld.long 0x00 5. "PJ5,PJ5" "0,1"
bitfld.long 0x00 4. "PJ4,PJ4" "0,1"
bitfld.long 0x00 3. "PJ3,PJ3" "0,1"
bitfld.long 0x00 2. "PJ2,PJ2" "0,1"
bitfld.long 0x00 1. "PJ1,PJ1" "0,1"
bitfld.long 0x00 0. "PJ0,PJ0" "0,1"
group.long 0x04++0x03
line.long 0x00 "CR,PJ Control Register"
bitfld.long 0x00 4. "PJ4C,PJ4C" "0,1"
bitfld.long 0x00 3. "PJ3C,PJ3C" "0,1"
bitfld.long 0x00 2. "PJ2C,PJ2C" "0,1"
bitfld.long 0x00 1. "PJ1C,PJ1C" "0,1"
bitfld.long 0x00 0. "PJ0C,PJ0C" "0,1"
group.long 0x08++0x03
line.long 0x00 "FR1,PJ Function Register 1"
bitfld.long 0x00 5. "PJ5F1,PJ5F1" "0,1"
bitfld.long 0x00 4. "PJ4F1,PJ4F1" "0,1"
bitfld.long 0x00 3. "PJ3F1,PJ3F1" "0,1"
bitfld.long 0x00 2. "PJ2F1,PJ2F1" "0,1"
bitfld.long 0x00 1. "PJ1F1,PJ1F1" "0,1"
bitfld.long 0x00 0. "PJ0F1,PJ0F1" "0,1"
group.long 0x0C++0x03
line.long 0x00 "FR2,PJ Function Register 2"
bitfld.long 0x00 5. "PJ5F2,PJ5F2" "0,1"
bitfld.long 0x00 4. "PJ4F2,PJ4F2" "0,1"
bitfld.long 0x00 2. "PJ2F2,PJ2F2" "0,1"
group.long 0x28++0x03
line.long 0x00 "OD,PJ OPJn Drain Control Register"
bitfld.long 0x00 4. "PJ4OD,PJ4OD" "0,1"
bitfld.long 0x00 3. "PJ3OD,PJ3OD" "0,1"
bitfld.long 0x00 2. "PJ2OD,PJ2OD" "0,1"
bitfld.long 0x00 1. "PJ1OD,PJ1OD" "0,1"
bitfld.long 0x00 0. "PJ0OD,PJ0OD" "0,1"
group.long 0x2C++0x03
line.long 0x00 "PUP,PJ Pull-Up Control Register"
bitfld.long 0x00 4. "PJ4UP,PJ4UP" "0,1"
bitfld.long 0x00 3. "PJ3UP,PJ3UP" "0,1"
bitfld.long 0x00 2. "PJ2UP,PJ2UP" "0,1"
bitfld.long 0x00 1. "PJ1UP,PJ1UP" "0,1"
bitfld.long 0x00 0. "PJ0UP,PJ0UP" "0,1"
group.long 0x30++0x03
line.long 0x00 "PDN,PJ Pull-Down Control Register"
bitfld.long 0x00 4. "PJ4DN,PJ4DN" "0,1"
bitfld.long 0x00 3. "PJ3DN,PJ3DN" "0,1"
bitfld.long 0x00 2. "PJ2DN,PJ2DN" "0,1"
bitfld.long 0x00 1. "PJ1DN,PJ1DN" "0,1"
bitfld.long 0x00 0. "PJ0DN,PJ0DN" "0,1"
group.long 0x38++0x03
line.long 0x00 "IE,PJ Input Enable Control Register"
bitfld.long 0x00 5. "PJ5IE,PJ5IE" "0,1"
bitfld.long 0x00 4. "PJ4IE,PJ4IE" "0,1"
bitfld.long 0x00 3. "PJ3IE,PJ3IE" "0,1"
bitfld.long 0x00 2. "PJ2IE,PJ2IE" "0,1"
bitfld.long 0x00 1. "PJ1IE,PJ1IE" "0,1"
bitfld.long 0x00 0. "PJ0IE,PJ0IE" "0,1"
tree.end
tree "PK (Port K)"
base ad:0x400C0A00
group.long 0x00++0x03
line.long 0x00 "DATA,PK Data Register"
bitfld.long 0x00 1. "PK1,PK1" "0,1"
bitfld.long 0x00 0. "PK0,PK0" "0,1"
group.long 0x04++0x03
line.long 0x00 "CR,PK Control Register"
bitfld.long 0x00 1. "PK1C,PK1C" "0,1"
bitfld.long 0x00 0. "PK0C,PK0C" "0,1"
group.long 0x08++0x03
line.long 0x00 "FR1,PK Function Register 1"
bitfld.long 0x00 1. "PK1F1,PK1F1" "0,1"
rbitfld.long 0x00 0. "PK0F1,PK0F1" "0,1"
group.long 0x28++0x03
line.long 0x00 "OD,PK Open Drain Control Register"
bitfld.long 0x00 1. "PK1OD,PK1OD" "0,1"
bitfld.long 0x00 0. "PK0OD,PK0OD" "0,1"
group.long 0x2C++0x03
line.long 0x00 "PUP,PK Pull-Up Control Register"
bitfld.long 0x00 1. "PK1UP,PK1UP" "0,1"
bitfld.long 0x00 0. "PK0UP,PK0UP" "0,1"
group.long 0x30++0x03
line.long 0x00 "PKN,PK Pull-Down Control Register"
bitfld.long 0x00 1. "PK1DN,PK1DN" "0,1"
bitfld.long 0x00 0. "PK0DN,PK0DN" "0,1"
group.long 0x38++0x03
line.long 0x00 "IE,PK Input Enable Control Register"
bitfld.long 0x00 1. "PK1IE,PK1IE" "0,1"
bitfld.long 0x00 0. "PK0IE,PK0IE" "0,1"
tree.end
tree "RTC (Real-Time Counter)"
base ad:0x400CC000
group.byte 0x00++0x00
line.byte 0x00 "SECR,RTC Sec setting register"
hexmask.byte 0x00 0.--6. 1. "SE,SE"
group.byte 0x01++0x00
line.byte 0x00 "MINR,RTC Min settging register"
hexmask.byte 0x00 0.--6. 1. "MI,MI"
group.byte 0x02++0x00
line.byte 0x00 "HOURR,RTC Hour setting register"
bitfld.byte 0x00 0.--5. "HO,HO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.byte 0x04++0x00
line.byte 0x00 "DAYR,RTC Day setting register"
bitfld.byte 0x00 0.--2. "WE,WE" "0,1,2,3,4,5,6,7"
group.byte 0x05++0x00
line.byte 0x00 "DATER,RTC Date setting register"
bitfld.byte 0x00 0.--5. "DA,DA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.byte 0x06++0x00
line.byte 0x00 "MONTHR,RTC Month settging register PAGE0"
bitfld.byte 0x00 0.--4. "MO,MO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.byte 0x07++0x00
line.byte 0x00 "YEARR_A,RTC Year setting register PAGE0"
hexmask.byte 0x00 0.--7. 1. "YE,YE"
group.byte 0x07++0x00
line.byte 0x00 "YEARR_B,RTC Leap year register PAGE1"
bitfld.byte 0x00 0.--1. "LEAP,LEAP" "0,1,2,3"
group.byte 0x08++0x00
line.byte 0x00 "PAGER,RTC Page register"
bitfld.byte 0x00 7. "INTENA,INTENA" "0,1"
bitfld.byte 0x00 4. "ADJUST,ADJUST" "0,1"
bitfld.byte 0x00 3. "ENATMR,ENATMR" "0,1"
bitfld.byte 0x00 2. "ENAALM,ENAALM" "0,1"
bitfld.byte 0x00 0. "PAGE,PAGE" "0,1"
group.byte 0x0C++0x00
line.byte 0x00 "RESTR,RTC Reset register"
bitfld.byte 0x00 7. "DIS1HZ,DIS1HZ" "0,1"
bitfld.byte 0x00 6. "DIS16HZ,DIS16HZ" "0,1"
bitfld.byte 0x00 5. "RSTTMR,RSTTMR" "0,1"
bitfld.byte 0x00 4. "RESTALM,RESTALM" "0,1"
bitfld.byte 0x00 2. "DIS2HZ,DIS2HZ" "0,1"
bitfld.byte 0x00 1. "DIS4HZ,DIS4HZ" "0,1"
bitfld.byte 0x00 0. "DIS8HZ,DIS8HZ" "0,1"
group.byte 0x0E++0x00
line.byte 0x00 "PROTECT,RTC clock adjust control register"
hexmask.byte 0x00 0.--7. 1. "PROTECT,PROTECT"
group.byte 0x0F++0x00
line.byte 0x00 "ADJCTL,RTC protect register"
bitfld.byte 0x00 1.--3. "AJSEL,AJSEL" "0,1,2,3,4,5,6,7"
bitfld.byte 0x00 0. "AJEN,AJEN" "0,1"
group.word 0x10++0x01
line.word 0x00 "ADJDAT,RTC clock adjust data register"
hexmask.word 0x00 0.--8. 1. "ADJDAT,ADJDAT"
tree.end
tree "SBI (Serial Bus Interface)"
base ad:0x400E0000
group.long 0x00++0x03
line.long 0x00 "CR0,SBI Control Register 0"
bitfld.long 0x00 7. "SBIEN,SBIEN" "0,1"
group.long 0x04++0x03
line.long 0x00 "CR1_A,SBI Control Register 1 (I2C Mode)"
bitfld.long 0x00 5.--7. "BC,BC" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 4. "ACK,ACK" "0,1"
bitfld.long 0x00 0.--2. "SCK,SCK" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 0. "SWRMON,SWRMON" "0,1"
group.long 0x04++0x03
line.long 0x00 "CR1_B,SBI Control Register 1 (SIO Mode)"
bitfld.long 0x00 7. "SIOS,SIOS" "0,1"
bitfld.long 0x00 6. "SIOINH,SIOINH" "0,1"
bitfld.long 0x00 4.--5. "SIOM,SIOM" "0,1,2,3"
bitfld.long 0x00 0.--2. "SCK,SCK" "0,1,2,3,4,5,6,7"
group.long 0x08++0x03
line.long 0x00 "DBR,SBI Data Buffer Register"
hexmask.long.byte 0x00 0.--7. 1. "DB,DB"
group.long 0x0C++0x03
line.long 0x00 "I2CAR,SBI I2C Bus Address Register"
hexmask.long.byte 0x00 1.--7. 1. "SA,SA"
bitfld.long 0x00 0. "ALS,ALS" "0,1"
wgroup.long 0x10++0x03
line.long 0x00 "CR2_A,SBI Control Register 2 (I2C Mode)"
bitfld.long 0x00 7. "MST,MST" "0,1"
bitfld.long 0x00 6. "TRX,TRX" "0,1"
bitfld.long 0x00 5. "BB,BB" "0,1"
bitfld.long 0x00 4. "PIN,PIN" "0,1"
bitfld.long 0x00 2.--3. "SBIM,SBIM" "0,1,2,3"
bitfld.long 0x00 0.--1. "SWRST,SWRST" "0,1,2,3"
wgroup.long 0x10++0x03
line.long 0x00 "CR2_B,SBI Control Register 2 (SIO Mode)"
bitfld.long 0x00 2.--3. "SBIM,SBIM" "0,1,2,3"
rgroup.long 0x10++0x03
line.long 0x00 "SR_A,SBI Status Register (I2C Mode)"
bitfld.long 0x00 7. "MST,MST" "0,1"
bitfld.long 0x00 6. "TRX,TRX" "0,1"
bitfld.long 0x00 5. "BB,BB" "0,1"
bitfld.long 0x00 4. "PIN,PIN" "0,1"
bitfld.long 0x00 3. "AL,AL" "0,1"
bitfld.long 0x00 2. "AAS,AAS" "0,1"
bitfld.long 0x00 1. "ADO,ADO" "0,1"
bitfld.long 0x00 0. "LRB,LRB" "0,1"
rgroup.long 0x10++0x03
line.long 0x00 "SR_B,SBI Status Register (SIO Mode)"
bitfld.long 0x00 3. "SIOF,SIOF" "0,1"
bitfld.long 0x00 2. "SEF,SEF" "0,1"
group.long 0x14++0x03
line.long 0x00 "BR0,SBI Baud Rate Register 0"
bitfld.long 0x00 6. "I2SBI,I2SBI" "0,1"
tree.end
tree "SC (Serial Channel)"
repeat 4. (list 0. 1. 2. 3.) (list ad:0x400E1000 ad:0x400E1100 ad:0x400E1200 ad:0x400E1300)
tree "SC$1"
base $2
group.long 0x00++0x03
line.long 0x00 "EN,SC Enable Register"
bitfld.long 0x00 0. "SIOE,SIOE" "0,1"
group.long 0x04++0x03
line.long 0x00 "BUF,SC Buffer Register"
hexmask.long.byte 0x00 0.--7. 1. "TB_RB,TB_RB"
group.long 0x08++0x03
line.long 0x00 "CR,SC Control Register"
rbitfld.long 0x00 7. "RB8,RB8" "0,1"
bitfld.long 0x00 6. "EVEN,EVEN" "0,1"
bitfld.long 0x00 5. "PE,PE" "0,1"
rbitfld.long 0x00 4. "OERR,OERR" "0,1"
rbitfld.long 0x00 3. "PERR,PERR" "0,1"
rbitfld.long 0x00 2. "FERR,FERR" "0,1"
bitfld.long 0x00 1. "SCLKS,SCLKS" "0,1"
bitfld.long 0x00 0. "IOC,IOC" "0,1"
group.long 0x0C++0x03
line.long 0x00 "MOD0,SC Mode Control Register 0"
bitfld.long 0x00 7. "TB8,TB8" "0,1"
bitfld.long 0x00 6. "CTSE,CTSE" "0,1"
bitfld.long 0x00 5. "RXE,RXE" "0,1"
bitfld.long 0x00 4. "WU,WU" "0,1"
bitfld.long 0x00 2.--3. "SM,SM" "0,1,2,3"
bitfld.long 0x00 0.--1. "SC,SC" "0,1,2,3"
group.long 0x10++0x03
line.long 0x00 "BRCR,SC Baud Rate Generator Control Register"
bitfld.long 0x00 6. "BRADDE,BRADDE" "0,1"
bitfld.long 0x00 4.--5. "BRCK,BRCK" "0,1,2,3"
bitfld.long 0x00 0.--3. "BRS,BRS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x14++0x03
line.long 0x00 "BRADD,SC Baud Rate Generator Control Register 2"
bitfld.long 0x00 0.--3. "BRK,BRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x18++0x03
line.long 0x00 "MOD1,SC Mode Control Register 1"
bitfld.long 0x00 7. "I2SC,I2SC" "0,1"
bitfld.long 0x00 5.--6. "FDPX,FDPX" "0,1,2,3"
bitfld.long 0x00 4. "TXE,TXE" "0,1"
bitfld.long 0x00 1.--3. "SINT,SINT" "0,1,2,3,4,5,6,7"
group.long 0x1C++0x03
line.long 0x00 "MOD2,SC Mode Control Register 2"
rbitfld.long 0x00 7. "TBEMP,TBEMP" "0,1"
rbitfld.long 0x00 6. "RBFLL,RBFLL" "0,1"
rbitfld.long 0x00 5. "TXRUN,TXRUN" "0,1"
bitfld.long 0x00 4. "SBLEN,SBLEN" "0,1"
bitfld.long 0x00 3. "DRCHG,DRCHG" "0,1"
bitfld.long 0x00 2. "WBUF,WBUF" "0,1"
bitfld.long 0x00 0.--1. "SWRST,SWRST" "0,1,2,3"
tree.end
repeat.end
tree.end
tree "TMR16A (16-bit Timer A)"
repeat 7. (list 0. 1. 2. 3. 4. 5. 6.) (list ad:0x4008D000 ad:0x4008E000 ad:0x4008F000 ad:0x40090000 ad:0x40091000 ad:0x44092000 ad:0x44093000)
tree "T16A$1"
base $2
group.long 0x00++0x03
line.long 0x00 "EN,Enable Register"
bitfld.long 0x00 1. "HALT,HALT" "0,1"
bitfld.long 0x00 0. "I2T16A,I2T16A" "0,1"
group.long 0x04++0x03
line.long 0x00 "RUN,RUN Register"
bitfld.long 0x00 0. "RUN,RUN" "0,1"
group.long 0x08++0x03
line.long 0x00 "CR,Control Register"
bitfld.long 0x00 7. "FFEN,FFEN" "0,1"
bitfld.long 0x00 4.--5. "FFCR,FFCR" "0,1,2,3"
bitfld.long 0x00 0. "CLK,CLK" "0,1"
group.long 0x0C++0x03
line.long 0x00 "RG,Timer Register"
hexmask.long.word 0x00 0.--15. 1. "RG,RG"
rgroup.long 0x10++0x03
line.long 0x00 "CP,Capture Register"
hexmask.long.word 0x00 0.--15. 1. "CP,CP"
tree.end
repeat.end
tree.end
tree "TMRB (16-bit Timer/Event Counter)"
repeat 2. (list 0. 1.) (list ad:0x400C4000 ad:0x440C4100)
tree "TB$1"
base $2
group.long 0x00++0x03
line.long 0x00 "EN,TB Enable Register"
bitfld.long 0x00 7. "TBEN,TBEN" "0,1"
bitfld.long 0x00 6. "TBHALT,TBHALT" "0,1"
group.long 0x04++0x03
line.long 0x00 "RUN,TB RUN Register"
bitfld.long 0x00 2. "TBPRUN,TBPRUN" "0,1"
bitfld.long 0x00 0. "TBRUN,TBRUN" "0,1"
group.long 0x08++0x03
line.long 0x00 "CR,TB Control Register"
bitfld.long 0x00 7. "TBWBF,TBWBF" "0,1"
bitfld.long 0x00 5. "TBSYNC,TBSYNC" "0,1"
bitfld.long 0x00 3. "I2TB,I2TB" "0,1"
bitfld.long 0x00 2. "TBINSEL,TBINSEL" "0,1"
bitfld.long 0x00 1. "TRGSEL,TRGSEL" "0,1"
bitfld.long 0x00 0. "CSSEL,CSSEL" "0,1"
group.long 0x0C++0x03
line.long 0x00 "MOD,TB Mode Register"
bitfld.long 0x00 6. "TBCP,TBCP" "0,1"
bitfld.long 0x00 4.--5. "TBCPM,TBCPM" "0,1,2,3"
bitfld.long 0x00 3. "TBCLE,TBCLE" "0,1"
bitfld.long 0x00 0.--2. "TBCLK,TBCLK" "0,1,2,3,4,5,6,7"
group.long 0x10++0x03
line.long 0x00 "FFCR,TB Flip-Flop Control Register"
bitfld.long 0x00 5. "TBC1T1,TBC1T1" "0,1"
bitfld.long 0x00 4. "TBC0T1,TBC0T1" "0,1"
bitfld.long 0x00 3. "TBE1T1,TBE1T1" "0,1"
bitfld.long 0x00 2. "TBE0T1,TBE0T1" "0,1"
bitfld.long 0x00 0.--1. "TBFF0C,TBFF0C" "0,1,2,3"
rgroup.long 0x14++0x03
line.long 0x00 "ST,TB Status Register"
bitfld.long 0x00 2. "INTTBOF,INTTBOF" "0,1"
bitfld.long 0x00 1. "INTTB1,INTTB1" "0,1"
bitfld.long 0x00 0. "INTTB0,INTTB0" "0,1"
group.long 0x18++0x03
line.long 0x00 "IM,TB Interrupt Mask Register"
bitfld.long 0x00 2. "TBIMOF,TBIMOF" "0,1"
bitfld.long 0x00 1. "TBIM1,TBIM1" "0,1"
bitfld.long 0x00 0. "TBIM0,TBIM0" "0,1"
rgroup.long 0x1C++0x03
line.long 0x00 "UC,TB Read Capture Register"
hexmask.long.word 0x00 0.--15. 1. "UC,UC"
group.long 0x20++0x03
line.long 0x00 "RG0,TB RG0 Timer Register"
hexmask.long.word 0x00 0.--15. 1. "TBRG0,TBRG0"
group.long 0x24++0x03
line.long 0x00 "RG1,TB RG1 Timer Register"
hexmask.long.word 0x00 0.--15. 1. "TBRG1,TBRG1"
rgroup.long 0x28++0x03
line.long 0x00 "CP0,TB CP0 Capture Register"
hexmask.long.word 0x00 0.--15. 1. "TBCP0,TBCP0"
rgroup.long 0x2C++0x03
line.long 0x00 "CP1,TB CP1 Capture Register"
hexmask.long.word 0x00 0.--15. 1. "TBCP1,TBCP1"
tree.end
repeat.end
tree.end
tree "TEMP (Temperature Sensor)"
base ad:0x4005D000
group.long 0x00++0x03
line.long 0x00 "EN,TEMP Enable Register"
bitfld.long 0x00 1. "EN1,EN1" "0,1"
bitfld.long 0x00 0. "EN0,EN0" "0,1"
group.long 0x04++0x03
line.long 0x00 "CR,TEMP Control Registe"
bitfld.long 0x00 0. "CR0,CR0" "0,1"
tree.end
tree "WDT (Watchdog Timer)"
repeat 2. (list 0. 1.) (list ad:0x400F2000 ad:0x440F2100)
tree "WD$1"
base $2
group.long 0x00++0x03
line.long 0x00 "MOD,WD Mode Register"
bitfld.long 0x00 7. "WDTE,WDTE" "0,1"
bitfld.long 0x00 4.--6. "WDTP,WDTP" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 2. "I2WDT,I2WDT" "0,1"
bitfld.long 0x00 1. "RESCR,RESCR" "0,1"
wgroup.long 0x04++0x03
line.long 0x00 "CR,WD Control Register"
hexmask.long.byte 0x00 0.--7. 1. "WDCR,WDCR"
tree.end
repeat.end
tree.end
autoindent.off
newline
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