2365 lines
161 KiB
Plaintext
2365 lines
161 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: Scorpion On-Chip Peripherals
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; @Props: Released
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; @Author: ADI, KOT
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; @Changelog:
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; 2005-08-09
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; 2008-07-31
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; @Manufacturer: QUALCOMM - Qualcomm
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; @Doc: Scorpion_PRM_Rev_G_P2.0_External.pdf (Rev.A 2007-08-17)
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; @Core: Scorpion
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; @Chip: SCORPION
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perscorpion.per 16305 2023-06-28 11:47:37Z pegold $
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config 16. 8.
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width 0x0B
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ASSERT VERSION.BUILD.BASE()>=80109.
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sif PER.isNOTIFICATION()
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base AVM:0x00000000
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wgroup AVM:0x00++0
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textline " Peripheral File Notification - "
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button "show missing files" "DIALOG.MESSAGE ""Please check your installation for the possibly missing files:""+CONV.CHAR(0xa)+PER.NOTIFICATION.MISSINGFILES()"
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textline " ---------------------------------------------------------------"
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textline " The peripheral file for this SoC cannot be displayed. "
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textline " Possible reasons are: "
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textline " - it is missing in the local installation or under development "
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textline " - it is confidential "
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textline " "
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textline " As fallback only the core registers are shown. "
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textline " Please check www.lauterbach.com/scripts.html "
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textline " or contact support@lauterbach.com . "
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textline " "
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endif
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width 10.
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; --------------------------------------------------------------------------------
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; Identification Registers
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; --------------------------------------------------------------------------------
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tree "ID Registers"
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rgroup.long c15:0x0--0x0
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line.long 0x0 "MIDR,Main ID Register"
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hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
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hexmask.long.byte 0x0 20.--23. 0x1 " VAR ,Variant"
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bitfld.long 0x0 16.--19. " ARCH , Architecture" "Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,ARMv7"
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textline " "
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hexmask.long.word 0x0 4.--15. 0x1 " PART ,Primary Part Number"
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hexmask.long.byte 0x0 0.--3. 0x1 " REV ,Revision Number"
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rgroup.long c15:0x100--0x100
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line.long 0x0 "CTR,Cache Type Register"
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bitfld.long 0x0 29.--31. " FORMAT ,Format" "Not ARMv7,Not ARMv7,Not ARMv7,Not ARMv7,ARMv7,Not ARMv7,Not ARMv7,Not ARMv7"
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bitfld.long 0x0 24.--27. " MAXWB ,Maximum Write-Back Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
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bitfld.long 0x0 20.--23. " RGSIZE ,Reservation Granule Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
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textline " "
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bitfld.long 0x0 16.--19. " DMINLINE ,D-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
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bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,ASID,Virtual,Physical"
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bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
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rgroup.long c15:0x200--0x200
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line.long 0x0 "TCMTR,Tighly-Coupled Memory Type Register"
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bitfld.long 0x0 29.--31. " FORMAT ,Format" "ARMv6,ARMv6,ARMv6,ARMv6,Implementation,ARMv6,ARMv6,ARMv6"
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bitfld.long 0x0 16.--19. " DBANKS ,Data Banks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0.--3. " IBANKS ,Instruction Banks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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rgroup.long c15:0x300--0x300
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line.long 0x0 "TLBTR,TLB Type Register"
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bitfld.long 0x0 0. " S ,Separate" "Unified,Separate"
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rgroup.long c15:0x500--0x500
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line.long 0x0 "MPIDR,Multiprocessor ID Register"
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hexmask.long.byte 0x00 16.--23. 1. " AFFL2 ,Affitniy Level 2"
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hexmask.long.byte 0x00 8.--15. 1. " AFFL1 ,Affitniy Level 1"
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hexmask.long.byte 0x00 0.--7. 1. " AFFL0 ,Affitniy Level 0"
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width 10.
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rgroup.long c15:0x410--0x410
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line.long 0x0 "ID_MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 24.--27. " FCSE ,Fast Contex Switch Extension" "Not supported,Supported,?..."
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bitfld.long 0x00 20.--23. " AUX ,Auxiliary Registers" "Not supported,ACTRL,ACTRL/ADFSR/AIFSR,?..."
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textline " "
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bitfld.long 0x00 16.--19. " TCMDMA ,Tightly-Coupled Memory and DMA" "Not supported,Implementation,ARMv6 TCM ,ARMv6 TCM and DMA,?..."
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bitfld.long 0x00 12.--15. " ONSH ,Outer-Non-Shared" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 8.--11. " SHCC ,Shared Cache Coherence" "Not supported,Partial inner,Full inner,Full inner/outer,?..."
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bitfld.long 0x00 4.--7. " PMSA ,Protected Memory System Architecture" "Not supported,Implementation,PMSAv6 supported,PMSAv7 supported,?..."
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textline " "
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bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture" "Not supported,Implementation,VMSAv6 supported,VMSAv7 supported,?..."
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rgroup.long c15:0x510--0x510
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line.long 0x0 "ID_MMFR1,Memory Model Feature Register 1"
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bitfld.long 0x00 28.--31. " BP ,Branch Predictor" "None,VA-to-PA (ASID/PID)/underlying memory,VA-to-PA (ASID)/underlying memory,Underlying memory,No flushing,?..."
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textline " "
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bitfld.long 0x00 24.--27. " L1TC ,L1 Test and Clean Ops" "Not supported,Legacy,Legacy,?..."
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bitfld.long 0x00 20.--23. " L1UCALL ,L1 Unified Cache Maintenance All" "Not supported,Legacy,Legacy,?..."
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textline " "
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bitfld.long 0x00 16.--19. " L1HCALL ,L1 Harward Cache Maintenance All" "Not supported,Legacy,Legacy,Legacy,?..."
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bitfld.long 0x00 12.--15. " L1UCSW ,L1 Unified Cache Maintenance by Set/Way" "Not supported,Legacy,Legacy,Legacy,?..."
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textline " "
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bitfld.long 0x00 8.--11. " L1HCSW ,L1 Harward Cache Maintenance by Set/Way" "Not supported,Legacy,Legacy,Legacy,?..."
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bitfld.long 0x00 4.--7. " L1UCMVA ,L1 Unified Cache Maintenance by MVA" "Not supported,Legacy,Legacy,?..."
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textline " "
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bitfld.long 0x00 0.--3. " L1HCMVA ,L1 Harvard Cache Maintenance by MVA" "Not supported,Legacy,Legacy,?..."
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rgroup.long c15:0x610--0x610
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line.long 0x0 "ID_MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 28.--31. " AFHU ,Access Flag HardwareUpdate" "Not supported,Supported,?..."
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bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 20.--23. " BAR ,Barrier Operations " "Not supported,DSB,DSB/DMB/ISB,?..."
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bitfld.long 0x00 16.--19. " UTLB ,Unified TLB Maintenance " "Not supported,MVA and ALL,MVA/ALL/ASID,?..."
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textline " "
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bitfld.long 0x00 12.--15. " HTLB ,Harvard TLB Maintenance" "Not supported,MVA and ALL ,MVA/ALL/ASID,?..."
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bitfld.long 0x00 8.--11. " L1HCRMVA ,L1 Harvard Cache Range Maintenance by MVA" "Not supported,Legacy,?..."
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textline " "
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bitfld.long 0x00 4.--7. " L1BPR ,L1 Background Prefetch Range" "Not supported,Legacy,?..."
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bitfld.long 0x00 0.--3. " L1FPR ,L1 Foreground Prefetch Range" "Not supported,Legacy,?..."
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rgroup.long c15:0x710--0x710
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line.long 0x0 "ID_MMFR3,Memory Model Feature Register 3"
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bitfld.long 0x00 28.--31. " SS ,Supersections" "Supported,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not supported"
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bitfld.long 0x00 8.--11. " MLBPMVAALL ,Multi-level Branch Predictor Maintenance by MVA/ALL" "Not supported,By ALL,By MVA/ALL,?..."
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textline " "
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bitfld.long 0x00 4.--7. " MLCSW ,Multi-level Cache Maintenance by Set/Way" "Not supported,Supported,?..."
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bitfld.long 0x00 0.--3. " MLCMVALL ,Multi-level Cache Maintenance by MVA/ALL" "Not supported,Supported,?..."
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rgroup.long c15:0x20--0x20
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line.long 0x0 "ID_ISAR0,Instruction Set Attributes Register 0"
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bitfld.long 0x00 24.--27. " DIV ,Divide Instructions" "Not supported,SDIV/UDIV,?..."
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bitfld.long 0x00 20.--23. " DBG ,Debug Instructions" "Not supported,BKPT,?..."
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textline " "
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bitfld.long 0x00 16.--19. " CP ,Coprocessor Instructions" "Mandated,CDP/LDC/STC/MRC/MCR,CDPx/LDCx/STCx/MRCx/MCRx,CDPx/LDCx/STCx/MRCx/MCRx/MRRC/MCRR,CDPx/LDCx/STCx/MRCx/MCRx/MRRCx/MCRRx,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CMPB ,Compare-Branch Instructions" "Not supported,CZB,?..."
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bitfld.long 0x00 8.--11. " BITFIELD ,Bit Field Instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
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textline " "
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bitfld.long 0x00 4.--7. " BITCOUNT ,Bit Count Instructions" "Not supported,CLZ,?..."
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bitfld.long 0x00 0.--3. " ATOMIC ,Atomic Instructions" "Not supported,SWP/SWPB,?..."
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rgroup.long c15:0x120--0x120
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line.long 0x0 "ID_ISAR1,Instruction Set Attributes Register 1"
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bitfld.long 0x00 28.--31. " JAZELLE ,Jazelle Instructions " "Not supported,Supported,?..."
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bitfld.long 0x00 24.--27. " INETWORK ,Internetworking Instructions" "Not supported,BX,BX/BLX/LDR,BX/BLX/LDR/ARM data processing ,?..."
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textline " "
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bitfld.long 0x00 20.--23. " IMM ,Immediate Instructions" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
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bitfld.long 0x00 16.--19. " IT ,If/Then Instructions" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 12.--15. " SZEXT ,Sign/Zero Extend Instructions" "Not supported,SXTB/SXTH/UXTB/UXTH,Full support,?..."
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bitfld.long 0x00 8.--11. " EXC2 ,Exception Instructions 2" "Not supported,CPS/RFE/SRS,?..."
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textline " "
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bitfld.long 0x00 4.--7. " EXC1 ,Exception Instructions 1" "Not supported,LDM(2|3)/STM(2),?..."
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bitfld.long 0x00 0.--3. " ENDIAN ,Endian Instructions" "Not supported,SETEND,?..."
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rgroup.long c15:0x220--0x220
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line.long 0x0 "ID_ISAR2,Instruction Set Attributes Register 2"
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bitfld.long 0x00 28.--31. " REVERSAL ,Reversal Instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
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bitfld.long 0x00 24.--27. " PSRAR ,Program Status Register Instructions" "Not supported,MRS/MSR/exception ret,?..."
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textline " "
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bitfld.long 0x00 20.--23. " ADVUMULT ,Advanced Unsigned Multiply Instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMALL,?..."
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bitfld.long 0x00 16.--19. " ADVSMULT ,Advanced Signed Multiply Instructions" "Not supported,SMULL/SMLAL,0010,Full,?..."
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textline " "
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bitfld.long 0x00 12.--15. " MULTIPLY ,Multiply Instructions" "MUL,MUL/MLA,MUL/MLA/MLS,?..."
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bitfld.long 0x00 8.--11. " MULTIPLE ,Load/Store Multiple Instructions" "Non-interruptible,Restartable,Continuable,?..."
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textline " "
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bitfld.long 0x00 4.--7. " MEMHINT ,Memory Hint Instructions" "Not supported,PLD,Reserved,PLD/PLI,?..."
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bitfld.long 0x00 0.--3. " LDST ,Load/Store Instructions" "Basic,LDRD/STRD,?..."
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rgroup.long c15:0x320--0x320
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line.long 0x0 "ID_ISAR3,Instruction Set Attributes Register 3"
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bitfld.long 0x00 28.--31. " THUMB2EE ,Thumb-2 Execution Environment" "Not supported,ENTERX/LEAVEX/null-check,?..."
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bitfld.long 0x00 24.--27. " TRUENOP ,True NOR Instructions" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 20.--23. " TCPY ,Thumb CPY Instructions" "Not supported,Supported,?..."
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bitfld.long 0x00 16.--19. " TB ,Table Branch Instructions" "Not supported,TBB/TBH,?..."
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textline " "
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bitfld.long 0x00 12.--15. " SYNCPRIM ,Synchronization Primitive Instructions" "Not supported,LDREX/STREX,Full support,?..."
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bitfld.long 0x00 8.--11. " SVC ,SVC Instructions" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " SIMD ,SIMD Instructions" "Not supported,SSAT/USAT,Reserved,Full support,?..."
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bitfld.long 0x00 0.--3. " SAT ,Saturate Instructions" "Not supported,QADD/QSUB/QDADD/QDSUB,?..."
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rgroup.long c15:0x420--0x420
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line.long 0x0 "ID_ISAR4,Instruction Set Attributes Register 4"
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bitfld.long 0x00 24.--27. " PSRM ,Program Status Register Instructions" "Not supported,MRS/MSR/CPS,?..."
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bitfld.long 0x00 20.--23. " SYNCPRIMFRAC ,Synchronization Primitive Fractional" "ISAR3[SYNCPRIM],Reserved,Reserved,Full support,?..."
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textline " "
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bitfld.long 0x00 16.--19. " BAR ,Barrier Instructions" "Not supported,DMB/DSB/ISB,?..."
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bitfld.long 0x00 12.--15. " SMI ,Secure Maonitor Instructions" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 8.--11. " BASEUPDATE ,Base Update Forms" "LDM/STM/PUSH/POP/RFE,Full,?..."
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bitfld.long 0x00 4.--7. " SHIFT ,Shift Forms" "Basic,Basic/LSL,Reserved,Basic/LSL/immediate,Basic/LSL/immediate/registered,?..."
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textline " "
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bitfld.long 0x00 0.--3. " TFORM ,T-Form Instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRxT/LDRxxT/STRxT,?..."
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rgroup.long c15:0x520--0x520
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line.long 0x0 "ID_ISAR5,Instruction Set Attributes Register 5"
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width 10.
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rgroup.long c15:0x10--0x10
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line.long 0x0 "ID_PFR0,Processor Feature Register 0"
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bitfld.long 0x00 12.--15. " THUMB2EE ,Thumb-2EE State (J=1,T=1)" "Not supported,Supported,?..."
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bitfld.long 0x00 8.--11. " JAZELLE ,Jazelle State (J=1,T=0)" "Not supported,Supported/Not cleared,Supported/Cleared,?..."
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textline " "
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bitfld.long 0x00 4.--7. " THUMB ,Thumb State" "Not supported,16bit Thumb,16bit Thumb+32bit B/BL,All Thumb,?..."
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bitfld.long 0x00 0.--3. " ARM ,ARM State (J=0,T=0)" "Not supported,Supported,?..."
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rgroup.long c15:0x110--0x110
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line.long 0x0 "ID_PFR1,Processor Feature Register 1"
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bitfld.long 0x00 8.--11. " MPGM ,Micro-control Programmer's Model" "Not supported,Reserved,2-stack,3-stack,?..."
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bitfld.long 0x00 4.--7. " SEC ,Security Extension" "Not supported,Supported,Above + NSACR[RFR],?..."
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textline " "
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bitfld.long 0x00 0.--3. " BPGM ,Base Programmer's Model" "Not supported,Supported,?..."
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rgroup.long c15:0x210--0x210
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line.long 0x0 "ID_DFR0,Debug Feature Register 0"
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bitfld.long 0x00 20.--23. " MDMMM ,MIcro-controller Debug Model - Memory-mapped" "Not supported,v1 supported,?..."
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bitfld.long 0x00 16.--19. " TDMMM ,Trace Debug Model - Memory-mapped" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " TDMCP ,Trace Debug Model - CP-based" "Not supported,Supported,?..."
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textline " "
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bitfld.long 0x00 8.--11. " CDMMM ,Core Debug Model - Memory-mapped" "Not supported,Reserved,Reserved,Reserved,v7MM supported,?..."
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bitfld.long 0x00 4.--7. " SDMCP ,Security Debug Model - CP-based" "Not supported,Reserved,Reserved,v6.1 supported,v7CP supported,?..."
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bitfld.long 0x00 0.--3. " CDMCP ,Core Debug Model - CP-based" "Not supported,Reserved,v6 supported,v6.1 supported,v7CP supported,?..."
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rgroup.long c15:0x310--0x310
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line.long 0x0 "ID_AFR0,Auxiliary Feature Register 0"
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tree.end
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width 8.
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tree "System Control and Configuration"
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group.long c15:0x1--0x1
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line.long 0x0 "SCTLR,Control Register"
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bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
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bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled"
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bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 27. " NMFI ,Nonmaskable Fast Interrupt enable" "Normal,Non-maskable"
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bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big"
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bitfld.long 0x0 24. " VE ,Vector Enable" "Not vectored,Vectored"
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textline " "
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bitfld.long 0x0 21. " FI ,Fast Interrupts" "Normal,Fast"
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bitfld.long 0x0 17. " HAF ,Hardware Access Flag" "Disabled,Enabled"
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bitfld.long 0x0 14. " RR ,Replacement Strategy" "Random,Predictable"
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textline " "
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bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
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bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
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bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
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bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled"
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bitfld.long 0x0 0. " M ,MMU enable" "Disabled,Enabled"
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width 8.
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group.long c15:0x101--0x101
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line.long 0x0 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 23. " ICPIPT ,I-Cache Physically-Indexed/Physically-Tagged" "AVIVT,PIPT"
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bitfld.long 0x00 22. " IWPLIE ,Interworking PLI Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 21. " MMUDRE ,MMU Disable Remap Enable" "Disabled,Enabled"
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bitfld.long 0x00 20. " DSTG ,Disable Store Gathering" "Enabled,Disabled"
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textline " "
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bitfld.long 0x00 18.--19. " MDPCFG ,MMU-Disabled Data Parity Configuration" "Disabled,Reserved,Generated,Generated/Checked"
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bitfld.long 0x00 17. " FNCL2I ,Force Non-Cachable L2 Cache Instructions" "Not forced,Forced"
|
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textline " "
|
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bitfld.long 0x00 16. " FNCL1I ,Force Non-Cachable L1 Cache Instructions" "Not forced,Forced"
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bitfld.long 0x00 15. " FNCL2D ,Force Non-Cachable L2 Cache Data" "Not forced,Forced"
|
|
textline " "
|
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bitfld.long 0x00 14. " FNCL1D ,Force Non-Cachable L1 Cache Data" "Not forced,Forced"
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bitfld.long 0x00 13. " VCPT ,Vector Capture" "Disabled,Enabled"
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|
textline " "
|
|
bitfld.long 0x00 12. " VFIQ ,Vector FIQ" "Not vectored,Vectored"
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bitfld.long 0x00 11. " FWTL2PE ,Force Write-Thru L2 if Parity Enabled" "Not forced,Forced"
|
|
textline " "
|
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bitfld.long 0x00 10. " FWTL1PE ,Force Write-Thru L1 if Parity Enabled" "Not forced,Forced"
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bitfld.long 0x00 9. " FWTL2 ,Force Write-Through L2" "Not forced,Forced"
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textline " "
|
|
bitfld.long 0x00 8. " FWTL1 ,Force Write-Through L1" "Not forced,Forced"
|
|
bitfld.long 0x00 7. " DCFID ,D-cache Flash-Invalidate Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " FCSEE ,Fast Contex Switch Extension Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " PCFG ,Parity Configuration" "Enabled (P-desc),Reserved,Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " OSSRCFG ,OS Save/Restore Configuration" "Completed,Not completed"
|
|
bitfld.long 0x00 2. " L2ERE ,L2 Error Report Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICPERE ,I-Cache Parity Error Report Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DCPERE ,D-Cache Parity Error Report Enable" "Disabled,Enabled"
|
|
width 8.
|
|
group.long c15:0x201--0x201
|
|
line.long 0x0 "CPACR,Coprocessor Access Control Register"
|
|
bitfld.long 0x0 31. " ASED ,Advanced SIMD Extensions Disable" "No,Yes"
|
|
bitfld.long 0x0 30. " D32D ,D32 Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 26.--27. " CP13 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
bitfld.long 0x0 24.--25. " CP12 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
bitfld.long 0x0 22.--23. " CP11 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
bitfld.long 0x0 20.--21. " CP10 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
bitfld.long 0x0 18.--19. " CP9 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
bitfld.long 0x0 16.--17. " CP8 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " CP7 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
bitfld.long 0x0 12.--13. " CP6 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
bitfld.long 0x0 10.--11. " CP5 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
bitfld.long 0x0 8.--9. " CP4 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " CP3 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
bitfld.long 0x0 4.--5. " CP2 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
bitfld.long 0x0 2.--3. " CP1 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
bitfld.long 0x0 0.--1. " CP0 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
group.long c15:0x11--0x11
|
|
line.long 0x0 "SCR,Secure Configuration Register"
|
|
bitfld.long 0x00 5. " AW ,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed"
|
|
bitfld.long 0x00 4. " FW ,FW-bit controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EF ,External Fault Abort Data" "Abort,Monitor"
|
|
bitfld.long 0x00 2. " FIQ ,Fast Interrupt Request" "FIQ,Monitor"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQ ,Interrupt Request" "IRQ,Monitor"
|
|
bitfld.long 0x00 0. " NS ,Secure mode " "Secure,Non-secure"
|
|
width 8.
|
|
group.long c15:0x111--0x111
|
|
line.long 0x0 "SDER,Secure Debug Enable Register"
|
|
bitfld.long 0x00 1. " SUNIDEN ,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted"
|
|
bitfld.long 0x00 0. " SUIDEN ,Invasive Secure User Debug Enable bit" "Denied,Permitted"
|
|
rgroup.long c15:0x0211++0x00
|
|
line.long 0x00 "NSACR,Nonsecure Access Control Register"
|
|
bitfld.long 0x00 19. " RFR ,Reserve FIQ Registers" "Permitted,Denied"
|
|
bitfld.long 0x00 15. " NSASED ,Non-Secure Advanced SIMD Extensions Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 14. " NSD32D ,Non-Secure D32 Disable" "No,Yes"
|
|
bitfld.long 0x00 13. " CP13 ,Coprocessor 13 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CP12 ,Coprocessor 12 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
bitfld.long 0x00 9. " CP9 ,Coprocessor 9 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CP8 ,Coprocessor 8 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
bitfld.long 0x00 7. " CP7 ,Coprocessor 7 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CP6 ,Coprocessor 6 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
bitfld.long 0x00 5. " CP5 ,Coprocessor 5 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CP4 ,Coprocessor 4 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
bitfld.long 0x00 3. " CP3 ,Coprocessor 3 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CP2 ,Coprocessor 2 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
bitfld.long 0x00 1. " CP1 ,Coprocessor 1 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CP0 ,Coprocessor 0 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
textline " "
|
|
group.long c15:0x000c++0x00
|
|
line.long 0x00 "VBAR,Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " VBA ,Base Address"
|
|
group.long c15:0x10c--0x10c
|
|
line.long 0x0 "MVBAR,Monitor Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " VBA , Vector Base Address"
|
|
width 8.
|
|
rgroup.long c15:0x1C--0x1C
|
|
line.long 0x0 "ISR,Interrupt status Register"
|
|
bitfld.long 0x0 8. " EF ,External Fault" "Not pending,Pending"
|
|
bitfld.long 0x0 7. " IRQ ,Pending IRQ" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0 6. " FIQ ,Pending FIQ" "Not pending,Pending"
|
|
group.long c15:0x700f--0x700f
|
|
line.long 0x0 "ANSACR,Auxiliary Non-Secure Control Register"
|
|
bitfld.long 0x00 8. " EFEH ,External Fault Error Handling" "Not allowed,Allowed"
|
|
bitfld.long 0x00 7. " PCVR ,Processor Control/Verification Registers" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BPDB ,Branch Predictor Debug" "Not allowed,Allowed"
|
|
bitfld.long 0x00 5. " TLBDB ,TLB Debug" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ICDB ,I-Cache Debug" "Not allowed,Allowed"
|
|
bitfld.long 0x00 3. " DCDB ,D-Cache Debug" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TLBLK ,TLB Locking" "Not allowed,Allowed"
|
|
bitfld.long 0x00 1. " ICLK ,I-Cache Lockng" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DCLK ,D-Cache Locking" "Not allowed,Allowed"
|
|
group.long c15:0x710F--0x710F
|
|
line.long 0x0 "EFSR,External Fault Status Register"
|
|
eventfld.long 0x00 2. " L2EF ,L2 External Fault" "No error,Error"
|
|
eventfld.long 0x00 1. " ICPE ,I-Cache Parity Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 0. " DCPE ,D-Cache Parity Error" "No error,Error"
|
|
group.long c15:0x720F--0x720F
|
|
line.long 0x0 "BPCR,Branch Predictor Control Register"
|
|
hexmask.long.byte 0x00 26.--31. 1. " BTACVIC ,BTAC Victim Index"
|
|
bitfld.long 0x00 24. " AM ,Address Mask[8]" "0,1"
|
|
bitfld.long 0x00 23. ",Address Mask[7]" "0,1"
|
|
bitfld.long 0x00 22. ",Address Mask[6]" "0,1"
|
|
bitfld.long 0x00 21. ",Address Mask[5]" "0,1"
|
|
bitfld.long 0x00 20. ",Address Mask[4]" "0,1"
|
|
bitfld.long 0x00 19. ",Address Mask[3]" "0,1"
|
|
bitfld.long 0x00 18. ",Address Mask[2]" "0,1"
|
|
bitfld.long 0x00 17. ",Address Mask[1]" "0,1"
|
|
bitfld.long 0x00 16. ",Address Mask[0]" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LSPCFG ,Link Stack Pop Configuration" "Not pop on,Pop on"
|
|
bitfld.long 0x00 10. " FBHTD ,Force Branch History Table Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " FBTACD ,Force Branch Target Address Cache Disable" "Enabled,Disabled"
|
|
hexmask.long.word 0x00 0.--8. 1. " GHRM ,Global History Mask"
|
|
group.long c15:0x730F--0x730F
|
|
line.long 0x0 "VIRQCPTR,Vectored IRQ Capture Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " VBA ,Vector Base Address"
|
|
group.long c15:0x740F--0x740F
|
|
line.long 0x0 "VFIQCPTR,Vectored FIQ Capture Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " VBA ,Vector Base Address"
|
|
group.long c15:0x750f--0x750f
|
|
line.long 0x0 "CPMR,Clock and Power Management Register"
|
|
bitfld.long 0x00 18. " DSDRR ,Speculative Data Read Requests Disable " "No,Yes"
|
|
bitfld.long 0x00 17. " NOPWFI ,Nop WFI" "Normal,Nop"
|
|
textline " "
|
|
bitfld.long 0x00 16. " NOPWFE ,Nop WFE" "Norlam,Nop"
|
|
bitfld.long 0x00 8.--9. " VSLPDLY ,VeNum Sleep Delay" "0 cycles,64 cycles,Reserved,Never sleep"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " L2SLPDLY ,L2 Sleep Delay" "16 cycles,64 cycles,1024 cycles,Never sleep"
|
|
bitfld.long 0x00 4. " CPUSLPDLY ,CPU Sleep Delay" "0 cycles,64 cycles"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ETMCLKEN ,ETM Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " VCLKAGD ,VeNum Clock Auto-Gating Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 1. " L2CLKAGD ,L2 Clock Auto-Gating Disable" "No,Yes"
|
|
bitfld.long 0x00 0. " CPUCLKAGD ,CPU Clock Auto-Gating Disable" "No,Yes"
|
|
group.long c15:0x760f--0x760f
|
|
line.long 0x0 "AVSDSCR,Adaptive Voltage Scaling Delay Synthesizer Control Register"
|
|
bitfld.long 0x00 31. " AVSDSE ,AVS Delay Synthesizer Enable" "Disabled,Enabled"
|
|
hexmask.long 0x00 0.--30. 1. " AVSDSDLY ,AVS Delay Synthesizer Delay"
|
|
group.long c15:0x701f--0x701f
|
|
line.long 0x00 "TSCSR,Temperature Sensor Control and Status Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CTEMP ,Current Temperature"
|
|
hexmask.long.byte 0x00 16.--23. 1. " HLIMIT ,High Limit"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " LLIMIT ,Low Limit"
|
|
bitfld.long 0x00 7. " TMSEL ,Test Mode Select" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TME ,Test Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " SR ,Sample Rate" "2^21 clocks,2^24 clocks,2^27 clocks,2^30 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 3. " HIRQE ,High-temp Interrupt Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " LIRQE ,Low-temp Interrupt Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " AIRQE ,Acquisition Interrupt Request Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TSE ,Temperature Sensor Enable" "Disabled,Enabled"
|
|
group.long c15:0x771f--0x771f
|
|
line.long 0x00 "AVSCSR,Adaptive Voltage Scaling Control and Status Register"
|
|
bitfld.long 0x00 30. " L2AVSU ,L2 AVS_Up" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " VAVSU ,VeNum AVS_Up" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CPUAVSU ,CPU AVS_Up" "Not requested,Requested"
|
|
bitfld.long 0x00 22. " L2AVSD ,L2 AVS_Down" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 21. " VAVSD ,VeNum AVS_Down" "Not requested,Requested"
|
|
bitfld.long 0x00 16. " CPUAVSD ,CPU AVS_Down" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 6. " L2EN ,L2 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VEN ,VeNum Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CPUEN ,CPU Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Memory Management Unit"
|
|
width 12.
|
|
group.long c15:0x1--0x1
|
|
line.long 0x0 "SCTLR,Control Register"
|
|
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 27. " NMFI ,Nonmaskable Fast Interrupt enable" "Normal,Non-maskable"
|
|
bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big"
|
|
bitfld.long 0x0 24. " VE ,Vector Enable" "Not vectored,Vectored"
|
|
textline " "
|
|
bitfld.long 0x0 21. " FI ,Fast Interrupts" "Normal,Fast"
|
|
bitfld.long 0x0 17. " HAF ,Hardware Access Flag" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " RR ,Replacement Strategy" "Random,Predictable"
|
|
textline " "
|
|
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " M ,MMU enable" "Disabled,Enabled"
|
|
textline " "
|
|
width 12.
|
|
group.long c15:0x002--0x002
|
|
line.long 0x00 "TTBR0,Translation Table Base Register 0"
|
|
hexmask.long 0x00 14.--31. 0x4000 " TTB0 ,Translation Table Base Address"
|
|
bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Reserved,Write-through,Write-back"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IMP ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SH ,Page Table Walk to Shared Memory" "Private,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C ,Page Table Walk Inner Cacheable" "Noncacheable,Cacheable"
|
|
group.long c15:0x0102++0x00
|
|
line.long 0x00 "TTBR1,Translation Table Base Register 1"
|
|
hexmask.long 0x00 14.--31. 0x4000 " PA ,Physical Address"
|
|
bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Reserved,Write-through,Write-back"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IMP ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SH ,Page Table Walk to Shared Memory" "Private,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C ,Page Table Walk Inner Cacheable" "Noncacheable,Cacheable"
|
|
group.long c15:0x0202++0x00
|
|
line.long 0x00 "TTBCR,Translation Table Base Control Register"
|
|
bitfld.long 0x00 5. " PD1 ,Page Table Walk on a TLB Miss When Using Translation Table Base Register 1" "Enable,Disable"
|
|
bitfld.long 0x00 4. " PD0 ,Page Table Walk on a TLB Miss When Using Translation Table Base Register 0" "Enable,Disable"
|
|
bitfld.long 0x0 0.--2. " N ,Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
width 12.
|
|
group.long c15:0x3--0x3
|
|
line.long 0x0 "DACR,Domain Access Control Register"
|
|
bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
width 12.
|
|
group.long c15:0x5--0x5
|
|
line.long 0x0 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x0 11. " WNR ,Write/Not Ready" "Read,Write"
|
|
bitfld.long 0x0 4.--7. " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 0.--3. 10. " FS ,Fault Status" "No Data Abort,Alignment,Watchpoint Debug,Section Access Flag,Reserved,Translation Level 1,Page Access Flag,Translation Level 2,Reserved,Section Domain,Reserved,Page Domain,Reserved,Section Permission,Reserved,Page Permission,Reserved,Reserved,Reserved,Reserved,Lock,Reserved,External,?..."
|
|
width 12.
|
|
group.long c15:0x6--0x6
|
|
line.long 0x0 "DFAR,Data Fault Address Register"
|
|
hexmask.long 0x0 0.--31. 0x1 " MVA ,Modified Virtual Address"
|
|
group.long c15:0x105--0x105
|
|
line.long 0x0 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x0 0.--3. 10. " FS ,Fault Status" "No Prefetch Abort,Reserved,Debug,Section Access Flag,Reserved,Translation Level 1,Page Access Flag,Translation Level 2,Reserved,Section Domain,Reserved,Page Domain,Reserved,Section Permission,Reserved,Page Permission,?..."
|
|
group.long c15:0x206--0x206
|
|
line.long 0x0 "IFAR,Instruction Fault Address Register"
|
|
hexmask.long 0x0 1.--31. 0x2 " MVA ,Modified Virtual Address"
|
|
group.long c15:0x15--0x15
|
|
line.long 0x0 "ADFSR,Auxiliary Data Fault Status Register"
|
|
bitfld.long 0x0 3. " TLBLKF ,TLB Lock Fault" "No lock,TLB"
|
|
bitfld.long 0x0 2. " L2E ,L2 Error" "No error,Error"
|
|
bitfld.long 0x0 1. " ICPE ,I-Cache Parity Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 0. " DCPE ,D-Cache Parity Error" "No error,Error"
|
|
group.long c15:0x115--0x115
|
|
line.long 0x0 "AIFSR,Auxiliary Instruction Fault Status Register"
|
|
textline " "
|
|
width 12.
|
|
group.long c15:0x002A--0x002A
|
|
line.long 0x00 "PRRR,Primary Region Remap Register"
|
|
bitfld.long 0x00 19. " SHNS1 ,Shareable Attribute Remap when S=1 for Normal Regions" "Not shared,Shared"
|
|
bitfld.long 0x00 18. " SHNS0 ,Shareable Attribute Remap when S=0 for Normal Regions" "Not shared,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SHDS1 ,Shareable Attribute Remap when S=1 for Device regions" "Not shared,Shared"
|
|
bitfld.long 0x00 16. " SHDS0 ,Shareable Attribute Remap when S=0 for Device regions" "Not shared,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " MTC7 ,{TEX[0] C B} = b111 Remap" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 12.--13. " MTC6 ,{TEX[0] C B} = b110 Remap" "Strongly ordered,Device,Normal,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " MTC5 ,{TEX[0] C B} = b101 Remap" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 8.--9. " MTC4 ,{TEX[0] C B} = b100 Remap" "Strongly ordered,Device,Normal,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MTC3 ,{TEX[0] C B} = b011 Remap" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 4.--5. " MTC2 ,{TEX[0] C B} = b010 Remap" "Strongly ordered,Device,Normal,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MTC1 ,{TEX[0] C B} = b001 Remap" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 0.--1. " MTC0 ,{TEX[0] C B} = b000 Remap" "Strongly ordered,Device,Normal,?..."
|
|
group.long c15:0x012A--0x012A
|
|
line.long 0x00 "NMRR,Normal Memory Remap Register"
|
|
bitfld.long 0x00 30.--31. " OCPC7 ,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 28.--29. " OCPC6 ,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " OCPC5 ,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 24.--25. " OCPC4 ,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " OCPC3 ,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 20.--21. " OCPC2 ,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " OCPC1 ,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 16.--17. " OCPC0 ,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " ICPC7 ,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 12.--13. " ICPC6 ,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " ICPC5 ,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 8.--9. " ICPC4 ,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " ICPC3 ,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 4.--5. " ICPC2 ,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " ICPC1 ,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 0.--1. " ICPC0 ,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
width 12.
|
|
group.long c15:0x4a--0x4a
|
|
line.long 0x0 "MMUDMTR,MMU Disabled Memory Type Register"
|
|
bitfld.long 0x00 23. " SHR7 ,Shared Attribute for Region 7 (VA[31:29] = 0b111)" "Not shared,Shared"
|
|
bitfld.long 0x00 22. " SHR6 ,Shared Attribute for Region 6 (VA[31:29] = 0b110)" "Not shared,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SHR5 ,Shared Attribute for Region 5 (VA[31:29] = 0b101)" "Not shared,Shared"
|
|
bitfld.long 0x00 20. " SHR4 ,Shared Attribute for Region 4 (VA[31:29] = 0b100)" "Not shared,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SHR3 ,Shared Attribute for Region 3 (VA[31:29] = 0b011)" "Not shared,Shared"
|
|
bitfld.long 0x00 18. " SHR2 ,Shared Attribute for Region 2 (VA[31:29] = 0b010)" "Not shared,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SHR1 ,Shared Attribute for Region 1 (VA[31:29] = 0b001)" "Not shared,Shared"
|
|
bitfld.long 0x00 16. " SHR0 ,Shared Attribute for Region 0 (VA[31:29] = 0b000)" "Not shared,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " MTR7 ,Memory Type Region 7 (VA[31:29] = 0b111)" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 12.--13. " MTR6 ,Memory Type Region 6 (VA[31:29] = 0b110)" "Strongly ordered,Device,Normal,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " MTR5 ,Memory Type Region 5 (VA[31:29] = 0b101)" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 8.--9. " MTR4 ,Memory Type Region 4 (VA[31:29] = 0b100)" "Strongly ordered,Device,Normal,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MTR3 ,Memory Type Region 3 (VA[31:29] = 0b011)" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 4.--5. " MTR2 ,Memory Type Region 2 (VA[31:29] = 0b010)" "Strongly ordered,Device,Normal,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MTR1 ,Memory Type Region 1 (VA[31:29] = 0b001)" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 0.--1. " MTR0 ,Memory Type Region 0 (VA[31:29] = 0b000)" "Strongly ordered,Device,Normal,?..."
|
|
group.long c15:0x14a--0x14a
|
|
line.long 0x00 "MMUDCPR,MMU Disabled Cache Policy Register"
|
|
bitfld.long 0x00 30.--31. " OCPR7 ,Outer Cache Policy Region 7 (VA[31:29] = 0b111)" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 28.--29. " OCPR6 ,Outer Cache Policy Region 6 (VA[31:29] = 0b110)" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " OCPR5 ,Outer Cache Policy Region 5 (VA[31:29] = 0b101)" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 24.--25. " OCPR4 ,Outer Cache Policy Region 4 (VA[31:29] = 0b100)" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " OCPR3 ,Outer Cache Policy Region 3 (VA[31:29] = 0b011)" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 20.--21. " OCPR2 ,Outer Cache Policy Region 2 (VA[31:29] = 0b010)" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " OCPR1 ,Outer Cache Policy Region 1 (VA[31:29] = 0b001)" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 16.--17. " OCPR0 ,Outer Cache Policy Region 0 (VA[31:29] = 0b000)" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " ICPR7 ,Inner Cache Policy Region 7 (VA[31:29] = 0b111)" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 12.--13. " ICPR6 ,Inner Cache Policy Region 6 (VA[31:29] = 0b110)" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " ICPR5 ,Inner Cache Policy Region 5 (VA[31:29] = 0b101)" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 8.--9. " ICPR4 ,Inner Cache Policy Region 4 (VA[31:29] = 0b100)" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " ICPR3 ,Inner Cache Policy Region 3 (VA[31:29] = 0b011)" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 4.--5. " ICPR2 ,Inner Cache Policy Region 2 (VA[31:29] = 0b010)" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " ICPR1 ,Inner Cache Policy Region 1 (VA[31:29] = 0b001)" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 0.--1. " ICPR0 ,Inner Cache Policy Region 0 (VA[31:29] = 0b000)" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
group.long c15:0x000d++0x00
|
|
line.long 0x00 "FCSEIDR,Fast Context Switch Extension ID Register"
|
|
hexmask.long.byte 0x00 25.--31. 1. " PID ,Process for Fast Context Switch Identification and Specification"
|
|
group.long c15:0x10d--0x10d
|
|
line.long 0x0 "CONTEXTIDR,Context ID Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. " PROCID ,Process ID"
|
|
hexmask.long.byte 0x0 0.--7. 1. " ASID ,Application Space ID"
|
|
group.long c15:0x020d++0x00
|
|
line.long 0x00 "TPIDRURW,User Read/Write Thread and Process ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " TPID ,User Read/Write Thread and Process ID"
|
|
group.long c15:0x030d++0x00
|
|
line.long 0x00 "TPIDRURO,User Read-Only Thread and Process ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " TPID ,User Read-Only Thread and Process ID"
|
|
group.long c15:0x040d++0x00
|
|
line.long 0x00 "TPIDRPRW,Privileged Thread and Process ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " TPID ,Privileged Only Thread and Process ID"
|
|
tree.end
|
|
width 14.
|
|
; --------------------------------------------------------------------------------
|
|
; Cache Configuration and Control
|
|
; --------------------------------------------------------------------------------
|
|
tree "Cache Configuration and Control"
|
|
rgroup.long c15:0x1100--0x1100
|
|
line.long 0x0 "CLIDR,Cache Level ID Register"
|
|
bitfld.long 0x00 27.--29. " LOU ,Level of Unification" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
|
|
bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
|
|
textline " "
|
|
bitfld.long 0x00 21.--23. " L8T ,L8T Type" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
bitfld.long 0x00 18.--20. " L7T ,L7T Type" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. " L6T ,L6T Type" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
bitfld.long 0x00 12.--14. " L5T ,L5T Type" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " L4T ,L4T Type" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
bitfld.long 0x00 6.--8. " L3T ,L3T Type" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " L2T ,L2 Type" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
bitfld.long 0x00 0.--2. " L1T ,L1 Type" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
rgroup.long c15:0x1000--0x1000
|
|
line.long 0x0 "CCSIDR,Current Cache Size ID Register"
|
|
bitfld.long 0x00 31. " WT ,Write-Through" "Not supported,Supported"
|
|
bitfld.long 0x00 30. " WB ,Write-Back" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RA ,Read-Allocate" "Not supported,Supported"
|
|
bitfld.long 0x00 28. " WA ,Write-Allocate" "Not supported,Supported"
|
|
textline " "
|
|
hexmask.long.word 0x00 13.--27. 1. " SETS ,Sets"
|
|
hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words"
|
|
group.long c15:0x2000--0x2000
|
|
line.long 0x0 "CSSELR,Cache Size Selection Register"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Level" "Level 1,Level 2,?..."
|
|
bitfld.long 0x00 0. " IND ,Instruction/Not Data" "Data or unified cache,Instruction cache"
|
|
; width 14.
|
|
; if ((data.long(c15:0x47)&0x00001)==0x00001)
|
|
; group.long c15:0x47--0x47
|
|
; line.long 0x0 "PAR,Physical Address Register"
|
|
; hexmask.long.byte 0x00 1.--6. 1. " FS ,Fault Status"
|
|
; bitfld.long 0x00 0. " FAULT ,Fault" "No fault,Fault"
|
|
; else
|
|
; group.long c15:0x47--0x47
|
|
; line.long 0x0 "PAR,Physical Address Register"
|
|
; hexmask.long 0x00 12.--31. 0x1000 " PA ,Physical Address"
|
|
; bitfld.long 0x00 9. " NS ,Non-Secure" "Secure,Non-secure"
|
|
; textline " "
|
|
; bitfld.long 0x00 8. " IMP ,Parity enable" "Disabled,Enabled"
|
|
; bitfld.long 0x00 7. " SH ,Shared" "Not shared,Shared"
|
|
; textline " "
|
|
; bitfld.long 0x00 4.--6. " INNER ,Inner attributes" "Non-cacheable,Strongly-ordered,Reserved,Device,Reserved,Write back/allocate,Write through/no allocate,Write back/no allocate"
|
|
; bitfld.long 0x00 2.--3. " OUTER ,Outer attributes" "Non-cacheable,Write back/allocate,Write through/no allocate,Write back/no allocate"
|
|
; textline " "
|
|
; bitfld.long 0x00 1. " SS ,SuperSection" "Section or page,Supersection"
|
|
; bitfld.long 0x00 0. " FAULT ,Fault" "No fault,Fault"
|
|
; endif
|
|
group.long c15:0x1029--0x1029
|
|
line.long 0x0 "BPTR0,Branch Predictor Tag Register 0"
|
|
hexmask.long 0x00 1.--31. 0x2 " TVA ,Tag Virtual Address"
|
|
bitfld.long 0x00 0. " TV ,Tag Valid" "Not valid,Valid"
|
|
group.long c15:0x1129--0x1129
|
|
line.long 0x0 "BPTR1,Branch Predictor Tag Register 1"
|
|
hexmask.long 0x00 1.--31. 0x2 " BTVA ,Branch Target Virtual Address"
|
|
bitfld.long 0x00 0. " BTT ,Branch Target Valid" "ARM state,Thumb state/Thumb 2EE"
|
|
width 14.
|
|
rgroup.long c15:0x1229--0x1229
|
|
line.long 0x0 "BPTR2,Branch Predictor Tag Register 2"
|
|
bitfld.long 0x00 24. " TJ ,TAG J-state" "ARM/Thumb branch,Thumb-2EE branch"
|
|
bitfld.long 0x00 23. " TNS ,Tag NS-state" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 22. " TT ,Tag T-state" "ARM branch,Thumb branch"
|
|
bitfld.long 0x00 21. " UNC ,Unconditional Branch in BTAC" "Conditional,Unconditional"
|
|
textline " "
|
|
bitfld.long 0x00 20. " RET ,Return Branch in BTAC" "No return,Return"
|
|
bitfld.long 0x00 16.--19. " DHWNDX ,Decoded Halfword Index" "Reserved,VA[2:1]=00b,VA[2:1]=01b,Reserved,VA[2:1]=10b,Reserved,Reserved,Reserved,VA[2:1]=11b,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " BHTD3 ,Branch History Table Data" "Strongly not-taken,Weakly not-taken,Weakly taken,Strongly taken"
|
|
bitfld.long 0x00 4.--5. " BHTD2 ,Branch History Table Data" "Strongly not-taken,Weakly not-taken,Weakly taken,Strongly taken"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " BHTD1 ,Branch History Table Data" "Strongly not-taken,Weakly not-taken,Weakly taken,Strongly taken"
|
|
bitfld.long 0x00 0.--1. " BHTD0 ,Branch History Table Data" "Strongly not-taken,Weakly not-taken,Weakly taken,Strongly taken"
|
|
tree.end
|
|
width 8.
|
|
tree "L1 Cache Control and Configuration"
|
|
rgroup.long c15:0x1009--0x1009
|
|
line.long 0x0 "ICRTR0,I-Cache Read Tag Register 0"
|
|
bitfld.long 0x00 31. " V ,Valid" "Invalid,Valid"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PDCD ,Pre-Decode"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TASID ,Tag ASID"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TNG ,Tag Not Global" "Low,High"
|
|
bitfld.long 0x00 6. " NSTAG ,NS-tag" "Low,High"
|
|
bitfld.long 0x00 5. " TJ ,Tag J-state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TT ,Tag T-state" "Low,High"
|
|
bitfld.long 0x00 2.--3. " TAGP ,Tag Parity" "00,01,10,11"
|
|
bitfld.long 0x00 0.--1. " DATAP ,Data Parity" "00,01,10,11"
|
|
rgroup.long c15:0x1109--0x1109
|
|
line.long 0x0 "ICRTR1,I-Cache Read Tag Register 1"
|
|
hexmask.long 0x00 11.--31. 0x800 " TVA ,Tag Virtual Address"
|
|
rgroup.long c15:0x1209--0x1209
|
|
line.long 0x0 "ICRDR,I-Cache Read Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " INST ,Instruction"
|
|
group.long c15:0x1309--0x1309
|
|
line.long 0x0 "ICLKCR,I-Cache Locking Control Register"
|
|
bitfld.long 0x00 1.--2. " ICFG ,Invalidation Configuration" "Flash,State machine,Lock Fault,Lock Fault"
|
|
bitfld.long 0x00 0. " BNA ,Block Normal Allocation" "Normal,ICPLILK"
|
|
group.long c15:0x1409--0x1409
|
|
line.long 0x0 "DCRTR0,D-Cache Read Tag Register 0"
|
|
bitfld.long 0x00 31. " V ,Valid" "Invalid,Valid"
|
|
bitfld.long 0x00 30. " NSTAG ,NS-tag" "Low,High"
|
|
bitfld.long 0x00 29. " DIRTY ,Dirty" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " ATTR ,Attributes" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x00 6.--7. " TAGP ,Tag Parity" "00,01,10,11"
|
|
bitfld.long 0x00 5. " ATTRP ,Attribute Parity" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DIRTYP ,Dirty Parity" "Odd,Even"
|
|
bitfld.long 0x00 0.--3. " DATAP ,Data Parity" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
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|
group.long c15:0x1509--0x1509
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|
line.long 0x0 "DCRTR1,D-Cache Read Tag Register 1"
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hexmask.long 0x00 11.--31. 0x800 " TPA ,Tag Physical Address"
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group.long c15:0x1609--0x1609
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|
line.long 0x0 "DCRDR,D-Cache Read Data Register"
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|
hexmask.long 0x00 0.--31. 1. " D ,Data"
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|
group.long c15:0x1709--0x1709
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|
line.long 0x0 "DCLKCR,D-Cache Locking Control Register"
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|
bitfld.long 0x00 0. " BNA ,Block Normal Allocation" "Normally,DCPLDLK"
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|
width 9.
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|
tree "Victim Registers"
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group.long c15:((0*0x100)+0x19)--((0*0x100)+0x19)
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|
line.long 0x0 "ICVIC0,Instruction Cache Victim Register 0"
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bitfld.long 0x00 28.--31. " VICSET7 ,Victim for Set ( 7 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 24.--27. " VICSET6 ,Victim for Set ( 6 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 20.--23. " VICSET5 ,Victim for Set ( 5 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
textline " "
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|
bitfld.long 0x00 16.--19. " VICSET4 ,Victim for Set ( 4 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 12.--15. " VICSET3 ,Victim for Set ( 3 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 8.--11. " VICSET2 ,Victim for Set ( 2 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
textline " "
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|
bitfld.long 0x00 4.--7. " VICSET1 ,Victim for Set ( 1 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 0.--3. " VICSET0 ,Victim for Set ( 0 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.long c15:((1*0x100)+0x19)--((1*0x100)+0x19)
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line.long 0x0 "ICVIC1,Instruction Cache Victim Register 1"
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bitfld.long 0x00 28.--31. " VICSET15 ,Victim for Set ( 15 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 24.--27. " VICSET14 ,Victim for Set ( 14 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 20.--23. " VICSET13 ,Victim for Set ( 13 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
textline " "
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|
bitfld.long 0x00 16.--19. " VICSET12 ,Victim for Set ( 12 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 12.--15. " VICSET11 ,Victim for Set ( 11 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 8.--11. " VICSET10 ,Victim for Set ( 10 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
textline " "
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|
bitfld.long 0x00 4.--7. " VICSET9 ,Victim for Set ( 9 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 0.--3. " VICSET8 ,Victim for Set ( 8 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.long c15:((2*0x100)+0x19)--((2*0x100)+0x19)
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|
line.long 0x0 "ICVIC2,Instruction Cache Victim Register 2"
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|
bitfld.long 0x00 28.--31. " VICSET23 ,Victim for Set ( 23 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 24.--27. " VICSET22 ,Victim for Set ( 22 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 20.--23. " VICSET21 ,Victim for Set ( 21 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " VICSET20 ,Victim for Set ( 20 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 12.--15. " VICSET19 ,Victim for Set ( 19 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 8.--11. " VICSET18 ,Victim for Set ( 18 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
textline " "
|
|
bitfld.long 0x00 4.--7. " VICSET17 ,Victim for Set ( 17 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 0.--3. " VICSET16 ,Victim for Set ( 16 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.long c15:((3*0x100)+0x19)--((3*0x100)+0x19)
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|
line.long 0x0 "ICVIC3,Instruction Cache Victim Register 3"
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|
bitfld.long 0x00 28.--31. " VICSET31 ,Victim for Set ( 31 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 24.--27. " VICSET30 ,Victim for Set ( 30 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 20.--23. " VICSET29 ,Victim for Set ( 29 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " VICSET28 ,Victim for Set ( 28 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 12.--15. " VICSET27 ,Victim for Set ( 27 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 8.--11. " VICSET26 ,Victim for Set ( 26 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " VICSET25 ,Victim for Set ( 25 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 0.--3. " VICSET24 ,Victim for Set ( 24 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.long c15:((4*0x100)+0x19)--((4*0x100)+0x19)
|
|
line.long 0x0 "ICVIC4,Instruction Cache Victim Register 4"
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|
bitfld.long 0x00 28.--31. " VICSET39 ,Victim for Set ( 39 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 24.--27. " VICSET38 ,Victim for Set ( 38 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 20.--23. " VICSET37 ,Victim for Set ( 37 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " VICSET36 ,Victim for Set ( 36 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 12.--15. " VICSET35 ,Victim for Set ( 35 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " VICSET34 ,Victim for Set ( 34 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " VICSET33 ,Victim for Set ( 33 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " VICSET32 ,Victim for Set ( 32 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.long c15:((5*0x100)+0x19)--((5*0x100)+0x19)
|
|
line.long 0x0 "ICVIC5,Instruction Cache Victim Register 5"
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|
bitfld.long 0x00 28.--31. " VICSET47 ,Victim for Set ( 47 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 24.--27. " VICSET46 ,Victim for Set ( 46 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 20.--23. " VICSET45 ,Victim for Set ( 45 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
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|
bitfld.long 0x00 16.--19. " VICSET44 ,Victim for Set ( 44 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 12.--15. " VICSET43 ,Victim for Set ( 43 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 8.--11. " VICSET42 ,Victim for Set ( 42 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
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|
bitfld.long 0x00 4.--7. " VICSET41 ,Victim for Set ( 41 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 0.--3. " VICSET40 ,Victim for Set ( 40 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.long c15:((6*0x100)+0x19)--((6*0x100)+0x19)
|
|
line.long 0x0 "ICVIC6,Instruction Cache Victim Register 6"
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|
bitfld.long 0x00 28.--31. " VICSET55 ,Victim for Set ( 55 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 24.--27. " VICSET54 ,Victim for Set ( 54 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 20.--23. " VICSET53 ,Victim for Set ( 53 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " VICSET52 ,Victim for Set ( 52 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 12.--15. " VICSET51 ,Victim for Set ( 51 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 8.--11. " VICSET50 ,Victim for Set ( 50 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " VICSET49 ,Victim for Set ( 49 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 0.--3. " VICSET48 ,Victim for Set ( 48 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long c15:((7*0x100)+0x19)--((7*0x100)+0x19)
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|
line.long 0x0 "ICVIC7,Instruction Cache Victim Register 7"
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|
bitfld.long 0x00 28.--31. " VICSET63 ,Victim for Set ( 63 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 24.--27. " VICSET62 ,Victim for Set ( 62 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 20.--23. " VICSET61 ,Victim for Set ( 61 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " VICSET60 ,Victim for Set ( 60 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 12.--15. " VICSET59 ,Victim for Set ( 59 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " VICSET58 ,Victim for Set ( 58 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " VICSET57 ,Victim for Set ( 57 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " VICSET56 ,Victim for Set ( 56 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long c15:((0*0x100)+0x2019)--((0*0x100)+0x2019)
|
|
line.long 0x0 "DCVIC0,Data Cache Victim Register 0"
|
|
bitfld.long 0x00 28.--31. " VICSET7 ,Victim for Set ( 7 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " VICSET6 ,Victim for Set ( 6 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " VICSET5 ,Victim for Set ( 5 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " VICSET4 ,Victim for Set ( 4 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " VICSET3 ,Victim for Set ( 3 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " VICSET2 ,Victim for Set ( 2 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " VICSET1 ,Victim for Set ( 1 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " VICSET0 ,Victim for Set ( 0 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long c15:((1*0x100)+0x2019)--((1*0x100)+0x2019)
|
|
line.long 0x0 "DCVIC1,Data Cache Victim Register 1"
|
|
bitfld.long 0x00 28.--31. " VICSET15 ,Victim for Set ( 15 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 24.--27. " VICSET14 ,Victim for Set ( 14 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 20.--23. " VICSET13 ,Victim for Set ( 13 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " VICSET12 ,Victim for Set ( 12 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " VICSET11 ,Victim for Set ( 11 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " VICSET10 ,Victim for Set ( 10 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " VICSET9 ,Victim for Set ( 9 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " VICSET8 ,Victim for Set ( 8 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long c15:((2*0x100)+0x2019)--((2*0x100)+0x2019)
|
|
line.long 0x0 "DCVIC2,Data Cache Victim Register 2"
|
|
bitfld.long 0x00 28.--31. " VICSET23 ,Victim for Set ( 23 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " VICSET22 ,Victim for Set ( 22 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " VICSET21 ,Victim for Set ( 21 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " VICSET20 ,Victim for Set ( 20 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " VICSET19 ,Victim for Set ( 19 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " VICSET18 ,Victim for Set ( 18 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " VICSET17 ,Victim for Set ( 17 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " VICSET16 ,Victim for Set ( 16 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long c15:((3*0x100)+0x2019)--((3*0x100)+0x2019)
|
|
line.long 0x0 "DCVIC3,Data Cache Victim Register 3"
|
|
bitfld.long 0x00 28.--31. " VICSET31 ,Victim for Set ( 31 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " VICSET30 ,Victim for Set ( 30 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " VICSET29 ,Victim for Set ( 29 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " VICSET28 ,Victim for Set ( 28 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " VICSET27 ,Victim for Set ( 27 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " VICSET26 ,Victim for Set ( 26 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " VICSET25 ,Victim for Set ( 25 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " VICSET24 ,Victim for Set ( 24 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long c15:((4*0x100)+0x2019)--((4*0x100)+0x2019)
|
|
line.long 0x0 "DCVIC4,Data Cache Victim Register 4"
|
|
bitfld.long 0x00 28.--31. " VICSET39 ,Victim for Set ( 39 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " VICSET38 ,Victim for Set ( 38 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " VICSET37 ,Victim for Set ( 37 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " VICSET36 ,Victim for Set ( 36 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 12.--15. " VICSET35 ,Victim for Set ( 35 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. " VICSET34 ,Victim for Set ( 34 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 4.--7. " VICSET33 ,Victim for Set ( 33 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " VICSET32 ,Victim for Set ( 32 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long c15:((5*0x100)+0x2019)--((5*0x100)+0x2019)
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line.long 0x0 "DCVIC5,Data Cache Victim Register 5"
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bitfld.long 0x00 28.--31. " VICSET47 ,Victim for Set ( 47 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 24.--27. " VICSET46 ,Victim for Set ( 46 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 20.--23. " VICSET45 ,Victim for Set ( 45 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 16.--19. " VICSET44 ,Victim for Set ( 44 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 12.--15. " VICSET43 ,Victim for Set ( 43 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. " VICSET42 ,Victim for Set ( 42 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 4.--7. " VICSET41 ,Victim for Set ( 41 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " VICSET40 ,Victim for Set ( 40 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long c15:((6*0x100)+0x2019)--((6*0x100)+0x2019)
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line.long 0x0 "DCVIC6,Data Cache Victim Register 6"
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bitfld.long 0x00 28.--31. " VICSET55 ,Victim for Set ( 55 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 24.--27. " VICSET54 ,Victim for Set ( 54 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 20.--23. " VICSET53 ,Victim for Set ( 53 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 16.--19. " VICSET52 ,Victim for Set ( 52 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 12.--15. " VICSET51 ,Victim for Set ( 51 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. " VICSET50 ,Victim for Set ( 50 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 4.--7. " VICSET49 ,Victim for Set ( 49 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " VICSET48 ,Victim for Set ( 48 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long c15:((7*0x100)+0x2019)--((7*0x100)+0x2019)
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line.long 0x0 "DCVIC7,Data Cache Victim Register 7"
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bitfld.long 0x00 28.--31. " VICSET63 ,Victim for Set ( 63 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 24.--27. " VICSET62 ,Victim for Set ( 62 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 20.--23. " VICSET61 ,Victim for Set ( 61 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 16.--19. " VICSET60 ,Victim for Set ( 60 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 12.--15. " VICSET59 ,Victim for Set ( 59 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. " VICSET58 ,Victim for Set ( 58 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 4.--7. " VICSET57 ,Victim for Set ( 57 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " VICSET56 ,Victim for Set ( 56 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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tree.end
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width 10.
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tree "Floor Registers"
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group.long c15:((0*0x100)+0x1019)--((0*0x100)+0x1019)
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line.long 0x0 "ICFLOOR0,Instruction Cache Floor Register 0"
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bitfld.long 0x00 28.--31. " FLOORSET7 ,Floor for Set ( 7 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 24.--27. " FLOORSET6 ,Floor for Set ( 6 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 20.--23. " FLOORSET5 ,Floor for Set ( 5 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 16.--19. " FLOORSET4 ,Floor for Set ( 4 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 12.--15. " FLOORSET3 ,Floor for Set ( 3 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. " FLOORSET2 ,Floor for Set ( 2 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 4.--7. " FLOORSET1 ,Floor for Set ( 1 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " FLOORSET0 ,Floor for Set ( 0 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long c15:((1*0x100)+0x1019)--((1*0x100)+0x1019)
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line.long 0x0 "ICFLOOR1,Instruction Cache Floor Register 1"
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bitfld.long 0x00 28.--31. " FLOORSET15 ,Floor for Set ( 15 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 24.--27. " FLOORSET14 ,Floor for Set ( 14 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 20.--23. " FLOORSET13 ,Floor for Set ( 13 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 16.--19. " FLOORSET12 ,Floor for Set ( 12 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 12.--15. " FLOORSET11 ,Floor for Set ( 11 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. " FLOORSET10 ,Floor for Set ( 10 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 4.--7. " FLOORSET9 ,Floor for Set ( 9 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " FLOORSET8 ,Floor for Set ( 8 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long c15:((2*0x100)+0x1019)--((2*0x100)+0x1019)
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line.long 0x0 "ICFLOOR2,Instruction Cache Floor Register 2"
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bitfld.long 0x00 28.--31. " FLOORSET23 ,Floor for Set ( 23 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 24.--27. " FLOORSET22 ,Floor for Set ( 22 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 20.--23. " FLOORSET21 ,Floor for Set ( 21 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 16.--19. " FLOORSET20 ,Floor for Set ( 20 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 12.--15. " FLOORSET19 ,Floor for Set ( 19 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. " FLOORSET18 ,Floor for Set ( 18 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 4.--7. " FLOORSET17 ,Floor for Set ( 17 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " FLOORSET16 ,Floor for Set ( 16 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long c15:((3*0x100)+0x1019)--((3*0x100)+0x1019)
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line.long 0x0 "ICFLOOR3,Instruction Cache Floor Register 3"
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bitfld.long 0x00 28.--31. " FLOORSET31 ,Floor for Set ( 31 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 24.--27. " FLOORSET30 ,Floor for Set ( 30 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 20.--23. " FLOORSET29 ,Floor for Set ( 29 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 16.--19. " FLOORSET28 ,Floor for Set ( 28 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 12.--15. " FLOORSET27 ,Floor for Set ( 27 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. " FLOORSET26 ,Floor for Set ( 26 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 4.--7. " FLOORSET25 ,Floor for Set ( 25 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " FLOORSET24 ,Floor for Set ( 24 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long c15:((4*0x100)+0x1019)--((4*0x100)+0x1019)
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line.long 0x0 "ICFLOOR4,Instruction Cache Floor Register 4"
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bitfld.long 0x00 28.--31. " FLOORSET39 ,Floor for Set ( 39 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 24.--27. " FLOORSET38 ,Floor for Set ( 38 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 20.--23. " FLOORSET37 ,Floor for Set ( 37 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 16.--19. " FLOORSET36 ,Floor for Set ( 36 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 12.--15. " FLOORSET35 ,Floor for Set ( 35 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. " FLOORSET34 ,Floor for Set ( 34 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 4.--7. " FLOORSET33 ,Floor for Set ( 33 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " FLOORSET32 ,Floor for Set ( 32 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long c15:((5*0x100)+0x1019)--((5*0x100)+0x1019)
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line.long 0x0 "ICFLOOR5,Instruction Cache Floor Register 5"
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bitfld.long 0x00 28.--31. " FLOORSET47 ,Floor for Set ( 47 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 24.--27. " FLOORSET46 ,Floor for Set ( 46 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 20.--23. " FLOORSET45 ,Floor for Set ( 45 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 16.--19. " FLOORSET44 ,Floor for Set ( 44 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 12.--15. " FLOORSET43 ,Floor for Set ( 43 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. " FLOORSET42 ,Floor for Set ( 42 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 4.--7. " FLOORSET41 ,Floor for Set ( 41 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " FLOORSET40 ,Floor for Set ( 40 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long c15:((6*0x100)+0x1019)--((6*0x100)+0x1019)
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line.long 0x0 "ICFLOOR6,Instruction Cache Floor Register 6"
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bitfld.long 0x00 28.--31. " FLOORSET55 ,Floor for Set ( 55 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 24.--27. " FLOORSET54 ,Floor for Set ( 54 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 20.--23. " FLOORSET53 ,Floor for Set ( 53 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 16.--19. " FLOORSET52 ,Floor for Set ( 52 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 12.--15. " FLOORSET51 ,Floor for Set ( 51 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. " FLOORSET50 ,Floor for Set ( 50 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 4.--7. " FLOORSET49 ,Floor for Set ( 49 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " FLOORSET48 ,Floor for Set ( 48 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long c15:((7*0x100)+0x1019)--((7*0x100)+0x1019)
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line.long 0x0 "ICFLOOR7,Instruction Cache Floor Register 7"
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bitfld.long 0x00 28.--31. " FLOORSET63 ,Floor for Set ( 63 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 24.--27. " FLOORSET62 ,Floor for Set ( 62 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 20.--23. " FLOORSET61 ,Floor for Set ( 61 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 16.--19. " FLOORSET60 ,Floor for Set ( 60 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 12.--15. " FLOORSET59 ,Floor for Set ( 59 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. " FLOORSET58 ,Floor for Set ( 58 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 4.--7. " FLOORSET57 ,Floor for Set ( 57 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " FLOORSET56 ,Floor for Set ( 56 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long c15:((0*0x100)+0x3019)--((0*0x100)+0x3019)
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line.long 0x0 "DCFLOOR0,Data Cache Floor Register 0"
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bitfld.long 0x00 28.--31. " FLOORSET7 ,Floor for Set ( 7 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 24.--27. " FLOORSET6 ,Floor for Set ( 6 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 20.--23. " FLOORSET5 ,Floor for Set ( 5 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 16.--19. " FLOORSET4 ,Floor for Set ( 4 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 12.--15. " FLOORSET3 ,Floor for Set ( 3 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. " FLOORSET2 ,Floor for Set ( 2 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 4.--7. " FLOORSET1 ,Floor for Set ( 1 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " FLOORSET0 ,Floor for Set ( 0 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long c15:((1*0x100)+0x3019)--((1*0x100)+0x3019)
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line.long 0x0 "DCFLOOR1,Data Cache Floor Register 1"
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bitfld.long 0x00 28.--31. " FLOORSET15 ,Floor for Set ( 15 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 24.--27. " FLOORSET14 ,Floor for Set ( 14 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 20.--23. " FLOORSET13 ,Floor for Set ( 13 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 16.--19. " FLOORSET12 ,Floor for Set ( 12 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " FLOORSET11 ,Floor for Set ( 11 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " FLOORSET10 ,Floor for Set ( 10 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " FLOORSET9 ,Floor for Set ( 9 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " FLOORSET8 ,Floor for Set ( 8 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long c15:((2*0x100)+0x3019)--((2*0x100)+0x3019)
|
|
line.long 0x0 "DCFLOOR2,Data Cache Floor Register 2"
|
|
bitfld.long 0x00 28.--31. " FLOORSET23 ,Floor for Set ( 23 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " FLOORSET22 ,Floor for Set ( 22 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " FLOORSET21 ,Floor for Set ( 21 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " FLOORSET20 ,Floor for Set ( 20 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " FLOORSET19 ,Floor for Set ( 19 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " FLOORSET18 ,Floor for Set ( 18 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " FLOORSET17 ,Floor for Set ( 17 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " FLOORSET16 ,Floor for Set ( 16 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long c15:((3*0x100)+0x3019)--((3*0x100)+0x3019)
|
|
line.long 0x0 "DCFLOOR3,Data Cache Floor Register 3"
|
|
bitfld.long 0x00 28.--31. " FLOORSET31 ,Floor for Set ( 31 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " FLOORSET30 ,Floor for Set ( 30 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " FLOORSET29 ,Floor for Set ( 29 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " FLOORSET28 ,Floor for Set ( 28 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " FLOORSET27 ,Floor for Set ( 27 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " FLOORSET26 ,Floor for Set ( 26 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " FLOORSET25 ,Floor for Set ( 25 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " FLOORSET24 ,Floor for Set ( 24 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long c15:((4*0x100)+0x3019)--((4*0x100)+0x3019)
|
|
line.long 0x0 "DCFLOOR4,Data Cache Floor Register 4"
|
|
bitfld.long 0x00 28.--31. " FLOORSET39 ,Floor for Set ( 39 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " FLOORSET38 ,Floor for Set ( 38 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " FLOORSET37 ,Floor for Set ( 37 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " FLOORSET36 ,Floor for Set ( 36 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " FLOORSET35 ,Floor for Set ( 35 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " FLOORSET34 ,Floor for Set ( 34 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " FLOORSET33 ,Floor for Set ( 33 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " FLOORSET32 ,Floor for Set ( 32 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long c15:((5*0x100)+0x3019)--((5*0x100)+0x3019)
|
|
line.long 0x0 "DCFLOOR5,Data Cache Floor Register 5"
|
|
bitfld.long 0x00 28.--31. " FLOORSET47 ,Floor for Set ( 47 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " FLOORSET46 ,Floor for Set ( 46 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " FLOORSET45 ,Floor for Set ( 45 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " FLOORSET44 ,Floor for Set ( 44 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " FLOORSET43 ,Floor for Set ( 43 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " FLOORSET42 ,Floor for Set ( 42 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " FLOORSET41 ,Floor for Set ( 41 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " FLOORSET40 ,Floor for Set ( 40 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long c15:((6*0x100)+0x3019)--((6*0x100)+0x3019)
|
|
line.long 0x0 "DCFLOOR6,Data Cache Floor Register 6"
|
|
bitfld.long 0x00 28.--31. " FLOORSET55 ,Floor for Set ( 55 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " FLOORSET54 ,Floor for Set ( 54 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " FLOORSET53 ,Floor for Set ( 53 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " FLOORSET52 ,Floor for Set ( 52 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " FLOORSET51 ,Floor for Set ( 51 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " FLOORSET50 ,Floor for Set ( 50 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " FLOORSET49 ,Floor for Set ( 49 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " FLOORSET48 ,Floor for Set ( 48 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long c15:((7*0x100)+0x3019)--((7*0x100)+0x3019)
|
|
line.long 0x0 "DCFLOOR7,Data Cache Floor Register 7"
|
|
bitfld.long 0x00 28.--31. " FLOORSET63 ,Floor for Set ( 63 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " FLOORSET62 ,Floor for Set ( 62 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " FLOORSET61 ,Floor for Set ( 61 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " FLOORSET60 ,Floor for Set ( 60 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " FLOORSET59 ,Floor for Set ( 59 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " FLOORSET58 ,Floor for Set ( 58 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " FLOORSET57 ,Floor for Set ( 57 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " FLOORSET56 ,Floor for Set ( 56 )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
tree.end
|
|
width 9.
|
|
tree "L2 Cache Control and Configuration"
|
|
rgroup.long c15:0x300F--0x300F
|
|
line.long 0x0 "L2NSACR,L2 Non-Secure Access Control Register"
|
|
bitfld.long 0x00 3. " SPEH ,Slave Port Error Handling" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " CPUEH ,CPU Error Handling" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " VR ,Verification Registers" "Not allowed,Allowed"
|
|
bitfld.long 0x00 0. " CR ,Control Registers" "Not allowed,Allowed"
|
|
width 9.
|
|
group.long c15:0x310F--0x310F
|
|
line.long 0x0 "L2CR0,L2 Control Register 0"
|
|
bitfld.long 0x00 31. " CPUMPOOORDE ,CPU Master Port Out-of-Order Read Data Enable" "In-order,Out-of-order"
|
|
bitfld.long 0x00 30. " CPUMPOOOWRE ,CPU Master Port Out-of-Order Write Response Enable" "In-order,Out-of-order"
|
|
textline " "
|
|
bitfld.long 0x00 27. " TCMT ,TCM Priority Type" "Fairness algorithm,Fixed"
|
|
bitfld.long 0x00 24.--26. " TCMPO ,TCM Priority Order" "Fetch-DMA-Slave,Fetch-Slave-DMA,Reserved,Slave-Fetch-DMA,DMA-Fetch-Slave,Reserved,DMA-Slave-Fetch,Slave-DMA-Fetch"
|
|
textline " "
|
|
bitfld.long 0x00 23. " HMLRU ,Hits Marked Least Recently Used" "Most,Least"
|
|
bitfld.long 0x00 22. " AALFE ,Allow Allocation of Line Fill Errors" "Not written,Written"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DL2IA ,Disable L2 Instruction Allocation" "Not allocate,Allocate"
|
|
bitfld.long 0x00 20. " VM ,Victim Mode" "Normal,Victim"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SPERT ,Slave Port Error Report Type" "External fault,Interrupt request"
|
|
bitfld.long 0x00 18. " SPERE ,Slave Port Error Report Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CPUERT ,CPU Error Report Type" "External fault,Interrupt request"
|
|
bitfld.long 0x00 16. " CPUERE ,CPU Error Report Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DMACHERT3 ,DMA Channel 3 Error Report Type" "External fault,Interrupt request"
|
|
bitfld.long 0x00 14. " DMACHERT2 ,DMA Channel 2 Error Report Type" "External fault,Interrupt request"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DMACHERT1 ,DMA Channel 1 Error Report Type" "External fault,Interrupt request"
|
|
bitfld.long 0x00 12. " DMACHERT0 ,DMA Channel 0 Error Report Type" "External fault,Interrupt request"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DMACHERE3 ,DMA Channel 3 Error Report Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " DMACHERE2 ,DMA Channel 2 Error Report Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DMACHERE1 ,DMA Channel 1 Error Report Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DMACHERE0 ,DMA Channel 0 Error Report Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DMACHCRT3 ,DMA Channel 3 Complete Report Type" "External fault,Interrupt request"
|
|
bitfld.long 0x00 6. " DMACHCRT2 ,DMA Channel 2 Complete Report Type" "External fault,Interrupt request"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DMACHCRT1 ,DMA Channel 1 Complete Report Type" "External fault,Interrupt request"
|
|
bitfld.long 0x00 4. " DMACHCRT0 ,DMA Channel 0 Complete Report Type" "External fault,Interrupt request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DMACHCRE3 ,DMA Channel 3 Complete Report Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DMACHCRE2 ,DMA Channel 2 Complete Report Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DMACHCRE1 ,DMA Channel 1 Complete Report Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DMACHCRE0 ,DMA Channel 0 Complete Report Enable" "Disabled,Enabled"
|
|
width 9.
|
|
group.long c15:0x320F--0x320F
|
|
line.long 0x0 "L2CPUCR,L2 CPU Control Register"
|
|
bitfld.long 0x00 7. " MPERE ,Modified Parity Error Report Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TPERE ,Tag Parity Error Report Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DPERE ,Data Parity Error Report Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " MPRDERE ,Master Port Read Decode Error Report Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MPRSERE ,Master Port Read Slave Error Report Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " MPWDERE ,Master Port Write Decode Error Report Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MPWSERE ,Master Port Write Slave Error Report Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " LDREXERE ,LDREX Error Report Enable " "Disabled,Enabled"
|
|
group.long c15:0x330f--0x330f
|
|
line.long 0x00 "L2CR1,L2 Control Register 1"
|
|
bitfld.long 0x00 10. " DMBWWR ,DMB Wait for Write Response" "Not wait,Wait"
|
|
bitfld.long 0x00 9. " WPD ,Write Pipeline Depth" "15,31"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DBB ,Barrier Broadcast Disable " "No,Yes"
|
|
bitfld.long 0x00 7. " IPFWRAPD ,Instruction Prefetch Wrap Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IPFBURST ,Instruction Prefetch Burst" "Not used,Used"
|
|
bitfld.long 0x00 5. " IPFSIZE ,Instruction Prefetch Size" "64 bytes,128 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IPFE ,Instruction Prefetch Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " DPFWRAPD ,Data Prefetch Wrap Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DPFBURST ,Data Prefetch Burst" "Not used,Used"
|
|
bitfld.long 0x00 1. " DPFSIZE ,Data Prefetch Size" "64 bytes,128 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DPFE ,Data Prefetch Enable" "Disabled,Enabled"
|
|
rgroup.long c15:0x301F--0x301F
|
|
line.long 0x0 "L2SR,L2 Status Register"
|
|
bitfld.long 0x00 18. " SPE ,Slave Port Error" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CPUE ,CPU Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DMACHE3 ,DMA Channel 3 Error" "No error,Error"
|
|
bitfld.long 0x00 10. " DMACHE2 ,DMA Channel 2 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DMACHE1 ,DMA Channel 1 Error" "No error,Error"
|
|
bitfld.long 0x00 8. " DMACHE0 ,DMA Channel 0 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DMACHC3 ,DMA Channel 3 Complete" "Not completed,Completed"
|
|
bitfld.long 0x00 2. " DMACHC2 ,DMA Channel 2 Complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DMACHC1 ,DMA Channel 1 Complete" "Not completed,Completed"
|
|
bitfld.long 0x00 0. " DMACHC0 ,DMA Channel 0 Complete" "Not completed,Completed"
|
|
group.long c15:0x311F--0x311F
|
|
line.long 0x0 "L2CPUESR,L2 CPU Error Status Register"
|
|
bitfld.long 0x00 12.--13. " BANK ,Indicates L2/TCM Bank Number Associated" "0,1,2,3"
|
|
eventfld.long 0x00 8. " HTW ,Hardware Table Walk" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 7. " MPE ,Modified Parity Error" "No error,Error"
|
|
eventfld.long 0x00 6. " TPE ,Tag Parity Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 5. " DPE ,Data Parity Error" "No error,Error"
|
|
eventfld.long 0x00 4. " MPRDE ,Master Port Read Decode Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 3. " MPRSE ,Master Port Read Slave Error" "No error,Error"
|
|
eventfld.long 0x00 2. " MPWDE ,Master Port Write Decode Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 1. " MPWSE ,Master Port Write Slave Error" "No error,Error"
|
|
eventfld.long 0x00 0. " LDREXE ,LDREX Error" "No error,Error"
|
|
width 9.
|
|
rgroup.long c15:0x59--0x59
|
|
line.long 0x0 "L2DCRTR0,L2 D-Cache Read Tag Register 0"
|
|
bitfld.long 0x00 24.--26. " PLRU ,Pseudo-Least Recently Used" "Replace way 0,Replace way 1,Replace way 0,Replace way 1,Replace way 2,Replace way 2,Replace way 3,Replace way 3"
|
|
bitfld.long 0x00 22. " TAGP ,Tag Parity" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 21. " PCE ,Parity Check Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " NSTAG ,NS-tag" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " V ,Valid" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
bitfld.long 0x00 12.--15. " MOD ,Modified" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " MODP ,Modified Parity" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATAP ,Data Parity"
|
|
rgroup.long c15:0x159--0x159
|
|
line.long 0x0 "L2DCRTR1,L2 D-Cache Read Tag Register 1"
|
|
hexmask.long 0x00 14.--31. 0x4000 " TPA ,Tag Physical Address"
|
|
rgroup.long c15:0x259--0x259
|
|
line.long 0x0 "L2DCRDR0,L2 D-Cache Read Data Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " D ,Data"
|
|
rgroup.long c15:0x359--0x359
|
|
line.long 0x0 "L2DCRDR1,L2 D-Cache Read Data Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " D ,Data"
|
|
tree.end
|
|
width 10.
|
|
; --------------------------------------------------------------------------------
|
|
; TCM Configuration and Control
|
|
; --------------------------------------------------------------------------------
|
|
tree "TCM Configuration and Control"
|
|
group.long c15:0x69--0x69
|
|
line.long 0x0 "TCMSELR,TCM Select Register"
|
|
bitfld.long 0x0 0.--1. " BS ,Bank Select" "Bank 0,Bank 1,Bank 2,Bank 3"
|
|
group.long c15:0x169--0x169
|
|
line.long 0x0 "TCMBNSACR,TCM Bank Non-secure Access Control Register"
|
|
bitfld.long 0x0 2. " TCM ,Tighly-Coupled Memory" "L2 Cache,TCM"
|
|
bitfld.long 0x0 1. " NSRE ,Non-secure Read Enable" "Not allowed,Allowed"
|
|
bitfld.long 0x0 0. " NS ,Non-secure" "Secure,Non-secure"
|
|
group.long c15:0x269--0x269
|
|
line.long 0x0 "TCMBBR,TCM Bank Base Register"
|
|
hexmask.long.word 0x0 16.--31. 1. " BA ,Base Address"
|
|
bitfld.long 0x0 0. " TE ,TCM Enable" "Disabled,Enabled"
|
|
group.long c15:0x369--0x369
|
|
line.long 0x0 "TCMBRAR,TCM Bank Region Access Register"
|
|
hexmask.long.word 0x0 0.--15. 1. " NSA ,Non-secure Attribute"
|
|
width 10.
|
|
group.long c15:0x79--0x79
|
|
line.long 0x0 "SPCR,Slave Port Control Register"
|
|
bitfld.long 0x00 31. " PUBNSME3 ,Public Non-secure Match Enable for TCM Bank 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PUBNSME2 ,Public Non-secure Match Enable for TCM Bank 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " PUBNSME1 ,Public Non-secure Match Enable for TCM Bank 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " PUBNSME0 ,Public Non-secure Match Enable for TCM Bank 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PUB3 ,Public Access to TCM Bank 3" "Private,Public"
|
|
bitfld.long 0x00 26. " PUB2 ,Public Access to TCM Bank 2" "Private,Public"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PUB1 ,Public Access to TCM Bank 1" "Private,Public"
|
|
bitfld.long 0x00 24. " PUB0 ,Public Access to TCM Bank 0" "Private,Public"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SHCFG ,Shared Configuration" "Determined by ATYPE[0],Determined by ATYPE[0],Non-shared,Shared"
|
|
bitfld.long 0x00 16.--17. " PCFG ,Parity Configuration" "Enabled(SPMPURPAPR[PEx]),Enabled(SPMPURPAPR[PEx]),Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DPERMRE ,Data Parity Error Requesting Master Report Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DPERE ,Data Parity Error Report Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MPUERE ,MPU Error Report Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DCDERE ,Decode Error Report Enable" "Disabled,Enabled"
|
|
width 10.
|
|
group.long c15:0x1079--0x1079
|
|
line.long 0x0 "SPESR,Slave Error Status Register"
|
|
eventfld.long 0x00 2. " DPE ,Data Parity Enable" "No error,Error"
|
|
eventfld.long 0x00 1. " MPUE ,MPU Error" "No error,Error"
|
|
eventfld.long 0x00 0. " DCDE ,Decode error" "No error,Error"
|
|
rgroup.long c15:0x1179--0x1179
|
|
line.long 0x0 "SPEAR,Slave Port Error Register"
|
|
hexmask.long 0x0 0.--31. 1. " SPA ,Slave Port Address"
|
|
width 10.
|
|
rgroup.long c15:0x1279--0x1279
|
|
line.long 0x0 "SPESYNR,Slave Port Error Syndrome Register"
|
|
bitfld.long 0x00 28. " AOOOWR ,AOOOWR" "Low,High"
|
|
bitfld.long 0x00 27. " AOOORD ,AOOORD" "Low,High"
|
|
bitfld.long 0x00 26. " APROTNS ,APROTNS" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " ALOCK ,ALOCK" "0,1,2,3"
|
|
bitfld.long 0x00 20.--23. " ALEN ,ALEN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 18.--19. " ASIZE ,ASIZE" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ABURST ,ABURST" "Low,High"
|
|
bitfld.long 0x00 16. " AWRITE ,AWRITE" "Low,High"
|
|
bitfld.long 0x00 12.--15. " ATYPE ,ATYPE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ATID ,ATID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMID ,AMID"
|
|
group.long c15:0x2079--0x2079
|
|
line.long 0x0 "SPMUL0IDR,Slave Port MPU Level 0 ID Register"
|
|
bitfld.long 0x00 28. " APROTNSME ,APROTNS Match Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--27. " ATIDME ,ATID Match Enable" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
hexmask.long.byte 0x00 16.--23. 1. " AMIDME ,ATID Match Enable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " APROTNS ,APROTNS" "Low,High"
|
|
bitfld.long 0x00 8.--11. " ATID ,ATID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMID ,AMID"
|
|
group.long c15:0x2179--0x2179
|
|
line.long 0x0 "SPMUL1IDR,Slave Port MPU Level 1 ID Register"
|
|
bitfld.long 0x00 28. " APROTNSME ,APROTNS Match Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--27. " ATIDME ,ATID Match Enable" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
hexmask.long.byte 0x00 16.--23. 1. " AMIDME ,ATID Match Enable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " APROTNS ,APROTNS" "Low,High"
|
|
bitfld.long 0x00 8.--11. " ATID ,ATID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMID ,AMID"
|
|
group.long c15:0x2279--0x2279
|
|
line.long 0x0 "SPMUL2IDR,Slave Port MPU Level 2 ID Register"
|
|
bitfld.long 0x00 28. " APROTNSME ,APROTNS Match Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--27. " ATIDME ,ATID Match Enable" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
hexmask.long.byte 0x00 16.--23. 1. " AMIDME ,ATID Match Enable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " APROTNS ,APROTNS" "Low,High"
|
|
bitfld.long 0x00 8.--11. " ATID ,ATID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMID ,AMID"
|
|
group.long c15:0x2379--0x2379
|
|
line.long 0x0 "SPMUL3IDR,Slave Port MPU Level 3 ID Register"
|
|
bitfld.long 0x00 28. " APROTNSME ,APROTNS Match Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--27. " ATIDME ,ATID Match Enable" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
hexmask.long.byte 0x00 16.--23. 1. " AMIDME ,ATID Match Enable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " APROTNS ,APROTNS" "Low,High"
|
|
bitfld.long 0x00 8.--11. " ATID ,ATID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMID ,AMID"
|
|
width 10.
|
|
group.long c15:0x3079--0x3079
|
|
line.long 0x0 "SPMPUSELR,Slave Port MPU Select Register"
|
|
bitfld.long 0x00 13.--15. " RP ,Region Pair" "Region Pair 0,Region Pair 1,Region Pair 2,Region Pair 3,Region Pair 4,Region Pair 5,Region Pair 6,Region Pair 7"
|
|
bitfld.long 0x00 0.--1. " BS ,Bank Select" "Bank 0,Bank 1,Bank 2,Bank 3"
|
|
width 10.
|
|
group.long c15:0x3179--0x3179
|
|
line.long 0x0 "SPMPURPAPR,Slave Port MPU Region Pair Access Permissions Registers"
|
|
bitfld.long 0x00 24. " PER1 ,Parity Enable Region 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 22.--23. " MPUL3PR1 ,Mpu Level 3 Permission Region 1" "No access,Read-only,Write-only,Read/write"
|
|
bitfld.long 0x00 20.--21. " MPUL2PR1 ,Mpu Level 2 Permission Region 1" "No access,Read-only,Write-only,Read/write"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " MPUL1PR1 ,Mpu Level 1 Permission Region 1" "No access,Read-only,Write-only,Read/write"
|
|
bitfld.long 0x00 16.--17. " MPUL0PR1 ,Mpu Level 0 Permission Region 1" "No access,Read-only,Write-only,Read/write"
|
|
bitfld.long 0x00 8. " PER0 ,Parity Enable Region 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MPUL3PR0 ,Mpu Level 3 Permission Region 0" "No access,Read-only,Write-only,Read/write"
|
|
bitfld.long 0x00 4.--5. " MPUL2PR0 ,Mpu Level 2 Permission Region 0" "No access,Read-only,Write-only,Read/write"
|
|
bitfld.long 0x00 2.--3. " MPUL1PR0 ,Mpu Level 1 Permission Region 0" "No access,Read-only,Write-only,Read/write"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MPUL0PR0 ,Mpu Level 0 Permission Region 0" "No access,Read-only,Write-only,Read/write"
|
|
tree.end
|
|
width 9.
|
|
tree "TLB Configuration and Control"
|
|
group.long c15:0x1a--0x1a
|
|
line.long 0x00 "TLBTR0,TLB Tag Register 0"
|
|
bitfld.long 0x00 24.--26. " DPSIZC ,Decoded Page Size -- CAM copy" "4KB,64KB,Invalid,1MB section,Invalid,Invalid,Invalid,16MB supersection"
|
|
bitfld.long 0x00 20.--22. " DPSIZR ,Decoded Page Size -- RAM copy" "4KB,64KB,Invalid,1MB section,Invalid,Invalid,Invalid,16MB supersection"
|
|
textline " "
|
|
bitfld.long 0x00 19. " NSDESC ,NS-desc" "Secure,Non-secure"
|
|
bitfld.long 0x00 17. " NG ,Not Global" "Global,Private"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SH ,Shared" "Private,Shared"
|
|
bitfld.long 0x00 15. " APX ,Access Permissions Extension" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " TEX ,Type Extension" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 10.--11. " AP ,Access Permissions" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--8. " DOMAIN ,Domain" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15."
|
|
textline " "
|
|
bitfld.long 0x00 4. " XN ,Execute Never" "Permitted,Not permitted"
|
|
bitfld.long 0x00 3. " C ,C bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " B ,B bit" "Low,High"
|
|
width 9.
|
|
group.long c15:0x11a--0x11a
|
|
line.long 0x00 "TLBTR1,TLB Tag Register 1"
|
|
hexmask.long 0x00 12.--31. 0x1000 " PA ,Physical Address"
|
|
bitfld.long 0x00 8. " HIT ,Hit" "Miss,Hit"
|
|
hexmask.long.byte 0x00 0.--5. 1. " INDEX ,Index"
|
|
group.long c15:0x21a--0x21a
|
|
line.long 0x00 "TLBTR2,TLB Tag Register 2"
|
|
hexmask.long 0x00 12.--31. 0x1000 " TVA ,Tag Virtual Address"
|
|
bitfld.long 0x00 10. " TNG ,Tag Not Global" "Global,Private"
|
|
bitfld.long 0x00 9. " NSTID ,Non-Secure Tag ID" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 8. " V ,Valid" "Not valid,Valid"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TASID ,Tag ASID"
|
|
group.long c15:0x31a--0x31a
|
|
line.long 0x00 "TLBLKCR,TLB Locking Control Register"
|
|
hexmask.long.byte 0x00 16.--21. 1. " TLBVIC ,TLB Victim"
|
|
hexmask.long.byte 0x00 8.--13. 1. " TLBFLOOR ,TLB Floor"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " IASIDCFG ,Invalidate ASID Configuration" "Security matched/ASID,All,Reserved,Lock"
|
|
bitfld.long 0x00 1.--2. " IALLCFG ,Invalidate All Configuration" "Security matched,All,Reserved,Lock"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BNA ,Block Normal Allocations" "Normal,V2PCWLK/V2POWLK"
|
|
tree.end
|
|
width 0x8
|
|
tree "L2 Preload Engine"
|
|
rgroup c15:0x000b++0x00
|
|
line.long 0x00 "PLEIDR,PLE Identification Register 0"
|
|
bitfld.long 0x00 0. " CH0P ,Channel 0 Present" "Not present,Present"
|
|
rgroup c15:0x020b++0x00
|
|
line.long 0x00 "PLESR,PLE Status Register"
|
|
bitfld.long 0x00 0. " CH0R ,Channel 0 Run" "Not running,Running"
|
|
rgroup c15:0x040b++0x00
|
|
line.long 0x00 "PLEFSR,PLE FIFO Status Register"
|
|
group c15:0x001b++0x00
|
|
line.long 0x00 "PLEUAR,PLE User Accessibility Register"
|
|
bitfld.long 0x00 0. " U0 ,User Mode Process Access Registers for Channel 0 Permission" "Not permitted,Permitted"
|
|
group c15:0x011b++0x00
|
|
line.long 0x00 "PLEPCR,PLE Parameters Control Register"
|
|
tree.end
|
|
width 12.
|
|
tree "System Performance Monitor"
|
|
group.long c15:0xc9--0xc9
|
|
line.long 0x00 "PMCR,Performance Monitor Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMPL ,Implementer Code"
|
|
hexmask.long.byte 0x00 16.--23. 1. " IDCODE ,Identification Code"
|
|
hexmask.long.byte 0x00 11.--15. 1. " NEVC ,Number of Event Counters"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DCCNTPR ,Disable PMCCNTR when prohibited" "No,Yes"
|
|
bitfld.long 0x00 4. " GTEVE ,Global Trace Event Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " CLKDIV ,Clock Divider" "Every cycle,Every 64 cycle"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CCNTRST ,CCNTRST" "No reset,Reset"
|
|
bitfld.long 0x00 1. " EVCRST ,Event Counter Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " GEN ,Global Enable" "Disabled,Enabled"
|
|
group.long c15:0x1c9--0x1c9
|
|
line.long 0x00 "PMCNTENSET,Performance Monitor Count Enable Set"
|
|
bitfld.long 0x00 31. " CCNT ,PMCCNTR Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " EVC3 ,PM3EVCNTR Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EVC2 ,PM2EVCNTR Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " EVC1 ,PM1EVCNTR Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EVC0 ,PM0EVCNTR Enable" "Disabled,Enabled"
|
|
group.long c15:0x2c9--0x2c9
|
|
line.long 0x00 "PMCNTENCLR,Performance Monitor Count Enable Clear"
|
|
eventfld.long 0x00 31. " CCNT ,PMCCNTR Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " EVC3 ,PM3EVCNTR Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " EVC2 ,PM2EVCNTR Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 1. " EVC1 ,PM1EVCNTR Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 0. " EVC0 ,PM0EVCNTR Enable" "Disabled,Enabled"
|
|
width 12.
|
|
group.long c15:0x3c9--0x3c9
|
|
line.long 0x00 "PMOVSR,Performance Monitor Overflow Status Register"
|
|
bitfld.long 0x00 31. " CCNT ,PMCCNTR Overflow" "Not overflow,Overflow"
|
|
bitfld.long 0x00 3. " EVC3 ,PM3EVCNTR Overflow" "Not overflow,Overflow"
|
|
bitfld.long 0x00 2. " EVC2 ,PM2EVCNTR Owerflow" "Not overflow,Overflow"
|
|
bitfld.long 0x00 1. " EVC1 ,PM1EVCNTR Overflow" "Not overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EVC0 ,PM0EVCNTR Overflow" "Not overflow,Overflow"
|
|
group.long c15:0x4c9--0x4c9
|
|
line.long 0x00 "PMSWINC,Performance Monitor Software Increment"
|
|
bitfld.long 0x00 3. " EVC3 ,PM3EVCNTR Increment" "No increment,Increment"
|
|
bitfld.long 0x00 2. " EVC2 ,PM2EVCNTR Increment" "No increment,Increment"
|
|
bitfld.long 0x00 1. " EVC1 ,PM1EVCNTR Increment" "No increment,Increment"
|
|
bitfld.long 0x00 0. " EVC0 ,PM0EVCNTR Increment" "No increment,Increment"
|
|
group.long c15:0x5c9--0x5c9
|
|
line.long 0x00 "PMSELR,Performance Monitor Select Register"
|
|
bitfld.long 0x00 0.--1. " PMXS ,Performance Monitor X Select" "Monitor 0,Monitor 1,Monitor 2,Monitor 3"
|
|
group.long c15:0xd9--0xd9
|
|
line.long 0x00 "PMCCNTR,Performance Monitor Cycle Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCNT ,Cycle Count"
|
|
group.long c15:0x1d9--0x1d9
|
|
line.long 0x00 "PMXEVTYPER,Performance Monitor Event Type Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " EVTYPE ,Event number"
|
|
group.long c15:0x2d9--0x2d9
|
|
line.long 0x00 "PMXEVCNTR,Performance Monitor Event Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " EVCNTR ,Event counter"
|
|
group.long c15:0xe9--0xe9
|
|
line.long 0x00 "PMUSERENR,Performance Monitor User Enable Register"
|
|
bitfld.long 0x00 0. " UEN ,User-mode Enable" "Disabled,Enabled"
|
|
width 12.
|
|
group.long c15:0x1e9--0x1e9
|
|
line.long 0x00 "PMINTENSET,Performance Monitor Interrupt Enable Set"
|
|
bitfld.long 0x00 31. " CCNT ,PMCCNTR Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " EVC3 ,PM3EVCNTR Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " EVC2 ,PM2EVCNTR Interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " EVC1 ,PM1EVCNTR Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EVC0 ,PM0EVCNTR Interrupt" "No interrupt,Interrupt"
|
|
group.long c15:0x2e9--0x2e9
|
|
line.long 0x00 "PMINTENCLR,Performance Monitor Interrupt Enable Clear"
|
|
eventfld.long 0x00 31. " CCNT ,PMCCNTR Interrupt" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " EVC3 ,PM3EVCNTR Interrupt" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " EVC2 ,PM2EVCNTR Interrupt" "Disabled,Enabled"
|
|
eventfld.long 0x00 1. " EVC1 ,PM1EVCNTR Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 0. " EVC0 ,PM0EVCNTR Interrupt" "Disabled,Enabled"
|
|
width 12.
|
|
group.long c15:0xf9--0xf9
|
|
line.long 0x00 "PMXEVCNTCR,Performance Monitor Event Count Control Register"
|
|
bitfld.long 0x00 31. " OVTEV ,Overflow Trace Event" "No overflow,Overflow"
|
|
bitfld.long 0x00 30. " EVTEV ,Event Export Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " ENL ,Edge/Not Level" "Level-sensitive,Edge-triggered"
|
|
textline " "
|
|
bitfld.long 0x00 26. " NEG ,Negative" "Positive edge/level,Negative edge/level"
|
|
width 12.
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " STOPNDX ,Stop Index" "PM0EVCNTR overflow/PM0EVTYPER[EVTYPE] event,PM1EVCNTR overflow/PM1EVTYPER[EVTYPE] event,PM2EVCNTR overflow/PM2EVTYPER[EVTYPE] event,PM3EVCNTR overflow/PM3EVTYPER[EVTYPE] event"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " RLDNDX ,Reload Index" "PM0EVCNTR overflow/PM0EVTYPER[EVTYPE] event,PM1EVCNTR overflow/PM1EVTYPER[EVTYPE] event,PM2EVCNTR overflow/PM2EVTYPER[EVTYPE] event,PM3EVCNTR overflow/PM3EVTYPER[EVTYPE] event"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " RESNDX ,Resume Index" "PM0EVCNTR overflow/PM0EVTYPER[EVTYPE] event,PM1EVCNTR overflow/PM1EVTYPER[EVTYPE] event,PM2EVCNTR overflow/PM2EVTYPER[EVTYPE] event,PM3EVCNTR overflow/PM3EVTYPER[EVTYPE] event"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SUSNDX ,Suspend Index" "PM0EVCNTR overflow/PM0EVTYPER[EVTYPE] event,PM1EVCNTR overflow/PM1EVTYPER[EVTYPE] event,PM2EVCNTR overflow/PM2EVTYPER[EVTYPE] event,PM3EVCNTR overflow/PM3EVTYPER[EVTYPE] event"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " STARTNDX ,Start Index" "PM0EVCNTR overflow/PM0EVTYPER[EVTYPE] event,PM1EVCNTR overflow/PM1EVTYPER[EVTYPE] event,PM2EVCNTR overflow/PM2EVTYPER[EVTYPE] event,PM3EVCNTR overflow/PM3EVTYPER[EVTYPE] event"
|
|
textline " "
|
|
width 12.
|
|
bitfld.long 0x00 15. " SAOV ,Stop all counters on overflow" "Not stopped,Stopped"
|
|
bitfld.long 0x00 12.--14. " STOPCOND ,STOPCOND" "Not stopped,PMCCNTR overflow,Reserved,Reserved,Reserved,Trace event,PMxEVCNTR overflow,PMxEVTYPER[EVTYPE]"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " RLDCOND ,Reload Condition" "Not reloaded,PMCCNTR overflow,Reserved,Reserved,Reserved,Trace event,PMxEVCNTR overflow,PMxEVTYPER[EVTYPE]"
|
|
bitfld.long 0x00 6.--8. " RESCOND ,Resume Condition" "Reserved,Reserved,Reserved,Reserved,Reserved,Trace event,PMxEVCNTR overflow,PMxEVTYPER[EVTYPE]"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " SUSCOND ,Suspend Condition" "Not suspended,PMCCNTR overflow,Reserved,Reserved,Reserved,Trace event,PMxEVCNTR overflow,PMxEVTYPER[EVTYPE]"
|
|
bitfld.long 0x00 0.--2. " STARTCOND ,Start Condition" "Immediately,PMCCNTR overflow,Reserved,Reserved,Reserved,Trace event,PMxEVCNTR overflow,PMxEVTYPER[EVTYPE]"
|
|
group.long c15:0x1f9--0x1f9
|
|
line.long 0x00 "PMXEVCNTSR,Performance Monitor Event Counter Status Register"
|
|
bitfld.long 0x00 0.--2. " STATE ,Event counter state" "Reserved,Stop,Count,Reserved,Suspend,?..."
|
|
width 12.
|
|
group.long c15:0x2f9--0x2f9
|
|
line.long 0x00 "PMCCNTCR,Performance Monitor Cycle Count Control Register"
|
|
bitfld.long 0x00 31. " OVTEV ,Overflow Trace Event" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " STOPNDX ,Stop Index" "PM0EVCNTR overflow/PM0EVTYPER[EVTYPE] event,PM1EVCNTR overflow/PM1EVTYPER[EVTYPE] event,PM2EVCNTR overflow/PM2EVTYPER[EVTYPE] event,PM3EVCNTR overflow/PM3EVTYPER[EVTYPE] event"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " RLDNDX ,Reload Index" "PM0EVCNTR overflow/PM0EVTYPER[EVTYPE] event,PM1EVCNTR overflow/PM1EVTYPER[EVTYPE] event,PM2EVCNTR overflow/PM2EVTYPER[EVTYPE] event,PM3EVCNTR overflow/PM3EVTYPER[EVTYPE] event"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " RESNDX ,Resume Index" "PM0EVCNTR overflow/PM0EVTYPER[EVTYPE] event,PM1EVCNTR overflow/PM1EVTYPER[EVTYPE] event,PM2EVCNTR overflow/PM2EVTYPER[EVTYPE] event,PM3EVCNTR overflow/PM3EVTYPER[EVTYPE] event"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SUSNDX ,Suspend Index" "PM0EVCNTR overflow/PM0EVTYPER[EVTYPE] event,PM1EVCNTR overflow/PM1EVTYPER[EVTYPE] event,PM2EVCNTR overflow/PM2EVTYPER[EVTYPE] event,PM3EVCNTR overflow/PM3EVTYPER[EVTYPE] event"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " STARTNDX ,Start Index" "PM0EVCNTR overflow/PM0EVTYPER[EVTYPE] event,PM1EVCNTR overflow/PM1EVTYPER[EVTYPE] event,PM2EVCNTR overflow/PM2EVTYPER[EVTYPE] event,PM3EVCNTR overflow/PM3EVTYPER[EVTYPE] event"
|
|
textline " "
|
|
width 12.
|
|
bitfld.long 0x00 15. " SAOV ,Stop all counters on overflow" "Not stopped,Stopped"
|
|
bitfld.long 0x00 12.--14. " STOPCOND ,STOPCOND" "Not stopped,PMCCNTR overflow,Reserved,Reserved,Reserved,Trace event,PMxEVCNTR overflow,PMxEVTYPER[EVTYPE]"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " RLDCOND ,Reload Condition" "Not reloaded,PMCCNTR overflow,Reserved,Reserved,Reserved,Trace event,PMxEVCNTR overflow,PMxEVTYPER[EVTYPE]"
|
|
bitfld.long 0x00 6.--8. " RESCOND ,Resume Condition" "Reserved,Reserved,Reserved,Reserved,Reserved,Trace event,PMxEVCNTR overflow,PMxEVTYPER[EVTYPE]"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " SUSCOND ,Suspend Condition" "Not suspended,PMCCNTR overflow,Reserved,Reserved,Reserved,Trace event,PMxEVCNTR overflow,PMxEVTYPER[EVTYPE]"
|
|
bitfld.long 0x00 0.--2. " STARTCOND ,Start Condition" "Immediately,Reserved,Reserved,Reserved,Reserved,Trace event,PMxEVCNTR overflow,PMxEVTYPER[EVTYPE]"
|
|
rgroup.long c15:0x3f9--0x3f9
|
|
line.long 0x00 "PMCCNTSR,Performance Monitor Cycle Count Status Register"
|
|
bitfld.long 0x00 0.--2. " STATE ,Cycle counter state" "Reserved,Stop,Count,Reserved,Suspend,?..."
|
|
group.long c15:0x4f9--0x4f9
|
|
line.long 0x00 "PMRLDR,Performance Monitor Reload Register"
|
|
hexmask.long 0x00 0.--31. 1. " RLD ,Event counter reload value"
|
|
width 12.
|
|
group.long c15:0x5f9--0x5f9
|
|
line.long 0x00 "PMACTLR,Performance Monitor Auxiliary Control Register"
|
|
bitfld.long 0x00 30.--31. " CCNTOVA ,Cycle Counter Overflow Action" "No action,Halting Debug,Clock stop mfg,Clock skip mfg"
|
|
bitfld.long 0x00 14.--15. " EVC3OVA ,Event Counter 3 Overflow Action" "No action,Halting Debug,Clock stop mfg,Clock skip mfg"
|
|
bitfld.long 0x00 12.--13. " EVC2OVA ,Event Counter 2 Overflow Action" "No action,Halting Debug,Clock stop mfg,Clock skip mfg"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " EVC1OVA ,Event Counter 1 Overflow Action" "No action,Halting Debug,Clock stop mfg,Clock skip mfg"
|
|
bitfld.long 0x00 8.--9. " EVC0OVA ,Event Counter 0 Overflow Action" "No action,Halting Debug,Clock stop mfg,Clock skip mfg"
|
|
bitfld.long 0x00 0. " UEN ,User-mode Enable" "Disabled,Enabled"
|
|
width 12.
|
|
group.long c15:0xf--0xf
|
|
line.long 0x00 "LPM0EVTYPER,Local Performance Monitor 0 Event Type Register"
|
|
bitfld.long 0x00 31. " EN ,Eevents Sent to the PMU" "Not sent,Sent"
|
|
hexmask.long.byte 0x00 24.--30. 1. " GRP3SEL ,Group 3 Local Event Select[1-128]"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GRP2SEL ,Group 2 Local Event Select[1-256]"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GRP1SEL ,Group 1 Local Event Select[1-256]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GRP0SEL ,Group 0 Local Event Select[1-256]"
|
|
group.long c15:0x100f--0x100f
|
|
line.long 0x00 "LPM1EVTYPER,Local Performance Monitor 1 Event Type Register"
|
|
bitfld.long 0x00 31. " EN ,Eevents Sent to the PMU" "Not sent,Sent"
|
|
bitfld.long 0x00 24.--27. " GRP3SEL ,Group 3 Local Event Select[1-16]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. " GRP2SEL ,Group 2 Local Event Select[1-16]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " GRP1SEL ,Group 1 Local Event Select[1-16]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " GRP0SEL ,Group 0 Local Event Select[1-16]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long c15:0x200f--0x200f
|
|
line.long 0x00 "LPM2EVTYPER,Local Performance Monitor 2 Event Type Register"
|
|
bitfld.long 0x00 31. " EN ,Eevents Sent to the PMU" "Not sent,Sent"
|
|
hexmask.long.byte 0x00 24.--30. 1. " GRP3SEL ,Group 3 Local Event Select[1-128]"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GRP2SEL ,Group 2 Local Event Select[1-256]"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GRP1SEL ,Group 1 Local Event Select[1-256]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GRP0SEL ,Group 0 Local Event Select[1-256]"
|
|
group.long c15:0x302f--0x302f
|
|
line.long 0x00 "L2LPMEVTYPER,L2 Local Performance Monitor Event Type Register"
|
|
bitfld.long 0x00 31. " EN ,Eevents Sent to the PMU" "Not sent,Sent"
|
|
hexmask.long.byte 0x00 24.--30. 1. " GRP3SEL ,Group 3 Local Event Select[1-128]"
|
|
hexmask.long.byte 0x00 16.--23. 1. " GRP2SEL ,Group 2 Local Event Select[1-256]"
|
|
hexmask.long.byte 0x00 8.--15. 1. " GRP1SEL ,Group 1 Local Event Select[1-256]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GRP0SEL ,Group 0 Local Event Select[1-256]"
|
|
tree.end
|
|
width 12.
|
|
; --------------------------------------------------------------------------------
|
|
; DMA facilities
|
|
; --------------------------------------------------------------------------------
|
|
tree "DMA facilities"
|
|
group.long c15:0xb--0xb
|
|
line.long 0x0 "DMASELR ,DMA Select Register"
|
|
bitfld.long 0x00 0.--1. " CHS ,Channel Select" "Channel 0,Channel 1,Channel 2,Channel 3"
|
|
group.long c15:0x10b--0x10b
|
|
line.long 0x0 "DMACHNSACR ,DMA Channel Non-Secure Access Control Register"
|
|
bitfld.long 0x00 0. " NS ,Non-Secure" "Secure,Non-secure"
|
|
group.long c15:0x20b--0x20b
|
|
line.long 0x0 "DMACHCR ,DMA Channel Control Register"
|
|
bitfld.long 0x00 28.--31. " CHAW ,Channel Arbitration Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 26. " CBPE ,Control Block Parity Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " CHCRE ,Channel Complete Report Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SNPE ,Snoop Enable" "Not snooped ,Snooped"
|
|
bitfld.long 0x00 22.--23. " AB ,Auto-Barrier" "No barrier,Reserved,DMB auto-barrier,DSB auto-barrier"
|
|
bitfld.long 0x00 20.--21. " MBC ,Maximum Beat Count" "4 beats,8 beats,16 beats,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " ATYPE ,ATYPE" "Reserved,Strongly-ordered,Device,Device,Memory/non-cachable,Memory/non-cachable,Memory/cachable/copyback/write-allocate,Memory/cachable/copyback/write-allocate,Reserved,Reserved,Reserved,Reserved,Memory/cachable/write-through/no write-allocate,Memory/cachable/write-through/no write-allocate,Memory/cachable/copyback/no write-allocate,Memory/cachable/copyback/no write-allocate"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SDBRDE ,Stop on Data Block Read Decode Error" "Not stopped,Stopped"
|
|
bitfld.long 0x00 14. " SDBRSE ,Stop on Data Block Read Slave Error" "Not stopped,Stopped"
|
|
bitfld.long 0x00 13. " SDBWDE ,Stop on Data Block TCM Parity Error" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SDBWSE ,Stop on Data Block Write Slave Error" "Not stopped,Stopped"
|
|
bitfld.long 0x00 10. " SDBTCMPE ,Stop on Data TCM Parity Error" "Not stopped,Stopped"
|
|
bitfld.long 0x00 7. " DBRDERE ,Data Block Read Decode Error Report Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DBRSERE ,Data Block Read Slave Error Report Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DBWDERE ,Data Block Write Decode Error Report Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DBWSERE ,Data Block Write Slave Error Report Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DBTCMAERE ,Data Block TCM Access Error Report Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DBTCMPERE ,Data Block TCM Parity Error Report Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CBTCMAERE ,Control Block TCM Access Report Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CBTCMPERE ,Control Block TCM Parity Error Report Enable" "Disabled,Enabled"
|
|
width 12.
|
|
group.long c15:0x30b--0x30b
|
|
line.long 0x0 "DMACHSCBAR,DMA Channel Starting Control Block Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " CBADDR ,Control Block Address"
|
|
rgroup.long c15:0x100b--0x100b
|
|
line.long 0x0 "DMACHSR,DMA Channel Status Register"
|
|
bitfld.long 0x00 6. " OPTYPE ,Operation Type" "Copy,Initialize"
|
|
bitfld.long 0x00 5. " DIR ,Direction" "Inbound,Outbound"
|
|
bitfld.long 0x00 4. " COMPLETE ,Complete" "Error,No error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STOP ,Stopped" "Not stopped,Stopped"
|
|
bitfld.long 0x00 2. " SUSPEND ,Suspended" "Not suspended,Suspended"
|
|
bitfld.long 0x00 1. " RUN ,Running" "Not running,Running"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IDLE ,Idle" "Not stopped,Stopped"
|
|
width 12.
|
|
group.long c15:0x110b--0x110b
|
|
line.long 0x0 "DMACHESR,DMA Channel Error Status Register"
|
|
eventfld.long 0x00 7. " DBRDE ,Data Block Read Decode Error" "No error,Error"
|
|
eventfld.long 0x00 6. " DBRSE ,Data Block Read Slave Error" "No error,Error"
|
|
eventfld.long 0x00 5. " DBWDE ,Data Block Write Decode Error" "No error,Error"
|
|
eventfld.long 0x00 4. " DBWSE ,Data Block Write Slave Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 3. " DBTCMAE ,Data Block TCM Access Error" "No error,Error"
|
|
eventfld.long 0x00 2. " DBTCMPE ,Data Block TCM Parity Error" "No error,Error"
|
|
eventfld.long 0x00 1. " CBTCMAE ,Control Block TCM Access Error" "No error,Error"
|
|
eventfld.long 0x00 0. " CBTCMPE ,Control Block TCM Parity Error" "No error,Error"
|
|
rgroup.long c15:0x120b--0x120b
|
|
line.long 0x0 "DMACHCCBAR,DMA Channel Current Control Block Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " CBADDR ,Control Block Address"
|
|
rgroup.long c15:0x130b--0x130b
|
|
line.long 0x0 "DMACHDPR,DMA Channel Data Progress Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " TCMDBC ,TCM Data Block Count"
|
|
hexmask.long.word 0x00 0.--15. 1. " EDBC ,External Data Block Count"
|
|
rgroup.long c15:0x140b--0x140b
|
|
line.long 0x0 "DMACHRCR,DMA Channel Response Count Register"
|
|
hexmask.long 0x00 0.--26. 1. " RC ,Response Count"
|
|
tree.end
|
|
width 0xb
|
|
width 13.
|
|
tree "Debug Registers"
|
|
tree "Processor Identifier Registers"
|
|
rgroup.long c14:0x340++0x00
|
|
line.long 0x0 "DBGMIDR,Main ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
|
|
hexmask.long.byte 0x0 20.--23. 0x1 " VAR ,Variant"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " ARCH , Architecture" "Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,ARMv7"
|
|
hexmask.long.word 0x0 4.--15. 0x1 " PART ,Primary Part Number"
|
|
textline " "
|
|
hexmask.long.byte 0x0 0.--3. 0x1 " REV ,Revision Number"
|
|
rgroup.long c14:0x341++0x00
|
|
line.long 0x0 "DBGCTR,Cache Type Register"
|
|
bitfld.long 0x0 29.--31. " FORMAT ,Format" "Not ARMv7,Not ARMv7,Not ARMv7,Not ARMv7,ARMv7,Not ARMv7,Not ARMv7,Not ARMv7"
|
|
bitfld.long 0x0 24.--27. " MAXWB ,Maximum Write-Back Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
|
|
textline " "
|
|
bitfld.long 0x0 20.--23. " RGSIZE ,Reservation Granule Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
|
|
bitfld.long 0x0 16.--19. " DMINLINE ,D-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,ASID,Virtual,Physical"
|
|
bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
|
|
rgroup.long c14:0x342++0x00
|
|
line.long 0x0 "DBGTCMTR,Tighly-Coupled Memory Type Register"
|
|
bitfld.long 0x0 29.--31. " FORMAT ,Format" "ARMv6,ARMv6,ARMv6,ARMv6,Implementation,ARMv6,ARMv6,ARMv6"
|
|
bitfld.long 0x0 16.--19. " DBANKS ,Data Banks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x0 0.--3. " IBANKS ,Instruction Banks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long c14:0x343++0x00
|
|
line.long 0x0 "DBGTLBTR,TLB Type Register"
|
|
bitfld.long 0x0 0. " S ,Separate" "Unified,Separate"
|
|
rgroup.long c14:0x345++0x00
|
|
line.long 0x0 "DBGMPIDR,Multiprocessor ID Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " AFFL2 ,Affitniy Level 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " AFFL1 ,Affitniy Level 1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " AFFL0 ,Affitniy Level 0"
|
|
rgroup.long c14:0x348++0x00
|
|
line.long 0x0 "DBGID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 12.--15. " THUMB2EE ,Thumb-2EE State (J=1,T=1)" "Not supported,Supported/Not cleared,Supported/Cleared,?..."
|
|
bitfld.long 0x00 8.--11. " JAZELLE ,Jazelle State (J=1,T=0)" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " THUMB ,Thumb State" "Not supported,16bit Thumb,16bit Thumb+32bit B/BL,All Thumb,?..."
|
|
bitfld.long 0x00 0.--3. " ARM ,ARM State (J=0,T=0)" "Not supported,Supported,?..."
|
|
rgroup.long c14:0x349++0x00
|
|
line.long 0x0 "DBGID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x00 8.--11. " MPGM ,Micro-control Programmer's Model" "Not supported,Reserved,2-stack,3-stack,?..."
|
|
bitfld.long 0x00 4.--7. " SEC ,Security Extension" "Not supported,Supported,Above+NSACR[RFR],?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " BPGM ,Base Programmer's Model" "Not supported,Supported,?..."
|
|
rgroup.long c14:0x34a++0x00
|
|
line.long 0x0 "DBGID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " MDMMM ,MIcro-controller Debug Model - Memory-mapped" "Not supported,v1 supported,?..."
|
|
bitfld.long 0x00 16.--19. " TDMMM ,Trace Debug Model - Memory-mapped" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " TDMCP ,Trace Debug Model - CP-based" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " CDMMM ,Core Debug Model - Memory-mapped" "Not supported,Reserved,Reserved,Reserved,v7MM supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SDMCP ,Security Debug Model - CP-based" "Not supported,Reserved,Reserved,v6.1 supported,v7CP supported,?..."
|
|
bitfld.long 0x00 0.--3. " CDMCP ,Core Debug Model - CP-based" "Not supported,Reserved,v6 supported,v6.1 supported,v7CP supported,?..."
|
|
rgroup.long c14:0x34b++0x00
|
|
line.long 0x0 "DBGID_AFR0,Auxiliary Feature Register 0"
|
|
width 13.
|
|
rgroup.long c14:0x34c++0x00
|
|
line.long 0x0 "DBGID_MMFR0,Memory Model Feature Register 0"
|
|
bitfld.long 0x00 24.--27. " FCSE ,Fast Contex Switch Extension" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 20.--23. " AUX ,Auxiliary Registers" "Not supported,ACTRL,ACTRL/ADFSR/AIFSR,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TCMDMA ,Tightly-Coupled Memory and DMA" "Not supported,Implementation,ARMv6 TCM ,ARMv6 TCM and DMA,?..."
|
|
bitfld.long 0x00 12.--15. " ONSH ,Outer-Non-Shared" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " SHCC ,Shared Cache Coherence" "Not supported,Partial inner,Full inner,Full inner/outer,?..."
|
|
bitfld.long 0x00 4.--7. " PMSA ,Protected Memory System Architecture" "Not supported,Implementation,PMSAv6 supported,PMSAv7 supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture" "Not supported,Implementation,VMSAv6 supported,VMSAv7 supported,?..."
|
|
rgroup.long c14:0x34d++0x00
|
|
line.long 0x0 "DBGID_MMFR1,Memory Model Feature Register 1"
|
|
bitfld.long 0x00 28.--31. " BP ,Branch Predictor" "None, VA-to-PA (ASID/PID) or underlying memory, VA-to-PA (ASID) or underlying memory,Underlying memory,No flushing,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " L1TC ,L1 Test and Clean Ops" "Not supported,Legacy,Legacy,?..."
|
|
bitfld.long 0x00 20.--23. " L1UCALL ,L1 Unified Cache Maintenance All" "Not supported,Legacy,Legacy,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " L1HCALL ,L1 Harward Cache Maintenance All" "Not supported,Legacy,Legacy,Legacy,?..."
|
|
bitfld.long 0x00 12.--15. " L1UCSW ,L1 Unified Cache Maintenance by Set/Way" "Not supported,Legacy,Legacy,Legacy,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " L1HCSW ,L1 Harward Cache Maintenance by Set/Way" "Not supported,Legacy,Legacy,Legacy,?..."
|
|
bitfld.long 0x00 4.--7. " L1UCMVA ,L1 Unified Cache Maintenance by MVA" "Not supported,Legacy,Legacy,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " L1HCMVA ,L1 Harvard Cache Maintenance by MVA" "Not supported,Legacy,Legacy,?..."
|
|
rgroup.long c14:0x34e++0x00
|
|
line.long 0x0 "DBGID_MMFR2,Memory Model Feature Register 2"
|
|
bitfld.long 0x00 28.--31. " AFHU ,Access Flag HardwareUpdate" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " BAR ,Barrier Operations " "Not supported,DSB,DSB/DMB/ISB,?..."
|
|
bitfld.long 0x00 16.--19. " UTLB ,Unified TLB Maintenance " "Not supported,MVA and ALL,MVA/ALL/ASID,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " HTLB ,Harvard TLB Maintenance" "Not supported,MVA and ALL ,MVA/ALL/ASID,?..."
|
|
bitfld.long 0x00 8.--11. " L1HCRMVA ,L1 Harvard Cache Range Maintenance by MVA" "Not supported,Legacy,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " L1BPR ,L1 Background Prefetch Range" "Not supported,Legacy,?..."
|
|
bitfld.long 0x00 0.--3. " L1FPR ,L1 Foreground Prefetch Range" "Not supported,Legacy,?..."
|
|
rgroup.long c14:0x34f++0x00
|
|
line.long 0x0 "DBGID_MMFR3,Memory Model Feature Register 3"
|
|
bitfld.long 0x00 28.--31. " SS ,Supersections" "Supported,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not supported"
|
|
bitfld.long 0x00 8.--11. " MLBPMVAALL ,Multi-level Branch Predictor Maintenance by MVA/ALL" "Not supported,By ALL,By MVA/ALL,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MLCSW ,Multi-level Cache Maintenance by Set/Way" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " MLCMVALL ,Multi-level Cache Maintenance by MVA/ALL" "Not supported,Supported,?..."
|
|
width 13.
|
|
rgroup.long c14:0x350++0x00
|
|
line.long 0x0 "DBGID_ISAR0,Instruction Set Attributes Register 0"
|
|
bitfld.long 0x00 24.--27. " DIV ,Divide Instructions" "Not supported,SDIV/UDIV,?..."
|
|
bitfld.long 0x00 20.--23. " DBG ,Debug Instructions" "Not supported,BKPT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " CP ,Coprocessor Instructions" "Mandated,CDP/LDC/STC/MRC/MCR,CDPx/LDCx/STCx/MRCx/MCRx,CDPx/LDCx/STCx/MRCx/MCRx/MRRC/MCRR,CDPx/LDCx/STCx/MRCx/MCRx/MRRCx/MCRRx,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CMPB ,Compare-Branch Instructions" "Not supported,CZB,?..."
|
|
bitfld.long 0x00 8.--11. " BITFIELD ,Bit Field Instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " BITCOUNT ,Bit Count Instructions" "Not supported,CLZ,?..."
|
|
bitfld.long 0x00 0.--3. " ATOMIC ,Atomic Instructions" "Not supported,SWP/SWPB,?..."
|
|
rgroup.long c14:0x351++0x00
|
|
line.long 0x0 "DBGID_ISAR1,Instruction Set Attributes Register 1"
|
|
bitfld.long 0x00 28.--31. " JAZELLE ,Jazelle Instructions " "Not supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " INETWORK ,Internetworking Instructions" "Not supported,BX,BX/BLX/LDR,BX/BLX/LDR/ARM data processing ,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " IMM ,Immediate Instructions" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
|
|
bitfld.long 0x00 16.--19. " IT ,If/Then Instructions" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SZEXT ,Sign/Zero Extend Instructions" "Not supported,SXTB/SXTH/UXTB/UXTH,Full support,?..."
|
|
bitfld.long 0x00 8.--11. " EXC2 ,Exception Instructions 2" "Not supported,CPS/RFE/SRS,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " EXC1 ,Exception Instructions 1" "Not supported,LDM(2|3)/STM(2),?..."
|
|
bitfld.long 0x00 0.--3. " ENDIAN ,Endian Instructions" "Not supported,SETEND,?..."
|
|
width 13.
|
|
rgroup.long c14:0x352++0x00
|
|
line.long 0x0 "DBGID_ISAR2,Instruction Set Attributes Register 2"
|
|
bitfld.long 0x00 28.--31. " REVERSAL ,Reversal Instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
|
|
bitfld.long 0x00 24.--27. " PSRAR ,Program Status Register Instructions" "Not supported,MRS/MSR/exception ret,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " ADVUMULT ,Advanced Unsigned Multiply Instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMALL,?..."
|
|
bitfld.long 0x00 16.--19. " ADVSMULT ,Advanced Signed Multiply Instructions" "Not supported,SMULL/SMLAL,0010,Full,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MULTIPLY ,Multiply Instructions" "MUL,MUL/MLA,MUL/MLA/MLS,?..."
|
|
bitfld.long 0x00 8.--11. " MULTIPLE ,Load/Store Multiple Instructions" "Non-interruptible,Restartable,Continuable,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MEMHINT ,Memory Hint Instructions" "Not supported,PLD,Reserved,PLD/PLI,?..."
|
|
bitfld.long 0x00 0.--3. " LDST ,Load/Store Instructions" "Basic,LDRD/STRD,?..."
|
|
width 13.
|
|
rgroup.long c14:0x353++0x00
|
|
line.long 0x0 "DBGID_ISAR3,Instruction Set Attributes Register 3"
|
|
bitfld.long 0x00 28.--31. " THUMB2EE ,Thumb-2 Execution Environment" "Not supported,ENTERX/LEAVEX/null-check,?..."
|
|
bitfld.long 0x00 24.--27. " TRUENOP ,True NOR Instructions" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " TCPY ,Thumb CPY Instructions" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " TB ,Table Branch Instructions" "Not supported,TBB/TBH,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SYNCPRIM ,Synchronization Primitive Instructions" "Not supported,LDREX/STREX,Full support,?..."
|
|
bitfld.long 0x00 8.--11. " SVC ,SVC Instructions" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SIMD ,SIMD Instructions" "Not supported,SSAT/USAT,Reserved,Full support,?..."
|
|
bitfld.long 0x00 0.--3. " SAT ,Saturate Instructions" "Not supported,QADD/QSUB/QDADD/QDSUB,?..."
|
|
width 13.
|
|
rgroup.long c14:0x354++0x00
|
|
line.long 0x0 "DBGID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x00 24.--27. " PSRM ,Program Status Register Instructions" "Not supported,MRS/MSR/CPS,?..."
|
|
bitfld.long 0x00 20.--23. " SYNCPRIMFRAC ,Synchronization Primitive Fractional" "ISAR3[SYNCPRIM],Reserved,Reserved,Full support,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " BAR ,Barrier Instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
bitfld.long 0x00 12.--15. " SMI ,Secure Maonitor Instructions" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " BASEUPDATE ,Base Update Forms" "LDM/STM/PUSH/POP/RFE,Full,?..."
|
|
bitfld.long 0x00 4.--7. " SHIFT ,Shift Forms" "Basic,Basic/LSL,Reserved,Basic/LSL/immediate,Basic/LSL/immediate/registered,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " TFORM ,T-Form Instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRxT/LDRxxT/STRxT,?..."
|
|
rgroup.long c14:0x355++0x00
|
|
line.long 0x0 "DBGID_ISAR5,Instruction Set Attributes Register 5"
|
|
tree.end
|
|
width 15.
|
|
tree "Coresight Management Registers"
|
|
group.long c14:0x3c0++0x00
|
|
line.long 0x00 "DBGITCTLR,Debug Integration Mode Control Register"
|
|
bitfld.long 0x00 0. " IME ,Integration Mode Enable" "Disabled,Enabled"
|
|
width 15.
|
|
group.long c14:0x3e8++0x00
|
|
line.long 0x0 "DBGCLAIMSET,Debug Claim Tag Set Register"
|
|
bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Set"
|
|
bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Set"
|
|
bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Set"
|
|
bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Set"
|
|
bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Set"
|
|
bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Set"
|
|
bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Set"
|
|
group.long c14:0x3e9++0x00
|
|
line.long 0x0 "DBGCLAIMCLR,Debug Claim Tag Clear Register"
|
|
bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Cleared"
|
|
bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Cleared"
|
|
bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Cleared"
|
|
bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Cleared"
|
|
bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Cleared"
|
|
bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Cleared"
|
|
bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Cleared"
|
|
width 15.
|
|
rgroup.long c14:0x3ee++0x00
|
|
line.long 0x0 "DBGAUTHSTATUS,Debug Authentication Status Register"
|
|
bitfld.long 0x0 7. " SNIDI ,Secure Non-invasive Debug Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 6. " SNIDE ,Secure Non-invasive Debug Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " SIDI ,Secure Invasive Debug Implemented" "Not Implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SIDE ,Secure Invasive Debug Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " NSNIDI ,Non-secure Non-invasive Debug Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 2. " NSNIDE ,Non-secure Non-invasive Debug Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " NSIDI ,Non-secure Invasive Debug Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 0. " NSIDE ,Non-secure Invasive Debug Enable" "Disabled,Enabled"
|
|
width 15.
|
|
rgroup.long c14:0x3f3++0x00
|
|
line.long 0x0 "DBGDEVTYPE,Debug Device Type"
|
|
hexmask.long.byte 0x0 4.--7. 1. " ST ,Sub Type: Processor Core"
|
|
hexmask.long.byte 0x0 0.--3. 1. " MT ,Main Type: Debug Logic"
|
|
rgroup.long c14:0x3f8++0x00
|
|
line.long 0x0 "DBGPIDR0,Debug Peripherial ID0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PARTNO ,Part Number [7:0]"
|
|
rgroup.long c14:0x3f9++0x00
|
|
line.long 0x0 "DBGPIDR1,Debug Peripherial ID1"
|
|
hexmask.long.byte 0x0 4.--7. 1. " JEPIC ,JEP106 Identity Code [3:0]"
|
|
hexmask.long.byte 0x0 0.--3. 1. " PARTNO ,Part Number [11:8]"
|
|
rgroup.long c14:0x3fa++0x00
|
|
line.long 0x0 "DBGPIDR2,Debug Peripherial ID2"
|
|
hexmask.long.byte 0x0 4.--7. 1. " REV ,Revision"
|
|
bitfld.long 0x00 3. " JEPCODE ,JEPCODE" "Low,High"
|
|
hexmask.long.byte 0x0 0.--2. 1. " JEP106 ,JEP106 Identity Code [6:4]"
|
|
rgroup.long c14:0x3fb++0x00
|
|
line.long 0x0 "DBGPIDR3,Debug Peripherial ID3"
|
|
hexmask.long.byte 0x0 4.--7. 1. " REVAND ,RevAnd"
|
|
hexmask.long.byte 0x0 0.--3. 1. " CMOD ,Customer Modified"
|
|
rgroup.long c14:0x3f4++0x00
|
|
line.long 0x0 "DBGPIDR4,Debug Peripherial ID4"
|
|
bitfld.long 0x0 4.--7. " Count ,Number of 4KB Blocks Occupied" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
bitfld.long 0x0 0.--3. " JEPCC ,JEP106 Continuation Code" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
rgroup.long c14:0x3fc++0x00
|
|
line.long 0x0 "DBGCIDR0,Debug Component ID Register 0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PREAMB ,Preamble"
|
|
rgroup.long c14:0x3fd++0x00
|
|
line.long 0x0 "DBGCIDR1,Debug Component ID Register 1"
|
|
hexmask.long.byte 0x0 4.--7. 1. " CCLASS ,Component Class (CoreSight Component)"
|
|
hexmask.long.byte 0x0 0.--3. 1. " PREAMB ,Preamble"
|
|
rgroup.long c14:0x3fe++0x00
|
|
line.long 0x0 "DBGCIDR2,Debug Component ID Register 2"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PREAMB ,Preamble"
|
|
rgroup.long c14:0x3ff++0x00
|
|
line.long 0x0 "DBGCIDR3,Debug Component ID Register 3"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PREAMB ,Preamble"
|
|
tree.end
|
|
textline " "
|
|
width 13.
|
|
rgroup.long c14:0x00++0x00
|
|
line.long 0x0 "DBGDIDR,Debug ID Register"
|
|
bitfld.long 0x0 28.--31. " NWRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 24.--27. " NBRP ,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 20.--23. " NBRPCID ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " ARCH ,Debug Architecture Version" "Reserved,ARMv6,ARMv6.1,ARMv7/CP14,ARMv7/No CP14,?..."
|
|
bitfld.long 0x0 14. " SUHD_N ,Secure User Halting Debug - Not" "Supported,Not supported"
|
|
bitfld.long 0x0 13. " PCSR ,Program Counter Sample Register" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x0 12. " SEC ,Security Extensions implemented" "Not implemented,Implemented"
|
|
hexmask.long.byte 0x0 4.--7. 0x1 " VAR ,Implementation-defined Variant Number"
|
|
hexmask.long.byte 0x0 0.--3. 0x1 " REV ,Implementation-defined Revision Number"
|
|
group.long c14:0x1++0x00
|
|
line.long 0x0 "DBGDSCRint,Debug Status and Control Register(internal view)"
|
|
bitfld.long 0x0 30. " DTRRXF ,DTRRX Full" "Empty,Full"
|
|
bitfld.long 0x0 29. " DTRTXF ,DTRTX Full" "Empty,Full"
|
|
bitfld.long 0x0 27. " DTRRXFL ,DTRRX Full-Latched" "Empty,Full"
|
|
textline " "
|
|
bitfld.long 0x0 26. " DTRTXFL ,DTRTX Full-Latched" "Empty,Full"
|
|
bitfld.long 0x0 25. " PIPEADV ,Sticky Pipeline Advance" "No effect,Instruction retired"
|
|
width 13.
|
|
textline " "
|
|
bitfld.long 0x0 24. " ICL ,Instruction Complete-Latched" "Not completed,Completed"
|
|
bitfld.long 0x0 20.--21. " DTRAM ,DTR Access Mode" "Non-blocking,Stall,Fast,?..."
|
|
bitfld.long 0x0 19. " DEF ,Discard External Fault Exceptions" "Not discarded,Discarded"
|
|
textline " "
|
|
bitfld.long 0x0 18. " NS ,Non-secure World Status" "Secured,Not secured"
|
|
bitfld.long 0x0 17. " SPNIDDIS ,Secure Non-invasive Debug Disabled" "No,Yes"
|
|
bitfld.long 0x0 16. " SPIDDIS ,Secure Invasive Debug Disabled" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 15. " MDME ,Monitor Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " HDME ,Halting Debug Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 13. " ITRE ,Execute Instruction Transfer Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 12. " DCCUAD ,Debug Communication Channel User Access Disable" "No,Yes"
|
|
bitfld.long 0x0 11. " INTDIS ,Disable Interrupts" "No,Yes"
|
|
bitfld.long 0x0 10. " FDBGACK ,Force Debug Acknowledge" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 8. " UND ,Sticky Undefined Exception" "No exception,Exception"
|
|
bitfld.long 0x0 7. " EF ,External Fault" "Not occured,Occured"
|
|
bitfld.long 0x0 6. " PDA ,Sticky Precise Abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x0 2.--5. " MOE ,Method of Debug Entry" "Halt Request,Breakpoint,Imprecise Watchpoint,BKPT instruction,External debug,Vector catch,Reserved,Reserved,OS Unlock,Reserved,Precise Watchpoint,?..."
|
|
bitfld.long 0x0 1. " RESTARTED ,Core Restarted" "Not restarted,Restarted"
|
|
bitfld.long 0x0 0. " HALTED ,Core Halted" "Not halted,Halted"
|
|
rgroup.long c14:0x5++0x00
|
|
line.long 0x0 "DBGDTRRXint,Data Transfer Receive Register (internal)"
|
|
hexmask.long 0x00 0.--31. 1. " HSTRDATA ,Host -> target data"
|
|
wgroup.long c14:0x5++0x00
|
|
line.long 0x0 "DBGDTRTXint,Data Transfer Transmit Register (internal)"
|
|
hexmask.long 0x00 0.--31. 1. " TRHSDATA ,Host -> target data"
|
|
group.long c14:0x6++0x00
|
|
line.long 0x0 "DBGWFAR,Watchpoint Fault Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " INSTADDR ,Address of the watchpointed instruction"
|
|
width 13.
|
|
if ((data.long(c14:0x00)&0x01000)==0x00000)
|
|
group.long c14:0x7++0x00
|
|
line.long 0x0 "DBGVCR,Vector Catch Register"
|
|
bitfld.long 0x0 7. " VSFIQ ,Vector Catch Enable FIQ" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " VSIRQ ,Vector Catch Enable IRQ" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " VSDA ,Vector Catch Enable Data Abort" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " VSPA ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " VSSVC ,Vector Catch Enable SWI" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " VSUI ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " VSR ,Vector Catch Enable Reset" "Disabled,Enabled"
|
|
else
|
|
group.long c14:0x7++0x00
|
|
line.long 0x0 "DBGVCR,Vector Catch Register"
|
|
bitfld.long 0x0 31. " VNSFIQ ,Vector Catch Enable FIQ (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " VNSIRQ ,Vector Catch Enable IRQ (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " VNSDA ,Vector Catch Enable Data Abort (Non-secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 27. " VNSPA ,Vector Catch Enable Prefetch abort (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 26. " VNSSVC ,Vector Catch Enable SWI (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. " VNSUI ,Vector Catch Enable Undefined (Non-secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 15. " MVFIQ ,Vector Catch Enable FIQ (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " MVIRQ ,Vector Catch Enable IRQ (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " MVDA ,Vector Catch Enable Data Abort (Secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " MVPA ,Vector Catch Enable Prefetch Abort (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 10. " MVSMC ,Vector Catch Enable SMI (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 7. " VSFIQ ,Vector Catch Enable FIQ" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 6. " VSIRQ ,Vector Catch Enable IRQ" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " VSDA ,Vector Catch Enable Data Abort" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " VSPA ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " VSSVC ,Vector Catch Enable SWI" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " VSUI ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " VSR ,Vector Catch Enable Reset" "Disabled,Enabled"
|
|
endif
|
|
width 13.
|
|
group.long c14:0x09++0x00
|
|
line.long 0x00 "DBGECR,Debug Event Catch Register"
|
|
bitfld.long 0x00 0. " OSUNLCA ,OS Unlock Catch" "Disabled,Enabled"
|
|
group.long c14:0xa++0x00
|
|
line.long 0x00 "DBGDSCCR,Debug State Cache Control Register"
|
|
bitfld.long 0x00 2. " FWTN ,Not Write-Through" "Forced,Normal"
|
|
bitfld.long 0x00 1. " ICLEN ,ICLEN" "Low,High"
|
|
bitfld.long 0x00 0. " DCLEN ,Data and Unified Cache Linefill" "Disabled,Normal"
|
|
group.long c14:0xb++0x00
|
|
line.long 0x00 "DBGDSMCR,Debug State MMU Control Register"
|
|
bitfld.long 0x00 3. " ITMN ,ITMN" "Low,High"
|
|
bitfld.long 0x00 2. " DTMN ,DTMN" "Low,High"
|
|
bitfld.long 0x00 1. " ITLN ,ITLN" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DTLN ,DTLN" "Low,High"
|
|
width 13.
|
|
hgroup.long c14:0x20++0x00
|
|
hide.long 0x0 "DBGDTRRXext,Target -> Host Data Transfer Register(external)"
|
|
in
|
|
wgroup.long c14:0x21++0x00
|
|
line.long 0x00 "DBGITR,Instruction Transfer Register"
|
|
hexmask.long 0x00 0.--31. 1. " ARMINSTR ,ARM Instruction for the Processor in Debug State Execute"
|
|
rgroup.long c14:0x21++0x00
|
|
line.long 0x00 "DBGPCSR,Program Counter Sampling Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " PCSVALUE ,Program Counter Sample Value"
|
|
bitfld.long 0x00 0.--1. " MEANING ,Meaning of PC Sample value" "ARM,Thumb/ThumbEE,Implementation defined,?..."
|
|
width 13.
|
|
hgroup.long c14:0x22++0x00
|
|
hide.long 0x00 "DBGDSCRext,Debug Status/Control Register (external)"
|
|
in
|
|
hgroup.long c14:0x23++0x00
|
|
hide.long 0x00 "DBGDTRTXext,Data Transfer Transmit Register (external)"
|
|
in
|
|
width 13.
|
|
wgroup.long c14:0x24++0x00
|
|
line.long 0x00 "DBGDRCR,Debug Run Control Register"
|
|
bitfld.long 0x00 4. " CBIUR ,CBIUR" "Low,High"
|
|
bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance" "Not cleared,Cleared"
|
|
bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RESTART ,Restart Request" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " HALT ,Halt Request" "Not requested,Requested"
|
|
rgroup.long c14:0x80++0x00
|
|
line.long 0x0 "DBGDRAR,Debug ROM Address Register"
|
|
bitfld.long 0x0 0.--1. " VALID ,Debug ROM address valid" "Invalid,Reserved,Reserved,Valid"
|
|
hexmask.long 0x00 12.--31. 0x1000 " ROMADDR ,Bits[31:12] of the debug ROM physical address"
|
|
wgroup.long c14:0xc0++0x00
|
|
line.long 0x00 "DBGOSLAR,Debug Operating System Lock Access Register"
|
|
hexmask.long 0x00 0.--31. 1. " OSLOCKACC ,OS Lock Access"
|
|
rgroup.long c14:0xc1++0x00
|
|
line.long 0x00 "DBGOSLSR,Debug Operating System Lock Status Register"
|
|
bitfld.long 0x00 2. " 32BITACC ,32-Bit Access" "Not required,Required"
|
|
bitfld.long 0x00 1. " LOCKED ,Locked Bit" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LOCKIMP ,Lock Implemented Bit" "Not implemented,Implemented"
|
|
group.long c14:0xc2++0x00
|
|
line.long 0x00 "DBGOSSRR,Debug Operating System Save and Restore Register"
|
|
hexmask.long 0x00 0.--31. 1. " OSSAVRES ,OS Save and Restore"
|
|
group.long c14:0xc4++0x00
|
|
line.long 0x00 "DBGPRCR,Debug Device Power-Down and Reset Control Register"
|
|
bitfld.long 0x00 2. " HNDR ,Hold Internal Reset" "Not held,Held"
|
|
bitfld.long 0x00 1. " WRR ,Force Internal Reset" "Not forced,Forced"
|
|
bitfld.long 0x00 0. " NOPWRDWN ,No Power-Down" "DBGNOPWRDWN low,DBGNOPWRDWN high"
|
|
hgroup.long c14:0xc5++0x00
|
|
hide.long 0x00 "DBGPRSR,Device Power-Down and Reset Status Register"
|
|
in
|
|
rgroup.long c14:0x100++0x00
|
|
line.long 0x0 "DBGDSAR,Debug Self Address Offset Register"
|
|
bitfld.long 0x0 0.--1. " VALID ,Debug Self address valid" "Invalid,Reserved,Reserved,Valid"
|
|
hexmask.long 0x00 12.--31. 0x1000 " SELFADDR ,Bits[31:12] of the debug Self physical address"
|
|
hgroup.long c14:0x200++0x00
|
|
hide.long 0x00 "DBGDCWRITE,Data Cache Write"
|
|
hgroup.long c14:0x201++0x00
|
|
hide.long 0x00 "DBGICWRITE,Instruction Cache Write"
|
|
width 13.
|
|
group.long c14:0x204++0x00
|
|
line.long 0x00 "DBGABWR,Auxiliary Breakpoint/Watchpoint Register"
|
|
bitfld.long 0x00 4. " WPA ,Watchpoint Physical Address" "Virtual,Physical"
|
|
bitfld.long 0x00 3. " J ,J-state" "Low,High"
|
|
bitfld.long 0x00 2. " EJC ,J-state Compare Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " T ,T-state" "Low,High"
|
|
bitfld.long 0x00 0. " ETC ,T-state Compare Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 9.
|
|
tree "Breakpoint Registers"
|
|
group.long c14:0x40++0x00
|
|
line.long 0x0 "DBGBVR0 ,Breakpoint Value Register 0 "
|
|
hexmask.long 0x00 0.--31. 1. " BV0 ,Breakpoint value"
|
|
group.long c14:0x41++0x00
|
|
line.long 0x0 "DBGBVR1 ,Breakpoint Value Register 1 "
|
|
hexmask.long 0x00 0.--31. 1. " BV1 ,Breakpoint value"
|
|
group.long c14:0x42++0x00
|
|
line.long 0x0 "DBGBVR2 ,Breakpoint Value Register 2 "
|
|
hexmask.long 0x00 0.--31. 1. " BV2 ,Breakpoint value"
|
|
group.long c14:0x43++0x00
|
|
line.long 0x0 "DBGBVR3 ,Breakpoint Value Register 3 "
|
|
hexmask.long 0x00 0.--31. 1. " BV3 ,Breakpoint value"
|
|
group.long c14:0x50++0x00
|
|
line.long 0x0 "DBGBCR0 ,Breakpoint Control Register 0 "
|
|
hexmask.long.byte 0x0 24.--28. 1. " ADDRMSK ,Breakpoint address mask"
|
|
textline " "
|
|
bitfld.long 0x0 20.--22. " EVENTGEN ,Meaning of BVR" "Instruction Virtual Address Match,Linked Instruction Virtual Address Match,Unlinked Context ID,Linked Context ID,Instruction Virtual Address Mismatch,Linked Instruction Virtual Address Mismatch,?..."
|
|
textline " "
|
|
width 9.
|
|
bitfld.long 0x0 16.--19. " LBRPN ,Linked BRP number" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BYTEADDR3 ,Byte 3 address select" "Never,(BVR & 0xFFFFFFFC)+3"
|
|
bitfld.long 0x0 7. " BYTEADDR2 ,Byte 2 address select" "Never,(BVR & 0xFFFFFFFC)+2"
|
|
textline " "
|
|
bitfld.long 0x0 6. " BYTEADDR1 ,Byte 1 address select" "Never,(BVR & 0xFFFFFFFC)+1"
|
|
bitfld.long 0x0 5. " BYTEADDR0 ,Byte 0 address select" "Never,(BVR & 0xFFFFFFFC)+0"
|
|
textline " "
|
|
bitfld.long 0x0 1.--2. " PMC ,Supervisor access control" "USR/SYS/SVC,Privileged,USR,Any"
|
|
bitfld.long 0x0 0. " BRKENAB ,Breakpoint enable" "Disabled,Enabled"
|
|
group.long c14:0x51++0x00
|
|
line.long 0x0 "DBGBCR1 ,Breakpoint Control Register 1 "
|
|
hexmask.long.byte 0x0 24.--28. 1. " ADDRMSK ,Breakpoint address mask"
|
|
textline " "
|
|
bitfld.long 0x0 20.--22. " EVENTGEN ,Meaning of BVR" "Instruction Virtual Address Match,Linked Instruction Virtual Address Match,Unlinked Context ID,Linked Context ID,Instruction Virtual Address Mismatch,Linked Instruction Virtual Address Mismatch,?..."
|
|
textline " "
|
|
width 9.
|
|
bitfld.long 0x0 16.--19. " LBRPN ,Linked BRP number" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BYTEADDR3 ,Byte 3 address select" "Never,(BVR & 0xFFFFFFFC)+3"
|
|
bitfld.long 0x0 7. " BYTEADDR2 ,Byte 2 address select" "Never,(BVR & 0xFFFFFFFC)+2"
|
|
textline " "
|
|
bitfld.long 0x0 6. " BYTEADDR1 ,Byte 1 address select" "Never,(BVR & 0xFFFFFFFC)+1"
|
|
bitfld.long 0x0 5. " BYTEADDR0 ,Byte 0 address select" "Never,(BVR & 0xFFFFFFFC)+0"
|
|
textline " "
|
|
bitfld.long 0x0 1.--2. " PMC ,Supervisor access control" "USR/SYS/SVC,Privileged,USR,Any"
|
|
bitfld.long 0x0 0. " BRKENAB ,Breakpoint enable" "Disabled,Enabled"
|
|
group.long c14:0x52++0x00
|
|
line.long 0x0 "DBGBCR2 ,Breakpoint Control Register 2 "
|
|
hexmask.long.byte 0x0 24.--28. 1. " ADDRMSK ,Breakpoint address mask"
|
|
textline " "
|
|
bitfld.long 0x0 20.--22. " EVENTGEN ,Meaning of BVR" "Instruction Virtual Address Match,Linked Instruction Virtual Address Match,Unlinked Context ID,Linked Context ID,Instruction Virtual Address Mismatch,Linked Instruction Virtual Address Mismatch,?..."
|
|
textline " "
|
|
width 9.
|
|
bitfld.long 0x0 16.--19. " LBRPN ,Linked BRP number" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BYTEADDR3 ,Byte 3 address select" "Never,(BVR & 0xFFFFFFFC)+3"
|
|
bitfld.long 0x0 7. " BYTEADDR2 ,Byte 2 address select" "Never,(BVR & 0xFFFFFFFC)+2"
|
|
textline " "
|
|
bitfld.long 0x0 6. " BYTEADDR1 ,Byte 1 address select" "Never,(BVR & 0xFFFFFFFC)+1"
|
|
bitfld.long 0x0 5. " BYTEADDR0 ,Byte 0 address select" "Never,(BVR & 0xFFFFFFFC)+0"
|
|
textline " "
|
|
bitfld.long 0x0 1.--2. " PMC ,Supervisor access control" "USR/SYS/SVC,Privileged,USR,Any"
|
|
bitfld.long 0x0 0. " BRKENAB ,Breakpoint enable" "Disabled,Enabled"
|
|
group.long c14:0x53++0x00
|
|
line.long 0x0 "DBGBCR3 ,Breakpoint Control Register 3 "
|
|
hexmask.long.byte 0x0 24.--28. 1. " ADDRMSK ,Breakpoint address mask"
|
|
textline " "
|
|
bitfld.long 0x0 20.--22. " EVENTGEN ,Meaning of BVR" "Instruction Virtual Address Match,Linked Instruction Virtual Address Match,Unlinked Context ID,Linked Context ID,Instruction Virtual Address Mismatch,Linked Instruction Virtual Address Mismatch,?..."
|
|
textline " "
|
|
width 9.
|
|
bitfld.long 0x0 16.--19. " LBRPN ,Linked BRP number" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BYTEADDR3 ,Byte 3 address select" "Never,(BVR & 0xFFFFFFFC)+3"
|
|
bitfld.long 0x0 7. " BYTEADDR2 ,Byte 2 address select" "Never,(BVR & 0xFFFFFFFC)+2"
|
|
textline " "
|
|
bitfld.long 0x0 6. " BYTEADDR1 ,Byte 1 address select" "Never,(BVR & 0xFFFFFFFC)+1"
|
|
bitfld.long 0x0 5. " BYTEADDR0 ,Byte 0 address select" "Never,(BVR & 0xFFFFFFFC)+0"
|
|
textline " "
|
|
bitfld.long 0x0 1.--2. " PMC ,Supervisor access control" "USR/SYS/SVC,Privileged,USR,Any"
|
|
bitfld.long 0x0 0. " BRKENAB ,Breakpoint enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 9.
|
|
tree "Watchpoint Registers"
|
|
group.long c14:0x60++0x00
|
|
line.long 0x0 "DBGWVR0 ,Watchpoint Value Register 0 "
|
|
hexmask.long 0x0 2.--31. 1. " WV0 ,Watchpoint value bits"
|
|
group.long c14:0x61++0x00
|
|
line.long 0x0 "DBGWVR1 ,Watchpoint Value Register 1 "
|
|
hexmask.long 0x0 2.--31. 1. " WV1 ,Watchpoint value bits"
|
|
group.long c14:0x70++0x00
|
|
line.long 0x0 "DBGWCR0 ,Watchpoint Control Register 0 "
|
|
bitfld.long 0x0 28. " ADDRMSK ,Watchpoint address mask" "0,1"
|
|
bitfld.long 0x0 27. ",Watchpoint address mask" "0,1"
|
|
bitfld.long 0x0 26. ",Watchpoint address mask" "0,1"
|
|
bitfld.long 0x0 25. ",Watchpoint address mask" "0,1"
|
|
bitfld.long 0x0 24. ",Watchpoint address mask" "0,1"
|
|
bitfld.long 0x0 20. " ENLINK ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBPRN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 12. " BAS7 ,Byte 7 address select" "Never,(WVR[31:0] & 0xFFFFFFFC)+7"
|
|
bitfld.long 0x0 11. " BAS6 ,Byte 6 address select" "Never,(WVR[31:0] & 0xFFFFFFFC)+6"
|
|
textline " "
|
|
bitfld.long 0x0 10. " BAS5 ,Byte 5 address select" "Never,(WVR[31:0] & 0xFFFFFFFC)+5"
|
|
bitfld.long 0x0 9. " BAS4 ,Byte 4 address select" "Never,(WVR[31:0] & 0xFFFFFFFC)+4"
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS3 ,Byte 3 address select" "Never,(WVR[31:0] & 0xFFFFFFFC)+3"
|
|
bitfld.long 0x0 7. " BAS2 ,Byte 2 address select" "Never,(WVR[31:0] & 0xFFFFFFFC)+2"
|
|
textline " "
|
|
bitfld.long 0x0 6. " BAS1 ,Byte 1 address select" "Never,(WVR[31:0] & 0xFFFFFFFC)+1"
|
|
bitfld.long 0x0 5. " BAS0 ,Byte 0 address select" "Never,(WVR[31:0] & 0xFFFFFFFC)+0"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " LSAC ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PMC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WA ,Watchpoint enable" "Disabled,Enabled"
|
|
group.long c14:0x71++0x00
|
|
line.long 0x0 "DBGWCR1 ,Watchpoint Control Register 1 "
|
|
bitfld.long 0x0 28. " ADDRMSK ,Watchpoint address mask" "0,1"
|
|
bitfld.long 0x0 27. ",Watchpoint address mask" "0,1"
|
|
bitfld.long 0x0 26. ",Watchpoint address mask" "0,1"
|
|
bitfld.long 0x0 25. ",Watchpoint address mask" "0,1"
|
|
bitfld.long 0x0 24. ",Watchpoint address mask" "0,1"
|
|
bitfld.long 0x0 20. " ENLINK ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBPRN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 12. " BAS7 ,Byte 7 address select" "Never,(WVR[31:0] & 0xFFFFFFFC)+7"
|
|
bitfld.long 0x0 11. " BAS6 ,Byte 6 address select" "Never,(WVR[31:0] & 0xFFFFFFFC)+6"
|
|
textline " "
|
|
bitfld.long 0x0 10. " BAS5 ,Byte 5 address select" "Never,(WVR[31:0] & 0xFFFFFFFC)+5"
|
|
bitfld.long 0x0 9. " BAS4 ,Byte 4 address select" "Never,(WVR[31:0] & 0xFFFFFFFC)+4"
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS3 ,Byte 3 address select" "Never,(WVR[31:0] & 0xFFFFFFFC)+3"
|
|
bitfld.long 0x0 7. " BAS2 ,Byte 2 address select" "Never,(WVR[31:0] & 0xFFFFFFFC)+2"
|
|
textline " "
|
|
bitfld.long 0x0 6. " BAS1 ,Byte 1 address select" "Never,(WVR[31:0] & 0xFFFFFFFC)+1"
|
|
bitfld.long 0x0 5. " BAS0 ,Byte 0 address select" "Never,(WVR[31:0] & 0xFFFFFFFC)+0"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " LSAC ,Load/Store access control" "Reserved,Load,Store,Any"
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bitfld.long 0x0 1.--2. " PMC ,Privileged access control" "Reserved,Privileged,USR,Any"
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textline " "
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bitfld.long 0x0 0. " WA ,Watchpoint enable" "Disabled,Enabled"
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tree.end
|
|
width 0xb
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|
textline " "
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