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Gen4_R-Car_Trace32/2_Trunk/pers3fnxxx.per
woody d411edd9b4 add Trace32 File
2025-10-14 09:52:32 +09:00

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; --------------------------------------------------------------------------------
; @Title: S3FNXXX On-Chip Peripherals
; @Props: Released
; @Author: MPI, PSS
; @Changelog: 2011-08-04
; @Manufacturer: SAMSUNG - Samsung Semiconductor
; @Doc: 112284um_s3fn41f_rev10
; @Core: Cortex-M0
; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: pers3fnxxx.per 12528 2020-11-12 13:57:39Z bschroefel $
config 16. 8.
width 0xb
tree.close "Core Registers (Cortex-M0)"
AUTOINDENT.PUSH
AUTOINDENT.OFF
tree "System Control"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 0x8
if (CORENAME()=="CORTEXM1")
group.long 0x10++0x0b
line.long 0x00 "STCSR,SysTick Control and Status Register"
bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock"
textline " "
bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
line.long 0x04 "STRVR,SysTick Reload Value Register"
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
line.long 0x08 "STCVR,SysTick Current Value Register"
hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
else
group.long 0x10++0x0b
line.long 0x00 "STCSR,SysTick Control and Status Register"
bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock"
textline " "
bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
line.long 0x04 "STRVR,SysTick Reload Value Register"
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
line.long 0x08 "STCVR,SysTick Current Value Register"
hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
endif
if (CORENAME()=="CORTEXM1")
rgroup.long 0x1c++0x03
line.long 0x00 "STCR,SysTick Calibration Value Register"
bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1"
bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1"
textline " "
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known"
else
rgroup.long 0x1c++0x03
line.long 0x00 "STCR,SysTick Calibration Value Register"
bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented"
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
textline " "
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors"
endif
rgroup.long 0xd00++0x03
line.long 0x00 "CPUID,CPU ID Base Register"
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer code"
hexmask.long.byte 0x00 20.--23. 1. " VARIANT ,Implementation defined variant number"
textline " "
hexmask.long.byte 0x00 4.--15. 1. " PARTNO ,Number of processor within family"
hexmask.long.byte 0x00 0.--3. 1. " REVISION ,Implementation defined revision number"
group.long 0xd04++0x03
line.long 0x00 "ICSR,Interrupt Control State Register"
bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending"
bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending"
textline " "
bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending"
bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending"
textline " "
bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending"
bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service"
textline " "
bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt"
hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field"
textline " "
hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field"
if (CORENAME()=="CORTEXM0+")
group.long 0xd08++0x03
line.long 0x00 "VTOR,Vector Table Offset Register"
hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address"
else
textline " "
endif
group.long 0xd0c++0x03
line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register"
hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key"
bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian"
textline " "
bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset"
bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear"
group.long 0xd10++0x03
line.long 0x00 "SCR,System Control Register"
bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
textline " "
bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
rgroup.long 0xd14++0x03
line.long 0x00 "CCR,Configuration and Control Register"
bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned"
bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped"
group.long 0xd1c++0x0b
line.long 0x00 "SHPR2,System Handler Priority Register 2"
bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11"
line.long 0x04 "SHPR3,System Handler Priority Register 3"
bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11"
bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11"
line.long 0x08 "SHCSR,System Handler Control and State Register"
bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending"
if (CORENAME()=="CORTEXM0+")
hgroup.long 0x08++0x03
hide.long 0x00 "ACTLR,Auxiliary Control Register"
else
textline " "
endif
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Nested Vectored Interrupt Controller (NVIC)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 12.
tree "Interrupt Enable Registers"
group.long 0x100++0x03
line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
tree.end
tree "Interrupt Pending Registers"
group.long 0x200++0x03
line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
tree.end
width 6.
tree "Interrupt Priority Registers"
group.long 0x400++0x1F
line.long 0x00 "INT0,Interrupt Priority Register"
bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3"
bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3"
bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3"
bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3"
line.long 0x04 "INT1,Interrupt Priority Register"
bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3"
bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3"
bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3"
bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3"
line.long 0x08 "INT2,Interrupt Priority Register"
bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3"
bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3"
bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3"
bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3"
line.long 0x0C "INT3,Interrupt Priority Register"
bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3"
bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3"
bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3"
bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3"
line.long 0x10 "INT4,Interrupt Priority Register"
bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3"
bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3"
bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3"
bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3"
line.long 0x14 "INT5,Interrupt Priority Register"
bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3"
bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3"
bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3"
bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3"
line.long 0x18 "INT6,Interrupt Priority Register"
bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3"
bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3"
bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3"
bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3"
line.long 0x1C "INT7,Interrupt Priority Register"
bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3"
bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3"
bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3"
bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3"
tree.end
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Debug"
tree "Core Debug"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 0xA
group.long 0xD30++0x03
line.long 0x00 "DFSR,Data Fault Status Register"
eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred"
eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred"
textline " "
eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match"
textline " "
eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match"
eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request"
if (CORENAME()=="CORTEXM1")
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
group.long 0xDF0++0x03
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
textline " "
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
textline " "
textline " "
textfld " "
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
else
group.long 0xDF0++0x03
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
textline " "
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
textline " "
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
textline " "
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
endif
else
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
group.long 0xDF0++0x03
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
textline " "
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
textline " "
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
textline " "
textline " "
textfld " "
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
else
group.long 0xDF0++0x03
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
textline " "
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
textline " "
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
textline " "
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
textline " "
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
textline " "
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
endif
endif
wgroup.long 0xDF4++0x03
line.long 0x00 "DCRSR,Debug Core Selector Register"
bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write"
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..."
group.long 0xDF8++0x07
line.long 0x00 "DCRDR,Debug Core Register Data Register"
hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor"
line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register"
bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled"
bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error"
textline " "
bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Breakpoint Unit (BPU)"
sif COMPonent.AVAILABLE("BPU")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1))
width 8.
group.long 0x00++0x03
line.long 0x00 "BP_CTRL,Breakpoint Control Register"
bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 1. " KEY ,Key field" "No write,Write"
bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0"
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled"
group.long 0xC++0x03
line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1"
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2"
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled"
group.long 0x14++0x03
line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3"
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled"
else
newline
textline "BPU component base address not specified"
newline
endif
tree.end
tree "Data Watchpoint and Trace Unit (DWT)"
sif COMPonent.AVAILABLE("DWT")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
width 14.
rgroup.long 0x00++0x03
line.long 0x00 "DW_CTRL,DW Control Register "
bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x1c++0x03
line.long 0x00 "DW_PCSR,DW Program Counter Sample Register"
hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF"
group.long 0x20++0x0b
line.long 0x00 "DW_COMP0,DW Comparator Register 0"
hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address"
line.long 0x04 "DW_MASK0,DW Mask Register 0"
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
line.long 0x08 "DW_FUNCTION0,DW Function Register 0"
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
group.long 0x30++0x0b
line.long 0x00 "DW_COMP1,DW Comparator Register 1"
hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address"
line.long 0x04 "DW_MASK1,DW Mask Register 1 "
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
line.long 0x08 "DW_FUNCTION1,DW Function Register 1"
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
else
newline
textline "DWT component base address not specified"
newline
endif
tree.end
tree.end
AUTOINDENT.POP
tree.end
tree "Analog to Digital Converter (ADC)"
base ad:0x40040000
width 11.
rgroup.long 0x000++0x03
line.long 0x00 "ADC_IDR,ADC ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE[25:0] ,ID Code Register"
group.long 0x004++0x03
line.long 0x00 "ADC_CEDR,ADC Clock Enable/Disable Register"
bitfld.long 0x00 31. " DBGEN ,Debug enable" "Disabled,Enabled"
bitfld.long 0x00 0. " CLKEN ,Debug mode enable" "Disabled,Enabled"
wgroup.long 0x008++0x1B
line.long 0x00 "ADC_SRR,ADC Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
line.long 0x04 "ADC_CSR,ADC Control Set Register"
bitfld.long 0x04 1. " START ,ADC Conversion Start" "No effect,Start"
bitfld.long 0x04 0. " ADCEN ,ADC Enable" "No effect,Enable"
line.long 0x08 "ADC_CCR,ADC Control Clear Register"
bitfld.long 0x08 0. " ADCEN ,ADC Disable Control" "No effect,Disable"
group.long 0x014++0x07
line.long 0x00 "ADC_CDR,ADC Clock Divider Register"
bitfld.long 0x00 0.--4. " CDIV ,ADC Clock Divider Selection Field" "3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,48,64"
line.long 0x04 "ADC_MR,ADC Mode Register"
bitfld.long 0x04 26. " EICR ,Calibration Reference Voltage Source" "External,Internal"
bitfld.long 0x04 25. " ICRV ,Internal Calibration Reference (Voltage) Value" "1/4,3/4"
bitfld.long 0x04 24. " CALEN ,Calibration Enable/Disable Control" "Disabled,Enabled"
textline " "
bitfld.long 0x04 5.--7. " TRIG[2:0] ,ADC Start Trigger Signal Selection" "Software,ADTRG-Rising,ADTRG-Falling,ADTRG-Both,TCx,IMC0,?..."
bitfld.long 0x04 0.--3. " CCSEL ,Conversion Channel Selection Field" "AIN1 with OPAMP,AIN1 without OPAMP,AIN2,AIN3,AIN4,AIN5,AIN6,AIN7,AIN8,AIN9,AIN10,?..."
rgroup.long 0x01c++0x03
line.long 0x00 "ADC_SR,ADC Status Register"
bitfld.long 0x00 1. " BUSY ,ADC Status monitoring" "Idle,Busy"
bitfld.long 0x00 0. " ADCSTABLE ,ADC Stabilization Status" "Not stabilized,Stabilized"
group.long 0x020++0x03
line.long 0x00 "ADC_IMSCR,ADC Interrupt Mask Set/Clear Register"
bitfld.long 0x00 1. " OVR ,Overrun Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 0. " EOC ,End of Conversion Interrupt Mask" "Masked,Not masked"
rgroup.long 0x024++0x07
line.long 0x00 "ADC_RISR,ADC Raw Interrupt Status Register"
bitfld.long 0x00 1. " OVR ,Overrun Raw Interrupt Status" "No interrupt,Interrupt"
bitfld.long 0x00 0. " EOC ,End of Conversion Raw Interrupt Status" "No interrupt,Interrupt"
line.long 0x04 "ADC_MISR,ADC Masked Interrupt Status Register"
bitfld.long 0x04 1. " OVR ,Overrun Masked Interrupt State" "No interrupt,Interrupt"
bitfld.long 0x04 0. " EOC ,End of Conversion Masked Interrupt State" "No interrupt,Interrupt"
wgroup.long 0x02c++0x03
line.long 0x00 "ADC_ICR,ADC Interrupt Clear Register"
bitfld.long 0x00 1. " OVR ,Overrun interrupt" "No effect,Clear"
bitfld.long 0x00 0. " EOC ,End of conversion interrupt" "No effect,Clear"
hgroup.long 0x030++0x03
hide.long 0x00 "ADC_CRR,ADC Conversion Result Register"
in
group.long 0x034++0x1B
line.long 0x00 "ADC_GCR,ADC Gain Calibration Register"
bitfld.long 0x00 14. " GCC_INT ,ADC Gain Calibration Constant Value" "0,1"
hexmask.long.word 0x00 0.--13. 1. " GCC_FRAC ,ADC Gain Calibration Constant Value"
line.long 0x04 "ADC_OCR,ADC Offset Calibration Register"
hexmask.long.word 0x04 0.--13. 1. " ADCOCC ,ADC Offset Calibration Constant Value"
line.long 0x08 "ADC_DMACR,ADC DMA Control Register"
bitfld.long 0x08 0. " DMAE ,DMA for ADC Enable/Disable Control" "Disabled,Enabled"
width 0xb
tree.end
tree "Controller Area Network (CAN)"
base ad:0x400E0000
width 11.
group.long 0x058++0x3
line.long 0x00 "CAN_PMSR,CAN Power Manager Status Register"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN_set/clr ,Debug mode status" "Disabled,Enabled"
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CAN_set/clr ,CAN clock status" "Disabled,Enabled"
wgroup.long 0x060++0x3
line.long 0x00 "CAN_CR,CAN Control Register"
bitfld.long 0x00 10. " STSR ,Store shift register" "No effect,Shift"
bitfld.long 0x00 9. " ABBTX ,Abort basic transmission" "No effect,Abort"
bitfld.long 0x00 8. " RQBTX ,Request basic transmission" "No effect,Request"
textline " "
bitfld.long 0x00 4. " CCDIS ,Configuration change disable" "No effect,Disable"
bitfld.long 0x00 3. " CCEN ,Configuration change enable" "No effect,Enable"
bitfld.long 0x00 2. " CANDIS ,CAN disable" "No effect,Disable"
textline " "
bitfld.long 0x00 1. " CANEN ,CAN enable" "No effect,Enable"
bitfld.long 0x00 0. " SWRST ,CAN software reset" "No effect,Reset"
group.long 0x064++0x3
line.long 0x00 "CAN_MR,CAN Mode Register"
bitfld.long 0x00 20.--22. " PHSEG2 ,Phase segment 2 value" "1,2,3,4,5,6,7,8"
bitfld.long 0x00 16.--19. " PHSEG1 ,Phase segment 1 value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 14. " AR ,Automatic retransmission" "Disabled,Enabled"
textline " "
bitfld.long 0x00 12.--13. " SJW ,Synchronization jump width" "0,1,2,3"
bitfld.long 0x00 10. " CSSEL ,CAN Clock(CANCLK) Source Selection" "PCLK,EMCLK"
hexmask.long.word 0x00 0.--9. 1. " BD ,Baud rate pre-scalar"
group.long 0x06c++0x3
line.long 0x00 "CAN_CSR,CAN Clear Status Register"
bitfld.long 0x00 15. " CRC ,Clear CRC error" "No effect,Clear"
bitfld.long 0x00 14. " BIT0 ,Clear bit to zero error" "No effect,Clear"
bitfld.long 0x00 13. " BIT1 ,Clear bit to one error" "No effect,Clear"
textline " "
bitfld.long 0x00 12. " ACK ,Clear acknowledge error" "No effect,Clear"
bitfld.long 0x00 11. " FORM ,Clear form error" "No effect,Clear"
bitfld.long 0x00 10. " STUFF ,Clear stuff error" "No effect,Clear"
textline " "
bitfld.long 0x00 9. " TXOK ,Clear successfully transmit message" "No effect,Clear"
bitfld.long 0x00 8. " RXOK ,Clear successfully received message" "No effect,Clear"
bitfld.long 0x00 4. " ACTVT ,Clear activity" "No effect,Clear"
textline " "
bitfld.long 0x00 3. " BUSOFFTR ,Clear bus off transition" "No effect,Clear"
bitfld.long 0x00 2. " ERPASSTR ,Clear error passive transition" "No effect,Clear"
bitfld.long 0x00 1. " ERWARNTR ,Clear error passive warning transition" "No effect,Clear"
rgroup.long 0x070++0x3
line.long 0x00 "CAN_SR,CAN Status Register"
bitfld.long 0x00 25. " BTXPD ,Basic transmission pending" "Not pending,Pending"
bitfld.long 0x00 24. " CCENS ,Configuration change enable" "Disabled,Enabled"
bitfld.long 0x00 22.--23. " TS/RS ,Transmit status" "Idle,Receive mode,Transmit mode,Lost arbitration"
textline " "
bitfld.long 0x00 21. " BUSY1 ,Busy flag of interface 1" "Idle,Busy"
bitfld.long 0x00 20. " BUSY0 ,Busy flag of interface 0" "Idle,Busy"
bitfld.long 0x00 19. " BUSOFF ,Bus off" "Disabled,Enabled"
textline " "
bitfld.long 0x00 18. " ERPASS ,Error passive" "Disabled,Enabled"
bitfld.long 0x00 17. " ERWARN ,Error passive warning" "No error,Error"
bitfld.long 0x00 16. " CANENS ,CAN enable status" "Disabled,Enabled"
textline " "
bitfld.long 0x00 15. " CRC ,CRC error" "No error,Error"
bitfld.long 0x00 14. " BIT0 ,Bit to zero error" "No error,Error"
bitfld.long 0x00 13. " BIT1 ,Bit to one error" "No error,Error"
textline " "
bitfld.long 0x00 12. " ACK ,Acknowledge error" "No error,Error"
bitfld.long 0x00 11. " FORM ,Form error" "No error,Error"
bitfld.long 0x00 10. " STUFF ,Stuff error" "No error,Error"
textline " "
bitfld.long 0x00 9. " TXOK ,Successfully transmitted a message" "Not transmitted,Transmitted"
bitfld.long 0x00 8. " RXOK ,Successfully received a message" "Not received,Received"
bitfld.long 0x00 4. " ACTVT ,Activity" "No activity,Activity"
textline " "
bitfld.long 0x00 3. " BUSOFFTR ,Bus off transition" "No transition,Transition"
bitfld.long 0x00 2. " ERPASSTR ,Error passive transition" "No transition,Transition"
bitfld.long 0x00 1. " ERWARNTR ,Error passive warning transition" "No transition,Transition"
textline " "
bitfld.long 0x00 0. " ISS ,Interrupt source status" "No interrupt,Interrupt"
group.long 0x07c++0x3
line.long 0x00 "CAN_IMR,CAN Interrupt Mask Register"
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " CRC ,CRC error mask" "Disabled,Enabled"
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " BIT0 ,Bit to zero error mask" "Disabled,Enabled"
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " BIT1 ,Bit to one error mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " ACK ,Acknowledge error mask" "Disabled,Enabled"
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " FORM ,Form error mask" "Disabled,Enabled"
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " STUFF ,Stuff error mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXOK ,Successfully transmitted a message mask" "Disabled,Enabled"
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " RXOK ,Successfully received a message mask" "Disabled,Enabled"
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ACTVT ,Activity mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " BUSOFFTR ,Bus off mask" "Disabled,Enabled"
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " ERPASSTR ,Error passive mask" "Disabled,Enabled"
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " ERWARNTR ,Error passive warning mask" "Disabled,Enabled"
rgroup.long 0x084++0x3
line.long 0x00 "CAN_ISSR,CAN Interrupt Source Status Register"
bitfld.long 0x00 31. " CH32 ,Channel 32 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 30. " CH31 ,Channel 31 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 29. " CH30 ,Channel 30 interrupt" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 28. " CH29 ,Channel 29 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 27. " CH28 ,Channel 28 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 26. " CH27 ,Channel 27 interrupt" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 25. " CH26 ,Channel 26 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 24. " CH25 ,Channel 25 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 23. " CH24 ,Channel 24 interrupt" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 22. " CH23 ,Channel 23 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 21. " CH22 ,Channel 22 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 20. " CH21 ,Channel 21 interrupt" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 19. " CH20 ,Channel 20 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 18. " CH19 ,Channel 19 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 17. " CH18 ,Channel 18 interrupt" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 16. " CH17 ,Channel 17 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 15. " CH16 ,Channel 16 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 14. " CH15 ,Channel 15 interrupt" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 13. " CH14 ,Channel 14 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 12. " CH13 ,Channel 13 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 11. " CH12 ,Channel 12 interrupt" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 10. " CH11 ,Channel 11 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 9. " CH10 ,Channel 10 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 8. " CH9 ,Channel 9 interrupt" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 7. " CH8 ,Channel 8 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 6. " CH7 ,Channel 7 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 5. " CH6 ,Channel 6 interrupt" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 4. " CH5 ,Channel 5 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 3. " CH4 ,Channel 4 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 2. " CH3 ,Channel 3 interrupt" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 1. " CH2 ,Channel 2 interrupt" "Not occurred,Occurred"
bitfld.long 0x00 0. " CH1 ,Channel 1 interrupt" "Not occurred,Occurred"
group.long 0x090++0x3
line.long 0x00 "CAN_SIMR,CAN Source Interrupt Mask Register"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " CH32 ,Channel 32 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " CH31 ,Channel 31 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " CH30 ,Channel 30 interrupt mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " CH29 ,Channel 29 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " CH28 ,Channel 28 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " CH27 ,Channel 27 interrupt mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " CH26 ,Channel 26 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " CH25 ,Channel 25 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " CH24 ,Channel 24 interrupt mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " CH23 ,Channel 23 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " CH22 ,Channel 22 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " CH21 ,Channel 21 interrupt mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " CH20 ,Channel 20 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " CH19 ,Channel 19 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CH18 ,Channel 18 interrupt mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " CH17 ,Channel 17 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " CH16 ,Channel 16 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " CH15 ,Channel 15 interrupt mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " CH14 ,Channel 14 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " CH13 ,Channel 13 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " CH12 ,Channel 12 interrupt mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " CH11 ,Channel 11 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " CH10 ,Channel 10 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " CH9 ,Channel 9 interrupt mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " CH8 ,Channel 8 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " CH7 ,Channel 7 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " CH6 ,Channel 6 interrupt mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CH5 ,Channel 5 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CH4 ,Channel 4 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CH3 ,Channel 3 interrupt mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CH2 ,Channel 2 interrupt mask" "Disabled,Enabled"
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CH1 ,Channel 1 interrupt mask" "Disabled,Enabled"
rgroup.long 0x094++0x3
line.long 0x00 "CAN_HPIR,CAN Highest Priority Interrupt Register"
hexmask.long.word 0x00 0.--15. 1. " INTID ,Channel X interrupt mask"
rgroup.long 0x098++0x3
line.long 0x00 "CAN_ERCR,CAN Error Counter Register"
hexmask.long.byte 0x00 8.--15. 1. " TEC ,Transmit error counter"
bitfld.long 0x00 7. " REP ,Receive Error Passive" "Below,Reached"
hexmask.long.byte 0x00 0.--6. 1. " REC ,Reception error counter"
group.long 0x100++0x3
line.long 0x00 "CAN_TMR0,CAN Interface 0 Transfer Management Register"
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending" "Unchanged,Cleared"
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Cleared"
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transfer"
textline " "
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transfer"
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transfer"
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transfer"
textline " "
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transfer"
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
hexmask.long.byte 0x00 0.--5. 1. " NUMBER ,Message number"
group.long 0x104++0x3
line.long 0x00 "CAN_DAR0,CAN Interface 0 Data A Register"
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,Data3 of interface"
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,Data2 of interface"
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,Data1 of interface"
textline " "
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,Data0 of interface"
group.long 0x108++0x3
line.long 0x00 "CAN_DBR0,CAN Interface 0 Data B Register"
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,Data3 of interface"
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,Data2 of interface"
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,Data1 of interface"
textline " "
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,Data0 of interface"
if (((d.l(ad:0x400E0000+0x110))&0x40000000)==0x40000000)
group.long 0x10c++0x3
line.long 0x00 "CAN_MSKR0,CAN Interface 0 Mask Register"
bitfld.long 0x00 31. " MXTD ,XTD bit mask" "Not masked,Masked"
bitfld.long 0x00 30. " MMDIR ,Message direction mask" "No effect,Used"
hexmask.long.word 0x00 18.--28. 1. " BASEMASK ,Base identifier mask"
textline " "
hexmask.long.tbyte 0x00 0.--17. 1. " EXTMASK ,Extended identifier mask"
else
group.long 0x10c++0x3
line.long 0x00 "CAN_MSKR0,CAN Interface 0 Mask Register"
bitfld.long 0x00 31. " MXTD ,XTD bit mask" "Not masked,Masked"
bitfld.long 0x00 30. " MMDIR ,Message direction mask" "No effect,Used"
hexmask.long.word 0x00 18.--28. 1. " BASEMASK ,Base identifier mask"
endif
if (((d.l(ad:0x400E0000+0x110))&0x40000000)==0x40000000)
group.long 0x110++0x3
line.long 0x00 "CAN_IR0,CAN Interface 0 Identifier Register"
bitfld.long 0x00 31. " MSGVAL ,Message Valid" "Ignored,Configured"
bitfld.long 0x00 30. " XTD ,Extended identifier" "11-bit,29-bit"
bitfld.long 0x00 29. " MDIR ,Message direction" "Receive,Transmit"
textline " "
hexmask.long.word 0x00 18.--28. 1. " BASEID ,Base identifier of interface X"
hexmask.long.tbyte 0x00 0.--17. 1. " EXTID ,Extended identifier of interface X"
else
group.long 0x110++0x3
line.long 0x00 "CAN_IR0,CAN Interface 0 Identifier Register"
bitfld.long 0x00 31. " MSGVAL ,Message Valid" "Ignored,Configured"
bitfld.long 0x00 30. " XTD ,Extended identifier" "11-bit,29-bit"
bitfld.long 0x00 29. " MDIR ,Message direction" "Receive,Transmit"
textline " "
hexmask.long.word 0x00 18.--28. 1. " BASEID ,Base identifier of interface X"
endif
group.long 0x114++0x3
line.long 0x00 "CAN_MCR0,CAN Interface 0 Message Control Register"
bitfld.long 0x00 15. " NEWDAT ,New data" "No,Yes"
bitfld.long 0x00 14. " MSGLST ,Message lost" "No,Yes"
bitfld.long 0x00 13. " ITPND ,Interrupt pending" "Not source,Source"
textline " "
bitfld.long 0x00 12. " UMASK ,Use acceptance mask" "Ignored,Used"
bitfld.long 0x00 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
bitfld.long 0x00 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
textline " "
bitfld.long 0x00 9. " RMTEN ,Remote enable" "Left,Set"
bitfld.long 0x00 8. " TXRQST ,Transmit request" "Not waiting,Requested"
bitfld.long 0x00 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
textline " "
bitfld.long 0x00 0.--3. " DLC ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
rgroup.long 0x118++0x3
line.long 0x00 "CAN_STPR0,CAN Interface 0 Stamp Register"
group.long 0x120++0x3
line.long 0x00 "CAN_TMR1,CAN Interface 1 Transfer Management Register"
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending" "Unchanged,Cleared"
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Cleared"
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transfer"
textline " "
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transfer"
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transfer"
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transfer"
textline " "
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transfer"
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
hexmask.long.byte 0x00 0.--5. 1. " NUMBER ,Message number"
group.long 0x124++0x3
line.long 0x00 "CAN_DAR1,CAN Interface 1 Data A Register"
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,Data3 of interface"
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,Data2 of interface"
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,Data1 of interface"
textline " "
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,Data0 of interface"
group.long 0x128++0x3
line.long 0x00 "CAN_DBR1,CAN Interface 1 Data B Register"
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,Data3 of interface"
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,Data2 of interface"
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,Data1 of interface"
textline " "
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,Data0 of interface"
if (((d.l(ad:0x400E0000+0x130))&0x40000000)==0x40000000)
group.long 0x12c++0x3
line.long 0x00 "CAN_MSKR1,CAN Interface X Mask Register 1"
bitfld.long 0x00 31. " MXTD ,XTD bit mask" "No effect,Used"
bitfld.long 0x00 30. " MMDIR ,Message direction mask" "Not masked,Masked"
hexmask.long.word 0x00 18.--28. 1. " BASEMASK ,Base identifier mask"
textline " "
hexmask.long.tbyte 0x00 0.--17. 1. " EXTMASK ,Extended identifier mask"
else
group.long 0x12c++0x3
line.long 0x00 "CAN_MSKR1,CAN Interface X Mask Register 1"
bitfld.long 0x00 31. " MXTD ,XTD bit mask" "Not masked,Masked"
bitfld.long 0x00 30. " MMDIR ,Message direction mask" "No effect,Used"
hexmask.long.word 0x00 18.--28. 1. " BASEMASK ,Base identifier mask"
endif
if (((d.l(ad:0x400E0000+0x130))&0x40000000)==0x40000000)
group.long 0x130++0x3
line.long 0x00 "CAN_IR1,CAN Interface 1 Identifier Register"
bitfld.long 0x00 31. " MSGVAL ,Message Valid" "Ignored,Configured"
bitfld.long 0x00 30. " XTD ,Extended identifier" "11-bit,29-bit"
bitfld.long 0x00 29. " MDIR ,Message direction" "Receive,Transmit"
textline " "
hexmask.long.word 0x00 18.--28. 1. " BASEID ,Base identifier of interface X"
hexmask.long.tbyte 0x00 0.--17. 1. " EXTID ,Extended identifier of interface X"
else
group.long 0x130++0x3
line.long 0x00 "CAN_IR1,CAN Interface 1 Identifier Register"
bitfld.long 0x00 31. " MSGVAL ,Message Valid" "Ignored,Configured"
bitfld.long 0x00 30. " XTD ,Extended identifier" "11-bit,29-bit"
bitfld.long 0x00 29. " MDIR ,Message direction" "Receive,Transmit"
textline " "
hexmask.long.word 0x00 18.--28. 1. " BASEID ,Base identifier of interface X"
endif
group.long 0x134++0x3
line.long 0x00 "CAN_MCR1,CAN Interface 1 Message Control Register"
bitfld.long 0x00 15. " NEWDAT ,New data" "No,Yes"
bitfld.long 0x00 14. " MSGLST ,Message lost" "No,Yes"
bitfld.long 0x00 13. " ITPND ,Interrupt pending" "Not source,Source"
textline " "
bitfld.long 0x00 12. " UMASK ,Use acceptance mask" "Ignored,Used"
bitfld.long 0x00 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
bitfld.long 0x00 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
textline " "
bitfld.long 0x00 9. " RMTEN ,Remote enable" "Left,Set"
bitfld.long 0x00 8. " TXRQST ,Transmit request" "Not waiting,Requested"
bitfld.long 0x00 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
textline " "
bitfld.long 0x00 0.--3. " DLC ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
rgroup.long 0x138++0x3
line.long 0x00 "CAN_STPR1,CAN Interface 1 Stamp Register"
rgroup.long 0x140++0x3
line.long 0x00 "CAN_TRR,CAN Transmission Request Register"
bitfld.long 0x00 31. " CH32 ,Transmission request on channel 32" "Not waiting,Requested"
bitfld.long 0x00 30. " CH31 ,Transmission request on channel 31" "Not requested,Requested"
bitfld.long 0x00 29. " CH30 ,Transmission request on channel 30" "Not requested,Requested"
textline " "
bitfld.long 0x00 28. " CH29 ,Transmission request on channel 29" "Not requested,Requested"
bitfld.long 0x00 27. " CH28 ,Transmission request on channel 28" "Not requested,Requested"
bitfld.long 0x00 26. " CH27 ,Transmission request on channel 27" "Not requested,Requested"
textline " "
bitfld.long 0x00 25. " CH26 ,Transmission request on channel 26" "Not requested,Requested"
bitfld.long 0x00 24. " CH25 ,Transmission request on channel 25" "Not requested,Requested"
bitfld.long 0x00 23. " CH24 ,Transmission request on channel 24" "Not requested,Requested"
textline " "
bitfld.long 0x00 22. " CH23 ,Transmission request on channel 23" "Not requested,Requested"
bitfld.long 0x00 21. " CH22 ,Transmission request on channel 22" "Not requested,Requested"
bitfld.long 0x00 20. " CH21 ,Transmission request on channel 21" "Not requested,Requested"
textline " "
bitfld.long 0x00 19. " CH20 ,Transmission request on channel 20" "Not requested,Requested"
bitfld.long 0x00 18. " CH19 ,Transmission request on channel 19" "Not requested,Requested"
bitfld.long 0x00 17. " CH18 ,Transmission request on channel 18" "Not requested,Requested"
textline " "
bitfld.long 0x00 16. " CH17 ,Transmission request on channel 17" "Not requested,Requested"
bitfld.long 0x00 15. " CH16 ,Transmission request on channel 16" "Not requested,Requested"
bitfld.long 0x00 14. " CH15 ,Transmission request on channel 15" "Not requested,Requested"
textline " "
bitfld.long 0x00 13. " CH14 ,Transmission request on channel 14" "Not requested,Requested"
bitfld.long 0x00 12. " CH13 ,Transmission request on channel 13" "Not requested,Requested"
bitfld.long 0x00 11. " CH12 ,Transmission request on channel 12" "Not requested,Requested"
textline " "
bitfld.long 0x00 10. " CH11 ,Transmission request on channel 11" "Not requested,Requested"
bitfld.long 0x00 9. " CH10 ,Transmission request on channel 10" "Not requested,Requested"
bitfld.long 0x00 8. " CH9 ,Transmission request on channel 9" "Not requested,Requested"
textline " "
bitfld.long 0x00 7. " CH8 ,Transmission request on channel 8" "Not requested,Requested"
bitfld.long 0x00 6. " CH7 ,Transmission request on channel 7" "Not requested,Requested"
bitfld.long 0x00 5. " CH6 ,Transmission request on channel 6" "Not requested,Requested"
textline " "
bitfld.long 0x00 4. " CH5 ,Transmission request on channel 5" "Not requested,Requested"
bitfld.long 0x00 3. " CH4 ,Transmission request on channel 4" "Not requested,Requested"
bitfld.long 0x00 2. " CH3 ,Transmission request on channel 3" "Not requested,Requested"
textline " "
bitfld.long 0x00 1. " CH2 ,Transmission request on channel 2" "Not requested,Requested"
bitfld.long 0x00 0. " CH1 ,Transmission request on channel 1" "Not requested,Requested"
rgroup.long 0x144++0x3
line.long 0x00 "CAN_NDR,CAN New Data Register"
bitfld.long 0x00 31. " CH32 ,New data on channel 32" "No,Yes"
bitfld.long 0x00 30. " CH31 ,New data on channel 31" "No,Yes"
bitfld.long 0x00 29. " CH30 ,New data on channel 30" "No,Yes"
textline " "
bitfld.long 0x00 28. " CH29 ,New data on channel 29" "No,Yes"
bitfld.long 0x00 27. " CH28 ,New data on channel 28" "No,Yes"
bitfld.long 0x00 26. " CH27 ,New data on channel 27" "No,Yes"
textline " "
bitfld.long 0x00 25. " CH26 ,New data on channel 26" "No,Yes"
bitfld.long 0x00 24. " CH25 ,New data on channel 25" "No,Yes"
bitfld.long 0x00 23. " CH24 ,New data on channel 24" "No,Yes"
textline " "
bitfld.long 0x00 22. " CH23 ,New data on channel 23" "No,Yes"
bitfld.long 0x00 21. " CH22 ,New data on channel 22" "No,Yes"
bitfld.long 0x00 20. " CH21 ,New data on channel 21" "No,Yes"
textline " "
bitfld.long 0x00 19. " CH20 ,New data on channel 20" "No,Yes"
bitfld.long 0x00 18. " CH19 ,New data on channel 19" "No,Yes"
bitfld.long 0x00 17. " CH18 ,New data on channel 18" "No,Yes"
textline " "
bitfld.long 0x00 16. " CH17 ,New data on channel 17" "No,Yes"
bitfld.long 0x00 15. " CH16 ,New data on channel 16" "No,Yes"
bitfld.long 0x00 14. " CH15 ,New data on channel 15" "No,Yes"
textline " "
bitfld.long 0x00 13. " CH14 ,New data on channel 14" "No,Yes"
bitfld.long 0x00 12. " CH13 ,New data on channel 13" "No,Yes"
bitfld.long 0x00 11. " CH12 ,New data on channel 12" "No,Yes"
textline " "
bitfld.long 0x00 10. " CH11 ,New data on channel 11" "No,Yes"
bitfld.long 0x00 9. " CH10 ,New data on channel 10" "No,Yes"
bitfld.long 0x00 8. " CH9 ,New data on channel 9" "No,Yes"
textline " "
bitfld.long 0x00 7. " CH8 ,New data on channel 8" "No,Yes"
bitfld.long 0x00 6. " CH7 ,New data on channel 7" "No,Yes"
bitfld.long 0x00 5. " CH6 ,New data on channel 6" "No,Yes"
textline " "
bitfld.long 0x00 4. " CH5 ,New data on channel 5" "No,Yes"
bitfld.long 0x00 3. " CH4 ,New data on channel 4" "No,Yes"
bitfld.long 0x00 2. " CH3 ,New data on channel 3" "No,Yes"
textline " "
bitfld.long 0x00 1. " CH2 ,New data on channel 2" "No,Yes"
bitfld.long 0x00 0. " CH1 ,New data on channel 1" "No,Yes"
rgroup.long 0x148++0x3
line.long 0x00 "CAN_MVR,CAN Message Valid Register"
bitfld.long 0x00 31. " CH32 ,Message valid on channel 32" "Not valid,Valid"
bitfld.long 0x00 30. " CH31 ,Message valid on channel 31" "Not valid,Valid"
bitfld.long 0x00 29. " CH30 ,Message valid on channel 30" "Not valid,Valid"
textline " "
bitfld.long 0x00 28. " CH29 ,Message valid on channel 29" "Not valid,Valid"
bitfld.long 0x00 27. " CH28 ,Message valid on channel 28" "Not valid,Valid"
bitfld.long 0x00 26. " CH27 ,Message valid on channel 27" "Not valid,Valid"
textline " "
bitfld.long 0x00 25. " CH26 ,Message valid on channel 26" "Not valid,Valid"
bitfld.long 0x00 24. " CH25 ,Message valid on channel 25" "Not valid,Valid"
bitfld.long 0x00 23. " CH24 ,Message valid on channel 24" "Not valid,Valid"
textline " "
bitfld.long 0x00 22. " CH23 ,Message valid on channel 23" "Not valid,Valid"
bitfld.long 0x00 21. " CH22 ,Message valid on channel 22" "Not valid,Valid"
bitfld.long 0x00 20. " CH21 ,Message valid on channel 21" "Not valid,Valid"
textline " "
bitfld.long 0x00 19. " CH20 ,Message valid on channel 20" "Not valid,Valid"
bitfld.long 0x00 18. " CH19 ,Message valid on channel 19" "Not valid,Valid"
bitfld.long 0x00 17. " CH18 ,Message valid on channel 18" "Not valid,Valid"
textline " "
bitfld.long 0x00 16. " CH17 ,Message valid on channel 17" "Not valid,Valid"
bitfld.long 0x00 15. " CH16 ,Message valid on channel 16" "Not valid,Valid"
bitfld.long 0x00 14. " CH15 ,Message valid on channel 15" "Not valid,Valid"
textline " "
bitfld.long 0x00 13. " CH14 ,Message valid on channel 14" "Not valid,Valid"
bitfld.long 0x00 12. " CH13 ,Message valid on channel 13" "Not valid,Valid"
bitfld.long 0x00 11. " CH12 ,Message valid on channel 12" "Not valid,Valid"
textline " "
bitfld.long 0x00 10. " CH11 ,Message valid on channel 11" "Not valid,Valid"
bitfld.long 0x00 9. " CH10 ,Message valid on channel 10" "Not valid,Valid"
bitfld.long 0x00 8. " CH9 ,Message valid on channel 9" "Not valid,Valid"
textline " "
bitfld.long 0x00 7. " CH8 ,Message valid on channel 8" "Not valid,Valid"
bitfld.long 0x00 6. " CH7 ,Message valid on channel 7" "Not valid,Valid"
bitfld.long 0x00 5. " CH6 ,Message valid on channel 6" "Not valid,Valid"
textline " "
bitfld.long 0x00 4. " CH5 ,Message valid on channel 5" "Not valid,Valid"
bitfld.long 0x00 3. " CH4 ,Message valid on channel 4" "Not valid,Valid"
bitfld.long 0x00 2. " CH3 ,Message valid on channel 3" "Not valid,Valid"
textline " "
bitfld.long 0x00 1. " CH2 ,Message valid on channel 2" "Not valid,Valid"
bitfld.long 0x00 0. " CH1 ,Message valid on channel 1" "Not valid,Valid"
group.long 0x150++0x3
line.long 0x00 "CAN_TSTR,CAN Test Register"
hexmask.long.word 0x00 16.--31. 1. " TSTKEY ,Test access key"
bitfld.long 0x00 6. " RX ,Monitor the value of CAN_RX pin" "Dominant,Recessive"
bitfld.long 0x00 5. " TXOPD ,TX Open drain" "Not configured,Configured"
textline " "
bitfld.long 0x00 3.--4. " TX ,Control of CAN_TX pin" "Controlled by CAN core,Monitored at CAN_TX,Dominant,Recessive"
bitfld.long 0x00 2. " LBACK ,Loop Back Mode" "Disabled,Enabled"
bitfld.long 0x00 1. " SILENT ,Silent mode" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " BASIC ,Basic mode" "Disabled,Enabled"
width 0xb
tree.end
tree "Clock & Power Manager"
base ad:0x40020000
width 11.
rgroup.long 0x000++0x3
line.long 0x00 "CM_IDR,ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,Identification Code Register"
wgroup.long 0x004++0x1B
line.long 0x00 "CM_SRR,Software Reset Register"
bitfld.long 0x00 0. " IDCODE ,Identification Code Register" "No effect,Reset"
line.long 0x04 "CM_CSR,Control Set Register"
bitfld.long 0x04 23. " EMCM ,External Main Clock Monitor Function Enable Control" "No effect,Enable"
bitfld.long 0x04 22. " EMCMRST ,External Main Clock Monitor Reset Enable Control" "No effect,Enable"
bitfld.long 0x04 21. " ESCM ,External Sub Clock Monitor Function Enable Control" "No effect,Enable"
textline " "
bitfld.long 0x04 20. " ESCMRST ,External Sub Clock Monitor Reset Enable Control" "No effect,Enable"
bitfld.long 0x04 19. " IDLESP ,IVC Configuration" "No effect,Use STOP IVC"
bitfld.long 0x04 11. " IDLESP ,Using NISR register for interrupt or wakeup source" "No effect,Set IDLEW"
textline " "
bitfld.long 0x04 10. " ISCLKS ,ISCLK(Internal Sub Clock) Enable Control in STOP mode" "No effect,Enable"
bitfld.long 0x04 9. " PCLK ,PCLK Enable Control bit in IDLE mode" "No effect,Enable"
bitfld.long 0x04 8. " STCLK ,STCLK Enable Control in IDLE mode" "No effect,Enable"
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bitfld.long 0x04 7. " PLL ,PLL ON Control Bit" "No effect,Enable"
bitfld.long 0x04 6. " USBPLL ,USB PLL ON-OFF Control" "No effect,Enable"
bitfld.long 0x04 5. " FWAKE ,Fast Wake-up Enable Control Field" "No effect,Enable"
textline " "
bitfld.long 0x04 3. " ISCLK ,Internal Sub-Clock Enable Control" "No effect,Enable"
bitfld.long 0x04 2. " ESCLK ,External Sub-Clock Enable Control" "No effect,Enable"
bitfld.long 0x04 1. " IMCLK ,Internal Main Clock Enable Control" "No effect,Enable"
textline " "
bitfld.long 0x04 0. " EMCLK ,External Main Clock Enable Control" "No effect,Enable"
line.long 0x08 "CM_CCR,Control Clear Register"
bitfld.long 0x08 23. " EMCM ,External Main Clock Monitor Function Disable Control" "No effect,Disable"
bitfld.long 0x08 22. " EMCMRST ,External Main Clock Monitor Reset Disable Control" "No effect,Disable"
bitfld.long 0x08 21. " ESCM ,External Sub Clock Monitor Function Disable Control" "No effect,Disable"
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bitfld.long 0x08 20. " ESCMRST ,External Sub Clock Monitor Reset Disable Control" "No effect,Disable"
bitfld.long 0x08 19. " IDLESP ,During the Sub-IDLE Mode" "No effect, Not use STOP IVC"
bitfld.long 0x08 11. " IDLEW ,Ignore NISR register for interrupt or wakeup source" "No effect,Clear IDLEW"
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bitfld.long 0x08 10. " ISCLKS ,ISCLK(Internal Sub Clock) Disable Control in STOP mode" "No effect,Disable"
bitfld.long 0x08 9. " PCLK ,PCLK Disable Control bit in IDLE mode" "No effect,Disable"
bitfld.long 0x08 8. " STCLK ,STCLK Disable Control in IDLE mode" "No effect,Disable"
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bitfld.long 0x08 7. " PLL ,PLL OFF Control" "No effect,Disable"
bitfld.long 0x08 6. " USBPLL ,USB PLL ON-OFF Control" "No effect,Disable"
bitfld.long 0x08 5. " FWAKE ,Fast Wake-up Disable Control Field" "No effect,Disable"
textline " "
bitfld.long 0x08 3. " ISCLK ,Internal Sub-Clock Disable Control" "No effect,Disable"
bitfld.long 0x08 2. " ESCLK ,External Sub-Clock Disable Control" "No effect,Disable"
bitfld.long 0x08 1. " IMCLK ,Internal Main Clock Disable Control" "No effect,Disable"
textline " "
bitfld.long 0x08 0. " EMCLK ,External Main Clock Disable Control" "No effect,Disable"
rgroup.long 0x020++0x3
line.long 0x00 "CM_PCKSR,Peripheral Clock Status Register"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " STTCLK_set/clr ,STT clock status" "Disabled,Enabled"
setclrfld.long 0x00 30. -0x08 31. -0x04 31. " IOCLK_set/clr ,IO clock status" "Disabled,Enabled"
setclrfld.long 0x00 29. -0x08 31. -0x04 31. " PFCCLK_set/clr ,PFC clock status" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 27. -0x08 31. -0x04 31. " I2C1CLK_set/clr ,I2CC1 clock status" "Disabled,Enabled"
setclrfld.long 0x00 26. -0x08 31. -0x04 31. " I2C0CLK_set/clr ,I2CC0 clock status" "Disabled,Enabled"
setclrfld.long 0x00 25. -0x08 31. -0x04 31. " SPI1CLK_set/clr ,SPI1 clock status" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 24. -0x08 31. -0x04 31. " SPI0CLK_set/clr ,SPI0 clock status" "Disabled,Enabled"
setclrfld.long 0x00 23. -0x08 31. -0x04 31. " LCDCLK_set/clr ,LCD clock status" "Disabled,Enabled"
setclrfld.long 0x00 22. -0x08 31. -0x04 31. " ADCCLK_set/clr ,ADC clock status" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " CAN0CLK_set/clr ,CAN0 clock status" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 31. -0x04 31. " USART2CLK_set/clr ,USART2 clock status" "Disabled,Enabled"
setclrfld.long 0x00 17. -0x08 31. -0x04 31. " USART1CLK_set/clr ,USART1 clock status" "Disabled,Enabled"
setclrfld.long 0x00 16. -0x08 31. -0x04 31. " USART0CLK_set/clr ,USART0 clock status" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 31. -0x04 31. " TC7CLK_set/clr ,TC7 clock status" "Disabled,Enabled"
setclrfld.long 0x00 14. -0x08 31. -0x04 31. " TC6CLK_set/clr ,TC6 clock status" "Disabled,Enabled"
setclrfld.long 0x00 13. -0x08 31. -0x04 31. " TC5CLK_set/clr ,TC5 clock status" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 31. -0x04 31. " TC4CLK_set/clr ,TC4 clock status" "Disabled,Enabled"
setclrfld.long 0x00 11. -0x08 31. -0x04 31. " TC3CLK_set/clr ,TC3 clock status" "Disabled,Enabled"
setclrfld.long 0x00 10. -0x08 31. -0x04 31. " TC2CLK_set/clr ,TC2 clock status" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 31. -0x04 31. " TC1CLK_set/clr ,TC1 clock status" "Disabled,Enabled"
setclrfld.long 0x00 8. -0x08 31. -0x04 31. " TC0CLK_set/clr ,TC0 clock status" "Disabled,Enabled"
setclrfld.long 0x00 7. -0x08 31. -0x04 31. " IMCCLK_set/clr ,IMC clock status" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 6. -0x08 31. -0x04 31. " ENCCLK_set/clr ,ENC clock status" "Disabled,Enabled"
setclrfld.long 0x00 5. -0x08 31. -0x04 31. " PWM1CLK_set/clr ,PWM1 clock status" "Disabled,Enabled"
setclrfld.long 0x00 4. -0x08 31. -0x04 31. " PWM0CLK_set/clr ,PWM0 clock status" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 3. -0x08 31. -0x04 31. " FRTCLK_set/clr ,FRT clock status" "Disabled,Enabled"
setclrfld.long 0x00 2. -0x08 31. -0x04 31. " WDTCLK_set/clr ,WDT clock status" "Disabled,Enabled"
setclrfld.long 0x00 1. -0x08 31. -0x04 31. " OPACLK_set/clr ,OPA clock status" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 31. -0x04 31. " SFMCLK_set/clr ,SFM clock status" "Disabled,Enabled"
group.long 0x028++0x3
line.long 0x00 "CM_MR0,Mode Register 0"
bitfld.long 0x00 12.--14. " CLKOUT[2:0] ,Several Clock Output Control" "EMCLK,IMCLK,ESCLK,ISCLK,PLLCLK/8,USBPLLCLK/8,SYSCLK/S,CORECLK"
bitfld.long 0x00 11. " LVDPD ,LVD Power Down Control" "Powered down,Powered up"
bitfld.long 0x00 10. " STCLKEN ,Systic Timer Clock Enable/Disable Control" "Disabled,Enabled"
textline " "
bitfld.long 0x00 9. " RXEV ,RXEV Enable/Disable Control" "Disabled,Enabled"
bitfld.long 0x00 7. " LVDINTEN ,LVD Interrupt Enable/Disable Control" "Disabled,Enabled"
bitfld.long 0x00 4.--6. " LVDIL[2:0] ,LVD Interrupt threshold Level" "1.7V,1.9V,2.1V,2.6V,2.8V,3.8V,4.3V,?..."
textline " "
bitfld.long 0x00 3. " LVDRSTEN ,LVD Reset Enable/Disable Control" "Disabled,Enabled"
bitfld.long 0x00 0.--2. " LVDRL[2:0] ,LVD Reset Level" "1.7V,1.9V,2.1V,2.6V,2.8V,3.8V,4.3V,?..."
group.long 0x02c++0x3
line.long 0x00 "CM_MR1,Mode Register 1"
bitfld.long 0x00 16.--18. " LCDCLK[2:0] ,LCD Clock Source Selection" "EMCLK,IMCLK,ESCLK,ISCLK,PLLCLK,Disconnect LCDCLK,Disconnect LCDCLK,Disconnect LCDCLK"
bitfld.long 0x00 12.--14. " STTCLK[2:0] ,Stamp Timer Clock Source Selection" "EMCLK,IMCLK,ESCLK,ISCLK,PLLCLK,Disconnect STTCLK,Disconnect STTCLK,Disconnect STTCLK"
bitfld.long 0x00 8.--10. " FRTCLK[2:0] ,Free Running Timer Clock Source Selection" "EMCLK,IMCLK,ESCLK,ISCLK,PLLCLK,Disconnect FRTCLK,Disconnect FRTCLK,Disconnect FRTCLK"
textline " "
bitfld.long 0x00 4.--6. " WDTCLK[2:0] ,Watchdog Timer Clock Source Selection" "EMCLK,IMCLK,ESCLK,ISCLK,PLLCLK,Disconnect WDTCLK,Disconnect WDTCLK,Disconnect WDTCLK"
bitfld.long 0x00 0.--2. " SYSCLK[2:0] ,Select one among different clock for SYSCLK" "ESCLK,EMCLK,ISCLK,IMCLK,PLLCLK,?..."
group.long 0x030++0x3
line.long 0x00 "CM_IMSCR,Interrupt Mask Set/Clear Register"
bitfld.long 0x00 18. " CMDERR ,Command Error Interrupt" "Masked,Not masked"
bitfld.long 0x00 16. " LVDINT ,Interrupt Level Detect of LVD Interrupt" "Masked,Not masked"
bitfld.long 0x00 15. " EMCKFAIL ,External Main Clock Failure Interrupt" "Masked,Not masked"
textline " "
bitfld.long 0x00 14. " EMCKFAIL_END ,External Main Clock Failure End Interrupt" "Masked,Not masked"
bitfld.long 0x00 13. " ESCKFAIL ,External Sub Clock Failure Interrupt" "Masked,Not masked"
bitfld.long 0x00 12. " ESCKFAIL_END ,External Sub Clock Failure End Interrupt" "Masked,Not masked"
textline " "
bitfld.long 0x00 7. " PLL ,PLL Stable Interrupt" "Masked,Not masked"
bitfld.long 0x00 6. " USBPLL ,USB PLL Stable Interrupt" "Masked,Not masked"
bitfld.long 0x00 4. " STABLE ,Clock (SYSCLK) Switching Stable Interupt" "Masked,Not masked"
textline " "
bitfld.long 0x00 3. " ISCLK ,Internal Sub Clock Stable Interrupt" "Masked,Not masked"
bitfld.long 0x00 2. " ESCLK ,External Sub Clock Stable Interrupt" "Masked,Not masked"
bitfld.long 0x00 1. " IMCLK ,Internal Main Clock Stable Interrupt" "Masked,Not masked"
textline " "
bitfld.long 0x00 0. " EMCLK ,External Main Clock Stable Interrupt" "Masked,Not masked"
rgroup.long 0x034++0x3
line.long 0x00 "CM_RISR,Raw Interrupt Status Register"
bitfld.long 0x00 18. " CMDERR ,Command Error Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. " LVDRS ,Reset Level Detect Status" "No interrupt,Interrupt"
bitfld.long 0x00 16. " LVDINT ,Interrupt Level Detect of LVD Interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 15. " EMCKFAIL ,External Main Clock Failure Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. " EMCKFAIL_END ,External Main Clock Failure End Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. " ESCKFAIL ,External Sub Clock Failure Interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 12. " ESCKFAIL_END ,External Sub Clock Failure End Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. " PLL ,PLL Stable Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. " USBPLL ,USB PLL Stable Interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 4. " STABLE ,Clock (SYSCLK) Switching Stable Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. " ISCLK ,Internal Sub Clock Stable Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. " ESCLK ,External Sub Clock Stable Interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 1. " IMCLK ,Internal Main Clock Stable Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. " EMCLK ,External Main Clock Stable Interrupt" "No interrupt,Interrupt"
rgroup.long 0x038++0x3
line.long 0x00 "CM_MISR,Masked Interrupt Status Register"
bitfld.long 0x00 18. " CMDERR ,Command Error Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. " LVDINT ,Interrupt Level Detect of LVD Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. " EMCKFAIL ,External Main Clock Failure Interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 14. " EMCKFAIL_END ,External Main Clock Failure End Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. " ESCKFAIL ,External Sub Clock Failure Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. " ESCKFAIL_END ,External Sub Clock Failure End Interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 7. " PLL ,PLL Stable Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. " USBPLL ,USB PLL Stable Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. " STABLE ,Clock (SYSCLK) Switching Stable Interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 3. " ISCLK ,Internal Sub Clock Stable Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. " ESCLK ,External Sub Clock Stable Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. " IMCLK ,Internal Main Clock Stable Interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " EMCLK ,External Main Clock Stable Interrupt" "No interrupt,Interrupt"
wgroup.long 0x03c++0x3
line.long 0x00 "CM_ICR,Interrupt Clear Register"
bitfld.long 0x00 18. " CMDERR ,Command Error Interrupt" "No effect,Clear"
bitfld.long 0x00 17. " LVDRS ,Reset Level Detect Status" "No effect,Clear"
bitfld.long 0x00 16. " LVDINT ,Interrupt Level Detect of LVD Interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 15. " EMCKFAIL ,External Main Clock Failure Interrupt" "No effect,Clear"
bitfld.long 0x00 14. " EMCKFAIL_END ,External Main Clock Failure End Interrupt" "No effect,Clear"
bitfld.long 0x00 13. " ESCKFAIL ,External Sub Clock Failure Interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 12. " ESCKFAIL_END ,External Sub Clock Failure End Interrupt" "No effect,Clear"
bitfld.long 0x00 7. " PLL ,PLL Stable Interrupt" "No effect,Clear"
bitfld.long 0x00 6. " USBPLL ,USB PLL Stable Interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 4. " STABLE ,Clock (SYSCLK) Switching Stable Interrupt" "No effect,Clear"
bitfld.long 0x00 3. " ISCLK ,Internal Sub Clock Stable Interrupt" "No effect,Clear"
bitfld.long 0x00 2. " ESCLK ,External Sub Clock Stable Interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 1. " IMCLK ,Internal Main Clock Stable Interrupt" "No effect,Clear"
bitfld.long 0x00 0. " EMCLK ,External Main Clock Stable Interrupt" "No effect,Clear"
group.long 0x040++0x3
line.long 0x00 "CM_SR,Status Register"
eventfld.long 0x00 31. " SYSRSTS ,System(Chip) Reset from CPU request" "Not occurred,Occurred"
eventfld.long 0x00 30. " EMCMRSTS ,System(Chip) Reset from External Main Clock Monitor fail" "Not occurred,Occurred"
eventfld.long 0x00 29. " ESCMRSTS ,System(Chip) Reset from External Sub Clock Monitor fail" "Not occurred,Occurred"
textline " "
eventfld.long 0x00 28. " PORRSTS ,System(Chip) Reset from power on reset" "Low,High"
eventfld.long 0x00 27. " WDTRSTS ,System(Chip) Reset by Watchdog timer" "Not occurred,Occurred"
eventfld.long 0x00 26. " LVDRSTS ,System(Chip) Reset by LVD Control" "Not occurred,Occurred"
textline " "
eventfld.long 0x00 25. " NRSTS ,System(Chip) Reset by External Reset Pin" "Not occurred,Occurred"
eventfld.long 0x00 24. " SWRSTS ,System(Chip) Reset from the software reset" "Not occurred,Occurred"
bitfld.long 0x00 23. " EMCM ,External Main Clock Monitor Fail function Enable/Disable Status" "Disabled,Enabled"
textline " "
bitfld.long 0x00 22. " EMCMRST ,External Main Clock Monitor Reset function Enable/Disable Status" "Disabled,Enabled"
bitfld.long 0x00 21. " ESCM ,External Sub Clock Monitor Fail function Enable/Disable Status" "Disabled,Enabled"
bitfld.long 0x00 20. " ESCMRST ,External Sub Clock Monitor Reset function Enable/Disable Status" "Disabled,Enabled"
textline " "
bitfld.long 0x00 19. " IDLESP ,STOP IVC Control Status in IDLE mode" "Not used,Used"
bitfld.long 0x00 18. " CMDERR ,Command Error Interrupt" "No effect,Cleared"
bitfld.long 0x00 17. " LVDRS ,LVD Reset Level Detect Status" "Not detected,Detected"
textline " "
bitfld.long 0x00 16. " LVDINT ,LVD Interrupt Status" "Not detected,Detected"
bitfld.long 0x00 15. " EMCKFAIL ,External Main Clock Fail Status" "Not occurred,Occurred"
bitfld.long 0x00 14. " EMCKFAIL_END ,External Main Clock Failure End Status" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " ESCKFAIL ,External Sub Clock Fail Status" "Not occurred,Occurred"
eventfld.long 0x00 12. " ESCKFAIL_END ,External Sub Clock Failure End Status" "Not detected,Detected"
bitfld.long 0x00 11. " IDLEW ,Using/Ignore NISR register for interrupt or wakeup source" "Cleared,Set"
textline " "
bitfld.long 0x00 10. " ISCLKS ,ISCLK (Internal Sub Clock) status in STOP mode" "Disabled,Enabled"
bitfld.long 0x00 9. " PCLK ,PCLK Control Status in IDLE mode" "Disabled,Enabled"
bitfld.long 0x00 8. " STCLK ,STCLK Control Status in IDLE mode" "Disabled,Enabled"
textline " "
bitfld.long 0x00 7. " PLL ,PLL Stable Interrupt" "Disabled,Enabled"
bitfld.long 0x00 6. " USBPLL ,USB PLL Stable Interrupt" "Disabled,Enabled"
bitfld.long 0x00 5. " FWAKE ,Fast Wake Up Control (Enable/Disable) Status" "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " STABLE ,Clock source switching STABLE Status" "Not completed,Completed"
bitfld.long 0x00 3. " ISCLK ,Internal Sub-Clock Status" "Disabled,Enabled"
bitfld.long 0x00 2. " ESCLK ,External Sub-Clock Status" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " IMCLK ,Internal Main Clock Status" "Disabled,Enabled"
bitfld.long 0x00 0. " EMCLK ,External Main Clock Status" "Disabled,Enabled"
group.long 0x044++0x3
line.long 0x00 "CM_SCDR,System Clock (SYSCLK) Divider Register"
hexmask.long.word 0x00 16.--31. 1. " SDIVKEY[15:0] ,Key for write access into the CM_SCDR"
bitfld.long 0x00 0.--2. " SDIV[2:0] ,SYSCLK divider" "1,2,3,4,5,6,7,8"
group.long 0x048++0x3
line.long 0x00 "CM_PCDR,Peripheral Clock (PCLK) Divider Register"
hexmask.long.word 0x00 16.--31. 1. " PDIVKEY[15:0] ,Key for write access into the CM_PCDR"
bitfld.long 0x00 0.--3. " PDIV[3:0] ,SYSCLK divider for PCLK" "1,2,4,4,8,8,8,8,16,16,16,16,16,16,16,16"
group.long 0x04c++0x3
line.long 0x00 "CM_FCDR,FRT Clock Divider Register"
hexmask.long.word 0x00 16.--31. 1. " FDIVKEY[15:0] ,Key for write access into the CM_FCDR"
bitfld.long 0x00 4.--6. " MDIV ,FRTCLK Divider" "1,2,3,4,5,6,7,8"
bitfld.long 0x00 0.--3. " NDIV ,FRTCLK Pre-scale Divider" "1,2,4,4,8,8,8,8,16,16,16,16,16,16,16,16"
group.long 0x050++0x3
line.long 0x00 "CM_STCDR,STT Clock Divider Register"
hexmask.long.word 0x00 16.--31. 1. " STDIVKEY[15:0] ,Key for write access into the CM_SCDR"
bitfld.long 0x00 4.--6. " CDIV ,STTCLK Divider" "1,2,3,4,5,6,7,8"
bitfld.long 0x00 0.--3. " DDIV ,STTCLK Pre-scale Divider" "1,2,4,4,8,8,8,8,16,16,16,16,16,16,16,16"
group.long 0x054++0x3
line.long 0x00 "CM_LCDR,LCD Clock Divider Register"
hexmask.long.word 0x00 16.--31. 1. " LDIVKEY[15:0] ,Key for write access into the CM_LCDR"
bitfld.long 0x00 4.--6. " JDIV ,LCDCLK Divider" "1,2,3,4,5,6,7,8"
bitfld.long 0x00 0.--3. " KDIV ,LCDCLK Pre-scale Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,?..."
group.long 0x058++0x3
line.long 0x00 "CM_PSTR,PLL Stabilization Time Register"
hexmask.long.word 0x00 16.--31. 1. " PLLSKEY[15:0] ,Key for write access into the CM_PSTR register"
hexmask.long.word 0x00 0.--10. 1. " PST[10:0] ,PLL stabilization time"
group.long 0x05c++0x3
line.long 0x00 "CM_PDPR,PLL Divider Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " PLLKEY[7:0] ,PLL Parameter Control Register Key Value"
bitfld.long 0x00 23. " LFPASS ,Input frequency" "Same or grater,Less"
bitfld.long 0x00 16.--17. " PLLPOST[1:0] ,PLL Post-scaler" "0,1,2,3"
textline " "
bitfld.long 0x00 8.--13. " PLLPRE[5:0] ,PLL Pre-divider" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--7. 1. " PLLMUL[7:0] ,PLL Multiplier"
group.long 0x060++0x3
line.long 0x00 "CM_UPSTR,USB PLL Stabilization Time Register"
hexmask.long.word 0x00 16.--31. 1. " UPLLSKEY ,USB PLL Stabilization Time Control Register Key"
hexmask.long.word 0x00 0.--10. 1. " UPST ,USB PLL stabilization time"
group.long 0x064++0x3
line.long 0x00 "CM_UPDPR,USB PLL Divider Parameter Register"
hexmask.long.byte 0x00 24.--31. 1. " UPLLKEY ,USB PLL Parameter Control Register Key Value"
bitfld.long 0x00 23. " LFPASS ,Input frequency" "Same or grater,Less"
bitfld.long 0x00 16.--17. " UPLLPOST ,USB PLL Post-scaler value" "0,1,2,3"
textline " "
hexmask.long.byte 0x00 8.--13. 1. " UPLLPRE ,USB PLL Pre-divider value"
hexmask.long.byte 0x00 0.--7. 1. " UPLLMUL ,USB PLL Multiplier value"
group.long 0x068++0x3
line.long 0x00 "CM_EMSTR,External Main Clock Stabilization Time Register"
hexmask.long.word 0x00 16.--31. 1. " EMSKEY[15:0] ,Key for write access into the CM_EMSTR register"
hexmask.long.word 0x00 0.--15. 1. " EMST[15:0] ,External Main Clock Oscillator Stabilization Time Control Field"
group.long 0x06c++0x3
line.long 0x00 "CM_ESSTR,External Sub Clock Stabilization Time Register"
hexmask.long.word 0x00 16.--31. 1. " ESSKEY[15:0] ,Key for write access into the CM_ESSTR register"
hexmask.long.word 0x00 0.--15. 1. " ESST[15:0] ,External Sub-Clock Oscillator Stabilization Time Control Field"
group.long 0x070++0x3
line.long 0x00 "CM_BTCDR,Basic Timer Clock Divider Register"
hexmask.long.word 0x00 16.--31. 1. " BTCDKEY[15:0] ,Key for write access into the CM_BTCDR register"
bitfld.long 0x00 0.--3. " BTCDIV[3:0] ,Basic Timer Clock Divider Control Field" "Reserved,Reserved,Reserved,1,2,4,8,16,32,64,128,256,512,1024,2048,4096"
group.long 0x074++0x3
line.long 0x00 "CM_BTR,Basic Timer Register"
hexmask.long.word 0x00 0.--15. 1. " BTCV ,Basic Timer Count Value"
group.long 0x078++0x7
line.long 0x0 "CM_WCR0,Wakeup Control Register 0"
bitfld.long 0x0 31. " WEN3 ,Wake-Up Enable/Disable Control 3 " "Disabled,Enabled"
bitfld.long 0x0 30. " EDGE3 ,Edge Type Selection 3 " "Rising,Falling"
bitfld.long 0x0 24.--28. " WSRC3 ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,Reserved,Reserved,Reserved,Reserved,Reserved,VUSBDET,USB"
textline " "
bitfld.long 0x0 23. " WEN2 ,Wake-Up Enable/Disable Control 3 " "Disabled,Enabled"
bitfld.long 0x0 22. " EDGE2 ,Edge Type Selection 3 " "Rising,Falling"
bitfld.long 0x0 16.--20. " WSRC2 ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,Reserved,Reserved,Reserved,Reserved,Reserved,VUSBDET,USB"
textline " "
bitfld.long 0x0 15. " WEN1 ,Wake-Up Enable/Disable Control 3 " "Disabled,Enabled"
bitfld.long 0x0 14. " EDGE1 ,Edge Type Selection 3 " "Rising,Falling"
bitfld.long 0x0 8.--12. " WSRC1 ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,Reserved,Reserved,Reserved,Reserved,Reserved,VUSBDET,USB"
textline " "
bitfld.long 0x0 7. " WEN0 ,Wake-Up Enable/Disable Control 3 " "Disabled,Enabled"
bitfld.long 0x0 6. " EDGE0 ,Edge Type Selection 3 " "Rising,Falling"
bitfld.long 0x0 0.--4. " WSRC0 ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,Reserved,Reserved,Reserved,Reserved,Reserved,VUSBDET,USB"
line.long 0x4 "CM_WCR1,Wakeup Control Register 1"
bitfld.long 0x4 31. " WEN7 ,Wake-Up Enable/Disable Control 7 " "Disabled,Enabled"
bitfld.long 0x4 30. " EDGE7 ,Edge Type Selection 7 " "Rising,Falling"
bitfld.long 0x4 24.--28. " WSRC7 ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,Reserved,Reserved,Reserved,Reserved,Reserved,VUSBDET,USB"
textline " "
bitfld.long 0x4 23. " WEN6 ,Wake-Up Enable/Disable Control 7 " "Disabled,Enabled"
bitfld.long 0x4 22. " EDGE6 ,Edge Type Selection 7 " "Rising,Falling"
bitfld.long 0x4 16.--20. " WSRC6 ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,Reserved,Reserved,Reserved,Reserved,Reserved,VUSBDET,USB"
textline " "
bitfld.long 0x4 15. " WEN5 ,Wake-Up Enable/Disable Control 7 " "Disabled,Enabled"
bitfld.long 0x4 14. " EDGE5 ,Edge Type Selection 7 " "Rising,Falling"
bitfld.long 0x4 8.--12. " WSRC5 ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,Reserved,Reserved,Reserved,Reserved,Reserved,VUSBDET,USB"
textline " "
bitfld.long 0x4 7. " WEN4 ,Wake-Up Enable/Disable Control 7 " "Disabled,Enabled"
bitfld.long 0x4 6. " EDGE4 ,Edge Type Selection 7 " "Rising,Falling"
bitfld.long 0x4 0.--4. " WSRC4 ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,Reserved,Reserved,Reserved,Reserved,Reserved,VUSBDET,USB"
group.long 0x088++0x3
line.long 0x00 "CM_WIMSCR,Wakeup Interrupt Mask Set/Clear Register"
bitfld.long 0x00 7. " WI7 ,Wakeup Interrupt 7 Mask Set/Clear" "Masked,Not masked"
bitfld.long 0x00 6. " WI6 ,Wakeup Interrupt 6 Mask Set/Clear" "Masked,Not masked"
bitfld.long 0x00 5. " WI5 ,Wakeup Interrupt 5 Mask Set/Clear" "Masked,Not masked"
textline " "
bitfld.long 0x00 4. " WI4 ,Wakeup Interrupt 4 Mask Set/Clear" "Masked,Not masked"
bitfld.long 0x00 3. " WI3 ,Wakeup Interrupt 3 Mask Set/Clear" "Masked,Not masked"
bitfld.long 0x00 2. " WI2 ,Wakeup Interrupt 2 Mask Set/Clear" "Masked,Not masked"
textline " "
bitfld.long 0x00 1. " WI1 ,Wakeup Interrupt 1 Mask Set/Clear" "Masked,Not masked"
bitfld.long 0x00 0. " WI0 ,Wakeup Interrupt 0 Mask Set/Clear Register" "Masked,Not masked"
group.long 0x08c++0x3
line.long 0x00 "CM_WRISR,Wakeup Raw Interrupt Status Register"
bitfld.long 0x00 7. " WI7 ,Wakeup Raw Interrupt 7 Status" "No interrupt,Interrupt"
bitfld.long 0x00 6. " WI6 ,Wakeup Raw Interrupt 6 Status" "No interrupt,Interrupt"
bitfld.long 0x00 5. " WI5 ,Wakeup Raw Interrupt 5 Status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 4. " WI4 ,Wakeup Raw Interrupt 4 Status" "No interrupt,Interrupt"
bitfld.long 0x00 3. " WI3 ,Wakeup Raw Interrupt 3 Status" "No interrupt,Interrupt"
bitfld.long 0x00 2. " WI2 ,Wakeup Raw Interrupt 2 Status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 1. " WI1 ,Wakeup Raw Interrupt 1 Status" "No interrupt,Interrupt"
bitfld.long 0x00 0. " WI0 ,Wakeup Raw Interrupt 0 Status" "No interrupt,Interrupt"
rgroup.long 0x090++0x3
line.long 0x00 "CM_WMISR,Wakeup Masked Interrupt Status Register"
bitfld.long 0x00 15. " WI15 ,Wakeup Masked Interrupt Status" "No interrupt,Interrupt"
bitfld.long 0x00 14. " WI14 ,Wakeup Masked Interrupt Status" "No interrupt,Interrupt"
bitfld.long 0x00 13. " WI13 ,Wakeup Masked Interrupt Status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 12. " WI12 ,Wakeup Masked Interrupt Status" "No interrupt,Interrupt"
bitfld.long 0x00 11. " WI11 ,Wakeup Masked Interrupt Status" "No interrupt,Interrupt"
bitfld.long 0x00 10. " WI10 ,Wakeup Masked Interrupt Status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 9. " WI9 ,Wakeup Masked Interrupt Status" "No interrupt,Interrupt"
bitfld.long 0x00 8. " WI8 ,Wakeup Masked Interrupt Status" "No interrupt,Interrupt"
bitfld.long 0x00 7. " WI7 ,Wakeup Masked Interrupt Status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 6. " WI6 ,Wakeup Masked Interrupt Status" "No interrupt,Interrupt"
bitfld.long 0x00 5. " WI5 ,Wakeup Masked Interrupt Status" "No interrupt,Interrupt"
bitfld.long 0x00 4. " WI4 ,Wakeup Masked Interrupt Status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 3. " WI3 ,Wakeup Masked Interrupt Status" "No interrupt,Interrupt"
bitfld.long 0x00 2. " WI2 ,Wakeup Masked Interrupt Status" "No interrupt,Interrupt"
bitfld.long 0x00 1. " WI1 ,Wakeup Masked Interrupt Status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " WI0 ,Wakeup Masked Interrupt Status" "No interrupt,Interrupt"
group.long 0x094++0x3
line.long 0x00 "CM_WICR,Wakeup Interrupt Clear Register"
bitfld.long 0x00 7. " WI7 ,Wakeup Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 6. " WI6 ,Wakeup Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 5. " WI5 ,Wakeup Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 4. " WI4 ,Wakeup Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 3. " WI3 ,Wakeup Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 2. " WI2 ,Wakeup Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 1. " WI1 ,Wakeup Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 0. " WI0 ,Wakeup Interrupt Clear" "No effect,Clear"
group.long 0x098++0x3
line.long 0x00 "CM_NISR,NVIC Interrupt Status Register"
bitfld.long 0x00 31. " NVIC31 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 30. " NVIC30 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 29. " NVIC29 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 28. " NVIC28 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 27. " NVIC27 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 26. " NVIC26 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 25. " NVIC25 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 24. " NVIC24 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 23. " NVIC23 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 22. " NVIC22 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 21. " NVIC21 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 20. " NVIC20 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 19. " NVIC19 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 18. " NVIC18 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 17. " NVIC17 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 16. " NVIC16 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 15. " NVIC15 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 14. " NVIC14 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 13. " NVIC13 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 12. " NVIC12 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 11. " NVIC11 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 10. " NVIC10 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 9. " NVIC9 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 8. " NVIC8 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 7. " NVIC7 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 6. " NVIC6 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 5. " NVIC5 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 4. " NVIC4 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 3. " NVIC3 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 2. " NVIC2 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 1. " NVIC1 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
bitfld.long 0x00 0. " NVIC0 ,Control Interrupt to NVIC of Cortex-M3" "No interrupt,Interrupt"
rgroup.long 0x0A4++0x3
line.long 0x00 "CM_PSR,Power Status Register"
bitfld.long 0x00 31. " VUSBDET ,VUSB Power Detection" "Detached,Attached"
bitfld.long 0x00 1. " NORIVC ,Normal IVC Stable" "Not stabled,Stabled"
bitfld.long 0x00 0. " SUBIVC ,Sub IVC Stable" "Not stabled,Stabled"
width 0xb
tree.end
tree "Direct Memory Access (DMA) Controller"
base ad:0x400F0000
width 11.
group.long 0x0++0x13
line.long 0x00 "DMA_ISR0,DMA Channel 0 Initial Source Register"
line.long 0x04 "DMA_ISCR0,DMA Channel 0 Initial Source Control Register"
bitfld.long 0x04 1. " HINC ,Source Address Increment Bit for High Transfer Count" "Increment,Fixed"
bitfld.long 0x04 0. " LINC ,Source Address Increment Bit for Low Transfer Count" "Increment,Fixed"
line.long 0x08 "DMA_IDR0,DMA Channel 0 Initial Destination Register"
line.long 0x0c "DMA_IDCR0,DMA Channel 0 Initial Destination Control Register"
bitfld.long 0x0c 1. " HINC ,Destination Address Increment Bit for High Transfer Count" "Increment,Fixed"
bitfld.long 0x0c 0. " LINC ,Destination Address Increment Bit for Low Transfer Count" "Increment,Fixed"
line.long 0x10 "DMA_CR0,DMA Channel 0 Control Register"
bitfld.long 0x10 30. " TCIT ,Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
bitfld.long 0x10 29. " LTCIT ,Low Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
bitfld.long 0x10 28. " TSIZE ,Transfer Size" "DSIZE,4*DSIZE"
textline " "
bitfld.long 0x10 27. " SMODE ,Service Mode Selection" "Single Service Mode,Continuous Mode"
bitfld.long 0x10 26. " RELOAD ,Auto Reload Enable/Disable Control" "Enabled,Disabled"
bitfld.long 0x10 24.--25. " DSIZE ,Data Size Selection Field" "Byte,Half word,Word,?..."
textline " "
hexmask.long.word 0x10 12.--23. 1. " HTC ,High Transfer Count Field"
hexmask.long.word 0x10 0.--11. 1. " LTC ,Low Transfer Count Field"
rgroup.long 0x0++0x1f
line.long 0x14 "DMA_SR0,DMA Channel 0 Status Register"
bitfld.long 0x14 31. " LTCST ,Low Transfer Counter Status" "Not busy,Busy"
hexmask.long.word 0x14 12.--23. 1. " ,Current High Transfer Count Value"
hexmask.long.word 0x14 0.--11. 1. " CURR_LTC ,Current Low Transfer Count Value"
line.long 0x18 "DMA_CSR0,DMA Channel 0 Current Source Register"
line.long 0x1c "DMA_CDR0,DMA Channel 0 Current Destination Register"
group.long 0x0++0x27
line.long 0x20 "DMA_MTR0,DMA Channel 0 Mask Trigger Register"
bitfld.long 0x20 2. " STOP ,DMA Operation Stop" "No effect,Stopped"
bitfld.long 0x20 1. " CHEN ,DMA channel on/off" "Off,On"
bitfld.long 0x20 0. " SWTRIG ,DMA Software Request Trigger" "No effect,Requested"
line.long 0x24 "DMA_RSR0,DMA Channel x Request Selection Register"
bitfld.long 0x24 1.--5. " HWSRC ,DMA Hardware Source Selection Field" "USART0_TX,USART0_RX,USART1_TX,USART1_RX,USART2_TX,USART2_RX,Reserved,Reserved,Reserved,Reserved,SPI0_TX,SPI0_RX,SPI1_TX,SPI1_RX,Reserved,Reserved,Reserved,Reserved,IIC0_TX,IIC0_RX,IIC1_TX,IIC1_RX,ADC,Reserved,Reserved,Reserved,USB_EP1,USB_EP2,USB_EP3,USB_EP4,?..."
bitfld.long 0x24 0. " REQ ,Request Type Selection" "S/W request,DMA source"
group.long 0x80++0x13
line.long 0x00 "DMA_ISR1,DMA Channel 1 Initial Source Register"
line.long 0x04 "DMA_ISCR1,DMA Channel 1 Initial Source Control Register"
bitfld.long 0x04 1. " HINC ,Source Address Increment Bit for High Transfer Count" "Increment,Fixed"
bitfld.long 0x04 0. " LINC ,Source Address Increment Bit for Low Transfer Count" "Increment,Fixed"
line.long 0x08 "DMA_IDR1,DMA Channel 1 Initial Destination Register"
line.long 0x0c "DMA_IDCR1,DMA Channel 1 Initial Destination Control Register"
bitfld.long 0x0c 1. " HINC ,Destination Address Increment Bit for High Transfer Count" "Increment,Fixed"
bitfld.long 0x0c 0. " LINC ,Destination Address Increment Bit for Low Transfer Count" "Increment,Fixed"
line.long 0x10 "DMA_CR1,DMA Channel 1 Control Register"
bitfld.long 0x10 30. " TCIT ,Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
bitfld.long 0x10 29. " LTCIT ,Low Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
bitfld.long 0x10 28. " TSIZE ,Transfer Size" "DSIZE,4*DSIZE"
textline " "
bitfld.long 0x10 27. " SMODE ,Service Mode Selection" "Single Service Mode,Continuous Mode"
bitfld.long 0x10 26. " RELOAD ,Auto Reload Enable/Disable Control" "Enabled,Disabled"
bitfld.long 0x10 24.--25. " DSIZE ,Data Size Selection Field" "Byte,Half word,Word,?..."
textline " "
hexmask.long.word 0x10 12.--23. 1. " HTC ,High Transfer Count Field"
hexmask.long.word 0x10 0.--11. 1. " LTC ,Low Transfer Count Field"
rgroup.long 0x80++0x1f
line.long 0x14 "DMA_SR1,DMA Channel 1 Status Register"
bitfld.long 0x14 31. " LTCST ,Low Transfer Counter Status" "Not busy,Busy"
hexmask.long.word 0x14 12.--23. 1. " ,Current High Transfer Count Value"
hexmask.long.word 0x14 0.--11. 1. " CURR_LTC ,Current Low Transfer Count Value"
line.long 0x18 "DMA_CSR1,DMA Channel 1 Current Source Register"
line.long 0x1c "DMA_CDR1,DMA Channel 1 Current Destination Register"
group.long 0x80++0x27
line.long 0x20 "DMA_MTR1,DMA Channel 1 Mask Trigger Register"
bitfld.long 0x20 2. " STOP ,DMA Operation Stop" "No effect,Stopped"
bitfld.long 0x20 1. " CHEN ,DMA channel on/off" "Off,On"
bitfld.long 0x20 0. " SWTRIG ,DMA Software Request Trigger" "No effect,Requested"
line.long 0x24 "DMA_RSR1,DMA Channel x Request Selection Register"
bitfld.long 0x24 1.--5. " HWSRC ,DMA Hardware Source Selection Field" "USART0_TX,USART0_RX,USART1_TX,USART1_RX,USART2_TX,USART2_RX,Reserved,Reserved,Reserved,Reserved,SPI0_TX,SPI0_RX,SPI1_TX,SPI1_RX,Reserved,Reserved,Reserved,Reserved,IIC0_TX,IIC0_RX,IIC1_TX,IIC1_RX,ADC,Reserved,Reserved,Reserved,USB_EP1,USB_EP2,USB_EP3,USB_EP4,?..."
bitfld.long 0x24 0. " REQ ,Request Type Selection" "S/W request,DMA source"
group.long 0x100++0x13
line.long 0x00 "DMA_ISR2,DMA Channel 2 Initial Source Register"
line.long 0x04 "DMA_ISCR2,DMA Channel 2 Initial Source Control Register"
bitfld.long 0x04 1. " HINC ,Source Address Increment Bit for High Transfer Count" "Increment,Fixed"
bitfld.long 0x04 0. " LINC ,Source Address Increment Bit for Low Transfer Count" "Increment,Fixed"
line.long 0x08 "DMA_IDR2,DMA Channel 2 Initial Destination Register"
line.long 0x0c "DMA_IDCR2,DMA Channel 2 Initial Destination Control Register"
bitfld.long 0x0c 1. " HINC ,Destination Address Increment Bit for High Transfer Count" "Increment,Fixed"
bitfld.long 0x0c 0. " LINC ,Destination Address Increment Bit for Low Transfer Count" "Increment,Fixed"
line.long 0x10 "DMA_CR2,DMA Channel 2 Control Register"
bitfld.long 0x10 30. " TCIT ,Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
bitfld.long 0x10 29. " LTCIT ,Low Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
bitfld.long 0x10 28. " TSIZE ,Transfer Size" "DSIZE,4*DSIZE"
textline " "
bitfld.long 0x10 27. " SMODE ,Service Mode Selection" "Single Service Mode,Continuous Mode"
bitfld.long 0x10 26. " RELOAD ,Auto Reload Enable/Disable Control" "Enabled,Disabled"
bitfld.long 0x10 24.--25. " DSIZE ,Data Size Selection Field" "Byte,Half word,Word,?..."
textline " "
hexmask.long.word 0x10 12.--23. 1. " HTC ,High Transfer Count Field"
hexmask.long.word 0x10 0.--11. 1. " LTC ,Low Transfer Count Field"
rgroup.long 0x100++0x1f
line.long 0x14 "DMA_SR2,DMA Channel 2 Status Register"
bitfld.long 0x14 31. " LTCST ,Low Transfer Counter Status" "Not busy,Busy"
hexmask.long.word 0x14 12.--23. 1. " ,Current High Transfer Count Value"
hexmask.long.word 0x14 0.--11. 1. " CURR_LTC ,Current Low Transfer Count Value"
line.long 0x18 "DMA_CSR2,DMA Channel 2 Current Source Register"
line.long 0x1c "DMA_CDR2,DMA Channel 2 Current Destination Register"
group.long 0x100++0x27
line.long 0x20 "DMA_MTR2,DMA Channel 2 Mask Trigger Register"
bitfld.long 0x20 2. " STOP ,DMA Operation Stop" "No effect,Stopped"
bitfld.long 0x20 1. " CHEN ,DMA channel on/off" "Off,On"
bitfld.long 0x20 0. " SWTRIG ,DMA Software Request Trigger" "No effect,Requested"
line.long 0x24 "DMA_RSR2,DMA Channel x Request Selection Register"
bitfld.long 0x24 1.--5. " HWSRC ,DMA Hardware Source Selection Field" "USART0_TX,USART0_RX,USART1_TX,USART1_RX,USART2_TX,USART2_RX,Reserved,Reserved,Reserved,Reserved,SPI0_TX,SPI0_RX,SPI1_TX,SPI1_RX,Reserved,Reserved,Reserved,Reserved,IIC0_TX,IIC0_RX,IIC1_TX,IIC1_RX,ADC,Reserved,Reserved,Reserved,USB_EP1,USB_EP2,USB_EP3,USB_EP4,?..."
bitfld.long 0x24 0. " REQ ,Request Type Selection" "S/W request,DMA source"
group.long 0x180++0x13
line.long 0x00 "DMA_ISR3,DMA Channel 3 Initial Source Register"
line.long 0x04 "DMA_ISCR3,DMA Channel 3 Initial Source Control Register"
bitfld.long 0x04 1. " HINC ,Source Address Increment Bit for High Transfer Count" "Increment,Fixed"
bitfld.long 0x04 0. " LINC ,Source Address Increment Bit for Low Transfer Count" "Increment,Fixed"
line.long 0x08 "DMA_IDR3,DMA Channel 3 Initial Destination Register"
line.long 0x0c "DMA_IDCR3,DMA Channel 3 Initial Destination Control Register"
bitfld.long 0x0c 1. " HINC ,Destination Address Increment Bit for High Transfer Count" "Increment,Fixed"
bitfld.long 0x0c 0. " LINC ,Destination Address Increment Bit for Low Transfer Count" "Increment,Fixed"
line.long 0x10 "DMA_CR3,DMA Channel 3 Control Register"
bitfld.long 0x10 30. " TCIT ,Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
bitfld.long 0x10 29. " LTCIT ,Low Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
bitfld.long 0x10 28. " TSIZE ,Transfer Size" "DSIZE,4*DSIZE"
textline " "
bitfld.long 0x10 27. " SMODE ,Service Mode Selection" "Single Service Mode,Continuous Mode"
bitfld.long 0x10 26. " RELOAD ,Auto Reload Enable/Disable Control" "Enabled,Disabled"
bitfld.long 0x10 24.--25. " DSIZE ,Data Size Selection Field" "Byte,Half word,Word,?..."
textline " "
hexmask.long.word 0x10 12.--23. 1. " HTC ,High Transfer Count Field"
hexmask.long.word 0x10 0.--11. 1. " LTC ,Low Transfer Count Field"
rgroup.long 0x180++0x1f
line.long 0x14 "DMA_SR3,DMA Channel 3 Status Register"
bitfld.long 0x14 31. " LTCST ,Low Transfer Counter Status" "Not busy,Busy"
hexmask.long.word 0x14 12.--23. 1. " ,Current High Transfer Count Value"
hexmask.long.word 0x14 0.--11. 1. " CURR_LTC ,Current Low Transfer Count Value"
line.long 0x18 "DMA_CSR3,DMA Channel 3 Current Source Register"
line.long 0x1c "DMA_CDR3,DMA Channel 3 Current Destination Register"
group.long 0x180++0x27
line.long 0x20 "DMA_MTR3,DMA Channel 3 Mask Trigger Register"
bitfld.long 0x20 2. " STOP ,DMA Operation Stop" "No effect,Stopped"
bitfld.long 0x20 1. " CHEN ,DMA channel on/off" "Off,On"
bitfld.long 0x20 0. " SWTRIG ,DMA Software Request Trigger" "No effect,Requested"
line.long 0x24 "DMA_RSR3,DMA Channel x Request Selection Register"
bitfld.long 0x24 1.--5. " HWSRC ,DMA Hardware Source Selection Field" "USART0_TX,USART0_RX,USART1_TX,USART1_RX,USART2_TX,USART2_RX,Reserved,Reserved,Reserved,Reserved,SPI0_TX,SPI0_RX,SPI1_TX,SPI1_RX,Reserved,Reserved,Reserved,Reserved,IIC0_TX,IIC0_RX,IIC1_TX,IIC1_RX,ADC,Reserved,Reserved,Reserved,USB_EP1,USB_EP2,USB_EP3,USB_EP4,?..."
bitfld.long 0x24 0. " REQ ,Request Type Selection" "S/W request,DMA source"
group.long 0x200++0x13
line.long 0x00 "DMA_ISR4,DMA Channel 4 Initial Source Register"
line.long 0x04 "DMA_ISCR4,DMA Channel 4 Initial Source Control Register"
bitfld.long 0x04 1. " HINC ,Source Address Increment Bit for High Transfer Count" "Increment,Fixed"
bitfld.long 0x04 0. " LINC ,Source Address Increment Bit for Low Transfer Count" "Increment,Fixed"
line.long 0x08 "DMA_IDR4,DMA Channel 4 Initial Destination Register"
line.long 0x0c "DMA_IDCR4,DMA Channel 4 Initial Destination Control Register"
bitfld.long 0x0c 1. " HINC ,Destination Address Increment Bit for High Transfer Count" "Increment,Fixed"
bitfld.long 0x0c 0. " LINC ,Destination Address Increment Bit for Low Transfer Count" "Increment,Fixed"
line.long 0x10 "DMA_CR4,DMA Channel 4 Control Register"
bitfld.long 0x10 30. " TCIT ,Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
bitfld.long 0x10 29. " LTCIT ,Low Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
bitfld.long 0x10 28. " TSIZE ,Transfer Size" "DSIZE,4*DSIZE"
textline " "
bitfld.long 0x10 27. " SMODE ,Service Mode Selection" "Single Service Mode,Continuous Mode"
bitfld.long 0x10 26. " RELOAD ,Auto Reload Enable/Disable Control" "Enabled,Disabled"
bitfld.long 0x10 24.--25. " DSIZE ,Data Size Selection Field" "Byte,Half word,Word,?..."
textline " "
hexmask.long.word 0x10 12.--23. 1. " HTC ,High Transfer Count Field"
hexmask.long.word 0x10 0.--11. 1. " LTC ,Low Transfer Count Field"
rgroup.long 0x200++0x1f
line.long 0x14 "DMA_SR4,DMA Channel 4 Status Register"
bitfld.long 0x14 31. " LTCST ,Low Transfer Counter Status" "Not busy,Busy"
hexmask.long.word 0x14 12.--23. 1. " ,Current High Transfer Count Value"
hexmask.long.word 0x14 0.--11. 1. " CURR_LTC ,Current Low Transfer Count Value"
line.long 0x18 "DMA_CSR4,DMA Channel 4 Current Source Register"
line.long 0x1c "DMA_CDR4,DMA Channel 4 Current Destination Register"
group.long 0x200++0x27
line.long 0x20 "DMA_MTR4,DMA Channel 4 Mask Trigger Register"
bitfld.long 0x20 2. " STOP ,DMA Operation Stop" "No effect,Stopped"
bitfld.long 0x20 1. " CHEN ,DMA channel on/off" "Off,On"
bitfld.long 0x20 0. " SWTRIG ,DMA Software Request Trigger" "No effect,Requested"
line.long 0x24 "DMA_RSR4,DMA Channel x Request Selection Register"
bitfld.long 0x24 1.--5. " HWSRC ,DMA Hardware Source Selection Field" "USART0_TX,USART0_RX,USART1_TX,USART1_RX,USART2_TX,USART2_RX,Reserved,Reserved,Reserved,Reserved,SPI0_TX,SPI0_RX,SPI1_TX,SPI1_RX,Reserved,Reserved,Reserved,Reserved,IIC0_TX,IIC0_RX,IIC1_TX,IIC1_RX,ADC,Reserved,Reserved,Reserved,USB_EP1,USB_EP2,USB_EP3,USB_EP4,?..."
bitfld.long 0x24 0. " REQ ,Request Type Selection" "S/W request,DMA source"
group.long 0x280++0x13
line.long 0x00 "DMA_ISR5,DMA Channel 5 Initial Source Register"
line.long 0x04 "DMA_ISCR5,DMA Channel 5 Initial Source Control Register"
bitfld.long 0x04 1. " HINC ,Source Address Increment Bit for High Transfer Count" "Increment,Fixed"
bitfld.long 0x04 0. " LINC ,Source Address Increment Bit for Low Transfer Count" "Increment,Fixed"
line.long 0x08 "DMA_IDR5,DMA Channel 5 Initial Destination Register"
line.long 0x0c "DMA_IDCR5,DMA Channel 5 Initial Destination Control Register"
bitfld.long 0x0c 1. " HINC ,Destination Address Increment Bit for High Transfer Count" "Increment,Fixed"
bitfld.long 0x0c 0. " LINC ,Destination Address Increment Bit for Low Transfer Count" "Increment,Fixed"
line.long 0x10 "DMA_CR5,DMA Channel 5 Control Register"
bitfld.long 0x10 30. " TCIT ,Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
bitfld.long 0x10 29. " LTCIT ,Low Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
bitfld.long 0x10 28. " TSIZE ,Transfer Size" "DSIZE,4*DSIZE"
textline " "
bitfld.long 0x10 27. " SMODE ,Service Mode Selection" "Single Service Mode,Continuous Mode"
bitfld.long 0x10 26. " RELOAD ,Auto Reload Enable/Disable Control" "Enabled,Disabled"
bitfld.long 0x10 24.--25. " DSIZE ,Data Size Selection Field" "Byte,Half word,Word,?..."
textline " "
hexmask.long.word 0x10 12.--23. 1. " HTC ,High Transfer Count Field"
hexmask.long.word 0x10 0.--11. 1. " LTC ,Low Transfer Count Field"
rgroup.long 0x280++0x1f
line.long 0x14 "DMA_SR5,DMA Channel 5 Status Register"
bitfld.long 0x14 31. " LTCST ,Low Transfer Counter Status" "Not busy,Busy"
hexmask.long.word 0x14 12.--23. 1. " ,Current High Transfer Count Value"
hexmask.long.word 0x14 0.--11. 1. " CURR_LTC ,Current Low Transfer Count Value"
line.long 0x18 "DMA_CSR5,DMA Channel 5 Current Source Register"
line.long 0x1c "DMA_CDR5,DMA Channel 5 Current Destination Register"
group.long 0x280++0x27
line.long 0x20 "DMA_MTR5,DMA Channel 5 Mask Trigger Register"
bitfld.long 0x20 2. " STOP ,DMA Operation Stop" "No effect,Stopped"
bitfld.long 0x20 1. " CHEN ,DMA channel on/off" "Off,On"
bitfld.long 0x20 0. " SWTRIG ,DMA Software Request Trigger" "No effect,Requested"
line.long 0x24 "DMA_RSR5,DMA Channel x Request Selection Register"
bitfld.long 0x24 1.--5. " HWSRC ,DMA Hardware Source Selection Field" "USART0_TX,USART0_RX,USART1_TX,USART1_RX,USART2_TX,USART2_RX,Reserved,Reserved,Reserved,Reserved,SPI0_TX,SPI0_RX,SPI1_TX,SPI1_RX,Reserved,Reserved,Reserved,Reserved,IIC0_TX,IIC0_RX,IIC1_TX,IIC1_RX,ADC,Reserved,Reserved,Reserved,USB_EP1,USB_EP2,USB_EP3,USB_EP4,?..."
bitfld.long 0x24 0. " REQ ,Request Type Selection" "S/W request,DMA source"
rgroup.long 0x500++0x3
line.long 0x00 "DMA_IDR,DMA ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,Identification Code Register"
wgroup.long 0x504++0x3
line.long 0x00 "DMA_SRR,DMA Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
rgroup.long 0x508++0x3
line.long 0x00 "DMA_CESR,DMA Channel Enable Status Register"
bitfld.long 0x00 5. " CH5EN ,Channel 5 enable status" "Disabled,Enabled"
bitfld.long 0x00 4. " CH4EN ,Channel 4 enable status" "Disabled,Enabled"
bitfld.long 0x00 3. " CH3EN ,Channel 3 enable status" "Disabled,Enabled"
textline " "
bitfld.long 0x00 2. " CH2EN ,Channel 2 enable status" "Disabled,Enabled"
bitfld.long 0x00 1. " CH1EN ,Channel 1 enable status" "Disabled,Enabled"
bitfld.long 0x00 0. " CH0EN ,Channel 0 enable status" "Disabled,Enabled"
rgroup.long 0x50c++0x3
line.long 0x00 "DMA_ISR,DMA Interrupt Status Register"
bitfld.long 0x00 21. " CH5_TCIT ,Channel 5 transfer count interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 20. " CH4_TCIT ,Channel 4 transfer count interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 19. " CH3_TCIT ,Channel 3 transfer count interrupt status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 18. " CH2_TCIT ,Channel 2 transfer count interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 17. " CH1_TCIT ,Channel 1 transfer count interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 16. " CH0_TCIT ,Channel 0 transfer count interrupt status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 5. " CH5_LTCIT ,Channel 5 low transfer count interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 4. " CH4_LTCIT ,Channel 4 low transfer count interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 3. " CH3_LTCIT ,Channel 3 low transfer count interrupt status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 2. " CH2_LTCIT ,Channel 2 low transfer count interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 1. " CH1_LTCIT ,Channel 1 low transfer count interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 0. " CH0_LTCIT ,Channel 0 low transfer count interrupt status" "No interrupt,Interrupt"
wgroup.long 0x510++0x3
line.long 0x00 "DMA_ICR,DMA Interrupt Clear Register"
bitfld.long 0x00 5. " CH5_IT ,Channel 5 Interrupt clear" "No effect,Clear"
bitfld.long 0x00 4. " CH4_IT ,Channel 4 Interrupt clear" "No effect,Clear"
bitfld.long 0x00 3. " CH3_IT ,Channel 3 Interrupt clear" "No effect,Clear"
textline " "
bitfld.long 0x00 2. " CH2_IT ,Channel 2 Interrupt clear" "No effect,Clear"
bitfld.long 0x00 1. " CH1_IT ,Channel 1 Interrupt clear" "No effect,Clear"
bitfld.long 0x00 0. " CH0_IT ,Channel 0 Interrupt clear" "No effect,Clear"
width 0xb
tree.end
tree "Encoder Counter"
base ad:0x400C0000
width 11.
rgroup.long 0x00++0x3
line.long 0x00 "ENC_IDR,ENC ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,Identification Code Register"
sif (cpu()=="S3FN41F")
group.long 0x04++0x3
else
wgroup.long 0x04++0x3
endif
line.long 0x00 "ENC_CEDR,ENC Clock Enable/Disable Register"
bitfld.long 0x00 31. " DBGEN ,Debug Enable" "Disabled,Enabled"
bitfld.long 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
wgroup.long 0x08++0x3
line.long 0x00 "ENC_SRR,ENC Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
group.long 0x0c++0x3
line.long 0x00 "ENC_CR0,ENC Control Register 0"
bitfld.long 0x00 8.--10. " ENCCLKSEL ,Encoder Counter Clock (ENCCLK) Selection" "PCLK,PCLK/2,PCLK/4,PCLK/8,PCLK/16,PCLK/32,PCLK/64,PCLK/128"
bitfld.long 0x00 7. " PZCLEN ,Position counter (ENC_PCR) clear enable by Phase Z" "Enabled,Disabled"
bitfld.long 0x00 4.--6. " ENCFILTER ,Filter Clock Selection of Encoder counter" "ENCCLK,ENCCLK/2,ENCCLK/4,ENCCLK/8,ENCCLK/16,ENCCLK/32,ENCCLK/64,ENCCLK/128"
textline " "
bitfld.long 0x00 3. " ESELZ ,Phase Z Edge Selection" "Falling,Rising"
bitfld.long 0x00 2. " ENCEN ,Encoder Counter Block Enable" "Disabled,Enabled"
bitfld.long 0x00 1. " SPCRCL ,Speed Counter (SPCR) Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 0. " PCRCL ,Position Counter Register (PCR) Clear" "No effect,Clear"
group.long 0x10++0x3
line.long 0x00 "ENC_CR1,ENC Control Register 1"
bitfld.long 0x00 12.--15. " PRESCALEA ,Phase A Pre-scale" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--11. " ESELA ,Phase A Capture Operating Mode Selection" "Falling,Rising,Both,Both"
bitfld.long 0x00 9. " PAEN ,Phase A Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 8. " PACCRCL ,Phase A Counter Register (PACCR) Clear" "No effect,Clear"
bitfld.long 0x00 4.--7. " PRESCALEB ,Phase B Pre-scale Bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 2.--3. " ESELB ,Phase B Capture Operating Mode Selection" "Falling,Rising,Both,Both"
textline " "
bitfld.long 0x00 1. " PBEN ,Phase B Enable" "No effect,Clear"
bitfld.long 0x00 0. " PBCCRCL ,Phase B Counter Register (PBCCR) Clear" "No effect,Clear"
group.long 0x14++0x3
line.long 0x00 "ENC_SR,ENC Status Register"
bitfld.long 0x00 7. " UFSCNT ,Underflow of SCNT" "Not occurred,Occurred"
bitfld.long 0x00 6. " OFSCNT ,Overflow of SCNT" "Not occurred,Occurred"
bitfld.long 0x00 5. " UFPCNT ,Underflow of PCNT" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 4. " OFPCNT ,Overflow of PCNT" "Not occurred,Occurred"
bitfld.long 0x00 3. " PASTAT ,Phase A Status" "Low,High"
bitfld.long 0x00 2. " PBSTAT ,Phase B Status" "Low,High"
textline " "
bitfld.long 0x00 1. " GLITCH ,Glitch detection of Phase A, Phase B and Phase Z" "Not occurred,Occurred"
bitfld.long 0x00 0. " DIRECTION ,Direction of Motor Rotation" "Clockwise,Counter-clockwise"
group.long 0x18++0x3
line.long 0x00 "ENC_IMSCR,ENC Interrupt Mask Set/Clear Register"
bitfld.long 0x00 7. " PHASEZ ,Phase Z Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 5. " SCMAT ,Speed Counter Match Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 4. " PCMAT ,Position Counter Match Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 3. " PBCAP ,Phase B Capture Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 2. " PBOVF ,Phase B Counter Overflow Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 1. " PACAP ,Phase A Capture Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 0. " PAOVF ,Phase A Counter Overflow Interrupt Mask" "Masked,Not masked"
rgroup.long 0x1c++0x3
line.long 0x00 "ENC_RISR,ENC Raw Interrupt Status Register"
bitfld.long 0x00 7. " PHASEZ ,Phase Z Raw Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 5. " SCMAT ,Speed Counter Match Raw Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 4. " PCMAT ,Position Counter Match Raw Interrupt State" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 3. " PBCAP ,Phase B Capture Raw Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 2. " PBOVF ,Phase B Counter Overflow Raw Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 1. " PACAP ,Phase A Capture Raw Interrupt State" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 0. " PAOVF ,Phase A Counter Overflow Raw Interrupt State" "Not occurred,Occurred"
rgroup.long 0x20++0x3
line.long 0x00 "ENC_MISR,ENC Masked Interrupt Status Register"
bitfld.long 0x00 7. " PHASEZ ,Phase Z Masked Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 5. " SCMAT ,Speed Counter Match Masked Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 4. " PCMAT ,Position Counter Match Masked Interrupt State" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 3. " PBCAP ,Phase B Capture Masked Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 2. " PBOVF ,Phase B Counter Overflow Masked Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 1. " PACAP ,Phase A Capture Masked Interrupt State" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 0. " PAOVF ,Phase A Counter Overflow Masked Interrupt State" "Not occurred,Occurred"
wgroup.long 0x24++0x3
line.long 0x00 "ENC_ICR,ENC Interrupt Clear Register"
bitfld.long 0x00 7. " PHASEZ ,Phase Z Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 5. " SCMAT ,Speed Counter Match Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 4. " PCMAT ,Position Counter Match Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 3. " PBCAP ,Phase B Capture Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 2. " PBOVF ,Phase B Counter Overflow Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 1. " PACAP ,Phase A Capture Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 0. " PAOVF ,Phase A Counter Overflow Interrupt Clear" "No effect,Clear"
group.long 0x28++0x3
line.long 0x00 "ENC_PCR,ENC Position Counter Register"
hexmask.long.word 0x00 0.--15. 1. " PCV ,Position Counter Value"
group.long 0x2c++0x3
line.long 0x00 "ENC_PRR,ENC Position Reference Register"
hexmask.long.word 0x00 0.--15. 1. " PREFDAT ,Position Counter Reference Data Value"
group.long 0x30++0x3
line.long 0x00 "ENC_SCR,ENC Speed Counter Register"
hexmask.long.word 0x00 0.--15. 1. " SCV ,Speed Counter Value"
group.long 0x34++0x3
line.long 0x00 "ENC_SRR,ENC Speed Reference Register"
hexmask.long.word 0x00 0.--15. 1. " SREFDAT ,Speed Counter Reference Data Value"
group.long 0x38++0x3
line.long 0x00 "ENC_PACCR,ENC Phase A Capture Counter Register"
sif (cpu()=="S3FN41F")
hexmask.long.word 0x00 0.--15. 1. " PACCV ,Phase A Capture Counter Value"
else
hexmask.long.word 0x00 0.--15. 1. " PACV ,Phase A Capture Counter Value"
endif
group.long 0x3c++0x3
line.long 0x00 "ENC_PACDR,ENC Phase A Capture Data Register"
sif (cpu()=="S3FN41F")
hexmask.long.word 0x00 0.--15. 1. " PACDAT ,Phase A Capture Data Value"
else
hexmask.long.word 0x00 0.--15. 1. " PACV ,Phase A Capture Data Value"
endif
group.long 0x40++0x3
line.long 0x00 "ENC_PBCCR,ENC Phase B Capture Counter Register"
sif (cpu()=="S3FN41F")
hexmask.long.word 0x00 0.--15. 1. " PBCCV ,Phase B Counter Value"
else
hexmask.long.word 0x00 0.--15. 1. " PBCV ,Phase B Counter Value"
endif
group.long 0x44++0x3
line.long 0x00 "ENC_PBCDR,ENC Phase B Capture Data Register"
hexmask.long.word 0x00 0.--15. 1. " PBCDAT ,Phase B Capture Data Value"
width 0xb
tree.end
tree "Free Running Timer"
base ad:0x40031000
width 11.
rgroup.long 0x00++0x3
line.long 0x00 "FRT_IDR,Free Running Timer ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x3
line.long 0x00 "FRT_CEDR,Free Running Timer Clock Enable/Disable Register"
bitfld.long 0x00 31. " DBGEN ,Debug Enable" "Disabled,Enabled"
bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable" "Disabled,Enabled"
wgroup.long 0x08++0x3
line.long 0x00 "FRT_SRR,Free Running Timer Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
group.long 0x0c++0x3
line.long 0x00 "FRT_CR,Free Running Timer Control Register"
hexmask.long.word 0x00 16.--31. 1. " CDIV ,Clock Divider Field"
bitfld.long 0x00 8.--12. " FRTSIZE ,Free Running Timer Bit Size Selection Field" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,32-bit"
bitfld.long 0x00 0. " START ,START/STOP Control" "Stop,Start"
rgroup.long 0x10++0x3
line.long 0x00 "FRT_SR,Free Running Timer Status Register"
bitfld.long 0x00 0. " SWRST ,Software Release Status" "No reset,Reset"
group.long 0x14++0x3
line.long 0x00 "FRT_IMSCR,Free Running Timer Interrupt Mask Set/Clear Register"
bitfld.long 0x00 2. " MATCH ,Match Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 0. " OVF ,Overflow Interrupt Mask" "Masked,Not masked"
rgroup.long 0x18++0x3
line.long 0x00 "FRT_RISR,Free Running Timer Raw Interrupt Status Register"
bitfld.long 0x00 2. " MATCH ,Match Raw Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 0. " OVF ,Overflow Raw Interrupt State" "Not occurred,Occurred"
rgroup.long 0x1c++0x3
line.long 0x00 "FRT_MISR,Free RunningTimer Masked Interrupt Status Register"
bitfld.long 0x00 2. " MATCH ,Match Masked Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 0. " OVF ,Overflow Masked Interrupt State" "Not occurred,Occurred"
wgroup.long 0x20++0x3
line.long 0x00 "FRT_ICR,Free Running Timer Interrupt Clear Register"
bitfld.long 0x00 2. " MATCH ,Match Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 0. " OVF ,Overflow Interrupt Clear" "No effect,Clear"
group.long 0x24++0x3
line.long 0x00 "FRT_DR,Free Running Timer Data Register"
hexmask.long 0x00 0.--31. 1. " DATA ,DATA for Match"
rgroup.long 0x28++0x3
line.long 0x00 "FRT_DBR,Free Running Timer Data Buffer Register"
hexmask.long 0x00 0.--31. 1. " DATA ,DATA for Match"
rgroup.long 0x2c++0x3
line.long 0x00 "FRT_CVR,Free Running Timer Counter Value Register"
hexmask.long 0x00 0.--31. 1. " COUNT ,COUNT Value"
width 0xb
tree.end
tree.open "General Purpose IO (GPIO)"
tree "Port 0"
base ad:0x40050000
width 11.
rgroup.long 0x00++0x3
line.long 0x00 "GPIO_IDR,GPIO ID Code Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,Identification Code Register"
group.long 0x04++0x3
line.long 0x00 "GPIO_CEDR,GPIO Clock Enable Disable Register"
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable" "Disabled,Enabled"
wgroup.long 0x08++0x3
line.long 0x00 "GPIO_SRR,GPIO Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
group.long 0x0c++0x3
line.long 0x00 "GPIO_IMSCR,GPIO Interrupt Mask Set/Clear Register"
bitfld.long 0x00 31. " P31 ,Port 31 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 30. " P30 ,Port 30 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 29. " P29 ,Port 29 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 28. " P28 ,Port 28 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 27. " P27 ,Port 27 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 26. " P26 ,Port 26 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 25. " P25 ,Port 25 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 24. " P24 ,Port 24 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 23. " P23 ,Port 23 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 22. " P22 ,Port 22 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 21. " P21 ,Port 21 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 20. " P20 ,Port 20 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 19. " P19 ,Port 19 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 18. " P18 ,Port 18 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 17. " P17 ,Port 17 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 16. " P16 ,Port 16 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 15. " P15 ,Port 15 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 14. " P14 ,Port 14 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 13. " P13 ,Port 13 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 12. " P12 ,Port 12 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 11. " P11 ,Port 11 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 10. " P10 ,Port 10 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 9. " P9 ,Port 9 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 8. " P8 ,Port 8 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 7. " P7 ,Port 7 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 6. " P6 ,Port 6 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 5. " P5 ,Port 5 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 4. " P4 ,Port 4 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 3. " P3 ,Port 3 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 2. " P2 ,Port 2 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 1. " P1 ,Port 1 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 0. " P0 ,Port 0 Interrupt Mask" "Masked,Not masked"
rgroup.long 0x10++0x3
line.long 0x00 "GPIO_RISR,GPIO Raw Interrupt Status Register"
bitfld.long 0x00 31. " P31 ,Port 31 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 30. " P30 ,Port 30 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 29. " P29 ,Port 29 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 28. " P28 ,Port 28 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 27. " P27 ,Port 27 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 26. " P26 ,Port 26 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 25. " P25 ,Port 25 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 24. " P24 ,Port 24 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 23. " P23 ,Port 23 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 22. " P22 ,Port 22 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 21. " P21 ,Port 21 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 20. " P20 ,Port 20 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 19. " P19 ,Port 19 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 18. " P18 ,Port 18 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 17. " P17 ,Port 17 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 16. " P16 ,Port 16 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 15. " P15 ,Port 15 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 14. " P14 ,Port 14 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 13. " P13 ,Port 13 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 12. " P12 ,Port 12 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 11. " P11 ,Port 11 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 10. " P10 ,Port 10 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 9. " P9 ,Port 9 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 8. " P8 ,Port 8 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 7. " P7 ,Port 7 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 6. " P6 ,Port 6 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 5. " P5 ,Port 5 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 4. " P4 ,Port 4 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 3. " P3 ,Port 3 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 2. " P2 ,Port 2 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 1. " P1 ,Port 1 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 0. " P0 ,Port 0 Raw Interrupt Status" "Not occurred,Occurred"
rgroup.long 0x14++0x3
line.long 0x00 "GPIO_MISR,GPIO Masked Interrupt Status Register"
bitfld.long 0x00 31. " P31 ,Port 31 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 30. " P30 ,Port 30 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 29. " P29 ,Port 29 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 28. " P28 ,Port 28 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 27. " P27 ,Port 27 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 26. " P26 ,Port 26 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 25. " P25 ,Port 25 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 24. " P24 ,Port 24 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 23. " P23 ,Port 23 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 22. " P22 ,Port 22 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 21. " P21 ,Port 21 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 20. " P20 ,Port 20 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 19. " P19 ,Port 19 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 18. " P18 ,Port 18 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 17. " P17 ,Port 17 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 16. " P16 ,Port 16 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 15. " P15 ,Port 15 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 14. " P14 ,Port 14 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 13. " P13 ,Port 13 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 12. " P12 ,Port 12 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 11. " P11 ,Port 11 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 10. " P10 ,Port 10 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 9. " P9 ,Port 9 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 8. " P8 ,Port 8 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 7. " P7 ,Port 7 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 6. " P6 ,Port 6 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 5. " P5 ,Port 5 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 4. " P4 ,Port 4 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 3. " P3 ,Port 3 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 2. " P2 ,Port 2 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 1. " P1 ,Port 1 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 0. " P0 ,Port 0 Masked Interrupt Status" "Not occurred,Occurred"
wgroup.long 0x18++0x3
line.long 0x00 "GPIO_ICR,GPIO Interrupt Clear Register"
bitfld.long 0x00 31. " P31 ,Port 31 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 30. " P30 ,Port 30 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 29. " P29 ,Port 29 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 28. " P28 ,Port 28 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 27. " P27 ,Port 27 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 26. " P26 ,Port 26 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 25. " P25 ,Port 25 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 24. " P24 ,Port 24 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 23. " P23 ,Port 23 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 22. " P22 ,Port 22 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 21. " P21 ,Port 21 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 20. " P20 ,Port 20 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 19. " P19 ,Port 19 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 18. " P18 ,Port 18 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 17. " P17 ,Port 17 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 16. " P16 ,Port 16 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 15. " P15 ,Port 15 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 14. " P14 ,Port 14 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 13. " P13 ,Port 13 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 12. " P12 ,Port 12 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 11. " P11 ,Port 11 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 10. " P10 ,Port 10 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 9. " P9 ,Port 9 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 8. " P8 ,Port 8 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 7. " P7 ,Port 7 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 6. " P6 ,Port 6 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 5. " P5 ,Port 5 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 4. " P4 ,Port 4 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 3. " P3 ,Port 3 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 2. " P2 ,Port 2 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 1. " P1 ,Port 1 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 0. " P0 ,Port 0 Interrupt Clear" "No effect,Clear"
group.long 0x24++0x3
line.long 0x00 "GPIO_OSR,GPIO Output Status Register"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,Port 31 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,Port 30 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,Port 29 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,Port 28 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,Port 27 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,Port 26 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,Port 25 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,Port 24 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,Port 23 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,Port 22 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,Port 21 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,Port 20 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,Port 19 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,Port 18 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,Port 17 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,Port 16 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,Port 15 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,Port 14 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,Port 13 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,Port 12 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,Port 11 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,Port 10 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,Port 9 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,Port 8 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,Port 7 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,Port 6 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,Port 5 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,Port 4 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,Port 3 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,Port 2 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,Port 1 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,Port 0 Data Direction(Input or Output) Status" "Input,Output"
wgroup.long 0x28++0x3
line.long 0x00 "GPIO_WODR,GPIO Write Output Data Register"
bitfld.long 0x00 31. " P31 ,Port 31 Output Data Control" "Low,High"
bitfld.long 0x00 30. " P30 ,Port 30 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 29. " P29 ,Port 29 Output Data Control" "Low,High"
bitfld.long 0x00 28. " P28 ,Port 28 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 27. " P27 ,Port 27 Output Data Control" "Low,High"
bitfld.long 0x00 26. " P26 ,Port 26 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 25. " P25 ,Port 25 Output Data Control" "Low,High"
bitfld.long 0x00 24. " P24 ,Port 24 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 23. " P23 ,Port 23 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 22. " P22 ,Port 22 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 21. " P21 ,Port 21 Output Data Control" "Low,High"
bitfld.long 0x00 20. " P20 ,Port 20 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 19. " P19 ,Port 19 Output Data Control" "Low,High"
bitfld.long 0x00 18. " P18 ,Port 18 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 17. " P17 ,Port 17 Output Data Control" "Low,High"
bitfld.long 0x00 16. " P16 ,Port 16 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 15. " P15 ,Port 15 Output Data Control" "Low,High"
bitfld.long 0x00 14. " P14 ,Port 14 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 13. " P13 ,Port 13 Output Data Control" "Low,High"
bitfld.long 0x00 12. " P12 ,Port 12 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 11. " P11 ,Port 11 Output Data Control" "Low,High"
bitfld.long 0x00 10. " P10 ,Port 10 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 9. " P9 ,Port 9 Output Data Control" "Low,High"
bitfld.long 0x00 8. " P8 ,Port 8 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 7. " P7 ,Port 7 Output Data Control" "Low,High"
bitfld.long 0x00 6. " P6 ,Port 6 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 5. " P5 ,Port 5 Output Data Control" "Low,High"
bitfld.long 0x00 4. " P4 ,Port 4 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 3. " P3 ,Port 3 Output Data Control" "Low,High"
bitfld.long 0x00 2. " P2 ,Port 2 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 1. " P1 ,Port 1 Output Data Control" "Low,High"
bitfld.long 0x00 0. " P0 ,Port 0 Output Data Control" "Low,High"
group.long 0x34++0x3
line.long 0x00 "GPIO_ODSR,GPIO Output Data Status Register"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,Port 31 Output Data Status" "Low,High"
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,Port 30 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,Port 29 Output Data Status" "Low,High"
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,Port 28 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,Port 27 Output Data Status" "Low,High"
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,Port 26 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,Port 25 Output Data Status" "Low,High"
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,Port 24 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,Port 23 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,Port 22 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,Port 21 Output Data Status" "Low,High"
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,Port 20 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,Port 19 Output Data Status" "Low,High"
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,Port 18 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,Port 17 Output Data Status" "Low,High"
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,Port 16 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,Port 15 Output Data Status" "Low,High"
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,Port 14 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,Port 13 Output Data Status" "Low,High"
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,Port 12 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,Port 11 Output Data Status" "Low,High"
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,Port 10 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,Port 9 Output Data Status" "Low,High"
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,Port 8 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,Port 7 Output Data Status" "Low,High"
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,Port 6 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,Port 5 Output Data Status" "Low,High"
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,Port 4 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,Port 3 Output Data Status" "Low,High"
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,Port 2 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,Port 1 Output Data Status" "Low,High"
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,Port 0 Output Data Status" "Low,High"
rgroup.long 0x38++0x3
line.long 0x00 "GPIO_PDSR,GPIO Pin Data Status Register"
bitfld.long 0x00 31. " P31 ,Port 31 Pin Status" "Low,High"
bitfld.long 0x00 30. " P30 ,Port 30 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 29. " P29 ,Port 29 Pin Status" "Low,High"
bitfld.long 0x00 28. " P28 ,Port 28 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 27. " P27 ,Port 27 Pin Status" "Low,High"
bitfld.long 0x00 26. " P26 ,Port 26 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 25. " P25 ,Port 25 Pin Status" "Low,High"
bitfld.long 0x00 24. " P24 ,Port 24 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 23. " P23 ,Port 23 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 22. " P22 ,Port 22 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 21. " P21 ,Port 21 Pin Status" "Low,High"
bitfld.long 0x00 20. " P20 ,Port 20 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 19. " P19 ,Port 19 Pin Status" "Low,High"
bitfld.long 0x00 18. " P18 ,Port 18 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 17. " P17 ,Port 17 Pin Status" "Low,High"
bitfld.long 0x00 16. " P16 ,Port 16 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 15. " P15 ,Port 15 Pin Status" "Low,High"
bitfld.long 0x00 14. " P14 ,Port 14 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 13. " P13 ,Port 13 Pin Status" "Low,High"
bitfld.long 0x00 12. " P12 ,Port 12 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 11. " P11 ,Port 11 Pin Status" "Low,High"
bitfld.long 0x00 10. " P10 ,Port 10 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 9. " P9 ,Port 9 Pin Status" "Low,High"
bitfld.long 0x00 8. " P8 ,Port 8 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 7. " P7 ,Port 7 Pin Status" "Low,High"
bitfld.long 0x00 6. " P6 ,Port 6 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 5. " P5 ,Port 5 Pin Status" "Low,High"
bitfld.long 0x00 4. " P4 ,Port 4 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 3. " P3 ,Port 3 Pin Status" "Low,High"
bitfld.long 0x00 2. " P2 ,Port 2 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 1. " P1 ,Port 1 Pin Status" "Low,High"
bitfld.long 0x00 0. " P0 ,Port 0 Pin Status" "Low,High"
width 0xb
tree.end
tree "Port 1"
base ad:0x40051000
width 11.
rgroup.long 0x00++0x3
line.long 0x00 "GPIO_IDR,GPIO ID Code Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,Identification Code Register"
group.long 0x04++0x3
line.long 0x00 "GPIO_CEDR,GPIO Clock Enable Disable Register"
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable" "Disabled,Enabled"
wgroup.long 0x08++0x3
line.long 0x00 "GPIO_SRR,GPIO Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
group.long 0x0c++0x3
line.long 0x00 "GPIO_IMSCR,GPIO Interrupt Mask Set/Clear Register"
bitfld.long 0x00 22. " P22 ,Port 22 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 21. " P21 ,Port 21 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 20. " P20 ,Port 20 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 19. " P19 ,Port 19 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 18. " P18 ,Port 18 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 17. " P17 ,Port 17 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 16. " P16 ,Port 16 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 15. " P15 ,Port 15 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 14. " P14 ,Port 14 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 13. " P13 ,Port 13 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 12. " P12 ,Port 12 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 11. " P11 ,Port 11 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 10. " P10 ,Port 10 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 9. " P9 ,Port 9 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 8. " P8 ,Port 8 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 7. " P7 ,Port 7 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 6. " P6 ,Port 6 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 5. " P5 ,Port 5 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 4. " P4 ,Port 4 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 3. " P3 ,Port 3 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 2. " P2 ,Port 2 Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 1. " P1 ,Port 1 Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 0. " P0 ,Port 0 Interrupt Mask" "Masked,Not masked"
rgroup.long 0x10++0x3
line.long 0x00 "GPIO_RISR,GPIO Raw Interrupt Status Register"
bitfld.long 0x00 22. " P22 ,Port 22 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 21. " P21 ,Port 21 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 20. " P20 ,Port 20 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 19. " P19 ,Port 19 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 18. " P18 ,Port 18 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 17. " P17 ,Port 17 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 16. " P16 ,Port 16 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 15. " P15 ,Port 15 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 14. " P14 ,Port 14 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 13. " P13 ,Port 13 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 12. " P12 ,Port 12 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 11. " P11 ,Port 11 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 10. " P10 ,Port 10 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 9. " P9 ,Port 9 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 8. " P8 ,Port 8 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 7. " P7 ,Port 7 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 6. " P6 ,Port 6 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 5. " P5 ,Port 5 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 4. " P4 ,Port 4 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 3. " P3 ,Port 3 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 2. " P2 ,Port 2 Raw Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 1. " P1 ,Port 1 Raw Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 0. " P0 ,Port 0 Raw Interrupt Status" "Not occurred,Occurred"
rgroup.long 0x14++0x3
line.long 0x00 "GPIO_MISR,GPIO Masked Interrupt Status Register"
bitfld.long 0x00 22. " P22 ,Port 22 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 21. " P21 ,Port 21 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 20. " P20 ,Port 20 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 19. " P19 ,Port 19 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 18. " P18 ,Port 18 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 17. " P17 ,Port 17 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 16. " P16 ,Port 16 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 15. " P15 ,Port 15 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 14. " P14 ,Port 14 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 13. " P13 ,Port 13 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 12. " P12 ,Port 12 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 11. " P11 ,Port 11 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 10. " P10 ,Port 10 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 9. " P9 ,Port 9 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 8. " P8 ,Port 8 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 7. " P7 ,Port 7 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 6. " P6 ,Port 6 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 5. " P5 ,Port 5 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 4. " P4 ,Port 4 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 3. " P3 ,Port 3 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 2. " P2 ,Port 2 Masked Interrupt Status" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 1. " P1 ,Port 1 Masked Interrupt Status" "Not occurred,Occurred"
bitfld.long 0x00 0. " P0 ,Port 0 Masked Interrupt Status" "Not occurred,Occurred"
wgroup.long 0x18++0x3
line.long 0x00 "GPIO_ICR,GPIO Interrupt Clear Register"
bitfld.long 0x00 22. " P22 ,Port 22 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 21. " P21 ,Port 21 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 20. " P20 ,Port 20 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 19. " P19 ,Port 19 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 18. " P18 ,Port 18 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 17. " P17 ,Port 17 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 16. " P16 ,Port 16 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 15. " P15 ,Port 15 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 14. " P14 ,Port 14 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 13. " P13 ,Port 13 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 12. " P12 ,Port 12 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 11. " P11 ,Port 11 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 10. " P10 ,Port 10 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 9. " P9 ,Port 9 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 8. " P8 ,Port 8 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 7. " P7 ,Port 7 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 6. " P6 ,Port 6 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 5. " P5 ,Port 5 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 4. " P4 ,Port 4 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 3. " P3 ,Port 3 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 2. " P2 ,Port 2 Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 1. " P1 ,Port 1 Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 0. " P0 ,Port 0 Interrupt Clear" "No effect,Clear"
group.long 0x24++0x3
line.long 0x00 "GPIO_OSR,GPIO Output Status Register"
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,Port 22 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,Port 21 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,Port 20 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,Port 19 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,Port 18 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,Port 17 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,Port 16 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,Port 15 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,Port 14 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,Port 13 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,Port 12 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,Port 11 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,Port 10 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,Port 9 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,Port 8 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,Port 7 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,Port 6 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,Port 5 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,Port 4 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,Port 3 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,Port 2 Data Direction(Input or Output) Status" "Input,Output"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,Port 1 Data Direction(Input or Output) Status" "Input,Output"
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,Port 0 Data Direction(Input or Output) Status" "Input,Output"
wgroup.long 0x28++0x3
line.long 0x00 "GPIO_WODR,GPIO Write Output Data Register"
bitfld.long 0x00 22. " P22 ,Port 22 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 21. " P21 ,Port 21 Output Data Control" "Low,High"
bitfld.long 0x00 20. " P20 ,Port 20 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 19. " P19 ,Port 19 Output Data Control" "Low,High"
bitfld.long 0x00 18. " P18 ,Port 18 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 17. " P17 ,Port 17 Output Data Control" "Low,High"
bitfld.long 0x00 16. " P16 ,Port 16 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 15. " P15 ,Port 15 Output Data Control" "Low,High"
bitfld.long 0x00 14. " P14 ,Port 14 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 13. " P13 ,Port 13 Output Data Control" "Low,High"
bitfld.long 0x00 12. " P12 ,Port 12 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 11. " P11 ,Port 11 Output Data Control" "Low,High"
bitfld.long 0x00 10. " P10 ,Port 10 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 9. " P9 ,Port 9 Output Data Control" "Low,High"
bitfld.long 0x00 8. " P8 ,Port 8 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 7. " P7 ,Port 7 Output Data Control" "Low,High"
bitfld.long 0x00 6. " P6 ,Port 6 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 5. " P5 ,Port 5 Output Data Control" "Low,High"
bitfld.long 0x00 4. " P4 ,Port 4 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 3. " P3 ,Port 3 Output Data Control" "Low,High"
bitfld.long 0x00 2. " P2 ,Port 2 Output Data Control" "Low,High"
textline " "
bitfld.long 0x00 1. " P1 ,Port 1 Output Data Control" "Low,High"
bitfld.long 0x00 0. " P0 ,Port 0 Output Data Control" "Low,High"
group.long 0x34++0x3
line.long 0x00 "GPIO_ODSR,GPIO Output Data Status Register"
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,Port 22 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,Port 21 Output Data Status" "Low,High"
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,Port 20 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,Port 19 Output Data Status" "Low,High"
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,Port 18 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,Port 17 Output Data Status" "Low,High"
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,Port 16 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,Port 15 Output Data Status" "Low,High"
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,Port 14 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,Port 13 Output Data Status" "Low,High"
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,Port 12 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,Port 11 Output Data Status" "Low,High"
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,Port 10 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,Port 9 Output Data Status" "Low,High"
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,Port 8 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,Port 7 Output Data Status" "Low,High"
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,Port 6 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,Port 5 Output Data Status" "Low,High"
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,Port 4 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,Port 3 Output Data Status" "Low,High"
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,Port 2 Output Data Status" "Low,High"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,Port 1 Output Data Status" "Low,High"
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,Port 0 Output Data Status" "Low,High"
rgroup.long 0x38++0x3
line.long 0x00 "GPIO_PDSR,GPIO Pin Data Status Register"
bitfld.long 0x00 22. " P22 ,Port 22 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 21. " P21 ,Port 21 Pin Status" "Low,High"
bitfld.long 0x00 20. " P20 ,Port 20 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 19. " P19 ,Port 19 Pin Status" "Low,High"
bitfld.long 0x00 18. " P18 ,Port 18 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 17. " P17 ,Port 17 Pin Status" "Low,High"
bitfld.long 0x00 16. " P16 ,Port 16 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 15. " P15 ,Port 15 Pin Status" "Low,High"
bitfld.long 0x00 14. " P14 ,Port 14 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 13. " P13 ,Port 13 Pin Status" "Low,High"
bitfld.long 0x00 12. " P12 ,Port 12 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 11. " P11 ,Port 11 Pin Status" "Low,High"
bitfld.long 0x00 10. " P10 ,Port 10 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 9. " P9 ,Port 9 Pin Status" "Low,High"
bitfld.long 0x00 8. " P8 ,Port 8 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 7. " P7 ,Port 7 Pin Status" "Low,High"
bitfld.long 0x00 6. " P6 ,Port 6 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 5. " P5 ,Port 5 Pin Status" "Low,High"
bitfld.long 0x00 4. " P4 ,Port 4 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 3. " P3 ,Port 3 Pin Status" "Low,High"
bitfld.long 0x00 2. " P2 ,Port 2 Pin Status" "Low,High"
textline " "
bitfld.long 0x00 1. " P1 ,Port 1 Pin Status" "Low,High"
bitfld.long 0x00 0. " P0 ,Port 0 Pin Status" "Low,High"
width 0xb
tree.end
tree.end
tree.open "Inter-Integrated Circuit (IIC)"
tree "I2C0"
base ad:0x400A0000
width 11.
rgroup.long 0x00++0x3
line.long 0x00 "I2C_IDR,IIC ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x3
line.long 0x00 "I2C_CEDR,IIC Clock Enable/Disable Register"
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable Control" "Disabled,Enabled"
wgroup.long 0x08++0x3
line.long 0x00 "I2C_SRR,IIC Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
group.long 0x0c++0x3
line.long 0x00 "I2C_CR,IIC Control Register"
bitfld.long 0x00 8. " ENA ,I2C Enable" "Disabled,Enabled"
bitfld.long 0x00 3. " STA ,I2C Start" "Slave,Master"
bitfld.long 0x00 2. " STO ,I2C Stop" "No stop,Stop"
textline " "
bitfld.long 0x00 1. " AA ,I2C Acknowledge" "No acknowledge,Acknowledge"
group.long 0x10++0x3
line.long 0x00 "I2C_MR,IIC Mode Register"
bitfld.long 0x00 12. " FAST ,Fast mode" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. " PRV ,Pre-scalar value"
rgroup.long 0x14++0x3
line.long 0x00 "I2C_SR,I2C Status Register"
hexmask.long.byte 0x00 3.--7. 1. " SR ,I2C status code"
group.long 0x18++0x3
line.long 0x00 "I2C_IMSCR,IIC Interrupt Mask Set/Clear Register"
bitfld.long 0x00 4. " SI ,SI interrupt enable mask" "Masked,Not masked"
rgroup.long 0x1c++0x3
line.long 0x00 "I2C_RISR,IIC Raw Interrupt Status Register"
bitfld.long 0x00 4. " SI ,SI Raw Interrupt State" "Not occurred,Occurred"
rgroup.long 0x20++0x3
line.long 0x00 "I2C_MISR,IIC Masked Interrupt Status Register"
bitfld.long 0x00 4. " SI ,SI Masked Interrupt State" "Not occurred,Occurred"
wgroup.long 0x24++0x3
line.long 0x00 "I2C_ICR,IIC Interrupt Clear Register"
bitfld.long 0x00 4. " SI ,SI Interrupt Clear" "No effect,Clear"
group.long 0x28++0x3
line.long 0x00 "I2C_SDR,IIC Serial Data Register"
hexmask.long.byte 0x00 0.--7. 1. " DAT ,I2C Data"
group.long 0x2c++0x3
line.long 0x00 "I2C_SSAR,IIC Serial Slave Address Register"
hexmask.long.byte 0x00 1.--7. 2. " ADR ,I2C Address"
bitfld.long 0x00 0. " GC ,General Call" "Disabled,Enabled"
group.long 0x30++0x3
line.long 0x00 "I2C_HSDR,IIC Hold/Setup Delay Register"
hexmask.long.byte 0x00 0.--7. 1. " DL ,Hold/setup delay"
group.long 0x34++0x3
line.long 0x00 "I2C_DMACR,IIC DMA Control Register"
bitfld.long 0x00 1. " TXDMAE ,DMA for the transmit Enable/Disable Control" "Disabled,Enabled"
bitfld.long 0x00 0. " RXDMAE ,DMA for the receive Enable/Disable Control" "Disabled,Enabled"
width 0xb
tree.end
tree "I2C1"
base ad:0x400A1000
width 11.
rgroup.long 0x00++0x3
line.long 0x00 "I2C_IDR,IIC ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x3
line.long 0x00 "I2C_CEDR,IIC Clock Enable/Disable Register"
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable Control" "Disabled,Enabled"
wgroup.long 0x08++0x3
line.long 0x00 "I2C_SRR,IIC Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
group.long 0x0c++0x3
line.long 0x00 "I2C_CR,IIC Control Register"
bitfld.long 0x00 8. " ENA ,I2C Enable" "Disabled,Enabled"
bitfld.long 0x00 3. " STA ,I2C Start" "Slave,Master"
bitfld.long 0x00 2. " STO ,I2C Stop" "No stop,Stop"
textline " "
bitfld.long 0x00 1. " AA ,I2C Acknowledge" "No acknowledge,Acknowledge"
group.long 0x10++0x3
line.long 0x00 "I2C_MR,IIC Mode Register"
bitfld.long 0x00 12. " FAST ,Fast mode" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. " PRV ,Pre-scalar value"
rgroup.long 0x14++0x3
line.long 0x00 "I2C_SR,I2C Status Register"
hexmask.long.byte 0x00 3.--7. 1. " SR ,I2C status code"
group.long 0x18++0x3
line.long 0x00 "I2C_IMSCR,IIC Interrupt Mask Set/Clear Register"
bitfld.long 0x00 4. " SI ,SI interrupt enable mask" "Masked,Not masked"
rgroup.long 0x1c++0x3
line.long 0x00 "I2C_RISR,IIC Raw Interrupt Status Register"
bitfld.long 0x00 4. " SI ,SI Raw Interrupt State" "Not occurred,Occurred"
rgroup.long 0x20++0x3
line.long 0x00 "I2C_MISR,IIC Masked Interrupt Status Register"
bitfld.long 0x00 4. " SI ,SI Masked Interrupt State" "Not occurred,Occurred"
wgroup.long 0x24++0x3
line.long 0x00 "I2C_ICR,IIC Interrupt Clear Register"
bitfld.long 0x00 4. " SI ,SI Interrupt Clear" "No effect,Clear"
group.long 0x28++0x3
line.long 0x00 "I2C_SDR,IIC Serial Data Register"
hexmask.long.byte 0x00 0.--7. 1. " DAT ,I2C Data"
group.long 0x2c++0x3
line.long 0x00 "I2C_SSAR,IIC Serial Slave Address Register"
hexmask.long.byte 0x00 1.--7. 2. " ADR ,I2C Address"
bitfld.long 0x00 0. " GC ,General Call" "Disabled,Enabled"
group.long 0x30++0x3
line.long 0x00 "I2C_HSDR,IIC Hold/Setup Delay Register"
hexmask.long.byte 0x00 0.--7. 1. " DL ,Hold/setup delay"
group.long 0x34++0x3
line.long 0x00 "I2C_DMACR,IIC DMA Control Register"
bitfld.long 0x00 1. " TXDMAE ,DMA for the transmit Enable/Disable Control" "Disabled,Enabled"
bitfld.long 0x00 0. " RXDMAE ,DMA for the receive Enable/Disable Control" "Disabled,Enabled"
width 0xb
tree.end
tree.end
tree "Flash Controller (IFC)"
base ad:0x40010000
width 10.
rgroup.long 0x00++0x3
line.long 0x00 "PF_IDR,ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE[25:0] ,Identification Code Register"
group.long 0x04++0x3
line.long 0x00 "PF_CEDR,Clock Enable/Disable Register"
bitfld.long 0x00 0. " CKEN ,Clock Enable" "Disabled,Enabled"
wgroup.long 0x08++0x3
line.long 0x00 "PF_SRR,Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
group.long 0x0c++0x3
line.long 0x00 "PF_CR,Control Register"
bitfld.long 0x00 4.--6. " CMD[3:0] ,Flash Program/Erase Command Field" "No effect,Normal program,Page erase,Sector erase,Entire flash erase,Smart option program,Smart option erase,?..."
bitfld.long 0x00 0. " START ,Operation Start" "No effect,Start"
group.long 0x10++0x3
line.long 0x00 "PF_MR,Mode Register"
bitfld.long 0x00 7. " FSMODE ,Flash Speed Mode Selection" "Normal,High"
bitfld.long 0x00 0. " BACEN ,Flash Speed Mode Selection" "Disabled,Enabled"
group.long 0x14++0x3
line.long 0x00 "PF_IMSCR,Interrupt Mask Set/Clear Register"
bitfld.long 0x00 10. " ERR2 ,ERR2 interrupt mask" "Masked,Not masked"
bitfld.long 0x00 9. " ERR1 ,ERR1 interrupt mask" "Masked,Not masked"
bitfld.long 0x00 8. " ERR0 ,ERR0 interrupt mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 0. " END ,END interrupt mask" "Masked,Not masked"
rgroup.long 0x18++0x3
line.long 0x00 "PF_RISR,Raw Interrupt Status Register"
bitfld.long 0x00 10. " ERR2 ,ERR2 raw interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 9. " ERR1 ,ERR1 raw interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 8. " ERR0 ,ERR0 raw interrupt status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " END ,END raw interrupt status" "No interrupt,Interrupt"
rgroup.long 0x1c++0x3
line.long 0x00 "PF_MISR,Masked Interrupt Status Register"
bitfld.long 0x00 10. " ERR2 ,ERR2 masked interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 9. " ERR1 ,ERR1 masked interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 8. " ERR0 ,ERR0 masked interrupt status" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " END ,END masked interrupt status" "No interrupt,Interrupt"
wgroup.long 0x20++0x3
line.long 0x00 "PF_ICR,Interrupt Clear Register"
bitfld.long 0x00 10. " ERR2 ,ERR Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 9. " ERR1 ,ERR Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 8. " ERR0 ,ERR Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 0. " END ,END Interrupt Clear" "No effect,Clear"
rgroup.long 0x24++0x3
line.long 0x00 "PF_SR,Address Register"
bitfld.long 0x00 0. " BUSY ,Busy Status Flag" "Not busy,Busy"
group.long 0x28++0x3
line.long 0x00 "PF_AR,Address Register"
group.long 0x2c++0x3
line.long 0x00 "PF_DR,Data Register"
wgroup.long 0x30++0x3
line.long 0x00 "PF_KR,Key Register"
rgroup.long 0x34++0x3
line.long 0x00 "SO_PSR,Smart Option Protection Status Register"
bitfld.long 0x00 31. " HWPA15 ,Hardware Protection Area" "Protected,Not protected"
bitfld.long 0x00 30. " HWPA14 ,Hardware Protection Area" "Protected,Not protected"
bitfld.long 0x00 29. " HWPA13 ,Hardware Protection Area" "Protected,Not protected"
textline " "
bitfld.long 0x00 28. " HWPA12 ,Hardware Protection Area" "Protected,Not protected"
bitfld.long 0x00 27. " NSRP ,Serial Read Protection Status Flag" "Enabled,Disabled"
bitfld.long 0x00 23. " HWPA11 ,Hardware Protection Area" "Protected,Not protected"
textline " "
bitfld.long 0x00 22. " HWPA10 ,Hardware Protection Area" "Protected,Not protected"
bitfld.long 0x00 21. " HWPA9 ,Hardware Protection Area" "Protected,Not protected"
bitfld.long 0x00 20. " HWPA8 ,Hardware Protection Area" "Protected,Not protected"
textline " "
bitfld.long 0x00 17. " NHWP ,Hardware Protection Status Flag" "Enabled,Disabled"
bitfld.long 0x00 15. " HWPA7 ,Hardware Protection Area" "Protected,Not protected"
bitfld.long 0x00 14. " HWPA6 ,Hardware Protection Area" "Protected,Not protected"
textline " "
bitfld.long 0x00 13. " HWPA5 ,Hardware Protection Area" "Protected,Not protected"
bitfld.long 0x00 12. " HWPA4 ,Hardware Protection Area" "Protected,Not protected"
bitfld.long 0x00 8. " nJTAGP ,SWD(Debug Interface) Protection Status Flag" "Enabled,Disabled"
textline " "
bitfld.long 0x00 7. " HWPA3 ,Hardware Protection Area" "Protected,Not protected"
bitfld.long 0x00 6. " HWPA2 ,Hardware Protection Area" "Protected,Not protected"
bitfld.long 0x00 5. " HWPA1 ,Hardware Protection Area" "Protected,Not protected"
textline " "
bitfld.long 0x00 4. " HWPA0 ,Hardware Protection Area" "Protected,Not protected"
rgroup.long 0x38++0x3
line.long 0x00 "SO_CSR,Smart Option Configuration Status Register"
bitfld.long 0x00 12.--15. " BTDIV ,Basic timer divider selection bit in the reset time" "Reserved,Reserved,Reserved,1,2,4,8,16,32,64,128,256,512,1024,2048,4096"
bitfld.long 0x00 0.--1. " POCCS ,Power-On CPU (System) Clock Selection Field" "ESCLK,EMCLK,ISCLK,IMCLK"
group.long 0x3c++0x3
line.long 0x00 "PF_IOTR,Internal OSC Trimming Register"
hexmask.long.byte 0x00 24.--31. 1. " IOTKEY ,Key for write access into the CM_IOTR register"
hexmask.long.byte 0x00 16.--21. 1. " OSC ,Internal Oscillator (32.768kHz) Trim Value"
hexmask.long.byte 0x00 0.--6. 1. " OSC0 ,Internal Oscillator 0 (20MHz) Trim Value"
width 0xb
tree.end
tree "Inverter Motor Controller (IMC)"
base ad:0x40080000
width 12.
rgroup.long 0x00++0x3
line.long 0x00 "IMC_IDR,IMC ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x3
line.long 0x00 "IMC_CEDR,IMC Clock Enable/Disable Register"
bitfld.long 0x00 31. " DBGEN ,Debug enable" "Not halted,Halted"
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable Control" "Disabled,Enabled"
wgroup.long 0x08++0x3
line.long 0x00 "IMC_SRR,IMC Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
group.long 0x0c++0x3
line.long 0x00 "IMC_CR0,IMC Control Register 0"
bitfld.long 0x00 26.--27. " SYNCSEL ,Synchronous Write Selection" "ZERO and IMC_TCR,ZERO,TOPCMP,?..."
bitfld.long 0x00 20.--24. " NUMSKIP ,Numbers of skip for motor match interrupt" "No skip,1 time skip,2 time skip,3 time skip,4 time skip,5 time skip,6 time skip,7 time skip,8 time skip,9 time skip,10 time skip,11 time skip,12 time skip,13 time skip,14 time skip,15 time skip,16 time skip,17 time skip,18 time skip,19 time skip,20 time skip,21 time skip,22 time skip,23 time skip,24 time skip,25 time skip,26 time skip,27 time skip,28 time skip,29 time skip,30 time skip,31 time skip"
bitfld.long 0x00 16.--18. " IMCLKSEL ,Inverter Clock (IMCLK) Selection" "PCLK,PCLK/2,PCLK/4,PCLK/8,PCLK/16,PCLK/32,PCLK/64,PCLK/128"
textline " "
sif (cpu()!="S3FN41F")
bitfld.long 0x00 15. " PWMOUTOFFENBYOPAMP ,PWM output off enable by OPAMP" "Enabled,Disabled"
textline " "
endif
bitfld.long 0x00 14. " PWMOUTEN ,PWM output enable" "Enabled,Disabled"
bitfld.long 0x00 13. " PWMOUTOFFEN ,PWM output disable by PWMxOFF" "Disabled,Enabled"
textline " "
bitfld.long 0x00 12. " PWMOFFEN ,PWMxOFF enable" "Disabled,Enabled"
bitfld.long 0x00 8.--10. " IMFILTER ,Filter Clock Selection of PWMxOFF pin" "IMCLK,IMCLK/2,IMCLK/4,IMCLK/8,IMCLK/16,IMCLK/32,IMCLK/64,IMCLK/128"
textline " "
sif (cpu()=="S3FN41F")
bitfld.long 0x00 6. " ESELPWMOFF ,PWMxOFF Active Selection" "Falling,Rising"
textline " "
else
bitfld.long 0x00 6.--7. " ESELPWMOFF ,PWMxOFF Active Selection" "Falling,Rising,Low,High"
textline " "
endif
bitfld.long 0x00 5. " PWMPOLD ,Polarity of PWM in the PWMxD0/1/2" "Low,High"
bitfld.long 0x00 4. " PWMPOLU ,Polarity of PWM in the PWMxU0/1/2" "Low,High"
bitfld.long 0x00 3. " PWMSWAP ,Swapping of PWMxUx and PWMxDx" "No swap,Swap"
textline " "
bitfld.long 0x00 2. " WMODE ,Write mode of compare register" "Immediate,Synchronous"
bitfld.long 0x00 1. " IMMODE ,Inverter Motor Mode Selection" "Tri-angular shape,Saw-tooth shape"
bitfld.long 0x00 0. " IMEN ,Inverter motor block enable" "Disabled,Enabled"
group.long 0x10++0x3
line.long 0x00 "IMC_CR1,IMC Control Register 1"
bitfld.long 0x00 21. " PWMxU0DT ,PWMxU0 Dead-time Insert" "No insertion,Insertion"
bitfld.long 0x00 20. " PWMxU1DT ,PWMxU1 Dead-time Insert" "No insertion,Insertion"
bitfld.long 0x00 19. " PWMxU2DT ,PWMxU2 Dead-time Insert" "No insertion,Insertion"
textline " "
bitfld.long 0x00 18. " PWMxD0DT ,PWMxD0 Dead-time Insert" "No insertion,Insertion"
bitfld.long 0x00 17. " PWMxD1DT ,PWMxD1 Dead-time Insert" "No insertion,Insertion"
bitfld.long 0x00 16. " PWMxD2DT ,PWMxD2 Dead-time Insert" "No insertion,Insertion"
textline " "
bitfld.long 0x00 13. " PWMxU0LEVEL ,PWMxU0 Output Level Selection" "Low,High"
bitfld.long 0x00 12. " PWMxU1LEVEL ,PWMxU1 Output Level Selection" "Low,High"
bitfld.long 0x00 11. " PWMxU2LEVEL ,PWMxU2 Output Level Selection" "Low,High"
textline " "
bitfld.long 0x00 10. " PWMxD0LEVEL ,PWMxD0 Output Level Selection" "Low,High"
bitfld.long 0x00 9. " PWMxD1LEVEL ,PWMxD1 Output Level Selection" "Low,High"
bitfld.long 0x00 8. " PWMxD2LEVEL ,PWMxD2 Output Level Selection" "Low,High"
textline " "
bitfld.long 0x00 5. " PWMxU0EN ,PWMxU0 PWM Output Enable" "Enabled,Disabled"
bitfld.long 0x00 4. " PWMxU1EN ,PWMxU1 PWM Output Enable" "Enabled,Disabled"
bitfld.long 0x00 3. " PWMxU2EN ,PWMxU2 PWM Output Enable" "Enabled,Disabled"
textline " "
bitfld.long 0x00 2. " PWMxD0EN ,PWMxD0 PWM Output Enable" "Enabled,Disabled"
bitfld.long 0x00 1. " PWMxD1EN ,PWMxD1 PWM Output Enable" "Enabled,Disabled"
bitfld.long 0x00 0. " PWMxD2EN ,PWMxD2 PWM Output Enable" "Enabled,Disabled"
rgroup.long 0x14++0x3
line.long 0x00 "IMC_CNTR,IMC 16 Bit Counter Register"
hexmask.long.word 0x00 0.--15. 1. " CV ,Count Value"
group.long 0x18++0x3
line.long 0x00 "IMC_SR,IMC Status Register"
sif (cpu()!="S3FN41F")
bitfld.long 0x00 2. " OPAMPEDGEDET ,OPAMP edge detect" "Not detected,Detected"
textline " "
endif
bitfld.long 0x00 1. " UPDOWN ,Status of PWM counter" "Up counting,Down counting"
bitfld.long 0x00 0. " FAULTSTAT ,Status of PWM Output Signal" "Normal,High-Z"
group.long 0x1c++0x3
line.long 0x00 "IMC_IMSCR,IMC Interrupt Mask Set and Clear Register"
bitfld.long 0x00 13. " ADCFM2 ,ADC Compare2 Falling Match Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 12. " ADCRM2 ,ADC Compare2 Rising Match Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 11. " ADCFM1 ,ADC Compare1 Falling Match Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 10. " ADCRM1 ,ADC Compare1 Rising Match Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 9. " ADCFM0 ,ADC Compare0 Falling Match Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 8. " ADCRM0 ,ADC Compare0 Rising Match Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 7. " TOP ,TOP Match Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 6. " ZERO ,ZERO Match Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 0. " FAULT ,FAULT Interrupt Mask" "Masked,Not masked"
rgroup.long 0x20++0x3
line.long 0x00 "IMC_RISR,IMC Raw Interrupt Status Register"
bitfld.long 0x00 13. " ADCFM2 ,ADC Compare2 Falling Match Raw Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 12. " ADCRM2 ,ADC Compare2 Rising Match Raw Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 11. " ADCFM1 ,ADC Compare1 Falling Match Raw Interrupt State" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 10. " ADCRM1 ,ADC Compare1 Rising Match Raw Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 9. " ADCFM0 ,ADC Compare0 Falling Match Raw Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 8. " ADCRM0 ,ADC Compare0 Rising Match Raw Interrupt State" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 7. " TOP ,TOP Match Raw Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 6. " ZERO ,ZERO Match Raw Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 0. " FAULT ,FAULT Raw Interrupt State" "Not occurred,Occurred"
rgroup.long 0x24++0x3
line.long 0x00 "IMC_MISR,IMC Masked Interrupt Status Register"
bitfld.long 0x00 13. " ADCFM2 ,ADC Compare2 Falling Match Masked Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 12. " ADCRM2 ,ADC Compare2 Rising Match Masked Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 11. " ADCFM1 ,ADC Compare1 Falling Match Masked Interrupt State" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 10. " ADCRM1 ,ADC Compare1 Rising Match Masked Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 9. " ADCFM0 ,ADC Compare0 Falling Match Masked Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 8. " ADCRM0 ,ADC Compare0 Rising Match Masked Interrupt State" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 7. " TOP ,TOP Match Masked Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 6. " ZERO ,ZERO Match Masked Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 0. " FAULT ,FAULT Masked Interrupt State" "Not occurred,Occurred"
wgroup.long 0x28++0x3
line.long 0x00 "IMC_ICR,IMC Interrupt Clear Register"
bitfld.long 0x00 13. " ADCFM2 ,ADC Compare2 Falling Match Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 12. " ADCRM2 ,ADC Compare2 Rising Match Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 11. " ADCFM1 ,ADC Compare1 Falling Match Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 10. " ADCRM1 ,ADC Compare1 Rising Match Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 9. " ADCFM0 ,ADC Compare0 Falling Match Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 8. " ADCRM0 ,ADC Compare0 Rising Match Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 7. " TOP ,TOP Match Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 6. " ZERO ,ZERO Match Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 0. " FAULT ,FAULT Interrupt Clear" "No effect,Clear"
group.long 0x2c++0x3
line.long 0x00 "IMC_TCR,IMC 16 Bit Top Compare Register"
hexmask.long.word 0x00 0.--15. 1. " TOPCMPDAT ,This field can determine the TOP compare register value"
group.long 0x30++0x3
line.long 0x00 "IMC_DTCR,16 Bit Dead-time Control Register"
hexmask.long.word 0x00 0.--15. 1. " DTCMPDAT ,This field can determine the Dead-time compare register value"
group.long 0x34++0x3
line.long 0x00 "IMC_PACRR,16 Bit Phase A Compare Rising Register"
hexmask.long.word 0x00 0.--15. 1. " PACMPRDAT ,This field can determine the Phase A compare register value at rising"
group.long 0x38++0x3
line.long 0x00 "IMC_PBCRR,16 Bit Phase B Compare Rising Register"
hexmask.long.word 0x00 0.--15. 1. " PBCMPRDAT ,This field can determine the Phase B compare register value at rising"
group.long 0x3c++0x3
line.long 0x00 "IMC_PCCRR,16 Bit Phase C Compare Rising Register"
hexmask.long.word 0x00 0.--15. 1. " PCCMPRDAT ,This field can determine the Phase C compare register value at rising"
group.long 0x40++0x3
line.long 0x00 "IMC_PACFR,16 Bit Phase A Compare Falling Register"
hexmask.long.word 0x00 0.--15. 1. " PACMPFDAT ,This field can determine the Phase A compare register value at falling"
group.long 0x44++0x3
line.long 0x00 "IMC_PBCFR,16 Bit Phase B Compare Falling Register"
hexmask.long.word 0x00 0.--15. 1. " PBCMPFDAT ,This field can determine the Phase B compare register value at falling"
group.long 0x48++0x3
line.long 0x00 "IMC_PCCFR,16 Bit Phase C Compare Falling Register"
hexmask.long.word 0x00 0.--15. 1. " PCCMPFDAT ,This field can determine the Phase C compare register value at falling"
group.long 0x4c++0x3
line.long 0x00 "IMC_ASTSR,IMC ADC Start Signal Select Register"
sif (cpu()=="S3FN41F")
bitfld.long 0x00 7. " ADCCMPF2SEL ,ADC start trigger signal by ADCCMPF2DAT match" "Not selected,Selected"
bitfld.long 0x00 6. " ADCCMPR2SEL ,ADC start trigger signal by ADCCMPR2DAT match" "Not selected,Selected"
bitfld.long 0x00 5. " ADCCMPF1SEL ,ADC start trigger signal by ADCCMPF1DAT match" "Not selected,Selected"
textline " "
bitfld.long 0x00 4. " ADCCMPR1SEL ,ADC start trigger signal by ADCCMPR1DAT match" "Not selected,Selected"
bitfld.long 0x00 3. " ADCCMPF0SEL ,ADC start trigger signal by ADCCMPF0DAT match" "Not selected,Selected"
bitfld.long 0x00 2. " ADCCMPR0SEL ,ADC start trigger signal by ADCCMPR0DAT match" "Not selected,Selected"
else
bitfld.long 0x00 7. " ADCMPF2SEL ,ADC start trigger signal by ADCCMPF2 match" "Not selected,Selected"
bitfld.long 0x00 6. " ADCMPR2SEL ,ADC start trigger signal by ADCCMPR2 match" "Not selected,Selected"
bitfld.long 0x00 5. " ADCMPF1SEL ,ADC start trigger signal by ADCCMPF1 match" "Not selected,Selected"
textline " "
bitfld.long 0x00 4. " ADCMPR1SEL ,ADC start trigger signal by ADCCMPR1 match" "Not selected,Selected"
bitfld.long 0x00 3. " ADCMPF0SEL ,ADC start trigger signal by ADCCMPF0 match" "Not selected,Selected"
bitfld.long 0x00 2. " ADCMPR0SEL ,ADC start trigger signal by ADCCMPR0 match" "Not selected,Selected"
endif
textline " "
bitfld.long 0x00 1. " 0SEL ,ADC start trigger signal by counter zero match" "Not selected,Selected"
bitfld.long 0x00 0. " TOPCMPSEL ,ADC start trigger signal by TOPCMP match" "Not selected,Selected"
group.long 0x50++0x0F
line.long 0x0 "IMC_ASCRR0,16 Bit ADC Start Compare Rising Register 0"
hexmask.long.word 0x0 0.--15. 1. " ADCCMPR0DAT ,This field can determine the ADC compare register value at rising"
line.long 0x4 "IMC_ASCRR1,16 Bit ADC Start Compare Rising Register 1"
hexmask.long.word 0x4 0.--15. 1. " ADCCMPR1DAT ,This field can determine the ADC compare register value at rising"
line.long 0x8 "IMC_ASCRR2,16 Bit ADC Start Compare Rising Register 2"
hexmask.long.word 0x8 0.--15. 1. " ADCCMPR2DAT ,This field can determine the ADC compare register value at rising"
group.long 0x5c++0x0F
line.long 0x0 "IMC_ASCFR0,16 Bit ADC Start Compare Falling Register 0"
hexmask.long.word 0x0 0.--15. 1. " ADCCMPF0DAT ,This field can determine the ADC compare register value at falling"
line.long 0x4 "IMC_ASCFR1,16 Bit ADC Start Compare Falling Register 1"
hexmask.long.word 0x4 0.--15. 1. " ADCCMPF1DAT ,This field can determine the ADC compare register value at falling"
line.long 0x8 "IMC_ASCFR2,16 Bit ADC Start Compare Falling Register 2"
hexmask.long.word 0x8 0.--15. 1. " ADCCMPF2DAT ,This field can determine the ADC compare register value at falling"
width 0xb
tree.end
tree "LCD Controller (LCDC)"
base ad:0x400D0000
width 10.
rgroup.long 0x000++0x3
line.long 0x00 "LCD_IDR,LCD ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE[25:0] ,Identification Code Register"
group.long 0x004++0x3
line.long 0x00 "LCD_CEDR,LCD Clock Enable/Disable Register"
bitfld.long 0x00 0. " CEN ,LCD Clock Enable" "Disabled,Enabled"
wgroup.long 0x008++0x3
line.long 0x00 "LCD_SRR,LCD Software Reset Register"
bitfld.long 0x00 0. " SWRST ,LCD Software Reset" "No effect,Reset"
group.long 0x00c++0x3
line.long 0x00 "LCD_CR,LCD Control Register"
bitfld.long 0x00 8.--10. " DBSEL[2:0] ,Duty and Bias Selection Field" "Static mode,1/2 Duty and 1/2 Bias,1/3 Duty and 1/2 Bias,1/3 Duty and 1/3 Bias,1/4 Duty and 1/3 Bias,1/8 Duty and 1/4 Bias,?..."
textline " "
bitfld.long 0x00 4. " BTSEL ,Bias Type Selection" "Internal,External"
textline " "
bitfld.long 0x00 1.--2. " DISC[1:0] ,LCD Display Control Field" "Off,On,Normal,?..."
bitfld.long 0x00 0. " LCDEN ,LCD Enable/Disable Control" "Disabled,Enabled"
group.long 0x010++0x3
line.long 0x00 "LCD_CDR,LCD Clock Divide Register"
hexmask.long.word 0x00 8.--23. 1. " CPRE[15:0] ,LCD Clock Pre-scaler Value"
bitfld.long 0x00 7. " CDC ,Clock Divider Control" "Same as fLCDCLK,Calculated"
bitfld.long 0x00 0.--2. " CDIV[3:0] ,LCD Clock Dividing Value" "1,2,3,4,5,6,7,8"
group.long 0x400++0x9f
line.long 0x0 "LCD_DMR0 ,LCD Display Memory Register 0 "
bitfld.long 0x0 7. " SEG0 COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x0 6. " SEG0 COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x0 5. " SEG0 COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x0 4. " SEG0 COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x0 3. " SEG0 COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x0 2. " SEG0 COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x0 1. " SEG0 COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x0 0. " SEG0 COM0 ,Display Memory Control" "Off,On"
line.long 0x4 "LCD_DMR1 ,LCD Display Memory Register 1 "
bitfld.long 0x4 7. " SEG1 COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x4 6. " SEG1 COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x4 5. " SEG1 COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x4 4. " SEG1 COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x4 3. " SEG1 COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x4 2. " SEG1 COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x4 1. " SEG1 COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x4 0. " SEG1 COM0 ,Display Memory Control" "Off,On"
line.long 0x8 "LCD_DMR2 ,LCD Display Memory Register 2 "
bitfld.long 0x8 7. " SEG2 COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x8 6. " SEG2 COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x8 5. " SEG2 COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x8 4. " SEG2 COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x8 3. " SEG2 COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x8 2. " SEG2 COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x8 1. " SEG2 COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x8 0. " SEG2 COM0 ,Display Memory Control" "Off,On"
line.long 0xC "LCD_DMR3 ,LCD Display Memory Register 3 "
bitfld.long 0xC 7. " SEG3 COM7 ,Display Memory Control" "Off,On"
bitfld.long 0xC 6. " SEG3 COM6 ,Display Memory Control" "Off,On"
bitfld.long 0xC 5. " SEG3 COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0xC 4. " SEG3 COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0xC 3. " SEG3 COM3 ,Display Memory Control" "Off,On"
bitfld.long 0xC 2. " SEG3 COM2 ,Display Memory Control" "Off,On"
bitfld.long 0xC 1. " SEG3 COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0xC 0. " SEG3 COM0 ,Display Memory Control" "Off,On"
line.long 0x10 "LCD_DMR4 ,LCD Display Memory Register 4 "
bitfld.long 0x10 7. " SEG4 COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x10 6. " SEG4 COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x10 5. " SEG4 COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x10 4. " SEG4 COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x10 3. " SEG4 COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x10 2. " SEG4 COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x10 1. " SEG4 COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x10 0. " SEG4 COM0 ,Display Memory Control" "Off,On"
line.long 0x14 "LCD_DMR5 ,LCD Display Memory Register 5 "
bitfld.long 0x14 7. " SEG5 COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x14 6. " SEG5 COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x14 5. " SEG5 COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x14 4. " SEG5 COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x14 3. " SEG5 COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x14 2. " SEG5 COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x14 1. " SEG5 COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x14 0. " SEG5 COM0 ,Display Memory Control" "Off,On"
line.long 0x18 "LCD_DMR6 ,LCD Display Memory Register 6 "
bitfld.long 0x18 7. " SEG6 COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x18 6. " SEG6 COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x18 5. " SEG6 COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x18 4. " SEG6 COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x18 3. " SEG6 COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x18 2. " SEG6 COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x18 1. " SEG6 COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x18 0. " SEG6 COM0 ,Display Memory Control" "Off,On"
line.long 0x1C "LCD_DMR7 ,LCD Display Memory Register 7 "
bitfld.long 0x1C 7. " SEG7 COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x1C 6. " SEG7 COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x1C 5. " SEG7 COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x1C 4. " SEG7 COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x1C 3. " SEG7 COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x1C 2. " SEG7 COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x1C 1. " SEG7 COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x1C 0. " SEG7 COM0 ,Display Memory Control" "Off,On"
line.long 0x20 "LCD_DMR8 ,LCD Display Memory Register 8 "
bitfld.long 0x20 7. " SEG8 COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x20 6. " SEG8 COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x20 5. " SEG8 COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x20 4. " SEG8 COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x20 3. " SEG8 COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x20 2. " SEG8 COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x20 1. " SEG8 COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x20 0. " SEG8 COM0 ,Display Memory Control" "Off,On"
line.long 0x24 "LCD_DMR9 ,LCD Display Memory Register 9 "
bitfld.long 0x24 7. " SEG9 COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x24 6. " SEG9 COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x24 5. " SEG9 COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x24 4. " SEG9 COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x24 3. " SEG9 COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x24 2. " SEG9 COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x24 1. " SEG9 COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x24 0. " SEG9 COM0 ,Display Memory Control" "Off,On"
line.long 0x28 "LCD_DMR10,LCD Display Memory Register 10"
bitfld.long 0x28 7. " SEG10COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x28 6. " SEG10COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x28 5. " SEG10COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x28 4. " SEG10COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x28 3. " SEG10COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x28 2. " SEG10COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x28 1. " SEG10COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x28 0. " SEG10COM0 ,Display Memory Control" "Off,On"
line.long 0x2C "LCD_DMR11,LCD Display Memory Register 11"
bitfld.long 0x2C 7. " SEG11COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x2C 6. " SEG11COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x2C 5. " SEG11COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x2C 4. " SEG11COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x2C 3. " SEG11COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x2C 2. " SEG11COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x2C 1. " SEG11COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x2C 0. " SEG11COM0 ,Display Memory Control" "Off,On"
line.long 0x30 "LCD_DMR12,LCD Display Memory Register 12"
bitfld.long 0x30 7. " SEG12COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x30 6. " SEG12COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x30 5. " SEG12COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x30 4. " SEG12COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x30 3. " SEG12COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x30 2. " SEG12COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x30 1. " SEG12COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x30 0. " SEG12COM0 ,Display Memory Control" "Off,On"
line.long 0x34 "LCD_DMR13,LCD Display Memory Register 13"
bitfld.long 0x34 7. " SEG13COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x34 6. " SEG13COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x34 5. " SEG13COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x34 4. " SEG13COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x34 3. " SEG13COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x34 2. " SEG13COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x34 1. " SEG13COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x34 0. " SEG13COM0 ,Display Memory Control" "Off,On"
line.long 0x38 "LCD_DMR14,LCD Display Memory Register 14"
bitfld.long 0x38 7. " SEG14COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x38 6. " SEG14COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x38 5. " SEG14COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x38 4. " SEG14COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x38 3. " SEG14COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x38 2. " SEG14COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x38 1. " SEG14COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x38 0. " SEG14COM0 ,Display Memory Control" "Off,On"
line.long 0x3C "LCD_DMR15,LCD Display Memory Register 15"
bitfld.long 0x3C 7. " SEG15COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x3C 6. " SEG15COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x3C 5. " SEG15COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x3C 4. " SEG15COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x3C 3. " SEG15COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x3C 2. " SEG15COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x3C 1. " SEG15COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x3C 0. " SEG15COM0 ,Display Memory Control" "Off,On"
line.long 0x40 "LCD_DMR16,LCD Display Memory Register 16"
bitfld.long 0x40 7. " SEG16COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x40 6. " SEG16COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x40 5. " SEG16COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x40 4. " SEG16COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x40 3. " SEG16COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x40 2. " SEG16COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x40 1. " SEG16COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x40 0. " SEG16COM0 ,Display Memory Control" "Off,On"
line.long 0x44 "LCD_DMR17,LCD Display Memory Register 17"
bitfld.long 0x44 7. " SEG17COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x44 6. " SEG17COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x44 5. " SEG17COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x44 4. " SEG17COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x44 3. " SEG17COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x44 2. " SEG17COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x44 1. " SEG17COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x44 0. " SEG17COM0 ,Display Memory Control" "Off,On"
line.long 0x48 "LCD_DMR18,LCD Display Memory Register 18"
bitfld.long 0x48 7. " SEG18COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x48 6. " SEG18COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x48 5. " SEG18COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x48 4. " SEG18COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x48 3. " SEG18COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x48 2. " SEG18COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x48 1. " SEG18COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x48 0. " SEG18COM0 ,Display Memory Control" "Off,On"
line.long 0x4C "LCD_DMR19,LCD Display Memory Register 19"
bitfld.long 0x4C 7. " SEG19COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x4C 6. " SEG19COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x4C 5. " SEG19COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x4C 4. " SEG19COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x4C 3. " SEG19COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x4C 2. " SEG19COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x4C 1. " SEG19COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x4C 0. " SEG19COM0 ,Display Memory Control" "Off,On"
line.long 0x50 "LCD_DMR20,LCD Display Memory Register 20"
bitfld.long 0x50 7. " SEG20COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x50 6. " SEG20COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x50 5. " SEG20COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x50 4. " SEG20COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x50 3. " SEG20COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x50 2. " SEG20COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x50 1. " SEG20COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x50 0. " SEG20COM0 ,Display Memory Control" "Off,On"
line.long 0x54 "LCD_DMR21,LCD Display Memory Register 21"
bitfld.long 0x54 7. " SEG21COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x54 6. " SEG21COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x54 5. " SEG21COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x54 4. " SEG21COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x54 3. " SEG21COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x54 2. " SEG21COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x54 1. " SEG21COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x54 0. " SEG21COM0 ,Display Memory Control" "Off,On"
line.long 0x58 "LCD_DMR22,LCD Display Memory Register 22"
bitfld.long 0x58 7. " SEG22COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x58 6. " SEG22COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x58 5. " SEG22COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x58 4. " SEG22COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x58 3. " SEG22COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x58 2. " SEG22COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x58 1. " SEG22COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x58 0. " SEG22COM0 ,Display Memory Control" "Off,On"
line.long 0x5C "LCD_DMR23,LCD Display Memory Register 23"
bitfld.long 0x5C 7. " SEG23COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x5C 6. " SEG23COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x5C 5. " SEG23COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x5C 4. " SEG23COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x5C 3. " SEG23COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x5C 2. " SEG23COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x5C 1. " SEG23COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x5C 0. " SEG23COM0 ,Display Memory Control" "Off,On"
line.long 0x60 "LCD_DMR24,LCD Display Memory Register 24"
bitfld.long 0x60 7. " SEG24COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x60 6. " SEG24COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x60 5. " SEG24COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x60 4. " SEG24COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x60 3. " SEG24COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x60 2. " SEG24COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x60 1. " SEG24COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x60 0. " SEG24COM0 ,Display Memory Control" "Off,On"
line.long 0x64 "LCD_DMR25,LCD Display Memory Register 25"
bitfld.long 0x64 7. " SEG25COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x64 6. " SEG25COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x64 5. " SEG25COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x64 4. " SEG25COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x64 3. " SEG25COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x64 2. " SEG25COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x64 1. " SEG25COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x64 0. " SEG25COM0 ,Display Memory Control" "Off,On"
line.long 0x68 "LCD_DMR26,LCD Display Memory Register 26"
bitfld.long 0x68 7. " SEG26COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x68 6. " SEG26COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x68 5. " SEG26COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x68 4. " SEG26COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x68 3. " SEG26COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x68 2. " SEG26COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x68 1. " SEG26COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x68 0. " SEG26COM0 ,Display Memory Control" "Off,On"
line.long 0x6C "LCD_DMR27,LCD Display Memory Register 27"
bitfld.long 0x6C 7. " SEG27COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x6C 6. " SEG27COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x6C 5. " SEG27COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x6C 4. " SEG27COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x6C 3. " SEG27COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x6C 2. " SEG27COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x6C 1. " SEG27COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x6C 0. " SEG27COM0 ,Display Memory Control" "Off,On"
line.long 0x70 "LCD_DMR28,LCD Display Memory Register 28"
bitfld.long 0x70 7. " SEG28COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x70 6. " SEG28COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x70 5. " SEG28COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x70 4. " SEG28COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x70 3. " SEG28COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x70 2. " SEG28COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x70 1. " SEG28COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x70 0. " SEG28COM0 ,Display Memory Control" "Off,On"
line.long 0x74 "LCD_DMR29,LCD Display Memory Register 29"
bitfld.long 0x74 7. " SEG29COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x74 6. " SEG29COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x74 5. " SEG29COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x74 4. " SEG29COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x74 3. " SEG29COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x74 2. " SEG29COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x74 1. " SEG29COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x74 0. " SEG29COM0 ,Display Memory Control" "Off,On"
line.long 0x78 "LCD_DMR30,LCD Display Memory Register 30"
bitfld.long 0x78 7. " SEG30COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x78 6. " SEG30COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x78 5. " SEG30COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x78 4. " SEG30COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x78 3. " SEG30COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x78 2. " SEG30COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x78 1. " SEG30COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x78 0. " SEG30COM0 ,Display Memory Control" "Off,On"
line.long 0x7C "LCD_DMR31,LCD Display Memory Register 31"
bitfld.long 0x7C 7. " SEG31COM7 ,Display Memory Control" "Off,On"
bitfld.long 0x7C 6. " SEG31COM6 ,Display Memory Control" "Off,On"
bitfld.long 0x7C 5. " SEG31COM5 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x7C 4. " SEG31COM4 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x7C 3. " SEG31COM3 ,Display Memory Control" "Off,On"
bitfld.long 0x7C 2. " SEG31COM2 ,Display Memory Control" "Off,On"
bitfld.long 0x7C 1. " SEG31COM1 ,Display Memory Control" "Off,On"
textline " "
bitfld.long 0x7C 0. " SEG31COM0 ,Display Memory Control" "Off,On"
width 0xb
tree.end
tree "Operational Amplifier (OPAMP)"
base ad:0x40041000
width 10.
rgroup.long 0x00++0x3
line.long 0x00 "OPA_IDR,OP-AMP ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x3
line.long 0x00 "OPA_CEDR,Clock Enable/Disable Control"
bitfld.long 0x00 0. " CLKEN ,Clock Enable/ Disable Control" "Disabled,Enabled"
wgroup.long 0x08++0x3
line.long 0x00 "OPA_SRR,OPAMP Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
group.long 0x0c++0x3
line.long 0x00 "OPA_CR,OPAMP Control Register"
bitfld.long 0x00 2. " OPA2 ,OP-AMP enable" "Disabled,Enabled"
bitfld.long 0x00 1. " OPA1 ,OP-AMP enable" "Disabled,Enabled"
bitfld.long 0x00 0. " OPA0 ,OP-AMP enable" "Disabled,Enabled"
group.long 0x10++0x3
line.long 0x00 "OPA_GCR,OPAMP Gain Control Register"
bitfld.long 0x00 23. " GCT2 ,OP-AMP gain control type 2" "External,Internal"
bitfld.long 0x00 16.--19. " GV2 ,Channel 2 OP-AMP Gain Value Field" "x2.500,x2.667,x2.857,x3.000,x3.333,x3.636,x4.000,x4.444,x5.000,x5.714,x6.667,x8.000,x10.000,?..."
bitfld.long 0x00 15. " GCT1 ,OP-AMP gain control type 1" "External,Internal"
textline " "
bitfld.long 0x00 8.--11. " GV1 ,Channel 1 OP-AMP Gain Value Field" "x2.500,x2.667,x2.857,x3.000,x3.333,x3.636,x4.000,x4.444,x5.000,x5.714,x6.667,x8.000,x10.000,?..."
bitfld.long 0x00 7. " GCT0 ,OP-AMP gain control type 0" "External,Internal"
bitfld.long 0x00 0.--3. " GV0 ,Channel 0 OP-AMP Gain Value Field" "x2.500,x2.667,x2.857,x3.000,x3.333,x3.636,x4.000,x4.444,x5.000,x5.714,x6.667,x8.000,x10.000,?..."
width 0xb
tree.end
tree.open "Pulse Width Modulation (PWM)"
tree "PWM0"
base ad:0x40070000
width 11.
rgroup.long 0x00++0x3
line.long 0x00 "PWM_IDR,PWM ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x3
line.long 0x00 "PWM_CEDR,PWM Clock Enable/Disable Register"
bitfld.long 0x00 31. " DBGEN ,Debug mode enable" "Disabled,Enabled"
bitfld.long 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
wgroup.long 0x08++0x3
line.long 0x00 "PWM_SRR,PWM Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
wgroup.long 0x0c++0x3
line.long 0x00 "PWM_CSR,PWM Control Set Register"
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Include"
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Include"
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Include"
textline " "
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Include"
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Include"
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Include"
textline " "
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,PWM mode"
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level" "No effect,Start"
textline " "
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
bitfld.long 0x00 1. " UPDATE ,Update PWM Parameter" "No effect,Update"
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Start"
wgroup.long 0x10++0x3
line.long 0x00 "PWM_CCR,PWM Control Clear Register"
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Delete"
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Delete"
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Delete"
textline " "
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Delete"
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Delete"
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Delete"
textline " "
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,Interval mode"
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
bitfld.long 0x00 9. " OUTSL ,PWM Start Level" "No effect,Start"
textline " "
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Stop"
rgroup.long 0x14++0x3
line.long 0x00 "PWM_SR,PWM Status Register"
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "Not effective,Effective"
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "Not effective,Effective"
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "Not effective,Effective"
textline " "
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "Not effective,Effective"
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "Not effective,Effective"
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "Not effective,Effective"
textline " "
bitfld.long 0x00 11. " PWMIM ,PWM Output Mode Status" "PWM mode,Interval mode"
bitfld.long 0x00 10. " KEEP ,Keep Last Period Status" "Not kept,Kept"
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level Status" "Low,High"
textline " "
bitfld.long 0x00 8. " IDLESL ,Idle State PWM Output Level Status" "Low,High"
bitfld.long 0x00 0. " START ,PWM start/stop status" "Stopped,Started"
group.long 0x18++0x3
line.long 0x00 "PWM_IMSCR,PWM Interrupt Mask Set/Clear Register"
bitfld.long 0x00 4. " PMATCH ,Pulse Match Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 3. " PEND ,Period End Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 2. " PSTART ,Period Start Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 0. " PWMSTART ,PWM Start Interrupt Mask" "Masked,Not masked"
rgroup.long 0x1c++0x3
line.long 0x00 "PWM_RISR,PWM Raw Interrupt Status Register"
bitfld.long 0x00 4. " PMATCH ,Pulse Match Raw Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 3. " PEND ,Period End Raw Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 2. " PSTART ,Period Start Raw Interrupt State" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Raw Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 0. " PWMSTART ,PWM Start Raw Interrupt State" "Not occurred,Occurred"
rgroup.long 0x20++0x3
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
bitfld.long 0x00 4. " PMATCH ,Pulse Match Masked Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 3. " PEND ,Period End Masked Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 2. " PSTART ,Period Start Masked Interrupt State" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Masked Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 0. " PWMSTART ,PWM Start Masked Interrupt State" "Not occurred,Occurred"
wgroup.long 0x24++0x3
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
bitfld.long 0x00 4. " PMATCH ,PWM Counter value is matched with Pulse value Status" "No effect,Clear"
bitfld.long 0x00 3. " PEND ,PWM Period Ended Interrupt clear" "No effect,Clear"
bitfld.long 0x00 2. " PSTART ,PWM Period Started Interrupt clear" "No effect,Clear"
textline " "
bitfld.long 0x00 1. " PWMSTOP ,PWM Stopped Interrupt clear" "No effect,Clear"
bitfld.long 0x00 0. " PWMSTART ,PWM Started Interrupt clear" "No effect,Clear"
group.long 0x28++0x3
line.long 0x00 "PWM_CDR,PWM Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
group.long 0x2C++0x3
line.long 0x00 "PWM_PRDR,PWM Period Register"
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Period Value"
group.long 0x30++0x3
line.long 0x00 "PWM_PULR,PWM Pulse Register"
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Pulse Value"
rgroup.long 0x34++0x3
line.long 0x00 "PWM_CCDR,PWM Current Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
rgroup.long 0x38++0x3
line.long 0x00 "PWM_CPRDR,PWM Current Period Register"
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Current Period Value"
rgroup.long 0x3c++0x3
line.long 0x00 "PWM_CPULR,PWM Current Pulse Register"
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Current Pulse Value"
width 0xb
tree.end
tree "PWM1"
base ad:0x40071000
width 11.
rgroup.long 0x00++0x3
line.long 0x00 "PWM_IDR,PWM ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x3
line.long 0x00 "PWM_CEDR,PWM Clock Enable/Disable Register"
bitfld.long 0x00 31. " DBGEN ,Debug mode enable" "Disabled,Enabled"
bitfld.long 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
wgroup.long 0x08++0x3
line.long 0x00 "PWM_SRR,PWM Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
wgroup.long 0x0c++0x3
line.long 0x00 "PWM_CSR,PWM Control Set Register"
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Include"
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Include"
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Include"
textline " "
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Include"
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Include"
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Include"
textline " "
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,PWM mode"
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level" "No effect,Start"
textline " "
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
bitfld.long 0x00 1. " UPDATE ,Update PWM Parameter" "No effect,Update"
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Start"
wgroup.long 0x10++0x3
line.long 0x00 "PWM_CCR,PWM Control Clear Register"
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Delete"
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Delete"
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Delete"
textline " "
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Delete"
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Delete"
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Delete"
textline " "
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,Interval mode"
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
bitfld.long 0x00 9. " OUTSL ,PWM Start Level" "No effect,Start"
textline " "
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Stop"
rgroup.long 0x14++0x3
line.long 0x00 "PWM_SR,PWM Status Register"
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "Not effective,Effective"
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "Not effective,Effective"
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "Not effective,Effective"
textline " "
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "Not effective,Effective"
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "Not effective,Effective"
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "Not effective,Effective"
textline " "
bitfld.long 0x00 11. " PWMIM ,PWM Output Mode Status" "PWM mode,Interval mode"
bitfld.long 0x00 10. " KEEP ,Keep Last Period Status" "Not kept,Kept"
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level Status" "Low,High"
textline " "
bitfld.long 0x00 8. " IDLESL ,Idle State PWM Output Level Status" "Low,High"
bitfld.long 0x00 0. " START ,PWM start/stop status" "Stopped,Started"
group.long 0x18++0x3
line.long 0x00 "PWM_IMSCR,PWM Interrupt Mask Set/Clear Register"
bitfld.long 0x00 4. " PMATCH ,Pulse Match Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 3. " PEND ,Period End Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 2. " PSTART ,Period Start Interrupt Mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 0. " PWMSTART ,PWM Start Interrupt Mask" "Masked,Not masked"
rgroup.long 0x1c++0x3
line.long 0x00 "PWM_RISR,PWM Raw Interrupt Status Register"
bitfld.long 0x00 4. " PMATCH ,Pulse Match Raw Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 3. " PEND ,Period End Raw Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 2. " PSTART ,Period Start Raw Interrupt State" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Raw Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 0. " PWMSTART ,PWM Start Raw Interrupt State" "Not occurred,Occurred"
rgroup.long 0x20++0x3
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
bitfld.long 0x00 4. " PMATCH ,Pulse Match Masked Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 3. " PEND ,Period End Masked Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 2. " PSTART ,Period Start Masked Interrupt State" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Masked Interrupt State" "Not occurred,Occurred"
bitfld.long 0x00 0. " PWMSTART ,PWM Start Masked Interrupt State" "Not occurred,Occurred"
wgroup.long 0x24++0x3
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
bitfld.long 0x00 4. " PMATCH ,PWM Counter value is matched with Pulse value Status" "No effect,Clear"
bitfld.long 0x00 3. " PEND ,PWM Period Ended Interrupt clear" "No effect,Clear"
bitfld.long 0x00 2. " PSTART ,PWM Period Started Interrupt clear" "No effect,Clear"
textline " "
bitfld.long 0x00 1. " PWMSTOP ,PWM Stopped Interrupt clear" "No effect,Clear"
bitfld.long 0x00 0. " PWMSTART ,PWM Started Interrupt clear" "No effect,Clear"
group.long 0x28++0x3
line.long 0x00 "PWM_CDR,PWM Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
group.long 0x2C++0x3
line.long 0x00 "PWM_PRDR,PWM Period Register"
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Period Value"
group.long 0x30++0x3
line.long 0x00 "PWM_PULR,PWM Pulse Register"
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Pulse Value"
rgroup.long 0x34++0x3
line.long 0x00 "PWM_CCDR,PWM Current Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
rgroup.long 0x38++0x3
line.long 0x00 "PWM_CPRDR,PWM Current Period Register"
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Current Period Value"
rgroup.long 0x3c++0x3
line.long 0x00 "PWM_CPULR,PWM Current Pulse Register"
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Current Pulse Value"
width 0xb
tree.end
tree.end
tree.open "SPI (Serial Peripheral Interface)"
tree "SPI0"
base ad:0x40090000
width 11.
group.long 0x00++0x0B
line.long 0x00 "SSP_CR0,SSP Control Register 0"
hexmask.long.byte 0x00 8.--15. 1. " SCR ,Serial Clock Rate Field"
bitfld.long 0x00 7. " SPH ,SSPCLKOUT Phase" "First clock,Second clock"
bitfld.long 0x00 6. " SPO ,SSPCLK Polarity Bit" "First clock,Second clock"
textline " "
bitfld.long 0x00 4.--5. " FRF ,Frame Format Selection Field" "0,1,2,3"
bitfld.long 0x00 0.--3. " DSS ,Data Size Selection Field" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
line.long 0x04 "SSP_CR1,SSP Control Register 1"
bitfld.long 0x04 4.--6. " RXIFLSEL ,Receive Interrupt FIFO Level Selection Field" "Reserved,1/8,1/4,Reserved,1/2,?..."
bitfld.long 0x04 3. " SOD ,Slave-mode Output Disable Bit" "Can drive,Must not drive"
bitfld.long 0x04 2. " MS ,Master or Slave Mode Selection Bit" "Master,Slave"
textline " "
bitfld.long 0x04 1. " SSE ,Synchronous Serial Port Enable Bit" "Disabled,Enabled"
bitfld.long 0x04 0. " LBM ,Loop-Back Mode Bit" "Normal,Internally"
line.long 0x08 "SSP_DR,SSP Data Register"
hexmask.long.word 0x08 0.--15. 1. " DATA ,Transmit/ Receive FIFO"
rgroup.long 0x0C++0x03
line.long 0x00 "SSP_SR,SSP Status Register"
bitfld.long 0x00 4. " BSY ,Prime-Cell SSP Busy Flag Bit" "Idle,Transmitting/receiving"
textline " "
bitfld.long 0x00 3. " RFF ,Receive FIFO Full Status Bit" "Not full,Full"
bitfld.long 0x00 2. " RNE ,Receive Empty Status Bit" "Empty,Not empty"
textline " "
bitfld.long 0x00 1. " TNF ,Transmit FIFO Full Status Bit" "Full,Not full"
bitfld.long 0x00 0. " TFE ,Transmit FIFO Empty Status Bit" "Not empty,Empty"
group.long 0x10++0x07
line.long 0x00 "SSP_CPSR,SSP Clock Pre-scale Register"
hexmask.long.byte 0x00 0.--7. 1. " CPSDVSR ,Clock Pre-scale Divisor Field"
line.long 0x04 "SSP_IMSCR,SSP Interrupt Mask Set/ Clear Register"
bitfld.long 0x04 3. " TXIM ,Transmit FIFO Interrupt Mask" "Disabled,Enabled"
bitfld.long 0x04 2. " RXIM ,Receive FIFO Interrupt Mask" "Disabled,Enabled"
bitfld.long 0x04 1. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled"
textline " "
bitfld.long 0x04 0. " RORIM ,Receive Overrun Interrupt Mask" "Disabled,Enabled"
rgroup.long 0x18++0x07
line.long 0x00 "SSP_RISR,SSP Raw Interrupt Status Register"
bitfld.long 0x00 3. " TXRIS ,Transmit FIFO raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 2. " RXRIS ,Receive FIFO raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 1. " RTRIS ,Receive Timeout raw interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 0. " RORRIS ,Receive Overrun raw interrupt state" "Not occurred,Occurred"
line.long 0x04 "SSP_MISR,Interrupt Priority Register"
bitfld.long 0x04 3. " TXMIS ,Transmit FIFO masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 2. " RXMIS ,Receive FIFO masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 1. " RTMIS ,Receive Timeout masked interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x04 0. " RORMIS ,Receive Overrun masked interrupt state" "Not occurred,Occurred"
wgroup.long 0x20++0x03
line.long 0x00 "SSP_ICR,SSP Interrupt Clear Register"
bitfld.long 0x00 1. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 0. " RORIC ,Receive Overrun Interrupt Clear" "No effect,Clear"
group.long 0x24++0x03
line.long 0x00 "SSP_DMACR,SSP DMA Control Register"
bitfld.long 0x00 1. " TXDMAE ,DMA for the transmit FIFO Enable/ Disable Control Bit" "Disabled,Enabled"
bitfld.long 0x00 0. " RXDMAE ,DMA for the receive FIFO Enable/ Disable Control Bit" "Disabled,Enabled"
width 11.
tree.end
tree "SPI1"
base ad:0x40091000
width 11.
group.long 0x00++0x0B
line.long 0x00 "SSP_CR0,SSP Control Register 0"
hexmask.long.byte 0x00 8.--15. 1. " SCR ,Serial Clock Rate Field"
bitfld.long 0x00 7. " SPH ,SSPCLKOUT Phase" "First clock,Second clock"
bitfld.long 0x00 6. " SPO ,SSPCLK Polarity Bit" "First clock,Second clock"
textline " "
bitfld.long 0x00 4.--5. " FRF ,Frame Format Selection Field" "0,1,2,3"
bitfld.long 0x00 0.--3. " DSS ,Data Size Selection Field" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
line.long 0x04 "SSP_CR1,SSP Control Register 1"
bitfld.long 0x04 4.--6. " RXIFLSEL ,Receive Interrupt FIFO Level Selection Field" "Reserved,1/8,1/4,Reserved,1/2,?..."
bitfld.long 0x04 3. " SOD ,Slave-mode Output Disable Bit" "Can drive,Must not drive"
bitfld.long 0x04 2. " MS ,Master or Slave Mode Selection Bit" "Master,Slave"
textline " "
bitfld.long 0x04 1. " SSE ,Synchronous Serial Port Enable Bit" "Disabled,Enabled"
bitfld.long 0x04 0. " LBM ,Loop-Back Mode Bit" "Normal,Internally"
line.long 0x08 "SSP_DR,SSP Data Register"
hexmask.long.word 0x08 0.--15. 1. " DATA ,Transmit/ Receive FIFO"
rgroup.long 0x0C++0x03
line.long 0x00 "SSP_SR,SSP Status Register"
bitfld.long 0x00 4. " BSY ,Prime-Cell SSP Busy Flag Bit" "Idle,Transmitting/receiving"
textline " "
bitfld.long 0x00 3. " RFF ,Receive FIFO Full Status Bit" "Not full,Full"
bitfld.long 0x00 2. " RNE ,Receive Empty Status Bit" "Empty,Not empty"
textline " "
bitfld.long 0x00 1. " TNF ,Transmit FIFO Full Status Bit" "Full,Not full"
bitfld.long 0x00 0. " TFE ,Transmit FIFO Empty Status Bit" "Not empty,Empty"
group.long 0x10++0x07
line.long 0x00 "SSP_CPSR,SSP Clock Pre-scale Register"
hexmask.long.byte 0x00 0.--7. 1. " CPSDVSR ,Clock Pre-scale Divisor Field"
line.long 0x04 "SSP_IMSCR,SSP Interrupt Mask Set/ Clear Register"
bitfld.long 0x04 3. " TXIM ,Transmit FIFO Interrupt Mask" "Disabled,Enabled"
bitfld.long 0x04 2. " RXIM ,Receive FIFO Interrupt Mask" "Disabled,Enabled"
bitfld.long 0x04 1. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled"
textline " "
bitfld.long 0x04 0. " RORIM ,Receive Overrun Interrupt Mask" "Disabled,Enabled"
rgroup.long 0x18++0x07
line.long 0x00 "SSP_RISR,SSP Raw Interrupt Status Register"
bitfld.long 0x00 3. " TXRIS ,Transmit FIFO raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 2. " RXRIS ,Receive FIFO raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 1. " RTRIS ,Receive Timeout raw interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 0. " RORRIS ,Receive Overrun raw interrupt state" "Not occurred,Occurred"
line.long 0x04 "SSP_MISR,Interrupt Priority Register"
bitfld.long 0x04 3. " TXMIS ,Transmit FIFO masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 2. " RXMIS ,Receive FIFO masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 1. " RTMIS ,Receive Timeout masked interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x04 0. " RORMIS ,Receive Overrun masked interrupt state" "Not occurred,Occurred"
wgroup.long 0x20++0x03
line.long 0x00 "SSP_ICR,SSP Interrupt Clear Register"
bitfld.long 0x00 1. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 0. " RORIC ,Receive Overrun Interrupt Clear" "No effect,Clear"
group.long 0x24++0x03
line.long 0x00 "SSP_DMACR,SSP DMA Control Register"
bitfld.long 0x00 1. " TXDMAE ,DMA for the transmit FIFO Enable/ Disable Control Bit" "Disabled,Enabled"
bitfld.long 0x00 0. " RXDMAE ,DMA for the receive FIFO Enable/ Disable Control Bit" "Disabled,Enabled"
width 11.
tree.end
tree.end
tree "STT (Stamp Timer)"
base ad:0x40068000
width 11.
rgroup.long 0x00++0x03
line.long 0x00 "STT_IDR,STT ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x03
line.long 0x00 "STT_CEDR,STT Clock Enable/ Disable Register"
bitfld.long 0x00 31. " DBGEN ,Debug Mode Enable/Disable Control Bit" "Disabled,Enabled"
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
wgroup.long 0x08++0x07
line.long 0x00 "STT_SRR,STT Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,STT software reset"
line.long 0x04 "STT_CR,STT Control Register"
bitfld.long 0x04 4. " ALARMDIS ,STT alarm disable" "No effect,Disable"
bitfld.long 0x04 3. " ALARMEN ,STT alarm enable" "No effect,Enable"
bitfld.long 0x04 2. " CNTDIS ,STT counter disable" "No effect,Disable"
textline " "
bitfld.long 0x04 1. " CNTEN ,STT counter enable" "No effect,Enable"
group.long 0x10++0x07
line.long 0x00 "STT_MR,STT Mode Register"
bitfld.long 0x00 0. " CNTRST ,Counter Reset" "Reset at 0xA8BFFFFF,Reset at 0xFFFFFFFF"
line.long 0x04 "STT_IMSCR,STT Interrupt Mask Set/Clear Register"
bitfld.long 0x04 4. " ALARMDIS ,Alarm Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x04 3. " ALARMEN ,Alarm Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x04 2. " CNTDIS ,Counter Interrupt Mask Set/Clear Bit" "Masked,Not masked"
textline " "
bitfld.long 0x04 1. " CNTEN ,Counter Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x04 0. " ALARM ,Alarm Interrupt Mask Set/Clear Bit" "Masked,Not masked"
rgroup.long 0x18++0x07
line.long 0x00 "STT_ RISR,STT Raw Interrupt Status Register"
bitfld.long 0x00 4. " ALARMDIS ,Raw interrupt state of ALARMDIS" "Not occurred,Occurred"
bitfld.long 0x00 3. " ALARMEN ,Raw interrupt state of ALARMEN" "Not occurred,Occurred"
bitfld.long 0x00 2. " CNTDIS ,Raw interrupt state of CNTDIS" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 1. " CNTEN ,Raw interrupt state of CNTEN" "Not occurred,Occurred"
bitfld.long 0x00 0. " ALARM ,Raw interrupt state of ALARM" "Not occurred,Occurred"
line.long 0x04 "STT_MISR,STT Masked Interrupt Status Register"
bitfld.long 0x04 4. " ALARMDIS ,Masked interrupt status of ALARMDIS" "Not occurred,Occurred"
bitfld.long 0x04 3. " ALARMEN ,Masked interrupt status of ALARMEN" "Not occurred,Occurred"
bitfld.long 0x04 2. " CNTDIS ,Masked interrupt status of CNTDIS" "Not occurred,Occurred"
textline " "
bitfld.long 0x04 1. " CNTEN ,Masked interrupt status of CNTEN" "Not occurred,Occurred"
bitfld.long 0x04 0. " ALARM ,Masked interrupt status of ALARM" "Not occurred,Occurred"
wgroup.long 0x20++0x03
line.long 0x00 "STT_ ICR,STT Interrupt Clear Register"
bitfld.long 0x00 4. " ALARMDIS ,Clears the ALARMDIS interrupt" "No effect,Clear"
bitfld.long 0x00 3. " ALARMEN ,Clears the ALARMEN interrupt" "No effect,Clear"
bitfld.long 0x00 2. " CNTDIS ,Clears the CNTDIS interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 1. " CNTEN ,Clears the CNTEN interrupt" "No effect,Clear"
bitfld.long 0x00 0. " ALARM ,Clears the ALARM interrupt" "No effect,Clear"
rgroup.long 0x24++0x03
line.long 0x00 "STT_SR,STT Status Register"
bitfld.long 0x00 9. " ALARMENS ,Alarm Enable Status" "Disabled,Enabled"
bitfld.long 0x00 8. " CNTENS ,Counter enable status" "Disabled,Enabled"
bitfld.long 0x00 6. " WSEC ,Write counter" "No effect,Occurred"
group.long 0x28++0x07
line.long 0x00 "STT_CNTR,STT Count Register"
hexmask.long 0x00 0.--31. 1. " COUNT ,Counter register"
line.long 0x04 "STT_ALR,STT Alarm Register"
hexmask.long 0x04 0.--31. 1. " ALARMREG ,Alarm Register"
width 11.
tree.end
tree.open "TC (16-bit Timer/Counter)"
tree "TC0"
base ad:0x40060000
width 10.
rgroup.long 0x00++0x03
line.long 0x00 "TC_IDR,Timer/Counter ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x07
line.long 0x00 "TC_CSSR,Timer/Counter Clock Source Selection Register"
bitfld.long 0x00 0. " CLKSRC ,Clock Source Selection Field" "PCLK,External clock"
line.long 0x04 "TC_CEDR,Timer/Counter Clock Enable/Disable Register"
bitfld.long 0x04 31. " DBGEN ,Debug Mode Enable/Disable Control Bit" "Disabled,Enabled"
bitfld.long 0x04 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
wgroup.long 0x0C++0x03
line.long 0x00 "TC_SRR,Timer/Counter Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
group.long 0x18++0x03
line.long 0x00 "TC_SR,Timer/Counter Status Register"
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " PWMEX5_set/clr ,PWM output extension 5 status" "Disabled,Enabled"
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " PWMEX4_set/clr ,PWM output extension 4 status" "Disabled,Enabled"
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " PWMEX3_set/clr ,PWM output extension 3 status" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " PWMEX2_set/clr ,PWM output extension 2 status" "Disabled,Enabled"
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " PWMEX1_set/clr ,PWM output extension 1 status" "Disabled,Enabled"
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " PWMEX0_set/clr ,PWM output extension 0 status " "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " CAPT_R_set/clr ,Capture by Rising Edge Trigger" "Disabled,Enabled"
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CAPT_F_set/clr ,Capture by Falling Edge Trigger" "Disabled,Enabled"
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " ADTRIG_set/clr ,ADC Trigger" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " OVFM_set/clr ,Overflow Mode" "Disabled,Enabled"
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " REPEAT_set/clr ,Auto Repeat Mode" "Disabled,Enabled"
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " PWMEN_set/clr ,PWM Enable" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " PWMIM_set/clr ,Interval mode" "PWM mode,Interval mode"
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " KEEP_set/clr ,Keep Stop Level" "Disabled,Enabled"
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " OUTSL_set/clr ,PWM Output Start Level" "Low,High"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " IDLESL_set/clr ,IDLE State Level" "Low,High"
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " STOPCLEAR_set/clr ,Stop Count Clear" "Disabled,Enabled"
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " STOPHOLD_set/clr ,Stop Count Hold" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " START_set/clr ,Counter Start" "Stopped,Started"
group.long 0x1C++0x03
line.long 0x00 "TC_IMSCR,Timer/Counter Interrupt Mask Set/Clear Register"
bitfld.long 0x00 6. " CAPTI ,Capture Trigger Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 5. " OVFI ,Timer/Counter Overflow Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 4. " PULSEMI ,Pulse Match Interrupt Mask Set/Clear Bit" "Masked,Not masked"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Period Match Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 2. " PSTARTI ,Period Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 1. " STOPI ,Stop Interrupt Mask Set/Clear Bit" "Masked,Not masked"
textline " "
bitfld.long 0x00 0. " STARTI ,Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
rgroup.long 0x20++0x07
line.long 0x00 "TC_RISR,Timer/Counter Raw Interrupt Status Register"
bitfld.long 0x00 6. " CAPTI ,Raw interrupt state of the CAPT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. " OVFI ,Raw interrupt state of the OVF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. " PULSEMI ,Raw interrupt state of the Pulse Match interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Raw interrupt state of the Period Match interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. " PSTARTI ,Raw interrupt state of the PSTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. " STOPI ,Raw interrupt state of the STOP interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " STARTI ,Raw interrupt state of the START interrupt" "No interrupt,Interrupt"
line.long 0x04 "TC_MISR,Timer/Counter Masked Interrupt Status Register"
bitfld.long 0x04 6. " CAPTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. " OVFI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. " PULSEMI ,Masked interrupt status of the Pulse Match interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 3. " PERIODMI ,Masked interrupt status of the Period Match interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. " PSTARTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. " STOPI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 0. " STARTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
wgroup.long 0x28++0x03
line.long 0x00 "TC_ICR,Timer/Counter Interrupt Clear Register"
bitfld.long 0x00 6. " CAPTI ,Clears the CAPT interrupt" "No effect,Clear"
bitfld.long 0x00 5. " OVFI ,Clears the OVF interrupt" "No effect,Clear"
bitfld.long 0x00 4. " PULSEMI ,Clears the Pulse Match interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Clears the Period Match interrupt" "No effect,Clear"
bitfld.long 0x00 2. " PSTARTI ,Clears the PSTART interrupt" "No effect,Clear"
bitfld.long 0x00 1. " STOPI ,Clears the STOP interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 0. " STARTI ,Clears the START interrupt" "No effect,Clear"
group.long 0x2C++0x0F
line.long 0x00 "TC_CDR,Timer/Counter Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "TC_CSMR,Timer/Counter Counter Size Mask Register"
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
line.long 0x08 "TC_PRDR,Timer/Counter Period Register"
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
line.long 0x0C "TC_PULR,Timer/Counter Pulse Register"
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
rgroup.long 0x3C++0x1B
line.long 0x00 "TC_CCDR,Timer/Counter Current Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "TC_CCSMR,Timer/Counter Current Counter Size Mask Register"
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
line.long 0x08 "TC_CPRDR,Timer/Counter Current Period Register"
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
line.long 0x0C "TC_CPULR,Timer/Counter Current Pulse Register"
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
line.long 0x10 "TC_CUCR,Timer/Counter Capture up Counter Value Register"
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Capture Up Count Value"
line.long 0x14 "TC_CDCR,Timer/Counter Capture down Counter Value Register"
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Capture Down Count Value"
line.long 0x18 "TC_CVCR,Timer/Counter Counter Value Register"
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Current Count Value"
width 11.
tree.end
tree "TC1"
base ad:0x40061000
width 10.
rgroup.long 0x00++0x03
line.long 0x00 "TC_IDR,Timer/Counter ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x07
line.long 0x00 "TC_CSSR,Timer/Counter Clock Source Selection Register"
bitfld.long 0x00 0. " CLKSRC ,Clock Source Selection Field" "PCLK,External clock"
line.long 0x04 "TC_CEDR,Timer/Counter Clock Enable/Disable Register"
bitfld.long 0x04 31. " DBGEN ,Debug Mode Enable/Disable Control Bit" "Disabled,Enabled"
bitfld.long 0x04 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
wgroup.long 0x0C++0x03
line.long 0x00 "TC_SRR,Timer/Counter Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
group.long 0x18++0x03
line.long 0x00 "TC_SR,Timer/Counter Status Register"
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " PWMEX5_set/clr ,PWM output extension 5 status" "Disabled,Enabled"
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " PWMEX4_set/clr ,PWM output extension 4 status" "Disabled,Enabled"
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " PWMEX3_set/clr ,PWM output extension 3 status" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " PWMEX2_set/clr ,PWM output extension 2 status" "Disabled,Enabled"
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " PWMEX1_set/clr ,PWM output extension 1 status" "Disabled,Enabled"
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " PWMEX0_set/clr ,PWM output extension 0 status " "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " CAPT_R_set/clr ,Capture by Rising Edge Trigger" "Disabled,Enabled"
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CAPT_F_set/clr ,Capture by Falling Edge Trigger" "Disabled,Enabled"
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " ADTRIG_set/clr ,ADC Trigger" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " OVFM_set/clr ,Overflow Mode" "Disabled,Enabled"
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " REPEAT_set/clr ,Auto Repeat Mode" "Disabled,Enabled"
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " PWMEN_set/clr ,PWM Enable" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " PWMIM_set/clr ,Interval mode" "PWM mode,Interval mode"
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " KEEP_set/clr ,Keep Stop Level" "Disabled,Enabled"
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " OUTSL_set/clr ,PWM Output Start Level" "Low,High"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " IDLESL_set/clr ,IDLE State Level" "Low,High"
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " STOPCLEAR_set/clr ,Stop Count Clear" "Disabled,Enabled"
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " STOPHOLD_set/clr ,Stop Count Hold" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " START_set/clr ,Counter Start" "Stopped,Started"
group.long 0x1C++0x03
line.long 0x00 "TC_IMSCR,Timer/Counter Interrupt Mask Set/Clear Register"
bitfld.long 0x00 6. " CAPTI ,Capture Trigger Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 5. " OVFI ,Timer/Counter Overflow Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 4. " PULSEMI ,Pulse Match Interrupt Mask Set/Clear Bit" "Masked,Not masked"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Period Match Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 2. " PSTARTI ,Period Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 1. " STOPI ,Stop Interrupt Mask Set/Clear Bit" "Masked,Not masked"
textline " "
bitfld.long 0x00 0. " STARTI ,Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
rgroup.long 0x20++0x07
line.long 0x00 "TC_RISR,Timer/Counter Raw Interrupt Status Register"
bitfld.long 0x00 6. " CAPTI ,Raw interrupt state of the CAPT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. " OVFI ,Raw interrupt state of the OVF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. " PULSEMI ,Raw interrupt state of the Pulse Match interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Raw interrupt state of the Period Match interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. " PSTARTI ,Raw interrupt state of the PSTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. " STOPI ,Raw interrupt state of the STOP interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " STARTI ,Raw interrupt state of the START interrupt" "No interrupt,Interrupt"
line.long 0x04 "TC_MISR,Timer/Counter Masked Interrupt Status Register"
bitfld.long 0x04 6. " CAPTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. " OVFI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. " PULSEMI ,Masked interrupt status of the Pulse Match interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 3. " PERIODMI ,Masked interrupt status of the Period Match interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. " PSTARTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. " STOPI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 0. " STARTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
wgroup.long 0x28++0x03
line.long 0x00 "TC_ICR,Timer/Counter Interrupt Clear Register"
bitfld.long 0x00 6. " CAPTI ,Clears the CAPT interrupt" "No effect,Clear"
bitfld.long 0x00 5. " OVFI ,Clears the OVF interrupt" "No effect,Clear"
bitfld.long 0x00 4. " PULSEMI ,Clears the Pulse Match interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Clears the Period Match interrupt" "No effect,Clear"
bitfld.long 0x00 2. " PSTARTI ,Clears the PSTART interrupt" "No effect,Clear"
bitfld.long 0x00 1. " STOPI ,Clears the STOP interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 0. " STARTI ,Clears the START interrupt" "No effect,Clear"
group.long 0x2C++0x0F
line.long 0x00 "TC_CDR,Timer/Counter Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "TC_CSMR,Timer/Counter Counter Size Mask Register"
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
line.long 0x08 "TC_PRDR,Timer/Counter Period Register"
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
line.long 0x0C "TC_PULR,Timer/Counter Pulse Register"
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
rgroup.long 0x3C++0x1B
line.long 0x00 "TC_CCDR,Timer/Counter Current Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "TC_CCSMR,Timer/Counter Current Counter Size Mask Register"
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
line.long 0x08 "TC_CPRDR,Timer/Counter Current Period Register"
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
line.long 0x0C "TC_CPULR,Timer/Counter Current Pulse Register"
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
line.long 0x10 "TC_CUCR,Timer/Counter Capture up Counter Value Register"
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Capture Up Count Value"
line.long 0x14 "TC_CDCR,Timer/Counter Capture down Counter Value Register"
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Capture Down Count Value"
line.long 0x18 "TC_CVCR,Timer/Counter Counter Value Register"
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Current Count Value"
width 11.
tree.end
tree "TC2"
base ad:0x40062000
width 10.
rgroup.long 0x00++0x03
line.long 0x00 "TC_IDR,Timer/Counter ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x07
line.long 0x00 "TC_CSSR,Timer/Counter Clock Source Selection Register"
bitfld.long 0x00 0. " CLKSRC ,Clock Source Selection Field" "PCLK,External clock"
line.long 0x04 "TC_CEDR,Timer/Counter Clock Enable/Disable Register"
bitfld.long 0x04 31. " DBGEN ,Debug Mode Enable/Disable Control Bit" "Disabled,Enabled"
bitfld.long 0x04 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
wgroup.long 0x0C++0x03
line.long 0x00 "TC_SRR,Timer/Counter Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
group.long 0x18++0x03
line.long 0x00 "TC_SR,Timer/Counter Status Register"
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " PWMEX5_set/clr ,PWM output extension 5 status" "Disabled,Enabled"
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " PWMEX4_set/clr ,PWM output extension 4 status" "Disabled,Enabled"
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " PWMEX3_set/clr ,PWM output extension 3 status" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " PWMEX2_set/clr ,PWM output extension 2 status" "Disabled,Enabled"
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " PWMEX1_set/clr ,PWM output extension 1 status" "Disabled,Enabled"
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " PWMEX0_set/clr ,PWM output extension 0 status " "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " CAPT_R_set/clr ,Capture by Rising Edge Trigger" "Disabled,Enabled"
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CAPT_F_set/clr ,Capture by Falling Edge Trigger" "Disabled,Enabled"
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " ADTRIG_set/clr ,ADC Trigger" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " OVFM_set/clr ,Overflow Mode" "Disabled,Enabled"
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " REPEAT_set/clr ,Auto Repeat Mode" "Disabled,Enabled"
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " PWMEN_set/clr ,PWM Enable" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " PWMIM_set/clr ,Interval mode" "PWM mode,Interval mode"
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " KEEP_set/clr ,Keep Stop Level" "Disabled,Enabled"
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " OUTSL_set/clr ,PWM Output Start Level" "Low,High"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " IDLESL_set/clr ,IDLE State Level" "Low,High"
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " STOPCLEAR_set/clr ,Stop Count Clear" "Disabled,Enabled"
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " STOPHOLD_set/clr ,Stop Count Hold" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " START_set/clr ,Counter Start" "Stopped,Started"
group.long 0x1C++0x03
line.long 0x00 "TC_IMSCR,Timer/Counter Interrupt Mask Set/Clear Register"
bitfld.long 0x00 6. " CAPTI ,Capture Trigger Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 5. " OVFI ,Timer/Counter Overflow Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 4. " PULSEMI ,Pulse Match Interrupt Mask Set/Clear Bit" "Masked,Not masked"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Period Match Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 2. " PSTARTI ,Period Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 1. " STOPI ,Stop Interrupt Mask Set/Clear Bit" "Masked,Not masked"
textline " "
bitfld.long 0x00 0. " STARTI ,Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
rgroup.long 0x20++0x07
line.long 0x00 "TC_RISR,Timer/Counter Raw Interrupt Status Register"
bitfld.long 0x00 6. " CAPTI ,Raw interrupt state of the CAPT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. " OVFI ,Raw interrupt state of the OVF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. " PULSEMI ,Raw interrupt state of the Pulse Match interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Raw interrupt state of the Period Match interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. " PSTARTI ,Raw interrupt state of the PSTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. " STOPI ,Raw interrupt state of the STOP interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " STARTI ,Raw interrupt state of the START interrupt" "No interrupt,Interrupt"
line.long 0x04 "TC_MISR,Timer/Counter Masked Interrupt Status Register"
bitfld.long 0x04 6. " CAPTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. " OVFI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. " PULSEMI ,Masked interrupt status of the Pulse Match interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 3. " PERIODMI ,Masked interrupt status of the Period Match interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. " PSTARTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. " STOPI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 0. " STARTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
wgroup.long 0x28++0x03
line.long 0x00 "TC_ICR,Timer/Counter Interrupt Clear Register"
bitfld.long 0x00 6. " CAPTI ,Clears the CAPT interrupt" "No effect,Clear"
bitfld.long 0x00 5. " OVFI ,Clears the OVF interrupt" "No effect,Clear"
bitfld.long 0x00 4. " PULSEMI ,Clears the Pulse Match interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Clears the Period Match interrupt" "No effect,Clear"
bitfld.long 0x00 2. " PSTARTI ,Clears the PSTART interrupt" "No effect,Clear"
bitfld.long 0x00 1. " STOPI ,Clears the STOP interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 0. " STARTI ,Clears the START interrupt" "No effect,Clear"
group.long 0x2C++0x0F
line.long 0x00 "TC_CDR,Timer/Counter Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "TC_CSMR,Timer/Counter Counter Size Mask Register"
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
line.long 0x08 "TC_PRDR,Timer/Counter Period Register"
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
line.long 0x0C "TC_PULR,Timer/Counter Pulse Register"
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
rgroup.long 0x3C++0x1B
line.long 0x00 "TC_CCDR,Timer/Counter Current Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "TC_CCSMR,Timer/Counter Current Counter Size Mask Register"
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
line.long 0x08 "TC_CPRDR,Timer/Counter Current Period Register"
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
line.long 0x0C "TC_CPULR,Timer/Counter Current Pulse Register"
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
line.long 0x10 "TC_CUCR,Timer/Counter Capture up Counter Value Register"
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Capture Up Count Value"
line.long 0x14 "TC_CDCR,Timer/Counter Capture down Counter Value Register"
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Capture Down Count Value"
line.long 0x18 "TC_CVCR,Timer/Counter Counter Value Register"
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Current Count Value"
width 11.
tree.end
tree "TC3"
base ad:0x40063000
width 10.
rgroup.long 0x00++0x03
line.long 0x00 "TC_IDR,Timer/Counter ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x07
line.long 0x00 "TC_CSSR,Timer/Counter Clock Source Selection Register"
bitfld.long 0x00 0. " CLKSRC ,Clock Source Selection Field" "PCLK,External clock"
line.long 0x04 "TC_CEDR,Timer/Counter Clock Enable/Disable Register"
bitfld.long 0x04 31. " DBGEN ,Debug Mode Enable/Disable Control Bit" "Disabled,Enabled"
bitfld.long 0x04 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
wgroup.long 0x0C++0x03
line.long 0x00 "TC_SRR,Timer/Counter Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
group.long 0x18++0x03
line.long 0x00 "TC_SR,Timer/Counter Status Register"
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " PWMEX5_set/clr ,PWM output extension 5 status" "Disabled,Enabled"
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " PWMEX4_set/clr ,PWM output extension 4 status" "Disabled,Enabled"
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " PWMEX3_set/clr ,PWM output extension 3 status" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " PWMEX2_set/clr ,PWM output extension 2 status" "Disabled,Enabled"
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " PWMEX1_set/clr ,PWM output extension 1 status" "Disabled,Enabled"
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " PWMEX0_set/clr ,PWM output extension 0 status " "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " CAPT_R_set/clr ,Capture by Rising Edge Trigger" "Disabled,Enabled"
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CAPT_F_set/clr ,Capture by Falling Edge Trigger" "Disabled,Enabled"
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " ADTRIG_set/clr ,ADC Trigger" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " OVFM_set/clr ,Overflow Mode" "Disabled,Enabled"
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " REPEAT_set/clr ,Auto Repeat Mode" "Disabled,Enabled"
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " PWMEN_set/clr ,PWM Enable" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " PWMIM_set/clr ,Interval mode" "PWM mode,Interval mode"
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " KEEP_set/clr ,Keep Stop Level" "Disabled,Enabled"
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " OUTSL_set/clr ,PWM Output Start Level" "Low,High"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " IDLESL_set/clr ,IDLE State Level" "Low,High"
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " STOPCLEAR_set/clr ,Stop Count Clear" "Disabled,Enabled"
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " STOPHOLD_set/clr ,Stop Count Hold" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " START_set/clr ,Counter Start" "Stopped,Started"
group.long 0x1C++0x03
line.long 0x00 "TC_IMSCR,Timer/Counter Interrupt Mask Set/Clear Register"
bitfld.long 0x00 6. " CAPTI ,Capture Trigger Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 5. " OVFI ,Timer/Counter Overflow Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 4. " PULSEMI ,Pulse Match Interrupt Mask Set/Clear Bit" "Masked,Not masked"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Period Match Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 2. " PSTARTI ,Period Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 1. " STOPI ,Stop Interrupt Mask Set/Clear Bit" "Masked,Not masked"
textline " "
bitfld.long 0x00 0. " STARTI ,Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
rgroup.long 0x20++0x07
line.long 0x00 "TC_RISR,Timer/Counter Raw Interrupt Status Register"
bitfld.long 0x00 6. " CAPTI ,Raw interrupt state of the CAPT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. " OVFI ,Raw interrupt state of the OVF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. " PULSEMI ,Raw interrupt state of the Pulse Match interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Raw interrupt state of the Period Match interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. " PSTARTI ,Raw interrupt state of the PSTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. " STOPI ,Raw interrupt state of the STOP interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " STARTI ,Raw interrupt state of the START interrupt" "No interrupt,Interrupt"
line.long 0x04 "TC_MISR,Timer/Counter Masked Interrupt Status Register"
bitfld.long 0x04 6. " CAPTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. " OVFI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. " PULSEMI ,Masked interrupt status of the Pulse Match interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 3. " PERIODMI ,Masked interrupt status of the Period Match interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. " PSTARTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. " STOPI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 0. " STARTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
wgroup.long 0x28++0x03
line.long 0x00 "TC_ICR,Timer/Counter Interrupt Clear Register"
bitfld.long 0x00 6. " CAPTI ,Clears the CAPT interrupt" "No effect,Clear"
bitfld.long 0x00 5. " OVFI ,Clears the OVF interrupt" "No effect,Clear"
bitfld.long 0x00 4. " PULSEMI ,Clears the Pulse Match interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Clears the Period Match interrupt" "No effect,Clear"
bitfld.long 0x00 2. " PSTARTI ,Clears the PSTART interrupt" "No effect,Clear"
bitfld.long 0x00 1. " STOPI ,Clears the STOP interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 0. " STARTI ,Clears the START interrupt" "No effect,Clear"
group.long 0x2C++0x0F
line.long 0x00 "TC_CDR,Timer/Counter Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "TC_CSMR,Timer/Counter Counter Size Mask Register"
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
line.long 0x08 "TC_PRDR,Timer/Counter Period Register"
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
line.long 0x0C "TC_PULR,Timer/Counter Pulse Register"
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
rgroup.long 0x3C++0x1B
line.long 0x00 "TC_CCDR,Timer/Counter Current Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "TC_CCSMR,Timer/Counter Current Counter Size Mask Register"
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
line.long 0x08 "TC_CPRDR,Timer/Counter Current Period Register"
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
line.long 0x0C "TC_CPULR,Timer/Counter Current Pulse Register"
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
line.long 0x10 "TC_CUCR,Timer/Counter Capture up Counter Value Register"
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Capture Up Count Value"
line.long 0x14 "TC_CDCR,Timer/Counter Capture down Counter Value Register"
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Capture Down Count Value"
line.long 0x18 "TC_CVCR,Timer/Counter Counter Value Register"
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Current Count Value"
width 11.
tree.end
tree "TC4"
base ad:0x40064000
width 10.
rgroup.long 0x00++0x03
line.long 0x00 "TC_IDR,Timer/Counter ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x07
line.long 0x00 "TC_CSSR,Timer/Counter Clock Source Selection Register"
bitfld.long 0x00 0. " CLKSRC ,Clock Source Selection Field" "PCLK,External clock"
line.long 0x04 "TC_CEDR,Timer/Counter Clock Enable/Disable Register"
bitfld.long 0x04 31. " DBGEN ,Debug Mode Enable/Disable Control Bit" "Disabled,Enabled"
bitfld.long 0x04 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
wgroup.long 0x0C++0x03
line.long 0x00 "TC_SRR,Timer/Counter Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
group.long 0x18++0x03
line.long 0x00 "TC_SR,Timer/Counter Status Register"
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " PWMEX5_set/clr ,PWM output extension 5 status" "Disabled,Enabled"
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " PWMEX4_set/clr ,PWM output extension 4 status" "Disabled,Enabled"
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " PWMEX3_set/clr ,PWM output extension 3 status" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " PWMEX2_set/clr ,PWM output extension 2 status" "Disabled,Enabled"
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " PWMEX1_set/clr ,PWM output extension 1 status" "Disabled,Enabled"
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " PWMEX0_set/clr ,PWM output extension 0 status " "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " CAPT_R_set/clr ,Capture by Rising Edge Trigger" "Disabled,Enabled"
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CAPT_F_set/clr ,Capture by Falling Edge Trigger" "Disabled,Enabled"
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " ADTRIG_set/clr ,ADC Trigger" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " OVFM_set/clr ,Overflow Mode" "Disabled,Enabled"
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " REPEAT_set/clr ,Auto Repeat Mode" "Disabled,Enabled"
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " PWMEN_set/clr ,PWM Enable" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " PWMIM_set/clr ,Interval mode" "PWM mode,Interval mode"
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " KEEP_set/clr ,Keep Stop Level" "Disabled,Enabled"
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " OUTSL_set/clr ,PWM Output Start Level" "Low,High"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " IDLESL_set/clr ,IDLE State Level" "Low,High"
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " STOPCLEAR_set/clr ,Stop Count Clear" "Disabled,Enabled"
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " STOPHOLD_set/clr ,Stop Count Hold" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " START_set/clr ,Counter Start" "Stopped,Started"
group.long 0x1C++0x03
line.long 0x00 "TC_IMSCR,Timer/Counter Interrupt Mask Set/Clear Register"
bitfld.long 0x00 6. " CAPTI ,Capture Trigger Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 5. " OVFI ,Timer/Counter Overflow Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 4. " PULSEMI ,Pulse Match Interrupt Mask Set/Clear Bit" "Masked,Not masked"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Period Match Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 2. " PSTARTI ,Period Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 1. " STOPI ,Stop Interrupt Mask Set/Clear Bit" "Masked,Not masked"
textline " "
bitfld.long 0x00 0. " STARTI ,Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
rgroup.long 0x20++0x07
line.long 0x00 "TC_RISR,Timer/Counter Raw Interrupt Status Register"
bitfld.long 0x00 6. " CAPTI ,Raw interrupt state of the CAPT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. " OVFI ,Raw interrupt state of the OVF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. " PULSEMI ,Raw interrupt state of the Pulse Match interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Raw interrupt state of the Period Match interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. " PSTARTI ,Raw interrupt state of the PSTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. " STOPI ,Raw interrupt state of the STOP interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " STARTI ,Raw interrupt state of the START interrupt" "No interrupt,Interrupt"
line.long 0x04 "TC_MISR,Timer/Counter Masked Interrupt Status Register"
bitfld.long 0x04 6. " CAPTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. " OVFI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. " PULSEMI ,Masked interrupt status of the Pulse Match interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 3. " PERIODMI ,Masked interrupt status of the Period Match interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. " PSTARTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. " STOPI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 0. " STARTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
wgroup.long 0x28++0x03
line.long 0x00 "TC_ICR,Timer/Counter Interrupt Clear Register"
bitfld.long 0x00 6. " CAPTI ,Clears the CAPT interrupt" "No effect,Clear"
bitfld.long 0x00 5. " OVFI ,Clears the OVF interrupt" "No effect,Clear"
bitfld.long 0x00 4. " PULSEMI ,Clears the Pulse Match interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Clears the Period Match interrupt" "No effect,Clear"
bitfld.long 0x00 2. " PSTARTI ,Clears the PSTART interrupt" "No effect,Clear"
bitfld.long 0x00 1. " STOPI ,Clears the STOP interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 0. " STARTI ,Clears the START interrupt" "No effect,Clear"
group.long 0x2C++0x0F
line.long 0x00 "TC_CDR,Timer/Counter Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "TC_CSMR,Timer/Counter Counter Size Mask Register"
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
line.long 0x08 "TC_PRDR,Timer/Counter Period Register"
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
line.long 0x0C "TC_PULR,Timer/Counter Pulse Register"
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
rgroup.long 0x3C++0x1B
line.long 0x00 "TC_CCDR,Timer/Counter Current Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "TC_CCSMR,Timer/Counter Current Counter Size Mask Register"
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
line.long 0x08 "TC_CPRDR,Timer/Counter Current Period Register"
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
line.long 0x0C "TC_CPULR,Timer/Counter Current Pulse Register"
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
line.long 0x10 "TC_CUCR,Timer/Counter Capture up Counter Value Register"
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Capture Up Count Value"
line.long 0x14 "TC_CDCR,Timer/Counter Capture down Counter Value Register"
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Capture Down Count Value"
line.long 0x18 "TC_CVCR,Timer/Counter Counter Value Register"
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Current Count Value"
width 11.
tree.end
tree "TC5"
base ad:0x40065000
width 10.
rgroup.long 0x00++0x03
line.long 0x00 "TC_IDR,Timer/Counter ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x07
line.long 0x00 "TC_CSSR,Timer/Counter Clock Source Selection Register"
bitfld.long 0x00 0. " CLKSRC ,Clock Source Selection Field" "PCLK,External clock"
line.long 0x04 "TC_CEDR,Timer/Counter Clock Enable/Disable Register"
bitfld.long 0x04 31. " DBGEN ,Debug Mode Enable/Disable Control Bit" "Disabled,Enabled"
bitfld.long 0x04 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
wgroup.long 0x0C++0x03
line.long 0x00 "TC_SRR,Timer/Counter Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
group.long 0x18++0x03
line.long 0x00 "TC_SR,Timer/Counter Status Register"
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " PWMEX5_set/clr ,PWM output extension 5 status" "Disabled,Enabled"
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " PWMEX4_set/clr ,PWM output extension 4 status" "Disabled,Enabled"
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " PWMEX3_set/clr ,PWM output extension 3 status" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " PWMEX2_set/clr ,PWM output extension 2 status" "Disabled,Enabled"
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " PWMEX1_set/clr ,PWM output extension 1 status" "Disabled,Enabled"
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " PWMEX0_set/clr ,PWM output extension 0 status " "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " CAPT_R_set/clr ,Capture by Rising Edge Trigger" "Disabled,Enabled"
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CAPT_F_set/clr ,Capture by Falling Edge Trigger" "Disabled,Enabled"
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " ADTRIG_set/clr ,ADC Trigger" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " OVFM_set/clr ,Overflow Mode" "Disabled,Enabled"
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " REPEAT_set/clr ,Auto Repeat Mode" "Disabled,Enabled"
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " PWMEN_set/clr ,PWM Enable" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " PWMIM_set/clr ,Interval mode" "PWM mode,Interval mode"
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " KEEP_set/clr ,Keep Stop Level" "Disabled,Enabled"
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " OUTSL_set/clr ,PWM Output Start Level" "Low,High"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " IDLESL_set/clr ,IDLE State Level" "Low,High"
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " STOPCLEAR_set/clr ,Stop Count Clear" "Disabled,Enabled"
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " STOPHOLD_set/clr ,Stop Count Hold" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " START_set/clr ,Counter Start" "Stopped,Started"
group.long 0x1C++0x03
line.long 0x00 "TC_IMSCR,Timer/Counter Interrupt Mask Set/Clear Register"
bitfld.long 0x00 6. " CAPTI ,Capture Trigger Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 5. " OVFI ,Timer/Counter Overflow Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 4. " PULSEMI ,Pulse Match Interrupt Mask Set/Clear Bit" "Masked,Not masked"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Period Match Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 2. " PSTARTI ,Period Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 1. " STOPI ,Stop Interrupt Mask Set/Clear Bit" "Masked,Not masked"
textline " "
bitfld.long 0x00 0. " STARTI ,Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
rgroup.long 0x20++0x07
line.long 0x00 "TC_RISR,Timer/Counter Raw Interrupt Status Register"
bitfld.long 0x00 6. " CAPTI ,Raw interrupt state of the CAPT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. " OVFI ,Raw interrupt state of the OVF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. " PULSEMI ,Raw interrupt state of the Pulse Match interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Raw interrupt state of the Period Match interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. " PSTARTI ,Raw interrupt state of the PSTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. " STOPI ,Raw interrupt state of the STOP interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " STARTI ,Raw interrupt state of the START interrupt" "No interrupt,Interrupt"
line.long 0x04 "TC_MISR,Timer/Counter Masked Interrupt Status Register"
bitfld.long 0x04 6. " CAPTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. " OVFI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. " PULSEMI ,Masked interrupt status of the Pulse Match interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 3. " PERIODMI ,Masked interrupt status of the Period Match interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. " PSTARTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. " STOPI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 0. " STARTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
wgroup.long 0x28++0x03
line.long 0x00 "TC_ICR,Timer/Counter Interrupt Clear Register"
bitfld.long 0x00 6. " CAPTI ,Clears the CAPT interrupt" "No effect,Clear"
bitfld.long 0x00 5. " OVFI ,Clears the OVF interrupt" "No effect,Clear"
bitfld.long 0x00 4. " PULSEMI ,Clears the Pulse Match interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Clears the Period Match interrupt" "No effect,Clear"
bitfld.long 0x00 2. " PSTARTI ,Clears the PSTART interrupt" "No effect,Clear"
bitfld.long 0x00 1. " STOPI ,Clears the STOP interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 0. " STARTI ,Clears the START interrupt" "No effect,Clear"
group.long 0x2C++0x0F
line.long 0x00 "TC_CDR,Timer/Counter Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "TC_CSMR,Timer/Counter Counter Size Mask Register"
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
line.long 0x08 "TC_PRDR,Timer/Counter Period Register"
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
line.long 0x0C "TC_PULR,Timer/Counter Pulse Register"
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
rgroup.long 0x3C++0x1B
line.long 0x00 "TC_CCDR,Timer/Counter Current Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "TC_CCSMR,Timer/Counter Current Counter Size Mask Register"
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
line.long 0x08 "TC_CPRDR,Timer/Counter Current Period Register"
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
line.long 0x0C "TC_CPULR,Timer/Counter Current Pulse Register"
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
line.long 0x10 "TC_CUCR,Timer/Counter Capture up Counter Value Register"
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Capture Up Count Value"
line.long 0x14 "TC_CDCR,Timer/Counter Capture down Counter Value Register"
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Capture Down Count Value"
line.long 0x18 "TC_CVCR,Timer/Counter Counter Value Register"
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Current Count Value"
width 11.
tree.end
tree.end
tree.open "TC (32-bit Timer/Counter)"
tree "TC0"
base ad:0x40066000
width 10.
rgroup.long 0x00++0x03
line.long 0x00 "TC_IDR,Timer/Counter ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x07
line.long 0x00 "TC_CSSR,Timer/Counter Clock Source Selection Register"
bitfld.long 0x00 0. " CLKSRC ,Clock Source Selection Field" "PCLK,External clock"
line.long 0x04 "TC_CEDR,Timer/Counter Clock Enable/Disable Register"
bitfld.long 0x04 31. " DBGEN ,Debug Mode Enable/Disable Control Bit" "Disabled,Enabled"
bitfld.long 0x04 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
wgroup.long 0x0C++0x0B
line.long 0x00 "TC_SRR,Timer/Counter Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
group.long 0x18++0x03
line.long 0x00 "TC_SR,Timer/Counter Status Register"
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " PWMEX5_set/clr ,PWM output extension 5 status" "Disabled,Enabled"
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " PWMEX4_set/clr ,PWM output extension 4 status" "Disabled,Enabled"
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " PWMEX3_set/clr ,PWM output extension 3 status" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " PWMEX2_set/clr ,PWM output extension 2 status" "Disabled,Enabled"
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " PWMEX1_set/clr ,PWM output extension 1 status" "Disabled,Enabled"
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " PWMEX0_set/clr ,PWM output extension 0 status " "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " CAPT_R_set/clr ,Capture by Rising Edge Trigger" "Disabled,Enabled"
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CAPT_F_set/clr ,Capture by Falling Edge Trigger" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " ADTRIG_set/clr ,ADC Trigger" "Disabled,Enabled"
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " OVFM_set/clr ,Overflow Mode" "Disabled,Enabled"
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " REPEAT_set/clr ,Auto Repeat Mode" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " PWMEN_set/clr ,PWM Enable" "Disabled,Enabled"
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " PWMIM_set/clr ,Interval mode" "PWM mode,Interval mode"
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " KEEP_set/clr ,Keep Stop Level" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " OUTSL_set/clr ,PWM Output Start Level" "Low,High"
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " IDLESL_set/clr ,IDLE State Level" "Low,High"
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " STOPCLEAR_set/clr ,Stop Count Clear" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " STOPHOLD_set/clr ,Stop Count Hold" "Disabled,Enabled"
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " START_set/clr ,Counter Start" "Stopped,Started"
group.long 0x1C++0x03
line.long 0x00 "TC_IMSCR,Timer/Counter Interrupt Mask Set/Clear Register"
bitfld.long 0x00 6. " CAPTI ,Capture Trigger Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 5. " OVFI ,Timer/Counter Overflow Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 4. " PULSEMI ,Pulse Match Interrupt Mask Set/Clear Bit" "Masked,Not masked"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Period Match Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 2. " PSTARTI ,Period Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 1. " STOPI ,Stop Interrupt Mask Set/Clear Bit" "Masked,Not masked"
textline " "
bitfld.long 0x00 0. " STARTI ,Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
rgroup.long 0x20++0x07
line.long 0x00 "TC_RISR,Timer/Counter Raw Interrupt Status Register"
bitfld.long 0x00 6. " CAPTI ,Raw interrupt state of the CAPT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. " OVFI ,Raw interrupt state of the OVF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. " PULSEMI ,Raw interrupt state of the Pulse Match interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Raw interrupt state of the Period Match interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. " PSTARTI ,Raw interrupt state of the PSTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. " STOPI ,Raw interrupt state of the STOP interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " STARTI ,Raw interrupt state of the START interrupt" "No interrupt,Interrupt"
line.long 0x04 "TC_MISR,Timer/Counter Masked Interrupt Status Register"
bitfld.long 0x04 6. " CAPTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. " OVFI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. " PULSEMI ,Masked interrupt status of the Pulse Match interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 3. " PERIODMI ,Masked interrupt status of the Period Match interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. " PSTARTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. " STOPI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 0. " STARTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
wgroup.long 0x28++0x03
line.long 0x00 "TC_ICR,Timer/Counter Interrupt Clear Register"
bitfld.long 0x00 6. " CAPTI ,Clears the CAPT interrupt" "No effect,Clear"
bitfld.long 0x00 5. " OVFI ,Clears the OVF interrupt" "No effect,Clear"
bitfld.long 0x00 4. " PULSEMI ,Clears the Pulse Match interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Clears the Period Match interrupt" "No effect,Clear"
bitfld.long 0x00 2. " PSTARTI ,Clears the PSTART interrupt" "No effect,Clear"
bitfld.long 0x00 1. " STOPI ,Clears the STOP interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 0. " STARTI ,Clears the START interrupt" "No effect,Clear"
group.long 0x2C++0x0F
line.long 0x00 "TC_CDR,Timer/Counter Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "TC_CSMR,Timer/Counter Counter Size Mask Register"
bitfld.long 0x04 0.--4. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit,17-bit,18-bit,19-bit,20-bit,21-bit,22-bit,23-bit,24-bit,25-bit,26-bit,27-bit,28-bit,29-bit,30-bit,31-bit,32-bit"
line.long 0x08 "TC_PRDR,Timer/Counter Period Register"
line.long 0x0C "TC_PULR,Timer/Counter Pulse Register"
rgroup.long 0x3C++0x1B
line.long 0x00 "TC_CCDR,Timer/Counter Current Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "TC_CCSMR,Timer/Counter Current Counter Size Mask Register"
bitfld.long 0x04 0.--4. " SIZE ,Current Counter Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "TC_CPRDR,Timer/Counter Current Period Register"
line.long 0x0C "TC_CPULR,Timer/Counter Current Pulse Register"
line.long 0x10 "TC_CUCR,Timer/Counter Capture up Counter Value Register"
line.long 0x14 "TC_CDCR,Timer/Counter Capture down Counter Value Register"
line.long 0x18 "TC_CVCR,Timer/Counter Counter Value Register"
width 11.
tree.end
tree "TC1"
base ad:0x40067000
width 10.
rgroup.long 0x00++0x03
line.long 0x00 "TC_IDR,Timer/Counter ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x07
line.long 0x00 "TC_CSSR,Timer/Counter Clock Source Selection Register"
bitfld.long 0x00 0. " CLKSRC ,Clock Source Selection Field" "PCLK,External clock"
line.long 0x04 "TC_CEDR,Timer/Counter Clock Enable/Disable Register"
bitfld.long 0x04 31. " DBGEN ,Debug Mode Enable/Disable Control Bit" "Disabled,Enabled"
bitfld.long 0x04 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
wgroup.long 0x0C++0x0B
line.long 0x00 "TC_SRR,Timer/Counter Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
group.long 0x18++0x03
line.long 0x00 "TC_SR,Timer/Counter Status Register"
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " PWMEX5_set/clr ,PWM output extension 5 status" "Disabled,Enabled"
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " PWMEX4_set/clr ,PWM output extension 4 status" "Disabled,Enabled"
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " PWMEX3_set/clr ,PWM output extension 3 status" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " PWMEX2_set/clr ,PWM output extension 2 status" "Disabled,Enabled"
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " PWMEX1_set/clr ,PWM output extension 1 status" "Disabled,Enabled"
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " PWMEX0_set/clr ,PWM output extension 0 status " "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " CAPT_R_set/clr ,Capture by Rising Edge Trigger" "Disabled,Enabled"
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CAPT_F_set/clr ,Capture by Falling Edge Trigger" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " ADTRIG_set/clr ,ADC Trigger" "Disabled,Enabled"
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " OVFM_set/clr ,Overflow Mode" "Disabled,Enabled"
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " REPEAT_set/clr ,Auto Repeat Mode" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " PWMEN_set/clr ,PWM Enable" "Disabled,Enabled"
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " PWMIM_set/clr ,Interval mode" "PWM mode,Interval mode"
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " KEEP_set/clr ,Keep Stop Level" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " OUTSL_set/clr ,PWM Output Start Level" "Low,High"
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " IDLESL_set/clr ,IDLE State Level" "Low,High"
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " STOPCLEAR_set/clr ,Stop Count Clear" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " STOPHOLD_set/clr ,Stop Count Hold" "Disabled,Enabled"
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " START_set/clr ,Counter Start" "Stopped,Started"
group.long 0x1C++0x03
line.long 0x00 "TC_IMSCR,Timer/Counter Interrupt Mask Set/Clear Register"
bitfld.long 0x00 6. " CAPTI ,Capture Trigger Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 5. " OVFI ,Timer/Counter Overflow Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 4. " PULSEMI ,Pulse Match Interrupt Mask Set/Clear Bit" "Masked,Not masked"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Period Match Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 2. " PSTARTI ,Period Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
bitfld.long 0x00 1. " STOPI ,Stop Interrupt Mask Set/Clear Bit" "Masked,Not masked"
textline " "
bitfld.long 0x00 0. " STARTI ,Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
rgroup.long 0x20++0x07
line.long 0x00 "TC_RISR,Timer/Counter Raw Interrupt Status Register"
bitfld.long 0x00 6. " CAPTI ,Raw interrupt state of the CAPT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. " OVFI ,Raw interrupt state of the OVF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. " PULSEMI ,Raw interrupt state of the Pulse Match interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Raw interrupt state of the Period Match interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. " PSTARTI ,Raw interrupt state of the PSTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. " STOPI ,Raw interrupt state of the STOP interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " STARTI ,Raw interrupt state of the START interrupt" "No interrupt,Interrupt"
line.long 0x04 "TC_MISR,Timer/Counter Masked Interrupt Status Register"
bitfld.long 0x04 6. " CAPTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. " OVFI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. " PULSEMI ,Masked interrupt status of the Pulse Match interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 3. " PERIODMI ,Masked interrupt status of the Period Match interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. " PSTARTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. " STOPI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x04 0. " STARTI ,Masked interrupt status of the START interrupt" "No interrupt,Interrupt"
wgroup.long 0x28++0x03
line.long 0x00 "TC_ICR,Timer/Counter Interrupt Clear Register"
bitfld.long 0x00 6. " CAPTI ,Clears the CAPT interrupt" "No effect,Clear"
bitfld.long 0x00 5. " OVFI ,Clears the OVF interrupt" "No effect,Clear"
bitfld.long 0x00 4. " PULSEMI ,Clears the Pulse Match interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 3. " PERIODMI ,Clears the Period Match interrupt" "No effect,Clear"
bitfld.long 0x00 2. " PSTARTI ,Clears the PSTART interrupt" "No effect,Clear"
bitfld.long 0x00 1. " STOPI ,Clears the STOP interrupt" "No effect,Clear"
textline " "
bitfld.long 0x00 0. " STARTI ,Clears the START interrupt" "No effect,Clear"
group.long 0x2C++0x0F
line.long 0x00 "TC_CDR,Timer/Counter Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "TC_CSMR,Timer/Counter Counter Size Mask Register"
bitfld.long 0x04 0.--4. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit,17-bit,18-bit,19-bit,20-bit,21-bit,22-bit,23-bit,24-bit,25-bit,26-bit,27-bit,28-bit,29-bit,30-bit,31-bit,32-bit"
line.long 0x08 "TC_PRDR,Timer/Counter Period Register"
line.long 0x0C "TC_PULR,Timer/Counter Pulse Register"
rgroup.long 0x3C++0x1B
line.long 0x00 "TC_CCDR,Timer/Counter Current Clock Divider Register"
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "TC_CCSMR,Timer/Counter Current Counter Size Mask Register"
bitfld.long 0x04 0.--4. " SIZE ,Current Counter Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "TC_CPRDR,Timer/Counter Current Period Register"
line.long 0x0C "TC_CPULR,Timer/Counter Current Pulse Register"
line.long 0x10 "TC_CUCR,Timer/Counter Capture up Counter Value Register"
line.long 0x14 "TC_CDCR,Timer/Counter Capture down Counter Value Register"
line.long 0x18 "TC_CVCR,Timer/Counter Counter Value Register"
width 11.
tree.end
tree.end
tree.open "USART (Universal Asynchronous/Synchronous Receiver/Transmitter)"
tree "USART0"
base ad:0x40080000
width 11.
rgroup.long 0x00++0x03
line.long 0x00 "US_IDR,USART ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x03
line.long 0x00 "US_CEDR,USART Clock Enable Disable Register"
bitfld.long 0x00 31. " DBGEN ,Debug mode enable" "Disabled,Enabled"
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
wgroup.long 0x08++0x07
line.long 0x00 "US_SRR,USART Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
line.long 0x04 "US_CR,USART Control Register"
bitfld.long 0x04 19. " RSTLIN ,Reset the LIN" "No effect,Reset"
bitfld.long 0x04 18. " STMESSAGE ,Start Message" "No effect,Send"
bitfld.long 0x04 17. " STRESP ,Start Response" "No effect,Send"
textline " "
bitfld.long 0x04 16. " STHEADER ,Start Header" "No effect,Send"
bitfld.long 0x04 12. " SENDA ,Send Address" "No effect,Send"
bitfld.long 0x04 11. " STTTO ,Start Time-out" "No effect,Start"
textline " "
bitfld.long 0x04 10. " STPBRK ,Stop Break" "No effect,Stop"
bitfld.long 0x04 9. " STTBRK ,Start Break" "No effect,Start"
bitfld.long 0x04 7. " TXDIS ,Transmitter disabled" "No effect,Disable"
textline " "
bitfld.long 0x04 6. " TXEN ,Transmitter Enable" "No effect,Enable"
bitfld.long 0x04 5. " RXDIS ,Receiver Disable" "No effect,Disable"
bitfld.long 0x04 4. " RXEN ,Receiver Enable" "No effect,Enable"
textline " "
bitfld.long 0x04 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
bitfld.long 0x04 2. " RSTRX ,Reset Receiver" "No effect,Reset"
if (((d.l(ad:0x40080000+0x10))&0x100)==0x00)
group.long 0x10++0x03
line.long 0x00 "US_MR,USART Mode Register"
bitfld.long 0x00 20. " DSB ,Data Start Bit Selection" "LSB,MSB"
textline " "
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,1.5,2,?..."
textline " "
bitfld.long 0x00 9.--11. " AR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
textline " "
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,Reserved,Reserved,Reserved,Reserved,Reserved,7"
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
else
group.long 0x10++0x03
line.long 0x00 "US_MR,USART Mode Register"
bitfld.long 0x00 20. " DSB ,Data Start Bit Selection" "LSB,MSB"
textline " "
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,Reserved,2,?..."
textline " "
bitfld.long 0x00 9.--11. " AR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
textline " "
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,Reserved,Reserved,Reserved,Reserved,Reserved,7"
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
endif
group.long 0x14++0x03
line.long 0x00 "US_IMSCR,USART Interrupt Mask Set and Clear Register"
bitfld.long 0x00 30. " WAKEUP ,Wake Up interrupt mask" "Masked,Not masked"
bitfld.long 0x00 29. " CHECKSUM ,Check Sum interrupt mask" "Masked,Not masked"
bitfld.long 0x00 28. " IPERROR ,Identity Parity Error interrupt mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 27. " BITERROR ,Bit Error interrupt mask" "Masked,Not masked"
bitfld.long 0x00 26. " NOTRESP ,Not Responding error interrupt mask" "Masked,Not masked"
bitfld.long 0x00 25. " ENDMESS ,End of Message interrupt mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 24. " ENDHEADER ,End of Header interrupt mask" "Masked,Not masked"
bitfld.long 0x00 10. " IDLE ,Idle interrupt interrupt mask" "Masked,End occurred"
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty interrupt mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 8. " TIMEOUT ,Receiver time-out interrupt mask" "Masked,Not masked"
bitfld.long 0x00 7. " PARE ,Parity error interrupt mask" "Masked,Not masked"
bitfld.long 0x00 6. " FRAME ,Framing error interrupt mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 5. " OVRE ,Overrun error interrupt mask" "Masked,Not masked"
bitfld.long 0x00 2. " RXBRK ,Break received/end interrupt mask" "Masked,Not masked"
bitfld.long 0x00 1. " TXRDY ,Transmitter ready interrupt mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 0. " RXRDY ,Receiver ready interrupt mask" "Masked,Not masked"
rgroup.long 0x18++0x07
line.long 0x00 "US_RISR,USART Raw Interrupt Status Register"
bitfld.long 0x00 30. " WAKEUP ,Wake up raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 29. " CHECKSUM ,Check sum raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 28. " IPERROR ,Identity parity error raw interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 27. " BITERROR ,Bit error raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 26. " NOTRESP ,Not responding error raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 25. " ENDMESS ,End of message raw interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 24. " ENDHEADER ,End of header raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 10. " IDLE ,IDLE interrupt raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty raw interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 8. " TIMEOUT ,Time-out raw interrupt state raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 7. " PARE ,Parity error raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 6. " FRAME ,Framing error raw interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 5. " OVRE ,Overrun error raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 2. " RXBRK ,Receiver break raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 1. " TXRDY ,Transmitter ready raw interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 0. " RXRDY ,Receiver ready raw interrupt state" "Not occurred,Occurred"
line.long 0x04 "US_MISR,USART Masked Interrupt Status Register"
bitfld.long 0x04 30. " WAKEUP ,Wake up masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 29. " CHECKSUM ,Check sum masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 28. " IPERROR ,Identity parity error masked interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x04 27. " BITERROR ,Bit error masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 26. " NOTRESP ,Not responding error masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 25. " ENDMESS ,End of message masked interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x04 24. " ENDHEADER ,End of header masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 10. " IDLE ,IDLE interrupt masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 9. " TXEMPTY ,Transmitter empty masked interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x04 8. " TIMEOUT ,Time-out masked interrupt state masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 7. " PARE ,Parity error masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 6. " FRAME ,Framing error masked interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x04 5. " OVRE ,Overrun error masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 2. " RXBRK ,Receiver break masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 1. " TXRDY ,Transmitter ready masked interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x04 0. " RXRDY ,Receiver ready masked interrupt state" "Not occurred,Occurred"
wgroup.long 0x20++0x03
line.long 0x00 "US_ICR,USART Interrupt Clear Register"
bitfld.long 0x00 30. " WAKEUP ,Wake up cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 29. " CHECKSUM ,Check sum cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 28. " IPERROR ,Identity parity error cleared interrupt state" "No effect,Clear"
textline " "
bitfld.long 0x00 27. " BITERROR ,Bit error cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 26. " NOTRESP ,Not responding error cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 25. " ENDMESS ,End of message cleared interrupt state" "No effect,Clear"
textline " "
bitfld.long 0x00 24. " ENDHEADER ,End of header cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 10. " IDLE ,IDLE interrupt cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty cleared interrupt state" "No effect,Clear"
textline " "
bitfld.long 0x00 8. " TIMEOUT ,Time-out cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 7. " PARE ,Parity error cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 6. " FRAME ,Framing error cleared interrupt state" "No effect,Clear"
textline " "
bitfld.long 0x00 5. " OVRE ,Overrun error cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 2. " RXBRK ,Receiver break cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 1. " TXRDY ,Transmitter ready cleared interrupt state" "No effect,Clear"
textline " "
bitfld.long 0x00 0. " RXRDY ,Receiver ready cleared interrupt state" "No effect,Clear"
rgroup.long 0x24++0x03
line.long 0x00 "US_SR,USART Status Register"
bitfld.long 0x00 31. " LIN ,LIN busy" "IDLE,BUSY"
bitfld.long 0x00 30. " WAKEUP ,Wake up" "Not detected,Detected"
bitfld.long 0x00 29. " CHECKSUM ,Check sum Cleared interrupt state" "Not detected,Detected"
textline " "
bitfld.long 0x00 28. " IPERROR ,Identity parity error" "Not detected,Detected"
bitfld.long 0x00 27. " BITERROR ,Bit error" "Not detected,Detected"
bitfld.long 0x00 26. " NOTRESP ,Not responding error" "Not detected,Detected"
textline " "
bitfld.long 0x00 25. " ENDMESS ,End of message" "No end,End"
bitfld.long 0x00 24. " ENDHEADER ,End of header" "No end,End"
bitfld.long 0x00 11. " IDLEFLAG ,Frame transmission in J1587 protocol" "Received,Not received"
textline " "
bitfld.long 0x00 10. " IDLE ,IDLE interrupt" "No end,End"
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty" "Not empty,Empty"
bitfld.long 0x00 8. " TIMEOUT ,Time-out" "No time-out,Time-out"
textline " "
bitfld.long 0x00 7. " PARE ,Parity error" "Not false,False"
bitfld.long 0x00 6. " FRAME ,Framing error" "Not detected,Detected"
bitfld.long 0x00 5. " OVRE ,Overrun error" "Not transferred,Transferred"
textline " "
bitfld.long 0x00 2. " RXBRK ,Receiver break" "Not received,Received"
bitfld.long 0x00 1. " TXRDY ,Transmitter ready" "Waiting,No character"
bitfld.long 0x00 0. " RXRDY ,Receiver ready" "Not received,Received"
hgroup.long 0x28++0x03
hide.long 0x04 "US_RHR,USART Receiver Holding Register"
in
wgroup.long 0x2C++0x03
line.long 0x00 "US_THR,USART Transmit Holding Register"
hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to be transmitted"
group.long 0x30++0x17
line.long 0x00 "US_BRGR,USART Baud Rate Generator Register"
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider"
line.long 0x04 "US_RTOR,USART Receiver Time-Out Register"
hexmask.long.word 0x04 0.--15. 1. " TO ,Time-out value"
line.long 0x08 "US_TTGR,USART Transmit Time-Guard Register"
hexmask.long.byte 0x08 0.--7. 1. " TG ,Time-guard value"
line.long 0x0C "US_LIR,USART Transmit Time-Guard Register"
hexmask.long.word 0x0C 16.--29. 1. " WAKE_UP_TIME ,Wake up time for the LIN2.0 release"
bitfld.long 0x0C 9. " CHK_SEL ,Checksum selection" "Classic,Enhanced"
bitfld.long 0x0C 6.--8. " NDATA ,Number of data field for the LIN2.0 release" "1,2,3,4,5,6,7,8"
textline " "
bitfld.long 0x0C 0.--5. " IDENTIFIER ,LIN identifier" "2,2,4,8,?..."
line.long 0x10 "US_DFWR0,USART Data Field Write 0 Register"
hexmask.long.byte 0x10 24.--31. 1. " DATA3 ,LINs byte field to be transmitted"
hexmask.long.byte 0x10 16.--23. 1. " DATA2 ,LINs byte field to be transmitted"
hexmask.long.byte 0x10 8.--15. 1. " DATA1 ,LINs byte field to be transmitted"
textline " "
hexmask.long.byte 0x10 0.--7. 1. " DATA0 ,LINs byte field to be transmitted"
line.long 0x14 "US_DFWR1,USART Data Field Write 1 Register"
hexmask.long.byte 0x14 24.--31. 1. " DATA7 ,LINs byte field to be transmitted"
hexmask.long.byte 0x14 16.--23. 1. " DATA6 ,LINs byte field to be transmitted"
hexmask.long.byte 0x14 8.--15. 1. " DATA5 ,LINs byte field to be transmitted"
textline " "
hexmask.long.byte 0x14 0.--7. 1. " DATA4 ,LINs byte field to be transmitted"
rgroup.long 0x48++0x07
line.long 0x00 "US_DFRR0,USART Data Field Read 0 Register"
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,LINs byte field to be received"
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,LINs byte field to be received"
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,LINs byte field to be received"
textline " "
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,LINs byte field to be received"
line.long 0x04 "US_DFRR1,USART Data Field Read 1 Register"
hexmask.long.byte 0x04 24.--31. 1. " DATA7 ,LINs byte field to be received"
hexmask.long.byte 0x04 16.--23. 1. " DATA6 ,LINs byte field to be received"
hexmask.long.byte 0x04 8.--15. 1. " DATA5 ,LINs byte field to be received"
textline " "
hexmask.long.byte 0x04 0.--7. 1. " DATA4 ,LINs byte field to be received"
group.long 0x50++0x0F
line.long 0x00 "US_SBLR,USART Synchronous Break Length Register"
bitfld.long 0x00 0.--4. " SYNC_BRK ,Synchronous break length" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "US_LCP1,USART Synchronous Break Length Register 1"
hexmask.long.byte 0x04 24.--31. 1. " LCP3 ,Limit Counter Protocol"
hexmask.long.byte 0x04 16.--23. 1. " LCP2 ,Limit Counter Protocol"
hexmask.long.byte 0x04 8.--15. 1. " LCP1 ,Limit Counter Protocol"
textline " "
hexmask.long.byte 0x04 0.--7. 1. " LCP0 ,Limit Counter Protocol"
line.long 0x08 "US_LCP2,USART Synchronous Break Length Register 2"
hexmask.long.byte 0x08 24.--31. 1. " LCP7 ,Limit Counter Protocol"
hexmask.long.byte 0x08 16.--23. 1. " LCP6 ,Limit Counter Protocol"
hexmask.long.byte 0x08 8.--15. 1. " LCP5 ,Limit Counter Protocol"
textline " "
hexmask.long.byte 0x08 0.--7. 1. " LCP4 ,Limit Counter Protocol"
line.long 0x0C "US_DMACR,USART DMA Control Register"
bitfld.long 0x0C 1. " TXDMAE ,DMA for the transmit Enable/ Disable Control Bit" "Disabled,Enabled"
bitfld.long 0x0C 0. " RXDMAE ,DMA for the receive Enable/ Disable Control Bit" "Disabled,Enabled"
width 11.
tree.end
tree "USART1"
base ad:0x40081000
width 11.
rgroup.long 0x00++0x03
line.long 0x00 "US_IDR,USART ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x03
line.long 0x00 "US_CEDR,USART Clock Enable Disable Register"
bitfld.long 0x00 31. " DBGEN ,Debug mode enable" "Disabled,Enabled"
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
wgroup.long 0x08++0x07
line.long 0x00 "US_SRR,USART Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
line.long 0x04 "US_CR,USART Control Register"
bitfld.long 0x04 19. " RSTLIN ,Reset the LIN" "No effect,Reset"
bitfld.long 0x04 18. " STMESSAGE ,Start Message" "No effect,Send"
bitfld.long 0x04 17. " STRESP ,Start Response" "No effect,Send"
textline " "
bitfld.long 0x04 16. " STHEADER ,Start Header" "No effect,Send"
bitfld.long 0x04 12. " SENDA ,Send Address" "No effect,Send"
bitfld.long 0x04 11. " STTTO ,Start Time-out" "No effect,Start"
textline " "
bitfld.long 0x04 10. " STPBRK ,Stop Break" "No effect,Stop"
bitfld.long 0x04 9. " STTBRK ,Start Break" "No effect,Start"
bitfld.long 0x04 7. " TXDIS ,Transmitter disabled" "No effect,Disable"
textline " "
bitfld.long 0x04 6. " TXEN ,Transmitter Enable" "No effect,Enable"
bitfld.long 0x04 5. " RXDIS ,Receiver Disable" "No effect,Disable"
bitfld.long 0x04 4. " RXEN ,Receiver Enable" "No effect,Enable"
textline " "
bitfld.long 0x04 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
bitfld.long 0x04 2. " RSTRX ,Reset Receiver" "No effect,Reset"
if (((d.l(ad:0x40080000+0x10))&0x100)==0x00)
group.long 0x10++0x03
line.long 0x00 "US_MR,USART Mode Register"
bitfld.long 0x00 20. " DSB ,Data Start Bit Selection" "LSB,MSB"
textline " "
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,1.5,2,?..."
textline " "
bitfld.long 0x00 9.--11. " AR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
textline " "
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,Reserved,Reserved,Reserved,Reserved,Reserved,7"
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
else
group.long 0x10++0x03
line.long 0x00 "US_MR,USART Mode Register"
bitfld.long 0x00 20. " DSB ,Data Start Bit Selection" "LSB,MSB"
textline " "
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,Reserved,2,?..."
textline " "
bitfld.long 0x00 9.--11. " AR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
textline " "
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,Reserved,Reserved,Reserved,Reserved,Reserved,7"
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
endif
group.long 0x14++0x03
line.long 0x00 "US_IMSCR,USART Interrupt Mask Set and Clear Register"
bitfld.long 0x00 30. " WAKEUP ,Wake Up interrupt mask" "Masked,Not masked"
bitfld.long 0x00 29. " CHECKSUM ,Check Sum interrupt mask" "Masked,Not masked"
bitfld.long 0x00 28. " IPERROR ,Identity Parity Error interrupt mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 27. " BITERROR ,Bit Error interrupt mask" "Masked,Not masked"
bitfld.long 0x00 26. " NOTRESP ,Not Responding error interrupt mask" "Masked,Not masked"
bitfld.long 0x00 25. " ENDMESS ,End of Message interrupt mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 24. " ENDHEADER ,End of Header interrupt mask" "Masked,Not masked"
bitfld.long 0x00 10. " IDLE ,Idle interrupt interrupt mask" "Masked,End occurred"
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty interrupt mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 8. " TIMEOUT ,Receiver time-out interrupt mask" "Masked,Not masked"
bitfld.long 0x00 7. " PARE ,Parity error interrupt mask" "Masked,Not masked"
bitfld.long 0x00 6. " FRAME ,Framing error interrupt mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 5. " OVRE ,Overrun error interrupt mask" "Masked,Not masked"
bitfld.long 0x00 2. " RXBRK ,Break received/end interrupt mask" "Masked,Not masked"
bitfld.long 0x00 1. " TXRDY ,Transmitter ready interrupt mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 0. " RXRDY ,Receiver ready interrupt mask" "Masked,Not masked"
rgroup.long 0x18++0x07
line.long 0x00 "US_RISR,USART Raw Interrupt Status Register"
bitfld.long 0x00 30. " WAKEUP ,Wake up raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 29. " CHECKSUM ,Check sum raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 28. " IPERROR ,Identity parity error raw interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 27. " BITERROR ,Bit error raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 26. " NOTRESP ,Not responding error raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 25. " ENDMESS ,End of message raw interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 24. " ENDHEADER ,End of header raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 10. " IDLE ,IDLE interrupt raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty raw interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 8. " TIMEOUT ,Time-out raw interrupt state raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 7. " PARE ,Parity error raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 6. " FRAME ,Framing error raw interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 5. " OVRE ,Overrun error raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 2. " RXBRK ,Receiver break raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 1. " TXRDY ,Transmitter ready raw interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 0. " RXRDY ,Receiver ready raw interrupt state" "Not occurred,Occurred"
line.long 0x04 "US_MISR,USART Masked Interrupt Status Register"
bitfld.long 0x04 30. " WAKEUP ,Wake up masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 29. " CHECKSUM ,Check sum masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 28. " IPERROR ,Identity parity error masked interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x04 27. " BITERROR ,Bit error masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 26. " NOTRESP ,Not responding error masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 25. " ENDMESS ,End of message masked interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x04 24. " ENDHEADER ,End of header masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 10. " IDLE ,IDLE interrupt masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 9. " TXEMPTY ,Transmitter empty masked interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x04 8. " TIMEOUT ,Time-out masked interrupt state masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 7. " PARE ,Parity error masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 6. " FRAME ,Framing error masked interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x04 5. " OVRE ,Overrun error masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 2. " RXBRK ,Receiver break masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 1. " TXRDY ,Transmitter ready masked interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x04 0. " RXRDY ,Receiver ready masked interrupt state" "Not occurred,Occurred"
wgroup.long 0x20++0x03
line.long 0x00 "US_ICR,USART Interrupt Clear Register"
bitfld.long 0x00 30. " WAKEUP ,Wake up cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 29. " CHECKSUM ,Check sum cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 28. " IPERROR ,Identity parity error cleared interrupt state" "No effect,Clear"
textline " "
bitfld.long 0x00 27. " BITERROR ,Bit error cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 26. " NOTRESP ,Not responding error cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 25. " ENDMESS ,End of message cleared interrupt state" "No effect,Clear"
textline " "
bitfld.long 0x00 24. " ENDHEADER ,End of header cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 10. " IDLE ,IDLE interrupt cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty cleared interrupt state" "No effect,Clear"
textline " "
bitfld.long 0x00 8. " TIMEOUT ,Time-out cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 7. " PARE ,Parity error cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 6. " FRAME ,Framing error cleared interrupt state" "No effect,Clear"
textline " "
bitfld.long 0x00 5. " OVRE ,Overrun error cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 2. " RXBRK ,Receiver break cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 1. " TXRDY ,Transmitter ready cleared interrupt state" "No effect,Clear"
textline " "
bitfld.long 0x00 0. " RXRDY ,Receiver ready cleared interrupt state" "No effect,Clear"
rgroup.long 0x24++0x03
line.long 0x00 "US_SR,USART Status Register"
bitfld.long 0x00 31. " LIN ,LIN busy" "IDLE,BUSY"
bitfld.long 0x00 30. " WAKEUP ,Wake up" "Not detected,Detected"
bitfld.long 0x00 29. " CHECKSUM ,Check sum Cleared interrupt state" "Not detected,Detected"
textline " "
bitfld.long 0x00 28. " IPERROR ,Identity parity error" "Not detected,Detected"
bitfld.long 0x00 27. " BITERROR ,Bit error" "Not detected,Detected"
bitfld.long 0x00 26. " NOTRESP ,Not responding error" "Not detected,Detected"
textline " "
bitfld.long 0x00 25. " ENDMESS ,End of message" "No end,End"
bitfld.long 0x00 24. " ENDHEADER ,End of header" "No end,End"
bitfld.long 0x00 11. " IDLEFLAG ,Frame transmission in J1587 protocol" "Received,Not received"
textline " "
bitfld.long 0x00 10. " IDLE ,IDLE interrupt" "No end,End"
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty" "Not empty,Empty"
bitfld.long 0x00 8. " TIMEOUT ,Time-out" "No time-out,Time-out"
textline " "
bitfld.long 0x00 7. " PARE ,Parity error" "Not false,False"
bitfld.long 0x00 6. " FRAME ,Framing error" "Not detected,Detected"
bitfld.long 0x00 5. " OVRE ,Overrun error" "Not transferred,Transferred"
textline " "
bitfld.long 0x00 2. " RXBRK ,Receiver break" "Not received,Received"
bitfld.long 0x00 1. " TXRDY ,Transmitter ready" "Waiting,No character"
bitfld.long 0x00 0. " RXRDY ,Receiver ready" "Not received,Received"
hgroup.long 0x28++0x03
hide.long 0x04 "US_RHR,USART Receiver Holding Register"
in
wgroup.long 0x2C++0x03
line.long 0x00 "US_THR,USART Transmit Holding Register"
hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to be transmitted"
group.long 0x30++0x17
line.long 0x00 "US_BRGR,USART Baud Rate Generator Register"
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider"
line.long 0x04 "US_RTOR,USART Receiver Time-Out Register"
hexmask.long.word 0x04 0.--15. 1. " TO ,Time-out value"
line.long 0x08 "US_TTGR,USART Transmit Time-Guard Register"
hexmask.long.byte 0x08 0.--7. 1. " TG ,Time-guard value"
line.long 0x0C "US_LIR,USART Transmit Time-Guard Register"
hexmask.long.word 0x0C 16.--29. 1. " WAKE_UP_TIME ,Wake up time for the LIN2.0 release"
bitfld.long 0x0C 9. " CHK_SEL ,Checksum selection" "Classic,Enhanced"
bitfld.long 0x0C 6.--8. " NDATA ,Number of data field for the LIN2.0 release" "1,2,3,4,5,6,7,8"
textline " "
bitfld.long 0x0C 0.--5. " IDENTIFIER ,LIN identifier" "2,2,4,8,?..."
line.long 0x10 "US_DFWR0,USART Data Field Write 0 Register"
hexmask.long.byte 0x10 24.--31. 1. " DATA3 ,LINs byte field to be transmitted"
hexmask.long.byte 0x10 16.--23. 1. " DATA2 ,LINs byte field to be transmitted"
hexmask.long.byte 0x10 8.--15. 1. " DATA1 ,LINs byte field to be transmitted"
textline " "
hexmask.long.byte 0x10 0.--7. 1. " DATA0 ,LINs byte field to be transmitted"
line.long 0x14 "US_DFWR1,USART Data Field Write 1 Register"
hexmask.long.byte 0x14 24.--31. 1. " DATA7 ,LINs byte field to be transmitted"
hexmask.long.byte 0x14 16.--23. 1. " DATA6 ,LINs byte field to be transmitted"
hexmask.long.byte 0x14 8.--15. 1. " DATA5 ,LINs byte field to be transmitted"
textline " "
hexmask.long.byte 0x14 0.--7. 1. " DATA4 ,LINs byte field to be transmitted"
rgroup.long 0x48++0x07
line.long 0x00 "US_DFRR0,USART Data Field Read 0 Register"
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,LINs byte field to be received"
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,LINs byte field to be received"
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,LINs byte field to be received"
textline " "
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,LINs byte field to be received"
line.long 0x04 "US_DFRR1,USART Data Field Read 1 Register"
hexmask.long.byte 0x04 24.--31. 1. " DATA7 ,LINs byte field to be received"
hexmask.long.byte 0x04 16.--23. 1. " DATA6 ,LINs byte field to be received"
hexmask.long.byte 0x04 8.--15. 1. " DATA5 ,LINs byte field to be received"
textline " "
hexmask.long.byte 0x04 0.--7. 1. " DATA4 ,LINs byte field to be received"
group.long 0x50++0x0F
line.long 0x00 "US_SBLR,USART Synchronous Break Length Register"
bitfld.long 0x00 0.--4. " SYNC_BRK ,Synchronous break length" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "US_LCP1,USART Synchronous Break Length Register 1"
hexmask.long.byte 0x04 24.--31. 1. " LCP3 ,Limit Counter Protocol"
hexmask.long.byte 0x04 16.--23. 1. " LCP2 ,Limit Counter Protocol"
hexmask.long.byte 0x04 8.--15. 1. " LCP1 ,Limit Counter Protocol"
textline " "
hexmask.long.byte 0x04 0.--7. 1. " LCP0 ,Limit Counter Protocol"
line.long 0x08 "US_LCP2,USART Synchronous Break Length Register 2"
hexmask.long.byte 0x08 24.--31. 1. " LCP7 ,Limit Counter Protocol"
hexmask.long.byte 0x08 16.--23. 1. " LCP6 ,Limit Counter Protocol"
hexmask.long.byte 0x08 8.--15. 1. " LCP5 ,Limit Counter Protocol"
textline " "
hexmask.long.byte 0x08 0.--7. 1. " LCP4 ,Limit Counter Protocol"
line.long 0x0C "US_DMACR,USART DMA Control Register"
bitfld.long 0x0C 1. " TXDMAE ,DMA for the transmit Enable/ Disable Control Bit" "Disabled,Enabled"
bitfld.long 0x0C 0. " RXDMAE ,DMA for the receive Enable/ Disable Control Bit" "Disabled,Enabled"
width 11.
tree.end
tree "USART2"
base ad:0x40082000
width 11.
rgroup.long 0x00++0x03
line.long 0x00 "US_IDR,USART ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
group.long 0x04++0x03
line.long 0x00 "US_CEDR,USART Clock Enable Disable Register"
bitfld.long 0x00 31. " DBGEN ,Debug mode enable" "Disabled,Enabled"
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
wgroup.long 0x08++0x07
line.long 0x00 "US_SRR,USART Software Reset Register"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
line.long 0x04 "US_CR,USART Control Register"
bitfld.long 0x04 19. " RSTLIN ,Reset the LIN" "No effect,Reset"
bitfld.long 0x04 18. " STMESSAGE ,Start Message" "No effect,Send"
bitfld.long 0x04 17. " STRESP ,Start Response" "No effect,Send"
textline " "
bitfld.long 0x04 16. " STHEADER ,Start Header" "No effect,Send"
bitfld.long 0x04 12. " SENDA ,Send Address" "No effect,Send"
bitfld.long 0x04 11. " STTTO ,Start Time-out" "No effect,Start"
textline " "
bitfld.long 0x04 10. " STPBRK ,Stop Break" "No effect,Stop"
bitfld.long 0x04 9. " STTBRK ,Start Break" "No effect,Start"
bitfld.long 0x04 7. " TXDIS ,Transmitter disabled" "No effect,Disable"
textline " "
bitfld.long 0x04 6. " TXEN ,Transmitter Enable" "No effect,Enable"
bitfld.long 0x04 5. " RXDIS ,Receiver Disable" "No effect,Disable"
bitfld.long 0x04 4. " RXEN ,Receiver Enable" "No effect,Enable"
textline " "
bitfld.long 0x04 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
bitfld.long 0x04 2. " RSTRX ,Reset Receiver" "No effect,Reset"
if (((d.l(ad:0x40080000+0x10))&0x100)==0x00)
group.long 0x10++0x03
line.long 0x00 "US_MR,USART Mode Register"
bitfld.long 0x00 20. " DSB ,Data Start Bit Selection" "LSB,MSB"
textline " "
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,1.5,2,?..."
textline " "
bitfld.long 0x00 9.--11. " AR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
textline " "
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,Reserved,Reserved,Reserved,Reserved,Reserved,7"
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
else
group.long 0x10++0x03
line.long 0x00 "US_MR,USART Mode Register"
bitfld.long 0x00 20. " DSB ,Data Start Bit Selection" "LSB,MSB"
textline " "
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,Reserved,2,?..."
textline " "
bitfld.long 0x00 9.--11. " AR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
textline " "
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,Reserved,Reserved,Reserved,Reserved,Reserved,7"
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
endif
group.long 0x14++0x03
line.long 0x00 "US_IMSCR,USART Interrupt Mask Set and Clear Register"
bitfld.long 0x00 30. " WAKEUP ,Wake Up interrupt mask" "Masked,Not masked"
bitfld.long 0x00 29. " CHECKSUM ,Check Sum interrupt mask" "Masked,Not masked"
bitfld.long 0x00 28. " IPERROR ,Identity Parity Error interrupt mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 27. " BITERROR ,Bit Error interrupt mask" "Masked,Not masked"
bitfld.long 0x00 26. " NOTRESP ,Not Responding error interrupt mask" "Masked,Not masked"
bitfld.long 0x00 25. " ENDMESS ,End of Message interrupt mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 24. " ENDHEADER ,End of Header interrupt mask" "Masked,Not masked"
bitfld.long 0x00 10. " IDLE ,Idle interrupt interrupt mask" "Masked,End occurred"
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty interrupt mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 8. " TIMEOUT ,Receiver time-out interrupt mask" "Masked,Not masked"
bitfld.long 0x00 7. " PARE ,Parity error interrupt mask" "Masked,Not masked"
bitfld.long 0x00 6. " FRAME ,Framing error interrupt mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 5. " OVRE ,Overrun error interrupt mask" "Masked,Not masked"
bitfld.long 0x00 2. " RXBRK ,Break received/end interrupt mask" "Masked,Not masked"
bitfld.long 0x00 1. " TXRDY ,Transmitter ready interrupt mask" "Masked,Not masked"
textline " "
bitfld.long 0x00 0. " RXRDY ,Receiver ready interrupt mask" "Masked,Not masked"
rgroup.long 0x18++0x07
line.long 0x00 "US_RISR,USART Raw Interrupt Status Register"
bitfld.long 0x00 30. " WAKEUP ,Wake up raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 29. " CHECKSUM ,Check sum raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 28. " IPERROR ,Identity parity error raw interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 27. " BITERROR ,Bit error raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 26. " NOTRESP ,Not responding error raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 25. " ENDMESS ,End of message raw interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 24. " ENDHEADER ,End of header raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 10. " IDLE ,IDLE interrupt raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty raw interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 8. " TIMEOUT ,Time-out raw interrupt state raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 7. " PARE ,Parity error raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 6. " FRAME ,Framing error raw interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 5. " OVRE ,Overrun error raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 2. " RXBRK ,Receiver break raw interrupt state" "Not occurred,Occurred"
bitfld.long 0x00 1. " TXRDY ,Transmitter ready raw interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 0. " RXRDY ,Receiver ready raw interrupt state" "Not occurred,Occurred"
line.long 0x04 "US_MISR,USART Masked Interrupt Status Register"
bitfld.long 0x04 30. " WAKEUP ,Wake up masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 29. " CHECKSUM ,Check sum masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 28. " IPERROR ,Identity parity error masked interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x04 27. " BITERROR ,Bit error masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 26. " NOTRESP ,Not responding error masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 25. " ENDMESS ,End of message masked interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x04 24. " ENDHEADER ,End of header masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 10. " IDLE ,IDLE interrupt masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 9. " TXEMPTY ,Transmitter empty masked interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x04 8. " TIMEOUT ,Time-out masked interrupt state masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 7. " PARE ,Parity error masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 6. " FRAME ,Framing error masked interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x04 5. " OVRE ,Overrun error masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 2. " RXBRK ,Receiver break masked interrupt state" "Not occurred,Occurred"
bitfld.long 0x04 1. " TXRDY ,Transmitter ready masked interrupt state" "Not occurred,Occurred"
textline " "
bitfld.long 0x04 0. " RXRDY ,Receiver ready masked interrupt state" "Not occurred,Occurred"
wgroup.long 0x20++0x03
line.long 0x00 "US_ICR,USART Interrupt Clear Register"
bitfld.long 0x00 30. " WAKEUP ,Wake up cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 29. " CHECKSUM ,Check sum cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 28. " IPERROR ,Identity parity error cleared interrupt state" "No effect,Clear"
textline " "
bitfld.long 0x00 27. " BITERROR ,Bit error cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 26. " NOTRESP ,Not responding error cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 25. " ENDMESS ,End of message cleared interrupt state" "No effect,Clear"
textline " "
bitfld.long 0x00 24. " ENDHEADER ,End of header cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 10. " IDLE ,IDLE interrupt cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty cleared interrupt state" "No effect,Clear"
textline " "
bitfld.long 0x00 8. " TIMEOUT ,Time-out cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 7. " PARE ,Parity error cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 6. " FRAME ,Framing error cleared interrupt state" "No effect,Clear"
textline " "
bitfld.long 0x00 5. " OVRE ,Overrun error cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 2. " RXBRK ,Receiver break cleared interrupt state" "No effect,Clear"
bitfld.long 0x00 1. " TXRDY ,Transmitter ready cleared interrupt state" "No effect,Clear"
textline " "
bitfld.long 0x00 0. " RXRDY ,Receiver ready cleared interrupt state" "No effect,Clear"
rgroup.long 0x24++0x03
line.long 0x00 "US_SR,USART Status Register"
bitfld.long 0x00 31. " LIN ,LIN busy" "IDLE,BUSY"
bitfld.long 0x00 30. " WAKEUP ,Wake up" "Not detected,Detected"
bitfld.long 0x00 29. " CHECKSUM ,Check sum Cleared interrupt state" "Not detected,Detected"
textline " "
bitfld.long 0x00 28. " IPERROR ,Identity parity error" "Not detected,Detected"
bitfld.long 0x00 27. " BITERROR ,Bit error" "Not detected,Detected"
bitfld.long 0x00 26. " NOTRESP ,Not responding error" "Not detected,Detected"
textline " "
bitfld.long 0x00 25. " ENDMESS ,End of message" "No end,End"
bitfld.long 0x00 24. " ENDHEADER ,End of header" "No end,End"
bitfld.long 0x00 11. " IDLEFLAG ,Frame transmission in J1587 protocol" "Received,Not received"
textline " "
bitfld.long 0x00 10. " IDLE ,IDLE interrupt" "No end,End"
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty" "Not empty,Empty"
bitfld.long 0x00 8. " TIMEOUT ,Time-out" "No time-out,Time-out"
textline " "
bitfld.long 0x00 7. " PARE ,Parity error" "Not false,False"
bitfld.long 0x00 6. " FRAME ,Framing error" "Not detected,Detected"
bitfld.long 0x00 5. " OVRE ,Overrun error" "Not transferred,Transferred"
textline " "
bitfld.long 0x00 2. " RXBRK ,Receiver break" "Not received,Received"
bitfld.long 0x00 1. " TXRDY ,Transmitter ready" "Waiting,No character"
bitfld.long 0x00 0. " RXRDY ,Receiver ready" "Not received,Received"
hgroup.long 0x28++0x03
hide.long 0x04 "US_RHR,USART Receiver Holding Register"
in
wgroup.long 0x2C++0x03
line.long 0x00 "US_THR,USART Transmit Holding Register"
hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to be transmitted"
group.long 0x30++0x17
line.long 0x00 "US_BRGR,USART Baud Rate Generator Register"
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider"
line.long 0x04 "US_RTOR,USART Receiver Time-Out Register"
hexmask.long.word 0x04 0.--15. 1. " TO ,Time-out value"
line.long 0x08 "US_TTGR,USART Transmit Time-Guard Register"
hexmask.long.byte 0x08 0.--7. 1. " TG ,Time-guard value"
line.long 0x0C "US_LIR,USART Transmit Time-Guard Register"
hexmask.long.word 0x0C 16.--29. 1. " WAKE_UP_TIME ,Wake up time for the LIN2.0 release"
bitfld.long 0x0C 9. " CHK_SEL ,Checksum selection" "Classic,Enhanced"
bitfld.long 0x0C 6.--8. " NDATA ,Number of data field for the LIN2.0 release" "1,2,3,4,5,6,7,8"
textline " "
bitfld.long 0x0C 0.--5. " IDENTIFIER ,LIN identifier" "2,2,4,8,?..."
line.long 0x10 "US_DFWR0,USART Data Field Write 0 Register"
hexmask.long.byte 0x10 24.--31. 1. " DATA3 ,LINs byte field to be transmitted"
hexmask.long.byte 0x10 16.--23. 1. " DATA2 ,LINs byte field to be transmitted"
hexmask.long.byte 0x10 8.--15. 1. " DATA1 ,LINs byte field to be transmitted"
textline " "
hexmask.long.byte 0x10 0.--7. 1. " DATA0 ,LINs byte field to be transmitted"
line.long 0x14 "US_DFWR1,USART Data Field Write 1 Register"
hexmask.long.byte 0x14 24.--31. 1. " DATA7 ,LINs byte field to be transmitted"
hexmask.long.byte 0x14 16.--23. 1. " DATA6 ,LINs byte field to be transmitted"
hexmask.long.byte 0x14 8.--15. 1. " DATA5 ,LINs byte field to be transmitted"
textline " "
hexmask.long.byte 0x14 0.--7. 1. " DATA4 ,LINs byte field to be transmitted"
rgroup.long 0x48++0x07
line.long 0x00 "US_DFRR0,USART Data Field Read 0 Register"
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,LINs byte field to be received"
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,LINs byte field to be received"
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,LINs byte field to be received"
textline " "
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,LINs byte field to be received"
line.long 0x04 "US_DFRR1,USART Data Field Read 1 Register"
hexmask.long.byte 0x04 24.--31. 1. " DATA7 ,LINs byte field to be received"
hexmask.long.byte 0x04 16.--23. 1. " DATA6 ,LINs byte field to be received"
hexmask.long.byte 0x04 8.--15. 1. " DATA5 ,LINs byte field to be received"
textline " "
hexmask.long.byte 0x04 0.--7. 1. " DATA4 ,LINs byte field to be received"
group.long 0x50++0x0F
line.long 0x00 "US_SBLR,USART Synchronous Break Length Register"
bitfld.long 0x00 0.--4. " SYNC_BRK ,Synchronous break length" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "US_LCP1,USART Synchronous Break Length Register 1"
hexmask.long.byte 0x04 24.--31. 1. " LCP3 ,Limit Counter Protocol"
hexmask.long.byte 0x04 16.--23. 1. " LCP2 ,Limit Counter Protocol"
hexmask.long.byte 0x04 8.--15. 1. " LCP1 ,Limit Counter Protocol"
textline " "
hexmask.long.byte 0x04 0.--7. 1. " LCP0 ,Limit Counter Protocol"
line.long 0x08 "US_LCP2,USART Synchronous Break Length Register 2"
hexmask.long.byte 0x08 24.--31. 1. " LCP7 ,Limit Counter Protocol"
hexmask.long.byte 0x08 16.--23. 1. " LCP6 ,Limit Counter Protocol"
hexmask.long.byte 0x08 8.--15. 1. " LCP5 ,Limit Counter Protocol"
textline " "
hexmask.long.byte 0x08 0.--7. 1. " LCP4 ,Limit Counter Protocol"
line.long 0x0C "US_DMACR,USART DMA Control Register"
bitfld.long 0x0C 1. " TXDMAE ,DMA for the transmit Enable/ Disable Control Bit" "Disabled,Enabled"
bitfld.long 0x0C 0. " RXDMAE ,DMA for the receive Enable/ Disable Control Bit" "Disabled,Enabled"
width 11.
tree.end
tree.end
tree "USB (USB Controller)"
base ad:0x40100000
width 12.
group.long 0x00++0x0F
line.long 0x00 "USBFA,USB function address register"
bitfld.long 0x00 7. " USBAUP ,USB Address Update" "Not updated,Updated"
hexmask.long.byte 0x00 0.--6. 1. " USBFAF ,USB Function Address Field"
line.long 0x04 "USBPM,USB power management register"
bitfld.long 0x04 7. " ISOU ,ISO Update" "Updated(0 sent),Updated"
bitfld.long 0x04 3. " RST ,Reset" "Normal,Reset"
bitfld.long 0x04 2. " RU ,Resume" "Normal/suspend,Resumed"
textline " "
bitfld.long 0x04 1. " SUSM ,Suspend Mode" "Normal,Suspend"
bitfld.long 0x04 0. " SUSE ,Suspend Enable" "Disabled,Enabled"
line.long 0x08 "USBINTMON,USB interrupt register"
bitfld.long 0x08 10. " RSTI ,Reset Interrupt" "No interrupt,Interrupt"
bitfld.long 0x08 9. " RESI ,Resume Interrupt" "No interrupt,Interrupt"
bitfld.long 0x08 8. " SUSI ,Suspend Interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x08 4. " EP4I ,EP4 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x08 3. " EP3I ,EP3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x08 2. " EP2I ,EP2 Interrupt" "No interrupt,Interrupt"
textline " "
bitfld.long 0x08 1. " EP1I ,EP1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x08 0. " EP0I ,EP0 Interrupt" "No interrupt,Interrupt"
line.long 0x0C "USBINTCON,USB interrupt enable register"
bitfld.long 0x0C 10. " RSTIEN ,Reset Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x0C 8. " SUSIEN ,Suspend Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x0C 4. " EP4IEN ,EP4 Interrupt Enable/Disable Control Bit" "Disabled,Enabled"
textline " "
bitfld.long 0x0C 3. " EP3IEN ,EP3 Interrupt Enable/Disable Control Bit" "Disabled,Enabled"
bitfld.long 0x0C 2. " EP2IEN ,EP2 Interrupt Enable/Disable Control Bit" "Disabled,Enabled"
bitfld.long 0x0C 1. " EP1IEN ,EP1 Interrupt Enable/Disable Control Bit" "Disabled,Enabled"
textline " "
bitfld.long 0x0C 0. " EP0IEN ,EP0 Interrupt Enable/Disable Control Bit" "Disabled,Enabled"
rgroup.long 0x10++0x03
line.long 0x00 "USBFN,USB frame number register"
hexmask.long.word 0x00 0.--10. 1. " FN ,Frame Number"
group.long 0x14++0x03
line.long 0x00 "USBEPLNUM,USB Logical endpoint number control register"
bitfld.long 0x00 12.--15. " LNUMEP4 ,Logical Number EP4" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,9,10,11,12,13,14,?..."
bitfld.long 0x00 8.--11. " LNUMEP3 ,Logical Number EP3" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,9,10,11,12,13,14,?..."
bitfld.long 0x00 4.--7. " LNUMEP2 ,Logical Number EP2" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,9,10,11,12,13,14,?..."
textline " "
bitfld.long 0x00 0.--3. " LNUMEP1 ,Logical Number EP1" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,9,10,11,12,13,14,?..."
group.long 0x20++0x13
line.long 0x00 "USBEP0CSR,USB endpoint 0 common status"
bitfld.long 0x00 31. " SVSET ,Serviced Setup End" "No operation,SETEND cleared"
bitfld.long 0x00 30. " SVORDY ,Serviced Out Ready" "No operation,ORDY cleared"
bitfld.long 0x00 29. " SDSTAL ,Send Stall" "Normal,Sent"
textline " "
bitfld.long 0x00 28. " SETEND ,Setup End" "Normal,Ended"
bitfld.long 0x00 27. " DEND ,Data End" "Not ended,Ended"
bitfld.long 0x00 26. " STSTALL ,Sent Stall" "Not transmitted,Transmitted"
textline " "
bitfld.long 0x00 25. " INRDY ,IN Packet Ready" "Not loaded,Loaded"
bitfld.long 0x00 24. " ORDY ,Out Packet Ready" "Not received,Received"
bitfld.long 0x00 7. " MAXPSET ,MAXP Size Settable" "Not overwritten,Overwritten"
textline " "
bitfld.long 0x00 0.--1. " MAXP ,MAXP Size Value" "8 bytes,8 bytes,16 bytes,?..."
line.long 0x4 "USBEP1CSR,USB endpoint 1 common status"
bitfld.long 0x4 30. " ICLTOG ,In Mode;Clear Data Toggle" "No operation,Set to 0"
bitfld.long 0x4 29. " ISTSTALL ,In Mode;Sent Stall" "No operation,Transmitted"
bitfld.long 0x4 28. " ISDSTALL ,In Mode;Send Stall" "No operation,Transmit state"
textline " "
bitfld.long 0x4 27. " IFFLUSH ,In Mode;FIFO Flush" "No operation,FIFO flush"
bitfld.long 0x4 26. " IUNDER ,In Mode;Under Run" "No operation,Received"
bitfld.long 0x4 25. " INEMP ,In Mode;FIFO Not Empty" "No data packet,Packet exists"
textline " "
bitfld.long 0x4 24. " IINRDY ,In Mode;IN Packet Ready" "Not ready,Ready"
bitfld.long 0x4 23. " OCLTOG ,Out Mode;Clear Data Toggle" "No operation,Set to 0"
bitfld.long 0x4 22. " OSTSTALL ,Out Mode;Sent Stall" "No operation,Transmitted"
textline " "
bitfld.long 0x4 21. " OSDSTALL ,Out Mode;Send Stall" "No operation,Transmitted"
bitfld.long 0x4 20. " OFFLUSH ,Out Mode;FIFO Flush" "No operation,FIFO flush"
bitfld.long 0x4 19. " ODERR ,Out Mode;Data Error" "Normal operation,Error"
textline " "
bitfld.long 0x4 18. " OOVER ,Out Mode;FIFO Over Run" "Normal operation,Received"
bitfld.long 0x4 17. " OFFULL ,Out Mode;FIFO Full" "Normal operation,Full state"
bitfld.long 0x4 16. " OORDY ,Out Mode;Out Packet Ready" "Not ready,Ready"
textline " "
bitfld.long 0x4 15. " IATSET ,Auto SET enable" "Disabled,Enabled"
bitfld.long 0x4 14. " IISO ,In Mode;ISO Mode" "Bulk mode,ISO mode"
bitfld.long 0x4 13. " MODE ,In/Out MODE Selection" "OUT,IN"
textline " "
bitfld.long 0x4 12. " DMA_MODE ,DMA enable" "Disabled,Enabled"
bitfld.long 0x4 11. " DMA_IN_PKT ,Data transfer start/end indication" "End,Start"
bitfld.long 0x4 9. " OATCLR ,Auto clear enable" "Disabled,Enabled"
textline " "
bitfld.long 0x4 8. " OISO ,Out Mode;ISO Mode" "Bulk mode,ISO mode"
bitfld.long 0x4 7. " MAXPSET ,MAXP Size SET Table" "Not overwritten,Overwritten"
bitfld.long 0x4 0.--3. " MAXP ,MAXP Size Value" "8 bytes,8 bytes,16 bytes,24 bytes,32 bytes,40 bytes,48 bytes,56 bytes,64 bytes,72 bytes,80 bytes,88 bytes,96 bytes,104 bytes,112 bytes,120 bytes"
line.long 0x8 "USBEP2CSR,USB endpoint 2 common status"
bitfld.long 0x8 30. " ICLTOG ,In Mode;Clear Data Toggle" "No operation,Set to 0"
bitfld.long 0x8 29. " ISTSTALL ,In Mode;Sent Stall" "No operation,Transmitted"
bitfld.long 0x8 28. " ISDSTALL ,In Mode;Send Stall" "No operation,Transmit state"
textline " "
bitfld.long 0x8 27. " IFFLUSH ,In Mode;FIFO Flush" "No operation,FIFO flush"
bitfld.long 0x8 26. " IUNDER ,In Mode;Under Run" "No operation,Received"
bitfld.long 0x8 25. " INEMP ,In Mode;FIFO Not Empty" "No data packet,Packet exists"
textline " "
bitfld.long 0x8 24. " IINRDY ,In Mode;IN Packet Ready" "Not ready,Ready"
bitfld.long 0x8 23. " OCLTOG ,Out Mode;Clear Data Toggle" "No operation,Set to 0"
bitfld.long 0x8 22. " OSTSTALL ,Out Mode;Sent Stall" "No operation,Transmitted"
textline " "
bitfld.long 0x8 21. " OSDSTALL ,Out Mode;Send Stall" "No operation,Transmitted"
bitfld.long 0x8 20. " OFFLUSH ,Out Mode;FIFO Flush" "No operation,FIFO flush"
bitfld.long 0x8 19. " ODERR ,Out Mode;Data Error" "Normal operation,Error"
textline " "
bitfld.long 0x8 18. " OOVER ,Out Mode;FIFO Over Run" "Normal operation,Received"
bitfld.long 0x8 17. " OFFULL ,Out Mode;FIFO Full" "Normal operation,Full state"
bitfld.long 0x8 16. " OORDY ,Out Mode;Out Packet Ready" "Not ready,Ready"
textline " "
bitfld.long 0x8 15. " IATSET ,Auto SET enable" "Disabled,Enabled"
bitfld.long 0x8 14. " IISO ,In Mode;ISO Mode" "Bulk mode,ISO mode"
bitfld.long 0x8 13. " MODE ,In/Out MODE Selection" "OUT,IN"
textline " "
bitfld.long 0x8 12. " DMA_MODE ,DMA enable" "Disabled,Enabled"
bitfld.long 0x8 11. " DMA_IN_PKT ,Data transfer start/end indication" "End,Start"
bitfld.long 0x8 9. " OATCLR ,Auto clear enable" "Disabled,Enabled"
textline " "
bitfld.long 0x8 8. " OISO ,Out Mode;ISO Mode" "Bulk mode,ISO mode"
bitfld.long 0x8 7. " MAXPSET ,MAXP Size SET Table" "Not overwritten,Overwritten"
bitfld.long 0x8 0.--3. " MAXP ,MAXP Size Value" "8 bytes,8 bytes,16 bytes,24 bytes,32 bytes,40 bytes,48 bytes,56 bytes,64 bytes,72 bytes,80 bytes,88 bytes,96 bytes,104 bytes,112 bytes,120 bytes"
line.long 0xC "USBEP3CSR,USB endpoint 3 common status"
bitfld.long 0xC 30. " ICLTOG ,In Mode;Clear Data Toggle" "No operation,Set to 0"
bitfld.long 0xC 29. " ISTSTALL ,In Mode;Sent Stall" "No operation,Transmitted"
bitfld.long 0xC 28. " ISDSTALL ,In Mode;Send Stall" "No operation,Transmit state"
textline " "
bitfld.long 0xC 27. " IFFLUSH ,In Mode;FIFO Flush" "No operation,FIFO flush"
bitfld.long 0xC 26. " IUNDER ,In Mode;Under Run" "No operation,Received"
bitfld.long 0xC 25. " INEMP ,In Mode;FIFO Not Empty" "No data packet,Packet exists"
textline " "
bitfld.long 0xC 24. " IINRDY ,In Mode;IN Packet Ready" "Not ready,Ready"
bitfld.long 0xC 23. " OCLTOG ,Out Mode;Clear Data Toggle" "No operation,Set to 0"
bitfld.long 0xC 22. " OSTSTALL ,Out Mode;Sent Stall" "No operation,Transmitted"
textline " "
bitfld.long 0xC 21. " OSDSTALL ,Out Mode;Send Stall" "No operation,Transmitted"
bitfld.long 0xC 20. " OFFLUSH ,Out Mode;FIFO Flush" "No operation,FIFO flush"
bitfld.long 0xC 19. " ODERR ,Out Mode;Data Error" "Normal operation,Error"
textline " "
bitfld.long 0xC 18. " OOVER ,Out Mode;FIFO Over Run" "Normal operation,Received"
bitfld.long 0xC 17. " OFFULL ,Out Mode;FIFO Full" "Normal operation,Full state"
bitfld.long 0xC 16. " OORDY ,Out Mode;Out Packet Ready" "Not ready,Ready"
textline " "
bitfld.long 0xC 15. " IATSET ,Auto SET enable" "Disabled,Enabled"
bitfld.long 0xC 14. " IISO ,In Mode;ISO Mode" "Bulk mode,ISO mode"
bitfld.long 0xC 13. " MODE ,In/Out MODE Selection" "OUT,IN"
textline " "
bitfld.long 0xC 12. " DMA_MODE ,DMA enable" "Disabled,Enabled"
bitfld.long 0xC 11. " DMA_IN_PKT ,Data transfer start/end indication" "End,Start"
bitfld.long 0xC 9. " OATCLR ,Auto clear enable" "Disabled,Enabled"
textline " "
bitfld.long 0xC 8. " OISO ,Out Mode;ISO Mode" "Bulk mode,ISO mode"
bitfld.long 0xC 7. " MAXPSET ,MAXP Size SET Table" "Not overwritten,Overwritten"
bitfld.long 0xC 0.--3. " MAXP ,MAXP Size Value" "8 bytes,8 bytes,16 bytes,24 bytes,32 bytes,40 bytes,48 bytes,56 bytes,64 bytes,72 bytes,80 bytes,88 bytes,96 bytes,104 bytes,112 bytes,120 bytes"
line.long 0x10 "USBEP4CSR,USB endpoint 4 common status"
bitfld.long 0x10 30. " ICLTOG ,In Mode;Clear Data Toggle" "No operation,Set to 0"
bitfld.long 0x10 29. " ISTSTALL ,In Mode;Sent Stall" "No operation,Transmitted"
bitfld.long 0x10 28. " ISDSTALL ,In Mode;Send Stall" "No operation,Transmit state"
textline " "
bitfld.long 0x10 27. " IFFLUSH ,In Mode;FIFO Flush" "No operation,FIFO flush"
bitfld.long 0x10 26. " IUNDER ,In Mode;Under Run" "No operation,Received"
bitfld.long 0x10 25. " INEMP ,In Mode;FIFO Not Empty" "No data packet,Packet exists"
textline " "
bitfld.long 0x10 24. " IINRDY ,In Mode;IN Packet Ready" "Not ready,Ready"
bitfld.long 0x10 23. " OCLTOG ,Out Mode;Clear Data Toggle" "No operation,Set to 0"
bitfld.long 0x10 22. " OSTSTALL ,Out Mode;Sent Stall" "No operation,Transmitted"
textline " "
bitfld.long 0x10 21. " OSDSTALL ,Out Mode;Send Stall" "No operation,Transmitted"
bitfld.long 0x10 20. " OFFLUSH ,Out Mode;FIFO Flush" "No operation,FIFO flush"
bitfld.long 0x10 19. " ODERR ,Out Mode;Data Error" "Normal operation,Error"
textline " "
bitfld.long 0x10 18. " OOVER ,Out Mode;FIFO Over Run" "Normal operation,Received"
bitfld.long 0x10 17. " OFFULL ,Out Mode;FIFO Full" "Normal operation,Full state"
bitfld.long 0x10 16. " OORDY ,Out Mode;Out Packet Ready" "Not ready,Ready"
textline " "
bitfld.long 0x10 15. " IATSET ,Auto SET enable" "Disabled,Enabled"
bitfld.long 0x10 14. " IISO ,In Mode;ISO Mode" "Bulk mode,ISO mode"
bitfld.long 0x10 13. " MODE ,In/Out MODE Selection" "OUT,IN"
textline " "
bitfld.long 0x10 12. " DMA_MODE ,DMA enable" "Disabled,Enabled"
bitfld.long 0x10 11. " DMA_IN_PKT ,Data transfer start/end indication" "End,Start"
bitfld.long 0x10 9. " OATCLR ,Auto clear enable" "Disabled,Enabled"
textline " "
bitfld.long 0x10 8. " OISO ,Out Mode;ISO Mode" "Bulk mode,ISO mode"
bitfld.long 0x10 7. " MAXPSET ,MAXP Size SET Table" "Not overwritten,Overwritten"
bitfld.long 0x10 0.--3. " MAXP ,MAXP Size Value" "8 bytes,8 bytes,16 bytes,24 bytes,32 bytes,40 bytes,48 bytes,56 bytes,64 bytes,72 bytes,80 bytes,88 bytes,96 bytes,104 bytes,112 bytes,120 bytes"
group.long 0x40++0x13
line.long 0x00 "USBEP0WC,USB write count register for endpoint 0"
hexmask.long.byte 0x00 0.--4. 1. " WRTCNT ,Write Count"
line.long 0x4 "USBEP1WC,USB write count register for endpoint 1"
hexmask.long.byte 0x4 16.--23. 1. " WRTCNT1 ,Second Write Count"
hexmask.long.byte 0x4 0.--7. 1. " WRTCNT0 ,First Write Count"
line.long 0x8 "USBEP2WC,USB write count register for endpoint 2"
hexmask.long.byte 0x8 16.--23. 1. " WRTCNT1 ,Second Write Count"
hexmask.long.byte 0x8 0.--7. 1. " WRTCNT0 ,First Write Count"
line.long 0xC "USBEP3WC,USB write count register for endpoint 3"
hexmask.long.byte 0xC 16.--23. 1. " WRTCNT1 ,Second Write Count"
hexmask.long.byte 0xC 0.--7. 1. " WRTCNT0 ,First Write Count"
line.long 0x10 "USBEP4WC,USB write count register for endpoint 4"
hexmask.long.byte 0x10 16.--23. 1. " WRTCNT1 ,Second Write Count"
hexmask.long.byte 0x10 0.--7. 1. " WRTCNT0 ,First Write Count"
group.long 0x60++0x07
line.long 0x00 "USBNAKCON1,USB NAK Control 1 register"
bitfld.long 0x00 31. " NAKEN ,NAK Enable" "Disabled,Enabled"
bitfld.long 0x00 20.--23. " NAKEP1 ,1st EP Address to transmit NAK" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. " NAKEP2 ,2nd EP Address to transmit NAK" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 12.--15. " NAKEP3 ,3rd EP Address to transmit NAK" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. " NAKEP4 ,4th EP Address to transmit NAK" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. " NAKEP5 ,5th EP Address to transmit NAK" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 0.--3. " NAKEP6 ,6th EP Address to transmit NAK" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "USBNAKCON2,USB NAK Control 2 register"
bitfld.long 0x04 31. " NAKEN ,NAK Enable" "Disabled,Enabled"
bitfld.long 0x04 20.--23. " NAKEP7 ,7th EP Address to transmit NAK" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 16.--19. " NAKEP8 ,8th EP Address to transmit NAK" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x04 12.--15. " NAKEP9 ,9th EP Address to transmit NAK" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. " NAKEP10 ,10th EP Address to transmit NAK" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. " NAKEP11 ,11th EP Address to transmit NAK" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x04 0.--3. " NAKEP12 ,12th EP Address to transmit NAK" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x70++0x13
line.long 0x0 "USBEP1,USB endpoint 0 FIFO"
hexmask.long.byte 0x0 0.--7. 1. " EPFIFO ,FIFO which is used for data IN/OUT"
line.long 0x4 "USBEP2,USB endpoint 0 FIFO"
hexmask.long.byte 0x4 0.--7. 1. " EPFIFO ,FIFO which is used for data IN/OUT"
line.long 0x8 "USBEP3,USB endpoint 0 FIFO"
hexmask.long.byte 0x8 0.--7. 1. " EPFIFO ,FIFO which is used for data IN/OUT"
line.long 0xC "USBEP4,USB endpoint 0 FIFO"
hexmask.long.byte 0xC 0.--7. 1. " EPFIFO ,FIFO which is used for data IN/OUT"
line.long 0x10 "USBEP5,USB endpoint 0 FIFO"
hexmask.long.byte 0x10 0.--7. 1. " EPFIFO ,FIFO which is used for data IN/OUT"
group.long 0xA0++0x03
line.long 0x00 "PROGREG,USB Configuration"
bitfld.long 0x00 9.--10. " SOFINT ,SOF Interrupt Control" "SOF Interrupt(default),CRC Error Interrupt,Clock-Recovery Lock Interrupt,SOF Interrupt"
textline " "
bitfld.long 0x00 8. " NAKC ,USB NAK Control" "Normal operation,IN/ OUT/SETUP"
bitfld.long 0x00 7. " TCLK ,USB Transaction Clock Selection" "Internal,External"
textline " "
bitfld.long 0x00 6. " WKP ,USB Wakeup Control" "Enabled,Disabled"
bitfld.long 0x00 5. " SUSC ,USB Suspend Control" "No operation,1"
bitfld.long 0x00 3. " CIO ,Crystal IO Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 2. " DD ,D +/D - direction" "Bi-direction,Output only"
bitfld.long 0x00 1. " DP ,D+ value" "Low,High"
bitfld.long 0x00 0. " DN ,D - value" "Low,High"
group.long 0xB4++0x03
line.long 0x00 "FSPULLUP,USB FS Pull up control"
bitfld.long 0x00 0. " FSPU ,Full Speed PULLUP" "Floating,1.5 kOhm"
width 11.
tree.end
tree "WD (Watchdog Timer)"
base ad:0x40030000
width 11.
rgroup.long 0x00++0x03
line.long 0x00 "WDT_IDR,Watchdog Timer ID Register"
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
wgroup.long 0x04++0x03
line.long 0x00 "WDT_CR,Watchdog Timer Control Register"
bitfld.long 0x00 31. " DBGEN ,Debug Enable/Disable Control Bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. " RSTKEY ,Restart Key Field"
group.long 0x08++0x07
line.long 0x00 "WDT_MR,Watchdog Timer Mode Register"
hexmask.long.byte 0x00 24.--31. 1. " CKEY ,Clock Access Key Field"
hexmask.long.word 0x00 8.--23. 1. " PCV ,Preload Counter Value"
bitfld.long 0x00 0.--2. " WDTPDIV ,WDT Clock Divider Field" "FIN/2,FIN/4,FIN/8,FIN/16,FIN/64,FIN/128,FIN/256,FIN/512"
line.long 0x04 "WDT_OMR,Watchdog Timer Overflow Mode Register"
hexmask.long.word 0x04 4.--15. 1. " OKEY ,Overflow Access Key Field"
bitfld.long 0x04 2. " LOCKRSTEN ,CPU Lock-up Reset Enable/Disable Control Bit" "Disabled,Enabled"
bitfld.long 0x04 1. " RSTEN ,System (Chip) Reset Enable/Disable Control Bit" "Disabled,Enabled"
textline " "
bitfld.long 0x04 0. " WDTEN ,Watchdog Enable/Disable Control Bit" "Disabled,Enabled"
rgroup.long 0x10++0x03
line.long 0x00 "WDT_SR,Watchdog Timer Status Register"
bitfld.long 0x00 31. " DBGEN ,DBGEN Status" "Disabled,Enabled"
bitfld.long 0x00 9. " ,Clear Status" "Reset finished,Reset started"
bitfld.long 0x00 8. " PENDING ,Watchdog Pending status" "Over,Equal/less"
group.long 0x14++0x03
line.long 0x00 "WDT_IMSCR,Watchdog Timer Interrupt Mask Set and Clear Register"
bitfld.long 0x00 1. " WDTOVF ,Watchdog Timer Pending Interrupt Mask" "Masked,Not masked"
bitfld.long 0x00 0. " WDTPEND ,Watchdog Timer Overflow Interrupt Mask" "Masked,Not masked"
rgroup.long 0x18++0x07
line.long 0x00 "WDT_RISR,Watchdog Timer Raw Interrupt Status Register"
bitfld.long 0x00 1. " WDTOVF ,Watchdog overflow interrupt raw state" "Not occurred,Occurred"
bitfld.long 0x00 0. " WDTPEND ,Watchdog pending interrupt raw state" "Not occurred,Occurred"
line.long 0x04 "WDT_MISR,Watchdog Timer Masked Interrupt Status Register"
bitfld.long 0x04 1. " WDTOVF ,Watchdog overflow interrupt mask" "Not occurred,Occurred"
bitfld.long 0x04 0. " WDTPEND ,Watchdog pending masked interrupt Status" "Not occurred,Occurred"
wgroup.long 0x20++0x03
line.long 0x00 "WDT_ICR,Watchdog Timer Interrupt Clear Register"
bitfld.long 0x00 1. " WDTOVF ,Watchdog overflow clear" "No effect,Clear"
bitfld.long 0x00 0. " WDTPEND ,Watchdog pending clear." "No effect,Clear"
group.long 0x24++0x03
line.long 0x00 "WDT_PWR,Watchdog Pending Windows Register"
hexmask.long.byte 0x00 24.--31. 1. " PWKEY ,Pending window access key"
hexmask.long.word 0x00 8.--23. 1. " PWL ,Pending window length"
bitfld.long 0x00 0. " RSTALW ,Restart allowed" "Every time,Within"
rgroup.long 0x28++0x03
line.long 0x00 "WDT_CTR,Watchdog Timer Counter Test Register"
hexmask.long.word 0x00 0.--15. 1. " COUNT ,Value of Watchdog timer counter"
width 11.
tree.end
textline ""
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