2049 lines
147 KiB
Plaintext
2049 lines
147 KiB
Plaintext
; --------------------------------------------------------------------------------
|
|
; @Title: PAC52xx On-Chip Peripherals
|
|
; @Props: Released
|
|
; @Author: JDU
|
|
; @Changelog: 2023-01-27 JDU
|
|
; @Manufacturer: QORVO - Qorvo, Inc
|
|
; @Doc: SVD generated (SVD2PER 1.8.6), based on: PAC52XX.svd (Ver. 1.0)
|
|
; @Core: Cortex-M0
|
|
; @Chip: PAC5210, PAC5220, PAC5222, PAC5223, PAC5225, PAC5232, PAC5223A, PAC5250,
|
|
; PAC5253, PAC5255, PAC5256, PAC5285
|
|
; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only
|
|
; --------------------------------------------------------------------------------
|
|
; $Id: perpac52xx.per 15688 2023-01-27 13:15:06Z kwisniewski $
|
|
|
|
tree.close "Core Registers (Cortex-M0)"
|
|
AUTOINDENT.PUSH
|
|
AUTOINDENT.OFF
|
|
tree "System Control"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 0x8
|
|
if (CORENAME()=="CORTEXM1")
|
|
group.long 0x10++0x0b
|
|
line.long 0x00 "STCSR,SysTick Control and Status Register"
|
|
bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
|
|
bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
|
|
bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
|
|
line.long 0x04 "STRVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
|
|
line.long 0x08 "STCVR,SysTick Current Value Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
|
|
else
|
|
group.long 0x10++0x0b
|
|
line.long 0x00 "STCSR,SysTick Control and Status Register"
|
|
bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
|
|
bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
|
|
bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
|
|
line.long 0x04 "STRVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
|
|
line.long 0x08 "STCVR,SysTick Current Value Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
|
|
endif
|
|
if (CORENAME()=="CORTEXM1")
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "STCR,SysTick Calibration Value Register"
|
|
bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1"
|
|
bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known"
|
|
else
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "STCR,SysTick Calibration Value Register"
|
|
bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented"
|
|
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors"
|
|
endif
|
|
rgroup.long 0xd00++0x03
|
|
line.long 0x00 "CPUID,CPU ID Base Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer code"
|
|
hexmask.long.byte 0x00 20.--23. 1. " VARIANT ,Implementation defined variant number"
|
|
textline " "
|
|
hexmask.long.byte 0x00 4.--15. 1. " PARTNO ,Number of processor within family"
|
|
hexmask.long.byte 0x00 0.--3. 1. " REVISION ,Implementation defined revision number"
|
|
group.long 0xd04++0x03
|
|
line.long 0x00 "ICSR,Interrupt Control State Register"
|
|
bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending"
|
|
bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending"
|
|
bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending"
|
|
bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt"
|
|
hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field"
|
|
if (CORENAME()=="CORTEXM0+")
|
|
group.long 0xd08++0x03
|
|
line.long 0x00 "VTOR,Vector Table Offset Register"
|
|
hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address"
|
|
else
|
|
textline " "
|
|
endif
|
|
group.long 0xd0c++0x03
|
|
line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key"
|
|
bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset"
|
|
bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear"
|
|
group.long 0xd10++0x03
|
|
line.long 0x00 "SCR,System Control Register"
|
|
bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
|
|
bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
|
|
rgroup.long 0xd14++0x03
|
|
line.long 0x00 "CCR,Configuration and Control Register"
|
|
bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned"
|
|
bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped"
|
|
group.long 0xd1c++0x0b
|
|
line.long 0x00 "SHPR2,System Handler Priority Register 2"
|
|
bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11"
|
|
line.long 0x04 "SHPR3,System Handler Priority Register 3"
|
|
bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11"
|
|
bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11"
|
|
line.long 0x08 "SHCSR,System Handler Control and State Register"
|
|
bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending"
|
|
if (CORENAME()=="CORTEXM0+")
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "ACTLR,Auxiliary Control Register"
|
|
else
|
|
textline " "
|
|
endif
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller (NVIC)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 12.
|
|
tree "Interrupt Enable Registers"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
tree.end
|
|
width 6.
|
|
tree "Interrupt Priority Registers"
|
|
group.long 0x400++0x1F
|
|
line.long 0x00 "INT0,Interrupt Priority Register"
|
|
bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3"
|
|
line.long 0x04 "INT1,Interrupt Priority Register"
|
|
bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3"
|
|
bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3"
|
|
bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3"
|
|
bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3"
|
|
line.long 0x08 "INT2,Interrupt Priority Register"
|
|
bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3"
|
|
bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3"
|
|
bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3"
|
|
bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3"
|
|
line.long 0x0C "INT3,Interrupt Priority Register"
|
|
bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3"
|
|
bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3"
|
|
bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3"
|
|
bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3"
|
|
line.long 0x10 "INT4,Interrupt Priority Register"
|
|
bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3"
|
|
bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3"
|
|
bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3"
|
|
bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3"
|
|
line.long 0x14 "INT5,Interrupt Priority Register"
|
|
bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3"
|
|
bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3"
|
|
bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3"
|
|
bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3"
|
|
line.long 0x18 "INT6,Interrupt Priority Register"
|
|
bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3"
|
|
bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3"
|
|
bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3"
|
|
bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3"
|
|
line.long 0x1C "INT7,Interrupt Priority Register"
|
|
bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3"
|
|
bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3"
|
|
bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3"
|
|
bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 0xA
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred"
|
|
eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match"
|
|
textline " "
|
|
eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match"
|
|
eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request"
|
|
if (CORENAME()=="CORTEXM1")
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Selector Register"
|
|
bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write"
|
|
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..."
|
|
group.long 0xDF8++0x07
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor"
|
|
line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Breakpoint Unit (BPU)"
|
|
sif COMPonent.AVAILABLE("BPU")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1))
|
|
width 8.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "BP_CTRL,Breakpoint Control Register"
|
|
bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " KEY ,Key field" "No write,Write"
|
|
bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled"
|
|
else
|
|
newline
|
|
textline "BPU component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 14.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "DW_CTRL,DW Control Register "
|
|
bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "DW_PCSR,DW Program Counter Sample Register"
|
|
hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF"
|
|
group.long 0x20++0x0b
|
|
line.long 0x00 "DW_COMP0,DW Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK0,DW Mask Register 0"
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION0,DW Function Register 0"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
group.long 0x30++0x0b
|
|
line.long 0x00 "DW_COMP1,DW Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK1,DW Mask Register 1 "
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION1,DW Function Register 1"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
autoindent.on center tree
|
|
tree "ADC (Analog to Digital Converter)"
|
|
base ad:0x40150000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "EMUXCTL,ADC External MUX control register"
|
|
bitfld.long 0x00 5. "EMUXC,ADC External MUX control" "0: ADC External MUX manual control,1: ADC External MUX controlled by auto-sequencer.."
|
|
bitfld.long 0x00 4. "EMUXBUSY,ADC External MUX status" "0: ADC External MUX busy,1: ADC External MUX not busy"
|
|
newline
|
|
bitfld.long 0x00 3. "EMUXDONE,ADC External MUX data send done" "0: ADC External MUX busy,1: ADC External MUX data sent"
|
|
bitfld.long 0x00 0.--2. "EMUXCDIV,ADC External MUX clock to FCLK divider" "0: FCLK dvided by 1,1: FCLK dvided by 2,2: FCLK dvided by 3,3: FCLK dvided by 4,4: FCLK dvided by 5,5: FCLK dvided by 6,6: FCLK dvided by 7,7: FCLK dvided by 8"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EMUXDATA,ADC External MUX data register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DATA,ADC External MUX data register"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ADCCTL,ADC control register"
|
|
bitfld.long 0x00 15. "ADCEN,ADC Module Enable" "0: turn off ADC module,1: enable ADC module"
|
|
bitfld.long 0x00 14. "ADCSTART,Start ADC Conversion" "0: stop ADC conversion,1: start ADC conversion"
|
|
newline
|
|
bitfld.long 0x00 10.--12. "ADCMODE,ADC conversion mode" "0: single channel,1: automated sequence 0 only,2: automated sequencer 1 only,3: automated sequencer 0 and 1 daisy chained,4: automated sequencer 0 only trigger condition,5: automated sequencer 1 only trigger condition,6: automated sequencer 0 and 1 daisy chained..,7: automated sequencer 0 and 1 independently.."
|
|
rbitfld.long 0x00 7. "ADCBUSY,ADC busy" "0: no_operation,1: ADC conversion or auto sequencer active"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "ADCMUX,ADC MUX input select" "0: AD0 input,?,2: AD2 input,3: AD3 input,4: AD4 input,5: AD5 input,?,7: VSSA input"
|
|
bitfld.long 0x00 0.--2. "ADCCDIV,ADC input clock FCLK divider" "0: FCLK divided by 1,1: FCLK divided by 2,2: FCLK divided by 3,3: FCLK divided by 4,4: FCLK divided by 5,5: FCLK divided by 6,6: FCLK divided by 7,7: FCLK divided by 8"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "ADCCR,ADC conversion result register"
|
|
hexmask.long.word 0x00 0.--15. 1. "ADCRESULT,ADC conversion result"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "ADCINT,ADC interrupt register"
|
|
bitfld.long 0x00 18.--19. "ASCINTTR,Last auto sequencer to run" "0: no sequencer ran,1: auto sequencer 0 last ran,2: Auto sequencer 1 last ran,?..."
|
|
bitfld.long 0x00 16.--17. "ASCINTSEQ,Last auto sequencer to trigger ADCINT.ASCINT" "0: no trigger,1: auto sequencer 0 triggered interrupt,2: Auto sequencer 1 triggered interrupt,3: Both auto sequencer 0 and 1 triggered interrupt"
|
|
newline
|
|
bitfld.long 0x00 12. "ASCINT_EN,Enable auto sequencer collision interrupt" "0: interrupt disabled,1: interrupt enabled"
|
|
bitfld.long 0x00 11. "AS1INT_EN,Enable auto sequencer 1 conversions finished interrupt" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 10. "AS0INT_EN,Enable auto sequencer 0 conversions finished interrupt" "0: interrupt disabled,1: interrupt enabled"
|
|
bitfld.long 0x00 9. "EMUXINT_EN,EMUX transfer finished interrupt enabled" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 8. "ADCINT_EN,ADC conversion finished interrupt enabled" "0: interrupt disabled,1: interrupt enabled"
|
|
bitfld.long 0x00 4. "ASCINT,Auto sequencer collision interrupt" "0: no interrupt,1: interrupt write 1b to clear"
|
|
newline
|
|
bitfld.long 0x00 3. "AS1INT,Auto sequencer 1 conversions finished interrupt" "0: no interrupt,1: interrupt write 1b to clear"
|
|
bitfld.long 0x00 2. "AS0INT,Auto sequencer 0 conversions finished interrupt" "0: no interrupt,1: interrupt write 1b to clear"
|
|
newline
|
|
bitfld.long 0x00 1. "EMUXINT,EMUX data transfer finished interrupt" "0: no interrupt,1: interrupt write 1b to clear"
|
|
bitfld.long 0x00 0. "ADCINT,ADC conversion finished interrupt" "0: no interrupt,1: interrupt write 1b to clear"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "AS0CTL,Auto sequencer 0 control register"
|
|
bitfld.long 0x00 12. "ASxBUSY,Auto sequencer busy" "0: auto sequencer not active,1: auto sequencer sampling active"
|
|
bitfld.long 0x00 11. "ASxEN,Auto sequencer enabled" "0: auto sequencer disabled,1: auto sequencer enabled"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "ASxD,Auto sequencer sampling depth" "0: 1 sample,1: 2 samples,2: 3 samples,3: 4 samples,4: 5 samples,5: 6 samples,6: 7 samples,7: 8 samples"
|
|
bitfld.long 0x00 7. "ASxTR,Auto sequencer trigger source" "0: PWM as defined by ASxCTL.ASxTRPWM,1: Timer as defined by ASxCTL.ASxTRTMR"
|
|
newline
|
|
bitfld.long 0x00 6. "ASxTRE,Auto sequencer trigger source ASxCTL.ASxTR edge" "0: High to low edge,1: Low to high edge"
|
|
bitfld.long 0x00 4.--5. "ASAxTRTMR,Auto sequencer timer trigger source" "0: Timer_A,1: Timer_B,2: Timer_C,3: Timer_D"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "ASAxTRPWM,Auto sequencer PWM trigger source" "0: PWMA0 Trigger,1: PWMA1 Trigger,2: PWMA2 Trigger,3: PWMA3 Trigger,4: PWMA4 Trigger,5: PWMA5 Trigger,6: PWMA6 Trigger,7: PWMA7 Trigger,8: PWMB0,9: PWMB1,10: PWMC0,11: PWMC1,12: PWMD0,13: PWMD1,?..."
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "AS0S0,Auto sequencer 0 sample 0 control register"
|
|
bitfld.long 0x00 12.--14. "ADCMUX,ADC MUX input select" "0: EMUX,?,2: AD2,3: AD3,4: AD4,5: AD5,?,7: VSSA"
|
|
bitfld.long 0x00 10.--11. "DELAY,Delay between start of sample sequence and start of ADC conversion in input clocks" "0: 0 ADC input clocks,1: 4 ADC input clocks,2: 8 ADC input clocks,3: 16 ADC input clocks"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "EMUXS,EMUX transmission start" "0: Do not send data,1: Send EMUXD data at beginning of this sample..,2: Send EMUXD data after S/H of ADC,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "EMUXD,EMUXD"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "AS0R0,Auto sequencer 0 sample 0 result register"
|
|
hexmask.long.word 0x00 0.--9. 1. "ADCRESULT,ADC conversion result"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "AS0S1,Auto sequencer 0 sample 1 control register"
|
|
bitfld.long 0x00 12.--14. "ADCMUX,ADC MUX input select" "0: EMUX,?,2: AD2,3: AD3,4: AD4,5: AD5,?,7: VSSA"
|
|
bitfld.long 0x00 10.--11. "DELAY,Delay between start of sample sequence and start of ADC conversion in input clocks" "0: 0 ADC input clocks,1: 4 ADC input clocks,2: 8 ADC input clocks,3: 16 ADC input clocks"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "EMUXS,EMUX transmission start" "0: Do not send data,1: Send EMUXD data at beginning of this sample..,2: Send EMUXD data after S/H of ADC,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "EMUXD,EMUXD"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "AS0R1,Auto sequencer 0 sample 1 result register"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "AS0S2,Auto sequencer 0 sample 2 control register"
|
|
bitfld.long 0x00 12.--14. "ADCMUX,ADC MUX input select" "0: EMUX,?,2: AD2,3: AD3,4: AD4,5: AD5,?,7: VSSA"
|
|
bitfld.long 0x00 10.--11. "DELAY,Delay between start of sample sequence and start of ADC conversion in input clocks" "0: 0 ADC input clocks,1: 4 ADC input clocks,2: 8 ADC input clocks,3: 16 ADC input clocks"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "EMUXS,EMUX transmission start" "0: Do not send data,1: Send EMUXD data at beginning of this sample..,2: Send EMUXD data after S/H of ADC,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "EMUXD,EMUXD"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "AS0R2,Auto sequencer 0 sample 2 result register"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "AS0S3,Auto sequencer 0 sample 3 control register"
|
|
bitfld.long 0x00 12.--14. "ADCMUX,ADC MUX input select" "0: EMUX,?,2: AD2,3: AD3,4: AD4,5: AD5,?,7: VSSA"
|
|
bitfld.long 0x00 10.--11. "DELAY,Delay between start of sample sequence and start of ADC conversion in input clocks" "0: 0 ADC input clocks,1: 4 ADC input clocks,2: 8 ADC input clocks,3: 16 ADC input clocks"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "EMUXS,EMUX transmission start" "0: Do not send data,1: Send EMUXD data at beginning of this sample..,2: Send EMUXD data after S/H of ADC,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "EMUXD,EMUXD"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "AS0R3,Auto sequencer 0 sample 3 result register"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "AS0S4,Auto sequencer 0 sample 4 control register"
|
|
bitfld.long 0x00 12.--14. "ADCMUX,ADC MUX input select" "0: EMUX,?,2: AD2,3: AD3,4: AD4,5: AD5,?,7: VSSA"
|
|
bitfld.long 0x00 10.--11. "DELAY,Delay between start of sample sequence and start of ADC conversion in input clocks" "0: 0 ADC input clocks,1: 4 ADC input clocks,2: 8 ADC input clocks,3: 16 ADC input clocks"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "EMUXS,EMUX transmission start" "0: Do not send data,1: Send EMUXD data at beginning of this sample..,2: Send EMUXD data after S/H of ADC,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "EMUXD,EMUXD"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "AS0R4,Auto sequencer 0 sample 4 result register"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "AS0S5,Auto sequencer 0 sample 5 control register"
|
|
bitfld.long 0x00 12.--14. "ADCMUX,ADC MUX input select" "0: EMUX,?,2: AD2,3: AD3,4: AD4,5: AD5,?,7: VSSA"
|
|
bitfld.long 0x00 10.--11. "DELAY,Delay between start of sample sequence and start of ADC conversion in input clocks" "0: 0 ADC input clocks,1: 4 ADC input clocks,2: 8 ADC input clocks,3: 16 ADC input clocks"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "EMUXS,EMUX transmission start" "0: Do not send data,1: Send EMUXD data at beginning of this sample..,2: Send EMUXD data after S/H of ADC,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "EMUXD,EMUXD"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "AS0R5,Auto sequencer 0 sample 5 result register"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "AS0S6,Auto sequencer 0 sample 6 control register"
|
|
bitfld.long 0x00 12.--14. "ADCMUX,ADC MUX input select" "0: EMUX,?,2: AD2,3: AD3,4: AD4,5: AD5,?,7: VSSA"
|
|
bitfld.long 0x00 10.--11. "DELAY,Delay between start of sample sequence and start of ADC conversion in input clocks" "0: 0 ADC input clocks,1: 4 ADC input clocks,2: 8 ADC input clocks,3: 16 ADC input clocks"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "EMUXS,EMUX transmission start" "0: Do not send data,1: Send EMUXD data at beginning of this sample..,2: Send EMUXD data after S/H of ADC,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "EMUXD,EMUXD"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "AS0R6,Auto sequencer 0 sample 6 result register"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "AS0S7,Auto sequencer 0 sample 7 control register"
|
|
bitfld.long 0x00 12.--14. "ADCMUX,ADC MUX input select" "0: EMUX,?,2: AD2,3: AD3,4: AD4,5: AD5,?,7: VSSA"
|
|
bitfld.long 0x00 10.--11. "DELAY,Delay between start of sample sequence and start of ADC conversion in input clocks" "0: 0 ADC input clocks,1: 4 ADC input clocks,2: 8 ADC input clocks,3: 16 ADC input clocks"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "EMUXS,EMUX transmission start" "0: Do not send data,1: Send EMUXD data at beginning of this sample..,2: Send EMUXD data after S/H of ADC,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "EMUXD,EMUXD"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "AS0R7,Auto sequencer 0 sample 7 result register"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "AS1CTL,Auto sequencer 1 control register"
|
|
bitfld.long 0x00 12. "ASxBUSY,Auto sequencer busy" "0: auto sequencer not active,1: auto sequencer sampling active"
|
|
bitfld.long 0x00 11. "ASxEN,Auto sequencer enabled" "0: auto sequencer disabled,1: auto sequencer enabled"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "ASxD,Auto sequencer sampling depth" "0: 1 sample,1: 2 samples,2: 3 samples,3: 4 samples,4: 5 samples,5: 6 samples,6: 7 samples,7: 8 samples"
|
|
bitfld.long 0x00 7. "ASxTR,Auto sequencer trigger source" "0: PWM as defined by ASxCTL.ASxTRPWM,1: Timer as defined by ASxCTL.ASxTRTMR"
|
|
newline
|
|
bitfld.long 0x00 6. "ASxTRE,Auto sequencer trigger source ASxCTL.ASxTR edge" "0: High to low edge,1: Low to high edge"
|
|
bitfld.long 0x00 4.--5. "ASAxTRTMR,Auto sequencer timer trigger source" "0: Timer_A,1: Timer_B,2: Timer_C,3: Timer_D"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "ASAxTRPWM,Auto sequencer PWM trigger source" "0: PWMA0,1: PWMA1,2: PWMA2,3: PWMA3,4: PWMA4,5: PWMA5,6: PWMA6,7: PWMA7,8: PWMB0,9: PWMB1,10: PWMC0,11: PWMC1,12: PWMD0,13: PWMD1,?..."
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "AS1S0,Auto sequencer 1 sample 0 control register"
|
|
bitfld.long 0x00 12.--14. "ADCMUX,ADC MUX input select" "0: EMUX,?,2: AD2,3: AD3,4: AD4,5: AD5,?,7: VSSA"
|
|
bitfld.long 0x00 10.--11. "DELAY,Delay between start of sample sequence and start of ADC conversion in input clocks" "0: 0 ADC input clocks,1: 4 ADC input clocks,2: 8 ADC input clocks,3: 16 ADC input clocks"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "EMUXS,EMUX transmission start" "0: Do not send data,1: Send EMUXD data at beginning of this sample..,2: Send EMUXD data after S/H of ADC,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "EMUXD,EMUXD"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "AS1R0,Auto sequencer 1 sample 0 result register"
|
|
hexmask.long.word 0x00 0.--9. 1. "ADCRESULT,ADC conversion result"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "AS1S1,Auto sequencer 1 sample 1 control register"
|
|
bitfld.long 0x00 12.--14. "ADCMUX,ADC MUX input select" "0: EMUX,?,2: AD2,3: AD3,4: AD4,5: AD5,?,7: VSSA"
|
|
bitfld.long 0x00 10.--11. "DELAY,Delay between start of sample sequence and start of ADC conversion in input clocks" "0: 0 ADC input clocks,1: 4 ADC input clocks,2: 8 ADC input clocks,3: 16 ADC input clocks"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "EMUXS,EMUX transmission start" "0: Do not send data,1: Send EMUXD data at beginning of this sample..,2: Send EMUXD data after S/H of ADC,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "EMUXD,EMUXD"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "AS1R1,Auto sequencer 1 sample 1 result register"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "AS1S2,Auto sequencer 1 sample 2 control register"
|
|
bitfld.long 0x00 12.--14. "ADCMUX,ADC MUX input select" "0: EMUX,?,2: AD2,3: AD3,4: AD4,5: AD5,?,7: VSSA"
|
|
bitfld.long 0x00 10.--11. "DELAY,Delay between start of sample sequence and start of ADC conversion in input clocks" "0: 0 ADC input clocks,1: 4 ADC input clocks,2: 8 ADC input clocks,3: 16 ADC input clocks"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "EMUXS,EMUX transmission start" "0: Do not send data,1: Send EMUXD data at beginning of this sample..,2: Send EMUXD data after S/H of ADC,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "EMUXD,EMUXD"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "AS1R2,Auto sequencer 1 sample 2 result register"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "AS1S3,Auto sequencer 1 sample 3 control register"
|
|
bitfld.long 0x00 12.--14. "ADCMUX,ADC MUX input select" "0: EMUX,?,2: AD2,3: AD3,4: AD4,5: AD5,?,7: VSSA"
|
|
bitfld.long 0x00 10.--11. "DELAY,Delay between start of sample sequence and start of ADC conversion in input clocks" "0: 0 ADC input clocks,1: 4 ADC input clocks,2: 8 ADC input clocks,3: 16 ADC input clocks"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "EMUXS,EMUX transmission start" "0: Do not send data,1: Send EMUXD data at beginning of this sample..,2: Send EMUXD data after S/H of ADC,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "EMUXD,EMUXD"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "AS1R3,Auto sequencer 1 sample 3 result register"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "AS1S4,Auto sequencer 1 sample 4 control register"
|
|
bitfld.long 0x00 12.--14. "ADCMUX,ADC MUX input select" "0: EMUX,?,2: AD2,3: AD3,4: AD4,5: AD5,?,7: VSSA"
|
|
bitfld.long 0x00 10.--11. "DELAY,Delay between start of sample sequence and start of ADC conversion in input clocks" "0: 0 ADC input clocks,1: 4 ADC input clocks,2: 8 ADC input clocks,3: 16 ADC input clocks"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "EMUXS,EMUX transmission start" "0: Do not send data,1: Send EMUXD data at beginning of this sample..,2: Send EMUXD data after S/H of ADC,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "EMUXD,EMUXD"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "AS1R4,Auto sequencer 1 sample 4 result register"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "AS1S5,Auto sequencer 1 sample 5 control register"
|
|
bitfld.long 0x00 12.--14. "ADCMUX,ADC MUX input select" "0: EMUX,?,2: AD2,3: AD3,4: AD4,5: AD5,?,7: VSSA"
|
|
bitfld.long 0x00 10.--11. "DELAY,Delay between start of sample sequence and start of ADC conversion in input clocks" "0: 0 ADC input clocks,1: 4 ADC input clocks,2: 8 ADC input clocks,3: 16 ADC input clocks"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "EMUXS,EMUX transmission start" "0: Do not send data,1: Send EMUXD data at beginning of this sample..,2: Send EMUXD data after S/H of ADC,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "EMUXD,EMUXD"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "AS1R5,Auto sequencer 1 sample 5 result register"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "AS1S6,Auto sequencer 1 sample 6 control register"
|
|
bitfld.long 0x00 12.--14. "ADCMUX,ADC MUX input select" "0: EMUX,?,2: AD2,3: AD3,4: AD4,5: AD5,?,7: VSSA"
|
|
bitfld.long 0x00 10.--11. "DELAY,Delay between start of sample sequence and start of ADC conversion in input clocks" "0: 0 ADC input clocks,1: 4 ADC input clocks,2: 8 ADC input clocks,3: 16 ADC input clocks"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "EMUXS,EMUX transmission start" "0: Do not send data,1: Send EMUXD data at beginning of this sample..,2: Send EMUXD data after S/H of ADC,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "EMUXD,EMUXD"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "AS1R6,Auto sequencer 1 sample 6 result register"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "AS1S7,Auto sequencer 1 sample 7 control register"
|
|
bitfld.long 0x00 12.--14. "ADCMUX,ADC MUX input select" "0: EMUX,?,2: AD2,3: AD3,4: AD4,5: AD5,?,7: VSSA"
|
|
bitfld.long 0x00 10.--11. "DELAY,Delay between start of sample sequence and start of ADC conversion in input clocks" "0: 0 ADC input clocks,1: 4 ADC input clocks,2: 8 ADC input clocks,3: 16 ADC input clocks"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "EMUXS,EMUX transmission start" "0: Do not send data,1: Send EMUXD data at beginning of this sample..,2: Send EMUXD data after S/H of ADC,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "EMUXD,EMUXD"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "AS1R7,Auto sequencer 1 sample 7 result register"
|
|
tree.end
|
|
tree "GPIOA (General-Purpose Input-Output Port A)"
|
|
base ad:0x40070000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "OUT,GPIO Port Output"
|
|
bitfld.long 0x00 7. "P7,Port output 7" "0: Set output low if GPIOn->OUTEN.P7 = 1,1: Set output high if GPIOn->OUTEN.P7 = 1"
|
|
bitfld.long 0x00 6. "P6,Port output 6" "0: Set output low if GPIOn->OUTEN.P6 = 1,1: Set output high if GPIOn->OUTEN.P6 = 1"
|
|
bitfld.long 0x00 5. "P5,Port output 5" "0: Set output low if GPIOn->OUTEN.P5 = 1,1: Set output high if GPIOn->OUTEN.P5 = 1"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port output 4" "0: Set output low if GPIOn->OUTEN.P4 = 1,1: Set output high if GPIOn->OUTEN.P4 = 1"
|
|
bitfld.long 0x00 3. "P3,Port output 3" "0: Set output low if GPIOn->OUTEN.P3 = 1,1: Set output high if GPIOn->OUTEN.P3 = 1"
|
|
bitfld.long 0x00 2. "P2,Port output 2" "0: Set output low if GPIOn->OUTEN.P2 = 1,1: Set output high if GPIOn->OUTEN.P2 = 1"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port output 1" "0: Set output low if GPIOn->OUTEN.P1 = 1,1: Set output high if GPIOn->OUTEN.P1 = 1"
|
|
bitfld.long 0x00 0. "P0,Port output 0" "0: Set output low if GPIOn->OUTEN.P0 = 1,1: Set output high if GPIOn->OUTEN.P0 = 1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OUTEN,GPIO Port Output Enable"
|
|
bitfld.long 0x00 7. "P7,Port output enable 7" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P7"
|
|
bitfld.long 0x00 6. "P6,Port output enable 6" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P6"
|
|
bitfld.long 0x00 5. "P5,Port output enable 5" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P5"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port output enable 4" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P4"
|
|
bitfld.long 0x00 3. "P3,Port output enable 3" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P3"
|
|
bitfld.long 0x00 2. "P2,Port output enable 2" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P2"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port output enable 1" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P1"
|
|
bitfld.long 0x00 0. "P0,Port output enable 0" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P0"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DS,GPIO Port Output Drive Strength Select"
|
|
bitfld.long 0x00 7. "P7,Port output drive strength select 7" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 6. "P6,Port output drive strength select 6" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 5. "P5,Port output drive strength select 5" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port output drive strength select 4" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 3. "P3,Port output drive strength select 3" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 2. "P2,Port output drive strength select 2" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port output drive strength select 1" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 0. "P0,Port output drive strength select 0" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PU,GPIO Port Weak Pull Up"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PD,GPIO Port Weak Pull Down"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 5. "P5,Port<n>0 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "IN,GPIO Port Input"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 input state" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 input state" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 input state" "0: Logic low,1: Logic high"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PSEL,GPIO Peripheral Select"
|
|
bitfld.long 0x00 14.--15. "P7,Port<n>7 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 12.--13. "P6,Port<n>6 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 10.--11. "P5,Port<n>5 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "P4,Port<n>4 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 6.--7. "P3,Port<n>3 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 4.--5. "P2,Port<n>2 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "P1,Port<n>1 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 0.--1. "P0,Port<n>0 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "INTP,GPIO Port Interrupt Polarity"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "INTE,GPIO Port Interrupt Enable"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "INTF,GPIO Port Interrupt Flag"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "INTM,GPIO Port Interrupt Mask"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
tree.end
|
|
tree "GPIOB (General-Purpose Input-Output Port B)"
|
|
base ad:0x40070040
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "OUT,GPIO Port Output"
|
|
bitfld.long 0x00 7. "P7,Port output 7" "0: Set output low if GPIOn->OUTEN.P7 = 1,1: Set output high if GPIOn->OUTEN.P7 = 1"
|
|
bitfld.long 0x00 6. "P6,Port output 6" "0: Set output low if GPIOn->OUTEN.P6 = 1,1: Set output high if GPIOn->OUTEN.P6 = 1"
|
|
bitfld.long 0x00 5. "P5,Port output 5" "0: Set output low if GPIOn->OUTEN.P5 = 1,1: Set output high if GPIOn->OUTEN.P5 = 1"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port output 4" "0: Set output low if GPIOn->OUTEN.P4 = 1,1: Set output high if GPIOn->OUTEN.P4 = 1"
|
|
bitfld.long 0x00 3. "P3,Port output 3" "0: Set output low if GPIOn->OUTEN.P3 = 1,1: Set output high if GPIOn->OUTEN.P3 = 1"
|
|
bitfld.long 0x00 2. "P2,Port output 2" "0: Set output low if GPIOn->OUTEN.P2 = 1,1: Set output high if GPIOn->OUTEN.P2 = 1"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port output 1" "0: Set output low if GPIOn->OUTEN.P1 = 1,1: Set output high if GPIOn->OUTEN.P1 = 1"
|
|
bitfld.long 0x00 0. "P0,Port output 0" "0: Set output low if GPIOn->OUTEN.P0 = 1,1: Set output high if GPIOn->OUTEN.P0 = 1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OUTEN,GPIO Port Output Enable"
|
|
bitfld.long 0x00 7. "P7,Port output enable 7" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P7"
|
|
bitfld.long 0x00 6. "P6,Port output enable 6" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P6"
|
|
bitfld.long 0x00 5. "P5,Port output enable 5" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P5"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port output enable 4" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P4"
|
|
bitfld.long 0x00 3. "P3,Port output enable 3" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P3"
|
|
bitfld.long 0x00 2. "P2,Port output enable 2" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P2"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port output enable 1" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P1"
|
|
bitfld.long 0x00 0. "P0,Port output enable 0" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P0"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DS,GPIO Port Output Drive Strength Select"
|
|
bitfld.long 0x00 7. "P7,Port output drive strength select 7" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 6. "P6,Port output drive strength select 6" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 5. "P5,Port output drive strength select 5" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port output drive strength select 4" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 3. "P3,Port output drive strength select 3" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 2. "P2,Port output drive strength select 2" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port output drive strength select 1" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 0. "P0,Port output drive strength select 0" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PU,GPIO Port Weak Pull Up"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PD,GPIO Port Weak Pull Down"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 5. "P5,Port<n>0 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "IN,GPIO Port Input"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 input state" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 input state" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 input state" "0: Logic low,1: Logic high"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PSEL,GPIO Peripheral Select"
|
|
bitfld.long 0x00 14.--15. "P7,Port<n>7 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 12.--13. "P6,Port<n>6 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 10.--11. "P5,Port<n>5 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "P4,Port<n>4 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 6.--7. "P3,Port<n>3 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 4.--5. "P2,Port<n>2 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "P1,Port<n>1 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 0.--1. "P0,Port<n>0 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "INTP,GPIO Port Interrupt Polarity"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "INTE,GPIO Port Interrupt Enable"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "INTF,GPIO Port Interrupt Flag"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "INTM,GPIO Port Interrupt Mask"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
tree.end
|
|
tree "GPIOC (General-Purpose Input-Output Port C)"
|
|
base ad:0x40080000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "OUT,GPIO Port Output"
|
|
bitfld.long 0x00 7. "P7,Port output 7" "0: Set output low if GPIOn->OUTEN.P7 = 1,1: Set output high if GPIOn->OUTEN.P7 = 1"
|
|
bitfld.long 0x00 6. "P6,Port output 6" "0: Set output low if GPIOn->OUTEN.P6 = 1,1: Set output high if GPIOn->OUTEN.P6 = 1"
|
|
bitfld.long 0x00 5. "P5,Port output 5" "0: Set output low if GPIOn->OUTEN.P5 = 1,1: Set output high if GPIOn->OUTEN.P5 = 1"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port output 4" "0: Set output low if GPIOn->OUTEN.P4 = 1,1: Set output high if GPIOn->OUTEN.P4 = 1"
|
|
bitfld.long 0x00 3. "P3,Port output 3" "0: Set output low if GPIOn->OUTEN.P3 = 1,1: Set output high if GPIOn->OUTEN.P3 = 1"
|
|
bitfld.long 0x00 2. "P2,Port output 2" "0: Set output low if GPIOn->OUTEN.P2 = 1,1: Set output high if GPIOn->OUTEN.P2 = 1"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port output 1" "0: Set output low if GPIOn->OUTEN.P1 = 1,1: Set output high if GPIOn->OUTEN.P1 = 1"
|
|
bitfld.long 0x00 0. "P0,Port output 0" "0: Set output low if GPIOn->OUTEN.P0 = 1,1: Set output high if GPIOn->OUTEN.P0 = 1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OUTEN,GPIO Port Output Enable"
|
|
bitfld.long 0x00 7. "P7,Port output enable 7" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P7"
|
|
bitfld.long 0x00 6. "P6,Port output enable 6" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P6"
|
|
bitfld.long 0x00 5. "P5,Port output enable 5" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P5"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port output enable 4" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P4"
|
|
bitfld.long 0x00 3. "P3,Port output enable 3" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P3"
|
|
bitfld.long 0x00 2. "P2,Port output enable 2" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P2"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port output enable 1" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P1"
|
|
bitfld.long 0x00 0. "P0,Port output enable 0" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P0"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "IN,GPIO Port Input"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 input state" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 input state" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 input state" "0: Logic low,1: Logic high"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "INE,GPIO Port Input Enable"
|
|
bitfld.long 0x00 7. "P7,Port input enable 7" "0: Input disabled,1: Input enabled for I/O operation"
|
|
bitfld.long 0x00 6. "P6,Port input enable 6" "0: Input disabled,1: Input enabled for I/O operation"
|
|
bitfld.long 0x00 5. "P5,Port input enable 5" "0: Input disabled,1: Input enabled for I/O operation"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port input enable 4" "0: Input disabled,1: Input enabled for I/O operation"
|
|
bitfld.long 0x00 3. "P3,Port input enable 3" "0: Input disabled,1: Input enabled for I/O operation"
|
|
bitfld.long 0x00 2. "P2,Port input enable 2" "0: Input disabled,1: Input enabled for I/O operation"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port input enable 1" "0: Input disabled,1: Input enabled for I/O operation"
|
|
bitfld.long 0x00 0. "P0,Port input enable 0" "0: Input disabled,1: Input enabled for I/O operation"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "INTP,GPIO Port Interrupt Polarity"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "INTE,GPIO Port Interrupt Enable"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "INTF,GPIO Port Interrupt Flag"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "INTM,GPIO Port Interrupt Mask"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
tree.end
|
|
tree "GPIOD (General-Purpose Input-Output Port D)"
|
|
base ad:0x40080040
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "OUT,GPIO Port Output"
|
|
bitfld.long 0x00 7. "P7,Port output 7" "0: Set output low if GPIOn->OUTEN.P7 = 1,1: Set output high if GPIOn->OUTEN.P7 = 1"
|
|
bitfld.long 0x00 6. "P6,Port output 6" "0: Set output low if GPIOn->OUTEN.P6 = 1,1: Set output high if GPIOn->OUTEN.P6 = 1"
|
|
bitfld.long 0x00 5. "P5,Port output 5" "0: Set output low if GPIOn->OUTEN.P5 = 1,1: Set output high if GPIOn->OUTEN.P5 = 1"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port output 4" "0: Set output low if GPIOn->OUTEN.P4 = 1,1: Set output high if GPIOn->OUTEN.P4 = 1"
|
|
bitfld.long 0x00 3. "P3,Port output 3" "0: Set output low if GPIOn->OUTEN.P3 = 1,1: Set output high if GPIOn->OUTEN.P3 = 1"
|
|
bitfld.long 0x00 2. "P2,Port output 2" "0: Set output low if GPIOn->OUTEN.P2 = 1,1: Set output high if GPIOn->OUTEN.P2 = 1"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port output 1" "0: Set output low if GPIOn->OUTEN.P1 = 1,1: Set output high if GPIOn->OUTEN.P1 = 1"
|
|
bitfld.long 0x00 0. "P0,Port output 0" "0: Set output low if GPIOn->OUTEN.P0 = 1,1: Set output high if GPIOn->OUTEN.P0 = 1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OUTEN,GPIO Port Output Enable"
|
|
bitfld.long 0x00 7. "P7,Port output enable 7" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P7"
|
|
bitfld.long 0x00 6. "P6,Port output enable 6" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P6"
|
|
bitfld.long 0x00 5. "P5,Port output enable 5" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P5"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port output enable 4" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P4"
|
|
bitfld.long 0x00 3. "P3,Port output enable 3" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P3"
|
|
bitfld.long 0x00 2. "P2,Port output enable 2" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P2"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port output enable 1" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P1"
|
|
bitfld.long 0x00 0. "P0,Port output enable 0" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P0"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DS,GPIO Port Output Drive Strength Select"
|
|
bitfld.long 0x00 7. "P7,Port output drive strength select 7" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 6. "P6,Port output drive strength select 6" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 5. "P5,Port output drive strength select 5" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port output drive strength select 4" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 3. "P3,Port output drive strength select 3" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 2. "P2,Port output drive strength select 2" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port output drive strength select 1" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 0. "P0,Port output drive strength select 0" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PU,GPIO Port Weak Pull Up"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PD,GPIO Port Weak Pull Down"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 5. "P5,Port<n>0 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "IN,GPIO Port Input"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 input state" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 input state" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 input state" "0: Logic low,1: Logic high"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PSEL,GPIO Peripheral Select"
|
|
bitfld.long 0x00 14.--15. "P7,Port<n>7 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 12.--13. "P6,Port<n>6 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 10.--11. "P5,Port<n>5 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "P4,Port<n>4 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 6.--7. "P3,Port<n>3 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 4.--5. "P2,Port<n>2 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "P1,Port<n>1 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 0.--1. "P0,Port<n>0 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "INTP,GPIO Port Interrupt Polarity"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "INTE,GPIO Port Interrupt Enable"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "INTF,GPIO Port Interrupt Flag"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "INTM,GPIO Port Interrupt Mask"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
tree.end
|
|
tree "GPIOE (General-Purpose Input-Output Port E)"
|
|
base ad:0x40090000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "OUT,GPIO Port Output"
|
|
bitfld.long 0x00 7. "P7,Port output 7" "0: Set output low if GPIOn->OUTEN.P7 = 1,1: Set output high if GPIOn->OUTEN.P7 = 1"
|
|
bitfld.long 0x00 6. "P6,Port output 6" "0: Set output low if GPIOn->OUTEN.P6 = 1,1: Set output high if GPIOn->OUTEN.P6 = 1"
|
|
bitfld.long 0x00 5. "P5,Port output 5" "0: Set output low if GPIOn->OUTEN.P5 = 1,1: Set output high if GPIOn->OUTEN.P5 = 1"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port output 4" "0: Set output low if GPIOn->OUTEN.P4 = 1,1: Set output high if GPIOn->OUTEN.P4 = 1"
|
|
bitfld.long 0x00 3. "P3,Port output 3" "0: Set output low if GPIOn->OUTEN.P3 = 1,1: Set output high if GPIOn->OUTEN.P3 = 1"
|
|
bitfld.long 0x00 2. "P2,Port output 2" "0: Set output low if GPIOn->OUTEN.P2 = 1,1: Set output high if GPIOn->OUTEN.P2 = 1"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port output 1" "0: Set output low if GPIOn->OUTEN.P1 = 1,1: Set output high if GPIOn->OUTEN.P1 = 1"
|
|
bitfld.long 0x00 0. "P0,Port output 0" "0: Set output low if GPIOn->OUTEN.P0 = 1,1: Set output high if GPIOn->OUTEN.P0 = 1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OUTEN,GPIO Port Output Enable"
|
|
bitfld.long 0x00 7. "P7,Port output enable 7" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P7"
|
|
bitfld.long 0x00 6. "P6,Port output enable 6" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P6"
|
|
bitfld.long 0x00 5. "P5,Port output enable 5" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P5"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port output enable 4" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P4"
|
|
bitfld.long 0x00 3. "P3,Port output enable 3" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P3"
|
|
bitfld.long 0x00 2. "P2,Port output enable 2" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P2"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port output enable 1" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P1"
|
|
bitfld.long 0x00 0. "P0,Port output enable 0" "0: Output disabled high-impedance state,1: Output state set by GPIOn->OUT.P0"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DS,GPIO Port Output Drive Strength Select"
|
|
bitfld.long 0x00 7. "P7,Port output drive strength select 7" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 6. "P6,Port output drive strength select 6" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 5. "P5,Port output drive strength select 5" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port output drive strength select 4" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 3. "P3,Port output drive strength select 3" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 2. "P2,Port output drive strength select 2" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port output drive strength select 1" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
bitfld.long 0x00 0. "P0,Port output drive strength select 0" "0: Low output drive strength selected,1: High output drive strength selected"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PU,GPIO Port Weak Pull Up"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 weak pull-up select" "0: Weak pull-up disabled,1: Weak pull-up to VCCIO enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PD,GPIO Port Weak Pull Down"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 5. "P5,Port<n>0 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 weak pull-down select" "0: Weak pull-down disabled,1: Weak pull-down to VSS enabled"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "IN,GPIO Port Input"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 input state" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 input state" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 input state" "0: Logic low,1: Logic high"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 input state" "0: Logic low,1: Logic high"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "PSEL,GPIO Peripheral Select"
|
|
bitfld.long 0x00 14.--15. "P7,Port<n>7 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 12.--13. "P6,Port<n>6 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 10.--11. "P5,Port<n>5 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "P4,Port<n>4 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 6.--7. "P3,Port<n>3 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 4.--5. "P2,Port<n>2 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "P1,Port<n>1 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
bitfld.long 0x00 0.--1. "P0,Port<n>0 peripheral select" "0: Port in I/O mode,1: Peripheral Configuration 1,2: Peripheral Configuration 2,3: Peripheral Configuration 3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "INTP,GPIO Port Interrupt Polarity"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt Polarity" "0: Falling edge high to low transition,1: Rising edge low to high transition"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "INTE,GPIO Port Interrupt Enable"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "INTF,GPIO Port Interrupt Flag"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt" "0: No interrupt pending,1: Interrupt pending"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "INTM,GPIO Port Interrupt Mask"
|
|
bitfld.long 0x00 7. "P7,Port<n>7 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 6. "P6,Port<n>6 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 5. "P5,Port<n>5 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Port<n>4 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 3. "P3,Port<n>3 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 2. "P2,Port<n>2 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Port<n>1 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
bitfld.long 0x00 0. "P0,Port<n>0 Interrupt Mask" "0: Disable interrupt mask,1: Enable interrupt mask"
|
|
tree.end
|
|
tree "I2C (Inter-Integrated Circuit)"
|
|
base ad:0x401B0000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "I2CCFG,I2C Configuration Register"
|
|
bitfld.long 0x00 4. "ADDRMODE,Address Mode" "0: 7-bit addressing,1: 10-bit addressing"
|
|
bitfld.long 0x00 2. "MAEN,Master Enable" "0: I2C master disable,1: I2C Master enable"
|
|
newline
|
|
bitfld.long 0x00 0. "SLEN,Slave Enable" "0: I2C Slave disable,1: I2C Slave enable"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "I2CINT,I2C Interrupt"
|
|
bitfld.long 0x00 24. "SLXFERDONEINT,Slave transfer done interrupt" "0: Slave transfer not completed,1: Slave transfer complete cleared on read"
|
|
bitfld.long 0x00 18. "SLRXFINT,Slave receive data register SLRXDATA full" "0: SLRXDATA did not receive data since last read..,1: SLRXDATA received data from I2C bus cleared.."
|
|
newline
|
|
bitfld.long 0x00 17. "SLTXEINT,Slave transmit data register SLTXDATA empty" "0: SLTXDATA not transmitted since last read of..,1: SLTXDATA transmitted to I2C bus cleared on read"
|
|
bitfld.long 0x00 16. "SLADDRMINT,Slave address match" "0: no match,1: Slave address match detected cleared on read"
|
|
newline
|
|
bitfld.long 0x00 11. "MADACKINT,Master data acknowledge" "0: Master data ACK'd,1: Master data NACK'd cleared on read"
|
|
bitfld.long 0x00 10. "MAARBLINT,Master lost arbitration" "0: no error,1: Master lost arbitration clear on read"
|
|
newline
|
|
bitfld.long 0x00 9. "MAADDRACKINT,Master address acknowledged" "0: Master address ACK'd,1: Master address NACK'd cleared on read"
|
|
bitfld.long 0x00 8. "MAXFERDONEINT,Master transfer complete" "0: not done,1: Master transfer complete cleared on read"
|
|
newline
|
|
bitfld.long 0x00 2. "MARXF,Master receive data register MARXDATA full" "0: MARXDATA did not receive data since last read..,1: MARXDATA received data from I2C bus cleared.."
|
|
bitfld.long 0x00 1. "MACTLE,MACCTL access register accessed" "0: I2CMACTL not accessed by I2C engine since..,1: I2CMACTL processed by I2C engine clears on read"
|
|
newline
|
|
bitfld.long 0x00 0. "MATXE,Master transmit data register MATXDATA empty" "0: MATXDATA not transmitted since last read of..,1: MATXDATA transmitted to I2C bus clears on read"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CINTEN,I2C Interrupt Enable"
|
|
bitfld.long 0x00 24. "SLXFERDONEINTEN,SLXFERDONEINTEN interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
bitfld.long 0x00 18. "SLRXF,SLRXF interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 17. "SLTXE,SLTXE interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
bitfld.long 0x00 16. "SLADDRM,SLADDRM interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 8. "MAXFERDONE,MAXFERDONE interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
bitfld.long 0x00 2. "MARXF,MARXF interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "MACTLE,MACTLE interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
bitfld.long 0x00 0. "MATXE,MATXE interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "I2CMACTL,I2C master access control"
|
|
bitfld.long 0x00 13. "I2CMACTLF,I2CMACTL full" "0: I2CMACTL processed write allowed,1: I2CMACTL full write not allowed cleared on read"
|
|
bitfld.long 0x00 11. "XFERTYPE,Master transfer type" "0: I2C Master,1: I2C Master"
|
|
newline
|
|
bitfld.long 0x00 10. "RSTART,Repeated start" "0: STOP at end of transfer,1: No STOP at end of transfer repeated START"
|
|
bitfld.long 0x00 7.--9. "I2CADDRU,Upper I2C address bits 9:7" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--6. 1. "I2CADDRL,Lower I2C address bits 6:0"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "I2CMARXDATA,I2C master receive data"
|
|
rbitfld.long 0x00 8. "I2CMARXDATAF,I2CMARXDATA full" "0: I2CMARXDATA register empty,1: I2CMARXDATA register full cleared on read"
|
|
hexmask.long.byte 0x00 0.--7. 1. "MARXDATA,Master data byte received"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "I2CMATXDATA,I2C master transmit data"
|
|
bitfld.long 0x00 9. "LBYTE,Last byte of transfer" "0: not last byte of transfer,1: last byte of READ or WRITE indicator initiate.."
|
|
rbitfld.long 0x00 8. "I2CMATXDATAF,I2CMATXDATA full" "0: I2CMATXDATA register empty,1: I2CMATXDATA register full cleared on read"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "MATXDATA,Master data byte to transmit"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "I2CBAUD,I2C baud rate"
|
|
hexmask.long.word 0x00 16.--26. 1. "SCLH,Number of HCLK cycles for I2CCCL high time"
|
|
hexmask.long.word 0x00 0.--10. 1. "SCLL,Number of HCLK cycles for I2CCL low time"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "I2CSLRXDATA,I2C slave receive data"
|
|
rbitfld.long 0x00 8. "I2CSLRXDATAF,I2CSLRXDATA full" "0: I2CSLRXDATA register empty,1: I2CSLRXDATA register full data not transmitted"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SLRXDATA,Slave data byte received"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "I2CSLTXDATA,I2C slave receive data"
|
|
rbitfld.long 0x00 9. "I2CSLTXDATAF,I2CSLTXDATA full" "0: I2CSLTXDATA register empty,1: I2CSLTXDATA register full data not transmitted"
|
|
bitfld.long 0x00 8. "NACK,Slave ACK or NACK" "0: Issue ACK on I2C,1: Issue NACK on I2C"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "SLTXDATA,Slave data byte to transmit"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "I2CSLADDR,I2C slave address"
|
|
bitfld.long 0x00 7.--9. "SLADDRH,Higher slave address bits9:7" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 0.--6. 1. "SLADDRL,Lower slave address bits 6:0"
|
|
tree.end
|
|
tree "MEMCTL (FLASH Memory Controller)"
|
|
base ad:0x40020000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "FLASHLOCK,FLASH Lock Register"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "FLASHSTATUS,FLASH Status Register"
|
|
bitfld.long 0x00 1. "PERASE,Page Erase Active" "0: Page erase finished or no page erase in..,1: Page erase in progress"
|
|
bitfld.long 0x00 0. "WRITE,Buffered Write Active" "0: Buffered write inactive,1: Buffered write active"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "FLASHPAGE,FLASH page select register"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FLASHPERASE,FLASH page erase register"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "SWDACCESS,SWD access status"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "FLASHWSTATE,FLASH Wait State Register"
|
|
bitfld.long 0x00 0.--1. "WSTATE,FLASH access wait state" "0: 0 FLASH wait states,1: 1 FLASH wait states,2: 2 FLASH wait states,3: 3 FLASH wait states"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "FLASHBWRITE,FLASH Buffered Write Data"
|
|
tree.end
|
|
tree "RTC (Real-time Counter)"
|
|
base ad:0x40040000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "RTCCTL,Real-Time Clock Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "KEY,RTCCTL register key"
|
|
rbitfld.long 0x00 11. "WRBUSY,RTC register write busy" "0: RTC register write not busy,1: RTC register write busy"
|
|
bitfld.long 0x00 6.--9. "RTCCLKDIV,Real-Time Clock Input Clock Divider" "0: Real-Time clock divider,1: Real-Time clock divider,2: Real-Time clock divider,3: Real-Time clock divider,4: Real-Time clock divider,5: Real-Time clock divider,6: Real-Time clock divider,7: Real-Time clock divider,8: Real-Time clock divider,9: Real-Time clock divider,10: Real-Time clock divider,11: Real-Time clock divider,12: Real-Time clock divider,13: Real-Time clock divider,14: Real-Time clock divider,15: Real-Time clock divider"
|
|
newline
|
|
rbitfld.long 0x00 4. "RTCINT,Real-Time Clock Interrupt Flag" "0: Real-Time Clock interrupt flag clear,1: Real-Time Clock interrupt flag set"
|
|
bitfld.long 0x00 3. "RTCINTEN,Real-Time Clock Interrupt Enable" "0: Real-Time Clock interrupt disable,1: Real-Time Clock interrupt enable"
|
|
bitfld.long 0x00 0.--2. "RTCCTRRST,Real-Time Clock Counter Reset" "?,?,?,?,?,5: RTCCTL Reset Key,?..."
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "RTCCDV,Real-Time Clock Count-down Value Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "KEY,RTC register key"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "RSTVALUE,24b RTC count-down value"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "RTCCTR,Real-Time Clock Counter Register"
|
|
tree.end
|
|
tree "SOCB (SOC Bus Bridge)"
|
|
base ad:0x40200000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SOCBCTL,SOC Bus Bridge Control"
|
|
bitfld.long 0x00 5. "MTRARM,MTRANS re-arm" "?,1: re-arms the SOCBCTL.MTRANS operation by.."
|
|
bitfld.long 0x00 1. "SIE,SOC bus bridge interrupt enable" "0: disable interrupts,1: enable interrupts"
|
|
newline
|
|
bitfld.long 0x00 0. "SSEN,SOC bus bridge enable" "0: disable this module,1: enable this module"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SOCBCFG,SOC Bus Bridge Configuration"
|
|
bitfld.long 0x00 2. "MRST,Module reset" "0: do not hold the module in reset,1: force soft reset of module"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SOCBSTAT,SOC Bus Bridge Status"
|
|
bitfld.long 0x00 12.--14. "CURSTATE,Raw status of the SOC bus bridge master state machine's 'current_state' register" "0: IDLE,1: CSSETUP,2: TRANSFER,3: CSHOLD,4: CSWAIT,5: CKWAIT,6: MTRANS,7: CSBEGIN"
|
|
bitfld.long 0x00 10. "RXFULL,Receive holding register in use" "0: RX incoming holding register contains no..,1: RX incoming holding register contains a valid.."
|
|
newline
|
|
bitfld.long 0x00 9. "TXFULL,Transmit holding register in use" "0: TX transmit holding register ready to accept..,1: TX transmit holding register in use and not.."
|
|
bitfld.long 0x00 8. "WRUFL,Write buffer underflow" "0: No write buffer underflow detected since this..,1: Write buffer underflow detected write one to.."
|
|
newline
|
|
bitfld.long 0x00 5. "CYC_DONE,Cycle done (current transfer is complete)" "0: No cycle done detected since this bit was..,1: Cycle done detected write one to clear"
|
|
bitfld.long 0x00 2. "RDOFL,Read buffer overflow" "0: no read overflow since bit cleared,1: read overflow detected write 1 to clear"
|
|
newline
|
|
bitfld.long 0x00 0. "SOCB_INT,SOC bus bridge interrupt" "0: no interrupt,1: interrupt"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SOCBD,SOC Bus Bridge Data"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATA,SOC bus bridge data"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SOCBINT_EN,SOC Bus Bridge Interrupt Enable"
|
|
bitfld.long 0x00 8. "WRUFL_EN,Write buffer underflow SOCBSTAT.WRUFL interrupt enable" "0: disable SOCBSTAT.WRUFL interrupt,1: enable SOCBSTAT.WRUFL interrupt"
|
|
bitfld.long 0x00 2. "RDOFL_EN,Read buffer overflow RDOFL interrupt enable" "0: disable SOCBSTAT.RDOFL interrupt,1: enable SOCBSTAT.RDOFL interrupt"
|
|
tree.end
|
|
tree "SPI"
|
|
base ad:0x40210000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SPICTL,SPI Control"
|
|
bitfld.long 0x00 8. "RTRANS,Auto-retrans on clock error" "0: Retransmit on clock error,1: No retransmit on clock error"
|
|
bitfld.long 0x00 7. "MMST_N,Multi-master mode" "0: Multi-master mode,1: Single master mode"
|
|
newline
|
|
bitfld.long 0x00 6. "MTRANS,Multiple transfer mode" "0: Generate single transfers,1: Generate multiple transfers"
|
|
bitfld.long 0x00 5. "MTRARM,MTRANS re-arm" "?,1: re-arms the SOCBCTL.MTRANS operation by.."
|
|
newline
|
|
bitfld.long 0x00 3. "SE,Slave enable" "0: SPI is configured as master,1: SPI is configured as slave"
|
|
bitfld.long 0x00 2. "LPBK,Internal loopback mode" "0: normal operation,1: tie the serial out source to serial in.."
|
|
newline
|
|
bitfld.long 0x00 1. "SIE,SPI interrupt enable" "0: disable interrupts,1: enable interrupts"
|
|
bitfld.long 0x00 0. "SSEN,SPI enable" "0: disable this module,1: enable this module"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SPICFG,SPI Configuration"
|
|
bitfld.long 0x00 11. "MTURBO,Master turbo operation mode" "0: Legacy operation down to max 8:1 HCLK,1: Enable master turbo mode using HCLK-based bit.."
|
|
bitfld.long 0x00 10. "TDBUF,Transmit double-buffer mode" "0: Disable double-buffer legacy operation with..,1: Enable double-buffer 'ping-pong' on shift.."
|
|
newline
|
|
bitfld.long 0x00 9. "TXDATPH,Early transmit data phase" "0: Normal transmit data phase transitions on..,1: MISO (slave) or MOSI (Master) transitions.."
|
|
bitfld.long 0x00 7. "RCVCPH,Slave mode clock phase" "0: First clock transition of a new transfer used..,1: Second clock transition of a new transfer.."
|
|
newline
|
|
bitfld.long 0x00 6. "RCVCP,Slave mode clock polarity" "0: SPICLK is low in it's inactive state,1: SPICLK is high in it's inactive state"
|
|
bitfld.long 0x00 5. "CPH,Master mode clock phase" "0: First clock transition of a new transfer is..,1: Second clock transition of a new transfer is.."
|
|
newline
|
|
bitfld.long 0x00 4. "CP,Master mode clock polarity" "0: SPICLK is low in it's inactive state,1: SPICLK is high in it's inactive state"
|
|
bitfld.long 0x00 3. "LB1ST,Least bit first" "0: MSB is the first serial bit of transfer,1: LSB is the first serial bit of transfer"
|
|
newline
|
|
bitfld.long 0x00 2. "MRST,Module reset" "0: Do not hold module in reset,1: Force soft reset of module"
|
|
bitfld.long 0x00 0.--1. "WL,Word length" "0: Word Length = 8-bits,1: Word Length = 16-bits,2: Word Length = 24-bits,3: Word Length = 32-bits"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SPICLKDIV,SPI Clock Divider"
|
|
hexmask.long.word 0x00 0.--15. 1. "CLKDIV,Clock divisor for SCLK (HCLK / (CLKDIV + 1)*2)"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SPISTAT,SPI Status"
|
|
bitfld.long 0x00 12.--14. "CURSTATE,Raw status of the SOC bus bridge master state machine's 'current_state' register" "0: IDLE,1: CSSETUP,2: TRANSFER,3: CSHOLD,4: CSWAIT,5: CKWAIT,6: MTRANS,7: CSBEGIN"
|
|
bitfld.long 0x00 10. "RXFULL,Receive holding register in use" "0: RX incoming holding register contains no..,1: RX incoming holding register contains a valid.."
|
|
newline
|
|
bitfld.long 0x00 9. "TXFULL,Transmit holding register in use" "0: TX transmit holding register ready to accept..,1: TX transmit holding register in use and not.."
|
|
bitfld.long 0x00 8. "WRUFL,Write buffer underflow" "0: No write buffer underflow detected since this..,1: Write buffer underflow detected write one to.."
|
|
newline
|
|
bitfld.long 0x00 6. "TE,Chip select trailing edge detect" "0: No chip select de-assertion detected since..,1: Chip select de-assertion was detected write 1.."
|
|
bitfld.long 0x00 5. "CYC_DONE,Cycle done (current transfer is complete)" "0: No cycle done detected since this bit was..,1: Cycle done detected write one to clear"
|
|
newline
|
|
bitfld.long 0x00 4. "UCLK,Underclock condition" "0: No underclock detected since this bit was..,1: Underclock condition detected write 1 to clear"
|
|
bitfld.long 0x00 3. "LE,Chip select leading edge detect" "0: No chip select assertion detected since this..,1: Chip select assertion detected write 1 to clear"
|
|
newline
|
|
bitfld.long 0x00 2. "RDOFL,Read buffer overflow" "0: no read overflow since bit cleared,1: read overflow detected write 1 to clear"
|
|
bitfld.long 0x00 0. "SPI_INT,SPI interrupt" "0: no interrupt,1: interrupt"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "SPICSSTR,SPI Chip Select Steering Register"
|
|
bitfld.long 0x00 20.--23. "CKWAIT,SPI clock wait" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. "CSWAIT,Chip select wait" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "CSHOLD,Chip select hold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "CSSETUP,Chip select setup" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 2. "CSL,Chip select active high level select" "0: Active-low outgoing (master) or incoming..,1: Active-high outgoing (master) or incoming.."
|
|
bitfld.long 0x00 0.--1. "CSNUM,Chip select number" "0: SPICS0,1: SPICS1,2: SPICS2,?..."
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SPID,SPI Data"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATA,SOC bus bridge data"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SPIINT_EN,SPI Interrupt Enable"
|
|
bitfld.long 0x00 8. "WRUFL_EN,Write buffer underflow SOCBSTAT.WRUFL interrupt enable" "0: disable SOCBSTAT.WRUFL interrupt,1: enable SOCBSTAT.WRUFL interrupt"
|
|
bitfld.long 0x00 7. "BP_DONE,Byte packing BP_DONE interrupt enable" "0: disable SOCBSTAT,1: enable SOCBSTAT.BP_DONE interrupt"
|
|
newline
|
|
bitfld.long 0x00 6. "TE_EN,Trailing edge detect TE interrupt enable" "0: disable SOCBSTAT.TE interrupt,1: enable SOCBSTAT.TE interrupt"
|
|
bitfld.long 0x00 5. "CYC_DONE_EN,Cycle done CYC_DONE interrupt enable" "0: disable SOCBSTAT.CYC_DONE interrupt,1: enable SOCBSTAT.CYC_DONE interrupt"
|
|
newline
|
|
bitfld.long 0x00 4. "UCLK_EN,Underclock UCLK interrupt enable" "0: disable SOCBSTAT.UCLK interrupt,1: enable SOCBSTAT.UCLK interrupt"
|
|
bitfld.long 0x00 3. "LE_EN,Leading edge detect LE interrupt enable" "0: disable SOCBSTAT.LE interrupt,1: enable SOCBSTAT.LE interrupt"
|
|
newline
|
|
bitfld.long 0x00 2. "RDOFL_EN,Read buffer overflow RDOFL interrupt enable" "0: disable SOCBSTAT.RDOFL interrupt,1: enable SOCBSTAT.RDOFL interrupt"
|
|
tree.end
|
|
tree "SYSCLK (System and Clock Control)"
|
|
base ad:0x40000000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SCCTL,System Clock Control Register"
|
|
bitfld.long 0x00 7. "FCLK,FCLK input clock select" "0: FCLK = FRCLK,1: FCLK = PLLOUT clock"
|
|
bitfld.long 0x00 5.--6. "HCLKDIV,HCLK divider" "0: HCLK = FCLK /1,1: HCLK = FCLK /2,2: HCLK = FCLK /4,3: HCLK = FCLK /8"
|
|
bitfld.long 0x00 2.--4. "ACLKDIV,ACLK divider" "0: ACLK = FCLK /1,1: ACLK = FCLK /2,2: ACLK = FCLK /4,3: ACLK = FCLK /8,4: ACLK = FCLK /16,5: ACLK = FCLK /32,6: ACLK = FCLK /64,7: ACLK = FCLK /128"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "CLKIN,FRCLK input clock select" "0: Internal Ring Oscillator,1: CLKREF input,2: External Clock Input,3: Crystal Driver XIN/XOUT Input"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PLLCTL,PLL Control Register"
|
|
bitfld.long 0x00 16.--19. "PLLOUTDIV,PLL Output Divider (divider = /[value+1] 0 reserved)" "?,1: PLL output divider,?..."
|
|
hexmask.long.word 0x00 7.--15. 1. "PLLFBDIV,PLL Feedback Divider (divider = /[value + 2])"
|
|
bitfld.long 0x00 2.--6. "PLLINDIV,PLL Input Divider (divider = /[value+2])" "0: PLL input divider,?..."
|
|
newline
|
|
bitfld.long 0x00 0. "PLLEN,PLL enable" "0: Disable PLL,1: Enable PLL"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ROSCCTL,Ring Oscillator Control Register"
|
|
bitfld.long 0x00 1.--2. "ROSCP,Ring Oscillator Frequency Setting" "0: Set Ring Oscillator to 28.7 MHz,1: Set Ring Oscillator to 15.3 MHz,2: Set Ring Oscillator to 10.7 MHz,3: Set Ring Oscillator to 8.3 MHz"
|
|
bitfld.long 0x00 0. "ROSCEN,Ring Oscillator Enable" "0: Disable Ring Oscillator,1: Enable Ring Oscillator"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "XTALCTL,Crystal Driver Control Register"
|
|
bitfld.long 0x00 0. "XTALEN,Enable XTAL driver" "0: Disable XTAL Driver,1: Enable XTAL Driver"
|
|
tree.end
|
|
tree "TIMERA (Timer A Peripheral)"
|
|
base ad:0x400D0000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "TxCTL,Timer Control Register"
|
|
bitfld.long 0x00 13. "DTGCLK,DTG clock select" "0: DTG uses clock selected by TxTCL.CLK,1: DTG uses clock selected by TxCTL.CLKDIV"
|
|
bitfld.long 0x00 10.--11. "MODE,timer mode" "0: timer disabled,1: up mode,2: up/down mode,?..."
|
|
newline
|
|
bitfld.long 0x00 9. "CLK,timer clock input source" "0: HCLK,1: ACLK"
|
|
bitfld.long 0x00 6.--8. "CLKDIV,timer clock divider" "0: divide by 1,1: divide by 2,2: divide by 4,3: divide by 8,4: divide by 16,5: divide by 32,6: divide by 64,7: divide by 128"
|
|
newline
|
|
bitfld.long 0x00 5. "INTEN,Timer interrupt enable" "0: timer interrupt enabled,1: timer interrupt disabled"
|
|
bitfld.long 0x00 4. "INT,Timer interrupt" "0: interrupt flag write 1 to clear,1: No interrupt"
|
|
newline
|
|
bitfld.long 0x00 3. "SS,Timer single shot" "0: Continuous mode,1: Single shot mode"
|
|
bitfld.long 0x00 2. "CLR,Timer clear" "0: Clear Timer hold in reset set SYNC_OUT,1: Do not clear timer clear SYNC_OUT"
|
|
newline
|
|
bitfld.long 0x00 0. "PRDL,Timer Period Latch" "0: Latch timer values counting up at TxPRD-1,1: Latch timer values when counting down to 1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TxPRD,timer period"
|
|
hexmask.long.word 0x00 0.--15. 1. "PERIOD,timer period value"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "TxCTR,timer counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CTR,timer counter value"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TxCC0CTL,timer capture and compare control unit 0"
|
|
bitfld.long 0x00 4. "CCMODE,capture and compare mode" "0: compare_mode,1: capture_mode"
|
|
bitfld.long 0x00 3. "CCINTEN,capture and compare interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "CCINT,capture and compare interrupt" "0: no interrupt detected,1: interrupt write 1b to clear"
|
|
bitfld.long 0x00 0.--1. "CCEDG,capture mode edge detect" "0: high to low transition only,1: low to high transitions only,2: both high to low and low to high transitions,?..."
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "TxCC0CTR,capture and compare counter unit 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "CCCTR,capture and compare counter value"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "TxCC1CTL,timer capture and compare control unit 0"
|
|
bitfld.long 0x00 4. "CCMODE,capture and compare mode" "0: compare_mode,1: capture_mode"
|
|
bitfld.long 0x00 3. "CCINTEN,capture and compare interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "CCINT,capture and compare interrupt" "0: no interrupt detected,1: interrupt write 1b to clear"
|
|
bitfld.long 0x00 0.--1. "CCEDG,capture mode edge detect" "0: high to low transition only,1: low to high transitions only,2: both high to low and low to high transitions,?..."
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "TxCC1CTR,capture and compare counter unit 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CCCTR,capture and compare counter value"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "TxCC2CTL,timer capture and compare control unit 2"
|
|
bitfld.long 0x00 4. "CCMODE,capture and compare mode" "0: compare_mode,1: capture_mode"
|
|
bitfld.long 0x00 3. "CCINTEN,capture and compare interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "CCINT,capture and compare interrupt" "0: no interrupt detected,1: interrupt write 1b to clear"
|
|
bitfld.long 0x00 0.--1. "CCEDG,capture mode edge detect" "0: high to low transition only,1: low to high transitions only,2: both high to low and low to high transitions,?..."
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "TxCC2CTR,capture and compare counter unit 2"
|
|
hexmask.long.word 0x00 0.--15. 1. "CCCTR,capture and compare counter value"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "TxCC3CTL,timer capture and compare control unit 3"
|
|
bitfld.long 0x00 4. "CCMODE,capture and compare mode" "0: compare_mode,1: capture_mode"
|
|
bitfld.long 0x00 3. "CCINTEN,capture and compare interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "CCINT,capture and compare interrupt" "0: no interrupt detected,1: interrupt write 1b to clear"
|
|
bitfld.long 0x00 0.--1. "CCEDG,capture mode edge detect" "0: high to low transition only,1: low to high transitions only,2: both high to low and low to high transitions,?..."
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "TxCC3CTR,capture and compare counter unit 3"
|
|
hexmask.long.word 0x00 0.--15. 1. "CCCTR,capture and compare counter value"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TxCC4CTL,timer capture and compare control unit 4"
|
|
bitfld.long 0x00 4. "CCMODE,capture and compare mode" "0: compare_mode,1: capture_mode"
|
|
bitfld.long 0x00 3. "CCINTEN,capture and compare interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "CCINT,capture and compare interrupt" "0: no interrupt detected,1: interrupt write 1b to clear"
|
|
bitfld.long 0x00 0.--1. "CCEDG,capture mode edge detect" "0: high to low transition only,1: low to high transitions only,2: both high to low and low to high transitions,?..."
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "TxCC4CTR,capture and compare counter unit 4"
|
|
hexmask.long.word 0x00 0.--15. 1. "CCCTR,capture and compare counter value"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "TxCC5CTL,timer capture and compare control unit 5"
|
|
bitfld.long 0x00 4. "CCMODE,capture and compare mode" "0: compare_mode,1: capture_mode"
|
|
bitfld.long 0x00 3. "CCINTEN,capture and compare interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "CCINT,capture and compare interrupt" "0: no interrupt detected,1: interrupt write 1b to clear"
|
|
bitfld.long 0x00 0.--1. "CCEDG,capture mode edge detect" "0: high to low transition only,1: low to high transitions only,2: both high to low and low to high transitions,?..."
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "TxCC5CTR,capture and compare counter unit 5"
|
|
hexmask.long.word 0x00 0.--15. 1. "CCCTR,capture and compare counter value"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "TxCC6CTL,timer capture and compare control unit 6"
|
|
bitfld.long 0x00 4. "CCMODE,capture and compare mode" "0: compare_mode,1: capture_mode"
|
|
bitfld.long 0x00 3. "CCINTEN,capture and compare interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "CCINT,capture and compare interrupt" "0: no interrupt detected,1: interrupt write 1b to clear"
|
|
bitfld.long 0x00 0.--1. "CCEDG,capture mode edge detect" "0: high to low transition only,1: low to high transitions only,2: both high to low and low to high transitions,?..."
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "TxCC6CTR,capture and compare counter unit 6"
|
|
hexmask.long.word 0x00 0.--15. 1. "CCCTR,capture and compare counter value"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "TxCC7CTL,timer capture and compare control unit 7"
|
|
bitfld.long 0x00 4. "CCMODE,capture and compare mode" "0: compare_mode,1: capture_mode"
|
|
bitfld.long 0x00 3. "CCINTEN,capture and compare interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "CCINT,capture and compare interrupt" "0: no interrupt detected,1: interrupt write 1b to clear"
|
|
bitfld.long 0x00 0.--1. "CCEDG,capture mode edge detect" "0: high to low transition only,1: low to high transitions only,2: both high to low and low to high transitions,?..."
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "TxCC7CTR,capture and compare counter unit 7"
|
|
hexmask.long.word 0x00 0.--15. 1. "CCCTR,capture and compare counter value"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DTGA0CTL,Timer A dead-time generator control unit 0"
|
|
bitfld.long 0x00 7. "BYPASS,bypass dead-time generation" "0: do not bypass dead-time generation,1: bypass dead-time generation"
|
|
bitfld.long 0x00 6. "OTP,On-time preservation" "0: do not extend on time,1: extend on time"
|
|
newline
|
|
bitfld.long 0x00 5. "INVHS,Invert high-side output signal" "0: do not invert high-side output signal,1: invert high-side output signal"
|
|
bitfld.long 0x00 4. "INVLS,Invert low-side output signal" "0: do not invert low-side output signal,1: invert low-side output signal"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "DTGA0LED,Timer A dead-time generator leading-edge delay counter unit 0"
|
|
hexmask.long.word 0x00 0.--11. 1. "LED,leading-edge delay counter"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "DTGA0TED,Timer A dead-time generator trailing-edge delay counter unit 0"
|
|
hexmask.long.word 0x00 0.--11. 1. "TED,trailing-edge delay counter"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "DTGA1CTL,Timer A dead-time generator control unit 1"
|
|
bitfld.long 0x00 7. "BYPASS,bypass dead-time generation" "0: do not bypass dead-time generation,1: bypass dead-time generation"
|
|
bitfld.long 0x00 6. "OTP,On-time preservation" "0: do not extend on time,1: extend on time"
|
|
newline
|
|
bitfld.long 0x00 5. "INVHS,Invert high-side output signal" "0: do not invert high-side output signal,1: invert high-side output signal"
|
|
bitfld.long 0x00 4. "INVLS,Invert low-side output signal" "0: do not invert low-side output signal,1: invert low-side output signal"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "DTGA1LED,Timer A dead-time generator leading-edge delay counter unit 1"
|
|
hexmask.long.word 0x00 0.--11. 1. "LED,leading-edge delay counter"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "DTGA1TED,Timer A dead-time generator trailing-edge delay counter unit 1"
|
|
hexmask.long.word 0x00 0.--11. 1. "TED,trailing-edge delay counter"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DTGA2CTL,Timer A dead-time generator control unit 2"
|
|
bitfld.long 0x00 7. "BYPASS,bypass dead-time generation" "0: do not bypass dead-time generation,1: bypass dead-time generation"
|
|
bitfld.long 0x00 6. "OTP,On-time preservation" "0: do not extend on time,1: extend on time"
|
|
newline
|
|
bitfld.long 0x00 5. "INVHS,Invert high-side output signal" "0: do not invert high-side output signal,1: invert high-side output signal"
|
|
bitfld.long 0x00 4. "INVLS,Invert low-side output signal" "0: do not invert low-side output signal,1: invert low-side output signal"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "DTGA2LED,Timer A dead-time generator leading-edge delay counter unit 2"
|
|
hexmask.long.word 0x00 0.--11. 1. "LED,leading-edge delay counter"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "DTGA2TED,Timer A dead-time generator trailing-edge delay counter unit 2"
|
|
hexmask.long.word 0x00 0.--11. 1. "TED,trailing-edge delay counter"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "DTGA3CTL,Timer A dead-time generator control unit 3"
|
|
bitfld.long 0x00 7. "BYPASS,bypass dead-time generation" "0: do not bypass dead-time generation,1: bypass dead-time generation"
|
|
bitfld.long 0x00 6. "OTP,On-time preservation" "0: do not extend on time,1: extend on time"
|
|
newline
|
|
bitfld.long 0x00 5. "INVHS,Invert high-side output signal" "0: do not invert high-side output signal,1: invert high-side output signal"
|
|
bitfld.long 0x00 4. "INVLS,Invert low-side output signal" "0: do not invert low-side output signal,1: invert low-side output signal"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "DTGA3LED,Timer A dead-time generator leading-edge delay counter unit 3"
|
|
hexmask.long.word 0x00 0.--11. 1. "LED,leading-edge delay counter"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "DTGA3TED,Timer A dead-time generator trailing-edge delay counter unit 0"
|
|
hexmask.long.word 0x00 0.--11. 1. "TED,trailing-edge delay counter"
|
|
tree.end
|
|
tree "TIMERB (Timer B Peripheral)"
|
|
base ad:0x400E0000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "TxCTL,Timer Control Register"
|
|
bitfld.long 0x00 13. "DTGCLK,DTG clock select" "0: DTG uses clock selected by TxTCL.CLK,1: DTG uses clock selected by TxCTL.CLKDIV"
|
|
bitfld.long 0x00 10.--11. "MODE,timer mode" "0: timer disabled,1: up mode,2: up/down mode,?..."
|
|
newline
|
|
bitfld.long 0x00 9. "CLK,timer clock input source" "0: HCLK,1: ACLK"
|
|
bitfld.long 0x00 6.--8. "CLKDIV,timer clock divider" "0: divide by 1,1: divide by 2,2: divide by 4,3: divide by 8,4: divide by 16,5: divide by 32,6: divide by 64,7: divide by 128"
|
|
newline
|
|
bitfld.long 0x00 5. "INTEN,Timer interrupt enable" "0: timer interrupt enabled,1: timer interrupt disabled"
|
|
bitfld.long 0x00 4. "INT,Timer interrupt" "0: interrupt flag write 1 to clear,1: No interrupt"
|
|
newline
|
|
bitfld.long 0x00 3. "SS,Timer single shot" "0: Continuous mode,1: Single shot mode"
|
|
bitfld.long 0x00 2. "CLR,Timer clear" "0: Clear Timer hold in reset set SYNC_OUT,1: Do not clear timer clear SYNC_OUT"
|
|
newline
|
|
bitfld.long 0x00 0. "PRDL,Timer Period Latch" "0: Latch timer values counting up at TxPRD-1,1: Latch timer values when counting down to 1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TxPRD,timer period"
|
|
hexmask.long.word 0x00 0.--15. 1. "PERIOD,timer period value"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "TxCTR,timer counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CTR,timer counter value"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TxCC0CTL,timer capture and compare control unit 0"
|
|
bitfld.long 0x00 4. "CCMODE,capture and compare mode" "0: compare_mode,1: capture_mode"
|
|
bitfld.long 0x00 3. "CCINTEN,capture and compare interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "CCINT,capture and compare interrupt" "0: no interrupt detected,1: interrupt write 1b to clear"
|
|
bitfld.long 0x00 0.--1. "CCEDG,capture mode edge detect" "0: high to low transition only,1: low to high transitions only,2: both high to low and low to high transitions,?..."
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "TxCC0CTR,capture and compare counter unit 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "CCCTR,capture and compare counter value"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "TxCC1CTL,timer capture and compare control unit 1"
|
|
bitfld.long 0x00 4. "CCMODE,capture and compare mode" "0: compare_mode,1: capture_mode"
|
|
bitfld.long 0x00 3. "CCINTEN,capture and compare interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "CCINT,capture and compare interrupt" "0: no interrupt detected,1: interrupt write 1b to clear"
|
|
bitfld.long 0x00 0.--1. "CCEDG,capture mode edge detect" "0: high to low transition only,1: low to high transitions only,2: both high to low and low to high transitions,?..."
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "TxCC1CTR,capture and compare counter unit 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CCCTR,capture and compare counter value"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "TxCC2CTL,timer capture and compare control unit 2"
|
|
bitfld.long 0x00 4. "CCMODE,capture and compare mode" "0: compare_mode,1: capture_mode"
|
|
bitfld.long 0x00 3. "CCINTEN,capture and compare interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "CCINT,capture and compare interrupt" "0: no interrupt detected,1: interrupt write 1b to clear"
|
|
bitfld.long 0x00 0.--1. "CCEDG,capture mode edge detect" "0: high to low transition only,1: low to high transitions only,2: both high to low and low to high transitions,?..."
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "TxCC2CTR,capture and compare counter unit 2"
|
|
hexmask.long.word 0x00 0.--15. 1. "CCCTR,capture and compare counter value"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "TxCC3CTL,timer capture and compare control unit 3"
|
|
bitfld.long 0x00 4. "CCMODE,capture and compare mode" "0: compare_mode,1: capture_mode"
|
|
bitfld.long 0x00 3. "CCINTEN,capture and compare interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "CCINT,capture and compare interrupt" "0: no interrupt detected,1: interrupt write 1b to clear"
|
|
bitfld.long 0x00 0.--1. "CCEDG,capture mode edge detect" "0: high to low transition only,1: low to high transitions only,2: both high to low and low to high transitions,?..."
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "TxCC3CTR,capture and compare counter unit 3"
|
|
hexmask.long.word 0x00 0.--15. 1. "CCCTR,capture and compare counter value"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DTGB0CTL,Timer B dead-time generator control unit 0"
|
|
bitfld.long 0x00 7. "BYPASS,bypass dead-time generation" "0: do not bypass dead-time generation,1: bypass dead-time generation"
|
|
bitfld.long 0x00 6. "OTP,On-time preservation" "0: do not extend on time,1: extend on time"
|
|
newline
|
|
bitfld.long 0x00 5. "INVHS,Invert high-side output signal" "0: do not invert high-side output signal,1: invert high-side output signal"
|
|
bitfld.long 0x00 4. "INVLS,Invert low-side output signal" "0: do not invert low-side output signal,1: invert low-side output signal"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "DTGB0LED,Timer B dead-time generator leading-edge delay counter unit 0"
|
|
hexmask.long.word 0x00 0.--11. 1. "LED,leading-edge delay counter"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "DTGB0TED,Timer B dead-time generator trailing-edge delay counter unit 0"
|
|
hexmask.long.word 0x00 0.--11. 1. "TED,trailing-edge delay counter"
|
|
tree.end
|
|
tree "TIMERC (Timer C Peripheral)"
|
|
base ad:0x400F0000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "TxCTL,Timer Control Register"
|
|
bitfld.long 0x00 13. "DTGCLK,DTG clock select" "0: DTG uses clock selected by TxTCL.CLK,1: DTG uses clock selected by TxCTL.CLKDIV"
|
|
bitfld.long 0x00 10.--11. "MODE,timer mode" "0: timer disabled,1: up mode,2: up/down mode,?..."
|
|
newline
|
|
bitfld.long 0x00 9. "CLK,timer clock input source" "0: HCLK,1: ACLK"
|
|
bitfld.long 0x00 6.--8. "CLKDIV,timer clock divider" "0: divide by 1,1: divide by 2,2: divide by 4,3: divide by 8,4: divide by 16,5: divide by 32,6: divide by 64,7: divide by 128"
|
|
newline
|
|
bitfld.long 0x00 5. "INTEN,Timer interrupt enable" "0: timer interrupt enabled,1: timer interrupt disabled"
|
|
bitfld.long 0x00 4. "INT,Timer interrupt" "0: interrupt flag write 1 to clear,1: No interrupt"
|
|
newline
|
|
bitfld.long 0x00 3. "SS,Timer single shot" "0: Continuous mode,1: Single shot mode"
|
|
bitfld.long 0x00 2. "CLR,Timer clear" "0: Clear Timer hold in reset set SYNC_OUT,1: Do not clear timer clear SYNC_OUT"
|
|
newline
|
|
bitfld.long 0x00 0. "PRDL,Timer Period Latch" "0: Latch timer values counting up at TxPRD-1,1: Latch timer values when counting down to 1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TxPRD,timer period"
|
|
hexmask.long.word 0x00 0.--15. 1. "PERIOD,timer period value"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "TxCTR,timer counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CTR,timer counter value"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TxCC0CTL,timer capture and compare control unit 0"
|
|
bitfld.long 0x00 4. "CCMODE,capture and compare mode" "0: compare_mode,1: capture_mode"
|
|
bitfld.long 0x00 3. "CCINTEN,capture and compare interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "CCINT,capture and compare interrupt" "0: no interrupt detected,1: interrupt write 1b to clear"
|
|
bitfld.long 0x00 0.--1. "CCEDG,capture mode edge detect" "0: high to low transition only,1: low to high transitions only,2: both high to low and low to high transitions,?..."
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "TxCC0CTR,capture and compare counter unit 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "CCCTR,capture and compare counter value"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "TxCC1CTL,timer capture and compare control unit 1"
|
|
bitfld.long 0x00 4. "CCMODE,capture and compare mode" "0: compare_mode,1: capture_mode"
|
|
bitfld.long 0x00 3. "CCINTEN,capture and compare interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "CCINT,capture and compare interrupt" "0: no interrupt detected,1: interrupt write 1b to clear"
|
|
bitfld.long 0x00 0.--1. "CCEDG,capture mode edge detect" "0: high to low transition only,1: low to high transitions only,2: both high to low and low to high transitions,?..."
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "TxCC1CTR,capture and compare counter unit 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CCCTR,capture and compare counter value"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DTGC0CTL,Timer C dead-time generator control unit 0"
|
|
bitfld.long 0x00 7. "BYPASS,bypass dead-time generation" "0: do not bypass dead-time generation,1: bypass dead-time generation"
|
|
bitfld.long 0x00 6. "OTP,On-time preservation" "0: do not extend on time,1: extend on time"
|
|
newline
|
|
bitfld.long 0x00 5. "INVHS,Invert high-side output signal" "0: do not invert high-side output signal,1: invert high-side output signal"
|
|
bitfld.long 0x00 4. "INVLS,Invert low-side output signal" "0: do not invert low-side output signal,1: invert low-side output signal"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "DTGC0LED,Timer C dead-time generator leading-edge delay counter unit 0"
|
|
hexmask.long.word 0x00 0.--11. 1. "LED,leading-edge delay counter"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "DTGC0TED,Timer C dead-time generator trailing-edge delay counter unit 0"
|
|
hexmask.long.word 0x00 0.--11. 1. "TED,trailing-edge delay counter"
|
|
tree.end
|
|
tree "TIMERD (Timer D Peripheral)"
|
|
base ad:0x40100000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "TxCTL,Timer Control Register"
|
|
bitfld.long 0x00 13. "DTGCLK,DTG clock select" "0: DTG uses clock selected by TxTCL.CLK,1: DTG uses clock selected by TxCTL.CLKDIV"
|
|
bitfld.long 0x00 10.--11. "MODE,timer mode" "0: timer disabled,1: up mode,2: up/down mode,?..."
|
|
newline
|
|
bitfld.long 0x00 9. "CLK,timer clock input source" "0: HCLK,1: ACLK"
|
|
bitfld.long 0x00 6.--8. "CLKDIV,timer clock divider" "0: divide by 1,1: divide by 2,2: divide by 4,3: divide by 8,4: divide by 16,5: divide by 32,6: divide by 64,7: divide by 128"
|
|
newline
|
|
bitfld.long 0x00 5. "INTEN,Timer interrupt enable" "0: timer interrupt enabled,1: timer interrupt disabled"
|
|
bitfld.long 0x00 4. "INT,Timer interrupt" "0: interrupt flag write 1 to clear,1: No interrupt"
|
|
newline
|
|
bitfld.long 0x00 3. "SS,Timer single shot" "0: Continuous mode,1: Single shot mode"
|
|
bitfld.long 0x00 2. "CLR,Timer clear" "0: Clear Timer hold in reset set SYNC_OUT,1: Do not clear timer clear SYNC_OUT"
|
|
newline
|
|
bitfld.long 0x00 0. "PRDL,Timer Period Latch" "0: Latch timer values counting up at TxPRD-1,1: Latch timer values when counting down to 1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TxPRD,timer period"
|
|
hexmask.long.word 0x00 0.--15. 1. "PERIOD,timer period value"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "TxCTR,timer counter"
|
|
hexmask.long.word 0x00 0.--15. 1. "CTR,timer counter value"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TxCC0CTL,timer capture and compare control unit 0"
|
|
bitfld.long 0x00 4. "CCMODE,capture and compare mode" "0: compare_mode,1: capture_mode"
|
|
bitfld.long 0x00 3. "CCINTEN,capture and compare interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "CCINT,capture and compare interrupt" "0: no interrupt detected,1: interrupt write 1b to clear"
|
|
bitfld.long 0x00 0.--1. "CCEDG,capture mode edge detect" "0: high to low transition only,1: low to high transitions only,2: both high to low and low to high transitions,?..."
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "TxCC0CTR,capture and compare counter unit 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "CCCTR,capture and compare counter value"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "TxCC1CTL,timer capture and compare control unit 1"
|
|
bitfld.long 0x00 4. "CCMODE,capture and compare mode" "0: compare_mode,1: capture_mode"
|
|
bitfld.long 0x00 3. "CCINTEN,capture and compare interrupt enable" "0: interrupt disabled,1: interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "CCINT,capture and compare interrupt" "0: no interrupt detected,1: interrupt write 1b to clear"
|
|
bitfld.long 0x00 0.--1. "CCEDG,capture mode edge detect" "0: high to low transition only,1: low to high transitions only,2: both high to low and low to high transitions,?..."
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "TxCC1CTR,capture and compare counter unit 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CCCTR,capture and compare counter value"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DTGD0CTL,Timer A dead-time generator control unit 0"
|
|
bitfld.long 0x00 7. "BYPASS,bypass dead-time generation" "0: do not bypass dead-time generation,1: bypass dead-time generation"
|
|
bitfld.long 0x00 6. "OTP,On-time preservation" "0: do not extend on time,1: extend on time"
|
|
newline
|
|
bitfld.long 0x00 5. "INVHS,Invert high-side output signal" "0: do not invert high-side output signal,1: invert high-side output signal"
|
|
bitfld.long 0x00 4. "INVLS,Invert low-side output signal" "0: do not invert low-side output signal,1: invert low-side output signal"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "DTGD0LED,Timer A dead-time generator leading-edge delay counter unit 0"
|
|
hexmask.long.word 0x00 0.--11. 1. "LED,leading-edge delay counter"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "DTGD0TED,Timer A dead-time generator trailing-edge delay counter unit 0"
|
|
hexmask.long.word 0x00 0.--11. 1. "TED,trailing-edge delay counter"
|
|
tree.end
|
|
tree "UART (Universal Asynchronous Receiver/Transmitter)"
|
|
base ad:0x401D0000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "UARTRXTX,UART receive/transmit FIFO"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RXTX,Receive and Transmit FIFO buffer (read: RX FIFO write: TX FIFO)"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "UARTIEN,UART interrupt enable"
|
|
bitfld.long 0x00 3. "MSINTEN,Model Status interrupt enable" "0: disable interrupt,1: enable interrupt"
|
|
bitfld.long 0x00 2. "RSINTEN,Receive interrupt enable" "0: disable interrupt,1: enable interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "TXINTEN,TX register data available interrupt enable" "0: disable interrupt,1: enable interrupt"
|
|
bitfld.long 0x00 0. "RXINTEN,RX register data available interrupt enable" "0: disable interrupt,1: enable interrupt"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "UARTII,UART interrupt identification"
|
|
bitfld.long 0x00 1.--3. "UARTINTID,UART interrupt type" "0: modem_status,1: TX_hold_register_empty,2: RX_data_available,3: RX_line_status,?,?,6: Timeout,?..."
|
|
bitfld.long 0x00 0. "UARTINT,UART interrupt" "0: disable interrupt,1: enable interrupt"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "UARTLC,UART Line Control"
|
|
bitfld.long 0x00 6. "SB,Break control" "0: normal operation,1: force TX to 0"
|
|
bitfld.long 0x00 5. "SP,Stick parity" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x00 4. "EPS,Parity type" "0: generate ODD parity,1: generate EVEN parity"
|
|
bitfld.long 0x00 3. "PEN,Parity enable" "0: parity disabled,1: parity enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "STB,Stop bits" "0: 1 stop bit,1: 2 stop bits (1.5 if BPC=00b)"
|
|
bitfld.long 0x00 0.--1. "BPC,Bit per character" "0: 5 bits,1: 6 bits,2: 7 bits,3: 8 bits"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "UARTLS,UART Line Status"
|
|
bitfld.long 0x00 7. "RXE,RX FIFO error" "0: no error in RX FIFO,1: At least one parity framing or break error.."
|
|
bitfld.long 0x00 6. "TXE,TX empty" "0: error cleared,1: TX shift register and TX FIFO are empty"
|
|
newline
|
|
bitfld.long 0x00 5. "TCFE,TX FIFO empty" "0: error cleared,1: TX FIFO is empty"
|
|
bitfld.long 0x00 4. "RXBE,RX break error" "0: error cleared,1: entry on top of RX FIFO has break error.."
|
|
newline
|
|
bitfld.long 0x00 3. "RXFE,RX framing error" "0: error cleared,1: entry on top of RX FIFO has framing error.."
|
|
bitfld.long 0x00 2. "RXPE,RX parity error" "0: error cleared,1: entry on top of RX FIFO has parity error.."
|
|
newline
|
|
bitfld.long 0x00 1. "RXOE,RX overrun error" "0: error cleared,1: RX FIFO full and last entry overwritten.."
|
|
bitfld.long 0x00 0. "RXDR,RX data ready" "0: RX FIFO empty,1: At least one entry in RX FIFO"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "UARTFCTL,FIFO control"
|
|
bitfld.long 0x00 6.--7. "RXFT,RX FIFO Theshold" "0: 1 byte in FIFO,1: 4 bytes in FIFO,2: 8 bytes in FIFO,3: 14 bytes in FIFO"
|
|
bitfld.long 0x00 2. "TXFRESET,RX FIFO reset" "0: no_action,1: clear TX FIFO cleared on read"
|
|
newline
|
|
bitfld.long 0x00 1. "RXFRESET,RX FIFO reset" "0: no_action,1: clear RX FIFO cleared on read"
|
|
bitfld.long 0x00 0. "FEN,FIFO enable" "0: disable RX TX FIFO,1: enable RX TX FIFO"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "UARTIE_R,UART interrupt enable remapped"
|
|
bitfld.long 0x00 3. "MSINTEN,Modem status interrupt enable" "0: disable interrupt,1: enable interrupt"
|
|
bitfld.long 0x00 2. "RSINTEN,Receive interrupt enable" "0: disable interrupt,1: enable interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "TXINTEN,TX register data available interrupt enable" "0: disable interrupt,1: enable interrupt"
|
|
bitfld.long 0x00 0. "RXINTEN,RX register data available interrupt enable" "0: disable interrupt,1: enable interrupt"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "UARTDL_L,UART divisor latch low byte"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DL_L,RX register data available interrupt enable"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "UARTDL_H,UART divisor latch high byte"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DL_H,Divisor value high byte"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "UARTFD_F,UART fractional divisor value"
|
|
hexmask.long.byte 0x00 0.--7. 1. "FRAC,Fractional divisor value"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "UARTFSTAT,UART FIFO status"
|
|
bitfld.long 0x00 3. "RXFF,RX FIFO full" "0: RX FIFO not full,1: RX FIFO full"
|
|
bitfld.long 0x00 2. "RXFE,RX FIFO empty" "0: RX FIFO not empty,1: RX FIFO empty"
|
|
newline
|
|
bitfld.long 0x00 1. "TXFF,TX FIFO full" "0: TX FIFO not full,1: TX FIFO full"
|
|
bitfld.long 0x00 0. "TXFE,TX FIFO empty" "0: TX FIFO not empty,1: TX FIFO empty"
|
|
tree.end
|
|
tree "WDT (Watchdog Timer Unit)"
|
|
base ad:0x40030000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "WDTCTL,Watchdog Timer Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "KEY,WDTCTL register key"
|
|
rbitfld.long 0x00 11. "WRBUSY,WDT register write busy" "0: Watchdog timer register write not busy,1: Watchdog timer register write busy"
|
|
newline
|
|
bitfld.long 0x00 10. "WDTCLKSEL,Watchdog Timer Input Clock Select" "0: Watchdog timer input clock,1: Watchdog timer input clock"
|
|
bitfld.long 0x00 6.--9. "WDTCLKDIV,Watchdog Timer Input Clock Divider" "0: WDT clock divider,1: WDT clock divider,2: WDT clock divider,3: WDT clock divider,4: WDT clock divider,5: WDT clock divider,6: WDT clock divider,7: WDT clock divider,8: WDT clock divider,9: WDT clock divider,10: WDT clock divider,11: WDT clock divider,12: WDT clock divider,13: WDT clock divider,14: WDT clock divider,15: WDT clock divider"
|
|
newline
|
|
bitfld.long 0x00 5. "WDTRESETEN,Watchdog Timer Device Reset Enable" "0: Watchdog timer device reset disabled,1: Watchdog timer device reset enabled"
|
|
rbitfld.long 0x00 4. "WDTINT,Watchdog Interval Timer Interrupt Flag" "0: Watchdog timer interrupt flag clear,1: Watchdog timer interrupt flag set"
|
|
newline
|
|
bitfld.long 0x00 3. "WDTINTEN,Watchdog Interval Timer Interrupt Enable" "0: Watchdog timer interval interrupt disabled,1: Watchdog timer interval interrupt enabled"
|
|
bitfld.long 0x00 0.--2. "WDTCTRRST,Watchdog Timer Counter Reset" "?,?,?,?,?,5: WDTCTL Reset Key,?..."
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "WDTCDV,Watchdog Timer Count-down Value Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "KEY,WDTCTL register key"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "RSTVALUE,24b WDT count-down value"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "WDTCTR,Watchdog Timer Counter Register"
|
|
tree.end
|
|
autoindent.off
|
|
newline
|