5884 lines
373 KiB
Plaintext
5884 lines
373 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: NRF51xxx On-Chip Peripherals (Cortex-M0)
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; @Manufacturer: NORDICSEMI - Nordic Semiconductor
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; @Author: KAO, GAJ, KMB
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; @Changelog: 2016-11-10 KMB
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; @Doc: nRF51_Series_Reference_Manual_v2.1.pdf
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; nnrf51xxx_PS v2.0.pdf PROD BRIEF
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; nnrf51xxx v2.1.pdf
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; nRF51_Series_Reference_manual v3.0.pdf
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; nnrf51xxx_PS v3.1.pdf nRF51422_PS v3.1.pdf
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; nRF51822_PS_v3.3.pdf
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; @Chip: Nnrf51???QFAA, Nnrf51???QFAB, Nnrf51???QFAC, Nnrf51???CEAA, Nnrf51???CDAB,
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; Nnrf51???CFAC, NRF51422QFAA, NRF51422QFAB, NRF51422QFAC, NRF51422CEAA,
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; NRF51422CDAB, NRF51422CFAC, NRF51822CTAA, NRF51822CTAC
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; @Core: Cortex-M0
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: pernrf51xxx.per 8919 2018-03-07 15:29:43Z mkolodziejczyk $
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;Known problems:
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;In module Software Interrupts (SWI) - base addresses given, but no description
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tree.close "Core Registers (Cortex-M0)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 0x8
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if (CORENAME()=="CORTEXM1")
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group.long 0x10++0x0b
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line.long 0x00 "STCSR,SysTick Control and Status Register"
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bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
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bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock"
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textline " "
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bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
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bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
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line.long 0x04 "STRVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
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line.long 0x08 "STCVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
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else
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group.long 0x10++0x0b
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line.long 0x00 "STCSR,SysTick Control and Status Register"
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bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
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bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock"
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textline " "
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bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
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bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
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line.long 0x04 "STRVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
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line.long 0x08 "STCVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
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endif
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if (CORENAME()=="CORTEXM1")
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rgroup.long 0x1c++0x03
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line.long 0x00 "STCR,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1"
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bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1"
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textline " "
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known"
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else
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rgroup.long 0x1c++0x03
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line.long 0x00 "STCR,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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textline " "
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors"
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endif
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rgroup.long 0xd00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer code"
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hexmask.long.byte 0x00 20.--23. 1. " VARIANT ,Implementation defined variant number"
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textline " "
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hexmask.long.byte 0x00 4.--15. 1. " PARTNO ,Number of processor within family"
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hexmask.long.byte 0x00 0.--3. 1. " REVISION ,Implementation defined revision number"
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group.long 0xd04++0x03
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending"
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bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending"
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textline " "
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bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending"
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bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending"
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textline " "
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bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending"
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bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt"
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hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field"
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textline " "
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hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field"
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if (CORENAME()=="CORTEXM0+")
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group.long 0xd08++0x03
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line.long 0x00 "VTOR,Vector Table Offset Register"
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hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address"
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else
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textline " "
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endif
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group.long 0xd0c++0x03
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line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key"
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bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian"
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textline " "
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bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset"
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bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear"
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group.long 0xd10++0x03
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line.long 0x00 "SCR,System Control Register"
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bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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textline " "
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bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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rgroup.long 0xd14++0x03
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line.long 0x00 "CCR,Configuration and Control Register"
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bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned"
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bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped"
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group.long 0xd1c++0x0b
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line.long 0x00 "SHPR2,System Handler Priority Register 2"
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bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11"
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line.long 0x04 "SHPR3,System Handler Priority Register 3"
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bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11"
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bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11"
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line.long 0x08 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending"
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if (CORENAME()=="CORTEXM0+")
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hgroup.long 0x08++0x03
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hide.long 0x00 "ACTLR,Auxiliary Control Register"
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else
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textline " "
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endif
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else
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newline
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textline "COREDEBUG component base address not specified"
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newline
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endif
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tree.end
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tree "Nested Vectored Interrupt Controller (NVIC)"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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tree "Interrupt Enable Registers"
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group.long 0x100++0x03
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line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register"
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setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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tree.end
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tree "Interrupt Pending Registers"
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group.long 0x200++0x03
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line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register"
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setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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tree.end
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width 6.
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tree "Interrupt Priority Registers"
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group.long 0x400++0x1F
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line.long 0x00 "INT0,Interrupt Priority Register"
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bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3"
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bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3"
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bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3"
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bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3"
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|
line.long 0x04 "INT1,Interrupt Priority Register"
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bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3"
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bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3"
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bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3"
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bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3"
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line.long 0x08 "INT2,Interrupt Priority Register"
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bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3"
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bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3"
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bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3"
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bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3"
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line.long 0x0C "INT3,Interrupt Priority Register"
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bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3"
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bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3"
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bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3"
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bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3"
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|
line.long 0x10 "INT4,Interrupt Priority Register"
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bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3"
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bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3"
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bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3"
|
|
bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3"
|
|
line.long 0x14 "INT5,Interrupt Priority Register"
|
|
bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3"
|
|
bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3"
|
|
bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3"
|
|
bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3"
|
|
line.long 0x18 "INT6,Interrupt Priority Register"
|
|
bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3"
|
|
bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3"
|
|
bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3"
|
|
bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3"
|
|
line.long 0x1C "INT7,Interrupt Priority Register"
|
|
bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3"
|
|
bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3"
|
|
bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3"
|
|
bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 0xA
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred"
|
|
eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match"
|
|
textline " "
|
|
eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match"
|
|
eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request"
|
|
if (CORENAME()=="CORTEXM1")
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Selector Register"
|
|
bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write"
|
|
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..."
|
|
group.long 0xDF8++0x07
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor"
|
|
line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Breakpoint Unit (BPU)"
|
|
sif COMPonent.AVAILABLE("BPU")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1))
|
|
width 8.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "BP_CTRL,Breakpoint Control Register"
|
|
bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " KEY ,Key field" "No write,Write"
|
|
bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled"
|
|
else
|
|
newline
|
|
textline "BPU component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 14.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "DW_CTRL,DW Control Register "
|
|
bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "DW_PCSR,DW Program Counter Sample Register"
|
|
hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF"
|
|
group.long 0x20++0x0b
|
|
line.long 0x00 "DW_COMP0,DW Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK0,DW Mask Register 0"
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION0,DW Function Register 0"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
group.long 0x30++0x0b
|
|
line.long 0x00 "DW_COMP1,DW Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK1,DW Mask Register 1 "
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION1,DW Function Register 1"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
tree "Non-Volatile Memory Controller (NVMC)"
|
|
base ad:0x4001E000
|
|
width 21.
|
|
rgroup.long 0x400++0x03 "REGISTERS"
|
|
line.long 0x00 "READY,Ready Flag"
|
|
bitfld.long 0x00 0. " READY ,NVMC is busy or ready" "Busy,Ready"
|
|
group.long 0x504++0x03
|
|
line.long 0x00 "CONFIG,Configuration Register"
|
|
bitfld.long 0x00 0.--1. " WEN ,Program memory access mode" "Read only,Write enabled,Erase enabled,?..."
|
|
sif (!cpuis("NRF52840QI")&&!cpuis("NRF52810Q*"))
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "ERASEPAGE/ERASEPCR1,Register For Erasing A Page In Code Region 1"
|
|
line.long 0x04 "ERASEALL,Register For Erasing All Non-Volatile User Memory"
|
|
bitfld.long 0x04 0. " ERASEALL ,Erase all non-volatile memory including UICR registers" "No operation,Started"
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "ERASEUICR,Register For Erasing User Information Configuration Register"
|
|
bitfld.long 0x00 0. " ERASEUICR ,Register starting erase of all user information configuration registers" "No operation,Started"
|
|
else
|
|
if (((per.l(ad:0x4001E000+0x504))&0x03)==0x02)
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "ERASEPAGE,Register For Erasing A Page In Code Area"
|
|
line.long 0x04 "ERASEALL,Register For Erasing All Non-Volatile User Memory"
|
|
bitfld.long 0x04 0. " ERASEALL ,Erase all non-volatile memory including UICR registers" "No operation,Started"
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "ERASEUICR,Register For Erasing User Information Configuration Register"
|
|
bitfld.long 0x00 0. " ERASEUICR ,Register starting erase of all user information configuration registers" "No operation,Started"
|
|
else
|
|
hgroup.long 0x508++0x07
|
|
hide.long 0x00 "ERASEPAGE,Register For Erasing A Page In Code Area"
|
|
hide.long 0x04 "ERASEALL,Register For Erasing All Non-Volatile User Memory"
|
|
hgroup.long 0x514++0x03
|
|
hide.long 0x00 "ERASEUICR,Register For Erasing User Information Configuration Registers"
|
|
endif
|
|
endif
|
|
sif (!cpuis("NRF52840QI")&&!cpuis("NRF52810Q*"))
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "ERASEPCR0,Register For Erasing A Page In Code Region 0"
|
|
endif
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52840QI"))
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "ICACHECNF,I-Code Cache Configuration Register"
|
|
bitfld.long 0x00 8. " CACHEPROFEN ,Cache profiling enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CACHEEN ,Cache enable" "Disabled,Enabled"
|
|
group.long 0x548++0x07
|
|
line.long 0x00 "IHIT,I-Code Cache Hit Counter"
|
|
line.long 0x04 "IMISS,I-Code Cache Miss Counter"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Factory Information Configuration Registers (FICR)"
|
|
base ad:0x10000000
|
|
width 17.
|
|
rgroup.long 0x10++0x07 "REGISTERS"
|
|
line.long 0x00 "CODEPAGESIZE,Code Memory Page Size"
|
|
line.long 0x04 "CODESIZE,Code Memory Size"
|
|
sif (!cpuis("NRF52832QFAA")&&!cpuis("NRF52832CEAA")&&!cpuis("NRF52832CIAA")&&!cpuis("NRF52832QFAB")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810Q*"))
|
|
rgroup.long 0x34++0x07
|
|
line.long 0x00 "NUMRAMBLOCK,Number Of Individually Controllable RAM Blocks"
|
|
line.long 0x04 "SIZERAMBLOCKS,RAM Block Size In Bytes"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "CONFIGID,Configuration Identifier"
|
|
hexmask.long.word 0x00 0.--15. 1. " HWID ,Identification number for the HW"
|
|
endif
|
|
rgroup.long 0x60++0x07
|
|
line.long 0x00 "DEVICEID[0],Device Identifier Bits 31-0"
|
|
line.long 0x04 "DEVICEID[1],Device Identifier Bits 63-32"
|
|
rgroup.long 0x80++0x2B
|
|
line.long 0x00 "ER[0],Encryption Root Bits 31-0"
|
|
line.long 0x04 "ER[1],Encryption Root Bits 63-32"
|
|
line.long 0x08 "ER[2],Encryption Root Bits 95-64"
|
|
line.long 0x0C "ER[3],Encryption Root Bits 127-96"
|
|
line.long 0x10 "IR[0],Identity Root Bits 31-0"
|
|
line.long 0x14 "IR[1],Identity Root Bits 63-32"
|
|
line.long 0x18 "IR[2],Identity Root Bits 95-64"
|
|
line.long 0x1C "IR[3],Identity Root Bits 127-96"
|
|
line.long 0x20 "DEVICEADDRTYPE,Device Address Type"
|
|
bitfld.long 0x20 0. " ADDRTYPE ,Device address type" "Public,Random"
|
|
line.long 0x24 "DEVICEADDR[0],Device Address Bit 31-0"
|
|
line.long 0x28 "DEVICEADDR[1],Device Address Bit 47-32"
|
|
hexmask.long.word 0x28 0.--15. 0x01 " ADDR ,Device address bit 47-32"
|
|
sif (!cpuis("NRF52832*")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810Q*"))
|
|
rgroup.long 0xAC++0x03
|
|
line.long 0x00 "OVERRIDDEN,Override Enable"
|
|
bitfld.long 0x00 3. " NRF_1MBIT ,Default values for NRF_1MBIT mode" "Override,No override"
|
|
bitfld.long 0x00 0. " BLE_1MBIT ,Default values for BLE_1MBIT mode" "Override,No override"
|
|
rgroup.long 0xB0++0x03
|
|
line.long 0x00 "NRF_1MBIT[0],RADIO.OVERRIDE[0] Values For NRF_1MBIT Mode"
|
|
rgroup.long 0xB4++0x03
|
|
line.long 0x00 "NRF_1MBIT[1],RADIO.OVERRIDE[1] Values For NRF_1MBIT Mode"
|
|
rgroup.long 0xB8++0x03
|
|
line.long 0x00 "NRF_1MBIT[2],RADIO.OVERRIDE[2] Values For NRF_1MBIT Mode"
|
|
rgroup.long 0xBC++0x03
|
|
line.long 0x00 "NRF_1MBIT[3],RADIO.OVERRIDE[3] Values For NRF_1MBIT Mode"
|
|
rgroup.long 0xC0++0x03
|
|
line.long 0x00 "NRF_1MBIT[4],RADIO.OVERRIDE[4] Values For NRF_1MBIT Mode"
|
|
rgroup.long 0xEC++0x03
|
|
line.long 0x00 "BLE_1MBIT[0],RADIO.OVERRIDE[4] Values For BLE_1MBIT Mode"
|
|
rgroup.long 0xF0++0x03
|
|
line.long 0x00 "BLE_1MBIT[1],RADIO.OVERRIDE[4] Values For BLE_1MBIT Mode"
|
|
rgroup.long 0xF4++0x03
|
|
line.long 0x00 "BLE_1MBIT[2],RADIO.OVERRIDE[4] Values For BLE_1MBIT Mode"
|
|
rgroup.long 0xF8++0x03
|
|
line.long 0x00 "BLE_1MBIT[3],RADIO.OVERRIDE[4] Values For BLE_1MBIT Mode"
|
|
rgroup.long 0xFC++0x03
|
|
line.long 0x00 "BLE_1MBIT[4],RADIO.OVERRIDE[4] Values For BLE_1MBIT Mode"
|
|
endif
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840QI")||cpuis("NRF52810Q*"))
|
|
rgroup.long 0x100++0x13
|
|
line.long 0x00 "INFO.PART,Part Code"
|
|
line.long 0x04 "INFO.VARIANT,Part Variant"
|
|
line.long 0x08 "INFO.PACKAGE,Package Option"
|
|
line.long 0x0C "INFO.RAM,RAM Variant"
|
|
line.long 0x10 "INFO.FLASH,Flash Variant"
|
|
rgroup.long 0x404++0x03
|
|
line.long 0x00 "TEMP.A0,Slope Definition A0"
|
|
hexmask.long.word 0x00 0.--11. 1. " A ,A register"
|
|
rgroup.long 0x408++0x03
|
|
line.long 0x00 "TEMP.A1,Slope Definition A1"
|
|
hexmask.long.word 0x00 0.--11. 1. " A ,A register"
|
|
rgroup.long 0x40C++0x03
|
|
line.long 0x00 "TEMP.A2,Slope Definition A2"
|
|
hexmask.long.word 0x00 0.--11. 1. " A ,A register"
|
|
rgroup.long 0x410++0x03
|
|
line.long 0x00 "TEMP.A3,Slope Definition A3"
|
|
hexmask.long.word 0x00 0.--11. 1. " A ,A register"
|
|
rgroup.long 0x414++0x03
|
|
line.long 0x00 "TEMP.A4,Slope Definition A4"
|
|
hexmask.long.word 0x00 0.--11. 1. " A ,A register"
|
|
rgroup.long 0x418++0x03
|
|
line.long 0x00 "TEMP.A5,Slope Definition A5"
|
|
hexmask.long.word 0x00 0.--11. 1. " A ,A register"
|
|
rgroup.long 0x41C++0x03
|
|
line.long 0x00 "TEMP.B0,Y-Intercept B0"
|
|
hexmask.long.word 0x00 0.--13. 1. " B ,B register"
|
|
rgroup.long 0x420++0x03
|
|
line.long 0x00 "TEMP.B1,Y-Intercept B1"
|
|
hexmask.long.word 0x00 0.--13. 1. " B ,B register"
|
|
rgroup.long 0x424++0x03
|
|
line.long 0x00 "TEMP.B2,Y-Intercept B2"
|
|
hexmask.long.word 0x00 0.--13. 1. " B ,B register"
|
|
rgroup.long 0x428++0x03
|
|
line.long 0x00 "TEMP.B3,Y-Intercept B3"
|
|
hexmask.long.word 0x00 0.--13. 1. " B ,B register"
|
|
rgroup.long 0x42C++0x03
|
|
line.long 0x00 "TEMP.B4,Y-Intercept B4"
|
|
hexmask.long.word 0x00 0.--13. 1. " B ,B register"
|
|
rgroup.long 0x430++0x03
|
|
line.long 0x00 "TEMP.B5,Y-Intercept B5"
|
|
hexmask.long.word 0x00 0.--13. 1. " B ,B register"
|
|
rgroup.long 0x434++0x03
|
|
line.long 0x00 "TEMP.T0,Segment End T0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " T ,T register"
|
|
rgroup.long 0x438++0x03
|
|
line.long 0x00 "TEMP.T1,Segment End T1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " T ,T register"
|
|
rgroup.long 0x43C++0x03
|
|
line.long 0x00 "TEMP.T2,Segment End T2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " T ,T register"
|
|
rgroup.long 0x440++0x03
|
|
line.long 0x00 "TEMP.T3,Segment End T3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " T ,T register"
|
|
rgroup.long 0x444++0x03
|
|
line.long 0x00 "TEMP.T4,Segment End T4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " T ,T register"
|
|
sif !cpuis("NRF52810Q*")
|
|
rgroup.long 0x450++0x0F
|
|
line.long 0x00 "NFC.TAGHEADER0,Default Header For NFC Tag 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " UD[3] ,Unique identifier byte 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " [2] ,Unique identifier byte 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " [1] ,Unique identifier byte 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MFGID ,Default manufacturer ID"
|
|
line.long 0x04 "NFC.TAGHEADER1,Default Header For NFC Tag 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " UD[7] ,Unique identifier byte 7"
|
|
hexmask.long.byte 0x04 16.--23. 1. " [6] ,Unique identifier byte 6"
|
|
hexmask.long.byte 0x04 8.--15. 1. " [5] ,Unique identifier byte 5"
|
|
hexmask.long.byte 0x04 0.--7. 1. " [4] ,Unique identifier byte 4"
|
|
line.long 0x08 "NFC.TAGHEADER2,Default Header For NFC Tag 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " UD[11] ,Unique identifier byte 11"
|
|
hexmask.long.byte 0x08 16.--23. 1. " [10] ,Unique identifier byte 10"
|
|
hexmask.long.byte 0x08 8.--15. 1. " [9] ,Unique identifier byte 9"
|
|
hexmask.long.byte 0x08 0.--7. 1. " [8] ,Unique identifier byte 8"
|
|
line.long 0x0C "NFC.TAGHEADER3,Default Header For NFC Tag 3"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " UD[15] ,Unique identifier byte 15"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " [14] ,Unique identifier byte 14"
|
|
hexmask.long.byte 0x0C 8.--15. 1. " [13] ,Unique identifier byte 13"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " [12] ,Unique identifier byte 12"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "User Information Configuration Registers (UICR)"
|
|
base ad:0x10001000
|
|
width 16.
|
|
sif (!cpuis("NRF52832QFAA")&&!cpuis("NRF52832CEAA")&&!cpuis("NRF52832CIAA")&&!cpuis("NRF52832QFAB")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810Q*"))
|
|
group.long 0x00++0x07 "REGISTERS"
|
|
line.long 0x00 "CLENR0,Length Of Code Region 0"
|
|
line.long 0x04 "RBPCONF,Read Back Protection Configuration"
|
|
hexmask.long.byte 0x04 8.--15. 1. " PALL ,Readback protect all code in device"
|
|
hexmask.long.byte 0x04 0.--7. 1. " PR0 ,Readback protect code region 0"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "XTALFREQ,Reset Value For XTALFREQ In Clock"
|
|
hexmask.long.byte 0x00 0.--7. 1. " XTALFREQ ,Reset value for XTALFREQ in CLOCK"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FWID,Firmware ID"
|
|
hexmask.long.word 0x00 0.--15. 1. " FWID ,Identification number for the firmware loaded into the chip"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "BOOTLOADERADDR,Bootloader Address"
|
|
endif
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840QI")||cpuis("NRF52810Q*"))
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "NRFFW[0],Reserved For Nordic Firmware Design"
|
|
endif
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "NRFFW[1],Reserved For Nordic Firmware Design"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "NRFFW[2],Reserved For Nordic Firmware Design"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "NRFFW[3],Reserved For Nordic Firmware Design"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "NRFFW[4],Reserved For Nordic Firmware Design"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "NRFFW[5],Reserved For Nordic Firmware Design"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "NRFFW[6],Reserved For Nordic Firmware Design"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "NRFFW[7],Reserved For Nordic Firmware Design"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "NRFFW[8],Reserved For Nordic Firmware Design"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "NRFFW[9],Reserved For Nordic Firmware Design"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "NRFFW[10],Reserved For Nordic Firmware Design"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "NRFFW[11],Reserved For Nordic Firmware Design"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "NRFFW[12],Reserved For Nordic Firmware Design"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "NRFFW[13],Reserved For Nordic Firmware Design"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "NRFFW[14],Reserved For Nordic Firmware Design"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "NRFHW[0],Reserved For Nordic Hardware Design"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "NRFHW[1],Reserved For Nordic Hardware Design"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "NRFHW[2],Reserved For Nordic Hardware Design"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "NRFHW[3],Reserved For Nordic Hardware Design"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "NRFHW[4],Reserved For Nordic Hardware Design"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "NRFHW[5],Reserved For Nordic Hardware Design"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "NRFHW[6],Reserved For Nordic Hardware Design"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "NRFHW[7],Reserved For Nordic Hardware Design"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "NRFHW[8],Reserved For Nordic Hardware Design"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "NRFHW[9],Reserved For Nordic Hardware Design"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "NRFHW[10],Reserved For Nordic Hardware Design"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "NRFHW[11],Reserved For Nordic Hardware Design"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "CUSTOMER[0],Reserved For Customer"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "CUSTOMER[1],Reserved For Customer"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "CUSTOMER[2],Reserved For Customer"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "CUSTOMER[3],Reserved For Customer"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "CUSTOMER[4],Reserved For Customer"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "CUSTOMER[5],Reserved For Customer"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "CUSTOMER[6],Reserved For Customer"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "CUSTOMER[7],Reserved For Customer"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "CUSTOMER[8],Reserved For Customer"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "CUSTOMER[9],Reserved For Customer"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "CUSTOMER[10],Reserved For Customer"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "CUSTOMER[11],Reserved For Customer"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "CUSTOMER[12],Reserved For Customer"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "CUSTOMER[13],Reserved For Customer"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "CUSTOMER[14],Reserved For Customer"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "CUSTOMER[15],Reserved For Customer"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "CUSTOMER[16],Reserved For Customer"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "CUSTOMER[17],Reserved For Customer"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "CUSTOMER[18],Reserved For Customer"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "CUSTOMER[19],Reserved For Customer"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "CUSTOMER[20],Reserved For Customer"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "CUSTOMER[21],Reserved For Customer"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "CUSTOMER[22],Reserved For Customer"
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "CUSTOMER[23],Reserved For Customer"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "CUSTOMER[24],Reserved For Customer"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "CUSTOMER[25],Reserved For Customer"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "CUSTOMER[26],Reserved For Customer"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "CUSTOMER[27],Reserved For Customer"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "CUSTOMER[28],Reserved For Customer"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "CUSTOMER[29],Reserved For Customer"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "CUSTOMER[30],Reserved For Customer"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "CUSTOMER[31],Reserved For Customer"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840QI")||cpuis("NRF52810Q*"))
|
|
sif cpuis("NRF52810QF")
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "PSELRESET[0],Mapping Of The nRESET Function"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--5. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,?..."
|
|
line.long 0x04 "PSELRESET[1],Mapping Of The nRESET Function"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--5. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,?..."
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "PSELRESET[0],Mapping Of The nRESET Function"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--5. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELRESET[1],Mapping Of The nRESET Function"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--5. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
elif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x10001000+0x200))&0x20)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "PSELRESET[0],Mapping Of The nRESET Function"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number onto which nRESET is exposed" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "PSELRESET[0],Mapping Of The nRESET Function"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number onto which nRESET is exposed" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x10001000+0x204))&0x20)==0x00)
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "PSELRESET[1],Mapping Of The nRESET Function"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number onto which nRESET is exposed" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "PSELRESET[1],Mapping Of The nRESET Function"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number onto which nRESET is exposed" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
else
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "PSELRESET[0],Mapping Of The nRESET Function"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "PSELRESET[1],Mapping Of The nRESET Function"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,GPIO number P0.n onto which reset is exposed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "APPROTECT,Access Port Protection"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PALL ,Blocks debugger read/write access to all CPU register and memory mapped addresses"
|
|
sif !cpuis("NRF52810Q*")
|
|
group.long 0x20C++0x03
|
|
line.long 0x00 "NFCPINS,Setting Of Pins Dedicated To NFC Functionality"
|
|
bitfld.long 0x00 0. " PROTECT ,Setting of pins dedicated to NFC functionality" "Disabled,NFC"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x210++0x03
|
|
line.long 0x00 "DEBUGCTRL,Processor Debug Control"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUFPBEN ,Configure CPU flash patch and breakpoint (FPB) unit behavior"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUNIDEN ,Configure CPU non-intrusive debug features"
|
|
group.long 0x300++0x07
|
|
line.long 0x00 "EXTSUPPLY,Enable External Circuitry To Be Supplied From VDD Pin"
|
|
bitfld.long 0x00 0. " EXTSUPPLY ,Enable external circuitry to be supplied from VDD pin" "Disabled,Enabled"
|
|
line.long 0x04 "REGOUT0,GPIO Reference Voltage/External Output Supply Voltage In High Voltage Mode"
|
|
bitfld.long 0x04 0.--2. " VOUT ,Output voltage from of REG0 regulator stage" "1.8 V,2.1 V,2.4 V,2.7 V,3.0 V,3.3 V,,Default (1.8 V)"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Memory Protection Unit (MPU)"
|
|
base ad:0x40000000
|
|
width 16.
|
|
group.long 0x528++0x07 "REGISTERS"
|
|
line.long 0x00 "PERR0,Definition of peripherals in memory region 0"
|
|
bitfld.long 0x00 31. " PPI ,Classify PPI" "Region 0,Region 1"
|
|
bitfld.long 0x00 30. " NVMC ,Classify NVMC" "Region 0,Region 1"
|
|
bitfld.long 0x00 19. " COMP_LPCOMP ,Classify COMP_LPCOMP" "Region 0,Region 1"
|
|
bitfld.long 0x00 18. " QDEC ,Classify QDEC" "Region 0,Region 1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " RTC1 ,Classify RTC1" "Region 0,Region 1"
|
|
bitfld.long 0x00 16. " WDT ,Classify WDT" "Region 0,Region 1"
|
|
bitfld.long 0x00 15. " CCM_AAR ,Classify CCM and AAR" "Region 0,Region 1"
|
|
bitfld.long 0x00 14. " ECB ,Classify ECB" "Region 0,Region 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RNG ,Classify RNG" "Region 0,Region 1"
|
|
bitfld.long 0x00 12. " TEMP ,Classify TEMP" "Region 0,Region 1"
|
|
bitfld.long 0x00 11. " RTC0 ,Classify RTC0" "Region 0,Region 1"
|
|
bitfld.long 0x00 10. " TIMER2 ,Classify TIMER2" "Region 0,Region 1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TIMER1 ,Classify TIMER1" "Region 0,Region 1"
|
|
bitfld.long 0x00 8. " TIMER0 ,Classify TIMER0" "Region 0,Region 1"
|
|
bitfld.long 0x00 7. " ADC ,Classify ADC" "Region 0,Region 1"
|
|
bitfld.long 0x00 6. " GPIOTE ,Classify GPIOTE" "Region 0,Region 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SPI1_TWI1 ,Classify SPI1 and TWI1" "Region 0,Region 1"
|
|
bitfld.long 0x00 3. " SPI0_TWI0 ,Classify SPI0 and TWI0" "Region 0,Region 1"
|
|
bitfld.long 0x00 2. " UART0 ,Classify UART0" "Region 0,Region 1"
|
|
bitfld.long 0x00 1. " RADIO ,Classify RADIO" "Region 0,Region 1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " POWER_CLOCK ,Classify POWER and CLOCK and all other peripherals" "Region 0,Region 1"
|
|
line.long 0x04 "RLENR0,Length of RAM region 0"
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "PROTENSET0,Protection bit enable set register"
|
|
bitfld.long 0x00 31. " PROTREG31 ,Protection enable bit for block31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PROTREG30 ,Protection enable bit for block30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " PROTREG29 ,Protection enable bit for block29" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " PROTREG28 ,Protection enable bit for block28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PROTREG27 ,Protection enable bit for block27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " PROTREG26 ,Protection enable bit for block26" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " PROTREG25 ,Protection enable bit for block25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PROTREG24 ,Protection enable bit for block24" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PROTREG23 ,Protection enable bit for block23" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " PROTREG22 ,Protection enable bit for block22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " PROTREG21 ,Protection enable bit for block21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PROTREG20 ,Protection enable bit for block20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PROTREG19 ,Protection enable bit for block19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " PROTREG18 ,Protection enable bit for block18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " PROTREG17 ,Protection enable bit for block17" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " PROTREG16 ,Protection enable bit for block16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PROTREG15 ,Protection enable bit for block15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " PROTREG14 ,Protection enable bit for block14" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " PROTREG13 ,Protection enable bit for block13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PROTREG12 ,Protection enable bit for block12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PROTREG11 ,Protection enable bit for block11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " PROTREG10 ,Protection enable bit for block10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PROTREG9 ,Protection enable bit for block9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PROTREG8 ,Protection enable bit for block8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PROTREG7 ,Protection enable bit for block7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PROTREG6 ,Protection enable bit for block6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " PROTREG5 ,Protection enable bit for block5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PROTREG4 ,Protection enable bit for block4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PROTREG3 ,Protection enable bit for block3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PROTREG2 ,Protection enable bit for block2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PROTREG1 ,Protection enable bit for block1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PROTREG0 ,Protection enable bit for block0" "Disabled,Enabled"
|
|
sif cpuis("NRF51422QFAA")||cpuis("NRF51422CEAA")||cpuis("NRF51422QFAC")||cpuis("NRF51422CFAC")||cpuis("NRF51822QFAA")||cpuis("NRF51822CEAA")||cpuis("NRF51822QFAC")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")
|
|
group.long 0x604++0x03
|
|
line.long 0x00 "PROTENSET1,Protection bit enable set register"
|
|
bitfld.long 0x00 31. " PROTREG63 ,Protection enable bit for block63" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PROTREG62 ,Protection enable bit for block62" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " PROTREG61 ,Protection enable bit for block61" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " PROTREG60 ,Protection enable bit for block60" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PROTREG59 ,Protection enable bit for block59" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " PROTREG58 ,Protection enable bit for block58" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " PROTREG57 ,Protection enable bit for block57" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PROTREG56 ,Protection enable bit for block56" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PROTREG55 ,Protection enable bit for block55" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " PROTREG54 ,Protection enable bit for block54" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " PROTREG53 ,Protection enable bit for block53" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PROTREG52 ,Protection enable bit for block52" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PROTREG51 ,Protection enable bit for block51" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " PROTREG50 ,Protection enable bit for block50" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " PROTREG49 ,Protection enable bit for block49" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " PROTREG48 ,Protection enable bit for block48" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PROTREG47 ,Protection enable bit for block47" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " PROTREG46 ,Protection enable bit for block46" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " PROTREG45 ,Protection enable bit for block45" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PROTREG44 ,Protection enable bit for block44" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PROTREG43 ,Protection enable bit for block43" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " PROTREG42 ,Protection enable bit for block42" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PROTREG41 ,Protection enable bit for block41" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PROTREG40 ,Protection enable bit for block40" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PROTREG39 ,Protection enable bit for block39" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PROTREG38 ,Protection enable bit for block38" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " PROTREG37 ,Protection enable bit for block37" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PROTREG36 ,Protection enable bit for block36" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PROTREG35 ,Protection enable bit for block35" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PROTREG34 ,Protection enable bit for block34" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PROTREG33 ,Protection enable bit for block33" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PROTREG32 ,Protection enable bit for block32" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x608++0x07
|
|
line.long 0x00 "DISABLEINDEBUG,Disable protection mechanism in debug mode"
|
|
bitfld.long 0x00 0. " DISABLEINDEBUG ,Disable the protection mechanism for NVM blocks while in debug mode" "Disabled,Enabled"
|
|
line.long 0x04 "PROTBLOCKSIZE,Protection block size"
|
|
bitfld.long 0x04 0.--1. " PROTBLOCKSIZE ,Protection block size" "4 kB,?..."
|
|
width 0x0B
|
|
tree.end
|
|
tree "Power management (POWER)"
|
|
base ad:0x40000000
|
|
width 15.
|
|
group.long 0x78++0x07 "TASKS"
|
|
line.long 0x00 "CONSTLAT,Enable Constant Latency Mode"
|
|
line.long 0x04 "LOWPWR,Enable Low Power Mode"
|
|
group.long 0x108++0x03 "EVENTS"
|
|
line.long 0x00 "POFWARN,Power Failure Warning"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840QI")||cpuis("NRF52810Q*"))
|
|
group.long 0x114++0x07
|
|
line.long 0x00 "SLEEPENTER,CPU Entered WFI/WFE Sleep"
|
|
line.long 0x04 "SLEEPEXIT,CPU Exited WFI/WFE Sleep"
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x11C++0x0B
|
|
line.long 0x00 "USBDETECTED,Voltage Supply Detected On VBUS"
|
|
line.long 0x04 "USBREMOVED,Voltage Supply Removed From VBUS"
|
|
line.long 0x08 "USBPWRRDY,USB 3.3 V Supply Ready"
|
|
endif
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Interrupt Enable Register"
|
|
sif cpuis("NRF52840QI")
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " USBPWRRDY ,Enable interrupt on USBPWRRDY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " USBREMOVED ,Enable interrupt on USBREMOVED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " USBDETECTED ,Enable interrupt on USBDETECTED event" "Disabled,Enabled"
|
|
textfld " "
|
|
endif
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " SLEEPEXIT ,Enable interrupt on SLEEPEXIT event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " SLEEPENTER ,Enable interrupt on SLEEPENTER event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " POFWARN ,Enable interrupt on POFWARN event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x304++0x07 "REGISTERS"
|
|
line.long 0x00 "INTENSET,Interrupt Enable Set Register"
|
|
bitfld.long 0x00 2. " POFWARN ,Enable interrupt on POFWARN event" "No effect,Enabled"
|
|
line.long 0x04 "INTENCLR,Interrupt Enable Clear Register"
|
|
bitfld.long 0x04 2. " POFWARN ,Clear interrupt on POFWARN event" "No effect,Cleared"
|
|
endif
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "RESETREAS,Reset Reason"
|
|
sif cpuis("NRF52840QI")
|
|
eventfld.long 0x00 20. " VBUS ,Reset due to wake up from system off mode by Vbus rising into valid range" "Not detected,Detected"
|
|
textfld " "
|
|
endif
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840QI"))
|
|
eventfld.long 0x00 19. " NFC ,Reset due to wake up from off mode by NFC field detect" "Not detected,Detected"
|
|
textline " "
|
|
endif
|
|
eventfld.long 0x00 18. " DIF ,Reset due to wake up from off mode (Debug mode triggered)" "Not detected,Detected"
|
|
sif !cpuis("NRF52810Q*")
|
|
textfld " "
|
|
eventfld.long 0x00 17. " LPCOMP ,Reset due to wake up from off mode (ANADETECT triggered)" "Not detected,Detected"
|
|
textfld " "
|
|
else
|
|
textfld " "
|
|
endif
|
|
eventfld.long 0x00 16. " OFF ,Reset due to wake-up from off mode (DETECT triggered)" "Not detected,Detected"
|
|
eventfld.long 0x00 3. " LOCKUP ,Reset from CPU lock-up detected" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 2. " SREQ ,Reset from AIRCR.SYSRESETREQ detected" "Not detected,Detected"
|
|
eventfld.long 0x00 1. " DOG ,Reset from watchdog detected" "Not detected,Detected"
|
|
eventfld.long 0x00 0. " RESETPIN ,Reset from pin-reset detected" "Not detected,Detected"
|
|
sif (!cpuis("NRF52810Q*")&&!cpuis("NRF52840QI"))
|
|
rgroup.long 0x428++0x03
|
|
line.long 0x00 "RAMSTATUS,RAM Status Register"
|
|
sif (cpuis("NRF51422QFAC")||cpuis("NRF51422CFAC")||cpuis("NRF51822QFAC")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
bitfld.long 0x00 3. " RAMBLOCK3 ,RAM block 3 is on or off/powering up" "Off,On"
|
|
bitfld.long 0x00 2. " RAMBLOCK2 ,RAM block 2 is on or off/powering up" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RAMBLOCK1 ,RAM block 1 is on or off/powering up" "Off,On"
|
|
bitfld.long 0x00 0. " RAMBLOCK0 ,RAM block 0 is on or off/powering up" "Off,On"
|
|
else
|
|
bitfld.long 0x00 1. " RAMBLOCK1 ,RAM block 1 is on or off/powering up" "Off,On"
|
|
bitfld.long 0x00 0. " RAMBLOCK0 ,RAM block 0 is on or off/powering up" "Off,On"
|
|
endif
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
rgroup.long 0x438++0x03
|
|
line.long 0x00 "USBREGSTATUS,USB Supply Status"
|
|
bitfld.long 0x00 1. " OUTPUTRDY ,USB supply output settling time elapsed" "Not Ready,Ready"
|
|
bitfld.long 0x00 0. " VBUSDETECT ,VBUS input detection status" "No Vbus,Vbus Present"
|
|
endif
|
|
wgroup.long 0x500++0x03
|
|
line.long 0x00 "SYSTEMOFF,System OFF Register"
|
|
bitfld.long 0x00 0. " SYSTEMOFF ,Enter system off mode" ",Enter"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840QI")||cpuis("NRF52810Q*"))
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "POFCON,Power Failure Configuration"
|
|
sif cpuis("NRF52840QI")
|
|
bitfld.long 0x00 8.--11. " THRESHOLDVDDH ,Set threshold vddh" "2.7 V,2.8 V,2.9 V,3.0 V,3.1 V,3.2 V,3.3 V,3.4 V,3.5 V,3.6 V,3.7 V,3.8 V,3.9 V,4.0 V,4.1 V,4.2 V"
|
|
textfld " "
|
|
endif
|
|
bitfld.long 0x00 1.--4. " THRESHOLD ,Set threshold" ",,,,1.7 V,1.8 V,1.9 V,2.0 V,2.1 V,2.2 V,2.3 V,2.4 V,2.5 V,2.6 V,2.7 V,2.8 V"
|
|
bitfld.long 0x00 0. " POF ,Power failure comparator" "Disabled,Enabled"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "POFCON,Power Failure Configuration"
|
|
bitfld.long 0x00 1.--2. " THRESHOLD ,Set threshold" "2.1 V,2.3 V,2.5 V,2.7 V"
|
|
bitfld.long 0x00 0. " POF ,Power failure comparator" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "GPREGRET,General Purpose Retention Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPREGRET ,General purpose retention register"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52840QI")||cpuis("NRF52810Q*"))
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "GPREGRET2,General Purpose Retention Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPREGRET ,General purpose retention register"
|
|
endif
|
|
sif (!cpuis("NRF52810Q*")&&!cpuis("NRF52840QI"))
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "RAMON,RAM On/Off Register"
|
|
bitfld.long 0x00 17. " OFFRAM1 ,Keep retention on RAM block 1 when RAM block is switched off" "No,Yes"
|
|
bitfld.long 0x00 16. " OFFRAM0 ,Keep retention on RAM block 0 when RAM block is switched off" "No,Yes"
|
|
bitfld.long 0x00 1. " ONRAM1 ,Keep RAM block 1 in ON mode" "No,Yes"
|
|
bitfld.long 0x00 0. " ONRAM0 ,Keep RAM block 0 in ON mode" "No,Yes"
|
|
sif (!cpuis("NRF52832QFAA")&&!cpuis("NRF52832CEAA")&&!cpuis("NRF52832QFAB")&&!cpuis("NRF52832CIAA"))
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "RESET,Configure Reset Functionality"
|
|
bitfld.long 0x00 0. " RESET ,Enable pin reset in debug interface mode" "Disabled,Enabled"
|
|
endif
|
|
sif (cpuis("NRF51422QFAC")||cpuis("NRF51422CFAC")||cpuis("NRF51822QFAC")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "RAMONB,RAM On/Off Register"
|
|
bitfld.long 0x00 17. " OFFRAM3 ,Keep retention on RAM block 3 when RAM block is switched off" "No,Yes"
|
|
bitfld.long 0x00 16. " OFFRAM2 ,Keep retention on RAM block 2 when RAM block is switched off" "No,Yes"
|
|
bitfld.long 0x00 1. " ONRAM3 ,Keep RAM block 3 in ON mode" "No,Yes"
|
|
bitfld.long 0x00 0. " ONRAM2 ,Keep RAM block 2 in ON mode" "No,Yes"
|
|
endif
|
|
endif
|
|
sif !cpuis("NRF52840QI")
|
|
group.long 0x578++0x03
|
|
line.long 0x00 "DCDCEN,DCDC Enable Register"
|
|
bitfld.long 0x00 0. " DCDCEN ,Enable DC/DC converter" "Disabled,Enabled"
|
|
else
|
|
group.long 0x578++0x03
|
|
line.long 0x00 "DCDCEN,Enable DC/DC Converter For REG1 Stage"
|
|
bitfld.long 0x00 0. " DCDCEN ,Enable DC/DC converter for REG1 stage" "Disabled,Enabled"
|
|
group.long 0x580++0x03
|
|
line.long 0x00 "DCDCEN0,Enable DC/DC Converter For REG0 Stage"
|
|
bitfld.long 0x00 0. " DCDCEN ,Enable DC/DC converter for REG0 stage" "Disabled,Enabled"
|
|
endif
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
group.long (0x900)++0x03
|
|
line.long 0x00 "RAM[0].POWER,RAM0 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x910)++0x03
|
|
line.long 0x00 "RAM[1].POWER,RAM1 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x920)++0x03
|
|
line.long 0x00 "RAM[2].POWER,RAM2 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x930)++0x03
|
|
line.long 0x00 "RAM[3].POWER,RAM3 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x940)++0x03
|
|
line.long 0x00 "RAM[4].POWER,RAM4 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x950)++0x03
|
|
line.long 0x00 "RAM[5].POWER,RAM5 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x960)++0x03
|
|
line.long 0x00 "RAM[6].POWER,RAM6 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x970)++0x03
|
|
line.long 0x00 "RAM[7].POWER,RAM7 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
elif cpuis("NRF52810Q*")
|
|
group.long (0x900)++0x03
|
|
line.long 0x00 "RAM[0].POWER,RAM0 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x910)++0x03
|
|
line.long 0x00 "RAM[1].POWER,RAM1 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x920)++0x03
|
|
line.long 0x00 "RAM[2].POWER,RAM2 Power Control Register"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION_set/clr ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION_set/clr ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER_set/clr ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER_set/clr ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
elif cpuis("NRF52840QI")
|
|
rgroup.long 0x640++0x03
|
|
line.long 0x00 "MAINREGSTATUS,Main Supply Status"
|
|
bitfld.long 0x00 0. " MAINREGSTATUS ,Main supply status bit" "Normal,High"
|
|
group.long (0x900)++0x03
|
|
line.long 0x00 "RAM[0].POWER,RAM0 Power Control Register_SET/CLR"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " S15RETENTION ,Keep retention on RAM S15 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " S14RETENTION ,Keep retention on RAM S14 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " S13RETENTION ,Keep retention on RAM S13 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " S12RETENTION ,Keep retention on RAM S12 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " S11RETENTION ,Keep retention on RAM S11 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " S10RETENTION ,Keep retention on RAM S10 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " S9RETENTION ,Keep retention on RAM S9 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " S8RETENTION ,Keep retention on RAM S8 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " S7RETENTION ,Keep retention on RAM S7 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " S6RETENTION ,Keep retention on RAM S6 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " S5RETENTION ,Keep retention on RAM S5 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " S4RETENTION ,Keep retention on RAM S4 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " S3RETENTION ,Keep retention on RAM S3 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " S2RETENTION ,Keep retention on RAM S2 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " S15POWER ,Keep RAM section S15 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " S14POWER ,Keep RAM section S14 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " S13POWER ,Keep RAM section S13 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " S12POWER ,Keep RAM section S12 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " S11POWER ,Keep RAM section S11 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " S10POWER ,Keep RAM section S10 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " S9POWER ,Keep RAM section S9 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " S8POWER ,Keep RAM section S8 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " S7POWER ,Keep RAM section S7 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " S6POWER ,Keep RAM section S6 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " S5POWER ,Keep RAM section S5 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " S4POWER ,Keep RAM section S4 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " S3POWER ,Keep RAM section S3 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " S2POWER ,Keep RAM section S2 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x910)++0x03
|
|
line.long 0x00 "RAM[1].POWER,RAM1 Power Control Register_SET/CLR"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " S15RETENTION ,Keep retention on RAM S15 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " S14RETENTION ,Keep retention on RAM S14 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " S13RETENTION ,Keep retention on RAM S13 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " S12RETENTION ,Keep retention on RAM S12 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " S11RETENTION ,Keep retention on RAM S11 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " S10RETENTION ,Keep retention on RAM S10 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " S9RETENTION ,Keep retention on RAM S9 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " S8RETENTION ,Keep retention on RAM S8 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " S7RETENTION ,Keep retention on RAM S7 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " S6RETENTION ,Keep retention on RAM S6 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " S5RETENTION ,Keep retention on RAM S5 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " S4RETENTION ,Keep retention on RAM S4 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " S3RETENTION ,Keep retention on RAM S3 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " S2RETENTION ,Keep retention on RAM S2 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " S15POWER ,Keep RAM section S15 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " S14POWER ,Keep RAM section S14 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " S13POWER ,Keep RAM section S13 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " S12POWER ,Keep RAM section S12 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " S11POWER ,Keep RAM section S11 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " S10POWER ,Keep RAM section S10 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " S9POWER ,Keep RAM section S9 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " S8POWER ,Keep RAM section S8 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " S7POWER ,Keep RAM section S7 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " S6POWER ,Keep RAM section S6 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " S5POWER ,Keep RAM section S5 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " S4POWER ,Keep RAM section S4 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " S3POWER ,Keep RAM section S3 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " S2POWER ,Keep RAM section S2 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x920)++0x03
|
|
line.long 0x00 "RAM[2].POWER,RAM2 Power Control Register_SET/CLR"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " S15RETENTION ,Keep retention on RAM S15 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " S14RETENTION ,Keep retention on RAM S14 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " S13RETENTION ,Keep retention on RAM S13 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " S12RETENTION ,Keep retention on RAM S12 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " S11RETENTION ,Keep retention on RAM S11 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " S10RETENTION ,Keep retention on RAM S10 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " S9RETENTION ,Keep retention on RAM S9 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " S8RETENTION ,Keep retention on RAM S8 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " S7RETENTION ,Keep retention on RAM S7 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " S6RETENTION ,Keep retention on RAM S6 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " S5RETENTION ,Keep retention on RAM S5 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " S4RETENTION ,Keep retention on RAM S4 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " S3RETENTION ,Keep retention on RAM S3 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " S2RETENTION ,Keep retention on RAM S2 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " S15POWER ,Keep RAM section S15 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " S14POWER ,Keep RAM section S14 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " S13POWER ,Keep RAM section S13 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " S12POWER ,Keep RAM section S12 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " S11POWER ,Keep RAM section S11 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " S10POWER ,Keep RAM section S10 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " S9POWER ,Keep RAM section S9 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " S8POWER ,Keep RAM section S8 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " S7POWER ,Keep RAM section S7 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " S6POWER ,Keep RAM section S6 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " S5POWER ,Keep RAM section S5 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " S4POWER ,Keep RAM section S4 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " S3POWER ,Keep RAM section S3 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " S2POWER ,Keep RAM section S2 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x930)++0x03
|
|
line.long 0x00 "RAM[3].POWER,RAM3 Power Control Register_SET/CLR"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " S15RETENTION ,Keep retention on RAM S15 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " S14RETENTION ,Keep retention on RAM S14 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " S13RETENTION ,Keep retention on RAM S13 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " S12RETENTION ,Keep retention on RAM S12 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " S11RETENTION ,Keep retention on RAM S11 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " S10RETENTION ,Keep retention on RAM S10 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " S9RETENTION ,Keep retention on RAM S9 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " S8RETENTION ,Keep retention on RAM S8 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " S7RETENTION ,Keep retention on RAM S7 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " S6RETENTION ,Keep retention on RAM S6 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " S5RETENTION ,Keep retention on RAM S5 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " S4RETENTION ,Keep retention on RAM S4 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " S3RETENTION ,Keep retention on RAM S3 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " S2RETENTION ,Keep retention on RAM S2 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " S15POWER ,Keep RAM section S15 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " S14POWER ,Keep RAM section S14 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " S13POWER ,Keep RAM section S13 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " S12POWER ,Keep RAM section S12 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " S11POWER ,Keep RAM section S11 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " S10POWER ,Keep RAM section S10 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " S9POWER ,Keep RAM section S9 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " S8POWER ,Keep RAM section S8 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " S7POWER ,Keep RAM section S7 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " S6POWER ,Keep RAM section S6 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " S5POWER ,Keep RAM section S5 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " S4POWER ,Keep RAM section S4 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " S3POWER ,Keep RAM section S3 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " S2POWER ,Keep RAM section S2 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x940)++0x03
|
|
line.long 0x00 "RAM[4].POWER,RAM4 Power Control Register_SET/CLR"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " S15RETENTION ,Keep retention on RAM S15 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " S14RETENTION ,Keep retention on RAM S14 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " S13RETENTION ,Keep retention on RAM S13 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " S12RETENTION ,Keep retention on RAM S12 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " S11RETENTION ,Keep retention on RAM S11 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " S10RETENTION ,Keep retention on RAM S10 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " S9RETENTION ,Keep retention on RAM S9 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " S8RETENTION ,Keep retention on RAM S8 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " S7RETENTION ,Keep retention on RAM S7 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " S6RETENTION ,Keep retention on RAM S6 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " S5RETENTION ,Keep retention on RAM S5 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " S4RETENTION ,Keep retention on RAM S4 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " S3RETENTION ,Keep retention on RAM S3 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " S2RETENTION ,Keep retention on RAM S2 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " S15POWER ,Keep RAM section S15 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " S14POWER ,Keep RAM section S14 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " S13POWER ,Keep RAM section S13 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " S12POWER ,Keep RAM section S12 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " S11POWER ,Keep RAM section S11 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " S10POWER ,Keep RAM section S10 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " S9POWER ,Keep RAM section S9 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " S8POWER ,Keep RAM section S8 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " S7POWER ,Keep RAM section S7 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " S6POWER ,Keep RAM section S6 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " S5POWER ,Keep RAM section S5 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " S4POWER ,Keep RAM section S4 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " S3POWER ,Keep RAM section S3 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " S2POWER ,Keep RAM section S2 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x950)++0x03
|
|
line.long 0x00 "RAM[5].POWER,RAM5 Power Control Register_SET/CLR"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " S15RETENTION ,Keep retention on RAM S15 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " S14RETENTION ,Keep retention on RAM S14 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " S13RETENTION ,Keep retention on RAM S13 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " S12RETENTION ,Keep retention on RAM S12 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " S11RETENTION ,Keep retention on RAM S11 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " S10RETENTION ,Keep retention on RAM S10 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " S9RETENTION ,Keep retention on RAM S9 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " S8RETENTION ,Keep retention on RAM S8 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " S7RETENTION ,Keep retention on RAM S7 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " S6RETENTION ,Keep retention on RAM S6 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " S5RETENTION ,Keep retention on RAM S5 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " S4RETENTION ,Keep retention on RAM S4 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " S3RETENTION ,Keep retention on RAM S3 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " S2RETENTION ,Keep retention on RAM S2 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " S15POWER ,Keep RAM section S15 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " S14POWER ,Keep RAM section S14 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " S13POWER ,Keep RAM section S13 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " S12POWER ,Keep RAM section S12 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " S11POWER ,Keep RAM section S11 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " S10POWER ,Keep RAM section S10 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " S9POWER ,Keep RAM section S9 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " S8POWER ,Keep RAM section S8 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " S7POWER ,Keep RAM section S7 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " S6POWER ,Keep RAM section S6 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " S5POWER ,Keep RAM section S5 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " S4POWER ,Keep RAM section S4 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " S3POWER ,Keep RAM section S3 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " S2POWER ,Keep RAM section S2 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x960)++0x03
|
|
line.long 0x00 "RAM[6].POWER,RAM6 Power Control Register_SET/CLR"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " S15RETENTION ,Keep retention on RAM S15 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " S14RETENTION ,Keep retention on RAM S14 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " S13RETENTION ,Keep retention on RAM S13 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " S12RETENTION ,Keep retention on RAM S12 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " S11RETENTION ,Keep retention on RAM S11 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " S10RETENTION ,Keep retention on RAM S10 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " S9RETENTION ,Keep retention on RAM S9 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " S8RETENTION ,Keep retention on RAM S8 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " S7RETENTION ,Keep retention on RAM S7 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " S6RETENTION ,Keep retention on RAM S6 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " S5RETENTION ,Keep retention on RAM S5 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " S4RETENTION ,Keep retention on RAM S4 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " S3RETENTION ,Keep retention on RAM S3 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " S2RETENTION ,Keep retention on RAM S2 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " S15POWER ,Keep RAM section S15 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " S14POWER ,Keep RAM section S14 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " S13POWER ,Keep RAM section S13 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " S12POWER ,Keep RAM section S12 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " S11POWER ,Keep RAM section S11 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " S10POWER ,Keep RAM section S10 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " S9POWER ,Keep RAM section S9 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " S8POWER ,Keep RAM section S8 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " S7POWER ,Keep RAM section S7 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " S6POWER ,Keep RAM section S6 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " S5POWER ,Keep RAM section S5 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " S4POWER ,Keep RAM section S4 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " S3POWER ,Keep RAM section S3 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " S2POWER ,Keep RAM section S2 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
group.long (0x970)++0x03
|
|
line.long 0x00 "RAM[7].POWER,RAM7 Power Control Register_SET/CLR"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " S15RETENTION ,Keep retention on RAM S15 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " S14RETENTION ,Keep retention on RAM S14 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " S13RETENTION ,Keep retention on RAM S13 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " S12RETENTION ,Keep retention on RAM S12 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " S11RETENTION ,Keep retention on RAM S11 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " S10RETENTION ,Keep retention on RAM S10 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " S9RETENTION ,Keep retention on RAM S9 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " S8RETENTION ,Keep retention on RAM S8 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " S7RETENTION ,Keep retention on RAM S7 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " S6RETENTION ,Keep retention on RAM S6 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " S5RETENTION ,Keep retention on RAM S5 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " S4RETENTION ,Keep retention on RAM S4 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " S3RETENTION ,Keep retention on RAM S3 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " S2RETENTION ,Keep retention on RAM S2 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " S1RETENTION ,Keep retention on RAM S1 when RAM is switched off" "Off,On"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " S0RETENTION ,Keep retention on RAM S0 when RAM is switched off" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " S15POWER ,Keep RAM section S15 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " S14POWER ,Keep RAM section S14 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " S13POWER ,Keep RAM section S13 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " S12POWER ,Keep RAM section S12 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " S11POWER ,Keep RAM section S11 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " S10POWER ,Keep RAM section S10 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " S9POWER ,Keep RAM section S9 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " S8POWER ,Keep RAM section S8 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " S7POWER ,Keep RAM section S7 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " S6POWER ,Keep RAM section S6 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " S5POWER ,Keep RAM section S5 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " S4POWER ,Keep RAM section S4 of RAMm on or off in System ON mode" "Off,On"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " S3POWER ,Keep RAM section S3 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " S2POWER ,Keep RAM section S2 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " S1POWER ,Keep RAM section S1 of RAMm on or off in System ON mode" "Off,On"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " S0POWER ,Keep RAM section S0 of RAMm on or off in System ON mode" "Off,On"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Clock management (CLOCK)"
|
|
base ad:0x40000000
|
|
width 15.
|
|
group.long 0x00++0x1B "TASKS"
|
|
line.long 0x00 "HFCLKSTART,Start HFCLK Crystal Oscillator"
|
|
line.long 0x04 "HFCLKSTOP,Stop HFCLK Crystal Oscillator"
|
|
line.long 0x08 "LFCLKSTART,Start LFCLK Source"
|
|
line.long 0x0C "LFCLKSTOP,Stop LFCLK Source"
|
|
line.long 0x10 "CAL,Start Calibration Of LFCLK RC Oscillator"
|
|
line.long 0x14 "CTSTART,Start Calibration Timer"
|
|
line.long 0x18 "CTSTOP,Stop Calibration Timer"
|
|
group.long 0x100++0x07 "EVENTS"
|
|
line.long 0x00 "HFCLKSTARTED,16 MHz Oscillator Started"
|
|
line.long 0x04 "LFCLKSTARTED,32 kHz Oscillator Started"
|
|
group.long 0x10C++0x07
|
|
line.long 0x00 "DONE,Calibration Of LFCLK RC Oscillator Complete Event"
|
|
line.long 0x04 "CTTO,Calibration Timer Timeout"
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " CTTO ,Enable interrupt on CTTO event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " DONE ,Enable interrupt on DONE event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " LFCLKSTARTED ,Enable interrupt on LFCLKSTARTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " HFCLKSTARTED ,Enable interrupt on HFCLKSTARTED event" "Disabled,Enabled"
|
|
rgroup.long 0x408++0x07
|
|
line.long 0x00 "HFCLKRUN,Status Indicating That HFCLKSTART Task Has Been Triggered"
|
|
bitfld.long 0x00 0. " STATUS ,HFCLKSTART task triggered or not" "Not triggered,Triggered"
|
|
line.long 0x04 "HFCLKSTAT,HFCLK Source Is Running"
|
|
bitfld.long 0x04 16. " STATE ,HFCLK state" "Not running,Running"
|
|
bitfld.long 0x04 0. " SRC ,Active clock source" "Rc,Xtal"
|
|
rgroup.long 0x414++0x0B
|
|
line.long 0x00 "LFCLKRUN,Status Indicating That LFCLKSTART Task Has Been triggered"
|
|
bitfld.long 0x00 0. " STATUS ,LFCLKSTART task triggered or not" "Not triggered,Triggered"
|
|
line.long 0x04 "LFCLKSTAT,LFCLK Clock Status Register"
|
|
bitfld.long 0x04 16. " STATE ,LFCLK state" "Not running,Running"
|
|
bitfld.long 0x04 0.--1. " SRC ,Active clock source" "32.768 kHz RC,32.768 kHz crystal,32.768 kHz synthesizer,?..."
|
|
line.long 0x08 "LFCLKSRCCOPY,Copy Of LFCLKSRC Register"
|
|
bitfld.long 0x08 0.--1. " SRC ,Active clock source" "32.768 kHz RC,32.768 kHz crystal,32.768 kHz synthesizer,?..."
|
|
sif (cpuis("NRF52810Q*")||cpuis("NRF52840QI"))
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "LFCLKSRC,Clock Source For The 32 kHz Clock"
|
|
bitfld.long 0x00 17. " EXTERNAL ,Enable or disable external source for LFCLK" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " BYPASS ,Enable or disable bypass of LFCLK crystal oscillator with external clock source" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SRC ,Clock source" "32.768 kHz RC,32.768 kHz crystal,32.768 kHz synthesizer,?..."
|
|
else
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "LFCLKSRC,Clock Source For The 32 kHz Clock"
|
|
bitfld.long 0x00 0.--1. " SRC ,Clock source" "32.768 kHz RC,32.768 kHz crystal,32.768 kHz synthesizer,?..."
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "HFXODEBOUNCE,HFXO Debounce Time"
|
|
hexmask.long.byte 0x00 0.--7. 1. " HFXODEBOUNCE ,HFXO debounce time"
|
|
endif
|
|
group.long 0x538++0x03
|
|
line.long 0x00 "CTIV,Calibration Timer Interval"
|
|
hexmask.long.byte 0x00 0.--6. 1. " CTIV ,Calibration timer interval in multiples"
|
|
sif !cpuis("NRF52810Q*")
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840QI"))
|
|
group.long 0x55C++0x03
|
|
line.long 0x00 "TRACECONFIG,Clocking Options For The Trace Port Debug Interface"
|
|
bitfld.long 0x00 16.--17. " TRACEMUX ,Pin multiplexing of trace signals" "GPIO,Serial,Parallel,?..."
|
|
bitfld.long 0x00 0.--1. " TRACEPORTSPEED ,Speed of trace port clock." "32MHz,16MHz,8MHz,4MHz"
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x5B4++0x03
|
|
line.long 0x00 "LFRCMODE,LFRC Mode Configuration"
|
|
bitfld.long 0x00 16. " STATUS ,Active LFRC mode" "Normal,Ultra-low power"
|
|
bitfld.long 0x00 0. " MODE ,Set LFRC mode" "Normal,Ultra-low power"
|
|
endif
|
|
else
|
|
group.long 0x550++0x03
|
|
line.long 0x00 "XTALFREQ,Crystal Frequency"
|
|
hexmask.long.byte 0x00 0.--7. 1. " XTALFREQ ,Select nominal frequency of external crystal for HFCLK"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "GPIO"
|
|
base ad:0x50000000
|
|
width 13.
|
|
group.long 0x504++0x03 "REGISTERS"
|
|
line.long 0x00 "OUT_SET/CLR,Write GPIO Port"
|
|
sif !cpuis("NRF52810QC")
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. "PIN[31] ,PIN31 driver set" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " [30] ,PIN30 driver set" "Low,High"
|
|
else
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "PIN[30] ,PIN30 driver set" "Low,High"
|
|
endif
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " [29] ,PIN29 driver set" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " [28] ,PIN28 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " [27] ,PIN27 driver set" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " [26] ,PIN26 driver set" "Low,High"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " [25] ,PIN25 driver set" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " [24] ,PIN24 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " [23] ,PIN23 driver set" "Low,High"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " [22] ,PIN22 driver set" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " [21] ,PIN21 driver set" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " [20] ,PIN20 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " [19] ,PIN19 driver set" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " [18] ,PIN18 driver set" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " [17] ,PIN17 driver set" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " [16] ,PIN16 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "PIN[15] ,PIN15 driver set" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,PIN14 driver set" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " [13] ,PIN13 driver set" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,PIN12 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " [11] ,PIN11 driver set" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,PIN10 driver set" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,PIN9 driver set" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " [8] ,PIN8 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " [7] ,PIN7 driver set" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,PIN6 driver set" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,PIN5 driver set" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,PIN4 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " [3] ,PIN3 driver set" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " [2] ,PIN2 driver set" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,PIN1 driver set" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,PIN0 driver set" "Low,High"
|
|
else
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "PIN[30] ,PIN30 driver set" "Low,High"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " [28] ,PIN28 driver set" "Low,High"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " [25] ,PIN25 driver set" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " [21] ,PIN21 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " [20] ,PIN20 driver set" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " [18] ,PIN18 driver set" "Low,High"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " [16] ,PIN16 driver set" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " [15] ,PIN15 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,PIN14 driver set" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,PIN12 driver set" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,PIN10 driver set" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,PIN9 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,PIN6 driver set" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,PIN5 driver set" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,PIN4 driver set" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,PIN1 driver set" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,PIN0 driver set" "Low,High"
|
|
endif
|
|
rgroup.long 0x510++0x03
|
|
line.long 0x00 "IN,Read GPIO Port"
|
|
sif !cpuis("NRF52810QC")
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 31. "PIN[31] ,PIN31 input set" "Low,High"
|
|
bitfld.long 0x00 30. " [30] ,PIN30 input set" "Low,High"
|
|
else
|
|
bitfld.long 0x00 30. "PIN[30] ,PIN30 input set" "Low,High"
|
|
endif
|
|
bitfld.long 0x00 29. " [29] ,PIN29 input set" "Low,High"
|
|
bitfld.long 0x00 28. " [28] ,PIN28 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,PIN27 input set" "Low,High"
|
|
bitfld.long 0x00 26. " [26] ,PIN26 input set" "Low,High"
|
|
bitfld.long 0x00 25. " [25] ,PIN25 input set" "Low,High"
|
|
bitfld.long 0x00 24. " [24] ,PIN24 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,PIN23 input set" "Low,High"
|
|
bitfld.long 0x00 22. " [22] ,PIN22 input set" "Low,High"
|
|
bitfld.long 0x00 21. " [21] ,PIN21 input set" "Low,High"
|
|
bitfld.long 0x00 20. " [20] ,PIN20 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,PIN19 input set" "Low,High"
|
|
bitfld.long 0x00 18. " [18] ,PIN18 input set" "Low,High"
|
|
bitfld.long 0x00 17. " [17] ,PIN17 input set" "Low,High"
|
|
bitfld.long 0x00 16. " [16] ,PIN16 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. "PIN[15] ,PIN15 input set" "Low,High"
|
|
bitfld.long 0x00 14. " [14] ,PIN14 input set" "Low,High"
|
|
bitfld.long 0x00 13. " [13] ,PIN13 input set" "Low,High"
|
|
bitfld.long 0x00 12. " [12] ,PIN12 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,PIN11 input set" "Low,High"
|
|
bitfld.long 0x00 10. " [10] ,PIN10 input set" "Low,High"
|
|
bitfld.long 0x00 9. " [9] ,PIN9 input set" "Low,High"
|
|
bitfld.long 0x00 8. " [8] ,PIN8 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,PIN7 input set" "Low,High"
|
|
bitfld.long 0x00 6. " [6] ,PIN6 input set" "Low,High"
|
|
bitfld.long 0x00 5. " [5] ,PIN5 input set" "Low,High"
|
|
bitfld.long 0x00 4. " [4] ,PIN4 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,PIN3 input set" "Low,High"
|
|
bitfld.long 0x00 2. " [2] ,PIN2 input set" "Low,High"
|
|
bitfld.long 0x00 1. " [1] ,PIN1 input set" "Low,High"
|
|
bitfld.long 0x00 0. " [0] ,PIN0 input set" "Low,High"
|
|
else
|
|
bitfld.long 0x00 30. "PIN[30] ,PIN30 input set" "Low,High"
|
|
bitfld.long 0x00 28. " [28] ,PIN28 input set" "Low,High"
|
|
bitfld.long 0x00 25. " [25] ,PIN25 input set" "Low,High"
|
|
bitfld.long 0x00 21. " [21] ,PIN21 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,PIN20 input set" "Low,High"
|
|
bitfld.long 0x00 18. " [18] ,PIN18 input set" "Low,High"
|
|
bitfld.long 0x00 16. " [16] ,PIN16 input set" "Low,High"
|
|
bitfld.long 0x00 15. " [15] ,PIN15 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,PIN14 input set" "Low,High"
|
|
bitfld.long 0x00 12. " [12] ,PIN12 input set" "Low,High"
|
|
bitfld.long 0x00 10. " [10] ,PIN10 input set" "Low,High"
|
|
bitfld.long 0x00 9. " [9] ,PIN9 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,PIN6 input set" "Low,High"
|
|
bitfld.long 0x00 5. " [5] ,PIN5 input set" "Low,High"
|
|
bitfld.long 0x00 4. " [4] ,PIN4 input set" "Low,High"
|
|
bitfld.long 0x00 1. " [1] ,PIN1 input set" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,PIN0 input set" "Low,High"
|
|
endif
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "DIR_SET/CLR,Direction Of GPIO Pins"
|
|
sif !cpuis("NRF52810QC")
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. "PIN[31] ,PIN31 direction set" "Input,Output"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " [30] ,PIN30 direction set" "Input,Output"
|
|
else
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "PIN[30] ,PIN30 direction set" "Input,Output"
|
|
endif
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " [29] ,PIN29 direction set" "Input,Output"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " [28] ,PIN28 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " [27] ,PIN27 direction set" "Input,Output"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " [26] ,PIN26 direction set" "Input,Output"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " [25] ,PIN25 direction set" "Input,Output"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " [24] ,PIN24 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " [23] ,PIN23 direction set" "Input,Output"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " [22] ,PIN22 direction set" "Input,Output"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " [21] ,PIN21 direction set" "Input,Output"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " [20] ,PIN20 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " [19] ,PIN19 direction set" "Input,Output"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " [18] ,PIN18 direction set" "Input,Output"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " [17] ,PIN17 direction set" "Input,Output"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " [16] ,PIN16 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "PIN[15] ,PIN15 direction set" "Input,Output"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,PIN14 direction set" "Input,Output"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " [13] ,PIN13 direction set" "Input,Output"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,PIN12 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " [11] ,PIN11 direction set" "Input,Output"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,PIN10 direction set" "Input,Output"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,PIN9 direction set" "Input,Output"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " [8] ,PIN8 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " [7] ,PIN7 direction set" "Input,Output"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,PIN6 direction set" "Input,Output"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,PIN5 direction set" "Input,Output"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,PIN4 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " [3] ,PIN3 direction set" "Input,Output"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " [2] ,PIN2 direction set" "Input,Output"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,PIN1 direction set" "Input,Output"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,PIN0 direction set" "Input,Output"
|
|
else
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "PIN[30] ,PIN30 direction set" "Input,Output"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " [28] ,PIN28 direction set" "Input,Output"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " [25] ,PIN25 direction set" "Input,Output"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " [21] ,PIN21 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " [20] ,PIN20 direction set" "Input,Output"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " [18] ,PIN18 direction set" "Input,Output"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " [16] ,PIN16 direction set" "Input,Output"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " [15] ,PIN15 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,PIN14 direction set" "Input,Output"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,PIN12 direction set" "Input,Output"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,PIN10 direction set" "Input,Output"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,PIN9 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,PIN6 direction set" "Input,Output"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,PIN5 direction set" "Input,Output"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,PIN4 direction set" "Input,Output"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,PIN1 direction set" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,PIN0 direction set" "Input,Output"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
group.long 0x520++0x07
|
|
line.long 0x00 "LATCH,GPIO Pins Met Criteria Set In PIN_CNF[n].SENSE Register"
|
|
sif !cpuis("NRF52810QC")
|
|
bitfld.long 0x00 31. "LATCH[31] ,Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 30. " [30] ,Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 29. " [29] ,Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 28. " [28] ,Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 26. " [26] ,Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 25. " [25] ,Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 24. " [24] ,Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 22. " [22] ,Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 21. " [21] ,Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 20. " [20] ,Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 18. " [18] ,Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 17. " [17] ,Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 16. " [16] ,Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 15. "LATCH[15] ,Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 14. " [14] ,Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 13. " [13] ,Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 12. " [12] ,Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 10. " [10] ,Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 9. " [9] ,Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 8. " [8] ,Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 6. " [6] ,Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 5. " [5] ,Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 4. " [4] ,Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 2. " [2] ,Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 1. " [1] ,Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 0. " [0] ,Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register" "Not met,Met"
|
|
else
|
|
bitfld.long 0x00 30. "LATCH[30] ,Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 28. " [28] ,Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 25. " [25] ,Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 21. " [21] ,Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 18. " [18] ,Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 16. " [16] ,Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 15. " [15] ,Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 12. " [12] ,Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 10. " [10] ,Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 9. " [9] ,Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 5. " [5] ,Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 4. " [4] ,Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register" "Not met,Met"
|
|
bitfld.long 0x00 1. " [1] ,Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register" "Not met,Met"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register" "Not met,Met"
|
|
endif
|
|
line.long 0x04 "DETECTMODE,Select Between Default DETECT Signal Behavior And LDETECT Mode"
|
|
bitfld.long 0x04 0. "DETECTMODE ,Select between default DETECT signal behavior and LDETECT mode" "Default,LDETECT"
|
|
endif
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "PIN_CNF[0],Configuration Of Pin 0"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x704++0x03
|
|
line.long 0x00 "PIN_CNF[1],Configuration Of Pin 1"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x708++0x03
|
|
line.long 0x00 "PIN_CNF[2],Configuration Of Pin 2"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x70C++0x03
|
|
line.long 0x00 "PIN_CNF[3],Configuration Of Pin 3"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "PIN_CNF[4],Configuration Of Pin 4"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x714++0x03
|
|
line.long 0x00 "PIN_CNF[5],Configuration Of Pin 5"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x718++0x03
|
|
line.long 0x00 "PIN_CNF[6],Configuration Of Pin 6"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x71C++0x03
|
|
line.long 0x00 "PIN_CNF[7],Configuration Of Pin 7"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x720++0x03
|
|
line.long 0x00 "PIN_CNF[8],Configuration Of Pin 8"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x724++0x03
|
|
line.long 0x00 "PIN_CNF[9],Configuration Of Pin 9"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x728++0x03
|
|
line.long 0x00 "PIN_CNF[10],Configuration Of Pin 10"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x72C++0x03
|
|
line.long 0x00 "PIN_CNF[11],Configuration Of Pin 11"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "PIN_CNF[12],Configuration Of Pin 12"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x734++0x03
|
|
line.long 0x00 "PIN_CNF[13],Configuration Of Pin 13"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x738++0x03
|
|
line.long 0x00 "PIN_CNF[14],Configuration Of Pin 14"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x73C++0x03
|
|
line.long 0x00 "PIN_CNF[15],Configuration Of Pin 15"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "PIN_CNF[16],Configuration Of Pin 16"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x744++0x03
|
|
line.long 0x00 "PIN_CNF[17],Configuration Of Pin 17"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x748++0x03
|
|
line.long 0x00 "PIN_CNF[18],Configuration Of Pin 18"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x74C++0x03
|
|
line.long 0x00 "PIN_CNF[19],Configuration Of Pin 19"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x750++0x03
|
|
line.long 0x00 "PIN_CNF[20],Configuration Of Pin 20"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x754++0x03
|
|
line.long 0x00 "PIN_CNF[21],Configuration Of Pin 21"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x758++0x03
|
|
line.long 0x00 "PIN_CNF[22],Configuration Of Pin 22"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x75C++0x03
|
|
line.long 0x00 "PIN_CNF[23],Configuration Of Pin 23"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x760++0x03
|
|
line.long 0x00 "PIN_CNF[24],Configuration Of Pin 24"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x764++0x03
|
|
line.long 0x00 "PIN_CNF[25],Configuration Of Pin 25"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x768++0x03
|
|
line.long 0x00 "PIN_CNF[26],Configuration Of Pin 26"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x76C++0x03
|
|
line.long 0x00 "PIN_CNF[27],Configuration Of Pin 27"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x770++0x03
|
|
line.long 0x00 "PIN_CNF[28],Configuration Of Pin 28"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x774++0x03
|
|
line.long 0x00 "PIN_CNF[29],Configuration Of Pin 29"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x778++0x03
|
|
line.long 0x00 "PIN_CNF[30],Configuration Of Pin 30"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x77C++0x03
|
|
line.long 0x00 "PIN_CNF[31],Configuration Of Pin 31"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "PIN_CNF[0],Configuration Of Pin 0"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x704++0x03
|
|
line.long 0x00 "PIN_CNF[1],Configuration Of Pin 1"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "PIN_CNF[4],Configuration Of Pin 4"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x714++0x03
|
|
line.long 0x00 "PIN_CNF[5],Configuration Of Pin 5"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x718++0x03
|
|
line.long 0x00 "PIN_CNF[6],Configuration Of Pin 6"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x724++0x03
|
|
line.long 0x00 "PIN_CNF[9],Configuration Of Pin 9"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x728++0x03
|
|
line.long 0x00 "PIN_CNF[10],Configuration Of Pin 10"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "PIN_CNF[12],Configuration Of Pin 12"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x738++0x03
|
|
line.long 0x00 "PIN_CNF[14],Configuration Of Pin 14"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x73C++0x03
|
|
line.long 0x00 "PIN_CNF[15],Configuration Of Pin 15"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "PIN_CNF[16],Configuration Of Pin 16"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x748++0x03
|
|
line.long 0x00 "PIN_CNF[18],Configuration Of Pin 18"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x750++0x03
|
|
line.long 0x00 "PIN_CNF[20],Configuration Of Pin 20"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x754++0x03
|
|
line.long 0x00 "PIN_CNF[21],Configuration Of Pin 21"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x764++0x03
|
|
line.long 0x00 "PIN_CNF[25],Configuration Of Pin 25"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x770++0x03
|
|
line.long 0x00 "PIN_CNF[28],Configuration Of Pin 28"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x778++0x03
|
|
line.long 0x00 "PIN_CNF[30],Configuration Of Pin 30"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
else
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "PIN_CNF[0],Configuration Of Pin 0"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x704++0x03
|
|
line.long 0x00 "PIN_CNF[1],Configuration Of Pin 1"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x708++0x03
|
|
line.long 0x00 "PIN_CNF[2],Configuration Of Pin 2"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x70C++0x03
|
|
line.long 0x00 "PIN_CNF[3],Configuration Of Pin 3"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "PIN_CNF[4],Configuration Of Pin 4"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x714++0x03
|
|
line.long 0x00 "PIN_CNF[5],Configuration Of Pin 5"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x718++0x03
|
|
line.long 0x00 "PIN_CNF[6],Configuration Of Pin 6"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x71C++0x03
|
|
line.long 0x00 "PIN_CNF[7],Configuration Of Pin 7"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x720++0x03
|
|
line.long 0x00 "PIN_CNF[8],Configuration Of Pin 8"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x724++0x03
|
|
line.long 0x00 "PIN_CNF[9],Configuration Of Pin 9"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x728++0x03
|
|
line.long 0x00 "PIN_CNF[10],Configuration Of Pin 10"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x72C++0x03
|
|
line.long 0x00 "PIN_CNF[11],Configuration Of Pin 11"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "PIN_CNF[12],Configuration Of Pin 12"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x734++0x03
|
|
line.long 0x00 "PIN_CNF[13],Configuration Of Pin 13"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x738++0x03
|
|
line.long 0x00 "PIN_CNF[14],Configuration Of Pin 14"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x73C++0x03
|
|
line.long 0x00 "PIN_CNF[15],Configuration Of Pin 15"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "PIN_CNF[16],Configuration Of Pin 16"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x744++0x03
|
|
line.long 0x00 "PIN_CNF[17],Configuration Of Pin 17"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x748++0x03
|
|
line.long 0x00 "PIN_CNF[18],Configuration Of Pin 18"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x74C++0x03
|
|
line.long 0x00 "PIN_CNF[19],Configuration Of Pin 19"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x750++0x03
|
|
line.long 0x00 "PIN_CNF[20],Configuration Of Pin 20"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x754++0x03
|
|
line.long 0x00 "PIN_CNF[21],Configuration Of Pin 21"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x758++0x03
|
|
line.long 0x00 "PIN_CNF[22],Configuration Of Pin 22"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x75C++0x03
|
|
line.long 0x00 "PIN_CNF[23],Configuration Of Pin 23"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x760++0x03
|
|
line.long 0x00 "PIN_CNF[24],Configuration Of Pin 24"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x764++0x03
|
|
line.long 0x00 "PIN_CNF[25],Configuration Of Pin 25"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x768++0x03
|
|
line.long 0x00 "PIN_CNF[26],Configuration Of Pin 26"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x76C++0x03
|
|
line.long 0x00 "PIN_CNF[27],Configuration Of Pin 27"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x770++0x03
|
|
line.long 0x00 "PIN_CNF[28],Configuration Of Pin 28"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x774++0x03
|
|
line.long 0x00 "PIN_CNF[29],Configuration Of Pin 29"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
group.long 0x778++0x03
|
|
line.long 0x00 "PIN_CNF[30],Configuration Of Pin 30"
|
|
bitfld.long 0x00 16.--17. "SENSE ,Pin sensing mechanism" "Disabled,,High,Low"
|
|
bitfld.long 0x00 8.--10. " DRIVE ,Drive option" "S0S1,H0S1,S0H1,H0H1,D0S1,D0H1,S0D1,H0D1"
|
|
bitfld.long 0x00 2.--3. " PULL ,Pull option" "No pull,Pull down,,Pull up"
|
|
bitfld.long 0x00 1. " INPUT ,Connect or disconnect input buffer" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.long 0x00 0. "DIR ,Pin direction" "Input,Output"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "GPIO tasks and events (GPIOTE)"
|
|
base ad:0x40006000
|
|
width 15.
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
group.long (0x0+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[0],Task For Writing To Pin Specified By PSEL In CONFIG[0]"
|
|
group.long (0x0+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[0],Task For Writing To Pin Specified By PSEL In CONFIG[0] (Action On Pin Is To Set It High)"
|
|
group.long (0x0+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[0],Task For Writing To Pin Specified By PSEL In CONFIG[0] (Action On Pin Is To Set It Low)"
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[0],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0x4+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[1],Task For Writing To Pin Specified By PSEL In CONFIG[1]"
|
|
group.long (0x4+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[1],Task For Writing To Pin Specified By PSEL In CONFIG[1] (Action On Pin Is To Set It High)"
|
|
group.long (0x4+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[1],Task For Writing To Pin Specified By PSEL In CONFIG[1] (Action On Pin Is To Set It Low)"
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[1],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0x8+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[2],Task For Writing To Pin Specified By PSEL In CONFIG[2]"
|
|
group.long (0x8+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[2],Task For Writing To Pin Specified By PSEL In CONFIG[2] (Action On Pin Is To Set It High)"
|
|
group.long (0x8+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[2],Task For Writing To Pin Specified By PSEL In CONFIG[2] (Action On Pin Is To Set It Low)"
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[2],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0xC+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[3],Task For Writing To Pin Specified By PSEL In CONFIG[3]"
|
|
group.long (0xC+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[3],Task For Writing To Pin Specified By PSEL In CONFIG[3] (Action On Pin Is To Set It High)"
|
|
group.long (0xC+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[3],Task For Writing To Pin Specified By PSEL In CONFIG[3] (Action On Pin Is To Set It Low)"
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[3],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0x10+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[4],Task For Writing To Pin Specified By PSEL In CONFIG[4]"
|
|
group.long (0x10+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[4],Task For Writing To Pin Specified By PSEL In CONFIG[4] (Action On Pin Is To Set It High)"
|
|
group.long (0x10+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[4],Task For Writing To Pin Specified By PSEL In CONFIG[4] (Action On Pin Is To Set It Low)"
|
|
group.long (0x10+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[4],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0x14+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[5],Task For Writing To Pin Specified By PSEL In CONFIG[5]"
|
|
group.long (0x14+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[5],Task For Writing To Pin Specified By PSEL In CONFIG[5] (Action On Pin Is To Set It High)"
|
|
group.long (0x14+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[5],Task For Writing To Pin Specified By PSEL In CONFIG[5] (Action On Pin Is To Set It Low)"
|
|
group.long (0x14+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[5],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0x18+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[6],Task For Writing To Pin Specified By PSEL In CONFIG[6]"
|
|
group.long (0x18+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[6],Task For Writing To Pin Specified By PSEL In CONFIG[6] (Action On Pin Is To Set It High)"
|
|
group.long (0x18+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[6],Task For Writing To Pin Specified By PSEL In CONFIG[6] (Action On Pin Is To Set It Low)"
|
|
group.long (0x18+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[6],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
group.long (0x1C+0x00)++0x03
|
|
line.long 0x00 "TASKS_OUT[7],Task For Writing To Pin Specified By PSEL In CONFIG[7]"
|
|
group.long (0x1C+0x30)++0x03
|
|
line.long 0x00 "TASKS_SET[7],Task For Writing To Pin Specified By PSEL In CONFIG[7] (Action On Pin Is To Set It High)"
|
|
group.long (0x1C+0x60)++0x03
|
|
line.long 0x00 "TASKS_CLR[7],Task For Writing To Pin Specified By PSEL In CONFIG[7] (Action On Pin Is To Set It Low)"
|
|
group.long (0x1C+0x100)++0x03
|
|
line.long 0x00 "EVENTS_IN[7],Event Generated From Pin Specified In CONFIG[0].PSEL"
|
|
else
|
|
group.long (0x0+0x00)++0x03
|
|
line.long 0x00 "OUT[0],Task For Writing To Pin Specified By PSEL In CONFIG[0]"
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "IN[0],Event Generated From Pin Specified By PSEL In CONFIG[0]"
|
|
group.long (0x4+0x00)++0x03
|
|
line.long 0x00 "OUT[1],Task For Writing To Pin Specified By PSEL In CONFIG[1]"
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "IN[1],Event Generated From Pin Specified By PSEL In CONFIG[1]"
|
|
group.long (0x8+0x00)++0x03
|
|
line.long 0x00 "OUT[2],Task For Writing To Pin Specified By PSEL In CONFIG[2]"
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "IN[2],Event Generated From Pin Specified By PSEL In CONFIG[2]"
|
|
group.long (0xC+0x00)++0x03
|
|
line.long 0x00 "OUT[3],Task For Writing To Pin Specified By PSEL In CONFIG[3]"
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "IN[3],Event Generated From Pin Specified By PSEL In CONFIG[3]"
|
|
endif
|
|
group.long 0x17C++0x03
|
|
line.long 0x00 "EVENTS_PORT,Event Generate From Multiple Input Pins"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN_SET/CLR,Enable Interrupt Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x04 31. " PORT ,PORT event interrupt enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " IN[7] ,IN[7] event interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,IN[6] event interrupt enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,IN[5] event interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,IN[4] event interrupt enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,IN[3] event interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,IN[2] event interrupt enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,IN[1] event interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,IN[0] event interrupt enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN_SET/CLR,Enable Interrupt Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " PORT ,PORT event interrupt enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " IN[3] ,IN[3] event interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " [2] ,IN[2] event interrupt enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,IN[1] event interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,IN[0] event interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
if (((per.l(ad:0x40006000+0x510))&0x03)==0x03)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x510))&0x01)==0x01)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on inputk" ",Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x514))&0x03)==0x03)
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x514))&0x01)==0x01)
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on inputk" ",Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x518))&0x03)==0x03)
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x518))&0x01)==0x01)
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on inputk" ",Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x51C))&0x03)==0x03)
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x51C))&0x01)==0x01)
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on inputk" ",Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x520))&0x03)==0x03)
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "CONFIG[4],Configuration For OUT[4] Task And IN[4] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x520))&0x01)==0x01)
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "CONFIG[4],Configuration For OUT[4] Task And IN[4] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on inputk" ",Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "CONFIG[4],Configuration For OUT[4] Task And IN[4] Event"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x524))&0x03)==0x03)
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "CONFIG[5],Configuration For OUT[5] Task And IN[5] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x524))&0x01)==0x01)
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "CONFIG[5],Configuration For OUT[5] Task And IN[5] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on inputk" ",Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "CONFIG[5],Configuration For OUT[5] Task And IN[5] Event"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x528))&0x03)==0x03)
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "CONFIG[6],Configuration For OUT[6] Task And IN[6] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x528))&0x01)==0x01)
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "CONFIG[6],Configuration For OUT[6] Task And IN[6] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on inputk" ",Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "CONFIG[6],Configuration For OUT[6] Task And IN[6] Event"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x52C))&0x03)==0x03)
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "CONFIG[7],Configuration For OUT[7] Task And IN[7] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x52C))&0x01)==0x01)
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "CONFIG[7],Configuration For OUT[7] Task And IN[7] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on inputk" ",Rising edge,Falling edge,Any change"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "CONFIG[7],Configuration For OUT[7] Task And IN[7] Event"
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40006000+0x510))&0x03)==0x03)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x510))&0x01)==0x01)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation on input that shall trigger IN[0] event" ",Rising edge,Falling edge,Any change"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "CONFIG[0],Configuration For OUT[0] Task And IN[0] Event"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x514))&0x03)==0x03)
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x514))&0x01)==0x01)
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation on input that shall trigger IN[1] event" ",Rising edge,Falling edge,Any change"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "CONFIG[1],Configuration For OUT[1] Task And IN[1] Event"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x518))&0x03)==0x03)
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x518))&0x01)==0x01)
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation on input that shall trigger IN[2] event" ",Rising edge,Falling edge,Any change"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "CONFIG[2],Configuration For OUT[2] Task And IN[2] Event"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
if (((per.l(ad:0x40006000+0x51C))&0x03)==0x03)
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
bitfld.long 0x00 20. " OUTINIT ,Initial value of the output" "Low,High"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation to be performed on output" ",Set pin,Clear pin,Toggle pin"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
elif (((per.l(ad:0x40006000+0x51C))&0x01)==0x01)
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
bitfld.long 0x00 16.--17. " POLARITY ,Operation on input that shall trigger IN[3] event" ",Rising edge,Falling edge,Any change"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
else
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "CONFIG[3],Configuration For OUT[3] Task And IN[3] Event"
|
|
textline " "
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF51822CTAC")||cpuis("NRF51822CTAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 8.--12. " PSEL ,Pin number associated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MODE ,Mode" "Disabled,Event,,Task"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Programmable Peripheral Interconnect (PPI)"
|
|
base ad:0x4001F000
|
|
width 14.
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
group.long 0x0++0x07 "TASKS"
|
|
line.long 0x00 "CHG[0]EN,Enable Channel Group 0"
|
|
line.long 0x04 "CHG[0]DIS,Disable Channel Group 0"
|
|
group.long 0x8++0x07 "TASKS"
|
|
line.long 0x00 "CHG[1]EN,Enable Channel Group 1"
|
|
line.long 0x04 "CHG[1]DIS,Disable Channel Group 1"
|
|
group.long 0x10++0x07 "TASKS"
|
|
line.long 0x00 "CHG[2]EN,Enable Channel Group 2"
|
|
line.long 0x04 "CHG[2]DIS,Disable Channel Group 2"
|
|
group.long 0x18++0x07 "TASKS"
|
|
line.long 0x00 "CHG[3]EN,Enable Channel Group 3"
|
|
line.long 0x04 "CHG[3]DIS,Disable Channel Group 3"
|
|
group.long 0x20++0x07 "TASKS"
|
|
line.long 0x00 "CHG[4]EN,Enable Channel Group 4"
|
|
line.long 0x04 "CHG[4]DIS,Disable Channel Group 4"
|
|
group.long 0x28++0x07 "TASKS"
|
|
line.long 0x00 "CHG[5]EN,Enable Channel Group 5"
|
|
line.long 0x04 "CHG[5]DIS,Disable Channel Group 5"
|
|
else
|
|
group.long 0x0++0x07
|
|
line.long 0x00 "CHG[0]EN,Enable Channel Group 0"
|
|
line.long 0x04 "CHG[0]DIS,Disable Channel Group 0"
|
|
group.long 0x8++0x07
|
|
line.long 0x00 "CHG[1]EN,Enable Channel Group 1"
|
|
line.long 0x04 "CHG[1]DIS,Disable Channel Group 1"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "CHG[2]EN,Enable Channel Group 2"
|
|
line.long 0x04 "CHG[2]DIS,Disable Channel Group 2"
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "CHG[3]EN,Enable Channel Group 3"
|
|
line.long 0x04 "CHG[3]DIS,Disable Channel Group 3"
|
|
endif
|
|
sif !cpuis("NRF52810QC")
|
|
group.long 0x500++0x03 "REGISTERS"
|
|
line.long 0x00 "CHEN_SET/CLR,Channel Enable"
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CH[31] ,Enable channel 31" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " [30] ,Enable channel 30" "Disabled,Enabled"
|
|
else
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " CH[30] ,Enable channel 30" "Disabled,Enabled"
|
|
endif
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " [29] ,Enable channel 29" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " [28] ,Enable channel 28" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " [27] ,Enable channel 27" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " [26] ,Enable channel 26" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " [25] ,Enable channel 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " [24] ,Enable channel 24" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " [23] ,Enable channel 23" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " [22] ,Enable channel 22" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " [21] ,Enable channel 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " [20] ,Enable channel 20" "Disabled,Enabled"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " [19] ,Enable channel 19" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " [18] ,Enable channel 18" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " [17] ,Enable channel 17" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " [16] ,Enable channel 16" "Disabled,Enabled"
|
|
endif
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " [15] ,Enable channel 15" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,Enable channel 14" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " [13] ,Enable channel 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,Enable channel 12" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " [11] ,Enable channel 11" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,Enable channel 10" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,Enable channel 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " [8] ,Enable channel 8" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " [7] ,Enable channel 7" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,Enable channel 6" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,Enable channel 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,Enable channel 4" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " [3] ,Enable channel 3" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " [2] ,Enable channel 2" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,Enable channel 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,Enable channel 0" "Disabled,Enabled"
|
|
else
|
|
group.long 0x500++0x03 "REGISTERS"
|
|
line.long 0x00 "CHEN_SET/CLR,Channel Enable"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " CH[30] ,Enable channel 30" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " [28] ,Enable channel 28" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " [25] ,Enable channel 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " [21] ,Enable channel 21" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " [20] ,Enable channel 20" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " [18] ,Enable channel 18" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " [16] ,Enable channel 16" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " [15] ,Enable channel 15" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,Enable channel 14" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,Enable channel 12" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,Enable channel 10" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,Enable channel 9" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,Enable channel 6" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,Enable channel 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,Enable channel 4" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,Enable channel 1" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,Enable channel 0" "Disabled,Enabled"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
group.long 0x510++0x07
|
|
line.long 0x00 "CH[0]EEP,Channel 0 Event Endpoint"
|
|
line.long 0x04 "CH[0]TEP,Channel 0 Task Endpoint"
|
|
group.long 0x518++0x07
|
|
line.long 0x00 "CH[1]EEP,Channel 1 Event Endpoint"
|
|
line.long 0x04 "CH[1]TEP,Channel 1 Task Endpoint"
|
|
group.long 0x520++0x07
|
|
line.long 0x00 "CH[2]EEP,Channel 2 Event Endpoint"
|
|
line.long 0x04 "CH[2]TEP,Channel 2 Task Endpoint"
|
|
group.long 0x528++0x07
|
|
line.long 0x00 "CH[3]EEP,Channel 3 Event Endpoint"
|
|
line.long 0x04 "CH[3]TEP,Channel 3 Task Endpoint"
|
|
group.long 0x530++0x07
|
|
line.long 0x00 "CH[4]EEP,Channel 4 Event Endpoint"
|
|
line.long 0x04 "CH[4]TEP,Channel 4 Task Endpoint"
|
|
group.long 0x538++0x07
|
|
line.long 0x00 "CH[5]EEP,Channel 5 Event Endpoint"
|
|
line.long 0x04 "CH[5]TEP,Channel 5 Task Endpoint"
|
|
group.long 0x540++0x07
|
|
line.long 0x00 "CH[6]EEP,Channel 6 Event Endpoint"
|
|
line.long 0x04 "CH[6]TEP,Channel 6 Task Endpoint"
|
|
group.long 0x548++0x07
|
|
line.long 0x00 "CH[7]EEP,Channel 7 Event Endpoint"
|
|
line.long 0x04 "CH[7]TEP,Channel 7 Task Endpoint"
|
|
group.long 0x550++0x07
|
|
line.long 0x00 "CH[8]EEP,Channel 8 Event Endpoint"
|
|
line.long 0x04 "CH[8]TEP,Channel 8 Task Endpoint"
|
|
group.long 0x558++0x07
|
|
line.long 0x00 "CH[9]EEP,Channel 9 Event Endpoint"
|
|
line.long 0x04 "CH[9]TEP,Channel 9 Task Endpoint"
|
|
group.long 0x560++0x07
|
|
line.long 0x00 "CH[10]EEP,Channel 10 Event Endpoint"
|
|
line.long 0x04 "CH[10]TEP,Channel 10 Task Endpoint"
|
|
group.long 0x568++0x07
|
|
line.long 0x00 "CH[11]EEP,Channel 11 Event Endpoint"
|
|
line.long 0x04 "CH[11]TEP,Channel 11 Task Endpoint"
|
|
group.long 0x570++0x07
|
|
line.long 0x00 "CH[12]EEP,Channel 12 Event Endpoint"
|
|
line.long 0x04 "CH[12]TEP,Channel 12 Task Endpoint"
|
|
group.long 0x578++0x07
|
|
line.long 0x00 "CH[13]EEP,Channel 13 Event Endpoint"
|
|
line.long 0x04 "CH[13]TEP,Channel 13 Task Endpoint"
|
|
group.long 0x580++0x07
|
|
line.long 0x00 "CH[14]EEP,Channel 14 Event Endpoint"
|
|
line.long 0x04 "CH[14]TEP,Channel 14 Task Endpoint"
|
|
group.long 0x588++0x07
|
|
line.long 0x00 "CH[15]EEP,Channel 15 Event Endpoint"
|
|
line.long 0x04 "CH[15]TEP,Channel 15 Task Endpoint"
|
|
group.long 0x590++0x07
|
|
line.long 0x00 "CH[16]EEP,Channel 16 Event Endpoint"
|
|
line.long 0x04 "CH[16]TEP,Channel 16 Task Endpoint"
|
|
group.long 0x598++0x07
|
|
line.long 0x00 "CH[17]EEP,Channel 17 Event Endpoint"
|
|
line.long 0x04 "CH[17]TEP,Channel 17 Task Endpoint"
|
|
group.long 0x5A0++0x07
|
|
line.long 0x00 "CH[18]EEP,Channel 18 Event Endpoint"
|
|
line.long 0x04 "CH[18]TEP,Channel 18 Task Endpoint"
|
|
group.long 0x5A8++0x07
|
|
line.long 0x00 "CH[19]EEP,Channel 19 Event Endpoint"
|
|
line.long 0x04 "CH[19]TEP,Channel 19 Task Endpoint"
|
|
else
|
|
group.long 0x510++0x07
|
|
line.long 0x00 "CH[0]EEP,Channel 0 Event Endpoint"
|
|
line.long 0x04 "CH[0]TEP,Channel 0 Task Endpoint"
|
|
group.long 0x518++0x07
|
|
line.long 0x00 "CH[1]EEP,Channel 1 Event Endpoint"
|
|
line.long 0x04 "CH[1]TEP,Channel 1 Task Endpoint"
|
|
group.long 0x520++0x07
|
|
line.long 0x00 "CH[2]EEP,Channel 2 Event Endpoint"
|
|
line.long 0x04 "CH[2]TEP,Channel 2 Task Endpoint"
|
|
group.long 0x528++0x07
|
|
line.long 0x00 "CH[3]EEP,Channel 3 Event Endpoint"
|
|
line.long 0x04 "CH[3]TEP,Channel 3 Task Endpoint"
|
|
group.long 0x530++0x07
|
|
line.long 0x00 "CH[4]EEP,Channel 4 Event Endpoint"
|
|
line.long 0x04 "CH[4]TEP,Channel 4 Task Endpoint"
|
|
group.long 0x538++0x07
|
|
line.long 0x00 "CH[5]EEP,Channel 5 Event Endpoint"
|
|
line.long 0x04 "CH[5]TEP,Channel 5 Task Endpoint"
|
|
group.long 0x540++0x07
|
|
line.long 0x00 "CH[6]EEP,Channel 6 Event Endpoint"
|
|
line.long 0x04 "CH[6]TEP,Channel 6 Task Endpoint"
|
|
group.long 0x548++0x07
|
|
line.long 0x00 "CH[7]EEP,Channel 7 Event Endpoint"
|
|
line.long 0x04 "CH[7]TEP,Channel 7 Task Endpoint"
|
|
group.long 0x550++0x07
|
|
line.long 0x00 "CH[8]EEP,Channel 8 Event Endpoint"
|
|
line.long 0x04 "CH[8]TEP,Channel 8 Task Endpoint"
|
|
group.long 0x558++0x07
|
|
line.long 0x00 "CH[9]EEP,Channel 9 Event Endpoint"
|
|
line.long 0x04 "CH[9]TEP,Channel 9 Task Endpoint"
|
|
group.long 0x560++0x07
|
|
line.long 0x00 "CH[10]EEP,Channel 10 Event Endpoint"
|
|
line.long 0x04 "CH[10]TEP,Channel 10 Task Endpoint"
|
|
group.long 0x568++0x07
|
|
line.long 0x00 "CH[11]EEP,Channel 11 Event Endpoint"
|
|
line.long 0x04 "CH[11]TEP,Channel 11 Task Endpoint"
|
|
group.long 0x570++0x07
|
|
line.long 0x00 "CH[12]EEP,Channel 12 Event Endpoint"
|
|
line.long 0x04 "CH[12]TEP,Channel 12 Task Endpoint"
|
|
group.long 0x578++0x07
|
|
line.long 0x00 "CH[13]EEP,Channel 13 Event Endpoint"
|
|
line.long 0x04 "CH[13]TEP,Channel 13 Task Endpoint"
|
|
group.long 0x580++0x07
|
|
line.long 0x00 "CH[14]EEP,Channel 14 Event Endpoint"
|
|
line.long 0x04 "CH[14]TEP,Channel 14 Task Endpoint"
|
|
group.long 0x588++0x07
|
|
line.long 0x00 "CH[15]EEP,Channel 15 Event Endpoint"
|
|
line.long 0x04 "CH[15]TEP,Channel 15 Task Endpoint"
|
|
endif
|
|
sif !cpuis("NRF52810QC")
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "CHG[0],Channel Group 0"
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 31. " CH[31] ,Include channel 31 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 30. " [30] ,Include channel 30 in group 0" "Excluded,Included"
|
|
else
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 0" "Excluded,Included"
|
|
endif
|
|
bitfld.long 0x00 29. " [29] ,Include channel 29 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Include channel 27 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 26. " [26] ,Include channel 26 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 24. " [24] ,Include channel 24 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Include channel 23 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 22. " [22] ,Include channel 22 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 0" "Excluded,Included"
|
|
textline " "
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 19. " [19] ,Include channel 19 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 17. " [17] ,Include channel 17 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 0" "Excluded,Included"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 13. " [13] ,Include channel 13 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Include channel 11 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 8. " [8] ,Include channel 8 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Include channel 7 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Include channel 3 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 2. " [2] ,Include channel 2 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 0" "Excluded,Included"
|
|
else
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "CHG[0],Channel Group 0"
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 0" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 0" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 0" "Excluded,Included"
|
|
endif
|
|
sif !cpuis("NRF52810QC")
|
|
group.long 0x804++0x03
|
|
line.long 0x00 "CHG[1],Channel Group 1"
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 31. " CH[31] ,Include channel 31 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 30. " [30] ,Include channel 30 in group 1" "Excluded,Included"
|
|
else
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 1" "Excluded,Included"
|
|
endif
|
|
bitfld.long 0x00 29. " [29] ,Include channel 29 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Include channel 27 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 26. " [26] ,Include channel 26 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 24. " [24] ,Include channel 24 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Include channel 23 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 22. " [22] ,Include channel 22 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 1" "Excluded,Included"
|
|
textline " "
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 19. " [19] ,Include channel 19 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 17. " [17] ,Include channel 17 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 1" "Excluded,Included"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 13. " [13] ,Include channel 13 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Include channel 11 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 8. " [8] ,Include channel 8 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Include channel 7 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Include channel 3 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 2. " [2] ,Include channel 2 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 1" "Excluded,Included"
|
|
else
|
|
group.long 0x804++0x03
|
|
line.long 0x00 "CHG[1],Channel Group 1"
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 1" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 1" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 1" "Excluded,Included"
|
|
endif
|
|
sif !cpuis("NRF52810QC")
|
|
group.long 0x808++0x03
|
|
line.long 0x00 "CHG[2],Channel Group 2"
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 31. " CH[31] ,Include channel 31 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 30. " [30] ,Include channel 30 in group 2" "Excluded,Included"
|
|
else
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 2" "Excluded,Included"
|
|
endif
|
|
bitfld.long 0x00 29. " [29] ,Include channel 29 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Include channel 27 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 26. " [26] ,Include channel 26 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 24. " [24] ,Include channel 24 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Include channel 23 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 22. " [22] ,Include channel 22 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 2" "Excluded,Included"
|
|
textline " "
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 19. " [19] ,Include channel 19 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 17. " [17] ,Include channel 17 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 2" "Excluded,Included"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 13. " [13] ,Include channel 13 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Include channel 11 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 8. " [8] ,Include channel 8 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Include channel 7 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Include channel 3 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 2. " [2] ,Include channel 2 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 2" "Excluded,Included"
|
|
else
|
|
group.long 0x808++0x03
|
|
line.long 0x00 "CHG[2],Channel Group 2"
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 2" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 2" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 2" "Excluded,Included"
|
|
endif
|
|
sif !cpuis("NRF52810QC")
|
|
group.long 0x80C++0x03
|
|
line.long 0x00 "CHG[3],Channel Group 3"
|
|
sif cpuis("NRF51422CDAB")||cpuis("NRF51422CEAA")||cpuis("NRF51422CFAC")||cpuis("NRF51822CDAB")||cpuis("NRF51822CEAA")||cpuis("NRF51822CFAC")||cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822CTAA")||cpuis("NRF51822CTAC")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 31. " CH[31] ,Include channel 31 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 30. " [30] ,Include channel 30 in group 3" "Excluded,Included"
|
|
else
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 3" "Excluded,Included"
|
|
endif
|
|
bitfld.long 0x00 29. " [29] ,Include channel 29 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Include channel 27 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 26. " [26] ,Include channel 26 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 24. " [24] ,Include channel 24 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Include channel 23 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 22. " [22] ,Include channel 22 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 3" "Excluded,Included"
|
|
textline " "
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 19. " [19] ,Include channel 19 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 17. " [17] ,Include channel 17 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 3" "Excluded,Included"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 13. " [13] ,Include channel 13 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Include channel 11 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 8. " [8] ,Include channel 8 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Include channel 7 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Include channel 3 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 2. " [2] ,Include channel 2 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 3" "Excluded,Included"
|
|
else
|
|
group.long 0x80C++0x03
|
|
line.long 0x00 "CHG[3],Channel Group 3"
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 3" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 3" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 3" "Excluded,Included"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
sif !cpuis("NRF52810QC")
|
|
group.long 0x810++0x03
|
|
line.long 0x00 "CHG[4],Channel Group 4"
|
|
bitfld.long 0x00 31. " CH[31] ,Include channel 31 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 30. " [30] ,Include channel 30 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 29. " [29] ,Include channel 29 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Include channel 27 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 26. " [26] ,Include channel 26 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 24. " [24] ,Include channel 24 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Include channel 23 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 22. " [22] ,Include channel 22 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 4" "Excluded,Included"
|
|
textline " "
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 19. " [19] ,Include channel 19 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 17. " [17] ,Include channel 17 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 4" "Excluded,Included"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 13. " [13] ,Include channel 13 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Include channel 11 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 8. " [8] ,Include channel 8 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Include channel 7 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Include channel 3 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 2. " [2] ,Include channel 2 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 4" "Excluded,Included"
|
|
else
|
|
group.long 0x810++0x03
|
|
line.long 0x00 "CHG[4],Channel Group 4"
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 4" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 4" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 4" "Excluded,Included"
|
|
endif
|
|
sif !cpuis("NRF52810QC")
|
|
group.long 0x814++0x03
|
|
line.long 0x00 "CHG[5],Channel Group 5"
|
|
bitfld.long 0x00 31. " CH[31] ,Include channel 31 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 30. " [30] ,Include channel 30 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 29. " [29] ,Include channel 29 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Include channel 27 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 26. " [26] ,Include channel 26 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 24. " [24] ,Include channel 24 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Include channel 23 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 22. " [22] ,Include channel 22 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 5" "Excluded,Included"
|
|
textline " "
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 19. " [19] ,Include channel 19 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 17. " [17] ,Include channel 17 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 5" "Excluded,Included"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 13. " [13] ,Include channel 13 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Include channel 11 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 8. " [8] ,Include channel 8 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Include channel 7 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Include channel 3 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 2. " [2] ,Include channel 2 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 5" "Excluded,Included"
|
|
else
|
|
group.long 0x814++0x03
|
|
line.long 0x00 "CHG[5],Channel Group 5"
|
|
bitfld.long 0x00 30. " CH[30] ,Include channel 30 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 28. " [28] ,Include channel 28 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 25. " [25] ,Include channel 25 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 21. " [21] ,Include channel 21 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Include channel 20 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 18. " [18] ,Include channel 18 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 16. " [16] ,Include channel 16 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 15. " [15] ,Include channel 15 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Include channel 14 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 12. " [12] ,Include channel 12 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 10. " [10] ,Include channel 10 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 9. " [9] ,Include channel 9 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Include channel 6 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 5. " [5] ,Include channel 5 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 4. " [4] ,Include channel 4 in group 5" "Excluded,Included"
|
|
bitfld.long 0x00 1. " [1] ,Include channel 1 in group 5" "Excluded,Included"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Include channel 0 in group 5" "Excluded,Included"
|
|
endif
|
|
sif !cpuis("NRF52810QC")
|
|
group.long 0x910++0x03
|
|
line.long 0x00 "FORK[0].TEP,Channel 0 Task End-Point"
|
|
group.long 0x914++0x03
|
|
line.long 0x00 "FORK[1].TEP,Channel 1 Task End-Point"
|
|
group.long 0x918++0x03
|
|
line.long 0x00 "FORK[2].TEP,Channel 2 Task End-Point"
|
|
group.long 0x91C++0x03
|
|
line.long 0x00 "FORK[3].TEP,Channel 3 Task End-Point"
|
|
group.long 0x920++0x03
|
|
line.long 0x00 "FORK[4].TEP,Channel 4 Task End-Point"
|
|
group.long 0x924++0x03
|
|
line.long 0x00 "FORK[5].TEP,Channel 5 Task End-Point"
|
|
group.long 0x928++0x03
|
|
line.long 0x00 "FORK[6].TEP,Channel 6 Task End-Point"
|
|
group.long 0x92C++0x03
|
|
line.long 0x00 "FORK[7].TEP,Channel 7 Task End-Point"
|
|
group.long 0x930++0x03
|
|
line.long 0x00 "FORK[8].TEP,Channel 8 Task End-Point"
|
|
group.long 0x934++0x03
|
|
line.long 0x00 "FORK[9].TEP,Channel 9 Task End-Point"
|
|
group.long 0x938++0x03
|
|
line.long 0x00 "FORK[10].TEP,Channel 10 Task End-Point"
|
|
group.long 0x93C++0x03
|
|
line.long 0x00 "FORK[11].TEP,Channel 11 Task End-Point"
|
|
group.long 0x940++0x03
|
|
line.long 0x00 "FORK[12].TEP,Channel 12 Task End-Point"
|
|
group.long 0x944++0x03
|
|
line.long 0x00 "FORK[13].TEP,Channel 13 Task End-Point"
|
|
group.long 0x948++0x03
|
|
line.long 0x00 "FORK[14].TEP,Channel 14 Task End-Point"
|
|
group.long 0x94C++0x03
|
|
line.long 0x00 "FORK[15].TEP,Channel 15 Task End-Point"
|
|
group.long 0x950++0x03
|
|
line.long 0x00 "FORK[16].TEP,Channel 16 Task End-Point"
|
|
group.long 0x954++0x03
|
|
line.long 0x00 "FORK[17].TEP,Channel 17 Task End-Point"
|
|
group.long 0x958++0x03
|
|
line.long 0x00 "FORK[18].TEP,Channel 18 Task End-Point"
|
|
group.long 0x95C++0x03
|
|
line.long 0x00 "FORK[19].TEP,Channel 19 Task End-Point"
|
|
group.long 0x960++0x03
|
|
line.long 0x00 "FORK[20].TEP,Channel 20 Task End-Point"
|
|
group.long 0x964++0x03
|
|
line.long 0x00 "FORK[21].TEP,Channel 21 Task End-Point"
|
|
group.long 0x968++0x03
|
|
line.long 0x00 "FORK[22].TEP,Channel 22 Task End-Point"
|
|
group.long 0x96C++0x03
|
|
line.long 0x00 "FORK[23].TEP,Channel 23 Task End-Point"
|
|
group.long 0x970++0x03
|
|
line.long 0x00 "FORK[24].TEP,Channel 24 Task End-Point"
|
|
group.long 0x974++0x03
|
|
line.long 0x00 "FORK[25].TEP,Channel 25 Task End-Point"
|
|
group.long 0x978++0x03
|
|
line.long 0x00 "FORK[26].TEP,Channel 26 Task End-Point"
|
|
group.long 0x97C++0x03
|
|
line.long 0x00 "FORK[27].TEP,Channel 27 Task End-Point"
|
|
group.long 0x980++0x03
|
|
line.long 0x00 "FORK[28].TEP,Channel 28 Task End-Point"
|
|
group.long 0x984++0x03
|
|
line.long 0x00 "FORK[29].TEP,Channel 29 Task End-Point"
|
|
group.long 0x988++0x03
|
|
line.long 0x00 "FORK[30].TEP,Channel 30 Task End-Point"
|
|
group.long 0x98C++0x03
|
|
line.long 0x00 "FORK[31].TEP,Channel 31 Task End-Point"
|
|
else
|
|
group.long 0x910++0x03
|
|
line.long 0x00 "FORK[0].TEP,Channel 0 Task End-Point"
|
|
group.long 0x914++0x03
|
|
line.long 0x00 "FORK[1].TEP,Channel 1 Task End-Point"
|
|
group.long 0x920++0x03
|
|
line.long 0x00 "FORK[4].TEP,Channel 4 Task End-Point"
|
|
group.long 0x924++0x03
|
|
line.long 0x00 "FORK[5].TEP,Channel 5 Task End-Point"
|
|
group.long 0x928++0x03
|
|
line.long 0x00 "FORK[6].TEP,Channel 6 Task End-Point"
|
|
group.long 0x934++0x03
|
|
line.long 0x00 "FORK[9].TEP,Channel 9 Task End-Point"
|
|
group.long 0x938++0x03
|
|
line.long 0x00 "FORK[10].TEP,Channel 10 Task End-Point"
|
|
group.long 0x940++0x03
|
|
line.long 0x00 "FORK[12].TEP,Channel 12 Task End-Point"
|
|
group.long 0x948++0x03
|
|
line.long 0x00 "FORK[14].TEP,Channel 14 Task End-Point"
|
|
group.long 0x94C++0x03
|
|
line.long 0x00 "FORK[15].TEP,Channel 15 Task End-Point"
|
|
group.long 0x950++0x03
|
|
line.long 0x00 "FORK[16].TEP,Channel 16 Task End-Point"
|
|
group.long 0x958++0x03
|
|
line.long 0x00 "FORK[18].TEP,Channel 18 Task End-Point"
|
|
group.long 0x960++0x03
|
|
line.long 0x00 "FORK[20].TEP,Channel 20 Task End-Point"
|
|
group.long 0x964++0x03
|
|
line.long 0x00 "FORK[21].TEP,Channel 21 Task End-Point"
|
|
group.long 0x974++0x03
|
|
line.long 0x00 "FORK[25].TEP,Channel 25 Task End-Point"
|
|
group.long 0x980++0x03
|
|
line.long 0x00 "FORK[28].TEP,Channel 28 Task End-Point"
|
|
group.long 0x988++0x03
|
|
line.long 0x00 "FORK[30].TEP,Channel 30 Task End-Point"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "2.4 GHz radio (RADIO)"
|
|
base ad:0x40001000
|
|
width 14.
|
|
group.long 0x00++0x23 "TASKS"
|
|
line.long 0x00 "TXEN,Enable Radio In TX Mode"
|
|
line.long 0x04 "RXEN,Enable Radio In RX Mode"
|
|
line.long 0x08 "START,Start Radio"
|
|
line.long 0x0C "STOP,Stop Radio"
|
|
line.long 0x10 "DISABLE,Disable Radio"
|
|
line.long 0x14 "RSSISTART,Task For Starting The RSSI Measurement"
|
|
line.long 0x18 "RSSISTOP,Task For Stopping The RSSI Measurement"
|
|
line.long 0x1C "BCSTART,Start Bit Counter"
|
|
line.long 0x20 "BCSTOP,Stop Bit Counter"
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x24++0x0F
|
|
line.long 0x00 "EDSTART,Start The Energy Detect Measurement"
|
|
line.long 0x04 "EDSTOP,Stop The Energy Detect Measurement"
|
|
line.long 0x08 "CCASTART,Start The Clear Channel Assessment"
|
|
line.long 0x0C "CCASTOP,Stop The Clear Channel Assessment"
|
|
endif
|
|
group.long 0x100++0x1F "EVENTS"
|
|
line.long 0x00 "READY,Ready Event"
|
|
line.long 0x04 "ADDRESS,Address Event"
|
|
line.long 0x08 "PAYLOAD,Payload Event"
|
|
line.long 0x0C "END,End Event"
|
|
line.long 0x10 "DISABLED,Disabled Event"
|
|
line.long 0x14 "DEVMATCH,Device Address Match Occurred On The Last Received Packet"
|
|
line.long 0x18 "DEVMISS,No Device Address Match Occurred On The Last Received Packet"
|
|
line.long 0x1C "RSSIEND,Sampling Of Receive Signal Strength Complete"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "BCMATCH,Bit Counter Reached Bit Count Value Specified In BCC"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
group.long 0x130++0x07
|
|
line.long 0x00 "CRCOK,Packet Received With CRC Ok"
|
|
line.long 0x04 "CRCERROR,Packet Received With CRC Error"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x138++0x27
|
|
line.long 0x00 "FRAMESTART,IEEE 802.15.4 Length Field Received"
|
|
line.long 0x04 "EDEND,Sampling Of Energy Detection Complete"
|
|
line.long 0x08 "EDSTOPPED,The Sampling Of Energy Detection Has Stopped"
|
|
line.long 0x0C "CCAIDLE,Wireless Medium In Idle"
|
|
line.long 0x10 "CCABUSY,Wireless Medium Busy"
|
|
line.long 0x14 "CCASTOPPED,The CCA Has Stopped"
|
|
line.long 0x18 "RATEBOOST,Ble_LR CI Field Received"
|
|
line.long 0x1C "TXREADY,RADIO Has Ramped Up And Is Ready To Be Started TX Path"
|
|
line.long 0x20 "RXREADY,RADIO Has Ramped Up And Is Ready to Be Started RX Path"
|
|
line.long 0x24 "MHRMATCH,MAC Header Match Found"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "PHYEND,Generated In Ble_LR125Kbit, Ble_LR500Kbit And BleIeee802154_250Kbit Modes"
|
|
endif
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts For The Radio"
|
|
sif cpuis("NRF52840QI")
|
|
bitfld.long 0x00 21. " PHYEND_START ,Shortcut between PHYEND event and START task" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PHYEND_DISABLE ,Shortcut between PHYEND event and DISABLE task" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " RXREADY_START ,Shortcut between RXREADY event and START task" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TXREADY_START ,Shortcut between TXREADY event and START task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CCAIDLE_STOP ,Shortcut between CCAIDLE event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EDEND_DISABLE ,Shortcut between EDEND event and DISABLE task" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " READY_EDSTART ,Shortcut between READY event and EDSTART task" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " FRAMESTART_BCSTART ,Shortcut between FRAMESTART event and BCSTART task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CCABUSY_DISABLE ,Shortcut between CCABUSY event and DISABLE task" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " CCAIDLE_TXEN ,Shortcut between CCAIDLE event and TXEN task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RXREADY_CCASTART ,Shortcut between RXREADY event and CCASTART task" "Disabled,Enabled"
|
|
textline " "
|
|
textfld " "
|
|
endif
|
|
bitfld.long 0x00 8. " DISABLED_RSSISTOP ,Sortcut between DISABLED event and RSSISTOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " ADDRESS_BCSTART ,Shortcut between ADDRESS event and BCSTART task" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " END_START ,Shortcut between END event and START task" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " ADDRESS_RSSISTART ,Shortcut between ADDRESS event and RSSISTART task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DISABLED_RXEN ,Shortcut between DISABLED event and RXEN task" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DISABLED_TXEN ,Shortcut between DISABLED event and TXEN task" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " END_DISABLE ,Shortcut between END event and DISABLE task" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " READY_START ,Shortcut between READY event and START task" "Disabled,Enabled"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Interrupt Enable Register"
|
|
sif cpuis("NRF52840QI")
|
|
setclrfld.long 0x00 27. 0x00 27. 0x04 27. " PHYEND ,Enable interrupt for PHYEND event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x04 23. " MHRMATCH ,Enable interrupt for MHRMATCH event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x04 22. " RXREADY ,Enable interrupt for RXREADY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x04 21. " TXREADY ,Enable interrupt for TXREADY event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x00 20. 0x04 20. " RATEBOOST ,Enable interrupt for RATEBOOST event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " CCASTOPPED ,Enable interrupt for CCASTOPPED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " CCABUSY ,Enable interrupt for CCABUSY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " CCAIDLE ,Enable interrupt for CCAIDLE event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " EDSTOPPED ,Enable interrupt for EDSTOPPED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x04 15. " EDEND ,Enable interrupt for EDEND event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x04 14. " FRAMESTART ,Enable interrupt for FRAMESTART event" "Disabled,Enabled"
|
|
textline " "
|
|
textfld " "
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " CRCERROR ,Enable interrupt for CRCERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x04 12. " CRCOK ,Enable interrupt for CRCOK event" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " BCMATCH ,Enable interrupt on BCMATCH event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " RSSIEND ,Enable interrupt on RSSIEND event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " DEVMISS ,Enable interrupt on DEVMISS event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " DEVMATCH ,Enable interrupt on DEVMATCH event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " DISABLED ,Enable interrupt on DISABLED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " END ,Enable interrupt on END event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " PAYLOAD ,Enable interrupt on PAYLOAD event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " ADDRESS ,Enable interrupt on ADDRESS event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " READY ,Enable interrupt on READY event" "Disabled,Enabled"
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "CRCSTATUS,CRC Status"
|
|
bitfld.long 0x00 0. " CRCSTATUS ,CRC status of packet received" "Error,No error"
|
|
rgroup.long 0x408++0x0B
|
|
line.long 0x00 "RXMATCH,Received Address"
|
|
hexmask.long.byte 0x00 0.--2. 0x01 " RXMATCH ,Logical address on which previous packet was received"
|
|
line.long 0x04 "RXCRC,Received CRC"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RXCRC ,CRC field of previously received packet"
|
|
line.long 0x08 "DAI,Device Address Match Index"
|
|
bitfld.long 0x08 0.--2. " DAI ,Index of device address" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("NRF52840QI")
|
|
rgroup.long 0x414++0x03
|
|
line.long 0x00 "PDUSTAT,Payload Status"
|
|
bitfld.long 0x00 1.--2. " CISTAT ,Status on what rate packet is received with in Long Range" "LR125kbit,LR500kbit,?..."
|
|
bitfld.long 0x00 0. " PDUSTAT ,Status on payload length vs. PCNF1.MAXLEN" "LessThan,GreaterThan"
|
|
endif
|
|
group.long 0x504++0x3B
|
|
line.long 0x00 "PACKETPTR,Packet Pointer"
|
|
line.long 0x04 "FREQUENCY,Frequency"
|
|
sif cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
bitfld.long 0x04 8. " MAP ,Channel map selection" "Default,Low"
|
|
textline " "
|
|
textfld " "
|
|
endif
|
|
hexmask.long.byte 0x04 0.--6. 1. " FREQUENCY ,Radio channel frequency offset in MHz"
|
|
line.long 0x08 "TXPOWER,Output Power"
|
|
hexmask.long.byte 0x08 0.--7. 1. " TXPOWER ,Radio output power. Decision point: TXEN task"
|
|
line.long 0x0C "MODE,Data Rate And Modulation"
|
|
sif !cpuis("NRF52840QI")&&!cpuis("NRF52810Q*")
|
|
bitfld.long 0x0C 0.--3. " MODE ,Radio data rate and modulation setting" "NRF_1MBIT,NRF_2MBIT,NRF_250_KBIT,BLE_1MBIT,?..."
|
|
elif cpuis("NRF52810Q*")
|
|
bitfld.long 0x0C 0.--3. " MODE ,Radio data rate and modulation setting" "NRF_1MBIT,NRF_2MBIT,,BLE_1MBIT,Ble_2Mbit,?..."
|
|
else
|
|
bitfld.long 0x0C 0.--3. " MODE ,Radio data rate and modulation setting" "NRF_1MBIT,NRF_2MBIT,,BLE_1MBIT,Ble_2Mbit,Ble_LR125Kbit,Ble_LR500Kbit,,,,,,,,,Ble_LR500Kbit"
|
|
endif
|
|
line.long 0x10 "PCNF0,Packet Configuration 0"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
sif !cpuis("NRF52840QI")
|
|
bitfld.long 0x10 24. " PLEN ,Length of preamble on air" "8bit,16bit"
|
|
else
|
|
bitfld.long 0x10 29.--30. " TERMLEN ,Length of TERM field in Long Range operation" "0,1,2,3"
|
|
bitfld.long 0x10 26. " CRCINC ,Indicates if LENGTH field contains CRC or not" "Exclude,Include"
|
|
bitfld.long 0x10 24.--25. " PLEN ,Length of preamble on air. Decision point: TASKS_START task" "8bit,16bit,32bitZero,LongRange"
|
|
bitfld.long 0x10 22.--23. " CILEN ,Length of Code Indicator - Long Range" "0,1,2,3"
|
|
endif
|
|
bitfld.long 0x10 20. " S1INCL ,Include or exclude S1 field in RAM" "Automatic,Include"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x10 16.--19. " S1LEN ,Length of S1 field in number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 8. " S0LEN ,Length on air of S0 field in number of bits" "0,1"
|
|
bitfld.long 0x10 0.--3. " LFLEN ,Length of length field in number of bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x14 "PCNF1,Packet Configuration 1"
|
|
bitfld.long 0x14 25. " WHITEEN ,Packet whitening enabled" "Disabled,Enabled"
|
|
bitfld.long 0x14 24. " ENDIAN ,On air endianness of packet length field" "Little,Big"
|
|
bitfld.long 0x14 16.--18. " BALEN ,Base address length in number of bytes" ",,2,3,4,,,"
|
|
hexmask.long.byte 0x14 8.--15. 1. " STATLEN ,Static length in number of bytes"
|
|
textline " "
|
|
hexmask.long.byte 0x14 0.--7. 1. " MAXLEN ,Maximum length of packet payload"
|
|
line.long 0x18 "BASE0,Base Address 0"
|
|
line.long 0x1C "BASE1,Base Address 1"
|
|
line.long 0x20 "PREFIX0,Prefixes Bytes For Logical Addresses 0-3"
|
|
hexmask.long.byte 0x20 24.--31. 0x01 " AP[3] ,Address prefix 3"
|
|
hexmask.long.byte 0x20 16.--23. 0x01 " [2] ,Address prefix 2"
|
|
hexmask.long.byte 0x20 8.--15. 0x01 " [1] ,Address prefix 1"
|
|
hexmask.long.byte 0x20 0.--7. 0x01 " [0] ,Address prefix 0"
|
|
line.long 0x24 "PREFIX1,Prefixes Bytes For Logical Addresses 4-7"
|
|
hexmask.long.byte 0x24 24.--31. 0x01 " AP[7] ,Address prefix 7"
|
|
hexmask.long.byte 0x24 16.--23. 0x01 " [6] ,Address prefix 6"
|
|
hexmask.long.byte 0x24 8.--15. 0x01 " [5] ,Address prefix 5"
|
|
hexmask.long.byte 0x24 0.--7. 0x01 " [4] ,Address prefix 4"
|
|
line.long 0x28 "TXADDRESS,Transmit Address Select"
|
|
hexmask.long.byte 0x28 0.--2. 1. " TXADDRESS ,Logical address to be used when transmitting a packet"
|
|
line.long 0x2C "RXADDRESSES,Receive Address Select"
|
|
bitfld.long 0x2C 7. " ADR[7] ,Enable reception on logical address 7" "Disabled,Enabled"
|
|
bitfld.long 0x2C 6. " [6] ,Enable reception on logical address 6" "Disabled,Enabled"
|
|
bitfld.long 0x2C 5. " [5] ,Enable reception on logical address 5" "Disabled,Enabled"
|
|
bitfld.long 0x2C 4. " [4] ,Enable reception on logical address 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 3. " [3] ,Enable reception on logical address 3" "Disabled,Enabled"
|
|
bitfld.long 0x2C 2. " [2] ,Enable reception on logical address 2" "Disabled,Enabled"
|
|
bitfld.long 0x2C 1. " [1] ,Enable reception on logical address 1" "Disabled,Enabled"
|
|
bitfld.long 0x2C 0. " [0] ,Enable reception on logical address 0" "Disabled,Enabled"
|
|
line.long 0x30 "CRCCNF,CRC Configuration"
|
|
sif !cpuis("NRF52840QI")
|
|
bitfld.long 0x30 8. " SKIP_ADR ,Leave packet address field out of CRC calculation" "Included,Not included"
|
|
textfld " "
|
|
else
|
|
bitfld.long 0x30 8.--9. " SKIP_ADR ,Leave packet address field out of CRC calculation" "Included,Not included,IEEE 802.15.4,?..."
|
|
endif
|
|
bitfld.long 0x30 0.--1. " LEN ,CRC length in number of bytes" "Disabled,1,2,3"
|
|
line.long 0x34 "CRCPOLY,CRC Polynomial"
|
|
hexmask.long.tbyte 0x34 0.--23. 1. " CRCPOLY ,CRC polynomial"
|
|
line.long 0x38 "CRCINIT,CRC Initial Value"
|
|
hexmask.long.tbyte 0x38 0.--23. 1. " CRCINIT ,Initial value for CRC calculation"
|
|
sif !cpuis("NRF52832QFAA")&&!cpuis("NRF52832CEAA")&&!cpuis("NRF52832QFAB")&&!cpuis("NRF52832CIAA")&&!cpuis("NRF52810Q*")&&!cpuis("NRF52840QI")
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "TEST,Test Features Enable Register"
|
|
bitfld.long 0x00 1. " PLL_LOCK ,PLL lock decision point" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CONST_CARRIER ,Constant carrier" "Disabled,Enabled"
|
|
endif
|
|
sif !cpuis("NRF52840QI")
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "TIFS,Interframe Spacing"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TIFS ,Interframe spacing"
|
|
else
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "TIFS,Interframe Spacing"
|
|
hexmask.long.word 0x00 0.--9. 1. " TIFS ,Interframe spacing"
|
|
endif
|
|
rgroup.long 0x548++0x03
|
|
line.long 0x00 "RSSISAMPLE,RSSI Sample"
|
|
hexmask.long.byte 0x00 0.--6. 1. " RSSISAMPLE ,RSSI sample result"
|
|
rgroup.long 0x550++0x03
|
|
line.long 0x00 "STATE,Current Radio State"
|
|
bitfld.long 0x00 0.--3. " STATE ,Current radio state" "Disabled,RXRU,RX idle,RX,RX disabled,,,,,TXRU,TX idle,TX,TX disabled,?..."
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "DATAWHITEIV,Data Whitening Initial Value"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
hexmask.long.byte 0x00 0.--6. 1. " DATAWHITEIV ,Data whitening initial value"
|
|
else
|
|
bitfld.long 0x00 0.--5. " DATAWHITEIV ,Data whitening initial value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "BCC,Bit Counter Compare"
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "DAB[0],Device Address 0 Base Segment"
|
|
group.long (0x600+0x20)++0x03
|
|
line.long 0x00 "DAP[0],Device Address 0 Prefix"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " DAP[0] ,Device address prefix"
|
|
group.long 0x604++0x03
|
|
line.long 0x00 "DAB[1],Device Address 1 Base Segment"
|
|
group.long (0x604+0x20)++0x03
|
|
line.long 0x00 "DAP[1],Device Address 1 Prefix"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " DAP[1] ,Device address prefix"
|
|
group.long 0x608++0x03
|
|
line.long 0x00 "DAB[2],Device Address 2 Base Segment"
|
|
group.long (0x608+0x20)++0x03
|
|
line.long 0x00 "DAP[2],Device Address 2 Prefix"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " DAP[2] ,Device address prefix"
|
|
group.long 0x60C++0x03
|
|
line.long 0x00 "DAB[3],Device Address 3 Base Segment"
|
|
group.long (0x60C+0x20)++0x03
|
|
line.long 0x00 "DAP[3],Device Address 3 Prefix"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " DAP[3] ,Device address prefix"
|
|
group.long 0x610++0x03
|
|
line.long 0x00 "DAB[4],Device Address 4 Base Segment"
|
|
group.long (0x610+0x20)++0x03
|
|
line.long 0x00 "DAP[4],Device Address 4 Prefix"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " DAP[4] ,Device address prefix"
|
|
group.long 0x614++0x03
|
|
line.long 0x00 "DAB[5],Device Address 5 Base Segment"
|
|
group.long (0x614+0x20)++0x03
|
|
line.long 0x00 "DAP[5],Device Address 5 Prefix"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " DAP[5] ,Device address prefix"
|
|
group.long 0x618++0x03
|
|
line.long 0x00 "DAB[6],Device Address 6 Base Segment"
|
|
group.long (0x618+0x20)++0x03
|
|
line.long 0x00 "DAP[6],Device Address 6 Prefix"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " DAP[6] ,Device address prefix"
|
|
group.long 0x61C++0x03
|
|
line.long 0x00 "DAB[7],Device Address 7 Base Segment"
|
|
group.long (0x61C+0x20)++0x03
|
|
line.long 0x00 "DAP[7],Device Address 7 Prefix"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " DAP[7] ,Device address prefix"
|
|
group.long 0x640++0x03
|
|
line.long 0x00 "DACNF,Device Address Match Configuration"
|
|
bitfld.long 0x00 15. " TXADD[7] ,TxAdd for device address 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " [6] ,TxAdd for device address 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " [5] ,TxAdd for device address 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " [4] ,TxAdd for device address 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [3] ,TxAdd for device address 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " [2] ,TxAdd for device address 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " [1] ,TxAdd for device address 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " [0] ,TxAdd for device address 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ENA[7] ,Enable or disable device address matching using device address 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " [6] ,Enable or disable device address matching using device address 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " [5] ,Enable or disable device address matching using device address 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " [4] ,Enable or disable device address matching using device address 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Enable or disable device address matching using device address 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " [2] ,Enable or disable device address matching using device address 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " [1] ,Enable or disable device address matching using device address 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " [0] ,Enable or disable device address matching using device address 0" "Disabled,Enabled"
|
|
sif cpuis("NRF52840QI")
|
|
hgroup.long 0x644++0x07
|
|
hide.long 0x00 "MHRMATCHCONF,Search Pattern Configuration"
|
|
hide.long 0x04 "MHRMATCHMAS,Pattern Mask"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")
|
|
group.long 0x650++0x03
|
|
line.long 0x00 "MODECNF0,Radio Mode Configuration Register 0"
|
|
bitfld.long 0x00 8.--9. " DTX ,Default TX value" "B1,B0,Center,?..."
|
|
bitfld.long 0x00 0. " RU ,Radio ramp-up time" "Default,Fast"
|
|
elif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40001000+0x510))&0x0F)==(0x00||0x01||0x03||0x04))
|
|
group.long 0x650++0x03
|
|
line.long 0x00 "MODECNF0,Radio Mode Configuration Register 0"
|
|
bitfld.long 0x00 8.--9. " DTX ,Default TX value" "B1,B0,Center,?..."
|
|
bitfld.long 0x00 0. " RU ,Radio ramp-up time" "Default,Fast"
|
|
else
|
|
group.long 0x650++0x03
|
|
line.long 0x00 "MODECNF0,Radio Mode Configuration Register 0"
|
|
bitfld.long 0x00 8.--9. " DTX ,Default TX value" "B1,B0,?..."
|
|
bitfld.long 0x00 0. " RU ,Radio ramp-up time" "Default,Fast"
|
|
endif
|
|
else
|
|
group.long 0x724++0x03
|
|
line.long 0x00 "OVERRIDE[0],Override0 Radio Configuration Parameters"
|
|
group.long 0x728++0x03
|
|
line.long 0x00 "OVERRIDE[1],Override1 Radio Configuration Parameters"
|
|
group.long 0x72C++0x03
|
|
line.long 0x00 "OVERRIDE[2],Override2 Radio Configuration Parameters"
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "OVERRIDE[3],Override3 Radio Configuration Parameters"
|
|
group.long 0x734++0x03
|
|
line.long 0x00 "OVERRIDE[4],Override4 Radio Configuration Parameters"
|
|
bitfld.long 0x00 31. " OREN ,Override control" "Disabled,Enabled"
|
|
hexmask.long 0x00 0.--27. 1. " OVERRIDE ,Radio override"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
group.long 0x660++0x0F
|
|
line.long 0x00 "SFD,IEEE 802.15.4 Start Of Frame Delimiter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SFD ,Start of frame delimiter"
|
|
line.long 0x04 "EDCNT,IEEE 802.15.4 Energy Detect Loop Count"
|
|
hexmask.long.tbyte 0x04 0.--20. 1. " EDCNT ,Energy detect loop count"
|
|
line.long 0x08 "EDSAMPLE,IEEE 802.15.4 Energy Detect Level"
|
|
hexmask.long.byte 0x08 0.--7. 1. " EDLVL ,Energy detect level"
|
|
line.long 0x0C "CCACTRL,IEEE 802.15.4 Clear Channel Assessment Control"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " CCACORRCNT ,Limit for occurances above CCACORRTHRES"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " CCACORRTHRES ,CCA correlator busy threshold"
|
|
hexmask.long.byte 0x0C 8.--15. 1. " CCAEDTHRES ,CCA energy busy threshold"
|
|
bitfld.long 0x0C 0.--2. " CCAMODE ,CCA mode of operation" "EdMode,CarrierMode,CarrierAndEdMode,CarrierOrEdMode,EdModeTest1,?..."
|
|
endif
|
|
group.long 0xFFC++0x03
|
|
line.long 0x00 "POWER,Peripheral Power Control"
|
|
bitfld.long 0x00 0. " POWER ,Peripheral power control" "Off,On"
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "Timer/counter (TIMER)"
|
|
tree "Timer 0"
|
|
base ad:0x40008000
|
|
width 13.
|
|
group.long 0x00++0x07 "TASKS"
|
|
line.long 0x00 "START,Start Timer"
|
|
line.long 0x04 "STOP,Stop Timer"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52840QI")||cpuis("NRF52810QF")
|
|
if (((per.l(ad:0x40008000+0x504))&0x03)==0x01)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "COUNT,Increment Timer"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40008000+0x504))&0x01)==0x01)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "COUNT,Increment Timer"
|
|
endif
|
|
endif
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CLEAR,Clear Timer"
|
|
sif !cpuis("NRF52810C")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810QF")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SHUTDOWN,Shut Down Timer"
|
|
endif
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CAPTURE[0],Capture Timer Value To CC[0] Register"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CAPTURE[1],Capture Timer Value To CC[1] Register"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CAPTURE[2],Capture Timer Value To CC[2] Register"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "CAPTURE[3],Capture Timer Value To CC[3] Register"
|
|
group.long (0x140+0x0)++0x03
|
|
line.long 0x00 "COMPARE[0],Compare Event On CC[0] Match"
|
|
group.long (0x140+0x4)++0x03
|
|
line.long 0x00 "COMPARE[1],Compare Event On CC[1] Match"
|
|
group.long (0x140+0x8)++0x03
|
|
line.long 0x00 "COMPARE[2],Compare Event On CC[2] Match"
|
|
group.long (0x140+0xC)++0x03
|
|
line.long 0x00 "COMPARE[3],Compare Event On CC[3] Match"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts"
|
|
bitfld.long 0x00 11. " COMPARE3_STOP ,Shortcut between COMPARE3 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " COMPARE2_STOP ,Shortcut between COMPARE2 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " COMPARE1_STOP ,Shortcut between COMPARE1 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " COMPARE0_STOP ,Shortcut between COMPARE0 and STOP task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " COMPARE3_CLEAR ,Shortcut between COMPARE3 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " COMPARE2_CLEAR ,Shortcut between COMPARE2 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " COMPARE1_CLEAR ,Shortcut between COMPARE1 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " COMPARE0_CLEAR ,Shortcut between COMPARE0 and CLEAR task" "Disabled,Enabled"
|
|
textline " "
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Interrupt Enable Or Disable Register"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " COMPARE3 ,Enable interrupt on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " COMPARE2 ,Enable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " COMPARE1 ,Enable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " COMPARE0 ,Enable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
sif cpuis("NRF52840*")
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "STATUS,Timer status"
|
|
bitfld.long 0x00 0. " STATUS ,Timer status" "Stopped,Started"
|
|
endif
|
|
group.long 0x504++0x07
|
|
line.long 0x00 "MODE,Timer Mode Selection"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810*")||cpuis("NRF52840*")
|
|
bitfld.long 0x00 0.--1. " MODE ,Timer mode" "Timer,Counter,LowPowerCounter,?..."
|
|
else
|
|
bitfld.long 0x00 0. " MODE ,Timer mode" "Timer,Counter"
|
|
endif
|
|
sif cpuis("NRF51822*")
|
|
line.long 0x04 "BITMODE,Configure The Number Of Bits Used By The TIMER"
|
|
bitfld.long 0x04 0.--1. " BITMODE ,Timer bit width" "16-bit,8-bit,24-bit,32-bit"
|
|
else
|
|
line.long 0x04 "BITMODE,Configure The Number Of Bits Used By The TIMER"
|
|
bitfld.long 0x04 0.--1. " BITMODE ,Timer bit width" "16-bit,8-bit,24-bit,32-bit"
|
|
endif
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PRESCALER,Timer Prescaler Register"
|
|
bitfld.long 0x00 0.--3. " PRESCALER ,Prescaler value" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Capture/Compare Register 0"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Capture/Compare Register 1"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Capture/Compare Register 2"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "CC[3],Capture/Compare Register 3"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Timer 1"
|
|
base ad:0x40009000
|
|
width 13.
|
|
group.long 0x00++0x07 "TASKS"
|
|
line.long 0x00 "START,Start Timer"
|
|
line.long 0x04 "STOP,Stop Timer"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52840QI")||cpuis("NRF52810QF")
|
|
if (((per.l(ad:0x40009000+0x504))&0x03)==0x01)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "COUNT,Increment Timer"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40009000+0x504))&0x01)==0x01)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "COUNT,Increment Timer"
|
|
endif
|
|
endif
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CLEAR,Clear Timer"
|
|
sif !cpuis("NRF52810C")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810QF")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SHUTDOWN,Shut Down Timer"
|
|
endif
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CAPTURE[0],Capture Timer Value To CC[0] Register"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CAPTURE[1],Capture Timer Value To CC[1] Register"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CAPTURE[2],Capture Timer Value To CC[2] Register"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "CAPTURE[3],Capture Timer Value To CC[3] Register"
|
|
group.long (0x140+0x0)++0x03
|
|
line.long 0x00 "COMPARE[0],Compare Event On CC[0] Match"
|
|
group.long (0x140+0x4)++0x03
|
|
line.long 0x00 "COMPARE[1],Compare Event On CC[1] Match"
|
|
group.long (0x140+0x8)++0x03
|
|
line.long 0x00 "COMPARE[2],Compare Event On CC[2] Match"
|
|
group.long (0x140+0xC)++0x03
|
|
line.long 0x00 "COMPARE[3],Compare Event On CC[3] Match"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts"
|
|
bitfld.long 0x00 11. " COMPARE3_STOP ,Shortcut between COMPARE3 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " COMPARE2_STOP ,Shortcut between COMPARE2 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " COMPARE1_STOP ,Shortcut between COMPARE1 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " COMPARE0_STOP ,Shortcut between COMPARE0 and STOP task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " COMPARE3_CLEAR ,Shortcut between COMPARE3 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " COMPARE2_CLEAR ,Shortcut between COMPARE2 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " COMPARE1_CLEAR ,Shortcut between COMPARE1 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " COMPARE0_CLEAR ,Shortcut between COMPARE0 and CLEAR task" "Disabled,Enabled"
|
|
textline " "
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Interrupt Enable Or Disable Register"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " COMPARE3 ,Enable interrupt on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " COMPARE2 ,Enable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " COMPARE1 ,Enable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " COMPARE0 ,Enable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
sif cpuis("NRF52840*")
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "STATUS,Timer status"
|
|
bitfld.long 0x00 0. " STATUS ,Timer status" "Stopped,Started"
|
|
endif
|
|
group.long 0x504++0x07
|
|
line.long 0x00 "MODE,Timer Mode Selection"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810*")||cpuis("NRF52840*")
|
|
bitfld.long 0x00 0.--1. " MODE ,Timer mode" "Timer,Counter,LowPowerCounter,?..."
|
|
else
|
|
bitfld.long 0x00 0. " MODE ,Timer mode" "Timer,Counter"
|
|
endif
|
|
sif cpuis("NRF51822*")
|
|
line.long 0x04 "BITMODE,Configure The Number Of Bits Used By The TIMER"
|
|
bitfld.long 0x04 0.--1. " BITMODE ,Timer bit width" "16-bit,8-bit,?..."
|
|
else
|
|
line.long 0x04 "BITMODE,Configure The Number Of Bits Used By The TIMER"
|
|
bitfld.long 0x04 0.--1. " BITMODE ,Timer bit width" "16-bit,8-bit,24-bit,32-bit"
|
|
endif
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PRESCALER,Timer Prescaler Register"
|
|
bitfld.long 0x00 0.--3. " PRESCALER ,Prescaler value" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Capture/Compare Register 0"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Capture/Compare Register 1"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Capture/Compare Register 2"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "CC[3],Capture/Compare Register 3"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Timer 2"
|
|
base ad:0x4000A000
|
|
width 13.
|
|
group.long 0x00++0x07 "TASKS"
|
|
line.long 0x00 "START,Start Timer"
|
|
line.long 0x04 "STOP,Stop Timer"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52840QI")||cpuis("NRF52810QF")
|
|
if (((per.l(ad:0x4000A000+0x504))&0x03)==0x01)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "COUNT,Increment Timer"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x4000A000+0x504))&0x01)==0x01)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "COUNT,Increment Timer"
|
|
endif
|
|
endif
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CLEAR,Clear Timer"
|
|
sif !cpuis("NRF52810C")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810QF")
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SHUTDOWN,Shut Down Timer"
|
|
endif
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CAPTURE[0],Capture Timer Value To CC[0] Register"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CAPTURE[1],Capture Timer Value To CC[1] Register"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CAPTURE[2],Capture Timer Value To CC[2] Register"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "CAPTURE[3],Capture Timer Value To CC[3] Register"
|
|
group.long (0x140+0x0)++0x03
|
|
line.long 0x00 "COMPARE[0],Compare Event On CC[0] Match"
|
|
group.long (0x140+0x4)++0x03
|
|
line.long 0x00 "COMPARE[1],Compare Event On CC[1] Match"
|
|
group.long (0x140+0x8)++0x03
|
|
line.long 0x00 "COMPARE[2],Compare Event On CC[2] Match"
|
|
group.long (0x140+0xC)++0x03
|
|
line.long 0x00 "COMPARE[3],Compare Event On CC[3] Match"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts"
|
|
bitfld.long 0x00 11. " COMPARE3_STOP ,Shortcut between COMPARE3 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " COMPARE2_STOP ,Shortcut between COMPARE2 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " COMPARE1_STOP ,Shortcut between COMPARE1 and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " COMPARE0_STOP ,Shortcut between COMPARE0 and STOP task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " COMPARE3_CLEAR ,Shortcut between COMPARE3 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " COMPARE2_CLEAR ,Shortcut between COMPARE2 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " COMPARE1_CLEAR ,Shortcut between COMPARE1 and CLEAR task" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " COMPARE0_CLEAR ,Shortcut between COMPARE0 and CLEAR task" "Disabled,Enabled"
|
|
textline " "
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Interrupt Enable Or Disable Register"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " COMPARE3 ,Enable interrupt on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " COMPARE2 ,Enable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " COMPARE1 ,Enable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " COMPARE0 ,Enable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
sif cpuis("NRF52840*")
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "STATUS,Timer status"
|
|
bitfld.long 0x00 0. " STATUS ,Timer status" "Stopped,Started"
|
|
endif
|
|
group.long 0x504++0x07
|
|
line.long 0x00 "MODE,Timer Mode Selection"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810*")||cpuis("NRF52840*")
|
|
bitfld.long 0x00 0.--1. " MODE ,Timer mode" "Timer,Counter,LowPowerCounter,?..."
|
|
else
|
|
bitfld.long 0x00 0. " MODE ,Timer mode" "Timer,Counter"
|
|
endif
|
|
sif cpuis("NRF51822*")
|
|
line.long 0x04 "BITMODE,Configure The Number Of Bits Used By The TIMER"
|
|
bitfld.long 0x04 0.--1. " BITMODE ,Timer bit width" "16-bit,8-bit,?..."
|
|
else
|
|
line.long 0x04 "BITMODE,Configure The Number Of Bits Used By The TIMER"
|
|
bitfld.long 0x04 0.--1. " BITMODE ,Timer bit width" "16-bit,8-bit,24-bit,32-bit"
|
|
endif
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PRESCALER,Timer Prescaler Register"
|
|
bitfld.long 0x00 0.--3. " PRESCALER ,Prescaler value" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Capture/Compare Register 0"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Capture/Compare Register 1"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Capture/Compare Register 2"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "CC[3],Capture/Compare Register 3"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "Real Time Counter (RTC)"
|
|
tree "RTC 0"
|
|
base ad:0x4000B000
|
|
width 13.
|
|
group.long 0x00++0x0F "TASKS"
|
|
line.long 0x00 "START,Start RTC COUNTER"
|
|
line.long 0x04 "STOP,Stop RTC COUNTER"
|
|
line.long 0x08 "CLEAR,Clear RTC COUNTER"
|
|
line.long 0x0C "TRIGOVRFLW,Set COUNTER to 0xFFFFF0"
|
|
group.long 0x100++0x07 "EVENTS"
|
|
line.long 0x00 "TICK,Event on COUNTER increment"
|
|
line.long 0x04 "OVRFLW,Event on COUNTER overflow"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822*")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "COMPARE[0],Compare event on CC[0] match"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "COMPARE[1],Compare event on CC[1] match"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "COMPARE[2],Compare event on CC[2] match"
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "COMPARE[0],Compare event on CC[0] match"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "COMPARE[1],Compare event on CC[1] match"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "COMPARE[2],Compare event on CC[2] match"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "COMPARE[3],Compare event on CC[3] match"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " COMPARE2_set/clr ,Enable or disable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " COMPARE1_set/clr ,Enable or disable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " COMPARE0_set/clr ,Enable or disable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " OVRFLW_set/clr ,Enable or disable interrupt on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " TICK_set/clr ,Enable or disable interrupt on TICK event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COMPARE2_set/clr ,Enable or disable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " COMPARE1_set/clr ,Enable or disable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " COMPARE0_set/clr ,Enable or disable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OVRFLW_set/clr ,Enable or disable interrupt on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TICK_set/clr ,Enable or disable interrupt on TICK event" "Disabled,Enabled"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822*")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "EVTEN,Enable or disable event routing to PPI"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COMPARE2_set/clr ,Enable or disable event routing on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " COMPARE1_set/clr ,Enable or disable event routing on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " COMPARE0_set/clr ,Enable or disable event routing on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OVRFLW_set/clr ,Enable or disable event routing on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TICK_set/clr ,Enable or disable event routing on TICK event" "Disabled,Enabled"
|
|
textline " "
|
|
else
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "EVTEN,Enable or disable event routing to PPI"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " COMPARE3_set/clr ,Enable or disable event routing on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COMPARE2_set/clr ,Enable or disable event routing on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " COMPARE1_set/clr ,Enable or disable event routing on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " COMPARE0_set/clr ,Enable or disable event routing on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OVRFLW_set/clr ,Enable or disable event routing on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TICK_set/clr ,Enable or disable event routing on TICK event" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
rgroup.long 0x504++0x03
|
|
line.long 0x00 "COUNTER,Current value"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " COUNTER ,Current value"
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PRESCALER,12 bit prescaler for COUNTER frequency"
|
|
hexmask.long.word 0x00 0.--11. 1. " PRESCALER ,PRESCALER value"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822*")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Compare register 0"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[0] ,Compare value"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Compare register 1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[1] ,Compare value"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Compare register 2"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[2] ,Compare value"
|
|
else
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Compare register 0"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[0] ,Compare value"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Compare register 1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[1] ,Compare value"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Compare register 2"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[2] ,Compare value"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "CC[3],Compare register 3"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[3] ,Compare value"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "RTC 1"
|
|
base ad:0x40011000
|
|
width 13.
|
|
group.long 0x00++0x0F "TASKS"
|
|
line.long 0x00 "START,Start RTC COUNTER"
|
|
line.long 0x04 "STOP,Stop RTC COUNTER"
|
|
line.long 0x08 "CLEAR,Clear RTC COUNTER"
|
|
line.long 0x0C "TRIGOVRFLW,Set COUNTER to 0xFFFFF0"
|
|
group.long 0x100++0x07 "EVENTS"
|
|
line.long 0x00 "TICK,Event on COUNTER increment"
|
|
line.long 0x04 "OVRFLW,Event on COUNTER overflow"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822*")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "COMPARE[0],Compare event on CC[0] match"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "COMPARE[1],Compare event on CC[1] match"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "COMPARE[2],Compare event on CC[2] match"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "COMPARE[3],Compare event on CC[3] match"
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "COMPARE[0],Compare event on CC[0] match"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "COMPARE[1],Compare event on CC[1] match"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "COMPARE[2],Compare event on CC[2] match"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "COMPARE[3],Compare event on CC[3] match"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " COMPARE3_set/clr ,Enable or disable interrupt on COMPARE[3] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " COMPARE2_set/clr ,Enable or disable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " COMPARE1_set/clr ,Enable or disable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " COMPARE0_set/clr ,Enable or disable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " OVRFLW_set/clr ,Enable or disable interrupt on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " TICK_set/clr ,Enable or disable interrupt on TICK event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " COMPARE3_set/clr ,Enable or disable interrupt on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COMPARE2_set/clr ,Enable or disable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " COMPARE1_set/clr ,Enable or disable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " COMPARE0_set/clr ,Enable or disable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OVRFLW_set/clr ,Enable or disable interrupt on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TICK_set/clr ,Enable or disable interrupt on TICK event" "Disabled,Enabled"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822*")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "EVTEN,Enable or disable event routing to PPI"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " COMPARE3_set/clr ,Enable or disable event routing on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COMPARE2_set/clr ,Enable or disable event routing on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " COMPARE1_set/clr ,Enable or disable event routing on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " COMPARE0_set/clr ,Enable or disable event routing on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OVRFLW_set/clr ,Enable or disable event routing on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TICK_set/clr ,Enable or disable event routing on TICK event" "Disabled,Enabled"
|
|
textline " "
|
|
else
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "EVTEN,Enable or disable event routing to PPI"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " COMPARE3_set/clr ,Enable or disable event routing on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COMPARE2_set/clr ,Enable or disable event routing on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " COMPARE1_set/clr ,Enable or disable event routing on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " COMPARE0_set/clr ,Enable or disable event routing on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OVRFLW_set/clr ,Enable or disable event routing on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TICK_set/clr ,Enable or disable event routing on TICK event" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
rgroup.long 0x504++0x03
|
|
line.long 0x00 "COUNTER,Current value"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " COUNTER ,Current value"
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PRESCALER,12 bit prescaler for COUNTER frequency"
|
|
hexmask.long.word 0x00 0.--11. 1. " PRESCALER ,PRESCALER value"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822*")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Compare register 0"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[0] ,Compare value"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Compare register 1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[1] ,Compare value"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Compare register 2"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[2] ,Compare value"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "CC[3],Compare register 3"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[3] ,Compare value"
|
|
else
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Compare register 0"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[0] ,Compare value"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Compare register 1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[1] ,Compare value"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Compare register 2"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[2] ,Compare value"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "CC[3],Compare register 3"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[3] ,Compare value"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
sif !cpuis("NRF51822*")
|
|
tree "RTC 2"
|
|
base ad:0x40024000
|
|
width 13.
|
|
group.long 0x00++0x0F "TASKS"
|
|
line.long 0x00 "START,Start RTC COUNTER"
|
|
line.long 0x04 "STOP,Stop RTC COUNTER"
|
|
line.long 0x08 "CLEAR,Clear RTC COUNTER"
|
|
line.long 0x0C "TRIGOVRFLW,Set COUNTER to 0xFFFFF0"
|
|
group.long 0x100++0x07 "EVENTS"
|
|
line.long 0x00 "TICK,Event on COUNTER increment"
|
|
line.long 0x04 "OVRFLW,Event on COUNTER overflow"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822*")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "COMPARE[0],Compare event on CC[0] match"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "COMPARE[1],Compare event on CC[1] match"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "COMPARE[2],Compare event on CC[2] match"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "COMPARE[3],Compare event on CC[3] match"
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "COMPARE[0],Compare event on CC[0] match"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "COMPARE[1],Compare event on CC[1] match"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "COMPARE[2],Compare event on CC[2] match"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "COMPARE[3],Compare event on CC[3] match"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " COMPARE3_set/clr ,Enable or disable interrupt on COMPARE[3] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " COMPARE2_set/clr ,Enable or disable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " COMPARE1_set/clr ,Enable or disable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " COMPARE0_set/clr ,Enable or disable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " OVRFLW_set/clr ,Enable or disable interrupt on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " TICK_set/clr ,Enable or disable interrupt on TICK event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " COMPARE3_set/clr ,Enable or disable interrupt on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COMPARE2_set/clr ,Enable or disable interrupt on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " COMPARE1_set/clr ,Enable or disable interrupt on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " COMPARE0_set/clr ,Enable or disable interrupt on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OVRFLW_set/clr ,Enable or disable interrupt on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TICK_set/clr ,Enable or disable interrupt on TICK event" "Disabled,Enabled"
|
|
endif
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822*")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "EVTEN,Enable or disable event routing to PPI"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " COMPARE3_set/clr ,Enable or disable event routing on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COMPARE2_set/clr ,Enable or disable event routing on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " COMPARE1_set/clr ,Enable or disable event routing on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " COMPARE0_set/clr ,Enable or disable event routing on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OVRFLW_set/clr ,Enable or disable event routing on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TICK_set/clr ,Enable or disable event routing on TICK event" "Disabled,Enabled"
|
|
textline " "
|
|
else
|
|
group.long 0x340++0x03
|
|
line.long 0x00 "EVTEN,Enable or disable event routing to PPI"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " COMPARE3_set/clr ,Enable or disable event routing on COMPARE[3] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " COMPARE2_set/clr ,Enable or disable event routing on COMPARE[2] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " COMPARE1_set/clr ,Enable or disable event routing on COMPARE[1] event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " COMPARE0_set/clr ,Enable or disable event routing on COMPARE[0] event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OVRFLW_set/clr ,Enable or disable event routing on OVRFLW event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TICK_set/clr ,Enable or disable event routing on TICK event" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
rgroup.long 0x504++0x03
|
|
line.long 0x00 "COUNTER,Current value"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " COUNTER ,Current value"
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PRESCALER,12 bit prescaler for COUNTER frequency"
|
|
hexmask.long.word 0x00 0.--11. 1. " PRESCALER ,PRESCALER value"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF51822*")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*")||cpuis("NRF52810*")
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Compare register 0"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[0] ,Compare value"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Compare register 1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[1] ,Compare value"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Compare register 2"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[2] ,Compare value"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "CC[3],Compare register 3"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[3] ,Compare value"
|
|
else
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "CC[0],Compare register 0"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[0] ,Compare value"
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "CC[1],Compare register 1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[1] ,Compare value"
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "CC[2],Compare register 2"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[2] ,Compare value"
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "CC[3],Compare register 3"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " CC[3] ,Compare value"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "Watchdog timer (WDT)"
|
|
base ad:0x40010000
|
|
width 11.
|
|
group.long 0x00++0x03 "TASKS"
|
|
line.long 0x00 "START,Start The Watchdog"
|
|
group.long 0x100++0x03 "EVENTS"
|
|
line.long 0x00 "TIMEOUT,Watchdog Timeout"
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTENSET,Interrupt Enable Set Register"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " TIMEOUT ,Enable interrupt on TIMEOUT event" "Disabled,Enabled"
|
|
rgroup.long 0x400++0x07
|
|
line.long 0x00 "RUNSTATUS,Run Status"
|
|
bitfld.long 0x00 0. " RUNSTATUS ,Indicates if the watchdog is running" "No,Yes"
|
|
textline " "
|
|
line.long 0x04 "REQSTATUS,Request Status"
|
|
bitfld.long 0x04 7. " RR[7] ,Request status for RR[7] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " [6] ,Request status for RR[6] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " [5] ,Request status for RR[5] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " [4] ,Request status for RR[4] register" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " [3] ,Request status for RR[3] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " [2] ,Request status for RR[2] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " [1] ,Request status for RR[1] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " [0] ,Request status for RR[0] register" "Disabled,Enabled"
|
|
group.long 0x504++0x0B
|
|
line.long 0x00 "CRV,Counter Reload Value"
|
|
line.long 0x04 "RREN,Reload Request Enable"
|
|
bitfld.long 0x04 7. " RR[7] ,Enable or disable RR[7] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " [6] ,Enable or disable RR[6] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " [5] ,Enable or disable RR[5] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " [4] ,Enable or disable RR[4] register" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " [3] ,Enable or disable RR[3] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " [2] ,Enable or disable RR[2] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " [1] ,Enable or disable RR[1] register" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " [0] ,Enable or disable RR[0] register" "Disabled,Enabled"
|
|
textline " "
|
|
line.long 0x08 "CONFIG,Configuration Register"
|
|
bitfld.long 0x08 3. " HALT ,Configure the watchdog to either be paused or kept running" "Paused,Running"
|
|
bitfld.long 0x08 0. " SLEEP ,Configure the watchdog to either be paused or kept running" "Paused,Running"
|
|
wgroup.long 0x600++0x03
|
|
line.long 0x00 "RR[0],Reload Request Register 0"
|
|
wgroup.long 0x604++0x03
|
|
line.long 0x00 "RR[1],Reload Request Register 1"
|
|
wgroup.long 0x608++0x03
|
|
line.long 0x00 "RR[2],Reload Request Register 2"
|
|
wgroup.long 0x60C++0x03
|
|
line.long 0x00 "RR[3],Reload Request Register 3"
|
|
wgroup.long 0x610++0x03
|
|
line.long 0x00 "RR[4],Reload Request Register 4"
|
|
wgroup.long 0x614++0x03
|
|
line.long 0x00 "RR[5],Reload Request Register 5"
|
|
wgroup.long 0x618++0x03
|
|
line.long 0x00 "RR[6],Reload Request Register 6"
|
|
wgroup.long 0x61C++0x03
|
|
line.long 0x00 "RR[7],Reload Request Register 7"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Random Number Generator (RNG)"
|
|
base ad:0x4000D000
|
|
width 10.
|
|
group.long 0x00++0x07 "TASKS"
|
|
line.long 0x00 "START,Task Starting The Random Number Generator"
|
|
line.long 0x04 "STOP,Task Stopping The Random Number Generator"
|
|
group.long 0x100++0x03 "EVENTS"
|
|
line.long 0x00 "VALRDY,Event Being Generated For Every New Random Number Written To The VALUE"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 0. " VALRDY_STOP ,Shortcut between VALRDY event and STOP task" "Disabled,Enabled"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810*")||cpuis("NRF52840*")
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " VALRDY_set/clr ,Enable or disable interrupt on VALRDY event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " VALRDY_set/clr ,Enable or disable interrupt on VALRDY event" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x504++0x03
|
|
line.long 0x00 "CONFIG,Configuration Register"
|
|
bitfld.long 0x00 0. " DERCEN ,Digital error correction" "Disabled,Enabled"
|
|
rgroup.long 0x508++0x03
|
|
line.long 0x00 "VALUE,Output Random Number"
|
|
hexmask.long.byte 0x00 0.--7. 1. " VALUE ,Generated random number"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Temperature sensor (TEMP)"
|
|
base ad:0x4000C000
|
|
width 9.
|
|
group.long 0x00++0x07 "TASKS"
|
|
line.long 0x00 "START,Start Temperature Measurement"
|
|
line.long 0x04 "STOP,Stop Temperature Measurement"
|
|
group.long 0x100++0x03 "EVENTS"
|
|
line.long 0x00 "DATARDY,Temperature Measurement Complete Data Ready"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810*")||cpuis("NRF52840*")
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " DATARDY_set/clr ,Enable or disable interrupt on DATARDY event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DATARDY_set/clr ,Enable or disable interrupt on DATARDY event" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x508++0x03
|
|
line.long 0x00 "TEMP,Temperature In Celsius"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810*")||cpuis("NRF52840*")
|
|
group.long 0x520++0x17
|
|
line.long 0x00 "A0,Slope Of 1st Piece Wise Linear Function"
|
|
hexmask.long.word 0x00 0.--11. 1. " A0 ,Slope of 1st Piece Wise Linear Function"
|
|
line.long 0x04 "A1,Slope Of 2nd Piece Wise Linear Function"
|
|
hexmask.long.word 0x04 0.--11. 1. " A1 ,Slope of 2nd Piece Wise Linear Function"
|
|
line.long 0x08 "A2,Slope Of 3rd Piece Wise Linear Function"
|
|
hexmask.long.word 0x08 0.--11. 1. " A2 ,Slope of 3rd Piece Wise Linear Function"
|
|
line.long 0x0C "A3,Slope Of 4th Piece Wise Linear Function"
|
|
hexmask.long.word 0x0C 0.--11. 1. " A3 ,Slope of 4th Piece Wise Linear Function"
|
|
line.long 0x10 "A4,Slope Of 5th Piece Wise Linear Function"
|
|
hexmask.long.word 0x10 0.--11. 1. " A4 ,Slope of 5th Piece Wise Linear Function"
|
|
line.long 0x14 "A5,Slope of 6th Piece Wise Linear Function"
|
|
hexmask.long.word 0x14 0.--11. 1. " A5 ,Slope of 6th Piece Wise Linear Function"
|
|
group.long 0x540++0x17
|
|
line.long 0x00 "B0,Y-intercept Of 1st Piece Wise Linear Function"
|
|
hexmask.long.word 0x00 0.--13. 1. " B0 ,Y-intercept of 1st Piece Wise Linear Function"
|
|
line.long 0x04 "B1,Y-intercept Of 2nd Piece Wise Linear Function"
|
|
hexmask.long.word 0x04 0.--13. 1. " B1 ,Y-intercept of 2nd Piece Wise Linear Function"
|
|
line.long 0x08 "B2,Y-intercept Of 3rd Piece Wise Linear Function"
|
|
hexmask.long.word 0x08 0.--13. 1. " B2 ,Y-intercept of 3rd Piece Wise Linear Function"
|
|
line.long 0x0C "B3,Y-intercept Of 4th Piece Wise Linear Function"
|
|
hexmask.long.word 0x0C 0.--13. 1. " B3 ,Y-intercept of 4th Piece Wise Linear Function"
|
|
line.long 0x10 "B4,Y-intercept Of 5th Piece Wise Linear Function"
|
|
hexmask.long.word 0x10 0.--13. 1. " B4 ,Y-intercept of 5th Piece Wise Linear Function"
|
|
line.long 0x14 "B5,Y-intercept Of 6th Piece Wise Linear Function"
|
|
hexmask.long.word 0x14 0.--13. 1. " B5 ,Y-intercept of 6th Piece Wise Linear Function"
|
|
group.long 0x560++0x13
|
|
line.long 0x00 "T0,End Point Of 1st Piece Wise Linear Function"
|
|
hexmask.long.byte 0x00 0.--7. 1. " T0 ,End point of 1st Piece Wise Linear Function"
|
|
line.long 0x04 "T1,End Point Of 2nd Piece Wise Linear Function"
|
|
hexmask.long.byte 0x04 0.--7. 1. " T1 ,End point of 2nd Piece Wise Linear Function"
|
|
line.long 0x08 "T2,End Point Of 3rd Piece Wise Linear Function"
|
|
hexmask.long.byte 0x08 0.--7. 1. " T2 ,End point of 3nd Piece Wise Linear Function"
|
|
line.long 0x0C "T3,End Point Of 4th Piece Wise Linear Function"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " T3 ,End point of 4th Piece Wise Linear Function"
|
|
line.long 0x10 "T4,End Point Of 5th Piece Wise Linear Function"
|
|
hexmask.long.byte 0x10 0.--7. 1. " T4 ,End point of 5th Piece Wise Linear Function"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "AES Electronic Codebook Mode Encryption (ECB)"
|
|
base ad:0x4000E000
|
|
width 12.
|
|
group.long 0x00++0x07 "TASKS"
|
|
line.long 0x00 "STARTECB,Start ECB Block Encrypt"
|
|
line.long 0x04 "STOPECB,Abort A Possible Executing ECB operation"
|
|
group.long 0x100++0x07 "EVENTS"
|
|
line.long 0x00 "ENDECB,ECB Block Encrypt Complete"
|
|
line.long 0x04 "ERRORECB,ECB Block Encrypt Aborted"
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Interrupt Enable Or Disable Register"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " ERRORECB ,Enable interrupt on ERRORECB event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " ENDECB ,Enable interrupt on ENDECB event" "Disabled,Enabled"
|
|
group.long 0x504++0x03
|
|
line.long 0x00 "ECBDATAPTR,ECB Block Encrypt Memory Pointers"
|
|
width 0x0B
|
|
tree.end
|
|
tree "AES CCM Mode Encryption (CCM)"
|
|
base ad:0x4000F000
|
|
width 15.
|
|
group.long 0x00++0x0B "TASKS"
|
|
line.long 0x00 "KSGEN,Start Generation Of Key-Stream"
|
|
line.long 0x04 "CRYPT,Start Encryption/Decryption"
|
|
line.long 0x08 "STOP,Stop Encryption/Decryption"
|
|
sif cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "RATEOVERRIDE,Override DATARATE Setting In MODE Register With The Contents Of The RATEOVERRIDE Register For Any Ongoing Encryption/Decryption"
|
|
endif
|
|
group.long 0x100++0x07 "EVENTS"
|
|
line.long 0x00 "ENDKSGEN,Key-Stream Generation Complete"
|
|
line.long 0x04 "ENDCRYPT,Encrypt/Decrypt Complete"
|
|
sif !cpuis("NRF52810Q*")&&!cpuis("NRF52840QI")
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "ERROR,CCM Error Event"
|
|
endif
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut Register"
|
|
bitfld.long 0x00 0. " ENDKSGEN_CRYPT ,Short-cut between ENDKSGEN event and CRYPT task" "Disabled,Enabled"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Interrupt Enable Or Disable Register"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " ERROR ,Enable interrupt for ERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " ENDCRYPT ,Enable interrupt on ENDCRYPT event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " ENDKSGEN ,Enable interrupt on ENDKSGEN event" "Disabled,Enabled"
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "MICSTATUS,MIC Check Result"
|
|
bitfld.long 0x00 0. " MICSTATUS ,Result of the MIC" "Failed,Passed"
|
|
rgroup.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable Register"
|
|
bitfld.long 0x00 0.--1. " ENABLE ,Enable or disable CCM" "Disabled,,Enabled,?..."
|
|
group.long 0x504++0x13
|
|
line.long 0x00 "MODE,Operation Mode"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810Q*")||cpuis("NRF52840QI"))
|
|
bitfld.long 0x00 24. " LENGTH ,Packet length configuration" "Default,Extended"
|
|
sif cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 16.--17. " DATARATE ,Data rate CCM shall run" "1Mbit,2Mbit,125 Kbps,500 Kbps"
|
|
else
|
|
bitfld.long 0x00 16. " DATARATE ,Data rate CCM shall run" "1Mbit,2Mbit"
|
|
endif
|
|
textline " "
|
|
textfld " "
|
|
endif
|
|
bitfld.long 0x00 0. " MODE ,The mode operation to be used" "Encryption,Decryption"
|
|
line.long 0x04 "CNFPTR,Pointer To Data Structure Holding AES Key And NONCE Vector"
|
|
line.long 0x08 "INPTR,Input Pointer"
|
|
line.long 0x0C "OUTPTR,Output Pointer"
|
|
line.long 0x10 "SCRATCHPTR,Pointer To Data Area Used For Temporary Storage"
|
|
sif cpuis("NRF52810Q*")||cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x4000F000+0x504))&0x1000000)==0x1000000)
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "MAXPACKETSIZE,Length Of Key-Stream Generated"
|
|
hexmask.long.byte 0x00 0.--7. 1. "MAXPACKETSIZE ,Length of key-stream generated"
|
|
endif
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "RATEOVERRIDE,Data Rate Override Setting"
|
|
bitfld.long 0x00 0.--1. "RATEOVERRIDE ,Data rate override setting" "1 Mbps,2 Mbps,125 Kbps,500 Kbps"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Accelerated Address Resolver (AAR)"
|
|
base ad:0x4000F000
|
|
width 13.
|
|
group.long 0x00++0x03 "TASKS"
|
|
line.long 0x00 "START,Start Resolving Addresses Based On IRKs Specified In The IRK Data Structure"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STOP,Stop Resolving Addresses"
|
|
group.long 0x100++0x0B "EVENTS"
|
|
line.long 0x00 "END,Address Resolution Procedure Complete"
|
|
line.long 0x04 "RESOLVED,Address Resolved"
|
|
line.long 0x08 "NOTRESOLVED,Address Not Resolved"
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Interrupt Enable Or Disable Register"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " NOTRESOLVED ,Enable interrupt on NOTRESOLVED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " RESOLVED ,Enable interrupt on RESOLVED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " END ,Enable interrupt on END event" "Disabled,Enabled"
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "STATUS,Resolution Status"
|
|
bitfld.long 0x00 0.--3. " STATUS ,The IRK that was used last time an address was resolved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x500++0x0B
|
|
line.long 0x00 "ENABLE,Enable AAR Register"
|
|
bitfld.long 0x00 0.--1. " ENABLE ,Enable AAR" "Disabled,,,Enabled"
|
|
line.long 0x04 "NIRK,Number Of IRKs"
|
|
bitfld.long 0x04 0.--4. " NIRK ,Number of identity root keys available in the IRK data structure" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
line.long 0x08 "IRKPTR,Pointer To IRK Data Structure"
|
|
group.long 0x510++0x07
|
|
line.long 0x00 "ADDPTR,Pointer To The Resolvable Address"
|
|
line.long 0x04 "SCRATCHPTR,Pointer To Data Area Used For Temporary Storage"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Serial Peripheral Interface Master (SPI)"
|
|
tree "SPI 0"
|
|
base ad:0x40003000
|
|
width 11.
|
|
group.long 0x108++0x03 "EVENTS"
|
|
line.long 0x00 "READY,TXD byte sent and RXD byte received"
|
|
sif (!cpuis("NRF52832QFAA")&&(!cpuis("NRF52832CEAA"))&&(!cpuis("NRF52832QFAB"))&&(!cpuis("NRF52832CIAA")))
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " READY_set/clr ,Enable or disable interrupt on READY event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " READY_set/clr ,Enable interrupt for READY event" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable SPI register"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable SPI" "Disabled,Enabled,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " ENABLE ,Enable SPI" "Disabled,Enabled,,,,,,"
|
|
endif
|
|
group.long 0x508++0x0B
|
|
line.long 0x00 "PSELSCK,Pin select for SCK"
|
|
line.long 0x04 "PSELMOSI,Pin select for MOSI"
|
|
line.long 0x08 "PSELMISO,Pin select for MISO"
|
|
rgroup.long 0x518++0x03
|
|
line.long 0x00 "RXD,RXD register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXD ,RX data received"
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "TXD,TXD register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXD ,TX data to send"
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "FREQUENCY,SPI frequency"
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "CONFIG,Configuration register"
|
|
bitfld.long 0x00 2. " CPOL ,Serial clock (SCK) polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " CPHA ,Serial clock (SCK) phase" "Leading,Trailing"
|
|
bitfld.long 0x00 0. " ORDER ,Bit order" "MSB First,LSB First"
|
|
width 0x0B
|
|
tree.end
|
|
tree "SPI 1"
|
|
base ad:0x40004000
|
|
width 11.
|
|
group.long 0x108++0x03 "EVENTS"
|
|
line.long 0x00 "READY,TXD byte sent and RXD byte received"
|
|
sif (!cpuis("NRF52832QFAA")&&(!cpuis("NRF52832CEAA"))&&(!cpuis("NRF52832QFAB"))&&(!cpuis("NRF52832CIAA")))
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " READY_set/clr ,Enable or disable interrupt on READY event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x304++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " READY_set/clr ,Enable interrupt for READY event" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable SPI register"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable SPI" "Disabled,Enabled,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " ENABLE ,Enable SPI" "Disabled,Enabled,,,,,,"
|
|
endif
|
|
group.long 0x508++0x0B
|
|
line.long 0x00 "PSELSCK,Pin select for SCK"
|
|
line.long 0x04 "PSELMOSI,Pin select for MOSI"
|
|
line.long 0x08 "PSELMISO,Pin select for MISO"
|
|
rgroup.long 0x518++0x03
|
|
line.long 0x00 "RXD,RXD register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXD ,RX data received"
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "TXD,TXD register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXD ,TX data to send"
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "FREQUENCY,SPI frequency"
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "CONFIG,Configuration register"
|
|
bitfld.long 0x00 2. " CPOL ,Serial clock (SCK) polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " CPHA ,Serial clock (SCK) phase" "Leading,Trailing"
|
|
bitfld.long 0x00 0. " ORDER ,Bit order" "MSB First,LSB First"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "SPI Slave (SPIS)"
|
|
base ad:0x40004000
|
|
width 11.
|
|
group.long 0x24++0x07 "TASKS"
|
|
line.long 0x00 "ACQUIRE,Acquire SPI Semaphore"
|
|
line.long 0x04 "RELEASE,Release SPI Semaphore Enabling The SPI Slave To Acquire It"
|
|
group.long 0x104++0x03 "EVENTS"
|
|
line.long 0x00 "END,Granted Transaction Completed"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI"))
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "ENDRX,End Of RXD Buffer Reached"
|
|
endif
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "ACQUIRED,Semaphore Acquired"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts Register"
|
|
bitfld.long 0x00 2. " END_ACQUIRE ,Shortcut between END event and ACQUIRE task" "Disabled,Enabled"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI"))
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable Interrupt"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " ACQUIRED_set/clr ,Enable interrupt on ACQUIRED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " ENDRX_set/clr ,Enable interrupt for ENDRX event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " END_set/clr ,Enable interrupt on END event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Interrupt"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " ACQUIRED_set/clr ,Enable interrupt on ACQUIRED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " END_set/clr ,Enable interrupt on END event" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "SEMSTAT,Semaphore Status Register"
|
|
bitfld.long 0x00 0.--1. " SEMSTAT ,Semaphore status" "Free,CPU,SPIS,CPU pending"
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "STATUS,Status From Last Transaction"
|
|
eventfld.long 0x00 1. " OVERFLOW ,RX buffer overflow detected and prevented" "No error,Error"
|
|
eventfld.long 0x00 0. " OVERREAD ,TX buffer over-read detected and prevented" "No error,Error"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable SPI Register"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")||cpuis("NRF52810QC")||cpuis("NRF52840QI"))
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable SPI" "Disabled,,Enabled,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " ENABLE ,Enable SPI" "Disabled,,Enabled,?..."
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40003000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40003000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MISO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MISO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40003000+0x510))&0x20)==0x00)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MOSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for MOSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40003000+0x514))&0x20)==0x00)
|
|
group.long 0x514++0x03
|
|
line.long 0x0 "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x0 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x0 0.--4. " PIN ,Pin select for CSN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x514++0x03
|
|
line.long 0x0 "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x0 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x0 0.--4. " PIN ,Pin select for CSN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")
|
|
group.long 0x508++0x0F
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x04 "PSELMISO,Pin Select For MISO"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin select for MISO" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x08 "PSELMOSI,Pin Select For MOSI"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin select for MOSI" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
line.long 0x0C "PSELCSN,Pin Select For CSN"
|
|
bitfld.long 0x0C 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin select for CSN" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
group.long 0x508++0x0F
|
|
line.long 0x00 "PSELSCK,Pin Select For SCK"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin select for SCK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x04 "PSELMISO,Pin Select For MISO"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin select for MISO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x08 "PSELMOSI,Pin Select For MOSI"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin select for MOSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x0C "PSELCSN,Pin Select For CSN"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x0C 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin select for CSN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
endif
|
|
group.long 0x534++0x07
|
|
line.long 0x00 "RXDPTR,RXD Data Pointer"
|
|
line.long 0x04 "MAXRX,Maximum Number Of Bytes In Receive Buffer"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXRX ,Maximum number of bytes in receive buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXRX ,Maximum number of bytes in receive buffer"
|
|
endif
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "AMOUNTRX,Number Of Bytes Received In Last Granted Transaction"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNTRX ,Number of bytes received in the last granted transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNTRX ,Number of bytes received in the last granted transaction"
|
|
endif
|
|
group.long 0x544++0x07
|
|
line.long 0x00 "TXDPTR,TXD data pointer"
|
|
line.long 0x04 "MAXTX,Maximum Number Of Bytes In Transmit Buffer"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXTX ,Maximum number of bytes in transmit buffer"
|
|
else
|
|
hexmask.long.byte 0x04 0.--7. 1. " MAXTX ,Maximum number of bytes in transmit buffer"
|
|
endif
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "AMOUNTTX,Number Of Bytes Transmitted In Last Granted Transaction"
|
|
sif cpuis("NRF52810QF")||cpuis("NRF52810QC")
|
|
hexmask.long.word 0x00 0.--9. 1. " AMOUNTTX ,Number of bytes transmitted in the last granted transaction"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " AMOUNTTX ,Number of bytes transmitted in the last granted transaction"
|
|
endif
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "CONFIG,Configuration Register"
|
|
bitfld.long 0x00 2. " CPOL ,Serial clock (SCK) polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " CPHA ,Serial clock (SCK) phase" "Leading,Trailing"
|
|
bitfld.long 0x00 0. " ORDER ,Bit order" "MSB First,LSB First"
|
|
group.long 0x55C++0x03
|
|
line.long 0x00 "DEF,Default Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DEF ,Default character"
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "ORC,Over-Read Character"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ORC ,Over-read character"
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "I2C compatible Two Wire Interface (TWI)"
|
|
tree "TWI 0"
|
|
base ad:0x40003000
|
|
width 11.
|
|
group.long 0x00++0x03 "TASKS"
|
|
line.long 0x00 "STARTRX,Start TWI receive sequence"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STARTTX,Start TWI transmit sequence"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "STOP,Stop TWI transaction"
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "SUSPEND,Suspend TWI transaction"
|
|
line.long 0x04 "RESUME,Resume TWI transaction"
|
|
group.long 0x104++0x07 "EVENTS"
|
|
line.long 0x00 "STOPPED,TWI stopped"
|
|
line.long 0x04 "RXDRDY,TWI RXD byte received"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "TXDSENT,TWI TXD byte sent"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "ERROR,TWI error"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "BB,TWI byte boundary"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "SUSPENDED,TWI entered the suspended state"
|
|
endif
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut register"
|
|
bitfld.long 0x00 1. " BB_STOP ,Short-cut between BB event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " BB_SUSPEND ,Short-cut between BB event and SUSPEND task" "Disabled,Enabled"
|
|
sif (!cpuis("NRF52832QFAA")&&!cpuis("NRF52832CEAA")&&!cpuis("NRF52832QFAB")&&!cpuis("NRF52832CIAA"))
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " BB_set/clr ,Enable or disable interrupt on BB event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ERROR_set/clr ,Enable or disable interrupt on ERROR event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TXDSENT_set/clr ,Enable or disable interrupt on TXDSENT event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " RXDREADY_set/clr ,Enable or disable interrupt on RXDREADY event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " STOPPED_set/clr ,Enable or disable interrupt on STOPPED event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTENSET,Enable interrupt"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " SUSPENDED ,Enable interrupt for SUSPENDED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x04 14. " BB ,Enable interrupt for BB event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " ERROR ,Enable interrupt for ERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " TXDSENT ,Enable interrupt for TXDSENT event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " RXDREADY ,Enable interrupt for RXDREADY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " STOPPED ,Enable interrupt for STOPPED event" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x4C4++0x03
|
|
line.long 0x00 "ERRORSRC,TWI error source"
|
|
eventfld.long 0x00 2. " DNACK ,NACK received after sending a data byte" "No error,Error"
|
|
eventfld.long 0x00 1. " ANACK ,NACK received after sending the address" "No error,Error"
|
|
eventfld.long 0x00 0. " OVERRUN ,Overrun error" "No error,Error"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable TWI register"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable TWI" "Disabled,,,,,Enabled,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " ENABLE ,Enable TWI" "Disabled,,,,,Enabled,,"
|
|
endif
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "PSELSCL,Pin select for SCL"
|
|
line.long 0x04 "PSELSDA,Pin select for SDA"
|
|
rgroup.long 0x518++0x03
|
|
line.long 0x00 "RXD,RXD register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXD ,RX data from last transfer"
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "TXD,TXD register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXD ,TX data from last transfer"
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "FREQUENCY,TWI frequency"
|
|
group.long 0x588++0x03
|
|
line.long 0x00 "ADDRESS,Address used in the TWI transfer"
|
|
hexmask.long.byte 0x00 0.--6. 1. " ADDRESS ,TWI address"
|
|
width 0x0B
|
|
tree.end
|
|
tree "TWI 1"
|
|
base ad:0x40004000
|
|
width 11.
|
|
group.long 0x00++0x03 "TASKS"
|
|
line.long 0x00 "STARTRX,Start TWI receive sequence"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STARTTX,Start TWI transmit sequence"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "STOP,Stop TWI transaction"
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "SUSPEND,Suspend TWI transaction"
|
|
line.long 0x04 "RESUME,Resume TWI transaction"
|
|
group.long 0x104++0x07 "EVENTS"
|
|
line.long 0x00 "STOPPED,TWI stopped"
|
|
line.long 0x04 "RXDRDY,TWI RXD byte received"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "TXDSENT,TWI TXD byte sent"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "ERROR,TWI error"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "BB,TWI byte boundary"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "SUSPENDED,TWI entered the suspended state"
|
|
endif
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut register"
|
|
bitfld.long 0x00 1. " BB_STOP ,Short-cut between BB event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " BB_SUSPEND ,Short-cut between BB event and SUSPEND task" "Disabled,Enabled"
|
|
sif (!cpuis("NRF52832QFAA")&&!cpuis("NRF52832CEAA")&&!cpuis("NRF52832QFAB")&&!cpuis("NRF52832CIAA"))
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " BB_set/clr ,Enable or disable interrupt on BB event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ERROR_set/clr ,Enable or disable interrupt on ERROR event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TXDSENT_set/clr ,Enable or disable interrupt on TXDSENT event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " RXDREADY_set/clr ,Enable or disable interrupt on RXDREADY event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " STOPPED_set/clr ,Enable or disable interrupt on STOPPED event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTENSET,Enable interrupt"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " SUSPENDED ,Enable interrupt for SUSPENDED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x04 14. " BB ,Enable interrupt for BB event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " ERROR ,Enable interrupt for ERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " TXDSENT ,Enable interrupt for TXDSENT event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " RXDREADY ,Enable interrupt for RXDREADY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " STOPPED ,Enable interrupt for STOPPED event" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x4C4++0x03
|
|
line.long 0x00 "ERRORSRC,TWI error source"
|
|
eventfld.long 0x00 2. " DNACK ,NACK received after sending a data byte" "No error,Error"
|
|
eventfld.long 0x00 1. " ANACK ,NACK received after sending the address" "No error,Error"
|
|
eventfld.long 0x00 0. " OVERRUN ,Overrun error" "No error,Error"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable TWI register"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable TWI" "Disabled,,,,,Enabled,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " ENABLE ,Enable TWI" "Disabled,,,,,Enabled,,"
|
|
endif
|
|
group.long 0x508++0x07
|
|
line.long 0x00 "PSELSCL,Pin select for SCL"
|
|
line.long 0x04 "PSELSDA,Pin select for SDA"
|
|
rgroup.long 0x518++0x03
|
|
line.long 0x00 "RXD,RXD register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXD ,RX data from last transfer"
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "TXD,TXD register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXD ,TX data from last transfer"
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "FREQUENCY,TWI frequency"
|
|
group.long 0x588++0x03
|
|
line.long 0x00 "ADDRESS,Address used in the TWI transfer"
|
|
hexmask.long.byte 0x00 0.--6. 1. " ADDRESS ,TWI address"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "Universal Asynchronous Receiver/Transmitter (UART)"
|
|
base ad:0x40002000
|
|
width 12.
|
|
group.long 0x00++0x0F "TASKS"
|
|
line.long 0x00 "STARTRX,Start UART receiver"
|
|
line.long 0x04 "STOPRX,Stop UART receiver"
|
|
line.long 0x08 "STARTTX,Start UART transmitter"
|
|
line.long 0x0C "STOPTX,Stop UART transmitter"
|
|
sif !cpuis("NRF52810QF")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810QC")
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SUSPEND,Suspend UART"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "FLUSHRX,Flush RX FIFO into RX buffer"
|
|
endif
|
|
group.long 0x100++0x07 "EVENTS"
|
|
line.long 0x00 "CTS,CTS is activated (set low). Clear To Send."
|
|
line.long 0x04 "NCTS,CTS is deactivated (set high). Not Clear To Send."
|
|
hgroup.long 0x108++0x03
|
|
hide.long 0x00 "RXDRDY,Data received in RXD"
|
|
in
|
|
sif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "ENDRX,Receive buffer is filled up"
|
|
endif
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "TXDRDY,Data sent from TXD"
|
|
sif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "ENDTX,Last TX byte transmitted"
|
|
endif
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "ERROR,Error detected"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "RXTO,Receiver timeout"
|
|
sif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
group.long 0x14C++0x07
|
|
line.long 0x00 "RXSTARTED,UART receiver has started"
|
|
line.long 0x04 "TXSTARTED,UART transmitter has started"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "TXSTOPPED,Transmitter stopped"
|
|
endif
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut register"
|
|
bitfld.long 0x00 4. " NCTS_STOPRX ,Shortcut between NCTS event and STOPRX task" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " CTS_STARTRX ,Shortcut between CTS event and STARTRX task" "Disabled,Enabled"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable or disable Interrupt"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " RXTO ,Enable interrupt for RXTO event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " ERROR ,Enable interrupt for ERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " TXDRDY ,Enable interrupt for TXDRDY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " RXDRDY ,Enable interrupt for RXDRDY event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " NCTS ,Enable interrupt for NCTS event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " CTS ,Enable interrupt for CTS event" "Disabled,Enabled"
|
|
elif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcut register"
|
|
bitfld.long 0x00 6. " ENDRX_STOPRX ,Shortcut between ENDRX event and STOPRX task" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ENDRX_STARTRX ,Shortcut between ENDRX event and STARTRX task" "Disabled,Enabled"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable or disable Interrupt"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " TXSTOPPED ,Enable or disable interrupt for TXSTOPPED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " TXSTARTED ,Enable or disable interrupt for TXSTARTED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " RXSTARTED ,Enable or disable interrupt for RXSTARTED event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " RXTO ,Enable interrupt for RXTO event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ERROR ,Enable interrupt for ERROR event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TXDRDY ,Enable interrupt for TXDRDY event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " RXDRDY ,Enable interrupt for RXDRDY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " NCTS ,Enable interrupt for NCTS event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CTS ,Enable interrupt for CTS event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " RXTO_set/clr ,Enable or disable interrupt on RXTO event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ERROR_set/clr ,Enable or disable interrupt on ERROR event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TXDRDY_set/clr ,Enable or disable interrupt on TXDRDY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " RXDRDY_set/clr ,Enable or disable interrupt on RXDRDY event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " NCTS_set/clr ,Enable or disable interrupt on NCTS event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CTS_set/clr ,Enable or disable interrupt on CTS event" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x480++0x03
|
|
line.long 0x00 "ERRORSRC,Error source"
|
|
eventfld.long 0x00 3. " BREAK ,Break condition" "Not occurred,Occurred"
|
|
eventfld.long 0x00 2. " FRAMING ,Framing error occurred" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PARITY ,Parity error" "No error,Error"
|
|
eventfld.long 0x00 0. " OVERRUN ,Overrun error" "No error,Error"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable UART"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable UART" "Disabled,,,,Enabled,?..."
|
|
elif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
bitfld.long 0x00 0.--3. " ENABLE ,Enable UART" "Disabled,,,,,,,,Enabled,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " ENABLE ,Enable UART" "Disabled,,,,Enabled,,,"
|
|
endif
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40002000+0x508))&0x20)==0x00)
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELRTS,Pin select for RTS"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "PSELRTS,Pin select for RTS"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40002000+0x50C))&0x20)==0x00)
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELTXD,Pin select for TXD"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "PSELTXD,Pin select for TXD"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40002000+0x510))&0x20)==0x00)
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELCTS,Pin select for CTS"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "PSELCTS,Pin select for CTS"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40002000+0x514))&0x20)==0x00)
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "PSELRXD,Pin select for RXD"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "PSELRXD,Pin select for RXD"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
elif cpuis("NRF52810QC")||cpuis("NRF52810QF")
|
|
group.long 0x508++0x0F
|
|
line.long 0x00 "PSELRTS,Pin select for RTS"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x04 "PSELTXD,Pin select for TXD"
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x08 "PSELCTS,Pin select for CTS"
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
line.long 0x0C "PSELRXD,Pin select for RXD"
|
|
bitfld.long 0x0C 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
sif cpuis("NRF52810QC")
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
else
|
|
bitfld.long 0x0C 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
else
|
|
group.long 0x508++0x0F
|
|
line.long 0x00 "PSELRTS,Pin select for RTS"
|
|
line.long 0x04 "PSELTXD,Pin select for TXD"
|
|
line.long 0x08 "PSELCTS,Pin select for CTS"
|
|
line.long 0x0C "PSELRXD,Pin select for RXD"
|
|
endif
|
|
sif !cpuis("NRF52810QF")&&!cpuis("NRF52840QI")&&!cpuis("NRF52810QC")
|
|
rgroup.long 0x518++0x03
|
|
line.long 0x00 "RXD,RXD register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXD ,RX data received in previous transfers"
|
|
wgroup.long 0x51C++0x03
|
|
line.long 0x00 "TXD,TXD register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXD ,TX data to be transferred"
|
|
endif
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "BAUDRATE,Baud rate"
|
|
sif cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI")
|
|
group.long 0x534++0x0B
|
|
line.long 0x00 "RXD_PTR,Data pointer"
|
|
line.long 0x04 "RXD_MAXCNT,Maximum number of bytes in receive buffer"
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXCNT ,Maximum number of bytes in transmit buffer"
|
|
line.long 0x08 "RXD_AMOUNT,Number of bytes transferred in the last transaction"
|
|
hexmask.long.word 0x08 0.--9. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
group.long 0x544++0x0B
|
|
line.long 0x00 "TXD_PTR,Data pointer"
|
|
line.long 0x04 "TXD_MAXCNT,Maximum number of bytes in receive buffer"
|
|
hexmask.long.word 0x04 0.--9. 1. " MAXCNT ,Maximum number of bytes in receive buffer"
|
|
line.long 0x08 "TXD_AMOUNT,Number of bytes transferred in the last transaction"
|
|
hexmask.long.word 0x08 0.--9. 1. " AMOUNT ,Number of bytes transferred in the last transaction"
|
|
endif
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "CONFIG,Configuration of parity and hardware flow control"
|
|
sif cpuis("NRF52810*")
|
|
bitfld.long 0x00 4. " STOP ,Stop bits" "1,2"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 1.--3. " PARITY ,Parity" "Excluded,,,,,,,Included"
|
|
bitfld.long 0x00 0. " HWFC ,Hardware flow control" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Quadrature Decoder (QDEC)"
|
|
base ad:0x40012000
|
|
width 12.
|
|
group.long 0x00++0x0B "TASKS"
|
|
line.long 0x00 "START,Task Starting The Quadrature Decoder"
|
|
line.long 0x04 "STOP,Task Stopping The Quadrature Decoder"
|
|
line.long 0x08 "READCLRACC,Task Transferring The Content"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI"))
|
|
group.long 0x0C++0x07
|
|
line.long 0x00 "RDCLRACC,Read And Clear ACC"
|
|
line.long 0x04 "RDCLRDBL,Read And Clear ACCDBL"
|
|
endif
|
|
group.long 0x100++0x0B "EVENTS"
|
|
line.long 0x00 "SAMPLERDY,Event Being Generated For Every New Sample Value Written To The SAMPLE Register"
|
|
line.long 0x04 "REPORTRDY,Event Being Generated When REPORTPER Number Of Samples Has Been Accumulated"
|
|
line.long 0x08 "ACCOF,ACC Or ACCDBL Register Overflow"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI"))
|
|
group.long 0x10C++0x07
|
|
line.long 0x00 "DBLRDY,Double Displacement Detected"
|
|
line.long 0x04 "STOPPED,QDEC Has Been Stopped"
|
|
endif
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts Register"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI"))
|
|
bitfld.long 0x00 6. " SAMPLERDY_READCLRACC ,Short SAMPLERDY event to READCLRACC task" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DBLRDY_STOP ,Short DBLRDY event to STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DBLRDY_RDCLRDBL ,Short DBLRDY event to RDCLRDBL task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " REPORTRDY_STOP ,Short REPORTRDY event to STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " REPORTRDY_RDCLRACC ,Short REPORTRDY event to RDCLRACC task" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 1. " SAMPLERDY_STOP ,Short SAMPLERDY event to STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " REPORTRDY_READCLRACC ,Short REPORTRDY event to READCLRACC task" "Disabled,Enabled"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI"))
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " STOPPED ,Enable or disable interrupt on STOPPED event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " DBLRDY ,Enable or disable interrupt on DBLRDY event" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " ACCOF_set/clr ,Enable or disable interrupt on ACCOF event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " REPORTRDY_set/clr ,Enable or disable interrupt on REPORTRDY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " SAMPLERDY_set/clr ,Enable or disable interrupt on SAMPLERDY event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " ACCOF_set/clr ,Enable or disable interrupt on ACCOF event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " REPORTRDY_set/clr ,Enable or disable interrupt on REPORTRDY event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " SAMPLERDY_set/clr ,Enable or disable interrupt on SAMPLERDY event" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable the quadrature decoder" "Disabled,Enabled"
|
|
group.long 0x504++0x07
|
|
line.long 0x00 "LEDPOL,LED Output Pin Polarity"
|
|
bitfld.long 0x00 0. " LEDPOL ,LED output polarity" "Active Low,Active High"
|
|
line.long 0x04 "SAMPLEPER,Sample period"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52810QF")||cpuis("NRF52840QI"))
|
|
bitfld.long 0x04 0.--3. " SAMPLEPER ,Sample period" "128us,256us,512us,1024us,2048us,4096us,8192us,16384us,32ms,65ms,131ms,?..."
|
|
else
|
|
bitfld.long 0x04 0.--2. " VAL ,Sample period" "128us,256us,512us,1024us,2048us,4096us,8192us,16384us"
|
|
endif
|
|
rgroup.long 0x50C++0x03
|
|
line.long 0x00 "SAMPLE,Motion Sample Value"
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "REPORTPER,Number Of Samples To Be Taken Before a REPORTRDY Event Is Generated"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QC")||cpuis("NRF52810QF"))
|
|
bitfld.long 0x00 0.--3. " REPORTPER ,Specifies the number of samples to be accumulated in the ACC register" "10-SMPL,40-SMPL,80-SMPL,120-SMPL,160-SMPL,200-SMPL,240-SMPL,280-SMPL,1-SMPL,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " VAL ,Specifies the number of samples to be accumulated in the ACC register" "10-SMPL,40-SMPL,80-SMPL,120-SMPL,160-SMPL,200-SMPL,240-SMPL,280-SMPL"
|
|
endif
|
|
rgroup.long 0x514++0x07
|
|
line.long 0x00 "ACC,Register Accumulating The Valid Transitions"
|
|
line.long 0x04 "ACCREAD,Snapshot Of The ACC Register Updated By The READCLRACC Task"
|
|
sif cpuis("NRF52840QI")
|
|
if (((per.l(ad:0x40012000+0x51C))&0x20)==0x00)
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "PSELLED,GPIO Pin Number To Be Used As LED Output"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "PSELLED,GPIO Pin Number To Be Used As LED Output"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40012000+0x520))&0x20)==0x00)
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "PSELA,GPIO Pin Number To Be Used As Phase A Input"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "PSELA,GPIO Pin Number To Be Used As Phase A Input"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
if (((per.l(ad:0x40012000+0x524))&0x20)==0x00)
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "PSELB,GPIO Pin Number To Be Used As Phase B Input"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "PSELB,GPIO Pin Number To Be Used As Phase B Input"
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 5. " PORT ,Port number" "0,1"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
endif
|
|
else
|
|
group.long 0x51C++0x0B
|
|
line.long 0x00 "PSELLED,GPIO Pin Number To Be Used As LED Output"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
elif cpuis("NRF52810QC")
|
|
bitfld.long 0x00 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x00 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
line.long 0x04 "PSELA,GPIO Pin Number To Be Used As Phase A Input"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
elif cpuis("NRF52810QC")
|
|
bitfld.long 0x04 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x04 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
line.long 0x08 "PSELB,GPIO Pin Number To Be Used As Phase B Input"
|
|
sif cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52810QF")
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
elif cpuis("NRF52810QC")
|
|
bitfld.long 0x08 31. " CONNECT ,Connection" "Connected,Disconnected"
|
|
bitfld.long 0x08 0.--4. " PIN ,Pin number" "0,1,,,4,5,6,,,9,10,,12,,14,15,16,,18,,20,21,,,,25,,,28,,30,?..."
|
|
endif
|
|
endif
|
|
group.long 0x528++0x0B
|
|
line.long 0x00 "DBFEN,Enable Input Debounce Filters"
|
|
bitfld.long 0x00 0. " DBFEN ,Enable input debounce filters" "Disabled,Enabled"
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "LEDPRE,Time Period The LED Is Switched ON Prior To Sampling"
|
|
hexmask.long.word 0x00 0.--8. 1. " LEDPRE ,Period in US the LED is switched on prior to sampling"
|
|
rgroup.long 0x544++0x07
|
|
line.long 0x00 "ACCDBL,Register Accumulating The Number Of Detected Double Transitions"
|
|
bitfld.long 0x00 0.--3. " ACCDBL ,Register accumulating the number of detected double or illegal transitions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "ACCDBLREAD,Snapshot Of The ACCDBL"
|
|
bitfld.long 0x04 0.--3. " ACCDBLREAD ,Snapshot of the ACCDBL register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Analog to Digital Converter (ADC)"
|
|
base ad:0x40007000
|
|
width 10.
|
|
group.long 0x00++0x07 "TASKS"
|
|
line.long 0x00 "START,Start a new ADC conversion"
|
|
line.long 0x04 "STOP,Stop ADC"
|
|
group.long 0x100++0x03 "EVENTS"
|
|
line.long 0x00 "END,An ADC conversion is completed"
|
|
group.long 0x300++0x03 "REGISTERS"
|
|
line.long 0x00 "INTEN,Enable or disable interrupt"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " END_set/clr ,Enable or disable interrupt on END event" "Disabled,Enabled"
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "BUSY,ADC busy"
|
|
bitfld.long 0x00 0. " BUSY ,Busy" "Ready,Busy"
|
|
group.long 0x500++0x07
|
|
line.long 0x00 "ENABLE,Enable register"
|
|
bitfld.long 0x00 0.--1. " VAL ,Enable register" "Disabled,Enabled,,?..."
|
|
line.long 0x04 "CONFIG,ADC configuration"
|
|
bitfld.long 0x04 16.--17. " EXTREFSEL ,External reference pin selection" "NONE,AREF0,AREF1,?..."
|
|
hexmask.long.byte 0x04 8.--15. 1. " PSEL ,Select pin to be used as ADC input pin"
|
|
bitfld.long 0x04 5.--6. " REFSEL ,ADC reference selection" "VBG,EXT,VDD-1/2-PS,VDD-1/3-PS"
|
|
bitfld.long 0x04 2.--4. " INPSEL ,ADC input selection" "AIN-NO-PS,AIN-2/3-PS,AIN-1/3-PS,VDD-2/3-PS,VDD-1/3-PS,?..."
|
|
bitfld.long 0x04 0.--1. " RES ,ADC resolution" "8-Bit,9-Bit,10-bit,?..."
|
|
rgroup.long 0x508++0x03
|
|
line.long 0x00 "RESULT,Result of the previous ADC conversion"
|
|
hexmask.long.word 0x00 0.--9. 1. " RESULT ,Result of the previous ADC conversion"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Low Power Comparator (LPCOMP)"
|
|
base ad:0x40013000
|
|
width 15.
|
|
group.long 0x00++0x0B "TASKS"
|
|
line.long 0x00 "START,Start Comparator"
|
|
line.long 0x04 "STOP,Stop Comparator"
|
|
line.long 0x08 "SAMPLE,Sample Comparator Value"
|
|
group.long 0x100++0x0F "EVENTS"
|
|
line.long 0x00 "READY,LPCOMP Is Ready And Output is Valid"
|
|
line.long 0x04 "DOWN,Downward Crossing"
|
|
line.long 0x08 "UP,Upward Crossing"
|
|
line.long 0x0C "CROSS,Downward Or Upward Crossing"
|
|
group.long 0x200++0x03 "REGISTERS"
|
|
line.long 0x00 "SHORTS,Shortcuts For LPCOMP"
|
|
bitfld.long 0x00 4. " CROSS_STOP ,Shortcut between CROSS event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " UP_STOP ,Shortcut between UP event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DOWN_STOP ,Shortcut between DOWN event and STOP task" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " READY_STOP ,Shortcut between READY event and STOP task" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " READY_SAMPLE ,Shortcut between READY event and SAMPLE task" "Disabled,Enabled"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*"))
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "INTEN,Enable or Disable Interrupt"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " CROSS_set/clr ,Enable or disable interrupt on CROSS event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " UP_set/clr ,Enable or disable interrupt on UP event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " DOWN_set/clr ,Enable or disable interrupt on DOWN event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " READY_set/clr ,Enable or disable interrupt on READY event" "Disabled,Enabled"
|
|
else
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "INTEN,Enable Or Disable Interrupt"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CROSS_set/clr ,Enable or disable interrupt on CROSS event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " UP_set/clr ,Enable or disable interrupt on UP event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " DOWN_set/clr ,Enable or disable interrupt on DOWN event" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " READY_set/clr ,Enable or disable interrupt on READY event" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "RESULT,Compare Result"
|
|
bitfld.long 0x00 0. " RESULT ,Result of last compare" "Below,Above"
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "ENABLE,Enable Register"
|
|
bitfld.long 0x00 0.--1. " ENABLE ,Enable register" "Disabled,Enabled,?..."
|
|
group.long 0x504++0x0B
|
|
line.long 0x00 "PSEL,Input Pin Select"
|
|
bitfld.long 0x00 0.--2. " PSEL ,Analog pin select" "AIN0,AIN1,AIN2,AIN3,AIN4,AIN5,AIN6,AIN7"
|
|
line.long 0x04 "REFSEL,Reference Select"
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA"))
|
|
bitfld.long 0x04 0.--3. " REFSEL ,Analog pin select" "VDD*1/8,VDD*2/8,VDD*3/8,VDD*4/8,VDD*5/8,VDD*6/8,VDD*7/8,AREF,VDD*1/16,VDD*3/16,VDD*5/16,VDD*7/16,VDD*9/16,VDD*11/16,VDD*13/16,VDD*15/16"
|
|
elif cpuis("NRF52840*")
|
|
bitfld.long 0x04 0.--3. " REFSEL ,Reference select" "VDD*1/8,VDD*2/8,VDD*3/8,VDD*4/8,VDD*5/8,VDD*6/8,VDD*7/8,AREF,VDD*1/16,VDD*3/16,VDD*5/16,VDD*7/16,VDD*9/16,VDD*11/16,VDD*13/16,VDD*15/16"
|
|
else
|
|
bitfld.long 0x04 0.--2. " REFSEL ,Reference select" "VDD*1/8,VDD*2/8,VDD*3/8,VDD*4/8,VDD*5/8,VDD*6/8,VDD*7/8,AREF"
|
|
endif
|
|
line.long 0x08 "EXTREFSEL,External Reference Select"
|
|
bitfld.long 0x08 0. " EXTREFSEL ,External analog reference select" "AREF0,AREF1"
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "ANADETECT,Analog Detect Configuration"
|
|
bitfld.long 0x00 0.--1. " ANADETECT ,Analog detect configuration" "Crossed,Up,Down,?..."
|
|
sif (cpuis("NRF52832QFAA")||cpuis("NRF52832CEAA")||cpuis("NRF52832QFAB")||cpuis("NRF52832CIAA")||cpuis("NRF52840*"))
|
|
group.long 0x538++0x03
|
|
line.long 0x00 "HYST,Comparator Hysteresis Enable"
|
|
bitfld.long 0x00 0. " HYST ,Comparator hysteresis enable" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
textline " "
|