4599 lines
373 KiB
Plaintext
4599 lines
373 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: IMC300 On-Chip Peripherals
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; @Props: Released
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; @Author: JON
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; @Changelog: 2022-05-12 JON
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; @Manufacturer: INFINEON - Infineon Technologies AG
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; @Doc: SVD generated (SVD2PER 1.8.0), based on: IMC300A.svd (Ver. 1.0)
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; @Core: Cortex-M0
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; @Chip: IMC301A, IMC302A
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perimc300.per 14740 2022-05-12 12:31:50Z kwisniewski $
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tree.close "Core Registers (Cortex-M0)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 0x8
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if (CORENAME()=="CORTEXM1")
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group.long 0x10++0x0b
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line.long 0x00 "STCSR,SysTick Control and Status Register"
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bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
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bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock"
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textline " "
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bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
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bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
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line.long 0x04 "STRVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
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line.long 0x08 "STCVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
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else
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group.long 0x10++0x0b
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line.long 0x00 "STCSR,SysTick Control and Status Register"
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bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
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bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock"
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textline " "
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bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
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bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
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line.long 0x04 "STRVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
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line.long 0x08 "STCVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
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endif
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if (CORENAME()=="CORTEXM1")
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rgroup.long 0x1c++0x03
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line.long 0x00 "STCR,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1"
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bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1"
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textline " "
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known"
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else
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rgroup.long 0x1c++0x03
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line.long 0x00 "STCR,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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textline " "
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors"
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endif
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rgroup.long 0xd00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer code"
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hexmask.long.byte 0x00 20.--23. 1. " VARIANT ,Implementation defined variant number"
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textline " "
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hexmask.long.byte 0x00 4.--15. 1. " PARTNO ,Number of processor within family"
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hexmask.long.byte 0x00 0.--3. 1. " REVISION ,Implementation defined revision number"
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group.long 0xd04++0x03
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending"
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bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending"
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textline " "
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bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending"
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bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending"
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textline " "
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bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending"
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bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt"
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hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field"
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textline " "
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hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field"
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if (CORENAME()=="CORTEXM0+")
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group.long 0xd08++0x03
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line.long 0x00 "VTOR,Vector Table Offset Register"
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hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address"
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else
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textline " "
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endif
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group.long 0xd0c++0x03
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line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key"
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bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian"
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textline " "
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bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset"
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bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear"
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group.long 0xd10++0x03
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line.long 0x00 "SCR,System Control Register"
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bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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textline " "
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bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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rgroup.long 0xd14++0x03
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line.long 0x00 "CCR,Configuration and Control Register"
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bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned"
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bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped"
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group.long 0xd1c++0x0b
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line.long 0x00 "SHPR2,System Handler Priority Register 2"
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bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11"
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line.long 0x04 "SHPR3,System Handler Priority Register 3"
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bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11"
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bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11"
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line.long 0x08 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending"
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if (CORENAME()=="CORTEXM0+")
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hgroup.long 0x08++0x03
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hide.long 0x00 "ACTLR,Auxiliary Control Register"
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else
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textline " "
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endif
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else
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newline
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textline "COREDEBUG component base address not specified"
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newline
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endif
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tree.end
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tree "Nested Vectored Interrupt Controller (NVIC)"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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tree "Interrupt Enable Registers"
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group.long 0x100++0x03
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line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register"
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setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
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tree.end
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tree "Interrupt Pending Registers"
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group.long 0x200++0x03
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line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register"
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setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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textline " "
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setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
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tree.end
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width 6.
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tree "Interrupt Priority Registers"
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group.long 0x400++0x1F
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line.long 0x00 "INT0,Interrupt Priority Register"
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bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3"
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bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3"
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bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3"
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bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3"
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line.long 0x04 "INT1,Interrupt Priority Register"
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bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3"
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bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3"
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bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3"
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bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3"
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line.long 0x08 "INT2,Interrupt Priority Register"
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bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3"
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bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3"
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bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3"
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bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3"
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line.long 0x0C "INT3,Interrupt Priority Register"
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bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3"
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bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3"
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bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3"
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bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3"
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line.long 0x10 "INT4,Interrupt Priority Register"
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bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3"
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bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3"
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bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3"
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bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3"
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line.long 0x14 "INT5,Interrupt Priority Register"
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bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3"
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bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3"
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bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3"
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bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3"
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line.long 0x18 "INT6,Interrupt Priority Register"
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bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3"
|
|
bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3"
|
|
bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3"
|
|
bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3"
|
|
line.long 0x1C "INT7,Interrupt Priority Register"
|
|
bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3"
|
|
bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3"
|
|
bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3"
|
|
bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 0xA
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred"
|
|
eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match"
|
|
textline " "
|
|
eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match"
|
|
eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request"
|
|
if (CORENAME()=="CORTEXM1")
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Selector Register"
|
|
bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write"
|
|
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..."
|
|
group.long 0xDF8++0x07
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor"
|
|
line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Breakpoint Unit (BPU)"
|
|
sif COMPonent.AVAILABLE("BPU")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1))
|
|
width 8.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "BP_CTRL,Breakpoint Control Register"
|
|
bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " KEY ,Key field" "No write,Write"
|
|
bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled"
|
|
else
|
|
newline
|
|
textline "BPU component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 14.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "DW_CTRL,DW Control Register "
|
|
bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "DW_PCSR,DW Program Counter Sample Register"
|
|
hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF"
|
|
group.long 0x20++0x0b
|
|
line.long 0x00 "DW_COMP0,DW Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK0,DW Mask Register 0"
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION0,DW Function Register 0"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
group.long 0x30++0x0b
|
|
line.long 0x00 "DW_COMP1,DW Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK1,DW Mask Register 1 "
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION1,DW Function Register 1"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
autoindent.on center tree
|
|
tree "ADC (Analog to Digital Converter)"
|
|
base ad:0x48030000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CLC,Clock Control Register"
|
|
bitfld.long 0x00 3. "EDIS,Sleep Mode Enable Control" "0: Sleep mode request is enabled and functional,1: Module disregards the sleep mode control signal"
|
|
rbitfld.long 0x00 1. "DISS,Module Disable Status Bit" "0: Module clock is enabled,1: Off"
|
|
newline
|
|
bitfld.long 0x00 0. "DISR,Module Disable Request Bit" "0: On request,1: Off request"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ID,Module Identification Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "MOD_NUMBER,Module Number"
|
|
hexmask.long.byte 0x00 8.--15. 1. "MOD_TYPE,Module Type"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "MOD_REV,Module Revision"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "OCS,OCDS Control and Status Register"
|
|
rbitfld.long 0x00 29. "SUSSTA,Suspend State" "0: Module is not (yet) suspended,1: Module is suspended"
|
|
bitfld.long 0x00 28. "SUS_P,SUS Write Protection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24.--27. "SUS,OCDS Suspend Control" "0: Will not suspend,1: Hard suspend,2: Soft suspend mode 0,3: Soft suspend mode 1,?..."
|
|
bitfld.long 0x00 3. "TG_P,TGS TGB Write Protection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TGB,OTGB0/1 Bus Select" "0: Trigger Set is output on OTGB0,1: Trigger Set is output on OTGB1"
|
|
bitfld.long 0x00 0.--1. "TGS,Trigger Set for OTGB0/1" "0: No Trigger Set output,1: Trigger Set 1,?..."
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "CFG,Configuration Register"
|
|
bitfld.long 0x00 31. "SUCAL,Start-Up Calibration" "0: No action,1: Initiate start-up calibration"
|
|
bitfld.long 0x00 16. "DPCAL,Disable Post-Calibration" "0: Automatic post-calibration after each..,1: No post-calibration"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "ICLASS,Input Class Register"
|
|
bitfld.long 0x00 8.--10. "CMS,Conversion Mode for Standard Conversions" "0: 12-bit conversion,1: 10-bit conversion,2: 8-bit conversion,?,?,5: 10-bit fast compare mode,?..."
|
|
bitfld.long 0x00 0.--4. "STCS,Sample Time Control for Standard Conversions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "BOUND,Boundary Select Register"
|
|
hexmask.long.word 0x00 16.--27. 1. "BOUNDARY1,Boundary Value 1 for Limit Checking"
|
|
hexmask.long.word 0x00 0.--11. 1. "BOUNDARY0,Boundary Value 0 for Limit Checking"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "EFLAG,Event Flag Register"
|
|
bitfld.long 0x00 24. "REVCLR,Clear Result Event" "0: No action,1: Clear the result event flag REV"
|
|
bitfld.long 0x00 16. "SEVCLR,Clear Source Event" "0: No action,1: Clear the source event flag SEVGLB"
|
|
newline
|
|
bitfld.long 0x00 8. "REV,Result Event" "0: No result event,1: New result was stored in register RES"
|
|
bitfld.long 0x00 0. "SEV,Source Event" "0: No source event,1: A source event has occurred"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "EVNP,Event Node Pointer Register"
|
|
bitfld.long 0x00 16.--19. "REV0NP,Service Request Node Pointer Result" "0: Select shared service request line 0 of..,?,?,3: Select shared service request line 3 of..,?..."
|
|
bitfld.long 0x00 0.--3. "SEV0NP,Service Request Node Pointer Backgr" "0: Select shared service request line 0 of..,?,?,3: Select shared service request line 3 of..,?..."
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "RSSEL,Request Source Channel Select Register"
|
|
bitfld.long 0x00 7. "CHSEL7,Channel Selection 7" "0: Ignore this channel,1: This channel is part of the scan sequence"
|
|
bitfld.long 0x00 6. "CHSEL6,Channel Selection 6" "0: Ignore this channel,1: This channel is part of the scan sequence"
|
|
newline
|
|
bitfld.long 0x00 5. "CHSEL5,Channel Selection 5" "0: Ignore this channel,1: This channel is part of the scan sequence"
|
|
bitfld.long 0x00 4. "CHSEL4,Channel Selection 4" "0: Ignore this channel,1: This channel is part of the scan sequence"
|
|
newline
|
|
bitfld.long 0x00 3. "CHSEL3,Channel Selection 3" "0: Ignore this channel,1: This channel is part of the scan sequence"
|
|
bitfld.long 0x00 2. "CHSEL2,Channel Selection 2" "0: Ignore this channel,1: This channel is part of the scan sequence"
|
|
newline
|
|
bitfld.long 0x00 1. "CHSEL1,Channel Selection 1" "0: Ignore this channel,1: This channel is part of the scan sequence"
|
|
bitfld.long 0x00 0. "CHSEL0,Channel Selection 0" "0: Ignore this channel,1: This channel is part of the scan sequence"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "RSPND,Request Source Pending Register"
|
|
bitfld.long 0x00 7. "CHPND7,Channels Pending 7" "0: Ignore this channel,1: Request conversion of this channel"
|
|
bitfld.long 0x00 6. "CHPND6,Channels Pending 6" "0: Ignore this channel,1: Request conversion of this channel"
|
|
newline
|
|
bitfld.long 0x00 5. "CHPND5,Channels Pending 5" "0: Ignore this channel,1: Request conversion of this channel"
|
|
bitfld.long 0x00 4. "CHPND4,Channels Pending 4" "0: Ignore this channel,1: Request conversion of this channel"
|
|
newline
|
|
bitfld.long 0x00 3. "CHPND3,Channels Pending 3" "0: Ignore this channel,1: Request conversion of this channel"
|
|
bitfld.long 0x00 2. "CHPND2,Channels Pending 2" "0: Ignore this channel,1: Request conversion of this channel"
|
|
newline
|
|
bitfld.long 0x00 1. "CHPND1,Channels Pending 1" "0: Ignore this channel,1: Request conversion of this channel"
|
|
bitfld.long 0x00 0. "CHPND0,Channels Pending 0" "0: Ignore this channel,1: Request conversion of this channel"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "RSCTRL,Request Source Control Register"
|
|
bitfld.long 0x00 23. "GTWC,Write Control for Gate Configuration" "0: No write access to gate configuration,1: Bitfield GTSEL can be written"
|
|
rbitfld.long 0x00 20. "GTLVL,Gate Input Level" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "GTSEL,Gate Input Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 15. "XTWC,Write Control for Trigger Configuration" "0: No write access to trigger configuration,1: Bitfields XTMODE and XTSEL can be written"
|
|
newline
|
|
bitfld.long 0x00 13.--14. "XTMODE,Trigger Operating Mode" "0: No external trigger,1: Trigger event upon a falling edge,2: Trigger event upon a rising edge,3: Trigger event upon any edge"
|
|
rbitfld.long 0x00 12. "XTLVL,External Trigger Level" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "XTSEL,External Trigger Input Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SRCRESREG,Source-specific Result Register" "0: Use GxCHCTRy.RESREG to select a group result..,1: Store result in group result register GxRES1,?,?,?,?,?,?,?,?,?,?,?,?,?,15: Store result in group result register GxRES15"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "RSMR,Request Source Mode Register"
|
|
bitfld.long 0x00 9. "LDEV,Generate Load Event" "0: No action,1: A load event is generated"
|
|
bitfld.long 0x00 8. "CLRPND,Clear Pending Bits" "0: No action,1: The bits in registers BRSPNDx are cleared"
|
|
newline
|
|
rbitfld.long 0x00 7. "REQGT,Request Gate Level" "0: The gate input is low,1: The gate input is high"
|
|
bitfld.long 0x00 5. "LDM,Autoscan Source Load Event Mode" "0: A load event copies all bits from the select..,1: A load event OR combines pending bits with.."
|
|
newline
|
|
bitfld.long 0x00 4. "SCAN,Autoscan Enable" "0: No autoscan,1: Autoscan functionality enabled"
|
|
bitfld.long 0x00 3. "ENSI,Enable Source Interrupt" "0: No request source interrupt,1: A request source interrupt is generated after.."
|
|
newline
|
|
bitfld.long 0x00 2. "ENTR,Enable External Trigger" "0: External trigger disabled,1: External trigger enabled"
|
|
bitfld.long 0x00 0.--1. "ENGT,Enable Gate" "0: No conversion requests are issued,1: Conversion requests issued by pending bits,2: Conversion requests issued by pending bits..,3: Conversion requests issued by pending bits.."
|
|
group.long 0x280++0x03
|
|
line.long 0x00 "RCR,Result Control Register"
|
|
bitfld.long 0x00 31. "SRGEN,Service Request Generation Enable" "0: No service request,1: Service request after a result event"
|
|
bitfld.long 0x00 24. "WFR,Wait-for-Read Mode Enable" "0: Overwrite mode,1: Wait-for-read mode enabled for this register"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "DRCTR,Data Reduction Control" "0: Data reduction disabled,?..."
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "RES,Result Register"
|
|
bitfld.long 0x00 31. "VF,Valid Flag" "0: Read access,1: Read access"
|
|
rbitfld.long 0x00 30. "FCR,Fast Compare Result" "0: Signal level was below compare value,1: Signal level was above compare value"
|
|
newline
|
|
rbitfld.long 0x00 20.--24. "CHNR,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 0.--15. 1. "RESULT,Result of most recent conversion"
|
|
group.long 0x380++0x03
|
|
line.long 0x00 "RESD,Result Register Debug"
|
|
bitfld.long 0x00 31. "VF,Valid Flag" "0: Read access,1: Read access"
|
|
rbitfld.long 0x00 30. "FCR,Fast Compare Result" "0: Signal level was below compare value (debug),1: Signal level was above compare value (debug)"
|
|
newline
|
|
rbitfld.long 0x00 20.--24. "CHNR,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 0.--15. 1. "RESULT,Result of most recent conversion"
|
|
tree.end
|
|
tree "CAN (Controller Area Networks)"
|
|
tree "CAN"
|
|
base ad:0x50040000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CLC,CAN Clock Control Register"
|
|
bitfld.long 0x00 3. "EDIS,Sleep Mode Enable Control" "0,1"
|
|
rbitfld.long 0x00 1. "DISS,Module Disable Status Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "DISR,Module Disable Request Bit" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ID,Module Identification Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "MOD_NUMBER,Module Number Value"
|
|
hexmask.long.byte 0x00 8.--15. 1. "MOD_TYPE,Module Type"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "MOD_REV,Module Revision Number"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "FDR,CAN Fractional Divider Register"
|
|
bitfld.long 0x00 14.--15. "DM,Divider Mode" "0,1,2,3"
|
|
hexmask.long.word 0x00 0.--9. 1. "STEP,Step Value"
|
|
repeat 16. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x100)++0x03
|
|
line.long 0x00 "LIST[$1],List Register $1"
|
|
rbitfld.long 0x00 24. "EMPTY,List Empty Indication" "0: At least one message object is allocated to..,1: No message object is allocated to the list i"
|
|
hexmask.long.byte 0x00 16.--23. 1. "SIZE,List Size"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "END,List End"
|
|
hexmask.long.byte 0x00 0.--7. 1. "BEGIN,List Begin"
|
|
repeat.end
|
|
repeat 8. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x140)++0x03
|
|
line.long 0x00 "MSPND[$1],Message Pending Register $1"
|
|
hexmask.long 0x00 0.--31. 1. "PND,Message Pending"
|
|
repeat.end
|
|
repeat 8. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x180)++0x03
|
|
line.long 0x00 "MSID[$1],Message Index Register $1"
|
|
rbitfld.long 0x00 0.--5. "INDEX,Message Pending Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
repeat.end
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "MSIMASK,Message Index Mask Register"
|
|
hexmask.long 0x00 0.--31. 1. "IM,Message Index Mask"
|
|
group.long 0x1C4++0x03
|
|
line.long 0x00 "PANCTR,Panel Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PANAR2,Panel Argument 2"
|
|
hexmask.long.byte 0x00 16.--23. 1. "PANAR1,Panel Argument 1"
|
|
newline
|
|
rbitfld.long 0x00 9. "RBUSY,Result Busy Flag" "0: No update of PANAR1 and PANAR2 is scheduled..,1: A list command is running (BUSY = 1) that.."
|
|
rbitfld.long 0x00 8. "BUSY,Panel Busy Flag" "0: Panel has finished command and is ready to..,1: Panel operation is in progress"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "PANCMD,Panel Command"
|
|
group.long 0x1C8++0x03
|
|
line.long 0x00 "MCR,Module Control Register"
|
|
bitfld.long 0x00 12.--15. "MPSEL,Message Pending Selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "CLKSEL,Baud Rate Logic Clock Select" "0: No clock supplied,1: value2,2: fOSC_HP,?,4: hard wired to 0,?..."
|
|
group.long 0x1CC++0x03
|
|
line.long 0x00 "MITR,Module Interrupt Trigger Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "IT,Interrupt Trigger"
|
|
tree.end
|
|
tree "CAN_MO"
|
|
base ad:0x50041000
|
|
repeat 32. (increment 0 1)(increment 0 0x20)
|
|
tree "MO[$1]"
|
|
group.long ($2+0x00)++0x03
|
|
line.long 0x00 "MOFCR,Message Object Function Control Register"
|
|
bitfld.long 0x00 24.--27. "DLC,Data Length Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 23. "STT,Single Transmit Trial" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "SDT,Single Data Transfer" "0,1"
|
|
bitfld.long 0x00 21. "RMM,Transmit Object Remote Monitoring" "0: Remote monitoring is disabled,1: Remote monitoring is enabled"
|
|
newline
|
|
bitfld.long 0x00 20. "FRREN,Foreign Remote Request Enable" "0: TXRQ of message object n is set on reception..,1: TXRQ of the message object referenced by the.."
|
|
bitfld.long 0x00 18. "OVIE,Overflow Interrupt Enable" "0: FIFO full interrupt is disabled,1: FIFO full interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x00 17. "TXIE,Transmit Interrupt Enable" "0: Message transmit interrupt is disabled,1: Message transmit interrupt is enabled"
|
|
bitfld.long 0x00 16. "RXIE,Receive Interrupt Enable" "0: Message receive interrupt is disabled,1: Message receive interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x00 11. "DATC,Data Copy" "0: Data fields are not copied,1: Data fields in registers MODATALn and.."
|
|
bitfld.long 0x00 10. "DLCC,Data Length Code Copy" "0: Data length code is not copied,1: Data length code of the gateway source object.."
|
|
newline
|
|
bitfld.long 0x00 9. "IDC,Identifier Copy" "0: The identifier of the gateway source object..,1: The identifier of the gateway source object.."
|
|
bitfld.long 0x00 8. "GDFS,Gateway Data Frame Send" "0: TXRQ is unchanged in the destination object,1: TXRQ is set in the gateway destination object.."
|
|
newline
|
|
bitfld.long 0x00 4. "RXTOE,Receive Time-Out Enable" "0: Message does not take part in receive..,1: Message takes part in receive time-out check"
|
|
bitfld.long 0x00 0.--3. "MMC,Message Mode Control" "0: Standard Message Object,1: Receive FIFO Base Object,2: Transmit FIFO Base Object,3: Transmit FIFO Slave Object,4: Gateway Source Object,?..."
|
|
group.long ($2+0x04)++0x03
|
|
line.long 0x00 "MOFGPR,Message Object FIFO/Gateway Pointer Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "SEL,Object Select Pointer"
|
|
hexmask.long.byte 0x00 16.--23. 1. "CUR,Current Object Pointer"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "TOP,Top Pointer"
|
|
hexmask.long.byte 0x00 0.--7. 1. "BOT,Bottom Pointer"
|
|
group.long ($2+0x08)++0x03
|
|
line.long 0x00 "MOIPR,Message Object Interrupt Pointer Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "CFCVAL,CAN Frame Counter Value"
|
|
hexmask.long.byte 0x00 8.--15. 1. "MPN,Message Pending Number"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "TXINP,Transmit Interrupt Node Pointer" "0: Interrupt output line INT_O0 is selected,1: Interrupt output line INT_O1 is selected,?,?,?,?,?,?,?,?,?,?,?,?,14: Interrupt output line INT_O14 is selected,15: Interrupt output line INT_O15 is selected"
|
|
bitfld.long 0x00 0.--3. "RXINP,Receive Interrupt Node Pointer" "0: Interrupt output line INT_O0 is selected,1: Interrupt output line INT_O1 is selected,?,?,?,?,?,?,?,?,?,?,?,?,14: Interrupt output line INT_O14 is selected,15: Interrupt output line INT_O15 is selected"
|
|
group.long ($2+0x0C)++0x03
|
|
line.long 0x00 "MOAMR,Message Object Acceptance Mask Register"
|
|
bitfld.long 0x00 29. "MIDE,Acceptance Mask Bit for Message IDE Bit" "0: Message object n accepts the reception of..,1: Message object n receives frames only with.."
|
|
hexmask.long 0x00 0.--28. 1. "AM,Acceptance Mask for Message Identifier"
|
|
group.long ($2+0x10)++0x03
|
|
line.long 0x00 "MODATAL,Message Object Data Register Low"
|
|
hexmask.long.byte 0x00 24.--31. 1. "DB3,Data Byte 3 of Message Object n"
|
|
hexmask.long.byte 0x00 16.--23. 1. "DB2,Data Byte 2 of Message Object n"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "DB1,Data Byte 1 of Message Object n"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DB0,Data Byte 0 of Message Object n"
|
|
group.long ($2+0x14)++0x03
|
|
line.long 0x00 "MODATAH,Message Object Data Register High"
|
|
hexmask.long.byte 0x00 24.--31. 1. "DB7,Data Byte 7 of Message Object n"
|
|
hexmask.long.byte 0x00 16.--23. 1. "DB6,Data Byte 6 of Message Object n"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "DB5,Data Byte 5 of Message Object n"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DB4,Data Byte 4 of Message Object n"
|
|
group.long ($2+0x18)++0x03
|
|
line.long 0x00 "MOAR,Message Object Arbitration Register"
|
|
bitfld.long 0x00 30.--31. "PRI,Priority Class" "0: Reserved,1: Transmit acceptance filtering is based on the..,2: Transmit acceptance filtering is based on the..,3: Transmit acceptance filtering is based on the.."
|
|
bitfld.long 0x00 29. "IDE,Identifier Extension Bit of Message Object n" "0: Message object n handles standard frames with..,1: Message object n handles extended frames with.."
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. "ID,CAN Identifier of Message Object n"
|
|
group.long ($2+0x1C)++0x03
|
|
line.long 0x00 "MOCTR,Message Object Control Register"
|
|
bitfld.long 0x00 27. "SETDIR,Reset/Set Message Direction" "0,1"
|
|
bitfld.long 0x00 26. "SETTXEN1,Reset/Set Transmit Enable 1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "SETTXEN0,Reset/Set Transmit Enable 0" "0,1"
|
|
bitfld.long 0x00 24. "SETTXRQ,Reset/Set Transmit Request" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "SETRXEN,Reset/Set Receive Enable" "0,1"
|
|
bitfld.long 0x00 22. "SETRTSEL,Reset/Set Receive/Transmit Selected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "SETMSGVAL,Reset/Set Message Valid" "0,1"
|
|
bitfld.long 0x00 20. "SETMSGLST,Reset/Set Message Lost" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "SETNEWDAT,Reset/Set New Data" "0,1"
|
|
bitfld.long 0x00 18. "SETRXUPD,Reset/Set Receive Updating" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "SETTXPND,Reset/Set Transmit Pending" "0,1"
|
|
bitfld.long 0x00 16. "SETRXPND,Reset/Set Receive Pending" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "RESDIR,Reset/Set Message Direction" "0,1"
|
|
bitfld.long 0x00 10. "RESTXEN1,Reset/Set Transmit Enable 1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "RESTXEN0,Reset/Set Transmit Enable 0" "0,1"
|
|
bitfld.long 0x00 8. "RESTXRQ,Reset/Set Transmit Request" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "RESRXEN,Reset/Set Receive Enable" "0,1"
|
|
bitfld.long 0x00 6. "RESRTSEL,Reset/Set Receive/Transmit Selected" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RESMSGVAL,Reset/Set Message Valid" "0,1"
|
|
bitfld.long 0x00 4. "RESMSGLST,Reset/Set Message Lost" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "RESNEWDAT,Reset/Set New Data" "0,1"
|
|
bitfld.long 0x00 2. "RESRXUPD,Reset/Set Receive Updating" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "RESTXPND,Reset/Set Transmit Pending" "0,1"
|
|
bitfld.long 0x00 0. "RESRXPND,Reset/Set Receive Pending" "0,1"
|
|
group.long ($2+0x1C)++0x03
|
|
line.long 0x00 "MOSTAT,Message Object Status Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PNEXT,Pointer to Next Message Object"
|
|
hexmask.long.byte 0x00 16.--23. 1. "PPREV,Pointer to Previous Message Object"
|
|
newline
|
|
rbitfld.long 0x00 12.--15. "LIST,List Allocation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 11. "DIR,Message Direction" "0: Receive Object selected,1: Transmit Object selected"
|
|
newline
|
|
rbitfld.long 0x00 10. "TXEN1,Transmit Enable 1" "0: Message object n is not enabled for frame..,1: Message object n is enabled for frame.."
|
|
rbitfld.long 0x00 9. "TXEN0,Transmit Enable 0" "0: Message object n is not enabled for frame..,1: Message object n is enabled for frame.."
|
|
newline
|
|
rbitfld.long 0x00 8. "TXRQ,Transmit Request" "0: No transmission of message object n is..,1: Transmission of message object n on the CAN.."
|
|
rbitfld.long 0x00 7. "RXEN,Receive Enable" "0: Message object n is not enabled for frame..,1: Message object n is enabled for frame reception"
|
|
newline
|
|
rbitfld.long 0x00 6. "RTSEL,Receive/Transmit Selected" "0: Message object n is not selected for receive..,1: Message object n is selected for receive or.."
|
|
rbitfld.long 0x00 5. "MSGVAL,Message Valid" "0: Message object n is not valid,1: Message object n is valid"
|
|
newline
|
|
rbitfld.long 0x00 4. "MSGLST,Message Lost" "0: No CAN message is lost,1: A CAN message is lost because NEWDAT has.."
|
|
rbitfld.long 0x00 3. "NEWDAT,New Data" "0: No update of the message object n since last..,1: Message object n has been updated"
|
|
newline
|
|
rbitfld.long 0x00 2. "RXUPD,Receive Updating" "0: No receive update ongoing,1: Message identifier DLC and data of the.."
|
|
rbitfld.long 0x00 1. "TXPND,Transmit Pending" "0: No CAN message has been transmitted,1: A CAN message from message object n has been.."
|
|
newline
|
|
rbitfld.long 0x00 0. "RXPND,Receive Pending" "0: No CAN message has been received,1: A CAN message has been received by the.."
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
repeat 2. (list 0. 1.) (list ad:0x50040200 ad:0x50040300)
|
|
tree "CAN_NODE$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "NCR,Node Control Register"
|
|
bitfld.long 0x00 7. "CALM,CAN Analyzer Mode" "0,1"
|
|
bitfld.long 0x00 6. "CCE,Configuration Change Enable" "0: The Bit Timing Register the Port Control..,1: The Bit Timing Register the Port Control.."
|
|
newline
|
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bitfld.long 0x00 5. "TXDIS,Transmit Disable" "0,1"
|
|
bitfld.long 0x00 4. "CANDIS,CAN Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ALIE,Alert Interrupt Enable" "0: Alert interrupt is disabled,1: Alert interrupt is enabled"
|
|
bitfld.long 0x00 2. "LECIE,LEC Indicated Error Interrupt Enable" "0: Last error code interrupt is disabled,1: Last error code interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "TRIE,Transfer Interrupt Enable" "0: Transfer interrupt is disabled,1: Transfer interrupt is enabled"
|
|
bitfld.long 0x00 0. "INIT,Node Initialization" "0: CAN traffic of this node is enabled,1: CAN traffic of this node is terminated"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "NSR,Node Status Register"
|
|
bitfld.long 0x00 9. "LOE,List Object Error" "0: No List Object Error since last (most recent)..,1: A List Object Error has been detected during.."
|
|
bitfld.long 0x00 8. "LLE,List Length Error" "0: No List Length Error since last (most recent)..,1: A List Length Error has been detected during.."
|
|
newline
|
|
rbitfld.long 0x00 7. "BOFF,Bus-off Status" "0: CAN controller is not in the bus-off state,1: CAN controller is in the bus-off state"
|
|
rbitfld.long 0x00 6. "EWRN,Error Warning Status" "0: No warning limit exceeded,1: One of the error counters REC or TEC reached.."
|
|
newline
|
|
bitfld.long 0x00 5. "ALERT,Alert Warning" "0,1"
|
|
bitfld.long 0x00 4. "RXOK,Message Received Successfully" "0: No successful reception since last (most..,1: A message has been received successfully"
|
|
newline
|
|
bitfld.long 0x00 3. "TXOK,Message Transmitted Successfully" "0: No successful transmission since last (most..,1: A message has been transmitted successfully.."
|
|
bitfld.long 0x00 0.--2. "LEC,Last Error Code" "0,1,2,3,4,5,6,7"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "NIPR,Node Interrupt Pointer Register"
|
|
bitfld.long 0x00 12.--15. "CFCINP,Frame Counter Interrupt Node Pointer" "0: Interrupt output line INT_O0 is selected,1: Interrupt output line INT_O1 is selected,?,?,?,?,?,?,?,?,?,?,?,?,14: Interrupt output line INT_O14 is selected,15: Interrupt output line INT_O15 is selected"
|
|
bitfld.long 0x00 8.--11. "TRINP,Transfer OK Interrupt Node Pointer" "0: Interrupt output line INT_O0 is selected,1: Interrupt output line INT_O1 is selected,?,?,?,?,?,?,?,?,?,?,?,?,14: Interrupt output line INT_O14 is selected,15: Interrupt output line INT_O15 is selected"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "LECINP,Last Error Code Interrupt Node Pointer" "0: Interrupt output line INT_O0 is selected,1: Interrupt output line INT_O1 is selected,?,?,?,?,?,?,?,?,?,?,?,?,14: Interrupt output line INT_O14 is selected,15: Interrupt output line INT_O15 is selected"
|
|
bitfld.long 0x00 0.--3. "ALINP,Alert Interrupt Node Pointer" "0: Interrupt output line INT_O0 is selected,1: Interrupt output line INT_O1 is selected,?,?,?,?,?,?,?,?,?,?,?,?,14: Interrupt output line INT_O14 is selected,15: Interrupt output line INT_O15 is selected"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "NPCR,Node Port Control Register"
|
|
bitfld.long 0x00 8. "LBM,Loop-Back Mode" "0: Loop-Back Mode is disabled,1: Loop-Back Mode is enabled"
|
|
bitfld.long 0x00 0.--2. "RXSEL,Receive Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "NBTR,Node Bit Timing Register"
|
|
bitfld.long 0x00 15. "DIV8,Divide Prescaler Clock by 8" "0: A time quantum lasts (BRP+1) clock cycles,1: A time quantum lasts 8 (BRP+1) clock cycles"
|
|
bitfld.long 0x00 12.--14. "TSEG2,Time Segment After Sample Point" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "TSEG1,Time Segment Before Sample Point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 6.--7. "SJW,(Re) Synchronization Jump Width" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "BRP,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "NECNT,Node Error Counter Register"
|
|
rbitfld.long 0x00 25. "LEINC,Last Error Increment" "0: The last error led to an error counter..,1: The last error led to an error counter.."
|
|
rbitfld.long 0x00 24. "LETD,Last Error Transfer Direction" "0: The last error occurred while the CAN node x..,1: The last error occurred while the CAN node x.."
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "EWRNLVL,Error Warning Level"
|
|
hexmask.long.byte 0x00 8.--15. 1. "TEC,Transmit Error Counter"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "REC,Receive Error Counter"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "NFCR,Node Frame Counter Register"
|
|
bitfld.long 0x00 23. "CFCOV,CAN Frame Counter Overflow Flag" "0: No overflow has occurred since last flag reset,1: An overflow has occurred since last flag reset"
|
|
bitfld.long 0x00 22. "CFCIE,CAN Frame Count Interrupt Enable" "0: CAN frame counter overflow interrupt is..,1: CAN frame counter overflow interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x00 19.--20. "CFMOD,CAN Frame Counter Mode" "0: Frame Count Mode,1: Time Stamp Mode,2: Bit Timing Mode,3: Error Count Mode"
|
|
bitfld.long 0x00 16.--18. "CFSEL,CAN Frame Count Selection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "CFC,CAN Frame Counter"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "CCU4 (Capture Compare Unit 4 - Unit 0)"
|
|
tree "CCU40"
|
|
base ad:0x48040000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GCTRL,Global Control Register"
|
|
bitfld.long 0x00 14.--15. "MSDE,Multi Channel shadow transfer request configuration" "0: Only the shadow transfer for period and..,1: Shadow transfer for the compare period and..,?,3: Shadow transfer for the compare period.."
|
|
bitfld.long 0x00 13. "MSE3,Slice 3 Multi Channel shadow transfer enable" "0: Shadow transfer can only be requested by SW,1: Shadow transfer can be requested via SW and.."
|
|
newline
|
|
bitfld.long 0x00 12. "MSE2,Slice 2 Multi Channel shadow transfer enable" "0: Shadow transfer can only be requested by SW,1: Shadow transfer can be requested via SW and.."
|
|
bitfld.long 0x00 11. "MSE1,Slice 1 Multi Channel shadow transfer enable" "0: Shadow transfer can only be requested by SW,1: Shadow transfer can be requested via SW and.."
|
|
newline
|
|
bitfld.long 0x00 10. "MSE0,Slice 0 Multi Channel shadow transfer enable" "0: Shadow transfer can only be requested by SW,1: Shadow transfer can be requested via SW and.."
|
|
bitfld.long 0x00 8.--9. "SUSCFG,Suspend Mode Configuration" "0: Suspend request ignored,1: Stops all the running slices immediately,2: Stops the block immediately and clamps all..,3: Waits for the roll over of each slice to stop.."
|
|
newline
|
|
bitfld.long 0x00 4.--5. "PCIS,Prescaler Input Clock Selection" "0: Module clock,1: CCU4x.ECLKA,2: CCU4x.ECLKB,3: CCU4x.ECLKC"
|
|
bitfld.long 0x00 0.--2. "PRBC,Prescaler Clear Configuration" "0: SW only,1: GSTATThe register contains the status of the..,2: GSTATThe register contains the status of the..,3: GSTATThe register contains the status of the..,4: GSTATThe register contains the status of the..,?..."
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "GSTAT,Global Status Register"
|
|
rbitfld.long 0x00 8. "PRB,Prescaler Run Bit" "0: Prescaler is stopped,1: Prescaler is running"
|
|
rbitfld.long 0x00 3. "S3I,CC43 IDLE status" "0: Running,1: value2"
|
|
newline
|
|
rbitfld.long 0x00 2. "S2I,CC42 IDLE status" "0: Running,1: value2"
|
|
rbitfld.long 0x00 1. "S1I,CC41 IDLE status" "0: Running,1: value2"
|
|
newline
|
|
rbitfld.long 0x00 0. "S0I,CC40 IDLE status" "0: Running,1: value2"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "GIDLS,Global Idle Set"
|
|
bitfld.long 0x00 9. "PSIC,Prescaler clear" "0,1"
|
|
bitfld.long 0x00 8. "CPRB,Prescaler Run Bit Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SS3I,CC43 IDLE mode set" "0,1"
|
|
bitfld.long 0x00 2. "SS2I,CC42 IDLE mode set" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "SS1I,CC41 IDLE mode set" "0,1"
|
|
bitfld.long 0x00 0. "SS0I,CC40 IDLE mode set" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "GIDLC,Global Idle Clear"
|
|
bitfld.long 0x00 8. "SPRB,Prescaler Run Bit Set" "0,1"
|
|
bitfld.long 0x00 3. "CS3I,CC43 IDLE mode clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CS2I,CC42 IDLE mode clear" "0,1"
|
|
bitfld.long 0x00 1. "CS1I,CC41 IDLE mode clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CS0I,CC40 IDLE mode clear" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GCSS,Global Channel Set"
|
|
bitfld.long 0x00 19. "S3STS,Slice 3 status bit set" "0,1"
|
|
bitfld.long 0x00 18. "S2STS,Slice 2 status bit set" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "S1STS,Slice 1 status bit set" "0,1"
|
|
bitfld.long 0x00 16. "S0STS,Slice 0 status bit set" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "S3PSE,Slice 3 Prescaler shadow transfer set enable" "0,1"
|
|
bitfld.long 0x00 13. "S3DSE,Slice 3 Dither shadow transfer set enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "S3SE,Slice 3 shadow transfer set enable" "0,1"
|
|
bitfld.long 0x00 10. "S2PSE,Slice 2 Prescaler shadow transfer set enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "S2DSE,Slice 2 Dither shadow transfer set enable" "0,1"
|
|
bitfld.long 0x00 8. "S2SE,Slice 2 shadow transfer set enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "S1PSE,Slice 1 Prescaler shadow transfer set enable" "0,1"
|
|
bitfld.long 0x00 5. "S1DSE,Slice 1 Dither shadow transfer set enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "S1SE,Slice 1 shadow transfer set enable" "0,1"
|
|
bitfld.long 0x00 2. "S0PSE,Slice 0 Prescaler shadow transfer set enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "S0DSE,Slice 0 Dither shadow transfer set enable" "0,1"
|
|
bitfld.long 0x00 0. "S0SE,Slice 0 shadow transfer set enable" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GCSC,Global Channel Clear"
|
|
bitfld.long 0x00 19. "S3STC,Slice 3 status bit clear" "0,1"
|
|
bitfld.long 0x00 18. "S2STC,Slice 2 status bit clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "S1STC,Slice 1 status bit clear" "0,1"
|
|
bitfld.long 0x00 16. "S0STC,Slice 0 status bit clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "S3PSC,Slice 3 Prescaler shadow transfer clear" "0,1"
|
|
bitfld.long 0x00 13. "S3DSC,Slice 3 Dither shadow transfer clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "S3SC,Slice 3 shadow transfer clear" "0,1"
|
|
bitfld.long 0x00 10. "S2PSC,Slice 2 Prescaler shadow transfer clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "S2DSC,Slice 2 Dither shadow transfer clear" "0,1"
|
|
bitfld.long 0x00 8. "S2SC,Slice 2 shadow transfer clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "S1PSC,Slice 1 Prescaler shadow transfer clear" "0,1"
|
|
bitfld.long 0x00 5. "S1DSC,Slice 1 Dither shadow transfer clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "S1SC,Slice 1 shadow transfer clear" "0,1"
|
|
bitfld.long 0x00 2. "S0PSC,Slice 0 Prescaler shadow transfer clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "S0DSC,Slice 0 Dither shadow transfer clear" "0,1"
|
|
bitfld.long 0x00 0. "S0SC,Slice 0 shadow transfer clear" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "GCST,Global Channel Status"
|
|
rbitfld.long 0x00 19. "CC43ST,Slice 3 status bit" "0,1"
|
|
rbitfld.long 0x00 18. "CC42ST,Slice 2 status bit" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 17. "CC41ST,Slice 1 status bit" "0,1"
|
|
rbitfld.long 0x00 16. "CC40ST,Slice 0 status bit" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 14. "S3PSS,Slice 3 Prescaler shadow transfer status" "0: Prescaler shadow transfer has not been..,1: Prescaler shadow transfer has been requested"
|
|
rbitfld.long 0x00 13. "S3DSS,Slice 3 Dither shadow transfer status" "0: Dither shadow transfer has not been requested,1: Dither shadow transfer has been requested"
|
|
newline
|
|
rbitfld.long 0x00 12. "S3SS,Slice 3 shadow transfer status" "0: Shadow transfer has not been requested,1: Shadow transfer has been requested"
|
|
rbitfld.long 0x00 10. "S2PSS,Slice 2 Prescaler shadow transfer status" "0: Prescaler shadow transfer has not been..,1: Prescaler shadow transfer has been requested"
|
|
newline
|
|
rbitfld.long 0x00 9. "S2DSS,Slice 2 Dither shadow transfer status" "0: Dither shadow transfer has not been requested,1: Dither shadow transfer has been requested"
|
|
rbitfld.long 0x00 8. "S2SS,Slice 2 shadow transfer status" "0: Shadow transfer has not been requested,1: Shadow transfer has been requested"
|
|
newline
|
|
rbitfld.long 0x00 6. "S1PSS,Slice 1 Prescaler shadow transfer status" "0: Prescaler shadow transfer has not been..,1: Prescaler shadow transfer has been requested"
|
|
rbitfld.long 0x00 5. "S1DSS,Slice 1 Dither shadow transfer status" "0: Dither shadow transfer has not been requested,1: Dither shadow transfer has been requested"
|
|
newline
|
|
rbitfld.long 0x00 4. "S1SS,Slice 1 shadow transfer status" "0: Shadow transfer has not been requested,1: Shadow transfer has been requested"
|
|
rbitfld.long 0x00 2. "S0PSS,Slice 0 Prescaler shadow transfer status" "0: Prescaler shadow transfer has not been..,1: Prescaler shadow transfer has been requested"
|
|
newline
|
|
rbitfld.long 0x00 1. "S0DSS,Slice 0 Dither shadow transfer status" "0: Dither shadow transfer has not been requested,1: Dither shadow transfer has been requested"
|
|
rbitfld.long 0x00 0. "S0SS,Slice 0 shadow transfer status" "0: Shadow transfer has not been requested,1: Shadow transfer has been requested"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "MIDR,Module Identification"
|
|
hexmask.long.word 0x00 16.--31. 1. "MODN,Module Number"
|
|
hexmask.long.byte 0x00 8.--15. 1. "MODT,Module Type"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "MODR,Module Revision"
|
|
tree.end
|
|
repeat 4. (list 40. 41. 42. 43.) (list ad:0x48040100 ad:0x48040200 ad:0x48040300 ad:0x48040400)
|
|
tree "CCU40_CC$1"
|
|
base $2
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "INS1,Input Selector Configuration 1"
|
|
bitfld.long 0x00 16.--21. "EV2IS,Event 2 signal selection" "0: CCU4x.InyAA,1: CCU4x.InyAB,2: CCU4x.InyAC,3: CCU4x.InyAD,4: CCU4x.InyAE,5: CCU4x.InyAF,6: CCU4x.InyAG,7: CCU4x.InyAH,8: CCU4x.InyAI,9: CCU4x.InyAJ,10: CCU4x.InyAK,11: CCU4x.InyAL,12: CCU4x.InyAM,13: CCU4x.InyAN,14: CCU4x.InyAO,15: CCU4x.InyAP,16: CCU4x.InyAQ,17: CCU4x.InyAR,18: CCU4x.InyAS,19: CCU4x.InyAT,20: CCU4x.InyAU,21: CCU4x.InyAV,22: CCU4x.InyAW,23: CCU4x.InyAX,24: CCU4x.InyAY,25: CCU4x.InyAZ,26: CCU4x.InyBA,27: CCU4x.InyBB,28: CCU4x.InyBC,29: CCU4x.InyBD,30: CCU4x.InyBE,31: CCU4x.InyBF,32: CCU4x.InyBG,33: CCU4x.InyBH,34: CCU4x.InyBI,35: CCU4x.InyBJ,36: CCU4x.InyBK,37: CCU4x.InyBL,38: CCU4x.InyBM,39: CCU4x.InyBN,40: CCU4x.InyBO,41: CCU4x.InyBP,42: CCU4x.InyBQ,43: CCU4x.InyBR,44: CCU4x.InyBS,45: CCU4x.InyBT,46: CCU4x.InyBU,47: CCU4x.InyBV,?..."
|
|
bitfld.long 0x00 8.--13. "EV1IS,Event 1 signal selection" "0: CCU4x.InyAA,1: CCU4x.InyAB,2: CCU4x.InyAC,3: CCU4x.InyAD,4: CCU4x.InyAE,5: CCU4x.InyAF,6: CCU4x.InyAG,7: CCU4x.InyAH,8: CCU4x.InyAI,9: CCU4x.InyAJ,10: CCU4x.InyAK,11: CCU4x.InyAL,12: CCU4x.InyAM,13: CCU4x.InyAN,14: CCU4x.InyAO,15: CCU4x.InyAP,16: CCU4x.InyAQ,17: CCU4x.InyAR,18: CCU4x.InyAS,19: CCU4x.InyAT,20: CCU4x.InyAU,21: CCU4x.InyAV,22: CCU4x.InyAW,23: CCU4x.InyAX,24: CCU4x.InyAY,25: CCU4x.InyAZ,26: CCU4x.InyBA,27: CCU4x.InyBB,28: CCU4x.InyBC,29: CCU4x.InyBD,30: CCU4x.InyBE,31: CCU4x.InyBF,32: CCU4x.InyBG,33: CCU4x.InyBH,34: CCU4x.InyBI,35: CCU4x.InyBJ,36: CCU4x.InyBK,37: CCU4x.InyBL,38: CCU4x.InyBM,39: CCU4x.InyBN,40: CCU4x.InyBO,41: CCU4x.InyBP,42: CCU4x.InyBQ,43: CCU4x.InyBR,44: CCU4x.InyBS,45: CCU4x.InyBT,46: CCU4x.InyBU,47: CCU4x.InyBV,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--5. "EV0IS,Event 0 signal selection" "0: CCU4x.InyAA,1: CCU4x.InyAB,2: CCU4x.InyAC,3: CCU4x.InyAD,4: CCU4x.InyAE,5: CCU4x.InyAF,6: CCU4x.InyAG,7: CCU4x.InyAH,8: CCU4x.InyAI,9: CCU4x.InyAJ,10: CCU4x.InyAK,11: CCU4x.InyAL,12: CCU4x.InyAM,13: CCU4x.InyAN,14: CCU4x.InyAO,15: CCU4x.InyAP,16: CCU4x.InyAQ,17: CCU4x.InyAR,18: CCU4x.InyAS,19: CCU4x.InyAT,20: CCU4x.InyAU,21: CCU4x.InyAV,22: CCU4x.InyAW,23: CCU4x.InyAX,24: CCU4x.InyAY,25: CCU4x.InyAZ,26: CCU4x.InyBA,27: CCU4x.InyBB,28: CCU4x.InyBC,29: CCU4x.InyBD,30: CCU4x.InyBE,31: CCU4x.InyBF,32: CCU4x.InyBG,33: CCU4x.InyBH,34: CCU4x.InyBI,35: CCU4x.InyBJ,36: CCU4x.InyBK,37: CCU4x.InyBL,38: CCU4x.InyBM,39: CCU4x.InyBN,40: CCU4x.InyBO,41: CCU4x.InyBP,42: CCU4x.InyBQ,43: CCU4x.InyBR,44: CCU4x.InyBS,45: CCU4x.InyBT,46: CCU4x.InyBU,47: CCU4x.InyBV,?..."
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "INS2,Input Selector Configuration 2"
|
|
bitfld.long 0x00 24.--25. "LPF2M,Event 2 Low Pass Filter Configuration" "0: LPF is disabled,1: 3 clock cycles of fCCU4,2: 5 clock cycles of fCCU4,3: 7 clock cycles of fCCU4"
|
|
bitfld.long 0x00 20.--21. "LPF1M,Event 1 Low Pass Filter Configuration" "0: LPF is disabled,1: 3 clock cycles of fCCU4,2: 5 clock cycles of fCCU4,3: 7 clock cycles of fCCU4"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "LPF0M,Event 0 Low Pass Filter Configuration" "0: LPF is disabled,1: 3 clock cycles of fCCU4,2: 5 clock cycles of fCCU4,3: 7 clock cycles of fCCU4"
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bitfld.long 0x00 10. "EV2LM,Event 2 Level Selection" "0: Active on HIGH level,1: Active on LOW level"
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bitfld.long 0x00 8.--9. "EV2EM,Event 2 Edge Selection" "0: No action,1: Signal active on rising edge,2: Signal active on falling edge,3: Signal active on both edges"
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bitfld.long 0x00 6. "EV1LM,Event 1 Level Selection" "0: Active on HIGH level,1: Active on LOW level"
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bitfld.long 0x00 4.--5. "EV1EM,Event 1 Edge Selection" "0: No action,1: Signal active on rising edge,2: Signal active on falling edge,3: Signal active on both edges"
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bitfld.long 0x00 2. "EV0LM,Event 0 Level Selection" "0: Active on HIGH level,1: Active on LOW level"
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newline
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bitfld.long 0x00 0.--1. "EV0EM,Event 0 Edge Selection" "0: No action,1: Signal active on rising edge,2: Signal active on falling edge,3: Signal active on both edges"
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group.long 0x04++0x03
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line.long 0x00 "CMC,Connection Matrix Control"
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bitfld.long 0x00 20. "TCE,Timer Concatenation Enable" "0: Timer concatenation is disabled,1: Timer concatenation is enabled"
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bitfld.long 0x00 18.--19. "MOS,External Modulation Functionality Selector" "0,1,2,3"
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bitfld.long 0x00 17. "TS,Trap Function Selector" "0: Trap function disabled,1: TRAP function connected to Event 2"
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bitfld.long 0x00 16. "OFS,Override Function Selector" "0: Override functionality disabled,1: Status bit trigger override connected to.."
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newline
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bitfld.long 0x00 14.--15. "CNTS,External Count Selector" "0: External Count Function deactivated,1: External Count Function triggered by Event 0,2: External Count Function triggered by Event 1,3: External Count Function triggered by Event 2"
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bitfld.long 0x00 12.--13. "LDS,External Timer Load Functionality Selector" "0,1,2,3"
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bitfld.long 0x00 10.--11. "UDS,External Up/Down Functionality Selector" "0: External Up/Down Function deactivated,1: External Up/Down Function triggered by Event 0,2: External Up/Down Function triggered by Event 1,3: External Up/Down Function triggered by Event 2"
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bitfld.long 0x00 8.--9. "GATES,External Gate Functionality Selector" "0: External Gating Function deactivated,1: External Gating Function triggered by Event 0,2: External Gating Function triggered by Event 1,3: External Gating Function triggered by Event 2"
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newline
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bitfld.long 0x00 6.--7. "CAP1S,External Capture 1 Functionality Selector" "0: External Capture 1 Function deactivated,1: External Capture 1 Function triggered by..,2: External Capture 1 Function triggered by..,3: External Capture 1 Function triggered by.."
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bitfld.long 0x00 4.--5. "CAP0S,External Capture 0 Functionality Selector" "0: External Capture 0 Function deactivated,1: External Capture 0 Function triggered by..,2: External Capture 0 Function triggered by..,3: External Capture 0 Function triggered by.."
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newline
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bitfld.long 0x00 2.--3. "ENDS,External Stop Functionality Selector" "0: External Stop Function deactivated,1: External Stop Function triggered by Event 0,2: External Stop Function triggered by Event 1,3: External Stop Function triggered by Event 2"
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bitfld.long 0x00 0.--1. "STRTS,External Start Functionality Selector" "0: External Start Function deactivated,1: External Start Function triggered by Event 0,2: External Start Function triggered by Event 1,3: External Start Function triggered by Event 2"
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group.long 0x08++0x03
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line.long 0x00 "TCST,Slice Timer Status"
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rbitfld.long 0x00 1. "CDIR,Timer Counting Direction" "0: Timer is counting up,1: Timer is counting down"
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rbitfld.long 0x00 0. "TRB,Timer Run Bit" "0: Timer is stopped,1: Timer is running"
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group.long 0x0C++0x03
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line.long 0x00 "TCSET,Slice Timer Run Set"
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bitfld.long 0x00 0. "TRBS,Timer Run Bit set" "0,1"
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group.long 0x10++0x03
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line.long 0x00 "TCCLR,Slice Timer Clear"
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bitfld.long 0x00 2. "DITC,Dither Counter Clear" "0,1"
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bitfld.long 0x00 1. "TCC,Timer Clear" "0,1"
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newline
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bitfld.long 0x00 0. "TRBC,Timer Run Bit Clear" "0,1"
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group.long 0x14++0x03
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line.long 0x00 "TC,Slice Timer Control"
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bitfld.long 0x00 25. "MCME,Multi Channel Mode Enable" "0: Multi Channel Mode is disabled,1: Multi Channel Mode is enabled"
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bitfld.long 0x00 24. "EMT,External Modulation Type" "0: External Modulation functionality is clearing..,1: External Modulation functionality is gating.."
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newline
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bitfld.long 0x00 23. "EMS,External Modulation Synchronization" "0: External Modulation functionality is not..,1: External Modulation functionality is.."
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bitfld.long 0x00 22. "TRPSW,TRAP State Clear Control" "0: The slice exits the TRAP state automatically..,1: The TRAP state can only be exited by a SW.."
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newline
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bitfld.long 0x00 21. "TRPSE,TRAP Synchronization Enable" "0: Exiting from TRAP state isn't synchronized..,1: Exiting from TRAP state is synchronized with.."
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bitfld.long 0x00 17. "TRAPE,TRAP enable" "0: TRAP functionality has no effect on the output,1: TRAP functionality affects the output"
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newline
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bitfld.long 0x00 16. "FPE,Floating Prescaler enable" "0: Floating prescaler mode is disabled,1: Floating prescaler mode is enabled"
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bitfld.long 0x00 15. "DIM,Dither input selector" "0: Slice is using its own dither unit,1: Slice is connected to the dither unit of.."
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newline
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bitfld.long 0x00 13.--14. "DITHE,Dither Enable" "0: Dither is disabled,1: Dither is applied to the Period,2: Dither is applied to the Compare,3: Dither is applied to the Period and Compare"
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bitfld.long 0x00 12. "CCS,Continuous Capture Enable" "0: The capture into a specific capture register..,1: The capture into the capture registers is.."
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newline
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bitfld.long 0x00 11. "SCE,Equal Capture Event enable" "0: CCycapt0 and CCycapt1 used for capture trigger,1: Only CCycapt1 used for capture trigger"
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bitfld.long 0x00 10. "STRM,Extended Start Function Control" "0: Sets run bit only (default start),1: Clears the timer and sets run bit (flush/start)"
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newline
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bitfld.long 0x00 8.--9. "ENDM,Extended Stop Function Control" "0: Clears the timer run bit only (default stop),1: Clears the timer only (flush),2: Clears the timer and run bit (flush/stop),?..."
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bitfld.long 0x00 5.--6. "CAPC,Clear on Capture Control" "0: Timer is never cleared on a capture event,1: Timer is cleared on a capture event into..,2: Timer is cleared on a capture event into..,3: Timer is always cleared in a capture event"
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newline
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bitfld.long 0x00 4. "ECM,Extended Capture Mode" "0: Normal Capture Mode,1: Extended Capture Mode"
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rbitfld.long 0x00 3. "CMOD,Capture Compare Mode" "0: Compare Mode,1: Capture Mode"
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newline
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bitfld.long 0x00 2. "CLST,Shadow Transfer on Clear" "0,1"
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bitfld.long 0x00 1. "TSSM,Timer Single Shot Mode" "0: Single shot mode is disabled,1: Single shot mode is enabled"
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newline
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bitfld.long 0x00 0. "TCM,Timer Counting Mode" "0: Edge aligned mode,1: Center aligned mode"
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group.long 0x18++0x03
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line.long 0x00 "PSL,Passive Level Config"
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bitfld.long 0x00 0. "PSL,Output Passive Level" "0: Passive Level is LOW,1: Passive Level is HIGH"
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group.long 0x1C++0x03
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line.long 0x00 "DIT,Dither Config"
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rbitfld.long 0x00 8.--11. "DCNT,Dither counter actual value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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rbitfld.long 0x00 0.--3. "DCV,Dither compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x20++0x03
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line.long 0x00 "DITS,Dither Shadow Register"
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bitfld.long 0x00 0.--3. "DCVS,Dither Shadow Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x24++0x03
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line.long 0x00 "PSC,Prescaler Control"
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bitfld.long 0x00 0.--3. "PSIV,Prescaler Initial Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x28++0x03
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line.long 0x00 "FPC,Floating Prescaler Control"
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bitfld.long 0x00 8.--11. "PVAL,Actual Prescaler Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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rbitfld.long 0x00 0.--3. "PCMP,Floating Prescaler Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x2C++0x03
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line.long 0x00 "FPCS,Floating Prescaler Shadow"
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bitfld.long 0x00 0.--3. "PCMP,Floating Prescaler Shadow Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x30++0x03
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line.long 0x00 "PR,Timer Period Value"
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hexmask.long.word 0x00 0.--15. 1. "PR,Period Register"
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group.long 0x34++0x03
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line.long 0x00 "PRS,Timer Shadow Period Value"
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hexmask.long.word 0x00 0.--15. 1. "PRS,Period Register"
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group.long 0x38++0x03
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line.long 0x00 "CR,Timer Compare Value"
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hexmask.long.word 0x00 0.--15. 1. "CR,Compare Register"
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group.long 0x3C++0x03
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line.long 0x00 "CRS,Timer Shadow Compare Value"
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hexmask.long.word 0x00 0.--15. 1. "CRS,Compare Register"
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group.long 0x70++0x03
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line.long 0x00 "TIMER,Timer Value"
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hexmask.long.word 0x00 0.--15. 1. "TVAL,Timer Value"
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repeat 4. (increment 0 1) (increment 0 0x4)
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group.long ($2+0x74)++0x03
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line.long 0x00 "CV[$1],Capture Register 0"
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rbitfld.long 0x00 20. "FFL,Full Flag" "0: No new value was captured into the specific..,1: A new value was captured into the specific.."
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rbitfld.long 0x00 16.--19. "FPCV,Prescaler Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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newline
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hexmask.long.word 0x00 0.--15. 1. "CAPTV,Capture Value"
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repeat.end
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group.long 0xA0++0x03
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line.long 0x00 "INTS,Interrupt Status"
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rbitfld.long 0x00 11. "TRPF,Trap Flag Status" "0,1"
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rbitfld.long 0x00 10. "E2AS,Event 2 Detection Status" "0: Event 2 not detected,1: Event 2 detected"
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newline
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rbitfld.long 0x00 9. "E1AS,Event 1 Detection Status" "0: Event 1 not detected,1: Event 1 detected"
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rbitfld.long 0x00 8. "E0AS,Event 0 Detection Status" "0: Event 0 not detected,1: Event 0 detected"
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newline
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rbitfld.long 0x00 3. "CMDS,Compare Match while Counting Down" "0: Compare match while counting down not detected,1: Compare match while counting down detected"
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rbitfld.long 0x00 2. "CMUS,Compare Match while Counting Up" "0: Compare match while counting up not detected,1: Compare match while counting up detected"
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newline
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rbitfld.long 0x00 1. "OMDS,One Match while Counting Down" "0: One match while counting down not detected,1: One match while counting down detected"
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rbitfld.long 0x00 0. "PMUS,Period Match while Counting Up" "0: Period match while counting up not detected,1: Period match while counting up detected"
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group.long 0xA4++0x03
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line.long 0x00 "INTE,Interrupt Enable Control"
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bitfld.long 0x00 10. "E2AE,Event 2 interrupt enable" "0: Event 2 detection interrupt is disabled,1: Event 2 detection interrupt is enabled"
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bitfld.long 0x00 9. "E1AE,Event 1 interrupt enable" "0: Event 1 detection interrupt is disabled,1: Event 1 detection interrupt is enabled"
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newline
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bitfld.long 0x00 8. "E0AE,Event 0 interrupt enable" "0: Event 0 detection interrupt is disabled,1: Event 0 detection interrupt is enabled"
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bitfld.long 0x00 3. "CMDE,Compare match while counting down enable" "0: Compare Match while counting down interrupt..,1: Compare Match while counting down interrupt.."
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newline
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bitfld.long 0x00 2. "CMUE,Compare match while counting up enable" "0: Compare Match while counting up interrupt is..,1: Compare Match while counting up interrupt is.."
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bitfld.long 0x00 1. "OME,One match while counting down enable" "0: One Match interrupt is disabled,1: One Match interrupt is enabled"
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newline
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bitfld.long 0x00 0. "PME,Period match while counting up enable" "0: Period Match interrupt is disabled,1: Period Match interrupt is enabled"
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group.long 0xA8++0x03
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line.long 0x00 "SRS,Service Request Selector"
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bitfld.long 0x00 12.--13. "E2SR,Event 2 Service request selector" "0: Forward to CC4ySR0,1: Forward to CC4ySR1,2: Forward to CC4ySR2,3: Forward to CC4ySR3"
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bitfld.long 0x00 10.--11. "E1SR,Event 1 Service request selector" "0: Forward to CC4ySR0,1: Forward to CC4ySR1,2: Forward to CC4ySR2,3: Forward to CC4ySR3"
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newline
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bitfld.long 0x00 8.--9. "E0SR,Event 0 Service request selector" "0: Forward to CC4ySR0,1: Forward to CC4ySR1,2: Forward to CC4ySR2,3: Forward to CC4ySR3"
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bitfld.long 0x00 2.--3. "CMSR,Compare match Service request selector" "0: Forward to CC4ySR0,1: Forward to CC4ySR1,2: Forward to CC4ySR2,3: Forward to CC4ySR3"
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newline
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bitfld.long 0x00 0.--1. "POSR,Period/One match Service request selector" "0: Forward to CC4ySR0,1: Forward to CC4ySR1,2: Forward to CC4ySR2,3: Forward to CC4ySR3"
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group.long 0xAC++0x03
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line.long 0x00 "SWS,Interrupt Status Set"
|
|
bitfld.long 0x00 11. "STRPF,Trap Flag status set" "0,1"
|
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bitfld.long 0x00 10. "SE2A,Event 2 detection set" "0,1"
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newline
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bitfld.long 0x00 9. "SE1A,Event 1 detection set" "0,1"
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bitfld.long 0x00 8. "SE0A,Event 0 detection set" "0,1"
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newline
|
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bitfld.long 0x00 3. "SCMD,Compare match while counting down set" "0,1"
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|
bitfld.long 0x00 2. "SCMU,Compare match while counting up set" "0,1"
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newline
|
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bitfld.long 0x00 1. "SOM,One match while counting down set" "0,1"
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bitfld.long 0x00 0. "SPM,Period match while counting up set" "0,1"
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group.long 0xB0++0x03
|
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line.long 0x00 "SWR,Interrupt Status Clear"
|
|
bitfld.long 0x00 11. "RTRPF,Trap Flag status clear" "0,1"
|
|
bitfld.long 0x00 10. "RE2A,Event 2 detection clear" "0,1"
|
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newline
|
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bitfld.long 0x00 9. "RE1A,Event 1 detection clear" "0,1"
|
|
bitfld.long 0x00 8. "RE0A,Event 0 detection clear" "0,1"
|
|
newline
|
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bitfld.long 0x00 3. "RCMD,Compare match while counting down clear" "0,1"
|
|
bitfld.long 0x00 2. "RCMU,Compare match while counting up clear" "0,1"
|
|
newline
|
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bitfld.long 0x00 1. "ROM,One match while counting down clear" "0,1"
|
|
bitfld.long 0x00 0. "RPM,Period match while counting up clear" "0,1"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "STC,Shadow transfer control"
|
|
bitfld.long 0x00 21. "ASFC,Automatic Shadow transfer request when writing into Floating Prescaler Shadow register" "0: Writing into Floating Prescaler Shadow..,1: Writing into Floating Prescaler Shadow.."
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bitfld.long 0x00 20. "ASDC,Automatic Shadow transfer request when writing into Dither Shadow register" "0: Writing into Dither Shadow register does not..,1: Writing into Dither Shadow register.."
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newline
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bitfld.long 0x00 19. "ASLC,Automatic Shadow transfer request when writing into Passive Level register" "0: Writing into Passivel Level register does not..,1: Writing into Passive Level register.."
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bitfld.long 0x00 17. "ASCC,Automatic Shadow transfer request when writing into Compare Shadow Register" "0: Writing into Compare Shadow register does not..,1: Writing into Compare Shadow register.."
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newline
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bitfld.long 0x00 16. "ASPC,Automatic Shadow Transfer request when writing into Period Shadow Register" "0: Writing into Period Shadow register does not..,1: Writing into Period Shadow register will.."
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|
bitfld.long 0x00 9. "IRFC,Immediate Write into Floating Prescaler Value Configuration" "0: Update of the floating prescaler value is..,1: Update of the floating prescaler value.."
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|
newline
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bitfld.long 0x00 8. "IRDC,Immediate Write into Dither Value Configuration" "0: Update of the dither compare value is done..,1: Update of the dither compare value happens.."
|
|
bitfld.long 0x00 7. "IRLC,Immediate Write into Passive Level Configuration" "0: Update of the pwm passive level is done..,1: Update of the pwm passive level value happens.."
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|
newline
|
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bitfld.long 0x00 5. "IRCC,Immediate Write into Compare Configuration" "0: Update of the compare value is done..,1: Update of the compare value happens.."
|
|
bitfld.long 0x00 4. "IRPC,Immediate Write into Period Configuration" "0: Update of the period value is done coherently..,1: Update of the period value happens.."
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|
newline
|
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bitfld.long 0x00 1.--2. "STM,Shadow transfer mode" "0: Shadow transfer is done in Period Match and..,1: Shadow transfer is done only in Period Match,2: Shadow transfer is done only in One Match,?..."
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|
bitfld.long 0x00 0. "CSE,Cascaded shadow transfer enable" "0: Cascaded shadow transfer disabled,1: Cascaded shadow transfer enabled"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "ECRD0,Extended Read Back 0"
|
|
rbitfld.long 0x00 25. "LCV,Lost Capture Value" "0: ECRD0 No capture was lost,1: ECRD0 A capture was lost"
|
|
rbitfld.long 0x00 24. "FFL,Full Flag" "0: ECRD0 No new value was captured into this..,1: ECRD0 A new value has been captured into this.."
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|
newline
|
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rbitfld.long 0x00 22.--23. "VPTR,Capture register pointer" "0: ECRD0_Capture register 0,1: ECRD0_Capture register 1,2: ECRD0_Capture register 2,3: ECRD0_Capture register 3"
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|
rbitfld.long 0x00 20.--21. "SPTR,Slice pointer" "0: ECRD0_CC40,1: ECRD0_CC41,2: ECRD0_CC42,3: ECRD0_CC43"
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|
newline
|
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rbitfld.long 0x00 16.--19. "FPCV,Prescaler Capture value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "CAPV,Timer Capture Value"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "ECRD1,Extended Read Back 1"
|
|
rbitfld.long 0x00 25. "LCV,Lost Capture Value" "0: ECRD1 No capture was lost,1: ECRD1 A capture was lost"
|
|
rbitfld.long 0x00 24. "FFL,Full Flag" "0: ECRD1 No new value was captured into this..,1: ECRD1 A new value has been captured into this.."
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|
newline
|
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rbitfld.long 0x00 22.--23. "VPTR,Capture register pointer" "0: ECRD1_Capture register 0,1: ECRD1_Capture register 1,2: ECRD1_Capture register 2,3: ECRD1_Capture register 3"
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|
rbitfld.long 0x00 20.--21. "SPTR,Slice pointer" "0: ECRD1_CC40,1: ECRD1_CC41,2: ECRD1_CC42,3: ECRD1_CC43"
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|
newline
|
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rbitfld.long 0x00 16.--19. "FPCV,Prescaler Capture value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "CAPV,Timer Capture Value"
|
|
tree.end
|
|
repeat.end
|
|
tree "CCU41"
|
|
base ad:0x48044000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GCTRL,Global Control Register"
|
|
bitfld.long 0x00 14.--15. "MSDE,Multi Channel shadow transfer request configuration" "0: Only the shadow transfer for period and..,1: Shadow transfer for the compare period and..,?,3: Shadow transfer for the compare period.."
|
|
bitfld.long 0x00 13. "MSE3,Slice 3 Multi Channel shadow transfer enable" "0: Shadow transfer can only be requested by SW,1: Shadow transfer can be requested via SW and.."
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|
newline
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bitfld.long 0x00 12. "MSE2,Slice 2 Multi Channel shadow transfer enable" "0: Shadow transfer can only be requested by SW,1: Shadow transfer can be requested via SW and.."
|
|
bitfld.long 0x00 11. "MSE1,Slice 1 Multi Channel shadow transfer enable" "0: Shadow transfer can only be requested by SW,1: Shadow transfer can be requested via SW and.."
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|
newline
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bitfld.long 0x00 10. "MSE0,Slice 0 Multi Channel shadow transfer enable" "0: Shadow transfer can only be requested by SW,1: Shadow transfer can be requested via SW and.."
|
|
bitfld.long 0x00 8.--9. "SUSCFG,Suspend Mode Configuration" "0: Suspend request ignored,1: Stops all the running slices immediately,2: Stops the block immediately and clamps all..,3: Waits for the roll over of each slice to stop.."
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|
newline
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bitfld.long 0x00 4.--5. "PCIS,Prescaler Input Clock Selection" "0: Module clock,1: CCU4x.ECLKA,2: CCU4x.ECLKB,3: CCU4x.ECLKC"
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|
bitfld.long 0x00 0.--2. "PRBC,Prescaler Clear Configuration" "0: SW only,1: GSTATThe register contains the status of the..,2: GSTATThe register contains the status of the..,3: GSTATThe register contains the status of the..,4: GSTATThe register contains the status of the..,?..."
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|
group.long 0x04++0x03
|
|
line.long 0x00 "GSTAT,Global Status Register"
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|
rbitfld.long 0x00 8. "PRB,Prescaler Run Bit" "0: Prescaler is stopped,1: Prescaler is running"
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|
rbitfld.long 0x00 3. "S3I,CC43 IDLE status" "0: Running,1: value2"
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|
newline
|
|
rbitfld.long 0x00 2. "S2I,CC42 IDLE status" "0: Running,1: value2"
|
|
rbitfld.long 0x00 1. "S1I,CC41 IDLE status" "0: Running,1: value2"
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|
newline
|
|
rbitfld.long 0x00 0. "S0I,CC40 IDLE status" "0: Running,1: value2"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "GIDLS,Global Idle Set"
|
|
bitfld.long 0x00 9. "PSIC,Prescaler clear" "0,1"
|
|
bitfld.long 0x00 8. "CPRB,Prescaler Run Bit Clear" "0,1"
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|
newline
|
|
bitfld.long 0x00 3. "SS3I,CC43 IDLE mode set" "0,1"
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|
bitfld.long 0x00 2. "SS2I,CC42 IDLE mode set" "0,1"
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|
newline
|
|
bitfld.long 0x00 1. "SS1I,CC41 IDLE mode set" "0,1"
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|
bitfld.long 0x00 0. "SS0I,CC40 IDLE mode set" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "GIDLC,Global Idle Clear"
|
|
bitfld.long 0x00 8. "SPRB,Prescaler Run Bit Set" "0,1"
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|
bitfld.long 0x00 3. "CS3I,CC43 IDLE mode clear" "0,1"
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|
newline
|
|
bitfld.long 0x00 2. "CS2I,CC42 IDLE mode clear" "0,1"
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|
bitfld.long 0x00 1. "CS1I,CC41 IDLE mode clear" "0,1"
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|
newline
|
|
bitfld.long 0x00 0. "CS0I,CC40 IDLE mode clear" "0,1"
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|
group.long 0x10++0x03
|
|
line.long 0x00 "GCSS,Global Channel Set"
|
|
bitfld.long 0x00 19. "S3STS,Slice 3 status bit set" "0,1"
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|
bitfld.long 0x00 18. "S2STS,Slice 2 status bit set" "0,1"
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|
newline
|
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bitfld.long 0x00 17. "S1STS,Slice 1 status bit set" "0,1"
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|
bitfld.long 0x00 16. "S0STS,Slice 0 status bit set" "0,1"
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|
newline
|
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bitfld.long 0x00 14. "S3PSE,Slice 3 Prescaler shadow transfer set enable" "0,1"
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|
bitfld.long 0x00 13. "S3DSE,Slice 3 Dither shadow transfer set enable" "0,1"
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|
newline
|
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bitfld.long 0x00 12. "S3SE,Slice 3 shadow transfer set enable" "0,1"
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|
bitfld.long 0x00 10. "S2PSE,Slice 2 Prescaler shadow transfer set enable" "0,1"
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|
newline
|
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bitfld.long 0x00 9. "S2DSE,Slice 2 Dither shadow transfer set enable" "0,1"
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|
bitfld.long 0x00 8. "S2SE,Slice 2 shadow transfer set enable" "0,1"
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|
newline
|
|
bitfld.long 0x00 6. "S1PSE,Slice 1 Prescaler shadow transfer set enable" "0,1"
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|
bitfld.long 0x00 5. "S1DSE,Slice 1 Dither shadow transfer set enable" "0,1"
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|
newline
|
|
bitfld.long 0x00 4. "S1SE,Slice 1 shadow transfer set enable" "0,1"
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|
bitfld.long 0x00 2. "S0PSE,Slice 0 Prescaler shadow transfer set enable" "0,1"
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|
newline
|
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bitfld.long 0x00 1. "S0DSE,Slice 0 Dither shadow transfer set enable" "0,1"
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|
bitfld.long 0x00 0. "S0SE,Slice 0 shadow transfer set enable" "0,1"
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|
group.long 0x14++0x03
|
|
line.long 0x00 "GCSC,Global Channel Clear"
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|
bitfld.long 0x00 19. "S3STC,Slice 3 status bit clear" "0,1"
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|
bitfld.long 0x00 18. "S2STC,Slice 2 status bit clear" "0,1"
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|
newline
|
|
bitfld.long 0x00 17. "S1STC,Slice 1 status bit clear" "0,1"
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|
bitfld.long 0x00 16. "S0STC,Slice 0 status bit clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "S3PSC,Slice 3 Prescaler shadow transfer clear" "0,1"
|
|
bitfld.long 0x00 13. "S3DSC,Slice 3 Dither shadow transfer clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "S3SC,Slice 3 shadow transfer clear" "0,1"
|
|
bitfld.long 0x00 10. "S2PSC,Slice 2 Prescaler shadow transfer clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "S2DSC,Slice 2 Dither shadow transfer clear" "0,1"
|
|
bitfld.long 0x00 8. "S2SC,Slice 2 shadow transfer clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "S1PSC,Slice 1 Prescaler shadow transfer clear" "0,1"
|
|
bitfld.long 0x00 5. "S1DSC,Slice 1 Dither shadow transfer clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "S1SC,Slice 1 shadow transfer clear" "0,1"
|
|
bitfld.long 0x00 2. "S0PSC,Slice 0 Prescaler shadow transfer clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "S0DSC,Slice 0 Dither shadow transfer clear" "0,1"
|
|
bitfld.long 0x00 0. "S0SC,Slice 0 shadow transfer clear" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "GCST,Global Channel Status"
|
|
rbitfld.long 0x00 19. "CC43ST,Slice 3 status bit" "0,1"
|
|
rbitfld.long 0x00 18. "CC42ST,Slice 2 status bit" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 17. "CC41ST,Slice 1 status bit" "0,1"
|
|
rbitfld.long 0x00 16. "CC40ST,Slice 0 status bit" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 14. "S3PSS,Slice 3 Prescaler shadow transfer status" "0: Prescaler shadow transfer has not been..,1: Prescaler shadow transfer has been requested"
|
|
rbitfld.long 0x00 13. "S3DSS,Slice 3 Dither shadow transfer status" "0: Dither shadow transfer has not been requested,1: Dither shadow transfer has been requested"
|
|
newline
|
|
rbitfld.long 0x00 12. "S3SS,Slice 3 shadow transfer status" "0: Shadow transfer has not been requested,1: Shadow transfer has been requested"
|
|
rbitfld.long 0x00 10. "S2PSS,Slice 2 Prescaler shadow transfer status" "0: Prescaler shadow transfer has not been..,1: Prescaler shadow transfer has been requested"
|
|
newline
|
|
rbitfld.long 0x00 9. "S2DSS,Slice 2 Dither shadow transfer status" "0: Dither shadow transfer has not been requested,1: Dither shadow transfer has been requested"
|
|
rbitfld.long 0x00 8. "S2SS,Slice 2 shadow transfer status" "0: Shadow transfer has not been requested,1: Shadow transfer has been requested"
|
|
newline
|
|
rbitfld.long 0x00 6. "S1PSS,Slice 1 Prescaler shadow transfer status" "0: Prescaler shadow transfer has not been..,1: Prescaler shadow transfer has been requested"
|
|
rbitfld.long 0x00 5. "S1DSS,Slice 1 Dither shadow transfer status" "0: Dither shadow transfer has not been requested,1: Dither shadow transfer has been requested"
|
|
newline
|
|
rbitfld.long 0x00 4. "S1SS,Slice 1 shadow transfer status" "0: Shadow transfer has not been requested,1: Shadow transfer has been requested"
|
|
rbitfld.long 0x00 2. "S0PSS,Slice 0 Prescaler shadow transfer status" "0: Prescaler shadow transfer has not been..,1: Prescaler shadow transfer has been requested"
|
|
newline
|
|
rbitfld.long 0x00 1. "S0DSS,Slice 0 Dither shadow transfer status" "0: Dither shadow transfer has not been requested,1: Dither shadow transfer has been requested"
|
|
rbitfld.long 0x00 0. "S0SS,Slice 0 shadow transfer status" "0: Shadow transfer has not been requested,1: Shadow transfer has been requested"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "MIDR,Module Identification"
|
|
hexmask.long.word 0x00 16.--31. 1. "MODN,Module Number"
|
|
hexmask.long.byte 0x00 8.--15. 1. "MODT,Module Type"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "MODR,Module Revision"
|
|
tree.end
|
|
repeat 4. (list 40. 41. 42. 43.) (list ad:0x48044100 ad:0x48044200 ad:0x48044300 ad:0x48044400)
|
|
tree "CCU41_CC$1"
|
|
base $2
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "INS1,Input Selector Configuration 1"
|
|
bitfld.long 0x00 16.--21. "EV2IS,Event 2 signal selection" "0: CCU4x.InyAA,1: CCU4x.InyAB,2: CCU4x.InyAC,3: CCU4x.InyAD,4: CCU4x.InyAE,5: CCU4x.InyAF,6: CCU4x.InyAG,7: CCU4x.InyAH,8: CCU4x.InyAI,9: CCU4x.InyAJ,10: CCU4x.InyAK,11: CCU4x.InyAL,12: CCU4x.InyAM,13: CCU4x.InyAN,14: CCU4x.InyAO,15: CCU4x.InyAP,16: CCU4x.InyAQ,17: CCU4x.InyAR,18: CCU4x.InyAS,19: CCU4x.InyAT,20: CCU4x.InyAU,21: CCU4x.InyAV,22: CCU4x.InyAW,23: CCU4x.InyAX,24: CCU4x.InyAY,25: CCU4x.InyAZ,26: CCU4x.InyBA,27: CCU4x.InyBB,28: CCU4x.InyBC,29: CCU4x.InyBD,30: CCU4x.InyBE,31: CCU4x.InyBF,32: CCU4x.InyBG,33: CCU4x.InyBH,34: CCU4x.InyBI,35: CCU4x.InyBJ,36: CCU4x.InyBK,37: CCU4x.InyBL,38: CCU4x.InyBM,39: CCU4x.InyBN,40: CCU4x.InyBO,41: CCU4x.InyBP,42: CCU4x.InyBQ,43: CCU4x.InyBR,44: CCU4x.InyBS,45: CCU4x.InyBT,46: CCU4x.InyBU,47: CCU4x.InyBV,?..."
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|
bitfld.long 0x00 8.--13. "EV1IS,Event 1 signal selection" "0: CCU4x.InyAA,1: CCU4x.InyAB,2: CCU4x.InyAC,3: CCU4x.InyAD,4: CCU4x.InyAE,5: CCU4x.InyAF,6: CCU4x.InyAG,7: CCU4x.InyAH,8: CCU4x.InyAI,9: CCU4x.InyAJ,10: CCU4x.InyAK,11: CCU4x.InyAL,12: CCU4x.InyAM,13: CCU4x.InyAN,14: CCU4x.InyAO,15: CCU4x.InyAP,16: CCU4x.InyAQ,17: CCU4x.InyAR,18: CCU4x.InyAS,19: CCU4x.InyAT,20: CCU4x.InyAU,21: CCU4x.InyAV,22: CCU4x.InyAW,23: CCU4x.InyAX,24: CCU4x.InyAY,25: CCU4x.InyAZ,26: CCU4x.InyBA,27: CCU4x.InyBB,28: CCU4x.InyBC,29: CCU4x.InyBD,30: CCU4x.InyBE,31: CCU4x.InyBF,32: CCU4x.InyBG,33: CCU4x.InyBH,34: CCU4x.InyBI,35: CCU4x.InyBJ,36: CCU4x.InyBK,37: CCU4x.InyBL,38: CCU4x.InyBM,39: CCU4x.InyBN,40: CCU4x.InyBO,41: CCU4x.InyBP,42: CCU4x.InyBQ,43: CCU4x.InyBR,44: CCU4x.InyBS,45: CCU4x.InyBT,46: CCU4x.InyBU,47: CCU4x.InyBV,?..."
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newline
|
|
bitfld.long 0x00 0.--5. "EV0IS,Event 0 signal selection" "0: CCU4x.InyAA,1: CCU4x.InyAB,2: CCU4x.InyAC,3: CCU4x.InyAD,4: CCU4x.InyAE,5: CCU4x.InyAF,6: CCU4x.InyAG,7: CCU4x.InyAH,8: CCU4x.InyAI,9: CCU4x.InyAJ,10: CCU4x.InyAK,11: CCU4x.InyAL,12: CCU4x.InyAM,13: CCU4x.InyAN,14: CCU4x.InyAO,15: CCU4x.InyAP,16: CCU4x.InyAQ,17: CCU4x.InyAR,18: CCU4x.InyAS,19: CCU4x.InyAT,20: CCU4x.InyAU,21: CCU4x.InyAV,22: CCU4x.InyAW,23: CCU4x.InyAX,24: CCU4x.InyAY,25: CCU4x.InyAZ,26: CCU4x.InyBA,27: CCU4x.InyBB,28: CCU4x.InyBC,29: CCU4x.InyBD,30: CCU4x.InyBE,31: CCU4x.InyBF,32: CCU4x.InyBG,33: CCU4x.InyBH,34: CCU4x.InyBI,35: CCU4x.InyBJ,36: CCU4x.InyBK,37: CCU4x.InyBL,38: CCU4x.InyBM,39: CCU4x.InyBN,40: CCU4x.InyBO,41: CCU4x.InyBP,42: CCU4x.InyBQ,43: CCU4x.InyBR,44: CCU4x.InyBS,45: CCU4x.InyBT,46: CCU4x.InyBU,47: CCU4x.InyBV,?..."
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "INS2,Input Selector Configuration 2"
|
|
bitfld.long 0x00 24.--25. "LPF2M,Event 2 Low Pass Filter Configuration" "0: LPF is disabled,1: 3 clock cycles of fCCU4,2: 5 clock cycles of fCCU4,3: 7 clock cycles of fCCU4"
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|
bitfld.long 0x00 20.--21. "LPF1M,Event 1 Low Pass Filter Configuration" "0: LPF is disabled,1: 3 clock cycles of fCCU4,2: 5 clock cycles of fCCU4,3: 7 clock cycles of fCCU4"
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|
newline
|
|
bitfld.long 0x00 16.--17. "LPF0M,Event 0 Low Pass Filter Configuration" "0: LPF is disabled,1: 3 clock cycles of fCCU4,2: 5 clock cycles of fCCU4,3: 7 clock cycles of fCCU4"
|
|
bitfld.long 0x00 10. "EV2LM,Event 2 Level Selection" "0: Active on HIGH level,1: Active on LOW level"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "EV2EM,Event 2 Edge Selection" "0: No action,1: Signal active on rising edge,2: Signal active on falling edge,3: Signal active on both edges"
|
|
bitfld.long 0x00 6. "EV1LM,Event 1 Level Selection" "0: Active on HIGH level,1: Active on LOW level"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "EV1EM,Event 1 Edge Selection" "0: No action,1: Signal active on rising edge,2: Signal active on falling edge,3: Signal active on both edges"
|
|
bitfld.long 0x00 2. "EV0LM,Event 0 Level Selection" "0: Active on HIGH level,1: Active on LOW level"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "EV0EM,Event 0 Edge Selection" "0: No action,1: Signal active on rising edge,2: Signal active on falling edge,3: Signal active on both edges"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CMC,Connection Matrix Control"
|
|
bitfld.long 0x00 20. "TCE,Timer Concatenation Enable" "0: Timer concatenation is disabled,1: Timer concatenation is enabled"
|
|
bitfld.long 0x00 18.--19. "MOS,External Modulation Functionality Selector" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 17. "TS,Trap Function Selector" "0: Trap function disabled,1: TRAP function connected to Event 2"
|
|
bitfld.long 0x00 16. "OFS,Override Function Selector" "0: Override functionality disabled,1: Status bit trigger override connected to.."
|
|
newline
|
|
bitfld.long 0x00 14.--15. "CNTS,External Count Selector" "0: External Count Function deactivated,1: External Count Function triggered by Event 0,2: External Count Function triggered by Event 1,3: External Count Function triggered by Event 2"
|
|
bitfld.long 0x00 12.--13. "LDS,External Timer Load Functionality Selector" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "UDS,External Up/Down Functionality Selector" "0: External Up/Down Function deactivated,1: External Up/Down Function triggered by Event 0,2: External Up/Down Function triggered by Event 1,3: External Up/Down Function triggered by Event 2"
|
|
bitfld.long 0x00 8.--9. "GATES,External Gate Functionality Selector" "0: External Gating Function deactivated,1: External Gating Function triggered by Event 0,2: External Gating Function triggered by Event 1,3: External Gating Function triggered by Event 2"
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|
newline
|
|
bitfld.long 0x00 6.--7. "CAP1S,External Capture 1 Functionality Selector" "0: External Capture 1 Function deactivated,1: External Capture 1 Function triggered by..,2: External Capture 1 Function triggered by..,3: External Capture 1 Function triggered by.."
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|
bitfld.long 0x00 4.--5. "CAP0S,External Capture 0 Functionality Selector" "0: External Capture 0 Function deactivated,1: External Capture 0 Function triggered by..,2: External Capture 0 Function triggered by..,3: External Capture 0 Function triggered by.."
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|
newline
|
|
bitfld.long 0x00 2.--3. "ENDS,External Stop Functionality Selector" "0: External Stop Function deactivated,1: External Stop Function triggered by Event 0,2: External Stop Function triggered by Event 1,3: External Stop Function triggered by Event 2"
|
|
bitfld.long 0x00 0.--1. "STRTS,External Start Functionality Selector" "0: External Start Function deactivated,1: External Start Function triggered by Event 0,2: External Start Function triggered by Event 1,3: External Start Function triggered by Event 2"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "TCST,Slice Timer Status"
|
|
rbitfld.long 0x00 1. "CDIR,Timer Counting Direction" "0: Timer is counting up,1: Timer is counting down"
|
|
rbitfld.long 0x00 0. "TRB,Timer Run Bit" "0: Timer is stopped,1: Timer is running"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "TCSET,Slice Timer Run Set"
|
|
bitfld.long 0x00 0. "TRBS,Timer Run Bit set" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TCCLR,Slice Timer Clear"
|
|
bitfld.long 0x00 2. "DITC,Dither Counter Clear" "0,1"
|
|
bitfld.long 0x00 1. "TCC,Timer Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TRBC,Timer Run Bit Clear" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TC,Slice Timer Control"
|
|
bitfld.long 0x00 25. "MCME,Multi Channel Mode Enable" "0: Multi Channel Mode is disabled,1: Multi Channel Mode is enabled"
|
|
bitfld.long 0x00 24. "EMT,External Modulation Type" "0: External Modulation functionality is clearing..,1: External Modulation functionality is gating.."
|
|
newline
|
|
bitfld.long 0x00 23. "EMS,External Modulation Synchronization" "0: External Modulation functionality is not..,1: External Modulation functionality is.."
|
|
bitfld.long 0x00 22. "TRPSW,TRAP State Clear Control" "0: The slice exits the TRAP state automatically..,1: The TRAP state can only be exited by a SW.."
|
|
newline
|
|
bitfld.long 0x00 21. "TRPSE,TRAP Synchronization Enable" "0: Exiting from TRAP state isn't synchronized..,1: Exiting from TRAP state is synchronized with.."
|
|
bitfld.long 0x00 17. "TRAPE,TRAP enable" "0: TRAP functionality has no effect on the output,1: TRAP functionality affects the output"
|
|
newline
|
|
bitfld.long 0x00 16. "FPE,Floating Prescaler enable" "0: Floating prescaler mode is disabled,1: Floating prescaler mode is enabled"
|
|
bitfld.long 0x00 15. "DIM,Dither input selector" "0: Slice is using its own dither unit,1: Slice is connected to the dither unit of.."
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|
newline
|
|
bitfld.long 0x00 13.--14. "DITHE,Dither Enable" "0: Dither is disabled,1: Dither is applied to the Period,2: Dither is applied to the Compare,3: Dither is applied to the Period and Compare"
|
|
bitfld.long 0x00 12. "CCS,Continuous Capture Enable" "0: The capture into a specific capture register..,1: The capture into the capture registers is.."
|
|
newline
|
|
bitfld.long 0x00 11. "SCE,Equal Capture Event enable" "0: CCycapt0 and CCycapt1 used for capture trigger,1: Only CCycapt1 used for capture trigger"
|
|
bitfld.long 0x00 10. "STRM,Extended Start Function Control" "0: Sets run bit only (default start),1: Clears the timer and sets run bit (flush/start)"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "ENDM,Extended Stop Function Control" "0: Clears the timer run bit only (default stop),1: Clears the timer only (flush),2: Clears the timer and run bit (flush/stop),?..."
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|
bitfld.long 0x00 5.--6. "CAPC,Clear on Capture Control" "0: Timer is never cleared on a capture event,1: Timer is cleared on a capture event into..,2: Timer is cleared on a capture event into..,3: Timer is always cleared in a capture event"
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|
newline
|
|
bitfld.long 0x00 4. "ECM,Extended Capture Mode" "0: Normal Capture Mode,1: Extended Capture Mode"
|
|
rbitfld.long 0x00 3. "CMOD,Capture Compare Mode" "0: Compare Mode,1: Capture Mode"
|
|
newline
|
|
bitfld.long 0x00 2. "CLST,Shadow Transfer on Clear" "0,1"
|
|
bitfld.long 0x00 1. "TSSM,Timer Single Shot Mode" "0: Single shot mode is disabled,1: Single shot mode is enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "TCM,Timer Counting Mode" "0: Edge aligned mode,1: Center aligned mode"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PSL,Passive Level Config"
|
|
bitfld.long 0x00 0. "PSL,Output Passive Level" "0: Passive Level is LOW,1: Passive Level is HIGH"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DIT,Dither Config"
|
|
rbitfld.long 0x00 8.--11. "DCNT,Dither counter actual value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 0.--3. "DCV,Dither compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DITS,Dither Shadow Register"
|
|
bitfld.long 0x00 0.--3. "DCVS,Dither Shadow Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PSC,Prescaler Control"
|
|
bitfld.long 0x00 0.--3. "PSIV,Prescaler Initial Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "FPC,Floating Prescaler Control"
|
|
bitfld.long 0x00 8.--11. "PVAL,Actual Prescaler Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 0.--3. "PCMP,Floating Prescaler Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "FPCS,Floating Prescaler Shadow"
|
|
bitfld.long 0x00 0.--3. "PCMP,Floating Prescaler Shadow Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PR,Timer Period Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "PR,Period Register"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "PRS,Timer Shadow Period Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "PRS,Period Register"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CR,Timer Compare Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "CR,Compare Register"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CRS,Timer Shadow Compare Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "CRS,Compare Register"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "TIMER,Timer Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "TVAL,Timer Value"
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x74)++0x03
|
|
line.long 0x00 "CV[$1],Capture Register 0"
|
|
rbitfld.long 0x00 20. "FFL,Full Flag" "0: No new value was captured into the specific..,1: A new value was captured into the specific.."
|
|
rbitfld.long 0x00 16.--19. "FPCV,Prescaler Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. "CAPTV,Capture Value"
|
|
repeat.end
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "INTS,Interrupt Status"
|
|
rbitfld.long 0x00 11. "TRPF,Trap Flag Status" "0,1"
|
|
rbitfld.long 0x00 10. "E2AS,Event 2 Detection Status" "0: Event 2 not detected,1: Event 2 detected"
|
|
newline
|
|
rbitfld.long 0x00 9. "E1AS,Event 1 Detection Status" "0: Event 1 not detected,1: Event 1 detected"
|
|
rbitfld.long 0x00 8. "E0AS,Event 0 Detection Status" "0: Event 0 not detected,1: Event 0 detected"
|
|
newline
|
|
rbitfld.long 0x00 3. "CMDS,Compare Match while Counting Down" "0: Compare match while counting down not detected,1: Compare match while counting down detected"
|
|
rbitfld.long 0x00 2. "CMUS,Compare Match while Counting Up" "0: Compare match while counting up not detected,1: Compare match while counting up detected"
|
|
newline
|
|
rbitfld.long 0x00 1. "OMDS,One Match while Counting Down" "0: One match while counting down not detected,1: One match while counting down detected"
|
|
rbitfld.long 0x00 0. "PMUS,Period Match while Counting Up" "0: Period match while counting up not detected,1: Period match while counting up detected"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "INTE,Interrupt Enable Control"
|
|
bitfld.long 0x00 10. "E2AE,Event 2 interrupt enable" "0: Event 2 detection interrupt is disabled,1: Event 2 detection interrupt is enabled"
|
|
bitfld.long 0x00 9. "E1AE,Event 1 interrupt enable" "0: Event 1 detection interrupt is disabled,1: Event 1 detection interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x00 8. "E0AE,Event 0 interrupt enable" "0: Event 0 detection interrupt is disabled,1: Event 0 detection interrupt is enabled"
|
|
bitfld.long 0x00 3. "CMDE,Compare match while counting down enable" "0: Compare Match while counting down interrupt..,1: Compare Match while counting down interrupt.."
|
|
newline
|
|
bitfld.long 0x00 2. "CMUE,Compare match while counting up enable" "0: Compare Match while counting up interrupt is..,1: Compare Match while counting up interrupt is.."
|
|
bitfld.long 0x00 1. "OME,One match while counting down enable" "0: One Match interrupt is disabled,1: One Match interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PME,Period match while counting up enable" "0: Period Match interrupt is disabled,1: Period Match interrupt is enabled"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "SRS,Service Request Selector"
|
|
bitfld.long 0x00 12.--13. "E2SR,Event 2 Service request selector" "0: Forward to CC4ySR0,1: Forward to CC4ySR1,2: Forward to CC4ySR2,3: Forward to CC4ySR3"
|
|
bitfld.long 0x00 10.--11. "E1SR,Event 1 Service request selector" "0: Forward to CC4ySR0,1: Forward to CC4ySR1,2: Forward to CC4ySR2,3: Forward to CC4ySR3"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "E0SR,Event 0 Service request selector" "0: Forward to CC4ySR0,1: Forward to CC4ySR1,2: Forward to CC4ySR2,3: Forward to CC4ySR3"
|
|
bitfld.long 0x00 2.--3. "CMSR,Compare match Service request selector" "0: Forward to CC4ySR0,1: Forward to CC4ySR1,2: Forward to CC4ySR2,3: Forward to CC4ySR3"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "POSR,Period/One match Service request selector" "0: Forward to CC4ySR0,1: Forward to CC4ySR1,2: Forward to CC4ySR2,3: Forward to CC4ySR3"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "SWS,Interrupt Status Set"
|
|
bitfld.long 0x00 11. "STRPF,Trap Flag status set" "0,1"
|
|
bitfld.long 0x00 10. "SE2A,Event 2 detection set" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "SE1A,Event 1 detection set" "0,1"
|
|
bitfld.long 0x00 8. "SE0A,Event 0 detection set" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SCMD,Compare match while counting down set" "0,1"
|
|
bitfld.long 0x00 2. "SCMU,Compare match while counting up set" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "SOM,One match while counting down set" "0,1"
|
|
bitfld.long 0x00 0. "SPM,Period match while counting up set" "0,1"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "SWR,Interrupt Status Clear"
|
|
bitfld.long 0x00 11. "RTRPF,Trap Flag status clear" "0,1"
|
|
bitfld.long 0x00 10. "RE2A,Event 2 detection clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "RE1A,Event 1 detection clear" "0,1"
|
|
bitfld.long 0x00 8. "RE0A,Event 0 detection clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "RCMD,Compare match while counting down clear" "0,1"
|
|
bitfld.long 0x00 2. "RCMU,Compare match while counting up clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ROM,One match while counting down clear" "0,1"
|
|
bitfld.long 0x00 0. "RPM,Period match while counting up clear" "0,1"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "STC,Shadow transfer control"
|
|
bitfld.long 0x00 21. "ASFC,Automatic Shadow transfer request when writing into Floating Prescaler Shadow register" "0: Writing into Floating Prescaler Shadow..,1: Writing into Floating Prescaler Shadow.."
|
|
bitfld.long 0x00 20. "ASDC,Automatic Shadow transfer request when writing into Dither Shadow register" "0: Writing into Dither Shadow register does not..,1: Writing into Dither Shadow register.."
|
|
newline
|
|
bitfld.long 0x00 19. "ASLC,Automatic Shadow transfer request when writing into Passive Level register" "0: Writing into Passivel Level register does not..,1: Writing into Passive Level register.."
|
|
bitfld.long 0x00 17. "ASCC,Automatic Shadow transfer request when writing into Compare Shadow Register" "0: Writing into Compare Shadow register does not..,1: Writing into Compare Shadow register.."
|
|
newline
|
|
bitfld.long 0x00 16. "ASPC,Automatic Shadow Transfer request when writing into Period Shadow Register" "0: Writing into Period Shadow register does not..,1: Writing into Period Shadow register will.."
|
|
bitfld.long 0x00 9. "IRFC,Immediate Write into Floating Prescaler Value Configuration" "0: Update of the floating prescaler value is..,1: Update of the floating prescaler value.."
|
|
newline
|
|
bitfld.long 0x00 8. "IRDC,Immediate Write into Dither Value Configuration" "0: Update of the dither compare value is done..,1: Update of the dither compare value happens.."
|
|
bitfld.long 0x00 7. "IRLC,Immediate Write into Passive Level Configuration" "0: Update of the pwm passive level is done..,1: Update of the pwm passive level value happens.."
|
|
newline
|
|
bitfld.long 0x00 5. "IRCC,Immediate Write into Compare Configuration" "0: Update of the compare value is done..,1: Update of the compare value happens.."
|
|
bitfld.long 0x00 4. "IRPC,Immediate Write into Period Configuration" "0: Update of the period value is done coherently..,1: Update of the period value happens.."
|
|
newline
|
|
bitfld.long 0x00 1.--2. "STM,Shadow transfer mode" "0: Shadow transfer is done in Period Match and..,1: Shadow transfer is done only in Period Match,2: Shadow transfer is done only in One Match,?..."
|
|
bitfld.long 0x00 0. "CSE,Cascaded shadow transfer enable" "0: Cascaded shadow transfer disabled,1: Cascaded shadow transfer enabled"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "ECRD0,Extended Read Back 0"
|
|
rbitfld.long 0x00 25. "LCV,Lost Capture Value" "0: ECRD0 No capture was lost,1: ECRD0 A capture was lost"
|
|
rbitfld.long 0x00 24. "FFL,Full Flag" "0: ECRD0 No new value was captured into this..,1: ECRD0 A new value has been captured into this.."
|
|
newline
|
|
rbitfld.long 0x00 22.--23. "VPTR,Capture register pointer" "0: ECRD0_Capture register 0,1: ECRD0_Capture register 1,2: ECRD0_Capture register 2,3: ECRD0_Capture register 3"
|
|
rbitfld.long 0x00 20.--21. "SPTR,Slice pointer" "0: ECRD0_CC40,1: ECRD0_CC41,2: ECRD0_CC42,3: ECRD0_CC43"
|
|
newline
|
|
rbitfld.long 0x00 16.--19. "FPCV,Prescaler Capture value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "CAPV,Timer Capture Value"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "ECRD1,Extended Read Back 1"
|
|
rbitfld.long 0x00 25. "LCV,Lost Capture Value" "0: ECRD1 No capture was lost,1: ECRD1 A capture was lost"
|
|
rbitfld.long 0x00 24. "FFL,Full Flag" "0: ECRD1 No new value was captured into this..,1: ECRD1 A new value has been captured into this.."
|
|
newline
|
|
rbitfld.long 0x00 22.--23. "VPTR,Capture register pointer" "0: ECRD1_Capture register 0,1: ECRD1_Capture register 1,2: ECRD1_Capture register 2,3: ECRD1_Capture register 3"
|
|
rbitfld.long 0x00 20.--21. "SPTR,Slice pointer" "0: ECRD1_CC40,1: ECRD1_CC41,2: ECRD1_CC42,3: ECRD1_CC43"
|
|
newline
|
|
rbitfld.long 0x00 16.--19. "FPCV,Prescaler Capture value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "CAPV,Timer Capture Value"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "DAC (SD-DAC)"
|
|
tree "DAC"
|
|
base ad:0x50030000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GLOBCON,Global Control"
|
|
hexmask.long.word 0x00 16.--27. 1. "WDMBN,Watchdog Maximum Bitnumber"
|
|
bitfld.long 0x00 4.--5. "SUSCFG,Suspend Mode Configuration" "0: Suspend request is ignored and the module..,1: Freeze channels and output level,2: Freeze channels but outputs go to passive level,?..."
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "GLOBCLK,Global Clock"
|
|
bitfld.long 0x00 15. "BCS,Bit-Clock Selector" "0: Normal Mode,1: Fast Mode"
|
|
hexmask.long.word 0x00 0.--11. 1. "FCLK_PS,Fast Clock Prescaler Factor"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ID,Module Identification"
|
|
hexmask.long.word 0x00 16.--31. 1. "MOD_NUMBER,Module Number Value"
|
|
hexmask.long.byte 0x00 8.--15. 1. "MOD_TYPE0,Module Type"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "MOD_REV,Module Revision Number"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CHEN,Channel Enable"
|
|
bitfld.long 0x00 8. "ECH8,Channel 8 Enable" "0: Channel is disabled the output level is passive,1: Channel is enabled"
|
|
bitfld.long 0x00 7. "ECH7,Channel 7 Enable" "0: Channel is disabled the output level is passive,1: Channel is enabled"
|
|
newline
|
|
bitfld.long 0x00 6. "ECH6,Channel 6 Enable" "0: Channel is disabled the output level is passive,1: Channel is enabled"
|
|
bitfld.long 0x00 5. "ECH5,Channel 5 Enable" "0: Channel is disabled the output level is passive,1: Channel is enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "ECH4,Channel 4 Enable" "0: Channel is disabled the output level is passive,1: Channel is enabled"
|
|
bitfld.long 0x00 3. "ECH3,Channel 3 Enable" "0: Channel is disabled the output level is passive,1: Channel is enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "ECH2,Channel 2 Enable" "0: Channel is disabled the output level is passive,1: Channel is enabled"
|
|
bitfld.long 0x00 1. "ECH1,Channel 1 Enable" "0: Channel is disabled the output level is passive,1: Channel is enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "ECH0,Channel 0 Enable" "0: Channel is disabled the output level is passive,1: Channel is enabled"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHSTRCON,Channel Shadow Transfer"
|
|
bitfld.long 0x00 24. "CH8A,Channel 8 Linear Walk Abort" "0: No action,1: Abort linear walk"
|
|
bitfld.long 0x00 23. "CH7A,Channel 7 Linear Walk Abort" "0: No action,1: Abort linear walk"
|
|
newline
|
|
bitfld.long 0x00 22. "CH6A,Channel 6 Linear Walk Abort" "0: No action,1: Abort linear walk"
|
|
bitfld.long 0x00 21. "CH5A,Channel 5 Linear Walk Abort" "0: No action,1: Abort linear walk"
|
|
newline
|
|
bitfld.long 0x00 20. "CH4A,Channel 4 Linear Walk Abort" "0: No action,1: Abort linear walk"
|
|
bitfld.long 0x00 19. "CH3A,Channel 3 Linear Walk Abort" "0: No action,1: Abort linear walk"
|
|
newline
|
|
bitfld.long 0x00 18. "CH2A,Channel 2 Linear Walk Abort" "0: No action,1: Abort linear walk"
|
|
bitfld.long 0x00 17. "CH1A,Channel 1 Linear Walk Abort" "0: No action,1: Abort linear walk"
|
|
newline
|
|
bitfld.long 0x00 16. "CH0A,Channel 0 Linear Walk Abort" "0: No action,1: Abort linear walk"
|
|
bitfld.long 0x00 8. "CH8S,Channel 8 Shadow Transfer" "0: No action,1: Initiate channel 8 target intensity shadow.."
|
|
newline
|
|
bitfld.long 0x00 7. "CH7S,Channel 7 Shadow Transfer" "0: No action,1: Initiate channel 7 target intensity shadow.."
|
|
bitfld.long 0x00 6. "CH6S,Channel 6 Shadow Transfer" "0: No action,1: Initiate channel 6 target intensity shadow.."
|
|
newline
|
|
bitfld.long 0x00 5. "CH5S,Channel 5 Shadow Transfer" "0: No action,1: Initiate channel 5 target intensity shadow.."
|
|
bitfld.long 0x00 4. "CH4S,Channel 4 Shadow Transfer" "0: No action,1: Initiate channel 4 target intensity shadow.."
|
|
newline
|
|
bitfld.long 0x00 3. "CH3S,Channel 3 Shadow Transfer" "0: No action,1: Initiate channel 3 target intensity shadow.."
|
|
bitfld.long 0x00 2. "CH2S,Channel 2 Shadow Transfer" "0: No action,1: Initiate channel 2 target intensity shadow.."
|
|
newline
|
|
bitfld.long 0x00 1. "CH1S,Channel 1 Shadow Transfer" "0: No action,1: Initiate channel 1 target intensity shadow.."
|
|
bitfld.long 0x00 0. "CH0S,Channel 0 Shadow Transfer" "0: No action,1: Initiate channel 0 target intensity shadow.."
|
|
tree.end
|
|
repeat 9. (list 0. 1. 2. 3. 4. 5. 6. 7. 8.) (list ad:0x5003003C ad:0x50030050 ad:0x50030064 ad:0x50030078 ad:0x5003008C ad:0x500300A0 ad:0x500300B4 ad:0x500300C8 ad:0x500300DC)
|
|
tree "DAC_CH$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DATAS,Channel Data Shadow"
|
|
hexmask.long.word 0x00 0.--11. 1. "TCHDATA,Target Channel Data Value"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DATA,Channel Data"
|
|
hexmask.long.word 0x00 0.--11. 1. "CHDATA,Channel Data Value"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CHCONFIG,Channel Configuration"
|
|
hexmask.long.word 0x00 16.--25. 1. "RAMP_PS,Ramp Clock Prescaler"
|
|
bitfld.long 0x00 9. "WEN,Flicker Watchdog Enable" "0: Disable flicker watchdog,1: Enable flicker watchdog"
|
|
bitfld.long 0x00 8. "GEN,Gating Enable" "0: Gating function is disabled the input signal..,1: Gating function is enabled the output gating.."
|
|
newline
|
|
bitfld.long 0x00 7. "DEN,Data Value Enable" "0: Channel data values are irgnored,1: Channel data values are processed"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "ERU (Event Request Unit 0)"
|
|
repeat 2. (list 0. 1.) (list ad:0x40010600 ad:0x40010630)
|
|
tree "ERU$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "EXISEL,Event Input Select"
|
|
bitfld.long 0x00 14.--15. "EXS3B,Event Source Select for B3 (ERS3)" "0: Input ERU_3B0 is selected,1: Input ERU_3B1 is selected,2: Input ERU_3B2 is selected,3: Input ERU_3B3 is selected"
|
|
bitfld.long 0x00 12.--13. "EXS3A,Event Source Select for A3 (ERS3)" "0: Input ERU_3A0 is selected,1: Input ERU_3A1 is selected,2: Input ERU_3A2 is selected,3: Input ERU_3A3 is selected"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "EXS2B,Event Source Select for B2 (ERS2)" "0: Input ERU_2B0 is selected,1: Input ERU_2B1 is selected,2: Input ERU_2B2 is selected,3: Input ERU_2B3 is selected"
|
|
bitfld.long 0x00 8.--9. "EXS2A,Event Source Select for A2 (ERS2)" "0: Input ERU_2A0 is selected,1: Input ERU_2A1 is selected,2: Input ERU_2A2 is selected,3: Input ERU_2A3 is selected"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "EXS1B,Event Source Select for B1 (ERS1)" "0: Input ERU_1B0 is selected,1: Input ERU_1B1 is selected,2: Input ERU_1B2 is selected,3: Input ERU_1B3 is selected"
|
|
bitfld.long 0x00 4.--5. "EXS1A,Event Source Select for A1 (ERS1)" "0: Input ERU_1A0 is selected,1: Input ERU_1A1 is selected,2: Input ERU_1A2 is selected,3: Input ERU_1A3 is selected"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "EXS0B,Event Source Select for B0 (ERS0)" "0: Input ERU_0B0 is selected,1: Input ERU_0B1 is selected,2: Input ERU_0B2 is selected,3: Input ERU_0B3 is selected"
|
|
bitfld.long 0x00 0.--1. "EXS0A,Event Source Select for A0 (ERS0)" "0: Input ERU_0A0 is selected,1: Input ERU_0A1 is selected,2: Input ERU_0A2 is selected,3: Input ERU_0A3 is selected"
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x10)++0x03
|
|
line.long 0x00 "EXICON[$1],Event Input Control $1"
|
|
bitfld.long 0x00 11. "NB,Input B Negation Select for ERSx" "0: Input B is used directly,1: Input B is inverted"
|
|
bitfld.long 0x00 10. "NA,Input A Negation Select for ERSx" "0: Input A is used directly,1: Input A is inverted"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "SS,Input Source Select for ERSx" "0: Input A without additional combination,1: Input B without additional combination,2: Input A OR input B,3: Input A AND input B"
|
|
bitfld.long 0x00 7. "FL,Status Flag for ETLx" "0: The enabled edge event has not been detected,1: The enabled edge event has been detected"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "OCS,Output Channel Select for ETLx Output Trigger Pulse" "0: Trigger pulses are sent to OGU0,1: Trigger pulses are sent to OGU1,2: Trigger pulses are sent to OGU2,3: Trigger pulses are sent to OGU3,?..."
|
|
bitfld.long 0x00 3. "FE,Falling Edge Detection Enable ETLx" "0: A falling edge is not considered as edge event,1: A falling edge is considered as edge event"
|
|
newline
|
|
bitfld.long 0x00 2. "RE,Rising Edge Detection Enable ETLx" "0: A rising edge is not considered as edge event,1: A rising edge is considered as edge event"
|
|
bitfld.long 0x00 1. "LD,Rebuild Level Detection for Status Flag for ETLx" "0: Clear status flag FL by software only,1: The status flag FL rebuilds a level detection"
|
|
newline
|
|
bitfld.long 0x00 0. "PE,Output Trigger Pulse Enable for ETLx" "0: The trigger pulse generation is disabled,1: The trigger pulse generation is enabled"
|
|
repeat.end
|
|
repeat 4. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x20)++0x03
|
|
line.long 0x00 "EXOCON[$1],Event Output Trigger Control $1"
|
|
bitfld.long 0x00 15. "IPEN3,Pattern Detection Enable for ETL3" "0: Flag EXICONx.FL is excluded from the pattern..,1: Flag EXICONx.FL is included in the pattern.."
|
|
bitfld.long 0x00 14. "IPEN2,Pattern Detection Enable for ETL2" "0: Flag EXICONx.FL is excluded from the pattern..,1: Flag EXICONx.FL is included in the pattern.."
|
|
newline
|
|
bitfld.long 0x00 13. "IPEN1,Pattern Detection Enable for ETL1" "0: Flag EXICONx.FL is excluded from the pattern..,1: Flag EXICONx.FL is included in the pattern.."
|
|
bitfld.long 0x00 12. "IPEN0,Pattern Detection Enable for ETL0" "0: Flag EXICONx.FL is excluded from the pattern..,1: Flag EXICONx.FL is included in the pattern.."
|
|
newline
|
|
bitfld.long 0x00 4.--5. "GP,Gating Selection for Pattern Detection Result" "0: always disabled,1: always enabled,2: enabled if ERU_PDOUTy is true,3: enabled if ERU_PDOUTy is false"
|
|
rbitfld.long 0x00 3. "PDR,Pattern Detection Result Flag" "0: A pattern miss is detected,1: A pattern match is detected"
|
|
newline
|
|
bitfld.long 0x00 2. "GEEN,Gating Event Enable" "0: The event detection is disabled,1: The event detection is enabled"
|
|
bitfld.long 0x00 0.--1. "ISS,Internal Trigger Source Selection" "0: The peripheral trigger function is disabled,1: Input ERU_OGUy1 is selected,2: Input ERU_OGUy2 is selected,3: Input ERU_OGUy3 is selected"
|
|
repeat.end
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "MATH (Math Coprocessor)"
|
|
base ad:0x40030000
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "GLBCON,Global Control Register"
|
|
bitfld.long 0x00 16.--17. "SUSCFG,Suspend Mode Configuration" "0: Suspend mode is never entered,1: Hard suspend mode will be entered when CPU is..,2: Soft suspend mode will be entered when CPU is..,?..."
|
|
bitfld.long 0x00 12.--13. "CORDZRC,CORDZ Register Result Chaining" "0: No result chaining is selected,1: QUOT register is the selected source,2: RMD register is the selected source,?..."
|
|
newline
|
|
bitfld.long 0x00 9.--10. "CORDYRC,CORDY Register Result Chaining" "0: No result chaining is selected,1: QUOT register is the selected source,2: RMD register is the selected source,?..."
|
|
bitfld.long 0x00 6.--7. "CORDXRC,CORDX Register Result Chaining" "0: No result chaining is selected,1: QUOT register is the selected source,2: RMD register is the selected source,?..."
|
|
newline
|
|
bitfld.long 0x00 3.--5. "DVSRC,Divisor Register Result Chaining" "0: No result chaining is selected,1: QUOT register is the selected source,2: RMD register is the selected source,3: CORRX is the selected source,4: CORRY is the selected source,5: CORRZ is the selected source,?..."
|
|
bitfld.long 0x00 0.--2. "DVDRC,Dividend Register Result Chaining" "0: No result chaining is selected,1: QUOT register is the selected source,2: RMD register is the selected source,3: CORRX is the selected source,4: CORRY is the selected source,5: CORRZ is the selected source,?..."
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ID,Module Identification Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "MOD_NUMBER,Module Number Value"
|
|
hexmask.long.byte 0x00 8.--15. 1. "MOD_TYPE,Module Type"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "MOD_REV,Module Revision Number"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "EVIER,Event Interrupt Enable Register"
|
|
bitfld.long 0x00 3. "CDERRIEN,CORDIC Error Interrupt Enable" "0: CORDIC error interrupt generation is disabled,1: CORDIC error interrupt generation is enabled"
|
|
bitfld.long 0x00 2. "CDEOCIEN,CORDIC End of Calculation Interrupt Enable" "0: CORDIC end of calculation interrupt..,1: CORDIC end of calculation interrupt.."
|
|
newline
|
|
bitfld.long 0x00 1. "DIVERRIEN,Divider Error Interrupt Enable" "0: Divider error interrupt generation is disabled,1: Divider error interrupt generation is enabled"
|
|
bitfld.long 0x00 0. "DIVEOCIEN,Divider End of Calculation Interrupt Enable" "0: Divider end of calculation interrupt..,1: Divider end of calculation interrupt.."
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "EVFR,Event Flag Register"
|
|
rbitfld.long 0x00 3. "CDERR,CORDIC Error Event Flag" "0: CORDIC error event has not been detected,1: CORDIC error event has been detected"
|
|
rbitfld.long 0x00 2. "CDEOC,CORDIC End of Calculation Event Flag" "0: CORDIC end of calculation event has not been..,1: CORDIC end of calculation event has been.."
|
|
newline
|
|
rbitfld.long 0x00 1. "DIVERR,Divider Error Event Flag" "0: Divider error event has not been detected,1: Divider error event has been detected"
|
|
rbitfld.long 0x00 0. "DIVEOC,Divider End of Calculation Event Flag" "0: Divider end of calculation event has not been..,1: Divider end of calculation event has been.."
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "EVFSR,Event Flag Set Register"
|
|
bitfld.long 0x00 3. "CDERRS,CORDIC Error Event Flag Set" "0: No effect,1: Sets the CORDIC error event flag"
|
|
bitfld.long 0x00 2. "CDEOCS,CORDIC Event Flag Set" "0: No effect,1: Sets the CORDIC end of calculation event flag"
|
|
newline
|
|
bitfld.long 0x00 1. "DIVERRS,Divider Error Event Flag Set" "0: No effect,1: Sets the Divider error event flag"
|
|
bitfld.long 0x00 0. "DIVEOCS,Divider End of Calculation Event Flag Set" "0: No effect,1: Sets the Divider end of calculation event flag"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "EVFCR,Event Flag Clear Register"
|
|
bitfld.long 0x00 3. "CDERRC,CORDIC Error Event Flag Clear" "0: No effect,1: Clears the CORDIC error event flag"
|
|
bitfld.long 0x00 2. "CDEOCC,CORDIC End of Calculation Event Flag Clear" "0: No effect,1: Clears the CORDIC end of calculation event flag"
|
|
newline
|
|
bitfld.long 0x00 1. "DIVERRC,Divider Error Event Flag Clear" "0: No effect,1: Clears the Divider error event flag"
|
|
bitfld.long 0x00 0. "DIVEOCC,Divider End of Calculation Event Flag Clear" "0: No effect,1: Clears the Divider end of calculation event.."
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DVD,Dividend Register"
|
|
hexmask.long 0x00 0.--31. 1. "VAL,Dividend Value"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "DVS,Divisor Register"
|
|
hexmask.long 0x00 0.--31. 1. "VAL,Divisor Value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "QUOT,Quotient Register"
|
|
hexmask.long 0x00 0.--31. 1. "VAL,Quotient Value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "RMD,Remainder Register"
|
|
hexmask.long 0x00 0.--31. 1. "VAL,Remainder Value"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DIVST,Divider Status Register"
|
|
rbitfld.long 0x00 0. "BSY,Busy Indication" "0: Divider is not running any division operation,1: Divider is still running a division operation"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DIVCON,Divider Control Register"
|
|
bitfld.long 0x00 24.--28. "DVSSRC,Divisor Shift Right Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. "DVDSLC,Dividend Shift Left Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 15. "QSDIR,Quotient Shift Direction" "0: Left shift,1: Right shift"
|
|
bitfld.long 0x00 8.--12. "QSCNT,Quotient Shift Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 3.--4. "DIVMODE,Division Mode" "0: 32-bit divide by 32-bit,1: 32-bit divide by 16-bit,2: 16-bit divide by 16-bit,?..."
|
|
bitfld.long 0x00 2. "USIGN,Unsigned Division Enable" "0: Signed division is selected,1: Unsigned division is selected"
|
|
newline
|
|
bitfld.long 0x00 1. "STMODE,Start Mode" "0: Calculation is automatically started with a..,1: Calculation is started by setting the ST bit.."
|
|
bitfld.long 0x00 0. "ST,Start Bit" "0: No effect,1: Start the division operation when STMODE=1#"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "STATC,CORDIC Status and Data Control Register"
|
|
bitfld.long 0x00 7. "KEEPZ,Last Z Result as Initial Data for New Calculation" "0,1"
|
|
bitfld.long 0x00 6. "KEEPY,Last Y Result as Initial Data for New Calculation" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "KEEPX,Last X Result as Initial Data for New Calculation" "0,1"
|
|
rbitfld.long 0x00 0. "BSY,Busy Indication" "0,1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CON,CORDIC Control Register"
|
|
bitfld.long 0x00 6.--7. "MPS,X and Y Magnitude Prescaler" "0: Divide by 1,1: Divide by 2 (default),2: Divide by 4,3: Reserved retain the last MPS setting"
|
|
bitfld.long 0x00 5. "X_USIGN,Result Data Format for X in Circular Vectoring Mode" "0: Signed twos complement,1: Unsigned (default)"
|
|
newline
|
|
bitfld.long 0x00 4. "ST_MODE,Start Method" "0: Auto start after write access to CORDX register,1: Start calculation only after bit ST is set"
|
|
bitfld.long 0x00 3. "ROTVEC,Rotation Vectoring Selection" "0: Vectoring Mode (default),1: Rotation Mode"
|
|
newline
|
|
bitfld.long 0x00 1.--2. "MODE,Operating Mode" "0: Linear Mode,1: Circular Mode (default),?,3: Hyperbolic Mode"
|
|
bitfld.long 0x00 0. "ST,Start Calculation" "0,1"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CORDX,CORDIC X Data Register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "DATA,Initial X Parameter Data"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "CORDY,CORDIC Y Data Register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "DATA,Initial Y Parameter Data"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CORDZ,CORDIC Z Data Register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "DATA,Initial Z Parameter Data"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "CORRX,CORDIC X Result Register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "RESULT,X Calculation Result"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "CORRY,CORDIC Y Result Register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "RESULT,Y Calculation Result"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "CORRZ,CORDIC Z Result Register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "RESULT,Z Calculation Result"
|
|
tree.end
|
|
tree "NVM (Non Volatile Memory)"
|
|
base ad:0x40050000
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "NVMSTATUS,NVM Status Register"
|
|
rbitfld.word 0x00 6. "WRPERR,Write Protocol Error" "0: No write protocol failure occurred,1: At least one write protocol failure was.."
|
|
rbitfld.word 0x00 5. "ECC2READ,ECC2" "0: No ECC two bit failure during memory read..,1: At least one ECC two bit failure was detected"
|
|
newline
|
|
rbitfld.word 0x00 4. "ECC1READ,ECC1" "0: No ECC single bit failure occurred,1: At least one ECC single bit failure was.."
|
|
rbitfld.word 0x00 2.--3. "VERR,Verify Error" "0: No fail bit,1: One fail bit in one data block,2: Two fail bits in two different data blocks,3: Two or more fail bits in one data block or.."
|
|
newline
|
|
rbitfld.word 0x00 1. "SLEEP,Sleep Mode" "0: NVM not in sleep mode and no sleep or wake up..,1: NVM in sleep mode or busy due to a sleep or.."
|
|
rbitfld.word 0x00 0. "BUSY,Busy" "0: The NVM is ready,1: The NVM is busy"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "NVMPROG,NVM Programming Control Register"
|
|
bitfld.word 0x00 13. "RSTECC,Reset ECC" "0: No action,1: Reset of .ECCxREAD and NVMSTATUS.WRPERR"
|
|
bitfld.word 0x00 12. "RSTVERR,Reset Verify Error" "0: No action,1: Reset of .VERR"
|
|
newline
|
|
hexmask.word.byte 0x00 0.--7. 1. "ACTION,ACTION: [VERIFY ONE_SHOT OPTYPE]"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "NVMCONF,NVM Configuration Register"
|
|
bitfld.word 0x00 15. "NVM_ON,NVM On" "0: NVM is switched to or stays in sleep mode,1: NVM is switched to or stays in normal mode"
|
|
bitfld.word 0x00 14. "INT_ON,Interrupt On" "0: No NVM ready interrupts are generated,1: NVM ready interrupts are generated"
|
|
newline
|
|
hexmask.word.byte 0x00 4.--11. 1. "SECPROT,Sector Protection"
|
|
bitfld.word 0x00 1.--2. "HRLEV,Hardread Level" "0: Normal,1: Hardread written,2: Hardread erased,?..."
|
|
tree.end
|
|
tree "PAU (PAU Unit)"
|
|
base ad:0x40000000
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "AVAIL0,Peripheral Availability Register 0"
|
|
rbitfld.long 0x00 26. "AVAIL26,Port 4 Availability Flag" "0: Port 4 is not available,1: Port 4 is available"
|
|
rbitfld.long 0x00 25. "AVAIL25,Port 3 Availability Flag" "0: Port 3 is not available,1: Port 3 is available"
|
|
newline
|
|
rbitfld.long 0x00 24. "AVAIL24,Port 2 Availability Flag" "0: Port 2 is not available,1: Port 2 is available"
|
|
rbitfld.long 0x00 23. "AVAIL23,Port 1 Availability Flag" "0: Port 1 is not available,1: Port 1 is available"
|
|
newline
|
|
rbitfld.long 0x00 22. "AVAIL22,Port 0 Availability Flag" "0: Port 0 is not available,1: Port 0 is available"
|
|
rbitfld.long 0x00 21. "AVAIL21,MATH CORDIC Availability Flag" "0: MATH CORDIC is not available,1: MATH CORDIC is available"
|
|
newline
|
|
rbitfld.long 0x00 20. "AVAIL20,MATH Global SFRs and Divider Availability Flag" "0: MATH Global SFRs and Divider are not available,1: MATH Global SFRs and Divider are available"
|
|
rbitfld.long 0x00 7. "AVAIL7,RAM Block 3 Availability Flag" "0: RAM block 3 is not available,1: RAM block 3 is available"
|
|
newline
|
|
rbitfld.long 0x00 6. "AVAIL6,RAM Block 2 Availability Flag" "0: RAM block 2 is not available,1: RAM block 2 is available"
|
|
rbitfld.long 0x00 5. "AVAIL5,RAM Block 1 Availability Flag" "0: RAM block 1 is not available,1: RAM block 1 is available"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "AVAIL1,Peripheral Availability Register 1"
|
|
rbitfld.long 0x00 28. "AVAIL28,CCU41 CC43 Availability Flag" "0: CCU41 CC43 is not available,1: CCU41 CC43 is available"
|
|
rbitfld.long 0x00 27. "AVAIL27,CCU41 CC42 Availability Flag" "0: CCU41 CC42 is not available,1: CCU41 CC42 is available"
|
|
newline
|
|
rbitfld.long 0x00 26. "AVAIL26,CCU41 CC41 Availability Flag" "0: CCU41 CC41 is not available,1: CCU41 CC41 is available"
|
|
rbitfld.long 0x00 25. "AVAIL25,CCU41 kernel SFRs and CC40 Availability Flag" "0: CCU41 kernel SFRs and CC40 is not available,1: CCU41 kernel SFRs and CC40 is available"
|
|
newline
|
|
rbitfld.long 0x00 17. "AVAIL17,USIC1 Channel 1 Availability Flag" "0: USIC1 Channel 1 is not available,1: USIC1 Channel 1 is available"
|
|
rbitfld.long 0x00 16. "AVAIL16,USIC1 Channel 0 Availability Flag" "0: USIC1 Channel 0 is not available,1: USIC1 Channel 0 is available"
|
|
newline
|
|
rbitfld.long 0x00 12. "AVAIL12,CCU40 CC43 Availability Flag" "0: CCU40 CC43 is not available,1: CCU40 CC43 is available"
|
|
rbitfld.long 0x00 11. "AVAIL11,CCU40 CC42 Availability Flag" "0: CCU40 CC42 is not available,1: CCU40 CC42 is available"
|
|
newline
|
|
rbitfld.long 0x00 10. "AVAIL10,CCU40 CC41 Availability Flag" "0: CCU40 CC41 is not available,1: CCU40 CC41 is available"
|
|
rbitfld.long 0x00 9. "AVAIL9,CCU40 kernel SFRs and CC40 Availability Flag" "0: CCU40 kernel SFRs and CC40 is not available,1: CCU40 kernel SFRs and CC40 is available"
|
|
newline
|
|
rbitfld.long 0x00 8. "AVAIL8,SHS Availability Flag" "0: SHS is not available,1: SHS is available"
|
|
rbitfld.long 0x00 5. "AVAIL5,ADC SFRs Availability Flag" "0: ADC SFRs are not available,1: ADC SFRs are available"
|
|
newline
|
|
rbitfld.long 0x00 4. "AVAIL4,PRNG Availability Flag" "0: PRNG is not available,1: PRNG is available"
|
|
rbitfld.long 0x00 1. "AVAIL1,USIC0 Channel 1 Availability Flag" "0: USIC0 Channel 1 is not available,1: USIC0 Channel 1 is available"
|
|
newline
|
|
rbitfld.long 0x00 0. "AVAIL0,USIC0 Channel 0 Availability Flag" "0: USIC0 Channel 0 is not available,1: USIC0 Channel 0 is available"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "AVAIL2,Peripheral Availability Register 2"
|
|
rbitfld.long 0x00 28. "AVAIL28,POSIF1 Availability Flag" "0: POSIF1 is not available,1: POSIF1 is available"
|
|
rbitfld.long 0x00 23. "AVAIL23,MultiCAN Message Object SFRs Availability Flag" "0: MultiCAN message object SFRs are not available,1: MultiCAN message object SFRs are available"
|
|
newline
|
|
rbitfld.long 0x00 21. "AVAIL21,MultiCAN Node 1 Availability Flag" "0: MultiCAN node 1 is not available,1: MultiCAN node 1 is available"
|
|
rbitfld.long 0x00 20. "AVAIL20,MultiCAN Node 0 and Global SFRs Availability Flag" "0: MultiCAN node 0 and Global SFRs are not..,1: MultiCAN node 0 and Global SFRs are available"
|
|
newline
|
|
rbitfld.long 0x00 19. "AVAIL19,CCU81 CC83 Availability Flag" "0: CCU81 CC83 is not available,1: CCU81 CC83 is available"
|
|
rbitfld.long 0x00 18. "AVAIL18,CCU81 CC82 Availability Flag" "0: CCU81 CC82 is not available,1: CCU81 CC82 is available"
|
|
newline
|
|
rbitfld.long 0x00 17. "AVAIL17,CCU81 CC81 Availability Flag" "0: CCU81 CC81 is not available,1: CCU81 CC81 is available"
|
|
rbitfld.long 0x00 16. "AVAIL16,CCU81 kernel SFRs and CC80 Availability Flag" "0: CCU81 kernel SFRs and CC80 are not available,1: CCU81 kernel SFRs and CC80 are available"
|
|
newline
|
|
rbitfld.long 0x00 15. "AVAIL15,DAC0 Availability Flag" "0: DAC0 is not available,1: DAC0 is available"
|
|
rbitfld.long 0x00 12. "AVAIL12,POSIF0 Availability Flag" "0: POSIF0 is not available,1: POSIF0 is available"
|
|
newline
|
|
rbitfld.long 0x00 3. "AVAIL3,CCU80 CC83 Availability Flag" "0: CCU80 CC83 is not available,1: CCU80 CC83 is available"
|
|
rbitfld.long 0x00 2. "AVAIL2,CCU80 CC82 Availability Flag" "0: CCU80 CC82 is not available,1: CCU80 CC82 is available"
|
|
newline
|
|
rbitfld.long 0x00 1. "AVAIL1,CCU80 CC81 Availability Flag" "0: CCU80 CC81 is not available,1: CCU80 CC81 is available"
|
|
rbitfld.long 0x00 0. "AVAIL0,CCU80 kernel SFRs and CC80 Availability Flag" "0: CC80 and CCU80 kernel SFRs are not available,1: CC80 and CCU80 kernel SFRs are available"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "PRIVDIS0,Peripheral Privilege Access Register 0"
|
|
bitfld.long 0x00 26. "PDIS26,Port 4 Privilege Disable Flag" "0: Port 4 is accessible,1: Port 4 is not accessible"
|
|
bitfld.long 0x00 25. "PDIS25,Port 3 Privilege Disable Flag" "0: Port 3 is accessible,1: Port 3 is not accessible"
|
|
newline
|
|
bitfld.long 0x00 24. "PDIS24,Port 2 Privilege Disable Flag" "0: Port 2 is accessible,1: Port 2 is not accessible"
|
|
bitfld.long 0x00 23. "PDIS23,Port 1 Privilege Disable Flag" "0: Port 1 is accessible,1: Port 1 is not accessible"
|
|
newline
|
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bitfld.long 0x00 22. "PDIS22,Port 0 Privilege Disable Flag" "0: Port 0 is accessible,1: Port 0 is not accessible"
|
|
bitfld.long 0x00 21. "PDIS21,MATH CORDIC Privilege Disable Flag" "0: MATH CORDIC is accessible,1: MATH CORDIC is not accessible"
|
|
newline
|
|
bitfld.long 0x00 20. "PDIS20,MATH Global SFRs and Divider Privilege Disable Flag" "0: MATH Global SFRs and Divider are accessible,1: MATH Global SFRs and Divider are not accessible"
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|
bitfld.long 0x00 19. "PDIS19,WDT Privilege Disable Flag" "0: WDT is accessible,1: WDT is not accessible"
|
|
newline
|
|
bitfld.long 0x00 7. "PDIS7,RAM Block 3 Privilege Disable Flag" "0: RAM Block 3 is accessible,1: RAM Block 3 is not accessible"
|
|
bitfld.long 0x00 6. "PDIS6,RAM Block 2 Privilege Disable Flag" "0: RAM Block 2 is accessible,1: RAM Block 2 is not accessible"
|
|
newline
|
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bitfld.long 0x00 5. "PDIS5,RAM Block 1 Privilege Disable Flag" "0: RAM Block 1 is accessible,1: RAM Block 1 is not accessible"
|
|
bitfld.long 0x00 2. "PDIS2,Flash SFRs Privilege Disable Flag" "0: Flash SFRs are accessible,1: Flash SFRs are not accessible"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "PRIVDIS1,Peripheral Privilege Access Register 1"
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|
bitfld.long 0x00 28. "PDIS28,CCU41 CC43 Privilege Disable Flag" "0: CCU41 CC43 is accessible,1: CCU41 CC43 is not accessible"
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|
bitfld.long 0x00 27. "PDIS27,CCU41 CC42 Privilege Disable Flag" "0: CCU41 CC42 is accessible,1: CCU41 CC42 is not accessible"
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|
newline
|
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bitfld.long 0x00 26. "PDIS26,CCU41 CC41 Privilege Disable Flag" "0: CCU41 CC41 is accessible,1: CCU41 CC41 is not accessible"
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|
bitfld.long 0x00 25. "PDIS25,CCU41 Kernel SFRs and CC40 Privilege Disable Flag" "0: CCU41 Kernel SFRs and CC40 are accessible,1: CCU41 Kernel SFRs and CC40 are not accessible"
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|
newline
|
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bitfld.long 0x00 17. "PDIS17,USIC1 Channel 1 Privilege Disable Flag" "0: USIC1 Channel 1 is accessible,1: USIC1 Channel 1 is not accessible"
|
|
bitfld.long 0x00 16. "PDIS16,USIC1 Channel 0 Privilege Disable Flag" "0: USIC1 Channel 0 is accessible,1: USIC1 Channel 0 is not accessible"
|
|
newline
|
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bitfld.long 0x00 12. "PDIS12,CCU40 CC43 Privilege Disable Flag" "0: CCU40 CC43 is accessible,1: CCU40 CC43 is not accessible"
|
|
bitfld.long 0x00 11. "PDIS11,CCU40 CC42 Privilege Disable Flag" "0: CCU40 CC42 is accessible,1: CCU40 CC42 is not accessible"
|
|
newline
|
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bitfld.long 0x00 10. "PDIS10,CCU40 CC41 Privilege Disable Flag" "0: CCU40 CC41 is accessible,1: CCU40 CC41 is not accessible"
|
|
bitfld.long 0x00 9. "PDIS9,CC40 and CCU40 Kernel SFRs Privilege Disable Flag" "0: CC40 and CCU40 Kernel SFRs are accessible,1: CC40 and CCU40 Kernel SFRs are not accessible"
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|
newline
|
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bitfld.long 0x00 8. "PDIS8,SHS Privilege Disable Flag" "0: SHS is accessible,1: SHS is not accessible"
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bitfld.long 0x00 5. "PDIS5,ADC SFRs Privilege Disable Flag" "0: ADC SFRs are accessible,1: ADC SFRs are not accessible"
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|
newline
|
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bitfld.long 0x00 1. "PDIS1,USIC0 Channel 1 Privilege Disable Flag" "0: USIC0 Channel 1 is accessible,1: USIC0 Channel 1 is not accessible"
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bitfld.long 0x00 0. "PDIS0,USIC0 Channel 0 Privilege Disable Flag" "0: USIC0 Channel 0 is accessible,1: USIC0 Channel 0 is not accessible"
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group.long 0x88++0x03
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line.long 0x00 "PRIVDIS2,Peripheral Privilege Access Register 2"
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bitfld.long 0x00 28. "PDIS28,POSIF1 Privilege Disable Flag" "0: POSIF1 is accessible,1: POSIF1 is not accessible"
|
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bitfld.long 0x00 23. "PDIS23,MultiCAN Message Object SFRs Privilege Disable Flag" "0: MultiCAN message object SFRs are accessible,1: MultiCAN message object SFRs are not accessible"
|
|
newline
|
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bitfld.long 0x00 21. "PDIS21,MultiCAN Node 1 Privilege Disable Flag" "0: MultiCAN node 1 is accessible,1: MultiCAN node 1 is not accessible"
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bitfld.long 0x00 20. "PDIS20,MultiCAN Node 0 and Global SFRs Privilege Disable Flag" "0: MultiCAN node 0 and global SFRs are accessible,1: MultiCAN node 0 and global SFRs are not.."
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|
newline
|
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bitfld.long 0x00 19. "PDIS19,CCU81 CC83 Privilege Disable Flag" "0: CCU81 CC83 is accessible,1: CCU81 CC83 is not accessible"
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bitfld.long 0x00 18. "PDIS18,CCU81 CC82 Privilege Disable Flag" "0: CCU81 CC82 is accessible,1: CCU81 CC82 is not accessible"
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|
newline
|
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bitfld.long 0x00 17. "PDIS17,CCU81 CC81 Privilege Disable Flag" "0: CCU81 CC81 is accessible,1: CCU81 CC81 is not accessible"
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bitfld.long 0x00 16. "PDIS16,CCU81 Kernel SFRs and CC80 Privilege Disable Flag" "0: CCU81 Kernel SFRs and CC80 are accessible,1: CCU81 Kernel SFRs and CC80 are not accessible"
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|
newline
|
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bitfld.long 0x00 15. "PDIS15,DAC0 Privilege Disable Flag" "0: DAC0 is accessible,1: DAC0 is not accessible"
|
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bitfld.long 0x00 12. "PDIS12,POSIF0 Privilege Disable Flag" "0: POSIF0 is accessible,1: POSIF0 is not accessible"
|
|
newline
|
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bitfld.long 0x00 3. "PDIS3,CCU80 CC83 Privilege Disable Flag" "0: CCU80 CC83 is accessible,1: CCU80 CC83 is not accessible"
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bitfld.long 0x00 2. "PDIS2,CCU80 CC82 Privilege Disable Flag" "0: CCU80 CC82 is accessible,1: CCU80 CC82 is not accessible"
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|
newline
|
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bitfld.long 0x00 1. "PDIS1,CCU80 CC81 Privilege Disable Flag" "0: CCU80 CC81 is accessible,1: CCU80 CC81 is not accessible"
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bitfld.long 0x00 0. "PDIS0,CC80 and CCU80 Kernel SFRs Privilege Disable Flag" "0: CC80 and CCU80 Kernel SFRs are accessible,1: CC80 and CCU80 Kernel SFRs are not accessible"
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group.long 0x400++0x03
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line.long 0x00 "ROMSIZE,ROM Size Register"
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rbitfld.long 0x00 8.--13. "ADDR,ROM Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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group.long 0x404++0x03
|
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line.long 0x00 "FLSIZE,Flash Size Register"
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rbitfld.long 0x00 12.--17. "ADDR,Flash Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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group.long 0x410++0x03
|
|
line.long 0x00 "RAM0SIZE,RAM0 Size Register"
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|
rbitfld.long 0x00 8.--12. "ADDR,RAM0 Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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tree.end
|
|
tree "PORTS"
|
|
tree "PORT0"
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base ad:0x40040000
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group.long 0x00++0x03
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line.long 0x00 "OUT,Port 0 Output Register"
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bitfld.long 0x00 15. "P15,Port 0 Output Bit 15" "0: The output level of P0.x is 0,1: The output level of P0.x is 1"
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bitfld.long 0x00 14. "P14,Port 0 Output Bit 14" "0: The output level of P0.x is 0,1: The output level of P0.x is 1"
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newline
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bitfld.long 0x00 13. "P13,Port 0 Output Bit 13" "0: The output level of P0.x is 0,1: The output level of P0.x is 1"
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bitfld.long 0x00 12. "P12,Port 0 Output Bit 12" "0: The output level of P0.x is 0,1: The output level of P0.x is 1"
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|
newline
|
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bitfld.long 0x00 11. "P11,Port 0 Output Bit 11" "0: The output level of P0.x is 0,1: The output level of P0.x is 1"
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bitfld.long 0x00 10. "P10,Port 0 Output Bit 10" "0: The output level of P0.x is 0,1: The output level of P0.x is 1"
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|
newline
|
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bitfld.long 0x00 9. "P9,Port 0 Output Bit 9" "0: The output level of P0.x is 0,1: The output level of P0.x is 1"
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bitfld.long 0x00 8. "P8,Port 0 Output Bit 8" "0: The output level of P0.x is 0,1: The output level of P0.x is 1"
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group.long 0x04++0x03
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line.long 0x00 "OMR,Port 0 Output Modification Register"
|
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bitfld.long 0x00 31. "PR15,Port 0 Reset Bit 15" "0,1"
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|
bitfld.long 0x00 30. "PR14,Port 0 Reset Bit 14" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "PR13,Port 0 Reset Bit 13" "0,1"
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bitfld.long 0x00 28. "PR12,Port 0 Reset Bit 12" "0,1"
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|
newline
|
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bitfld.long 0x00 27. "PR11,Port 0 Reset Bit 11" "0,1"
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bitfld.long 0x00 26. "PR10,Port 0 Reset Bit 10" "0,1"
|
|
newline
|
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bitfld.long 0x00 25. "PR9,Port 0 Reset Bit 9" "0,1"
|
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bitfld.long 0x00 24. "PR8,Port 0 Reset Bit 8" "0,1"
|
|
newline
|
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bitfld.long 0x00 15. "PS15,Port 0 Set Bit 15" "0,1"
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bitfld.long 0x00 14. "PS14,Port 0 Set Bit 14" "0,1"
|
|
newline
|
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bitfld.long 0x00 13. "PS13,Port 0 Set Bit 13" "0,1"
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|
bitfld.long 0x00 12. "PS12,Port 0 Set Bit 12" "0,1"
|
|
newline
|
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bitfld.long 0x00 11. "PS11,Port 0 Set Bit 11" "0,1"
|
|
bitfld.long 0x00 10. "PS10,Port 0 Set Bit 10" "0,1"
|
|
newline
|
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bitfld.long 0x00 9. "PS9,Port 0 Set Bit 9" "0,1"
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bitfld.long 0x00 8. "PS8,Port 0 Set Bit 8" "0,1"
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|
group.long 0x18++0x03
|
|
line.long 0x00 "IOCR8,Port 0 Input/Output Control Register 8"
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bitfld.long 0x00 26.--31. "PC11,Port Control for Port 0 Pin 11" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
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bitfld.long 0x00 18.--23. "PC10,Port Control for Port 0 Pin 10" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
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|
newline
|
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bitfld.long 0x00 10.--15. "PC9,Port Control for Port 0 Pin 9" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
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|
bitfld.long 0x00 2.--7. "PC8,Port Control for Port 0 Pin 8" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
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|
group.long 0x1C++0x03
|
|
line.long 0x00 "IOCR12,Port 0 Input/Output Control Register 12"
|
|
bitfld.long 0x00 26.--31. "PC15,Port Control for Port 0 Pin 15" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
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|
bitfld.long 0x00 18.--23. "PC14,Port Control for Port 0 Pin 14" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
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|
newline
|
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bitfld.long 0x00 10.--15. "PC13,Port Control for Port 0 Pin 13" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
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|
bitfld.long 0x00 2.--7. "PC12,Port Control for Port 0 Pin 12" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
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|
group.long 0x44++0x03
|
|
line.long 0x00 "PHCR1,Port 0 Pad Hysteresis Control Register 1"
|
|
bitfld.long 0x00 30. "PH15,Pad Hysteresis for P0.15" "0,1"
|
|
bitfld.long 0x00 26. "PH14,Pad Hysteresis for P0.14" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "PH13,Pad Hysteresis for P0.13" "0,1"
|
|
bitfld.long 0x00 18. "PH12,Pad Hysteresis for P0.12" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "PH11,Pad Hysteresis for P0.11" "0,1"
|
|
bitfld.long 0x00 10. "PH10,Pad Hysteresis for P0.10" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "PH9,Pad Hysteresis for P0.9" "0,1"
|
|
bitfld.long 0x00 2. "PH8,Pad Hysteresis for P0.8" "0,1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PDISC,Port 0 Pin Function Decision Control Register"
|
|
rbitfld.long 0x00 15. "PDIS15,Pad Disable for Port 0 Pin 15" "0: Pad P0.x is enabled,1: Pad P0.x is disabled"
|
|
rbitfld.long 0x00 14. "PDIS14,Pad Disable for Port 0 Pin 14" "0: Pad P0.x is enabled,1: Pad P0.x is disabled"
|
|
newline
|
|
rbitfld.long 0x00 13. "PDIS13,Pad Disable for Port 0 Pin 13" "0: Pad P0.x is enabled,1: Pad P0.x is disabled"
|
|
rbitfld.long 0x00 12. "PDIS12,Pad Disable for Port 0 Pin 12" "0: Pad P0.x is enabled,1: Pad P0.x is disabled"
|
|
newline
|
|
rbitfld.long 0x00 11. "PDIS11,Pad Disable for Port 0 Pin 11" "0: Pad P0.x is enabled,1: Pad P0.x is disabled"
|
|
rbitfld.long 0x00 10. "PDIS10,Pad Disable for Port 0 Pin 10" "0: Pad P0.x is enabled,1: Pad P0.x is disabled"
|
|
newline
|
|
rbitfld.long 0x00 9. "PDIS9,Pad Disable for Port 0 Pin 9" "0: Pad P0.x is enabled,1: Pad P0.x is disabled"
|
|
rbitfld.long 0x00 8. "PDIS8,Pad Disable for Port 0 Pin 8" "0: Pad P0.x is enabled,1: Pad P0.x is disabled"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "IN,Port 0 Input Register"
|
|
rbitfld.long 0x00 15. "P15,Port 0 Input Bit 15" "0: The input level of P0.x is 0,1: The input level of P0.x is 1"
|
|
rbitfld.long 0x00 14. "P14,Port 0 Input Bit 14" "0: The input level of P0.x is 0,1: The input level of P0.x is 1"
|
|
newline
|
|
rbitfld.long 0x00 13. "P13,Port 0 Input Bit 13" "0: The input level of P0.x is 0,1: The input level of P0.x is 1"
|
|
rbitfld.long 0x00 12. "P12,Port 0 Input Bit 12" "0: The input level of P0.x is 0,1: The input level of P0.x is 1"
|
|
newline
|
|
rbitfld.long 0x00 11. "P11,Port 0 Input Bit 11" "0: The input level of P0.x is 0,1: The input level of P0.x is 1"
|
|
rbitfld.long 0x00 10. "P10,Port 0 Input Bit 10" "0: The input level of P0.x is 0,1: The input level of P0.x is 1"
|
|
newline
|
|
rbitfld.long 0x00 9. "P9,Port 0 Input Bit 9" "0: The input level of P0.x is 0,1: The input level of P0.x is 1"
|
|
rbitfld.long 0x00 8. "P8,Port 0 Input Bit 8" "0: The input level of P0.x is 0,1: The input level of P0.x is 1"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "PPS,Port 0 Pin Power Save Register"
|
|
bitfld.long 0x00 15. "PPS15,Port 0 Pin Power Save Bit 15" "0: Pin Power Save of P0.x is disabled,1: Pin Power Save of P0.x is enabled"
|
|
bitfld.long 0x00 14. "PPS14,Port 0 Pin Power Save Bit 14" "0: Pin Power Save of P0.x is disabled,1: Pin Power Save of P0.x is enabled"
|
|
newline
|
|
bitfld.long 0x00 13. "PPS13,Port 0 Pin Power Save Bit 13" "0: Pin Power Save of P0.x is disabled,1: Pin Power Save of P0.x is enabled"
|
|
bitfld.long 0x00 12. "PPS12,Port 0 Pin Power Save Bit 12" "0: Pin Power Save of P0.x is disabled,1: Pin Power Save of P0.x is enabled"
|
|
newline
|
|
bitfld.long 0x00 11. "PPS11,Port 0 Pin Power Save Bit 11" "0: Pin Power Save of P0.x is disabled,1: Pin Power Save of P0.x is enabled"
|
|
bitfld.long 0x00 10. "PPS10,Port 0 Pin Power Save Bit 10" "0: Pin Power Save of P0.x is disabled,1: Pin Power Save of P0.x is enabled"
|
|
newline
|
|
bitfld.long 0x00 9. "PPS9,Port 0 Pin Power Save Bit 9" "0: Pin Power Save of P0.x is disabled,1: Pin Power Save of P0.x is enabled"
|
|
bitfld.long 0x00 8. "PPS8,Port 0 Pin Power Save Bit 8" "0: Pin Power Save of P0.x is disabled,1: Pin Power Save of P0.x is enabled"
|
|
tree.end
|
|
tree "PORT1"
|
|
base ad:0x40040100
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "OUT,Port 1 Output Register"
|
|
bitfld.long 0x00 5. "P5,Port 1 Output Bit 5" "0: The output level of P1.x is 0,1: The output level of P1.x is 1"
|
|
bitfld.long 0x00 3. "P3,Port 1 Output Bit 3" "0: The output level of P1.x is 0,1: The output level of P1.x is 1"
|
|
newline
|
|
bitfld.long 0x00 2. "P2,Port 1 Output Bit 2" "0: The output level of P1.x is 0,1: The output level of P1.x is 1"
|
|
bitfld.long 0x00 1. "P1,Port 1 Output Bit 1" "0: The output level of P1.x is 0,1: The output level of P1.x is 1"
|
|
newline
|
|
bitfld.long 0x00 0. "P0,Port 1 Output Bit 0" "0: The output level of P1.x is 0,1: The output level of P1.x is 1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OMR,Port 1 Output Modification Register"
|
|
bitfld.long 0x00 21. "PR5,Port 1 Reset Bit 5" "0,1"
|
|
bitfld.long 0x00 19. "PR3,Port 1 Reset Bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "PR2,Port 1 Reset Bit 2" "0,1"
|
|
bitfld.long 0x00 17. "PR1,Port 1 Reset Bit 1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "PR0,Port 1 Reset Bit 0" "0,1"
|
|
bitfld.long 0x00 5. "PS5,Port 1 Set Bit 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "PS3,Port 1 Set Bit 3" "0,1"
|
|
bitfld.long 0x00 2. "PS2,Port 1 Set Bit 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "PS1,Port 1 Set Bit 1" "0,1"
|
|
bitfld.long 0x00 0. "PS0,Port 1 Set Bit 0" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "IOCR0,Port 1 Input/Output Control Register 0"
|
|
bitfld.long 0x00 26.--31. "PC3,Port Control for Port 1 Pin 3" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
|
|
bitfld.long 0x00 18.--23. "PC2,Port Control for Port 1 Pin 2" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
|
|
newline
|
|
bitfld.long 0x00 10.--15. "PC1,Port Control for Port 1 Pin 1" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
|
|
bitfld.long 0x00 2.--7. "PC0,Port Control for Port 1 Pin 0" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IOCR4,Port 1 Input/Output Control Register 4"
|
|
bitfld.long 0x00 10.--15. "PC5,Port Control for Port 1 Pin 5" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PHCR0,Port 1 Pad Hysteresis Control Register 0"
|
|
bitfld.long 0x00 22. "PH5,Pad Hysteresis for P1.5" "0,1"
|
|
bitfld.long 0x00 14. "PH3,Pad Hysteresis for P1.3" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "PH2,Pad Hysteresis for P1.2" "0,1"
|
|
bitfld.long 0x00 6. "PH1,Pad Hysteresis for P1.1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PH0,Pad Hysteresis for P1.0" "0,1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PDISC,Port 1 Pin Function Decision Control Register"
|
|
rbitfld.long 0x00 5. "PDIS5,Pad Disable for Port 1 Pin 5" "0: Pad P1.x is enabled,1: Pad P1.x is disabled"
|
|
rbitfld.long 0x00 3. "PDIS3,Pad Disable for Port 1 Pin 3" "0: Pad P1.x is enabled,1: Pad P1.x is disabled"
|
|
newline
|
|
rbitfld.long 0x00 2. "PDIS2,Pad Disable for Port 1 Pin 2" "0: Pad P1.x is enabled,1: Pad P1.x is disabled"
|
|
rbitfld.long 0x00 1. "PDIS1,Pad Disable for Port 1 Pin 1" "0: Pad P1.x is enabled,1: Pad P1.x is disabled"
|
|
newline
|
|
rbitfld.long 0x00 0. "PDIS0,Pad Disable for Port 1 Pin 0" "0: Pad P1.x is enabled,1: Pad P1.x is disabled"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "IN,Port 1 Input Register"
|
|
rbitfld.long 0x00 5. "P5,Port 1 Input Bit 5" "0: The input level of P1.x is 0,1: The input level of P1.x is 1"
|
|
rbitfld.long 0x00 3. "P3,Port 1 Input Bit 3" "0: The input level of P1.x is 0,1: The input level of P1.x is 1"
|
|
newline
|
|
rbitfld.long 0x00 2. "P2,Port 1 Input Bit 2" "0: The input level of P1.x is 0,1: The input level of P1.x is 1"
|
|
rbitfld.long 0x00 1. "P1,Port 1 Input Bit 1" "0: The input level of P1.x is 0,1: The input level of P1.x is 1"
|
|
newline
|
|
rbitfld.long 0x00 0. "P0,Port 1 Input Bit 0" "0: The input level of P1.x is 0,1: The input level of P1.x is 1"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "PPS,Port 1 Pin Power Save Register"
|
|
bitfld.long 0x00 5. "PPS5,Port 1 Pin Power Save Bit 5" "0: Pin Power Save of P1.x is disabled,1: Pin Power Save of P1.x is enabled"
|
|
bitfld.long 0x00 3. "PPS3,Port 1 Pin Power Save Bit 3" "0: Pin Power Save of P1.x is disabled,1: Pin Power Save of P1.x is enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "PPS2,Port 1 Pin Power Save Bit 2" "0: Pin Power Save of P1.x is disabled,1: Pin Power Save of P1.x is enabled"
|
|
bitfld.long 0x00 1. "PPS1,Port 1 Pin Power Save Bit 1" "0: Pin Power Save of P1.x is disabled,1: Pin Power Save of P1.x is enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PPS0,Port 1 Pin Power Save Bit 0" "0: Pin Power Save of P1.x is disabled,1: Pin Power Save of P1.x is enabled"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "HWSEL,Port 1 Pin Hardware Select Register"
|
|
bitfld.long 0x00 10.--11. "HW5,Port 1 Pin Hardware Select Bit 5" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
|
|
bitfld.long 0x00 6.--7. "HW3,Port 1 Pin Hardware Select Bit 3" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--5. "HW2,Port 1 Pin Hardware Select Bit 2" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
|
|
bitfld.long 0x00 2.--3. "HW1,Port 1 Pin Hardware Select Bit 1" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--1. "HW0,Port 1 Pin Hardware Select Bit 0" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
|
|
tree.end
|
|
tree "PORT2"
|
|
base ad:0x40040200
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "OUT,Port 2 Output Register"
|
|
bitfld.long 0x00 11. "P11,Port 2 Output Bit 11" "0: The output level of P2.x is 0,1: The output level of P2.x is 1"
|
|
bitfld.long 0x00 10. "P10,Port 2 Output Bit 10" "0: The output level of P2.x is 0,1: The output level of P2.x is 1"
|
|
newline
|
|
bitfld.long 0x00 8. "P8,Port 2 Output Bit 8" "0: The output level of P2.x is 0,1: The output level of P2.x is 1"
|
|
bitfld.long 0x00 6. "P6,Port 2 Output Bit 6" "0: The output level of P2.x is 0,1: The output level of P2.x is 1"
|
|
newline
|
|
bitfld.long 0x00 2. "P2,Port 2 Output Bit 2" "0: The output level of P2.x is 0,1: The output level of P2.x is 1"
|
|
bitfld.long 0x00 1. "P1,Port 2 Output Bit 1" "0: The output level of P2.x is 0,1: The output level of P2.x is 1"
|
|
newline
|
|
bitfld.long 0x00 0. "P0,Port 2 Output Bit 0" "0: The output level of P2.x is 0,1: The output level of P2.x is 1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "OMR,Port 2 Output Modification Register"
|
|
bitfld.long 0x00 27. "PR11,Port 2 Reset Bit 11" "0,1"
|
|
bitfld.long 0x00 26. "PR10,Port 2 Reset Bit 10" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "PR8,Port 2 Reset Bit 8" "0,1"
|
|
bitfld.long 0x00 22. "PR6,Port 2 Reset Bit 6" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "PR2,Port 2 Reset Bit 2" "0,1"
|
|
bitfld.long 0x00 17. "PR1,Port 2 Reset Bit 1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "PR0,Port 2 Reset Bit 0" "0,1"
|
|
bitfld.long 0x00 11. "PS11,Port 2 Set Bit 11" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "PS10,Port 2 Set Bit 10" "0,1"
|
|
bitfld.long 0x00 8. "PS8,Port 2 Set Bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "PS6,Port 2 Set Bit 6" "0,1"
|
|
bitfld.long 0x00 2. "PS2,Port 2 Set Bit 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "PS1,Port 2 Set Bit 1" "0,1"
|
|
bitfld.long 0x00 0. "PS0,Port 2 Set Bit 0" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "IOCR0,Port 2 Input/Output Control Register 0"
|
|
bitfld.long 0x00 18.--23. "PC2,Port Control for Port 2 Pin 2" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?..."
|
|
bitfld.long 0x00 10.--15. "PC1,Port Control for Port 2 Pin 1" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
|
|
newline
|
|
bitfld.long 0x00 2.--7. "PC0,Port Control for Port 2 Pin 0" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IOCR4,Port 2 Input/Output Control Register 4"
|
|
bitfld.long 0x00 18.--23. "PC6,Port Control for Port 2 Pin 6" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?..."
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "IOCR8,Port 2 Input/Output Control Register 8"
|
|
bitfld.long 0x00 26.--31. "PC11,Port Control for Port 2 Pin 11" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
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|
bitfld.long 0x00 18.--23. "PC10,Port Control for Port 2 Pin 10" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
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|
newline
|
|
bitfld.long 0x00 2.--7. "PC8,Port Control for Port 2 Pin 8" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?..."
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|
group.long 0x40++0x03
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|
line.long 0x00 "PHCR0,Port 2 Pad Hysteresis Control Register 0"
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|
bitfld.long 0x00 26. "PH6,Pad Hysteresis for P2.6" "0,1"
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|
bitfld.long 0x00 10. "PH2,Pad Hysteresis for P2.2" "0,1"
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|
newline
|
|
bitfld.long 0x00 6. "PH1,Pad Hysteresis for P2.1" "0,1"
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bitfld.long 0x00 2. "PH0,Pad Hysteresis for P2.0" "0,1"
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|
group.long 0x44++0x03
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|
line.long 0x00 "PHCR1,Port 2 Pad Hysteresis Control Register 1"
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|
bitfld.long 0x00 14. "PH11,Pad Hysteresis for P2.11" "0,1"
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|
bitfld.long 0x00 10. "PH10,Pad Hysteresis for P2.10" "0,1"
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|
newline
|
|
bitfld.long 0x00 2. "PH8,Pad Hysteresis for P2.8" "0,1"
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|
group.long 0x60++0x03
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line.long 0x00 "PDISC,Port 2 Pin Function Decision Control Register"
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|
bitfld.long 0x00 11. "PDIS11,Pad Disable for Port 2 Pin 11" "0: Analog input and digital input/output path..,1: Analog input path active"
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bitfld.long 0x00 10. "PDIS10,Pad Disable for Port 2 Pin 10" "0: Analog input and digital input/output path..,1: Analog input path active"
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|
newline
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bitfld.long 0x00 8. "PDIS8,Pad Disable for Port 2 Pin 8" "0: Analog input and digital input/output path..,1: Analog input path active"
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bitfld.long 0x00 6. "PDIS6,Pad Disable for Port 2 Pin 6" "0: Analog input and digital input/output path..,1: Analog input path active"
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|
newline
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bitfld.long 0x00 2. "PDIS2,Pad Disable for Port 2 Pin 2" "0: Analog input and digital input/output path..,1: Analog input path active"
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bitfld.long 0x00 1. "PDIS1,Pad Disable for Port 2 Pin 1" "0: Analog input and digital input/output path..,1: Analog input path active"
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newline
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bitfld.long 0x00 0. "PDIS0,Pad Disable for Port 2 Pin 0" "0: Analog input and digital input/output path..,1: Analog input path active"
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group.long 0x24++0x03
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line.long 0x00 "IN,Port 2 Input Register"
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rbitfld.long 0x00 11. "P11,Port 2 Input Bit 11" "0: The input level of P2.11 is 0,1: The input level of P2.11 is 1"
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rbitfld.long 0x00 10. "P10,Port 2 Input Bit 10" "0: The input level of P2.10 is 0,1: The input level of P2.10 is 1"
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newline
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rbitfld.long 0x00 8. "P8,Port 2 Input Bit 8" "0: The input level of P2.8 is 0,1: The input level of P2.8 is 1"
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rbitfld.long 0x00 6. "P6,Port 2 Input Bit 6" "0: The input level of P2.6 is 0,1: The input level of P2.6 is 1"
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newline
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rbitfld.long 0x00 2. "P2,Port 2 Input Bit 2" "0: The input level of P2.2 is 0,1: The input level of P2.2 is 1"
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rbitfld.long 0x00 1. "P1,Port 2 Input Bit 1" "0: The input level of P2.1 is 0,1: The input level of P2.1 is 1"
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newline
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rbitfld.long 0x00 0. "P0,Port 2 Input Bit 0" "0: The input level of P2.0 is 0,1: The input level of P2.0 is 1"
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group.long 0x70++0x03
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line.long 0x00 "PPS,Port 2 Pin Power Save Register"
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bitfld.long 0x00 11. "PPS11,Port 2 Pin Power Save Bit 11" "0: Pin Power Save of P2.11 is disabled,1: Pin Power Save of P2.11 is enabled"
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bitfld.long 0x00 10. "PPS10,Port 2 Pin Power Save Bit 10" "0: Pin Power Save of P2.10 is disabled,1: Pin Power Save of P2.10 is enabled"
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newline
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bitfld.long 0x00 8. "PPS8,Port 2 Pin Power Save Bit 8" "0: Pin Power Save of P2.8 is disabled,1: Pin Power Save of P2.8 is enabled"
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bitfld.long 0x00 6. "PPS6,Port 2 Pin Power Save Bit 6" "0: Pin Power Save of P2.6 is disabled,1: Pin Power Save of P2.6 is enabled"
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|
newline
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bitfld.long 0x00 2. "PPS2,Port 2 Pin Power Save Bit 2" "0: Pin Power Save of P2.2 is disabled,1: Pin Power Save of P2.2 is enabled"
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bitfld.long 0x00 1. "PPS1,Port 2 Pin Power Save Bit 1" "0: Pin Power Save of P2.1 is disabled,1: Pin Power Save of P2.1 is enabled"
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newline
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bitfld.long 0x00 0. "PPS0,Port 2 Pin Power Save Bit 0" "0: Pin Power Save of P2.0 is disabled,1: Pin Power Save of P2.0 is enabled"
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|
group.long 0x74++0x03
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line.long 0x00 "HWSEL,Port 2 Pin Hardware Select Register"
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|
bitfld.long 0x00 22.--23. "HW11,Port 2 Pin Hardware Select Bit 11" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
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bitfld.long 0x00 20.--21. "HW10,Port 2 Pin Hardware Select Bit 10" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
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|
newline
|
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bitfld.long 0x00 16.--17. "HW8,Port 2 Pin Hardware Select Bit 8" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
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bitfld.long 0x00 12.--13. "HW6,Port 2 Pin Hardware Select Bit 6" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
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|
newline
|
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bitfld.long 0x00 4.--5. "HW2,Port 2 Pin Hardware Select Bit 2" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
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bitfld.long 0x00 2.--3. "HW1,Port 2 Pin Hardware Select Bit 1" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
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newline
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bitfld.long 0x00 0.--1. "HW0,Port 2 Pin Hardware Select Bit 0" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
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tree.end
|
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tree "PORT4"
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|
base ad:0x40040400
|
|
group.long 0x00++0x03
|
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line.long 0x00 "OUT,Port 4 Output Register"
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|
bitfld.long 0x00 7. "P7,Port 4 Output Bit 7" "0: The output level of P4.x is 0,1: The output level of P4.x is 1"
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bitfld.long 0x00 6. "P6,Port 4 Output Bit 6" "0: The output level of P4.x is 0,1: The output level of P4.x is 1"
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|
newline
|
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bitfld.long 0x00 5. "P5,Port 4 Output Bit 5" "0: The output level of P4.x is 0,1: The output level of P4.x is 1"
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bitfld.long 0x00 4. "P4,Port 4 Output Bit 4" "0: The output level of P4.x is 0,1: The output level of P4.x is 1"
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|
newline
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bitfld.long 0x00 3. "P3,Port 4 Output Bit 3" "0: The output level of P4.x is 0,1: The output level of P4.x is 1"
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bitfld.long 0x00 2. "P2,Port 4 Output Bit 2" "0: The output level of P4.x is 0,1: The output level of P4.x is 1"
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|
newline
|
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bitfld.long 0x00 1. "P1,Port 4 Output Bit 1" "0: The output level of P4.x is 0,1: The output level of P4.x is 1"
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bitfld.long 0x00 0. "P0,Port 4 Output Bit 0" "0: The output level of P4.x is 0,1: The output level of P4.x is 1"
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|
group.long 0x04++0x03
|
|
line.long 0x00 "OMR,Port 4 Output Modification Register"
|
|
bitfld.long 0x00 23. "PR7,Port 4 Reset Bit 7" "0,1"
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bitfld.long 0x00 22. "PR6,Port 4 Reset Bit 6" "0,1"
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|
newline
|
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bitfld.long 0x00 21. "PR5,Port 4 Reset Bit 5" "0,1"
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bitfld.long 0x00 20. "PR4,Port 4 Reset Bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "PR3,Port 4 Reset Bit 3" "0,1"
|
|
bitfld.long 0x00 18. "PR2,Port 4 Reset Bit 2" "0,1"
|
|
newline
|
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bitfld.long 0x00 17. "PR1,Port 4 Reset Bit 1" "0,1"
|
|
bitfld.long 0x00 16. "PR0,Port 4 Reset Bit 0" "0,1"
|
|
newline
|
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bitfld.long 0x00 7. "PS7,Port 4 Set Bit 7" "0,1"
|
|
bitfld.long 0x00 6. "PS6,Port 4 Set Bit 6" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "PS5,Port 4 Set Bit 5" "0,1"
|
|
bitfld.long 0x00 4. "PS4,Port 4 Set Bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "PS3,Port 4 Set Bit 3" "0,1"
|
|
bitfld.long 0x00 2. "PS2,Port 4 Set Bit 2" "0,1"
|
|
newline
|
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bitfld.long 0x00 1. "PS1,Port 4 Set Bit 1" "0,1"
|
|
bitfld.long 0x00 0. "PS0,Port 4 Set Bit 0" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "IOCR0,Port 4 Input/Output Control Register 0"
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|
bitfld.long 0x00 26.--31. "PC3,Port Control for Port 4 Pin 3" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
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|
bitfld.long 0x00 18.--23. "PC2,Port Control for Port 4 Pin 2" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
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|
newline
|
|
bitfld.long 0x00 10.--15. "PC1,Port Control for Port 4 Pin 1" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
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|
bitfld.long 0x00 2.--7. "PC0,Port Control for Port 4 Pin 0" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
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|
group.long 0x14++0x03
|
|
line.long 0x00 "IOCR4,Port 4 Input/Output Control Register 4"
|
|
bitfld.long 0x00 26.--31. "PC7,Port Control for Port 4 Pin 7" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
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|
bitfld.long 0x00 18.--23. "PC6,Port Control for Port 4 Pin 6" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
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|
newline
|
|
bitfld.long 0x00 10.--15. "PC5,Port Control for Port 4 Pin 5" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
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|
bitfld.long 0x00 2.--7. "PC4,Port Control for Port 4 Pin 4" "0: Input - No internal pull device active,1: Input - Internal pull-down device active,2: Input - Internal pull-up device active,3: Input - No internal pull device Pn_OUTx =..,4: Input inverted - No internal pull device active,5: Input inverted - Internal pull-down device..,6: Input inverted - Internal pull-up device active,7: Input inverted - No internal pull device..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,32: Output Push-Pull - General-purpose output,33: Output Push-Pull - Alternate output function 1,34: Output Push-Pull - Alternate output function 2,35: Output Push-Pull - Alternate output function 3,36: Output Push-Pull - Alternate output function 4,37: Output Push-Pull - Alternate output function 5,38: Output Push-Pull - Alternate output function 6,39: Output Push-Pull - Alternate output function 7,40: Output Push-Pull - Alternate output function 8,41: Output Push-Pull - Alternate output function 9,?,?,?,?,?,?,48: Output Open Drain - General-purpose output,49: Output Open Drain - Alternate output..,50: Output Open Drain - Alternate output..,51: Output Open Drain - Alternate output..,52: Output Open Drain - Alternate output..,53: Output Open Drain - Alternate output..,54: Output Open Drain - Alternate output..,55: Output Open Drain - Alternate output..,56: Output Open Drain - Alternate output..,57: Output Open Drain - Alternate output..,?..."
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PHCR0,Port 4 Pad Hysteresis Control Register 0"
|
|
bitfld.long 0x00 30. "PH7,Pad Hysteresis for P4.7" "0,1"
|
|
bitfld.long 0x00 26. "PH6,Pad Hysteresis for P4.6" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "PH5,Pad Hysteresis for P4.5" "0,1"
|
|
bitfld.long 0x00 18. "PH4,Pad Hysteresis for P4.4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "PH3,Pad Hysteresis for P4.3" "0,1"
|
|
bitfld.long 0x00 10. "PH2,Pad Hysteresis for P4.2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "PH1,Pad Hysteresis for P4.1" "0,1"
|
|
bitfld.long 0x00 2. "PH0,Pad Hysteresis for P4.0" "0,1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PDISC,Port 4 Pin Function Decision Control Register"
|
|
rbitfld.long 0x00 7. "PDIS7,Pad Disable for Port 4 Pin 7" "0: Pad P4.x is enabled,1: Pad P4.x is disabled"
|
|
rbitfld.long 0x00 6. "PDIS6,Pad Disable for Port 4 Pin 6" "0: Pad P4.x is enabled,1: Pad P4.x is disabled"
|
|
newline
|
|
rbitfld.long 0x00 5. "PDIS5,Pad Disable for Port 4 Pin 5" "0: Pad P4.x is enabled,1: Pad P4.x is disabled"
|
|
rbitfld.long 0x00 4. "PDIS4,Pad Disable for Port 4 Pin 4" "0: Pad P4.x is enabled,1: Pad P4.x is disabled"
|
|
newline
|
|
rbitfld.long 0x00 3. "PDIS3,Pad Disable for Port 4 Pin 3" "0: Pad P4.x is enabled,1: Pad P4.x is disabled"
|
|
rbitfld.long 0x00 2. "PDIS2,Pad Disable for Port 4 Pin 2" "0: Pad P4.x is enabled,1: Pad P4.x is disabled"
|
|
newline
|
|
rbitfld.long 0x00 1. "PDIS1,Pad Disable for Port 4 Pin 1" "0: Pad P4.x is enabled,1: Pad P4.x is disabled"
|
|
rbitfld.long 0x00 0. "PDIS0,Pad Disable for Port 4 Pin 0" "0: Pad P4.x is enabled,1: Pad P4.x is disabled"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "IN,Port 4 Input Register"
|
|
rbitfld.long 0x00 7. "P7,Port 4 Input Bit 7" "0: The input level of P4.x is 0,1: The input level of P4.x is 1"
|
|
rbitfld.long 0x00 6. "P6,Port 4 Input Bit 6" "0: The input level of P4.x is 0,1: The input level of P4.x is 1"
|
|
newline
|
|
rbitfld.long 0x00 5. "P5,Port 4 Input Bit 5" "0: The input level of P4.x is 0,1: The input level of P4.x is 1"
|
|
rbitfld.long 0x00 4. "P4,Port 4 Input Bit 4" "0: The input level of P4.x is 0,1: The input level of P4.x is 1"
|
|
newline
|
|
rbitfld.long 0x00 3. "P3,Port 4 Input Bit 3" "0: The input level of P4.x is 0,1: The input level of P4.x is 1"
|
|
rbitfld.long 0x00 2. "P2,Port 4 Input Bit 2" "0: The input level of P4.x is 0,1: The input level of P4.x is 1"
|
|
newline
|
|
rbitfld.long 0x00 1. "P1,Port 4 Input Bit 1" "0: The input level of P4.x is 0,1: The input level of P4.x is 1"
|
|
rbitfld.long 0x00 0. "P0,Port 4 Input Bit 0" "0: The input level of P4.x is 0,1: The input level of P4.x is 1"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "PPS,Port 4 Pin Power Save Register"
|
|
bitfld.long 0x00 7. "PPS7,Port 4 Pin Power Save Bit 7" "0: Pin Power Save of P4.x is disabled,1: Pin Power Save of P4.x is enabled"
|
|
bitfld.long 0x00 6. "PPS6,Port 4 Pin Power Save Bit 6" "0: Pin Power Save of P4.x is disabled,1: Pin Power Save of P4.x is enabled"
|
|
newline
|
|
bitfld.long 0x00 5. "PPS5,Port 4 Pin Power Save Bit 5" "0: Pin Power Save of P4.x is disabled,1: Pin Power Save of P4.x is enabled"
|
|
bitfld.long 0x00 4. "PPS4,Port 4 Pin Power Save Bit 4" "0: Pin Power Save of P4.x is disabled,1: Pin Power Save of P4.x is enabled"
|
|
newline
|
|
bitfld.long 0x00 3. "PPS3,Port 4 Pin Power Save Bit 3" "0: Pin Power Save of P4.x is disabled,1: Pin Power Save of P4.x is enabled"
|
|
bitfld.long 0x00 2. "PPS2,Port 4 Pin Power Save Bit 2" "0: Pin Power Save of P4.x is disabled,1: Pin Power Save of P4.x is enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "PPS1,Port 4 Pin Power Save Bit 1" "0: Pin Power Save of P4.x is disabled,1: Pin Power Save of P4.x is enabled"
|
|
bitfld.long 0x00 0. "PPS0,Port 4 Pin Power Save Bit 0" "0: Pin Power Save of P4.x is disabled,1: Pin Power Save of P4.x is enabled"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "HWSEL,Port 4 Pin Hardware Select Register"
|
|
bitfld.long 0x00 14.--15. "HW7,Port 4 Pin Hardware Select Bit 7" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
|
|
bitfld.long 0x00 12.--13. "HW6,Port 4 Pin Hardware Select Bit 6" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
|
|
newline
|
|
bitfld.long 0x00 10.--11. "HW5,Port 4 Pin Hardware Select Bit 5" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
|
|
bitfld.long 0x00 8.--9. "HW4,Port 4 Pin Hardware Select Bit 4" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
|
|
newline
|
|
bitfld.long 0x00 6.--7. "HW3,Port 4 Pin Hardware Select Bit 3" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
|
|
bitfld.long 0x00 4.--5. "HW2,Port 4 Pin Hardware Select Bit 2" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
|
|
newline
|
|
bitfld.long 0x00 2.--3. "HW1,Port 4 Pin Hardware Select Bit 1" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
|
|
bitfld.long 0x00 0.--1. "HW0,Port 4 Pin Hardware Select Bit 0" "0: Software control only,1: HW0 control path can override the software..,2: HW1 control path can override the software..,?..."
|
|
tree.end
|
|
tree.end
|
|
tree "POSIF (Position Interface 1)"
|
|
base ad:0x50014000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PCONF,POSIF configuration"
|
|
bitfld.long 0x00 28.--30. "LPC,Low Pass Filters Configuration" "0: Low pass filter disabled,1: Low pass of 1 clock cycle,2: Low pass of 2 clock cycles,3: Low pass of 4 clock cycles,4: Low pass of 8 clock cycles,5: Low pass of 16 clock cycles,6: Low pass of 32 clock cycles,7: Low pass of 64 clock cycles"
|
|
bitfld.long 0x00 27. "EWIL,External Wrong Hall Event active level" "0: POSIFx.EWHE[D...A] signal is active HIGH,1: POSIFx.EWHE[D...A] signal is active LOW"
|
|
newline
|
|
bitfld.long 0x00 26. "EWIE,External Wrong Hall Event enable" "0: External wrong hall event emulation signal..,1: External wrong hall event emulation signal.."
|
|
bitfld.long 0x00 24.--25. "EWIS,Wrong Hall Event selection" "0: POSIFx.EWHEA,1: POSIFx.EWHEB,2: POSIFx.EWHEC,3: POSIFx.EWHED"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "MSYNS,PWM synchronization signal selector" "0: POSIFx.MSYNCA,1: POSIFx.MSYNCB,2: POSIFx.MSYNCC,3: POSIFx.MSYNCD"
|
|
bitfld.long 0x00 21. "MSES,Multi-Channel pattern update trigger edge" "0: The signal used to enable a pattern update is..,1: The signal used to enable a pattern update is.."
|
|
newline
|
|
bitfld.long 0x00 18.--20. "MSETS,Pattern update signal select" "0: POSIFx.MSETA,1: POSIFx.MSETB,2: POSIFx.MSETC,3: POSIFx.MSETD,4: POSIFx.MSETE,5: POSIFx.MSETF,6: POSIFx.MSETG,7: POSIFx.MSETH"
|
|
bitfld.long 0x00 17. "SPES,Edge selector for the sampling trigger" "0: Rising edge,1: Falling edge"
|
|
newline
|
|
bitfld.long 0x00 16. "DSEL,Delay Pin selector" "0: POSIFx.HSDA,1: POSIFx.HSDB"
|
|
bitfld.long 0x00 12.--13. "INSEL2,Index/Hall input 3 selector" "0: POSIFx.IN2A,1: POSIFx.IN2B,2: POSIFx.IN2C,3: POSIFx.IN2D"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "INSEL1,PhaseB/Hall input 2 selector" "0: POSIFx.IN1A,1: POSIFx.IN1B,2: POSIFx.IN1C,3: POSIFx.IN1D"
|
|
bitfld.long 0x00 8.--9. "INSEL0,PhaseA/Hal input 1 selector" "0: POSIFx.IN0A,1: POSIFx.IN0B,2: POSIFx.IN0C,3: POSIFx.IN0D"
|
|
newline
|
|
bitfld.long 0x00 5. "MCUE,Multi-Channel Pattern SW update enable" "0: Multi-Channel pattern update is controlled..,1: Multi-Channel pattern update is controlled.."
|
|
bitfld.long 0x00 4. "HIDG,Idle generation enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "QDCM,Position Decoder Mode selection" "0: Position encoder is in Quadrature Mode,1: Position encoder is in Direction Count Mode"
|
|
bitfld.long 0x00 0.--1. "FSEL,Function Selector" "0: Hall Sensor Mode enabled,1: Quadrature Decoder Mode enabled,2: stand-alone Multi-Channel Mode enabled,3: Quadrature Decoder and stand-alone.."
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PSUS,POSIF Suspend Config"
|
|
bitfld.long 0x00 2.--3. "MSUS,Multi-Channel Mode Suspend Config" "0: Suspend request ignored,1: Stop immediately,2: Stop immediately,3: Suspend with the synchronization of the PWM.."
|
|
bitfld.long 0x00 0.--1. "QSUS,Quadrature Mode Suspend Config" "0: Suspend request ignored,1: Stop immediately,2: Suspend in the next index occurrence,3: Suspend in the next phase (PhaseA or PhaseB).."
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PRUNS,POSIF Run Bit Set"
|
|
bitfld.long 0x00 0. "SRB,Set Run bit" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PRUNC,POSIF Run Bit Clear"
|
|
bitfld.long 0x00 1. "CSM,Clear Current internal status" "0,1"
|
|
bitfld.long 0x00 0. "CRB,Clear Run bit" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PRUN,POSIF Run Bit Status"
|
|
rbitfld.long 0x00 0. "RB,Run Bit" "0: value1,1: Running"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MIDR,Module Identification register"
|
|
hexmask.long.word 0x00 16.--31. 1. "MODN,Module Number"
|
|
hexmask.long.byte 0x00 8.--15. 1. "MODT,Module Type"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "MODR,Module Revision"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "HALP,Hall Sensor Patterns"
|
|
rbitfld.long 0x00 3.--5. "HEP,Hall Expected Pattern" "0,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x00 0.--2. "HCP,Hall Current Pattern" "0,1,2,3,4,5,6,7"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "HALPS,Hall Sensor Shadow Patterns"
|
|
bitfld.long 0x00 3.--5. "HEPS,Shadow Hall expected Pattern" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "HCPS,Shadow Hall Current Pattern" "0,1,2,3,4,5,6,7"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MCM,Multi-Channel Pattern"
|
|
hexmask.long.word 0x00 0.--15. 1. "MCMP,Multi-Channel Pattern"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "MCSM,Multi-Channel Shadow Pattern"
|
|
hexmask.long.word 0x00 0.--15. 1. "MCMPS,Shadow Multi-Channel Pattern"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "MCMS,Multi-Channel Pattern Control set"
|
|
bitfld.long 0x00 2. "STMR,Multi-Channel Shadow Transfer Request" "0,1"
|
|
bitfld.long 0x00 1. "STHR,Hall Pattern Shadow Transfer Request" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "MNPS,Multi-Channel Pattern Update Enable Set" "0,1"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "MCMC,Multi-Channel Pattern Control clear"
|
|
bitfld.long 0x00 1. "MPC,Multi-Channel Pattern clear" "0,1"
|
|
bitfld.long 0x00 0. "MNPC,Multi-Channel Pattern Update Enable Clear" "0,1"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "MCMF,Multi-Channel Pattern Control flag"
|
|
rbitfld.long 0x00 0. "MSS,Multi-Channel Pattern update status" "0: Update of the Multi-Channel pattern is set,1: Update of the Multi-Channel pattern is not set"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "QDC,Quadrature Decoder Control"
|
|
rbitfld.long 0x00 8. "DVAL,Current rotation direction" "0: Counterclockwise rotation,1: Clockwise rotation"
|
|
bitfld.long 0x00 4.--5. "ICM,Index Marker generations control" "0: No index marker generation on POSIFx.OUT3,1: Only first index occurrence generated on..,2: All index occurrences generated on POSIFx.OUT3,?..."
|
|
newline
|
|
bitfld.long 0x00 2. "PHS,Phase signals swap" "0: Phase A is the leading signal for clockwise..,1: Phase B is the leading signal for clockwise.."
|
|
bitfld.long 0x00 1. "PBLS,Phase B Level selector" "0: Phase B is active HIGH,1: Phase B is active LOW"
|
|
newline
|
|
bitfld.long 0x00 0. "PALS,Phase A Level selector" "0: Phase A is active HIGH,1: Phase A is active LOW"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "PFLG,POSIF Interrupt Flags"
|
|
rbitfld.long 0x00 12. "PCLKS,Quadrature Period Clk Status" "0: Period clock not generated,1: Period clock generated"
|
|
rbitfld.long 0x00 11. "DIRS,Quadrature Direction Change" "0: Change on direction not detected,1: Change on direction detected"
|
|
newline
|
|
rbitfld.long 0x00 10. "CNTS,Quadrature CLK Status" "0: Quadrature clock not generated,1: Quadrature clock generated"
|
|
rbitfld.long 0x00 9. "ERRS,Quadrature Phase Error Status" "0: Phase Error event not detected,1: Phase Error event detected"
|
|
newline
|
|
rbitfld.long 0x00 8. "INDXS,Quadrature Index Status" "0: Index event not detected,1: Index event detected"
|
|
rbitfld.long 0x00 4. "MSTS,Multi-Channel pattern shadow transfer status" "0: Shadow transfer not done,1: Shadow transfer done"
|
|
newline
|
|
rbitfld.long 0x00 2. "HIES,Hall Inputs Update Status" "0: Transition on the Hall Inputs not detected,1: Transition on the Hall Inputs detected"
|
|
rbitfld.long 0x00 1. "WHES,Wrong Hall Event Status" "0: Wrong Hall Event not detected,1: Wrong Hall Event detected"
|
|
newline
|
|
rbitfld.long 0x00 0. "CHES,Correct Hall Event Status" "0: Correct Hall Event not detected,1: Correct Hall Event detected"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "PFLGE,POSIF Interrupt Enable"
|
|
bitfld.long 0x00 28. "PCLSEL,Quadrature Period clock Event Service Request Selector" "0: Quadrature Period clock Event interrupt..,1: Quadrature Period clock Event interrupt.."
|
|
bitfld.long 0x00 27. "DIRSEL,Quadrature Direction Update Event Service Request Selector" "0: Quadrature Direction Update Event interrupt..,1: Quadrature Direction Update Event interrupt.."
|
|
newline
|
|
bitfld.long 0x00 26. "CNTSEL,Quadrature Clock Event Service Request Selector" "0: Quadrature Clock Event interrupt forward to..,1: Quadrature Clock Event interrupt forward to.."
|
|
bitfld.long 0x00 25. "ERRSEL,Quadrature Phase Error Event Service Request Selector" "0: Quadrature Phase error Event interrupt..,1: Quadrature Phase error Event interrupt.."
|
|
newline
|
|
bitfld.long 0x00 24. "INDSEL,Quadrature Index Event Service Request Selector" "0: Quadrature Index Event interrupt forward to..,1: Quadrature Index Event interrupt forward to.."
|
|
bitfld.long 0x00 20. "MSTSEL,Multi-Channel pattern Update Event Service Request Selector" "0: Multi-Channel pattern Update Event interrupt..,1: Multi-Channel pattern Update Event interrupt.."
|
|
newline
|
|
bitfld.long 0x00 18. "HIESEL,Hall Inputs Update Event Service Request Selector" "0: Hall Inputs Update Event interrupt forward to..,1: Hall Inputs Update Event interrupt forward to.."
|
|
bitfld.long 0x00 17. "WHESEL,Wrong Hall Event Service Request Selector" "0: Wrong Hall Event interrupt forward to..,1: Wrong Hall Event interrupt forward to.."
|
|
newline
|
|
bitfld.long 0x00 16. "CHESEL,Correct Hall Event Service Request Selector" "0: Correct Hall Event interrupt forward to..,1: Correct Hall Event interrupt forward to.."
|
|
bitfld.long 0x00 12. "EPCLK,Quadrature Period CLK interrupt Enable" "0: Quadrature Period CLK event interrupt disabled,1: Quadrature Period CLK event interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 11. "EDIR,Quadrature direction change interrupt Enable" "0: Direction change event interrupt disabled,1: Direction change event interrupt enabled"
|
|
bitfld.long 0x00 10. "ECNT,Quadrature CLK interrupt Enable" "0: Quadrature CLK event interrupt disabled,1: Quadrature CLK event interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 9. "EERR,Quadrature Phase Error Enable" "0: Phase error event interrupt disabled,1: Phase error event interrupt enabled"
|
|
bitfld.long 0x00 8. "EINDX,Quadrature Index Event Enable" "0: Index event interrupt disabled,1: Index event interrupt enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "EMST,Multi-Channel pattern shadow transfer enable" "0: Shadow transfer event interrupt disabled,1: Shadow transfer event interrupt enabled"
|
|
bitfld.long 0x00 2. "EHIE,Hall Input Update Enable" "0: Update of the Hall Inputs interrupt is disabled,1: Update of the Hall Inputs interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "EWHE,Wrong Hall Event Enable" "0: Wrong Hall Event interrupt disabled,1: Wrong Hall Event interrupt enabled"
|
|
bitfld.long 0x00 0. "ECHE,Correct Hall Event Enable" "0: Correct Hall Event interrupt disabled,1: Correct Hall Event interrupt enabled"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "SPFLG,POSIF Interrupt Set"
|
|
bitfld.long 0x00 12. "SPCLK,Quadrature period clock flag set" "0,1"
|
|
bitfld.long 0x00 11. "SDIR,Quadrature Direction flag set" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "SCNT,Quadrature CLK flag set" "0,1"
|
|
bitfld.long 0x00 9. "SERR,Quadrature Phase Error flag set" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SINDX,Quadrature Index flag set" "0,1"
|
|
bitfld.long 0x00 4. "SMST,Multi-Channel Pattern shadow transfer flag set" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "SHIE,Hall Inputs Update Event flag set" "0,1"
|
|
bitfld.long 0x00 1. "SWHE,Wrong Hall Event flag set" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "SCHE,Correct Hall Event flag set" "0,1"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "RPFLG,POSIF Interrupt Clear"
|
|
bitfld.long 0x00 12. "RPCLK,Quadrature period clock flag clear" "0,1"
|
|
bitfld.long 0x00 11. "RDIR,Quadrature Direction flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "RCNT,Quadrature CLK flag clear" "0,1"
|
|
bitfld.long 0x00 9. "RERR,Quadrature Phase Error flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "RINDX,Quadrature Index flag clear" "0,1"
|
|
bitfld.long 0x00 4. "RMST,Multi-Channel Pattern shadow transfer flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "RHIE,Hall Inputs Update Event flag clear" "0,1"
|
|
bitfld.long 0x00 1. "RWHE,Wrong Hall Event flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RCHE,Correct Hall Event flag clear" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "PDBG,POSIF Debug register"
|
|
rbitfld.long 0x00 22.--27. "LPP2,Actual count of the Low Pass Filter for POSI2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rbitfld.long 0x00 16.--21. "LPP1,Actual count of the Low Pass Filter for POSI1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
rbitfld.long 0x00 8.--13. "LPP0,Actual count of the Low Pass Filter for POSI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rbitfld.long 0x00 5.--7. "HSP,Hall Current Sampled Pattern" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
rbitfld.long 0x00 4. "IVAL,Current Index Value" "0,1"
|
|
rbitfld.long 0x00 2.--3. "QPSV,Quadrature Decoder Previous state" "0,1,2,3"
|
|
newline
|
|
rbitfld.long 0x00 0.--1. "QCSV,Quadrature Decoder Current state" "0,1,2,3"
|
|
tree.end
|
|
tree "PPB (Cortex-M0 Private Peripheral Block)"
|
|
base ad:0xE000E000
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
|
|
bitfld.long 0x00 16. "COUNTFLAG,Counter Flag" "0,1"
|
|
bitfld.long 0x00 2. "CLKSOURCE,Clock Source" "0: External clock,1: Processor clock"
|
|
newline
|
|
bitfld.long 0x00 1. "TICKINT,SysTick Exception Request" "0: Counting down to zero does not assert the..,1: Counting down to zero to assert the SysTick.."
|
|
bitfld.long 0x00 0. "ENABLE,Counter Enable" "0: Counter disabled,1: Counter enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SYST_RVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "RELOAD,Reload Value"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "SYST_CVR,SysTick Current Value Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "CURRENT,SysTick Counter Current Value"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
|
|
rbitfld.long 0x00 31. "NOREF,Reference Clock" "0,1"
|
|
rbitfld.long 0x00 30. "SKEW,Clock Skew" "0,1"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "TENMS,10 Milliseconds"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "NVIC_ISER,Interrupt Set-enable Register"
|
|
hexmask.long 0x00 0.--31. 1. "SETENA,Interrupt Node Set-enable"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "NVIC_ICER,IInterrupt Clear-enable Register"
|
|
hexmask.long 0x00 0.--31. 1. "CLRENA,Interrupt Node Clear-enable"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "NVIC_ISPR,Interrupt Set-pending Register"
|
|
hexmask.long 0x00 0.--31. 1. "SETPEND,Interrupt Node Set-pending"
|
|
group.long 0x280++0x03
|
|
line.long 0x00 "NVIC_ICPR,Interrupt Clear-pending Register"
|
|
hexmask.long 0x00 0.--31. 1. "CLRPEND,Interrupt Node Clear-pending"
|
|
repeat 8. (strings "0" "1" "2" "3" "4" "5" "6" "7" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C )
|
|
group.long ($2+0x400)++0x03
|
|
line.long 0x00 "NVIC_IPR$1,Interrupt Priority Register $1"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PRI_3,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. "PRI_2,Priority Byte Offset 2"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "PRI_1,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PRI_0,Priority Byte Offset 0"
|
|
repeat.end
|
|
group.long 0xD00++0x03
|
|
line.long 0x00 "CPUID,CPUID Base Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "Implementer,Implementer Code"
|
|
rbitfld.long 0x00 20.--23. "Variant,Variant Number" "0: Revision 0,?..."
|
|
newline
|
|
rbitfld.long 0x00 16.--19. "Architecture,Architecture" "?,?,?,?,?,?,?,?,?,?,?,?,12: ARMv6-M,?..."
|
|
hexmask.long.word 0x00 4.--15. 1. "PartNo,Part Number of the Processor"
|
|
newline
|
|
rbitfld.long 0x00 0.--3. "Revision,Revision Number" "0: Patch 0,?..."
|
|
group.long 0xD04++0x03
|
|
line.long 0x00 "ICSR,Interrupt Control and State Register"
|
|
bitfld.long 0x00 28. "PENDSVSET,PendSV Set Pending" "0: PendSV exception is not pending,1: PendSV excepton is pending"
|
|
bitfld.long 0x00 27. "PENDSVCLR,PendSV Clear Pending" "0: Do not clear,1: Removes pending state from PendSV exception"
|
|
newline
|
|
bitfld.long 0x00 26. "PENDSTSET,SysTick Exception Set-pending" "0: SysTick exception is not pending,1: SysTick exception is pending"
|
|
bitfld.long 0x00 25. "PENDSTCLR,SysTick Exception Clear-pending" "0: No effect,1: removes the pending state from the SysTick.."
|
|
newline
|
|
rbitfld.long 0x00 22. "ISRPENDING,Interrupt Pending Flag" "0: Interrupt not pending,1: Interrupt pending"
|
|
rbitfld.long 0x00 12.--17. "VECTPENDING,Pending Exception Number" "0: No pending exceptions,?..."
|
|
newline
|
|
rbitfld.long 0x00 0.--5. "VECTACTIVE,Active Exception Number" "0: Thread mode,?..."
|
|
group.long 0xD0C++0x03
|
|
line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "VECTKEY,Register Key"
|
|
rbitfld.long 0x00 15. "ENDIANNESS,Data Endianness" "0: Little-endian,?..."
|
|
newline
|
|
bitfld.long 0x00 2. "SYSRESETREQ,System Reset Request" "0: No effect,1: Requests a system level reset"
|
|
group.long 0xD10++0x03
|
|
line.long 0x00 "SCR,System Control Register"
|
|
bitfld.long 0x00 4. "SEVONPEND,Send Event on Pending bit" "0: Wakeup only by enabled interrupts or events,1: Wakeup by enabled events and all interrupts"
|
|
bitfld.long 0x00 2. "SLEEPDEEP,Low Power Sleep Mode" "0: value1,1: Deep sleep"
|
|
newline
|
|
bitfld.long 0x00 1. "SLEEPONEXIT,Sleep-on-exit" "0: Do not sleep when returning to Thread mode,1: Enter sleep or deep sleep on return from an.."
|
|
group.long 0xD14++0x03
|
|
line.long 0x00 "CCR,Configuration and Control Register"
|
|
rbitfld.long 0x00 9. "STKALIGN,Stack Alignment" "0,1"
|
|
rbitfld.long 0x00 3. "UNALIGN_TRP,Unaligned Access Traps" "0,1"
|
|
group.long 0xD1C++0x03
|
|
line.long 0x00 "SHPR2,System Handler Priority Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PRI_11,Priority of System Handler 11"
|
|
group.long 0xD20++0x03
|
|
line.long 0x00 "SHPR3,System Handler Priority Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. "PRI_15,Priority of System Handler 15"
|
|
hexmask.long.byte 0x00 16.--23. 1. "PRI_14,Priority of System Handler 14"
|
|
group.long 0xD24++0x03
|
|
line.long 0x00 "SHCSR,System Handler Control and State Register"
|
|
bitfld.long 0x00 15. "SVCALLPENDED,SVCall Pending bit" "0: SVCall is not pending,1: SVCall is pending"
|
|
tree.end
|
|
tree "PRNG (PRNG Unit)"
|
|
base ad:0x48020000
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "WORD,PRNG Word Register"
|
|
hexmask.word 0x00 0.--15. 1. "RDATA,Random Data"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "CHK,PRNG Status Check Register"
|
|
rbitfld.word 0x00 0. "RDV,Random Data / Key Valid Flag" "0: New random data block is invalid,1: Random data block is valid"
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "CTRL,PRNG Control Register"
|
|
bitfld.word 0x00 3. "KLD,Key Load Operation Mode" "0: Streaming mode (default),1: Key loading mode"
|
|
bitfld.word 0x00 1.--2. "RDBS,Random Data Block Size" "0: none - PRNG_WORD.RDATA is undefined,1: 8 bits in PRNG_WORD.RDATA[7:0],2: 16 bits in PRNG_WORD.RDATA[15:0],?..."
|
|
tree.end
|
|
tree "RTC (Real-time Counter)"
|
|
base ad:0x40010A00
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ID,RTC Module ID Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "MOD_NUMBER,Module Number Value"
|
|
hexmask.long.byte 0x00 8.--15. 1. "MOD_TYPE,Module Type"
|
|
hexmask.long.byte 0x00 0.--7. 1. "MOD_REV,Module Revision Number"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTR,RTC Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "DIV,Divider Value"
|
|
bitfld.long 0x00 1. "SUS,Debug Suspend Control" "0,1"
|
|
bitfld.long 0x00 0. "ENB,RTC Module Enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RAWSTAT,RTC Raw Service Request Register"
|
|
rbitfld.long 0x00 8. "RAI,Alarm Service Request" "0,1"
|
|
rbitfld.long 0x00 6. "RPYE,Raw Periodic Years Service Request" "0,1"
|
|
rbitfld.long 0x00 5. "RPMO,Raw Periodic Months Service Request" "0,1"
|
|
rbitfld.long 0x00 3. "RPDA,Raw Periodic Days Service Request" "0,1"
|
|
rbitfld.long 0x00 2. "RPHO,Raw Periodic Hours Service Request" "0,1"
|
|
rbitfld.long 0x00 1. "RPMI,Raw Periodic Minutes Service Request" "0,1"
|
|
rbitfld.long 0x00 0. "RPSE,Raw Periodic Seconds Service Request" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "STSSR,RTC Service Request Status Register"
|
|
rbitfld.long 0x00 8. "SAI,Alarm Service Request Status after masking" "0,1"
|
|
rbitfld.long 0x00 6. "SPYE,Periodic Years Service Request Status after masking" "0,1"
|
|
rbitfld.long 0x00 5. "SPMO,Periodic Months Service Request Status after masking" "0,1"
|
|
rbitfld.long 0x00 3. "SPDA,Periodic Days Service Request Status after masking" "0,1"
|
|
rbitfld.long 0x00 2. "SPHO,Periodic Hours Service Request Status after masking" "0,1"
|
|
rbitfld.long 0x00 1. "SPMI,Periodic Minutes Service Request Status after masking" "0,1"
|
|
rbitfld.long 0x00 0. "SPSE,Periodic Seconds Service Request Status after masking" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "MSKSR,RTC Service Request Mask Register"
|
|
bitfld.long 0x00 8. "MAI,Alarm Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 6. "MPYE,Periodic Years Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 5. "MPMO,Periodic Months Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 3. "MPDA,Periodic Days Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 2. "MPHO,Periodic Hours Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 1. "MPMI,Periodic Minutes Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 0. "MPSE,Periodic Seconds Interrupt Mask" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CLRSR,RTC Clear Service Request Register"
|
|
bitfld.long 0x00 8. "RAI,Raw Alarm Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 6. "RPYE,Raw Periodic Years Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 5. "RPMO,Raw Periodic Months Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 3. "RPDA,Raw Periodic Days Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 2. "RPHO,Raw Periodic Hours Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 1. "RPMI,Raw Periodic Minutes Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 0. "RPSE,Raw Periodic Seconds Interrupt Clear" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "ATIM0,RTC Alarm Time Register 0"
|
|
bitfld.long 0x00 24.--28. "ADA,Alarm Days Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. "AHO,Alarm Hours Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--13. "AMI,Alarm Minutes Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. "ASE,Alarm Seconds Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "ATIM1,RTC Alarm Time Register 1"
|
|
hexmask.long.word 0x00 16.--31. 1. "AYE,Alarm Year Compare Value"
|
|
bitfld.long 0x00 8.--11. "AMO,Alarm Month Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TIM0,RTC Time Register 0"
|
|
bitfld.long 0x00 24.--28. "DA,Days Time Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. "HO,Hours Time Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--13. "MI,Minutes Time Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. "SE,Seconds Time Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "TIM1,RTC Time Register 1"
|
|
hexmask.long.word 0x00 16.--31. 1. "YE,Year Time Value"
|
|
bitfld.long 0x00 8.--11. "MO,Month Time Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--2. "DAWE,Days of Week Time Value" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "SCU (System Control Unit)"
|
|
tree "COMPARATOR"
|
|
base ad:0x40010500
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ORCCTRL,Out Of Range Comparator Control Register"
|
|
bitfld.long 0x00 23. "CNF7,Out of Range Comparator Flag 7" "0: Falling edge trigger out of range event flag 7,1: Rising edge trigger out of range event flag 7"
|
|
bitfld.long 0x00 22. "CNF6,Out of Range Comparator Flag 6" "0: Falling edge trigger out of range event flag 6,1: Rising edge trigger out of range event flag 6"
|
|
newline
|
|
bitfld.long 0x00 21. "CNF5,Out of Range Comparator Flag 5" "0: Falling edge trigger out of range event flag 5,1: Rising edge trigger out of range event flag 5"
|
|
bitfld.long 0x00 20. "CNF4,Out of Range Comparator Flag 4" "0: Falling edge trigger out of range event flag 4,1: Rising edge trigger out of range event flag 4"
|
|
newline
|
|
bitfld.long 0x00 19. "CNF3,Out of Range Comparator Flag 3" "0: Falling edge trigger out of range event flag 3,1: Rising edge trigger out of range event flag 3"
|
|
bitfld.long 0x00 18. "CNF2,Out of Range Comparator Flag 2" "0: Falling edge trigger out of range event flag 2,1: Rising edge trigger out of range event flag 2"
|
|
newline
|
|
bitfld.long 0x00 17. "CNF1,Out of Range Comparator Flag 1" "0: Falling edge trigger out of range event flag 1,1: Rising edge trigger out of range event flag 1"
|
|
bitfld.long 0x00 16. "CNF0,Out of Range Comparator Flag 0" "0: Falling edge trigger out of range event flag 0,1: Rising edge trigger out of range event flag 0"
|
|
newline
|
|
bitfld.long 0x00 7. "ENORC7,Enable Out of Range Comparator 7" "0: Out of range comparator 7 disabled,1: Out of range comparator 7 enabled"
|
|
bitfld.long 0x00 6. "ENORC6,Enable Out of Range Comparator 6" "0: Out of range comparator 6 disabled,1: Out of range comparator 6 enabled"
|
|
newline
|
|
bitfld.long 0x00 5. "ENORC5,Enable Out of Range Comparator 5" "0: Out of range comparator 5 disabled,1: Out of range comparator 5 enabled"
|
|
bitfld.long 0x00 4. "ENORC4,Enable Out of Range Comparator 4" "0: Out of range comparator 4 disabled,1: Out of range comparator 4 enabled"
|
|
newline
|
|
bitfld.long 0x00 3. "ENORC3,Enable Out of Range Comparator 3" "0: Out of range comparator 3 disabled,1: Out of range comparator 3 enabled"
|
|
bitfld.long 0x00 2. "ENORC2,Enable Out of Range Comparator 2" "0: Out of range comparator 2 disabled,1: Out of range comparator 2 enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "ENORC1,Enable Out of Range Comparator 1" "0: Out of range comparator 1 disabled,1: Out of range comparator 1 enabled"
|
|
bitfld.long 0x00 0. "ENORC0,Enable Out of Range Comparator 0" "0: Out of range comparator 0 disabled,1: Out of range comparator 0 enabled"
|
|
tree.end
|
|
tree "SCU_ANALOG"
|
|
base ad:0x40011000
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "ANATSECTRL,Temperature Sensor Control Register"
|
|
bitfld.word 0x00 0. "TSE_EN,Temperature sensor enable" "0: Temperature sensor is disabled,1: Temperature sensor is switched on"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "ANATSEIH,Temperature Sensor High Temperature Interrupt Register"
|
|
hexmask.word 0x00 0.--15. 1. "TSE_IH,Counter value for high temperature interrupt"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "ANATSEIL,Temperature Sensor Low Temperature Interrupt Register"
|
|
hexmask.word 0x00 0.--15. 1. "TSE_IL,Counter value for low temperature interrupt"
|
|
group.word 0x40++0x01
|
|
line.word 0x00 "ANATSEMON,Temperature Sensor Counter2 Monitor Register"
|
|
hexmask.word 0x00 0.--15. 1. "TSE_MON,Result values loaded by TSE_DONE"
|
|
group.word 0x50++0x01
|
|
line.word 0x00 "ANAVDEL,Voltage Detector Control Register"
|
|
bitfld.word 0x00 4. "VDEL_EN,VDEL unit Enable" "0: VDEL is disabled,1: VDEL is active"
|
|
bitfld.word 0x00 2.--3. "VDEL_TIM_ADJ,VDEL Timing Setting" "0: typ 1us - slowest response time,1: typ 500n,2: typ 250n,3: no delay - fastest response time"
|
|
newline
|
|
bitfld.word 0x00 0.--1. "VDEL_SELECT,VDEL Range Select" "0: value1,1: value2,2: value3,?..."
|
|
group.word 0x6C++0x01
|
|
line.word 0x00 "ANAOFFSET,DCO1 Offset Register"
|
|
hexmask.word.byte 0x00 0.--6. 1. "ADJL_OFFSET,ADJL Offset register"
|
|
group.word 0x8C++0x01
|
|
line.word 0x00 "ANAOSCLPCTRL,OSC_LP Control Register"
|
|
bitfld.word 0x00 0.--1. "MODE,OSC_LP Oscillator Mode" "0: Oscillator is enabled and in operation mode..,1: Oscillator is enabled shaper is bypassed,2: Oscillator is in power down mode,3: Oscillator is in power down mode Pad can be.."
|
|
group.word 0x90++0x01
|
|
line.word 0x00 "ANAOSCHPCTRL,OSC_HP Control Register"
|
|
bitfld.word 0x00 6. "HYSCTRL,Shaper Hystersis Mode" "0: External clock frequency below 20MHz,1: External clock frequency above 20MHz"
|
|
bitfld.word 0x00 4.--5. "MODE,OSC_HP Oscillator Mode" "0: Oscillator Mode with shaper enabled,1: External Clock Input Mode with shaper enabled,2: Oscillator Mode with shaper disabled,3: Oscillator is in power down mode with shaper.."
|
|
newline
|
|
bitfld.word 0x00 2.--3. "GAINSEL,OSC_HP Oscillator Gain Selection" "0: Gain control is configured for frequencies..,1: Gain control is configured for frequencies..,2: Gain control is configured for frequencies..,?..."
|
|
bitfld.word 0x00 1. "SHBY,Shaper Bypass Mode" "0: The shaper is not bypassed,1: The shaper is bypassed"
|
|
group.word 0x78++0x01
|
|
line.word 0x00 "ANASYNC1,DCO1 Sync Control Register 1"
|
|
bitfld.word 0x00 15. "XTAL_SEL,Oscillator Source select" "0: OSC_LP is selected,1: OSC_HP is selected"
|
|
bitfld.word 0x00 14. "SYNC_DCO_EN,DCO1 synchronization feature enable" "0: Disable DCO1 synchronization,1: Enable DCO1 synchronization via external.."
|
|
newline
|
|
hexmask.word 0x00 0.--13. 1. "SYNC_PRELOAD,Counter target value which defines the update cycle"
|
|
group.word 0x7C++0x01
|
|
line.word 0x00 "ANASYNC2,DCO1 Sync Control Register 2"
|
|
rbitfld.word 0x00 12. "SYNC_READY,DCO1 frequency reached its target value" "0: Actual DCO1 frequency is out of targe,1: DCO1 is synchronized to the XTAL frequency"
|
|
hexmask.word 0x00 0.--10. 1. "PRESCALER,Prescaler value"
|
|
tree.end
|
|
tree.end
|
|
tree "SCU_CLK (System Control Unit)"
|
|
base ad:0x40010300
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CLKCR,Clock Control Register"
|
|
rbitfld.long 0x00 31. "VDDC2HIGH,VDDC too high" "0: VDDC is not too high,1: VDDC is too high"
|
|
rbitfld.long 0x00 30. "VDDC2LOW,VDDC too low" "0: VDDC is not too low,1: VDDC is too low"
|
|
newline
|
|
hexmask.long.word 0x00 20.--29. 1. "CNTADJ,Counter Adjustment"
|
|
bitfld.long 0x00 17.--19. "RTCCLKSEL,RTC Clock Select" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 16. "PCLKSEL,PCLK Clock Select" "0: PCLK = MCLK,1: PCLK = 2 x MCLK"
|
|
hexmask.long.byte 0x00 8.--15. 1. "IDIV,Divider Selection"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "FDIV,Fractional Divider Selection FDIV[7:0]"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CLKCR1,Clock Control Register 1"
|
|
bitfld.long 0x00 9. "DCLKSEL,Doubler Clock Source Select" "0: value1,1: External clock via OSC_HP"
|
|
bitfld.long 0x00 8. "ADCCLKSEL,ADC Converter Clock Select" "0: fCONV= 48MHz,1: fCONV= 32MHz"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "FDIV,Fractional Divider Selection FDIV[9:8]" "0,1,2,3"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PWRSVCR,Power Save Control Register"
|
|
bitfld.long 0x00 0. "FPD,Flash Power Down" "0: no effect,1: Flash power down when entering power save mode"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CGATSTAT0,Peripheral 0 Clock Gating Status"
|
|
rbitfld.long 0x00 21. "MCAN0,MultiCAN Gating Status" "0: gating de-asserted,1: gating asserted"
|
|
rbitfld.long 0x00 20. "POSIF1,POSIF1 Gating Status" "0: gating de-asserted,1: gating asserted"
|
|
newline
|
|
rbitfld.long 0x00 18. "USIC1,USIC1 Gating Status" "0: gating de-asserted,1: gating asserted"
|
|
rbitfld.long 0x00 17. "CCU41,CCU41 Gating Status" "0: gating de-asserted,1: gating asserted"
|
|
newline
|
|
rbitfld.long 0x00 16. "CCU81,CCU81 Gating Status" "0: gating de-asserted,1: gating asserted"
|
|
rbitfld.long 0x00 10. "RTC,RTC Gating Status" "0: gating de-asserted,1: gating asserted"
|
|
newline
|
|
rbitfld.long 0x00 9. "WDT,WDT Gating Status" "0: gating de-asserted,1: gating asserted"
|
|
rbitfld.long 0x00 8. "MATH,MATH Gating Status" "0: gating de-asserted,1: gating asserted"
|
|
newline
|
|
rbitfld.long 0x00 7. "POSIF0,POSIF0 Gating Status" "0: gating de-asserted,1: gating asserted"
|
|
rbitfld.long 0x00 4. "DAC0,DAC0 Gating Status" "0: gating de-asserted,1: gating asserted"
|
|
newline
|
|
rbitfld.long 0x00 3. "USIC0,USIC0 Gating Status" "0: gating de-asserted,1: gating asserted"
|
|
rbitfld.long 0x00 2. "CCU40,CCU40 Gating Status" "0: gating de-asserted,1: gating asserted"
|
|
newline
|
|
rbitfld.long 0x00 1. "CCU80,CCU80 Gating Status" "0: gating de-asserted,1: gating asserted"
|
|
rbitfld.long 0x00 0. "ADC,ADC and SHS Gating Status" "0: gating de-asserted,1: gating asserted"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CGATSET0,Peripheral 0 Clock Gating Set"
|
|
bitfld.long 0x00 21. "MCAN0,MutliCAN Gating Set" "0: set no effect,1: enable gating"
|
|
bitfld.long 0x00 20. "POSIF1,POSIF1 Gating Set" "0: set no effect,1: enable gating"
|
|
newline
|
|
bitfld.long 0x00 18. "USIC1,USIC1 Gating Set" "0: set no effect,1: enable gating"
|
|
bitfld.long 0x00 17. "CCU41,CCU41 Gating Set" "0: set no effect,1: enable gating"
|
|
newline
|
|
bitfld.long 0x00 16. "CCU81,CCU81 Gating Set" "0: set no effect,1: enable gating"
|
|
bitfld.long 0x00 10. "RTC,RTC Gating Set" "0: set no effect,1: enable gating"
|
|
newline
|
|
bitfld.long 0x00 9. "WDT,WDT Gating Set" "0: set no effect,1: enable gating"
|
|
bitfld.long 0x00 8. "MATH,MATH Gating Set" "0: set no effect,1: enable gating"
|
|
newline
|
|
bitfld.long 0x00 7. "POSIF0,POSIF0 Gating Set" "0: set no effect,1: enable gating"
|
|
bitfld.long 0x00 4. "DAC0,DAC0 Gating Set" "0: set no effect,1: enable gating"
|
|
newline
|
|
bitfld.long 0x00 3. "USIC0,USIC0 Gating Set" "0: set no effect,1: enable gating"
|
|
bitfld.long 0x00 2. "CCU40,CCU40 Gating Set" "0: set no effect,1: enable gating"
|
|
newline
|
|
bitfld.long 0x00 1. "CCU80,CCU80 Gating Set" "0: set no effect,1: enable gating"
|
|
bitfld.long 0x00 0. "ADC,ADC and SHS Gating Set" "0: set no effect,1: enable gating"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CGATCLR0,Peripheral 0 Clock Gating Clear"
|
|
bitfld.long 0x00 21. "MCAN0,MutliCAN Gating Clear" "0: clear no effect,1: disable gating"
|
|
bitfld.long 0x00 20. "POSIF1,POSIF1 Gating Clear" "0: clear no effect,1: disable gating"
|
|
newline
|
|
bitfld.long 0x00 18. "USIC1,USIC1 Gating Clear" "0: clear no effect,1: disable gating"
|
|
bitfld.long 0x00 17. "CCU41,CCU41 Gating Clear" "0: clear no effect,1: disable gating"
|
|
newline
|
|
bitfld.long 0x00 16. "CCU81,CCU81 Gating Clear" "0: clear no effect,1: disable gating"
|
|
bitfld.long 0x00 10. "RTC,RTC Gating Clear" "0: clear no effect,1: disable gating"
|
|
newline
|
|
bitfld.long 0x00 9. "WDT,WDT Gating Clear" "0: clear no effect,1: disble gating"
|
|
bitfld.long 0x00 8. "MATH,MATH Gating Clear" "0: clear no effect,1: disable gating"
|
|
newline
|
|
bitfld.long 0x00 7. "POSIF0,POSIF0 Gating Clear" "0: clear no effect,1: disable gating"
|
|
bitfld.long 0x00 4. "DAC0,DAC0 Gating Clear" "0: clear no effect,1: disable gating"
|
|
newline
|
|
bitfld.long 0x00 3. "USIC0,USIC0 Gating Clear" "0: clear no effect,1: disable gating"
|
|
bitfld.long 0x00 2. "CCU40,CCU40 Gating Clear" "0: clear no effect,1: disable gating"
|
|
newline
|
|
bitfld.long 0x00 1. "CCU80,CCU80 Gating Clear" "0: clear no effect,1: disble gating"
|
|
bitfld.long 0x00 0. "ADC,ADC and SHS Gating Clear" "0: clear no effect,1: disable gating"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "OSCCSR,Oscillator Control and Status Register"
|
|
bitfld.long 0x00 25. "XOWDEN,XTAL Oscillator Watchdog Enable" "0: The XTAL Oscillator Watchdog is disabled,1: The XTAL Oscillator Watchdog is enabled"
|
|
bitfld.long 0x00 24. "XOWDRES,XTAL Oscillator Watchdog Reset" "0: The Oscillator Watchdog is not cleared and..,1: The Oscillator Watchdog is cleared and.."
|
|
newline
|
|
bitfld.long 0x00 17. "OWDEN,Oscillator Watchdog Enable" "0: The Oscillator Watchdog is disabled,1: The Oscillator Watchdog is enabled"
|
|
bitfld.long 0x00 16. "OWDRES,Oscillator Watchdog Reset" "0: The Oscillator Watchdog is not cleared and..,1: The Oscillator Watchdog is cleared and.."
|
|
newline
|
|
bitfld.long 0x00 8. "DCO1PD,DCO1 Power down" "0: DCO1 is not power down,1: DCO1 power down"
|
|
rbitfld.long 0x00 1. "OSC2H,Oscillator Valid High Status Bit" "0: The OSC frequency is usable,1: The OSC frequency is not usable"
|
|
newline
|
|
rbitfld.long 0x00 0. "OSC2L,Oscillator Valid Low Status Bit" "0: The OSC frequency is usable,1: The OSC frequency is not usable"
|
|
tree.end
|
|
tree "SCU_GENERAL (System Control Unit)"
|
|
base ad:0x40010000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DBGROMID,Debug System ROM ID Register"
|
|
rbitfld.long 0x00 28.--31. "VERSION,Product version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 12.--27. 1. "PARTNO,Part Number"
|
|
newline
|
|
hexmask.long.word 0x00 1.--11. 1. "MANUFID,Manufactory Identity"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "IDCHIP,Chip ID Register"
|
|
hexmask.long 0x00 0.--31. 1. "IDCHIP,CHIP ID"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ID,SCU Module ID Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "MOD_NUMBER,Module Number Value"
|
|
hexmask.long.byte 0x00 8.--15. 1. "MOD_TYPE,Module Type"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "MOD_REV,Module Revision Number"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SSW0,SSW Register 0"
|
|
hexmask.long 0x00 0.--31. 1. "DAT,SSW Data"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PASSWD,Password Register"
|
|
bitfld.long 0x00 3.--7. "PASS,Password Bits" "?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,19: Opens access to writing of all protected bits,?,21: Closes access to writing of all protected bits,?,?,24: Enables writing of the bit field MODE,?..."
|
|
rbitfld.long 0x00 2. "PROTS,Bit Protection Signal Status Bit" "0: Software is able to write to all protected bits,1: Software is unable to write to any of the.."
|
|
newline
|
|
bitfld.long 0x00 0.--1. "MODE,Bit Protection Scheme Control Bits" "0: Scheme disabled - allow access to protected..,?,?,3: Scheme enabled - no access to protected bits"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CCUCON,CCU Control Register"
|
|
bitfld.long 0x00 1. "GSC41,Global Start Control CCU41" "0,1"
|
|
bitfld.long 0x00 0. "GSC40,Global Start Control CCU40" "0,1"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "MIRRSTS,Mirror Update Status Register"
|
|
rbitfld.long 0x00 4. "RTC_TIM1,RTC TIM1 Mirror Register Update Status" "0,1"
|
|
rbitfld.long 0x00 3. "RTC_TIM0,RTC TIM0 Mirror Register Update Status" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 2. "RTC_ATIM1,RTC ATIM1 Mirror Register Update Status" "0,1"
|
|
rbitfld.long 0x00 1. "RTC_ATIM0,RTC ATIM0 Mirror Register Update Status" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 0. "RTC_CTR,RTC CTR Mirror Register Update Status" "0,1"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "PMTSR,Parity Memory Test Select Register"
|
|
bitfld.long 0x00 0. "MTENS,Parity Test Enable Control for 16kbytes SRAM" "0: standard operation,1: generate an inverted parity bit during a.."
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "PFUCR,Prefetch Unit Control Register"
|
|
bitfld.long 0x00 0. "PFUBYP,Prefetch Unit (PFU) Bypass" "0: PFU not bypass,1: PFU bypass"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "INTCR0,Interrupt Control Register 0"
|
|
bitfld.long 0x00 30.--31. "INTSEL15,Interrupt Source Select for Node 15" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
bitfld.long 0x00 28.--29. "INTSEL14,Interrupt Source Select for Node 14" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
newline
|
|
bitfld.long 0x00 26.--27. "INTSEL13,Interrupt Source Select for Node 13" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
bitfld.long 0x00 24.--25. "INTSEL12,Interrupt Source Select for Node 12" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "INTSEL11,Interrupt Source Select for Node 11" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
bitfld.long 0x00 20.--21. "INTSEL10,Interrupt Source Select for Node 10" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "INTSEL9,Interrupt Source Select for Node 9" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
bitfld.long 0x00 16.--17. "INTSEL8,Interrupt Source Select for Node 8" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "INTSEL7,Interrupt Source Select for Node 7" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
bitfld.long 0x00 12.--13. "INTSEL6,Interrupt Source Select for Node 6" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "INTSEL5,Interrupt Source Select for Node 5" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
bitfld.long 0x00 8.--9. "INTSEL4,Interrupt Source Select for Node 4" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "INTSEL3,Interrupt Source Select for Node 3" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
bitfld.long 0x00 4.--5. "INTSEL2,Interrupt Source Select for Node 2" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "INTSEL1,Interrupt Source Select for Node 1" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
bitfld.long 0x00 0.--1. "INTSEL0,Interrupt Source Select for Node 0" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "INTCR1,Interrupt Control Register 1"
|
|
bitfld.long 0x00 30.--31. "INTSEL31,Interrupt Source Select for Node 31" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
bitfld.long 0x00 28.--29. "INTSEL30,Interrupt Source Select for Node 30" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
newline
|
|
bitfld.long 0x00 26.--27. "INTSEL29,Interrupt Source Select for Node 29" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
bitfld.long 0x00 24.--25. "INTSEL28,Interrupt Source Select for Node 28" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "INTSEL27,Interrupt Source Select for Node 27" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
bitfld.long 0x00 20.--21. "INTSEL26,Interrupt Source Select for Node 26" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "INTSEL25,Interrupt Source Select for Node 25" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
bitfld.long 0x00 16.--17. "INTSEL24,Interrupt Source Select for Node 24" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "INTSEL23,Interrupt Source Select for Node 23" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
bitfld.long 0x00 12.--13. "INTSEL22,Interrupt Source Select for Node 22" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "INTSEL21,Interrupt Source Select for Node 21" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
bitfld.long 0x00 8.--9. "INTSEL20,Interrupt Source Select for Node 20" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "INTSEL19,Interrupt Source Select for Node 19" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
bitfld.long 0x00 4.--5. "INTSEL18,Interrupt Source Select for Node 18" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "INTSEL17,Interrupt Source Select for Node 17" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
bitfld.long 0x00 0.--1. "INTSEL16,Interrupt Source Select for Node 16" "0: Select source A,1: Select source B,2: Select source C,3: Select source A or B"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "STSTAT,Startup Status Register"
|
|
rbitfld.long 0x00 0.--1. "HWCON,HW Configuration" "0: User productive mode (UPM),1: ASC BSL,2: Alternate Boot Mode (ABM),3: CAN BSL"
|
|
tree.end
|
|
tree "SCU_INTERRUPT (System Control Unit)"
|
|
base ad:0x40010038
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SRRAW,SCU Raw Service Request Status"
|
|
rbitfld.long 0x00 31. "TSE_LOW,DTS Compare Low Temperature Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 30. "TSE_HIGH,DTS Compare High Temperature Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 29. "TSE_DONE,DTS Measurement Done Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 28. "RTC_TIM1,RTC TIM1 Mirror Register Update Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 27. "RTC_TIM0,RTC TIM0 Mirror Register Update Before Masking" "0,1"
|
|
rbitfld.long 0x00 26. "RTC_ATIM1,RTC ATIM1 Mirror Register Update Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 25. "RTC_ATIM0,RTC ATIM0 Mirror Register Update Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 24. "RTC_CTR,RTC CTR Mirror Register Update Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 22. "SBYCLKFI,Standby Clock Failure Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 21. "VCLIPI,VCLIP Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 20. "FLCMPLTI,Flash Operation Complete Event Status Before Masking" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 19. "FLECC2I,Flash Double Bit ECC Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 18. "PEU0I,USIC0 SRAM Parity Error Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 17. "PESRAMI,16kbytes SRAM Parity Error Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 16. "LOCI,Loss of DCO1 Clock Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 15. "ORC7I,Out of Range Comparator 7 Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 14. "ORC6I,Out of Range Comparator 6 Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 13. "ORC5I,Out of Range Comparator 5 Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 12. "ORC4I,Out of Range Comparator 4 Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 11. "ORC3I,Out of Range Comparator 3 Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 10. "ORC2I,Out of Range Comparator 2 Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 9. "ORC1I,Out of Range Comparator 1 Event Status Before Masking" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 8. "ORC0I,Out of Range Comparator 0 Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 7. "VDROPI,VDROP Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 6. "ACMP2I,Analog Comparator 2 Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 5. "ACMP1I,Analog Comparator 1 Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 4. "ACMP0I,Analog Comparator 0 Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 3. "VDDPI,VDDP pre-warning Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 2. "AI,RTC Raw Alarm Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 1. "PI,RTC Raw Periodic Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 0. "PRWARN,WDT pre-warning Event Status Before Masking" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SRMSK,SCU Service Request Mask"
|
|
bitfld.long 0x00 31. "TSE_LOW,DTS Compare Low Temperature Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 30. "TSE_HIGH,DTS Compare High Temperature Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 29. "TSE_DONE,DTS Measurement Done Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 28. "RTC_TIM1,RTC TIM1 Mirror Register Update Mask" "0,1"
|
|
bitfld.long 0x00 27. "RTC_TIM0,RTC TIM0 Mirror Register Update Mask" "0,1"
|
|
bitfld.long 0x00 26. "RTC_ATIM1,RTC ATIM1 Mirror Register Update Mask" "0,1"
|
|
bitfld.long 0x00 25. "RTC_ATIM0,RTC ATIM0 Mirror Register Update Mask" "0,1"
|
|
bitfld.long 0x00 24. "RTC_CTR,RTC CTR Mirror Register Update Mask" "0,1"
|
|
bitfld.long 0x00 22. "SBYCLKFI,Standby Clock Failure Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 21. "VCLIPI,VCLIP Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 19. "FLECC2I,Flash Double Bit ECC Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "PEU0I,USIC0 SRAM Parity Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 17. "PESRAMI,16kbytes SRAM Parity Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 16. "LOCI,Loss of DCO1 Clock Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 15. "ORC7I,Out of Range Comparator 7 Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 14. "ORC6I,Out of Range Comparator 6 Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 13. "ORC5I,Out of Range Comparator 5 Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 12. "ORC4I,Out of Range Comparator 4 Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 11. "ORC3I,Out of Range Comparator 3 Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 10. "ORC2I,Out of Range Comparator 2 Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 9. "ORC1I,Out of Range Comparator 1 Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 8. "ORC0I,Out of Range Comparator 0 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "VDROPI,VDROP Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 6. "ACMP2I,Analog Comparator 2 Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 5. "ACMP1I,Analog Comparator 1 Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 4. "ACMP0I,Analog Comparator 0 Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 3. "VDDPI,VDDP pre-warning Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 0. "PRWARN,WDT pre-warning Interrupt Mask" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SRCLR,SCU Service Request Clear"
|
|
bitfld.long 0x00 31. "TSE_LOW,DTS Compare Low Temperature Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 30. "TSE_HIGH,DTS Compare High Temperature Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 29. "TSE_DONE,DTS Measurement Done Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 28. "RTC_TIM1,RTC TIM1 Mirror Register Update Clear" "0,1"
|
|
bitfld.long 0x00 27. "RTC_TIM0,RTC TIM0 Mirror Register Update Clear" "0,1"
|
|
bitfld.long 0x00 26. "RTC_ATIM1,RTC ATIM1 Mirror Register Update Clear" "0,1"
|
|
bitfld.long 0x00 25. "RTC_ATIM0,RTC ATIM0 Mirror Register Update Clear" "0,1"
|
|
bitfld.long 0x00 24. "RTC_CTR,RTC CTR Mirror Register Update Clear" "0,1"
|
|
bitfld.long 0x00 22. "SBYCLKFI,Standby Clock Failure Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 21. "VCLIPI,VCLIP Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 20. "FLCMPLTI,Flash Operation Complete Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "FLECC2I,Flash Double Bit ECC Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 18. "PEU0I,USIC0 SRAM Parity Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 17. "PESRAMI,16kbytes SRAM Parity Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 16. "LOCI,Loss of DCO1 Clock Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 15. "ORC7I,Out of Range Comparator 7 Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 14. "ORC6I,Out of Range Comparator 6 Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 13. "ORC5I,Out of Range Comparator 5 Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 12. "ORC4I,Out of Range Comparator 4 Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 11. "ORC3I,Out of Range Comparator 3 Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 10. "ORC2I,Out of Range Comparator 2 Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 9. "ORC1I,Out of Range Comparator 1 Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "ORC0I,Out of Range Comparator 0 Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 7. "VDROPI,VDROP Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 6. "ACMP2I,Analog Comparator 2 Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 5. "ACMP1I,Analog Comparator 1 Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 4. "ACMP0I,Analog Comparator 0 Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 3. "VDDPI,VDDP pre-warning Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 2. "AI,RTC Alarm Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 1. "PI,RTC Periodic Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 0. "PRWARN,WDT pre-warning Interrupt Clear" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SRSET,SCU Service Request Set"
|
|
bitfld.long 0x00 31. "TSE_LOW,DTS Compare Low Temperature Interrupt Set" "0,1"
|
|
bitfld.long 0x00 30. "TSE_HIGH,DTS Compare High Temperature Interrupt Set" "0,1"
|
|
bitfld.long 0x00 29. "TSE_DONE,DTS Measurement Done Interrupt Set" "0,1"
|
|
bitfld.long 0x00 28. "RTC_TIM1,RTC TIM1 Mirror Register Update Set" "0,1"
|
|
bitfld.long 0x00 27. "RTC_TIM0,RTC TIM0 Mirror Register Update Set" "0,1"
|
|
bitfld.long 0x00 26. "RTC_ATIM1,RTC ATIM1 Mirror Register Update Set" "0,1"
|
|
bitfld.long 0x00 25. "RTC_ATIM0,RTC ATIM0 Mirror Register Update Set" "0,1"
|
|
bitfld.long 0x00 24. "RTC_CTR,RTC CTR Mirror Register Update Set" "0,1"
|
|
bitfld.long 0x00 22. "SBYCLKFI,Standby Clock Failure Interrupt Set" "0,1"
|
|
bitfld.long 0x00 21. "VCLIPI,VCLIP Interrupt Set" "0,1"
|
|
bitfld.long 0x00 20. "FLCMPLTI,Flash Operation Complete Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "FLECC2I,Flash Double Bit ECC Interrupt Set" "0,1"
|
|
bitfld.long 0x00 18. "PEU0I,USIC0 SRAM Parity Error Interrupt Set" "0,1"
|
|
bitfld.long 0x00 17. "PESRAMI,16kbytes SRAM Parity Error Interrupt Set" "0,1"
|
|
bitfld.long 0x00 16. "LOCI,Loss of DCO1 Clock Interrupt Set" "0,1"
|
|
bitfld.long 0x00 15. "ORC7I,Out of Range Comparator 7 Interrupt Set" "0,1"
|
|
bitfld.long 0x00 14. "ORC6I,Out of Range Comparator 6 Interrupt Set" "0,1"
|
|
bitfld.long 0x00 13. "ORC5I,Out of Range Comparator 5 Interrupt Set" "0,1"
|
|
bitfld.long 0x00 12. "ORC4I,Out of Range Comparator 4 Interrupt Set" "0,1"
|
|
bitfld.long 0x00 11. "ORC3I,Out of Range Comparator 3 Interrupt Set" "0,1"
|
|
bitfld.long 0x00 10. "ORC2I,Out of Range Comparator 2 Interrupt Set" "0,1"
|
|
bitfld.long 0x00 9. "ORC1I,Out of Range Comparator 1 Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "ORC0I,Out of Range Comparator 0 Interrupt Set" "0,1"
|
|
bitfld.long 0x00 7. "VDROPI,VDROP Interrupt Set" "0,1"
|
|
bitfld.long 0x00 6. "ACMP2I,Analog Comparator 2 Interrupt Set" "0,1"
|
|
bitfld.long 0x00 5. "ACMP1I,Analog Comparator 1 Interrupt Set" "0,1"
|
|
bitfld.long 0x00 4. "ACMP0I,Analog Comparator 0 Interrupt Set" "0,1"
|
|
bitfld.long 0x00 3. "VDDPI,VDDP pre-warning Interrupt Set" "0,1"
|
|
bitfld.long 0x00 2. "AI,RTC Alarm Interrupt Set" "0,1"
|
|
bitfld.long 0x00 1. "PI,RTC Periodic Interrupt Set" "0,1"
|
|
bitfld.long 0x00 0. "PRWARN,WDT pre-warning Interrupt Set" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SRRAW1,SCU Raw Service Request Status 1"
|
|
rbitfld.long 0x00 4. "DCO1OFSI,DCO1 Out of SYNC Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 3. "PEMCI,MultiCAN SRAM Parity Error Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 2. "PEU1I,USIC1 SRAM Parity Error Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 1. "LOECI,Loss of External OSC_HP Clock Event Status Before Masking" "0,1"
|
|
rbitfld.long 0x00 0. "ACMP3I,Analog Comparator 3 Event Status Before Masking" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "SRMSK1,SCU Service Request Mask 1"
|
|
bitfld.long 0x00 4. "DCO1OFSI,DCO1 Out of SYNC Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 3. "PEMCI,MultiCAN SRAM Parity Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 2. "PEU1I,USIC1 SRAM Parity Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 1. "LOECI,Loss of External OSC_HP Clock Interrupt Mask" "0,1"
|
|
bitfld.long 0x00 0. "ACMP3I,Analog Comparator 3 Interrupt Mask" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "SRCLR1,SCU Service Request Clear 1"
|
|
bitfld.long 0x00 4. "DCO1OFSI,DCO1 Out of SYNC Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 3. "PEMCI,MultiCAN SRAM Parity Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 2. "PEU1I,USIC1 SRAM Parity Error Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 1. "LOECI,Loss of External OSC_HP Clock Interrupt Clear" "0,1"
|
|
bitfld.long 0x00 0. "ACMP3I,Analog Comparator 3 Interrupt Clear" "0,1"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "SRSET1,SCU Service Request Set 1"
|
|
bitfld.long 0x00 4. "DCO1OFSI,DCO1 Out of SYNC Interrupt Set" "0,1"
|
|
bitfld.long 0x00 3. "PEMCI,MultiCAN SRAM Parity Error Interrupt Set" "0,1"
|
|
bitfld.long 0x00 2. "PEU1I,USIC1 SRAM Parity Error Interrupt Set" "0,1"
|
|
bitfld.long 0x00 1. "LOECI,Loss of External OSC_HP Clock Interrupt Set" "0,1"
|
|
bitfld.long 0x00 0. "ACMP3I,Analog Comparator 3 Interrupt Set" "0,1"
|
|
tree.end
|
|
tree "SCU_POWER (System Control Unit)"
|
|
base ad:0x40010200
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "VDESR,Voltage Detector Status Register"
|
|
rbitfld.long 0x00 1. "VDDPPW,VDDPPW Indication" "0: VDDP is above pre-warning threshold,1: VDDP is below pre-warningthreshold"
|
|
rbitfld.long 0x00 0. "VCLIP,VCLIP Indication" "0: VCLIP is not active,1: VCLIP is active"
|
|
tree.end
|
|
tree "SCU_RESET (System Control Unit)"
|
|
base ad:0x40010400
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "RSTSTAT,RCU Reset Status"
|
|
rbitfld.long 0x00 10. "LCKEN,Enable Lockup Status" "0: Reset by Lockup disabled,1: Reset by Lockup enabled"
|
|
hexmask.long.word 0x00 0.--9. 1. "RSTSTAT,Reset Status Information"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "RSTSET,RCU Reset Set Register"
|
|
bitfld.long 0x00 10. "LCKEN,Enable Lockup Reset" "0: set no effect,1: Enable reset when Lockup gets asserted"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RSTCLR,RCU Reset Clear Register"
|
|
bitfld.long 0x00 10. "LCKEN,Enable Lockup Reset" "0: Clear no effect,1: Disable reset when Lockup gets asserted"
|
|
bitfld.long 0x00 0. "RSCLR,Clear Reset Status" "0: Clear no effect,1: Clears field RSTSTAT.RSTSTAT"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "RSTCON,RCU Reset Control Register"
|
|
bitfld.long 0x00 16. "MRSTEN,Enable Master Reset" "0: No Master reset,1: Triggered Master reset"
|
|
bitfld.long 0x00 6. "LOECRSTEN,Enable Loss of External Clock Reset" "0: No reset when loss of external clock occur,1: Reset when loss of external clock occur"
|
|
newline
|
|
bitfld.long 0x00 5. "MPERSTEN,Enable MultiCAN+SRAM Parity Error Reset" "0: No reset when MultiCAN+ memory parity error..,1: Reset when MultiCAN+ memory parity error occur"
|
|
bitfld.long 0x00 4. "U1PERSTEN,Enable USIC01 SRAM Parity Error Reset" "0: No reset when USIC1 memory parity error occur,1: Reset when USIC1 memory parity error occur"
|
|
newline
|
|
bitfld.long 0x00 3. "U0PERSTEN,Enable USIC0 SRAM Parity Error Reset" "0: No reset when USIC0 memory parity error occur,1: Reset when USIC0 memory parity error occur"
|
|
bitfld.long 0x00 2. "SPERSTEN,Enable 16kbytes SRAM Parity Error Reset" "0: No reset when SRAM parity error occur,1: Reset when SRAM parity error occur"
|
|
newline
|
|
bitfld.long 0x00 1. "LOCRSTEN,Enable Loss of DCO1 Clock Reset" "0: No reset when loss of DCO1 clock occur,1: Reset when loss of DCO1 clock occur"
|
|
bitfld.long 0x00 0. "ECCRSTEN,Enable ECC Error Reset" "0: No reset when ECC double bit error occur,1: Reset when ECC double bit error occur"
|
|
tree.end
|
|
tree "SHS (Sample and Hold ADC Sequencer)"
|
|
base ad:0x48034000
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ID,Module Identification Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "MOD_NUMBER,Module Number"
|
|
hexmask.long.byte 0x00 8.--15. 1. "MOD_TYPE,Module Type"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "MOD_REV,Module Revision"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CFG,Configuration Register"
|
|
rbitfld.long 0x00 28.--31. "STATE,Current State of Sequencer" "0: value1,1: Offset calibration active,2: Gain calibration active,3: Startup calibration active,?,?,?,?,8: Stepper process active,?..."
|
|
rbitfld.long 0x00 16. "SP,Sample Pending" "0: No sample pending,1: Sample pending"
|
|
newline
|
|
bitfld.long 0x00 15. "SCWC,Write Control for SHS Configuration" "0: No write access to SHS configuration,1: Bitfields ANOFF AREF DIVS can be written"
|
|
rbitfld.long 0x00 14. "ANRDY,Analog Converter Ready" "0: Converter is in power-down mode,1: Converter is operable"
|
|
newline
|
|
bitfld.long 0x00 12. "ANOFF,Analog Converter Power Down Force" "0: Converter controlled by bitfields ANONS..,1: Converter is permanently off"
|
|
bitfld.long 0x00 10.--11. "AREF,Analog Calbration Reference Voltage Selection" "0: External reference upper supply range,?,2: Internal reference upper supply range,3: Internal reference lower supply range"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "DIVS,Divider Factor for the SHS Clock" "0: fSH = fCONV / 1,1: fSH = fCONV / 2,?,?,?,?,?,7: fSH = fCONV / 8,?..."
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "GNCTR,Gain Control Register"
|
|
bitfld.long 0x00 28.--31. "GAIN7,Gain Control 7" "0: Gain factor = 1,1: Gain factor = 3,2: Gain factor = 6,3: Gain factor = 12,?..."
|
|
bitfld.long 0x00 24.--27. "GAIN6,Gain Control 6" "0: Gain factor = 1,1: Gain factor = 3,2: Gain factor = 6,3: Gain factor = 12,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--23. "GAIN5,Gain Control 5" "0: Gain factor = 1,1: Gain factor = 3,2: Gain factor = 6,3: Gain factor = 12,?..."
|
|
bitfld.long 0x00 16.--19. "GAIN4,Gain Control 4" "0: Gain factor = 1,1: Gain factor = 3,2: Gain factor = 6,3: Gain factor = 12,?..."
|
|
newline
|
|
bitfld.long 0x00 12.--15. "GAIN3,Gain Control 3" "0: Gain factor = 1,1: Gain factor = 3,2: Gain factor = 6,3: Gain factor = 12,?..."
|
|
bitfld.long 0x00 8.--11. "GAIN2,Gain Control 2" "0: Gain factor = 1,1: Gain factor = 3,2: Gain factor = 6,3: Gain factor = 12,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "GAIN1,Gain Control 1" "0: Gain factor = 1,1: Gain factor = 3,2: Gain factor = 6,3: Gain factor = 12,?..."
|
|
bitfld.long 0x00 0.--3. "GAIN0,Gain Control 0" "0: Gain factor = 1,1: Gain factor = 3,2: Gain factor = 6,3: Gain factor = 12,?..."
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "LOOP,SD Loop Control Register"
|
|
bitfld.long 0x00 31. "LPEN1,Loop 1 Enable" "0: Off,1: ON"
|
|
bitfld.long 0x00 16.--20. "LPCH1,Loop 1 Channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 15. "LPEN0,Loop 0 Enable" "0: Off,1: ON"
|
|
bitfld.long 0x00 0.--4. "LPCH0,Loop 0 Channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.end
|
|
tree "USIC (Universal Serial Interface Controller 0)"
|
|
tree "USIC0"
|
|
base ad:0x48000008
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ID,Module Identification Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "MOD_NUMBER,Module Number Value"
|
|
hexmask.long.byte 0x00 8.--15. 1. "MOD_TYPE,Module Type"
|
|
hexmask.long.byte 0x00 0.--7. 1. "MOD_REV,Module Revision Number"
|
|
tree.end
|
|
repeat 2. (list 0. 1.) (list ad:0x48000000 ad:0x48000200)
|
|
tree "USIC0_CH$1"
|
|
base $2
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CCFG,Channel Configuration Register"
|
|
rbitfld.long 0x00 7. "TB,Transmit FIFO Buffer Available" "0: A transmit FIFO buffer is not available,1: A transmit FIFO buffer is available"
|
|
rbitfld.long 0x00 6. "RB,Receive FIFO Buffer Available" "0: A receive FIFO buffer is not available,1: A receive FIFO buffer is available"
|
|
newline
|
|
rbitfld.long 0x00 3. "IIS,IIS Protocol Available" "0: The IIS protocol is not available,1: The IIS protocol is available"
|
|
rbitfld.long 0x00 2. "IIC,IIC Protocol Available" "0: The IIC protocol is not available,1: The IIC protocol is available"
|
|
newline
|
|
rbitfld.long 0x00 1. "ASC,ASC Protocol Available" "0: The ASC protocol is not available,1: The ASC protocol is available"
|
|
rbitfld.long 0x00 0. "SSC,SSC Protocol Available" "0: The SSC protocol is not available,1: The SSC protocol is available"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "KSCFG,Kernel State Configuration Register"
|
|
bitfld.long 0x00 11. "BPSUM,Bit Protection for SUMCFG" "0: SUMCFG is not changed,1: SUMCFG is updated with the written value"
|
|
bitfld.long 0x00 8.--9. "SUMCFG,Suspend Mode Configuration" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 7. "BPNOM,Bit Protection for NOMCFG" "0: NOMCFG is not changed,1: NOMCFG is updated with the written value"
|
|
bitfld.long 0x00 4.--5. "NOMCFG,Normal Operation Mode Configuration" "0: Run mode 0 is selected,1: Run mode 1 is selected,2: Stop mode 0 is selected,3: Stop mode 1 is selected"
|
|
newline
|
|
bitfld.long 0x00 1. "BPMODEN,Bit Protection for MODEN" "0: MODEN is not changed,1: MODEN is updated with the written value"
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|
bitfld.long 0x00 0. "MODEN,Module Enable" "0: The module is switched off immediately,1: The module is switched on"
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|
group.long 0x10++0x03
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|
line.long 0x00 "FDR,Fractional Divider Register"
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|
hexmask.long.word 0x00 16.--25. 1. "RESULT,Result Value"
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|
bitfld.long 0x00 14.--15. "DM,Divider Mode" "0: DM0 The divider is switched off fFD = 0,1: DM1 Normal divider mode selected,2: DM2 Fractional divider mode selected,3: DM3 The divider is switched off fFD = 0"
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hexmask.long.word 0x00 0.--9. 1. "STEP,Step Value"
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group.long 0x14++0x03
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|
line.long 0x00 "BRG,Baud Rate Generator Register"
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|
bitfld.long 0x00 30.--31. "SCLKCFG,Shift Clock Output Configuration" "0: The passive level is 0 and the delay is..,1: The passive level is 1 and the delay is..,2: The passive level is 0 and the delay is enabled,3: The passive level is 1 and the delay is enabled"
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bitfld.long 0x00 29. "MCLKCFG,Master Clock Configuration" "0: The passive level is 0,1: The passive level is 1"
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bitfld.long 0x00 28. "SCLKOSEL,Shift Clock Output Select" "0: SCLK from the baud rate generator is selected..,1: The transmit shift clock from DX1 input stage.."
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hexmask.long.word 0x00 16.--25. 1. "PDIV,Divider Mode: Divider Factor to Generate fPDIV"
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bitfld.long 0x00 10.--14. "DCTQ,Denominator for Time Quanta Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 8.--9. "PCTQ,Pre-Divider for Time Quanta Counter" "0,1,2,3"
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bitfld.long 0x00 6.--7. "CTQSEL,Input Selection for CTQ" "0: fCTQIN = fPDIV,1: fCTQIN = fPPP,2: fCTQIN = fSCLK,3: fCTQIN = fMCLK"
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bitfld.long 0x00 4. "PPPEN,Enable 2:1 Divider for fPPP" "0: The 2:1 divider for fPPP is disabled,1: The 2:1 divider for fPPP is enabled"
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bitfld.long 0x00 3. "TMEN,Timing Measurement Enable" "0: Timing measurement is disabled,1: Timing measurement is enabled"
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bitfld.long 0x00 0.--1. "CLKSEL,Clock Selection" "0: The fractional divider frequency fFD is..,?,2: The trigger signal DX1T defines fPIN,3: Signal MCLK corresponds to the DX1S signal.."
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group.long 0x18++0x03
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line.long 0x00 "INPR,Interrupt Node Pointer Register"
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bitfld.long 0x00 16.--18. "PINP,Protocol Interrupt Node Pointer" "0: Output SR0 becomes activated,1: Output SR1 becomes activated,2: Output SR2 becomes activated,3: Output SR3 becomes activated,4: Output SR4 becomes activated,5: Output SR5 becomes activated,?..."
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bitfld.long 0x00 12.--14. "AINP,Alternative Receive Interrupt Node Pointer" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 8.--10. "RINP,Receive Interrupt Node Pointer" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 4.--6. "TBINP,Transmit Buffer Interrupt Node Pointer" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 0.--2. "TSINP,Transmit Shift Interrupt Node Pointer" "0: Output SR0 becomes activated,1: Output SR1 becomes activated,2: Output SR2 becomes activated,3: Output SR3 becomes activated,4: Output SR4 becomes activated,5: Output SR5 becomes activated,?..."
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group.long 0x1C++0x03
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line.long 0x00 "DX0CR,Input Control Register 0"
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rbitfld.long 0x00 15. "DXS,Synchronized Data Value" "0: The current value of DX0S is 0,1: The current value of DX0S is 1"
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bitfld.long 0x00 10.--11. "CM,Combination Mode" "0: The DX0 trigger activation is disabled,1: A rising edge activates DX0T,2: A falling edge activates DX0T,3: Both edges activate DX0T"
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bitfld.long 0x00 9. "SFSEL,Sampling Frequency Selection" "0: The DX0 sampling frequency is fPERIPH,1: The DX0 sampling frequency is fFD"
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bitfld.long 0x00 8. "DPOL,Data Polarity for DXn" "0: The DX0 input signal is not inverted,1: The DX0 input signal is inverted"
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bitfld.long 0x00 6. "DSEN,Data Synchronization Enable" "0: The un-synchronized signal can be taken as..,1: The synchronized signal can be taken as DX0.."
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bitfld.long 0x00 5. "DFEN,Digital Filter Enable" "0: The DX0 input signal is not digitally filtered,1: The DX0 input signal is digitally filtered"
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bitfld.long 0x00 4. "INSW,Input Switch" "0: DX0 input of the data shift unit is..,1: DX0 input of the data shift unit is connected.."
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bitfld.long 0x00 0.--2. "DSEL,Data Selection for Input Signal" "0: The data input DX0A is selected,1: The data input DX0B is selected,2: The data input DX0C is selected,3: The data input DX0D is selected,4: The data input DX0E is selected,5: The data input DX0F is selected,6: The data input DX0G is selected,7: The data input of DX0 is always 1"
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group.long 0x20++0x03
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line.long 0x00 "DX1CR,Input Control Register 1"
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rbitfld.long 0x00 15. "DXS,Synchronized Data Value" "0: The current value of DX1S is 0,1: The current value of DX1S is 1"
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bitfld.long 0x00 10.--11. "CM,Combination Mode" "0: The DX1 trigger activation is disabled,1: A rising edge activates DX1T,2: A falling edge activates DX1T,3: Both edges activate DX1T"
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bitfld.long 0x00 9. "SFSEL,Sampling Frequency Selection" "0: The DX1 sampling frequency is fPERIPH,1: The DX1 sampling frequency is fFD"
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bitfld.long 0x00 8. "DPOL,Data Polarity for DXn" "0: The DX1 input signal is not inverted,1: The DX1 input signal is inverted"
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bitfld.long 0x00 6. "DSEN,Data Synchronization Enable" "0: The un-synchronized signal can be taken as..,1: The synchronized signal can be taken as DX1.."
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bitfld.long 0x00 5. "DFEN,Digital Filter Enable" "0: The DX1 input signal is not digitally filtered,1: The DX1 input signal is digitally filtered"
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bitfld.long 0x00 4. "INSW,Input Switch" "0: DX1 input of the data shift unit is..,1: DX1 input of the data shift unit is connected.."
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bitfld.long 0x00 3. "DCEN,Delay Compensation Enable" "0: The receive shift clock is dependent on INSW..,1: The receive shift clock is connected to the.."
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bitfld.long 0x00 0.--2. "DSEL,Data Selection for Input Signal" "0: The data input DX1A is selected,1: The data input DX1B is selected,2: The data input DX1C is selected,3: The data input DX1D is selected,4: The data input DX1E is selected,5: The data input DX1F is selected,6: The data input DX1G is selected,7: The data input of DX1 is always 1"
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group.long 0x24++0x03
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line.long 0x00 "DX2CR,Input Control Register 2"
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|
rbitfld.long 0x00 15. "DXS,Synchronized Data Value" "0: The current value of DX2S is 0,1: The current value of DX2S is 1"
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bitfld.long 0x00 10.--11. "CM,Combination Mode" "0: The DX2 trigger activation is disabled,1: A rising edge activates DX2T,2: A falling edge activates DX2T,3: Both edges activate DX2T"
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bitfld.long 0x00 9. "SFSEL,Sampling Frequency Selection" "0: The DX2 sampling frequency is fPERIPH,1: The DX2 sampling frequency is fFD"
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bitfld.long 0x00 8. "DPOL,Data Polarity for DXn" "0: The DX2 input signal is not inverted,1: The DX2 input signal is inverted"
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|
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bitfld.long 0x00 6. "DSEN,Data Synchronization Enable" "0: The un-synchronized signal can be taken as..,1: The synchronized signal can be taken as DX2.."
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bitfld.long 0x00 5. "DFEN,Digital Filter Enable" "0: The DX2 input signal is not digitally filtered,1: The DX2 input signal is digitally filtered"
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bitfld.long 0x00 4. "INSW,Input Switch" "0: DX2 input of the data shift unit is..,1: DX2 input of the data shift unit is connected.."
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bitfld.long 0x00 0.--2. "DSEL,Data Selection for Input Signal" "0: The data input DX2A is selected,1: The data input DX2B is selected,2: The data input DX2C is selected,3: The data input DX2D is selected,4: The data input DX2E is selected,5: The data input DX2F is selected,6: The data input DX2G is selected,7: The data input of DX2 is always 1"
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group.long 0x28++0x03
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line.long 0x00 "DX3CR,Input Control Register 3"
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|
rbitfld.long 0x00 15. "DXS,Synchronized Data Value" "0: The current value of DX3S is 0,1: The current value of DX3S is 1"
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bitfld.long 0x00 10.--11. "CM,Combination Mode" "0: The DX3 trigger activation is disabled,1: A rising edge activates DX3T,2: A falling edge activates DX3T,3: Both edges activate DX3T"
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bitfld.long 0x00 9. "SFSEL,Sampling Frequency Selection" "0: The DX3 sampling frequency is fPERIPH,1: The DX3 sampling frequency is fFD"
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bitfld.long 0x00 8. "DPOL,Data Polarity for DXn" "0: The DX3 input signal is not inverted,1: The DX3 input signal is inverted"
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bitfld.long 0x00 6. "DSEN,Data Synchronization Enable" "0: The un-synchronized signal can be taken as..,1: The synchronized signal can be taken as DX3.."
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bitfld.long 0x00 5. "DFEN,Digital Filter Enable" "0: The DX3 input signal is not digitally filtered,1: The DX3 input signal is digitally filtered"
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bitfld.long 0x00 4. "INSW,Input Switch" "0: DX3 input of the data shift unit is..,1: DX3 input of the data shift unit is connected.."
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bitfld.long 0x00 0.--2. "DSEL,Data Selection for Input Signal" "0: The data input DX3A is selected,1: The data input DX3B is selected,2: The data input DX3C is selected,3: The data input DX3D is selected,4: The data input DX3E is selected,5: The data input DX3F is selected,6: The data input DX3G is selected,7: The data input of DX3 is always 1"
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group.long 0x2C++0x03
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line.long 0x00 "DX4CR,Input Control Register 4"
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rbitfld.long 0x00 15. "DXS,Synchronized Data Value" "0: The current value of DX4S is 0,1: The current value of DX4S is 1"
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bitfld.long 0x00 10.--11. "CM,Combination Mode" "0: The DX4 trigger activation is disabled,1: A rising edge activates DX4T,2: A falling edge activates DX4T,3: Both edges activate DX4T"
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bitfld.long 0x00 9. "SFSEL,Sampling Frequency Selection" "0: The DX4 sampling frequency is fPERIPH,1: The DX4 sampling frequency is fFD"
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bitfld.long 0x00 8. "DPOL,Data Polarity for DXn" "0: The DX4 input signal is not inverted,1: The DX4 input signal is inverted"
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bitfld.long 0x00 6. "DSEN,Data Synchronization Enable" "0: The un-synchronized signal can be taken as..,1: The synchronized signal can be taken as DX4.."
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bitfld.long 0x00 5. "DFEN,Digital Filter Enable" "0: The DX4 input signal is not digitally filtered,1: The DX4 input signal is digitally filtered"
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bitfld.long 0x00 4. "INSW,Input Switch" "0: DX4 input of the data shift unit is..,1: DX4 input of the data shift unit is connected.."
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bitfld.long 0x00 0.--2. "DSEL,Data Selection for Input Signal" "0: The data input DX4A is selected,1: The data input DX4B is selected,2: The data input DX4C is selected,3: The data input DX4D is selected,4: The data input DX4E is selected,5: The data input DX4F is selected,6: The data input DX4G is selected,7: The data input of DX4 is always 1"
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group.long 0x30++0x03
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line.long 0x00 "DX5CR,Input Control Register 5"
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rbitfld.long 0x00 15. "DXS,Synchronized Data Value" "0: The current value of DX5S is 0,1: The current value of DX5S is 1"
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bitfld.long 0x00 10.--11. "CM,Combination Mode" "0: The DX5 trigger activation is disabled,1: A rising edge activates DX5T,2: A falling edge activates DX5T,3: Both edges activate DX5T"
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bitfld.long 0x00 9. "SFSEL,Sampling Frequency Selection" "0: The DX5 sampling frequency is fPERIPH,1: The DX5 sampling frequency is fFD"
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bitfld.long 0x00 8. "DPOL,Data Polarity for DXn" "0: The DX5 input signal is not inverted,1: The DX5 input signal is inverted"
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|
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bitfld.long 0x00 6. "DSEN,Data Synchronization Enable" "0: The un-synchronized signal can be taken as..,1: The synchronized signal can be taken as DX5.."
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bitfld.long 0x00 5. "DFEN,Digital Filter Enable" "0: The DX5 input signal is not digitally filtered,1: The DX5 input signal is digitally filtered"
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bitfld.long 0x00 4. "INSW,Input Switch" "0: DX5 input of the data shift unit is..,1: DX5 input of the data shift unit is connected.."
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bitfld.long 0x00 0.--2. "DSEL,Data Selection for Input Signal" "0: The data input DX5A is selected,1: The data input DX5B is selected,2: The data input DX5C is selected,3: The data input DX5D is selected,4: The data input DX5E is selected,5: The data input DX5F is selected,6: The data input DX5G is selected,7: The data input of DX5 is always 1"
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group.long 0x34++0x03
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line.long 0x00 "SCTR,Shift Control Register"
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bitfld.long 0x00 24.--27. "WLE,Word Length" "0: The data word contains 1 data bit located at..,1: The data word contains 2 data bits located at..,?,?,?,?,?,?,?,?,?,?,?,?,14: The data word contains 15 data bits located..,15: The data word contains 16 data bits located.."
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bitfld.long 0x00 16.--21. "FLE,Frame Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 8.--9. "TRM,Transmission Mode" "0: The shift control signal is inactive,1: The shift control signal is active at 1-level,2: The shift control signal is active at 0-level,3: The shift control signal is always active"
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bitfld.long 0x00 6.--7. "DOCFG,Data Output Configuration" "0: DOUTx = shift data value,1: DOUTx = inverted shift data value,?..."
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bitfld.long 0x00 4. "HPCDIR,Port Control Direction" "0: The pin(s) with hardware pin control enabled..,1: The pin(s) with hardware pin control enabled.."
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bitfld.long 0x00 2.--3. "DSM,Data Shift Mode" "0: Receive and transmit data is shifted in and..,?,2: Receive and transmit data is shifted in and..,3: Receive and transmit data is shifted in and.."
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bitfld.long 0x00 1. "PDL,Passive Data Level" "0: The passive data level is 0,1: The passive data level is 1"
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bitfld.long 0x00 0. "SDIR,Shift Direction" "0: Shift LSB first,1: Shift MSB first"
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group.long 0x38++0x03
|
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line.long 0x00 "TCSR,Transmit Control/Status Register"
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rbitfld.long 0x00 28. "TE,Trigger Event" "0: The trigger event has not yet been detected,1: The trigger event has been detected"
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rbitfld.long 0x00 27. "TVC,Transmission Valid Cumulated" "0: Since TVC has been set at least one data..,1: Since TVC has been set no data buffer.."
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rbitfld.long 0x00 26. "TV,Transmission Valid" "0: The latest start of a data word transmission..,1: The latest start of a data word transmission.."
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rbitfld.long 0x00 24. "TSOF,Transmitted Start Of Frame" "0: The latest data word transmission has not..,1: The latest data word transmission has been.."
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bitfld.long 0x00 13. "WA,Word Address" "0: The data word in TBUF will be transmitted..,1: The data word in TBUF will be transmitted.."
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bitfld.long 0x00 12. "TDVTR,TBUF Data Valid Trigger" "0: Bit TCSR.TE is permanently set,1: Bit TCSR.TE is set if DX2T becomes active.."
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bitfld.long 0x00 10.--11. "TDEN,TBUF Data Enable" "0: A transmission start of the data word in TBUF..,1: A transmission of the data word in TBUF can..,2: A transmission of the data word in TBUF can..,3: A transmission of the data word in TBUF can.."
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bitfld.long 0x00 8. "TDSSM,TBUF Data Single Shot Mode" "0: The data word in TBUF is not invalidated..,1: The data word in TBUF is invalidated after it.."
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rbitfld.long 0x00 7. "TDV,Transmit Data Valid" "0: The data word in TBUF is not valid for..,1: The data word in TBUF is valid for transmission"
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bitfld.long 0x00 6. "EOF,End Of Frame" "0: The data word in TBUF is not considered as..,1: The data word in TBUF is considered as last.."
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bitfld.long 0x00 5. "SOF,Start Of Frame" "0: The data word in TBUF is excluded from the..,1: The data word in TBUF is included as first.."
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bitfld.long 0x00 4. "HPCMD,Hardware Port Control Mode" "0: The automatic update of bits SCTR.DSM and..,1: The automatic update of bits SCTR.DSM and.."
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bitfld.long 0x00 3. "WAMD,WA Mode" "0: The automatic update of bit WA is disabled,1: The automatic update of bit WA is enabled"
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bitfld.long 0x00 2. "FLEMD,FLE Mode" "0: The automatic update of FLE is disabled,1: The automatic update of FLE is enabled"
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bitfld.long 0x00 1. "SELMD,Select Mode" "0: The automatic update of PCR.CTR[23 :16] is..,1: The automatic update of PCR.CTR[23 :16] is.."
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bitfld.long 0x00 0. "WLEMD,WLE Mode" "0: The automatic update of SCTR.WLE and TCSR.EOF..,1: The automatic update of SCTR.WLE and TCSR.EOF.."
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group.long 0x3C++0x03
|
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line.long 0x00 "PCR,Protocol Control Register"
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bitfld.long 0x00 31. "CTR31,Protocol Control Bit 31" "0,1"
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bitfld.long 0x00 30. "CTR30,Protocol Control Bit 30" "0,1"
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bitfld.long 0x00 29. "CTR29,Protocol Control Bit 29" "0,1"
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bitfld.long 0x00 28. "CTR28,Protocol Control Bit 28" "0,1"
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bitfld.long 0x00 27. "CTR27,Protocol Control Bit 27" "0,1"
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bitfld.long 0x00 26. "CTR26,Protocol Control Bit 26" "0,1"
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bitfld.long 0x00 25. "CTR25,Protocol Control Bit 25" "0,1"
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bitfld.long 0x00 24. "CTR24,Protocol Control Bit 24" "0,1"
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bitfld.long 0x00 23. "CTR23,Protocol Control Bit 23" "0,1"
|
|
bitfld.long 0x00 22. "CTR22,Protocol Control Bit 22" "0,1"
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bitfld.long 0x00 21. "CTR21,Protocol Control Bit 21" "0,1"
|
|
bitfld.long 0x00 20. "CTR20,Protocol Control Bit 20" "0,1"
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bitfld.long 0x00 19. "CTR19,Protocol Control Bit 19" "0,1"
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|
bitfld.long 0x00 18. "CTR18,Protocol Control Bit 18" "0,1"
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bitfld.long 0x00 17. "CTR17,Protocol Control Bit 17" "0,1"
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bitfld.long 0x00 16. "CTR16,Protocol Control Bit 16" "0,1"
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bitfld.long 0x00 15. "CTR15,Protocol Control Bit 15" "0,1"
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bitfld.long 0x00 14. "CTR14,Protocol Control Bit 14" "0,1"
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bitfld.long 0x00 13. "CTR13,Protocol Control Bit 13" "0,1"
|
|
bitfld.long 0x00 12. "CTR12,Protocol Control Bit 12" "0,1"
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bitfld.long 0x00 11. "CTR11,Protocol Control Bit 11" "0,1"
|
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bitfld.long 0x00 10. "CTR10,Protocol Control Bit 10" "0,1"
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bitfld.long 0x00 9. "CTR9,Protocol Control Bit 9" "0,1"
|
|
bitfld.long 0x00 8. "CTR8,Protocol Control Bit 8" "0,1"
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|
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bitfld.long 0x00 7. "CTR7,Protocol Control Bit 7" "0,1"
|
|
bitfld.long 0x00 6. "CTR6,Protocol Control Bit 6" "0,1"
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|
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bitfld.long 0x00 5. "CTR5,Protocol Control Bit 5" "0,1"
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bitfld.long 0x00 4. "CTR4,Protocol Control Bit 4" "0,1"
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bitfld.long 0x00 3. "CTR3,Protocol Control Bit 3" "0,1"
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|
bitfld.long 0x00 2. "CTR2,Protocol Control Bit 2" "0,1"
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bitfld.long 0x00 1. "CTR1,Protocol Control Bit 1" "0,1"
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bitfld.long 0x00 0. "CTR0,Protocol Control Bit 0" "0,1"
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group.long 0x3C++0x03
|
|
line.long 0x00 "PCR_ASCMode,Protocol Control Register [ASC Mode]"
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|
bitfld.long 0x00 31. "MCLK,Master Clock Enable" "0: The MCLK generation in ASC mode is disabled..,1: The MCLK generation in ASC mode is enabled"
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|
bitfld.long 0x00 17. "TSTEN,Transmitter Status Enable" "0: Flag PSR[9] is not modified depending on the..,1: Flag PSR[9] is set during the complete.."
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bitfld.long 0x00 16. "RSTEN,Receiver Status Enable" "0: Flag PSR[9] is not modified depending on the..,1: Flag PSR[9] is set during the complete.."
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bitfld.long 0x00 13.--15. "PL,Pulse Length" "0: The pulse length is equal to the bit length..,1: The pulse length of a 0 bit is 2 time quanta,2: The pulse length of a 0 bit is 3 time quanta,?,?,?,?,7: The pulse length of a 0 bit is 8 time quanta"
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bitfld.long 0x00 8.--12. "SP,Sample Point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 7. "FFIEN,Frame Finished Interrupt Enable" "0: The interrupt generation is disabled,1: The interrupt generation is enabled"
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bitfld.long 0x00 6. "FEIEN,Format Error Interrupt Enable" "0: The interrupt generation is disabled,1: The interrupt generation is enabled"
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bitfld.long 0x00 5. "RNIEN,Receiver Noise Detection Interrupt Enable" "0: The interrupt generation is disabled,1: The interrupt generation is enabled"
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bitfld.long 0x00 4. "CDEN,Collision Detection Enable" "0: The collision detection is disabled,1: The collision detection is enabled"
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bitfld.long 0x00 3. "SBIEN,Synchronization Break Interrupt Enable" "0: The interrupt generation is disabled,1: The interrupt generation is enabled"
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bitfld.long 0x00 2. "IDM,Idle Detection Mode" "0: The bus idle detection is switched off and..,1: The bus is considered as idle after a number.."
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bitfld.long 0x00 1. "STPB,Stop Bits" "0: The number of stop bits is 1,1: The number of stop bits is 2"
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bitfld.long 0x00 0. "SMD,Sample Mode" "0: Only one sample is taken per bit time,1: Three samples are taken per bit time"
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group.long 0x3C++0x03
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line.long 0x00 "PCR_SSCMode,Protocol Control Register [SSC Mode]"
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bitfld.long 0x00 31. "MCLK,Master Clock Enable" "0: The MCLK generation in SSC mode is disabled..,1: The MCLK generation in SSC mode is enabled"
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bitfld.long 0x00 25. "SLPHSEL,Slave Mode Clock Phase Select" "0: Data bits are shifted out with the leading..,1: The first data bit is shifted out when the.."
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bitfld.long 0x00 24. "TIWEN,Enable Inter-Word Delay Tiw" "0: No delay between data words of the same frame,1: The inter-word delay Tiw is enabled and.."
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hexmask.long.byte 0x00 16.--23. 1. "SELO,Select Output"
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bitfld.long 0x00 15. "DX2TIEN,DX2T Interrupt Enable" "0: A protocol interrupt is not generated if DX2T..,1: A protocol interrupt is generated if DX2T is.."
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bitfld.long 0x00 14. "MSLSIEN,MSLS Interrupt Enable" "0: A protocol interrupt is not generated if a..,1: A protocol interrupt is generated if a change.."
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bitfld.long 0x00 13. "PARIEN,Parity Error Interrupt Enable" "0: A protocol interrupt is not generated with..,1: A protocol interrupt is generated with the.."
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bitfld.long 0x00 8.--12. "DCTQ1,Divider Factor DCTQ1 for Tiw and Tnf" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 6.--7. "PCTQ1,Divider Factor PCTQ1 for Tiw and Tnf" "0,1,2,3"
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bitfld.long 0x00 4.--5. "CTQSEL1,Input Frequency Selection" "0: fCTQIN = fPDIV,1: fCTQIN = fPPP,2: fCTQIN = fSCLK,3: fCTQIN = fMCLK"
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bitfld.long 0x00 3. "FEM,Frame End Mode" "0: The current data frame is considered as..,1: The MSLS signal is kept active also while no.."
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bitfld.long 0x00 2. "SELINV,Select Inversion" "0: The SELO outputs have the same polarity as..,1: The SELO outputs have the inverted polarity.."
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bitfld.long 0x00 1. "SELCTR,Select Control" "0: The coded select mode is enabled,1: The direct select mode is enabled"
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bitfld.long 0x00 0. "MSLSEN,MSLS Enable" "0: SSC slave mode (MSLS disabled),1: SSC master mode (MSLS enabled)"
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group.long 0x3C++0x03
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line.long 0x00 "PCR_IICMode,Protocol Control Register [IIC Mode]"
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bitfld.long 0x00 31. "MCLK,Master Clock Enable" "0: The MCLK generation in IIC mode is disabled..,1: The MCLK generation in IIC mode is enabled"
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bitfld.long 0x00 30. "ACKIEN,Acknowledge Interrupt Enable" "0: The acknowledge interrupt is disabled,1: The acknowledge interrupt is enabled"
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bitfld.long 0x00 26.--29. "HDEL,Hardware Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 25. "SACKDIS,Slave Acknowledge Disable" "0: The generation of an active slave acknowledge..,1: The generation of an active slave acknowledge.."
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bitfld.long 0x00 24. "ERRIEN,Error Interrupt Enable" "0: The error interrupt is disabled,1: The error interrupt is enabled"
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bitfld.long 0x00 23. "SRRIEN,Slave Read Request Interrupt Enable" "0: The slave read request interrupt is disabled,1: The slave read request interrupt is enabled"
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bitfld.long 0x00 22. "ARLIEN,Arbitration Lost Interrupt Enable" "0: The arbitration lost interrupt is disabled,1: The arbitration lost interrupt is enabled"
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bitfld.long 0x00 21. "NACKIEN,Non-Acknowledge Interrupt Enable" "0: The non-acknowledge interrupt is disabled,1: The non-acknowledge interrupt is enabled"
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bitfld.long 0x00 20. "PCRIEN,Stop Condition Received Interrupt Enable" "0: The stop condition interrupt is disabled,1: The stop condition interrupt is enabled"
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bitfld.long 0x00 19. "RSCRIEN,Repeated Start Condition Received Interrupt Enable" "0: The repeated start condition interrupt is..,1: The repeated start condition interrupt is.."
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bitfld.long 0x00 18. "SCRIEN,Start Condition Received Interrupt Enable" "0: The start condition interrupt is disabled,1: The start condition interrupt is enabled"
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bitfld.long 0x00 17. "STIM,Symbol Timing" "0: 100 kBaud (10 time quanta),1: 400 kBaud (25 time quanta)"
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bitfld.long 0x00 16. "ACK00,Acknowledge 00H" "0: The slave device is not sensitive to this..,1: The slave device is sensitive to this address"
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hexmask.long.word 0x00 0.--15. 1. "SLAD,Slave Address"
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group.long 0x40++0x03
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line.long 0x00 "CCR,Channel Control Register"
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bitfld.long 0x00 16. "BRGIEN,Baud Rate Generator Interrupt Enable" "0: The baud rate generator interrupt is disabled,1: The baud rate generator interrupt is enabled"
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bitfld.long 0x00 15. "AIEN,Alternative Receive Interrupt Enable" "0: The alternative receive interrupt is disabled,1: The alternative receive interrupt is enabled"
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bitfld.long 0x00 14. "RIEN,Receive Interrupt Enable" "0: The receive interrupt is disabled,1: The receive interrupt is enabled"
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bitfld.long 0x00 13. "TBIEN,Transmit Buffer Interrupt Enable" "0: The transmit buffer interrupt is disabled,1: The transmit buffer interrupt is enabled"
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bitfld.long 0x00 12. "TSIEN,Transmit Shift Interrupt Enable" "0: The transmit shift interrupt is disabled,1: The transmit shift interrupt is enabled"
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bitfld.long 0x00 11. "DLIEN,Data Lost Interrupt Enable" "0: The data lost interrupt is disabled,1: The data lost interrupt is enabled"
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bitfld.long 0x00 10. "RSIEN,Receiver Start Interrupt Enable" "0: The receiver start interrupt is disabled,1: The receiver start interrupt is enabled"
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bitfld.long 0x00 8.--9. "PM,Parity Mode" "0: The parity generation is disabled,?,2: Even parity is selected (parity bit = 1 on..,3: Odd parity is selected (parity bit = 0 on odd.."
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bitfld.long 0x00 6.--7. "HPCEN,Hardware Port Control Enable" "0: The hardware port control is disabled,1: The hardware port control is enabled for DX0..,2: The hardware port control is enabled for DX3..,3: The hardware port control is enabled for DX0.."
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bitfld.long 0x00 0.--3. "MODE,Operating Mode" "0: The USIC channel is disabled,1: The SSC (SPI) protocol is selected,2: The ASC (SCI UART) protocol is selected,3: The IIS protocol is selected,4: The IIC protocol is selected,?..."
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group.long 0x44++0x03
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line.long 0x00 "CMTR,Capture Mode Timer Register"
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hexmask.long.word 0x00 0.--9. 1. "CTV,Captured Timer Value"
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group.long 0x48++0x03
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line.long 0x00 "PSR,Protocol Status Register"
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bitfld.long 0x00 16. "BRGIF,Baud Rate Generator Indication Flag" "0: A baud rate generator event has not occurred,1: A baud rate generator event has occurred"
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bitfld.long 0x00 15. "AIF,Alternative Receive Indication Flag" "0: An alternative receive event has not occurred,1: An alternative receive event has occurred"
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bitfld.long 0x00 14. "RIF,Receive Indication Flag" "0: A receive event has not occurred,1: A receive event has occurred"
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bitfld.long 0x00 13. "TBIF,Transmit Buffer Indication Flag" "0: A transmit buffer event has not occurred,1: A transmit buffer event has occurred"
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bitfld.long 0x00 12. "TSIF,Transmit Shift Indication Flag" "0: A transmit shift event has not occurred,1: A transmit shift event has occurred"
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bitfld.long 0x00 11. "DLIF,Data Lost Indication Flag" "0: A data lost event has not occurred,1: A data lost event has occurred"
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bitfld.long 0x00 10. "RSIF,Receiver Start Indication Flag" "0: A receiver start event has not occurred,1: A receiver start event has occurred"
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bitfld.long 0x00 9. "ST9,Protocol Status Flag 9" "0,1"
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bitfld.long 0x00 8. "ST8,Protocol Status Flag 8" "0,1"
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bitfld.long 0x00 7. "ST7,Protocol Status Flag 7" "0,1"
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bitfld.long 0x00 6. "ST6,Protocol Status Flag 6" "0,1"
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bitfld.long 0x00 5. "ST5,Protocol Status Flag 5" "0,1"
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bitfld.long 0x00 4. "ST4,Protocol Status Flag 4" "0,1"
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bitfld.long 0x00 3. "ST3,Protocol Status Flag 3" "0,1"
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bitfld.long 0x00 2. "ST2,Protocol Status Flag 2" "0,1"
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bitfld.long 0x00 1. "ST1,Protocol Status Flag 1" "0,1"
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bitfld.long 0x00 0. "ST0,Protocol Status Flag 0" "0,1"
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group.long 0x48++0x03
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line.long 0x00 "PSR_ASCMode,Protocol Status Register [ASC Mode]"
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bitfld.long 0x00 16. "BRGIF,Baud Rate Generator Indication Flag" "0: A baud rate generator event in ASC mode has..,1: A baud rate generator event in ASC mode has.."
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bitfld.long 0x00 15. "AIF,Alternative Receive Indication Flag" "0: An alternative receive event in ASC mode has..,1: An alternative receive event in ASC mode has.."
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bitfld.long 0x00 14. "RIF,Receive Indication Flag" "0: A receive event in ASC mode has not occurred,1: A receive event in ASC mode has occurred"
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bitfld.long 0x00 13. "TBIF,Transmit Buffer Indication Flag" "0: A transmit buffer event in ASC mode has not..,1: A transmit buffer event in ASC mode has.."
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bitfld.long 0x00 12. "TSIF,Transmit Shift Indication Flag" "0: A transmit shift event in ASC mode has not..,1: A transmit shift event in ASC mode has occurred"
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bitfld.long 0x00 11. "DLIF,Data Lost Indication Flag" "0: A data lost event in ASC mode has not occurred,1: A data lost event in ASC mode has occurred"
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bitfld.long 0x00 10. "RSIF,Receiver Start Indication Flag" "0: A receiver start event in ASC mode has not..,1: A receiver start event in ASC mode has occurred"
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rbitfld.long 0x00 9. "BUSY,Transfer Status BUSY" "0: A data transfer does not take place,1: A data transfer currently takes place"
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bitfld.long 0x00 8. "TFF,Transmitter Frame Finished" "0: The transmitter frame is not yet finished,1: The transmitter frame is finished"
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bitfld.long 0x00 7. "RFF,Receive Frame Finished" "0: The received frame is not yet finished,1: The received frame is finished"
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bitfld.long 0x00 6. "FER1,Format Error in Stop Bit 1" "0: A format error 1 has not been detected,1: A format error 1 has been detected"
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bitfld.long 0x00 5. "FER0,Format Error in Stop Bit 0" "0: A format error 0 has not been detected,1: A format error 0 has been detected"
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bitfld.long 0x00 4. "RNS,Receiver Noise Detected" "0: Receiver noise has not been detected,1: Receiver noise has been detected"
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bitfld.long 0x00 3. "COL,Collision Detected" "0: A collision has not yet been detected and..,1: A collision has been detected and frame.."
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bitfld.long 0x00 2. "SBD,Synchronization Break Detected" "0: A synchronization break has not yet been..,1: A synchronization break has been detected"
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bitfld.long 0x00 1. "RXIDLE,Reception Idle" "0: The receiver line has not yet been idle,1: The receiver line has been idle and frame.."
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bitfld.long 0x00 0. "TXIDLE,Transmission Idle" "0: The transmitter line has not yet been idle,1: The transmitter line has been idle and frame.."
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group.long 0x48++0x03
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line.long 0x00 "PSR_SSCMode,Protocol Status Register [SSC Mode]"
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bitfld.long 0x00 16. "BRGIF,Baud Rate Generator Indication Flag" "0: A baud rate generator event in SSC mode has..,1: A baud rate generator event in SSC mode has.."
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bitfld.long 0x00 15. "AIF,Alternative Receive Indication Flag" "0: An alternative receive event in SSC mode has..,1: An alternative receive event in SSC mode has.."
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bitfld.long 0x00 14. "RIF,Receive Indication Flag" "0: A receive event in SSC mode has not occurred,1: A receive event in SSC mode has occurred"
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bitfld.long 0x00 13. "TBIF,Transmit Buffer Indication Flag" "0: A transmit buffer event in SSC mode has not..,1: A transmit buffer event in SSC mode has.."
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bitfld.long 0x00 12. "TSIF,Transmit Shift Indication Flag" "0: A transmit shift event in SSC mode has not..,1: A transmit shift event in SSC mode has occurred"
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bitfld.long 0x00 11. "DLIF,Data Lost Indication Flag" "0: A data lost event in SSC mode has not occurred,1: A data lost event in SSC mode has occurred"
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bitfld.long 0x00 10. "RSIF,Receiver Start Indication Flag" "0: A receiver start event in SSC mode has not..,1: A receiver start event in SSC mode has occurred"
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bitfld.long 0x00 4. "PARERR,Parity Error Event Detected" "0: A parity error event has not been activated,1: A parity error event has been activated"
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bitfld.long 0x00 3. "DX2TEV,DX2T Event Detected" "0: The DX2T signal has not been activated,1: The DX2T signal has been activated"
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bitfld.long 0x00 2. "MSLSEV,MSLS Event Detected" "0: The MSLS signal has not changed its state,1: The MSLS signal has changed its state"
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bitfld.long 0x00 1. "DX2S,DX2S Status" "0: DX2S is 0,1: DX2S is 1"
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bitfld.long 0x00 0. "MSLS,MSLS Status" "0: The internal signal MSLS is inactive (0),1: The internal signal MSLS is active (1)"
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group.long 0x48++0x03
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line.long 0x00 "PSR_IICMode,Protocol Status Register [IIC Mode]"
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bitfld.long 0x00 16. "BRGIF,Baud Rate Generator Indication Flag" "0: A baud rate generator event in IIC mode has..,1: A baud rate generator event in IIC mode has.."
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bitfld.long 0x00 15. "AIF,Alternative Receive Indication Flag" "0: An alternative receive event in IIC mode has..,1: An alternative receive event in IIC mode has.."
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bitfld.long 0x00 14. "RIF,Receive Indication Flag" "0: A receive event in IIC mode has not occurred,1: A receive event in IIC mode has occurred"
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bitfld.long 0x00 13. "TBIF,Transmit Buffer Indication Flag" "0: A transmit buffer event in IIC mode has not..,1: A transmit buffer event in IIC mode has.."
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bitfld.long 0x00 12. "TSIF,Transmit Shift Indication Flag" "0: A transmit shift event in IIC mode has not..,1: A transmit shift event in IIC mode has occurred"
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bitfld.long 0x00 11. "DLIF,Data Lost Indication Flag" "0: A data lost event in IIC mode has not occurred,1: A data lost event in IIC mode has occurred"
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bitfld.long 0x00 10. "RSIF,Receiver Start Indication Flag" "0: A receiver start event in IIC mode has not..,1: A receiver start event in IIC mode has occurred"
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bitfld.long 0x00 9. "ACK,Acknowledge Received" "0: An acknowledge has not been received,1: An acknowledge has been received"
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bitfld.long 0x00 8. "ERR,Error" "0: An IIC error has not been detected,1: An IIC error has been detected"
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bitfld.long 0x00 7. "SRR,Slave Read Request" "0: A slave read request has not been detected,1: A slave read request has been detected"
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bitfld.long 0x00 6. "ARL,Arbitration Lost" "0: An arbitration has not been lost,1: An arbitration has been lost"
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bitfld.long 0x00 5. "NACK,Non-Acknowledge Received" "0: A non-acknowledge has not been received,1: A non-acknowledge has been received"
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bitfld.long 0x00 4. "PCR,Stop Condition Received" "0: A stop condition has not yet been detected,1: A stop condition has been detected"
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bitfld.long 0x00 3. "RSCR,Repeated Start Condition Received" "0: A repeated start condition has not yet been..,1: A repeated start condition has been detected"
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bitfld.long 0x00 2. "SCR,Start Condition Received" "0: A start condition has not yet been detected,1: A start condition has been detected"
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bitfld.long 0x00 1. "WTDF,Wrong TDF Code Found" "0: A wrong TDF code has not been found,1: A wrong TDF code has been found"
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bitfld.long 0x00 0. "SLSEL,Slave Select" "0: The device is not selected as slave,1: The device is selected as slave"
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group.long 0x48++0x03
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line.long 0x00 "PSR_IISMode,Protocol Status Register [IIS Mode]"
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bitfld.long 0x00 16. "BRGIF,Baud Rate Generator Indication Flag" "0: A baud rate generator event in IIS mode has..,1: A baud rate generator event in IIS mode has.."
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bitfld.long 0x00 15. "AIF,Alternative Receive Indication Flag" "0: An alternative receive event in IIS mode has..,1: An alternative receive event in IIS mode has.."
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bitfld.long 0x00 14. "RIF,Receive Indication Flag" "0: A receive event in IIS mode has not occurred,1: A receive event in IIS mode has occurred"
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bitfld.long 0x00 13. "TBIF,Transmit Buffer Indication Flag" "0: A transmit buffer event in IIS mode has not..,1: A transmit buffer event in IIS mode has.."
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bitfld.long 0x00 12. "TSIF,Transmit Shift Indication Flag" "0: A transmit shift event in IIS mode has not..,1: A transmit shift event in IIS mode has occurred"
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bitfld.long 0x00 11. "DLIF,Data Lost Indication Flag" "0: A data lost event in IIS mode has not occurred,1: A data lost event in IIS mode has occurred"
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bitfld.long 0x00 10. "RSIF,Receiver Start Indication Flag" "0: A receiver start event in IIS mode has not..,1: A receiver start event in IIS mode has occurred"
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bitfld.long 0x00 6. "END,WA Generation End" "0: The WA generation has not yet ended (if it is..,1: The WA generation has ended (if it has been.."
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bitfld.long 0x00 5. "WARE,WA Rising Edge Event" "0: A WA rising edge has not been generated,1: A WA rising edge has been generated"
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bitfld.long 0x00 4. "WAFE,WA Falling Edge Event" "0: A WA falling edge has not been generated,1: A WA falling edge has been generated"
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bitfld.long 0x00 3. "DX2TEV,DX2T Event Detected" "0: The DX2T signal in IIS mode has not been..,1: The DX2T signal in IIS mode has been activated"
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bitfld.long 0x00 1. "DX2S,DX2S Status" "0: DX2S in IIS mode is 0,1: DX2S in IIS mode is 1"
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bitfld.long 0x00 0. "WA,Word Address" "0: WA has been sampled 0,1: WA has been sampled 1"
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group.long 0x4C++0x03
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line.long 0x00 "PSCR,Protocol Status Clear Register"
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bitfld.long 0x00 16. "CBRGIF,Clear Baud Rate Generator Indication Flag" "0: No action,1: Flag PSR.BRGIF is cleared"
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bitfld.long 0x00 15. "CAIF,Clear Alternative Receive Indication Flag" "0: No action,1: Flag PSR.AIF is cleared"
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bitfld.long 0x00 14. "CRIF,Clear Receive Indication Flag" "0: No action,1: Flag PSR.RIF is cleared"
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bitfld.long 0x00 13. "CTBIF,Clear Transmit Buffer Indication Flag" "0: No action,1: Flag PSR.TBIF is cleared"
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bitfld.long 0x00 12. "CTSIF,Clear Transmit Shift Indication Flag" "0: No action,1: Flag PSR.TSIF is cleared"
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bitfld.long 0x00 11. "CDLIF,Clear Data Lost Indication Flag" "0: No action,1: Flag PSR.DLIF is cleared"
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bitfld.long 0x00 10. "CRSIF,Clear Receiver Start Indication Flag" "0: No action,1: Flag PSR.RSIF is cleared"
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bitfld.long 0x00 9. "CST9,Clear Status Flag 9 in PSR" "0: No action,1: Flag PSR.STx is cleared"
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bitfld.long 0x00 8. "CST8,Clear Status Flag 8 in PSR" "0: No action,1: Flag PSR.STx is cleared"
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bitfld.long 0x00 7. "CST7,Clear Status Flag 7 in PSR" "0: No action,1: Flag PSR.STx is cleared"
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bitfld.long 0x00 6. "CST6,Clear Status Flag 6 in PSR" "0: No action,1: Flag PSR.STx is cleared"
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bitfld.long 0x00 5. "CST5,Clear Status Flag 5 in PSR" "0: No action,1: Flag PSR.STx is cleared"
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bitfld.long 0x00 4. "CST4,Clear Status Flag 4 in PSR" "0: No action,1: Flag PSR.STx is cleared"
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bitfld.long 0x00 3. "CST3,Clear Status Flag 3 in PSR" "0: No action,1: Flag PSR.STx is cleared"
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bitfld.long 0x00 2. "CST2,Clear Status Flag 2 in PSR" "0: No action,1: Flag PSR.STx is cleared"
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bitfld.long 0x00 1. "CST1,Clear Status Flag 1 in PSR" "0: No action,1: Flag PSR.STx is cleared"
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bitfld.long 0x00 0. "CST0,Clear Status Flag 0 in PSR" "0: No action,1: Flag PSR.STx is cleared"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "RBUFSR,Receiver Buffer Status Register"
|
|
rbitfld.long 0x00 15. "DS,Data Source of RBUF or RBUFD" "0,1"
|
|
rbitfld.long 0x00 14. "RDV1,Receive Data Valid RVD1 in RBUF or RBUFD" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 13. "RDV0,Receive Data Valid RVD0 in RBUF or RBUFD" "0,1"
|
|
rbitfld.long 0x00 9. "PERR,Protocol-related Error in RBUF or RBUFD" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 8. "PAR,Protocol-Related Argument in RBUF or RBUFD" "0,1"
|
|
rbitfld.long 0x00 6. "SOF,Start of Frame in RBUF or RBUFD" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 0.--3. "WLEN,Received Data Word Length in RBUF or RBUFD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "RBUF,Receiver Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DSR,Received Data"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "RBUFD,Receiver Buffer Register for Debugger"
|
|
hexmask.long.word 0x00 0.--15. 1. "DSR,Data from Shift Register"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "RBUF0,Receiver Buffer Register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "DSR0,Data of Shift Registers 0[3:0]"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "RBUF1,Receiver Buffer Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "DSR1,Data of Shift Registers 1[3:0]"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "RBUF01SR,Receiver Buffer 01 Status Register"
|
|
rbitfld.long 0x00 31. "DS1,Data Source DS1" "0: The register RBUF contains the data of RBUF0..,1: The register RBUF contains the data of RBUF1.."
|
|
rbitfld.long 0x00 30. "RDV11,Receive Data Valid RVD11 in RBUF1" "0: Register RBUF1 does not contain data that has..,1: Register RBUF1 contains data that has not yet.."
|
|
newline
|
|
rbitfld.long 0x00 29. "RDV10,Receive Data Valid RVD10 in RBUF0" "0: Register RBUF0 does not contain data that has..,1: Register RBUF0 contains data that has not yet.."
|
|
rbitfld.long 0x00 25. "PERR1,Protocol-related Error in RBUF1" "0: The received protocol-related argument PAR..,1: The received protocol-related argument PAR.."
|
|
newline
|
|
rbitfld.long 0x00 24. "PAR1,Protocol-Related Argument in RBUF1" "0,1"
|
|
rbitfld.long 0x00 22. "SOF1,Start of Frame in RBUF1" "0: The data in RBUF1 has not been the first data..,1: The data in RBUF1 has been the first data.."
|
|
newline
|
|
rbitfld.long 0x00 16.--19. "WLEN1,Received Data Word Length in RBUF1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 15. "DS0,Data Source DS0" "0: The register RBUF contains the data of RBUF0..,1: The register RBUF contains the data of RBUF1.."
|
|
newline
|
|
rbitfld.long 0x00 14. "RDV01,Receive Data Valid RVD01 in RBUF1" "0: Register RBUF1 does not contain data that has..,1: Register RBUF1 contains data that has not yet.."
|
|
rbitfld.long 0x00 13. "RDV00,Receive Data Valid RVD00 in RBUF0" "0: Register RBUF0 does not contain data that has..,1: Register RBUF0 contains data that has not yet.."
|
|
newline
|
|
rbitfld.long 0x00 9. "PERR0,Protocol-related Error in RBUF0" "0: The received protocol-related argument PAR..,1: The received protocol-related argument PAR.."
|
|
rbitfld.long 0x00 8. "PAR0,Protocol-Related Argument in RBUF0" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 6. "SOF0,Start of Frame in RBUF0" "0: The data in RBUF0 has not been the first data..,1: The data in RBUF0 has been the first data.."
|
|
rbitfld.long 0x00 0.--3. "WLEN0,Received Data Word Length in RBUF0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "FMR,Flag Modification Register"
|
|
bitfld.long 0x00 21. "SIO5,Set Interrupt Output SR5" "0: No action,1: The service request output SRx is activated"
|
|
bitfld.long 0x00 20. "SIO4,Set Interrupt Output SR4" "0: No action,1: The service request output SRx is activated"
|
|
newline
|
|
bitfld.long 0x00 19. "SIO3,Set Interrupt Output SR3" "0: No action,1: The service request output SRx is activated"
|
|
bitfld.long 0x00 18. "SIO2,Set Interrupt Output SR2" "0: No action,1: The service request output SRx is activated"
|
|
newline
|
|
bitfld.long 0x00 17. "SIO1,Set Interrupt Output SR1" "0: No action,1: The service request output SRx is activated"
|
|
bitfld.long 0x00 16. "SIO0,Set Interrupt Output SR0" "0: No action,1: The service request output SRx is activated"
|
|
newline
|
|
bitfld.long 0x00 15. "CRDV1,Clear Bit RDV for RBUF1" "0: No action,1: Bits RBUF01SR.RDV01 and RBUF01SR.RDV11 are.."
|
|
bitfld.long 0x00 14. "CRDV0,Clear Bits RDV for RBUF0" "0: No action,1: Bits RBUF01SR.RDV00 and RBUF01SR.RDV10 are.."
|
|
newline
|
|
bitfld.long 0x00 4. "ATVC,Activate Bit TVC" "0: No action,1: Bit TCSR.TVC is set"
|
|
bitfld.long 0x00 0.--1. "MTDV,Modify Transmit Data Valid" "0: No action,1: Bit TDV is set TE is unchanged,2: Bits TDV and TE are cleared,?..."
|
|
repeat 32. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x80)++0x03
|
|
line.long 0x00 "TBUF[$1],Transmit Buffer $1"
|
|
hexmask.long.word 0x00 0.--15. 1. "TDATA,Transmit Data"
|
|
repeat.end
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "BYP,Bypass Data Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "BDATA,Bypass Data"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "BYPCR,Bypass Control Register"
|
|
bitfld.long 0x00 21.--23. "BHPC,Bypass Hardware Port Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--20. "BSELO,Bypass Select Outputs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
rbitfld.long 0x00 15. "BDV,Bypass Data Valid" "0: The bypass data is not valid,1: The bypass data is valid"
|
|
bitfld.long 0x00 13. "BPRIO,Bypass Priority" "0: The transmit FIFO data has a higher priority..,1: The bypass data has a higher priority than.."
|
|
newline
|
|
bitfld.long 0x00 12. "BDVTR,Bypass Data Valid Trigger" "0: Bit BDV is not influenced by DX2T,1: Bit BDV is set if DX2T is active"
|
|
bitfld.long 0x00 10.--11. "BDEN,Bypass Data Enable" "0: The transfer of bypass data is disabled,1: The transfer of bypass data to TBUF is possible,2: Gated bypass data transfer is enabled,3: Gated bypass data transfer is enabled"
|
|
newline
|
|
bitfld.long 0x00 8. "BDSSM,Bypass Data Single Shot Mode" "0: The bypass data is still considered as valid..,1: The bypass data is considered as invalid.."
|
|
bitfld.long 0x00 0.--3. "BWLE,Bypass Word Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "TBCTR,Transmitter Buffer Control Register"
|
|
bitfld.long 0x00 31. "TBERIEN,Transmit Buffer Error Interrupt Enable" "0: The transmit buffer error interrupt..,1: The transmit buffer error interrupt.."
|
|
bitfld.long 0x00 30. "STBIEN,Standard Transmit Buffer Interrupt Enable" "0: The standard transmit buffer interrupt..,1: The standard transmit buffer interrupt.."
|
|
newline
|
|
bitfld.long 0x00 28. "LOF,Buffer Event on Limit Overflow" "0: A standard transmit buffer event occurs when..,1: A standard transmit buffer interrupt event.."
|
|
bitfld.long 0x00 24.--26. "SIZE,Buffer Size" "0: The transmit FIFO mechanism is disabled,1: The transmit FIFO buffer contains 2 entries,2: The transmit FIFO buffer contains 4 entries,3: The transmit FIFO buffer contains 8 entries,4: The transmit FIFO buffer contains 16 entries,5: The transmit FIFO buffer contains 32 entries,6: The transmit FIFO buffer contains 64 entries,?..."
|
|
newline
|
|
bitfld.long 0x00 19.--21. "ATBINP,Alternative Transmit Buffer Interrupt Node Pointer" "0: Output SR0 becomes activated,1: Output SR1 becomes activated,2: Output SR2 becomes activated,3: Output SR3 becomes activated,4: Output SR4 becomes activated,5: Output SR5 becomes activated,?..."
|
|
bitfld.long 0x00 16.--18. "STBINP,Standard Transmit Buffer Interrupt Node Pointer" "0: Output SR0 becomes activated,1: Output SR1 becomes activated,2: Output SR2 becomes activated,3: Output SR3 becomes activated,4: Output SR4 becomes activated,5: Output SR5 becomes activated,?..."
|
|
newline
|
|
bitfld.long 0x00 15. "STBTEN,Standard Transmit Buffer Trigger Enable" "0: The standard transmit buffer event trigger..,1: The standard transmit buffer event trigger.."
|
|
bitfld.long 0x00 14. "STBTM,Standard Transmit Buffer Trigger Mode" "0: Trigger mode 0,1: Trigger mode 1"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "LIMIT,Limit For Interrupt Generation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. "DPTR,Data Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "RBCTR,Receiver Buffer Control Register"
|
|
bitfld.long 0x00 31. "RBERIEN,Receive Buffer Error Interrupt Enable" "0: The receive buffer error interrupt generation..,1: The receive buffer error interrupt generation.."
|
|
bitfld.long 0x00 30. "SRBIEN,Standard Receive Buffer Interrupt Enable" "0: The standard receive buffer interrupt..,1: The standard receive buffer interrupt.."
|
|
newline
|
|
bitfld.long 0x00 29. "ARBIEN,Alternative Receive Buffer Interrupt Enable" "0: The alternative receive buffer interrupt..,1: The alternative receive buffer interrupt.."
|
|
bitfld.long 0x00 28. "LOF,Buffer Event on Limit Overflow" "0: A standard receive buffer event occurs when..,1: A standard receive buffer event occurs when.."
|
|
newline
|
|
bitfld.long 0x00 27. "RNM,Receiver Notification Mode" "0: Filling level mode,1: RCI mode"
|
|
bitfld.long 0x00 24.--26. "SIZE,Buffer Size" "0: The receive FIFO mechanism is disabled,1: The receive FIFO buffer contains 2 entries,2: The receive FIFO buffer contains 4 entries,3: The receive FIFO buffer contains 8 entries,4: The receive FIFO buffer contains 16 entries,5: The receive FIFO buffer contains 32 entries,6: The receive FIFO buffer contains 64 entries,?..."
|
|
newline
|
|
bitfld.long 0x00 22.--23. "RCIM,Receiver Control Information Mode" "0: RCI[4] = PERR RCI[3:0] = WLEN,1: RCI[4] = SOF RCI[3:0] = WLEN,2: RCI[4] = 0 RCI[3:0] = WLEN,3: RCI[4] = PERR RCI[3] = PAR RCI[2:1] = 00B.."
|
|
bitfld.long 0x00 19.--21. "ARBINP,Alternative Receive Buffer Interrupt Node Pointer" "0: Output SR0 becomes activated,1: Output SR1 becomes activated,2: Output SR2 becomes activated,3: Output SR3 becomes activated,4: Output SR4 becomes activated,5: Output SR5 becomes activated,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--18. "SRBINP,Standard Receive Buffer Interrupt Node Pointer" "0: Output SR0 becomes activated,1: Output SR1 becomes activated,2: Output SR2 becomes activated,3: Output SR3 becomes activated,4: Output SR4 becomes activated,5: Output SR5 becomes activated,?..."
|
|
bitfld.long 0x00 15. "SRBTEN,Standard Receive Buffer Trigger Enable" "0: The standard receive buffer event trigger..,1: The standard receive buffer event trigger.."
|
|
newline
|
|
bitfld.long 0x00 14. "SRBTM,Standard Receive Buffer Trigger Mode" "0: Trigger mode 0,1: Trigger mode 1"
|
|
bitfld.long 0x00 8.--13. "LIMIT,Limit For Interrupt Generation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "DPTR,Data Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "TRBPTR,Transmit/Receive Buffer Pointer Register"
|
|
rbitfld.long 0x00 24.--29. "RDOPTR,Receiver Data Output Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rbitfld.long 0x00 16.--21. "RDIPTR,Receiver Data Input Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
rbitfld.long 0x00 8.--13. "TDOPTR,Transmitter Data Output Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rbitfld.long 0x00 0.--5. "TDIPTR,Transmitter Data Input Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "TRBSR,Transmit/Receive Buffer Status Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. "TBFLVL,Transmit Buffer Filling Level"
|
|
hexmask.long.byte 0x00 16.--22. 1. "RBFLVL,Receive Buffer Filling Level"
|
|
newline
|
|
rbitfld.long 0x00 14. "STBT,Standard Transmit Buffer Event Trigger" "0: A standard transmit buffer event is not..,1: A standard transmit buffer event is triggered.."
|
|
rbitfld.long 0x00 13. "TBUS,Transmit Buffer Busy" "0: The transmit buffer information has been..,1: The FIFO memory update after write to INx is.."
|
|
newline
|
|
rbitfld.long 0x00 12. "TFULL,Transmit Buffer Full" "0: The transmit buffer is not full,1: The transmit buffer is full"
|
|
rbitfld.long 0x00 11. "TEMPTY,Transmit Buffer Empty" "0: The transmit buffer is not empty,1: The transmit buffer is empty"
|
|
newline
|
|
bitfld.long 0x00 9. "TBERI,Transmit Buffer Error Event" "0: A transmit buffer error event has not been..,1: A transmit buffer error event has been detected"
|
|
bitfld.long 0x00 8. "STBI,Standard Transmit Buffer Event" "0: A standard transmit buffer event has not been..,1: A standard transmit buffer event has been.."
|
|
newline
|
|
rbitfld.long 0x00 6. "SRBT,Standard Receive Buffer Event Trigger" "0: A standard receive buffer event is not..,1: A standard receive buffer event is triggered.."
|
|
rbitfld.long 0x00 5. "RBUS,Receive Buffer Busy" "0: The receive buffer information has been..,1: The OUTR update from the FIFO memory is ongoing"
|
|
newline
|
|
rbitfld.long 0x00 4. "RFULL,Receive Buffer Full" "0: The receive buffer is not full,1: The receive buffer is full"
|
|
rbitfld.long 0x00 3. "REMPTY,Receive Buffer Empty" "0: The receive buffer is not empty,1: The receive buffer is empty"
|
|
newline
|
|
bitfld.long 0x00 2. "ARBI,Alternative Receive Buffer Event" "0: An alternative receive buffer event has not..,1: An alternative receive buffer event has been.."
|
|
bitfld.long 0x00 1. "RBERI,Receive Buffer Error Event" "0: A receive buffer error event has not been..,1: A receive buffer error event has been detected"
|
|
newline
|
|
bitfld.long 0x00 0. "SRBI,Standard Receive Buffer Event" "0: A standard receive buffer event has not been..,1: A standard receive buffer event has been.."
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "TRBSCR,Transmit/Receive Buffer Status Clear Register"
|
|
bitfld.long 0x00 15. "FLUSHTB,Flush Transmit Buffer" "0: No effect,1: The transmit FIFO buffer is cleared (filling.."
|
|
bitfld.long 0x00 14. "FLUSHRB,Flush Receive Buffer" "0: No effect,1: The receive FIFO buffer is cleared (filling.."
|
|
newline
|
|
bitfld.long 0x00 10. "CBDV,Clear Bypass Data Valid" "0: No effect,1: Clear BYPCR.BDV"
|
|
bitfld.long 0x00 9. "CTBERI,Clear Transmit Buffer Error Event" "0: No effect,1: Clear TRBSR.TBERI"
|
|
newline
|
|
bitfld.long 0x00 8. "CSTBI,Clear Standard Transmit Buffer Event" "0: No effect,1: Clear TRBSR.STBI"
|
|
bitfld.long 0x00 2. "CARBI,Clear Alternative Receive Buffer Event" "0: No effect,1: Clear TRBSR.ARBI"
|
|
newline
|
|
bitfld.long 0x00 1. "CRBERI,Clear Receive Buffer Error Event" "0: No effect,1: Clear TRBSR.RBERI"
|
|
bitfld.long 0x00 0. "CSRBI,Clear Standard Receive Buffer Event" "0: No effect,1: Clear TRBSR.SRBI"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "OUTR,Receiver Buffer Output Register"
|
|
rbitfld.long 0x00 16.--20. "RCI,Receiver Control Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 0.--15. 1. "DSR,Received Data"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "OUTDR,Receiver Buffer Output Register L for Debugger"
|
|
rbitfld.long 0x00 16.--20. "RCI,Receive Control Information from Shift Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 0.--15. 1. "DSR,Data from Shift Register"
|
|
repeat 32. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x180)++0x03
|
|
line.long 0x00 "IN[$1],Transmit FIFO Buffer $1"
|
|
hexmask.long.word 0x00 0.--15. 1. "TDATA,Transmit Data"
|
|
repeat.end
|
|
tree.end
|
|
repeat.end
|
|
tree "USIC1"
|
|
base ad:0x48004008
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ID,Module Identification Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "MOD_NUMBER,Module Number Value"
|
|
hexmask.long.byte 0x00 8.--15. 1. "MOD_TYPE,Module Type"
|
|
hexmask.long.byte 0x00 0.--7. 1. "MOD_REV,Module Revision Number"
|
|
tree.end
|
|
tree "USIC1_CH0"
|
|
base ad:0x48004000
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CCFG,Channel Configuration Register"
|
|
rbitfld.long 0x00 7. "TB,Transmit FIFO Buffer Available" "0: A transmit FIFO buffer is not available,1: A transmit FIFO buffer is available"
|
|
rbitfld.long 0x00 6. "RB,Receive FIFO Buffer Available" "0: A receive FIFO buffer is not available,1: A receive FIFO buffer is available"
|
|
newline
|
|
rbitfld.long 0x00 3. "IIS,IIS Protocol Available" "0: The IIS protocol is not available,1: The IIS protocol is available"
|
|
rbitfld.long 0x00 2. "IIC,IIC Protocol Available" "0: The IIC protocol is not available,1: The IIC protocol is available"
|
|
newline
|
|
rbitfld.long 0x00 1. "ASC,ASC Protocol Available" "0: The ASC protocol is not available,1: The ASC protocol is available"
|
|
rbitfld.long 0x00 0. "SSC,SSC Protocol Available" "0: The SSC protocol is not available,1: The SSC protocol is available"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "KSCFG,Kernel State Configuration Register"
|
|
bitfld.long 0x00 11. "BPSUM,Bit Protection for SUMCFG" "0: SUMCFG is not changed,1: SUMCFG is updated with the written value"
|
|
bitfld.long 0x00 8.--9. "SUMCFG,Suspend Mode Configuration" "0,1,2,3"
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bitfld.long 0x00 7. "BPNOM,Bit Protection for NOMCFG" "0: NOMCFG is not changed,1: NOMCFG is updated with the written value"
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bitfld.long 0x00 4.--5. "NOMCFG,Normal Operation Mode Configuration" "0: Run mode 0 is selected,1: Run mode 1 is selected,2: Stop mode 0 is selected,3: Stop mode 1 is selected"
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bitfld.long 0x00 1. "BPMODEN,Bit Protection for MODEN" "0: MODEN is not changed,1: MODEN is updated with the written value"
|
|
bitfld.long 0x00 0. "MODEN,Module Enable" "0: The module is switched off immediately,1: The module is switched on"
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|
group.long 0x10++0x03
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|
line.long 0x00 "FDR,Fractional Divider Register"
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|
hexmask.long.word 0x00 16.--25. 1. "RESULT,Result Value"
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bitfld.long 0x00 14.--15. "DM,Divider Mode" "0: DM0 The divider is switched off fFD = 0,1: DM1 Normal divider mode selected,2: DM2 Fractional divider mode selected,3: DM3 The divider is switched off fFD = 0"
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hexmask.long.word 0x00 0.--9. 1. "STEP,Step Value"
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group.long 0x14++0x03
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|
line.long 0x00 "BRG,Baud Rate Generator Register"
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|
bitfld.long 0x00 30.--31. "SCLKCFG,Shift Clock Output Configuration" "0: The passive level is 0 and the delay is..,1: The passive level is 1 and the delay is..,2: The passive level is 0 and the delay is enabled,3: The passive level is 1 and the delay is enabled"
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bitfld.long 0x00 29. "MCLKCFG,Master Clock Configuration" "0: The passive level is 0,1: The passive level is 1"
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bitfld.long 0x00 28. "SCLKOSEL,Shift Clock Output Select" "0: SCLK from the baud rate generator is selected..,1: The transmit shift clock from DX1 input stage.."
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hexmask.long.word 0x00 16.--25. 1. "PDIV,Divider Mode: Divider Factor to Generate fPDIV"
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bitfld.long 0x00 10.--14. "DCTQ,Denominator for Time Quanta Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 8.--9. "PCTQ,Pre-Divider for Time Quanta Counter" "0,1,2,3"
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bitfld.long 0x00 6.--7. "CTQSEL,Input Selection for CTQ" "0: fCTQIN = fPDIV,1: fCTQIN = fPPP,2: fCTQIN = fSCLK,3: fCTQIN = fMCLK"
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bitfld.long 0x00 4. "PPPEN,Enable 2:1 Divider for fPPP" "0: The 2:1 divider for fPPP is disabled,1: The 2:1 divider for fPPP is enabled"
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bitfld.long 0x00 3. "TMEN,Timing Measurement Enable" "0: Timing measurement is disabled,1: Timing measurement is enabled"
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bitfld.long 0x00 0.--1. "CLKSEL,Clock Selection" "0: The fractional divider frequency fFD is..,?,2: The trigger signal DX1T defines fPIN,3: Signal MCLK corresponds to the DX1S signal.."
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group.long 0x18++0x03
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line.long 0x00 "INPR,Interrupt Node Pointer Register"
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bitfld.long 0x00 16.--18. "PINP,Protocol Interrupt Node Pointer" "0: Output SR0 becomes activated,1: Output SR1 becomes activated,2: Output SR2 becomes activated,3: Output SR3 becomes activated,4: Output SR4 becomes activated,5: Output SR5 becomes activated,?..."
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bitfld.long 0x00 12.--14. "AINP,Alternative Receive Interrupt Node Pointer" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 8.--10. "RINP,Receive Interrupt Node Pointer" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 4.--6. "TBINP,Transmit Buffer Interrupt Node Pointer" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 0.--2. "TSINP,Transmit Shift Interrupt Node Pointer" "0: Output SR0 becomes activated,1: Output SR1 becomes activated,2: Output SR2 becomes activated,3: Output SR3 becomes activated,4: Output SR4 becomes activated,5: Output SR5 becomes activated,?..."
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group.long 0x1C++0x03
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line.long 0x00 "DX0CR,Input Control Register 0"
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rbitfld.long 0x00 15. "DXS,Synchronized Data Value" "0: The current value of DX0S is 0,1: The current value of DX0S is 1"
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bitfld.long 0x00 10.--11. "CM,Combination Mode" "0: The DX0 trigger activation is disabled,1: A rising edge activates DX0T,2: A falling edge activates DX0T,3: Both edges activate DX0T"
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bitfld.long 0x00 9. "SFSEL,Sampling Frequency Selection" "0: The DX0 sampling frequency is fPERIPH,1: The DX0 sampling frequency is fFD"
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bitfld.long 0x00 8. "DPOL,Data Polarity for DXn" "0: The DX0 input signal is not inverted,1: The DX0 input signal is inverted"
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bitfld.long 0x00 6. "DSEN,Data Synchronization Enable" "0: The un-synchronized signal can be taken as..,1: The synchronized signal can be taken as DX0.."
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bitfld.long 0x00 5. "DFEN,Digital Filter Enable" "0: The DX0 input signal is not digitally filtered,1: The DX0 input signal is digitally filtered"
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bitfld.long 0x00 4. "INSW,Input Switch" "0: DX0 input of the data shift unit is..,1: DX0 input of the data shift unit is connected.."
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bitfld.long 0x00 0.--2. "DSEL,Data Selection for Input Signal" "0: The data input DX0A is selected,1: The data input DX0B is selected,2: The data input DX0C is selected,3: The data input DX0D is selected,4: The data input DX0E is selected,5: The data input DX0F is selected,6: The data input DX0G is selected,7: The data input of DX0 is always 1"
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group.long 0x20++0x03
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line.long 0x00 "DX1CR,Input Control Register 1"
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rbitfld.long 0x00 15. "DXS,Synchronized Data Value" "0: The current value of DX1S is 0,1: The current value of DX1S is 1"
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bitfld.long 0x00 10.--11. "CM,Combination Mode" "0: The DX1 trigger activation is disabled,1: A rising edge activates DX1T,2: A falling edge activates DX1T,3: Both edges activate DX1T"
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bitfld.long 0x00 9. "SFSEL,Sampling Frequency Selection" "0: The DX1 sampling frequency is fPERIPH,1: The DX1 sampling frequency is fFD"
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bitfld.long 0x00 8. "DPOL,Data Polarity for DXn" "0: The DX1 input signal is not inverted,1: The DX1 input signal is inverted"
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|
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bitfld.long 0x00 6. "DSEN,Data Synchronization Enable" "0: The un-synchronized signal can be taken as..,1: The synchronized signal can be taken as DX1.."
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bitfld.long 0x00 5. "DFEN,Digital Filter Enable" "0: The DX1 input signal is not digitally filtered,1: The DX1 input signal is digitally filtered"
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|
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bitfld.long 0x00 4. "INSW,Input Switch" "0: DX1 input of the data shift unit is..,1: DX1 input of the data shift unit is connected.."
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bitfld.long 0x00 3. "DCEN,Delay Compensation Enable" "0: The receive shift clock is dependent on INSW..,1: The receive shift clock is connected to the.."
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bitfld.long 0x00 0.--2. "DSEL,Data Selection for Input Signal" "0: The data input DX1A is selected,1: The data input DX1B is selected,2: The data input DX1C is selected,3: The data input DX1D is selected,4: The data input DX1E is selected,5: The data input DX1F is selected,6: The data input DX1G is selected,7: The data input of DX1 is always 1"
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|
group.long 0x24++0x03
|
|
line.long 0x00 "DX2CR,Input Control Register 2"
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|
rbitfld.long 0x00 15. "DXS,Synchronized Data Value" "0: The current value of DX2S is 0,1: The current value of DX2S is 1"
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bitfld.long 0x00 10.--11. "CM,Combination Mode" "0: The DX2 trigger activation is disabled,1: A rising edge activates DX2T,2: A falling edge activates DX2T,3: Both edges activate DX2T"
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bitfld.long 0x00 9. "SFSEL,Sampling Frequency Selection" "0: The DX2 sampling frequency is fPERIPH,1: The DX2 sampling frequency is fFD"
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|
bitfld.long 0x00 8. "DPOL,Data Polarity for DXn" "0: The DX2 input signal is not inverted,1: The DX2 input signal is inverted"
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bitfld.long 0x00 6. "DSEN,Data Synchronization Enable" "0: The un-synchronized signal can be taken as..,1: The synchronized signal can be taken as DX2.."
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|
bitfld.long 0x00 5. "DFEN,Digital Filter Enable" "0: The DX2 input signal is not digitally filtered,1: The DX2 input signal is digitally filtered"
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bitfld.long 0x00 4. "INSW,Input Switch" "0: DX2 input of the data shift unit is..,1: DX2 input of the data shift unit is connected.."
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bitfld.long 0x00 0.--2. "DSEL,Data Selection for Input Signal" "0: The data input DX2A is selected,1: The data input DX2B is selected,2: The data input DX2C is selected,3: The data input DX2D is selected,4: The data input DX2E is selected,5: The data input DX2F is selected,6: The data input DX2G is selected,7: The data input of DX2 is always 1"
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|
group.long 0x28++0x03
|
|
line.long 0x00 "DX3CR,Input Control Register 3"
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|
rbitfld.long 0x00 15. "DXS,Synchronized Data Value" "0: The current value of DX3S is 0,1: The current value of DX3S is 1"
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bitfld.long 0x00 10.--11. "CM,Combination Mode" "0: The DX3 trigger activation is disabled,1: A rising edge activates DX3T,2: A falling edge activates DX3T,3: Both edges activate DX3T"
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bitfld.long 0x00 9. "SFSEL,Sampling Frequency Selection" "0: The DX3 sampling frequency is fPERIPH,1: The DX3 sampling frequency is fFD"
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bitfld.long 0x00 8. "DPOL,Data Polarity for DXn" "0: The DX3 input signal is not inverted,1: The DX3 input signal is inverted"
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bitfld.long 0x00 6. "DSEN,Data Synchronization Enable" "0: The un-synchronized signal can be taken as..,1: The synchronized signal can be taken as DX3.."
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bitfld.long 0x00 5. "DFEN,Digital Filter Enable" "0: The DX3 input signal is not digitally filtered,1: The DX3 input signal is digitally filtered"
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bitfld.long 0x00 4. "INSW,Input Switch" "0: DX3 input of the data shift unit is..,1: DX3 input of the data shift unit is connected.."
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bitfld.long 0x00 0.--2. "DSEL,Data Selection for Input Signal" "0: The data input DX3A is selected,1: The data input DX3B is selected,2: The data input DX3C is selected,3: The data input DX3D is selected,4: The data input DX3E is selected,5: The data input DX3F is selected,6: The data input DX3G is selected,7: The data input of DX3 is always 1"
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group.long 0x2C++0x03
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line.long 0x00 "DX4CR,Input Control Register 4"
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rbitfld.long 0x00 15. "DXS,Synchronized Data Value" "0: The current value of DX4S is 0,1: The current value of DX4S is 1"
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bitfld.long 0x00 10.--11. "CM,Combination Mode" "0: The DX4 trigger activation is disabled,1: A rising edge activates DX4T,2: A falling edge activates DX4T,3: Both edges activate DX4T"
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bitfld.long 0x00 9. "SFSEL,Sampling Frequency Selection" "0: The DX4 sampling frequency is fPERIPH,1: The DX4 sampling frequency is fFD"
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bitfld.long 0x00 8. "DPOL,Data Polarity for DXn" "0: The DX4 input signal is not inverted,1: The DX4 input signal is inverted"
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bitfld.long 0x00 6. "DSEN,Data Synchronization Enable" "0: The un-synchronized signal can be taken as..,1: The synchronized signal can be taken as DX4.."
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bitfld.long 0x00 5. "DFEN,Digital Filter Enable" "0: The DX4 input signal is not digitally filtered,1: The DX4 input signal is digitally filtered"
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bitfld.long 0x00 4. "INSW,Input Switch" "0: DX4 input of the data shift unit is..,1: DX4 input of the data shift unit is connected.."
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bitfld.long 0x00 0.--2. "DSEL,Data Selection for Input Signal" "0: The data input DX4A is selected,1: The data input DX4B is selected,2: The data input DX4C is selected,3: The data input DX4D is selected,4: The data input DX4E is selected,5: The data input DX4F is selected,6: The data input DX4G is selected,7: The data input of DX4 is always 1"
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group.long 0x30++0x03
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line.long 0x00 "DX5CR,Input Control Register 5"
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rbitfld.long 0x00 15. "DXS,Synchronized Data Value" "0: The current value of DX5S is 0,1: The current value of DX5S is 1"
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bitfld.long 0x00 10.--11. "CM,Combination Mode" "0: The DX5 trigger activation is disabled,1: A rising edge activates DX5T,2: A falling edge activates DX5T,3: Both edges activate DX5T"
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bitfld.long 0x00 9. "SFSEL,Sampling Frequency Selection" "0: The DX5 sampling frequency is fPERIPH,1: The DX5 sampling frequency is fFD"
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bitfld.long 0x00 8. "DPOL,Data Polarity for DXn" "0: The DX5 input signal is not inverted,1: The DX5 input signal is inverted"
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bitfld.long 0x00 6. "DSEN,Data Synchronization Enable" "0: The un-synchronized signal can be taken as..,1: The synchronized signal can be taken as DX5.."
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bitfld.long 0x00 5. "DFEN,Digital Filter Enable" "0: The DX5 input signal is not digitally filtered,1: The DX5 input signal is digitally filtered"
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bitfld.long 0x00 4. "INSW,Input Switch" "0: DX5 input of the data shift unit is..,1: DX5 input of the data shift unit is connected.."
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bitfld.long 0x00 0.--2. "DSEL,Data Selection for Input Signal" "0: The data input DX5A is selected,1: The data input DX5B is selected,2: The data input DX5C is selected,3: The data input DX5D is selected,4: The data input DX5E is selected,5: The data input DX5F is selected,6: The data input DX5G is selected,7: The data input of DX5 is always 1"
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group.long 0x34++0x03
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line.long 0x00 "SCTR,Shift Control Register"
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bitfld.long 0x00 24.--27. "WLE,Word Length" "0: The data word contains 1 data bit located at..,1: The data word contains 2 data bits located at..,?,?,?,?,?,?,?,?,?,?,?,?,14: The data word contains 15 data bits located..,15: The data word contains 16 data bits located.."
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bitfld.long 0x00 16.--21. "FLE,Frame Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 8.--9. "TRM,Transmission Mode" "0: The shift control signal is inactive,1: The shift control signal is active at 1-level,2: The shift control signal is active at 0-level,3: The shift control signal is always active"
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bitfld.long 0x00 6.--7. "DOCFG,Data Output Configuration" "0: DOUTx = shift data value,1: DOUTx = inverted shift data value,?..."
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bitfld.long 0x00 4. "HPCDIR,Port Control Direction" "0: The pin(s) with hardware pin control enabled..,1: The pin(s) with hardware pin control enabled.."
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bitfld.long 0x00 2.--3. "DSM,Data Shift Mode" "0: Receive and transmit data is shifted in and..,?,2: Receive and transmit data is shifted in and..,3: Receive and transmit data is shifted in and.."
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bitfld.long 0x00 1. "PDL,Passive Data Level" "0: The passive data level is 0,1: The passive data level is 1"
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bitfld.long 0x00 0. "SDIR,Shift Direction" "0: Shift LSB first,1: Shift MSB first"
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group.long 0x38++0x03
|
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line.long 0x00 "TCSR,Transmit Control/Status Register"
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rbitfld.long 0x00 28. "TE,Trigger Event" "0: The trigger event has not yet been detected,1: The trigger event has been detected"
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rbitfld.long 0x00 27. "TVC,Transmission Valid Cumulated" "0: Since TVC has been set at least one data..,1: Since TVC has been set no data buffer.."
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rbitfld.long 0x00 26. "TV,Transmission Valid" "0: The latest start of a data word transmission..,1: The latest start of a data word transmission.."
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rbitfld.long 0x00 24. "TSOF,Transmitted Start Of Frame" "0: The latest data word transmission has not..,1: The latest data word transmission has been.."
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bitfld.long 0x00 13. "WA,Word Address" "0: The data word in TBUF will be transmitted..,1: The data word in TBUF will be transmitted.."
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bitfld.long 0x00 12. "TDVTR,TBUF Data Valid Trigger" "0: Bit TCSR.TE is permanently set,1: Bit TCSR.TE is set if DX2T becomes active.."
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bitfld.long 0x00 10.--11. "TDEN,TBUF Data Enable" "0: A transmission start of the data word in TBUF..,1: A transmission of the data word in TBUF can..,2: A transmission of the data word in TBUF can..,3: A transmission of the data word in TBUF can.."
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bitfld.long 0x00 8. "TDSSM,TBUF Data Single Shot Mode" "0: The data word in TBUF is not invalidated..,1: The data word in TBUF is invalidated after it.."
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rbitfld.long 0x00 7. "TDV,Transmit Data Valid" "0: The data word in TBUF is not valid for..,1: The data word in TBUF is valid for transmission"
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bitfld.long 0x00 6. "EOF,End Of Frame" "0: The data word in TBUF is not considered as..,1: The data word in TBUF is considered as last.."
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bitfld.long 0x00 5. "SOF,Start Of Frame" "0: The data word in TBUF is excluded from the..,1: The data word in TBUF is included as first.."
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bitfld.long 0x00 4. "HPCMD,Hardware Port Control Mode" "0: The automatic update of bits SCTR.DSM and..,1: The automatic update of bits SCTR.DSM and.."
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bitfld.long 0x00 3. "WAMD,WA Mode" "0: The automatic update of bit WA is disabled,1: The automatic update of bit WA is enabled"
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bitfld.long 0x00 2. "FLEMD,FLE Mode" "0: The automatic update of FLE is disabled,1: The automatic update of FLE is enabled"
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bitfld.long 0x00 1. "SELMD,Select Mode" "0: The automatic update of PCR.CTR[23 :16] is..,1: The automatic update of PCR.CTR[23 :16] is.."
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bitfld.long 0x00 0. "WLEMD,WLE Mode" "0: The automatic update of SCTR.WLE and TCSR.EOF..,1: The automatic update of SCTR.WLE and TCSR.EOF.."
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|
group.long 0x3C++0x03
|
|
line.long 0x00 "PCR,Protocol Control Register"
|
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bitfld.long 0x00 31. "CTR31,Protocol Control Bit 31" "0,1"
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bitfld.long 0x00 30. "CTR30,Protocol Control Bit 30" "0,1"
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bitfld.long 0x00 29. "CTR29,Protocol Control Bit 29" "0,1"
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bitfld.long 0x00 28. "CTR28,Protocol Control Bit 28" "0,1"
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bitfld.long 0x00 27. "CTR27,Protocol Control Bit 27" "0,1"
|
|
bitfld.long 0x00 26. "CTR26,Protocol Control Bit 26" "0,1"
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bitfld.long 0x00 25. "CTR25,Protocol Control Bit 25" "0,1"
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|
bitfld.long 0x00 24. "CTR24,Protocol Control Bit 24" "0,1"
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bitfld.long 0x00 23. "CTR23,Protocol Control Bit 23" "0,1"
|
|
bitfld.long 0x00 22. "CTR22,Protocol Control Bit 22" "0,1"
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bitfld.long 0x00 21. "CTR21,Protocol Control Bit 21" "0,1"
|
|
bitfld.long 0x00 20. "CTR20,Protocol Control Bit 20" "0,1"
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bitfld.long 0x00 19. "CTR19,Protocol Control Bit 19" "0,1"
|
|
bitfld.long 0x00 18. "CTR18,Protocol Control Bit 18" "0,1"
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bitfld.long 0x00 17. "CTR17,Protocol Control Bit 17" "0,1"
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|
bitfld.long 0x00 16. "CTR16,Protocol Control Bit 16" "0,1"
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bitfld.long 0x00 15. "CTR15,Protocol Control Bit 15" "0,1"
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bitfld.long 0x00 14. "CTR14,Protocol Control Bit 14" "0,1"
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bitfld.long 0x00 13. "CTR13,Protocol Control Bit 13" "0,1"
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|
bitfld.long 0x00 12. "CTR12,Protocol Control Bit 12" "0,1"
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bitfld.long 0x00 11. "CTR11,Protocol Control Bit 11" "0,1"
|
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bitfld.long 0x00 10. "CTR10,Protocol Control Bit 10" "0,1"
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bitfld.long 0x00 9. "CTR9,Protocol Control Bit 9" "0,1"
|
|
bitfld.long 0x00 8. "CTR8,Protocol Control Bit 8" "0,1"
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bitfld.long 0x00 7. "CTR7,Protocol Control Bit 7" "0,1"
|
|
bitfld.long 0x00 6. "CTR6,Protocol Control Bit 6" "0,1"
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bitfld.long 0x00 5. "CTR5,Protocol Control Bit 5" "0,1"
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bitfld.long 0x00 4. "CTR4,Protocol Control Bit 4" "0,1"
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bitfld.long 0x00 3. "CTR3,Protocol Control Bit 3" "0,1"
|
|
bitfld.long 0x00 2. "CTR2,Protocol Control Bit 2" "0,1"
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bitfld.long 0x00 1. "CTR1,Protocol Control Bit 1" "0,1"
|
|
bitfld.long 0x00 0. "CTR0,Protocol Control Bit 0" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "PCR_ASCMode,Protocol Control Register [ASC Mode]"
|
|
bitfld.long 0x00 31. "MCLK,Master Clock Enable" "0: The MCLK generation in ASC mode is disabled..,1: The MCLK generation in ASC mode is enabled"
|
|
bitfld.long 0x00 17. "TSTEN,Transmitter Status Enable" "0: Flag PSR[9] is not modified depending on the..,1: Flag PSR[9] is set during the complete.."
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bitfld.long 0x00 16. "RSTEN,Receiver Status Enable" "0: Flag PSR[9] is not modified depending on the..,1: Flag PSR[9] is set during the complete.."
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bitfld.long 0x00 13.--15. "PL,Pulse Length" "0: The pulse length is equal to the bit length..,1: The pulse length of a 0 bit is 2 time quanta,2: The pulse length of a 0 bit is 3 time quanta,?,?,?,?,7: The pulse length of a 0 bit is 8 time quanta"
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bitfld.long 0x00 8.--12. "SP,Sample Point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 7. "FFIEN,Frame Finished Interrupt Enable" "0: The interrupt generation is disabled,1: The interrupt generation is enabled"
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bitfld.long 0x00 6. "FEIEN,Format Error Interrupt Enable" "0: The interrupt generation is disabled,1: The interrupt generation is enabled"
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bitfld.long 0x00 5. "RNIEN,Receiver Noise Detection Interrupt Enable" "0: The interrupt generation is disabled,1: The interrupt generation is enabled"
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bitfld.long 0x00 4. "CDEN,Collision Detection Enable" "0: The collision detection is disabled,1: The collision detection is enabled"
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bitfld.long 0x00 3. "SBIEN,Synchronization Break Interrupt Enable" "0: The interrupt generation is disabled,1: The interrupt generation is enabled"
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bitfld.long 0x00 2. "IDM,Idle Detection Mode" "0: The bus idle detection is switched off and..,1: The bus is considered as idle after a number.."
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bitfld.long 0x00 1. "STPB,Stop Bits" "0: The number of stop bits is 1,1: The number of stop bits is 2"
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bitfld.long 0x00 0. "SMD,Sample Mode" "0: Only one sample is taken per bit time,1: Three samples are taken per bit time"
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group.long 0x3C++0x03
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line.long 0x00 "PCR_SSCMode,Protocol Control Register [SSC Mode]"
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bitfld.long 0x00 31. "MCLK,Master Clock Enable" "0: The MCLK generation in SSC mode is disabled..,1: The MCLK generation in SSC mode is enabled"
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bitfld.long 0x00 25. "SLPHSEL,Slave Mode Clock Phase Select" "0: Data bits are shifted out with the leading..,1: The first data bit is shifted out when the.."
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bitfld.long 0x00 24. "TIWEN,Enable Inter-Word Delay Tiw" "0: No delay between data words of the same frame,1: The inter-word delay Tiw is enabled and.."
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hexmask.long.byte 0x00 16.--23. 1. "SELO,Select Output"
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bitfld.long 0x00 15. "DX2TIEN,DX2T Interrupt Enable" "0: A protocol interrupt is not generated if DX2T..,1: A protocol interrupt is generated if DX2T is.."
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bitfld.long 0x00 14. "MSLSIEN,MSLS Interrupt Enable" "0: A protocol interrupt is not generated if a..,1: A protocol interrupt is generated if a change.."
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bitfld.long 0x00 13. "PARIEN,Parity Error Interrupt Enable" "0: A protocol interrupt is not generated with..,1: A protocol interrupt is generated with the.."
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bitfld.long 0x00 8.--12. "DCTQ1,Divider Factor DCTQ1 for Tiw and Tnf" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 6.--7. "PCTQ1,Divider Factor PCTQ1 for Tiw and Tnf" "0,1,2,3"
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bitfld.long 0x00 4.--5. "CTQSEL1,Input Frequency Selection" "0: fCTQIN = fPDIV,1: fCTQIN = fPPP,2: fCTQIN = fSCLK,3: fCTQIN = fMCLK"
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bitfld.long 0x00 3. "FEM,Frame End Mode" "0: The current data frame is considered as..,1: The MSLS signal is kept active also while no.."
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bitfld.long 0x00 2. "SELINV,Select Inversion" "0: The SELO outputs have the same polarity as..,1: The SELO outputs have the inverted polarity.."
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bitfld.long 0x00 1. "SELCTR,Select Control" "0: The coded select mode is enabled,1: The direct select mode is enabled"
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bitfld.long 0x00 0. "MSLSEN,MSLS Enable" "0: SSC slave mode (MSLS disabled),1: SSC master mode (MSLS enabled)"
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group.long 0x3C++0x03
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line.long 0x00 "PCR_IICMode,Protocol Control Register [IIC Mode]"
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bitfld.long 0x00 31. "MCLK,Master Clock Enable" "0: The MCLK generation in IIC mode is disabled..,1: The MCLK generation in IIC mode is enabled"
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bitfld.long 0x00 30. "ACKIEN,Acknowledge Interrupt Enable" "0: The acknowledge interrupt is disabled,1: The acknowledge interrupt is enabled"
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bitfld.long 0x00 26.--29. "HDEL,Hardware Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 25. "SACKDIS,Slave Acknowledge Disable" "0: The generation of an active slave acknowledge..,1: The generation of an active slave acknowledge.."
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bitfld.long 0x00 24. "ERRIEN,Error Interrupt Enable" "0: The error interrupt is disabled,1: The error interrupt is enabled"
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bitfld.long 0x00 23. "SRRIEN,Slave Read Request Interrupt Enable" "0: The slave read request interrupt is disabled,1: The slave read request interrupt is enabled"
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bitfld.long 0x00 22. "ARLIEN,Arbitration Lost Interrupt Enable" "0: The arbitration lost interrupt is disabled,1: The arbitration lost interrupt is enabled"
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bitfld.long 0x00 21. "NACKIEN,Non-Acknowledge Interrupt Enable" "0: The non-acknowledge interrupt is disabled,1: The non-acknowledge interrupt is enabled"
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bitfld.long 0x00 20. "PCRIEN,Stop Condition Received Interrupt Enable" "0: The stop condition interrupt is disabled,1: The stop condition interrupt is enabled"
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bitfld.long 0x00 19. "RSCRIEN,Repeated Start Condition Received Interrupt Enable" "0: The repeated start condition interrupt is..,1: The repeated start condition interrupt is.."
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bitfld.long 0x00 18. "SCRIEN,Start Condition Received Interrupt Enable" "0: The start condition interrupt is disabled,1: The start condition interrupt is enabled"
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bitfld.long 0x00 17. "STIM,Symbol Timing" "0: 100 kBaud (10 time quanta),1: 400 kBaud (25 time quanta)"
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bitfld.long 0x00 16. "ACK00,Acknowledge 00H" "0: The slave device is not sensitive to this..,1: The slave device is sensitive to this address"
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hexmask.long.word 0x00 0.--15. 1. "SLAD,Slave Address"
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group.long 0x40++0x03
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line.long 0x00 "CCR,Channel Control Register"
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bitfld.long 0x00 16. "BRGIEN,Baud Rate Generator Interrupt Enable" "0: The baud rate generator interrupt is disabled,1: The baud rate generator interrupt is enabled"
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bitfld.long 0x00 15. "AIEN,Alternative Receive Interrupt Enable" "0: The alternative receive interrupt is disabled,1: The alternative receive interrupt is enabled"
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bitfld.long 0x00 14. "RIEN,Receive Interrupt Enable" "0: The receive interrupt is disabled,1: The receive interrupt is enabled"
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bitfld.long 0x00 13. "TBIEN,Transmit Buffer Interrupt Enable" "0: The transmit buffer interrupt is disabled,1: The transmit buffer interrupt is enabled"
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bitfld.long 0x00 12. "TSIEN,Transmit Shift Interrupt Enable" "0: The transmit shift interrupt is disabled,1: The transmit shift interrupt is enabled"
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bitfld.long 0x00 11. "DLIEN,Data Lost Interrupt Enable" "0: The data lost interrupt is disabled,1: The data lost interrupt is enabled"
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bitfld.long 0x00 10. "RSIEN,Receiver Start Interrupt Enable" "0: The receiver start interrupt is disabled,1: The receiver start interrupt is enabled"
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bitfld.long 0x00 8.--9. "PM,Parity Mode" "0: The parity generation is disabled,?,2: Even parity is selected (parity bit = 1 on..,3: Odd parity is selected (parity bit = 0 on odd.."
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bitfld.long 0x00 6.--7. "HPCEN,Hardware Port Control Enable" "0: The hardware port control is disabled,1: The hardware port control is enabled for DX0..,2: The hardware port control is enabled for DX3..,3: The hardware port control is enabled for DX0.."
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bitfld.long 0x00 0.--3. "MODE,Operating Mode" "0: The USIC channel is disabled,1: The SSC (SPI) protocol is selected,2: The ASC (SCI UART) protocol is selected,3: The IIS protocol is selected,4: The IIC protocol is selected,?..."
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group.long 0x44++0x03
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line.long 0x00 "CMTR,Capture Mode Timer Register"
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hexmask.long.word 0x00 0.--9. 1. "CTV,Captured Timer Value"
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group.long 0x48++0x03
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line.long 0x00 "PSR,Protocol Status Register"
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bitfld.long 0x00 16. "BRGIF,Baud Rate Generator Indication Flag" "0: A baud rate generator event has not occurred,1: A baud rate generator event has occurred"
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bitfld.long 0x00 15. "AIF,Alternative Receive Indication Flag" "0: An alternative receive event has not occurred,1: An alternative receive event has occurred"
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bitfld.long 0x00 14. "RIF,Receive Indication Flag" "0: A receive event has not occurred,1: A receive event has occurred"
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bitfld.long 0x00 13. "TBIF,Transmit Buffer Indication Flag" "0: A transmit buffer event has not occurred,1: A transmit buffer event has occurred"
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bitfld.long 0x00 12. "TSIF,Transmit Shift Indication Flag" "0: A transmit shift event has not occurred,1: A transmit shift event has occurred"
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bitfld.long 0x00 11. "DLIF,Data Lost Indication Flag" "0: A data lost event has not occurred,1: A data lost event has occurred"
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bitfld.long 0x00 10. "RSIF,Receiver Start Indication Flag" "0: A receiver start event has not occurred,1: A receiver start event has occurred"
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bitfld.long 0x00 9. "ST9,Protocol Status Flag 9" "0,1"
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bitfld.long 0x00 8. "ST8,Protocol Status Flag 8" "0,1"
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bitfld.long 0x00 7. "ST7,Protocol Status Flag 7" "0,1"
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bitfld.long 0x00 6. "ST6,Protocol Status Flag 6" "0,1"
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bitfld.long 0x00 5. "ST5,Protocol Status Flag 5" "0,1"
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bitfld.long 0x00 4. "ST4,Protocol Status Flag 4" "0,1"
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bitfld.long 0x00 3. "ST3,Protocol Status Flag 3" "0,1"
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bitfld.long 0x00 2. "ST2,Protocol Status Flag 2" "0,1"
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bitfld.long 0x00 1. "ST1,Protocol Status Flag 1" "0,1"
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bitfld.long 0x00 0. "ST0,Protocol Status Flag 0" "0,1"
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group.long 0x48++0x03
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line.long 0x00 "PSR_ASCMode,Protocol Status Register [ASC Mode]"
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bitfld.long 0x00 16. "BRGIF,Baud Rate Generator Indication Flag" "0: A baud rate generator event in ASC mode has..,1: A baud rate generator event in ASC mode has.."
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bitfld.long 0x00 15. "AIF,Alternative Receive Indication Flag" "0: An alternative receive event in ASC mode has..,1: An alternative receive event in ASC mode has.."
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bitfld.long 0x00 14. "RIF,Receive Indication Flag" "0: A receive event in ASC mode has not occurred,1: A receive event in ASC mode has occurred"
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bitfld.long 0x00 13. "TBIF,Transmit Buffer Indication Flag" "0: A transmit buffer event in ASC mode has not..,1: A transmit buffer event in ASC mode has.."
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bitfld.long 0x00 12. "TSIF,Transmit Shift Indication Flag" "0: A transmit shift event in ASC mode has not..,1: A transmit shift event in ASC mode has occurred"
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bitfld.long 0x00 11. "DLIF,Data Lost Indication Flag" "0: A data lost event in ASC mode has not occurred,1: A data lost event in ASC mode has occurred"
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bitfld.long 0x00 10. "RSIF,Receiver Start Indication Flag" "0: A receiver start event in ASC mode has not..,1: A receiver start event in ASC mode has occurred"
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rbitfld.long 0x00 9. "BUSY,Transfer Status BUSY" "0: A data transfer does not take place,1: A data transfer currently takes place"
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bitfld.long 0x00 8. "TFF,Transmitter Frame Finished" "0: The transmitter frame is not yet finished,1: The transmitter frame is finished"
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bitfld.long 0x00 7. "RFF,Receive Frame Finished" "0: The received frame is not yet finished,1: The received frame is finished"
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bitfld.long 0x00 6. "FER1,Format Error in Stop Bit 1" "0: A format error 1 has not been detected,1: A format error 1 has been detected"
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bitfld.long 0x00 5. "FER0,Format Error in Stop Bit 0" "0: A format error 0 has not been detected,1: A format error 0 has been detected"
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bitfld.long 0x00 4. "RNS,Receiver Noise Detected" "0: Receiver noise has not been detected,1: Receiver noise has been detected"
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bitfld.long 0x00 3. "COL,Collision Detected" "0: A collision has not yet been detected and..,1: A collision has been detected and frame.."
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bitfld.long 0x00 2. "SBD,Synchronization Break Detected" "0: A synchronization break has not yet been..,1: A synchronization break has been detected"
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bitfld.long 0x00 1. "RXIDLE,Reception Idle" "0: The receiver line has not yet been idle,1: The receiver line has been idle and frame.."
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bitfld.long 0x00 0. "TXIDLE,Transmission Idle" "0: The transmitter line has not yet been idle,1: The transmitter line has been idle and frame.."
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group.long 0x48++0x03
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line.long 0x00 "PSR_SSCMode,Protocol Status Register [SSC Mode]"
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bitfld.long 0x00 16. "BRGIF,Baud Rate Generator Indication Flag" "0: A baud rate generator event in SSC mode has..,1: A baud rate generator event in SSC mode has.."
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bitfld.long 0x00 15. "AIF,Alternative Receive Indication Flag" "0: An alternative receive event in SSC mode has..,1: An alternative receive event in SSC mode has.."
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bitfld.long 0x00 14. "RIF,Receive Indication Flag" "0: A receive event in SSC mode has not occurred,1: A receive event in SSC mode has occurred"
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bitfld.long 0x00 13. "TBIF,Transmit Buffer Indication Flag" "0: A transmit buffer event in SSC mode has not..,1: A transmit buffer event in SSC mode has.."
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bitfld.long 0x00 12. "TSIF,Transmit Shift Indication Flag" "0: A transmit shift event in SSC mode has not..,1: A transmit shift event in SSC mode has occurred"
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bitfld.long 0x00 11. "DLIF,Data Lost Indication Flag" "0: A data lost event in SSC mode has not occurred,1: A data lost event in SSC mode has occurred"
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bitfld.long 0x00 10. "RSIF,Receiver Start Indication Flag" "0: A receiver start event in SSC mode has not..,1: A receiver start event in SSC mode has occurred"
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bitfld.long 0x00 4. "PARERR,Parity Error Event Detected" "0: A parity error event has not been activated,1: A parity error event has been activated"
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bitfld.long 0x00 3. "DX2TEV,DX2T Event Detected" "0: The DX2T signal has not been activated,1: The DX2T signal has been activated"
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bitfld.long 0x00 2. "MSLSEV,MSLS Event Detected" "0: The MSLS signal has not changed its state,1: The MSLS signal has changed its state"
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bitfld.long 0x00 1. "DX2S,DX2S Status" "0: DX2S is 0,1: DX2S is 1"
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bitfld.long 0x00 0. "MSLS,MSLS Status" "0: The internal signal MSLS is inactive (0),1: The internal signal MSLS is active (1)"
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group.long 0x48++0x03
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line.long 0x00 "PSR_IICMode,Protocol Status Register [IIC Mode]"
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bitfld.long 0x00 16. "BRGIF,Baud Rate Generator Indication Flag" "0: A baud rate generator event in IIC mode has..,1: A baud rate generator event in IIC mode has.."
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bitfld.long 0x00 15. "AIF,Alternative Receive Indication Flag" "0: An alternative receive event in IIC mode has..,1: An alternative receive event in IIC mode has.."
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bitfld.long 0x00 14. "RIF,Receive Indication Flag" "0: A receive event in IIC mode has not occurred,1: A receive event in IIC mode has occurred"
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bitfld.long 0x00 13. "TBIF,Transmit Buffer Indication Flag" "0: A transmit buffer event in IIC mode has not..,1: A transmit buffer event in IIC mode has.."
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bitfld.long 0x00 12. "TSIF,Transmit Shift Indication Flag" "0: A transmit shift event in IIC mode has not..,1: A transmit shift event in IIC mode has occurred"
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bitfld.long 0x00 11. "DLIF,Data Lost Indication Flag" "0: A data lost event in IIC mode has not occurred,1: A data lost event in IIC mode has occurred"
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bitfld.long 0x00 10. "RSIF,Receiver Start Indication Flag" "0: A receiver start event in IIC mode has not..,1: A receiver start event in IIC mode has occurred"
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bitfld.long 0x00 9. "ACK,Acknowledge Received" "0: An acknowledge has not been received,1: An acknowledge has been received"
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bitfld.long 0x00 8. "ERR,Error" "0: An IIC error has not been detected,1: An IIC error has been detected"
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bitfld.long 0x00 7. "SRR,Slave Read Request" "0: A slave read request has not been detected,1: A slave read request has been detected"
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bitfld.long 0x00 6. "ARL,Arbitration Lost" "0: An arbitration has not been lost,1: An arbitration has been lost"
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bitfld.long 0x00 5. "NACK,Non-Acknowledge Received" "0: A non-acknowledge has not been received,1: A non-acknowledge has been received"
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bitfld.long 0x00 4. "PCR,Stop Condition Received" "0: A stop condition has not yet been detected,1: A stop condition has been detected"
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bitfld.long 0x00 3. "RSCR,Repeated Start Condition Received" "0: A repeated start condition has not yet been..,1: A repeated start condition has been detected"
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bitfld.long 0x00 2. "SCR,Start Condition Received" "0: A start condition has not yet been detected,1: A start condition has been detected"
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bitfld.long 0x00 1. "WTDF,Wrong TDF Code Found" "0: A wrong TDF code has not been found,1: A wrong TDF code has been found"
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bitfld.long 0x00 0. "SLSEL,Slave Select" "0: The device is not selected as slave,1: The device is selected as slave"
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group.long 0x48++0x03
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line.long 0x00 "PSR_IISMode,Protocol Status Register [IIS Mode]"
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bitfld.long 0x00 16. "BRGIF,Baud Rate Generator Indication Flag" "0: A baud rate generator event in IIS mode has..,1: A baud rate generator event in IIS mode has.."
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bitfld.long 0x00 15. "AIF,Alternative Receive Indication Flag" "0: An alternative receive event in IIS mode has..,1: An alternative receive event in IIS mode has.."
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bitfld.long 0x00 14. "RIF,Receive Indication Flag" "0: A receive event in IIS mode has not occurred,1: A receive event in IIS mode has occurred"
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bitfld.long 0x00 13. "TBIF,Transmit Buffer Indication Flag" "0: A transmit buffer event in IIS mode has not..,1: A transmit buffer event in IIS mode has.."
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bitfld.long 0x00 12. "TSIF,Transmit Shift Indication Flag" "0: A transmit shift event in IIS mode has not..,1: A transmit shift event in IIS mode has occurred"
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bitfld.long 0x00 11. "DLIF,Data Lost Indication Flag" "0: A data lost event in IIS mode has not occurred,1: A data lost event in IIS mode has occurred"
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bitfld.long 0x00 10. "RSIF,Receiver Start Indication Flag" "0: A receiver start event in IIS mode has not..,1: A receiver start event in IIS mode has occurred"
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bitfld.long 0x00 6. "END,WA Generation End" "0: The WA generation has not yet ended (if it is..,1: The WA generation has ended (if it has been.."
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bitfld.long 0x00 5. "WARE,WA Rising Edge Event" "0: A WA rising edge has not been generated,1: A WA rising edge has been generated"
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bitfld.long 0x00 4. "WAFE,WA Falling Edge Event" "0: A WA falling edge has not been generated,1: A WA falling edge has been generated"
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bitfld.long 0x00 3. "DX2TEV,DX2T Event Detected" "0: The DX2T signal in IIS mode has not been..,1: The DX2T signal in IIS mode has been activated"
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bitfld.long 0x00 1. "DX2S,DX2S Status" "0: DX2S in IIS mode is 0,1: DX2S in IIS mode is 1"
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bitfld.long 0x00 0. "WA,Word Address" "0: WA has been sampled 0,1: WA has been sampled 1"
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group.long 0x4C++0x03
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line.long 0x00 "PSCR,Protocol Status Clear Register"
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bitfld.long 0x00 16. "CBRGIF,Clear Baud Rate Generator Indication Flag" "0: No action,1: Flag PSR.BRGIF is cleared"
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bitfld.long 0x00 15. "CAIF,Clear Alternative Receive Indication Flag" "0: No action,1: Flag PSR.AIF is cleared"
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bitfld.long 0x00 14. "CRIF,Clear Receive Indication Flag" "0: No action,1: Flag PSR.RIF is cleared"
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bitfld.long 0x00 13. "CTBIF,Clear Transmit Buffer Indication Flag" "0: No action,1: Flag PSR.TBIF is cleared"
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bitfld.long 0x00 12. "CTSIF,Clear Transmit Shift Indication Flag" "0: No action,1: Flag PSR.TSIF is cleared"
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bitfld.long 0x00 11. "CDLIF,Clear Data Lost Indication Flag" "0: No action,1: Flag PSR.DLIF is cleared"
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bitfld.long 0x00 10. "CRSIF,Clear Receiver Start Indication Flag" "0: No action,1: Flag PSR.RSIF is cleared"
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bitfld.long 0x00 9. "CST9,Clear Status Flag 9 in PSR" "0: No action,1: Flag PSR.STx is cleared"
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bitfld.long 0x00 8. "CST8,Clear Status Flag 8 in PSR" "0: No action,1: Flag PSR.STx is cleared"
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bitfld.long 0x00 7. "CST7,Clear Status Flag 7 in PSR" "0: No action,1: Flag PSR.STx is cleared"
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bitfld.long 0x00 6. "CST6,Clear Status Flag 6 in PSR" "0: No action,1: Flag PSR.STx is cleared"
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bitfld.long 0x00 5. "CST5,Clear Status Flag 5 in PSR" "0: No action,1: Flag PSR.STx is cleared"
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bitfld.long 0x00 4. "CST4,Clear Status Flag 4 in PSR" "0: No action,1: Flag PSR.STx is cleared"
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bitfld.long 0x00 3. "CST3,Clear Status Flag 3 in PSR" "0: No action,1: Flag PSR.STx is cleared"
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bitfld.long 0x00 2. "CST2,Clear Status Flag 2 in PSR" "0: No action,1: Flag PSR.STx is cleared"
|
|
bitfld.long 0x00 1. "CST1,Clear Status Flag 1 in PSR" "0: No action,1: Flag PSR.STx is cleared"
|
|
newline
|
|
bitfld.long 0x00 0. "CST0,Clear Status Flag 0 in PSR" "0: No action,1: Flag PSR.STx is cleared"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "RBUFSR,Receiver Buffer Status Register"
|
|
rbitfld.long 0x00 15. "DS,Data Source of RBUF or RBUFD" "0,1"
|
|
rbitfld.long 0x00 14. "RDV1,Receive Data Valid RVD1 in RBUF or RBUFD" "0,1"
|
|
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|
|
rbitfld.long 0x00 13. "RDV0,Receive Data Valid RVD0 in RBUF or RBUFD" "0,1"
|
|
rbitfld.long 0x00 9. "PERR,Protocol-related Error in RBUF or RBUFD" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 8. "PAR,Protocol-Related Argument in RBUF or RBUFD" "0,1"
|
|
rbitfld.long 0x00 6. "SOF,Start of Frame in RBUF or RBUFD" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 0.--3. "WLEN,Received Data Word Length in RBUF or RBUFD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "RBUF,Receiver Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DSR,Received Data"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "RBUFD,Receiver Buffer Register for Debugger"
|
|
hexmask.long.word 0x00 0.--15. 1. "DSR,Data from Shift Register"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "RBUF0,Receiver Buffer Register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "DSR0,Data of Shift Registers 0[3:0]"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "RBUF1,Receiver Buffer Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "DSR1,Data of Shift Registers 1[3:0]"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "RBUF01SR,Receiver Buffer 01 Status Register"
|
|
rbitfld.long 0x00 31. "DS1,Data Source DS1" "0: The register RBUF contains the data of RBUF0..,1: The register RBUF contains the data of RBUF1.."
|
|
rbitfld.long 0x00 30. "RDV11,Receive Data Valid RVD11 in RBUF1" "0: Register RBUF1 does not contain data that has..,1: Register RBUF1 contains data that has not yet.."
|
|
newline
|
|
rbitfld.long 0x00 29. "RDV10,Receive Data Valid RVD10 in RBUF0" "0: Register RBUF0 does not contain data that has..,1: Register RBUF0 contains data that has not yet.."
|
|
rbitfld.long 0x00 25. "PERR1,Protocol-related Error in RBUF1" "0: The received protocol-related argument PAR..,1: The received protocol-related argument PAR.."
|
|
newline
|
|
rbitfld.long 0x00 24. "PAR1,Protocol-Related Argument in RBUF1" "0,1"
|
|
rbitfld.long 0x00 22. "SOF1,Start of Frame in RBUF1" "0: The data in RBUF1 has not been the first data..,1: The data in RBUF1 has been the first data.."
|
|
newline
|
|
rbitfld.long 0x00 16.--19. "WLEN1,Received Data Word Length in RBUF1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 15. "DS0,Data Source DS0" "0: The register RBUF contains the data of RBUF0..,1: The register RBUF contains the data of RBUF1.."
|
|
newline
|
|
rbitfld.long 0x00 14. "RDV01,Receive Data Valid RVD01 in RBUF1" "0: Register RBUF1 does not contain data that has..,1: Register RBUF1 contains data that has not yet.."
|
|
rbitfld.long 0x00 13. "RDV00,Receive Data Valid RVD00 in RBUF0" "0: Register RBUF0 does not contain data that has..,1: Register RBUF0 contains data that has not yet.."
|
|
newline
|
|
rbitfld.long 0x00 9. "PERR0,Protocol-related Error in RBUF0" "0: The received protocol-related argument PAR..,1: The received protocol-related argument PAR.."
|
|
rbitfld.long 0x00 8. "PAR0,Protocol-Related Argument in RBUF0" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 6. "SOF0,Start of Frame in RBUF0" "0: The data in RBUF0 has not been the first data..,1: The data in RBUF0 has been the first data.."
|
|
rbitfld.long 0x00 0.--3. "WLEN0,Received Data Word Length in RBUF0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "FMR,Flag Modification Register"
|
|
bitfld.long 0x00 21. "SIO5,Set Interrupt Output SR5" "0: No action,1: The service request output SRx is activated"
|
|
bitfld.long 0x00 20. "SIO4,Set Interrupt Output SR4" "0: No action,1: The service request output SRx is activated"
|
|
newline
|
|
bitfld.long 0x00 19. "SIO3,Set Interrupt Output SR3" "0: No action,1: The service request output SRx is activated"
|
|
bitfld.long 0x00 18. "SIO2,Set Interrupt Output SR2" "0: No action,1: The service request output SRx is activated"
|
|
newline
|
|
bitfld.long 0x00 17. "SIO1,Set Interrupt Output SR1" "0: No action,1: The service request output SRx is activated"
|
|
bitfld.long 0x00 16. "SIO0,Set Interrupt Output SR0" "0: No action,1: The service request output SRx is activated"
|
|
newline
|
|
bitfld.long 0x00 15. "CRDV1,Clear Bit RDV for RBUF1" "0: No action,1: Bits RBUF01SR.RDV01 and RBUF01SR.RDV11 are.."
|
|
bitfld.long 0x00 14. "CRDV0,Clear Bits RDV for RBUF0" "0: No action,1: Bits RBUF01SR.RDV00 and RBUF01SR.RDV10 are.."
|
|
newline
|
|
bitfld.long 0x00 4. "ATVC,Activate Bit TVC" "0: No action,1: Bit TCSR.TVC is set"
|
|
bitfld.long 0x00 0.--1. "MTDV,Modify Transmit Data Valid" "0: No action,1: Bit TDV is set TE is unchanged,2: Bits TDV and TE are cleared,?..."
|
|
repeat 32. (increment 0 1) (increment 0 0x4)
|
|
group.long ($2+0x80)++0x03
|
|
line.long 0x00 "TBUF[$1],Transmit Buffer $1"
|
|
hexmask.long.word 0x00 0.--15. 1. "TDATA,Transmit Data"
|
|
repeat.end
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "BYP,Bypass Data Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "BDATA,Bypass Data"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "BYPCR,Bypass Control Register"
|
|
bitfld.long 0x00 21.--23. "BHPC,Bypass Hardware Port Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--20. "BSELO,Bypass Select Outputs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
rbitfld.long 0x00 15. "BDV,Bypass Data Valid" "0: The bypass data is not valid,1: The bypass data is valid"
|
|
bitfld.long 0x00 13. "BPRIO,Bypass Priority" "0: The transmit FIFO data has a higher priority..,1: The bypass data has a higher priority than.."
|
|
newline
|
|
bitfld.long 0x00 12. "BDVTR,Bypass Data Valid Trigger" "0: Bit BDV is not influenced by DX2T,1: Bit BDV is set if DX2T is active"
|
|
bitfld.long 0x00 10.--11. "BDEN,Bypass Data Enable" "0: The transfer of bypass data is disabled,1: The transfer of bypass data to TBUF is possible,2: Gated bypass data transfer is enabled,3: Gated bypass data transfer is enabled"
|
|
newline
|
|
bitfld.long 0x00 8. "BDSSM,Bypass Data Single Shot Mode" "0: The bypass data is still considered as valid..,1: The bypass data is considered as invalid.."
|
|
bitfld.long 0x00 0.--3. "BWLE,Bypass Word Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "TBCTR,Transmitter Buffer Control Register"
|
|
bitfld.long 0x00 31. "TBERIEN,Transmit Buffer Error Interrupt Enable" "0: The transmit buffer error interrupt..,1: The transmit buffer error interrupt.."
|
|
bitfld.long 0x00 30. "STBIEN,Standard Transmit Buffer Interrupt Enable" "0: The standard transmit buffer interrupt..,1: The standard transmit buffer interrupt.."
|
|
newline
|
|
bitfld.long 0x00 28. "LOF,Buffer Event on Limit Overflow" "0: A standard transmit buffer event occurs when..,1: A standard transmit buffer interrupt event.."
|
|
bitfld.long 0x00 24.--26. "SIZE,Buffer Size" "0: The transmit FIFO mechanism is disabled,1: The transmit FIFO buffer contains 2 entries,2: The transmit FIFO buffer contains 4 entries,3: The transmit FIFO buffer contains 8 entries,4: The transmit FIFO buffer contains 16 entries,5: The transmit FIFO buffer contains 32 entries,6: The transmit FIFO buffer contains 64 entries,?..."
|
|
newline
|
|
bitfld.long 0x00 19.--21. "ATBINP,Alternative Transmit Buffer Interrupt Node Pointer" "0: Output SR0 becomes activated,1: Output SR1 becomes activated,2: Output SR2 becomes activated,3: Output SR3 becomes activated,4: Output SR4 becomes activated,5: Output SR5 becomes activated,?..."
|
|
bitfld.long 0x00 16.--18. "STBINP,Standard Transmit Buffer Interrupt Node Pointer" "0: Output SR0 becomes activated,1: Output SR1 becomes activated,2: Output SR2 becomes activated,3: Output SR3 becomes activated,4: Output SR4 becomes activated,5: Output SR5 becomes activated,?..."
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|
newline
|
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bitfld.long 0x00 15. "STBTEN,Standard Transmit Buffer Trigger Enable" "0: The standard transmit buffer event trigger..,1: The standard transmit buffer event trigger.."
|
|
bitfld.long 0x00 14. "STBTM,Standard Transmit Buffer Trigger Mode" "0: Trigger mode 0,1: Trigger mode 1"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "LIMIT,Limit For Interrupt Generation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. "DPTR,Data Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "RBCTR,Receiver Buffer Control Register"
|
|
bitfld.long 0x00 31. "RBERIEN,Receive Buffer Error Interrupt Enable" "0: The receive buffer error interrupt generation..,1: The receive buffer error interrupt generation.."
|
|
bitfld.long 0x00 30. "SRBIEN,Standard Receive Buffer Interrupt Enable" "0: The standard receive buffer interrupt..,1: The standard receive buffer interrupt.."
|
|
newline
|
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bitfld.long 0x00 29. "ARBIEN,Alternative Receive Buffer Interrupt Enable" "0: The alternative receive buffer interrupt..,1: The alternative receive buffer interrupt.."
|
|
bitfld.long 0x00 28. "LOF,Buffer Event on Limit Overflow" "0: A standard receive buffer event occurs when..,1: A standard receive buffer event occurs when.."
|
|
newline
|
|
bitfld.long 0x00 27. "RNM,Receiver Notification Mode" "0: Filling level mode,1: RCI mode"
|
|
bitfld.long 0x00 24.--26. "SIZE,Buffer Size" "0: The receive FIFO mechanism is disabled,1: The receive FIFO buffer contains 2 entries,2: The receive FIFO buffer contains 4 entries,3: The receive FIFO buffer contains 8 entries,4: The receive FIFO buffer contains 16 entries,5: The receive FIFO buffer contains 32 entries,6: The receive FIFO buffer contains 64 entries,?..."
|
|
newline
|
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bitfld.long 0x00 22.--23. "RCIM,Receiver Control Information Mode" "0: RCI[4] = PERR RCI[3:0] = WLEN,1: RCI[4] = SOF RCI[3:0] = WLEN,2: RCI[4] = 0 RCI[3:0] = WLEN,3: RCI[4] = PERR RCI[3] = PAR RCI[2:1] = 00B.."
|
|
bitfld.long 0x00 19.--21. "ARBINP,Alternative Receive Buffer Interrupt Node Pointer" "0: Output SR0 becomes activated,1: Output SR1 becomes activated,2: Output SR2 becomes activated,3: Output SR3 becomes activated,4: Output SR4 becomes activated,5: Output SR5 becomes activated,?..."
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|
newline
|
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bitfld.long 0x00 16.--18. "SRBINP,Standard Receive Buffer Interrupt Node Pointer" "0: Output SR0 becomes activated,1: Output SR1 becomes activated,2: Output SR2 becomes activated,3: Output SR3 becomes activated,4: Output SR4 becomes activated,5: Output SR5 becomes activated,?..."
|
|
bitfld.long 0x00 15. "SRBTEN,Standard Receive Buffer Trigger Enable" "0: The standard receive buffer event trigger..,1: The standard receive buffer event trigger.."
|
|
newline
|
|
bitfld.long 0x00 14. "SRBTM,Standard Receive Buffer Trigger Mode" "0: Trigger mode 0,1: Trigger mode 1"
|
|
bitfld.long 0x00 8.--13. "LIMIT,Limit For Interrupt Generation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "DPTR,Data Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "TRBPTR,Transmit/Receive Buffer Pointer Register"
|
|
rbitfld.long 0x00 24.--29. "RDOPTR,Receiver Data Output Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rbitfld.long 0x00 16.--21. "RDIPTR,Receiver Data Input Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
rbitfld.long 0x00 8.--13. "TDOPTR,Transmitter Data Output Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rbitfld.long 0x00 0.--5. "TDIPTR,Transmitter Data Input Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "TRBSR,Transmit/Receive Buffer Status Register"
|
|
hexmask.long.byte 0x00 24.--30. 1. "TBFLVL,Transmit Buffer Filling Level"
|
|
hexmask.long.byte 0x00 16.--22. 1. "RBFLVL,Receive Buffer Filling Level"
|
|
newline
|
|
rbitfld.long 0x00 14. "STBT,Standard Transmit Buffer Event Trigger" "0: A standard transmit buffer event is not..,1: A standard transmit buffer event is triggered.."
|
|
rbitfld.long 0x00 13. "TBUS,Transmit Buffer Busy" "0: The transmit buffer information has been..,1: The FIFO memory update after write to INx is.."
|
|
newline
|
|
rbitfld.long 0x00 12. "TFULL,Transmit Buffer Full" "0: The transmit buffer is not full,1: The transmit buffer is full"
|
|
rbitfld.long 0x00 11. "TEMPTY,Transmit Buffer Empty" "0: The transmit buffer is not empty,1: The transmit buffer is empty"
|
|
newline
|
|
bitfld.long 0x00 9. "TBERI,Transmit Buffer Error Event" "0: A transmit buffer error event has not been..,1: A transmit buffer error event has been detected"
|
|
bitfld.long 0x00 8. "STBI,Standard Transmit Buffer Event" "0: A standard transmit buffer event has not been..,1: A standard transmit buffer event has been.."
|
|
newline
|
|
rbitfld.long 0x00 6. "SRBT,Standard Receive Buffer Event Trigger" "0: A standard receive buffer event is not..,1: A standard receive buffer event is triggered.."
|
|
rbitfld.long 0x00 5. "RBUS,Receive Buffer Busy" "0: The receive buffer information has been..,1: The OUTR update from the FIFO memory is ongoing"
|
|
newline
|
|
rbitfld.long 0x00 4. "RFULL,Receive Buffer Full" "0: The receive buffer is not full,1: The receive buffer is full"
|
|
rbitfld.long 0x00 3. "REMPTY,Receive Buffer Empty" "0: The receive buffer is not empty,1: The receive buffer is empty"
|
|
newline
|
|
bitfld.long 0x00 2. "ARBI,Alternative Receive Buffer Event" "0: An alternative receive buffer event has not..,1: An alternative receive buffer event has been.."
|
|
bitfld.long 0x00 1. "RBERI,Receive Buffer Error Event" "0: A receive buffer error event has not been..,1: A receive buffer error event has been detected"
|
|
newline
|
|
bitfld.long 0x00 0. "SRBI,Standard Receive Buffer Event" "0: A standard receive buffer event has not been..,1: A standard receive buffer event has been.."
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "TRBSCR,Transmit/Receive Buffer Status Clear Register"
|
|
bitfld.long 0x00 15. "FLUSHTB,Flush Transmit Buffer" "0: No effect,1: The transmit FIFO buffer is cleared (filling.."
|
|
bitfld.long 0x00 14. "FLUSHRB,Flush Receive Buffer" "0: No effect,1: The receive FIFO buffer is cleared (filling.."
|
|
newline
|
|
bitfld.long 0x00 10. "CBDV,Clear Bypass Data Valid" "0: No effect,1: Clear BYPCR.BDV"
|
|
bitfld.long 0x00 9. "CTBERI,Clear Transmit Buffer Error Event" "0: No effect,1: Clear TRBSR.TBERI"
|
|
newline
|
|
bitfld.long 0x00 8. "CSTBI,Clear Standard Transmit Buffer Event" "0: No effect,1: Clear TRBSR.STBI"
|
|
bitfld.long 0x00 2. "CARBI,Clear Alternative Receive Buffer Event" "0: No effect,1: Clear TRBSR.ARBI"
|
|
newline
|
|
bitfld.long 0x00 1. "CRBERI,Clear Receive Buffer Error Event" "0: No effect,1: Clear TRBSR.RBERI"
|
|
bitfld.long 0x00 0. "CSRBI,Clear Standard Receive Buffer Event" "0: No effect,1: Clear TRBSR.SRBI"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "OUTR,Receiver Buffer Output Register"
|
|
rbitfld.long 0x00 16.--20. "RCI,Receiver Control Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 0.--15. 1. "DSR,Received Data"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "OUTDR,Receiver Buffer Output Register L for Debugger"
|
|
rbitfld.long 0x00 16.--20. "RCI,Receive Control Information from Shift Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 0.--15. 1. "DSR,Data from Shift Register"
|
|
repeat 32. (increment 0 1) (increment 0 0x04)
|
|
group.long ($2+0x180)++0x03
|
|
line.long 0x00 "IN[$1],Transmit FIFO Buffer $1"
|
|
hexmask.long.word 0x00 0.--15. 1. "TDATA,Transmit Data"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "WDT (Watchdog Timer Unit)"
|
|
base ad:0x40020000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ID,WDT Module ID Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "MOD_NUMBER,Module Number Value"
|
|
hexmask.long.byte 0x00 8.--15. 1. "MOD_TYPE,Module Type"
|
|
hexmask.long.byte 0x00 0.--7. 1. "MOD_REV,Module Revision Number"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTR,WDT Control Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "SPW,Service Indication Pulse Width"
|
|
bitfld.long 0x00 4. "DSP,Debug Suspend" "0,1"
|
|
bitfld.long 0x00 1. "PRE,Pre-warning" "0,1"
|
|
bitfld.long 0x00 0. "ENB,Enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SRV,WDT Service Register"
|
|
hexmask.long 0x00 0.--31. 1. "SRV,Service"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "TIM,WDT Timer Register"
|
|
hexmask.long 0x00 0.--31. 1. "TIM,Timer Value"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "WLB,WDT Window Lower Bound Register"
|
|
hexmask.long 0x00 0.--31. 1. "WLB,Window Lower Bound"
|
|
group.long 0x14++0x03
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line.long 0x00 "WUB,WDT Window Upper Bound Register"
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hexmask.long 0x00 0.--31. 1. "WUB,Window Upper Bound"
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group.long 0x18++0x03
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line.long 0x00 "WDTSTS,WDT Status Register"
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rbitfld.long 0x00 0. "ALMS,Pre-warning Alarm" "0,1"
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group.long 0x1C++0x03
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line.long 0x00 "WDTCLR,WDT Clear Register"
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bitfld.long 0x00 0. "ALMC,Pre-warning Alarm" "0,1"
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tree.end
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autoindent.off
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newline
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