643 lines
36 KiB
Plaintext
643 lines
36 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: Perfile for a single Coherent Mesh Network component
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; @Props:
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; @Author: MIS
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; @Changelog:
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; @Manufacturer: ARM - ARM Ltd.
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; @Doc: corelink_cmn600_coherent_mesh_network_technical_reference_manual_100180_0300_00_en.pdf
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; @Core: Generic
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; @Chiplist: NeoverseN1, NeoverseN2, NeoverseV1
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; @Copyright: (C) 1989-2021 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: percmnsingle.per 13671 2021-09-17 12:40:46Z mschleinkofer $
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config 16. 8.
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width 11.
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ENTRY &cmninstance=1 &cmnstring="Coherent Mesh Network 1"
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tree "&cmnstring"
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base CMN.ROOTNODEBASE(&cmninstance-1)
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tree "Configuration Master Registers"
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width 16.
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tree "Identification Registers"
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rgroup.quad 0x0++0x37
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line.quad 0x00 "NODE_INFO,Component identification information"
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hexmask.quad.word 0x00 32.--47. " LOGICAL_ID ,Component logical ID"
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hexmask.quad.word 0x00 16.--31. " NODE_ID ,Component CHI node ID"
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NEWLINE
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hexmask.quad.word 0x00 0.--15. " NODE_TYPE ,CMN node type identifier"
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line.quad 0x8 "PERIPH_ID01,Peripheral ID 0 and 1"
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hexmask.quad.word 0x08 32.--39. " PERIPH_ID_1 ,Peripheral ID 1"
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hexmask.quad.word 0x08 0.--7. " PERIPH_ID_0 ,Peripheral ID 0"
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line.quad 0x10 "PERIPH_ID01,Peripheral ID 2 and 3"
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hexmask.quad.word 0x10 32.--39. " PERIPH_ID_3 ,Peripheral ID 3"
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hexmask.quad.word 0x10 0.--7. " PERIPH_ID_2 ,Peripheral ID 2"
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line.quad 0x18 "PERIPH_ID01,Peripheral ID 4 and 5"
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hexmask.quad.word 0x18 32.--39. " PERIPH_ID_5 ,Peripheral ID 5"
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hexmask.quad.word 0x18 0.--7. " PERIPH_ID_4 ,Peripheral ID 4"
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line.quad 0x20 "PERIPH_ID01,Peripheral ID 6 and 7"
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hexmask.quad.word 0x20 32.--39. " PERIPH_ID_7 ,Peripheral ID 7"
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hexmask.quad.word 0x20 0.--7. " PERIPH_ID_6 ,Peripheral ID 6"
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line.quad 0x28 "COMPONENT_ID01,Component ID 0 and 1"
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hexmask.quad.word 0x28 32.--39. " COMPONENT_ID_1 ,Component ID 1"
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hexmask.quad.word 0x28 0.--7. " COMPONENT_ID_0 , Component ID 0"
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line.quad 0x30 "COMPONENT_ID23,Component ID 2 and 3"
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hexmask.quad.word 0x30 32.--39. " COMPONENT_ID_3 ,Component ID 3"
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hexmask.quad.word 0x30 0.--7. " COMPONENT_ID_2 ,Component ID 2"
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rgroup.quad 0x3FB8++0x7
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line.quad 0x00 "ERRDEVARCH,Device architecture register"
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hexmask.quad.word 0x00 53.--63. " ARCHITECT ,Architect"
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bitfld.quad 0x00 52. " PRESENT " "Not present,Present"
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NEWLINE
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hexmask.quad.byte 0x00 48.--51. " REVISION ,Architecture revision"
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hexmask.quad.word 0x00 32.--47. " ARCHID ,Architecture ID"
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tree.end
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width 15.
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tree "Configuration Registers"
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rgroup.quad 0x80++0x7
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line.quad 0x00 "CHILD_INFO,Child identification information"
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hexmask.quad.word 0x00 16.--31. " CHILD_PTR_OFFSET ,Starting register of child pointers"
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hexmask.quad.word 0x00 0.--15. " CHILD_COUNT ,Number of child nodes"
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group.quad 0x980++0x7
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line.quad 0x00 "SECURE_ACCESS,Secure access control register"
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bitfld.quad 0x00 0.--1. " SECURE_ACCESS ,Secure access mode" "Default,Non-secure,Secure only,Undefined"
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rgroup.quad 0x900++0x7
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line.quad 0x0 "INFO_GLOBAL,Build-time global configuration"
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sif ((per.l(CMN.ROOTNODEBASE(&cmninstance-1)+0x904)&0x70000000)==0x0)
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bitfld.quad 0x00 49. " CHIC_MODE_EN ,CHI-C mode enable" "Disabled,Enabled"
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bitfld.quad 0x00 48. " R2_ENABLE ,CMN R2 feature enable" "Disabled,Enabled"
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NEWLINE
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hexmask.quad.byte 0x00 36.--41. " RNSAM_NUM_ADD ,Number of additional hashed target ID's supported by the RN SAM"
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hexmask.quad.byte 0x00 28.--35. " NUM_REMOTE_RNF ,Number of remote RN-F devices"
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NEWLINE
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bitfld.quad 0x00 25. " FLIT_PARITY_EN ,Parity checking enabled" "Disabled,Enabled"
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else
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bitfld.quad 0x00 63. " MXP_MULTIPLE_DTM_EN ,Multiple DTMs enabled" "Disabled,Enabled"
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bitfld.quad 0x00 60.--62. " CHIX_VER ,CHIX Version" ",,CHIB,CHIC,CHID,CHIE,,"
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NEWLINE
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bitfld.quad 0x00 59. " PORTFWD_EN ,Port to Port Forwarding enabled" "Disabled,Enabled"
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hexmask.quad.byte 0x00 54.--58. " XY_OVERRIDE_CNT ,Number of Src-Target pairs whose XY route path can be overridden"
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NEWLINE
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hexmask.quad.byte 0x00 52.--53. " RSP_VC_NUM ,Number of additional RSP channels"
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hexmask.quad.byte 0x00 50.--51. " DAT_VC_NUM ,Number of additional DAT channels"
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NEWLINE
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bitfld.quad 0x00 49. " MPAM_EN ,MPAM enabled" "Disabled,Enabled"
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bitfld.quad 0x00 48. " R2_ENABLE ,CMN R2 enabled" "Disabled,Enabled"
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NEWLINE
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bitfld.quad 0x00 47. " META_DATA_EN ,Meta Data Preservation mode enabled" "Disabled,Enabled"
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hexmask.quad.byte 0x00 36.--43. " MSAM_NUM_ADD_HASHED_TGT ,Supported number of additional hashed target ID's"
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NEWLINE
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hexmask.quad.word 0x00 26.--35. " NUM_REMOTE_RNF ,Number of remote RN-F devices"
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bitfld.quad 0x00 25. " FLIT_PARITY_EN ,Parity checking enabled" "Disabled,Enabled"
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endif
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NEWLINE
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bitfld.quad 0x00 24. " DATACHECK_EN ,Datacheck enabled for CHI DAT flit" "Disabled,Enabled"
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hexmask.quad.byte 0x00 16.--23. " PHYS_ADDR_WIDTH ,Physical address width"
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NEWLINE
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hexmask.quad.byte 0x00 8.--15. " CHI_REQ_ADDR_WIDTH ,REQ address width"
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hexmask.quad.byte 0x00 0.--7. " CHI_REQ_RSVDC_WIDTH ,RSVDC field width"
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sif ((per.l(CMN.ROOTNODEBASE(&cmninstance-1)+0x904)&0x70000000)!=0x0)
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rgroup.quad 0x908++0x7
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line.quad 0x00 "INFO_GLOBAL_1,Build-time global configuration"
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bitfld.quad 0x00 22. " MXP_DAT_WH_ROUTE_ENABLE ,DAT channel Worm Hole routing enabled" "Disabled,Enabled"
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bitfld.quad 0x00 21. " RSVDC_STRONGNC_ENABLE ,RSVDC StrongNC enabled" "Disabled,Enabled"
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NEWLINE
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bitfld.quad 0x00 20. " MCS_PUB_RSL_ENABLE ,MCS PUB outputs Register Slice enabled" "Disabled,Enabled"
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bitfld.quad 0x00 19. " CHI_MTE_ENABLE ,CHI MTE enabled" "Disabled,Enabled"
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NEWLINE
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hexmask.quad.byte 0x00 16.--18. " RXBUF_NUM_ENTRIES_MCS ,RX Buffer Entries at upload interface"
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NEWLINE
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hexmask.quad.byte 0x00 13.--15. " RSVDC_PBHA_WIDTH ,RSVDC PBHA Field Width"
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bitfld.quad 0x00 12. " RSVDC_PBHA_EN ,RSVDC PBHA mode enabled" "Disabled,Enabled"
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NEWLINE
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hexmask.quad.byte 0x00 9.--11. " RSVDC_LB_WIDTH , RSVDC Loop Back Field Width"
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bitfld.quad 0x00 8. " RSVDC_LB_EN ,RSVDC Loop Back mode enabled" "Disabled,Enabled"
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NEWLINE
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bitfld.quad 0x00 4. " MESH2X_DEF_SEL ,Default ping-pong scheme selection for TargetID Lookup in 2xMESH" "False,True"
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NEWLINE
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hexmask.quad.byte 0x00 2.--3. " SNP_VC_NUM ,Number of additional SNP channels"
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hexmask.quad.byte 0x00 0.--1. " REQ_VC_NUM ,Number of additional REQ channels"
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endif
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group.quad 0x1000++0x7
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line.quad 0x00 "INT_ENABLE,HN-F PPU event interrupt mask"
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hexmask.quad 0x00 0.--63. " HNF_PPU_EN ,Interrupt mask"
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wgroup.quad 0x1008++0x7
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line.quad 0x00 "INT_STATUS,HN-F PPU event interrupt status"
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group.quad 0x1010++0x7
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line.quad 0x00 "QACTIVE_HYST,Number of hysteresis clock cycles to retain QACTIVE assertion"
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hexmask.quad.word 0x00 0.--15. " HNV_PU_QACT_HYST ,QACTIVE hysteresis"
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tree.end
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width 12.
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tree "Secure Error Status Registers"
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rgroup.quad 0x3000++0x27
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line.quad 0x00 "ERRGSR0,XP<n> secure error status"
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line.quad 0x08 "ERRGSR1,HN-I<n> secure error status"
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line.quad 0x10 "ERRGSR2,HN-F<n> secure error status"
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line.quad 0x18 "ERRGSR3,SBSX<n> secure error status"
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line.quad 0x20 "ERRGSR4,CXG<n> secure error status"
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rgroup.quad 0x3080++0x27
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line.quad 0x00 "ERRGSR5,XP<n> secure fault status"
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line.quad 0x08 "ERRGSR6,HN-I<n> secure fault status"
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line.quad 0x10 "ERRGSR7,HN-F<n> secure fault status"
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line.quad 0x18 "ERRGSR8,SBSX<n> secure fault status"
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line.quad 0x20 "ERRGSR9,CXG<n> secure fault status"
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rgroup.quad 0x3100++0x27
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line.quad 0x00 "ERRGSR0_NS,XP<n> non-secure error status"
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line.quad 0x08 "ERRGSR1_NS,HN-I<n> non-secure error status"
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line.quad 0x10 "ERRGSR2_NS,HN-F<n> non-secure error status"
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line.quad 0x18 "ERRGSR3_NS,SBSX<n> non-secure error status"
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line.quad 0x20 "ERRGSR4_NS,CXG<n> non-secure error status"
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rgroup.quad 0x3180++0x27
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line.quad 0x00 "ERRGSR5_NS,XP<n> non-secure fault status"
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line.quad 0x08 "ERRGSR6_NS,HN-I<n> non-secure fault status"
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line.quad 0x10 "ERRGSR7_NS,HN-F<n> non-secure fault status"
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line.quad 0x18 "ERRGSR8_NS,SBSX<n> non-secure fault status"
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line.quad 0x20 "ERRGSR9_NS,CXG<n> non-secure fault status"
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rgroup.quad 0x3FA8++0x7
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line.quad 0x00 "ERRDEVAFF,Device affinity register"
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hexmask.quad 0x0 0.--63. " DEVAFF ,Device affinity register"
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rgroup.quad 0x3FC8++0x7
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line.quad 0x00 "ERRIDR,Number of error records"
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hexmask.quad.word 0x00 0.--15. " RECNUM ,Number of error records"
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tree.end
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width 11.
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tree.end
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tree "Debug and Trace Registers"
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base CMNBASE(&cmninstance-1)
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rgroup 0x0++0x7
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line.quad 0x0 "INFO,Identification information"
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hexmask.quad.word 0x0 0.--15. 1. " NODE_TYPE ,Node type identifier"
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hexmask.quad.word 0x0 16.--31. 1. " NODE_ID ,Component CHI node ID"
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NEWLINE
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hexmask.quad.word 0x0 32.--47. 1. " LOGICAL_ID ,Component logical ID"
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group 0x980--0x983
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line.long 0x0 "SEC_ACC,Secure access register"
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bitfld.long 0x0 2. " PM_DISABLE ,PMU disable" "PMU not affected,PMU disabled"
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bitfld.long 0x0 1. " DT_DISABLE ,Debug disable" "DT not affected,DT disabled"
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NEWLINE
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bitfld.long 0x0 0. " SECURE_DBG_DIS ,Secure debug disable" "Always,If SPNIDEN is set"
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group 0xA00--0xA03
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line.long 0x0 "DTC_CTL,Debug Trace control register"
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bitfld.long 0x0 10. " CG_DISABLE ,Disables DT architectural clock gates" "Enabled,Disabled"
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hexmask.long 0x0 4.--9. 1. " CROSS_TRIGGER_COUNT ,Number of cross triggers received before trace enable"
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NEWLINE
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bitfld.long 0x0 3. " DT_WAIT_FOR_TR ,Enables waiting for cross trigger before trace enable" "Disabled,Enabled"
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NEWLINE
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bitfld.long 0x0 2. " ATBTIRGGER_EN ,ATB trigger enable" "Disabled,Enabled"
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bitfld.long 0x0 1. " DBGTRIGGER_EN ,DBGWATCHTRIG enable" "Disabled,Enabled"
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NEWLINE
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bitfld.long 0x0 0. " DT_EN ,Debug Trace enabled" "Disabled,Enabled"
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rgroup 0xA10--0xA13
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line.long 0x0 "TRIG_STAT,Trigger status"
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hexmask.long 0x0 20.--23. 1. " TRIGGER_WP ,Watchpoint caused"
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hexmask.long 0x0 8.--18. 1. " TRIGGER_NODEID ,Node ID caused"
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NEWLINE
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bitfld.long 0x0 0. " TRIGGER_STATUS ,ATB trigger" "Not triggered,Triggered"
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wgroup 0xA20--0xA20
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line.byte 0x0 "TRIG_CLR,Clear Trigger status"
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group 0xA30--0xA33
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line.long 0x0 "TRC_CNTRL,Trace control register"
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bitfld.long 0x0 8. " CC_ENABLE ,Cycle count enable" "Disabled,Enabled"
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bitfld.long 0x0 5.--7. " TIMESTAMP_PERIOD ,Timestamp packet insertion period" "Disabled,,,8K cycles,16K cycles,32K cycles,64K cycles,?..."
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NEWLINE
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bitfld.long 0x0 0.--4. " ASYNC_PERIOD ,Alignment sync insertion period" "Disabled,,,,,,,,256 Byte,512 Byte,,,,,,,,,,,1 MByte,?..."
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group 0xA48--0xA4B
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line.byte 0x0 "TRACEID,ATB ID"
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group 0x2000--0x2047
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line.QUAD 0x0 "PMEVCNTAB,PMU event counters AB"
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hexmask.quad.long 0x0 32.--63. 1. " PMEVCNTB ,PMU counter B"
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hexmask.quad.long 0x0 0.--31. 1. " PMEVCNTA ,PMU counter A"
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line.quad 0x10 "PMEVCNTCD,PMU event counters CD"
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hexmask.quad.long 0x10 32.--63. 1. " PMEVCNTD ,PMU counter D"
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hexmask.quad.long 0x10 0.--31. 1. " PMEVCNTC ,PMU counter C"
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line.quad 0x20 "PMEVCNTEF,PMU event counters EF"
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hexmask.quad.long 0x20 32.--63. 1. " PMEVCNTF ,PMU counter F"
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hexmask.quad.long 0x20 0.--31. 1. " PMEVCNTE ,PMU counter E"
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line.quad 0x30 "PMEVCNTGH,PMU event counters GH"
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hexmask.quad.long 0x30 32.--63. 1. " PMEVCNTH ,PMU counter H"
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hexmask.quad.long 0x30 0.--31. 1. " PMEVCNTG ,PMU counter G"
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line.quad 0x40 "PMCCNTR,PMU cycle counter"
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hexmask.quad 0x40 0.--39. 1. " PMCCNTR ,PMU cycle counter"
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group 0x2050--0x2097
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line.quad 0x0 "PMSRAB,PMU event shadow counters AB"
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hexmask.quad.long 0x0 32.--63. 1. " PMEVCNTB ,PMU shadow counter B"
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hexmask.quad.long 0x0 0.--31. 1. " PMEVCNTA ,PMU shadow counter A"
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line.quad 0x10 "PMSRCD,PMU event shadow counters CD"
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hexmask.quad.long 0x10 32.--63. 1. " PMEVCNTD ,PMU shadow counter D"
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hexmask.quad.long 0x10 0.--31. 1. " PMEVCNTC ,PMU shadow counter C"
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line.quad 0x20 "PMSREF,PMU event shadow counters EF"
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hexmask.quad.long 0x20 32.--63. 1. " PMEVCNTF ,PMU shadow counter F"
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hexmask.quad.long 0x20 0.--31. 1. " PMEVCNTE ,PMU shadow counter E"
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line.quad 0x30 "PMSRGH,PMU event shadow counters GH"
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hexmask.quad.long 0x30 32.--63. 1. " PMEVCNTH ,PMU shadow counter H"
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hexmask.quad.long 0x30 0.--31. 1. " PMEVCNTG ,PMU shadow counter G"
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line.quad 0x40 "PMSRCCNTR,PMU cycle shadow counter"
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hexmask.quad 0x40 0.--39. 1. " PMCCNTR ,PMU cycle shadow counter"
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group 0x2100--0x2103
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line.long 0x0 "PMCR,PMU control register"
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bitfld.long 0x0 6. " OVFL_INTR_EN ,INTREQPMU on PMU counter overflow" "Disabled,Enabled"
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bitfld.long 0x0 5. " CNTR_RST ,Enables clearing of live counters" "Disabled,Enabled"
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NEWLINE
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hexmask.byte 0x0 1.--4. 1. " CNTCFG ,Groups adjacent registers"
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bitfld.long 0x0 0. " PMU_EN ,Enables PMU" "Disabled,Enabled"
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NEWLINE
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rgroup 0x2118--0x211B
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line.short 0x0 "PMOVSR,PMU overflow status"
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rbitfld.short 0x0 8. " CC_OV ,Cycle counter overflow" "-,OF"
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rbitfld.short 0x0 7. " 7_OV ,Counter 7 overflow" "-,OF"
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rbitfld.short 0x0 6. " 6_OV ,Counter 6 overflow" "-,OF"
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rbitfld.short 0x0 5. " 5_OV ,Counter 5 overflow" "-,OF"
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rbitfld.short 0x0 4. " 4_OV ,Counter 4 overflow" "-,OF"
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NEWLINE
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rbitfld.short 0x0 3. " 3_OV ,Counter 3 overflow" "-,OF"
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rbitfld.short 0x0 2. " 2_OV ,Counter 2 overflow" "-,OF"
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rbitfld.short 0x0 1. " 1_OV ,Counter 1 overflow" "-,OF"
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rbitfld.short 0x0 0. " 0_OV ,Counter 0 overflow" "-,OF"
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wgroup 0x2120--0x2123
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line.short 0x0 "OVSR_CLR,Clear PMU overflow status"
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bitfld.short 0x0 8. " CL_CC ,Clear cycle counter overflow" "-,CLR"
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bitfld.short 0x0 7. " CL_7 ,Clear counter 7 overflow" "-,CLR"
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bitfld.short 0x0 6. " CL_6 ,Clear counter 6 overflow" "-,CLR"
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bitfld.short 0x0 5. " CL_5 ,Clear counter 5 overflow" "-,CLR"
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bitfld.short 0x0 4. " CL_4 ,Clear counter 4 overflow" "-,CLR"
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NEWLINE
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bitfld.short 0x0 3. " CL_3 ,Clear counter 3 overflow" "-,CLR"
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bitfld.short 0x0 2. " CL_2 ,Clear counter 2 overflow" "-,CLR"
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bitfld.short 0x0 1. " CL_1 ,Clear counter 1 overflow" "-,CLR"
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bitfld.short 0x0 0. " CL_0 ,Clear counter 0 overflow" "-,CLR"
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tree.end
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sif (per.l(CMN.ROOTNODEBASE(&cmninstance-1)+0x80)&0xFFFF)>0
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repeat (per.l(CMN.ROOTNODEBASE(&cmninstance-1)+0x80)&0xFFFF) (increment 0 1) (increment C:0x100 0x8)
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base $2
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width 3.
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group 0x0++0x3
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textline " "
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tree "XP$1 (Crosspoint Child $1)"
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base CMN.PERIPHBASE(&cmninstance-1)+per.l(CMN.ROOTNODEBASE(&cmninstance-1)+ADDRESS.OFFSET(PER.BASE()))
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width 11.
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rgroup.quad 0x0++0x7
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line.quad 0x00 "NODE_INFO,Component identification information"
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sif (CMN.VERSION(&cmninstance-1)=="CMN-700")
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hexmask.quad.word 0x00 48.--51. " NUM_DEVICE_PORT ,Number of attached device ports"
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endif
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hexmask.quad.word 0x00 32.--47. " LOGICAL_ID ,Component logical ID"
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NEWLINE
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hexmask.quad.word 0x00 16.--24. " XY_ID ,XP mesh location"
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hexmask.quad.word 0x00 0.--15. " NODE_TYPE ,CMN node type identifier"
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width 14.
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tree "Configuration Registers"
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rgroup.quad 0x80++0x7
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line.quad 0x00 "CHILD_INFO,Child identification information"
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hexmask.quad.word 0x00 16.--31. " CHILD_PTR_OFFSET ,Starting register of child pointers"
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hexmask.quad.word 0x00 0.--15. " CHILD_COUNT ,Number of child nodes"
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tree "Child Pointers"
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rgroup.quad 0x100++0xFF
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REPEAT 32. (increment 0x0 0x8)(increment 0 1)
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line.quad $1 "CHILD_PTR_$2,Child $2 base address"
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bitfld.quad $1 31. " TYPE ,External or internal child node" "Intern,Extern"
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hexmask.quad.long $1 0.--30. " RELATIVE_ADDRESS ,Child node address offset relative to PERIPHBASE"
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REPEAT.end
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tree.end
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sif (CMN.VERSION(&cmninstance-1)=="CMN-700")
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rgroup.quad 0x900++0x67
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REPEAT 6 (increment 0x0 0x10)(increment 0x8 0x10)(increment 0 1)
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NEWLINE
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line.quad $1 "P$3_INFO,Port $3 component information"
|
|
hexmask.quad.word $1 48.--57. " DMC_LOGICALID ,DMC AXIU interfaces logical ID base"
|
|
hexmask.quad.byte $1 44.--46. " DMC_NUM ,Total number of SN-F AXIU interfaces"
|
|
NEWLINE
|
|
hexmask.quad.word $1 32.--41. " DSU_LOGICALID ,DSU AXIU interfaces logical ID base"
|
|
hexmask.quad.byte $1 28.--30. " DSU_NUM ,Total number of RN-F AXIU interfaces"
|
|
NEWLINE
|
|
hexmask.quad.word $1 16.--25. " A4S_LOGICALID ,AXI4Stream interfaces logical ID base"
|
|
hexmask.quad.byte $1 11.--13. " A4S_NUM ,Total number of RN-F AXI4Stream interfaces at this port"
|
|
NEWLINE
|
|
hexmask.quad.byte $1 8.--10. " RXBUF_NUM_ENTRIES ,Number of input buffers for each device at this port"
|
|
bitfld.quad $1 7. " EXT_SAM_EN ,ESAM enable" "Disabled,Enabled"
|
|
NEWLINE
|
|
bitfld.quad $1 5. " DATACHECK_EN ,Datacheck enable" "Disabled,Enabled"
|
|
bitfld.quad $1 4. " POISON_EN ,Poison enable" "Disabled,Enabled"
|
|
NEWLINE
|
|
hexmask.quad.byte $1 0.--2. " NUM_DEV ,Number of connected devices"
|
|
line.quad $2 "P$3_INFO_1,Additional Port $3 component information"
|
|
hexmask.quad.byte $2 12.--14. " DAT_VC_NUM ,Number of DAT channels"
|
|
hexmask.quad.byte $2 8.--10. " SNP_VC_NUM ,Number of SNP channels"
|
|
NEWLINE
|
|
hexmask.quad.byte $2 4.--6. " RSP_VC_NUM ,Number of RSP channels"
|
|
hexmask.quad.byte $2 0.--2. " REQ_VC_NUM ,Number of REQ channels"
|
|
REPEAT.end
|
|
else
|
|
rgroup.quad 0x900++0xF
|
|
NEWLINE
|
|
line.quad 0x00 "P0_INFO,Port 0 component information"
|
|
hexmask.quad.byte 0x00 16.--23. " A4S_LOGICALID ,AXI4Stream interfaces logical ID base"
|
|
hexmask.quad.byte 0x00 11.--13. " A4S_NUM ,Total number of RN-F AXI4Stream interfaces at this port"
|
|
NEWLINE
|
|
hexmask.quad.byte 0x00 8.--10. " RXBUF_NUM_ENTRIES ,Number of input buffers for each device at this port"
|
|
bitfld.quad 0x00 7. " EXT_SAM_EN ,ESAM enable" "Disabled,Enabled"
|
|
NEWLINE
|
|
bitfld.quad 0x00 5. " DATACHECK_EN ,Datacheck enable" "Disabled,Enabled"
|
|
bitfld.quad 0x00 4. " POISON_EN ,Poison enable" "Disabled,Enabled"
|
|
NEWLINE
|
|
hexmask.quad.byte 0x00 0.--2. " NUM_DEV ,Number of connected devices"
|
|
line.quad 0x08 "P1_INFO,Port 1 component information"
|
|
hexmask.quad.byte 0x08 16.--23. " A4S_LOGICALID ,AXI4Stream interfaces logical ID base"
|
|
hexmask.quad.byte 0x08 11.--13. " A4S_NUM ,Total number of RN-F AXI4Stream interfaces at this port"
|
|
NEWLINE
|
|
hexmask.quad.byte 0x08 8.--10. " RXBUF_NUM_ENTRIES ,Number of input buffers for each device at this port"
|
|
bitfld.quad 0x08 7. " EXT_SAM_EN ,ESAM enable" "Disabled,Enabled"
|
|
NEWLINE
|
|
bitfld.quad 0x08 5. " DATACHECK_EN ,Datacheck enable" "Disabled,Enabled"
|
|
bitfld.quad 0x08 4. " POISON_EN ,Poison enable" "Disabled,Enabled"
|
|
NEWLINE
|
|
hexmask.quad.byte 0x08 0.--2. " NUM_DEV ,Number of connected devices"
|
|
endif
|
|
tree.end
|
|
width 18.
|
|
tree "Debug and Trace Registers"
|
|
tree "DTM 0"
|
|
group.quad 0x2100++0x7
|
|
line.quad 0x00 "DTM_CONTROL,Debug Trace Monitor control"
|
|
bitfld.quad 0x00 3. " TRACE_NO_ATB ,Trace packet delivered to" "ATB,FIFO"
|
|
bitfld.quad 0x00 2. " SAMPLE_PROFILE_ENABLE ,Enables sample profile function" "Disabled,Enabled"
|
|
NEWLINE
|
|
bitfld.quad 0x00 1. " TRACE_TAG_ENABLE ,Watchpoint trace tag enable" "Disabled,Enabled"
|
|
bitfld.quad 0x00 0. " DTM_ENABLE ,Enables debug watchpoint and PMU function" "Disabled,Enabled"
|
|
group.quad 0x2118++0x7
|
|
line.quad 0x00 "FIFO_ENTRY_READY,Status of DTM FIFO entries"
|
|
bitfld.quad 0x00 3. " ENTRY_3 ,Entry 3 ready when set" "Not ready,Ready"
|
|
bitfld.quad 0x00 2. " ENTRY_2 ,Entry 2 ready when set" "Not ready,Ready"
|
|
NEWLINE
|
|
bitfld.quad 0x00 1. " ENTRY_1 ,Entry 1 ready when set" "Not ready,Ready"
|
|
bitfld.quad 0x00 0. " ENTRY_0 ,Entry 0 ready when set" "Not ready,Ready"
|
|
REPEAT 4. (increment 0x2120 0x18) (increment 0x0 0x1)
|
|
rgroup.quad $1++0x17
|
|
line.quad 0x00 "FIFO_ENTRY$2_0,DTM FIFO entry $2 data (low)"
|
|
line.quad 0x08 "FIFO_ENTRY$2_1,DTM FIFO entry $2 data (mid)"
|
|
line.quad 0x10 "FIFO_ENTRY$2_2,DTM FIFO entry $2 data (high)"
|
|
NEWLINE
|
|
REPEAT.end
|
|
REPEAT 4. (increment 0x21A0 0x18) (increment 0x0 0x1)
|
|
group.quad $1++0x17
|
|
line.quad 0x00 "WP$2_CONFIG,Watchpoint $2 configuration"
|
|
sif (CMN.VERSION(&cmninstance-1)=="CMN-700")
|
|
hexmask.quad.byte 0x00 19.--20. " CHN_NUM ,VC number index for replicated channels"
|
|
hexmask.quad.byte 0x00 17.--18. " DEV_SEL2 ,Upper bits for device port selection"
|
|
NEWLINE
|
|
bitfld.quad 0x00 16. " DBGTRIG_EN ,Enables watchpoint debug trigger packet generation" "Disabled,Enabled"
|
|
bitfld.quad 0x00 15. " CTRIG_EN ,Enables watchpoint cross trigger packet generation" "Disabled,Enabled"
|
|
NEWLINE
|
|
bitfld.quad 0x00 14. " CC_EN ,Enables inclusion of cycle count in watchpoint track packet generation" "Disabled,Enabled"
|
|
bitfld.quad 0x00 11.--13. " PKT_TYPE " "1 Byte,2 Byte,5 Byte,,Control,Data low,Data high,"
|
|
NEWLINE
|
|
bitfld.quad 0x00 10. " PKT_GEN ,Enables watchpoint trace packet generation" "Disabled,Enabled"
|
|
bitfld.quad 0x00 9. " COMBINE ,Enables combination with next watchpoint" "Single,Combined"
|
|
NEWLINE
|
|
bitfld.quad 0x00 8. " EXCLUSIVE ,Watchpoint mode" "Regular,Exclusive"
|
|
bitfld.quad 0x00 6.--7. " RSVDC_BSEL ,Byte select of RSVDC" "[7:0],[15:8],[23:16],[31:24]"
|
|
NEWLINE
|
|
bitfld.quad 0x00 4.--5. " GRP ,Watchpoint register format group" "Primary,Secondary,Tertiary,"
|
|
NEWLINE
|
|
bitfld.quad 0x00 1.--3. " CHN_SEL ,VC selection" "REQ,RSP,SNP,DATA,?..."
|
|
bitfld.quad 0x00 0. " DEV_SEL ,Device port selection in Specified SMXP" "Port 0,Port 1"
|
|
else
|
|
bitfld.quad 0x00 14. " DBGTRIG_EN ,Enables watchpoint debug trigger packet generation" "Disabled,Enabled"
|
|
bitfld.quad 0x00 13. " CTRIG_EN ,Enables watchpoint cross trigger packet generation" "Disabled,Enabled"
|
|
NEWLINE
|
|
bitfld.quad 0x00 12. " CC_EN ,Enables inclusion of cycle count in watchpoint track packet generation" "Disabled,Enabled"
|
|
bitfld.quad 0x00 9.--11. " PKT_TYPE " "1 Byte,2 Byte,5 Byte,,Control,,,"
|
|
NEWLINE
|
|
bitfld.quad 0x00 8. " PKT_GEN ,Enables watchpoint trace packet generation" "Disabled,Enabled"
|
|
bitfld.quad 0x00 6. " COMBINE ,Enables combination with next watchpoint" "Single,Combined"
|
|
NEWLINE
|
|
bitfld.quad 0x00 5. " EXCLUSIVE ,Watchpoint mode" "Regular,Exclusive"
|
|
bitfld.quad 0x00 4. " GRP ,Watchpoint register format group" "Primary,Secondary"
|
|
NEWLINE
|
|
bitfld.quad 0x00 1.--3. " CHN_SEL ,VC selection" "REQ,RSP,SNP,DATA,?..."
|
|
bitfld.quad 0x00 0. " DEV_SEL ,Device port selection in Specified SMXP" "Port 0,Port 1"
|
|
endif
|
|
line.quad 0x08 "WP$2_VAL,Watchpoint $2 comparison value"
|
|
line.quad 0x10 "WP$2_MASK,Watchpoint $2 comparison mask"
|
|
NEWLINE
|
|
REPEAT.end
|
|
group.quad 0x2200++0x17
|
|
line.quad 0x00 "PMSICR,Sampling interval counter register"
|
|
hexmask.quad.long 0x00 0.--31. " COUNT ,Current value of sample counter"
|
|
line.quad 0x08 "PMSIRR,Sampling interval reload register"
|
|
hexmask.quad.long 0x08 8.--31. " INTERVAL ,Sampling interval to be reloaded"
|
|
line.quad 0x10 "PMU_CONFIG,DTM PMU configuration"
|
|
hexmask.quad.word 0x10 56.--63. " PMEVCNT3_INPUT_SEL ,Source of PMU counter 3"
|
|
hexmask.quad.word 0x10 48.--55. " PMEVCNT2_INPUT_SEL ,Source of PMU counter 2"
|
|
NEWLINE
|
|
hexmask.quad.word 0x10 40.--47. " PMEVCNT1_INPUT_SEL ,Source of PMU counter 1"
|
|
hexmask.quad.word 0x10 32.--39. " PMEVCNT0_INPUT_SEL ,Source of PMU counter 0"
|
|
NEWLINE
|
|
bitfld.quad 0x10 28.--30. " PMEVCNT3_GLOBAL_NUM ,Global counter to pair with PMU counter 3" "A,B,C,D,E,F,G,H"
|
|
bitfld.quad 0x10 24.--26. " PMEVCNT2_GLOBAL_NUM ,Global counter to pair with PMU counter 2" "A,B,C,D,E,F,G,H"
|
|
NEWLINE
|
|
bitfld.quad 0x10 20.--22. " PMEVCNT1_GLOBAL_NUM ,Global counter to pair with PMU counter 1" "A,B,C,D,E,F,G,H"
|
|
bitfld.quad 0x10 16.--18. " PMEVCNT0_GLOBAL_NUM ,Global counter to pair with PMU counter 0" "A,B,C,D,E,F,G,H"
|
|
NEWLINE
|
|
bitfld.quad 0x10 8. " CNTR_RST ,Reset live counters upon assertion of snapshot" ",Reset"
|
|
hexmask.quad.word 0x10 4.--7. " PMEVCNT_PAIRED ,PMU local counter paired with global counter"
|
|
NEWLINE
|
|
bitfld.quad 0x10 3. " PMEVCNTALL_COMBINED ,Enables combination of all PMU counters" "Disabled,Enabled"
|
|
bitfld.quad 0x10 2. " PMEVCNT23_COMBINED ,Enables combination of PMU counters 2 and 3" "Disabled,Enabled"
|
|
NEWLINE
|
|
bitfld.quad 0x10 1. " PMEVCNT01_COMBINED ,Enables combination of PMU counters 0 and 1" "Disabled,Enabled"
|
|
bitfld.quad 0x10 0. " PMU_EN ,DTM PMU enable" "Disabled,Enabled"
|
|
group.quad 0x2220++0x7
|
|
line.quad 0x00 "PMEVCNT,PMU event counters"
|
|
hexmask.quad.word 0x00 48.--63. " PMEVCNT3 ,PMU event counter 3"
|
|
hexmask.quad.word 0x00 32.--47. " PMEVCNT2 ,PMU event counter 2"
|
|
NEWLINE
|
|
hexmask.quad.word 0x00 16.--31. " PMEVCNT1 ,PMU event counter 1"
|
|
hexmask.quad.word 0x00 0.--15. " PMEVCNT0 ,PMU event counter 0"
|
|
group.quad 0x2240++0x7
|
|
line.quad 0x00 "PMEVCNTSR,PU event counter shadow registers"
|
|
hexmask.quad.word 0x00 48.--63. " PMEVCNTSR3 ,PMU event counter 3 shadow register"
|
|
hexmask.quad.word 0x00 32.--47. " PMEVCNTSR2 ,PMU event counter 2 shadow register"
|
|
NEWLINE
|
|
hexmask.quad.word 0x00 16.--31. " PMEVCNTSR1 ,PMU event counter 1 shadow register"
|
|
hexmask.quad.word 0x00 0.--15. " PMEVCNTSR0 ,PMU event counter 0 shadow register"
|
|
tree.end
|
|
sif (CMN.VERSION(&cmninstance-1)=="CMN-700")
|
|
REPEAT 3. (increment 0x1 0x1) (increment 0x2300 0x200)
|
|
tree "DTM $1"
|
|
group.quad $2++0x7
|
|
line.quad 0x00 "DTM_CONTROL,Debug Trace Monitor control"
|
|
bitfld.quad 0x00 3. " TRACE_NO_ATB ,Trace packet delivered to" "ATB,FIFO"
|
|
bitfld.quad 0x00 2. " SAMPLE_PROFILE_ENABLE ,Enables sample profile function" "Disabled,Enabled"
|
|
NEWLINE
|
|
bitfld.quad 0x00 1. " TRACE_TAG_ENABLE ,Watchpoint trace tag enable" "Disabled,Enabled"
|
|
bitfld.quad 0x00 0. " DTM_ENABLE ,Enables debug watchpoint and PMU function" "Disabled,Enabled"
|
|
group.quad ($2+0x18)++0x7
|
|
line.quad 0x00 "FIFO_ENTRY_READY,Status of DTM FIFO entries"
|
|
bitfld.quad 0x00 3. " ENTRY_3 ,Entry 3 ready when set" "Not ready,Ready"
|
|
bitfld.quad 0x00 2. " ENTRY_2 ,Entry 2 ready when set" "Not ready,Ready"
|
|
NEWLINE
|
|
bitfld.quad 0x00 1. " ENTRY_1 ,Entry 1 ready when set" "Not ready,Ready"
|
|
bitfld.quad 0x00 0. " ENTRY_0 ,Entry 0 ready when set" "Not ready,Ready"
|
|
NEWLINE
|
|
rgroup.quad ($2+0x20)++0x17
|
|
line.quad 0x00 "FIFO_ENTRY0_0,DTM FIFO entry 0 data (low)"
|
|
line.quad 0x08 "FIFO_ENTRY0_1,DTM FIFO entry 0 data (mid)"
|
|
line.quad 0x10 "FIFO_ENTRY0_2,DTM FIFO entry 0 data (high)"
|
|
NEWLINE
|
|
rgroup.quad ($2+0x38)++0x17
|
|
line.quad 0x00 "FIFO_ENTRY1_0,DTM FIFO entry 1 data (low)"
|
|
line.quad 0x08 "FIFO_ENTRY1_1,DTM FIFO entry 1 data (mid)"
|
|
line.quad 0x10 "FIFO_ENTRY1_2,DTM FIFO entry 1 data (high)"
|
|
NEWLINE
|
|
rgroup.quad ($2+0x50)++0x17
|
|
line.quad 0x00 "FIFO_ENTRY2_0,DTM FIFO entry 2 data (low)"
|
|
line.quad 0x08 "FIFO_ENTRY2_1,DTM FIFO entry 2 data (mid)"
|
|
line.quad 0x10 "FIFO_ENTRY2_2,DTM FIFO entry 2 data (high)"
|
|
NEWLINE
|
|
rgroup.quad ($2+0x68)++0x17
|
|
line.quad 0x00 "FIFO_ENTRY3_0,DTM FIFO entry 3 data (low)"
|
|
line.quad 0x08 "FIFO_ENTRY3_1,DTM FIFO entry 3 data (mid)"
|
|
line.quad 0x10 "FIFO_ENTRY3_2,DTM FIFO entry 3 data (high)"
|
|
NEWLINE
|
|
group.quad ($2+0xA0)++0x17
|
|
line.quad 0x00 "WP0_CONFIG_DT$1,Watchpoint 0 configuration of DTM $1"
|
|
hexmask.quad.byte 0x00 19.--20. " CHN_NUM ,VC number index for replicated channels"
|
|
hexmask.quad.byte 0x00 17.--18. " DEV_SEL2 ,Upper bits for device port selection"
|
|
NEWLINE
|
|
bitfld.quad 0x00 16. " DBGTRIG_EN ,Enables watchpoint debug trigger packet generation" "Disabled,Enabled"
|
|
bitfld.quad 0x00 15. " CTRIG_EN ,Enables watchpoint cross trigger packet generation" "Disabled,Enabled"
|
|
NEWLINE
|
|
bitfld.quad 0x00 14. " CC_EN ,Enables inclusion of cycle count in watchpoint track packet generation" "Disabled,Enabled"
|
|
bitfld.quad 0x00 11.--13. " PKT_TYPE " "1 Byte,2 Byte,5 Byte,,Control,Data low,Data high,"
|
|
NEWLINE
|
|
bitfld.quad 0x00 10. " PKT_GEN ,Enables watchpoint trace packet generation" "Disabled,Enabled"
|
|
bitfld.quad 0x00 9. " COMBINE ,Enables combination with next watchpoint" "Single,Combined"
|
|
NEWLINE
|
|
bitfld.quad 0x00 8. " EXCLUSIVE ,Watchpoint mode" "Regular,Exclusive"
|
|
bitfld.quad 0x00 6.--7. " RSVDC_BSEL ,Byte select of RSVDC" "[7:0],[15:8],[23:16],[31:24]"
|
|
NEWLINE
|
|
bitfld.quad 0x00 4.--5. " GRP ,Watchpoint register format group" "Primary,Secondary,Tertiary,"
|
|
NEWLINE
|
|
bitfld.quad 0x00 1.--3. " CHN_SEL ,VC selection" "REQ,RSP,SNP,DATA,?..."
|
|
bitfld.quad 0x00 0. " DEV_SEL ,Device port selection in Specified SMXP" "Port 0,Port 1"
|
|
line.quad 0x08 "WP0_VAL_DT$1,Watchpoint 0 comparison value"
|
|
line.quad 0x10 "WP0_MASK_DT$1,Watchpoint 0 comparison mask"
|
|
NEWLINE
|
|
group.quad ($2+0xB8)++0x17
|
|
line.quad 0x00 "WP1_CONFIG_DT$1,Watchpoint 1 configuration of DTM $1"
|
|
hexmask.quad.byte 0x00 19.--20. " CHN_NUM ,VC number index for replicated channels"
|
|
hexmask.quad.byte 0x00 17.--18. " DEV_SEL2 ,Upper bits for device port selection"
|
|
NEWLINE
|
|
bitfld.quad 0x00 16. " DBGTRIG_EN ,Enables watchpoint debug trigger packet generation" "Disabled,Enabled"
|
|
bitfld.quad 0x00 15. " CTRIG_EN ,Enables watchpoint cross trigger packet generation" "Disabled,Enabled"
|
|
NEWLINE
|
|
bitfld.quad 0x00 14. " CC_EN ,Enables inclusion of cycle count in watchpoint track packet generation" "Disabled,Enabled"
|
|
bitfld.quad 0x00 11.--13. " PKT_TYPE " "1 Byte,2 Byte,5 Byte,,Control,Data low,Data high,"
|
|
NEWLINE
|
|
bitfld.quad 0x00 10. " PKT_GEN ,Enables watchpoint trace packet generation" "Disabled,Enabled"
|
|
NEWLINE
|
|
bitfld.quad 0x00 8. " EXCLUSIVE ,Watchpoint mode" "Regular,Exclusive"
|
|
bitfld.quad 0x00 6.--7. " RSVDC_BSEL ,Byte select of RSVDC" "[7:0],[15:8],[23:16],[31:24]"
|
|
NEWLINE
|
|
bitfld.quad 0x00 4.--5. " GRP ,Watchpoint register format group" "Primary,Secondary,Tertiary,"
|
|
NEWLINE
|
|
bitfld.quad 0x00 1.--3. " CHN_SEL ,VC selection" "REQ,RSP,SNP,DATA,?..."
|
|
bitfld.quad 0x00 0. " DEV_SEL ,Device port selection in Specified SMXP" "Port 0,Port 1"
|
|
line.quad 0x08 "WP1_VAL_DT$1,Watchpoint 1 comparison value of DTM $1"
|
|
line.quad 0x10 "WP1_MASK_DT$1,Watchpoint 1 comparison mask of DTM $1"
|
|
NEWLINE
|
|
group.quad ($2+0xD0)++0x17
|
|
line.quad 0x00 "WP2_CONFIG_DT$1,Watchpoint 2 configuration of DTM $1"
|
|
hexmask.quad.byte 0x00 19.--20. " CHN_NUM ,VC number index for replicated channels"
|
|
hexmask.quad.byte 0x00 17.--18. " DEV_SEL2 ,Upper bits for device port selection"
|
|
NEWLINE
|
|
bitfld.quad 0x00 16. " DBGTRIG_EN ,Enables watchpoint debug trigger packet generation" "Disabled,Enabled"
|
|
bitfld.quad 0x00 15. " CTRIG_EN ,Enables watchpoint cross trigger packet generation" "Disabled,Enabled"
|
|
NEWLINE
|
|
bitfld.quad 0x00 14. " CC_EN ,Enables inclusion of cycle count in watchpoint track packet generation" "Disabled,Enabled"
|
|
bitfld.quad 0x00 11.--13. " PKT_TYPE " "1 Byte,2 Byte,5 Byte,,Control,Data low,Data high,"
|
|
NEWLINE
|
|
bitfld.quad 0x00 10. " PKT_GEN ,Enables watchpoint trace packet generation" "Disabled,Enabled"
|
|
bitfld.quad 0x00 9. " COMBINE ,Enables combination with next watchpoint" "Single,Combined"
|
|
NEWLINE
|
|
bitfld.quad 0x00 8. " EXCLUSIVE ,Watchpoint mode" "Regular,Exclusive"
|
|
bitfld.quad 0x00 6.--7. " RSVDC_BSEL ,Byte select of RSVDC" "[7:0],[15:8],[23:16],[31:24]"
|
|
NEWLINE
|
|
bitfld.quad 0x00 4.--5. " GRP ,Watchpoint register format group" "Primary,Secondary,Tertiary,"
|
|
NEWLINE
|
|
bitfld.quad 0x00 1.--3. " CHN_SEL ,VC selection" "REQ,RSP,SNP,DATA,?..."
|
|
bitfld.quad 0x00 0. " DEV_SEL ,Device port selection in Specified SMXP" "Port 0,Port 1"
|
|
line.quad 0x08 "WP2_VAL_DT$1,Watchpoint 2 comparison value of DTM $1"
|
|
line.quad 0x10 "WP2_MASK_DT$1,Watchpoint 2 comparison mask of DTM $1"
|
|
NEWLINE
|
|
group.quad ($2+0xE8)++0x17
|
|
line.quad 0x00 "WP3_CONFIG_DT$1,Watchpoint 3 configuration of DTM $1"
|
|
hexmask.quad.byte 0x00 19.--20. " CHN_NUM ,VC number index for replicated channels"
|
|
hexmask.quad.byte 0x00 17.--18. " DEV_SEL2 ,Upper bits for device port selection"
|
|
NEWLINE
|
|
bitfld.quad 0x00 16. " DBGTRIG_EN ,Enables watchpoint debug trigger packet generation" "Disabled,Enabled"
|
|
bitfld.quad 0x00 15. " CTRIG_EN ,Enables watchpoint cross trigger packet generation" "Disabled,Enabled"
|
|
NEWLINE
|
|
bitfld.quad 0x00 14. " CC_EN ,Enables inclusion of cycle count in watchpoint track packet generation" "Disabled,Enabled"
|
|
bitfld.quad 0x00 11.--13. " PKT_TYPE " "1 Byte,2 Byte,5 Byte,,Control,Data low,Data high,"
|
|
NEWLINE
|
|
bitfld.quad 0x00 10. " PKT_GEN ,Enables watchpoint trace packet generation" "Disabled,Enabled"
|
|
NEWLINE
|
|
bitfld.quad 0x00 8. " EXCLUSIVE ,Watchpoint mode" "Regular,Exclusive"
|
|
bitfld.quad 0x00 6.--7. " RSVDC_BSEL ,Byte select of RSVDC" "[7:0],[15:8],[23:16],[31:24]"
|
|
NEWLINE
|
|
bitfld.quad 0x00 4.--5. " GRP ,Watchpoint register format group" "Primary,Secondary,Tertiary,"
|
|
NEWLINE
|
|
bitfld.quad 0x00 1.--3. " CHN_SEL ,VC selection" "REQ,RSP,SNP,DATA,?..."
|
|
bitfld.quad 0x00 0. " DEV_SEL ,Device port selection in Specified SMXP" "Port 0,Port 1"
|
|
line.quad 0x08 "WP3_VAL_DT$1,Watchpoint 3 comparison value of DTM $1"
|
|
line.quad 0x10 "WP3_MASK_DT$1,Watchpoint 3 comparison mask of DTM $1"
|
|
NEWLINE
|
|
group.quad ($2+0x100)++0x17
|
|
line.quad 0x00 "PMSICR_DT$1,Sampling interval counter register of DTM $1"
|
|
hexmask.quad.long 0x00 0.--31. " COUNT ,Current value of sample counter"
|
|
line.quad 0x08 "PMSIRR_DT$1,Sampling interval reload register of DTM $1"
|
|
hexmask.quad.long 0x08 8.--31. " INTERVAL ,Sampling interval to be reloaded"
|
|
line.quad 0x10 "PMU_CONFIG_DT$1,DTM PMU configuration of DTM $1"
|
|
hexmask.quad.word 0x10 56.--63. " PMEVCNT3_INPUT_SEL ,Source of PMU counter 3"
|
|
hexmask.quad.word 0x10 48.--55. " PMEVCNT2_INPUT_SEL ,Source of PMU counter 2"
|
|
NEWLINE
|
|
hexmask.quad.word 0x10 40.--47. " PMEVCNT1_INPUT_SEL ,Source of PMU counter 1"
|
|
hexmask.quad.word 0x10 32.--39. " PMEVCNT0_INPUT_SEL ,Source of PMU counter 0"
|
|
NEWLINE
|
|
bitfld.quad 0x10 28.--30. " PMEVCNT3_GLOBAL_NUM ,Global counter to pair with PMU counter 3" "A,B,C,D,E,F,G,H"
|
|
bitfld.quad 0x10 24.--26. " PMEVCNT2_GLOBAL_NUM ,Global counter to pair with PMU counter 2" "A,B,C,D,E,F,G,H"
|
|
NEWLINE
|
|
bitfld.quad 0x10 20.--22. " PMEVCNT1_GLOBAL_NUM ,Global counter to pair with PMU counter 1" "A,B,C,D,E,F,G,H"
|
|
bitfld.quad 0x10 16.--18. " PMEVCNT0_GLOBAL_NUM ,Global counter to pair with PMU counter 0" "A,B,C,D,E,F,G,H"
|
|
NEWLINE
|
|
bitfld.quad 0x10 8. " CNTR_RST ,Reset live counters upon assertion of snapshot" ",Reset"
|
|
hexmask.quad.word 0x10 4.--7. " PMEVCNT_PAIRED ,PMU local counter paired with global counter"
|
|
NEWLINE
|
|
bitfld.quad 0x10 3. " PMEVCNTALL_COMBINED ,Enables combination of all PMU counters" "Disabled,Enabled"
|
|
bitfld.quad 0x10 2. " PMEVCNT23_COMBINED ,Enables combination of PMU counters 2 and 3" "Disabled,Enabled"
|
|
NEWLINE
|
|
bitfld.quad 0x10 1. " PMEVCNT01_COMBINED ,Enables combination of PMU counters 0 and 1" "Disabled,Enabled"
|
|
bitfld.quad 0x10 0. " PMU_EN ,DTM PMU enable" "Disabled,Enabled"
|
|
group.quad ($2+0x120)++0x7
|
|
line.quad 0x00 "PMEVCNT_DT$1,PMU event counters of DTM $1"
|
|
hexmask.quad.word 0x00 48.--63. " PMEVCNT3 ,PMU event counter 3"
|
|
hexmask.quad.word 0x00 32.--47. " PMEVCNT2 ,PMU event counter 2"
|
|
NEWLINE
|
|
hexmask.quad.word 0x00 16.--31. " PMEVCNT1 ,PMU event counter 1"
|
|
hexmask.quad.word 0x00 0.--15. " PMEVCNT0 ,PMU event counter 0"
|
|
group.quad ($2+0x140)++0x7
|
|
line.quad 0x00 "PMEVCNTSR_DT$1,PU event counter shadow registers of DTM $1"
|
|
hexmask.quad.word 0x00 48.--63. " PMEVCNTSR3 ,PMU event counter 3 shadow register"
|
|
hexmask.quad.word 0x00 32.--47. " PMEVCNTSR2 ,PMU event counter 2 shadow register"
|
|
NEWLINE
|
|
hexmask.quad.word 0x00 16.--31. " PMEVCNTSR1 ,PMU event counter 1 shadow register"
|
|
hexmask.quad.word 0x00 0.--15. " PMEVCNTSR0 ,PMU event counter 0 shadow register"
|
|
tree.end
|
|
REPEAT.end
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
repeat.end
|
|
endif
|
|
tree.end
|